tmakin/ack-tegra
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

ASoC: MediaTek MT8195/86 Cleanups

Browse Source 
Merge series from AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>:

This series performs some cleanups for mainly MT8195 and switches
both MT8195 and MT8186's SOF driver to the snd_sof_ipc_process_reply()
helper.
This commit is contained in:
Mark Brown
2023-05-09 15:34:56 +09:00
parent 3e4a826129 863da1c176
commit 5782f01994
3 changed files with 36 additions and 135 deletions
Download Patch File Download Diff File Expand all files Collapse all files
sound/soc/mediatek/mt8195/mt8195-afe-pcm.c
+34 -65
View File
@@ -3030,28 +3030,6 @@ static const struct reg_sequence mt8195_cg_patch[] = {
{ AUDIO_TOP_CON1, 0xfffffff8 },
};
static int mt8195_afe_init_registers(struct mtk_base_afe *afe)
{
return regmap_multi_reg_write(afe->regmap,
mt8195_afe_reg_defaults,
ARRAY_SIZE(mt8195_afe_reg_defaults));
}
static void mt8195_afe_parse_of(struct mtk_base_afe *afe,
struct device_node *np)
{
#if IS_ENABLED(CONFIG_SND_SOC_MT6359)
struct mt8195_afe_private *afe_priv = afe->platform_priv;
afe_priv->topckgen = syscon_regmap_lookup_by_phandle(afe->dev->of_node,
"mediatek,topckgen");
if (IS_ERR(afe_priv->topckgen)) {
dev_info(afe->dev, "%s() Cannot find topckgen controller: %ld\n",
__func__, PTR_ERR(afe_priv->topckgen));
}
#endif
}
static int mt8195_afe_pcm_dev_probe(struct platform_device *pdev)
{
struct mtk_base_afe *afe;
@@ -3062,10 +3040,8 @@ static int mt8195_afe_pcm_dev_probe(struct platform_device *pdev)
struct snd_soc_component *component;
ret = of_reserved_mem_device_init(dev);
if (ret) {
dev_err(dev, "failed to assign memory region: %d\n", ret);
return ret;
}
if (ret)
return dev_err_probe(dev, ret, "failed to assign memory region\n");
ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(33));
if (ret)
@@ -3089,24 +3065,17 @@ static int mt8195_afe_pcm_dev_probe(struct platform_device *pdev)
/* initial audio related clock */
ret = mt8195_afe_init_clock(afe);
if (ret) {
dev_err(dev, "init clock error\n");
return ret;
}
if (ret)
return dev_err_probe(dev, ret, "init clock error\n");
/* reset controller to reset audio regs before regmap cache */
rstc = devm_reset_control_get_exclusive(dev, "audiosys");
if (IS_ERR(rstc)) {
ret = PTR_ERR(rstc);
dev_err(dev, "could not get audiosys reset:%d\n", ret);
return ret;
}
if (IS_ERR(rstc))
return dev_err_probe(dev, PTR_ERR(rstc), "could not get audiosys reset\n");
ret = reset_control_reset(rstc);
if (ret) {
dev_err(dev, "failed to trigger audio reset:%d\n", ret);
return ret;
}
if (ret)
return dev_err_probe(dev, ret, "failed to trigger audio reset\n");
spin_lock_init(&afe_priv->afe_ctrl_lock);
@@ -3143,30 +3112,22 @@ static int mt8195_afe_pcm_dev_probe(struct platform_device *pdev)
ret = devm_request_irq(dev, irq_id, mt8195_afe_irq_handler,
IRQF_TRIGGER_NONE, "asys-isr", (void *)afe);
if (ret) {
dev_err(dev, "could not request_irq for asys-isr\n");
return ret;
}
if (ret)
return dev_err_probe(dev, ret, "could not request_irq for asys-isr\n");
/* init sub_dais */
INIT_LIST_HEAD(&afe->sub_dais);
for (i = 0; i < ARRAY_SIZE(dai_register_cbs); i++) {
ret = dai_register_cbs[i](afe);
if (ret) {
dev_warn(dev, "dai register i %d fail, ret %d\n",
i, ret);
return ret;
}
if (ret)
return dev_err_probe(dev, ret, "dai cb%i register fail\n", i);
}
/* init dai_driver and component_driver */
ret = mtk_afe_combine_sub_dai(afe);
if (ret) {
dev_warn(dev, "mtk_afe_combine_sub_dai fail, ret %d\n",
ret);
return ret;
}
if (ret)
return dev_err_probe(dev, ret, "mtk_afe_combine_sub_dai fail\n");
afe->mtk_afe_hardware = &mt8195_afe_hardware;
afe->memif_fs = mt8195_memif_fs;
@@ -3177,18 +3138,21 @@ static int mt8195_afe_pcm_dev_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, afe);
mt8195_afe_parse_of(afe, pdev->dev.of_node);
pm_runtime_enable(dev);
if (!pm_runtime_enabled(dev)) {
ret = mt8195_afe_runtime_resume(dev);
if (ret)
return ret;
}
afe_priv->topckgen = syscon_regmap_lookup_by_phandle(dev->of_node, "mediatek,topckgen");
if (IS_ERR(afe_priv->topckgen))
dev_dbg(afe->dev, "Cannot find topckgen controller: %ld\n",
PTR_ERR(afe_priv->topckgen));
/* enable clock for regcache get default value from hw */
afe_priv->pm_runtime_bypass_reg_ctl = true;
pm_runtime_get_sync(dev);
ret = devm_pm_runtime_enable(dev);
if (ret)
return ret;
ret = pm_runtime_resume_and_get(dev);
if (ret)
return dev_err_probe(dev, ret, "Failed to resume device\n");
afe->regmap = devm_regmap_init_mmio(&pdev->dev, afe->base_addr,
&mt8195_afe_regmap_config);
@@ -3236,9 +3200,15 @@ static int mt8195_afe_pcm_dev_probe(struct platform_device *pdev)
goto err_pm_put;
}
mt8195_afe_init_registers(afe);
ret = regmap_multi_reg_write(afe->regmap, mt8195_afe_reg_defaults,
ARRAY_SIZE(mt8195_afe_reg_defaults));
if (ret)
goto err_pm_put;
ret = pm_runtime_put_sync(dev);
if (ret)
return dev_err_probe(dev, ret, "Failed to suspend device\n");
pm_runtime_put_sync(dev);
afe_priv->pm_runtime_bypass_reg_ctl = false;
regcache_cache_only(afe->regmap, true);
@@ -3248,7 +3218,6 @@ static int mt8195_afe_pcm_dev_probe(struct platform_device *pdev)
err_pm_put:
pm_runtime_put_sync(dev);
pm_runtime_disable(dev);
return ret;
}
sound/soc/sof/mediatek/mt8186/mt8186.c
+1 -35
View File
@@ -48,47 +48,13 @@ static int mt8186_send_msg(struct snd_sof_dev *sdev,
return mtk_adsp_ipc_send(priv->dsp_ipc, MTK_ADSP_IPC_REQ, MTK_ADSP_IPC_OP_REQ);
}
static void mt8186_get_reply(struct snd_sof_dev *sdev)
{
struct snd_sof_ipc_msg *msg = sdev->msg;
struct sof_ipc_reply reply;
int ret = 0;
if (!msg) {
dev_warn(sdev->dev, "unexpected ipc interrupt\n");
return;
}
/* get reply */
sof_mailbox_read(sdev, sdev->host_box.offset, &reply, sizeof(reply));
if (reply.error < 0) {
memcpy(msg->reply_data, &reply, sizeof(reply));
ret = reply.error;
} else {
/* reply has correct size? */
if (reply.hdr.size != msg->reply_size) {
dev_err(sdev->dev, "error: reply expected %zu got %u bytes\n",
msg->reply_size, reply.hdr.size);
ret = -EINVAL;
}
/* read the message */
if (msg->reply_size > 0)
sof_mailbox_read(sdev, sdev->host_box.offset,
msg->reply_data, msg->reply_size);
}
msg->reply_error = ret;
}
static void mt8186_dsp_handle_reply(struct mtk_adsp_ipc *ipc)
{
struct adsp_priv *priv = mtk_adsp_ipc_get_data(ipc);
unsigned long flags;
spin_lock_irqsave(&priv->sdev->ipc_lock, flags);
mt8186_get_reply(priv->sdev);
snd_sof_ipc_reply(priv->sdev, 0);
snd_sof_ipc_process_reply(priv->sdev, 0);
spin_unlock_irqrestore(&priv->sdev->ipc_lock, flags);
}
sound/soc/sof/mediatek/mt8195/mt8195.c
+1 -35
View File
@@ -49,47 +49,13 @@ static int mt8195_send_msg(struct snd_sof_dev *sdev,
return mtk_adsp_ipc_send(priv->dsp_ipc, MTK_ADSP_IPC_REQ, MTK_ADSP_IPC_OP_REQ);
}
static void mt8195_get_reply(struct snd_sof_dev *sdev)
{
struct snd_sof_ipc_msg *msg = sdev->msg;
struct sof_ipc_reply reply;
int ret = 0;
if (!msg) {
dev_warn(sdev->dev, "unexpected ipc interrupt\n");
return;
}
/* get reply */
sof_mailbox_read(sdev, sdev->host_box.offset, &reply, sizeof(reply));
if (reply.error < 0) {
memcpy(msg->reply_data, &reply, sizeof(reply));
ret = reply.error;
} else {
/* reply has correct size? */
if (reply.hdr.size != msg->reply_size) {
dev_err(sdev->dev, "error: reply expected %zu got %u bytes\n",
msg->reply_size, reply.hdr.size);
ret = -EINVAL;
}
/* read the message */
if (msg->reply_size > 0)
sof_mailbox_read(sdev, sdev->host_box.offset,
msg->reply_data, msg->reply_size);
}
msg->reply_error = ret;
}
static void mt8195_dsp_handle_reply(struct mtk_adsp_ipc *ipc)
{
struct adsp_priv *priv = mtk_adsp_ipc_get_data(ipc);
unsigned long flags;
spin_lock_irqsave(&priv->sdev->ipc_lock, flags);
mt8195_get_reply(priv->sdev);
snd_sof_ipc_reply(priv->sdev, 0);
snd_sof_ipc_process_reply(priv->sdev, 0);
spin_unlock_irqrestore(&priv->sdev->ipc_lock, flags);
}