Merge 6.12.14 into android16-6.12
GKI (arm64) relevant 75 out of 419 changes, affecting 91 files +700/-30438a1aa02b9exec: fix up /proc/pid/comm in the execveat(AT_EMPTY_PATH) case [2 files, +29/-4]e5ff8d825dsched: Don't try to catch up excess steal time. [1 file, +4/-2]404e5fd918printk: Fix signed integer overflow when defining LOG_BUF_LEN_MAX [1 file, +1/-1]b006aadf72drm/connector: add mutex to protect ELD from concurrent access [3 files, +11/-1]22a1a75818ring-buffer: Make reading page consistent with the code logic [1 file, +3/-1]5c2b1d9386tun: fix group permission check [1 file, +9/-5]f4b8bac3cfmmc: core: Respect quirk_max_rate for non-UHS SDIO card [1 file, +2/-0]e557b15ea2HID: multitouch: Add quirk for Hantick 5288 touchpad [1 file, +5/-0]adcb8ce68dHID: Wacom: Add PCI Wacom device support [1 file, +5/-0]ebb90f23f0Bluetooth: MGMT: Fix slab-use-after-free Read in mgmt_remove_adv_monitor_sync [1 file, +11/-1]c257c15845tipc: re-order conditions in tipc_crypto_key_rcv() [1 file, +2/-2]90778f31efASoC: soc-pcm: don't use soc_pcm_ret() on .prepare callback [1 file, +28/-4]33a4a9f54aInput: allocate keycode for phone linking [1 file, +1/-0]57e07d10b3sched/fair: Fix inaccurate h_nr_runnable accounting with delayed dequeue [1 file, +19/-0]bc85817e6bnvme: handle connectivity loss in nvme_set_queue_count [1 file, +7/-1]5eba53a9eanvme: make nvme_tls_attrs_group static [1 file, +1/-1]83ebf741aaudp: gso: do not drop small packets when PMTU reduces [3 files, +30/-4]3139a7024eethtool: rss: fix hiding unsupported fields in dumps [1 file, +2/-1]e40cb34b7fpfifo_tail_enqueue: Drop new packet when sch->limit == 0 [1 file, +3/-0]6312555249netem: Update sch->q.qlen before qdisc_tree_reduce_backlog() [1 file, +1/-1]e36364d5d4tun: revert fix group permission check [1 file, +5/-9]181b23ca2enet: sched: Fix truncation of offloaded action statistics [1 file, +1/-1]ac7b5f3e4ddrm/client: Handle tiled displays better [1 file, +9/-0]f735c9d4dcfs/proc: do_task_stat: Fix ESP not readable during coredump [1 file, +1/-1]5a6520493carm64/kvm: Configure HYP TCR.PS/DS based on host stage1 [1 file, +4/-4]c66e5205fdarm64/sme: Move storage of reg_smidr to __cpuinfo_store_cpu() [2 files, +10/-13]e5251ae5d3arm64/mm: Reduce PA space to 48 bits when LPA2 is not enabled [3 files, +11/-7]de3ffeb212KVM: arm64: timer: Always evaluate the need for a soft timer [1 file, +1/-3]f2f805ada6KVM: Explicitly verify target vCPU is online in kvm_get_vcpu() [1 file, +9/-0]691218a50cBluetooth: L2CAP: handle NULL sock pointer in l2cap_sock_alloc [1 file, +2/-1]ddfc234761Bluetooth: L2CAP: accept zero as a special value for MTU auto-selection [1 file, +2/-2]5a262628f4seccomp: passthrough uretprobe systemcall without filtering [1 file, +12/-0]2ce09aabe0blk-cgroup: Fix class @block_class's subsystem refcount leakage [1 file, +1/-0]ae959ab075scsi: ufs: core: Fix the HIGH/LOW_TEMP Bit Definitions [1 file, +2/-2]45ad3c7d62of: Correct child specifier used as input of the 2nd nexus node [1 file, +1/-1]e62c630810of: address: Fix empty resource handling in __of_address_resource_bounds() [1 file, +5/-7]4e4b3d4926of: Fix of_find_node_opts_by_path() handling of alias+path+options [1 file, +3/-3]5b91440ebeof: reserved-memory: Fix using wrong number of cells to get property 'alignment' [1 file, +2/-2]ed0ad04c68ring-buffer: Do not allow events in NMI with generic atomic64 cmpxchg() [1 file, +7/-2]d0b81ea5a5dm-crypt: don't update io->sector after kcryptd_crypt_write_io_submit() [1 file, +3/-11]68a25ceb11dm-crypt: track tag_offset in convert_context [1 file, +7/-6]68f16d3034block: don't revert iter for -EIOCBQUEUED [1 file, +3/-2]0a14a2b841Revert "media: uvcvideo: Require entities to have a non-zero unique ID" [1 file, +27/-43]3d17a4bbf2PCI: endpoint: Finish virtual EP removal in pci_epf_remove_vepf() [1 file, +1/-0]36786d1a45PCI: dwc: ep: Write BAR_MASK before iATU registers in pci_epc_set_bar() [1 file, +15/-13]b5cacfd067PCI: dwc: ep: Prevent changing BAR size/flags in pci_epc_set_bar() [1 file, +21/-1]9fbac83100nvme-pci: Add TUXEDO InfinityFlex to Samsung sleep quirk [1 file, +2/-1]2c4cda456envme-pci: Add TUXEDO IBP Gen9 to Samsung sleep quirk [1 file, +1/-0]0c77c0d754scsi: ufs: core: Fix use-after free in init error and remove paths [4 files, +30/-32]8db25d4c4ascsi: core: Do not retry I/Os during depopulation [1 file, +7/-2]c287f18f64rv: Reset per-task monitors also for idle tasks [1 file, +4/-0]e456a88bddhrtimers: Force migrate away hrtimers queued after CPUHP_AP_HRTIMERS_DYING [2 files, +83/-21]2a54e8f118kfence: skip __GFP_THISNODE allocations on NUMA systems [1 file, +2/-0]b64b773087soc: qcom: smem_state: fix missing of_node_put in error path [1 file, +2/-1]5100391acamedia: mc: fix endpoint iteration [1 file, +1/-1]d2eac8b14amedia: uvcvideo: Fix crash during unbind if gpio unit is in use [2 files, +22/-7]4f534dd576media: uvcvideo: Fix event flags in uvc_ctrl_send_events [1 file, +2/-2]ac7737ed9amedia: uvcvideo: Support partial control reads [1 file, +21/-0]34fb9eb31dmedia: uvcvideo: Only save async fh if success [1 file, +11/-7]e8a650dbc7media: uvcvideo: Remove redundant NULL assignment [1 file, +1/-3]438bda062bmedia: uvcvideo: Remove dangling pointers [3 files, +67/-3]a403eca86cmm: gup: fix infinite loop within __get_longterm_locked [1 file, +4/-10]4b69308314mm/vmscan: accumulate nr_demoted for accurate demotion statistics [1 file, +4/-3]4491159774mm/compaction: fix UBSAN shift-out-of-bounds warning [1 file, +2/-1]2c3109dcdanvmem: core: improve range check for nvmem_cell_write() [1 file, +2/-0]35ae7910c3io_uring: fix multishots with selected buffers [1 file, +2/-0]be985aea92io_uring/net: don't retry connect operation on EPOLLERR [2 files, +7/-0]e398619920i3c: master: Fix missing 'ret' assignment in set_speed() [1 file, +1/-1]8b4120b3e0misc: misc_minor_alloc to use ida for all dynamic/misc dynamic minors [1 file, +30/-9]19fc795e9dmaple_tree: simplify split calculation [1 file, +6/-17]8441aea464ptp: Ensure info->enable callback is always set [1 file, +8/-0]c6dd70e5b4timers/migration: Fix off-by-one root mis-connection [1 file, +9/-1]45439a8b11fs: prepend statmount.mnt_opts string with security_sb_mnt_opts() [1 file, +4/-0]7db0365ee6fs: fix adding security options to statmount.mnt_opt [1 file, +14/-15]d49c64c1d7statmount: let unset strings be empty [1 file, +12/-4] Changes in 6.12.14 irqchip/lan966x-oic: Make CONFIG_LAN966X_OIC depend on CONFIG_MCHP_LAN966X_PCI btrfs: fix assertion failure when splitting ordered extent after transaction abort btrfs: do not output error message if a qgroup has been already cleaned up btrfs: fix use-after-free when attempting to join an aborted transaction arm64/mm: Ensure adequate HUGE_MAX_HSTATE exec: fix up /proc/pid/comm in the execveat(AT_EMPTY_PATH) case s390/stackleak: Use exrl instead of ex in __stackleak_poison() btrfs: fix data race when accessing the inode's disk_i_size at btrfs_drop_extents() btrfs: convert BUG_ON in btrfs_reloc_cow_block() to proper error handling sched: Don't try to catch up excess steal time. x86: Convert unreachable() to BUG() locking/ww_mutex/test: Use swap() macro lockdep: Fix upper limit for LOCKDEP_*_BITS configs x86/amd_nb: Restrict init function to AMD-based systems drm/virtio: New fence for every plane update drm: Add panel backlight quirks drm: panel-backlight-quirks: Add Framework 13 matte panel drm: panel-backlight-quirks: Add Framework 13 glossy and 2.8k panels nvkm/gsp: correctly advance the read pointer of GSP message queue nvkm: correctly calculate the available space of the GSP cmdq buffer drm/tests: hdmi: handle empty modes in find_preferred_mode() drm/tests: hdmi: return meaningful value from set_connector_edid() drm/amd/display: Populate chroma prefetch parameters, DET buffer fix drm/amd/display: Overwriting dualDPP UBF values before usage printk: Fix signed integer overflow when defining LOG_BUF_LEN_MAX drm/connector: add mutex to protect ELD from concurrent access drm/bridge: anx7625: use eld_mutex to protect access to connector->eld drm/bridge: ite-it66121: use eld_mutex to protect access to connector->eld drm/amd/display: use eld_mutex to protect access to connector->eld drm/exynos: hdmi: use eld_mutex to protect access to connector->eld drm/radeon: use eld_mutex to protect access to connector->eld drm/sti: hdmi: use eld_mutex to protect access to connector->eld drm/vc4: hdmi: use eld_mutex to protect access to connector->eld drm/amd/display: Fix Mode Cutoff in DSC Passthrough to DP2.1 Monitor drm/amdgpu: Don't enable sdma 4.4.5 CTXEMPTY interrupt drm/amdkfd: Queue interrupt work to different CPU drm/bridge: it6505: Change definition MAX_HDCP_DOWN_STREAM_COUNT drm/bridge: it6505: fix HDCP Bstatus check drm/bridge: it6505: fix HDCP encryption when R0 ready drm/bridge: it6505: fix HDCP CTS compare V matching drm/bridge: it6505: fix HDCP CTS KSV list wait timer safesetid: check size of policy writes drm/amd/display: Increase sanitizer frame larger than limit when compile testing with clang drm/amd/display: Limit Scaling Ratio on DCN3.01 ring-buffer: Make reading page consistent with the code logic wifi: rtw89: add crystal_cap check to avoid setting as overflow value tun: fix group permission check mmc: core: Respect quirk_max_rate for non-UHS SDIO card mmc: sdhci-esdhc-imx: enable 'SDHCI_QUIRK_NO_LED' quirk for S32G wifi: brcmsmac: add gain range check to wlc_phy_iqcal_gainparams_nphy() tomoyo: don't emit warning in tomoyo_write_control() mfd: lpc_ich: Add another Gemini Lake ISA bridge PCI device-id wifi: rtw88: add __packed attribute to efuse layout struct clk: qcom: Make GCC_8150 depend on QCOM_GDSC HID: multitouch: Add quirk for Hantick 5288 touchpad HID: Wacom: Add PCI Wacom device support net/mlx5: use do_aux_work for PHC overflow checks wifi: brcmfmac: Check the return value of of_property_read_string_index() wifi: iwlwifi: pcie: Add support for new device ids wifi: iwlwifi: avoid memory leak i2c: Force ELAN06FA touchpad I2C bus freq to 100KHz APEI: GHES: Have GHES honor the panic= setting Bluetooth: btusb: Add new VID/PID 13d3/3610 for MT7922 Bluetooth: btusb: Add new VID/PID 13d3/3628 for MT7925 Bluetooth: MGMT: Fix slab-use-after-free Read in mgmt_remove_adv_monitor_sync net: wwan: iosm: Fix hibernation by re-binding the driver around it HID: hid-asus: Disable OOBE mode on the ProArt P16 mmc: sdhci-msm: Correctly set the load for the regulator octeon_ep: update tx/rx stats locally for persistence octeon_ep_vf: update tx/rx stats locally for persistence tipc: re-order conditions in tipc_crypto_key_rcv() selftests/net/ipsec: Fix Null pointer dereference in rtattr_pack() net: ethernet: ti: am65-cpsw: ensure proper channel cleanup in error path ASoC: SOF: Intel: hda-dai: Ensure DAI widget is valid during params x86/kexec: Allocate PGD for x86_64 transition page tables separately ASoC: Intel: sof_sdw: Correct quirk for Lenovo Yoga Slim 7 iommu/arm-smmu-qcom: add sdm670 adreno iommu compatible iommu/arm-smmu-v3: Clean up more on probe failure platform/x86: int3472: Check for adev == NULL platform/x86: acer-wmi: Add support for Acer PH14-51 ASoC: soc-pcm: don't use soc_pcm_ret() on .prepare callback platform/x86: acer-wmi: Add support for Acer Predator PH16-72 ASoC: amd: Add ACPI dependency to fix build error Input: allocate keycode for phone linking platform/x86: acer-wmi: add support for Acer Nitro AN515-58 platform/x86: acer-wmi: Ignore AC events KVM: PPC: e500: Mark "struct page" dirty in kvmppc_e500_shadow_map() KVM: PPC: e500: Mark "struct page" pfn accessed before dropping mmu_lock KVM: PPC: e500: Use __kvm_faultin_pfn() to handle page faults KVM: e500: always restore irqs drm/amdgpu: Fix Circular Locking Dependency in AMDGPU GFX Isolation xfs: report realtime block quota limits on realtime directories xfs: don't over-report free space or inodes in statvfs tty: xilinx_uartps: split sysrq handling tty: Permit some TIOCL_SETSEL modes without CAP_SYS_ADMIN platform/x86: serdev_helpers: Check for serial_ctrl_uid == NULL sched/fair: Fix inaccurate h_nr_runnable accounting with delayed dequeue nvme: handle connectivity loss in nvme_set_queue_count firmware: iscsi_ibft: fix ISCSI_IBFT Kconfig entry gpu: drm_dp_cec: fix broken CEC adapter properties check ice: put Rx buffers after being done with current frame ice: gather page_count()'s of each frag right before XDP prog call ice: stop storing XDP verdict within ice_rx_buf nvme: make nvme_tls_attrs_group static nvme-fc: use ctrl state getter net: bcmgenet: Correct overlaying of PHY and MAC Wake-on-LAN ice: Add check for devm_kzalloc() vmxnet3: Fix tx queue race condition with XDP tg3: Disable tg3 PCIe AER on system reboot udp: gso: do not drop small packets when PMTU reduces drm/i915/dp: fix the Adaptive sync Operation mode for SDP ethtool: rss: fix hiding unsupported fields in dumps rxrpc: Fix the rxrpc_connection attend queue handling gpio: pca953x: Improve interrupt support net: atlantic: fix warning during hot unplug net: rose: lock the socket in rose_bind() gpio: sim: lock hog configfs items if present x86/xen: fix xen_hypercall_hvm() to not clobber %rbx x86/xen: add FRAME_END to xen_hypercall_hvm() ACPI: property: Fix return value for nval == 0 in acpi_data_prop_read() pfifo_tail_enqueue: Drop new packet when sch->limit == 0 netem: Update sch->q.qlen before qdisc_tree_reduce_backlog() tun: revert fix group permission check net: sched: Fix truncation of offloaded action statistics rxrpc: Fix call state set to not include the SERVER_SECURING state cpufreq: fix using cpufreq-dt as module cpufreq: s3c64xx: Fix compilation warning leds: lp8860: Write full EEPROM, not only half of it ALSA: hda/realtek: Enable Mute LED on HP Laptop 14s-fq1xxx cifs: Remove intermediate object of failed create SFU call drm/modeset: Handle tiled displays in pan_display_atomic. drm/client: Handle tiled displays better smb: client: fix order of arguments of tracepoints smb: client: change lease epoch type from unsigned int to __u16 md: reintroduce md-linear s390/futex: Fix FUTEX_OP_ANDN implementation arm64: Filter out SVE hwcaps when FEAT_SVE isn't implemented m68k: vga: Fix I/O defines fs/proc: do_task_stat: Fix ESP not readable during coredump binfmt_flat: Fix integer overflow bug on 32 bit systems accel/ivpu: Fix Qemu crash when running in passthrough arm64/kvm: Configure HYP TCR.PS/DS based on host stage1 arm64/mm: Override PARange for !LPA2 and use it consistently arm64/sme: Move storage of reg_smidr to __cpuinfo_store_cpu() arm64/mm: Reduce PA space to 48 bits when LPA2 is not enabled KVM: arm64: timer: Always evaluate the need for a soft timer drm/rockchip: cdn-dp: Use drm_connector_helper_hpd_irq_event() arm64: dts: rockchip: increase gmac rx_delay on rk3399-puma remoteproc: omap: Handle ARM dma_iommu_mapping KVM: Explicitly verify target vCPU is online in kvm_get_vcpu() kvm: defer huge page recovery vhost task to later KVM: s390: vsie: fix some corner-cases when grabbing vsie pages ksmbd: fix integer overflows on 32 bit systems drm/amd/display: Optimize cursor position updates drm/amd/pm: Mark MM activity as unsupported drm/amd/amdgpu: change the config of cgcg on gfx12 drm/amdkfd: only flush the validate MES contex drm/amdkfd: Block per-queue reset when halt_if_hws_hang=1 Revert "drm/amd/display: Use HW lock mgr for PSR1" drm/i915/guc: Debug print LRC state entries only if the context is pinned drm/i915: Fix page cleanup on DMA remap failure drm/komeda: Add check for komeda_get_layer_fourcc_list() drm/xe/devcoredump: Move exec queue snapshot to Contexts section drm/i915/dp: Iterate DSC BPP from high to low on all platforms drm/i915: Drop 64bpp YUV formats from ICL+ SDR planes drm/amdgpu: add a BO metadata flag to disable write compression for Vulkan drm/amd/display: Fix seamless boot sequence Bluetooth: L2CAP: handle NULL sock pointer in l2cap_sock_alloc Bluetooth: L2CAP: accept zero as a special value for MTU auto-selection KEYS: trusted: dcp: fix improper sg use with CONFIG_VMAP_STACK=y clk: sunxi-ng: a100: enable MMC clock reparenting clk: mmp2: call pm_genpd_init() only after genpd.name is set media: i2c: ds90ub960: Fix UB9702 refclk register access clk: clk-loongson2: Fix the number count of clk provider clk: qcom: clk-alpha-pll: fix alpha mode configuration clk: qcom: gcc-sm8550: Do not turn off PCIe GDSCs during gdsc_disable() clk: qcom: gcc-sm8650: Do not turn off PCIe GDSCs during gdsc_disable() clk: qcom: gcc-sm6350: Add missing parent_map for two clocks clk: qcom: dispcc-sm6350: Add missing parent_map for a clock clk: qcom: gcc-mdm9607: Fix cmd_rcgr offset for blsp1_uart6 rcg clk: qcom: clk-rpmh: prevent integer overflow in recalc_rate clk: mediatek: mt2701-vdec: fix conversion to mtk_clk_simple_probe clk: mediatek: mt2701-aud: fix conversion to mtk_clk_simple_probe clk: mediatek: mt2701-bdp: add missing dummy clk clk: mediatek: mt2701-img: add missing dummy clk clk: mediatek: mt2701-mm: add missing dummy clk seccomp: passthrough uretprobe systemcall without filtering blk-cgroup: Fix class @block_class's subsystem refcount leakage efi: libstub: Use '-std=gnu11' to fix build with GCC 15 perf bench: Fix undefined behavior in cmpworker() scsi: ufs: core: Fix the HIGH/LOW_TEMP Bit Definitions of: Correct child specifier used as input of the 2nd nexus node of: address: Fix empty resource handling in __of_address_resource_bounds() of: Fix of_find_node_opts_by_path() handling of alias+path+options of: reserved-memory: Fix using wrong number of cells to get property 'alignment' Input: bbnsm_pwrkey - add remove hook HID: hid-sensor-hub: don't use stale platform-data on remove ring-buffer: Do not allow events in NMI with generic atomic64 cmpxchg() atomic64: Use arch_spin_locks instead of raw_spin_locks wifi: rtlwifi: rtl8821ae: Fix media status report wifi: brcmfmac: fix NULL pointer dereference in brcmf_txfinalize() wifi: mt76: mt7921u: Add VID/PID for TP-Link TXE50UH wifi: rtw88: sdio: Fix disconnection after beacon loss wifi: mt76: mt7915: add module param to select 5 GHz or 6 GHz on MT7916 wifi: rtw88: 8703b: Fix RX/TX issues usb: gadget: f_tcm: Translate error to sense usb: gadget: f_tcm: Decrement command ref count on cleanup usb: gadget: f_tcm: ep_autoconfig with fullspeed endpoint usb: gadget: f_tcm: Don't prepare BOT write request twice usbnet: ipheth: fix possible overflow in DPE length check usbnet: ipheth: use static NDP16 location in URB usbnet: ipheth: check that DPE points past NCM header usbnet: ipheth: refactor NCM datagram loop usbnet: ipheth: break up NCM header size computation usbnet: ipheth: fix DPE OoB read usbnet: ipheth: document scope of NCM implementation arm64: dts: qcom: x1e80100-asus-vivobook-s15: Fix USB QMP PHY supplies arm64: dts: qcom: x1e80100-qcp: Fix USB QMP PHY supplies arm64: dts: qcom: x1e78100-lenovo-thinkpad-t14s: Fix USB QMP PHY supplies arm64: dts: qcom: x1e80100-crd: Fix USB QMP PHY supplies arm64: dts: qcom: x1e80100-lenovo-yoga-slim7x: Fix USB QMP PHY supplies arm64: dts: qcom: x1e80100-microsoft-romulus: Fix USB QMP PHY supplies arm64: dts: qcom: x1e80100: Fix usb_2 controller interrupts ASoC: acp: Support microphone from Lenovo Go S soc: qcom: socinfo: Avoid out of bounds read of serial number serial: sh-sci: Drop __initdata macro for port_cfg serial: sh-sci: Do not probe the serial port if its slot in sci_ports[] is in use MIPS: Loongson64: remove ROM Size unit in boardinfo LoongArch: Extend the maximum number of watchpoints powerpc/pseries/eeh: Fix get PE state translation dm-crypt: don't update io->sector after kcryptd_crypt_write_io_submit() dm-crypt: track tag_offset in convert_context mips/math-emu: fix emulation of the prefx instruction MIPS: pci-legacy: Override pci_address_to_pio Revert "MIPS: csrc-r4k: Select HAVE_UNSTABLE_SCHED_CLOCK if SMP && 64BIT" block: don't revert iter for -EIOCBQUEUED Revert "media: uvcvideo: Require entities to have a non-zero unique ID" firmware: qcom: scm: Fix missing read barrier in qcom_scm_is_available() firmware: qcom: scm: Fix missing read barrier in qcom_scm_get_tzmem_pool() ALSA: hda/realtek: Enable headset mic on Positivo C6400 ALSA: hda/realtek: Fix quirk matching for Legion Pro 7 ALSA: hda: Fix headset detection failure due to unstable sort arm64: tegra: Fix Tegra234 PCIe interrupt-map s390/pci: Fix SR-IOV for PFs initially in standby PCI: Avoid putting some root ports into D3 on TUXEDO Sirius Gen1 PCI: endpoint: Finish virtual EP removal in pci_epf_remove_vepf() PCI: dwc: ep: Write BAR_MASK before iATU registers in pci_epc_set_bar() PCI: dwc: ep: Prevent changing BAR size/flags in pci_epc_set_bar() nvme-pci: Add TUXEDO InfinityFlex to Samsung sleep quirk nvme-pci: Add TUXEDO IBP Gen9 to Samsung sleep quirk KVM: x86/mmu: Ensure NX huge page recovery thread is alive before waking scsi: st: Don't set pos_unknown just after device recognition scsi: qla2xxx: Move FCE Trace buffer allocation to user control scsi: ufs: qcom: Fix crypto key eviction scsi: ufs: core: Fix use-after free in init error and remove paths scsi: storvsc: Set correct data length for sending SCSI command without payload scsi: core: Do not retry I/Os during depopulation kbuild: Move -Wenum-enum-conversion to W=2 rust: init: use explicit ABI to clean warning in future compilers x86: rust: set rustc-abi=x86-softfloat on rustc>=1.86.0 x86/acpi: Fix LAPIC/x2APIC parsing order x86/boot: Use '-std=gnu11' to fix build with GCC 15 ubi: Add a check for ubi_num ARM: dts: dra7: Add bus_dma_limit for l4 cfg bus ARM: dts: ti/omap: gta04: fix pm issues caused by spi module arm64: dts: mediatek: mt8183: Disable DPI display output by default arm64: dts: qcom: sdx75: Fix MPSS memory length arm64: dts: qcom: x1e80100: Fix ADSP memory base and length arm64: dts: qcom: x1e80100: Fix CDSP memory length arm64: dts: qcom: sm6115: Fix MPSS memory length arm64: dts: qcom: sm6115: Fix CDSP memory length arm64: dts: qcom: sm6115: Fix ADSP memory base and length arm64: dts: qcom: sm6350: Fix ADSP memory length arm64: dts: qcom: sm6350: Fix MPSS memory length arm64: dts: qcom: sm6350: Fix uart1 interconnect path arm64: dts: qcom: sm6375: Fix ADSP memory length arm64: dts: qcom: sm6375: Fix CDSP memory base and length arm64: dts: qcom: sm6375: Fix MPSS memory base and length arm64: dts: qcom: sm8350: Fix ADSP memory base and length arm64: dts: qcom: sm8350: Fix CDSP memory base and length arm64: dts: qcom: sm8350: Fix MPSS memory length arm64: dts: qcom: sm8450: Fix ADSP memory base and length arm64: dts: qcom: sm8450: Fix CDSP memory length arm64: dts: qcom: sm8450: Fix MPSS memory length arm64: dts: qcom: sm8550: Fix ADSP memory base and length arm64: dts: qcom: sm8550: Fix CDSP memory length arm64: dts: qcom: sm8550: Fix MPSS memory length arm64: dts: qcom: sm8650: Fix ADSP memory base and length arm64: dts: qcom: sm8650: Fix CDSP memory length arm64: dts: qcom: sm8650: Fix MPSS memory length arm64: dts: qcom: sm8550: correct MDSS interconnects arm64: dts: qcom: sm8650: correct MDSS interconnects crypto: qce - fix priority to be less than ARMv8 CE arm64: tegra: Fix typo in Tegra234 dce-fabric compatible arm64: tegra: Disable Tegra234 sce-fabric node parisc: Temporarily disable jump label support pwm: microchip-core: fix incorrect comparison with max period xfs: don't call remap_verify_area with sb write protection held xfs: Propagate errors from xfs_reflink_cancel_cow_range in xfs_dax_write_iomap_end xfs: Add error handling for xfs_reflink_cancel_cow_range accel/ivpu: Clear runtime_error after pm_runtime_resume_and_get() fails ACPI: PRM: Remove unnecessary strict handler address checks tpm: Change to kvalloc() in eventlog/acpi.c rv: Reset per-task monitors also for idle tasks hrtimers: Force migrate away hrtimers queued after CPUHP_AP_HRTIMERS_DYING iommufd: Fix struct iommu_hwpt_pgfault init and padding kfence: skip __GFP_THISNODE allocations on NUMA systems media: ccs: Clean up parsed CCS static data on parse failure mm/hugetlb: fix avoid_reserve to allow taking folio from subpool iio: light: as73211: fix channel handling in only-color triggered buffer iommu/tegra241-cmdqv: Read SMMU IDR1.CMDQS instead of hardcoding iommufd/fault: Destroy response and mutex in iommufd_fault_destroy() iommufd/fault: Use a separate spinlock to protect fault->deliver list soc: samsung: exynos-pmu: Fix uninitialized ret in tensor_set_bits_atomic() soc: mediatek: mtk-devapc: Fix leaking IO map on error paths soc: mediatek: mtk-devapc: Fix leaking IO map on driver remove soc: qcom: llcc: Enable LLCC_WRCACHE at boot on X1 soc: qcom: smem_state: fix missing of_node_put in error path media: mmp: Bring back registration of the device media: mc: fix endpoint iteration media: nuvoton: Fix an error check in npcm_video_ece_init() media: imx296: Add standby delay during probe media: intel/ipu6: remove cpu latency qos request on error media: ov5640: fix get_light_freq on auto media: stm32: dcmipp: correct dma_set_mask_and_coherent mask value media: ccs: Fix CCS static data parsing for large block sizes media: ccs: Fix cleanup order in ccs_probe() media: i2c: ds90ub9x3: Fix extra fwnode_handle_put() media: i2c: ds90ub960: Fix use of non-existing registers on UB9702 media: i2c: ds90ub960: Fix UB9702 VC map media: i2c: ds90ub960: Fix logging SP & EQ status only for UB9702 media: uvcvideo: Fix crash during unbind if gpio unit is in use media: uvcvideo: Fix event flags in uvc_ctrl_send_events media: uvcvideo: Support partial control reads media: uvcvideo: Only save async fh if success media: uvcvideo: Remove redundant NULL assignment media: uvcvideo: Remove dangling pointers mm: kmemleak: fix upper boundary check for physical address objects mm: gup: fix infinite loop within __get_longterm_locked mm/vmscan: accumulate nr_demoted for accurate demotion statistics mm/hugetlb: fix hugepage allocation for interleaved memory nodes mm/compaction: fix UBSAN shift-out-of-bounds warning ata: libata-sff: Ensure that we cannot write outside the allocated buffer irqchip/irq-mvebu-icu: Fix access to msi_data from irq_domain::host_data crypto: qce - fix goto jump in error path crypto: qce - unregister previously registered algos in error path ceph: fix memory leak in ceph_mds_auth_match() nvmem: qcom-spmi-sdam: Set size in struct nvmem_config nvmem: core: improve range check for nvmem_cell_write() nvmem: imx-ocotp-ele: simplify read beyond device check nvmem: imx-ocotp-ele: fix MAC address byte order nvmem: imx-ocotp-ele: fix reading from non zero offset nvmem: imx-ocotp-ele: set word length to 1 io_uring: fix multishots with selected buffers io_uring/net: don't retry connect operation on EPOLLERR vfio/platform: check the bounds of read/write syscalls selftests: mptcp: connect: -f: no reconnect pnfs/flexfiles: retry getting layout segment for reads ocfs2: fix incorrect CPU endianness conversion causing mount failure ocfs2: handle a symlink read error correctly nilfs2: fix possible int overflows in nilfs_fiemap() nfs: Make NFS_FSCACHE select NETFS_SUPPORT instead of depending on it NFSD: Encode COMPOUND operation status on page boundaries mailbox: tegra-hsp: Clear mailbox before using message mailbox: zynqmp: Remove invalid __percpu annotation in zynqmp_ipi_probe() NFC: nci: Add bounds checking in nci_hci_create_pipe() fgraph: Fix set_graph_notrace with setting TRACE_GRAPH_NOTRACE_BIT i3c: master: Fix missing 'ret' assignment in set_speed() irqchip/apple-aic: Only handle PMC interrupt as FIQ when configured so mtd: onenand: Fix uninitialized retlen in do_otp_read() misc: misc_minor_alloc to use ida for all dynamic/misc dynamic minors misc: fastrpc: Deregister device nodes properly in error scenarios misc: fastrpc: Fix registered buffer page address misc: fastrpc: Fix copy buffer page size net/ncsi: wait for the last response to Deselect Package before configuring channel net: phy: c45-tjaxx: add delay between MDIO write and read in soft_reset maple_tree: simplify split calculation scripts/gdb: fix aarch64 userspace detection in get_current_task tracing/osnoise: Fix resetting of tracepoints rtla/osnoise: Distinguish missing workload option rtla/timerlat_hist: Set OSNOISE_WORKLOAD for kernel threads rtla/timerlat_top: Set OSNOISE_WORKLOAD for kernel threads rtla: Add trace_instance_stop rtla/timerlat_hist: Stop timerlat tracer on signal rtla/timerlat_top: Stop timerlat tracer on signal pinctrl: samsung: fix fwnode refcount cleanup if platform_get_irq_optional() fails pinctrl: renesas: rzg2l: Fix PFC_MASK for RZ/V2H and RZ/G3E ptp: Ensure info->enable callback is always set RDMA/mlx5: Fix a race for an ODP MR which leads to CQE with error rtc: zynqmp: Fix optional clock name property timers/migration: Fix off-by-one root mis-connection s390/fpu: Add fpc exception handler / remove fixup section again MIPS: ftrace: Declare ftrace_get_parent_ra_addr() as static xfs: avoid nested calls to __xfs_trans_commit xfs: don't lose solo superblock counter update transactions xfs: separate dquot buffer reads from xfs_dqflush xfs: clean up log item accesses in xfs_qm_dqflush{,_done} xfs: attach dquot buffer to dquot log item buffer xfs: convert quotacheck to attach dquot buffers xfs: release the dquot buf outside of qli_lock xfs: lock dquot buffer before detaching dquot from b_li_list xfs: fix mount hang during primary superblock recovery failure spi: atmel-quadspi: Create `atmel_qspi_ops` to support newer SoC families spi: atmel-qspi: Memory barriers after memory-mapped I/O Revert "btrfs: avoid monopolizing a core when activating a swap file" btrfs: avoid monopolizing a core when activating a swap file mptcp: prevent excessive coalescing on receive x86/mm: Convert unreachable() to BUG() md/md-linear: Fix a NULL vs IS_ERR() bug in linear_add() md: Fix linear_set_limits() Revert "selftests/sched_ext: fix build after renames in sched_ext API" Revert "drm/amd/display: Fix green screen issue after suspend" drm/xe: Fix and re-enable xe_print_blob_ascii85() fs: prepend statmount.mnt_opts string with security_sb_mnt_opts() fs: fix adding security options to statmount.mnt_opt statmount: let unset strings be empty arm64: dts: rockchip: add reset-names for combphy on rk3568 ocfs2: check dir i_size in ocfs2_find_entry Linux 6.12.14 Change-Id: Id4141bfc8ee9a6320b056561aa528228e7a3f1df Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
This commit is contained in:
Greg Kroah-Hartman
Treehugger Robot
@@ -174,22 +174,28 @@ HWCAP2_DCPODP
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Functionality implied by ID_AA64ISAR1_EL1.DPB == 0b0010.
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HWCAP2_SVE2
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Functionality implied by ID_AA64ZFR0_EL1.SVEver == 0b0001.
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Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
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ID_AA64ZFR0_EL1.SVEver == 0b0001.
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HWCAP2_SVEAES
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Functionality implied by ID_AA64ZFR0_EL1.AES == 0b0001.
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Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
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ID_AA64ZFR0_EL1.AES == 0b0001.
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HWCAP2_SVEPMULL
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Functionality implied by ID_AA64ZFR0_EL1.AES == 0b0010.
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Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
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ID_AA64ZFR0_EL1.AES == 0b0010.
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HWCAP2_SVEBITPERM
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Functionality implied by ID_AA64ZFR0_EL1.BitPerm == 0b0001.
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Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
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ID_AA64ZFR0_EL1.BitPerm == 0b0001.
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HWCAP2_SVESHA3
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Functionality implied by ID_AA64ZFR0_EL1.SHA3 == 0b0001.
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Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
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ID_AA64ZFR0_EL1.SHA3 == 0b0001.
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HWCAP2_SVESM4
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Functionality implied by ID_AA64ZFR0_EL1.SM4 == 0b0001.
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Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
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ID_AA64ZFR0_EL1.SM4 == 0b0001.
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HWCAP2_FLAGM2
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Functionality implied by ID_AA64ISAR0_EL1.TS == 0b0010.
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@@ -198,16 +204,20 @@ HWCAP2_FRINT
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Functionality implied by ID_AA64ISAR1_EL1.FRINTTS == 0b0001.
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HWCAP2_SVEI8MM
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Functionality implied by ID_AA64ZFR0_EL1.I8MM == 0b0001.
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Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
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ID_AA64ZFR0_EL1.I8MM == 0b0001.
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HWCAP2_SVEF32MM
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Functionality implied by ID_AA64ZFR0_EL1.F32MM == 0b0001.
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Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
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ID_AA64ZFR0_EL1.F32MM == 0b0001.
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HWCAP2_SVEF64MM
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Functionality implied by ID_AA64ZFR0_EL1.F64MM == 0b0001.
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Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
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ID_AA64ZFR0_EL1.F64MM == 0b0001.
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HWCAP2_SVEBF16
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Functionality implied by ID_AA64ZFR0_EL1.BF16 == 0b0001.
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Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
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ID_AA64ZFR0_EL1.BF16 == 0b0001.
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HWCAP2_I8MM
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Functionality implied by ID_AA64ISAR1_EL1.I8MM == 0b0001.
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@@ -273,7 +283,8 @@ HWCAP2_EBF16
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Functionality implied by ID_AA64ISAR1_EL1.BF16 == 0b0010.
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HWCAP2_SVE_EBF16
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Functionality implied by ID_AA64ZFR0_EL1.BF16 == 0b0010.
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Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
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ID_AA64ZFR0_EL1.BF16 == 0b0010.
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HWCAP2_CSSC
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Functionality implied by ID_AA64ISAR2_EL1.CSSC == 0b0001.
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@@ -282,7 +293,8 @@ HWCAP2_RPRFM
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Functionality implied by ID_AA64ISAR2_EL1.RPRFM == 0b0001.
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HWCAP2_SVE2P1
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Functionality implied by ID_AA64ZFR0_EL1.SVEver == 0b0010.
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Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
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ID_AA64ZFR0_EL1.SVEver == 0b0010.
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HWCAP2_SME2
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Functionality implied by ID_AA64SMFR0_EL1.SMEver == 0b0001.
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@@ -309,7 +321,8 @@ HWCAP2_HBC
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Functionality implied by ID_AA64ISAR2_EL1.BC == 0b0001.
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HWCAP2_SVE_B16B16
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Functionality implied by ID_AA64ZFR0_EL1.B16B16 == 0b0001.
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Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
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ID_AA64ZFR0_EL1.B16B16 == 0b0001.
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HWCAP2_LRCPC3
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Functionality implied by ID_AA64ISAR1_EL1.LRCPC == 0b0011.
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@@ -230,6 +230,9 @@ Panel Helper Reference
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.. kernel-doc:: drivers/gpu/drm/drm_panel_orientation_quirks.c
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:export:
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.. kernel-doc:: drivers/gpu/drm/drm_panel_backlight_quirks.c
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:export:
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Panel Self Refresh Helper Reference
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===================================
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@@ -1,7 +1,7 @@
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# SPDX-License-Identifier: GPL-2.0
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VERSION = 6
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PATCHLEVEL = 12
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SUBLEVEL = 13
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SUBLEVEL = 14
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EXTRAVERSION =
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NAME = Baby Opossum Posse
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@@ -12,6 +12,7 @@
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ranges = <0x00000000 0x4a000000 0x100000>, /* segment 0 */
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<0x00100000 0x4a100000 0x100000>, /* segment 1 */
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<0x00200000 0x4a200000 0x100000>; /* segment 2 */
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dma-ranges;
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segment@0 { /* 0x4a000000 */
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compatible = "simple-pm-bus";
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@@ -557,6 +558,7 @@
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<0x0007e000 0x0017e000 0x001000>, /* ap 124 */
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<0x00059000 0x00159000 0x001000>, /* ap 125 */
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<0x0005a000 0x0015a000 0x001000>; /* ap 126 */
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dma-ranges;
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target-module@2000 { /* 0x4a102000, ap 27 3c.0 */
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compatible = "ti,sysc";
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@@ -446,6 +446,7 @@
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pinctrl-names = "default";
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pinctrl-0 = <
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&hsusb2_2_pins
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&mcspi3hog_pins
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>;
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hsusb2_2_pins: hsusb2-2-pins {
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@@ -459,6 +460,15 @@
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>;
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};
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mcspi3hog_pins: mcspi3hog-pins {
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pinctrl-single,pins = <
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OMAP3630_CORE2_IOPAD(0x25dc, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* etk_d0 */
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OMAP3630_CORE2_IOPAD(0x25de, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* etk_d1 */
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OMAP3630_CORE2_IOPAD(0x25e0, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* etk_d2 */
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OMAP3630_CORE2_IOPAD(0x25e2, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* etk_d3 */
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>;
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};
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spi_gpio_pins: spi-gpio-pinmux-pins {
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pinctrl-single,pins = <
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OMAP3630_CORE2_IOPAD(0x25d8, PIN_OUTPUT | MUX_MODE4) /* clk */
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@@ -290,11 +290,6 @@
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};
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};
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&dpi0 {
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/* TODO Re-enable after DP to Type-C port muxing can be described */
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status = "disabled";
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};
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&gic {
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mediatek,broken-save-restore-fw;
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};
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@@ -1846,6 +1846,7 @@
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<&mmsys CLK_MM_DPI_MM>,
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<&apmixedsys CLK_APMIXED_TVDPLL>;
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clock-names = "pixel", "engine", "pll";
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status = "disabled";
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port {
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dpi_out: endpoint { };
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@@ -3815,7 +3815,7 @@
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compatible = "nvidia,tegra234-sce-fabric";
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reg = <0x0 0xb600000 0x0 0x40000>;
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interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
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status = "okay";
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status = "disabled";
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};
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rce-fabric@be00000 {
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@@ -3995,7 +3995,7 @@
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};
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dce-fabric@de00000 {
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compatible = "nvidia,tegra234-sce-fabric";
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compatible = "nvidia,tegra234-dce-fabric";
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reg = <0x0 0xde00000 0x0 0x40000>;
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interrupts = <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>;
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status = "okay";
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@@ -4018,6 +4018,8 @@
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#redistributor-regions = <1>;
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#interrupt-cells = <3>;
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interrupt-controller;
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#address-cells = <0>;
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};
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smmu_iso: iommu@10000000 {
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@@ -893,7 +893,7 @@
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remoteproc_mpss: remoteproc@4080000 {
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compatible = "qcom,sdx75-mpss-pas";
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reg = <0 0x04080000 0 0x4040>;
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reg = <0 0x04080000 0 0x10000>;
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interrupts-extended = <&intc GIC_SPI 250 IRQ_TYPE_EDGE_RISING>,
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<&smp2p_modem_in 0 IRQ_TYPE_EDGE_RISING>,
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@@ -2027,7 +2027,7 @@
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remoteproc_mpss: remoteproc@6080000 {
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compatible = "qcom,sm6115-mpss-pas";
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reg = <0x0 0x06080000 0x0 0x100>;
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reg = <0x0 0x06080000 0x0 0x10000>;
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interrupts-extended = <&intc GIC_SPI 307 IRQ_TYPE_EDGE_RISING>,
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<&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
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@@ -2670,9 +2670,9 @@
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};
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};
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remoteproc_adsp: remoteproc@ab00000 {
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remoteproc_adsp: remoteproc@a400000 {
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compatible = "qcom,sm6115-adsp-pas";
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reg = <0x0 0x0ab00000 0x0 0x100>;
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reg = <0x0 0x0a400000 0x0 0x4040>;
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interrupts-extended = <&intc GIC_SPI 282 IRQ_TYPE_EDGE_RISING>,
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<&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
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@@ -2744,7 +2744,7 @@
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remoteproc_cdsp: remoteproc@b300000 {
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compatible = "qcom,sm6115-cdsp-pas";
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reg = <0x0 0x0b300000 0x0 0x100000>;
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reg = <0x0 0x0b300000 0x0 0x4040>;
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interrupts-extended = <&intc GIC_SPI 265 IRQ_TYPE_EDGE_RISING>,
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<&cdsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
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@@ -936,7 +936,7 @@
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power-domains = <&rpmhpd SM6350_CX>;
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operating-points-v2 = <&qup_opp_table>;
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interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,
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<&aggre1_noc MASTER_QUP_0 0 &clk_virt SLAVE_EBI_CH0 0>;
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<&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_QUP_0 0>;
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interconnect-names = "qup-core", "qup-config";
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status = "disabled";
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};
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@@ -1283,7 +1283,7 @@
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adsp: remoteproc@3000000 {
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compatible = "qcom,sm6350-adsp-pas";
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reg = <0 0x03000000 0 0x100>;
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reg = <0x0 0x03000000 0x0 0x10000>;
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interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
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<&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
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@@ -1503,7 +1503,7 @@
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mpss: remoteproc@4080000 {
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compatible = "qcom,sm6350-mpss-pas";
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reg = <0x0 0x04080000 0x0 0x4040>;
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reg = <0x0 0x04080000 0x0 0x10000>;
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interrupts-extended = <&intc GIC_SPI 136 IRQ_TYPE_EDGE_RISING>,
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<&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
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@@ -1516,9 +1516,9 @@
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#power-domain-cells = <1>;
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};
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remoteproc_mss: remoteproc@6000000 {
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remoteproc_mss: remoteproc@6080000 {
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compatible = "qcom,sm6375-mpss-pas";
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reg = <0 0x06000000 0 0x4040>;
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reg = <0x0 0x06080000 0x0 0x10000>;
|
||||
|
||||
interrupts-extended = <&intc GIC_SPI 307 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_modem_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
@@ -1559,7 +1559,7 @@
|
||||
|
||||
remoteproc_adsp: remoteproc@a400000 {
|
||||
compatible = "qcom,sm6375-adsp-pas";
|
||||
reg = <0 0x0a400000 0 0x100>;
|
||||
reg = <0 0x0a400000 0 0x10000>;
|
||||
|
||||
interrupts-extended = <&intc GIC_SPI 282 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
@@ -1595,9 +1595,9 @@
|
||||
};
|
||||
};
|
||||
|
||||
remoteproc_cdsp: remoteproc@b000000 {
|
||||
remoteproc_cdsp: remoteproc@b300000 {
|
||||
compatible = "qcom,sm6375-cdsp-pas";
|
||||
reg = <0x0 0x0b000000 0x0 0x100000>;
|
||||
reg = <0x0 0x0b300000 0x0 0x10000>;
|
||||
|
||||
interrupts-extended = <&intc GIC_SPI 265 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
|
||||
@@ -1876,6 +1876,142 @@
|
||||
reg = <0x0 0x1fc0000 0x0 0x30000>;
|
||||
};
|
||||
|
||||
adsp: remoteproc@3000000 {
|
||||
compatible = "qcom,sm8350-adsp-pas";
|
||||
reg = <0x0 0x03000000 0x0 0x10000>;
|
||||
|
||||
interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "wdog", "fatal", "ready",
|
||||
"handover", "stop-ack";
|
||||
|
||||
clocks = <&rpmhcc RPMH_CXO_CLK>;
|
||||
clock-names = "xo";
|
||||
|
||||
power-domains = <&rpmhpd RPMHPD_LCX>,
|
||||
<&rpmhpd RPMHPD_LMX>;
|
||||
power-domain-names = "lcx", "lmx";
|
||||
|
||||
memory-region = <&pil_adsp_mem>;
|
||||
|
||||
qcom,qmp = <&aoss_qmp>;
|
||||
|
||||
qcom,smem-states = <&smp2p_adsp_out 0>;
|
||||
qcom,smem-state-names = "stop";
|
||||
|
||||
status = "disabled";
|
||||
|
||||
glink-edge {
|
||||
interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
|
||||
IPCC_MPROC_SIGNAL_GLINK_QMP
|
||||
IRQ_TYPE_EDGE_RISING>;
|
||||
mboxes = <&ipcc IPCC_CLIENT_LPASS
|
||||
IPCC_MPROC_SIGNAL_GLINK_QMP>;
|
||||
|
||||
label = "lpass";
|
||||
qcom,remote-pid = <2>;
|
||||
|
||||
apr {
|
||||
compatible = "qcom,apr-v2";
|
||||
qcom,glink-channels = "apr_audio_svc";
|
||||
qcom,domain = <APR_DOMAIN_ADSP>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
service@3 {
|
||||
reg = <APR_SVC_ADSP_CORE>;
|
||||
compatible = "qcom,q6core";
|
||||
qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
|
||||
};
|
||||
|
||||
q6afe: service@4 {
|
||||
compatible = "qcom,q6afe";
|
||||
reg = <APR_SVC_AFE>;
|
||||
qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
|
||||
|
||||
q6afedai: dais {
|
||||
compatible = "qcom,q6afe-dais";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#sound-dai-cells = <1>;
|
||||
};
|
||||
|
||||
q6afecc: clock-controller {
|
||||
compatible = "qcom,q6afe-clocks";
|
||||
#clock-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
q6asm: service@7 {
|
||||
compatible = "qcom,q6asm";
|
||||
reg = <APR_SVC_ASM>;
|
||||
qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
|
||||
|
||||
q6asmdai: dais {
|
||||
compatible = "qcom,q6asm-dais";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#sound-dai-cells = <1>;
|
||||
iommus = <&apps_smmu 0x1801 0x0>;
|
||||
|
||||
dai@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
dai@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
|
||||
dai@2 {
|
||||
reg = <2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
q6adm: service@8 {
|
||||
compatible = "qcom,q6adm";
|
||||
reg = <APR_SVC_ADM>;
|
||||
qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
|
||||
|
||||
q6routing: routing {
|
||||
compatible = "qcom,q6adm-routing";
|
||||
#sound-dai-cells = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
fastrpc {
|
||||
compatible = "qcom,fastrpc";
|
||||
qcom,glink-channels = "fastrpcglink-apps-dsp";
|
||||
label = "adsp";
|
||||
qcom,non-secure-domain;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
compute-cb@3 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <3>;
|
||||
iommus = <&apps_smmu 0x1803 0x0>;
|
||||
};
|
||||
|
||||
compute-cb@4 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <4>;
|
||||
iommus = <&apps_smmu 0x1804 0x0>;
|
||||
};
|
||||
|
||||
compute-cb@5 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <5>;
|
||||
iommus = <&apps_smmu 0x1805 0x0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
lpass_tlmm: pinctrl@33c0000 {
|
||||
compatible = "qcom,sm8350-lpass-lpi-pinctrl";
|
||||
reg = <0 0x033c0000 0 0x20000>,
|
||||
@@ -2078,7 +2214,7 @@
|
||||
|
||||
mpss: remoteproc@4080000 {
|
||||
compatible = "qcom,sm8350-mpss-pas";
|
||||
reg = <0x0 0x04080000 0x0 0x4040>;
|
||||
reg = <0x0 0x04080000 0x0 0x10000>;
|
||||
|
||||
interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_modem_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
@@ -2360,6 +2496,115 @@
|
||||
qcom,bcm-voters = <&apps_bcm_voter>;
|
||||
};
|
||||
|
||||
cdsp: remoteproc@a300000 {
|
||||
compatible = "qcom,sm8350-cdsp-pas";
|
||||
reg = <0x0 0x0a300000 0x0 0x10000>;
|
||||
|
||||
interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_cdsp_in 3 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "wdog", "fatal", "ready",
|
||||
"handover", "stop-ack";
|
||||
|
||||
clocks = <&rpmhcc RPMH_CXO_CLK>;
|
||||
clock-names = "xo";
|
||||
|
||||
power-domains = <&rpmhpd RPMHPD_CX>,
|
||||
<&rpmhpd RPMHPD_MXC>;
|
||||
power-domain-names = "cx", "mxc";
|
||||
|
||||
interconnects = <&compute_noc MASTER_CDSP_PROC 0 &mc_virt SLAVE_EBI1 0>;
|
||||
|
||||
memory-region = <&pil_cdsp_mem>;
|
||||
|
||||
qcom,qmp = <&aoss_qmp>;
|
||||
|
||||
qcom,smem-states = <&smp2p_cdsp_out 0>;
|
||||
qcom,smem-state-names = "stop";
|
||||
|
||||
status = "disabled";
|
||||
|
||||
glink-edge {
|
||||
interrupts-extended = <&ipcc IPCC_CLIENT_CDSP
|
||||
IPCC_MPROC_SIGNAL_GLINK_QMP
|
||||
IRQ_TYPE_EDGE_RISING>;
|
||||
mboxes = <&ipcc IPCC_CLIENT_CDSP
|
||||
IPCC_MPROC_SIGNAL_GLINK_QMP>;
|
||||
|
||||
label = "cdsp";
|
||||
qcom,remote-pid = <5>;
|
||||
|
||||
fastrpc {
|
||||
compatible = "qcom,fastrpc";
|
||||
qcom,glink-channels = "fastrpcglink-apps-dsp";
|
||||
label = "cdsp";
|
||||
qcom,non-secure-domain;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
compute-cb@1 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <1>;
|
||||
iommus = <&apps_smmu 0x2161 0x0400>,
|
||||
<&apps_smmu 0x1181 0x0420>;
|
||||
};
|
||||
|
||||
compute-cb@2 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <2>;
|
||||
iommus = <&apps_smmu 0x2162 0x0400>,
|
||||
<&apps_smmu 0x1182 0x0420>;
|
||||
};
|
||||
|
||||
compute-cb@3 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <3>;
|
||||
iommus = <&apps_smmu 0x2163 0x0400>,
|
||||
<&apps_smmu 0x1183 0x0420>;
|
||||
};
|
||||
|
||||
compute-cb@4 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <4>;
|
||||
iommus = <&apps_smmu 0x2164 0x0400>,
|
||||
<&apps_smmu 0x1184 0x0420>;
|
||||
};
|
||||
|
||||
compute-cb@5 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <5>;
|
||||
iommus = <&apps_smmu 0x2165 0x0400>,
|
||||
<&apps_smmu 0x1185 0x0420>;
|
||||
};
|
||||
|
||||
compute-cb@6 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <6>;
|
||||
iommus = <&apps_smmu 0x2166 0x0400>,
|
||||
<&apps_smmu 0x1186 0x0420>;
|
||||
};
|
||||
|
||||
compute-cb@7 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <7>;
|
||||
iommus = <&apps_smmu 0x2167 0x0400>,
|
||||
<&apps_smmu 0x1187 0x0420>;
|
||||
};
|
||||
|
||||
compute-cb@8 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <8>;
|
||||
iommus = <&apps_smmu 0x2168 0x0400>,
|
||||
<&apps_smmu 0x1188 0x0420>;
|
||||
};
|
||||
|
||||
/* note: secure cb9 in downstream */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
usb_1: usb@a6f8800 {
|
||||
compatible = "qcom,sm8350-dwc3", "qcom,dwc3";
|
||||
reg = <0 0x0a6f8800 0 0x400>;
|
||||
@@ -3284,142 +3529,6 @@
|
||||
<GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
adsp: remoteproc@17300000 {
|
||||
compatible = "qcom,sm8350-adsp-pas";
|
||||
reg = <0 0x17300000 0 0x100>;
|
||||
|
||||
interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "wdog", "fatal", "ready",
|
||||
"handover", "stop-ack";
|
||||
|
||||
clocks = <&rpmhcc RPMH_CXO_CLK>;
|
||||
clock-names = "xo";
|
||||
|
||||
power-domains = <&rpmhpd RPMHPD_LCX>,
|
||||
<&rpmhpd RPMHPD_LMX>;
|
||||
power-domain-names = "lcx", "lmx";
|
||||
|
||||
memory-region = <&pil_adsp_mem>;
|
||||
|
||||
qcom,qmp = <&aoss_qmp>;
|
||||
|
||||
qcom,smem-states = <&smp2p_adsp_out 0>;
|
||||
qcom,smem-state-names = "stop";
|
||||
|
||||
status = "disabled";
|
||||
|
||||
glink-edge {
|
||||
interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
|
||||
IPCC_MPROC_SIGNAL_GLINK_QMP
|
||||
IRQ_TYPE_EDGE_RISING>;
|
||||
mboxes = <&ipcc IPCC_CLIENT_LPASS
|
||||
IPCC_MPROC_SIGNAL_GLINK_QMP>;
|
||||
|
||||
label = "lpass";
|
||||
qcom,remote-pid = <2>;
|
||||
|
||||
apr {
|
||||
compatible = "qcom,apr-v2";
|
||||
qcom,glink-channels = "apr_audio_svc";
|
||||
qcom,domain = <APR_DOMAIN_ADSP>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
service@3 {
|
||||
reg = <APR_SVC_ADSP_CORE>;
|
||||
compatible = "qcom,q6core";
|
||||
qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
|
||||
};
|
||||
|
||||
q6afe: service@4 {
|
||||
compatible = "qcom,q6afe";
|
||||
reg = <APR_SVC_AFE>;
|
||||
qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
|
||||
|
||||
q6afedai: dais {
|
||||
compatible = "qcom,q6afe-dais";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#sound-dai-cells = <1>;
|
||||
};
|
||||
|
||||
q6afecc: clock-controller {
|
||||
compatible = "qcom,q6afe-clocks";
|
||||
#clock-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
q6asm: service@7 {
|
||||
compatible = "qcom,q6asm";
|
||||
reg = <APR_SVC_ASM>;
|
||||
qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
|
||||
|
||||
q6asmdai: dais {
|
||||
compatible = "qcom,q6asm-dais";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#sound-dai-cells = <1>;
|
||||
iommus = <&apps_smmu 0x1801 0x0>;
|
||||
|
||||
dai@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
dai@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
|
||||
dai@2 {
|
||||
reg = <2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
q6adm: service@8 {
|
||||
compatible = "qcom,q6adm";
|
||||
reg = <APR_SVC_ADM>;
|
||||
qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
|
||||
|
||||
q6routing: routing {
|
||||
compatible = "qcom,q6adm-routing";
|
||||
#sound-dai-cells = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
fastrpc {
|
||||
compatible = "qcom,fastrpc";
|
||||
qcom,glink-channels = "fastrpcglink-apps-dsp";
|
||||
label = "adsp";
|
||||
qcom,non-secure-domain;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
compute-cb@3 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <3>;
|
||||
iommus = <&apps_smmu 0x1803 0x0>;
|
||||
};
|
||||
|
||||
compute-cb@4 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <4>;
|
||||
iommus = <&apps_smmu 0x1804 0x0>;
|
||||
};
|
||||
|
||||
compute-cb@5 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <5>;
|
||||
iommus = <&apps_smmu 0x1805 0x0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
intc: interrupt-controller@17a00000 {
|
||||
compatible = "arm,gic-v3";
|
||||
#interrupt-cells = <3>;
|
||||
@@ -3588,115 +3697,6 @@
|
||||
#freq-domain-cells = <1>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
cdsp: remoteproc@98900000 {
|
||||
compatible = "qcom,sm8350-cdsp-pas";
|
||||
reg = <0 0x98900000 0 0x1400000>;
|
||||
|
||||
interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_cdsp_in 3 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "wdog", "fatal", "ready",
|
||||
"handover", "stop-ack";
|
||||
|
||||
clocks = <&rpmhcc RPMH_CXO_CLK>;
|
||||
clock-names = "xo";
|
||||
|
||||
power-domains = <&rpmhpd RPMHPD_CX>,
|
||||
<&rpmhpd RPMHPD_MXC>;
|
||||
power-domain-names = "cx", "mxc";
|
||||
|
||||
interconnects = <&compute_noc MASTER_CDSP_PROC 0 &mc_virt SLAVE_EBI1 0>;
|
||||
|
||||
memory-region = <&pil_cdsp_mem>;
|
||||
|
||||
qcom,qmp = <&aoss_qmp>;
|
||||
|
||||
qcom,smem-states = <&smp2p_cdsp_out 0>;
|
||||
qcom,smem-state-names = "stop";
|
||||
|
||||
status = "disabled";
|
||||
|
||||
glink-edge {
|
||||
interrupts-extended = <&ipcc IPCC_CLIENT_CDSP
|
||||
IPCC_MPROC_SIGNAL_GLINK_QMP
|
||||
IRQ_TYPE_EDGE_RISING>;
|
||||
mboxes = <&ipcc IPCC_CLIENT_CDSP
|
||||
IPCC_MPROC_SIGNAL_GLINK_QMP>;
|
||||
|
||||
label = "cdsp";
|
||||
qcom,remote-pid = <5>;
|
||||
|
||||
fastrpc {
|
||||
compatible = "qcom,fastrpc";
|
||||
qcom,glink-channels = "fastrpcglink-apps-dsp";
|
||||
label = "cdsp";
|
||||
qcom,non-secure-domain;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
compute-cb@1 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <1>;
|
||||
iommus = <&apps_smmu 0x2161 0x0400>,
|
||||
<&apps_smmu 0x1181 0x0420>;
|
||||
};
|
||||
|
||||
compute-cb@2 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <2>;
|
||||
iommus = <&apps_smmu 0x2162 0x0400>,
|
||||
<&apps_smmu 0x1182 0x0420>;
|
||||
};
|
||||
|
||||
compute-cb@3 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <3>;
|
||||
iommus = <&apps_smmu 0x2163 0x0400>,
|
||||
<&apps_smmu 0x1183 0x0420>;
|
||||
};
|
||||
|
||||
compute-cb@4 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <4>;
|
||||
iommus = <&apps_smmu 0x2164 0x0400>,
|
||||
<&apps_smmu 0x1184 0x0420>;
|
||||
};
|
||||
|
||||
compute-cb@5 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <5>;
|
||||
iommus = <&apps_smmu 0x2165 0x0400>,
|
||||
<&apps_smmu 0x1185 0x0420>;
|
||||
};
|
||||
|
||||
compute-cb@6 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <6>;
|
||||
iommus = <&apps_smmu 0x2166 0x0400>,
|
||||
<&apps_smmu 0x1186 0x0420>;
|
||||
};
|
||||
|
||||
compute-cb@7 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <7>;
|
||||
iommus = <&apps_smmu 0x2167 0x0400>,
|
||||
<&apps_smmu 0x1187 0x0420>;
|
||||
};
|
||||
|
||||
compute-cb@8 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <8>;
|
||||
iommus = <&apps_smmu 0x2168 0x0400>,
|
||||
<&apps_smmu 0x1188 0x0420>;
|
||||
};
|
||||
|
||||
/* note: secure cb9 in downstream */
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
thermal_zones: thermal-zones {
|
||||
|
||||
@@ -2492,6 +2492,112 @@
|
||||
};
|
||||
};
|
||||
|
||||
remoteproc_adsp: remoteproc@3000000 {
|
||||
compatible = "qcom,sm8450-adsp-pas";
|
||||
reg = <0x0 0x03000000 0x0 0x10000>;
|
||||
|
||||
interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "wdog", "fatal", "ready",
|
||||
"handover", "stop-ack";
|
||||
|
||||
clocks = <&rpmhcc RPMH_CXO_CLK>;
|
||||
clock-names = "xo";
|
||||
|
||||
power-domains = <&rpmhpd RPMHPD_LCX>,
|
||||
<&rpmhpd RPMHPD_LMX>;
|
||||
power-domain-names = "lcx", "lmx";
|
||||
|
||||
memory-region = <&adsp_mem>;
|
||||
|
||||
qcom,qmp = <&aoss_qmp>;
|
||||
|
||||
qcom,smem-states = <&smp2p_adsp_out 0>;
|
||||
qcom,smem-state-names = "stop";
|
||||
|
||||
status = "disabled";
|
||||
|
||||
remoteproc_adsp_glink: glink-edge {
|
||||
interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
|
||||
IPCC_MPROC_SIGNAL_GLINK_QMP
|
||||
IRQ_TYPE_EDGE_RISING>;
|
||||
mboxes = <&ipcc IPCC_CLIENT_LPASS
|
||||
IPCC_MPROC_SIGNAL_GLINK_QMP>;
|
||||
|
||||
label = "lpass";
|
||||
qcom,remote-pid = <2>;
|
||||
|
||||
gpr {
|
||||
compatible = "qcom,gpr";
|
||||
qcom,glink-channels = "adsp_apps";
|
||||
qcom,domain = <GPR_DOMAIN_ID_ADSP>;
|
||||
qcom,intents = <512 20>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
q6apm: service@1 {
|
||||
compatible = "qcom,q6apm";
|
||||
reg = <GPR_APM_MODULE_IID>;
|
||||
#sound-dai-cells = <0>;
|
||||
qcom,protection-domain = "avs/audio",
|
||||
"msm/adsp/audio_pd";
|
||||
|
||||
q6apmdai: dais {
|
||||
compatible = "qcom,q6apm-dais";
|
||||
iommus = <&apps_smmu 0x1801 0x0>;
|
||||
};
|
||||
|
||||
q6apmbedai: bedais {
|
||||
compatible = "qcom,q6apm-lpass-dais";
|
||||
#sound-dai-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
q6prm: service@2 {
|
||||
compatible = "qcom,q6prm";
|
||||
reg = <GPR_PRM_MODULE_IID>;
|
||||
qcom,protection-domain = "avs/audio",
|
||||
"msm/adsp/audio_pd";
|
||||
|
||||
q6prmcc: clock-controller {
|
||||
compatible = "qcom,q6prm-lpass-clocks";
|
||||
#clock-cells = <2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
fastrpc {
|
||||
compatible = "qcom,fastrpc";
|
||||
qcom,glink-channels = "fastrpcglink-apps-dsp";
|
||||
label = "adsp";
|
||||
qcom,non-secure-domain;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
compute-cb@3 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <3>;
|
||||
iommus = <&apps_smmu 0x1803 0x0>;
|
||||
};
|
||||
|
||||
compute-cb@4 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <4>;
|
||||
iommus = <&apps_smmu 0x1804 0x0>;
|
||||
};
|
||||
|
||||
compute-cb@5 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <5>;
|
||||
iommus = <&apps_smmu 0x1805 0x0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
wsa2macro: codec@31e0000 {
|
||||
compatible = "qcom,sm8450-lpass-wsa-macro";
|
||||
reg = <0 0x031e0000 0 0x1000>;
|
||||
@@ -2688,115 +2794,9 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
remoteproc_adsp: remoteproc@30000000 {
|
||||
compatible = "qcom,sm8450-adsp-pas";
|
||||
reg = <0 0x30000000 0 0x100>;
|
||||
|
||||
interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "wdog", "fatal", "ready",
|
||||
"handover", "stop-ack";
|
||||
|
||||
clocks = <&rpmhcc RPMH_CXO_CLK>;
|
||||
clock-names = "xo";
|
||||
|
||||
power-domains = <&rpmhpd RPMHPD_LCX>,
|
||||
<&rpmhpd RPMHPD_LMX>;
|
||||
power-domain-names = "lcx", "lmx";
|
||||
|
||||
memory-region = <&adsp_mem>;
|
||||
|
||||
qcom,qmp = <&aoss_qmp>;
|
||||
|
||||
qcom,smem-states = <&smp2p_adsp_out 0>;
|
||||
qcom,smem-state-names = "stop";
|
||||
|
||||
status = "disabled";
|
||||
|
||||
remoteproc_adsp_glink: glink-edge {
|
||||
interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
|
||||
IPCC_MPROC_SIGNAL_GLINK_QMP
|
||||
IRQ_TYPE_EDGE_RISING>;
|
||||
mboxes = <&ipcc IPCC_CLIENT_LPASS
|
||||
IPCC_MPROC_SIGNAL_GLINK_QMP>;
|
||||
|
||||
label = "lpass";
|
||||
qcom,remote-pid = <2>;
|
||||
|
||||
gpr {
|
||||
compatible = "qcom,gpr";
|
||||
qcom,glink-channels = "adsp_apps";
|
||||
qcom,domain = <GPR_DOMAIN_ID_ADSP>;
|
||||
qcom,intents = <512 20>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
q6apm: service@1 {
|
||||
compatible = "qcom,q6apm";
|
||||
reg = <GPR_APM_MODULE_IID>;
|
||||
#sound-dai-cells = <0>;
|
||||
qcom,protection-domain = "avs/audio",
|
||||
"msm/adsp/audio_pd";
|
||||
|
||||
q6apmdai: dais {
|
||||
compatible = "qcom,q6apm-dais";
|
||||
iommus = <&apps_smmu 0x1801 0x0>;
|
||||
};
|
||||
|
||||
q6apmbedai: bedais {
|
||||
compatible = "qcom,q6apm-lpass-dais";
|
||||
#sound-dai-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
q6prm: service@2 {
|
||||
compatible = "qcom,q6prm";
|
||||
reg = <GPR_PRM_MODULE_IID>;
|
||||
qcom,protection-domain = "avs/audio",
|
||||
"msm/adsp/audio_pd";
|
||||
|
||||
q6prmcc: clock-controller {
|
||||
compatible = "qcom,q6prm-lpass-clocks";
|
||||
#clock-cells = <2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
fastrpc {
|
||||
compatible = "qcom,fastrpc";
|
||||
qcom,glink-channels = "fastrpcglink-apps-dsp";
|
||||
label = "adsp";
|
||||
qcom,non-secure-domain;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
compute-cb@3 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <3>;
|
||||
iommus = <&apps_smmu 0x1803 0x0>;
|
||||
};
|
||||
|
||||
compute-cb@4 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <4>;
|
||||
iommus = <&apps_smmu 0x1804 0x0>;
|
||||
};
|
||||
|
||||
compute-cb@5 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <5>;
|
||||
iommus = <&apps_smmu 0x1805 0x0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
remoteproc_cdsp: remoteproc@32300000 {
|
||||
compatible = "qcom,sm8450-cdsp-pas";
|
||||
reg = <0 0x32300000 0 0x1400000>;
|
||||
reg = <0 0x32300000 0 0x10000>;
|
||||
|
||||
interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
@@ -2903,7 +2903,7 @@
|
||||
|
||||
remoteproc_mpss: remoteproc@4080000 {
|
||||
compatible = "qcom,sm8450-mpss-pas";
|
||||
reg = <0x0 0x04080000 0x0 0x4040>;
|
||||
reg = <0x0 0x04080000 0x0 0x10000>;
|
||||
|
||||
interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_modem_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
|
||||
@@ -2313,7 +2313,7 @@
|
||||
|
||||
remoteproc_mpss: remoteproc@4080000 {
|
||||
compatible = "qcom,sm8550-mpss-pas";
|
||||
reg = <0x0 0x04080000 0x0 0x4040>;
|
||||
reg = <0x0 0x04080000 0x0 0x10000>;
|
||||
|
||||
interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_modem_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
@@ -2353,6 +2353,137 @@
|
||||
};
|
||||
};
|
||||
|
||||
remoteproc_adsp: remoteproc@6800000 {
|
||||
compatible = "qcom,sm8550-adsp-pas";
|
||||
reg = <0x0 0x06800000 0x0 0x10000>;
|
||||
|
||||
interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "wdog", "fatal", "ready",
|
||||
"handover", "stop-ack";
|
||||
|
||||
clocks = <&rpmhcc RPMH_CXO_CLK>;
|
||||
clock-names = "xo";
|
||||
|
||||
power-domains = <&rpmhpd RPMHPD_LCX>,
|
||||
<&rpmhpd RPMHPD_LMX>;
|
||||
power-domain-names = "lcx", "lmx";
|
||||
|
||||
interconnects = <&lpass_lpicx_noc MASTER_LPASS_PROC 0 &mc_virt SLAVE_EBI1 0>;
|
||||
|
||||
memory-region = <&adspslpi_mem>, <&q6_adsp_dtb_mem>;
|
||||
|
||||
qcom,qmp = <&aoss_qmp>;
|
||||
|
||||
qcom,smem-states = <&smp2p_adsp_out 0>;
|
||||
qcom,smem-state-names = "stop";
|
||||
|
||||
status = "disabled";
|
||||
|
||||
remoteproc_adsp_glink: glink-edge {
|
||||
interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
|
||||
IPCC_MPROC_SIGNAL_GLINK_QMP
|
||||
IRQ_TYPE_EDGE_RISING>;
|
||||
mboxes = <&ipcc IPCC_CLIENT_LPASS
|
||||
IPCC_MPROC_SIGNAL_GLINK_QMP>;
|
||||
|
||||
label = "lpass";
|
||||
qcom,remote-pid = <2>;
|
||||
|
||||
fastrpc {
|
||||
compatible = "qcom,fastrpc";
|
||||
qcom,glink-channels = "fastrpcglink-apps-dsp";
|
||||
label = "adsp";
|
||||
qcom,non-secure-domain;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
compute-cb@3 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <3>;
|
||||
iommus = <&apps_smmu 0x1003 0x80>,
|
||||
<&apps_smmu 0x1063 0x0>;
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
compute-cb@4 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <4>;
|
||||
iommus = <&apps_smmu 0x1004 0x80>,
|
||||
<&apps_smmu 0x1064 0x0>;
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
compute-cb@5 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <5>;
|
||||
iommus = <&apps_smmu 0x1005 0x80>,
|
||||
<&apps_smmu 0x1065 0x0>;
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
compute-cb@6 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <6>;
|
||||
iommus = <&apps_smmu 0x1006 0x80>,
|
||||
<&apps_smmu 0x1066 0x0>;
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
compute-cb@7 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <7>;
|
||||
iommus = <&apps_smmu 0x1007 0x80>,
|
||||
<&apps_smmu 0x1067 0x0>;
|
||||
dma-coherent;
|
||||
};
|
||||
};
|
||||
|
||||
gpr {
|
||||
compatible = "qcom,gpr";
|
||||
qcom,glink-channels = "adsp_apps";
|
||||
qcom,domain = <GPR_DOMAIN_ID_ADSP>;
|
||||
qcom,intents = <512 20>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
q6apm: service@1 {
|
||||
compatible = "qcom,q6apm";
|
||||
reg = <GPR_APM_MODULE_IID>;
|
||||
#sound-dai-cells = <0>;
|
||||
qcom,protection-domain = "avs/audio",
|
||||
"msm/adsp/audio_pd";
|
||||
|
||||
q6apmdai: dais {
|
||||
compatible = "qcom,q6apm-dais";
|
||||
iommus = <&apps_smmu 0x1001 0x80>,
|
||||
<&apps_smmu 0x1061 0x0>;
|
||||
};
|
||||
|
||||
q6apmbedai: bedais {
|
||||
compatible = "qcom,q6apm-lpass-dais";
|
||||
#sound-dai-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
q6prm: service@2 {
|
||||
compatible = "qcom,q6prm";
|
||||
reg = <GPR_PRM_MODULE_IID>;
|
||||
qcom,protection-domain = "avs/audio",
|
||||
"msm/adsp/audio_pd";
|
||||
|
||||
q6prmcc: clock-controller {
|
||||
compatible = "qcom,q6prm-lpass-clocks";
|
||||
#clock-cells = <2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
lpass_wsa2macro: codec@6aa0000 {
|
||||
compatible = "qcom,sm8550-lpass-wsa-macro";
|
||||
reg = <0 0x06aa0000 0 0x1000>;
|
||||
@@ -2871,9 +3002,8 @@
|
||||
|
||||
power-domains = <&dispcc MDSS_GDSC>;
|
||||
|
||||
interconnects = <&mmss_noc MASTER_MDP 0 &gem_noc SLAVE_LLCC 0>,
|
||||
<&mc_virt MASTER_LLCC 0 &mc_virt SLAVE_EBI1 0>;
|
||||
interconnect-names = "mdp0-mem", "mdp1-mem";
|
||||
interconnects = <&mmss_noc MASTER_MDP 0 &mc_virt SLAVE_EBI1 0>;
|
||||
interconnect-names = "mdp0-mem";
|
||||
|
||||
iommus = <&apps_smmu 0x1c00 0x2>;
|
||||
|
||||
@@ -4575,137 +4705,6 @@
|
||||
interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
remoteproc_adsp: remoteproc@30000000 {
|
||||
compatible = "qcom,sm8550-adsp-pas";
|
||||
reg = <0x0 0x30000000 0x0 0x100>;
|
||||
|
||||
interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "wdog", "fatal", "ready",
|
||||
"handover", "stop-ack";
|
||||
|
||||
clocks = <&rpmhcc RPMH_CXO_CLK>;
|
||||
clock-names = "xo";
|
||||
|
||||
power-domains = <&rpmhpd RPMHPD_LCX>,
|
||||
<&rpmhpd RPMHPD_LMX>;
|
||||
power-domain-names = "lcx", "lmx";
|
||||
|
||||
interconnects = <&lpass_lpicx_noc MASTER_LPASS_PROC 0 &mc_virt SLAVE_EBI1 0>;
|
||||
|
||||
memory-region = <&adspslpi_mem>, <&q6_adsp_dtb_mem>;
|
||||
|
||||
qcom,qmp = <&aoss_qmp>;
|
||||
|
||||
qcom,smem-states = <&smp2p_adsp_out 0>;
|
||||
qcom,smem-state-names = "stop";
|
||||
|
||||
status = "disabled";
|
||||
|
||||
remoteproc_adsp_glink: glink-edge {
|
||||
interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
|
||||
IPCC_MPROC_SIGNAL_GLINK_QMP
|
||||
IRQ_TYPE_EDGE_RISING>;
|
||||
mboxes = <&ipcc IPCC_CLIENT_LPASS
|
||||
IPCC_MPROC_SIGNAL_GLINK_QMP>;
|
||||
|
||||
label = "lpass";
|
||||
qcom,remote-pid = <2>;
|
||||
|
||||
fastrpc {
|
||||
compatible = "qcom,fastrpc";
|
||||
qcom,glink-channels = "fastrpcglink-apps-dsp";
|
||||
label = "adsp";
|
||||
qcom,non-secure-domain;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
compute-cb@3 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <3>;
|
||||
iommus = <&apps_smmu 0x1003 0x80>,
|
||||
<&apps_smmu 0x1063 0x0>;
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
compute-cb@4 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <4>;
|
||||
iommus = <&apps_smmu 0x1004 0x80>,
|
||||
<&apps_smmu 0x1064 0x0>;
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
compute-cb@5 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <5>;
|
||||
iommus = <&apps_smmu 0x1005 0x80>,
|
||||
<&apps_smmu 0x1065 0x0>;
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
compute-cb@6 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <6>;
|
||||
iommus = <&apps_smmu 0x1006 0x80>,
|
||||
<&apps_smmu 0x1066 0x0>;
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
compute-cb@7 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <7>;
|
||||
iommus = <&apps_smmu 0x1007 0x80>,
|
||||
<&apps_smmu 0x1067 0x0>;
|
||||
dma-coherent;
|
||||
};
|
||||
};
|
||||
|
||||
gpr {
|
||||
compatible = "qcom,gpr";
|
||||
qcom,glink-channels = "adsp_apps";
|
||||
qcom,domain = <GPR_DOMAIN_ID_ADSP>;
|
||||
qcom,intents = <512 20>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
q6apm: service@1 {
|
||||
compatible = "qcom,q6apm";
|
||||
reg = <GPR_APM_MODULE_IID>;
|
||||
#sound-dai-cells = <0>;
|
||||
qcom,protection-domain = "avs/audio",
|
||||
"msm/adsp/audio_pd";
|
||||
|
||||
q6apmdai: dais {
|
||||
compatible = "qcom,q6apm-dais";
|
||||
iommus = <&apps_smmu 0x1001 0x80>,
|
||||
<&apps_smmu 0x1061 0x0>;
|
||||
};
|
||||
|
||||
q6apmbedai: bedais {
|
||||
compatible = "qcom,q6apm-lpass-dais";
|
||||
#sound-dai-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
q6prm: service@2 {
|
||||
compatible = "qcom,q6prm";
|
||||
reg = <GPR_PRM_MODULE_IID>;
|
||||
qcom,protection-domain = "avs/audio",
|
||||
"msm/adsp/audio_pd";
|
||||
|
||||
q6prmcc: clock-controller {
|
||||
compatible = "qcom,q6prm-lpass-clocks";
|
||||
#clock-cells = <2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
nsp_noc: interconnect@320c0000 {
|
||||
compatible = "qcom,sm8550-nsp-noc";
|
||||
reg = <0 0x320c0000 0 0xe080>;
|
||||
@@ -4715,7 +4714,7 @@
|
||||
|
||||
remoteproc_cdsp: remoteproc@32300000 {
|
||||
compatible = "qcom,sm8550-cdsp-pas";
|
||||
reg = <0x0 0x32300000 0x0 0x1400000>;
|
||||
reg = <0x0 0x32300000 0x0 0x10000>;
|
||||
|
||||
interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
|
||||
@@ -2853,7 +2853,7 @@
|
||||
|
||||
remoteproc_mpss: remoteproc@4080000 {
|
||||
compatible = "qcom,sm8650-mpss-pas";
|
||||
reg = <0 0x04080000 0 0x4040>;
|
||||
reg = <0x0 0x04080000 0x0 0x10000>;
|
||||
|
||||
interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_modem_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
@@ -2904,6 +2904,154 @@
|
||||
};
|
||||
};
|
||||
|
||||
remoteproc_adsp: remoteproc@6800000 {
|
||||
compatible = "qcom,sm8650-adsp-pas";
|
||||
reg = <0x0 0x06800000 0x0 0x10000>;
|
||||
|
||||
interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "wdog",
|
||||
"fatal",
|
||||
"ready",
|
||||
"handover",
|
||||
"stop-ack";
|
||||
|
||||
clocks = <&rpmhcc RPMH_CXO_CLK>;
|
||||
clock-names = "xo";
|
||||
|
||||
interconnects = <&lpass_lpicx_noc MASTER_LPASS_PROC QCOM_ICC_TAG_ALWAYS
|
||||
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
|
||||
|
||||
power-domains = <&rpmhpd RPMHPD_LCX>,
|
||||
<&rpmhpd RPMHPD_LMX>;
|
||||
power-domain-names = "lcx",
|
||||
"lmx";
|
||||
|
||||
memory-region = <&adspslpi_mem>, <&q6_adsp_dtb_mem>;
|
||||
|
||||
qcom,qmp = <&aoss_qmp>;
|
||||
|
||||
qcom,smem-states = <&smp2p_adsp_out 0>;
|
||||
qcom,smem-state-names = "stop";
|
||||
|
||||
status = "disabled";
|
||||
|
||||
remoteproc_adsp_glink: glink-edge {
|
||||
interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
|
||||
IPCC_MPROC_SIGNAL_GLINK_QMP
|
||||
IRQ_TYPE_EDGE_RISING>;
|
||||
|
||||
mboxes = <&ipcc IPCC_CLIENT_LPASS
|
||||
IPCC_MPROC_SIGNAL_GLINK_QMP>;
|
||||
|
||||
qcom,remote-pid = <2>;
|
||||
|
||||
label = "lpass";
|
||||
|
||||
fastrpc {
|
||||
compatible = "qcom,fastrpc";
|
||||
|
||||
qcom,glink-channels = "fastrpcglink-apps-dsp";
|
||||
|
||||
label = "adsp";
|
||||
|
||||
qcom,non-secure-domain;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
compute-cb@3 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <3>;
|
||||
|
||||
iommus = <&apps_smmu 0x1003 0x80>,
|
||||
<&apps_smmu 0x1043 0x20>;
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
compute-cb@4 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <4>;
|
||||
|
||||
iommus = <&apps_smmu 0x1004 0x80>,
|
||||
<&apps_smmu 0x1044 0x20>;
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
compute-cb@5 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <5>;
|
||||
|
||||
iommus = <&apps_smmu 0x1005 0x80>,
|
||||
<&apps_smmu 0x1045 0x20>;
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
compute-cb@6 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <6>;
|
||||
|
||||
iommus = <&apps_smmu 0x1006 0x80>,
|
||||
<&apps_smmu 0x1046 0x20>;
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
compute-cb@7 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <7>;
|
||||
|
||||
iommus = <&apps_smmu 0x1007 0x40>,
|
||||
<&apps_smmu 0x1067 0x0>,
|
||||
<&apps_smmu 0x1087 0x0>;
|
||||
dma-coherent;
|
||||
};
|
||||
};
|
||||
|
||||
gpr {
|
||||
compatible = "qcom,gpr";
|
||||
qcom,glink-channels = "adsp_apps";
|
||||
qcom,domain = <GPR_DOMAIN_ID_ADSP>;
|
||||
qcom,intents = <512 20>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
q6apm: service@1 {
|
||||
compatible = "qcom,q6apm";
|
||||
reg = <GPR_APM_MODULE_IID>;
|
||||
#sound-dai-cells = <0>;
|
||||
qcom,protection-domain = "avs/audio",
|
||||
"msm/adsp/audio_pd";
|
||||
|
||||
q6apmbedai: bedais {
|
||||
compatible = "qcom,q6apm-lpass-dais";
|
||||
#sound-dai-cells = <1>;
|
||||
};
|
||||
|
||||
q6apmdai: dais {
|
||||
compatible = "qcom,q6apm-dais";
|
||||
iommus = <&apps_smmu 0x1001 0x80>,
|
||||
<&apps_smmu 0x1061 0x0>;
|
||||
};
|
||||
};
|
||||
|
||||
q6prm: service@2 {
|
||||
compatible = "qcom,q6prm";
|
||||
reg = <GPR_PRM_MODULE_IID>;
|
||||
qcom,protection-domain = "avs/audio",
|
||||
"msm/adsp/audio_pd";
|
||||
|
||||
q6prmcc: clock-controller {
|
||||
compatible = "qcom,q6prm-lpass-clocks";
|
||||
#clock-cells = <2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
lpass_wsa2macro: codec@6aa0000 {
|
||||
compatible = "qcom,sm8650-lpass-wsa-macro", "qcom,sm8550-lpass-wsa-macro";
|
||||
reg = <0 0x06aa0000 0 0x1000>;
|
||||
@@ -3455,11 +3603,8 @@
|
||||
resets = <&dispcc DISP_CC_MDSS_CORE_BCR>;
|
||||
|
||||
interconnects = <&mmss_noc MASTER_MDP QCOM_ICC_TAG_ALWAYS
|
||||
&gem_noc SLAVE_LLCC QCOM_ICC_TAG_ALWAYS>,
|
||||
<&mc_virt MASTER_LLCC QCOM_ICC_TAG_ALWAYS
|
||||
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
|
||||
interconnect-names = "mdp0-mem",
|
||||
"mdp1-mem";
|
||||
interconnect-names = "mdp0-mem";
|
||||
|
||||
power-domains = <&dispcc MDSS_GDSC>;
|
||||
|
||||
@@ -5324,154 +5469,6 @@
|
||||
interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
remoteproc_adsp: remoteproc@30000000 {
|
||||
compatible = "qcom,sm8650-adsp-pas";
|
||||
reg = <0 0x30000000 0 0x100>;
|
||||
|
||||
interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "wdog",
|
||||
"fatal",
|
||||
"ready",
|
||||
"handover",
|
||||
"stop-ack";
|
||||
|
||||
clocks = <&rpmhcc RPMH_CXO_CLK>;
|
||||
clock-names = "xo";
|
||||
|
||||
interconnects = <&lpass_lpicx_noc MASTER_LPASS_PROC QCOM_ICC_TAG_ALWAYS
|
||||
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
|
||||
|
||||
power-domains = <&rpmhpd RPMHPD_LCX>,
|
||||
<&rpmhpd RPMHPD_LMX>;
|
||||
power-domain-names = "lcx",
|
||||
"lmx";
|
||||
|
||||
memory-region = <&adspslpi_mem>, <&q6_adsp_dtb_mem>;
|
||||
|
||||
qcom,qmp = <&aoss_qmp>;
|
||||
|
||||
qcom,smem-states = <&smp2p_adsp_out 0>;
|
||||
qcom,smem-state-names = "stop";
|
||||
|
||||
status = "disabled";
|
||||
|
||||
remoteproc_adsp_glink: glink-edge {
|
||||
interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
|
||||
IPCC_MPROC_SIGNAL_GLINK_QMP
|
||||
IRQ_TYPE_EDGE_RISING>;
|
||||
|
||||
mboxes = <&ipcc IPCC_CLIENT_LPASS
|
||||
IPCC_MPROC_SIGNAL_GLINK_QMP>;
|
||||
|
||||
qcom,remote-pid = <2>;
|
||||
|
||||
label = "lpass";
|
||||
|
||||
fastrpc {
|
||||
compatible = "qcom,fastrpc";
|
||||
|
||||
qcom,glink-channels = "fastrpcglink-apps-dsp";
|
||||
|
||||
label = "adsp";
|
||||
|
||||
qcom,non-secure-domain;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
compute-cb@3 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <3>;
|
||||
|
||||
iommus = <&apps_smmu 0x1003 0x80>,
|
||||
<&apps_smmu 0x1043 0x20>;
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
compute-cb@4 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <4>;
|
||||
|
||||
iommus = <&apps_smmu 0x1004 0x80>,
|
||||
<&apps_smmu 0x1044 0x20>;
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
compute-cb@5 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <5>;
|
||||
|
||||
iommus = <&apps_smmu 0x1005 0x80>,
|
||||
<&apps_smmu 0x1045 0x20>;
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
compute-cb@6 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <6>;
|
||||
|
||||
iommus = <&apps_smmu 0x1006 0x80>,
|
||||
<&apps_smmu 0x1046 0x20>;
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
compute-cb@7 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <7>;
|
||||
|
||||
iommus = <&apps_smmu 0x1007 0x40>,
|
||||
<&apps_smmu 0x1067 0x0>,
|
||||
<&apps_smmu 0x1087 0x0>;
|
||||
dma-coherent;
|
||||
};
|
||||
};
|
||||
|
||||
gpr {
|
||||
compatible = "qcom,gpr";
|
||||
qcom,glink-channels = "adsp_apps";
|
||||
qcom,domain = <GPR_DOMAIN_ID_ADSP>;
|
||||
qcom,intents = <512 20>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
q6apm: service@1 {
|
||||
compatible = "qcom,q6apm";
|
||||
reg = <GPR_APM_MODULE_IID>;
|
||||
#sound-dai-cells = <0>;
|
||||
qcom,protection-domain = "avs/audio",
|
||||
"msm/adsp/audio_pd";
|
||||
|
||||
q6apmbedai: bedais {
|
||||
compatible = "qcom,q6apm-lpass-dais";
|
||||
#sound-dai-cells = <1>;
|
||||
};
|
||||
|
||||
q6apmdai: dais {
|
||||
compatible = "qcom,q6apm-dais";
|
||||
iommus = <&apps_smmu 0x1001 0x80>,
|
||||
<&apps_smmu 0x1061 0x0>;
|
||||
};
|
||||
};
|
||||
|
||||
q6prm: service@2 {
|
||||
compatible = "qcom,q6prm";
|
||||
reg = <GPR_PRM_MODULE_IID>;
|
||||
qcom,protection-domain = "avs/audio",
|
||||
"msm/adsp/audio_pd";
|
||||
|
||||
q6prmcc: clock-controller {
|
||||
compatible = "qcom,q6prm-lpass-clocks";
|
||||
#clock-cells = <2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
nsp_noc: interconnect@320c0000 {
|
||||
compatible = "qcom,sm8650-nsp-noc";
|
||||
reg = <0 0x320c0000 0 0xf080>;
|
||||
@@ -5483,7 +5480,7 @@
|
||||
|
||||
remoteproc_cdsp: remoteproc@32300000 {
|
||||
compatible = "qcom,sm8650-cdsp-pas";
|
||||
reg = <0 0x32300000 0 0x1400000>;
|
||||
reg = <0x0 0x32300000 0x0 0x10000>;
|
||||
|
||||
interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
|
||||
@@ -754,7 +754,7 @@
|
||||
};
|
||||
|
||||
&usb_1_ss0_qmpphy {
|
||||
vdda-phy-supply = <&vreg_l3e_1p2>;
|
||||
vdda-phy-supply = <&vreg_l2j_1p2>;
|
||||
vdda-pll-supply = <&vreg_l1j_0p8>;
|
||||
|
||||
status = "okay";
|
||||
@@ -786,7 +786,7 @@
|
||||
};
|
||||
|
||||
&usb_1_ss1_qmpphy {
|
||||
vdda-phy-supply = <&vreg_l3e_1p2>;
|
||||
vdda-phy-supply = <&vreg_l2j_1p2>;
|
||||
vdda-pll-supply = <&vreg_l2d_0p9>;
|
||||
|
||||
status = "okay";
|
||||
|
||||
@@ -591,7 +591,7 @@
|
||||
};
|
||||
|
||||
&usb_1_ss0_qmpphy {
|
||||
vdda-phy-supply = <&vreg_l3e_1p2>;
|
||||
vdda-phy-supply = <&vreg_l2j_1p2>;
|
||||
vdda-pll-supply = <&vreg_l1j_0p8>;
|
||||
|
||||
status = "okay";
|
||||
@@ -623,7 +623,7 @@
|
||||
};
|
||||
|
||||
&usb_1_ss1_qmpphy {
|
||||
vdda-phy-supply = <&vreg_l3e_1p2>;
|
||||
vdda-phy-supply = <&vreg_l2j_1p2>;
|
||||
vdda-pll-supply = <&vreg_l2d_0p9>;
|
||||
|
||||
status = "okay";
|
||||
|
||||
@@ -1147,7 +1147,7 @@
|
||||
};
|
||||
|
||||
&usb_1_ss0_qmpphy {
|
||||
vdda-phy-supply = <&vreg_l3e_1p2>;
|
||||
vdda-phy-supply = <&vreg_l2j_1p2>;
|
||||
vdda-pll-supply = <&vreg_l1j_0p8>;
|
||||
|
||||
status = "okay";
|
||||
@@ -1179,7 +1179,7 @@
|
||||
};
|
||||
|
||||
&usb_1_ss1_qmpphy {
|
||||
vdda-phy-supply = <&vreg_l3e_1p2>;
|
||||
vdda-phy-supply = <&vreg_l2j_1p2>;
|
||||
vdda-pll-supply = <&vreg_l2d_0p9>;
|
||||
|
||||
status = "okay";
|
||||
@@ -1211,7 +1211,7 @@
|
||||
};
|
||||
|
||||
&usb_1_ss2_qmpphy {
|
||||
vdda-phy-supply = <&vreg_l3e_1p2>;
|
||||
vdda-phy-supply = <&vreg_l2j_1p2>;
|
||||
vdda-pll-supply = <&vreg_l2d_0p9>;
|
||||
|
||||
status = "okay";
|
||||
|
||||
@@ -895,7 +895,7 @@
|
||||
};
|
||||
|
||||
&usb_1_ss0_qmpphy {
|
||||
vdda-phy-supply = <&vreg_l3e_1p2>;
|
||||
vdda-phy-supply = <&vreg_l2j_1p2>;
|
||||
vdda-pll-supply = <&vreg_l1j_0p8>;
|
||||
|
||||
status = "okay";
|
||||
@@ -927,7 +927,7 @@
|
||||
};
|
||||
|
||||
&usb_1_ss1_qmpphy {
|
||||
vdda-phy-supply = <&vreg_l3e_1p2>;
|
||||
vdda-phy-supply = <&vreg_l2j_1p2>;
|
||||
vdda-pll-supply = <&vreg_l2d_0p9>;
|
||||
|
||||
status = "okay";
|
||||
@@ -959,7 +959,7 @@
|
||||
};
|
||||
|
||||
&usb_1_ss2_qmpphy {
|
||||
vdda-phy-supply = <&vreg_l3e_1p2>;
|
||||
vdda-phy-supply = <&vreg_l2j_1p2>;
|
||||
vdda-pll-supply = <&vreg_l2d_0p9>;
|
||||
|
||||
status = "okay";
|
||||
|
||||
@@ -782,7 +782,7 @@
|
||||
};
|
||||
|
||||
&usb_1_ss0_qmpphy {
|
||||
vdda-phy-supply = <&vreg_l3e>;
|
||||
vdda-phy-supply = <&vreg_l2j>;
|
||||
vdda-pll-supply = <&vreg_l1j>;
|
||||
|
||||
status = "okay";
|
||||
@@ -814,7 +814,7 @@
|
||||
};
|
||||
|
||||
&usb_1_ss1_qmpphy {
|
||||
vdda-phy-supply = <&vreg_l3e>;
|
||||
vdda-phy-supply = <&vreg_l2j>;
|
||||
vdda-pll-supply = <&vreg_l2d>;
|
||||
|
||||
status = "okay";
|
||||
|
||||
@@ -896,7 +896,7 @@
|
||||
};
|
||||
|
||||
&usb_1_ss0_qmpphy {
|
||||
vdda-phy-supply = <&vreg_l3e_1p2>;
|
||||
vdda-phy-supply = <&vreg_l2j_1p2>;
|
||||
vdda-pll-supply = <&vreg_l1j_0p8>;
|
||||
|
||||
status = "okay";
|
||||
@@ -928,7 +928,7 @@
|
||||
};
|
||||
|
||||
&usb_1_ss1_qmpphy {
|
||||
vdda-phy-supply = <&vreg_l3e_1p2>;
|
||||
vdda-phy-supply = <&vreg_l2j_1p2>;
|
||||
vdda-pll-supply = <&vreg_l2d_0p9>;
|
||||
|
||||
status = "okay";
|
||||
@@ -960,7 +960,7 @@
|
||||
};
|
||||
|
||||
&usb_1_ss2_qmpphy {
|
||||
vdda-phy-supply = <&vreg_l3e_1p2>;
|
||||
vdda-phy-supply = <&vreg_l2j_1p2>;
|
||||
vdda-pll-supply = <&vreg_l2d_0p9>;
|
||||
|
||||
status = "okay";
|
||||
|
||||
@@ -3515,6 +3515,143 @@
|
||||
#interconnect-cells = <2>;
|
||||
};
|
||||
|
||||
remoteproc_adsp: remoteproc@6800000 {
|
||||
compatible = "qcom,x1e80100-adsp-pas";
|
||||
reg = <0x0 0x06800000 0x0 0x10000>;
|
||||
|
||||
interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "wdog",
|
||||
"fatal",
|
||||
"ready",
|
||||
"handover",
|
||||
"stop-ack";
|
||||
|
||||
clocks = <&rpmhcc RPMH_CXO_CLK>;
|
||||
clock-names = "xo";
|
||||
|
||||
power-domains = <&rpmhpd RPMHPD_LCX>,
|
||||
<&rpmhpd RPMHPD_LMX>;
|
||||
power-domain-names = "lcx",
|
||||
"lmx";
|
||||
|
||||
interconnects = <&lpass_lpicx_noc MASTER_LPASS_PROC QCOM_ICC_TAG_ALWAYS
|
||||
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
|
||||
|
||||
memory-region = <&adspslpi_mem>,
|
||||
<&q6_adsp_dtb_mem>;
|
||||
|
||||
qcom,qmp = <&aoss_qmp>;
|
||||
|
||||
qcom,smem-states = <&smp2p_adsp_out 0>;
|
||||
qcom,smem-state-names = "stop";
|
||||
|
||||
status = "disabled";
|
||||
|
||||
glink-edge {
|
||||
interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
|
||||
IPCC_MPROC_SIGNAL_GLINK_QMP
|
||||
IRQ_TYPE_EDGE_RISING>;
|
||||
mboxes = <&ipcc IPCC_CLIENT_LPASS
|
||||
IPCC_MPROC_SIGNAL_GLINK_QMP>;
|
||||
|
||||
label = "lpass";
|
||||
qcom,remote-pid = <2>;
|
||||
|
||||
fastrpc {
|
||||
compatible = "qcom,fastrpc";
|
||||
qcom,glink-channels = "fastrpcglink-apps-dsp";
|
||||
label = "adsp";
|
||||
qcom,non-secure-domain;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
compute-cb@3 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <3>;
|
||||
iommus = <&apps_smmu 0x1003 0x80>,
|
||||
<&apps_smmu 0x1063 0x0>;
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
compute-cb@4 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <4>;
|
||||
iommus = <&apps_smmu 0x1004 0x80>,
|
||||
<&apps_smmu 0x1064 0x0>;
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
compute-cb@5 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <5>;
|
||||
iommus = <&apps_smmu 0x1005 0x80>,
|
||||
<&apps_smmu 0x1065 0x0>;
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
compute-cb@6 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <6>;
|
||||
iommus = <&apps_smmu 0x1006 0x80>,
|
||||
<&apps_smmu 0x1066 0x0>;
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
compute-cb@7 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <7>;
|
||||
iommus = <&apps_smmu 0x1007 0x80>,
|
||||
<&apps_smmu 0x1067 0x0>;
|
||||
dma-coherent;
|
||||
};
|
||||
};
|
||||
|
||||
gpr {
|
||||
compatible = "qcom,gpr";
|
||||
qcom,glink-channels = "adsp_apps";
|
||||
qcom,domain = <GPR_DOMAIN_ID_ADSP>;
|
||||
qcom,intents = <512 20>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
q6apm: service@1 {
|
||||
compatible = "qcom,q6apm";
|
||||
reg = <GPR_APM_MODULE_IID>;
|
||||
#sound-dai-cells = <0>;
|
||||
qcom,protection-domain = "avs/audio",
|
||||
"msm/adsp/audio_pd";
|
||||
|
||||
q6apmbedai: bedais {
|
||||
compatible = "qcom,q6apm-lpass-dais";
|
||||
#sound-dai-cells = <1>;
|
||||
};
|
||||
|
||||
q6apmdai: dais {
|
||||
compatible = "qcom,q6apm-dais";
|
||||
iommus = <&apps_smmu 0x1001 0x80>,
|
||||
<&apps_smmu 0x1061 0x0>;
|
||||
};
|
||||
};
|
||||
|
||||
q6prm: service@2 {
|
||||
compatible = "qcom,q6prm";
|
||||
reg = <GPR_PRM_MODULE_IID>;
|
||||
qcom,protection-domain = "avs/audio",
|
||||
"msm/adsp/audio_pd";
|
||||
|
||||
q6prmcc: clock-controller {
|
||||
compatible = "qcom,q6prm-lpass-clocks";
|
||||
#clock-cells = <2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
lpass_wsa2macro: codec@6aa0000 {
|
||||
compatible = "qcom,x1e80100-lpass-wsa-macro", "qcom,sm8550-lpass-wsa-macro";
|
||||
reg = <0 0x06aa0000 0 0x1000>;
|
||||
@@ -4115,7 +4252,7 @@
|
||||
<&gcc GCC_USB20_MASTER_CLK>;
|
||||
assigned-clock-rates = <19200000>, <200000000>;
|
||||
|
||||
interrupts-extended = <&intc GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>,
|
||||
interrupts-extended = <&intc GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<&pdc 50 IRQ_TYPE_EDGE_BOTH>,
|
||||
<&pdc 49 IRQ_TYPE_EDGE_BOTH>;
|
||||
interrupt-names = "pwr_event",
|
||||
@@ -4141,7 +4278,7 @@
|
||||
usb_2_dwc3: usb@a200000 {
|
||||
compatible = "snps,dwc3";
|
||||
reg = <0 0x0a200000 0 0xcd00>;
|
||||
interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>;
|
||||
iommus = <&apps_smmu 0x14e0 0x0>;
|
||||
phys = <&usb_2_hsphy>;
|
||||
phy-names = "usb2-phy";
|
||||
@@ -6108,146 +6245,9 @@
|
||||
interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
remoteproc_adsp: remoteproc@30000000 {
|
||||
compatible = "qcom,x1e80100-adsp-pas";
|
||||
reg = <0 0x30000000 0 0x100>;
|
||||
|
||||
interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "wdog",
|
||||
"fatal",
|
||||
"ready",
|
||||
"handover",
|
||||
"stop-ack";
|
||||
|
||||
clocks = <&rpmhcc RPMH_CXO_CLK>;
|
||||
clock-names = "xo";
|
||||
|
||||
power-domains = <&rpmhpd RPMHPD_LCX>,
|
||||
<&rpmhpd RPMHPD_LMX>;
|
||||
power-domain-names = "lcx",
|
||||
"lmx";
|
||||
|
||||
interconnects = <&lpass_lpicx_noc MASTER_LPASS_PROC QCOM_ICC_TAG_ALWAYS
|
||||
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
|
||||
|
||||
memory-region = <&adspslpi_mem>,
|
||||
<&q6_adsp_dtb_mem>;
|
||||
|
||||
qcom,qmp = <&aoss_qmp>;
|
||||
|
||||
qcom,smem-states = <&smp2p_adsp_out 0>;
|
||||
qcom,smem-state-names = "stop";
|
||||
|
||||
status = "disabled";
|
||||
|
||||
glink-edge {
|
||||
interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
|
||||
IPCC_MPROC_SIGNAL_GLINK_QMP
|
||||
IRQ_TYPE_EDGE_RISING>;
|
||||
mboxes = <&ipcc IPCC_CLIENT_LPASS
|
||||
IPCC_MPROC_SIGNAL_GLINK_QMP>;
|
||||
|
||||
label = "lpass";
|
||||
qcom,remote-pid = <2>;
|
||||
|
||||
fastrpc {
|
||||
compatible = "qcom,fastrpc";
|
||||
qcom,glink-channels = "fastrpcglink-apps-dsp";
|
||||
label = "adsp";
|
||||
qcom,non-secure-domain;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
compute-cb@3 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <3>;
|
||||
iommus = <&apps_smmu 0x1003 0x80>,
|
||||
<&apps_smmu 0x1063 0x0>;
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
compute-cb@4 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <4>;
|
||||
iommus = <&apps_smmu 0x1004 0x80>,
|
||||
<&apps_smmu 0x1064 0x0>;
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
compute-cb@5 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <5>;
|
||||
iommus = <&apps_smmu 0x1005 0x80>,
|
||||
<&apps_smmu 0x1065 0x0>;
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
compute-cb@6 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <6>;
|
||||
iommus = <&apps_smmu 0x1006 0x80>,
|
||||
<&apps_smmu 0x1066 0x0>;
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
compute-cb@7 {
|
||||
compatible = "qcom,fastrpc-compute-cb";
|
||||
reg = <7>;
|
||||
iommus = <&apps_smmu 0x1007 0x80>,
|
||||
<&apps_smmu 0x1067 0x0>;
|
||||
dma-coherent;
|
||||
};
|
||||
};
|
||||
|
||||
gpr {
|
||||
compatible = "qcom,gpr";
|
||||
qcom,glink-channels = "adsp_apps";
|
||||
qcom,domain = <GPR_DOMAIN_ID_ADSP>;
|
||||
qcom,intents = <512 20>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
q6apm: service@1 {
|
||||
compatible = "qcom,q6apm";
|
||||
reg = <GPR_APM_MODULE_IID>;
|
||||
#sound-dai-cells = <0>;
|
||||
qcom,protection-domain = "avs/audio",
|
||||
"msm/adsp/audio_pd";
|
||||
|
||||
q6apmbedai: bedais {
|
||||
compatible = "qcom,q6apm-lpass-dais";
|
||||
#sound-dai-cells = <1>;
|
||||
};
|
||||
|
||||
q6apmdai: dais {
|
||||
compatible = "qcom,q6apm-dais";
|
||||
iommus = <&apps_smmu 0x1001 0x80>,
|
||||
<&apps_smmu 0x1061 0x0>;
|
||||
};
|
||||
};
|
||||
|
||||
q6prm: service@2 {
|
||||
compatible = "qcom,q6prm";
|
||||
reg = <GPR_PRM_MODULE_IID>;
|
||||
qcom,protection-domain = "avs/audio",
|
||||
"msm/adsp/audio_pd";
|
||||
|
||||
q6prmcc: clock-controller {
|
||||
compatible = "qcom,q6prm-lpass-clocks";
|
||||
#clock-cells = <2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
remoteproc_cdsp: remoteproc@32300000 {
|
||||
compatible = "qcom,x1e80100-cdsp-pas";
|
||||
reg = <0 0x32300000 0 0x1400000>;
|
||||
reg = <0x0 0x32300000 0x0 0x10000>;
|
||||
|
||||
interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>,
|
||||
<&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>,
|
||||
|
||||
@@ -181,7 +181,7 @@
|
||||
snps,reset-active-low;
|
||||
snps,reset-delays-us = <0 10000 50000>;
|
||||
tx_delay = <0x10>;
|
||||
rx_delay = <0x10>;
|
||||
rx_delay = <0x23>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
||||
@@ -262,6 +262,7 @@
|
||||
assigned-clocks = <&pmucru CLK_PCIEPHY0_REF>;
|
||||
assigned-clock-rates = <100000000>;
|
||||
resets = <&cru SRST_PIPEPHY0>;
|
||||
reset-names = "phy";
|
||||
rockchip,pipe-grf = <&pipegrf>;
|
||||
rockchip,pipe-phy-grf = <&pipe_phy_grf0>;
|
||||
#phy-cells = <1>;
|
||||
|
||||
@@ -1762,6 +1762,7 @@
|
||||
assigned-clocks = <&pmucru CLK_PCIEPHY1_REF>;
|
||||
assigned-clock-rates = <100000000>;
|
||||
resets = <&cru SRST_PIPEPHY1>;
|
||||
reset-names = "phy";
|
||||
rockchip,pipe-grf = <&pipegrf>;
|
||||
rockchip,pipe-phy-grf = <&pipe_phy_grf1>;
|
||||
#phy-cells = <1>;
|
||||
@@ -1778,6 +1779,7 @@
|
||||
assigned-clocks = <&pmucru CLK_PCIEPHY2_REF>;
|
||||
assigned-clock-rates = <100000000>;
|
||||
resets = <&cru SRST_PIPEPHY2>;
|
||||
reset-names = "phy";
|
||||
rockchip,pipe-grf = <&pipegrf>;
|
||||
rockchip,pipe-phy-grf = <&pipe_phy_grf2>;
|
||||
#phy-cells = <1>;
|
||||
|
||||
@@ -350,6 +350,11 @@ alternative_cb_end
|
||||
// Narrow PARange to fit the PS field in TCR_ELx
|
||||
ubfx \tmp0, \tmp0, #ID_AA64MMFR0_EL1_PARANGE_SHIFT, #3
|
||||
mov \tmp1, #ID_AA64MMFR0_EL1_PARANGE_MAX
|
||||
#ifdef CONFIG_ARM64_LPA2
|
||||
alternative_if_not ARM64_HAS_VA52
|
||||
mov \tmp1, #ID_AA64MMFR0_EL1_PARANGE_48
|
||||
alternative_else_nop_endif
|
||||
#endif
|
||||
cmp \tmp0, \tmp1
|
||||
csel \tmp0, \tmp1, \tmp0, hi
|
||||
bfi \tcr, \tmp0, \pos, #3
|
||||
|
||||
@@ -218,12 +218,6 @@
|
||||
*/
|
||||
#define S1_TABLE_AP (_AT(pmdval_t, 3) << 61)
|
||||
|
||||
/*
|
||||
* Highest possible physical address supported.
|
||||
*/
|
||||
#define PHYS_MASK_SHIFT (CONFIG_ARM64_PA_BITS)
|
||||
#define PHYS_MASK ((UL(1) << PHYS_MASK_SHIFT) - 1)
|
||||
|
||||
#define TTBR_CNP_BIT (UL(1) << 0)
|
||||
|
||||
/*
|
||||
|
||||
@@ -78,6 +78,7 @@ extern bool arm64_use_ng_mappings;
|
||||
#define lpa2_is_enabled() false
|
||||
#define PTE_MAYBE_SHARED PTE_SHARED
|
||||
#define PMD_MAYBE_SHARED PMD_SECT_S
|
||||
#define PHYS_MASK_SHIFT (CONFIG_ARM64_PA_BITS)
|
||||
#else
|
||||
static inline bool __pure lpa2_is_enabled(void)
|
||||
{
|
||||
@@ -86,8 +87,14 @@ static inline bool __pure lpa2_is_enabled(void)
|
||||
|
||||
#define PTE_MAYBE_SHARED (lpa2_is_enabled() ? 0 : PTE_SHARED)
|
||||
#define PMD_MAYBE_SHARED (lpa2_is_enabled() ? 0 : PMD_SECT_S)
|
||||
#define PHYS_MASK_SHIFT (lpa2_is_enabled() ? CONFIG_ARM64_PA_BITS : 48)
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Highest possible physical address supported.
|
||||
*/
|
||||
#define PHYS_MASK ((UL(1) << PHYS_MASK_SHIFT) - 1)
|
||||
|
||||
/*
|
||||
* If we have userspace only BTI we don't want to mark kernel pages
|
||||
* guarded even if the system does support BTI.
|
||||
|
||||
@@ -5,7 +5,10 @@
|
||||
#ifndef __ASM_SPARSEMEM_H
|
||||
#define __ASM_SPARSEMEM_H
|
||||
|
||||
#define MAX_PHYSMEM_BITS CONFIG_ARM64_PA_BITS
|
||||
#include <asm/pgtable-prot.h>
|
||||
|
||||
#define MAX_PHYSMEM_BITS PHYS_MASK_SHIFT
|
||||
#define MAX_POSSIBLE_PHYSMEM_BITS (52)
|
||||
|
||||
/*
|
||||
* Section size must be at least 512MB for 64K base
|
||||
|
||||
@@ -1164,12 +1164,6 @@ void __init init_cpu_features(struct cpuinfo_arm64 *info)
|
||||
id_aa64pfr1_sme(read_sanitised_ftr_reg(SYS_ID_AA64PFR1_EL1))) {
|
||||
unsigned long cpacr = cpacr_save_enable_kernel_sme();
|
||||
|
||||
/*
|
||||
* We mask out SMPS since even if the hardware
|
||||
* supports priorities the kernel does not at present
|
||||
* and we block access to them.
|
||||
*/
|
||||
info->reg_smidr = read_cpuid(SMIDR_EL1) & ~SMIDR_EL1_SMPS;
|
||||
vec_init_vq_map(ARM64_VEC_SME);
|
||||
|
||||
cpacr_restore(cpacr);
|
||||
@@ -1420,13 +1414,6 @@ void update_cpu_features(int cpu,
|
||||
id_aa64pfr1_sme(read_sanitised_ftr_reg(SYS_ID_AA64PFR1_EL1))) {
|
||||
unsigned long cpacr = cpacr_save_enable_kernel_sme();
|
||||
|
||||
/*
|
||||
* We mask out SMPS since even if the hardware
|
||||
* supports priorities the kernel does not at present
|
||||
* and we block access to them.
|
||||
*/
|
||||
info->reg_smidr = read_cpuid(SMIDR_EL1) & ~SMIDR_EL1_SMPS;
|
||||
|
||||
/* Probe vector lengths */
|
||||
if (!system_capabilities_finalized())
|
||||
vec_update_vq_map(ARM64_VEC_SME);
|
||||
@@ -2987,6 +2974,13 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
|
||||
.matches = match, \
|
||||
}
|
||||
|
||||
#define HWCAP_CAP_MATCH_ID(match, reg, field, min_value, cap_type, cap) \
|
||||
{ \
|
||||
__HWCAP_CAP(#cap, cap_type, cap) \
|
||||
HWCAP_CPUID_MATCH(reg, field, min_value) \
|
||||
.matches = match, \
|
||||
}
|
||||
|
||||
#ifdef CONFIG_ARM64_PTR_AUTH
|
||||
static const struct arm64_cpu_capabilities ptr_auth_hwcap_addr_matches[] = {
|
||||
{
|
||||
@@ -3015,6 +3009,13 @@ static const struct arm64_cpu_capabilities ptr_auth_hwcap_gen_matches[] = {
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARM64_SVE
|
||||
static bool has_sve_feature(const struct arm64_cpu_capabilities *cap, int scope)
|
||||
{
|
||||
return system_supports_sve() && has_user_cpuid_feature(cap, scope);
|
||||
}
|
||||
#endif
|
||||
|
||||
static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = {
|
||||
HWCAP_CAP(ID_AA64ISAR0_EL1, AES, PMULL, CAP_HWCAP, KERNEL_HWCAP_PMULL),
|
||||
HWCAP_CAP(ID_AA64ISAR0_EL1, AES, AES, CAP_HWCAP, KERNEL_HWCAP_AES),
|
||||
@@ -3057,19 +3058,19 @@ static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = {
|
||||
HWCAP_CAP(ID_AA64MMFR2_EL1, AT, IMP, CAP_HWCAP, KERNEL_HWCAP_USCAT),
|
||||
#ifdef CONFIG_ARM64_SVE
|
||||
HWCAP_CAP(ID_AA64PFR0_EL1, SVE, IMP, CAP_HWCAP, KERNEL_HWCAP_SVE),
|
||||
HWCAP_CAP(ID_AA64ZFR0_EL1, SVEver, SVE2p1, CAP_HWCAP, KERNEL_HWCAP_SVE2P1),
|
||||
HWCAP_CAP(ID_AA64ZFR0_EL1, SVEver, SVE2, CAP_HWCAP, KERNEL_HWCAP_SVE2),
|
||||
HWCAP_CAP(ID_AA64ZFR0_EL1, AES, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEAES),
|
||||
HWCAP_CAP(ID_AA64ZFR0_EL1, AES, PMULL128, CAP_HWCAP, KERNEL_HWCAP_SVEPMULL),
|
||||
HWCAP_CAP(ID_AA64ZFR0_EL1, BitPerm, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEBITPERM),
|
||||
HWCAP_CAP(ID_AA64ZFR0_EL1, B16B16, IMP, CAP_HWCAP, KERNEL_HWCAP_SVE_B16B16),
|
||||
HWCAP_CAP(ID_AA64ZFR0_EL1, BF16, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEBF16),
|
||||
HWCAP_CAP(ID_AA64ZFR0_EL1, BF16, EBF16, CAP_HWCAP, KERNEL_HWCAP_SVE_EBF16),
|
||||
HWCAP_CAP(ID_AA64ZFR0_EL1, SHA3, IMP, CAP_HWCAP, KERNEL_HWCAP_SVESHA3),
|
||||
HWCAP_CAP(ID_AA64ZFR0_EL1, SM4, IMP, CAP_HWCAP, KERNEL_HWCAP_SVESM4),
|
||||
HWCAP_CAP(ID_AA64ZFR0_EL1, I8MM, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEI8MM),
|
||||
HWCAP_CAP(ID_AA64ZFR0_EL1, F32MM, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEF32MM),
|
||||
HWCAP_CAP(ID_AA64ZFR0_EL1, F64MM, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEF64MM),
|
||||
HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, SVEver, SVE2p1, CAP_HWCAP, KERNEL_HWCAP_SVE2P1),
|
||||
HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, SVEver, SVE2, CAP_HWCAP, KERNEL_HWCAP_SVE2),
|
||||
HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, AES, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEAES),
|
||||
HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, AES, PMULL128, CAP_HWCAP, KERNEL_HWCAP_SVEPMULL),
|
||||
HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, BitPerm, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEBITPERM),
|
||||
HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, B16B16, IMP, CAP_HWCAP, KERNEL_HWCAP_SVE_B16B16),
|
||||
HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, BF16, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEBF16),
|
||||
HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, BF16, EBF16, CAP_HWCAP, KERNEL_HWCAP_SVE_EBF16),
|
||||
HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, SHA3, IMP, CAP_HWCAP, KERNEL_HWCAP_SVESHA3),
|
||||
HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, SM4, IMP, CAP_HWCAP, KERNEL_HWCAP_SVESM4),
|
||||
HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, I8MM, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEI8MM),
|
||||
HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, F32MM, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEF32MM),
|
||||
HWCAP_CAP_MATCH_ID(has_sve_feature, ID_AA64ZFR0_EL1, F64MM, IMP, CAP_HWCAP, KERNEL_HWCAP_SVEF64MM),
|
||||
#endif
|
||||
HWCAP_CAP(ID_AA64PFR1_EL1, SSBS, SSBS2, CAP_HWCAP, KERNEL_HWCAP_SSBS),
|
||||
#ifdef CONFIG_ARM64_BTI
|
||||
@@ -3440,7 +3441,7 @@ static void verify_hyp_capabilities(void)
|
||||
return;
|
||||
|
||||
safe_mmfr1 = read_sanitised_ftr_reg(SYS_ID_AA64MMFR1_EL1);
|
||||
mmfr0 = read_cpuid(ID_AA64MMFR0_EL1);
|
||||
mmfr0 = read_sanitised_ftr_reg(SYS_ID_AA64MMFR0_EL1);
|
||||
mmfr1 = read_cpuid(ID_AA64MMFR1_EL1);
|
||||
|
||||
/* Verify VMID bits */
|
||||
|
||||
@@ -478,6 +478,16 @@ static void __cpuinfo_store_cpu(struct cpuinfo_arm64 *info)
|
||||
if (id_aa64pfr0_32bit_el0(info->reg_id_aa64pfr0))
|
||||
__cpuinfo_store_cpu_32bit(&info->aarch32);
|
||||
|
||||
if (IS_ENABLED(CONFIG_ARM64_SME) &&
|
||||
id_aa64pfr1_sme(info->reg_id_aa64pfr1)) {
|
||||
/*
|
||||
* We mask out SMPS since even if the hardware
|
||||
* supports priorities the kernel does not at present
|
||||
* and we block access to them.
|
||||
*/
|
||||
info->reg_smidr = read_cpuid(SMIDR_EL1) & ~SMIDR_EL1_SMPS;
|
||||
}
|
||||
|
||||
if (id_aa64pfr0_mpam(info->reg_id_aa64pfr0))
|
||||
info->reg_mpamidr = read_cpuid(MPAMIDR_EL1);
|
||||
|
||||
|
||||
@@ -74,6 +74,15 @@ static bool __init mmfr2_varange_filter(u64 val)
|
||||
id_aa64mmfr0_override.val |=
|
||||
(ID_AA64MMFR0_EL1_TGRAN_LPA2 - 1) << ID_AA64MMFR0_EL1_TGRAN_SHIFT;
|
||||
id_aa64mmfr0_override.mask |= 0xfU << ID_AA64MMFR0_EL1_TGRAN_SHIFT;
|
||||
|
||||
/*
|
||||
* Override PARange to 48 bits - the override will just be
|
||||
* ignored if the actual PARange is smaller, but this is
|
||||
* unlikely to be the case for LPA2 capable silicon.
|
||||
*/
|
||||
id_aa64mmfr0_override.val |=
|
||||
ID_AA64MMFR0_EL1_PARANGE_48 << ID_AA64MMFR0_EL1_PARANGE_SHIFT;
|
||||
id_aa64mmfr0_override.mask |= 0xfU << ID_AA64MMFR0_EL1_PARANGE_SHIFT;
|
||||
}
|
||||
#endif
|
||||
return true;
|
||||
|
||||
@@ -136,6 +136,12 @@ static void noinline __section(".idmap.text") set_ttbr0_for_lpa2(u64 ttbr)
|
||||
{
|
||||
u64 sctlr = read_sysreg(sctlr_el1);
|
||||
u64 tcr = read_sysreg(tcr_el1) | TCR_DS;
|
||||
u64 mmfr0 = read_sysreg(id_aa64mmfr0_el1);
|
||||
u64 parange = cpuid_feature_extract_unsigned_field(mmfr0,
|
||||
ID_AA64MMFR0_EL1_PARANGE_SHIFT);
|
||||
|
||||
tcr &= ~TCR_IPS_MASK;
|
||||
tcr |= parange << TCR_IPS_SHIFT;
|
||||
|
||||
asm(" msr sctlr_el1, %0 ;"
|
||||
" isb ;"
|
||||
|
||||
@@ -467,10 +467,8 @@ static void timer_emulate(struct arch_timer_context *ctx)
|
||||
|
||||
trace_kvm_timer_emulate(ctx, should_fire);
|
||||
|
||||
if (should_fire != ctx->irq.level) {
|
||||
if (should_fire != ctx->irq.level)
|
||||
kvm_timer_update_irq(ctx->vcpu, should_fire, ctx);
|
||||
return;
|
||||
}
|
||||
|
||||
/*
|
||||
* If the timer can fire now, we don't need to have a soft timer
|
||||
|
||||
@@ -2026,8 +2026,7 @@ static int kvm_init_vector_slots(void)
|
||||
static void __init cpu_prepare_hyp_mode(int cpu)
|
||||
{
|
||||
struct kvm_nvhe_init_params *params = per_cpu_ptr_nvhe_sym(kvm_init_params, cpu);
|
||||
u64 mmfr0 = read_sanitised_ftr_reg(SYS_ID_AA64MMFR0_EL1);
|
||||
unsigned long tcr;
|
||||
unsigned long tcr, ips;
|
||||
int *hyp_cpu_number_ptr = per_cpu_ptr_nvhe_sym(hyp_cpu_number, cpu);
|
||||
|
||||
*hyp_cpu_number_ptr = cpu;
|
||||
@@ -2044,13 +2043,14 @@ static void __init cpu_prepare_hyp_mode(int cpu)
|
||||
params->mair_el2 = read_sysreg(mair_el1);
|
||||
|
||||
tcr = read_sysreg(tcr_el1);
|
||||
ips = FIELD_GET(TCR_IPS_MASK, tcr);
|
||||
if (cpus_have_final_cap(ARM64_KVM_HVHE)) {
|
||||
tcr &= ~(TCR_HD | TCR_HA | TCR_A1 | TCR_T0SZ_MASK);
|
||||
tcr |= TCR_EPD1_MASK;
|
||||
} else {
|
||||
tcr &= TCR_EL2_MASK;
|
||||
tcr |= TCR_EL2_RES1 |
|
||||
FIELD_PREP(TCR_EL2_PS_MASK, kvm_get_parange(mmfr0));
|
||||
FIELD_PREP(TCR_EL2_PS_MASK, ips);
|
||||
if (lpa2_is_enabled())
|
||||
tcr |= TCR_EL2_DS;
|
||||
}
|
||||
|
||||
@@ -508,6 +508,18 @@ pte_t huge_ptep_clear_flush(struct vm_area_struct *vma,
|
||||
|
||||
static int __init hugetlbpage_init(void)
|
||||
{
|
||||
/*
|
||||
* HugeTLB pages are supported on maximum four page table
|
||||
* levels (PUD, CONT PMD, PMD, CONT PTE) for a given base
|
||||
* page size, corresponding to hugetlb_add_hstate() calls
|
||||
* here.
|
||||
*
|
||||
* HUGE_MAX_HSTATE should at least match maximum supported
|
||||
* HugeTLB page sizes on the platform. Any new addition to
|
||||
* supported HugeTLB page sizes will also require changing
|
||||
* HUGE_MAX_HSTATE as well.
|
||||
*/
|
||||
BUILD_BUG_ON(HUGE_MAX_HSTATE < 4);
|
||||
if (pud_sect_supported())
|
||||
hugetlb_add_hstate(PUD_SHIFT - PAGE_SHIFT);
|
||||
|
||||
|
||||
@@ -298,7 +298,12 @@ void __init arm64_memblock_init(void)
|
||||
|
||||
if (IS_ENABLED(CONFIG_RANDOMIZE_BASE)) {
|
||||
extern u16 memstart_offset_seed;
|
||||
u64 mmfr0 = read_cpuid(ID_AA64MMFR0_EL1);
|
||||
|
||||
/*
|
||||
* Use the sanitised version of id_aa64mmfr0_el1 so that linear
|
||||
* map randomization can be enabled by shrinking the IPA space.
|
||||
*/
|
||||
u64 mmfr0 = read_sanitised_ftr_reg(SYS_ID_AA64MMFR0_EL1);
|
||||
int parange = cpuid_feature_extract_unsigned_field(
|
||||
mmfr0, ID_AA64MMFR0_EL1_PARANGE_SHIFT);
|
||||
s64 range = linear_region_size -
|
||||
|
||||
@@ -72,6 +72,16 @@ struct user_watch_state {
|
||||
} dbg_regs[8];
|
||||
};
|
||||
|
||||
struct user_watch_state_v2 {
|
||||
uint64_t dbg_info;
|
||||
struct {
|
||||
uint64_t addr;
|
||||
uint64_t mask;
|
||||
uint32_t ctrl;
|
||||
uint32_t pad;
|
||||
} dbg_regs[14];
|
||||
};
|
||||
|
||||
#define PTRACE_SYSEMU 0x1f
|
||||
#define PTRACE_SYSEMU_SINGLESTEP 0x20
|
||||
|
||||
|
||||
@@ -720,7 +720,7 @@ static int hw_break_set(struct task_struct *target,
|
||||
unsigned int note_type = regset->core_note_type;
|
||||
|
||||
/* Resource info */
|
||||
offset = offsetof(struct user_watch_state, dbg_regs);
|
||||
offset = offsetof(struct user_watch_state_v2, dbg_regs);
|
||||
user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf, 0, offset);
|
||||
|
||||
/* (address, mask, ctrl) registers */
|
||||
@@ -920,7 +920,7 @@ static const struct user_regset loongarch64_regsets[] = {
|
||||
#ifdef CONFIG_HAVE_HW_BREAKPOINT
|
||||
[REGSET_HW_BREAK] = {
|
||||
.core_note_type = NT_LOONGARCH_HW_BREAK,
|
||||
.n = sizeof(struct user_watch_state) / sizeof(u32),
|
||||
.n = sizeof(struct user_watch_state_v2) / sizeof(u32),
|
||||
.size = sizeof(u32),
|
||||
.align = sizeof(u32),
|
||||
.regset_get = hw_break_get,
|
||||
@@ -928,7 +928,7 @@ static const struct user_regset loongarch64_regsets[] = {
|
||||
},
|
||||
[REGSET_HW_WATCH] = {
|
||||
.core_note_type = NT_LOONGARCH_HW_WATCH,
|
||||
.n = sizeof(struct user_watch_state) / sizeof(u32),
|
||||
.n = sizeof(struct user_watch_state_v2) / sizeof(u32),
|
||||
.size = sizeof(u32),
|
||||
.align = sizeof(u32),
|
||||
.regset_get = hw_break_get,
|
||||
|
||||
@@ -9,7 +9,7 @@
|
||||
*/
|
||||
#ifndef CONFIG_PCI
|
||||
|
||||
#include <asm/raw_io.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/kmap.h>
|
||||
|
||||
/*
|
||||
@@ -29,9 +29,9 @@
|
||||
#define inw_p(port) 0
|
||||
#define outb_p(port, val) do { } while (0)
|
||||
#define outw(port, val) do { } while (0)
|
||||
#define readb raw_inb
|
||||
#define writeb raw_outb
|
||||
#define writew raw_outw
|
||||
#define readb __raw_readb
|
||||
#define writeb __raw_writeb
|
||||
#define writew __raw_writew
|
||||
|
||||
#endif /* CONFIG_PCI */
|
||||
#endif /* _ASM_M68K_VGA_H */
|
||||
|
||||
@@ -1084,7 +1084,6 @@ config CSRC_IOASIC
|
||||
|
||||
config CSRC_R4K
|
||||
select CLOCKSOURCE_WATCHDOG if CPU_FREQ
|
||||
select HAVE_UNSTABLE_SCHED_CLOCK if SMP && 64BIT
|
||||
bool
|
||||
|
||||
config CSRC_SB1250
|
||||
|
||||
@@ -248,7 +248,7 @@ int ftrace_disable_ftrace_graph_caller(void)
|
||||
#define S_R_SP (0xafb0 << 16) /* s{d,w} R, offset(sp) */
|
||||
#define OFFSET_MASK 0xffff /* stack offset range: 0 ~ PT_SIZE */
|
||||
|
||||
unsigned long ftrace_get_parent_ra_addr(unsigned long self_ra, unsigned long
|
||||
static unsigned long ftrace_get_parent_ra_addr(unsigned long self_ra, unsigned long
|
||||
old_parent_ra, unsigned long parent_ra_addr, unsigned long fp)
|
||||
{
|
||||
unsigned long sp, ip, tmp;
|
||||
|
||||
@@ -21,13 +21,11 @@ static ssize_t boardinfo_show(struct kobject *kobj,
|
||||
"BIOS Info\n"
|
||||
"Vendor\t\t\t: %s\n"
|
||||
"Version\t\t\t: %s\n"
|
||||
"ROM Size\t\t: %d KB\n"
|
||||
"Release Date\t\t: %s\n",
|
||||
strsep(&tmp_board_manufacturer, "-"),
|
||||
eboard->name,
|
||||
strsep(&tmp_bios_vendor, "-"),
|
||||
einter->description,
|
||||
einter->size,
|
||||
especial->special_name);
|
||||
}
|
||||
static struct kobj_attribute boardinfo_attr = __ATTR(boardinfo, 0444,
|
||||
|
||||
@@ -1660,7 +1660,7 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
|
||||
break;
|
||||
}
|
||||
|
||||
case 0x3:
|
||||
case 0x7:
|
||||
if (MIPSInst_FUNC(ir) != pfetch_op)
|
||||
return SIGILL;
|
||||
|
||||
|
||||
@@ -29,6 +29,14 @@ static LIST_HEAD(controllers);
|
||||
|
||||
static int pci_initialized;
|
||||
|
||||
unsigned long pci_address_to_pio(phys_addr_t address)
|
||||
{
|
||||
if (address > IO_SPACE_LIMIT)
|
||||
return (unsigned long)-1;
|
||||
|
||||
return (unsigned long) address;
|
||||
}
|
||||
|
||||
/*
|
||||
* We need to avoid collisions with `mirrored' VGA ports
|
||||
* and other strange ISA hardware, so we always want the
|
||||
|
||||
+2
-2
@@ -60,8 +60,8 @@ config PARISC
|
||||
select HAVE_ARCH_MMAP_RND_BITS
|
||||
select HAVE_ARCH_AUDITSYSCALL
|
||||
select HAVE_ARCH_HASH
|
||||
select HAVE_ARCH_JUMP_LABEL
|
||||
select HAVE_ARCH_JUMP_LABEL_RELATIVE
|
||||
# select HAVE_ARCH_JUMP_LABEL
|
||||
# select HAVE_ARCH_JUMP_LABEL_RELATIVE
|
||||
select HAVE_ARCH_KFENCE
|
||||
select HAVE_ARCH_SECCOMP_FILTER
|
||||
select HAVE_ARCH_TRACEHOOK
|
||||
|
||||
@@ -242,7 +242,7 @@ static inline int tlbe_is_writable(struct kvm_book3e_206_tlb_entry *tlbe)
|
||||
return tlbe->mas7_3 & (MAS3_SW|MAS3_UW);
|
||||
}
|
||||
|
||||
static inline void kvmppc_e500_ref_setup(struct tlbe_ref *ref,
|
||||
static inline bool kvmppc_e500_ref_setup(struct tlbe_ref *ref,
|
||||
struct kvm_book3e_206_tlb_entry *gtlbe,
|
||||
kvm_pfn_t pfn, unsigned int wimg)
|
||||
{
|
||||
@@ -252,11 +252,7 @@ static inline void kvmppc_e500_ref_setup(struct tlbe_ref *ref,
|
||||
/* Use guest supplied MAS2_G and MAS2_E */
|
||||
ref->flags |= (gtlbe->mas2 & MAS2_ATTRIB_MASK) | wimg;
|
||||
|
||||
/* Mark the page accessed */
|
||||
kvm_set_pfn_accessed(pfn);
|
||||
|
||||
if (tlbe_is_writable(gtlbe))
|
||||
kvm_set_pfn_dirty(pfn);
|
||||
return tlbe_is_writable(gtlbe);
|
||||
}
|
||||
|
||||
static inline void kvmppc_e500_ref_release(struct tlbe_ref *ref)
|
||||
@@ -326,6 +322,7 @@ static inline int kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,
|
||||
{
|
||||
struct kvm_memory_slot *slot;
|
||||
unsigned long pfn = 0; /* silence GCC warning */
|
||||
struct page *page = NULL;
|
||||
unsigned long hva;
|
||||
int pfnmap = 0;
|
||||
int tsize = BOOK3E_PAGESZ_4K;
|
||||
@@ -337,6 +334,7 @@ static inline int kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,
|
||||
unsigned int wimg = 0;
|
||||
pgd_t *pgdir;
|
||||
unsigned long flags;
|
||||
bool writable = false;
|
||||
|
||||
/* used to check for invalidations in progress */
|
||||
mmu_seq = kvm->mmu_invalidate_seq;
|
||||
@@ -446,7 +444,7 @@ static inline int kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,
|
||||
|
||||
if (likely(!pfnmap)) {
|
||||
tsize_pages = 1UL << (tsize + 10 - PAGE_SHIFT);
|
||||
pfn = gfn_to_pfn_memslot(slot, gfn);
|
||||
pfn = __kvm_faultin_pfn(slot, gfn, FOLL_WRITE, NULL, &page);
|
||||
if (is_error_noslot_pfn(pfn)) {
|
||||
if (printk_ratelimit())
|
||||
pr_err("%s: real page not found for gfn %lx\n",
|
||||
@@ -481,7 +479,6 @@ static inline int kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,
|
||||
if (pte_present(pte)) {
|
||||
wimg = (pte_val(pte) >> PTE_WIMGE_SHIFT) &
|
||||
MAS2_WIMGE_MASK;
|
||||
local_irq_restore(flags);
|
||||
} else {
|
||||
local_irq_restore(flags);
|
||||
pr_err_ratelimited("%s: pte not present: gfn %lx,pfn %lx\n",
|
||||
@@ -490,8 +487,9 @@ static inline int kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,
|
||||
goto out;
|
||||
}
|
||||
}
|
||||
kvmppc_e500_ref_setup(ref, gtlbe, pfn, wimg);
|
||||
local_irq_restore(flags);
|
||||
|
||||
writable = kvmppc_e500_ref_setup(ref, gtlbe, pfn, wimg);
|
||||
kvmppc_e500_setup_stlbe(&vcpu_e500->vcpu, gtlbe, tsize,
|
||||
ref, gvaddr, stlbe);
|
||||
|
||||
@@ -499,11 +497,8 @@ static inline int kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,
|
||||
kvmppc_mmu_flush_icache(pfn);
|
||||
|
||||
out:
|
||||
kvm_release_faultin_page(kvm, page, !!ret, writable);
|
||||
spin_unlock(&kvm->mmu_lock);
|
||||
|
||||
/* Drop refcount on page, so that mmu notifiers can clear it */
|
||||
kvm_release_pfn_clean(pfn);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
@@ -580,8 +580,10 @@ static int pseries_eeh_get_state(struct eeh_pe *pe, int *delay)
|
||||
|
||||
switch(rets[0]) {
|
||||
case 0:
|
||||
result = EEH_STATE_MMIO_ACTIVE |
|
||||
EEH_STATE_DMA_ACTIVE;
|
||||
result = EEH_STATE_MMIO_ACTIVE |
|
||||
EEH_STATE_DMA_ACTIVE |
|
||||
EEH_STATE_MMIO_ENABLED |
|
||||
EEH_STATE_DMA_ENABLED;
|
||||
break;
|
||||
case 1:
|
||||
result = EEH_STATE_RESET_ACTIVE |
|
||||
|
||||
@@ -14,6 +14,7 @@
|
||||
#define EX_TYPE_UA_LOAD_REG 5
|
||||
#define EX_TYPE_UA_LOAD_REGPAIR 6
|
||||
#define EX_TYPE_ZEROPAD 7
|
||||
#define EX_TYPE_FPC 8
|
||||
|
||||
#define EX_DATA_REG_ERR_SHIFT 0
|
||||
#define EX_DATA_REG_ERR GENMASK(3, 0)
|
||||
@@ -84,4 +85,7 @@
|
||||
#define EX_TABLE_ZEROPAD(_fault, _target, _regdata, _regaddr) \
|
||||
__EX_TABLE(__ex_table, _fault, _target, EX_TYPE_ZEROPAD, _regdata, _regaddr, 0)
|
||||
|
||||
#define EX_TABLE_FPC(_fault, _target) \
|
||||
__EX_TABLE(__ex_table, _fault, _target, EX_TYPE_FPC, __stringify(%%r0), __stringify(%%r0), 0)
|
||||
|
||||
#endif /* __ASM_EXTABLE_H */
|
||||
|
||||
@@ -100,19 +100,12 @@ static __always_inline void fpu_lfpc(unsigned int *fpc)
|
||||
*/
|
||||
static inline void fpu_lfpc_safe(unsigned int *fpc)
|
||||
{
|
||||
u32 tmp;
|
||||
|
||||
instrument_read(fpc, sizeof(*fpc));
|
||||
asm volatile("\n"
|
||||
"0: lfpc %[fpc]\n"
|
||||
"1: nopr %%r7\n"
|
||||
".pushsection .fixup, \"ax\"\n"
|
||||
"2: lghi %[tmp],0\n"
|
||||
" sfpc %[tmp]\n"
|
||||
" jg 1b\n"
|
||||
".popsection\n"
|
||||
EX_TABLE(1b, 2b)
|
||||
: [tmp] "=d" (tmp)
|
||||
asm_inline volatile(
|
||||
" lfpc %[fpc]\n"
|
||||
"0: nopr %%r7\n"
|
||||
EX_TABLE_FPC(0b, 0b)
|
||||
:
|
||||
: [fpc] "Q" (*fpc)
|
||||
: "memory");
|
||||
}
|
||||
|
||||
@@ -44,7 +44,7 @@ static inline int arch_futex_atomic_op_inuser(int op, int oparg, int *oval,
|
||||
break;
|
||||
case FUTEX_OP_ANDN:
|
||||
__futex_atomic_op("lr %2,%1\nnr %2,%5\n",
|
||||
ret, oldval, newval, uaddr, oparg);
|
||||
ret, oldval, newval, uaddr, ~oparg);
|
||||
break;
|
||||
case FUTEX_OP_XOR:
|
||||
__futex_atomic_op("lr %2,%1\nxr %2,%5\n",
|
||||
|
||||
@@ -162,8 +162,7 @@ static __always_inline void __stackleak_poison(unsigned long erase_low,
|
||||
" la %[addr],256(%[addr])\n"
|
||||
" brctg %[tmp],0b\n"
|
||||
"1: stg %[poison],0(%[addr])\n"
|
||||
" larl %[tmp],3f\n"
|
||||
" ex %[count],0(%[tmp])\n"
|
||||
" exrl %[count],3f\n"
|
||||
" j 4f\n"
|
||||
"2: stg %[poison],0(%[addr])\n"
|
||||
" j 4f\n"
|
||||
|
||||
@@ -52,7 +52,6 @@ SECTIONS
|
||||
SOFTIRQENTRY_TEXT
|
||||
FTRACE_HOTPATCH_TRAMPOLINES_TEXT
|
||||
*(.text.*_indirect_*)
|
||||
*(.fixup)
|
||||
*(.gnu.warning)
|
||||
. = ALIGN(PAGE_SIZE);
|
||||
_etext = .; /* End of text section */
|
||||
|
||||
+19
-6
@@ -1362,8 +1362,14 @@ static struct vsie_page *get_vsie_page(struct kvm *kvm, unsigned long addr)
|
||||
page = radix_tree_lookup(&kvm->arch.vsie.addr_to_page, addr >> 9);
|
||||
rcu_read_unlock();
|
||||
if (page) {
|
||||
if (page_ref_inc_return(page) == 2)
|
||||
return page_to_virt(page);
|
||||
if (page_ref_inc_return(page) == 2) {
|
||||
if (page->index == addr)
|
||||
return page_to_virt(page);
|
||||
/*
|
||||
* We raced with someone reusing + putting this vsie
|
||||
* page before we grabbed it.
|
||||
*/
|
||||
}
|
||||
page_ref_dec(page);
|
||||
}
|
||||
|
||||
@@ -1393,15 +1399,20 @@ static struct vsie_page *get_vsie_page(struct kvm *kvm, unsigned long addr)
|
||||
kvm->arch.vsie.next++;
|
||||
kvm->arch.vsie.next %= nr_vcpus;
|
||||
}
|
||||
radix_tree_delete(&kvm->arch.vsie.addr_to_page, page->index >> 9);
|
||||
if (page->index != ULONG_MAX)
|
||||
radix_tree_delete(&kvm->arch.vsie.addr_to_page,
|
||||
page->index >> 9);
|
||||
}
|
||||
page->index = addr;
|
||||
/* double use of the same address */
|
||||
/* Mark it as invalid until it resides in the tree. */
|
||||
page->index = ULONG_MAX;
|
||||
|
||||
/* Double use of the same address or allocation failure. */
|
||||
if (radix_tree_insert(&kvm->arch.vsie.addr_to_page, addr >> 9, page)) {
|
||||
page_ref_dec(page);
|
||||
mutex_unlock(&kvm->arch.vsie.mutex);
|
||||
return NULL;
|
||||
}
|
||||
page->index = addr;
|
||||
mutex_unlock(&kvm->arch.vsie.mutex);
|
||||
|
||||
vsie_page = page_to_virt(page);
|
||||
@@ -1496,7 +1507,9 @@ void kvm_s390_vsie_destroy(struct kvm *kvm)
|
||||
vsie_page = page_to_virt(page);
|
||||
release_gmap_shadow(vsie_page);
|
||||
/* free the radix tree entry */
|
||||
radix_tree_delete(&kvm->arch.vsie.addr_to_page, page->index >> 9);
|
||||
if (page->index != ULONG_MAX)
|
||||
radix_tree_delete(&kvm->arch.vsie.addr_to_page,
|
||||
page->index >> 9);
|
||||
__free_page(page);
|
||||
}
|
||||
kvm->arch.vsie.page_count = 0;
|
||||
|
||||
@@ -77,6 +77,13 @@ static bool ex_handler_zeropad(const struct exception_table_entry *ex, struct pt
|
||||
return true;
|
||||
}
|
||||
|
||||
static bool ex_handler_fpc(const struct exception_table_entry *ex, struct pt_regs *regs)
|
||||
{
|
||||
asm volatile("sfpc %[val]\n" : : [val] "d" (0));
|
||||
regs->psw.addr = extable_fixup(ex);
|
||||
return true;
|
||||
}
|
||||
|
||||
bool fixup_exception(struct pt_regs *regs)
|
||||
{
|
||||
const struct exception_table_entry *ex;
|
||||
@@ -99,6 +106,8 @@ bool fixup_exception(struct pt_regs *regs)
|
||||
return ex_handler_ua_load_reg(ex, true, regs);
|
||||
case EX_TYPE_ZEROPAD:
|
||||
return ex_handler_zeropad(ex, regs);
|
||||
case EX_TYPE_FPC:
|
||||
return ex_handler_fpc(ex, regs);
|
||||
}
|
||||
panic("invalid exception table entry");
|
||||
}
|
||||
|
||||
@@ -171,7 +171,6 @@ void zpci_bus_scan_busses(void)
|
||||
static bool zpci_bus_is_multifunction_root(struct zpci_dev *zdev)
|
||||
{
|
||||
return !s390_pci_no_rid && zdev->rid_available &&
|
||||
zpci_is_device_configured(zdev) &&
|
||||
!zdev->vfn;
|
||||
}
|
||||
|
||||
|
||||
@@ -25,6 +25,7 @@ targets := vmlinux vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinux.bin.lzma \
|
||||
# avoid errors with '-march=i386', and future flags may depend on the target to
|
||||
# be valid.
|
||||
KBUILD_CFLAGS := -m$(BITS) -O2 $(CLANG_FLAGS)
|
||||
KBUILD_CFLAGS += -std=gnu11
|
||||
KBUILD_CFLAGS += -fno-strict-aliasing -fPIE
|
||||
KBUILD_CFLAGS += -Wundef
|
||||
KBUILD_CFLAGS += -DDISABLE_BRANCH_PROFILING
|
||||
|
||||
@@ -16,6 +16,7 @@
|
||||
# define PAGES_NR 4
|
||||
#endif
|
||||
|
||||
# define KEXEC_CONTROL_PAGE_SIZE 4096
|
||||
# define KEXEC_CONTROL_CODE_MAX_SIZE 2048
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
@@ -43,7 +44,6 @@ struct kimage;
|
||||
/* Maximum address we can use for the control code buffer */
|
||||
# define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE
|
||||
|
||||
# define KEXEC_CONTROL_PAGE_SIZE 4096
|
||||
|
||||
/* The native architecture */
|
||||
# define KEXEC_ARCH KEXEC_ARCH_386
|
||||
@@ -58,9 +58,6 @@ struct kimage;
|
||||
/* Maximum address we can use for the control pages */
|
||||
# define KEXEC_CONTROL_MEMORY_LIMIT (MAXMEM-1)
|
||||
|
||||
/* Allocate one page for the pdp and the second for the code */
|
||||
# define KEXEC_CONTROL_PAGE_SIZE (4096UL + 4096UL)
|
||||
|
||||
/* The native architecture */
|
||||
# define KEXEC_ARCH KEXEC_ARCH_X86_64
|
||||
#endif
|
||||
@@ -145,6 +142,19 @@ struct kimage_arch {
|
||||
};
|
||||
#else
|
||||
struct kimage_arch {
|
||||
/*
|
||||
* This is a kimage control page, as it must not overlap with either
|
||||
* source or destination address ranges.
|
||||
*/
|
||||
pgd_t *pgd;
|
||||
/*
|
||||
* The virtual mapping of the control code page itself is used only
|
||||
* during the transition, while the current kernel's pages are all
|
||||
* in place. Thus the intermediate page table pages used to map it
|
||||
* are not control pages, but instead just normal pages obtained
|
||||
* with get_zeroed_page(). And have to be tracked (below) so that
|
||||
* they can be freed.
|
||||
*/
|
||||
p4d_t *p4d;
|
||||
pud_t *pud;
|
||||
pmd_t *pmd;
|
||||
|
||||
@@ -27,6 +27,7 @@
|
||||
#include <linux/hyperv.h>
|
||||
#include <linux/kfifo.h>
|
||||
#include <linux/sched/vhost_task.h>
|
||||
#include <linux/call_once.h>
|
||||
|
||||
#include <asm/apic.h>
|
||||
#include <asm/pvclock-abi.h>
|
||||
@@ -1446,6 +1447,7 @@ struct kvm_arch {
|
||||
struct kvm_x86_pmu_event_filter __rcu *pmu_event_filter;
|
||||
struct vhost_task *nx_huge_page_recovery_thread;
|
||||
u64 nx_huge_page_last;
|
||||
struct once nx_once;
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
/* The number of TDP MMU pages across all roots. */
|
||||
|
||||
@@ -226,6 +226,28 @@ acpi_parse_x2apic(union acpi_subtable_headers *header, const unsigned long end)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int __init
|
||||
acpi_check_lapic(union acpi_subtable_headers *header, const unsigned long end)
|
||||
{
|
||||
struct acpi_madt_local_apic *processor = NULL;
|
||||
|
||||
processor = (struct acpi_madt_local_apic *)header;
|
||||
|
||||
if (BAD_MADT_ENTRY(processor, end))
|
||||
return -EINVAL;
|
||||
|
||||
/* Ignore invalid ID */
|
||||
if (processor->id == 0xff)
|
||||
return 0;
|
||||
|
||||
/* Ignore processors that can not be onlined */
|
||||
if (!acpi_is_processor_usable(processor->lapic_flags))
|
||||
return 0;
|
||||
|
||||
has_lapic_cpus = true;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int __init
|
||||
acpi_parse_lapic(union acpi_subtable_headers * header, const unsigned long end)
|
||||
{
|
||||
@@ -257,7 +279,6 @@ acpi_parse_lapic(union acpi_subtable_headers * header, const unsigned long end)
|
||||
processor->processor_id, /* ACPI ID */
|
||||
processor->lapic_flags & ACPI_MADT_ENABLED);
|
||||
|
||||
has_lapic_cpus = true;
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -1029,6 +1050,8 @@ static int __init early_acpi_parse_madt_lapic_addr_ovr(void)
|
||||
static int __init acpi_parse_madt_lapic_entries(void)
|
||||
{
|
||||
int count, x2count = 0;
|
||||
struct acpi_subtable_proc madt_proc[2];
|
||||
int ret;
|
||||
|
||||
if (!boot_cpu_has(X86_FEATURE_APIC))
|
||||
return -ENODEV;
|
||||
@@ -1037,10 +1060,27 @@ static int __init acpi_parse_madt_lapic_entries(void)
|
||||
acpi_parse_sapic, MAX_LOCAL_APIC);
|
||||
|
||||
if (!count) {
|
||||
count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC,
|
||||
acpi_parse_lapic, MAX_LOCAL_APIC);
|
||||
x2count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_X2APIC,
|
||||
acpi_parse_x2apic, MAX_LOCAL_APIC);
|
||||
/* Check if there are valid LAPIC entries */
|
||||
acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC, acpi_check_lapic, MAX_LOCAL_APIC);
|
||||
|
||||
/*
|
||||
* Enumerate the APIC IDs in the order that they appear in the
|
||||
* MADT, no matter LAPIC entry or x2APIC entry is used.
|
||||
*/
|
||||
memset(madt_proc, 0, sizeof(madt_proc));
|
||||
madt_proc[0].id = ACPI_MADT_TYPE_LOCAL_APIC;
|
||||
madt_proc[0].handler = acpi_parse_lapic;
|
||||
madt_proc[1].id = ACPI_MADT_TYPE_LOCAL_X2APIC;
|
||||
madt_proc[1].handler = acpi_parse_x2apic;
|
||||
ret = acpi_table_parse_entries_array(ACPI_SIG_MADT,
|
||||
sizeof(struct acpi_table_madt),
|
||||
madt_proc, ARRAY_SIZE(madt_proc), MAX_LOCAL_APIC);
|
||||
if (ret < 0) {
|
||||
pr_err("Error parsing LAPIC/X2APIC entries\n");
|
||||
return ret;
|
||||
}
|
||||
count = madt_proc[0].count;
|
||||
x2count = madt_proc[1].count;
|
||||
}
|
||||
if (!count && !x2count) {
|
||||
pr_err("No LAPIC entries present\n");
|
||||
|
||||
@@ -582,6 +582,10 @@ static __init void fix_erratum_688(void)
|
||||
|
||||
static __init int init_amd_nbs(void)
|
||||
{
|
||||
if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD &&
|
||||
boot_cpu_data.x86_vendor != X86_VENDOR_HYGON)
|
||||
return 0;
|
||||
|
||||
amd_cache_northbridges();
|
||||
amd_cache_gart();
|
||||
|
||||
|
||||
@@ -146,7 +146,8 @@ static void free_transition_pgtable(struct kimage *image)
|
||||
image->arch.pte = NULL;
|
||||
}
|
||||
|
||||
static int init_transition_pgtable(struct kimage *image, pgd_t *pgd)
|
||||
static int init_transition_pgtable(struct kimage *image, pgd_t *pgd,
|
||||
unsigned long control_page)
|
||||
{
|
||||
pgprot_t prot = PAGE_KERNEL_EXEC_NOENC;
|
||||
unsigned long vaddr, paddr;
|
||||
@@ -157,7 +158,7 @@ static int init_transition_pgtable(struct kimage *image, pgd_t *pgd)
|
||||
pte_t *pte;
|
||||
|
||||
vaddr = (unsigned long)relocate_kernel;
|
||||
paddr = __pa(page_address(image->control_code_page)+PAGE_SIZE);
|
||||
paddr = control_page;
|
||||
pgd += pgd_index(vaddr);
|
||||
if (!pgd_present(*pgd)) {
|
||||
p4d = (p4d_t *)get_zeroed_page(GFP_KERNEL);
|
||||
@@ -216,7 +217,7 @@ static void *alloc_pgt_page(void *data)
|
||||
return p;
|
||||
}
|
||||
|
||||
static int init_pgtable(struct kimage *image, unsigned long start_pgtable)
|
||||
static int init_pgtable(struct kimage *image, unsigned long control_page)
|
||||
{
|
||||
struct x86_mapping_info info = {
|
||||
.alloc_pgt_page = alloc_pgt_page,
|
||||
@@ -225,12 +226,12 @@ static int init_pgtable(struct kimage *image, unsigned long start_pgtable)
|
||||
.kernpg_flag = _KERNPG_TABLE_NOENC,
|
||||
};
|
||||
unsigned long mstart, mend;
|
||||
pgd_t *level4p;
|
||||
int result;
|
||||
int i;
|
||||
|
||||
level4p = (pgd_t *)__va(start_pgtable);
|
||||
clear_page(level4p);
|
||||
image->arch.pgd = alloc_pgt_page(image);
|
||||
if (!image->arch.pgd)
|
||||
return -ENOMEM;
|
||||
|
||||
if (cc_platform_has(CC_ATTR_GUEST_MEM_ENCRYPT)) {
|
||||
info.page_flag |= _PAGE_ENC;
|
||||
@@ -244,8 +245,8 @@ static int init_pgtable(struct kimage *image, unsigned long start_pgtable)
|
||||
mstart = pfn_mapped[i].start << PAGE_SHIFT;
|
||||
mend = pfn_mapped[i].end << PAGE_SHIFT;
|
||||
|
||||
result = kernel_ident_mapping_init(&info,
|
||||
level4p, mstart, mend);
|
||||
result = kernel_ident_mapping_init(&info, image->arch.pgd,
|
||||
mstart, mend);
|
||||
if (result)
|
||||
return result;
|
||||
}
|
||||
@@ -260,8 +261,8 @@ static int init_pgtable(struct kimage *image, unsigned long start_pgtable)
|
||||
mstart = image->segment[i].mem;
|
||||
mend = mstart + image->segment[i].memsz;
|
||||
|
||||
result = kernel_ident_mapping_init(&info,
|
||||
level4p, mstart, mend);
|
||||
result = kernel_ident_mapping_init(&info, image->arch.pgd,
|
||||
mstart, mend);
|
||||
|
||||
if (result)
|
||||
return result;
|
||||
@@ -271,15 +272,19 @@ static int init_pgtable(struct kimage *image, unsigned long start_pgtable)
|
||||
* Prepare EFI systab and ACPI tables for kexec kernel since they are
|
||||
* not covered by pfn_mapped.
|
||||
*/
|
||||
result = map_efi_systab(&info, level4p);
|
||||
result = map_efi_systab(&info, image->arch.pgd);
|
||||
if (result)
|
||||
return result;
|
||||
|
||||
result = map_acpi_tables(&info, level4p);
|
||||
result = map_acpi_tables(&info, image->arch.pgd);
|
||||
if (result)
|
||||
return result;
|
||||
|
||||
return init_transition_pgtable(image, level4p);
|
||||
/*
|
||||
* This must be last because the intermediate page table pages it
|
||||
* allocates will not be control pages and may overlap the image.
|
||||
*/
|
||||
return init_transition_pgtable(image, image->arch.pgd, control_page);
|
||||
}
|
||||
|
||||
static void load_segments(void)
|
||||
@@ -296,14 +301,14 @@ static void load_segments(void)
|
||||
|
||||
int machine_kexec_prepare(struct kimage *image)
|
||||
{
|
||||
unsigned long start_pgtable;
|
||||
unsigned long control_page;
|
||||
int result;
|
||||
|
||||
/* Calculate the offsets */
|
||||
start_pgtable = page_to_pfn(image->control_code_page) << PAGE_SHIFT;
|
||||
control_page = page_to_pfn(image->control_code_page) << PAGE_SHIFT;
|
||||
|
||||
/* Setup the identity mapped 64bit page table */
|
||||
result = init_pgtable(image, start_pgtable);
|
||||
result = init_pgtable(image, control_page);
|
||||
if (result)
|
||||
return result;
|
||||
|
||||
@@ -357,13 +362,12 @@ void machine_kexec(struct kimage *image)
|
||||
#endif
|
||||
}
|
||||
|
||||
control_page = page_address(image->control_code_page) + PAGE_SIZE;
|
||||
control_page = page_address(image->control_code_page);
|
||||
__memcpy(control_page, relocate_kernel, KEXEC_CONTROL_CODE_MAX_SIZE);
|
||||
|
||||
page_list[PA_CONTROL_PAGE] = virt_to_phys(control_page);
|
||||
page_list[VA_CONTROL_PAGE] = (unsigned long)control_page;
|
||||
page_list[PA_TABLE_PAGE] =
|
||||
(unsigned long)__pa(page_address(image->control_code_page));
|
||||
page_list[PA_TABLE_PAGE] = (unsigned long)__pa(image->arch.pgd);
|
||||
|
||||
if (image->type == KEXEC_TYPE_DEFAULT)
|
||||
page_list[PA_SWAP_PAGE] = (page_to_pfn(image->swap_page)
|
||||
@@ -573,8 +577,7 @@ static void kexec_mark_crashkres(bool protect)
|
||||
|
||||
/* Don't touch the control code page used in crash_kexec().*/
|
||||
control = PFN_PHYS(page_to_pfn(kexec_crash_image->control_code_page));
|
||||
/* Control code page is located in the 2nd page. */
|
||||
kexec_mark_range(crashk_res.start, control + PAGE_SIZE - 1, protect);
|
||||
kexec_mark_range(crashk_res.start, control - 1, protect);
|
||||
control += KEXEC_CONTROL_PAGE_SIZE;
|
||||
kexec_mark_range(control, crashk_res.end, protect);
|
||||
}
|
||||
|
||||
@@ -838,7 +838,7 @@ void __noreturn stop_this_cpu(void *dummy)
|
||||
#ifdef CONFIG_SMP
|
||||
if (smp_ops.stop_this_cpu) {
|
||||
smp_ops.stop_this_cpu();
|
||||
unreachable();
|
||||
BUG();
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
@@ -883,7 +883,7 @@ static int crash_nmi_callback(unsigned int val, struct pt_regs *regs)
|
||||
|
||||
if (smp_ops.stop_this_cpu) {
|
||||
smp_ops.stop_this_cpu();
|
||||
unreachable();
|
||||
BUG();
|
||||
}
|
||||
|
||||
/* Assume hlt works */
|
||||
|
||||
+36
-9
@@ -7227,6 +7227,19 @@ static void mmu_destroy_caches(void)
|
||||
kmem_cache_destroy(mmu_page_header_cache);
|
||||
}
|
||||
|
||||
static void kvm_wake_nx_recovery_thread(struct kvm *kvm)
|
||||
{
|
||||
/*
|
||||
* The NX recovery thread is spawned on-demand at the first KVM_RUN and
|
||||
* may not be valid even though the VM is globally visible. Do nothing,
|
||||
* as such a VM can't have any possible NX huge pages.
|
||||
*/
|
||||
struct vhost_task *nx_thread = READ_ONCE(kvm->arch.nx_huge_page_recovery_thread);
|
||||
|
||||
if (nx_thread)
|
||||
vhost_task_wake(nx_thread);
|
||||
}
|
||||
|
||||
static int get_nx_huge_pages(char *buffer, const struct kernel_param *kp)
|
||||
{
|
||||
if (nx_hugepage_mitigation_hard_disabled)
|
||||
@@ -7287,7 +7300,7 @@ static int set_nx_huge_pages(const char *val, const struct kernel_param *kp)
|
||||
kvm_mmu_zap_all_fast(kvm);
|
||||
mutex_unlock(&kvm->slots_lock);
|
||||
|
||||
vhost_task_wake(kvm->arch.nx_huge_page_recovery_thread);
|
||||
kvm_wake_nx_recovery_thread(kvm);
|
||||
}
|
||||
mutex_unlock(&kvm_lock);
|
||||
}
|
||||
@@ -7433,7 +7446,7 @@ static int set_nx_huge_pages_recovery_param(const char *val, const struct kernel
|
||||
mutex_lock(&kvm_lock);
|
||||
|
||||
list_for_each_entry(kvm, &vm_list, vm_list)
|
||||
vhost_task_wake(kvm->arch.nx_huge_page_recovery_thread);
|
||||
kvm_wake_nx_recovery_thread(kvm);
|
||||
|
||||
mutex_unlock(&kvm_lock);
|
||||
}
|
||||
@@ -7565,20 +7578,34 @@ static bool kvm_nx_huge_page_recovery_worker(void *data)
|
||||
return true;
|
||||
}
|
||||
|
||||
static void kvm_mmu_start_lpage_recovery(struct once *once)
|
||||
{
|
||||
struct kvm_arch *ka = container_of(once, struct kvm_arch, nx_once);
|
||||
struct kvm *kvm = container_of(ka, struct kvm, arch);
|
||||
struct vhost_task *nx_thread;
|
||||
|
||||
kvm->arch.nx_huge_page_last = get_jiffies_64();
|
||||
nx_thread = vhost_task_create(kvm_nx_huge_page_recovery_worker,
|
||||
kvm_nx_huge_page_recovery_worker_kill,
|
||||
kvm, "kvm-nx-lpage-recovery");
|
||||
|
||||
if (!nx_thread)
|
||||
return;
|
||||
|
||||
vhost_task_start(nx_thread);
|
||||
|
||||
/* Make the task visible only once it is fully started. */
|
||||
WRITE_ONCE(kvm->arch.nx_huge_page_recovery_thread, nx_thread);
|
||||
}
|
||||
|
||||
int kvm_mmu_post_init_vm(struct kvm *kvm)
|
||||
{
|
||||
if (nx_hugepage_mitigation_hard_disabled)
|
||||
return 0;
|
||||
|
||||
kvm->arch.nx_huge_page_last = get_jiffies_64();
|
||||
kvm->arch.nx_huge_page_recovery_thread = vhost_task_create(
|
||||
kvm_nx_huge_page_recovery_worker, kvm_nx_huge_page_recovery_worker_kill,
|
||||
kvm, "kvm-nx-lpage-recovery");
|
||||
|
||||
call_once(&kvm->arch.nx_once, kvm_mmu_start_lpage_recovery);
|
||||
if (!kvm->arch.nx_huge_page_recovery_thread)
|
||||
return -ENOMEM;
|
||||
|
||||
vhost_task_start(kvm->arch.nx_huge_page_recovery_thread);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
@@ -3833,7 +3833,7 @@ next_range:
|
||||
goto next_range;
|
||||
}
|
||||
|
||||
unreachable();
|
||||
BUG();
|
||||
}
|
||||
|
||||
static int __sev_snp_update_protected_guest_state(struct kvm_vcpu *vcpu)
|
||||
|
||||
+6
-1
@@ -11478,6 +11478,10 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
|
||||
struct kvm_run *kvm_run = vcpu->run;
|
||||
int r;
|
||||
|
||||
r = kvm_mmu_post_init_vm(vcpu->kvm);
|
||||
if (r)
|
||||
return r;
|
||||
|
||||
vcpu_load(vcpu);
|
||||
kvm_sigset_activate(vcpu);
|
||||
kvm_run->flags = 0;
|
||||
@@ -12751,7 +12755,8 @@ out:
|
||||
|
||||
int kvm_arch_post_init_vm(struct kvm *kvm)
|
||||
{
|
||||
return kvm_mmu_post_init_vm(kvm);
|
||||
once_init(&kvm->arch.nx_once);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
|
||||
|
||||
+1
-1
@@ -678,7 +678,7 @@ page_fault_oops(struct pt_regs *regs, unsigned long error_code,
|
||||
ASM_CALL_ARG3,
|
||||
, [arg1] "r" (regs), [arg2] "r" (address), [arg3] "r" (&info));
|
||||
|
||||
unreachable();
|
||||
BUG();
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
@@ -1010,4 +1010,34 @@ DECLARE_PCI_FIXUP_SUSPEND(PCI_VENDOR_ID_AMD, 0x1668, amd_rp_pme_suspend);
|
||||
DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_AMD, 0x1668, amd_rp_pme_resume);
|
||||
DECLARE_PCI_FIXUP_SUSPEND(PCI_VENDOR_ID_AMD, 0x1669, amd_rp_pme_suspend);
|
||||
DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_AMD, 0x1669, amd_rp_pme_resume);
|
||||
|
||||
/*
|
||||
* Putting PCIe root ports on Ryzen SoCs with USB4 controllers into D3hot
|
||||
* may cause problems when the system attempts wake up from s2idle.
|
||||
*
|
||||
* On the TUXEDO Sirius 16 Gen 1 with a specific old BIOS this manifests as
|
||||
* a system hang.
|
||||
*/
|
||||
static const struct dmi_system_id quirk_tuxeo_rp_d3_dmi_table[] = {
|
||||
{
|
||||
.matches = {
|
||||
DMI_EXACT_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
|
||||
DMI_EXACT_MATCH(DMI_BOARD_NAME, "APX958"),
|
||||
DMI_EXACT_MATCH(DMI_BIOS_VERSION, "V1.00A00_20240108"),
|
||||
},
|
||||
},
|
||||
{}
|
||||
};
|
||||
|
||||
static void quirk_tuxeo_rp_d3(struct pci_dev *pdev)
|
||||
{
|
||||
struct pci_dev *root_pdev;
|
||||
|
||||
if (dmi_check_system(quirk_tuxeo_rp_d3_dmi_table)) {
|
||||
root_pdev = pcie_find_root_port(pdev);
|
||||
if (root_pdev)
|
||||
root_pdev->dev_flags |= PCI_DEV_FLAGS_NO_D3;
|
||||
}
|
||||
}
|
||||
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x1502, quirk_tuxeo_rp_d3);
|
||||
#endif /* CONFIG_SUSPEND */
|
||||
|
||||
@@ -117,8 +117,8 @@ SYM_FUNC_START(xen_hypercall_hvm)
|
||||
pop %ebx
|
||||
pop %eax
|
||||
#else
|
||||
lea xen_hypercall_amd(%rip), %rbx
|
||||
cmp %rax, %rbx
|
||||
lea xen_hypercall_amd(%rip), %rcx
|
||||
cmp %rax, %rcx
|
||||
#ifdef CONFIG_FRAME_POINTER
|
||||
pop %rax /* Dummy pop. */
|
||||
#endif
|
||||
@@ -132,6 +132,7 @@ SYM_FUNC_START(xen_hypercall_hvm)
|
||||
pop %rcx
|
||||
pop %rax
|
||||
#endif
|
||||
FRAME_END
|
||||
/* Use correct hypercall function. */
|
||||
jz xen_hypercall_amd
|
||||
jmp xen_hypercall_intel
|
||||
|
||||
@@ -1138,6 +1138,7 @@ static void blkcg_fill_root_iostats(void)
|
||||
blkg_iostat_set(&blkg->iostat.cur, &tmp);
|
||||
u64_stats_update_end_irqrestore(&blkg->iostat.sync, flags);
|
||||
}
|
||||
class_dev_iter_exit(&iter);
|
||||
}
|
||||
|
||||
static void blkcg_print_one_stat(struct blkcg_gq *blkg, struct seq_file *s)
|
||||
|
||||
+3
-2
@@ -758,11 +758,12 @@ static ssize_t blkdev_read_iter(struct kiocb *iocb, struct iov_iter *to)
|
||||
file_accessed(iocb->ki_filp);
|
||||
|
||||
ret = blkdev_direct_IO(iocb, to);
|
||||
if (ret >= 0) {
|
||||
if (ret > 0) {
|
||||
iocb->ki_pos += ret;
|
||||
count -= ret;
|
||||
}
|
||||
iov_iter_revert(to, count - iov_iter_count(to));
|
||||
if (ret != -EIOCBQUEUED)
|
||||
iov_iter_revert(to, count - iov_iter_count(to));
|
||||
if (ret < 0 || !count)
|
||||
goto reexpand;
|
||||
}
|
||||
|
||||
@@ -73,8 +73,8 @@ static int ivpu_resume(struct ivpu_device *vdev)
|
||||
int ret;
|
||||
|
||||
retry:
|
||||
pci_restore_state(to_pci_dev(vdev->drm.dev));
|
||||
pci_set_power_state(to_pci_dev(vdev->drm.dev), PCI_D0);
|
||||
pci_restore_state(to_pci_dev(vdev->drm.dev));
|
||||
|
||||
ret = ivpu_hw_power_up(vdev);
|
||||
if (ret) {
|
||||
@@ -295,7 +295,10 @@ int ivpu_rpm_get(struct ivpu_device *vdev)
|
||||
int ret;
|
||||
|
||||
ret = pm_runtime_resume_and_get(vdev->drm.dev);
|
||||
drm_WARN_ON(&vdev->drm, ret < 0);
|
||||
if (ret < 0) {
|
||||
ivpu_err(vdev, "Failed to resume NPU: %d\n", ret);
|
||||
pm_runtime_set_suspended(vdev->drm.dev);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
@@ -173,8 +173,6 @@ static struct gen_pool *ghes_estatus_pool;
|
||||
static struct ghes_estatus_cache __rcu *ghes_estatus_caches[GHES_ESTATUS_CACHES_SIZE];
|
||||
static atomic_t ghes_estatus_cache_alloced;
|
||||
|
||||
static int ghes_panic_timeout __read_mostly = 30;
|
||||
|
||||
static void __iomem *ghes_map(u64 pfn, enum fixed_addresses fixmap_idx)
|
||||
{
|
||||
phys_addr_t paddr;
|
||||
@@ -983,14 +981,16 @@ static void __ghes_panic(struct ghes *ghes,
|
||||
struct acpi_hest_generic_status *estatus,
|
||||
u64 buf_paddr, enum fixed_addresses fixmap_idx)
|
||||
{
|
||||
const char *msg = GHES_PFX "Fatal hardware error";
|
||||
|
||||
__ghes_print_estatus(KERN_EMERG, ghes->generic, estatus);
|
||||
|
||||
ghes_clear_estatus(ghes, estatus, buf_paddr, fixmap_idx);
|
||||
|
||||
/* reboot to log the error! */
|
||||
if (!panic_timeout)
|
||||
panic_timeout = ghes_panic_timeout;
|
||||
panic("Fatal hardware error!");
|
||||
pr_emerg("%s but panic disabled\n", msg);
|
||||
|
||||
panic(msg);
|
||||
}
|
||||
|
||||
static int ghes_proc(struct ghes *ghes)
|
||||
|
||||
+1
-3
@@ -287,9 +287,7 @@ static acpi_status acpi_platformrt_space_handler(u32 function,
|
||||
if (!handler || !module)
|
||||
goto invalid_guid;
|
||||
|
||||
if (!handler->handler_addr ||
|
||||
!handler->static_data_buffer_addr ||
|
||||
!handler->acpi_param_buffer_addr) {
|
||||
if (!handler->handler_addr) {
|
||||
buffer->prm_status = PRM_HANDLER_ERROR;
|
||||
return AE_OK;
|
||||
}
|
||||
|
||||
@@ -1187,8 +1187,6 @@ static int acpi_data_prop_read(const struct acpi_device_data *data,
|
||||
}
|
||||
break;
|
||||
}
|
||||
if (nval == 0)
|
||||
return -EINVAL;
|
||||
|
||||
if (obj->type == ACPI_TYPE_BUFFER) {
|
||||
if (proptype != DEV_PROP_U8)
|
||||
@@ -1212,9 +1210,11 @@ static int acpi_data_prop_read(const struct acpi_device_data *data,
|
||||
ret = acpi_copy_property_array_uint(items, (u64 *)val, nval);
|
||||
break;
|
||||
case DEV_PROP_STRING:
|
||||
ret = acpi_copy_property_array_string(
|
||||
items, (char **)val,
|
||||
min_t(u32, nval, obj->package.count));
|
||||
nval = min_t(u32, nval, obj->package.count);
|
||||
if (nval == 0)
|
||||
return -ENODATA;
|
||||
|
||||
ret = acpi_copy_property_array_string(items, (char **)val, nval);
|
||||
break;
|
||||
default:
|
||||
ret = -EINVAL;
|
||||
|
||||
@@ -601,7 +601,7 @@ static void ata_pio_sector(struct ata_queued_cmd *qc)
|
||||
{
|
||||
struct ata_port *ap = qc->ap;
|
||||
struct page *page;
|
||||
unsigned int offset;
|
||||
unsigned int offset, count;
|
||||
|
||||
if (!qc->cursg) {
|
||||
qc->curbytes = qc->nbytes;
|
||||
@@ -617,25 +617,27 @@ static void ata_pio_sector(struct ata_queued_cmd *qc)
|
||||
page = nth_page(page, (offset >> PAGE_SHIFT));
|
||||
offset %= PAGE_SIZE;
|
||||
|
||||
trace_ata_sff_pio_transfer_data(qc, offset, qc->sect_size);
|
||||
/* don't overrun current sg */
|
||||
count = min(qc->cursg->length - qc->cursg_ofs, qc->sect_size);
|
||||
|
||||
trace_ata_sff_pio_transfer_data(qc, offset, count);
|
||||
|
||||
/*
|
||||
* Split the transfer when it splits a page boundary. Note that the
|
||||
* split still has to be dword aligned like all ATA data transfers.
|
||||
*/
|
||||
WARN_ON_ONCE(offset % 4);
|
||||
if (offset + qc->sect_size > PAGE_SIZE) {
|
||||
if (offset + count > PAGE_SIZE) {
|
||||
unsigned int split_len = PAGE_SIZE - offset;
|
||||
|
||||
ata_pio_xfer(qc, page, offset, split_len);
|
||||
ata_pio_xfer(qc, nth_page(page, 1), 0,
|
||||
qc->sect_size - split_len);
|
||||
ata_pio_xfer(qc, nth_page(page, 1), 0, count - split_len);
|
||||
} else {
|
||||
ata_pio_xfer(qc, page, offset, qc->sect_size);
|
||||
ata_pio_xfer(qc, page, offset, count);
|
||||
}
|
||||
|
||||
qc->curbytes += qc->sect_size;
|
||||
qc->cursg_ofs += qc->sect_size;
|
||||
qc->curbytes += count;
|
||||
qc->cursg_ofs += count;
|
||||
|
||||
if (qc->cursg_ofs == qc->cursg->length) {
|
||||
qc->cursg = sg_next(qc->cursg);
|
||||
|
||||
@@ -604,6 +604,8 @@ static const struct usb_device_id quirks_table[] = {
|
||||
/* MediaTek MT7922 Bluetooth devices */
|
||||
{ USB_DEVICE(0x13d3, 0x3585), .driver_info = BTUSB_MEDIATEK |
|
||||
BTUSB_WIDEBAND_SPEECH },
|
||||
{ USB_DEVICE(0x13d3, 0x3610), .driver_info = BTUSB_MEDIATEK |
|
||||
BTUSB_WIDEBAND_SPEECH },
|
||||
|
||||
/* MediaTek MT7922A Bluetooth devices */
|
||||
{ USB_DEVICE(0x0489, 0xe0d8), .driver_info = BTUSB_MEDIATEK |
|
||||
@@ -668,6 +670,8 @@ static const struct usb_device_id quirks_table[] = {
|
||||
BTUSB_WIDEBAND_SPEECH },
|
||||
{ USB_DEVICE(0x13d3, 0x3608), .driver_info = BTUSB_MEDIATEK |
|
||||
BTUSB_WIDEBAND_SPEECH },
|
||||
{ USB_DEVICE(0x13d3, 0x3628), .driver_info = BTUSB_MEDIATEK |
|
||||
BTUSB_WIDEBAND_SPEECH },
|
||||
|
||||
/* Additional Realtek 8723AE Bluetooth devices */
|
||||
{ USB_DEVICE(0x0930, 0x021d), .driver_info = BTUSB_REALTEK },
|
||||
|
||||
+29
-8
@@ -63,16 +63,30 @@ static DEFINE_MUTEX(misc_mtx);
|
||||
#define DYNAMIC_MINORS 128 /* like dynamic majors */
|
||||
static DEFINE_IDA(misc_minors_ida);
|
||||
|
||||
static int misc_minor_alloc(void)
|
||||
static int misc_minor_alloc(int minor)
|
||||
{
|
||||
int ret;
|
||||
int ret = 0;
|
||||
|
||||
ret = ida_alloc_max(&misc_minors_ida, DYNAMIC_MINORS - 1, GFP_KERNEL);
|
||||
if (ret >= 0) {
|
||||
ret = DYNAMIC_MINORS - ret - 1;
|
||||
if (minor == MISC_DYNAMIC_MINOR) {
|
||||
/* allocate free id */
|
||||
ret = ida_alloc_max(&misc_minors_ida, DYNAMIC_MINORS - 1, GFP_KERNEL);
|
||||
if (ret >= 0) {
|
||||
ret = DYNAMIC_MINORS - ret - 1;
|
||||
} else {
|
||||
ret = ida_alloc_range(&misc_minors_ida, MISC_DYNAMIC_MINOR + 1,
|
||||
MINORMASK, GFP_KERNEL);
|
||||
}
|
||||
} else {
|
||||
ret = ida_alloc_range(&misc_minors_ida, MISC_DYNAMIC_MINOR + 1,
|
||||
MINORMASK, GFP_KERNEL);
|
||||
/* specific minor, check if it is in dynamic or misc dynamic range */
|
||||
if (minor < DYNAMIC_MINORS) {
|
||||
minor = DYNAMIC_MINORS - minor - 1;
|
||||
ret = ida_alloc_range(&misc_minors_ida, minor, minor, GFP_KERNEL);
|
||||
} else if (minor > MISC_DYNAMIC_MINOR) {
|
||||
ret = ida_alloc_range(&misc_minors_ida, minor, minor, GFP_KERNEL);
|
||||
} else {
|
||||
/* case of non-dynamic minors, no need to allocate id */
|
||||
ret = 0;
|
||||
}
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
@@ -219,7 +233,7 @@ int misc_register(struct miscdevice *misc)
|
||||
mutex_lock(&misc_mtx);
|
||||
|
||||
if (is_dynamic) {
|
||||
int i = misc_minor_alloc();
|
||||
int i = misc_minor_alloc(misc->minor);
|
||||
|
||||
if (i < 0) {
|
||||
err = -EBUSY;
|
||||
@@ -228,6 +242,7 @@ int misc_register(struct miscdevice *misc)
|
||||
misc->minor = i;
|
||||
} else {
|
||||
struct miscdevice *c;
|
||||
int i;
|
||||
|
||||
list_for_each_entry(c, &misc_list, list) {
|
||||
if (c->minor == misc->minor) {
|
||||
@@ -235,6 +250,12 @@ int misc_register(struct miscdevice *misc)
|
||||
goto out;
|
||||
}
|
||||
}
|
||||
|
||||
i = misc_minor_alloc(misc->minor);
|
||||
if (i < 0) {
|
||||
err = -EBUSY;
|
||||
goto out;
|
||||
}
|
||||
}
|
||||
|
||||
dev = MKDEV(MISC_MAJOR, misc->minor);
|
||||
|
||||
@@ -63,6 +63,11 @@ static bool tpm_is_tpm2_log(void *bios_event_log, u64 len)
|
||||
return n == 0;
|
||||
}
|
||||
|
||||
static void tpm_bios_log_free(void *data)
|
||||
{
|
||||
kvfree(data);
|
||||
}
|
||||
|
||||
/* read binary bios log */
|
||||
int tpm_read_log_acpi(struct tpm_chip *chip)
|
||||
{
|
||||
@@ -136,7 +141,7 @@ int tpm_read_log_acpi(struct tpm_chip *chip)
|
||||
}
|
||||
|
||||
/* malloc EventLog space */
|
||||
log->bios_event_log = devm_kmalloc(&chip->dev, len, GFP_KERNEL);
|
||||
log->bios_event_log = kvmalloc(len, GFP_KERNEL);
|
||||
if (!log->bios_event_log)
|
||||
return -ENOMEM;
|
||||
|
||||
@@ -161,10 +166,16 @@ int tpm_read_log_acpi(struct tpm_chip *chip)
|
||||
goto err;
|
||||
}
|
||||
|
||||
ret = devm_add_action(&chip->dev, tpm_bios_log_free, log->bios_event_log);
|
||||
if (ret) {
|
||||
log->bios_event_log = NULL;
|
||||
goto err;
|
||||
}
|
||||
|
||||
return format;
|
||||
|
||||
err:
|
||||
devm_kfree(&chip->dev, log->bios_event_log);
|
||||
tpm_bios_log_free(log->bios_event_log);
|
||||
log->bios_event_log = NULL;
|
||||
return ret;
|
||||
}
|
||||
|
||||
@@ -294,7 +294,7 @@ static int loongson2_clk_probe(struct platform_device *pdev)
|
||||
return -EINVAL;
|
||||
|
||||
for (p = data; p->name; p++)
|
||||
clks_num++;
|
||||
clks_num = max(clks_num, p->id + 1);
|
||||
|
||||
clp = devm_kzalloc(dev, struct_size(clp, clk_data.hws, clks_num),
|
||||
GFP_KERNEL);
|
||||
@@ -309,6 +309,9 @@ static int loongson2_clk_probe(struct platform_device *pdev)
|
||||
clp->clk_data.num = clks_num;
|
||||
clp->dev = dev;
|
||||
|
||||
/* Avoid returning NULL for unused id */
|
||||
memset_p((void **)clp->clk_data.hws, ERR_PTR(-ENOENT), clks_num);
|
||||
|
||||
for (i = 0; i < clks_num; i++) {
|
||||
p = &data[i];
|
||||
switch (p->type) {
|
||||
|
||||
@@ -55,10 +55,16 @@ static const struct mtk_gate audio_clks[] = {
|
||||
GATE_DUMMY(CLK_DUMMY, "aud_dummy"),
|
||||
/* AUDIO0 */
|
||||
GATE_AUDIO0(CLK_AUD_AFE, "audio_afe", "aud_intbus_sel", 2),
|
||||
GATE_DUMMY(CLK_AUD_LRCK_DETECT, "audio_lrck_detect_dummy"),
|
||||
GATE_DUMMY(CLK_AUD_I2S, "audio_i2c_dummy"),
|
||||
GATE_DUMMY(CLK_AUD_APLL_TUNER, "audio_apll_tuner_dummy"),
|
||||
GATE_AUDIO0(CLK_AUD_HDMI, "audio_hdmi", "audpll_sel", 20),
|
||||
GATE_AUDIO0(CLK_AUD_SPDF, "audio_spdf", "audpll_sel", 21),
|
||||
GATE_AUDIO0(CLK_AUD_SPDF2, "audio_spdf2", "audpll_sel", 22),
|
||||
GATE_AUDIO0(CLK_AUD_APLL, "audio_apll", "audpll_sel", 23),
|
||||
GATE_DUMMY(CLK_AUD_TML, "audio_tml_dummy"),
|
||||
GATE_DUMMY(CLK_AUD_AHB_IDLE_EXT, "audio_ahb_idle_ext_dummy"),
|
||||
GATE_DUMMY(CLK_AUD_AHB_IDLE_INT, "audio_ahb_idle_int_dummy"),
|
||||
/* AUDIO1 */
|
||||
GATE_AUDIO1(CLK_AUD_I2SIN1, "audio_i2sin1", "aud_mux1_sel", 0),
|
||||
GATE_AUDIO1(CLK_AUD_I2SIN2, "audio_i2sin2", "aud_mux1_sel", 1),
|
||||
@@ -76,10 +82,12 @@ static const struct mtk_gate audio_clks[] = {
|
||||
GATE_AUDIO1(CLK_AUD_ASRCI2, "audio_asrci2", "asm_h_sel", 13),
|
||||
GATE_AUDIO1(CLK_AUD_ASRCO1, "audio_asrco1", "asm_h_sel", 14),
|
||||
GATE_AUDIO1(CLK_AUD_ASRCO2, "audio_asrco2", "asm_h_sel", 15),
|
||||
GATE_DUMMY(CLK_AUD_HDMIRX, "audio_hdmirx_dummy"),
|
||||
GATE_AUDIO1(CLK_AUD_INTDIR, "audio_intdir", "intdir_sel", 20),
|
||||
GATE_AUDIO1(CLK_AUD_A1SYS, "audio_a1sys", "aud_mux1_sel", 21),
|
||||
GATE_AUDIO1(CLK_AUD_A2SYS, "audio_a2sys", "aud_mux2_sel", 22),
|
||||
GATE_AUDIO1(CLK_AUD_AFE_CONN, "audio_afe_conn", "aud_mux1_sel", 23),
|
||||
GATE_DUMMY(CLK_AUD_AFE_PCMIF, "audio_afe_pcmif_dummy"),
|
||||
GATE_AUDIO1(CLK_AUD_AFE_MRGIF, "audio_afe_mrgif", "aud_mux1_sel", 25),
|
||||
/* AUDIO2 */
|
||||
GATE_AUDIO2(CLK_AUD_MMIF_UL1, "audio_ul1", "aud_mux1_sel", 0),
|
||||
@@ -100,6 +108,8 @@ static const struct mtk_gate audio_clks[] = {
|
||||
GATE_AUDIO2(CLK_AUD_MMIF_AWB2, "audio_awb2", "aud_mux1_sel", 15),
|
||||
GATE_AUDIO2(CLK_AUD_MMIF_DAI, "audio_dai", "aud_mux1_sel", 16),
|
||||
/* AUDIO3 */
|
||||
GATE_DUMMY(CLK_AUD_DMIC1, "audio_dmic1_dummy"),
|
||||
GATE_DUMMY(CLK_AUD_DMIC2, "audio_dmic2_dummy"),
|
||||
GATE_AUDIO3(CLK_AUD_ASRCI3, "audio_asrci3", "asm_h_sel", 2),
|
||||
GATE_AUDIO3(CLK_AUD_ASRCI4, "audio_asrci4", "asm_h_sel", 3),
|
||||
GATE_AUDIO3(CLK_AUD_ASRCI5, "audio_asrci5", "asm_h_sel", 4),
|
||||
|
||||
@@ -31,6 +31,7 @@ static const struct mtk_gate_regs bdp1_cg_regs = {
|
||||
GATE_MTK(_id, _name, _parent, &bdp1_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
|
||||
|
||||
static const struct mtk_gate bdp_clks[] = {
|
||||
GATE_DUMMY(CLK_DUMMY, "bdp_dummy"),
|
||||
GATE_BDP0(CLK_BDP_BRG_BA, "brg_baclk", "mm_sel", 0),
|
||||
GATE_BDP0(CLK_BDP_BRG_DRAM, "brg_dram", "mm_sel", 1),
|
||||
GATE_BDP0(CLK_BDP_LARB_DRAM, "larb_dram", "mm_sel", 2),
|
||||
|
||||
@@ -22,6 +22,7 @@ static const struct mtk_gate_regs img_cg_regs = {
|
||||
GATE_MTK(_id, _name, _parent, &img_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
|
||||
|
||||
static const struct mtk_gate img_clks[] = {
|
||||
GATE_DUMMY(CLK_DUMMY, "img_dummy"),
|
||||
GATE_IMG(CLK_IMG_SMI_COMM, "img_smi_comm", "mm_sel", 0),
|
||||
GATE_IMG(CLK_IMG_RESZ, "img_resz", "mm_sel", 1),
|
||||
GATE_IMG(CLK_IMG_JPGDEC_SMI, "img_jpgdec_smi", "mm_sel", 5),
|
||||
|
||||
@@ -31,6 +31,7 @@ static const struct mtk_gate_regs disp1_cg_regs = {
|
||||
GATE_MTK(_id, _name, _parent, &disp1_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
|
||||
|
||||
static const struct mtk_gate mm_clks[] = {
|
||||
GATE_DUMMY(CLK_DUMMY, "mm_dummy"),
|
||||
GATE_DISP0(CLK_MM_SMI_COMMON, "mm_smi_comm", "mm_sel", 0),
|
||||
GATE_DISP0(CLK_MM_SMI_LARB0, "mm_smi_larb0", "mm_sel", 1),
|
||||
GATE_DISP0(CLK_MM_CMDQ, "mm_cmdq", "mm_sel", 2),
|
||||
|
||||
@@ -31,6 +31,7 @@ static const struct mtk_gate_regs vdec1_cg_regs = {
|
||||
GATE_MTK(_id, _name, _parent, &vdec1_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
|
||||
|
||||
static const struct mtk_gate vdec_clks[] = {
|
||||
GATE_DUMMY(CLK_DUMMY, "vdec_dummy"),
|
||||
GATE_VDEC0(CLK_VDEC_CKGEN, "vdec_cken", "vdec_sel", 0),
|
||||
GATE_VDEC1(CLK_VDEC_LARB, "vdec_larb_cken", "mm_sel", 0),
|
||||
};
|
||||
|
||||
@@ -106,10 +106,10 @@ struct generic_pm_domain *mmp_pm_domain_register(const char *name,
|
||||
pm_domain->flags = flags;
|
||||
pm_domain->lock = lock;
|
||||
|
||||
pm_genpd_init(&pm_domain->genpd, NULL, true);
|
||||
pm_domain->genpd.name = name;
|
||||
pm_domain->genpd.power_on = mmp_pm_domain_power_on;
|
||||
pm_domain->genpd.power_off = mmp_pm_domain_power_off;
|
||||
pm_genpd_init(&pm_domain->genpd, NULL, true);
|
||||
|
||||
return &pm_domain->genpd;
|
||||
}
|
||||
|
||||
@@ -1022,6 +1022,7 @@ config SM_GCC_7150
|
||||
config SM_GCC_8150
|
||||
tristate "SM8150 Global Clock Controller"
|
||||
depends on ARM64 || COMPILE_TEST
|
||||
select QCOM_GDSC
|
||||
help
|
||||
Support for the global clock controller on SM8150 devices.
|
||||
Say Y if you want to use peripheral devices such as UART,
|
||||
|
||||
@@ -432,6 +432,8 @@ void clk_alpha_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
|
||||
mask |= config->pre_div_mask;
|
||||
mask |= config->post_div_mask;
|
||||
mask |= config->vco_mask;
|
||||
mask |= config->alpha_en_mask;
|
||||
mask |= config->alpha_mode_mask;
|
||||
|
||||
regmap_update_bits(regmap, PLL_USER_CTL(pll), mask, val);
|
||||
|
||||
|
||||
@@ -329,7 +329,7 @@ static unsigned long clk_rpmh_bcm_recalc_rate(struct clk_hw *hw,
|
||||
{
|
||||
struct clk_rpmh *c = to_clk_rpmh(hw);
|
||||
|
||||
return c->aggr_state * c->unit;
|
||||
return (unsigned long)c->aggr_state * c->unit;
|
||||
}
|
||||
|
||||
static const struct clk_ops clk_rpmh_bcm_ops = {
|
||||
|
||||
@@ -187,13 +187,12 @@ static struct clk_rcg2 disp_cc_mdss_dp_aux_clk_src = {
|
||||
.cmd_rcgr = 0x1144,
|
||||
.mnd_width = 0,
|
||||
.hid_width = 5,
|
||||
.parent_map = disp_cc_parent_map_6,
|
||||
.freq_tbl = ftbl_disp_cc_mdss_dp_aux_clk_src,
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "disp_cc_mdss_dp_aux_clk_src",
|
||||
.parent_data = &(const struct clk_parent_data){
|
||||
.fw_name = "bi_tcxo",
|
||||
},
|
||||
.num_parents = 1,
|
||||
.parent_data = disp_cc_parent_data_6,
|
||||
.num_parents = ARRAY_SIZE(disp_cc_parent_data_6),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
|
||||
@@ -535,7 +535,7 @@ static struct clk_rcg2 blsp1_uart5_apps_clk_src = {
|
||||
};
|
||||
|
||||
static struct clk_rcg2 blsp1_uart6_apps_clk_src = {
|
||||
.cmd_rcgr = 0x6044,
|
||||
.cmd_rcgr = 0x7044,
|
||||
.mnd_width = 16,
|
||||
.hid_width = 5,
|
||||
.parent_map = gcc_xo_gpll0_map,
|
||||
|
||||
@@ -182,6 +182,14 @@ static const struct clk_parent_data gcc_parent_data_2_ao[] = {
|
||||
{ .hw = &gpll0_out_odd.clkr.hw },
|
||||
};
|
||||
|
||||
static const struct parent_map gcc_parent_map_3[] = {
|
||||
{ P_BI_TCXO, 0 },
|
||||
};
|
||||
|
||||
static const struct clk_parent_data gcc_parent_data_3[] = {
|
||||
{ .fw_name = "bi_tcxo" },
|
||||
};
|
||||
|
||||
static const struct parent_map gcc_parent_map_4[] = {
|
||||
{ P_BI_TCXO, 0 },
|
||||
{ P_GPLL0_OUT_MAIN, 1 },
|
||||
@@ -701,13 +709,12 @@ static struct clk_rcg2 gcc_ufs_phy_phy_aux_clk_src = {
|
||||
.cmd_rcgr = 0x3a0b0,
|
||||
.mnd_width = 0,
|
||||
.hid_width = 5,
|
||||
.parent_map = gcc_parent_map_3,
|
||||
.freq_tbl = ftbl_gcc_ufs_phy_phy_aux_clk_src,
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_ufs_phy_phy_aux_clk_src",
|
||||
.parent_data = &(const struct clk_parent_data){
|
||||
.fw_name = "bi_tcxo",
|
||||
},
|
||||
.num_parents = 1,
|
||||
.parent_data = gcc_parent_data_3,
|
||||
.num_parents = ARRAY_SIZE(gcc_parent_data_3),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
@@ -764,13 +771,12 @@ static struct clk_rcg2 gcc_usb30_prim_mock_utmi_clk_src = {
|
||||
.cmd_rcgr = 0x1a034,
|
||||
.mnd_width = 0,
|
||||
.hid_width = 5,
|
||||
.parent_map = gcc_parent_map_3,
|
||||
.freq_tbl = ftbl_gcc_usb30_prim_mock_utmi_clk_src,
|
||||
.clkr.hw.init = &(struct clk_init_data){
|
||||
.name = "gcc_usb30_prim_mock_utmi_clk_src",
|
||||
.parent_data = &(const struct clk_parent_data){
|
||||
.fw_name = "bi_tcxo",
|
||||
},
|
||||
.num_parents = 1,
|
||||
.parent_data = gcc_parent_data_3,
|
||||
.num_parents = ARRAY_SIZE(gcc_parent_data_3),
|
||||
.ops = &clk_rcg2_ops,
|
||||
},
|
||||
};
|
||||
|
||||
@@ -3003,7 +3003,7 @@ static struct gdsc pcie_0_gdsc = {
|
||||
.pd = {
|
||||
.name = "pcie_0_gdsc",
|
||||
},
|
||||
.pwrsts = PWRSTS_OFF_ON,
|
||||
.pwrsts = PWRSTS_RET_ON,
|
||||
.flags = VOTABLE | POLL_CFG_GDSCR | RETAIN_FF_ENABLE,
|
||||
};
|
||||
|
||||
@@ -3014,7 +3014,7 @@ static struct gdsc pcie_0_phy_gdsc = {
|
||||
.pd = {
|
||||
.name = "pcie_0_phy_gdsc",
|
||||
},
|
||||
.pwrsts = PWRSTS_OFF_ON,
|
||||
.pwrsts = PWRSTS_RET_ON,
|
||||
.flags = VOTABLE | POLL_CFG_GDSCR | RETAIN_FF_ENABLE,
|
||||
};
|
||||
|
||||
@@ -3025,7 +3025,7 @@ static struct gdsc pcie_1_gdsc = {
|
||||
.pd = {
|
||||
.name = "pcie_1_gdsc",
|
||||
},
|
||||
.pwrsts = PWRSTS_OFF_ON,
|
||||
.pwrsts = PWRSTS_RET_ON,
|
||||
.flags = VOTABLE | POLL_CFG_GDSCR | RETAIN_FF_ENABLE,
|
||||
};
|
||||
|
||||
@@ -3036,7 +3036,7 @@ static struct gdsc pcie_1_phy_gdsc = {
|
||||
.pd = {
|
||||
.name = "pcie_1_phy_gdsc",
|
||||
},
|
||||
.pwrsts = PWRSTS_OFF_ON,
|
||||
.pwrsts = PWRSTS_RET_ON,
|
||||
.flags = VOTABLE | POLL_CFG_GDSCR | RETAIN_FF_ENABLE,
|
||||
};
|
||||
|
||||
|
||||
@@ -3437,7 +3437,7 @@ static struct gdsc pcie_0_gdsc = {
|
||||
.pd = {
|
||||
.name = "pcie_0_gdsc",
|
||||
},
|
||||
.pwrsts = PWRSTS_OFF_ON,
|
||||
.pwrsts = PWRSTS_RET_ON,
|
||||
.flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE | VOTABLE,
|
||||
};
|
||||
|
||||
@@ -3448,7 +3448,7 @@ static struct gdsc pcie_0_phy_gdsc = {
|
||||
.pd = {
|
||||
.name = "pcie_0_phy_gdsc",
|
||||
},
|
||||
.pwrsts = PWRSTS_OFF_ON,
|
||||
.pwrsts = PWRSTS_RET_ON,
|
||||
.flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE | VOTABLE,
|
||||
};
|
||||
|
||||
@@ -3459,7 +3459,7 @@ static struct gdsc pcie_1_gdsc = {
|
||||
.pd = {
|
||||
.name = "pcie_1_gdsc",
|
||||
},
|
||||
.pwrsts = PWRSTS_OFF_ON,
|
||||
.pwrsts = PWRSTS_RET_ON,
|
||||
.flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE | VOTABLE,
|
||||
};
|
||||
|
||||
@@ -3470,7 +3470,7 @@ static struct gdsc pcie_1_phy_gdsc = {
|
||||
.pd = {
|
||||
.name = "pcie_1_phy_gdsc",
|
||||
},
|
||||
.pwrsts = PWRSTS_OFF_ON,
|
||||
.pwrsts = PWRSTS_RET_ON,
|
||||
.flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE | VOTABLE,
|
||||
};
|
||||
|
||||
|
||||
@@ -436,7 +436,7 @@ static SUNXI_CCU_MP_WITH_MUX_GATE_POSTDIV(mmc0_clk, "mmc0", mmc_parents, 0x830,
|
||||
24, 2, /* mux */
|
||||
BIT(31), /* gate */
|
||||
2, /* post-div */
|
||||
CLK_SET_RATE_NO_REPARENT);
|
||||
0);
|
||||
|
||||
static SUNXI_CCU_MP_WITH_MUX_GATE_POSTDIV(mmc1_clk, "mmc1", mmc_parents, 0x834,
|
||||
0, 4, /* M */
|
||||
@@ -444,7 +444,7 @@ static SUNXI_CCU_MP_WITH_MUX_GATE_POSTDIV(mmc1_clk, "mmc1", mmc_parents, 0x834,
|
||||
24, 2, /* mux */
|
||||
BIT(31), /* gate */
|
||||
2, /* post-div */
|
||||
CLK_SET_RATE_NO_REPARENT);
|
||||
0);
|
||||
|
||||
static SUNXI_CCU_MP_WITH_MUX_GATE_POSTDIV(mmc2_clk, "mmc2", mmc_parents, 0x838,
|
||||
0, 4, /* M */
|
||||
@@ -452,7 +452,7 @@ static SUNXI_CCU_MP_WITH_MUX_GATE_POSTDIV(mmc2_clk, "mmc2", mmc_parents, 0x838,
|
||||
24, 2, /* mux */
|
||||
BIT(31), /* gate */
|
||||
2, /* post-div */
|
||||
CLK_SET_RATE_NO_REPARENT);
|
||||
0);
|
||||
|
||||
static SUNXI_CCU_GATE(bus_mmc0_clk, "bus-mmc0", "ahb3", 0x84c, BIT(0), 0);
|
||||
static SUNXI_CCU_GATE(bus_mmc1_clk, "bus-mmc1", "ahb3", 0x84c, BIT(1), 0);
|
||||
|
||||
@@ -239,7 +239,7 @@ config CPUFREQ_VIRT
|
||||
If in doubt, say N.
|
||||
|
||||
config CPUFREQ_DT_PLATDEV
|
||||
tristate "Generic DT based cpufreq platdev driver"
|
||||
bool "Generic DT based cpufreq platdev driver"
|
||||
depends on OF
|
||||
help
|
||||
This adds a generic DT based cpufreq platdev driver for frequency
|
||||
|
||||
@@ -234,5 +234,3 @@ create_pdev:
|
||||
sizeof(struct cpufreq_dt_platform_data)));
|
||||
}
|
||||
core_initcall(cpufreq_dt_platdev_init);
|
||||
MODULE_DESCRIPTION("Generic DT based cpufreq platdev driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
||||
@@ -24,6 +24,7 @@ struct s3c64xx_dvfs {
|
||||
unsigned int vddarm_max;
|
||||
};
|
||||
|
||||
#ifdef CONFIG_REGULATOR
|
||||
static struct s3c64xx_dvfs s3c64xx_dvfs_table[] = {
|
||||
[0] = { 1000000, 1150000 },
|
||||
[1] = { 1050000, 1150000 },
|
||||
@@ -31,6 +32,7 @@ static struct s3c64xx_dvfs s3c64xx_dvfs_table[] = {
|
||||
[3] = { 1200000, 1350000 },
|
||||
[4] = { 1300000, 1350000 },
|
||||
};
|
||||
#endif
|
||||
|
||||
static struct cpufreq_frequency_table s3c64xx_freq_table[] = {
|
||||
{ 0, 0, 66000 },
|
||||
@@ -51,15 +53,16 @@ static struct cpufreq_frequency_table s3c64xx_freq_table[] = {
|
||||
static int s3c64xx_cpufreq_set_target(struct cpufreq_policy *policy,
|
||||
unsigned int index)
|
||||
{
|
||||
struct s3c64xx_dvfs *dvfs;
|
||||
unsigned int old_freq, new_freq;
|
||||
unsigned int new_freq = s3c64xx_freq_table[index].frequency;
|
||||
int ret;
|
||||
|
||||
#ifdef CONFIG_REGULATOR
|
||||
struct s3c64xx_dvfs *dvfs;
|
||||
unsigned int old_freq;
|
||||
|
||||
old_freq = clk_get_rate(policy->clk) / 1000;
|
||||
new_freq = s3c64xx_freq_table[index].frequency;
|
||||
dvfs = &s3c64xx_dvfs_table[s3c64xx_freq_table[index].driver_data];
|
||||
|
||||
#ifdef CONFIG_REGULATOR
|
||||
if (vddarm && new_freq > old_freq) {
|
||||
ret = regulator_set_voltage(vddarm,
|
||||
dvfs->vddarm_min,
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user