Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk fix from Stephen Boyd: "One fix for the composite clk that broke when we changed this clk type to use the determine_rate instead of round_rate clk op by default. This caused lots of problems on Rockchip SoCs because they heavily use the composite clk code to model the clk tree" * tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: clk: composite: Also consider .determine_rate for rate + mux composites
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@@ -58,11 +58,8 @@ static int clk_composite_determine_rate(struct clk_hw *hw,
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long rate;
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int i;
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if (rate_hw && rate_ops && rate_ops->determine_rate) {
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__clk_hw_set_clk(rate_hw, hw);
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return rate_ops->determine_rate(rate_hw, req);
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} else if (rate_hw && rate_ops && rate_ops->round_rate &&
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mux_hw && mux_ops && mux_ops->set_parent) {
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if (rate_hw && rate_ops && rate_ops->round_rate &&
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mux_hw && mux_ops && mux_ops->set_parent) {
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req->best_parent_hw = NULL;
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if (clk_hw_get_flags(hw) & CLK_SET_RATE_NO_REPARENT) {
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@@ -107,6 +104,9 @@ static int clk_composite_determine_rate(struct clk_hw *hw,
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req->rate = best_rate;
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return 0;
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} else if (rate_hw && rate_ops && rate_ops->determine_rate) {
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__clk_hw_set_clk(rate_hw, hw);
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return rate_ops->determine_rate(rate_hw, req);
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} else if (mux_hw && mux_ops && mux_ops->determine_rate) {
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__clk_hw_set_clk(mux_hw, hw);
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return mux_ops->determine_rate(mux_hw, req);
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