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dt-bindings: clock: Drop unneeded quotes

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Cleanup bindings dropping unneeded quotes. Once all these are fixed,
checking for this can be enabled in yamllint.

Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230322173549.3972106-1-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
This commit is contained in:
Rob Herring
2023-03-22 12:35:48 -05:00
parent c9c9d764da
commit 3267197782
10 changed files with 19 additions and 19 deletions
Download Patch File Download Diff File Expand all files Collapse all files
Documentation/devicetree/bindings/clock/arm,syscon-icst.yaml
+2 -2
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@@ -81,11 +81,11 @@ properties:
maxItems: 1
lock-offset:
$ref: '/schemas/types.yaml#/definitions/uint32'
$ref: /schemas/types.yaml#/definitions/uint32
description: Offset to the unlocking register for the oscillator
vco-offset:
$ref: '/schemas/types.yaml#/definitions/uint32'
$ref: /schemas/types.yaml#/definitions/uint32
description: Offset to the VCO register for the oscillator
deprecated: true
Documentation/devicetree/bindings/clock/mediatek,apmixedsys.yaml
+2 -2
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@@ -1,8 +1,8 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/clock/mediatek,apmixedsys.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/clock/mediatek,apmixedsys.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: MediaTek AP Mixedsys Controller
Documentation/devicetree/bindings/clock/mediatek,topckgen.yaml
+2 -2
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@@ -1,8 +1,8 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/clock/mediatek,topckgen.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/clock/mediatek,topckgen.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: MediaTek Top Clock Generator Controller
Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml
+2 -2
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@@ -1,8 +1,8 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/clock/renesas,cpg-mssr.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/clock/renesas,cpg-mssr.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Renesas Clock Pulse Generator / Module Standby and Software Reset
Documentation/devicetree/bindings/clock/renesas,rcar-usb2-clock-sel.yaml
+2 -2
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@@ -1,8 +1,8 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/clock/renesas,rcar-usb2-clock-sel.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/clock/renesas,rcar-usb2-clock-sel.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Renesas R-Car USB 2.0 clock selector
Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml
+2 -2
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@@ -1,8 +1,8 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/clock/renesas,rzg2l-cpg.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/clock/renesas,rzg2l-cpg.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Renesas RZ/{G2L,V2L,V2M} Clock Pulse Generator / Module Standby Mode
Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml
+1 -1
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@@ -183,7 +183,7 @@ allOf:
- description: External RTC clock (32768 Hz)
- description: CMU_HSI bus clock (from CMU_TOP)
- description: SD card clock (from CMU_TOP)
- description: "USB 2.0 DRD clock (from CMU_TOP)"
- description: USB 2.0 DRD clock (from CMU_TOP)
clock-names:
items:
Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.yaml
+2 -2
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@@ -2,8 +2,8 @@
# Copyright 2019 Unisoc Inc.
%YAML 1.2
---
$id: "http://devicetree.org/schemas/clock/sprd,sc9863a-clk.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/clock/sprd,sc9863a-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: SC9863A Clock Control Unit
Documentation/devicetree/bindings/clock/sprd,ums512-clk.yaml
+2 -2
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@@ -2,8 +2,8 @@
# Copyright 2022 Unisoc Inc.
%YAML 1.2
---
$id: "http://devicetree.org/schemas/clock/sprd,ums512-clk.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/clock/sprd,ums512-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: UMS512 Soc clock controller
Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml
+2 -2
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@@ -1,8 +1,8 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/clock/xlnx,clocking-wizard.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/clock/xlnx,clocking-wizard.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Xilinx clocking wizard