ARM: dts: rockchip: set default rates for core clocks on rk322x

Set sane default frequencies for CPLL, GPLL and some other core clocks
on the rk322x.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Elaine Zhang
2017-05-17 18:16:14 +08:00
committed by Heiko Stuebner
parent 738e451174
commit 30ee58146b
+12 -2
View File
@@ -346,8 +346,18 @@
rockchip,grf = <&grf>;
#clock-cells = <1>;
#reset-cells = <1>;
assigned-clocks = <&cru PLL_GPLL>;
assigned-clock-rates = <594000000>;
assigned-clocks =
<&cru PLL_GPLL>, <&cru ARMCLK>,
<&cru PLL_CPLL>, <&cru ACLK_PERI>,
<&cru HCLK_PERI>, <&cru PCLK_PERI>,
<&cru ACLK_CPU>, <&cru HCLK_CPU>,
<&cru PCLK_CPU>;
assigned-clock-rates =
<594000000>, <816000000>,
<500000000>, <150000000>,
<150000000>, <75000000>,
<150000000>, <150000000>,
<75000000>;
};
thermal-zones {