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arm64: dts: rockchip: move rk3399-sapphire PCIe to excavator baseboard

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The PCIe signals are routed through the connector to the baseboard.

Signed-off-by: Vicente Bergas <vicencb@gmail.com>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Vicente Bergas
2018-02-26 19:57:21 +01:00
committed by Heiko Stuebner
parent e702e13f0b
commit 2bbb0c0e6a
2 changed files with 15 additions and 15 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts
+15
View File
@@ -190,6 +190,21 @@
status = "okay";
};
&pcie_phy {
status = "okay";
};
&pcie0 {
assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
assigned-clock-rates = <100000000>;
ep-gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>;
num-lanes = <4>;
pinctrl-names = "default";
pinctrl-0 = <&pcie_clkreqn_cpm>;
status = "okay";
};
&pinctrl {
sdio-pwrseq {
wifi_enable_h: wifi-enable-h {
arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi
-15
View File
@@ -471,21 +471,6 @@
gpio1830-supply = <&vcc_3v0>;
};
&pcie_phy {
status = "okay";
};
&pcie0 {
assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
assigned-clock-rates = <100000000>;
ep-gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>;
num-lanes = <4>;
pinctrl-names = "default";
pinctrl-0 = <&pcie_clkreqn_cpm>;
status = "okay";
};
&pmu_io_domains {
pmu1830-supply = <&vcc_3v0>;
status = "okay";