Merge remote-tracking branch 'qcom/20240430-a750-raytracing-v3-2-7f57c5ac082d@gmail.com' into msm-next-robclark
Merge qcom drivers to pick up dependency for SMEM based speedbin. Signed-off-by: Rob Clark <robdclark@chromium.org>
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@@ -795,6 +795,39 @@ int qcom_smem_get_soc_id(u32 *id)
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}
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EXPORT_SYMBOL_GPL(qcom_smem_get_soc_id);
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/**
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* qcom_smem_get_feature_code() - return the feature code
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* @code: On success, return the feature code here.
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*
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* Look up the feature code identifier from SMEM and return it.
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*
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* Return: 0 on success, negative errno on failure.
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*/
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int qcom_smem_get_feature_code(u32 *code)
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{
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struct socinfo *info;
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u32 raw_code;
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info = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_HW_SW_BUILD_ID, NULL);
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if (IS_ERR(info))
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return PTR_ERR(info);
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/* This only makes sense for socinfo >= 16 */
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if (__le32_to_cpu(info->fmt) < SOCINFO_VERSION(0, 16))
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return -EOPNOTSUPP;
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raw_code = __le32_to_cpu(info->feature_code);
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/* Ensure the value makes sense */
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if (raw_code > SOCINFO_FC_INT_MAX)
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raw_code = SOCINFO_FC_UNKNOWN;
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*code = raw_code;
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return 0;
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}
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EXPORT_SYMBOL_GPL(qcom_smem_get_feature_code);
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static int qcom_smem_get_sbl_version(struct qcom_smem *smem)
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{
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struct smem_header *header;
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@@ -21,14 +21,6 @@
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#include <dt-bindings/arm/qcom,ids.h>
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/*
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* SoC version type with major number in the upper 16 bits and minor
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* number in the lower 16 bits.
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*/
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#define SOCINFO_MAJOR(ver) (((ver) >> 16) & 0xffff)
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#define SOCINFO_MINOR(ver) ((ver) & 0xffff)
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#define SOCINFO_VERSION(maj, min) ((((maj) & 0xffff) << 16)|((min) & 0xffff))
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/* Helper macros to create soc_id table */
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#define qcom_board_id(id) QCOM_ID_ ## id, __stringify(id)
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#define qcom_board_id_named(id, name) QCOM_ID_ ## id, (name)
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@@ -13,5 +13,6 @@ int qcom_smem_get_free_space(unsigned host);
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phys_addr_t qcom_smem_virt_to_phys(void *p);
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int qcom_smem_get_soc_id(u32 *id);
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int qcom_smem_get_feature_code(u32 *code);
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#endif
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@@ -3,6 +3,8 @@
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#ifndef __QCOM_SOCINFO_H__
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#define __QCOM_SOCINFO_H__
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#include <linux/types.h>
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/*
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* SMEM item id, used to acquire handles to respective
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* SMEM region.
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@@ -12,6 +14,14 @@
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#define SMEM_SOCINFO_BUILD_ID_LENGTH 32
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#define SMEM_SOCINFO_CHIP_ID_LENGTH 32
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/*
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* SoC version type with major number in the upper 16 bits and minor
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* number in the lower 16 bits.
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*/
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#define SOCINFO_MAJOR(ver) (((ver) >> 16) & 0xffff)
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#define SOCINFO_MINOR(ver) ((ver) & 0xffff)
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#define SOCINFO_VERSION(maj, min) ((((maj) & 0xffff) << 16)|((min) & 0xffff))
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/* Socinfo SMEM item structure */
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struct socinfo {
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__le32 fmt;
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@@ -74,4 +84,28 @@ struct socinfo {
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__le32 boot_core;
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};
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/* Internal feature codes */
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enum qcom_socinfo_feature_code {
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/* External feature codes */
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SOCINFO_FC_UNKNOWN = 0x0,
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SOCINFO_FC_AA,
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SOCINFO_FC_AB,
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SOCINFO_FC_AC,
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SOCINFO_FC_AD,
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SOCINFO_FC_AE,
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SOCINFO_FC_AF,
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SOCINFO_FC_AG,
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SOCINFO_FC_AH,
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};
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/* Internal feature codes */
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/* Valid values: 0 <= n <= 0xf */
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#define SOCINFO_FC_Yn(n) (0xf1 + (n))
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#define SOCINFO_FC_INT_MAX SOCINFO_FC_Yn(0xf)
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/* Product codes */
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#define SOCINFO_PC_UNKNOWN 0
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#define SOCINFO_PCn(n) ((n) + 1)
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#define SOCINFO_PC_RESERVE (BIT(31) - 1)
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#endif
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