arm: dts: allwinner: drop underscore in node names
Underscores should not be used in node names (dtc with W=2 warns about them), so replace them with hyphens. Use also generic name for pwrseq node, because generic naming is favored by Devicetree spec. All the clocks affected by this change use clock-output-names, so resulting clock name should not change. Functional impact checked with comparing before/after DTBs with dtx_diff and fdtdump. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20240317184130.157695-4-krzysztof.kozlowski@linaro.org Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
This commit is contained in:
Krzysztof Kozlowski
committed by
Jernej Skrabec
Jernej Skrabec
parent
f5217bc4c9
commit
0f47ef3ff1
@@ -62,14 +62,14 @@
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};
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trips {
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cpu_alert0: cpu_alert0 {
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cpu_alert0: cpu-alert0 {
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/* milliCelsius */
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temperature = <85000>;
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hysteresis = <2000>;
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type = "passive";
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};
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cpu_crit: cpu_crit {
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cpu_crit: cpu-crit {
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/* milliCelsius */
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temperature = <100000>;
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hysteresis = <2000>;
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@@ -77,7 +77,7 @@
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};
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};
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mmc0_pwrseq: mmc0_pwrseq {
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mmc0_pwrseq: pwrseq {
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compatible = "mmc-pwrseq-simple";
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reset-gpios = <&pio 1 10 GPIO_ACTIVE_LOW>; /* PB10 */
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};
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@@ -77,7 +77,7 @@
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};
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};
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mmc0_pwrseq: mmc0_pwrseq {
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mmc0_pwrseq: pwrseq {
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compatible = "mmc-pwrseq-simple";
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reset-gpios = <&pio 2 19 GPIO_ACTIVE_LOW>; /* PC19 */
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};
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@@ -109,7 +109,7 @@
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};
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};
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reg_vga_3v3: vga_3v3_regulator {
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reg_vga_3v3: vga-3v3-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vga-3v3";
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regulator-min-microvolt = <3300000>;
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@@ -119,7 +119,7 @@
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gpio = <&pio 7 25 GPIO_ACTIVE_HIGH>; /* PH25 */
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};
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wifi_pwrseq: wifi_pwrseq {
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wifi_pwrseq: pwrseq {
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compatible = "mmc-pwrseq-simple";
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reset-gpios = <&pio 6 10 GPIO_ACTIVE_LOW>; /* PG10 */
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};
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@@ -179,14 +179,14 @@
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};
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trips {
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cpu_alert0: cpu_alert0 {
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cpu_alert0: cpu-alert0 {
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/* milliCelsius */
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temperature = <70000>;
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hysteresis = <2000>;
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type = "passive";
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};
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cpu_crit: cpu_crit {
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cpu_crit: cpu-crit {
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/* milliCelsius */
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temperature = <100000>;
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hysteresis = <2000>;
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@@ -1318,7 +1318,7 @@
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compatible = "allwinner,sun6i-a31-prcm";
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reg = <0x01f01400 0x200>;
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ar100: ar100_clk {
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ar100: ar100-clk {
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compatible = "allwinner,sun6i-a31-ar100-clk";
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#clock-cells = <0>;
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clocks = <&rtc CLK_OSC32K>, <&osc24M>,
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@@ -1327,7 +1327,7 @@
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clock-output-names = "ar100";
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};
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ahb0: ahb0_clk {
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ahb0: ahb0-clk {
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compatible = "fixed-factor-clock";
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#clock-cells = <0>;
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clock-div = <1>;
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@@ -1336,14 +1336,14 @@
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clock-output-names = "ahb0";
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};
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apb0: apb0_clk {
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apb0: apb0-clk {
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compatible = "allwinner,sun6i-a31-apb0-clk";
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#clock-cells = <0>;
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clocks = <&ahb0>;
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clock-output-names = "apb0";
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};
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apb0_gates: apb0_gates_clk {
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apb0_gates: apb0-gates-clk {
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compatible = "allwinner,sun6i-a31-apb0-gates-clk";
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#clock-cells = <1>;
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clocks = <&apb0>;
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@@ -1353,14 +1353,14 @@
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"apb0_i2c";
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};
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ir_clk: ir_clk {
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ir_clk: ir-clk {
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#clock-cells = <0>;
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compatible = "allwinner,sun4i-a10-mod0-clk";
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clocks = <&rtc CLK_OSC32K>, <&osc24M>;
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clock-output-names = "ir";
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};
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apb0_rst: apb0_rst {
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apb0_rst: apb0-rst {
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compatible = "allwinner,sun6i-a31-clock-reset";
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#reset-cells = <1>;
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};
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@@ -75,7 +75,7 @@
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};
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};
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mmc2_pwrseq: mmc2_pwrseq {
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mmc2_pwrseq: pwrseq {
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compatible = "mmc-pwrseq-simple";
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reset-gpios = <&r_pio 0 8 GPIO_ACTIVE_LOW>; /* PL8 WIFI_EN */
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};
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@@ -86,7 +86,7 @@
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};
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};
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mmc3_pwrseq: mmc3_pwrseq {
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mmc3_pwrseq: pwrseq {
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compatible = "mmc-pwrseq-simple";
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reset-gpios = <&pio 7 22 GPIO_ACTIVE_LOW>; /* PH22 WL-PMU-EN */
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};
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@@ -96,7 +96,7 @@
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};
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};
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mmc3_pwrseq: mmc3_pwrseq {
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mmc3_pwrseq: pwrseq {
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compatible = "mmc-pwrseq-simple";
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reset-gpios = <&pio 7 9 GPIO_ACTIVE_LOW>; /* PH9 WIFI_EN */
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clocks = <&ccu CLK_OUT_A>;
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@@ -65,7 +65,7 @@
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stdout-path = "serial0:115200n8";
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};
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reg_mmc3_vdd: mmc3_vdd {
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reg_mmc3_vdd: regulator-mmc3-vdd {
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compatible = "regulator-fixed";
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regulator-name = "mmc3_vdd";
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regulator-min-microvolt = <3000000>;
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@@ -74,7 +74,7 @@
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gpio = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
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};
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reg_gmac_vdd: gmac_vdd {
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reg_gmac_vdd: regulator-gmac-vdd {
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compatible = "regulator-fixed";
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regulator-name = "gmac_vdd";
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regulator-min-microvolt = <3000000>;
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@@ -14,7 +14,7 @@
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model = "Olimex A20-Olimex-SOM-EVB-eMMC";
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compatible = "olimex,a20-olimex-som-evb-emmc", "allwinner,sun7i-a20";
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mmc2_pwrseq: mmc2_pwrseq {
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mmc2_pwrseq: pwrseq {
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compatible = "mmc-pwrseq-emmc";
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reset-gpios = <&pio 2 18 GPIO_ACTIVE_LOW>;
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};
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@@ -13,7 +13,7 @@
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model = "Olimex A20-SOM204-EVB-eMMC";
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compatible = "olimex,a20-olimex-som204-evb-emmc", "allwinner,sun7i-a20";
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mmc2_pwrseq: mmc2_pwrseq {
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mmc2_pwrseq: pwrseq-1 {
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compatible = "mmc-pwrseq-emmc";
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reset-gpios = <&pio 2 16 GPIO_ACTIVE_LOW>;
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};
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@@ -65,7 +65,7 @@
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};
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};
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rtl_pwrseq: rtl_pwrseq {
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rtl_pwrseq: pwrseq-0 {
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compatible = "mmc-pwrseq-simple";
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reset-gpios = <&pio 6 9 GPIO_ACTIVE_LOW>;
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};
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@@ -177,7 +177,7 @@
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non-removable;
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status = "okay";
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rtl8723bs: sdio_wifi@1 {
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rtl8723bs: wifi@1 {
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reg = <1>;
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};
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};
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@@ -82,7 +82,7 @@
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};
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};
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reg_axp_ipsout: axp_ipsout {
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reg_axp_ipsout: regulator-axp-ipsout {
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compatible = "regulator-fixed";
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regulator-name = "axp-ipsout";
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regulator-min-microvolt = <5000000>;
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@@ -60,7 +60,7 @@
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stdout-path = "serial0:115200n8";
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};
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mmc3_pwrseq: mmc3_pwrseq {
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mmc3_pwrseq: pwrseq {
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compatible = "mmc-pwrseq-simple";
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reset-gpios = <&pio 7 9 GPIO_ACTIVE_LOW>; /* PH9 WIFI_EN */
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};
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@@ -153,14 +153,14 @@
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};
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trips {
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cpu_alert0: cpu_alert0 {
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cpu_alert0: cpu-alert0 {
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/* milliCelsius */
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temperature = <75000>;
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hysteresis = <2000>;
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type = "passive";
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};
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cpu_crit: cpu_crit {
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cpu_crit: cpu-crit {
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/* milliCelsius */
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temperature = <100000>;
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hysteresis = <2000>;
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@@ -108,7 +108,7 @@
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#size-cells = <1>;
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ranges;
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osc24M: osc24M_clk {
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osc24M: osc24M-clk {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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@@ -116,7 +116,7 @@
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clock-output-names = "osc24M";
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};
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ext_osc32k: ext_osc32k_clk {
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ext_osc32k: ext-osc32k-clk {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <32768>;
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@@ -733,7 +733,7 @@
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compatible = "allwinner,sun8i-a23-prcm";
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reg = <0x01f01400 0x200>;
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ar100: ar100_clk {
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ar100: ar100-clk {
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compatible = "fixed-factor-clock";
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#clock-cells = <0>;
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clock-div = <1>;
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@@ -742,7 +742,7 @@
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clock-output-names = "ar100";
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};
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ahb0: ahb0_clk {
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ahb0: ahb0-clk {
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compatible = "fixed-factor-clock";
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#clock-cells = <0>;
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clock-div = <1>;
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@@ -751,14 +751,14 @@
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clock-output-names = "ahb0";
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};
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apb0: apb0_clk {
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apb0: apb0-clk {
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compatible = "allwinner,sun8i-a23-apb0-clk";
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#clock-cells = <0>;
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clocks = <&ahb0>;
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clock-output-names = "apb0";
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};
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apb0_gates: apb0_gates_clk {
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apb0_gates: apb0-gates-clk {
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compatible = "allwinner,sun8i-a23-apb0-gates-clk";
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#clock-cells = <1>;
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clocks = <&apb0>;
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@@ -767,7 +767,7 @@
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"apb0_i2c";
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};
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apb0_rst: apb0_rst {
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apb0_rst: apb0-rst {
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compatible = "allwinner,sun6i-a31-clock-reset";
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#reset-cells = <1>;
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};
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@@ -52,7 +52,7 @@
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ethernet0 = &esp8089;
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};
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wifi_pwrseq: wifi_pwrseq {
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wifi_pwrseq: pwrseq {
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compatible = "mmc-pwrseq-simple";
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reset-gpios = <&r_pio 0 6 GPIO_ACTIVE_LOW>; /* PL6 */
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/* The esp8089 needs 200 ms after driving wifi-en high */
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@@ -76,7 +76,7 @@
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non-removable;
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status = "okay";
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esp8089: sdio_wifi@1 {
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esp8089: wifi@1 {
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compatible = "esp,esp8089";
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reg = <1>;
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esp,crystal-26M-en = <2>;
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@@ -52,7 +52,7 @@
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ethernet0 = &esp8089;
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};
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wifi_pwrseq: wifi_pwrseq {
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wifi_pwrseq: pwrseq {
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compatible = "mmc-pwrseq-simple";
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reset-gpios = <&r_pio 0 6 GPIO_ACTIVE_LOW>; /* PL6 */
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/* The esp8089 needs 200 ms after driving wifi-en high */
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@@ -69,7 +69,7 @@
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non-removable;
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status = "okay";
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esp8089: sdio_wifi@1 {
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esp8089: wifi@1 {
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compatible = "esp,esp8089";
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reg = <1>;
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esp,crystal-26M-en = <2>;
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@@ -85,7 +85,7 @@
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non-removable;
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status = "okay";
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rtl8703as: sdio_wifi@1 {
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rtl8703as: wifi@1 {
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reg = <1>;
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};
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};
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@@ -78,7 +78,7 @@
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non-removable;
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status = "okay";
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rtl8723bs: sdio_wifi@1 {
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rtl8723bs: wifi@1 {
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reg = <1>;
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};
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};
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@@ -323,35 +323,35 @@
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};
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trips {
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cpu_alert0: cpu_alert0 {
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cpu_alert0: cpu-alert0 {
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/* milliCelsius */
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temperature = <75000>;
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hysteresis = <2000>;
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type = "passive";
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};
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gpu_alert0: gpu_alert0 {
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gpu_alert0: gpu-alert0 {
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/* milliCelsius */
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temperature = <85000>;
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hysteresis = <2000>;
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type = "passive";
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};
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cpu_alert1: cpu_alert1 {
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cpu_alert1: cpu-alert1 {
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/* milliCelsius */
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temperature = <90000>;
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hysteresis = <2000>;
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type = "hot";
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};
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gpu_alert1: gpu_alert1 {
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gpu_alert1: gpu-alert1 {
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/* milliCelsius */
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temperature = <95000>;
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hysteresis = <2000>;
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type = "hot";
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};
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cpu_crit: cpu_crit {
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cpu_crit: cpu-crit {
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/* milliCelsius */
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temperature = <110000>;
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hysteresis = <2000>;
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@@ -95,7 +95,7 @@
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gpio = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
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};
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wifi_pwrseq: wifi_pwrseq {
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wifi_pwrseq: pwrseq {
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compatible = "mmc-pwrseq-simple";
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clocks = <&ac100_rtc 1>;
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clock-names = "ext_clock";
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@@ -144,7 +144,7 @@
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compatible = "linux,spdif-dit";
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};
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wifi_pwrseq: wifi_pwrseq {
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wifi_pwrseq: pwrseq {
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compatible = "mmc-pwrseq-simple";
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clocks = <&ac100_rtc 1>;
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clock-names = "ext_clock";
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@@ -123,7 +123,7 @@
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vin-supply = <®_vbat>;
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};
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wifi_pwrseq: wifi_pwrseq {
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wifi_pwrseq: pwrseq {
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compatible = "mmc-pwrseq-simple";
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reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 WL-PMU-EN */
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@@ -164,7 +164,7 @@
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ranges;
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/* TODO: PRCM block has a mux for this. */
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osc24M: osc24M_clk {
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osc24M: osc24M-clk {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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@@ -177,14 +177,14 @@
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* It is an internal RC-based oscillator.
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* TODO: Its controls are in the PRCM block.
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*/
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osc16M: osc16M_clk {
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osc16M: osc16M-clk {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <16000000>;
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clock-output-names = "osc16M";
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};
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osc16Md512: osc16Md512_clk {
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osc16Md512: osc16Md512-clk {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clock-div = <512>;
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@@ -1127,7 +1127,7 @@
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#reset-cells = <1>;
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};
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r_cpucfg@1f01c00 {
|
||||
cpucfg@1f01c00 {
|
||||
compatible = "allwinner,sun8i-a83t-r-cpucfg";
|
||||
reg = <0x1f01c00 0x400>;
|
||||
};
|
||||
|
||||
@@ -103,7 +103,7 @@
|
||||
cpu-supply = <®_vcc1v2>;
|
||||
};
|
||||
|
||||
wifi_pwrseq: wifi_pwrseq {
|
||||
wifi_pwrseq: pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
|
||||
clocks = <&rtc CLK_OSC32K_FANOUT>;
|
||||
|
||||
@@ -90,7 +90,7 @@
|
||||
vmmc-supply = <®_vcc3v3>;
|
||||
vqmmc-supply = <®_vcc3v3>;
|
||||
|
||||
rtl8189etv: sdio_wifi@1 {
|
||||
rtl8189etv: wifi@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -80,7 +80,7 @@
|
||||
};
|
||||
};
|
||||
|
||||
reg_vcc_wifi: reg_vcc_wifi {
|
||||
reg_vcc_wifi: reg-vcc-wifi {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
@@ -105,7 +105,7 @@
|
||||
states = <1100000 0>, <1300000 1>;
|
||||
};
|
||||
|
||||
wifi_pwrseq: wifi_pwrseq {
|
||||
wifi_pwrseq: pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>;
|
||||
post-power-on-delay-ms = <200>;
|
||||
@@ -149,7 +149,7 @@
|
||||
* Explicitly define the sdio device, so that we can add an ethernet
|
||||
* alias for it (which e.g. makes u-boot set a mac-address).
|
||||
*/
|
||||
xr819: sdio_wifi@1 {
|
||||
xr819: wifi@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -122,7 +122,7 @@
|
||||
compatible = "linux,spdif-dit";
|
||||
};
|
||||
|
||||
wifi_pwrseq: wifi_pwrseq {
|
||||
wifi_pwrseq: pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
|
||||
clocks = <&rtc CLK_OSC32K_FANOUT>;
|
||||
@@ -185,7 +185,7 @@
|
||||
* Explicitly define the sdio device, so that we can add an ethernet
|
||||
* alias for it (which e.g. makes u-boot set a mac-address).
|
||||
*/
|
||||
sdiowifi: sdio_wifi@1 {
|
||||
sdiowifi: wifi@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -87,7 +87,7 @@
|
||||
vin-supply = <®_vcc5v0>;
|
||||
};
|
||||
|
||||
wifi_pwrseq: wifi_pwrseq {
|
||||
wifi_pwrseq: pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
|
||||
clocks = <&rtc CLK_OSC32K_FANOUT>;
|
||||
@@ -119,7 +119,7 @@
|
||||
non-removable;
|
||||
status = "okay";
|
||||
|
||||
sdio_wifi: sdio_wifi@1 {
|
||||
sdio_wifi: wifi@1 {
|
||||
reg = <1>;
|
||||
compatible = "brcm,bcm4329-fmac";
|
||||
interrupt-parent = <&pio>;
|
||||
|
||||
@@ -62,7 +62,7 @@
|
||||
gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
wifi_pwrseq: wifi_pwrseq {
|
||||
wifi_pwrseq: pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
|
||||
};
|
||||
@@ -132,7 +132,7 @@
|
||||
non-removable;
|
||||
status = "okay";
|
||||
|
||||
sdio_wifi: sdio_wifi@1 {
|
||||
sdio_wifi: wifi@1 {
|
||||
reg = <1>;
|
||||
compatible = "brcm,bcm4329-fmac";
|
||||
interrupt-parent = <&pio>;
|
||||
|
||||
@@ -73,7 +73,7 @@
|
||||
};
|
||||
};
|
||||
|
||||
wifi_pwrseq: wifi_pwrseq {
|
||||
wifi_pwrseq: pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
|
||||
};
|
||||
|
||||
@@ -43,7 +43,7 @@
|
||||
<1300000 0x1>;
|
||||
};
|
||||
|
||||
wifi_pwrseq: wifi_pwrseq {
|
||||
wifi_pwrseq: pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
|
||||
clocks = <&rtc CLK_OSC32K_FANOUT>;
|
||||
|
||||
@@ -105,7 +105,7 @@
|
||||
};
|
||||
};
|
||||
|
||||
wifi_pwrseq: wifi_pwrseq {
|
||||
wifi_pwrseq: pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 WIFI_EN */
|
||||
};
|
||||
@@ -169,7 +169,7 @@
|
||||
* Explicitly define the sdio device, so that we can add an ethernet
|
||||
* alias for it (which e.g. makes u-boot set a mac-address).
|
||||
*/
|
||||
rtl8189: sdio_wifi@1 {
|
||||
rtl8189: wifi@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -143,7 +143,7 @@
|
||||
* Explicitly define the sdio device, so that we can add an ethernet
|
||||
* alias for it (which e.g. makes u-boot set a mac-address).
|
||||
*/
|
||||
rtl8189ftv: sdio_wifi@1 {
|
||||
rtl8189ftv: wifi@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -63,7 +63,7 @@
|
||||
* Explicitly define the sdio device, so that we can add an ethernet
|
||||
* alias for it (which e.g. makes u-boot set a mac-address).
|
||||
*/
|
||||
rtl8189ftv: sdio_wifi@1 {
|
||||
rtl8189ftv: wifi@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -92,7 +92,7 @@
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
wifi_pwrseq: wifi_pwrseq {
|
||||
wifi_pwrseq: pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
reset-gpios = <&pio 0 9 GPIO_ACTIVE_LOW>; /* PA9 */
|
||||
post-power-on-delay-ms = <200>;
|
||||
|
||||
@@ -62,7 +62,7 @@
|
||||
};
|
||||
};
|
||||
|
||||
wifi_pwrseq: wifi_pwrseq {
|
||||
wifi_pwrseq: pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
/*
|
||||
* Q8 boards use various PL# pins as wifi-en. On other boards
|
||||
@@ -94,7 +94,7 @@
|
||||
non-removable;
|
||||
status = "okay";
|
||||
|
||||
sdio_wifi: sdio_wifi@1 {
|
||||
sdio_wifi: wifi@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -88,7 +88,7 @@
|
||||
regulator-max-microvolt = <5000000>;
|
||||
};
|
||||
|
||||
wifi_pwrseq: wifi_pwrseq {
|
||||
wifi_pwrseq: pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
reset-gpios = <&r_pio 0 6 GPIO_ACTIVE_LOW>; /* PL06 */
|
||||
clocks = <&rtc CLK_OSC32K_FANOUT>;
|
||||
|
||||
@@ -75,7 +75,7 @@
|
||||
};
|
||||
};
|
||||
|
||||
wifi_pwrseq: wifi_pwrseq {
|
||||
wifi_pwrseq: pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
reset-gpios = <&r_pio 0 6 GPIO_ACTIVE_LOW>; /* PL06 */
|
||||
};
|
||||
|
||||
@@ -100,7 +100,7 @@
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
wifi_pwrseq: wifi_pwrseq {
|
||||
wifi_pwrseq: pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
reset-gpios = <&pio 6 10 GPIO_ACTIVE_LOW>; /* PG10 WIFI_EN */
|
||||
clocks = <&ccu CLK_OUTA>;
|
||||
|
||||
@@ -62,7 +62,7 @@
|
||||
regulator-max-microvolt = <5000000>;
|
||||
};
|
||||
|
||||
wifi_pwrseq: wifi_pwrseq {
|
||||
wifi_pwrseq: pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
reset-gpios = <&pio 1 10 GPIO_ACTIVE_LOW>; // PB10 WIFI_EN
|
||||
clocks = <&ccu CLK_OUTA>;
|
||||
|
||||
@@ -51,7 +51,7 @@
|
||||
startup-delay-us = <200000>;
|
||||
};
|
||||
|
||||
wifi_pwrseq: wifi_pwrseq {
|
||||
wifi_pwrseq: pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
reset-gpios = <&pio 1 3 GPIO_ACTIVE_LOW>; /* PB3 WIFI-RST */
|
||||
post-power-on-delay-ms = <200>;
|
||||
|
||||
@@ -98,7 +98,7 @@
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
osc24M: osc24M_clk {
|
||||
osc24M: osc24M-clk {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <24000000>;
|
||||
@@ -106,7 +106,7 @@
|
||||
clock-output-names = "osc24M";
|
||||
};
|
||||
|
||||
osc32k: osc32k_clk {
|
||||
osc32k: osc32k-clk {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <32768>;
|
||||
|
||||
@@ -94,7 +94,7 @@
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
wifi_pwrseq: wifi_pwrseq {
|
||||
wifi_pwrseq: pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
reset-gpios = <&pio 6 10 GPIO_ACTIVE_LOW>; /* PG10 WIFI_EN */
|
||||
clocks = <&ccu CLK_OUTA>;
|
||||
|
||||
@@ -196,14 +196,14 @@
|
||||
* The actual TX clock rate is not controlled by the
|
||||
* gmac_tx clock.
|
||||
*/
|
||||
mii_phy_tx_clk: mii_phy_tx_clk {
|
||||
mii_phy_tx_clk: mii-phy-tx-clk {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <25000000>;
|
||||
clock-output-names = "mii_phy_tx";
|
||||
};
|
||||
|
||||
gmac_int_tx_clk: gmac_int_tx_clk {
|
||||
gmac_int_tx_clk: gmac-int-tx-clk {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <125000000>;
|
||||
|
||||
@@ -98,7 +98,7 @@
|
||||
gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
wifi_pwrseq: wifi_pwrseq {
|
||||
wifi_pwrseq: pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
|
||||
clocks = <&rtc CLK_OSC32K_FANOUT>;
|
||||
|
||||
@@ -18,7 +18,7 @@
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
wifi_pwrseq: wifi_pwrseq {
|
||||
wifi_pwrseq: pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
reset-gpios = <&pio 2 7 GPIO_ACTIVE_LOW>; /* PC7 */
|
||||
post-power-on-delay-ms = <200>;
|
||||
|
||||
@@ -83,7 +83,7 @@
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
osc24M: osc24M_clk {
|
||||
osc24M: osc24M-clk {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <24000000>;
|
||||
@@ -91,7 +91,7 @@
|
||||
clock-output-names = "osc24M";
|
||||
};
|
||||
|
||||
osc32k: osc32k_clk {
|
||||
osc32k: osc32k-clk {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <32768>;
|
||||
|
||||
Reference in New Issue
Block a user