Merge tag 'v6.12-rockchip-dts32-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt
spidev on the elgin-r1 got a real compatible, the rk3128 could enable its VPU for video decoding and the rk3128 sfc node can use the clock constant now after the merge-window. * tag 'v6.12-rockchip-dts32-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: Do not describe unexisting DAC device on rv1108-elgin-r1 ARM: dts: rockchip: Add vpu nodes for RK3128 ARM: dts: rockchip: use constant for HCLK_SFC on rk3128 Link: https://lore.kernel.org/r/3405397.RL5eaSpR8r@diego Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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@@ -254,6 +254,30 @@
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};
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};
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vpu: video-codec@10106000 {
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compatible = "rockchip,rk3128-vpu", "rockchip,rk3066-vpu";
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reg = <0x10106000 0x800>;
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interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "vepu", "vdpu";
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clocks = <&cru ACLK_VDPU>, <&cru HCLK_VDPU>,
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<&cru ACLK_VEPU>, <&cru HCLK_VEPU>;
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clock-names = "aclk_vdpu", "hclk_vdpu",
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"aclk_vepu", "hclk_vepu";
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iommus = <&vpu_mmu>;
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power-domains = <&power RK3128_PD_VIDEO>;
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};
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vpu_mmu: iommu@10106800 {
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compatible = "rockchip,iommu";
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reg = <0x10106800 0x100>;
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interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru ACLK_VEPU>, <&cru HCLK_VDPU>;
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clock-names = "aclk", "iface";
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power-domains = <&power RK3128_PD_VIDEO>;
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#iommu-cells = <0>;
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};
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vop: vop@1010e000 {
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compatible = "rockchip,rk3126-vop";
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reg = <0x1010e000 0x300>;
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@@ -429,7 +453,7 @@
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compatible = "rockchip,sfc";
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reg = <0x1020c000 0x8000>;
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interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru SCLK_SFC>, <&cru 479>;
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clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
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clock-names = "clk_sfc", "hclk_sfc";
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status = "disabled";
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};
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@@ -168,8 +168,8 @@
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pinctrl-0 = <&spim1_clk &spim1_cs0 &spim1_tx &spim1_rx>;
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status = "okay";
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dh2228fv: dac@0 {
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compatible = "rohm,dh2228fv";
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display: display@0 {
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compatible = "elgin,jg10309-01";
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reg = <0>;
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spi-max-frequency = <24000000>;
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spi-cpha;
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