Jisheng Zhang 6af8ec9dbd riscv: allow to enable RT ...

BugLink: https://bugs.launchpad.net/bugs/2060704

Now, it's ready to enable RT on riscv.

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Kevin Becker <kevin.becker@canonical.com>

2025-06-25 11:17:17 -04:00

..

boot

riscv: dts: starfive: jh7110-common: Fix lower rate of CPUfreq by setting PLL0 rate to 1.5GHz

2024-11-09 18:46:06 +03:00

configs

Merge patch series "RISC-V SBI debug console extension support"

2024-01-11 07:36:27 -08:00

errata

riscv: T-Head: Test availability bit before enabling MAE errata

2024-07-05 10:12:08 +02:00

include

riscv: add PREEMPT_AUTO support

2025-06-25 11:17:17 -04:00

kernel

RISC-V: Mark riscv_v_init() as __init

2025-06-15 10:37:58 +03:00

kvm

riscv: kvm: Fix out-of-bounds array access

2025-03-14 14:31:26 +01:00

lib

riscv: Omit optimized string routines when using KASAN

2025-02-14 15:50:21 +03:00

mm

riscv: mm: Fix the out of bound issue of vmemmap address

2025-04-15 19:59:39 +03:00

net

riscv, bpf: Make BPF_CMPXCHG fully ordered

2025-03-14 14:29:57 +01:00

purgatory

riscv: Omit optimized string routines when using KASAN

2025-02-14 15:50:21 +03:00

tools

…

Kbuild

…

Kconfig

riscv: allow to enable RT

2025-06-25 11:17:17 -04:00

Kconfig.debug

riscv: Add tests for riscv module loading

2023-11-07 14:59:32 -08:00

Kconfig.errata

riscv: thead: Rename T-Head PBMT to MAE

2024-07-05 10:12:08 +02:00

Kconfig.socs

Merge tag 'soc-drivers-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

2023-11-01 14:46:51 -10:00

Makefile

riscv: add dependency among Image(.gz), loader(.bin), and vmlinuz.efi

2024-01-17 18:18:20 -08:00

Makefile.postlink

kbuild: remove ARCH_POSTLINK from module builds

2023-10-28 21:10:08 +09:00