Merge remote branch 'korg/drm-radeon-testing' into drm-next-stage
* korg/drm-radeon-testing: (62 commits) drm/radeon/kms: update new pll algo drm/radeon/kms: add support for square microtiles on r3xx-r5xx drm/radeon/kms: force pinning buffer into visible VRAM drm/radeon/kms/evergreen: fix typo in cursor code drm/radeon/kms: implement reading active PCIE lanes on R600+ drm/radeon/kms: for downclocking non-mobility check PERFORMANCE state drm/radeon/kms: simplify storing current and requested PM mode drm/radeon: fixes for r6xx/r7xx gfx init drm/radeon/rv740: fix backend setup drm/radeon/kms: fix R3XX/R4XX memory controller initialization [rfc] drm/radeon/kms: pm debugging check for vbl. drm/radeon: Fix memory allocation failures in the preKMS command stream checking. drm: Add generic multipart buffer. drm/radeon/kms: simplify memory controller setup V2 drm/radeon: Add asic hook for dma copy to r200 cards. drm/radeon/kms: Create asic structure for r300 pcie cards. drm/radeon/kms: remove unused r600_gart_clear_page drm/radeon/kms: remove HDP flushes from fence emit (v2) drm/radeon/kms: add LVDS pll quirk for Dell Studio 15 drm/radeon/kms: simplify picking power state ... Conflicts: drivers/gpu/drm/radeon/atom.c drivers/gpu/drm/radeon/atombios.h drivers/gpu/drm/radeon/atombios_dp.c drivers/gpu/drm/radeon/r600.c drivers/gpu/drm/radeon/r600_audio.c drivers/gpu/drm/radeon/r600_cp.c drivers/gpu/drm/radeon/radeon.h drivers/gpu/drm/radeon/radeon_connectors.c drivers/gpu/drm/radeon/radeon_ring.c drivers/gpu/drm/radeon/rv770.c
This commit is contained in:
Dave Airlie
@@ -0,0 +1,148 @@
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/**************************************************************************
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*
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* Copyright 2010 Pauli Nieminen.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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*
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**************************************************************************/
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/*
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* Multipart buffer for coping data which is larger than the page size.
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*
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* Authors:
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* Pauli Nieminen <suokkos-at-gmail-dot-com>
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*/
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#ifndef _DRM_BUFFER_H_
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#define _DRM_BUFFER_H_
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#include "drmP.h"
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struct drm_buffer {
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int iterator;
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int size;
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char *data[];
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};
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/**
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* Return the index of page that buffer is currently pointing at.
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*/
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static inline int drm_buffer_page(struct drm_buffer *buf)
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{
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return buf->iterator / PAGE_SIZE;
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}
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/**
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* Return the index of the current byte in the page
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*/
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static inline int drm_buffer_index(struct drm_buffer *buf)
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{
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return buf->iterator & (PAGE_SIZE - 1);
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}
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/**
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* Return number of bytes that is left to process
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*/
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static inline int drm_buffer_unprocessed(struct drm_buffer *buf)
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{
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return buf->size - buf->iterator;
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}
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/**
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* Advance the buffer iterator number of bytes that is given.
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*/
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static inline void drm_buffer_advance(struct drm_buffer *buf, int bytes)
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{
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buf->iterator += bytes;
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}
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/**
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* Allocate the drm buffer object.
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*
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* buf: A pointer to a pointer where the object is stored.
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* size: The number of bytes to allocate.
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*/
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extern int drm_buffer_alloc(struct drm_buffer **buf, int size);
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/**
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* Copy the user data to the begin of the buffer and reset the processing
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* iterator.
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*
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* user_data: A pointer the data that is copied to the buffer.
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* size: The Number of bytes to copy.
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*/
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extern int drm_buffer_copy_from_user(struct drm_buffer *buf,
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void __user *user_data, int size);
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/**
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* Free the drm buffer object
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*/
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extern void drm_buffer_free(struct drm_buffer *buf);
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/**
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* Read an object from buffer that may be split to multiple parts. If object
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* is not split function just returns the pointer to object in buffer. But in
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* case of split object data is copied to given stack object that is suplied
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* by caller.
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*
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* The processing location of the buffer is also advanced to the next byte
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* after the object.
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*
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* objsize: The size of the objet in bytes.
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* stack_obj: A pointer to a memory location where object can be copied.
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*/
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extern void *drm_buffer_read_object(struct drm_buffer *buf,
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int objsize, void *stack_obj);
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/**
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* Returns the pointer to the dword which is offset number of elements from the
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* current processing location.
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*
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* Caller must make sure that dword is not split in the buffer. This
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* requirement is easily met if all the sizes of objects in buffer are
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* multiples of dword and PAGE_SIZE is multiple dword.
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*
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* Call to this function doesn't change the processing location.
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*
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* offset: The index of the dword relative to the internat iterator.
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*/
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static inline void *drm_buffer_pointer_to_dword(struct drm_buffer *buffer,
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int offset)
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{
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int iter = buffer->iterator + offset * 4;
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return &buffer->data[iter / PAGE_SIZE][iter & (PAGE_SIZE - 1)];
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}
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/**
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* Returns the pointer to the dword which is offset number of elements from
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* the current processing location.
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*
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* Call to this function doesn't change the processing location.
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*
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* offset: The index of the byte relative to the internat iterator.
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*/
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static inline void *drm_buffer_pointer_to_byte(struct drm_buffer *buffer,
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int offset)
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{
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int iter = buffer->iterator + offset;
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return &buffer->data[iter / PAGE_SIZE][iter & (PAGE_SIZE - 1)];
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}
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#endif
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@@ -801,4 +801,6 @@ extern struct drm_display_mode *drm_gtf_mode(struct drm_device *dev,
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bool interlaced, int margins);
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extern int drm_add_modes_noedid(struct drm_connector *connector,
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int hdisplay, int vdisplay);
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extern bool drm_edid_is_valid(struct edid *edid);
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#endif /* __DRM_CRTC_H__ */
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@@ -201,4 +201,7 @@ struct edid {
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#define EDID_PRODUCT_ID(e) ((e)->prod_code[0] | ((e)->prod_code[1] << 8))
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/* define the number of Extension EDID block */
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#define DRM_MAX_EDID_EXT_NUM 4
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#endif /* __DRM_EDID_H__ */
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@@ -141,6 +141,41 @@
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{0x1002, 0x5e4c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x5e4d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x5e4f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x6880, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYPRESS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x6888, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYPRESS|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x6889, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYPRESS|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x688A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYPRESS|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x6898, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYPRESS|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x6899, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYPRESS|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x689c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HEMLOCK|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x689d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HEMLOCK|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x689e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYPRESS|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x68a0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_JUNIPER|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x68a1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_JUNIPER|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x68a8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_JUNIPER|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x68a9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_JUNIPER|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x68b0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_JUNIPER|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x68b8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_JUNIPER|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x68b9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_JUNIPER|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x68be, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_JUNIPER|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x68c0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_REDWOOD|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x68c1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_REDWOOD|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x68c8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_REDWOOD|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x68c9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_REDWOOD|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x68d8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_REDWOOD|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x68d9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_REDWOOD|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x68da, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_REDWOOD|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x68de, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_REDWOOD|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x68e0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x68e1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x68e4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x68e5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x68e8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x68e9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x68f1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x68f8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x68f9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x68fe, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x7100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R520|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x7101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R520|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x7102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R520|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
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@@ -808,6 +808,7 @@ struct drm_radeon_gem_create {
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#define RADEON_TILING_SWAP_32BIT 0x8
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#define RADEON_TILING_SURFACE 0x10 /* this object requires a surface
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* when mapped - i.e. front buffer */
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#define RADEON_TILING_MICRO_SQUARE 0x20
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struct drm_radeon_gem_set_tiling {
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uint32_t handle;
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