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PCI: pciehp: Reduce PCIe slot_ctrl to 16 bits

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4283c70e91 ("PCI: pciehp: Make pcie_wait_cmd() self-contained") added
a cache of the most recent command written to the Slot Control register.
This register is only 16 bits wide, but the cache ("slot_ctrl") is 32 bits.

Reduce slot_ctrl to a u16 so it matches the register size.  No functional
change.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This commit is contained in:
Bjorn Helgaas
2014-08-15 17:18:44 -06:00
parent 1302fcf0d0
commit d537a3abb4
2 changed files with 2 additions and 2 deletions
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drivers/pci/hotplug/pciehp.h
+1 -1
View File
@@ -92,7 +92,7 @@ struct controller {
struct slot *slot; struct slot *slot;
wait_queue_head_t queue; /* sleep & wake process */ wait_queue_head_t queue; /* sleep & wake process */
u32 slot_cap; u32 slot_cap;
u32 slot_ctrl; u16 slot_ctrl;
struct timer_list poll_timer; struct timer_list poll_timer;
unsigned long cmd_started; /* jiffies */ unsigned long cmd_started; /* jiffies */
unsigned int cmd_busy:1; unsigned int cmd_busy:1;
drivers/pci/hotplug/pciehp_hpc.c
+1 -1
View File
@@ -171,7 +171,7 @@ static void pcie_wait_cmd(struct controller *ctrl)
* interrupts. * interrupts.
*/ */
if (!rc) if (!rc)
ctrl_info(ctrl, "Timeout on hotplug command %#010x (issued %u msec ago)\n", ctrl_info(ctrl, "Timeout on hotplug command %#06x (issued %u msec ago)\n",
ctrl->slot_ctrl, ctrl->slot_ctrl,
jiffies_to_msecs(now - ctrl->cmd_started)); jiffies_to_msecs(now - ctrl->cmd_started));
} }