Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless
Conflicts: net/mac80211/debugfs_sta.c net/mac80211/sta_info.h
This commit is contained in:
@@ -58,6 +58,7 @@
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#define METHOD_NAME__PRT "_PRT"
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#define METHOD_NAME__CRS "_CRS"
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#define METHOD_NAME__PRS "_PRS"
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#define METHOD_NAME__AEI "_AEI"
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#define METHOD_NAME__PRW "_PRW"
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#define METHOD_NAME__SRS "_SRS"
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@@ -15,6 +15,7 @@ extern int pxm_to_node(int);
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extern int node_to_pxm(int);
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extern void __acpi_map_pxm_to_node(int, int);
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extern int acpi_map_pxm_to_node(int);
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extern unsigned char acpi_srat_revision;
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#endif /* CONFIG_ACPI_NUMA */
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#endif /* __ACP_NUMA_H */
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@@ -238,13 +238,6 @@ acpi_os_write_pci_configuration(struct acpi_pci_id *pci_id,
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/*
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* Miscellaneous
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*/
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acpi_status
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acpi_os_validate_address(u8 space_id, acpi_physical_address address,
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acpi_size length, char *name);
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acpi_status
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acpi_os_invalidate_address(u8 space_id, acpi_physical_address address,
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acpi_size length);
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u64 acpi_os_get_timer(void);
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acpi_status acpi_os_signal(u32 function, void *info);
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+30
-4
@@ -47,7 +47,7 @@
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/* Current ACPICA subsystem version in YYYYMMDD format */
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#define ACPI_CA_VERSION 0x20110623
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#define ACPI_CA_VERSION 0x20120111
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#include "actypes.h"
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#include "actbl.h"
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@@ -66,7 +66,7 @@ extern u8 acpi_gbl_create_osi_method;
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extern u8 acpi_gbl_use_default_register_widths;
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extern acpi_name acpi_gbl_trace_method_name;
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extern u32 acpi_gbl_trace_flags;
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extern u32 acpi_gbl_enable_aml_debug_object;
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extern bool acpi_gbl_enable_aml_debug_object;
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extern u8 acpi_gbl_copy_dsdt_locally;
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extern u8 acpi_gbl_truncate_io_addresses;
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extern u8 acpi_gbl_disable_auto_repair;
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@@ -74,6 +74,7 @@ extern u8 acpi_gbl_disable_auto_repair;
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extern u32 acpi_current_gpe_count;
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extern struct acpi_table_fadt acpi_gbl_FADT;
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extern u8 acpi_gbl_system_awake_and_running;
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extern u8 acpi_gbl_reduced_hardware; /* ACPI 5.0 */
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extern u32 acpi_rsdt_forced;
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/*
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@@ -111,6 +112,11 @@ acpi_status acpi_install_interface(acpi_string interface_name);
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acpi_status acpi_remove_interface(acpi_string interface_name);
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u32
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acpi_check_address_range(acpi_adr_space_type space_id,
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acpi_physical_address address,
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acpi_size length, u8 warn);
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/*
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* ACPI Memory management
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*/
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@@ -276,12 +282,23 @@ acpi_status acpi_install_exception_handler(acpi_exception_handler handler);
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acpi_status acpi_install_interface_handler(acpi_interface_handler handler);
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/*
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* Event interfaces
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* Global Lock interfaces
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*/
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acpi_status acpi_acquire_global_lock(u16 timeout, u32 * handle);
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acpi_status acpi_release_global_lock(u32 handle);
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/*
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* Interfaces to AML mutex objects
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*/
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acpi_status
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acpi_acquire_mutex(acpi_handle handle, acpi_string pathname, u16 timeout);
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acpi_status acpi_release_mutex(acpi_handle handle, acpi_string pathname);
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/*
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* Fixed Event interfaces
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*/
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acpi_status acpi_enable_event(u32 event, u32 flags);
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acpi_status acpi_disable_event(u32 event, u32 flags);
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@@ -291,7 +308,7 @@ acpi_status acpi_clear_event(u32 event);
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acpi_status acpi_get_event_status(u32 event, acpi_event_status * event_status);
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/*
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* GPE Interfaces
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* General Purpose Event (GPE) Interfaces
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*/
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acpi_status acpi_enable_gpe(acpi_handle gpe_device, u32 gpe_number);
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@@ -345,6 +362,10 @@ acpi_status
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acpi_get_possible_resources(acpi_handle device, struct acpi_buffer *ret_buffer);
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#endif
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acpi_status
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acpi_get_event_resources(acpi_handle device_handle,
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struct acpi_buffer *ret_buffer);
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acpi_status
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acpi_walk_resources(acpi_handle device,
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char *name,
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@@ -360,6 +381,11 @@ acpi_status
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acpi_resource_to_address64(struct acpi_resource *resource,
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struct acpi_resource_address64 *out);
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acpi_status
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acpi_buffer_to_resource(u8 *aml_buffer,
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u16 aml_buffer_length,
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struct acpi_resource **resource_ptr);
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/*
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* Hardware (ACPI device) interfaces
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*/
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+203
-4
@@ -61,11 +61,14 @@ typedef u32 acpi_rsdesc_size; /* Max Resource Descriptor size is (Length+3) = (6
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#define ACPI_WRITE_COMBINING_MEMORY (u8) 0x02
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#define ACPI_PREFETCHABLE_MEMORY (u8) 0x03
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/*! [Begin] no source code translation */
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/*
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* IO Attributes
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* The ISA IO ranges are: n000-n0_fFh, n400-n4_fFh, n800-n8_fFh, n_c00-n_cFFh.
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* The non-ISA IO ranges are: n100-n3_fFh, n500-n7_fFh, n900-n_bFFh, n_cd0-n_fFFh.
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* The ISA IO ranges are: n000-n0FFh, n400-n4FFh, n800-n8FFh, nC00-nCFFh.
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* The non-ISA IO ranges are: n100-n3FFh, n500-n7FFh, n900-nBFFh, nCD0-nFFFh.
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*/
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/*! [End] no source code translation !*/
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#define ACPI_NON_ISA_ONLY_RANGES (u8) 0x01
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#define ACPI_ISA_ONLY_RANGES (u8) 0x02
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#define ACPI_ENTIRE_RANGE (ACPI_NON_ISA_ONLY_RANGES | ACPI_ISA_ONLY_RANGES)
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@@ -81,16 +84,26 @@ typedef u32 acpi_rsdesc_size; /* Max Resource Descriptor size is (Length+3) = (6
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#define ACPI_DECODE_16 (u8) 0x01 /* 16-bit IO address decode */
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/*
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* IRQ Attributes
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* Interrupt attributes - used in multiple descriptors
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*/
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/* Triggering */
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#define ACPI_LEVEL_SENSITIVE (u8) 0x00
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#define ACPI_EDGE_SENSITIVE (u8) 0x01
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/* Polarity */
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#define ACPI_ACTIVE_HIGH (u8) 0x00
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#define ACPI_ACTIVE_LOW (u8) 0x01
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#define ACPI_ACTIVE_BOTH (u8) 0x02
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/* Sharing */
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#define ACPI_EXCLUSIVE (u8) 0x00
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#define ACPI_SHARED (u8) 0x01
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#define ACPI_EXCLUSIVE_AND_WAKE (u8) 0x02
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#define ACPI_SHARED_AND_WAKE (u8) 0x03
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/*
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* DMA Attributes
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@@ -127,6 +140,8 @@ typedef u32 acpi_rsdesc_size; /* Max Resource Descriptor size is (Length+3) = (6
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#define ACPI_POS_DECODE (u8) 0x00
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#define ACPI_SUB_DECODE (u8) 0x01
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/* Producer/Consumer */
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#define ACPI_PRODUCER (u8) 0x00
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#define ACPI_CONSUMER (u8) 0x01
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@@ -192,6 +207,21 @@ struct acpi_resource_fixed_io {
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u8 address_length;
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};
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struct acpi_resource_fixed_dma {
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u16 request_lines;
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u16 channels;
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u8 width;
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};
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/* Values for Width field above */
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#define ACPI_DMA_WIDTH8 0
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#define ACPI_DMA_WIDTH16 1
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#define ACPI_DMA_WIDTH32 2
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#define ACPI_DMA_WIDTH64 3
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#define ACPI_DMA_WIDTH128 4
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#define ACPI_DMA_WIDTH256 5
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struct acpi_resource_vendor {
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u16 byte_length;
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u8 byte_data[1];
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@@ -329,6 +359,166 @@ struct acpi_resource_generic_register {
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u64 address;
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};
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struct acpi_resource_gpio {
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u8 revision_id;
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u8 connection_type;
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u8 producer_consumer; /* For values, see Producer/Consumer above */
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u8 pin_config;
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u8 sharable; /* For values, see Interrupt Attributes above */
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u8 io_restriction;
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u8 triggering; /* For values, see Interrupt Attributes above */
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u8 polarity; /* For values, see Interrupt Attributes above */
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u16 drive_strength;
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u16 debounce_timeout;
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u16 pin_table_length;
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u16 vendor_length;
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struct acpi_resource_source resource_source;
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u16 *pin_table;
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u8 *vendor_data;
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};
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/* Values for GPIO connection_type field above */
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#define ACPI_RESOURCE_GPIO_TYPE_INT 0
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#define ACPI_RESOURCE_GPIO_TYPE_IO 1
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/* Values for pin_config field above */
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#define ACPI_PIN_CONFIG_DEFAULT 0
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#define ACPI_PIN_CONFIG_PULLUP 1
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#define ACPI_PIN_CONFIG_PULLDOWN 2
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#define ACPI_PIN_CONFIG_NOPULL 3
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/* Values for io_restriction field above */
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#define ACPI_IO_RESTRICT_NONE 0
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#define ACPI_IO_RESTRICT_INPUT 1
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#define ACPI_IO_RESTRICT_OUTPUT 2
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#define ACPI_IO_RESTRICT_NONE_PRESERVE 3
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/* Common structure for I2C, SPI, and UART serial descriptors */
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#define ACPI_RESOURCE_SERIAL_COMMON \
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u8 revision_id; \
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u8 type; \
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u8 producer_consumer; /* For values, see Producer/Consumer above */\
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u8 slave_mode; \
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u8 type_revision_id; \
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u16 type_data_length; \
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u16 vendor_length; \
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struct acpi_resource_source resource_source; \
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u8 *vendor_data;
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struct acpi_resource_common_serialbus {
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ACPI_RESOURCE_SERIAL_COMMON};
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/* Values for the Type field above */
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#define ACPI_RESOURCE_SERIAL_TYPE_I2C 1
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#define ACPI_RESOURCE_SERIAL_TYPE_SPI 2
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#define ACPI_RESOURCE_SERIAL_TYPE_UART 3
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/* Values for slave_mode field above */
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#define ACPI_CONTROLLER_INITIATED 0
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#define ACPI_DEVICE_INITIATED 1
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struct acpi_resource_i2c_serialbus {
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ACPI_RESOURCE_SERIAL_COMMON u8 access_mode;
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u16 slave_address;
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u32 connection_speed;
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};
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/* Values for access_mode field above */
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#define ACPI_I2C_7BIT_MODE 0
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#define ACPI_I2C_10BIT_MODE 1
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struct acpi_resource_spi_serialbus {
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ACPI_RESOURCE_SERIAL_COMMON u8 wire_mode;
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u8 device_polarity;
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u8 data_bit_length;
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u8 clock_phase;
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u8 clock_polarity;
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u16 device_selection;
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u32 connection_speed;
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};
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/* Values for wire_mode field above */
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#define ACPI_SPI_4WIRE_MODE 0
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#define ACPI_SPI_3WIRE_MODE 1
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/* Values for device_polarity field above */
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#define ACPI_SPI_ACTIVE_LOW 0
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#define ACPI_SPI_ACTIVE_HIGH 1
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/* Values for clock_phase field above */
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#define ACPI_SPI_FIRST_PHASE 0
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#define ACPI_SPI_SECOND_PHASE 1
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/* Values for clock_polarity field above */
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#define ACPI_SPI_START_LOW 0
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#define ACPI_SPI_START_HIGH 1
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struct acpi_resource_uart_serialbus {
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ACPI_RESOURCE_SERIAL_COMMON u8 endian;
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u8 data_bits;
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u8 stop_bits;
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u8 flow_control;
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u8 parity;
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u8 lines_enabled;
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u16 rx_fifo_size;
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u16 tx_fifo_size;
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u32 default_baud_rate;
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};
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/* Values for Endian field above */
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#define ACPI_UART_LITTLE_ENDIAN 0
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#define ACPI_UART_BIG_ENDIAN 1
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/* Values for data_bits field above */
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#define ACPI_UART_5_DATA_BITS 0
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#define ACPI_UART_6_DATA_BITS 1
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#define ACPI_UART_7_DATA_BITS 2
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#define ACPI_UART_8_DATA_BITS 3
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#define ACPI_UART_9_DATA_BITS 4
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/* Values for stop_bits field above */
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#define ACPI_UART_NO_STOP_BITS 0
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#define ACPI_UART_1_STOP_BIT 1
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#define ACPI_UART_1P5_STOP_BITS 2
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#define ACPI_UART_2_STOP_BITS 3
|
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|
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/* Values for flow_control field above */
|
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|
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#define ACPI_UART_FLOW_CONTROL_NONE 0
|
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#define ACPI_UART_FLOW_CONTROL_HW 1
|
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#define ACPI_UART_FLOW_CONTROL_XON_XOFF 2
|
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|
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/* Values for Parity field above */
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#define ACPI_UART_PARITY_NONE 0
|
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#define ACPI_UART_PARITY_EVEN 1
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#define ACPI_UART_PARITY_ODD 2
|
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#define ACPI_UART_PARITY_MARK 3
|
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#define ACPI_UART_PARITY_SPACE 4
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|
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/* Values for lines_enabled bitfield above */
|
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|
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#define ACPI_UART_CARRIER_DETECT (1<<2)
|
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#define ACPI_UART_RING_INDICATOR (1<<3)
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#define ACPI_UART_DATA_SET_READY (1<<4)
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#define ACPI_UART_DATA_TERMINAL_READY (1<<5)
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#define ACPI_UART_CLEAR_TO_SEND (1<<6)
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#define ACPI_UART_REQUEST_TO_SEND (1<<7)
|
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|
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/* ACPI_RESOURCE_TYPEs */
|
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|
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#define ACPI_RESOURCE_TYPE_IRQ 0
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@@ -348,7 +538,10 @@ struct acpi_resource_generic_register {
|
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#define ACPI_RESOURCE_TYPE_EXTENDED_ADDRESS64 14 /* ACPI 3.0 */
|
||||
#define ACPI_RESOURCE_TYPE_EXTENDED_IRQ 15
|
||||
#define ACPI_RESOURCE_TYPE_GENERIC_REGISTER 16
|
||||
#define ACPI_RESOURCE_TYPE_MAX 16
|
||||
#define ACPI_RESOURCE_TYPE_GPIO 17 /* ACPI 5.0 */
|
||||
#define ACPI_RESOURCE_TYPE_FIXED_DMA 18 /* ACPI 5.0 */
|
||||
#define ACPI_RESOURCE_TYPE_SERIAL_BUS 19 /* ACPI 5.0 */
|
||||
#define ACPI_RESOURCE_TYPE_MAX 19
|
||||
|
||||
/* Master union for resource descriptors */
|
||||
|
||||
@@ -358,6 +551,7 @@ union acpi_resource_data {
|
||||
struct acpi_resource_start_dependent start_dpf;
|
||||
struct acpi_resource_io io;
|
||||
struct acpi_resource_fixed_io fixed_io;
|
||||
struct acpi_resource_fixed_dma fixed_dma;
|
||||
struct acpi_resource_vendor vendor;
|
||||
struct acpi_resource_vendor_typed vendor_typed;
|
||||
struct acpi_resource_end_tag end_tag;
|
||||
@@ -370,6 +564,11 @@ union acpi_resource_data {
|
||||
struct acpi_resource_extended_address64 ext_address64;
|
||||
struct acpi_resource_extended_irq extended_irq;
|
||||
struct acpi_resource_generic_register generic_reg;
|
||||
struct acpi_resource_gpio gpio;
|
||||
struct acpi_resource_i2c_serialbus i2c_serial_bus;
|
||||
struct acpi_resource_spi_serialbus spi_serial_bus;
|
||||
struct acpi_resource_uart_serialbus uart_serial_bus;
|
||||
struct acpi_resource_common_serialbus common_serial_bus;
|
||||
|
||||
/* Common fields */
|
||||
|
||||
|
||||
+17
-6
@@ -255,6 +255,8 @@ struct acpi_table_fadt {
|
||||
struct acpi_generic_address xpm_timer_block; /* 64-bit Extended Power Mgt Timer Ctrl Reg Blk address */
|
||||
struct acpi_generic_address xgpe0_block; /* 64-bit Extended General Purpose Event 0 Reg Blk address */
|
||||
struct acpi_generic_address xgpe1_block; /* 64-bit Extended General Purpose Event 1 Reg Blk address */
|
||||
struct acpi_generic_address sleep_control; /* 64-bit Sleep Control register */
|
||||
struct acpi_generic_address sleep_status; /* 64-bit Sleep Status register */
|
||||
};
|
||||
|
||||
/* Masks for FADT Boot Architecture Flags (boot_flags) */
|
||||
@@ -264,6 +266,7 @@ struct acpi_table_fadt {
|
||||
#define ACPI_FADT_NO_VGA (1<<2) /* 02: [V4] It is not safe to probe for VGA hardware */
|
||||
#define ACPI_FADT_NO_MSI (1<<3) /* 03: [V4] Message Signaled Interrupts (MSI) must not be enabled */
|
||||
#define ACPI_FADT_NO_ASPM (1<<4) /* 04: [V4] PCIe ASPM control must not be enabled */
|
||||
#define ACPI_FADT_NO_CMOS_RTC (1<<5) /* 05: [V5] No CMOS real-time clock present */
|
||||
|
||||
#define FADT2_REVISION_ID 3
|
||||
|
||||
@@ -289,6 +292,8 @@ struct acpi_table_fadt {
|
||||
#define ACPI_FADT_REMOTE_POWER_ON (1<<17) /* 17: [V4] System is compatible with remote power on (ACPI 3.0) */
|
||||
#define ACPI_FADT_APIC_CLUSTER (1<<18) /* 18: [V4] All local APICs must use cluster model (ACPI 3.0) */
|
||||
#define ACPI_FADT_APIC_PHYSICAL (1<<19) /* 19: [V4] All local x_aPICs must use physical dest mode (ACPI 3.0) */
|
||||
#define ACPI_FADT_HW_REDUCED (1<<20) /* 20: [V5] ACPI hardware is not implemented (ACPI 5.0) */
|
||||
#define ACPI_FADT_LOW_POWER_S0 (1<<21) /* 21: [V5] S0 power savings are equal or better than S3 (ACPI 5.0) */
|
||||
|
||||
/* Values for preferred_profile (Preferred Power Management Profiles) */
|
||||
|
||||
@@ -299,14 +304,16 @@ enum acpi_prefered_pm_profiles {
|
||||
PM_WORKSTATION = 3,
|
||||
PM_ENTERPRISE_SERVER = 4,
|
||||
PM_SOHO_SERVER = 5,
|
||||
PM_APPLIANCE_PC = 6
|
||||
PM_APPLIANCE_PC = 6,
|
||||
PM_PERFORMANCE_SERVER = 7,
|
||||
PM_TABLET = 8
|
||||
};
|
||||
|
||||
/* Reset to default packing */
|
||||
|
||||
#pragma pack()
|
||||
|
||||
#define ACPI_FADT_OFFSET(f) (u8) ACPI_OFFSET (struct acpi_table_fadt, f)
|
||||
#define ACPI_FADT_OFFSET(f) (u16) ACPI_OFFSET (struct acpi_table_fadt, f)
|
||||
|
||||
/*
|
||||
* Internal table-related structures
|
||||
@@ -342,6 +349,7 @@ struct acpi_table_desc {
|
||||
|
||||
#include <acpi/actbl1.h>
|
||||
#include <acpi/actbl2.h>
|
||||
#include <acpi/actbl3.h>
|
||||
|
||||
/*
|
||||
* Sizes of the various flavors of FADT. We need to look closely
|
||||
@@ -351,12 +359,15 @@ struct acpi_table_desc {
|
||||
* FADT is the bottom line as to what the version really is.
|
||||
*
|
||||
* For reference, the values below are as follows:
|
||||
* FADT V1 size: 0x74
|
||||
* FADT V2 size: 0x84
|
||||
* FADT V3+ size: 0xF4
|
||||
* FADT V1 size: 0x074
|
||||
* FADT V2 size: 0x084
|
||||
* FADT V3 size: 0x0F4
|
||||
* FADT V4 size: 0x0F4
|
||||
* FADT V5 size: 0x10C
|
||||
*/
|
||||
#define ACPI_FADT_V1_SIZE (u32) (ACPI_FADT_OFFSET (flags) + 4)
|
||||
#define ACPI_FADT_V2_SIZE (u32) (ACPI_FADT_OFFSET (reserved4[0]) + 3)
|
||||
#define ACPI_FADT_V3_SIZE (u32) (sizeof (struct acpi_table_fadt))
|
||||
#define ACPI_FADT_V3_SIZE (u32) (ACPI_FADT_OFFSET (sleep_control))
|
||||
#define ACPI_FADT_V5_SIZE (u32) (sizeof (struct acpi_table_fadt))
|
||||
|
||||
#endif /* __ACTBL_H__ */
|
||||
|
||||
+53
-4
@@ -228,7 +228,8 @@ enum acpi_einj_actions {
|
||||
ACPI_EINJ_EXECUTE_OPERATION = 5,
|
||||
ACPI_EINJ_CHECK_BUSY_STATUS = 6,
|
||||
ACPI_EINJ_GET_COMMAND_STATUS = 7,
|
||||
ACPI_EINJ_ACTION_RESERVED = 8, /* 8 and greater are reserved */
|
||||
ACPI_EINJ_SET_ERROR_TYPE_WITH_ADDRESS = 8,
|
||||
ACPI_EINJ_ACTION_RESERVED = 9, /* 9 and greater are reserved */
|
||||
ACPI_EINJ_TRIGGER_ERROR = 0xFF /* Except for this value */
|
||||
};
|
||||
|
||||
@@ -240,7 +241,27 @@ enum acpi_einj_instructions {
|
||||
ACPI_EINJ_WRITE_REGISTER = 2,
|
||||
ACPI_EINJ_WRITE_REGISTER_VALUE = 3,
|
||||
ACPI_EINJ_NOOP = 4,
|
||||
ACPI_EINJ_INSTRUCTION_RESERVED = 5 /* 5 and greater are reserved */
|
||||
ACPI_EINJ_FLUSH_CACHELINE = 5,
|
||||
ACPI_EINJ_INSTRUCTION_RESERVED = 6 /* 6 and greater are reserved */
|
||||
};
|
||||
|
||||
struct acpi_einj_error_type_with_addr {
|
||||
u32 error_type;
|
||||
u32 vendor_struct_offset;
|
||||
u32 flags;
|
||||
u32 apic_id;
|
||||
u64 address;
|
||||
u64 range;
|
||||
u32 pcie_id;
|
||||
};
|
||||
|
||||
struct acpi_einj_vendor {
|
||||
u32 length;
|
||||
u32 pcie_id;
|
||||
u16 vendor_id;
|
||||
u16 device_id;
|
||||
u8 revision_id;
|
||||
u8 reserved[3];
|
||||
};
|
||||
|
||||
/* EINJ Trigger Error Action Table */
|
||||
@@ -275,6 +296,7 @@ enum acpi_einj_command_status {
|
||||
#define ACPI_EINJ_PLATFORM_CORRECTABLE (1<<9)
|
||||
#define ACPI_EINJ_PLATFORM_UNCORRECTABLE (1<<10)
|
||||
#define ACPI_EINJ_PLATFORM_FATAL (1<<11)
|
||||
#define ACPI_EINJ_VENDOR_DEFINED (1<<31)
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
@@ -631,7 +653,9 @@ enum acpi_madt_type {
|
||||
ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8,
|
||||
ACPI_MADT_TYPE_LOCAL_X2APIC = 9,
|
||||
ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10,
|
||||
ACPI_MADT_TYPE_RESERVED = 11 /* 11 and greater are reserved */
|
||||
ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11,
|
||||
ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12,
|
||||
ACPI_MADT_TYPE_RESERVED = 13 /* 13 and greater are reserved */
|
||||
};
|
||||
|
||||
/*
|
||||
@@ -752,11 +776,36 @@ struct acpi_madt_local_x2apic_nmi {
|
||||
u8 reserved[3];
|
||||
};
|
||||
|
||||
/* 11: Generic Interrupt (ACPI 5.0) */
|
||||
|
||||
struct acpi_madt_generic_interrupt {
|
||||
struct acpi_subtable_header header;
|
||||
u16 reserved; /* Reserved - must be zero */
|
||||
u32 gic_id;
|
||||
u32 uid;
|
||||
u32 flags;
|
||||
u32 parking_version;
|
||||
u32 performance_interrupt;
|
||||
u64 parked_address;
|
||||
u64 base_address;
|
||||
};
|
||||
|
||||
/* 12: Generic Distributor (ACPI 5.0) */
|
||||
|
||||
struct acpi_madt_generic_distributor {
|
||||
struct acpi_subtable_header header;
|
||||
u16 reserved; /* Reserved - must be zero */
|
||||
u32 gic_id;
|
||||
u64 base_address;
|
||||
u32 global_irq_base;
|
||||
u32 reserved2; /* Reserved - must be zero */
|
||||
};
|
||||
|
||||
/*
|
||||
* Common flags fields for MADT subtables
|
||||
*/
|
||||
|
||||
/* MADT Local APIC flags (lapic_flags) */
|
||||
/* MADT Local APIC flags (lapic_flags) and GIC flags */
|
||||
|
||||
#define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */
|
||||
|
||||
|
||||
@@ -0,0 +1,552 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Name: actbl3.h - ACPI Table Definitions
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
/*
|
||||
* Copyright (C) 2000 - 2011, Intel Corp.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions, and the following disclaimer,
|
||||
* without modification.
|
||||
* 2. Redistributions in binary form must reproduce at minimum a disclaimer
|
||||
* substantially similar to the "NO WARRANTY" disclaimer below
|
||||
* ("Disclaimer") and any redistribution must be conditioned upon
|
||||
* including a substantially similar Disclaimer requirement for further
|
||||
* binary redistribution.
|
||||
* 3. Neither the names of the above-listed copyright holders nor the names
|
||||
* of any contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* Alternatively, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") version 2 as published by the Free
|
||||
* Software Foundation.
|
||||
*
|
||||
* NO WARRANTY
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
|
||||
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGES.
|
||||
*/
|
||||
|
||||
#ifndef __ACTBL3_H__
|
||||
#define __ACTBL3_H__
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* Additional ACPI Tables (3)
|
||||
*
|
||||
* These tables are not consumed directly by the ACPICA subsystem, but are
|
||||
* included here to support device drivers and the AML disassembler.
|
||||
*
|
||||
* The tables in this file are fully defined within the ACPI specification.
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/*
|
||||
* Values for description table header signatures for tables defined in this
|
||||
* file. Useful because they make it more difficult to inadvertently type in
|
||||
* the wrong signature.
|
||||
*/
|
||||
#define ACPI_SIG_BGRT "BGRT" /* Boot Graphics Resource Table */
|
||||
#define ACPI_SIG_DRTM "DRTM" /* Dynamic Root of Trust for Measurement table */
|
||||
#define ACPI_SIG_FPDT "FPDT" /* Firmware Performance Data Table */
|
||||
#define ACPI_SIG_GTDT "GTDT" /* Generic Timer Description Table */
|
||||
#define ACPI_SIG_MPST "MPST" /* Memory Power State Table */
|
||||
#define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */
|
||||
#define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */
|
||||
#define ACPI_SIG_RASF "RASF" /* RAS Feature table */
|
||||
|
||||
#define ACPI_SIG_S3PT "S3PT" /* S3 Performance (sub)Table */
|
||||
#define ACPI_SIG_PCCS "PCC" /* PCC Shared Memory Region */
|
||||
|
||||
/* Reserved table signatures */
|
||||
|
||||
#define ACPI_SIG_CSRT "CSRT" /* Core System Resources Table */
|
||||
#define ACPI_SIG_DBG2 "DBG2" /* Debug Port table 2 */
|
||||
#define ACPI_SIG_MATR "MATR" /* Memory Address Translation Table */
|
||||
#define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */
|
||||
#define ACPI_SIG_WPBT "WPBT" /* Windows Platform Binary Table */
|
||||
|
||||
/*
|
||||
* All tables must be byte-packed to match the ACPI specification, since
|
||||
* the tables are provided by the system BIOS.
|
||||
*/
|
||||
#pragma pack(1)
|
||||
|
||||
/*
|
||||
* Note about bitfields: The u8 type is used for bitfields in ACPI tables.
|
||||
* This is the only type that is even remotely portable. Anything else is not
|
||||
* portable, so do not use any other bitfield types.
|
||||
*/
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* BGRT - Boot Graphics Resource Table (ACPI 5.0)
|
||||
* Version 1
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
struct acpi_table_bgrt {
|
||||
struct acpi_table_header header; /* Common ACPI table header */
|
||||
u16 version;
|
||||
u8 status;
|
||||
u8 image_type;
|
||||
u64 image_address;
|
||||
u32 image_offset_x;
|
||||
u32 image_offset_y;
|
||||
};
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* DRTM - Dynamic Root of Trust for Measurement table
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
struct acpi_table_drtm {
|
||||
struct acpi_table_header header; /* Common ACPI table header */
|
||||
u64 entry_base_address;
|
||||
u64 entry_length;
|
||||
u32 entry_address32;
|
||||
u64 entry_address64;
|
||||
u64 exit_address;
|
||||
u64 log_area_address;
|
||||
u32 log_area_length;
|
||||
u64 arch_dependent_address;
|
||||
u32 flags;
|
||||
};
|
||||
|
||||
/* 1) Validated Tables List */
|
||||
|
||||
struct acpi_drtm_vtl_list {
|
||||
u32 validated_table_list_count;
|
||||
};
|
||||
|
||||
/* 2) Resources List */
|
||||
|
||||
struct acpi_drtm_resource_list {
|
||||
u32 resource_list_count;
|
||||
};
|
||||
|
||||
/* 3) Platform-specific Identifiers List */
|
||||
|
||||
struct acpi_drtm_id_list {
|
||||
u32 id_list_count;
|
||||
};
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* FPDT - Firmware Performance Data Table (ACPI 5.0)
|
||||
* Version 1
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
struct acpi_table_fpdt {
|
||||
struct acpi_table_header header; /* Common ACPI table header */
|
||||
};
|
||||
|
||||
/* FPDT subtable header */
|
||||
|
||||
struct acpi_fpdt_header {
|
||||
u16 type;
|
||||
u8 length;
|
||||
u8 revision;
|
||||
};
|
||||
|
||||
/* Values for Type field above */
|
||||
|
||||
enum acpi_fpdt_type {
|
||||
ACPI_FPDT_TYPE_BOOT = 0,
|
||||
ACPI_FPDT_TYPE_S3PERF = 1,
|
||||
};
|
||||
|
||||
/*
|
||||
* FPDT subtables
|
||||
*/
|
||||
|
||||
/* 0: Firmware Basic Boot Performance Record */
|
||||
|
||||
struct acpi_fpdt_boot {
|
||||
struct acpi_fpdt_header header;
|
||||
u8 reserved[4];
|
||||
u64 reset_end;
|
||||
u64 load_start;
|
||||
u64 startup_start;
|
||||
u64 exit_services_entry;
|
||||
u64 exit_services_exit;
|
||||
};
|
||||
|
||||
/* 1: S3 Performance Table Pointer Record */
|
||||
|
||||
struct acpi_fpdt_s3pt_ptr {
|
||||
struct acpi_fpdt_header header;
|
||||
u8 reserved[4];
|
||||
u64 address;
|
||||
};
|
||||
|
||||
/*
|
||||
* S3PT - S3 Performance Table. This table is pointed to by the
|
||||
* FPDT S3 Pointer Record above.
|
||||
*/
|
||||
struct acpi_table_s3pt {
|
||||
u8 signature[4]; /* "S3PT" */
|
||||
u32 length;
|
||||
};
|
||||
|
||||
/*
|
||||
* S3PT Subtables
|
||||
*/
|
||||
struct acpi_s3pt_header {
|
||||
u16 type;
|
||||
u8 length;
|
||||
u8 revision;
|
||||
};
|
||||
|
||||
/* Values for Type field above */
|
||||
|
||||
enum acpi_s3pt_type {
|
||||
ACPI_S3PT_TYPE_RESUME = 0,
|
||||
ACPI_S3PT_TYPE_SUSPEND = 1,
|
||||
};
|
||||
|
||||
struct acpi_s3pt_resume {
|
||||
struct acpi_s3pt_header header;
|
||||
u32 resume_count;
|
||||
u64 full_resume;
|
||||
u64 average_resume;
|
||||
};
|
||||
|
||||
struct acpi_s3pt_suspend {
|
||||
struct acpi_s3pt_header header;
|
||||
u64 suspend_start;
|
||||
u64 suspend_end;
|
||||
};
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* GTDT - Generic Timer Description Table (ACPI 5.0)
|
||||
* Version 1
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
struct acpi_table_gtdt {
|
||||
struct acpi_table_header header; /* Common ACPI table header */
|
||||
u64 address;
|
||||
u32 flags;
|
||||
u32 secure_pl1_interrupt;
|
||||
u32 secure_pl1_flags;
|
||||
u32 non_secure_pl1_interrupt;
|
||||
u32 non_secure_pl1_flags;
|
||||
u32 virtual_timer_interrupt;
|
||||
u32 virtual_timer_flags;
|
||||
u32 non_secure_pl2_interrupt;
|
||||
u32 non_secure_pl2_flags;
|
||||
};
|
||||
|
||||
/* Values for Flags field above */
|
||||
|
||||
#define ACPI_GTDT_MAPPED_BLOCK_PRESENT 1
|
||||
|
||||
/* Values for all "TimerFlags" fields above */
|
||||
|
||||
#define ACPI_GTDT_INTERRUPT_MODE 1
|
||||
#define ACPI_GTDT_INTERRUPT_POLARITY 2
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* MPST - Memory Power State Table (ACPI 5.0)
|
||||
* Version 1
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#define ACPI_MPST_CHANNEL_INFO \
|
||||
u16 reserved1; \
|
||||
u8 channel_id; \
|
||||
u8 reserved2; \
|
||||
u16 power_node_count;
|
||||
|
||||
/* Main table */
|
||||
|
||||
struct acpi_table_mpst {
|
||||
struct acpi_table_header header; /* Common ACPI table header */
|
||||
ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
|
||||
};
|
||||
|
||||
/* Memory Platform Communication Channel Info */
|
||||
|
||||
struct acpi_mpst_channel {
|
||||
ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
|
||||
};
|
||||
|
||||
/* Memory Power Node Structure */
|
||||
|
||||
struct acpi_mpst_power_node {
|
||||
u8 flags;
|
||||
u8 reserved1;
|
||||
u16 node_id;
|
||||
u32 length;
|
||||
u64 range_address;
|
||||
u64 range_length;
|
||||
u8 num_power_states;
|
||||
u8 num_physical_components;
|
||||
u16 reserved2;
|
||||
};
|
||||
|
||||
/* Values for Flags field above */
|
||||
|
||||
#define ACPI_MPST_ENABLED 1
|
||||
#define ACPI_MPST_POWER_MANAGED 2
|
||||
#define ACPI_MPST_HOT_PLUG_CAPABLE 4
|
||||
|
||||
/* Memory Power State Structure (follows POWER_NODE above) */
|
||||
|
||||
struct acpi_mpst_power_state {
|
||||
u8 power_state;
|
||||
u8 info_index;
|
||||
};
|
||||
|
||||
/* Physical Component ID Structure (follows POWER_STATE above) */
|
||||
|
||||
struct acpi_mpst_component {
|
||||
u16 component_id;
|
||||
};
|
||||
|
||||
/* Memory Power State Characteristics Structure (follows all POWER_NODEs) */
|
||||
|
||||
struct acpi_mpst_data_hdr {
|
||||
u16 characteristics_count;
|
||||
};
|
||||
|
||||
struct acpi_mpst_power_data {
|
||||
u8 revision;
|
||||
u8 flags;
|
||||
u16 reserved1;
|
||||
u32 average_power;
|
||||
u32 power_saving;
|
||||
u64 exit_latency;
|
||||
u64 reserved2;
|
||||
};
|
||||
|
||||
/* Values for Flags field above */
|
||||
|
||||
#define ACPI_MPST_PRESERVE 1
|
||||
#define ACPI_MPST_AUTOENTRY 2
|
||||
#define ACPI_MPST_AUTOEXIT 4
|
||||
|
||||
/* Shared Memory Region (not part of an ACPI table) */
|
||||
|
||||
struct acpi_mpst_shared {
|
||||
u32 signature;
|
||||
u16 pcc_command;
|
||||
u16 pcc_status;
|
||||
u16 command_register;
|
||||
u16 status_register;
|
||||
u16 power_state_id;
|
||||
u16 power_node_id;
|
||||
u64 energy_consumed;
|
||||
u64 average_power;
|
||||
};
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* PCCT - Platform Communications Channel Table (ACPI 5.0)
|
||||
* Version 1
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
struct acpi_table_pcct {
|
||||
struct acpi_table_header header; /* Common ACPI table header */
|
||||
u32 flags;
|
||||
u32 latency;
|
||||
u32 reserved;
|
||||
};
|
||||
|
||||
/* Values for Flags field above */
|
||||
|
||||
#define ACPI_PCCT_DOORBELL 1
|
||||
|
||||
/*
|
||||
* PCCT subtables
|
||||
*/
|
||||
|
||||
/* 0: Generic Communications Subspace */
|
||||
|
||||
struct acpi_pcct_subspace {
|
||||
struct acpi_subtable_header header;
|
||||
u8 reserved[6];
|
||||
u64 base_address;
|
||||
u64 length;
|
||||
struct acpi_generic_address doorbell_register;
|
||||
u64 preserve_mask;
|
||||
u64 write_mask;
|
||||
};
|
||||
|
||||
/*
|
||||
* PCC memory structures (not part of the ACPI table)
|
||||
*/
|
||||
|
||||
/* Shared Memory Region */
|
||||
|
||||
struct acpi_pcct_shared_memory {
|
||||
u32 signature;
|
||||
u16 command;
|
||||
u16 status;
|
||||
};
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* PMTT - Platform Memory Topology Table (ACPI 5.0)
|
||||
* Version 1
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
struct acpi_table_pmtt {
|
||||
struct acpi_table_header header; /* Common ACPI table header */
|
||||
u32 reserved;
|
||||
};
|
||||
|
||||
/* Common header for PMTT subtables that follow main table */
|
||||
|
||||
struct acpi_pmtt_header {
|
||||
u8 type;
|
||||
u8 reserved1;
|
||||
u16 length;
|
||||
u16 flags;
|
||||
u16 reserved2;
|
||||
};
|
||||
|
||||
/* Values for Type field above */
|
||||
|
||||
#define ACPI_PMTT_TYPE_SOCKET 0
|
||||
#define ACPI_PMTT_TYPE_CONTROLLER 1
|
||||
#define ACPI_PMTT_TYPE_DIMM 2
|
||||
#define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFF are reserved */
|
||||
|
||||
/* Values for Flags field above */
|
||||
|
||||
#define ACPI_PMTT_TOP_LEVEL 0x0001
|
||||
#define ACPI_PMTT_PHYSICAL 0x0002
|
||||
#define ACPI_PMTT_MEMORY_TYPE 0x000C
|
||||
|
||||
/*
|
||||
* PMTT subtables, correspond to Type in struct acpi_pmtt_header
|
||||
*/
|
||||
|
||||
/* 0: Socket Structure */
|
||||
|
||||
struct acpi_pmtt_socket {
|
||||
struct acpi_pmtt_header header;
|
||||
u16 socket_id;
|
||||
u16 reserved;
|
||||
};
|
||||
|
||||
/* 1: Memory Controller subtable */
|
||||
|
||||
struct acpi_pmtt_controller {
|
||||
struct acpi_pmtt_header header;
|
||||
u32 read_latency;
|
||||
u32 write_latency;
|
||||
u32 read_bandwidth;
|
||||
u32 write_bandwidth;
|
||||
u16 access_width;
|
||||
u16 alignment;
|
||||
u16 reserved;
|
||||
u16 domain_count;
|
||||
};
|
||||
|
||||
/* 1a: Proximity Domain substructure */
|
||||
|
||||
struct acpi_pmtt_domain {
|
||||
u32 proximity_domain;
|
||||
};
|
||||
|
||||
/* 2: Physical Component Identifier (DIMM) */
|
||||
|
||||
struct acpi_pmtt_physical_component {
|
||||
struct acpi_pmtt_header header;
|
||||
u16 component_id;
|
||||
u16 reserved;
|
||||
u32 memory_size;
|
||||
u32 bios_handle;
|
||||
};
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* RASF - RAS Feature Table (ACPI 5.0)
|
||||
* Version 1
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
struct acpi_table_rasf {
|
||||
struct acpi_table_header header; /* Common ACPI table header */
|
||||
u8 channel_id[12];
|
||||
};
|
||||
|
||||
/* RASF Platform Communication Channel Shared Memory Region */
|
||||
|
||||
struct acpi_rasf_shared_memory {
|
||||
u32 signature;
|
||||
u16 command;
|
||||
u16 status;
|
||||
u64 requested_address;
|
||||
u64 requested_length;
|
||||
u64 actual_address;
|
||||
u64 actual_length;
|
||||
u16 flags;
|
||||
u8 speed;
|
||||
};
|
||||
|
||||
/* Masks for Flags and Speed fields above */
|
||||
|
||||
#define ACPI_RASF_SCRUBBER_RUNNING 1
|
||||
#define ACPI_RASF_SPEED (7<<1)
|
||||
|
||||
/* Channel Commands */
|
||||
|
||||
enum acpi_rasf_commands {
|
||||
ACPI_RASF_GET_RAS_CAPABILITIES = 1,
|
||||
ACPI_RASF_GET_PATROL_PARAMETERS = 2,
|
||||
ACPI_RASF_START_PATROL_SCRUBBER = 3,
|
||||
ACPI_RASF_STOP_PATROL_SCRUBBER = 4
|
||||
};
|
||||
|
||||
/* Channel Command flags */
|
||||
|
||||
#define ACPI_RASF_GENERATE_SCI (1<<15)
|
||||
|
||||
/* Status values */
|
||||
|
||||
enum acpi_rasf_status {
|
||||
ACPI_RASF_SUCCESS = 0,
|
||||
ACPI_RASF_NOT_VALID = 1,
|
||||
ACPI_RASF_NOT_SUPPORTED = 2,
|
||||
ACPI_RASF_BUSY = 3,
|
||||
ACPI_RASF_FAILED = 4,
|
||||
ACPI_RASF_ABORTED = 5,
|
||||
ACPI_RASF_INVALID_DATA = 6
|
||||
};
|
||||
|
||||
/* Status flags */
|
||||
|
||||
#define ACPI_RASF_COMMAND_COMPLETE (1)
|
||||
#define ACPI_RASF_SCI_DOORBELL (1<<1)
|
||||
#define ACPI_RASF_ERROR (1<<2)
|
||||
#define ACPI_RASF_STATUS (0x1F<<3)
|
||||
|
||||
/* Reset to default packing */
|
||||
|
||||
#pragma pack()
|
||||
|
||||
#endif /* __ACTBL3_H__ */
|
||||
+11
-1
@@ -712,8 +712,10 @@ typedef u8 acpi_adr_space_type;
|
||||
#define ACPI_ADR_SPACE_CMOS (acpi_adr_space_type) 5
|
||||
#define ACPI_ADR_SPACE_PCI_BAR_TARGET (acpi_adr_space_type) 6
|
||||
#define ACPI_ADR_SPACE_IPMI (acpi_adr_space_type) 7
|
||||
#define ACPI_ADR_SPACE_GPIO (acpi_adr_space_type) 8
|
||||
#define ACPI_ADR_SPACE_GSBUS (acpi_adr_space_type) 9
|
||||
|
||||
#define ACPI_NUM_PREDEFINED_REGIONS 8
|
||||
#define ACPI_NUM_PREDEFINED_REGIONS 10
|
||||
|
||||
/*
|
||||
* Special Address Spaces
|
||||
@@ -957,6 +959,14 @@ acpi_status(*acpi_adr_space_handler) (u32 function,
|
||||
|
||||
#define ACPI_DEFAULT_HANDLER NULL
|
||||
|
||||
/* Special Context data for generic_serial_bus/general_purpose_io (ACPI 5.0) */
|
||||
|
||||
struct acpi_connection_info {
|
||||
u8 *connection;
|
||||
u16 length;
|
||||
u8 access_length;
|
||||
};
|
||||
|
||||
typedef
|
||||
acpi_status(*acpi_adr_space_setup) (acpi_handle region_handle,
|
||||
u32 function,
|
||||
|
||||
+2
-2
@@ -16,10 +16,10 @@
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
extern int hest_disable;
|
||||
extern bool hest_disable;
|
||||
extern int erst_disable;
|
||||
#ifdef CONFIG_ACPI_APEI_GHES
|
||||
extern int ghes_disable;
|
||||
extern bool ghes_disable;
|
||||
#else
|
||||
#define ghes_disable 1
|
||||
#endif
|
||||
|
||||
@@ -177,6 +177,10 @@ extern int gpio_request_one(unsigned gpio, unsigned long flags, const char *labe
|
||||
extern int gpio_request_array(const struct gpio *array, size_t num);
|
||||
extern void gpio_free_array(const struct gpio *array, size_t num);
|
||||
|
||||
/* bindings for managed devices that want to request gpios */
|
||||
int devm_gpio_request(struct device *dev, unsigned gpio, const char *label);
|
||||
void devm_gpio_free(struct device *dev, unsigned int gpio);
|
||||
|
||||
#ifdef CONFIG_GPIO_SYSFS
|
||||
|
||||
/*
|
||||
|
||||
@@ -1,12 +1,6 @@
|
||||
#ifndef __ASM_GENERIC_PARAM_H
|
||||
#define __ASM_GENERIC_PARAM_H
|
||||
|
||||
#ifdef __KERNEL__
|
||||
# define HZ CONFIG_HZ /* Internal kernel timer frequency */
|
||||
# define USER_HZ 100 /* some user interfaces are */
|
||||
# define CLOCKS_PER_SEC (USER_HZ) /* in "ticks" like times() */
|
||||
#endif
|
||||
|
||||
#ifndef HZ
|
||||
#define HZ 100
|
||||
#endif
|
||||
@@ -21,4 +15,11 @@
|
||||
|
||||
#define MAXHOSTNAMELEN 64 /* max length of hostname */
|
||||
|
||||
#ifdef __KERNEL__
|
||||
# undef HZ
|
||||
# define HZ CONFIG_HZ /* Internal kernel timer frequency */
|
||||
# define USER_HZ 100 /* some user interfaces are */
|
||||
# define CLOCKS_PER_SEC (USER_HZ) /* in "ticks" like times() */
|
||||
#endif
|
||||
|
||||
#endif /* __ASM_GENERIC_PARAM_H */
|
||||
|
||||
@@ -453,7 +453,7 @@ struct drm_encoder_funcs {
|
||||
#define DRM_CONNECTOR_MAX_UMODES 16
|
||||
#define DRM_CONNECTOR_MAX_PROPERTY 16
|
||||
#define DRM_CONNECTOR_LEN 32
|
||||
#define DRM_CONNECTOR_MAX_ENCODER 2
|
||||
#define DRM_CONNECTOR_MAX_ENCODER 3
|
||||
|
||||
/**
|
||||
* drm_encoder - central DRM encoder structure
|
||||
|
||||
@@ -17,7 +17,7 @@
|
||||
|
||||
/*****************************************************************************/
|
||||
/*
|
||||
* the payload for a key of type "user"
|
||||
* the payload for a key of type "user" or "logon"
|
||||
* - once filled in and attached to a key:
|
||||
* - the payload struct is invariant may not be changed, only replaced
|
||||
* - the payload must be read with RCU procedures or with the key semaphore
|
||||
@@ -33,6 +33,7 @@ struct user_key_payload {
|
||||
};
|
||||
|
||||
extern struct key_type key_type_user;
|
||||
extern struct key_type key_type_logon;
|
||||
|
||||
extern int user_instantiate(struct key *key, const void *data, size_t datalen);
|
||||
extern int user_update(struct key *key, const void *data, size_t datalen);
|
||||
|
||||
@@ -146,6 +146,9 @@ extern void acct_exit_ns(struct pid_namespace *);
|
||||
*
|
||||
*/
|
||||
|
||||
#undef ACCT_VERSION
|
||||
#undef AHZ
|
||||
|
||||
#ifdef CONFIG_BSD_PROCESS_ACCT_V3
|
||||
#define ACCT_VERSION 3
|
||||
#define AHZ 100
|
||||
|
||||
+14
-6
@@ -310,6 +310,11 @@ extern acpi_status acpi_pci_osc_control_set(acpi_handle handle,
|
||||
u32 *mask, u32 req);
|
||||
extern void acpi_early_init(void);
|
||||
|
||||
extern int acpi_nvs_register(__u64 start, __u64 size);
|
||||
|
||||
extern int acpi_nvs_for_each_region(int (*func)(__u64, __u64, void *),
|
||||
void *data);
|
||||
|
||||
#else /* !CONFIG_ACPI */
|
||||
|
||||
#define acpi_disabled 1
|
||||
@@ -352,15 +357,18 @@ static inline int acpi_table_parse(char *id,
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
#endif /* !CONFIG_ACPI */
|
||||
|
||||
#ifdef CONFIG_ACPI_SLEEP
|
||||
int suspend_nvs_register(unsigned long start, unsigned long size);
|
||||
#else
|
||||
static inline int suspend_nvs_register(unsigned long a, unsigned long b)
|
||||
static inline int acpi_nvs_register(__u64 start, __u64 size)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static inline int acpi_nvs_for_each_region(int (*func)(__u64, __u64, void *),
|
||||
void *data)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
#endif /* !CONFIG_ACPI */
|
||||
|
||||
#endif /*_LINUX_ACPI_H*/
|
||||
|
||||
@@ -12,4 +12,7 @@ static inline void __iomem *acpi_os_ioremap(acpi_physical_address phys,
|
||||
|
||||
void __iomem *acpi_os_get_iomem(acpi_physical_address phys, unsigned int size);
|
||||
|
||||
int acpi_os_map_generic_address(struct acpi_generic_address *addr);
|
||||
void acpi_os_unmap_generic_address(struct acpi_generic_address *addr);
|
||||
|
||||
#endif
|
||||
|
||||
@@ -30,6 +30,7 @@ struct dma_chan;
|
||||
* @cd_invert: true if the gpio_cd pin value is active low
|
||||
* @capabilities: the capabilities of the block as implemented in
|
||||
* this platform, signify anything MMC_CAP_* from mmc/host.h
|
||||
* @capabilities2: more capabilities, MMC_CAP2_* from mmc/host.h
|
||||
* @dma_filter: function used to select an appropriate RX and TX
|
||||
* DMA channel to be used for DMA, if and only if you're deploying the
|
||||
* generic DMA engine
|
||||
@@ -52,6 +53,7 @@ struct mmci_platform_data {
|
||||
int gpio_cd;
|
||||
bool cd_invert;
|
||||
unsigned long capabilities;
|
||||
unsigned long capabilities2;
|
||||
bool (*dma_filter)(struct dma_chan *chan, void *filter_param);
|
||||
void *dma_rx_param;
|
||||
void *dma_tx_param;
|
||||
|
||||
@@ -7,7 +7,7 @@ struct pl061_platform_data {
|
||||
unsigned gpio_base;
|
||||
|
||||
/* number of the first IRQ.
|
||||
* If the IRQ functionality in not desired this must be set to NO_IRQ.
|
||||
* If the IRQ functionality in not desired this must be set to 0.
|
||||
*/
|
||||
unsigned irq_base;
|
||||
|
||||
|
||||
@@ -134,7 +134,7 @@ struct pl08x_txd {
|
||||
struct dma_async_tx_descriptor tx;
|
||||
struct list_head node;
|
||||
struct list_head dsg_list;
|
||||
enum dma_data_direction direction;
|
||||
enum dma_transfer_direction direction;
|
||||
dma_addr_t llis_bus;
|
||||
struct pl08x_lli *llis_va;
|
||||
/* Default cctl value for LLIs */
|
||||
@@ -197,7 +197,7 @@ struct pl08x_dma_chan {
|
||||
dma_addr_t dst_addr;
|
||||
u32 src_cctl;
|
||||
u32 dst_cctl;
|
||||
enum dma_data_direction runtime_direction;
|
||||
enum dma_transfer_direction runtime_direction;
|
||||
dma_cookie_t lc;
|
||||
struct list_head pend_list;
|
||||
struct pl08x_txd *at;
|
||||
|
||||
+96
-20
@@ -26,6 +26,7 @@
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/elf-em.h>
|
||||
#include <linux/ptrace.h>
|
||||
|
||||
/* The netlink messages for the audit system is divided into blocks:
|
||||
* 1000 - 1099 are for commanding the audit system
|
||||
@@ -181,6 +182,40 @@
|
||||
* AUDIT_UNUSED_BITS is updated if need be. */
|
||||
#define AUDIT_UNUSED_BITS 0x07FFFC00
|
||||
|
||||
/* AUDIT_FIELD_COMPARE rule list */
|
||||
#define AUDIT_COMPARE_UID_TO_OBJ_UID 1
|
||||
#define AUDIT_COMPARE_GID_TO_OBJ_GID 2
|
||||
#define AUDIT_COMPARE_EUID_TO_OBJ_UID 3
|
||||
#define AUDIT_COMPARE_EGID_TO_OBJ_GID 4
|
||||
#define AUDIT_COMPARE_AUID_TO_OBJ_UID 5
|
||||
#define AUDIT_COMPARE_SUID_TO_OBJ_UID 6
|
||||
#define AUDIT_COMPARE_SGID_TO_OBJ_GID 7
|
||||
#define AUDIT_COMPARE_FSUID_TO_OBJ_UID 8
|
||||
#define AUDIT_COMPARE_FSGID_TO_OBJ_GID 9
|
||||
|
||||
#define AUDIT_COMPARE_UID_TO_AUID 10
|
||||
#define AUDIT_COMPARE_UID_TO_EUID 11
|
||||
#define AUDIT_COMPARE_UID_TO_FSUID 12
|
||||
#define AUDIT_COMPARE_UID_TO_SUID 13
|
||||
|
||||
#define AUDIT_COMPARE_AUID_TO_FSUID 14
|
||||
#define AUDIT_COMPARE_AUID_TO_SUID 15
|
||||
#define AUDIT_COMPARE_AUID_TO_EUID 16
|
||||
|
||||
#define AUDIT_COMPARE_EUID_TO_SUID 17
|
||||
#define AUDIT_COMPARE_EUID_TO_FSUID 18
|
||||
|
||||
#define AUDIT_COMPARE_SUID_TO_FSUID 19
|
||||
|
||||
#define AUDIT_COMPARE_GID_TO_EGID 20
|
||||
#define AUDIT_COMPARE_GID_TO_FSGID 21
|
||||
#define AUDIT_COMPARE_GID_TO_SGID 22
|
||||
|
||||
#define AUDIT_COMPARE_EGID_TO_FSGID 23
|
||||
#define AUDIT_COMPARE_EGID_TO_SGID 24
|
||||
#define AUDIT_COMPARE_SGID_TO_FSGID 25
|
||||
|
||||
#define AUDIT_MAX_FIELD_COMPARE AUDIT_COMPARE_SGID_TO_FSGID
|
||||
|
||||
/* Rule fields */
|
||||
/* These are useful when checking the
|
||||
@@ -222,6 +257,9 @@
|
||||
#define AUDIT_PERM 106
|
||||
#define AUDIT_DIR 107
|
||||
#define AUDIT_FILETYPE 108
|
||||
#define AUDIT_OBJ_UID 109
|
||||
#define AUDIT_OBJ_GID 110
|
||||
#define AUDIT_FIELD_COMPARE 111
|
||||
|
||||
#define AUDIT_ARG0 200
|
||||
#define AUDIT_ARG1 (AUDIT_ARG0+1)
|
||||
@@ -408,28 +446,24 @@ struct audit_field {
|
||||
void *lsm_rule;
|
||||
};
|
||||
|
||||
#define AUDITSC_INVALID 0
|
||||
#define AUDITSC_SUCCESS 1
|
||||
#define AUDITSC_FAILURE 2
|
||||
#define AUDITSC_RESULT(x) ( ((long)(x))<0?AUDITSC_FAILURE:AUDITSC_SUCCESS )
|
||||
extern int __init audit_register_class(int class, unsigned *list);
|
||||
extern int audit_classify_syscall(int abi, unsigned syscall);
|
||||
extern int audit_classify_arch(int arch);
|
||||
#ifdef CONFIG_AUDITSYSCALL
|
||||
/* These are defined in auditsc.c */
|
||||
/* Public API */
|
||||
extern void audit_finish_fork(struct task_struct *child);
|
||||
extern int audit_alloc(struct task_struct *task);
|
||||
extern void audit_free(struct task_struct *task);
|
||||
extern void audit_syscall_entry(int arch,
|
||||
int major, unsigned long a0, unsigned long a1,
|
||||
unsigned long a2, unsigned long a3);
|
||||
extern void audit_syscall_exit(int failed, long return_code);
|
||||
extern void __audit_free(struct task_struct *task);
|
||||
extern void __audit_syscall_entry(int arch,
|
||||
int major, unsigned long a0, unsigned long a1,
|
||||
unsigned long a2, unsigned long a3);
|
||||
extern void __audit_syscall_exit(int ret_success, long ret_value);
|
||||
extern void __audit_getname(const char *name);
|
||||
extern void audit_putname(const char *name);
|
||||
extern void __audit_inode(const char *name, const struct dentry *dentry);
|
||||
extern void __audit_inode_child(const struct dentry *dentry,
|
||||
const struct inode *parent);
|
||||
extern void __audit_seccomp(unsigned long syscall);
|
||||
extern void __audit_ptrace(struct task_struct *t);
|
||||
|
||||
static inline int audit_dummy_context(void)
|
||||
@@ -437,6 +471,27 @@ static inline int audit_dummy_context(void)
|
||||
void *p = current->audit_context;
|
||||
return !p || *(int *)p;
|
||||
}
|
||||
static inline void audit_free(struct task_struct *task)
|
||||
{
|
||||
if (unlikely(task->audit_context))
|
||||
__audit_free(task);
|
||||
}
|
||||
static inline void audit_syscall_entry(int arch, int major, unsigned long a0,
|
||||
unsigned long a1, unsigned long a2,
|
||||
unsigned long a3)
|
||||
{
|
||||
if (unlikely(!audit_dummy_context()))
|
||||
__audit_syscall_entry(arch, major, a0, a1, a2, a3);
|
||||
}
|
||||
static inline void audit_syscall_exit(void *pt_regs)
|
||||
{
|
||||
if (unlikely(current->audit_context)) {
|
||||
int success = is_syscall_success(pt_regs);
|
||||
int return_code = regs_return_value(pt_regs);
|
||||
|
||||
__audit_syscall_exit(success, return_code);
|
||||
}
|
||||
}
|
||||
static inline void audit_getname(const char *name)
|
||||
{
|
||||
if (unlikely(!audit_dummy_context()))
|
||||
@@ -453,6 +508,12 @@ static inline void audit_inode_child(const struct dentry *dentry,
|
||||
}
|
||||
void audit_core_dumps(long signr);
|
||||
|
||||
static inline void audit_seccomp(unsigned long syscall)
|
||||
{
|
||||
if (unlikely(!audit_dummy_context()))
|
||||
__audit_seccomp(syscall);
|
||||
}
|
||||
|
||||
static inline void audit_ptrace(struct task_struct *t)
|
||||
{
|
||||
if (unlikely(!audit_dummy_context()))
|
||||
@@ -463,17 +524,16 @@ static inline void audit_ptrace(struct task_struct *t)
|
||||
extern unsigned int audit_serial(void);
|
||||
extern int auditsc_get_stamp(struct audit_context *ctx,
|
||||
struct timespec *t, unsigned int *serial);
|
||||
extern int audit_set_loginuid(struct task_struct *task, uid_t loginuid);
|
||||
extern int audit_set_loginuid(uid_t loginuid);
|
||||
#define audit_get_loginuid(t) ((t)->loginuid)
|
||||
#define audit_get_sessionid(t) ((t)->sessionid)
|
||||
extern void audit_log_task_context(struct audit_buffer *ab);
|
||||
extern void __audit_ipc_obj(struct kern_ipc_perm *ipcp);
|
||||
extern void __audit_ipc_set_perm(unsigned long qbytes, uid_t uid, gid_t gid, umode_t mode);
|
||||
extern int audit_bprm(struct linux_binprm *bprm);
|
||||
extern void audit_socketcall(int nargs, unsigned long *args);
|
||||
extern int audit_sockaddr(int len, void *addr);
|
||||
extern int __audit_bprm(struct linux_binprm *bprm);
|
||||
extern void __audit_socketcall(int nargs, unsigned long *args);
|
||||
extern int __audit_sockaddr(int len, void *addr);
|
||||
extern void __audit_fd_pair(int fd1, int fd2);
|
||||
extern int audit_set_macxattr(const char *name);
|
||||
extern void __audit_mq_open(int oflag, umode_t mode, struct mq_attr *attr);
|
||||
extern void __audit_mq_sendrecv(mqd_t mqdes, size_t msg_len, unsigned int msg_prio, const struct timespec *abs_timeout);
|
||||
extern void __audit_mq_notify(mqd_t mqdes, const struct sigevent *notification);
|
||||
@@ -499,6 +559,23 @@ static inline void audit_ipc_set_perm(unsigned long qbytes, uid_t uid, gid_t gid
|
||||
if (unlikely(!audit_dummy_context()))
|
||||
__audit_ipc_set_perm(qbytes, uid, gid, mode);
|
||||
}
|
||||
static inline int audit_bprm(struct linux_binprm *bprm)
|
||||
{
|
||||
if (unlikely(!audit_dummy_context()))
|
||||
return __audit_bprm(bprm);
|
||||
return 0;
|
||||
}
|
||||
static inline void audit_socketcall(int nargs, unsigned long *args)
|
||||
{
|
||||
if (unlikely(!audit_dummy_context()))
|
||||
__audit_socketcall(nargs, args);
|
||||
}
|
||||
static inline int audit_sockaddr(int len, void *addr)
|
||||
{
|
||||
if (unlikely(!audit_dummy_context()))
|
||||
return __audit_sockaddr(len, addr);
|
||||
return 0;
|
||||
}
|
||||
static inline void audit_mq_open(int oflag, umode_t mode, struct mq_attr *attr)
|
||||
{
|
||||
if (unlikely(!audit_dummy_context()))
|
||||
@@ -544,12 +621,11 @@ static inline void audit_mmap_fd(int fd, int flags)
|
||||
|
||||
extern int audit_n_rules;
|
||||
extern int audit_signals;
|
||||
#else
|
||||
#define audit_finish_fork(t)
|
||||
#else /* CONFIG_AUDITSYSCALL */
|
||||
#define audit_alloc(t) ({ 0; })
|
||||
#define audit_free(t) do { ; } while (0)
|
||||
#define audit_syscall_entry(ta,a,b,c,d,e) do { ; } while (0)
|
||||
#define audit_syscall_exit(f,r) do { ; } while (0)
|
||||
#define audit_syscall_exit(r) do { ; } while (0)
|
||||
#define audit_dummy_context() 1
|
||||
#define audit_getname(n) do { ; } while (0)
|
||||
#define audit_putname(n) do { ; } while (0)
|
||||
@@ -558,6 +634,7 @@ extern int audit_signals;
|
||||
#define audit_inode(n,d) do { (void)(d); } while (0)
|
||||
#define audit_inode_child(i,p) do { ; } while (0)
|
||||
#define audit_core_dumps(i) do { ; } while (0)
|
||||
#define audit_seccomp(i) do { ; } while (0)
|
||||
#define auditsc_get_stamp(c,t,s) (0)
|
||||
#define audit_get_loginuid(t) (-1)
|
||||
#define audit_get_sessionid(t) (-1)
|
||||
@@ -568,7 +645,6 @@ extern int audit_signals;
|
||||
#define audit_socketcall(n,a) ((void)0)
|
||||
#define audit_fd_pair(n,a) ((void)0)
|
||||
#define audit_sockaddr(len, addr) ({ 0; })
|
||||
#define audit_set_macxattr(n) do { ; } while (0)
|
||||
#define audit_mq_open(o,m,a) ((void)0)
|
||||
#define audit_mq_sendrecv(d,l,p,t) ((void)0)
|
||||
#define audit_mq_notify(d,n) ((void)0)
|
||||
@@ -579,7 +655,7 @@ extern int audit_signals;
|
||||
#define audit_ptrace(t) ((void)0)
|
||||
#define audit_n_rules 0
|
||||
#define audit_signals 0
|
||||
#endif
|
||||
#endif /* CONFIG_AUDITSYSCALL */
|
||||
|
||||
#ifdef CONFIG_AUDIT
|
||||
/* These are defined in audit.c */
|
||||
|
||||
+53
-13
@@ -515,24 +515,64 @@ extern void bio_integrity_init(void);
|
||||
|
||||
#else /* CONFIG_BLK_DEV_INTEGRITY */
|
||||
|
||||
#define bio_integrity(a) (0)
|
||||
#define bioset_integrity_create(a, b) (0)
|
||||
#define bio_integrity_prep(a) (0)
|
||||
#define bio_integrity_enabled(a) (0)
|
||||
static inline int bio_integrity(struct bio *bio)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline int bio_integrity_enabled(struct bio *bio)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline int bioset_integrity_create(struct bio_set *bs, int pool_size)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline void bioset_integrity_free (struct bio_set *bs)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
static inline int bio_integrity_prep(struct bio *bio)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline void bio_integrity_free(struct bio *bio, struct bio_set *bs)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
static inline int bio_integrity_clone(struct bio *bio, struct bio *bio_src,
|
||||
gfp_t gfp_mask, struct bio_set *bs)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#define bioset_integrity_free(a) do { } while (0)
|
||||
#define bio_integrity_free(a, b) do { } while (0)
|
||||
#define bio_integrity_endio(a, b) do { } while (0)
|
||||
#define bio_integrity_advance(a, b) do { } while (0)
|
||||
#define bio_integrity_trim(a, b, c) do { } while (0)
|
||||
#define bio_integrity_split(a, b, c) do { } while (0)
|
||||
#define bio_integrity_set_tag(a, b, c) do { } while (0)
|
||||
#define bio_integrity_get_tag(a, b, c) do { } while (0)
|
||||
#define bio_integrity_init(a) do { } while (0)
|
||||
|
||||
static inline void bio_integrity_split(struct bio *bio, struct bio_pair *bp,
|
||||
int sectors)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
static inline void bio_integrity_advance(struct bio *bio,
|
||||
unsigned int bytes_done)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
static inline void bio_integrity_trim(struct bio *bio, unsigned int offset,
|
||||
unsigned int sectors)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
static inline void bio_integrity_init(void)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_BLK_DEV_INTEGRITY */
|
||||
|
||||
|
||||
+87
-17
@@ -111,10 +111,14 @@ struct request {
|
||||
* Three pointers are available for the IO schedulers, if they need
|
||||
* more they have to dynamically allocate it. Flush requests are
|
||||
* never put on the IO scheduler. So let the flush fields share
|
||||
* space with the three elevator_private pointers.
|
||||
* space with the elevator data.
|
||||
*/
|
||||
union {
|
||||
void *elevator_private[3];
|
||||
struct {
|
||||
struct io_cq *icq;
|
||||
void *priv[2];
|
||||
} elv;
|
||||
|
||||
struct {
|
||||
unsigned int seq;
|
||||
struct list_head list;
|
||||
@@ -310,6 +314,12 @@ struct request_queue {
|
||||
*/
|
||||
unsigned long queue_flags;
|
||||
|
||||
/*
|
||||
* ida allocated id for this queue. Used to index queues from
|
||||
* ioctx.
|
||||
*/
|
||||
int id;
|
||||
|
||||
/*
|
||||
* queue needs bounce pages for pages above this limit
|
||||
*/
|
||||
@@ -351,6 +361,8 @@ struct request_queue {
|
||||
struct timer_list timeout;
|
||||
struct list_head timeout_list;
|
||||
|
||||
struct list_head icq_list;
|
||||
|
||||
struct queue_limits limits;
|
||||
|
||||
/*
|
||||
@@ -387,6 +399,9 @@ struct request_queue {
|
||||
/* Throttle data */
|
||||
struct throtl_data *td;
|
||||
#endif
|
||||
#ifdef CONFIG_LOCKDEP
|
||||
int ioc_release_depth;
|
||||
#endif
|
||||
};
|
||||
|
||||
#define QUEUE_FLAG_QUEUED 1 /* uses generic tag queueing */
|
||||
@@ -481,6 +496,7 @@ static inline void queue_flag_clear(unsigned int flag, struct request_queue *q)
|
||||
|
||||
#define blk_queue_tagged(q) test_bit(QUEUE_FLAG_QUEUED, &(q)->queue_flags)
|
||||
#define blk_queue_stopped(q) test_bit(QUEUE_FLAG_STOPPED, &(q)->queue_flags)
|
||||
#define blk_queue_dead(q) test_bit(QUEUE_FLAG_DEAD, &(q)->queue_flags)
|
||||
#define blk_queue_nomerges(q) test_bit(QUEUE_FLAG_NOMERGES, &(q)->queue_flags)
|
||||
#define blk_queue_noxmerges(q) \
|
||||
test_bit(QUEUE_FLAG_NOXMERGES, &(q)->queue_flags)
|
||||
@@ -660,7 +676,6 @@ extern void __blk_put_request(struct request_queue *, struct request *);
|
||||
extern struct request *blk_get_request(struct request_queue *, int, gfp_t);
|
||||
extern struct request *blk_make_request(struct request_queue *, struct bio *,
|
||||
gfp_t);
|
||||
extern void blk_insert_request(struct request_queue *, struct request *, int, void *);
|
||||
extern void blk_requeue_request(struct request_queue *, struct request *);
|
||||
extern void blk_add_request_payload(struct request *rq, struct page *page,
|
||||
unsigned int len);
|
||||
@@ -675,6 +690,9 @@ extern int blk_insert_cloned_request(struct request_queue *q,
|
||||
struct request *rq);
|
||||
extern void blk_delay_queue(struct request_queue *, unsigned long);
|
||||
extern void blk_recount_segments(struct request_queue *, struct bio *);
|
||||
extern int scsi_verify_blk_ioctl(struct block_device *, unsigned int);
|
||||
extern int scsi_cmd_blk_ioctl(struct block_device *, fmode_t,
|
||||
unsigned int, void __user *);
|
||||
extern int scsi_cmd_ioctl(struct request_queue *, struct gendisk *, fmode_t,
|
||||
unsigned int, void __user *);
|
||||
extern int sg_scsi_ioctl(struct request_queue *, struct gendisk *, fmode_t,
|
||||
@@ -826,6 +844,7 @@ extern void blk_queue_io_min(struct request_queue *q, unsigned int min);
|
||||
extern void blk_limits_io_opt(struct queue_limits *limits, unsigned int opt);
|
||||
extern void blk_queue_io_opt(struct request_queue *q, unsigned int opt);
|
||||
extern void blk_set_default_limits(struct queue_limits *lim);
|
||||
extern void blk_set_stacking_limits(struct queue_limits *lim);
|
||||
extern int blk_stack_limits(struct queue_limits *t, struct queue_limits *b,
|
||||
sector_t offset);
|
||||
extern int bdev_stack_limits(struct queue_limits *t, struct block_device *bdev,
|
||||
@@ -856,7 +875,7 @@ extern int blk_rq_map_sg(struct request_queue *, struct request *, struct scatte
|
||||
extern void blk_dump_rq_flags(struct request *, char *);
|
||||
extern long nr_blockdev_pages(void);
|
||||
|
||||
int blk_get_queue(struct request_queue *);
|
||||
bool __must_check blk_get_queue(struct request_queue *);
|
||||
struct request_queue *blk_alloc_queue(gfp_t);
|
||||
struct request_queue *blk_alloc_queue_node(gfp_t, int);
|
||||
extern void blk_put_queue(struct request_queue *);
|
||||
@@ -1279,19 +1298,70 @@ queue_max_integrity_segments(struct request_queue *q)
|
||||
|
||||
#else /* CONFIG_BLK_DEV_INTEGRITY */
|
||||
|
||||
#define blk_integrity_rq(rq) (0)
|
||||
#define blk_rq_count_integrity_sg(a, b) (0)
|
||||
#define blk_rq_map_integrity_sg(a, b, c) (0)
|
||||
#define bdev_get_integrity(a) (0)
|
||||
#define blk_get_integrity(a) (0)
|
||||
#define blk_integrity_compare(a, b) (0)
|
||||
#define blk_integrity_register(a, b) (0)
|
||||
#define blk_integrity_unregister(a) do { } while (0)
|
||||
#define blk_queue_max_integrity_segments(a, b) do { } while (0)
|
||||
#define queue_max_integrity_segments(a) (0)
|
||||
#define blk_integrity_merge_rq(a, b, c) (0)
|
||||
#define blk_integrity_merge_bio(a, b, c) (0)
|
||||
#define blk_integrity_is_initialized(a) (0)
|
||||
struct bio;
|
||||
struct block_device;
|
||||
struct gendisk;
|
||||
struct blk_integrity;
|
||||
|
||||
static inline int blk_integrity_rq(struct request *rq)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
static inline int blk_rq_count_integrity_sg(struct request_queue *q,
|
||||
struct bio *b)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
static inline int blk_rq_map_integrity_sg(struct request_queue *q,
|
||||
struct bio *b,
|
||||
struct scatterlist *s)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
static inline struct blk_integrity *bdev_get_integrity(struct block_device *b)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
static inline struct blk_integrity *blk_get_integrity(struct gendisk *disk)
|
||||
{
|
||||
return NULL;
|
||||
}
|
||||
static inline int blk_integrity_compare(struct gendisk *a, struct gendisk *b)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
static inline int blk_integrity_register(struct gendisk *d,
|
||||
struct blk_integrity *b)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
static inline void blk_integrity_unregister(struct gendisk *d)
|
||||
{
|
||||
}
|
||||
static inline void blk_queue_max_integrity_segments(struct request_queue *q,
|
||||
unsigned int segs)
|
||||
{
|
||||
}
|
||||
static inline unsigned short queue_max_integrity_segments(struct request_queue *q)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
static inline int blk_integrity_merge_rq(struct request_queue *rq,
|
||||
struct request *r1,
|
||||
struct request *r2)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
static inline int blk_integrity_merge_bio(struct request_queue *rq,
|
||||
struct request *r,
|
||||
struct bio *b)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
static inline bool blk_integrity_is_initialized(struct gendisk *g)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_BLK_DEV_INTEGRITY */
|
||||
|
||||
|
||||
@@ -380,7 +380,6 @@ struct user_namespace;
|
||||
struct user_namespace *current_user_ns(void);
|
||||
|
||||
extern const kernel_cap_t __cap_empty_set;
|
||||
extern const kernel_cap_t __cap_full_set;
|
||||
extern const kernel_cap_t __cap_init_eff_set;
|
||||
|
||||
/*
|
||||
@@ -544,9 +543,10 @@ extern bool has_capability(struct task_struct *t, int cap);
|
||||
extern bool has_ns_capability(struct task_struct *t,
|
||||
struct user_namespace *ns, int cap);
|
||||
extern bool has_capability_noaudit(struct task_struct *t, int cap);
|
||||
extern bool has_ns_capability_noaudit(struct task_struct *t,
|
||||
struct user_namespace *ns, int cap);
|
||||
extern bool capable(int cap);
|
||||
extern bool ns_capable(struct user_namespace *ns, int cap);
|
||||
extern bool task_ns_capable(struct task_struct *t, int cap);
|
||||
extern bool nsown_capable(int cap);
|
||||
|
||||
/* audit system wants to get cap info from files as well */
|
||||
|
||||
@@ -50,6 +50,11 @@
|
||||
# define inline inline __attribute__((always_inline))
|
||||
# define __inline__ __inline__ __attribute__((always_inline))
|
||||
# define __inline __inline __attribute__((always_inline))
|
||||
#else
|
||||
/* A lot of inline functions can cause havoc with function tracing */
|
||||
# define inline inline notrace
|
||||
# define __inline__ __inline__ notrace
|
||||
# define __inline __inline notrace
|
||||
#endif
|
||||
|
||||
#define __deprecated __attribute__((deprecated))
|
||||
|
||||
@@ -152,7 +152,7 @@ extern int braille_register_console(struct console *, int index,
|
||||
char *console_options, char *braille_options);
|
||||
extern int braille_unregister_console(struct console *);
|
||||
extern void console_sysfs_notify(void);
|
||||
extern int console_suspend_enabled;
|
||||
extern bool console_suspend_enabled;
|
||||
|
||||
/* Suspend and resume console messages over PM events */
|
||||
extern void suspend_console(void);
|
||||
|
||||
@@ -186,7 +186,14 @@ struct cpuidle_governor {
|
||||
extern int cpuidle_register_governor(struct cpuidle_governor *gov);
|
||||
extern void cpuidle_unregister_governor(struct cpuidle_governor *gov);
|
||||
|
||||
#ifdef CONFIG_INTEL_IDLE
|
||||
extern int intel_idle_cpu_init(int cpu);
|
||||
#else
|
||||
static inline int intel_idle_cpu_init(int cpu) { return -1; }
|
||||
#endif
|
||||
|
||||
#else
|
||||
static inline int intel_idle_cpu_init(int cpu) { return -1; }
|
||||
|
||||
static inline int cpuidle_register_governor(struct cpuidle_governor *gov)
|
||||
{return 0;}
|
||||
|
||||
@@ -358,10 +358,12 @@ static inline void put_cred(const struct cred *_cred)
|
||||
#define current_security() (current_cred_xxx(security))
|
||||
|
||||
#ifdef CONFIG_USER_NS
|
||||
#define current_user_ns() (current_cred_xxx(user_ns))
|
||||
#define current_user_ns() (current_cred_xxx(user_ns))
|
||||
#define task_user_ns(task) (task_cred_xxx((task), user_ns))
|
||||
#else
|
||||
extern struct user_namespace init_user_ns;
|
||||
#define current_user_ns() (&init_user_ns)
|
||||
#define current_user_ns() (&init_user_ns)
|
||||
#define task_user_ns(task) (&init_user_ns)
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
@@ -5,6 +5,9 @@
|
||||
* Copyright (C) 1996 Paul Mackerras.
|
||||
*/
|
||||
|
||||
#ifndef _LINUX_CUDA_H
|
||||
#define _LINUX_CUDA_H
|
||||
|
||||
/* CUDA commands (2nd byte) */
|
||||
#define CUDA_WARM_START 0
|
||||
#define CUDA_AUTOPOLL 1
|
||||
@@ -34,3 +37,5 @@ extern int cuda_request(struct adb_request *req,
|
||||
extern void cuda_poll(void);
|
||||
|
||||
#endif /* __KERNEL */
|
||||
|
||||
#endif /* _LINUX_CUDA_H */
|
||||
|
||||
@@ -242,6 +242,7 @@ extern struct dentry * d_alloc(struct dentry *, const struct qstr *);
|
||||
extern struct dentry * d_alloc_pseudo(struct super_block *, const struct qstr *);
|
||||
extern struct dentry * d_splice_alias(struct inode *, struct dentry *);
|
||||
extern struct dentry * d_add_ci(struct dentry *, struct inode *, struct qstr *);
|
||||
extern struct dentry *d_find_any_alias(struct inode *inode);
|
||||
extern struct dentry * d_obtain_alias(struct inode *);
|
||||
extern void shrink_dcache_sb(struct super_block *);
|
||||
extern void shrink_dcache_parent(struct dentry *);
|
||||
|
||||
+10
-5
@@ -279,11 +279,11 @@ struct device *driver_find_device(struct device_driver *drv,
|
||||
|
||||
/**
|
||||
* struct subsys_interface - interfaces to device functions
|
||||
* @name name of the device function
|
||||
* @subsystem subsytem of the devices to attach to
|
||||
* @node the list of functions registered at the subsystem
|
||||
* @add device hookup to device function handler
|
||||
* @remove device hookup to device function handler
|
||||
* @name: name of the device function
|
||||
* @subsys: subsytem of the devices to attach to
|
||||
* @node: the list of functions registered at the subsystem
|
||||
* @add_dev: device hookup to device function handler
|
||||
* @remove_dev: device hookup to device function handler
|
||||
*
|
||||
* Simple interfaces attached to a subsystem. Multiple interfaces can
|
||||
* attach to a subsystem and its devices. Unlike drivers, they do not
|
||||
@@ -612,6 +612,7 @@ struct device_dma_parameters {
|
||||
* @archdata: For arch-specific additions.
|
||||
* @of_node: Associated device tree node.
|
||||
* @devt: For creating the sysfs "dev".
|
||||
* @id: device instance
|
||||
* @devres_lock: Spinlock to protect the resource of the device.
|
||||
* @devres_head: The resources list of the device.
|
||||
* @knode_class: The node used to add the device to the class list.
|
||||
@@ -1003,6 +1004,10 @@ extern long sysfs_deprecated;
|
||||
* Each module may only use this macro once, and calling it replaces
|
||||
* module_init() and module_exit().
|
||||
*
|
||||
* @__driver: driver name
|
||||
* @__register: register function for this driver type
|
||||
* @__unregister: unregister function for this driver type
|
||||
*
|
||||
* Use this macro to construct bus specific macros for registering
|
||||
* drivers, and do not use it on its own.
|
||||
*/
|
||||
|
||||
@@ -46,7 +46,7 @@ struct signature_hdr {
|
||||
char mpi[0];
|
||||
} __packed;
|
||||
|
||||
#if defined(CONFIG_DIGSIG) || defined(CONFIG_DIGSIG_MODULE)
|
||||
#if defined(CONFIG_SIGNATURE) || defined(CONFIG_SIGNATURE_MODULE)
|
||||
|
||||
int digsig_verify(struct key *keyring, const char *sig, int siglen,
|
||||
const char *digest, int digestlen);
|
||||
@@ -59,6 +59,6 @@ static inline int digsig_verify(struct key *keyring, const char *sig,
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_DIGSIG */
|
||||
#endif /* CONFIG_SIGNATURE */
|
||||
|
||||
#endif /* _DIGSIG_H */
|
||||
|
||||
@@ -1,61 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2006 James Simmons <jsimmons@infradead.org>
|
||||
*
|
||||
* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or (at
|
||||
* your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
|
||||
*
|
||||
* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
*/
|
||||
|
||||
#ifndef _LINUX_DISPLAY_H
|
||||
#define _LINUX_DISPLAY_H
|
||||
|
||||
#include <linux/device.h>
|
||||
|
||||
struct display_device;
|
||||
|
||||
/* This structure defines all the properties of a Display. */
|
||||
struct display_driver {
|
||||
int (*set_contrast)(struct display_device *, unsigned int);
|
||||
int (*get_contrast)(struct display_device *);
|
||||
void (*suspend)(struct display_device *, pm_message_t state);
|
||||
void (*resume)(struct display_device *);
|
||||
int (*probe)(struct display_device *, void *);
|
||||
int (*remove)(struct display_device *);
|
||||
int max_contrast;
|
||||
};
|
||||
|
||||
struct display_device {
|
||||
struct module *owner; /* Owner module */
|
||||
struct display_driver *driver;
|
||||
struct device *parent; /* This is the parent */
|
||||
struct device *dev; /* This is this display device */
|
||||
struct mutex lock;
|
||||
void *priv_data;
|
||||
char type[16];
|
||||
char *name;
|
||||
int idx;
|
||||
};
|
||||
|
||||
extern struct display_device *display_device_register(struct display_driver *driver,
|
||||
struct device *dev, void *devdata);
|
||||
extern void display_device_unregister(struct display_device *dev);
|
||||
|
||||
extern int probe_edid(struct display_device *dev, void *devdata);
|
||||
|
||||
#define to_display_device(obj) container_of(obj, struct display_device, class_dev)
|
||||
|
||||
#endif
|
||||
@@ -23,7 +23,6 @@
|
||||
|
||||
#include <linux/device.h>
|
||||
#include <linux/uio.h>
|
||||
#include <linux/dma-direction.h>
|
||||
#include <linux/scatterlist.h>
|
||||
#include <linux/bitmap.h>
|
||||
#include <asm/page.h>
|
||||
@@ -72,11 +71,93 @@ enum dma_transaction_type {
|
||||
DMA_ASYNC_TX,
|
||||
DMA_SLAVE,
|
||||
DMA_CYCLIC,
|
||||
DMA_INTERLEAVE,
|
||||
/* last transaction type for creation of the capabilities mask */
|
||||
DMA_TX_TYPE_END,
|
||||
};
|
||||
|
||||
/* last transaction type for creation of the capabilities mask */
|
||||
#define DMA_TX_TYPE_END (DMA_CYCLIC + 1)
|
||||
/**
|
||||
* enum dma_transfer_direction - dma transfer mode and direction indicator
|
||||
* @DMA_MEM_TO_MEM: Async/Memcpy mode
|
||||
* @DMA_MEM_TO_DEV: Slave mode & From Memory to Device
|
||||
* @DMA_DEV_TO_MEM: Slave mode & From Device to Memory
|
||||
* @DMA_DEV_TO_DEV: Slave mode & From Device to Device
|
||||
*/
|
||||
enum dma_transfer_direction {
|
||||
DMA_MEM_TO_MEM,
|
||||
DMA_MEM_TO_DEV,
|
||||
DMA_DEV_TO_MEM,
|
||||
DMA_DEV_TO_DEV,
|
||||
DMA_TRANS_NONE,
|
||||
};
|
||||
|
||||
/**
|
||||
* Interleaved Transfer Request
|
||||
* ----------------------------
|
||||
* A chunk is collection of contiguous bytes to be transfered.
|
||||
* The gap(in bytes) between two chunks is called inter-chunk-gap(ICG).
|
||||
* ICGs may or maynot change between chunks.
|
||||
* A FRAME is the smallest series of contiguous {chunk,icg} pairs,
|
||||
* that when repeated an integral number of times, specifies the transfer.
|
||||
* A transfer template is specification of a Frame, the number of times
|
||||
* it is to be repeated and other per-transfer attributes.
|
||||
*
|
||||
* Practically, a client driver would have ready a template for each
|
||||
* type of transfer it is going to need during its lifetime and
|
||||
* set only 'src_start' and 'dst_start' before submitting the requests.
|
||||
*
|
||||
*
|
||||
* | Frame-1 | Frame-2 | ~ | Frame-'numf' |
|
||||
* |====....==.===...=...|====....==.===...=...| ~ |====....==.===...=...|
|
||||
*
|
||||
* == Chunk size
|
||||
* ... ICG
|
||||
*/
|
||||
|
||||
/**
|
||||
* struct data_chunk - Element of scatter-gather list that makes a frame.
|
||||
* @size: Number of bytes to read from source.
|
||||
* size_dst := fn(op, size_src), so doesn't mean much for destination.
|
||||
* @icg: Number of bytes to jump after last src/dst address of this
|
||||
* chunk and before first src/dst address for next chunk.
|
||||
* Ignored for dst(assumed 0), if dst_inc is true and dst_sgl is false.
|
||||
* Ignored for src(assumed 0), if src_inc is true and src_sgl is false.
|
||||
*/
|
||||
struct data_chunk {
|
||||
size_t size;
|
||||
size_t icg;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct dma_interleaved_template - Template to convey DMAC the transfer pattern
|
||||
* and attributes.
|
||||
* @src_start: Bus address of source for the first chunk.
|
||||
* @dst_start: Bus address of destination for the first chunk.
|
||||
* @dir: Specifies the type of Source and Destination.
|
||||
* @src_inc: If the source address increments after reading from it.
|
||||
* @dst_inc: If the destination address increments after writing to it.
|
||||
* @src_sgl: If the 'icg' of sgl[] applies to Source (scattered read).
|
||||
* Otherwise, source is read contiguously (icg ignored).
|
||||
* Ignored if src_inc is false.
|
||||
* @dst_sgl: If the 'icg' of sgl[] applies to Destination (scattered write).
|
||||
* Otherwise, destination is filled contiguously (icg ignored).
|
||||
* Ignored if dst_inc is false.
|
||||
* @numf: Number of frames in this template.
|
||||
* @frame_size: Number of chunks in a frame i.e, size of sgl[].
|
||||
* @sgl: Array of {chunk,icg} pairs that make up a frame.
|
||||
*/
|
||||
struct dma_interleaved_template {
|
||||
dma_addr_t src_start;
|
||||
dma_addr_t dst_start;
|
||||
enum dma_transfer_direction dir;
|
||||
bool src_inc;
|
||||
bool dst_inc;
|
||||
bool src_sgl;
|
||||
bool dst_sgl;
|
||||
size_t numf;
|
||||
size_t frame_size;
|
||||
struct data_chunk sgl[0];
|
||||
};
|
||||
|
||||
/**
|
||||
* enum dma_ctrl_flags - DMA flags to augment operation preparation,
|
||||
@@ -269,7 +350,7 @@ enum dma_slave_buswidth {
|
||||
* struct, if applicable.
|
||||
*/
|
||||
struct dma_slave_config {
|
||||
enum dma_data_direction direction;
|
||||
enum dma_transfer_direction direction;
|
||||
dma_addr_t src_addr;
|
||||
dma_addr_t dst_addr;
|
||||
enum dma_slave_buswidth src_addr_width;
|
||||
@@ -433,6 +514,7 @@ struct dma_tx_state {
|
||||
* @device_prep_dma_cyclic: prepare a cyclic dma operation suitable for audio.
|
||||
* The function takes a buffer of size buf_len. The callback function will
|
||||
* be called after period_len bytes have been transferred.
|
||||
* @device_prep_interleaved_dma: Transfer expression in a generic way.
|
||||
* @device_control: manipulate all pending operations on a channel, returns
|
||||
* zero or error code
|
||||
* @device_tx_status: poll for transaction completion, the optional
|
||||
@@ -492,11 +574,14 @@ struct dma_device {
|
||||
|
||||
struct dma_async_tx_descriptor *(*device_prep_slave_sg)(
|
||||
struct dma_chan *chan, struct scatterlist *sgl,
|
||||
unsigned int sg_len, enum dma_data_direction direction,
|
||||
unsigned int sg_len, enum dma_transfer_direction direction,
|
||||
unsigned long flags);
|
||||
struct dma_async_tx_descriptor *(*device_prep_dma_cyclic)(
|
||||
struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
|
||||
size_t period_len, enum dma_data_direction direction);
|
||||
size_t period_len, enum dma_transfer_direction direction);
|
||||
struct dma_async_tx_descriptor *(*device_prep_interleaved_dma)(
|
||||
struct dma_chan *chan, struct dma_interleaved_template *xt,
|
||||
unsigned long flags);
|
||||
int (*device_control)(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
|
||||
unsigned long arg);
|
||||
|
||||
@@ -522,7 +607,7 @@ static inline int dmaengine_slave_config(struct dma_chan *chan,
|
||||
|
||||
static inline struct dma_async_tx_descriptor *dmaengine_prep_slave_single(
|
||||
struct dma_chan *chan, void *buf, size_t len,
|
||||
enum dma_data_direction dir, unsigned long flags)
|
||||
enum dma_transfer_direction dir, unsigned long flags)
|
||||
{
|
||||
struct scatterlist sg;
|
||||
sg_init_one(&sg, buf, len);
|
||||
|
||||
@@ -72,7 +72,7 @@ typedef enum fe_caps {
|
||||
|
||||
struct dvb_frontend_info {
|
||||
char name[128];
|
||||
fe_type_t type;
|
||||
fe_type_t type; /* DEPRECATED. Use DTV_ENUM_DELSYS instead */
|
||||
__u32 frequency_min;
|
||||
__u32 frequency_max;
|
||||
__u32 frequency_stepsize;
|
||||
@@ -181,6 +181,7 @@ typedef enum fe_transmit_mode {
|
||||
TRANSMISSION_MODE_32K,
|
||||
} fe_transmit_mode_t;
|
||||
|
||||
#if defined(__DVB_CORE__) || !defined (__KERNEL__)
|
||||
typedef enum fe_bandwidth {
|
||||
BANDWIDTH_8_MHZ,
|
||||
BANDWIDTH_7_MHZ,
|
||||
@@ -190,7 +191,7 @@ typedef enum fe_bandwidth {
|
||||
BANDWIDTH_10_MHZ,
|
||||
BANDWIDTH_1_712_MHZ,
|
||||
} fe_bandwidth_t;
|
||||
|
||||
#endif
|
||||
|
||||
typedef enum fe_guard_interval {
|
||||
GUARD_INTERVAL_1_32,
|
||||
@@ -213,6 +214,7 @@ typedef enum fe_hierarchy {
|
||||
} fe_hierarchy_t;
|
||||
|
||||
|
||||
#if defined(__DVB_CORE__) || !defined (__KERNEL__)
|
||||
struct dvb_qpsk_parameters {
|
||||
__u32 symbol_rate; /* symbol rate in Symbols per second */
|
||||
fe_code_rate_t fec_inner; /* forward error correction (see above) */
|
||||
@@ -251,11 +253,11 @@ struct dvb_frontend_parameters {
|
||||
} u;
|
||||
};
|
||||
|
||||
|
||||
struct dvb_frontend_event {
|
||||
fe_status_t status;
|
||||
struct dvb_frontend_parameters parameters;
|
||||
};
|
||||
#endif
|
||||
|
||||
/* S2API Commands */
|
||||
#define DTV_UNDEFINED 0
|
||||
@@ -316,7 +318,9 @@ struct dvb_frontend_event {
|
||||
|
||||
#define DTV_DVBT2_PLP_ID 43
|
||||
|
||||
#define DTV_MAX_COMMAND DTV_DVBT2_PLP_ID
|
||||
#define DTV_ENUM_DELSYS 44
|
||||
|
||||
#define DTV_MAX_COMMAND DTV_ENUM_DELSYS
|
||||
|
||||
typedef enum fe_pilot {
|
||||
PILOT_ON,
|
||||
@@ -333,7 +337,7 @@ typedef enum fe_rolloff {
|
||||
|
||||
typedef enum fe_delivery_system {
|
||||
SYS_UNDEFINED,
|
||||
SYS_DVBC_ANNEX_AC,
|
||||
SYS_DVBC_ANNEX_A,
|
||||
SYS_DVBC_ANNEX_B,
|
||||
SYS_DVBT,
|
||||
SYS_DSS,
|
||||
@@ -350,8 +354,13 @@ typedef enum fe_delivery_system {
|
||||
SYS_DAB,
|
||||
SYS_DVBT2,
|
||||
SYS_TURBO,
|
||||
SYS_DVBC_ANNEX_C,
|
||||
} fe_delivery_system_t;
|
||||
|
||||
|
||||
#define SYS_DVBC_ANNEX_AC SYS_DVBC_ANNEX_A
|
||||
|
||||
|
||||
struct dtv_cmds_h {
|
||||
char *name; /* A display name for debugging purposes */
|
||||
|
||||
|
||||
@@ -24,6 +24,6 @@
|
||||
#define _DVBVERSION_H_
|
||||
|
||||
#define DVB_API_VERSION 5
|
||||
#define DVB_API_VERSION_MINOR 4
|
||||
#define DVB_API_VERSION_MINOR 5
|
||||
|
||||
#endif /*_DVBVERSION_H_*/
|
||||
|
||||
@@ -127,7 +127,7 @@ struct dw_cyclic_desc {
|
||||
|
||||
struct dw_cyclic_desc *dw_dma_cyclic_prep(struct dma_chan *chan,
|
||||
dma_addr_t buf_addr, size_t buf_len, size_t period_len,
|
||||
enum dma_data_direction direction);
|
||||
enum dma_transfer_direction direction);
|
||||
void dw_dma_cyclic_free(struct dma_chan *chan);
|
||||
int dw_dma_cyclic_start(struct dma_chan *chan);
|
||||
void dw_dma_cyclic_stop(struct dma_chan *chan);
|
||||
|
||||
+19
-22
@@ -5,6 +5,8 @@
|
||||
|
||||
#ifdef CONFIG_BLOCK
|
||||
|
||||
struct io_cq;
|
||||
|
||||
typedef int (elevator_merge_fn) (struct request_queue *, struct request **,
|
||||
struct bio *);
|
||||
|
||||
@@ -24,6 +26,8 @@ typedef struct request *(elevator_request_list_fn) (struct request_queue *, stru
|
||||
typedef void (elevator_completed_req_fn) (struct request_queue *, struct request *);
|
||||
typedef int (elevator_may_queue_fn) (struct request_queue *, int);
|
||||
|
||||
typedef void (elevator_init_icq_fn) (struct io_cq *);
|
||||
typedef void (elevator_exit_icq_fn) (struct io_cq *);
|
||||
typedef int (elevator_set_req_fn) (struct request_queue *, struct request *, gfp_t);
|
||||
typedef void (elevator_put_req_fn) (struct request *);
|
||||
typedef void (elevator_activate_req_fn) (struct request_queue *, struct request *);
|
||||
@@ -56,6 +60,9 @@ struct elevator_ops
|
||||
elevator_request_list_fn *elevator_former_req_fn;
|
||||
elevator_request_list_fn *elevator_latter_req_fn;
|
||||
|
||||
elevator_init_icq_fn *elevator_init_icq_fn; /* see iocontext.h */
|
||||
elevator_exit_icq_fn *elevator_exit_icq_fn; /* ditto */
|
||||
|
||||
elevator_set_req_fn *elevator_set_req_fn;
|
||||
elevator_put_req_fn *elevator_put_req_fn;
|
||||
|
||||
@@ -63,7 +70,6 @@ struct elevator_ops
|
||||
|
||||
elevator_init_fn *elevator_init_fn;
|
||||
elevator_exit_fn *elevator_exit_fn;
|
||||
void (*trim)(struct io_context *);
|
||||
};
|
||||
|
||||
#define ELV_NAME_MAX (16)
|
||||
@@ -79,11 +85,20 @@ struct elv_fs_entry {
|
||||
*/
|
||||
struct elevator_type
|
||||
{
|
||||
struct list_head list;
|
||||
/* managed by elevator core */
|
||||
struct kmem_cache *icq_cache;
|
||||
|
||||
/* fields provided by elevator implementation */
|
||||
struct elevator_ops ops;
|
||||
size_t icq_size; /* see iocontext.h */
|
||||
size_t icq_align; /* ditto */
|
||||
struct elv_fs_entry *elevator_attrs;
|
||||
char elevator_name[ELV_NAME_MAX];
|
||||
struct module *elevator_owner;
|
||||
|
||||
/* managed by elevator core */
|
||||
char icq_cache_name[ELV_NAME_MAX + 5]; /* elvname + "_io_cq" */
|
||||
struct list_head list;
|
||||
};
|
||||
|
||||
/*
|
||||
@@ -91,10 +106,9 @@ struct elevator_type
|
||||
*/
|
||||
struct elevator_queue
|
||||
{
|
||||
struct elevator_ops *ops;
|
||||
struct elevator_type *type;
|
||||
void *elevator_data;
|
||||
struct kobject kobj;
|
||||
struct elevator_type *elevator_type;
|
||||
struct mutex sysfs_lock;
|
||||
struct hlist_head *hash;
|
||||
unsigned int registered:1;
|
||||
@@ -129,7 +143,7 @@ extern void elv_drain_elevator(struct request_queue *);
|
||||
/*
|
||||
* io scheduler registration
|
||||
*/
|
||||
extern void elv_register(struct elevator_type *);
|
||||
extern int elv_register(struct elevator_type *);
|
||||
extern void elv_unregister(struct elevator_type *);
|
||||
|
||||
/*
|
||||
@@ -197,22 +211,5 @@ enum {
|
||||
INIT_LIST_HEAD(&(rq)->csd.list); \
|
||||
} while (0)
|
||||
|
||||
/*
|
||||
* io context count accounting
|
||||
*/
|
||||
#define elv_ioc_count_mod(name, __val) this_cpu_add(name, __val)
|
||||
#define elv_ioc_count_inc(name) this_cpu_inc(name)
|
||||
#define elv_ioc_count_dec(name) this_cpu_dec(name)
|
||||
|
||||
#define elv_ioc_count_read(name) \
|
||||
({ \
|
||||
unsigned long __val = 0; \
|
||||
int __cpu; \
|
||||
smp_wmb(); \
|
||||
for_each_possible_cpu(__cpu) \
|
||||
__val += per_cpu(name, __cpu); \
|
||||
__val; \
|
||||
})
|
||||
|
||||
#endif /* CONFIG_BLOCK */
|
||||
#endif
|
||||
|
||||
+9
-9
@@ -7,15 +7,6 @@
|
||||
#include <asm/elf.h>
|
||||
#endif
|
||||
|
||||
struct file;
|
||||
|
||||
#ifndef elf_read_implies_exec
|
||||
/* Executables for which elf_read_implies_exec() returns TRUE will
|
||||
have the READ_IMPLIES_EXEC personality flag set automatically.
|
||||
Override in asm/elf.h as needed. */
|
||||
# define elf_read_implies_exec(ex, have_pt_gnu_stack) 0
|
||||
#endif
|
||||
|
||||
/* 32-bit ELF base types. */
|
||||
typedef __u32 Elf32_Addr;
|
||||
typedef __u16 Elf32_Half;
|
||||
@@ -414,6 +405,13 @@ typedef struct elf64_note {
|
||||
} Elf64_Nhdr;
|
||||
|
||||
#ifdef __KERNEL__
|
||||
#ifndef elf_read_implies_exec
|
||||
/* Executables for which elf_read_implies_exec() returns TRUE will
|
||||
have the READ_IMPLIES_EXEC personality flag set automatically.
|
||||
Override in asm/elf.h as needed. */
|
||||
# define elf_read_implies_exec(ex, have_pt_gnu_stack) 0
|
||||
#endif
|
||||
|
||||
#if ELF_CLASS == ELFCLASS32
|
||||
|
||||
extern Elf32_Dyn _DYNAMIC [];
|
||||
@@ -437,6 +435,8 @@ extern Elf64_Dyn _DYNAMIC [];
|
||||
#endif
|
||||
|
||||
/* Optional callbacks to write extra ELF notes. */
|
||||
struct file;
|
||||
|
||||
#ifndef ARCH_HAVE_EXTRA_ELF_NOTES
|
||||
static inline int elf_coredump_extra_notes_size(void) { return 0; }
|
||||
static inline int elf_coredump_extra_notes_write(struct file *file,
|
||||
|
||||
+10
-4
@@ -45,6 +45,7 @@
|
||||
#define FB_TYPE_INTERLEAVED_PLANES 2 /* Interleaved planes */
|
||||
#define FB_TYPE_TEXT 3 /* Text/attributes */
|
||||
#define FB_TYPE_VGA_PLANES 4 /* EGA/VGA planes */
|
||||
#define FB_TYPE_FOURCC 5 /* Type identified by a V4L2 FOURCC */
|
||||
|
||||
#define FB_AUX_TEXT_MDA 0 /* Monochrome text */
|
||||
#define FB_AUX_TEXT_CGA 1 /* CGA/EGA/VGA Color text */
|
||||
@@ -69,6 +70,7 @@
|
||||
#define FB_VISUAL_PSEUDOCOLOR 3 /* Pseudo color (like atari) */
|
||||
#define FB_VISUAL_DIRECTCOLOR 4 /* Direct color */
|
||||
#define FB_VISUAL_STATIC_PSEUDOCOLOR 5 /* Pseudo color readonly */
|
||||
#define FB_VISUAL_FOURCC 6 /* Visual identified by a V4L2 FOURCC */
|
||||
|
||||
#define FB_ACCEL_NONE 0 /* no hardware accelerator */
|
||||
#define FB_ACCEL_ATARIBLITT 1 /* Atari Blitter */
|
||||
@@ -154,6 +156,8 @@
|
||||
|
||||
#define FB_ACCEL_PUV3_UNIGFX 0xa0 /* PKUnity-v3 Unigfx */
|
||||
|
||||
#define FB_CAP_FOURCC 1 /* Device supports FOURCC-based formats */
|
||||
|
||||
struct fb_fix_screeninfo {
|
||||
char id[16]; /* identification string eg "TT Builtin" */
|
||||
unsigned long smem_start; /* Start of frame buffer mem */
|
||||
@@ -171,7 +175,8 @@ struct fb_fix_screeninfo {
|
||||
__u32 mmio_len; /* Length of Memory Mapped I/O */
|
||||
__u32 accel; /* Indicate to driver which */
|
||||
/* specific chip/card we have */
|
||||
__u16 reserved[3]; /* Reserved for future compatibility */
|
||||
__u16 capabilities; /* see FB_CAP_* */
|
||||
__u16 reserved[2]; /* Reserved for future compatibility */
|
||||
};
|
||||
|
||||
/* Interpretation of offset for color fields: All offsets are from the right,
|
||||
@@ -246,8 +251,8 @@ struct fb_var_screeninfo {
|
||||
__u32 yoffset; /* resolution */
|
||||
|
||||
__u32 bits_per_pixel; /* guess what */
|
||||
__u32 grayscale; /* != 0 Graylevels instead of colors */
|
||||
|
||||
__u32 grayscale; /* 0 = color, 1 = grayscale, */
|
||||
/* >1 = FOURCC */
|
||||
struct fb_bitfield red; /* bitfield in fb mem if true color, */
|
||||
struct fb_bitfield green; /* else only length is significant */
|
||||
struct fb_bitfield blue;
|
||||
@@ -273,7 +278,8 @@ struct fb_var_screeninfo {
|
||||
__u32 sync; /* see FB_SYNC_* */
|
||||
__u32 vmode; /* see FB_VMODE_* */
|
||||
__u32 rotate; /* angle we rotate counter clockwise */
|
||||
__u32 reserved[5]; /* Reserved for future compatibility */
|
||||
__u32 colorspace; /* colorspace for FOURCC-based modes */
|
||||
__u32 reserved[4]; /* Reserved for future compatibility */
|
||||
};
|
||||
|
||||
struct fb_cmap {
|
||||
|
||||
+2
-1
@@ -319,6 +319,7 @@ struct inodes_stat_t {
|
||||
#define BLKPBSZGET _IO(0x12,123)
|
||||
#define BLKDISCARDZEROES _IO(0x12,124)
|
||||
#define BLKSECDISCARD _IO(0x12,125)
|
||||
#define BLKROTATIONAL _IO(0x12,126)
|
||||
|
||||
#define BMAP_IOCTL 1 /* obsolete - kept for compatibility */
|
||||
#define FIBMAP _IO(0x00,1) /* bmap access */
|
||||
@@ -395,6 +396,7 @@ struct inodes_stat_t {
|
||||
#include <linux/rculist_bl.h>
|
||||
#include <linux/atomic.h>
|
||||
#include <linux/shrinker.h>
|
||||
#include <linux/migrate_mode.h>
|
||||
|
||||
#include <asm/byteorder.h>
|
||||
|
||||
@@ -525,7 +527,6 @@ enum positive_aop_returns {
|
||||
struct page;
|
||||
struct address_space;
|
||||
struct writeback_control;
|
||||
enum migrate_mode;
|
||||
|
||||
struct iov_iter {
|
||||
const struct iovec *iov;
|
||||
|
||||
+72
-5
@@ -133,6 +133,8 @@ struct ftrace_func_command {
|
||||
int ftrace_arch_code_modify_prepare(void);
|
||||
int ftrace_arch_code_modify_post_process(void);
|
||||
|
||||
void ftrace_bug(int err, unsigned long ip);
|
||||
|
||||
struct seq_file;
|
||||
|
||||
struct ftrace_probe_ops {
|
||||
@@ -161,7 +163,6 @@ extern int ftrace_text_reserved(void *start, void *end);
|
||||
|
||||
enum {
|
||||
FTRACE_FL_ENABLED = (1 << 30),
|
||||
FTRACE_FL_FREE = (1 << 31),
|
||||
};
|
||||
|
||||
#define FTRACE_FL_MASK (0x3UL << 30)
|
||||
@@ -172,10 +173,7 @@ struct dyn_ftrace {
|
||||
unsigned long ip; /* address of mcount call-site */
|
||||
struct dyn_ftrace *freelist;
|
||||
};
|
||||
union {
|
||||
unsigned long flags;
|
||||
struct dyn_ftrace *newlist;
|
||||
};
|
||||
unsigned long flags;
|
||||
struct dyn_arch_ftrace arch;
|
||||
};
|
||||
|
||||
@@ -190,6 +188,56 @@ void ftrace_set_global_notrace(unsigned char *buf, int len, int reset);
|
||||
int register_ftrace_command(struct ftrace_func_command *cmd);
|
||||
int unregister_ftrace_command(struct ftrace_func_command *cmd);
|
||||
|
||||
enum {
|
||||
FTRACE_UPDATE_CALLS = (1 << 0),
|
||||
FTRACE_DISABLE_CALLS = (1 << 1),
|
||||
FTRACE_UPDATE_TRACE_FUNC = (1 << 2),
|
||||
FTRACE_START_FUNC_RET = (1 << 3),
|
||||
FTRACE_STOP_FUNC_RET = (1 << 4),
|
||||
};
|
||||
|
||||
enum {
|
||||
FTRACE_UPDATE_IGNORE,
|
||||
FTRACE_UPDATE_MAKE_CALL,
|
||||
FTRACE_UPDATE_MAKE_NOP,
|
||||
};
|
||||
|
||||
enum {
|
||||
FTRACE_ITER_FILTER = (1 << 0),
|
||||
FTRACE_ITER_NOTRACE = (1 << 1),
|
||||
FTRACE_ITER_PRINTALL = (1 << 2),
|
||||
FTRACE_ITER_DO_HASH = (1 << 3),
|
||||
FTRACE_ITER_HASH = (1 << 4),
|
||||
FTRACE_ITER_ENABLED = (1 << 5),
|
||||
};
|
||||
|
||||
void arch_ftrace_update_code(int command);
|
||||
|
||||
struct ftrace_rec_iter;
|
||||
|
||||
struct ftrace_rec_iter *ftrace_rec_iter_start(void);
|
||||
struct ftrace_rec_iter *ftrace_rec_iter_next(struct ftrace_rec_iter *iter);
|
||||
struct dyn_ftrace *ftrace_rec_iter_record(struct ftrace_rec_iter *iter);
|
||||
|
||||
int ftrace_update_record(struct dyn_ftrace *rec, int enable);
|
||||
int ftrace_test_record(struct dyn_ftrace *rec, int enable);
|
||||
void ftrace_run_stop_machine(int command);
|
||||
int ftrace_location(unsigned long ip);
|
||||
|
||||
extern ftrace_func_t ftrace_trace_function;
|
||||
|
||||
int ftrace_regex_open(struct ftrace_ops *ops, int flag,
|
||||
struct inode *inode, struct file *file);
|
||||
ssize_t ftrace_filter_write(struct file *file, const char __user *ubuf,
|
||||
size_t cnt, loff_t *ppos);
|
||||
ssize_t ftrace_notrace_write(struct file *file, const char __user *ubuf,
|
||||
size_t cnt, loff_t *ppos);
|
||||
loff_t ftrace_regex_lseek(struct file *file, loff_t offset, int origin);
|
||||
int ftrace_regex_release(struct inode *inode, struct file *file);
|
||||
|
||||
void __init
|
||||
ftrace_set_early_filter(struct ftrace_ops *ops, char *buf, int enable);
|
||||
|
||||
/* defined in arch */
|
||||
extern int ftrace_ip_converted(unsigned long ip);
|
||||
extern int ftrace_dyn_arch_init(void *data);
|
||||
@@ -284,6 +332,25 @@ static inline int ftrace_text_reserved(void *start, void *end)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Again users of functions that have ftrace_ops may not
|
||||
* have them defined when ftrace is not enabled, but these
|
||||
* functions may still be called. Use a macro instead of inline.
|
||||
*/
|
||||
#define ftrace_regex_open(ops, flag, inod, file) ({ -ENODEV; })
|
||||
#define ftrace_set_early_filter(ops, buf, enable) do { } while (0)
|
||||
|
||||
static inline ssize_t ftrace_filter_write(struct file *file, const char __user *ubuf,
|
||||
size_t cnt, loff_t *ppos) { return -ENODEV; }
|
||||
static inline ssize_t ftrace_notrace_write(struct file *file, const char __user *ubuf,
|
||||
size_t cnt, loff_t *ppos) { return -ENODEV; }
|
||||
static inline loff_t ftrace_regex_lseek(struct file *file, loff_t offset, int origin)
|
||||
{
|
||||
return -ENODEV;
|
||||
}
|
||||
static inline int
|
||||
ftrace_regex_release(struct inode *inode, struct file *file) { return -ENODEV; }
|
||||
#endif /* CONFIG_DYNAMIC_FTRACE */
|
||||
|
||||
/* totally disable ftrace - can not re-enable after this */
|
||||
|
||||
@@ -22,6 +22,8 @@
|
||||
#define GFS2_LIVE_LOCK 1
|
||||
#define GFS2_TRANS_LOCK 2
|
||||
#define GFS2_RENAME_LOCK 3
|
||||
#define GFS2_CONTROL_LOCK 4
|
||||
#define GFS2_MOUNTED_LOCK 5
|
||||
|
||||
/* Format numbers for various metadata types */
|
||||
|
||||
|
||||
@@ -652,10 +652,12 @@ struct twl4030_power_data {
|
||||
unsigned num;
|
||||
struct twl4030_resconfig *resource_config;
|
||||
#define TWL4030_RESCONFIG_UNDEF ((u8)-1)
|
||||
bool use_poweroff; /* Board is wired for TWL poweroff */
|
||||
};
|
||||
|
||||
extern void twl4030_power_init(struct twl4030_power_data *triton2_scripts);
|
||||
extern int twl4030_remove_script(u8 flags);
|
||||
extern void twl4030_power_off(void);
|
||||
|
||||
struct twl4030_codec_data {
|
||||
unsigned int digimic_delay; /* in ms */
|
||||
|
||||
@@ -46,6 +46,10 @@ struct team_port {
|
||||
u32 speed;
|
||||
u8 duplex;
|
||||
|
||||
/* Custom gennetlink interface related flags */
|
||||
bool changed;
|
||||
bool removed;
|
||||
|
||||
struct rcu_head rcu;
|
||||
};
|
||||
|
||||
@@ -72,6 +76,10 @@ struct team_option {
|
||||
enum team_option_type type;
|
||||
int (*getter)(struct team *team, void *arg);
|
||||
int (*setter)(struct team *team, void *arg);
|
||||
|
||||
/* Custom gennetlink interface related flags */
|
||||
bool changed;
|
||||
bool removed;
|
||||
};
|
||||
|
||||
struct team_mode {
|
||||
@@ -207,6 +215,7 @@ enum {
|
||||
TEAM_ATTR_OPTION_CHANGED, /* flag */
|
||||
TEAM_ATTR_OPTION_TYPE, /* u8 */
|
||||
TEAM_ATTR_OPTION_DATA, /* dynamic */
|
||||
TEAM_ATTR_OPTION_REMOVED, /* flag */
|
||||
|
||||
__TEAM_ATTR_OPTION_MAX,
|
||||
TEAM_ATTR_OPTION_MAX = __TEAM_ATTR_OPTION_MAX - 1,
|
||||
@@ -227,6 +236,7 @@ enum {
|
||||
TEAM_ATTR_PORT_LINKUP, /* flag */
|
||||
TEAM_ATTR_PORT_SPEED, /* u32 */
|
||||
TEAM_ATTR_PORT_DUPLEX, /* u8 */
|
||||
TEAM_ATTR_PORT_REMOVED, /* flag */
|
||||
|
||||
__TEAM_ATTR_PORT_MAX,
|
||||
TEAM_ATTR_PORT_MAX = __TEAM_ATTR_PORT_MAX - 1,
|
||||
|
||||
@@ -2,6 +2,7 @@
|
||||
#define _LINUX_INIT_H
|
||||
|
||||
#include <linux/compiler.h>
|
||||
#include <linux/types.h>
|
||||
|
||||
/* These macros are used to mark some functions or
|
||||
* initialized data (doesn't apply to uninitialized data)
|
||||
@@ -156,7 +157,7 @@ void prepare_namespace(void);
|
||||
|
||||
extern void (*late_time_init)(void);
|
||||
|
||||
extern int initcall_debug;
|
||||
extern bool initcall_debug;
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
+94
-40
@@ -3,32 +3,92 @@
|
||||
|
||||
#include <linux/radix-tree.h>
|
||||
#include <linux/rcupdate.h>
|
||||
#include <linux/workqueue.h>
|
||||
|
||||
struct cfq_queue;
|
||||
struct cfq_ttime {
|
||||
unsigned long last_end_request;
|
||||
|
||||
unsigned long ttime_total;
|
||||
unsigned long ttime_samples;
|
||||
unsigned long ttime_mean;
|
||||
enum {
|
||||
ICQ_IOPRIO_CHANGED,
|
||||
ICQ_CGROUP_CHANGED,
|
||||
};
|
||||
|
||||
struct cfq_io_context {
|
||||
void *key;
|
||||
/*
|
||||
* An io_cq (icq) is association between an io_context (ioc) and a
|
||||
* request_queue (q). This is used by elevators which need to track
|
||||
* information per ioc - q pair.
|
||||
*
|
||||
* Elevator can request use of icq by setting elevator_type->icq_size and
|
||||
* ->icq_align. Both size and align must be larger than that of struct
|
||||
* io_cq and elevator can use the tail area for private information. The
|
||||
* recommended way to do this is defining a struct which contains io_cq as
|
||||
* the first member followed by private members and using its size and
|
||||
* align. For example,
|
||||
*
|
||||
* struct snail_io_cq {
|
||||
* struct io_cq icq;
|
||||
* int poke_snail;
|
||||
* int feed_snail;
|
||||
* };
|
||||
*
|
||||
* struct elevator_type snail_elv_type {
|
||||
* .ops = { ... },
|
||||
* .icq_size = sizeof(struct snail_io_cq),
|
||||
* .icq_align = __alignof__(struct snail_io_cq),
|
||||
* ...
|
||||
* };
|
||||
*
|
||||
* If icq_size is set, block core will manage icq's. All requests will
|
||||
* have its ->elv.icq field set before elevator_ops->elevator_set_req_fn()
|
||||
* is called and be holding a reference to the associated io_context.
|
||||
*
|
||||
* Whenever a new icq is created, elevator_ops->elevator_init_icq_fn() is
|
||||
* called and, on destruction, ->elevator_exit_icq_fn(). Both functions
|
||||
* are called with both the associated io_context and queue locks held.
|
||||
*
|
||||
* Elevator is allowed to lookup icq using ioc_lookup_icq() while holding
|
||||
* queue lock but the returned icq is valid only until the queue lock is
|
||||
* released. Elevators can not and should not try to create or destroy
|
||||
* icq's.
|
||||
*
|
||||
* As icq's are linked from both ioc and q, the locking rules are a bit
|
||||
* complex.
|
||||
*
|
||||
* - ioc lock nests inside q lock.
|
||||
*
|
||||
* - ioc->icq_list and icq->ioc_node are protected by ioc lock.
|
||||
* q->icq_list and icq->q_node by q lock.
|
||||
*
|
||||
* - ioc->icq_tree and ioc->icq_hint are protected by ioc lock, while icq
|
||||
* itself is protected by q lock. However, both the indexes and icq
|
||||
* itself are also RCU managed and lookup can be performed holding only
|
||||
* the q lock.
|
||||
*
|
||||
* - icq's are not reference counted. They are destroyed when either the
|
||||
* ioc or q goes away. Each request with icq set holds an extra
|
||||
* reference to ioc to ensure it stays until the request is completed.
|
||||
*
|
||||
* - Linking and unlinking icq's are performed while holding both ioc and q
|
||||
* locks. Due to the lock ordering, q exit is simple but ioc exit
|
||||
* requires reverse-order double lock dance.
|
||||
*/
|
||||
struct io_cq {
|
||||
struct request_queue *q;
|
||||
struct io_context *ioc;
|
||||
|
||||
struct cfq_queue *cfqq[2];
|
||||
/*
|
||||
* q_node and ioc_node link io_cq through icq_list of q and ioc
|
||||
* respectively. Both fields are unused once ioc_exit_icq() is
|
||||
* called and shared with __rcu_icq_cache and __rcu_head which are
|
||||
* used for RCU free of io_cq.
|
||||
*/
|
||||
union {
|
||||
struct list_head q_node;
|
||||
struct kmem_cache *__rcu_icq_cache;
|
||||
};
|
||||
union {
|
||||
struct hlist_node ioc_node;
|
||||
struct rcu_head __rcu_head;
|
||||
};
|
||||
|
||||
struct io_context *ioc;
|
||||
|
||||
struct cfq_ttime ttime;
|
||||
|
||||
struct list_head queue_list;
|
||||
struct hlist_node cic_list;
|
||||
|
||||
void (*dtor)(struct io_context *); /* destructor */
|
||||
void (*exit)(struct io_context *); /* called on task exit */
|
||||
|
||||
struct rcu_head rcu_head;
|
||||
unsigned long changed;
|
||||
};
|
||||
|
||||
/*
|
||||
@@ -43,11 +103,6 @@ struct io_context {
|
||||
spinlock_t lock;
|
||||
|
||||
unsigned short ioprio;
|
||||
unsigned short ioprio_changed;
|
||||
|
||||
#if defined(CONFIG_BLK_CGROUP) || defined(CONFIG_BLK_CGROUP_MODULE)
|
||||
unsigned short cgroup_changed;
|
||||
#endif
|
||||
|
||||
/*
|
||||
* For request batching
|
||||
@@ -55,9 +110,11 @@ struct io_context {
|
||||
int nr_batch_requests; /* Number of requests left in the batch */
|
||||
unsigned long last_waited; /* Time last woken after wait for request */
|
||||
|
||||
struct radix_tree_root radix_root;
|
||||
struct hlist_head cic_list;
|
||||
void __rcu *ioc_data;
|
||||
struct radix_tree_root icq_tree;
|
||||
struct io_cq __rcu *icq_hint;
|
||||
struct hlist_head icq_list;
|
||||
|
||||
struct work_struct release_work;
|
||||
};
|
||||
|
||||
static inline struct io_context *ioc_task_link(struct io_context *ioc)
|
||||
@@ -76,20 +133,17 @@ static inline struct io_context *ioc_task_link(struct io_context *ioc)
|
||||
|
||||
struct task_struct;
|
||||
#ifdef CONFIG_BLOCK
|
||||
int put_io_context(struct io_context *ioc);
|
||||
void put_io_context(struct io_context *ioc, struct request_queue *locked_q);
|
||||
void exit_io_context(struct task_struct *task);
|
||||
struct io_context *get_io_context(gfp_t gfp_flags, int node);
|
||||
struct io_context *alloc_io_context(gfp_t gfp_flags, int node);
|
||||
struct io_context *get_task_io_context(struct task_struct *task,
|
||||
gfp_t gfp_flags, int node);
|
||||
void ioc_ioprio_changed(struct io_context *ioc, int ioprio);
|
||||
void ioc_cgroup_changed(struct io_context *ioc);
|
||||
#else
|
||||
static inline void exit_io_context(struct task_struct *task)
|
||||
{
|
||||
}
|
||||
|
||||
struct io_context;
|
||||
static inline int put_io_context(struct io_context *ioc)
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
static inline void put_io_context(struct io_context *ioc,
|
||||
struct request_queue *locked_q) { }
|
||||
static inline void exit_io_context(struct task_struct *task) { }
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
@@ -10,6 +10,8 @@
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _LINUX_ISDN_DIVERTIF_H
|
||||
#define _LINUX_ISDN_DIVERTIF_H
|
||||
|
||||
/***********************************************************/
|
||||
/* magic value is also used to control version information */
|
||||
@@ -45,3 +47,5 @@ typedef struct
|
||||
/*********************/
|
||||
extern int DIVERT_REG_NAME(isdn_divert_if *);
|
||||
#endif
|
||||
|
||||
#endif /* _LINUX_ISDN_DIVERTIF_H */
|
||||
|
||||
@@ -50,9 +50,11 @@
|
||||
* note header. For kdump, the code in vmcore.c runs in the context
|
||||
* of the second kernel to combine them into one note.
|
||||
*/
|
||||
#ifndef KEXEC_NOTE_BYTES
|
||||
#define KEXEC_NOTE_BYTES ( (KEXEC_NOTE_HEAD_BYTES * 2) + \
|
||||
KEXEC_CORE_NOTE_NAME_BYTES + \
|
||||
KEXEC_CORE_NOTE_DESC_BYTES )
|
||||
#endif
|
||||
|
||||
/*
|
||||
* This structure is used to hold the arguments that are used when loading
|
||||
|
||||
+4
-1
@@ -271,7 +271,7 @@ extern int keyring_add_key(struct key *keyring,
|
||||
|
||||
extern struct key *key_lookup(key_serial_t id);
|
||||
|
||||
static inline key_serial_t key_serial(struct key *key)
|
||||
static inline key_serial_t key_serial(const struct key *key)
|
||||
{
|
||||
return key ? key->serial : 0;
|
||||
}
|
||||
@@ -293,6 +293,9 @@ static inline bool key_is_instantiated(const struct key *key)
|
||||
(rcu_dereference_protected((KEY)->payload.rcudata, \
|
||||
rwsem_is_locked(&((struct key *)(KEY))->sem)))
|
||||
|
||||
#define rcu_assign_keypointer(KEY, PAYLOAD) \
|
||||
(rcu_assign_pointer((KEY)->payload.rcudata, PAYLOAD))
|
||||
|
||||
#ifdef CONFIG_SYSCTL
|
||||
extern ctl_table key_sysctls[];
|
||||
#endif
|
||||
|
||||
@@ -26,8 +26,10 @@
|
||||
extern void kmemleak_init(void) __ref;
|
||||
extern void kmemleak_alloc(const void *ptr, size_t size, int min_count,
|
||||
gfp_t gfp) __ref;
|
||||
extern void kmemleak_alloc_percpu(const void __percpu *ptr, size_t size) __ref;
|
||||
extern void kmemleak_free(const void *ptr) __ref;
|
||||
extern void kmemleak_free_part(const void *ptr, size_t size) __ref;
|
||||
extern void kmemleak_free_percpu(const void __percpu *ptr) __ref;
|
||||
extern void kmemleak_padding(const void *ptr, unsigned long offset,
|
||||
size_t size) __ref;
|
||||
extern void kmemleak_not_leak(const void *ptr) __ref;
|
||||
@@ -68,6 +70,9 @@ static inline void kmemleak_alloc_recursive(const void *ptr, size_t size,
|
||||
gfp_t gfp)
|
||||
{
|
||||
}
|
||||
static inline void kmemleak_alloc_percpu(const void __percpu *ptr, size_t size)
|
||||
{
|
||||
}
|
||||
static inline void kmemleak_free(const void *ptr)
|
||||
{
|
||||
}
|
||||
@@ -77,6 +82,9 @@ static inline void kmemleak_free_part(const void *ptr, size_t size)
|
||||
static inline void kmemleak_free_recursive(const void *ptr, unsigned long flags)
|
||||
{
|
||||
}
|
||||
static inline void kmemleak_free_percpu(const void __percpu *ptr)
|
||||
{
|
||||
}
|
||||
static inline void kmemleak_not_leak(const void *ptr)
|
||||
{
|
||||
}
|
||||
|
||||
@@ -17,6 +17,7 @@
|
||||
|
||||
#include <linux/bug.h>
|
||||
#include <linux/atomic.h>
|
||||
#include <linux/kernel.h>
|
||||
|
||||
struct kref {
|
||||
atomic_t refcount;
|
||||
|
||||
@@ -195,7 +195,7 @@ extern struct svc_procedure nlmsvc_procedures4[];
|
||||
#endif
|
||||
extern int nlmsvc_grace_period;
|
||||
extern unsigned long nlmsvc_timeout;
|
||||
extern int nsm_use_hostnames;
|
||||
extern bool nsm_use_hostnames;
|
||||
extern u32 nsm_local_state;
|
||||
|
||||
/*
|
||||
|
||||
@@ -297,10 +297,11 @@ enum {
|
||||
|
||||
struct pm860x_chip {
|
||||
struct device *dev;
|
||||
struct mutex io_lock;
|
||||
struct mutex irq_lock;
|
||||
struct i2c_client *client;
|
||||
struct i2c_client *companion; /* companion chip client */
|
||||
struct regmap *regmap;
|
||||
struct regmap *regmap_companion;
|
||||
|
||||
int buck3_double; /* DVC ramp slope double */
|
||||
unsigned short companion_addr;
|
||||
|
||||
@@ -203,6 +203,8 @@ struct max8925_chip {
|
||||
int irq_base;
|
||||
int core_irq;
|
||||
int tsc_irq;
|
||||
|
||||
unsigned int wakeup_flag;
|
||||
};
|
||||
|
||||
struct max8925_backlight_pdata {
|
||||
|
||||
@@ -77,6 +77,82 @@ struct max8997_regulator_data {
|
||||
struct regulator_init_data *initdata;
|
||||
};
|
||||
|
||||
enum max8997_muic_usb_type {
|
||||
MAX8997_USB_HOST,
|
||||
MAX8997_USB_DEVICE,
|
||||
};
|
||||
|
||||
enum max8997_muic_charger_type {
|
||||
MAX8997_CHARGER_TYPE_NONE = 0,
|
||||
MAX8997_CHARGER_TYPE_USB,
|
||||
MAX8997_CHARGER_TYPE_DOWNSTREAM_PORT,
|
||||
MAX8997_CHARGER_TYPE_DEDICATED_CHG,
|
||||
MAX8997_CHARGER_TYPE_500MA,
|
||||
MAX8997_CHARGER_TYPE_1A,
|
||||
MAX8997_CHARGER_TYPE_DEAD_BATTERY = 7,
|
||||
};
|
||||
|
||||
struct max8997_muic_reg_data {
|
||||
u8 addr;
|
||||
u8 data;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct max8997_muic_platform_data
|
||||
* @usb_callback: callback function for USB
|
||||
* inform callee of USB type (HOST or DEVICE)
|
||||
* and attached state(true or false)
|
||||
* @charger_callback: callback function for charger
|
||||
* inform callee of charger_type
|
||||
* and attached state(true or false)
|
||||
* @deskdock_callback: callback function for desk dock
|
||||
* inform callee of attached state(true or false)
|
||||
* @cardock_callback: callback function for car dock
|
||||
* inform callee of attached state(true or false)
|
||||
* @mhl_callback: callback function for MHL (Mobile High-definition Link)
|
||||
* inform callee of attached state(true or false)
|
||||
* @uart_callback: callback function for JIG UART
|
||||
* inform callee of attached state(true or false)
|
||||
* @init_data: array of max8997_muic_reg_data
|
||||
* used for initializing registers of MAX8997 MUIC device
|
||||
* @num_init_data: array size of init_data
|
||||
*/
|
||||
struct max8997_muic_platform_data {
|
||||
void (*usb_callback)(enum max8997_muic_usb_type usb_type,
|
||||
bool attached);
|
||||
void (*charger_callback)(bool attached,
|
||||
enum max8997_muic_charger_type charger_type);
|
||||
void (*deskdock_callback) (bool attached);
|
||||
void (*cardock_callback) (bool attached);
|
||||
void (*mhl_callback) (bool attached);
|
||||
void (*uart_callback) (bool attached);
|
||||
|
||||
struct max8997_muic_reg_data *init_data;
|
||||
int num_init_data;
|
||||
};
|
||||
|
||||
enum max8997_led_mode {
|
||||
MAX8997_NONE,
|
||||
MAX8997_FLASH_MODE,
|
||||
MAX8997_MOVIE_MODE,
|
||||
MAX8997_FLASH_PIN_CONTROL_MODE,
|
||||
MAX8997_MOVIE_PIN_CONTROL_MODE,
|
||||
};
|
||||
|
||||
/**
|
||||
* struct max8997_led_platform_data
|
||||
* The number of LED devices for MAX8997 is two
|
||||
* @mode: LED mode for each LED device
|
||||
* @brightness: initial brightness for each LED device
|
||||
* range:
|
||||
* [0 - 31]: MAX8997_FLASH_MODE and MAX8997_FLASH_PIN_CONTROL_MODE
|
||||
* [0 - 15]: MAX8997_MOVIE_MODE and MAX8997_MOVIE_PIN_CONTROL_MODE
|
||||
*/
|
||||
struct max8997_led_platform_data {
|
||||
enum max8997_led_mode mode[2];
|
||||
u8 brightness[2];
|
||||
};
|
||||
|
||||
struct max8997_platform_data {
|
||||
/* IRQ */
|
||||
int irq_base;
|
||||
@@ -113,10 +189,13 @@ struct max8997_platform_data {
|
||||
/* charge Full Timeout */
|
||||
int timeout; /* 0 (no timeout), 5, 6, 7 hours */
|
||||
|
||||
/* MUIC: Not implemented */
|
||||
/* ---- MUIC ---- */
|
||||
struct max8997_muic_platform_data *muic_pdata;
|
||||
|
||||
/* HAPTIC: Not implemented */
|
||||
/* RTC: Not implemented */
|
||||
/* Flash: Not implemented */
|
||||
/* ---- LED ---- */
|
||||
struct max8997_led_platform_data *led_pdata;
|
||||
};
|
||||
|
||||
#endif /* __LINUX_MFD_MAX8998_H */
|
||||
|
||||
@@ -174,6 +174,9 @@ struct mc13xxx_platform_data {
|
||||
#define MC13XXX_ADC_MODE_MULT_CHAN 3
|
||||
|
||||
#define MC13XXX_ADC0 43
|
||||
#define MC13XXX_ADC0_LICELLCON (1 << 0)
|
||||
#define MC13XXX_ADC0_CHRGICON (1 << 1)
|
||||
#define MC13XXX_ADC0_BATICON (1 << 2)
|
||||
#define MC13XXX_ADC0_ADREFEN (1 << 10)
|
||||
#define MC13XXX_ADC0_TSMOD0 (1 << 12)
|
||||
#define MC13XXX_ADC0_TSMOD1 (1 << 13)
|
||||
@@ -185,4 +188,9 @@ struct mc13xxx_platform_data {
|
||||
MC13XXX_ADC0_TSMOD1 | \
|
||||
MC13XXX_ADC0_TSMOD2)
|
||||
|
||||
#define MC13XXX_ADC0_CONFIG_MASK (MC13XXX_ADC0_TSMOD_MASK | \
|
||||
MC13XXX_ADC0_LICELLCON | \
|
||||
MC13XXX_ADC0_CHRGICON | \
|
||||
MC13XXX_ADC0_BATICON)
|
||||
|
||||
#endif /* ifndef __LINUX_MFD_MC13XXX_H */
|
||||
|
||||
@@ -10,6 +10,7 @@
|
||||
#ifndef MCP_H
|
||||
#define MCP_H
|
||||
|
||||
#include <linux/mod_devicetable.h>
|
||||
#include <mach/dma.h>
|
||||
|
||||
struct mcp_ops;
|
||||
@@ -26,7 +27,7 @@ struct mcp {
|
||||
dma_device_t dma_telco_rd;
|
||||
dma_device_t dma_telco_wr;
|
||||
struct device attached_device;
|
||||
int gpio_base;
|
||||
const char *codec;
|
||||
};
|
||||
|
||||
struct mcp_ops {
|
||||
@@ -44,10 +45,11 @@ void mcp_reg_write(struct mcp *, unsigned int, unsigned int);
|
||||
unsigned int mcp_reg_read(struct mcp *, unsigned int);
|
||||
void mcp_enable(struct mcp *);
|
||||
void mcp_disable(struct mcp *);
|
||||
const struct mcp_device_id *mcp_get_device_id(const struct mcp *mcp);
|
||||
#define mcp_get_sclk_rate(mcp) ((mcp)->sclk_rate)
|
||||
|
||||
struct mcp *mcp_host_alloc(struct device *, size_t);
|
||||
int mcp_host_register(struct mcp *);
|
||||
int mcp_host_register(struct mcp *, void *);
|
||||
void mcp_host_unregister(struct mcp *);
|
||||
|
||||
struct mcp_driver {
|
||||
@@ -56,6 +58,7 @@ struct mcp_driver {
|
||||
void (*remove)(struct mcp *);
|
||||
int (*suspend)(struct mcp *, pm_message_t);
|
||||
int (*resume)(struct mcp *);
|
||||
const struct mcp_device_id *id_table;
|
||||
};
|
||||
|
||||
int mcp_driver_register(struct mcp_driver *);
|
||||
|
||||
@@ -0,0 +1,373 @@
|
||||
/*
|
||||
* s5m-core.h
|
||||
*
|
||||
* Copyright (c) 2011 Samsung Electronics Co., Ltd
|
||||
* http://www.samsung.com
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __LINUX_MFD_S5M_CORE_H
|
||||
#define __LINUX_MFD_S5M_CORE_H
|
||||
|
||||
#define NUM_IRQ_REGS 4
|
||||
|
||||
enum s5m_device_type {
|
||||
S5M8751X,
|
||||
S5M8763X,
|
||||
S5M8767X,
|
||||
};
|
||||
|
||||
/* S5M8767 registers */
|
||||
enum s5m8767_reg {
|
||||
S5M8767_REG_ID,
|
||||
S5M8767_REG_INT1,
|
||||
S5M8767_REG_INT2,
|
||||
S5M8767_REG_INT3,
|
||||
S5M8767_REG_INT1M,
|
||||
S5M8767_REG_INT2M,
|
||||
S5M8767_REG_INT3M,
|
||||
S5M8767_REG_STATUS1,
|
||||
S5M8767_REG_STATUS2,
|
||||
S5M8767_REG_STATUS3,
|
||||
S5M8767_REG_CTRL1,
|
||||
S5M8767_REG_CTRL2,
|
||||
S5M8767_REG_LOWBAT1,
|
||||
S5M8767_REG_LOWBAT2,
|
||||
S5M8767_REG_BUCHG,
|
||||
S5M8767_REG_DVSRAMP,
|
||||
S5M8767_REG_DVSTIMER2 = 0x10,
|
||||
S5M8767_REG_DVSTIMER3,
|
||||
S5M8767_REG_DVSTIMER4,
|
||||
S5M8767_REG_LDO1,
|
||||
S5M8767_REG_LDO2,
|
||||
S5M8767_REG_LDO3,
|
||||
S5M8767_REG_LDO4,
|
||||
S5M8767_REG_LDO5,
|
||||
S5M8767_REG_LDO6,
|
||||
S5M8767_REG_LDO7,
|
||||
S5M8767_REG_LDO8,
|
||||
S5M8767_REG_LDO9,
|
||||
S5M8767_REG_LDO10,
|
||||
S5M8767_REG_LDO11,
|
||||
S5M8767_REG_LDO12,
|
||||
S5M8767_REG_LDO13,
|
||||
S5M8767_REG_LDO14 = 0x20,
|
||||
S5M8767_REG_LDO15,
|
||||
S5M8767_REG_LDO16,
|
||||
S5M8767_REG_LDO17,
|
||||
S5M8767_REG_LDO18,
|
||||
S5M8767_REG_LDO19,
|
||||
S5M8767_REG_LDO20,
|
||||
S5M8767_REG_LDO21,
|
||||
S5M8767_REG_LDO22,
|
||||
S5M8767_REG_LDO23,
|
||||
S5M8767_REG_LDO24,
|
||||
S5M8767_REG_LDO25,
|
||||
S5M8767_REG_LDO26,
|
||||
S5M8767_REG_LDO27,
|
||||
S5M8767_REG_LDO28,
|
||||
S5M8767_REG_UVLO = 0x31,
|
||||
S5M8767_REG_BUCK1CTRL1,
|
||||
S5M8767_REG_BUCK1CTRL2,
|
||||
S5M8767_REG_BUCK2CTRL,
|
||||
S5M8767_REG_BUCK2DVS1,
|
||||
S5M8767_REG_BUCK2DVS2,
|
||||
S5M8767_REG_BUCK2DVS3,
|
||||
S5M8767_REG_BUCK2DVS4,
|
||||
S5M8767_REG_BUCK2DVS5,
|
||||
S5M8767_REG_BUCK2DVS6,
|
||||
S5M8767_REG_BUCK2DVS7,
|
||||
S5M8767_REG_BUCK2DVS8,
|
||||
S5M8767_REG_BUCK3CTRL,
|
||||
S5M8767_REG_BUCK3DVS1,
|
||||
S5M8767_REG_BUCK3DVS2,
|
||||
S5M8767_REG_BUCK3DVS3,
|
||||
S5M8767_REG_BUCK3DVS4,
|
||||
S5M8767_REG_BUCK3DVS5,
|
||||
S5M8767_REG_BUCK3DVS6,
|
||||
S5M8767_REG_BUCK3DVS7,
|
||||
S5M8767_REG_BUCK3DVS8,
|
||||
S5M8767_REG_BUCK4CTRL,
|
||||
S5M8767_REG_BUCK4DVS1,
|
||||
S5M8767_REG_BUCK4DVS2,
|
||||
S5M8767_REG_BUCK4DVS3,
|
||||
S5M8767_REG_BUCK4DVS4,
|
||||
S5M8767_REG_BUCK4DVS5,
|
||||
S5M8767_REG_BUCK4DVS6,
|
||||
S5M8767_REG_BUCK4DVS7,
|
||||
S5M8767_REG_BUCK4DVS8,
|
||||
S5M8767_REG_BUCK5CTRL1,
|
||||
S5M8767_REG_BUCK5CTRL2,
|
||||
S5M8767_REG_BUCK5CTRL3,
|
||||
S5M8767_REG_BUCK5CTRL4,
|
||||
S5M8767_REG_BUCK5CTRL5,
|
||||
S5M8767_REG_BUCK6CTRL1,
|
||||
S5M8767_REG_BUCK6CTRL2,
|
||||
S5M8767_REG_BUCK7CTRL1,
|
||||
S5M8767_REG_BUCK7CTRL2,
|
||||
S5M8767_REG_BUCK8CTRL1,
|
||||
S5M8767_REG_BUCK8CTRL2,
|
||||
S5M8767_REG_BUCK9CTRL1,
|
||||
S5M8767_REG_BUCK9CTRL2,
|
||||
S5M8767_REG_LDO1CTRL,
|
||||
S5M8767_REG_LDO2_1CTRL,
|
||||
S5M8767_REG_LDO2_2CTRL,
|
||||
S5M8767_REG_LDO2_3CTRL,
|
||||
S5M8767_REG_LDO2_4CTRL,
|
||||
S5M8767_REG_LDO3CTRL,
|
||||
S5M8767_REG_LDO4CTRL,
|
||||
S5M8767_REG_LDO5CTRL,
|
||||
S5M8767_REG_LDO6CTRL,
|
||||
S5M8767_REG_LDO7CTRL,
|
||||
S5M8767_REG_LDO8CTRL,
|
||||
S5M8767_REG_LDO9CTRL,
|
||||
S5M8767_REG_LDO10CTRL,
|
||||
S5M8767_REG_LDO11CTRL,
|
||||
S5M8767_REG_LDO12CTRL,
|
||||
S5M8767_REG_LDO13CTRL,
|
||||
S5M8767_REG_LDO14CTRL,
|
||||
S5M8767_REG_LDO15CTRL,
|
||||
S5M8767_REG_LDO16CTRL,
|
||||
S5M8767_REG_LDO17CTRL,
|
||||
S5M8767_REG_LDO18CTRL,
|
||||
S5M8767_REG_LDO19CTRL,
|
||||
S5M8767_REG_LDO20CTRL,
|
||||
S5M8767_REG_LDO21CTRL,
|
||||
S5M8767_REG_LDO22CTRL,
|
||||
S5M8767_REG_LDO23CTRL,
|
||||
S5M8767_REG_LDO24CTRL,
|
||||
S5M8767_REG_LDO25CTRL,
|
||||
S5M8767_REG_LDO26CTRL,
|
||||
S5M8767_REG_LDO27CTRL,
|
||||
S5M8767_REG_LDO28CTRL,
|
||||
};
|
||||
|
||||
/* S5M8763 registers */
|
||||
enum s5m8763_reg {
|
||||
S5M8763_REG_IRQ1,
|
||||
S5M8763_REG_IRQ2,
|
||||
S5M8763_REG_IRQ3,
|
||||
S5M8763_REG_IRQ4,
|
||||
S5M8763_REG_IRQM1,
|
||||
S5M8763_REG_IRQM2,
|
||||
S5M8763_REG_IRQM3,
|
||||
S5M8763_REG_IRQM4,
|
||||
S5M8763_REG_STATUS1,
|
||||
S5M8763_REG_STATUS2,
|
||||
S5M8763_REG_STATUSM1,
|
||||
S5M8763_REG_STATUSM2,
|
||||
S5M8763_REG_CHGR1,
|
||||
S5M8763_REG_CHGR2,
|
||||
S5M8763_REG_LDO_ACTIVE_DISCHARGE1,
|
||||
S5M8763_REG_LDO_ACTIVE_DISCHARGE2,
|
||||
S5M8763_REG_BUCK_ACTIVE_DISCHARGE3,
|
||||
S5M8763_REG_ONOFF1,
|
||||
S5M8763_REG_ONOFF2,
|
||||
S5M8763_REG_ONOFF3,
|
||||
S5M8763_REG_ONOFF4,
|
||||
S5M8763_REG_BUCK1_VOLTAGE1,
|
||||
S5M8763_REG_BUCK1_VOLTAGE2,
|
||||
S5M8763_REG_BUCK1_VOLTAGE3,
|
||||
S5M8763_REG_BUCK1_VOLTAGE4,
|
||||
S5M8763_REG_BUCK2_VOLTAGE1,
|
||||
S5M8763_REG_BUCK2_VOLTAGE2,
|
||||
S5M8763_REG_BUCK3,
|
||||
S5M8763_REG_BUCK4,
|
||||
S5M8763_REG_LDO1_LDO2,
|
||||
S5M8763_REG_LDO3,
|
||||
S5M8763_REG_LDO4,
|
||||
S5M8763_REG_LDO5,
|
||||
S5M8763_REG_LDO6,
|
||||
S5M8763_REG_LDO7,
|
||||
S5M8763_REG_LDO7_LDO8,
|
||||
S5M8763_REG_LDO9_LDO10,
|
||||
S5M8763_REG_LDO11,
|
||||
S5M8763_REG_LDO12,
|
||||
S5M8763_REG_LDO13,
|
||||
S5M8763_REG_LDO14,
|
||||
S5M8763_REG_LDO15,
|
||||
S5M8763_REG_LDO16,
|
||||
S5M8763_REG_BKCHR,
|
||||
S5M8763_REG_LBCNFG1,
|
||||
S5M8763_REG_LBCNFG2,
|
||||
};
|
||||
|
||||
enum s5m8767_irq {
|
||||
S5M8767_IRQ_PWRR,
|
||||
S5M8767_IRQ_PWRF,
|
||||
S5M8767_IRQ_PWR1S,
|
||||
S5M8767_IRQ_JIGR,
|
||||
S5M8767_IRQ_JIGF,
|
||||
S5M8767_IRQ_LOWBAT2,
|
||||
S5M8767_IRQ_LOWBAT1,
|
||||
|
||||
S5M8767_IRQ_MRB,
|
||||
S5M8767_IRQ_DVSOK2,
|
||||
S5M8767_IRQ_DVSOK3,
|
||||
S5M8767_IRQ_DVSOK4,
|
||||
|
||||
S5M8767_IRQ_RTC60S,
|
||||
S5M8767_IRQ_RTCA1,
|
||||
S5M8767_IRQ_RTCA2,
|
||||
S5M8767_IRQ_SMPL,
|
||||
S5M8767_IRQ_RTC1S,
|
||||
S5M8767_IRQ_WTSR,
|
||||
|
||||
S5M8767_IRQ_NR,
|
||||
};
|
||||
|
||||
#define S5M8767_IRQ_PWRR_MASK (1 << 0)
|
||||
#define S5M8767_IRQ_PWRF_MASK (1 << 1)
|
||||
#define S5M8767_IRQ_PWR1S_MASK (1 << 3)
|
||||
#define S5M8767_IRQ_JIGR_MASK (1 << 4)
|
||||
#define S5M8767_IRQ_JIGF_MASK (1 << 5)
|
||||
#define S5M8767_IRQ_LOWBAT2_MASK (1 << 6)
|
||||
#define S5M8767_IRQ_LOWBAT1_MASK (1 << 7)
|
||||
|
||||
#define S5M8767_IRQ_MRB_MASK (1 << 2)
|
||||
#define S5M8767_IRQ_DVSOK2_MASK (1 << 3)
|
||||
#define S5M8767_IRQ_DVSOK3_MASK (1 << 4)
|
||||
#define S5M8767_IRQ_DVSOK4_MASK (1 << 5)
|
||||
|
||||
#define S5M8767_IRQ_RTC60S_MASK (1 << 0)
|
||||
#define S5M8767_IRQ_RTCA1_MASK (1 << 1)
|
||||
#define S5M8767_IRQ_RTCA2_MASK (1 << 2)
|
||||
#define S5M8767_IRQ_SMPL_MASK (1 << 3)
|
||||
#define S5M8767_IRQ_RTC1S_MASK (1 << 4)
|
||||
#define S5M8767_IRQ_WTSR_MASK (1 << 5)
|
||||
|
||||
enum s5m8763_irq {
|
||||
S5M8763_IRQ_DCINF,
|
||||
S5M8763_IRQ_DCINR,
|
||||
S5M8763_IRQ_JIGF,
|
||||
S5M8763_IRQ_JIGR,
|
||||
S5M8763_IRQ_PWRONF,
|
||||
S5M8763_IRQ_PWRONR,
|
||||
|
||||
S5M8763_IRQ_WTSREVNT,
|
||||
S5M8763_IRQ_SMPLEVNT,
|
||||
S5M8763_IRQ_ALARM1,
|
||||
S5M8763_IRQ_ALARM0,
|
||||
|
||||
S5M8763_IRQ_ONKEY1S,
|
||||
S5M8763_IRQ_TOPOFFR,
|
||||
S5M8763_IRQ_DCINOVPR,
|
||||
S5M8763_IRQ_CHGRSTF,
|
||||
S5M8763_IRQ_DONER,
|
||||
S5M8763_IRQ_CHGFAULT,
|
||||
|
||||
S5M8763_IRQ_LOBAT1,
|
||||
S5M8763_IRQ_LOBAT2,
|
||||
|
||||
S5M8763_IRQ_NR,
|
||||
};
|
||||
|
||||
#define S5M8763_IRQ_DCINF_MASK (1 << 2)
|
||||
#define S5M8763_IRQ_DCINR_MASK (1 << 3)
|
||||
#define S5M8763_IRQ_JIGF_MASK (1 << 4)
|
||||
#define S5M8763_IRQ_JIGR_MASK (1 << 5)
|
||||
#define S5M8763_IRQ_PWRONF_MASK (1 << 6)
|
||||
#define S5M8763_IRQ_PWRONR_MASK (1 << 7)
|
||||
|
||||
#define S5M8763_IRQ_WTSREVNT_MASK (1 << 0)
|
||||
#define S5M8763_IRQ_SMPLEVNT_MASK (1 << 1)
|
||||
#define S5M8763_IRQ_ALARM1_MASK (1 << 2)
|
||||
#define S5M8763_IRQ_ALARM0_MASK (1 << 3)
|
||||
|
||||
#define S5M8763_IRQ_ONKEY1S_MASK (1 << 0)
|
||||
#define S5M8763_IRQ_TOPOFFR_MASK (1 << 2)
|
||||
#define S5M8763_IRQ_DCINOVPR_MASK (1 << 3)
|
||||
#define S5M8763_IRQ_CHGRSTF_MASK (1 << 4)
|
||||
#define S5M8763_IRQ_DONER_MASK (1 << 5)
|
||||
#define S5M8763_IRQ_CHGFAULT_MASK (1 << 7)
|
||||
|
||||
#define S5M8763_IRQ_LOBAT1_MASK (1 << 0)
|
||||
#define S5M8763_IRQ_LOBAT2_MASK (1 << 1)
|
||||
|
||||
#define S5M8763_ENRAMP (1 << 4)
|
||||
|
||||
/**
|
||||
* struct s5m87xx_dev - s5m87xx master device for sub-drivers
|
||||
* @dev: master device of the chip (can be used to access platform data)
|
||||
* @i2c: i2c client private data for regulator
|
||||
* @rtc: i2c client private data for rtc
|
||||
* @iolock: mutex for serializing io access
|
||||
* @irqlock: mutex for buslock
|
||||
* @irq_base: base IRQ number for s5m87xx, required for IRQs
|
||||
* @irq: generic IRQ number for s5m87xx
|
||||
* @ono: power onoff IRQ number for s5m87xx
|
||||
* @irq_masks_cur: currently active value
|
||||
* @irq_masks_cache: cached hardware value
|
||||
* @type: indicate which s5m87xx "variant" is used
|
||||
*/
|
||||
struct s5m87xx_dev {
|
||||
struct device *dev;
|
||||
struct regmap *regmap;
|
||||
struct i2c_client *i2c;
|
||||
struct i2c_client *rtc;
|
||||
struct mutex iolock;
|
||||
struct mutex irqlock;
|
||||
|
||||
int device_type;
|
||||
int irq_base;
|
||||
int irq;
|
||||
int ono;
|
||||
u8 irq_masks_cur[NUM_IRQ_REGS];
|
||||
u8 irq_masks_cache[NUM_IRQ_REGS];
|
||||
int type;
|
||||
bool wakeup;
|
||||
};
|
||||
|
||||
int s5m_irq_init(struct s5m87xx_dev *s5m87xx);
|
||||
void s5m_irq_exit(struct s5m87xx_dev *s5m87xx);
|
||||
int s5m_irq_resume(struct s5m87xx_dev *s5m87xx);
|
||||
|
||||
extern int s5m_reg_read(struct s5m87xx_dev *s5m87xx, u8 reg, void *dest);
|
||||
extern int s5m_bulk_read(struct s5m87xx_dev *s5m87xx, u8 reg, int count, u8 *buf);
|
||||
extern int s5m_reg_write(struct s5m87xx_dev *s5m87xx, u8 reg, u8 value);
|
||||
extern int s5m_bulk_write(struct s5m87xx_dev *s5m87xx, u8 reg, int count, u8 *buf);
|
||||
extern int s5m_reg_update(struct s5m87xx_dev *s5m87xx, u8 reg, u8 val, u8 mask);
|
||||
|
||||
struct s5m_platform_data {
|
||||
struct s5m_regulator_data *regulators;
|
||||
int device_type;
|
||||
int num_regulators;
|
||||
|
||||
int irq_base;
|
||||
int (*cfg_pmic_irq)(void);
|
||||
|
||||
int ono;
|
||||
bool wakeup;
|
||||
bool buck_voltage_lock;
|
||||
|
||||
int buck_gpios[3];
|
||||
int buck2_voltage[8];
|
||||
bool buck2_gpiodvs;
|
||||
int buck3_voltage[8];
|
||||
bool buck3_gpiodvs;
|
||||
int buck4_voltage[8];
|
||||
bool buck4_gpiodvs;
|
||||
|
||||
int buck_set1;
|
||||
int buck_set2;
|
||||
int buck_set3;
|
||||
int buck2_enable;
|
||||
int buck3_enable;
|
||||
int buck4_enable;
|
||||
int buck_default_idx;
|
||||
int buck2_default_idx;
|
||||
int buck3_default_idx;
|
||||
int buck4_default_idx;
|
||||
|
||||
int buck_ramp_delay;
|
||||
bool buck2_ramp_enable;
|
||||
bool buck3_ramp_enable;
|
||||
bool buck4_ramp_enable;
|
||||
};
|
||||
|
||||
#endif /* __LINUX_MFD_S5M_CORE_H */
|
||||
@@ -0,0 +1,100 @@
|
||||
/* s5m87xx.h
|
||||
*
|
||||
* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
|
||||
* http://www.samsung.com
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __LINUX_MFD_S5M_PMIC_H
|
||||
#define __LINUX_MFD_S5M_PMIC_H
|
||||
|
||||
#include <linux/regulator/machine.h>
|
||||
|
||||
/* S5M8767 regulator ids */
|
||||
enum s5m8767_regulators {
|
||||
S5M8767_LDO1,
|
||||
S5M8767_LDO2,
|
||||
S5M8767_LDO3,
|
||||
S5M8767_LDO4,
|
||||
S5M8767_LDO5,
|
||||
S5M8767_LDO6,
|
||||
S5M8767_LDO7,
|
||||
S5M8767_LDO8,
|
||||
S5M8767_LDO9,
|
||||
S5M8767_LDO10,
|
||||
S5M8767_LDO11,
|
||||
S5M8767_LDO12,
|
||||
S5M8767_LDO13,
|
||||
S5M8767_LDO14,
|
||||
S5M8767_LDO15,
|
||||
S5M8767_LDO16,
|
||||
S5M8767_LDO17,
|
||||
S5M8767_LDO18,
|
||||
S5M8767_LDO19,
|
||||
S5M8767_LDO20,
|
||||
S5M8767_LDO21,
|
||||
S5M8767_LDO22,
|
||||
S5M8767_LDO23,
|
||||
S5M8767_LDO24,
|
||||
S5M8767_LDO25,
|
||||
S5M8767_LDO26,
|
||||
S5M8767_LDO27,
|
||||
S5M8767_LDO28,
|
||||
S5M8767_BUCK1,
|
||||
S5M8767_BUCK2,
|
||||
S5M8767_BUCK3,
|
||||
S5M8767_BUCK4,
|
||||
S5M8767_BUCK5,
|
||||
S5M8767_BUCK6,
|
||||
S5M8767_BUCK7,
|
||||
S5M8767_BUCK8,
|
||||
S5M8767_BUCK9,
|
||||
S5M8767_AP_EN32KHZ,
|
||||
S5M8767_CP_EN32KHZ,
|
||||
|
||||
S5M8767_REG_MAX,
|
||||
};
|
||||
|
||||
/* S5M8763 regulator ids */
|
||||
enum s5m8763_regulators {
|
||||
S5M8763_LDO1,
|
||||
S5M8763_LDO2,
|
||||
S5M8763_LDO3,
|
||||
S5M8763_LDO4,
|
||||
S5M8763_LDO5,
|
||||
S5M8763_LDO6,
|
||||
S5M8763_LDO7,
|
||||
S5M8763_LDO8,
|
||||
S5M8763_LDO9,
|
||||
S5M8763_LDO10,
|
||||
S5M8763_LDO11,
|
||||
S5M8763_LDO12,
|
||||
S5M8763_LDO13,
|
||||
S5M8763_LDO14,
|
||||
S5M8763_LDO15,
|
||||
S5M8763_LDO16,
|
||||
S5M8763_BUCK1,
|
||||
S5M8763_BUCK2,
|
||||
S5M8763_BUCK3,
|
||||
S5M8763_BUCK4,
|
||||
S5M8763_AP_EN32KHZ,
|
||||
S5M8763_CP_EN32KHZ,
|
||||
S5M8763_ENCHGVI,
|
||||
S5M8763_ESAFEUSB1,
|
||||
S5M8763_ESAFEUSB2,
|
||||
};
|
||||
|
||||
/**
|
||||
* s5m87xx_regulator_data - regulator data
|
||||
* @id: regulator id
|
||||
* @initdata: regulator init data (contraints, supplies, ...)
|
||||
*/
|
||||
struct s5m_regulator_data {
|
||||
int id;
|
||||
struct regulator_init_data *initdata;
|
||||
};
|
||||
|
||||
#endif /* __LINUX_MFD_S5M_PMIC_H */
|
||||
@@ -0,0 +1,84 @@
|
||||
/*
|
||||
* s5m-rtc.h
|
||||
*
|
||||
* Copyright (c) 2011 Samsung Electronics Co., Ltd
|
||||
* http://www.samsung.com
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __LINUX_MFD_S5M_RTC_H
|
||||
#define __LINUX_MFD_S5M_RTC_H
|
||||
|
||||
enum s5m87xx_rtc_reg {
|
||||
S5M87XX_RTC_SEC,
|
||||
S5M87XX_RTC_MIN,
|
||||
S5M87XX_RTC_HOUR,
|
||||
S5M87XX_RTC_WEEKDAY,
|
||||
S5M87XX_RTC_DATE,
|
||||
S5M87XX_RTC_MONTH,
|
||||
S5M87XX_RTC_YEAR1,
|
||||
S5M87XX_RTC_YEAR2,
|
||||
S5M87XX_ALARM0_SEC,
|
||||
S5M87XX_ALARM0_MIN,
|
||||
S5M87XX_ALARM0_HOUR,
|
||||
S5M87XX_ALARM0_WEEKDAY,
|
||||
S5M87XX_ALARM0_DATE,
|
||||
S5M87XX_ALARM0_MONTH,
|
||||
S5M87XX_ALARM0_YEAR1,
|
||||
S5M87XX_ALARM0_YEAR2,
|
||||
S5M87XX_ALARM1_SEC,
|
||||
S5M87XX_ALARM1_MIN,
|
||||
S5M87XX_ALARM1_HOUR,
|
||||
S5M87XX_ALARM1_WEEKDAY,
|
||||
S5M87XX_ALARM1_DATE,
|
||||
S5M87XX_ALARM1_MONTH,
|
||||
S5M87XX_ALARM1_YEAR1,
|
||||
S5M87XX_ALARM1_YEAR2,
|
||||
S5M87XX_ALARM0_CONF,
|
||||
S5M87XX_ALARM1_CONF,
|
||||
S5M87XX_RTC_STATUS,
|
||||
S5M87XX_WTSR_SMPL_CNTL,
|
||||
S5M87XX_RTC_UDR_CON,
|
||||
};
|
||||
|
||||
#define RTC_I2C_ADDR (0x0C >> 1)
|
||||
|
||||
#define HOUR_12 (1 << 7)
|
||||
#define HOUR_AMPM (1 << 6)
|
||||
#define HOUR_PM (1 << 5)
|
||||
#define ALARM0_STATUS (1 << 1)
|
||||
#define ALARM1_STATUS (1 << 2)
|
||||
#define UPDATE_AD (1 << 0)
|
||||
|
||||
/* RTC Control Register */
|
||||
#define BCD_EN_SHIFT 0
|
||||
#define BCD_EN_MASK (1 << BCD_EN_SHIFT)
|
||||
#define MODEL24_SHIFT 1
|
||||
#define MODEL24_MASK (1 << MODEL24_SHIFT)
|
||||
/* RTC Update Register1 */
|
||||
#define RTC_UDR_SHIFT 0
|
||||
#define RTC_UDR_MASK (1 << RTC_UDR_SHIFT)
|
||||
/* RTC Hour register */
|
||||
#define HOUR_PM_SHIFT 6
|
||||
#define HOUR_PM_MASK (1 << HOUR_PM_SHIFT)
|
||||
/* RTC Alarm Enable */
|
||||
#define ALARM_ENABLE_SHIFT 7
|
||||
#define ALARM_ENABLE_MASK (1 << ALARM_ENABLE_SHIFT)
|
||||
|
||||
enum {
|
||||
RTC_SEC = 0,
|
||||
RTC_MIN,
|
||||
RTC_HOUR,
|
||||
RTC_WEEKDAY,
|
||||
RTC_DATE,
|
||||
RTC_MONTH,
|
||||
RTC_YEAR1,
|
||||
RTC_YEAR2,
|
||||
};
|
||||
|
||||
#endif /* __LINUX_MFD_S5M_RTC_H */
|
||||
@@ -20,6 +20,8 @@ enum stmpe_block {
|
||||
};
|
||||
|
||||
enum stmpe_partnum {
|
||||
STMPE610,
|
||||
STMPE801,
|
||||
STMPE811,
|
||||
STMPE1601,
|
||||
STMPE2401,
|
||||
@@ -50,17 +52,20 @@ enum {
|
||||
|
||||
|
||||
struct stmpe_variant_info;
|
||||
struct stmpe_client_info;
|
||||
|
||||
/**
|
||||
* struct stmpe - STMPE MFD structure
|
||||
* @lock: lock protecting I/O operations
|
||||
* @irq_lock: IRQ bus lock
|
||||
* @dev: device, mostly for dev_dbg()
|
||||
* @i2c: i2c client
|
||||
* @client: client - i2c or spi
|
||||
* @ci: client specific information
|
||||
* @partnum: part number
|
||||
* @variant: the detected STMPE model number
|
||||
* @regs: list of addresses of registers which are at different addresses on
|
||||
* different variants. Indexed by one of STMPE_IDX_*.
|
||||
* @irq: irq number for stmpe
|
||||
* @irq_base: starting IRQ number for internal IRQs
|
||||
* @num_gpios: number of gpios, differs for variants
|
||||
* @ier: cache of IER registers for bus_lock
|
||||
@@ -71,11 +76,13 @@ struct stmpe {
|
||||
struct mutex lock;
|
||||
struct mutex irq_lock;
|
||||
struct device *dev;
|
||||
struct i2c_client *i2c;
|
||||
void *client;
|
||||
struct stmpe_client_info *ci;
|
||||
enum stmpe_partnum partnum;
|
||||
struct stmpe_variant_info *variant;
|
||||
const u8 *regs;
|
||||
|
||||
int irq;
|
||||
int irq_base;
|
||||
int num_gpios;
|
||||
u8 ier[2];
|
||||
@@ -183,6 +190,9 @@ struct stmpe_ts_platform_data {
|
||||
* @autosleep_timeout: inactivity timeout in milliseconds for autosleep
|
||||
* @irq_base: base IRQ number. %STMPE_NR_IRQS irqs will be used, or
|
||||
* %STMPE_NR_INTERNAL_IRQS if the GPIO driver is not used.
|
||||
* @irq_over_gpio: true if gpio is used to get irq
|
||||
* @irq_gpio: gpio number over which irq will be requested (significant only if
|
||||
* irq_over_gpio is true)
|
||||
* @gpio: GPIO-specific platform data
|
||||
* @keypad: keypad-specific platform data
|
||||
* @ts: touchscreen-specific platform data
|
||||
@@ -194,6 +204,8 @@ struct stmpe_platform_data {
|
||||
unsigned int irq_trigger;
|
||||
bool irq_invert_polarity;
|
||||
bool autosleep;
|
||||
bool irq_over_gpio;
|
||||
int irq_gpio;
|
||||
int autosleep_timeout;
|
||||
|
||||
struct stmpe_gpio_platform_data *gpio;
|
||||
|
||||
@@ -104,6 +104,9 @@
|
||||
#define UCB_MODE_DYN_VFLAG_ENA (1 << 12)
|
||||
#define UCB_MODE_AUD_OFF_CAN (1 << 13)
|
||||
|
||||
struct ucb1x00_plat_data {
|
||||
int gpio_base;
|
||||
};
|
||||
|
||||
struct ucb1x00_irq {
|
||||
void *devid;
|
||||
@@ -116,7 +119,7 @@ struct ucb1x00 {
|
||||
unsigned int irq;
|
||||
struct semaphore adc_sem;
|
||||
spinlock_t io_lock;
|
||||
u16 id;
|
||||
const struct mcp_device_id *id;
|
||||
u16 io_dir;
|
||||
u16 io_out;
|
||||
u16 adc_cr;
|
||||
|
||||
+1
-13
@@ -3,22 +3,10 @@
|
||||
|
||||
#include <linux/mm.h>
|
||||
#include <linux/mempolicy.h>
|
||||
#include <linux/migrate_mode.h>
|
||||
|
||||
typedef struct page *new_page_t(struct page *, unsigned long private, int **);
|
||||
|
||||
/*
|
||||
* MIGRATE_ASYNC means never block
|
||||
* MIGRATE_SYNC_LIGHT in the current implementation means to allow blocking
|
||||
* on most operations but not ->writepage as the potential stall time
|
||||
* is too significant
|
||||
* MIGRATE_SYNC will block when migrating pages
|
||||
*/
|
||||
enum migrate_mode {
|
||||
MIGRATE_ASYNC,
|
||||
MIGRATE_SYNC_LIGHT,
|
||||
MIGRATE_SYNC,
|
||||
};
|
||||
|
||||
#ifdef CONFIG_MIGRATION
|
||||
#define PAGE_MIGRATION 1
|
||||
|
||||
|
||||
@@ -0,0 +1,16 @@
|
||||
#ifndef MIGRATE_MODE_H_INCLUDED
|
||||
#define MIGRATE_MODE_H_INCLUDED
|
||||
/*
|
||||
* MIGRATE_ASYNC means never block
|
||||
* MIGRATE_SYNC_LIGHT in the current implementation means to allow blocking
|
||||
* on most operations but not ->writepage as the potential stall time
|
||||
* is too significant
|
||||
* MIGRATE_SYNC will block when migrating pages
|
||||
*/
|
||||
enum migrate_mode {
|
||||
MIGRATE_ASYNC,
|
||||
MIGRATE_SYNC_LIGHT,
|
||||
MIGRATE_SYNC,
|
||||
};
|
||||
|
||||
#endif /* MIGRATE_MODE_H_INCLUDED */
|
||||
@@ -621,6 +621,7 @@ void mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, u64 mac);
|
||||
int mlx4_replace_mac(struct mlx4_dev *dev, u8 port, int qpn, u64 new_mac);
|
||||
int mlx4_get_eth_qp(struct mlx4_dev *dev, u8 port, u64 mac, int *qpn);
|
||||
void mlx4_put_eth_qp(struct mlx4_dev *dev, u8 port, u64 mac, int qpn);
|
||||
void mlx4_set_stats_bitmap(struct mlx4_dev *dev, u64 *stats_bitmap);
|
||||
|
||||
int mlx4_find_cached_vlan(struct mlx4_dev *dev, u8 port, u16 vid, int *idx);
|
||||
int mlx4_register_vlan(struct mlx4_dev *dev, u8 port, u16 vlan, int *index);
|
||||
|
||||
@@ -71,6 +71,8 @@ struct mmc_ext_csd {
|
||||
bool hpi_en; /* HPI enablebit */
|
||||
bool hpi; /* HPI support bit */
|
||||
unsigned int hpi_cmd; /* cmd used as HPI */
|
||||
unsigned int boot_ro_lock; /* ro lock support */
|
||||
bool boot_ro_lockable;
|
||||
u8 raw_partition_support; /* 160 */
|
||||
u8 raw_erased_mem_count; /* 181 */
|
||||
u8 raw_ext_csd_structure; /* 194 */
|
||||
@@ -110,6 +112,7 @@ struct sd_ssr {
|
||||
struct sd_switch_caps {
|
||||
unsigned int hs_max_dtr;
|
||||
unsigned int uhs_max_dtr;
|
||||
#define HIGH_SPEED_MAX_DTR 50000000
|
||||
#define UHS_SDR104_MAX_DTR 208000000
|
||||
#define UHS_SDR50_MAX_DTR 100000000
|
||||
#define UHS_DDR50_MAX_DTR 50000000
|
||||
@@ -117,11 +120,13 @@ struct sd_switch_caps {
|
||||
#define UHS_SDR12_MAX_DTR 25000000
|
||||
unsigned int sd3_bus_mode;
|
||||
#define UHS_SDR12_BUS_SPEED 0
|
||||
#define HIGH_SPEED_BUS_SPEED 1
|
||||
#define UHS_SDR25_BUS_SPEED 1
|
||||
#define UHS_SDR50_BUS_SPEED 2
|
||||
#define UHS_SDR104_BUS_SPEED 3
|
||||
#define UHS_DDR50_BUS_SPEED 4
|
||||
|
||||
#define SD_MODE_HIGH_SPEED (1 << HIGH_SPEED_BUS_SPEED)
|
||||
#define SD_MODE_UHS_SDR12 (1 << UHS_SDR12_BUS_SPEED)
|
||||
#define SD_MODE_UHS_SDR25 (1 << UHS_SDR25_BUS_SPEED)
|
||||
#define SD_MODE_UHS_SDR50 (1 << UHS_SDR50_BUS_SPEED)
|
||||
@@ -184,6 +189,10 @@ struct mmc_part {
|
||||
unsigned int part_cfg; /* partition type */
|
||||
char name[MAX_MMC_PART_NAME_LEN];
|
||||
bool force_ro; /* to make boot parts RO by default */
|
||||
unsigned int area_type;
|
||||
#define MMC_BLK_DATA_AREA_MAIN (1<<0)
|
||||
#define MMC_BLK_DATA_AREA_BOOT (1<<1)
|
||||
#define MMC_BLK_DATA_AREA_GP (1<<2)
|
||||
};
|
||||
|
||||
/*
|
||||
@@ -206,6 +215,8 @@ struct mmc_card {
|
||||
#define MMC_STATE_HIGHSPEED_DDR (1<<4) /* card is in high speed mode */
|
||||
#define MMC_STATE_ULTRAHIGHSPEED (1<<5) /* card is in ultra high speed mode */
|
||||
#define MMC_CARD_SDXC (1<<6) /* card is SDXC */
|
||||
#define MMC_CARD_REMOVED (1<<7) /* card has been removed */
|
||||
#define MMC_STATE_HIGHSPEED_200 (1<<8) /* card is in HS200 mode */
|
||||
unsigned int quirks; /* card quirks */
|
||||
#define MMC_QUIRK_LENIENT_FN0 (1<<0) /* allow SDIO FN0 writes outside of the VS CCCR range */
|
||||
#define MMC_QUIRK_BLKSZ_FOR_BYTE_MODE (1<<1) /* use func->cur_blksize */
|
||||
@@ -261,12 +272,14 @@ struct mmc_card {
|
||||
* This function fill contents in mmc_part.
|
||||
*/
|
||||
static inline void mmc_part_add(struct mmc_card *card, unsigned int size,
|
||||
unsigned int part_cfg, char *name, int idx, bool ro)
|
||||
unsigned int part_cfg, char *name, int idx, bool ro,
|
||||
int area_type)
|
||||
{
|
||||
card->part[card->nr_parts].size = size;
|
||||
card->part[card->nr_parts].part_cfg = part_cfg;
|
||||
sprintf(card->part[card->nr_parts].name, name, idx);
|
||||
card->part[card->nr_parts].force_ro = ro;
|
||||
card->part[card->nr_parts].area_type = area_type;
|
||||
card->nr_parts++;
|
||||
}
|
||||
|
||||
@@ -362,18 +375,24 @@ static inline void __maybe_unused remove_quirk(struct mmc_card *card, int data)
|
||||
#define mmc_card_present(c) ((c)->state & MMC_STATE_PRESENT)
|
||||
#define mmc_card_readonly(c) ((c)->state & MMC_STATE_READONLY)
|
||||
#define mmc_card_highspeed(c) ((c)->state & MMC_STATE_HIGHSPEED)
|
||||
#define mmc_card_hs200(c) ((c)->state & MMC_STATE_HIGHSPEED_200)
|
||||
#define mmc_card_blockaddr(c) ((c)->state & MMC_STATE_BLOCKADDR)
|
||||
#define mmc_card_ddr_mode(c) ((c)->state & MMC_STATE_HIGHSPEED_DDR)
|
||||
#define mmc_sd_card_uhs(c) ((c)->state & MMC_STATE_ULTRAHIGHSPEED)
|
||||
#define mmc_card_uhs(c) ((c)->state & MMC_STATE_ULTRAHIGHSPEED)
|
||||
#define mmc_sd_card_uhs(c) ((c)->state & MMC_STATE_ULTRAHIGHSPEED)
|
||||
#define mmc_card_ext_capacity(c) ((c)->state & MMC_CARD_SDXC)
|
||||
#define mmc_card_removed(c) ((c) && ((c)->state & MMC_CARD_REMOVED))
|
||||
|
||||
#define mmc_card_set_present(c) ((c)->state |= MMC_STATE_PRESENT)
|
||||
#define mmc_card_set_readonly(c) ((c)->state |= MMC_STATE_READONLY)
|
||||
#define mmc_card_set_highspeed(c) ((c)->state |= MMC_STATE_HIGHSPEED)
|
||||
#define mmc_card_set_hs200(c) ((c)->state |= MMC_STATE_HIGHSPEED_200)
|
||||
#define mmc_card_set_blockaddr(c) ((c)->state |= MMC_STATE_BLOCKADDR)
|
||||
#define mmc_card_set_ddr_mode(c) ((c)->state |= MMC_STATE_HIGHSPEED_DDR)
|
||||
#define mmc_card_set_uhs(c) ((c)->state |= MMC_STATE_ULTRAHIGHSPEED)
|
||||
#define mmc_sd_card_set_uhs(c) ((c)->state |= MMC_STATE_ULTRAHIGHSPEED)
|
||||
#define mmc_card_set_ext_capacity(c) ((c)->state |= MMC_CARD_SDXC)
|
||||
#define mmc_card_set_removed(c) ((c)->state |= MMC_CARD_REMOVED)
|
||||
|
||||
/*
|
||||
* Quirk add/remove for MMC products.
|
||||
|
||||
@@ -0,0 +1,19 @@
|
||||
/*
|
||||
* Generic GPIO card-detect helper header
|
||||
*
|
||||
* Copyright (C) 2011, Guennadi Liakhovetski <g.liakhovetski@gmx.de>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef MMC_CD_GPIO_H
|
||||
#define MMC_CD_GPIO_H
|
||||
|
||||
struct mmc_host;
|
||||
int mmc_cd_gpio_request(struct mmc_host *host, unsigned int gpio,
|
||||
unsigned int irq, unsigned long flags);
|
||||
void mmc_cd_gpio_free(struct mmc_host *host);
|
||||
|
||||
#endif
|
||||
@@ -180,6 +180,8 @@ extern int mmc_try_claim_host(struct mmc_host *host);
|
||||
|
||||
extern int mmc_flush_cache(struct mmc_card *);
|
||||
|
||||
extern int mmc_detect_card_removed(struct mmc_host *host);
|
||||
|
||||
/**
|
||||
* mmc_claim_host - exclusively claim a host
|
||||
* @host: mmc host to claim
|
||||
|
||||
@@ -214,6 +214,7 @@ struct dw_mci_board {
|
||||
unsigned int bus_hz; /* Bus speed */
|
||||
|
||||
unsigned int caps; /* Capabilities */
|
||||
unsigned int caps2; /* More capabilities */
|
||||
/*
|
||||
* Override fifo depth. If 0, autodetect it from the FIFOTH register,
|
||||
* but note that this may not be reliable after a bootloader has used
|
||||
|
||||
@@ -56,10 +56,13 @@ struct mmc_ios {
|
||||
#define MMC_TIMING_UHS_SDR50 3
|
||||
#define MMC_TIMING_UHS_SDR104 4
|
||||
#define MMC_TIMING_UHS_DDR50 5
|
||||
#define MMC_TIMING_MMC_HS200 6
|
||||
|
||||
#define MMC_SDR_MODE 0
|
||||
#define MMC_1_2V_DDR_MODE 1
|
||||
#define MMC_1_8V_DDR_MODE 2
|
||||
#define MMC_1_2V_SDR_MODE 3
|
||||
#define MMC_1_8V_SDR_MODE 4
|
||||
|
||||
unsigned char signal_voltage; /* signalling voltage (1.8V or 3.3V) */
|
||||
|
||||
@@ -148,7 +151,9 @@ struct mmc_host_ops {
|
||||
void (*init_card)(struct mmc_host *host, struct mmc_card *card);
|
||||
|
||||
int (*start_signal_voltage_switch)(struct mmc_host *host, struct mmc_ios *ios);
|
||||
int (*execute_tuning)(struct mmc_host *host);
|
||||
|
||||
/* The tuning command opcode value is different for SD and eMMC cards */
|
||||
int (*execute_tuning)(struct mmc_host *host, u32 opcode);
|
||||
void (*enable_preset_value)(struct mmc_host *host, bool enable);
|
||||
int (*select_drive_strength)(unsigned int max_dtr, int host_drv, int card_drv);
|
||||
void (*hw_reset)(struct mmc_host *host);
|
||||
@@ -167,6 +172,11 @@ struct mmc_async_req {
|
||||
int (*err_check) (struct mmc_card *, struct mmc_async_req *);
|
||||
};
|
||||
|
||||
struct mmc_hotplug {
|
||||
unsigned int irq;
|
||||
void *handler_priv;
|
||||
};
|
||||
|
||||
struct mmc_host {
|
||||
struct device *parent;
|
||||
struct device class_dev;
|
||||
@@ -242,6 +252,11 @@ struct mmc_host {
|
||||
#define MMC_CAP2_CACHE_CTRL (1 << 1) /* Allow cache control */
|
||||
#define MMC_CAP2_POWEROFF_NOTIFY (1 << 2) /* Notify poweroff supported */
|
||||
#define MMC_CAP2_NO_MULTI_READ (1 << 3) /* Multiblock reads don't work */
|
||||
#define MMC_CAP2_NO_SLEEP_CMD (1 << 4) /* Don't allow sleep command */
|
||||
#define MMC_CAP2_HS200_1_8V_SDR (1 << 5) /* can support */
|
||||
#define MMC_CAP2_HS200_1_2V_SDR (1 << 6) /* can support */
|
||||
#define MMC_CAP2_HS200 (MMC_CAP2_HS200_1_8V_SDR | \
|
||||
MMC_CAP2_HS200_1_2V_SDR)
|
||||
|
||||
mmc_pm_flag_t pm_caps; /* supported pm features */
|
||||
unsigned int power_notify_type;
|
||||
@@ -253,10 +268,12 @@ struct mmc_host {
|
||||
int clk_requests; /* internal reference counter */
|
||||
unsigned int clk_delay; /* number of MCI clk hold cycles */
|
||||
bool clk_gated; /* clock gated */
|
||||
struct work_struct clk_gate_work; /* delayed clock gate */
|
||||
struct delayed_work clk_gate_work; /* delayed clock gate */
|
||||
unsigned int clk_old; /* old clock value cache */
|
||||
spinlock_t clk_lock; /* lock for clk fields */
|
||||
struct mutex clk_gate_mutex; /* mutex for clock gating */
|
||||
struct device_attribute clkgate_delay_attr;
|
||||
unsigned long clkgate_delay;
|
||||
#endif
|
||||
|
||||
/* host specific block data */
|
||||
@@ -297,6 +314,8 @@ struct mmc_host {
|
||||
int claim_cnt; /* "claim" nesting count */
|
||||
|
||||
struct delayed_work detect;
|
||||
int detect_change; /* card detect flag */
|
||||
struct mmc_hotplug hotplug;
|
||||
|
||||
const struct mmc_bus_ops *bus_ops; /* current bus driver */
|
||||
unsigned int bus_refs; /* reference counter */
|
||||
@@ -323,6 +342,8 @@ struct mmc_host {
|
||||
struct fault_attr fail_mmc_request;
|
||||
#endif
|
||||
|
||||
unsigned int actual_clock; /* Actual HC clock rate */
|
||||
|
||||
unsigned long private[0] ____cacheline_aligned;
|
||||
};
|
||||
|
||||
@@ -396,7 +417,7 @@ static inline void mmc_set_disable_delay(struct mmc_host *host,
|
||||
}
|
||||
|
||||
/* Module parameter */
|
||||
extern int mmc_assume_removable;
|
||||
extern bool mmc_assume_removable;
|
||||
|
||||
static inline int mmc_card_is_removable(struct mmc_host *host)
|
||||
{
|
||||
|
||||
+71
-1
@@ -51,6 +51,7 @@
|
||||
#define MMC_READ_SINGLE_BLOCK 17 /* adtc [31:0] data addr R1 */
|
||||
#define MMC_READ_MULTIPLE_BLOCK 18 /* adtc [31:0] data addr R1 */
|
||||
#define MMC_SEND_TUNING_BLOCK 19 /* adtc R1 */
|
||||
#define MMC_SEND_TUNING_BLOCK_HS200 21 /* adtc R1 */
|
||||
|
||||
/* class 3 */
|
||||
#define MMC_WRITE_DAT_UNTIL_STOP 20 /* adtc [31:0] data addr R1 */
|
||||
@@ -280,6 +281,7 @@ struct _mmc_csd {
|
||||
#define EXT_CSD_RST_N_FUNCTION 162 /* R/W */
|
||||
#define EXT_CSD_SANITIZE_START 165 /* W */
|
||||
#define EXT_CSD_WR_REL_PARAM 166 /* RO */
|
||||
#define EXT_CSD_BOOT_WP 173 /* R/W */
|
||||
#define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */
|
||||
#define EXT_CSD_PART_CONFIG 179 /* R/W */
|
||||
#define EXT_CSD_ERASED_MEM_CONT 181 /* RO */
|
||||
@@ -321,6 +323,11 @@ struct _mmc_csd {
|
||||
|
||||
#define EXT_CSD_WR_REL_PARAM_EN (1<<2)
|
||||
|
||||
#define EXT_CSD_BOOT_WP_B_PWR_WP_DIS (0x40)
|
||||
#define EXT_CSD_BOOT_WP_B_PERM_WP_DIS (0x10)
|
||||
#define EXT_CSD_BOOT_WP_B_PERM_WP_EN (0x04)
|
||||
#define EXT_CSD_BOOT_WP_B_PWR_WP_EN (0x01)
|
||||
|
||||
#define EXT_CSD_PART_CONFIG_ACC_MASK (0x7)
|
||||
#define EXT_CSD_PART_CONFIG_ACC_BOOT0 (0x1)
|
||||
#define EXT_CSD_PART_CONFIG_ACC_GP0 (0x4)
|
||||
@@ -333,13 +340,76 @@ struct _mmc_csd {
|
||||
|
||||
#define EXT_CSD_CARD_TYPE_26 (1<<0) /* Card can run at 26MHz */
|
||||
#define EXT_CSD_CARD_TYPE_52 (1<<1) /* Card can run at 52MHz */
|
||||
#define EXT_CSD_CARD_TYPE_MASK 0xF /* Mask out reserved bits */
|
||||
#define EXT_CSD_CARD_TYPE_MASK 0x3F /* Mask out reserved bits */
|
||||
#define EXT_CSD_CARD_TYPE_DDR_1_8V (1<<2) /* Card can run at 52MHz */
|
||||
/* DDR mode @1.8V or 3V I/O */
|
||||
#define EXT_CSD_CARD_TYPE_DDR_1_2V (1<<3) /* Card can run at 52MHz */
|
||||
/* DDR mode @1.2V I/O */
|
||||
#define EXT_CSD_CARD_TYPE_DDR_52 (EXT_CSD_CARD_TYPE_DDR_1_8V \
|
||||
| EXT_CSD_CARD_TYPE_DDR_1_2V)
|
||||
#define EXT_CSD_CARD_TYPE_SDR_1_8V (1<<4) /* Card can run at 200MHz */
|
||||
#define EXT_CSD_CARD_TYPE_SDR_1_2V (1<<5) /* Card can run at 200MHz */
|
||||
/* SDR mode @1.2V I/O */
|
||||
|
||||
#define EXT_CSD_CARD_TYPE_SDR_200 (EXT_CSD_CARD_TYPE_SDR_1_8V | \
|
||||
EXT_CSD_CARD_TYPE_SDR_1_2V)
|
||||
|
||||
#define EXT_CSD_CARD_TYPE_SDR_ALL (EXT_CSD_CARD_TYPE_SDR_200 | \
|
||||
EXT_CSD_CARD_TYPE_52 | \
|
||||
EXT_CSD_CARD_TYPE_26)
|
||||
|
||||
#define EXT_CSD_CARD_TYPE_SDR_1_2V_ALL (EXT_CSD_CARD_TYPE_SDR_1_2V | \
|
||||
EXT_CSD_CARD_TYPE_52 | \
|
||||
EXT_CSD_CARD_TYPE_26)
|
||||
|
||||
#define EXT_CSD_CARD_TYPE_SDR_1_8V_ALL (EXT_CSD_CARD_TYPE_SDR_1_8V | \
|
||||
EXT_CSD_CARD_TYPE_52 | \
|
||||
EXT_CSD_CARD_TYPE_26)
|
||||
|
||||
#define EXT_CSD_CARD_TYPE_SDR_1_2V_DDR_1_8V (EXT_CSD_CARD_TYPE_SDR_1_2V | \
|
||||
EXT_CSD_CARD_TYPE_DDR_1_8V | \
|
||||
EXT_CSD_CARD_TYPE_52 | \
|
||||
EXT_CSD_CARD_TYPE_26)
|
||||
|
||||
#define EXT_CSD_CARD_TYPE_SDR_1_8V_DDR_1_8V (EXT_CSD_CARD_TYPE_SDR_1_8V | \
|
||||
EXT_CSD_CARD_TYPE_DDR_1_8V | \
|
||||
EXT_CSD_CARD_TYPE_52 | \
|
||||
EXT_CSD_CARD_TYPE_26)
|
||||
|
||||
#define EXT_CSD_CARD_TYPE_SDR_1_2V_DDR_1_2V (EXT_CSD_CARD_TYPE_SDR_1_2V | \
|
||||
EXT_CSD_CARD_TYPE_DDR_1_2V | \
|
||||
EXT_CSD_CARD_TYPE_52 | \
|
||||
EXT_CSD_CARD_TYPE_26)
|
||||
|
||||
#define EXT_CSD_CARD_TYPE_SDR_1_8V_DDR_1_2V (EXT_CSD_CARD_TYPE_SDR_1_8V | \
|
||||
EXT_CSD_CARD_TYPE_DDR_1_2V | \
|
||||
EXT_CSD_CARD_TYPE_52 | \
|
||||
EXT_CSD_CARD_TYPE_26)
|
||||
|
||||
#define EXT_CSD_CARD_TYPE_SDR_1_2V_DDR_52 (EXT_CSD_CARD_TYPE_SDR_1_2V | \
|
||||
EXT_CSD_CARD_TYPE_DDR_52 | \
|
||||
EXT_CSD_CARD_TYPE_52 | \
|
||||
EXT_CSD_CARD_TYPE_26)
|
||||
|
||||
#define EXT_CSD_CARD_TYPE_SDR_1_8V_DDR_52 (EXT_CSD_CARD_TYPE_SDR_1_8V | \
|
||||
EXT_CSD_CARD_TYPE_DDR_52 | \
|
||||
EXT_CSD_CARD_TYPE_52 | \
|
||||
EXT_CSD_CARD_TYPE_26)
|
||||
|
||||
#define EXT_CSD_CARD_TYPE_SDR_ALL_DDR_1_8V (EXT_CSD_CARD_TYPE_SDR_200 | \
|
||||
EXT_CSD_CARD_TYPE_DDR_1_8V | \
|
||||
EXT_CSD_CARD_TYPE_52 | \
|
||||
EXT_CSD_CARD_TYPE_26)
|
||||
|
||||
#define EXT_CSD_CARD_TYPE_SDR_ALL_DDR_1_2V (EXT_CSD_CARD_TYPE_SDR_200 | \
|
||||
EXT_CSD_CARD_TYPE_DDR_1_2V | \
|
||||
EXT_CSD_CARD_TYPE_52 | \
|
||||
EXT_CSD_CARD_TYPE_26)
|
||||
|
||||
#define EXT_CSD_CARD_TYPE_SDR_ALL_DDR_52 (EXT_CSD_CARD_TYPE_SDR_200 | \
|
||||
EXT_CSD_CARD_TYPE_DDR_52 | \
|
||||
EXT_CSD_CARD_TYPE_52 | \
|
||||
EXT_CSD_CARD_TYPE_26)
|
||||
|
||||
#define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */
|
||||
#define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */
|
||||
|
||||
@@ -0,0 +1,18 @@
|
||||
#ifndef LINUX_MMC_SDHCI_PCI_DATA_H
|
||||
#define LINUX_MMC_SDHCI_PCI_DATA_H
|
||||
|
||||
struct pci_dev;
|
||||
|
||||
struct sdhci_pci_data {
|
||||
struct pci_dev *pdev;
|
||||
int slotno;
|
||||
int rst_n_gpio; /* Set to -EINVAL if unused */
|
||||
int cd_gpio; /* Set to -EINVAL if unused */
|
||||
int (*setup)(struct sdhci_pci_data *data);
|
||||
void (*cleanup)(struct sdhci_pci_data *data);
|
||||
};
|
||||
|
||||
extern struct sdhci_pci_data *(*sdhci_pci_get_data)(struct pci_dev *pdev,
|
||||
int slotno);
|
||||
|
||||
#endif
|
||||
@@ -90,8 +90,6 @@ struct sdhci_host {
|
||||
|
||||
unsigned int quirks2; /* More deviations from spec. */
|
||||
|
||||
#define SDHCI_QUIRK2_OWN_CARD_DETECTION (1<<0)
|
||||
|
||||
int irq; /* Device IRQ */
|
||||
void __iomem *ioaddr; /* Mapped address */
|
||||
|
||||
@@ -121,6 +119,7 @@ struct sdhci_host {
|
||||
#define SDHCI_AUTO_CMD23 (1<<7) /* Auto CMD23 support */
|
||||
#define SDHCI_PV_ENABLED (1<<8) /* Preset value enabled */
|
||||
#define SDHCI_SDIO_IRQ_ENABLED (1<<9) /* SDIO irq enabled */
|
||||
#define SDHCI_HS200_NEEDS_TUNING (1<<10) /* HS200 needs tuning */
|
||||
|
||||
unsigned int version; /* SDHCI spec. version */
|
||||
|
||||
|
||||
@@ -38,6 +38,7 @@
|
||||
* [8:0] Byte/block count
|
||||
*/
|
||||
|
||||
#define R4_18V_PRESENT (1<<24)
|
||||
#define R4_MEMORY_PRESENT (1 << 27)
|
||||
|
||||
/*
|
||||
@@ -85,6 +86,7 @@
|
||||
#define SDIO_SD_REV_1_01 0 /* SD Physical Spec Version 1.01 */
|
||||
#define SDIO_SD_REV_1_10 1 /* SD Physical Spec Version 1.10 */
|
||||
#define SDIO_SD_REV_2_00 2 /* SD Physical Spec Version 2.00 */
|
||||
#define SDIO_SD_REV_3_00 3 /* SD Physical Spev Version 3.00 */
|
||||
|
||||
#define SDIO_CCCR_IOEx 0x02
|
||||
#define SDIO_CCCR_IORx 0x03
|
||||
@@ -134,8 +136,31 @@
|
||||
#define SDIO_CCCR_SPEED 0x13
|
||||
|
||||
#define SDIO_SPEED_SHS 0x01 /* Supports High-Speed mode */
|
||||
#define SDIO_SPEED_EHS 0x02 /* Enable High-Speed mode */
|
||||
#define SDIO_SPEED_BSS_SHIFT 1
|
||||
#define SDIO_SPEED_BSS_MASK (7<<SDIO_SPEED_BSS_SHIFT)
|
||||
#define SDIO_SPEED_SDR12 (0<<SDIO_SPEED_BSS_SHIFT)
|
||||
#define SDIO_SPEED_SDR25 (1<<SDIO_SPEED_BSS_SHIFT)
|
||||
#define SDIO_SPEED_SDR50 (2<<SDIO_SPEED_BSS_SHIFT)
|
||||
#define SDIO_SPEED_SDR104 (3<<SDIO_SPEED_BSS_SHIFT)
|
||||
#define SDIO_SPEED_DDR50 (4<<SDIO_SPEED_BSS_SHIFT)
|
||||
#define SDIO_SPEED_EHS SDIO_SPEED_SDR25 /* Enable High-Speed */
|
||||
|
||||
#define SDIO_CCCR_UHS 0x14
|
||||
#define SDIO_UHS_SDR50 0x01
|
||||
#define SDIO_UHS_SDR104 0x02
|
||||
#define SDIO_UHS_DDR50 0x04
|
||||
|
||||
#define SDIO_CCCR_DRIVE_STRENGTH 0x15
|
||||
#define SDIO_SDTx_MASK 0x07
|
||||
#define SDIO_DRIVE_SDTA (1<<0)
|
||||
#define SDIO_DRIVE_SDTC (1<<1)
|
||||
#define SDIO_DRIVE_SDTD (1<<2)
|
||||
#define SDIO_DRIVE_DTSx_MASK 0x03
|
||||
#define SDIO_DRIVE_DTSx_SHIFT 4
|
||||
#define SDIO_DTSx_SET_TYPE_B (0 << SDIO_DRIVE_DTSx_SHIFT)
|
||||
#define SDIO_DTSx_SET_TYPE_A (1 << SDIO_DRIVE_DTSx_SHIFT)
|
||||
#define SDIO_DTSx_SET_TYPE_C (2 << SDIO_DRIVE_DTSx_SHIFT)
|
||||
#define SDIO_DTSx_SET_TYPE_D (3 << SDIO_DRIVE_DTSx_SHIFT)
|
||||
/*
|
||||
* Function Basic Registers (FBR)
|
||||
*/
|
||||
|
||||
@@ -436,6 +436,17 @@ struct spi_device_id {
|
||||
__attribute__((aligned(sizeof(kernel_ulong_t))));
|
||||
};
|
||||
|
||||
/* mcp */
|
||||
|
||||
#define MCP_NAME_SIZE 20
|
||||
#define MCP_MODULE_PREFIX "mcp:"
|
||||
|
||||
struct mcp_device_id {
|
||||
char name[MCP_NAME_SIZE];
|
||||
kernel_ulong_t driver_data /* Data private to the driver */
|
||||
__attribute__((aligned(sizeof(kernel_ulong_t))));
|
||||
};
|
||||
|
||||
/* dmi */
|
||||
enum dmi_field {
|
||||
DMI_NONE,
|
||||
|
||||
+16
-5
@@ -205,6 +205,20 @@ enum module_state
|
||||
MODULE_STATE_GOING,
|
||||
};
|
||||
|
||||
/**
|
||||
* struct module_ref - per cpu module reference counts
|
||||
* @incs: number of module get on this cpu
|
||||
* @decs: number of module put on this cpu
|
||||
*
|
||||
* We force an alignment on 8 or 16 bytes, so that alloc_percpu()
|
||||
* put @incs/@decs in same cache line, with no extra memory cost,
|
||||
* since alloc_percpu() is fine grained.
|
||||
*/
|
||||
struct module_ref {
|
||||
unsigned long incs;
|
||||
unsigned long decs;
|
||||
} __attribute((aligned(2 * sizeof(unsigned long))));
|
||||
|
||||
struct module
|
||||
{
|
||||
enum module_state state;
|
||||
@@ -347,10 +361,7 @@ struct module
|
||||
/* Destruction function. */
|
||||
void (*exit)(void);
|
||||
|
||||
struct module_ref {
|
||||
unsigned int incs;
|
||||
unsigned int decs;
|
||||
} __percpu *refptr;
|
||||
struct module_ref __percpu *refptr;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CONSTRUCTORS
|
||||
@@ -434,7 +445,7 @@ extern void __module_put_and_exit(struct module *mod, long code)
|
||||
#define module_put_and_exit(code) __module_put_and_exit(THIS_MODULE, code);
|
||||
|
||||
#ifdef CONFIG_MODULE_UNLOAD
|
||||
unsigned int module_refcount(struct module *mod);
|
||||
unsigned long module_refcount(struct module *mod);
|
||||
void __symbol_put(const char *symbol);
|
||||
#define symbol_put(x) __symbol_put(MODULE_SYMBOL_PREFIX #x)
|
||||
void symbol_put_addr(void *addr);
|
||||
|
||||
@@ -350,23 +350,23 @@ extern int param_set_charp(const char *val, const struct kernel_param *kp);
|
||||
extern int param_get_charp(char *buffer, const struct kernel_param *kp);
|
||||
#define param_check_charp(name, p) __param_check(name, p, char *)
|
||||
|
||||
/* For historical reasons "bool" parameters can be (unsigned) "int". */
|
||||
/* We used to allow int as well as bool. We're taking that away! */
|
||||
extern struct kernel_param_ops param_ops_bool;
|
||||
extern int param_set_bool(const char *val, const struct kernel_param *kp);
|
||||
extern int param_get_bool(char *buffer, const struct kernel_param *kp);
|
||||
#define param_check_bool(name, p) \
|
||||
static inline void __check_##name(void) \
|
||||
{ \
|
||||
BUILD_BUG_ON(!__same_type((p), bool *) && \
|
||||
!__same_type((p), unsigned int *) && \
|
||||
!__same_type((p), int *)); \
|
||||
}
|
||||
#define param_check_bool(name, p) __param_check(name, p, bool)
|
||||
|
||||
extern struct kernel_param_ops param_ops_invbool;
|
||||
extern int param_set_invbool(const char *val, const struct kernel_param *kp);
|
||||
extern int param_get_invbool(char *buffer, const struct kernel_param *kp);
|
||||
#define param_check_invbool(name, p) __param_check(name, p, bool)
|
||||
|
||||
/* An int, which can only be set like a bool (though it shows as an int). */
|
||||
extern struct kernel_param_ops param_ops_bint;
|
||||
extern int param_set_bint(const char *val, const struct kernel_param *kp);
|
||||
#define param_get_bint param_get_int
|
||||
#define param_check_bint param_check_int
|
||||
|
||||
/**
|
||||
* module_param_array - a parameter which is an array of some type
|
||||
* @name: the name of the array variable
|
||||
@@ -395,6 +395,7 @@ extern int param_get_invbool(char *buffer, const struct kernel_param *kp);
|
||||
* module_param_named() for why this might be necessary.
|
||||
*/
|
||||
#define module_param_array_named(name, array, type, nump, perm) \
|
||||
param_check_##type(name, &(array)[0]); \
|
||||
static const struct kparam_array __param_arr_##name \
|
||||
= { .max = ARRAY_SIZE(array), .num = nump, \
|
||||
.ops = ¶m_ops_##type, \
|
||||
|
||||
@@ -43,9 +43,11 @@ typedef unsigned short mifi_t;
|
||||
typedef __u32 if_mask;
|
||||
#define NIFBITS (sizeof(if_mask) * 8) /* bits per mask */
|
||||
|
||||
#if !defined(__KERNEL__) && !defined(DIV_ROUND_UP)
|
||||
#if !defined(__KERNEL__)
|
||||
#if !defined(DIV_ROUND_UP)
|
||||
#define DIV_ROUND_UP(x,y) (((x) + ((y) - 1)) / (y))
|
||||
#endif
|
||||
#endif
|
||||
|
||||
typedef struct if_set {
|
||||
if_mask ifs_bits[DIV_ROUND_UP(IF_SETSIZE, NIFBITS)];
|
||||
|
||||
@@ -0,0 +1,68 @@
|
||||
/*
|
||||
* Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*/
|
||||
|
||||
#ifndef __MACH_MXS_GPMI_NAND_H__
|
||||
#define __MACH_MXS_GPMI_NAND_H__
|
||||
|
||||
/* The size of the resources is fixed. */
|
||||
#define GPMI_NAND_RES_SIZE 6
|
||||
|
||||
/* Resource names for the GPMI NAND driver. */
|
||||
#define GPMI_NAND_GPMI_REGS_ADDR_RES_NAME "GPMI NAND GPMI Registers"
|
||||
#define GPMI_NAND_GPMI_INTERRUPT_RES_NAME "GPMI NAND GPMI Interrupt"
|
||||
#define GPMI_NAND_BCH_REGS_ADDR_RES_NAME "GPMI NAND BCH Registers"
|
||||
#define GPMI_NAND_BCH_INTERRUPT_RES_NAME "GPMI NAND BCH Interrupt"
|
||||
#define GPMI_NAND_DMA_CHANNELS_RES_NAME "GPMI NAND DMA Channels"
|
||||
#define GPMI_NAND_DMA_INTERRUPT_RES_NAME "GPMI NAND DMA Interrupt"
|
||||
|
||||
/**
|
||||
* struct gpmi_nand_platform_data - GPMI NAND driver platform data.
|
||||
*
|
||||
* This structure communicates platform-specific information to the GPMI NAND
|
||||
* driver that can't be expressed as resources.
|
||||
*
|
||||
* @platform_init: A pointer to a function the driver will call to
|
||||
* initialize the platform (e.g., set up the pin mux).
|
||||
* @min_prop_delay_in_ns: Minimum propagation delay of GPMI signals to and
|
||||
* from the NAND Flash device, in nanoseconds.
|
||||
* @max_prop_delay_in_ns: Maximum propagation delay of GPMI signals to and
|
||||
* from the NAND Flash device, in nanoseconds.
|
||||
* @max_chip_count: The maximum number of chips for which the driver
|
||||
* should configure the hardware. This value most
|
||||
* likely reflects the number of pins that are
|
||||
* connected to a NAND Flash device. If this is
|
||||
* greater than the SoC hardware can support, the
|
||||
* driver will print a message and fail to initialize.
|
||||
* @partitions: An optional pointer to an array of partition
|
||||
* descriptions.
|
||||
* @partition_count: The number of elements in the partitions array.
|
||||
*/
|
||||
struct gpmi_nand_platform_data {
|
||||
/* SoC hardware information. */
|
||||
int (*platform_init)(void);
|
||||
|
||||
/* NAND Flash information. */
|
||||
unsigned int min_prop_delay_in_ns;
|
||||
unsigned int max_prop_delay_in_ns;
|
||||
unsigned int max_chip_count;
|
||||
|
||||
/* Medium information. */
|
||||
struct mtd_partition *partitions;
|
||||
unsigned partition_count;
|
||||
};
|
||||
#endif
|
||||
@@ -0,0 +1,434 @@
|
||||
/*
|
||||
* Definitions for the NVM Express interface
|
||||
* Copyright (c) 2011, Intel Corporation.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
* version 2, as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*/
|
||||
|
||||
#ifndef _LINUX_NVME_H
|
||||
#define _LINUX_NVME_H
|
||||
|
||||
#include <linux/types.h>
|
||||
|
||||
struct nvme_bar {
|
||||
__u64 cap; /* Controller Capabilities */
|
||||
__u32 vs; /* Version */
|
||||
__u32 intms; /* Interrupt Mask Set */
|
||||
__u32 intmc; /* Interrupt Mask Clear */
|
||||
__u32 cc; /* Controller Configuration */
|
||||
__u32 rsvd1; /* Reserved */
|
||||
__u32 csts; /* Controller Status */
|
||||
__u32 rsvd2; /* Reserved */
|
||||
__u32 aqa; /* Admin Queue Attributes */
|
||||
__u64 asq; /* Admin SQ Base Address */
|
||||
__u64 acq; /* Admin CQ Base Address */
|
||||
};
|
||||
|
||||
#define NVME_CAP_TIMEOUT(cap) (((cap) >> 24) & 0xff)
|
||||
#define NVME_CAP_STRIDE(cap) (((cap) >> 32) & 0xf)
|
||||
|
||||
enum {
|
||||
NVME_CC_ENABLE = 1 << 0,
|
||||
NVME_CC_CSS_NVM = 0 << 4,
|
||||
NVME_CC_MPS_SHIFT = 7,
|
||||
NVME_CC_ARB_RR = 0 << 11,
|
||||
NVME_CC_ARB_WRRU = 1 << 11,
|
||||
NVME_CC_ARB_VS = 7 << 11,
|
||||
NVME_CC_SHN_NONE = 0 << 14,
|
||||
NVME_CC_SHN_NORMAL = 1 << 14,
|
||||
NVME_CC_SHN_ABRUPT = 2 << 14,
|
||||
NVME_CC_IOSQES = 6 << 16,
|
||||
NVME_CC_IOCQES = 4 << 20,
|
||||
NVME_CSTS_RDY = 1 << 0,
|
||||
NVME_CSTS_CFS = 1 << 1,
|
||||
NVME_CSTS_SHST_NORMAL = 0 << 2,
|
||||
NVME_CSTS_SHST_OCCUR = 1 << 2,
|
||||
NVME_CSTS_SHST_CMPLT = 2 << 2,
|
||||
};
|
||||
|
||||
struct nvme_id_power_state {
|
||||
__le16 max_power; /* centiwatts */
|
||||
__u16 rsvd2;
|
||||
__le32 entry_lat; /* microseconds */
|
||||
__le32 exit_lat; /* microseconds */
|
||||
__u8 read_tput;
|
||||
__u8 read_lat;
|
||||
__u8 write_tput;
|
||||
__u8 write_lat;
|
||||
__u8 rsvd16[16];
|
||||
};
|
||||
|
||||
#define NVME_VS(major, minor) (major << 16 | minor)
|
||||
|
||||
struct nvme_id_ctrl {
|
||||
__le16 vid;
|
||||
__le16 ssvid;
|
||||
char sn[20];
|
||||
char mn[40];
|
||||
char fr[8];
|
||||
__u8 rab;
|
||||
__u8 ieee[3];
|
||||
__u8 mic;
|
||||
__u8 mdts;
|
||||
__u8 rsvd78[178];
|
||||
__le16 oacs;
|
||||
__u8 acl;
|
||||
__u8 aerl;
|
||||
__u8 frmw;
|
||||
__u8 lpa;
|
||||
__u8 elpe;
|
||||
__u8 npss;
|
||||
__u8 rsvd264[248];
|
||||
__u8 sqes;
|
||||
__u8 cqes;
|
||||
__u8 rsvd514[2];
|
||||
__le32 nn;
|
||||
__le16 oncs;
|
||||
__le16 fuses;
|
||||
__u8 fna;
|
||||
__u8 vwc;
|
||||
__le16 awun;
|
||||
__le16 awupf;
|
||||
__u8 rsvd530[1518];
|
||||
struct nvme_id_power_state psd[32];
|
||||
__u8 vs[1024];
|
||||
};
|
||||
|
||||
struct nvme_lbaf {
|
||||
__le16 ms;
|
||||
__u8 ds;
|
||||
__u8 rp;
|
||||
};
|
||||
|
||||
struct nvme_id_ns {
|
||||
__le64 nsze;
|
||||
__le64 ncap;
|
||||
__le64 nuse;
|
||||
__u8 nsfeat;
|
||||
__u8 nlbaf;
|
||||
__u8 flbas;
|
||||
__u8 mc;
|
||||
__u8 dpc;
|
||||
__u8 dps;
|
||||
__u8 rsvd30[98];
|
||||
struct nvme_lbaf lbaf[16];
|
||||
__u8 rsvd192[192];
|
||||
__u8 vs[3712];
|
||||
};
|
||||
|
||||
enum {
|
||||
NVME_NS_FEAT_THIN = 1 << 0,
|
||||
NVME_LBAF_RP_BEST = 0,
|
||||
NVME_LBAF_RP_BETTER = 1,
|
||||
NVME_LBAF_RP_GOOD = 2,
|
||||
NVME_LBAF_RP_DEGRADED = 3,
|
||||
};
|
||||
|
||||
struct nvme_lba_range_type {
|
||||
__u8 type;
|
||||
__u8 attributes;
|
||||
__u8 rsvd2[14];
|
||||
__u64 slba;
|
||||
__u64 nlb;
|
||||
__u8 guid[16];
|
||||
__u8 rsvd48[16];
|
||||
};
|
||||
|
||||
enum {
|
||||
NVME_LBART_TYPE_FS = 0x01,
|
||||
NVME_LBART_TYPE_RAID = 0x02,
|
||||
NVME_LBART_TYPE_CACHE = 0x03,
|
||||
NVME_LBART_TYPE_SWAP = 0x04,
|
||||
|
||||
NVME_LBART_ATTRIB_TEMP = 1 << 0,
|
||||
NVME_LBART_ATTRIB_HIDE = 1 << 1,
|
||||
};
|
||||
|
||||
/* I/O commands */
|
||||
|
||||
enum nvme_opcode {
|
||||
nvme_cmd_flush = 0x00,
|
||||
nvme_cmd_write = 0x01,
|
||||
nvme_cmd_read = 0x02,
|
||||
nvme_cmd_write_uncor = 0x04,
|
||||
nvme_cmd_compare = 0x05,
|
||||
nvme_cmd_dsm = 0x09,
|
||||
};
|
||||
|
||||
struct nvme_common_command {
|
||||
__u8 opcode;
|
||||
__u8 flags;
|
||||
__u16 command_id;
|
||||
__le32 nsid;
|
||||
__u32 cdw2[2];
|
||||
__le64 metadata;
|
||||
__le64 prp1;
|
||||
__le64 prp2;
|
||||
__u32 cdw10[6];
|
||||
};
|
||||
|
||||
struct nvme_rw_command {
|
||||
__u8 opcode;
|
||||
__u8 flags;
|
||||
__u16 command_id;
|
||||
__le32 nsid;
|
||||
__u64 rsvd2;
|
||||
__le64 metadata;
|
||||
__le64 prp1;
|
||||
__le64 prp2;
|
||||
__le64 slba;
|
||||
__le16 length;
|
||||
__le16 control;
|
||||
__le32 dsmgmt;
|
||||
__le32 reftag;
|
||||
__le16 apptag;
|
||||
__le16 appmask;
|
||||
};
|
||||
|
||||
enum {
|
||||
NVME_RW_LR = 1 << 15,
|
||||
NVME_RW_FUA = 1 << 14,
|
||||
NVME_RW_DSM_FREQ_UNSPEC = 0,
|
||||
NVME_RW_DSM_FREQ_TYPICAL = 1,
|
||||
NVME_RW_DSM_FREQ_RARE = 2,
|
||||
NVME_RW_DSM_FREQ_READS = 3,
|
||||
NVME_RW_DSM_FREQ_WRITES = 4,
|
||||
NVME_RW_DSM_FREQ_RW = 5,
|
||||
NVME_RW_DSM_FREQ_ONCE = 6,
|
||||
NVME_RW_DSM_FREQ_PREFETCH = 7,
|
||||
NVME_RW_DSM_FREQ_TEMP = 8,
|
||||
NVME_RW_DSM_LATENCY_NONE = 0 << 4,
|
||||
NVME_RW_DSM_LATENCY_IDLE = 1 << 4,
|
||||
NVME_RW_DSM_LATENCY_NORM = 2 << 4,
|
||||
NVME_RW_DSM_LATENCY_LOW = 3 << 4,
|
||||
NVME_RW_DSM_SEQ_REQ = 1 << 6,
|
||||
NVME_RW_DSM_COMPRESSED = 1 << 7,
|
||||
};
|
||||
|
||||
/* Admin commands */
|
||||
|
||||
enum nvme_admin_opcode {
|
||||
nvme_admin_delete_sq = 0x00,
|
||||
nvme_admin_create_sq = 0x01,
|
||||
nvme_admin_get_log_page = 0x02,
|
||||
nvme_admin_delete_cq = 0x04,
|
||||
nvme_admin_create_cq = 0x05,
|
||||
nvme_admin_identify = 0x06,
|
||||
nvme_admin_abort_cmd = 0x08,
|
||||
nvme_admin_set_features = 0x09,
|
||||
nvme_admin_get_features = 0x0a,
|
||||
nvme_admin_async_event = 0x0c,
|
||||
nvme_admin_activate_fw = 0x10,
|
||||
nvme_admin_download_fw = 0x11,
|
||||
nvme_admin_format_nvm = 0x80,
|
||||
nvme_admin_security_send = 0x81,
|
||||
nvme_admin_security_recv = 0x82,
|
||||
};
|
||||
|
||||
enum {
|
||||
NVME_QUEUE_PHYS_CONTIG = (1 << 0),
|
||||
NVME_CQ_IRQ_ENABLED = (1 << 1),
|
||||
NVME_SQ_PRIO_URGENT = (0 << 1),
|
||||
NVME_SQ_PRIO_HIGH = (1 << 1),
|
||||
NVME_SQ_PRIO_MEDIUM = (2 << 1),
|
||||
NVME_SQ_PRIO_LOW = (3 << 1),
|
||||
NVME_FEAT_ARBITRATION = 0x01,
|
||||
NVME_FEAT_POWER_MGMT = 0x02,
|
||||
NVME_FEAT_LBA_RANGE = 0x03,
|
||||
NVME_FEAT_TEMP_THRESH = 0x04,
|
||||
NVME_FEAT_ERR_RECOVERY = 0x05,
|
||||
NVME_FEAT_VOLATILE_WC = 0x06,
|
||||
NVME_FEAT_NUM_QUEUES = 0x07,
|
||||
NVME_FEAT_IRQ_COALESCE = 0x08,
|
||||
NVME_FEAT_IRQ_CONFIG = 0x09,
|
||||
NVME_FEAT_WRITE_ATOMIC = 0x0a,
|
||||
NVME_FEAT_ASYNC_EVENT = 0x0b,
|
||||
NVME_FEAT_SW_PROGRESS = 0x0c,
|
||||
};
|
||||
|
||||
struct nvme_identify {
|
||||
__u8 opcode;
|
||||
__u8 flags;
|
||||
__u16 command_id;
|
||||
__le32 nsid;
|
||||
__u64 rsvd2[2];
|
||||
__le64 prp1;
|
||||
__le64 prp2;
|
||||
__le32 cns;
|
||||
__u32 rsvd11[5];
|
||||
};
|
||||
|
||||
struct nvme_features {
|
||||
__u8 opcode;
|
||||
__u8 flags;
|
||||
__u16 command_id;
|
||||
__le32 nsid;
|
||||
__u64 rsvd2[2];
|
||||
__le64 prp1;
|
||||
__le64 prp2;
|
||||
__le32 fid;
|
||||
__le32 dword11;
|
||||
__u32 rsvd12[4];
|
||||
};
|
||||
|
||||
struct nvme_create_cq {
|
||||
__u8 opcode;
|
||||
__u8 flags;
|
||||
__u16 command_id;
|
||||
__u32 rsvd1[5];
|
||||
__le64 prp1;
|
||||
__u64 rsvd8;
|
||||
__le16 cqid;
|
||||
__le16 qsize;
|
||||
__le16 cq_flags;
|
||||
__le16 irq_vector;
|
||||
__u32 rsvd12[4];
|
||||
};
|
||||
|
||||
struct nvme_create_sq {
|
||||
__u8 opcode;
|
||||
__u8 flags;
|
||||
__u16 command_id;
|
||||
__u32 rsvd1[5];
|
||||
__le64 prp1;
|
||||
__u64 rsvd8;
|
||||
__le16 sqid;
|
||||
__le16 qsize;
|
||||
__le16 sq_flags;
|
||||
__le16 cqid;
|
||||
__u32 rsvd12[4];
|
||||
};
|
||||
|
||||
struct nvme_delete_queue {
|
||||
__u8 opcode;
|
||||
__u8 flags;
|
||||
__u16 command_id;
|
||||
__u32 rsvd1[9];
|
||||
__le16 qid;
|
||||
__u16 rsvd10;
|
||||
__u32 rsvd11[5];
|
||||
};
|
||||
|
||||
struct nvme_download_firmware {
|
||||
__u8 opcode;
|
||||
__u8 flags;
|
||||
__u16 command_id;
|
||||
__u32 rsvd1[5];
|
||||
__le64 prp1;
|
||||
__le64 prp2;
|
||||
__le32 numd;
|
||||
__le32 offset;
|
||||
__u32 rsvd12[4];
|
||||
};
|
||||
|
||||
struct nvme_command {
|
||||
union {
|
||||
struct nvme_common_command common;
|
||||
struct nvme_rw_command rw;
|
||||
struct nvme_identify identify;
|
||||
struct nvme_features features;
|
||||
struct nvme_create_cq create_cq;
|
||||
struct nvme_create_sq create_sq;
|
||||
struct nvme_delete_queue delete_queue;
|
||||
struct nvme_download_firmware dlfw;
|
||||
};
|
||||
};
|
||||
|
||||
enum {
|
||||
NVME_SC_SUCCESS = 0x0,
|
||||
NVME_SC_INVALID_OPCODE = 0x1,
|
||||
NVME_SC_INVALID_FIELD = 0x2,
|
||||
NVME_SC_CMDID_CONFLICT = 0x3,
|
||||
NVME_SC_DATA_XFER_ERROR = 0x4,
|
||||
NVME_SC_POWER_LOSS = 0x5,
|
||||
NVME_SC_INTERNAL = 0x6,
|
||||
NVME_SC_ABORT_REQ = 0x7,
|
||||
NVME_SC_ABORT_QUEUE = 0x8,
|
||||
NVME_SC_FUSED_FAIL = 0x9,
|
||||
NVME_SC_FUSED_MISSING = 0xa,
|
||||
NVME_SC_INVALID_NS = 0xb,
|
||||
NVME_SC_LBA_RANGE = 0x80,
|
||||
NVME_SC_CAP_EXCEEDED = 0x81,
|
||||
NVME_SC_NS_NOT_READY = 0x82,
|
||||
NVME_SC_CQ_INVALID = 0x100,
|
||||
NVME_SC_QID_INVALID = 0x101,
|
||||
NVME_SC_QUEUE_SIZE = 0x102,
|
||||
NVME_SC_ABORT_LIMIT = 0x103,
|
||||
NVME_SC_ABORT_MISSING = 0x104,
|
||||
NVME_SC_ASYNC_LIMIT = 0x105,
|
||||
NVME_SC_FIRMWARE_SLOT = 0x106,
|
||||
NVME_SC_FIRMWARE_IMAGE = 0x107,
|
||||
NVME_SC_INVALID_VECTOR = 0x108,
|
||||
NVME_SC_INVALID_LOG_PAGE = 0x109,
|
||||
NVME_SC_INVALID_FORMAT = 0x10a,
|
||||
NVME_SC_BAD_ATTRIBUTES = 0x180,
|
||||
NVME_SC_WRITE_FAULT = 0x280,
|
||||
NVME_SC_READ_ERROR = 0x281,
|
||||
NVME_SC_GUARD_CHECK = 0x282,
|
||||
NVME_SC_APPTAG_CHECK = 0x283,
|
||||
NVME_SC_REFTAG_CHECK = 0x284,
|
||||
NVME_SC_COMPARE_FAILED = 0x285,
|
||||
NVME_SC_ACCESS_DENIED = 0x286,
|
||||
};
|
||||
|
||||
struct nvme_completion {
|
||||
__le32 result; /* Used by admin commands to return data */
|
||||
__u32 rsvd;
|
||||
__le16 sq_head; /* how much of this queue may be reclaimed */
|
||||
__le16 sq_id; /* submission queue that generated this entry */
|
||||
__u16 command_id; /* of the command which completed */
|
||||
__le16 status; /* did the command fail, and if so, why? */
|
||||
};
|
||||
|
||||
struct nvme_user_io {
|
||||
__u8 opcode;
|
||||
__u8 flags;
|
||||
__u16 control;
|
||||
__u16 nblocks;
|
||||
__u16 rsvd;
|
||||
__u64 metadata;
|
||||
__u64 addr;
|
||||
__u64 slba;
|
||||
__u32 dsmgmt;
|
||||
__u32 reftag;
|
||||
__u16 apptag;
|
||||
__u16 appmask;
|
||||
};
|
||||
|
||||
struct nvme_admin_cmd {
|
||||
__u8 opcode;
|
||||
__u8 flags;
|
||||
__u16 rsvd1;
|
||||
__u32 nsid;
|
||||
__u32 cdw2;
|
||||
__u32 cdw3;
|
||||
__u64 metadata;
|
||||
__u64 addr;
|
||||
__u32 metadata_len;
|
||||
__u32 data_len;
|
||||
__u32 cdw10;
|
||||
__u32 cdw11;
|
||||
__u32 cdw12;
|
||||
__u32 cdw13;
|
||||
__u32 cdw14;
|
||||
__u32 cdw15;
|
||||
__u32 timeout_ms;
|
||||
__u32 result;
|
||||
};
|
||||
|
||||
#define NVME_IOCTL_ID _IO('N', 0x40)
|
||||
#define NVME_IOCTL_ADMIN_CMD _IOWR('N', 0x41, struct nvme_admin_cmd)
|
||||
#define NVME_IOCTL_SUBMIT_IO _IOW('N', 0x42, struct nvme_user_io)
|
||||
|
||||
#endif /* _LINUX_NVME_H */
|
||||
@@ -32,7 +32,8 @@
|
||||
# else
|
||||
# error "could not determine byte order"
|
||||
# endif
|
||||
#elif defined(__BYTE_ORDER)
|
||||
#else
|
||||
#if defined(__BYTE_ORDER)
|
||||
# if __BYTE_ORDER == __BIG_ENDIAN
|
||||
# define _PATCHKEY(id) (0xfd00|id)
|
||||
# elif __BYTE_ORDER == __LITTLE_ENDIAN
|
||||
@@ -41,5 +42,6 @@
|
||||
# error "could not determine byte order"
|
||||
# endif
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#endif /* _LINUX_PATCHKEY_H */
|
||||
|
||||
@@ -6,6 +6,8 @@
|
||||
* Copyright (C) 1998 Paul Mackerras.
|
||||
*/
|
||||
|
||||
#ifndef _LINUX_PMU_H
|
||||
#define _LINUX_PMU_H
|
||||
|
||||
#define PMU_DRIVER_VERSION 2
|
||||
|
||||
@@ -207,3 +209,5 @@ extern int pmu_sys_suspended;
|
||||
#endif
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
#endif /* _LINUX_PMU_H */
|
||||
|
||||
+13
-2
@@ -112,6 +112,7 @@
|
||||
|
||||
#include <linux/compiler.h> /* For unlikely. */
|
||||
#include <linux/sched.h> /* For struct task_struct. */
|
||||
#include <linux/err.h> /* for IS_ERR_VALUE */
|
||||
|
||||
|
||||
extern long arch_ptrace(struct task_struct *child, long request,
|
||||
@@ -127,8 +128,9 @@ extern void __ptrace_link(struct task_struct *child,
|
||||
struct task_struct *new_parent);
|
||||
extern void __ptrace_unlink(struct task_struct *child);
|
||||
extern void exit_ptrace(struct task_struct *tracer);
|
||||
#define PTRACE_MODE_READ 1
|
||||
#define PTRACE_MODE_ATTACH 2
|
||||
#define PTRACE_MODE_READ 0x01
|
||||
#define PTRACE_MODE_ATTACH 0x02
|
||||
#define PTRACE_MODE_NOAUDIT 0x04
|
||||
/* Returns 0 on success, -errno on denial. */
|
||||
extern int __ptrace_may_access(struct task_struct *task, unsigned int mode);
|
||||
/* Returns true on success, false on denial. */
|
||||
@@ -265,6 +267,15 @@ static inline void ptrace_release_task(struct task_struct *task)
|
||||
#define force_successful_syscall_return() do { } while (0)
|
||||
#endif
|
||||
|
||||
#ifndef is_syscall_success
|
||||
/*
|
||||
* On most systems we can tell if a syscall is a success based on if the retval
|
||||
* is an error value. On some systems like ia64 and powerpc they have different
|
||||
* indicators of success/failure and must define their own.
|
||||
*/
|
||||
#define is_syscall_success(regs) (!IS_ERR_VALUE((unsigned long)(regs_return_value(regs))))
|
||||
#endif
|
||||
|
||||
/*
|
||||
* <asm/ptrace.h> should define the following things inside #ifdef __KERNEL__.
|
||||
*
|
||||
|
||||
@@ -230,7 +230,11 @@ struct mem_dqinfo {
|
||||
struct super_block;
|
||||
|
||||
#define DQF_MASK 0xffff /* Mask for format specific flags */
|
||||
#define DQF_INFO_DIRTY_B 16
|
||||
#define DQF_GETINFO_MASK 0x1ffff /* Mask for flags passed to userspace */
|
||||
#define DQF_SETINFO_MASK 0xffff /* Mask for flags modifiable from userspace */
|
||||
#define DQF_SYS_FILE_B 16
|
||||
#define DQF_SYS_FILE (1 << DQF_SYS_FILE_B) /* Quota file stored as system file */
|
||||
#define DQF_INFO_DIRTY_B 31
|
||||
#define DQF_INFO_DIRTY (1 << DQF_INFO_DIRTY_B) /* Is info dirty? */
|
||||
|
||||
extern void mark_info_dirty(struct super_block *sb, int type);
|
||||
|
||||
@@ -109,12 +109,18 @@ void res_counter_init(struct res_counter *counter, struct res_counter *parent);
|
||||
*
|
||||
* returns 0 on success and <0 if the counter->usage will exceed the
|
||||
* counter->limit _locked call expects the counter->lock to be taken
|
||||
*
|
||||
* charge_nofail works the same, except that it charges the resource
|
||||
* counter unconditionally, and returns < 0 if the after the current
|
||||
* charge we are over limit.
|
||||
*/
|
||||
|
||||
int __must_check res_counter_charge_locked(struct res_counter *counter,
|
||||
unsigned long val);
|
||||
int __must_check res_counter_charge(struct res_counter *counter,
|
||||
unsigned long val, struct res_counter **limit_fail_at);
|
||||
int __must_check res_counter_charge_nofail(struct res_counter *counter,
|
||||
unsigned long val, struct res_counter **limit_fail_at);
|
||||
|
||||
/*
|
||||
* uncharge - tell that some portion of the resource is released
|
||||
@@ -142,7 +148,10 @@ static inline unsigned long long res_counter_margin(struct res_counter *cnt)
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&cnt->lock, flags);
|
||||
margin = cnt->limit - cnt->usage;
|
||||
if (cnt->limit > cnt->usage)
|
||||
margin = cnt->limit - cnt->usage;
|
||||
else
|
||||
margin = 0;
|
||||
spin_unlock_irqrestore(&cnt->lock, flags);
|
||||
return margin;
|
||||
}
|
||||
|
||||
@@ -2088,7 +2088,7 @@ extern int sched_setscheduler_nocheck(struct task_struct *, int,
|
||||
extern struct task_struct *idle_task(int cpu);
|
||||
/**
|
||||
* is_idle_task - is the specified task an idle task?
|
||||
* @tsk: the task in question.
|
||||
* @p: the task in question.
|
||||
*/
|
||||
static inline bool is_idle_task(struct task_struct *p)
|
||||
{
|
||||
|
||||
+13
-47
@@ -54,8 +54,8 @@ struct user_namespace;
|
||||
* These functions are in security/capability.c and are used
|
||||
* as the default capabilities functions
|
||||
*/
|
||||
extern int cap_capable(struct task_struct *tsk, const struct cred *cred,
|
||||
struct user_namespace *ns, int cap, int audit);
|
||||
extern int cap_capable(const struct cred *cred, struct user_namespace *ns,
|
||||
int cap, int audit);
|
||||
extern int cap_settime(const struct timespec *ts, const struct timezone *tz);
|
||||
extern int cap_ptrace_access_check(struct task_struct *child, unsigned int mode);
|
||||
extern int cap_ptrace_traceme(struct task_struct *parent);
|
||||
@@ -96,7 +96,6 @@ struct xfrm_user_sec_ctx;
|
||||
struct seq_file;
|
||||
|
||||
extern int cap_netlink_send(struct sock *sk, struct sk_buff *skb);
|
||||
extern int cap_netlink_recv(struct sk_buff *skb, int cap);
|
||||
|
||||
void reset_security_ops(void);
|
||||
|
||||
@@ -799,12 +798,6 @@ static inline void security_free_mnt_opts(struct security_mnt_opts *opts)
|
||||
* @skb contains the sk_buff structure for the netlink message.
|
||||
* Return 0 if the information was successfully saved and message
|
||||
* is allowed to be transmitted.
|
||||
* @netlink_recv:
|
||||
* Check permission before processing the received netlink message in
|
||||
* @skb.
|
||||
* @skb contains the sk_buff structure for the netlink message.
|
||||
* @cap indicates the capability required
|
||||
* Return 0 if permission is granted.
|
||||
*
|
||||
* Security hooks for Unix domain networking.
|
||||
*
|
||||
@@ -1268,7 +1261,6 @@ static inline void security_free_mnt_opts(struct security_mnt_opts *opts)
|
||||
* @capable:
|
||||
* Check whether the @tsk process has the @cap capability in the indicated
|
||||
* credentials.
|
||||
* @tsk contains the task_struct for the process.
|
||||
* @cred contains the credentials to use.
|
||||
* @ns contains the user namespace we want the capability in
|
||||
* @cap contains the capability <include/linux/capability.h>.
|
||||
@@ -1392,8 +1384,8 @@ struct security_operations {
|
||||
const kernel_cap_t *effective,
|
||||
const kernel_cap_t *inheritable,
|
||||
const kernel_cap_t *permitted);
|
||||
int (*capable) (struct task_struct *tsk, const struct cred *cred,
|
||||
struct user_namespace *ns, int cap, int audit);
|
||||
int (*capable) (const struct cred *cred, struct user_namespace *ns,
|
||||
int cap, int audit);
|
||||
int (*quotactl) (int cmds, int type, int id, struct super_block *sb);
|
||||
int (*quota_on) (struct dentry *dentry);
|
||||
int (*syslog) (int type);
|
||||
@@ -1563,7 +1555,6 @@ struct security_operations {
|
||||
struct sembuf *sops, unsigned nsops, int alter);
|
||||
|
||||
int (*netlink_send) (struct sock *sk, struct sk_buff *skb);
|
||||
int (*netlink_recv) (struct sk_buff *skb, int cap);
|
||||
|
||||
void (*d_instantiate) (struct dentry *dentry, struct inode *inode);
|
||||
|
||||
@@ -1675,12 +1666,10 @@ int security_capset(struct cred *new, const struct cred *old,
|
||||
const kernel_cap_t *effective,
|
||||
const kernel_cap_t *inheritable,
|
||||
const kernel_cap_t *permitted);
|
||||
int security_capable(struct user_namespace *ns, const struct cred *cred,
|
||||
int security_capable(const struct cred *cred, struct user_namespace *ns,
|
||||
int cap);
|
||||
int security_real_capable(struct task_struct *tsk, struct user_namespace *ns,
|
||||
int cap);
|
||||
int security_real_capable_noaudit(struct task_struct *tsk,
|
||||
struct user_namespace *ns, int cap);
|
||||
int security_capable_noaudit(const struct cred *cred, struct user_namespace *ns,
|
||||
int cap);
|
||||
int security_quotactl(int cmds, int type, int id, struct super_block *sb);
|
||||
int security_quota_on(struct dentry *dentry);
|
||||
int security_syslog(int type);
|
||||
@@ -1817,7 +1806,6 @@ void security_d_instantiate(struct dentry *dentry, struct inode *inode);
|
||||
int security_getprocattr(struct task_struct *p, char *name, char **value);
|
||||
int security_setprocattr(struct task_struct *p, char *name, void *value, size_t size);
|
||||
int security_netlink_send(struct sock *sk, struct sk_buff *skb);
|
||||
int security_netlink_recv(struct sk_buff *skb, int cap);
|
||||
int security_secid_to_secctx(u32 secid, char **secdata, u32 *seclen);
|
||||
int security_secctx_to_secid(const char *secdata, u32 seclen, u32 *secid);
|
||||
void security_release_secctx(char *secdata, u32 seclen);
|
||||
@@ -1875,32 +1863,15 @@ static inline int security_capset(struct cred *new,
|
||||
return cap_capset(new, old, effective, inheritable, permitted);
|
||||
}
|
||||
|
||||
static inline int security_capable(struct user_namespace *ns,
|
||||
const struct cred *cred, int cap)
|
||||
static inline int security_capable(const struct cred *cred,
|
||||
struct user_namespace *ns, int cap)
|
||||
{
|
||||
return cap_capable(current, cred, ns, cap, SECURITY_CAP_AUDIT);
|
||||
return cap_capable(cred, ns, cap, SECURITY_CAP_AUDIT);
|
||||
}
|
||||
|
||||
static inline int security_real_capable(struct task_struct *tsk, struct user_namespace *ns, int cap)
|
||||
{
|
||||
int ret;
|
||||
|
||||
rcu_read_lock();
|
||||
ret = cap_capable(tsk, __task_cred(tsk), ns, cap, SECURITY_CAP_AUDIT);
|
||||
rcu_read_unlock();
|
||||
return ret;
|
||||
}
|
||||
|
||||
static inline
|
||||
int security_real_capable_noaudit(struct task_struct *tsk, struct user_namespace *ns, int cap)
|
||||
{
|
||||
int ret;
|
||||
|
||||
rcu_read_lock();
|
||||
ret = cap_capable(tsk, __task_cred(tsk), ns, cap,
|
||||
SECURITY_CAP_NOAUDIT);
|
||||
rcu_read_unlock();
|
||||
return ret;
|
||||
static inline int security_capable_noaudit(const struct cred *cred,
|
||||
struct user_namespace *ns, int cap) {
|
||||
return cap_capable(cred, ns, cap, SECURITY_CAP_NOAUDIT);
|
||||
}
|
||||
|
||||
static inline int security_quotactl(int cmds, int type, int id,
|
||||
@@ -2517,11 +2488,6 @@ static inline int security_netlink_send(struct sock *sk, struct sk_buff *skb)
|
||||
return cap_netlink_send(sk, skb);
|
||||
}
|
||||
|
||||
static inline int security_netlink_recv(struct sk_buff *skb, int cap)
|
||||
{
|
||||
return cap_netlink_recv(skb, cap);
|
||||
}
|
||||
|
||||
static inline int security_secid_to_secctx(u32 secid, char **secdata, u32 *seclen)
|
||||
{
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
@@ -207,6 +207,10 @@
|
||||
/* Xilinx PSS UART */
|
||||
#define PORT_XUARTPS 98
|
||||
|
||||
/* Atheros AR933X SoC */
|
||||
#define PORT_AR933X 99
|
||||
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#include <linux/compiler.h>
|
||||
|
||||
@@ -30,7 +30,7 @@ struct sh_desc {
|
||||
struct sh_dmae_regs hw;
|
||||
struct list_head node;
|
||||
struct dma_async_tx_descriptor async_tx;
|
||||
enum dma_data_direction direction;
|
||||
enum dma_transfer_direction direction;
|
||||
dma_cookie_t cookie;
|
||||
size_t partial;
|
||||
int chunks;
|
||||
@@ -48,6 +48,7 @@ struct sh_dmae_channel {
|
||||
unsigned int offset;
|
||||
unsigned int dmars;
|
||||
unsigned int dmars_bit;
|
||||
unsigned int chclr_offset;
|
||||
};
|
||||
|
||||
struct sh_dmae_pdata {
|
||||
@@ -68,6 +69,7 @@ struct sh_dmae_pdata {
|
||||
unsigned int dmaor_is_32bit:1;
|
||||
unsigned int needs_tend_set:1;
|
||||
unsigned int no_dmars:1;
|
||||
unsigned int chclr_present:1;
|
||||
};
|
||||
|
||||
/* DMA register */
|
||||
|
||||
@@ -48,6 +48,7 @@ extern struct file *shmem_file_setup(const char *name,
|
||||
loff_t size, unsigned long flags);
|
||||
extern int shmem_zero_setup(struct vm_area_struct *);
|
||||
extern int shmem_lock(struct file *file, int lock, struct user_struct *user);
|
||||
extern void shmem_unlock_mapping(struct address_space *mapping);
|
||||
extern struct page *shmem_read_mapping_page_gfp(struct address_space *mapping,
|
||||
pgoff_t index, gfp_t gfp_mask);
|
||||
extern void shmem_truncate_range(struct inode *inode, loff_t start, loff_t end);
|
||||
|
||||
@@ -0,0 +1,6 @@
|
||||
#ifndef _SIRFSOC_DMA_H_
|
||||
#define _SIRFSOC_DMA_H_
|
||||
|
||||
bool sirfsoc_dma_filter_id(struct dma_chan *chan, void *chan_id);
|
||||
|
||||
#endif
|
||||
@@ -192,7 +192,6 @@ enum
|
||||
LINUX_MIB_TCPPARTIALUNDO, /* TCPPartialUndo */
|
||||
LINUX_MIB_TCPDSACKUNDO, /* TCPDSACKUndo */
|
||||
LINUX_MIB_TCPLOSSUNDO, /* TCPLossUndo */
|
||||
LINUX_MIB_TCPLOSS, /* TCPLoss */
|
||||
LINUX_MIB_TCPLOSTRETRANSMIT, /* TCPLostRetransmit */
|
||||
LINUX_MIB_TCPRENOFAILURES, /* TCPRenoFailures */
|
||||
LINUX_MIB_TCPSACKFAILURES, /* TCPSackFailures */
|
||||
|
||||
@@ -1,3 +1,5 @@
|
||||
#ifndef _LINUX_SOUND_H
|
||||
#define _LINUX_SOUND_H
|
||||
|
||||
/*
|
||||
* Minor numbers for the sound driver.
|
||||
@@ -42,3 +44,5 @@ extern void unregister_sound_mixer(int unit);
|
||||
extern void unregister_sound_midi(int unit);
|
||||
extern void unregister_sound_dsp(int unit);
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
#endif /* _LINUX_SOUND_H */
|
||||
|
||||
@@ -198,7 +198,8 @@ typedef struct seq_event_rec {
|
||||
# else
|
||||
# error "could not determine byte order"
|
||||
# endif
|
||||
#elif defined(__BYTE_ORDER)
|
||||
#else
|
||||
# if defined(__BYTE_ORDER)
|
||||
# if __BYTE_ORDER == __BIG_ENDIAN
|
||||
# define AFMT_S16_NE AFMT_S16_BE
|
||||
# elif __BYTE_ORDER == __LITTLE_ENDIAN
|
||||
@@ -206,6 +207,7 @@ typedef struct seq_event_rec {
|
||||
# else
|
||||
# error "could not determine byte order"
|
||||
# endif
|
||||
# endif
|
||||
#endif
|
||||
|
||||
/*
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user