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Merge branch 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6

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This commit is contained in:
Linus Torvalds
2005-10-28 21:09:26 -07:00
parent 1f419cadff 0e1f606092
commit 8a212ab6b8
63 changed files with 4197 additions and 1328 deletions
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include/asm-ia64/machvec.h
+1 -1
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@@ -26,7 +26,7 @@ typedef void ia64_mv_cpu_init_t (void);
typedef void ia64_mv_irq_init_t (void);
typedef void ia64_mv_send_ipi_t (int, int, int, int);
typedef void ia64_mv_timer_interrupt_t (int, void *, struct pt_regs *);
typedef void ia64_mv_global_tlb_purge_t (unsigned long, unsigned long, unsigned long);
typedef void ia64_mv_global_tlb_purge_t (struct mm_struct *, unsigned long, unsigned long, unsigned long);
typedef void ia64_mv_tlb_migrate_finish_t (struct mm_struct *);
typedef unsigned int ia64_mv_local_vector_to_irq (u8);
typedef char *ia64_mv_pci_get_legacy_mem_t (struct pci_bus *);
include/asm-ia64/machvec_hpzx1.h
+10 -11
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@@ -1,8 +1,7 @@
#ifndef _ASM_IA64_MACHVEC_HPZX1_h
#define _ASM_IA64_MACHVEC_HPZX1_h
extern ia64_mv_setup_t dig_setup;
extern ia64_mv_setup_t sba_setup;
extern ia64_mv_setup_t dig_setup;
extern ia64_mv_dma_alloc_coherent sba_alloc_coherent;
extern ia64_mv_dma_free_coherent sba_free_coherent;
extern ia64_mv_dma_map_single sba_map_single;
@@ -19,15 +18,15 @@ extern ia64_mv_dma_mapping_error sba_dma_mapping_error;
* platform's machvec structure. When compiling a non-generic kernel,
* the macros are used directly.
*/
#define platform_name "hpzx1"
#define platform_setup sba_setup
#define platform_dma_init machvec_noop
#define platform_dma_alloc_coherent sba_alloc_coherent
#define platform_dma_free_coherent sba_free_coherent
#define platform_dma_map_single sba_map_single
#define platform_dma_unmap_single sba_unmap_single
#define platform_dma_map_sg sba_map_sg
#define platform_dma_unmap_sg sba_unmap_sg
#define platform_name "hpzx1"
#define platform_setup dig_setup
#define platform_dma_init machvec_noop
#define platform_dma_alloc_coherent sba_alloc_coherent
#define platform_dma_free_coherent sba_free_coherent
#define platform_dma_map_single sba_map_single
#define platform_dma_unmap_single sba_unmap_single
#define platform_dma_map_sg sba_map_sg
#define platform_dma_unmap_sg sba_unmap_sg
#define platform_dma_sync_single_for_cpu machvec_dma_sync_single
#define platform_dma_sync_sg_for_cpu machvec_dma_sync_sg
#define platform_dma_sync_single_for_device machvec_dma_sync_single
include/asm-ia64/machvec_hpzx1_swiotlb.h
+1 -2
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@@ -2,7 +2,6 @@
#define _ASM_IA64_MACHVEC_HPZX1_SWIOTLB_h
extern ia64_mv_setup_t dig_setup;
extern ia64_mv_dma_init hwsw_init;
extern ia64_mv_dma_alloc_coherent hwsw_alloc_coherent;
extern ia64_mv_dma_free_coherent hwsw_free_coherent;
extern ia64_mv_dma_map_single hwsw_map_single;
@@ -26,7 +25,7 @@ extern ia64_mv_dma_sync_sg_for_device hwsw_sync_sg_for_device;
#define platform_name "hpzx1_swiotlb"
#define platform_setup dig_setup
#define platform_dma_init hwsw_init
#define platform_dma_init machvec_noop
#define platform_dma_alloc_coherent hwsw_alloc_coherent
#define platform_dma_free_coherent hwsw_free_coherent
#define platform_dma_map_single hwsw_map_single
include/asm-ia64/meminit.h
+4 -2
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@@ -16,10 +16,11 @@
* - initrd (optional)
* - command line string
* - kernel code & data
* - Kernel memory map built from EFI memory map
*
* More could be added if necessary
*/
#define IA64_MAX_RSVD_REGIONS 5
#define IA64_MAX_RSVD_REGIONS 6
struct rsvd_region {
unsigned long start; /* virtual address of beginning of element */
@@ -33,6 +34,7 @@ extern void find_memory (void);
extern void reserve_memory (void);
extern void find_initrd (void);
extern int filter_rsvd_memory (unsigned long start, unsigned long end, void *arg);
extern void efi_memmap_init(unsigned long *, unsigned long *);
/*
* For rounding an address to the next IA64_GRANULE_SIZE or order
@@ -41,7 +43,7 @@ extern int filter_rsvd_memory (unsigned long start, unsigned long end, void *arg
#define GRANULEROUNDUP(n) (((n)+IA64_GRANULE_SIZE-1) & ~(IA64_GRANULE_SIZE-1))
#define ORDERROUNDDOWN(n) ((n) & ~((PAGE_SIZE<<MAX_ORDER)-1))
#ifdef CONFIG_DISCONTIGMEM
#ifdef CONFIG_NUMA
extern void call_pernode_memory (unsigned long start, unsigned long len, void *func);
#else
# define call_pernode_memory(start, len, func) (*func)(start, len, 0)
include/asm-ia64/mmzone.h
+7 -3
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@@ -15,7 +15,7 @@
#include <asm/page.h>
#include <asm/meminit.h>
#ifdef CONFIG_DISCONTIGMEM
#ifdef CONFIG_NUMA
static inline int pfn_to_nid(unsigned long pfn)
{
@@ -31,6 +31,10 @@ static inline int pfn_to_nid(unsigned long pfn)
#endif
}
#ifdef CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID
extern int early_pfn_to_nid(unsigned long pfn);
#endif
#ifdef CONFIG_IA64_DIG /* DIG systems are small */
# define MAX_PHYSNODE_ID 8
# define NR_NODE_MEMBLKS (MAX_NUMNODES * 8)
@@ -39,8 +43,8 @@ static inline int pfn_to_nid(unsigned long pfn)
# define NR_NODE_MEMBLKS (MAX_NUMNODES * 4)
#endif
#else /* CONFIG_DISCONTIGMEM */
#else /* CONFIG_NUMA */
# define NR_NODE_MEMBLKS (MAX_NUMNODES * 4)
#endif /* CONFIG_DISCONTIGMEM */
#endif /* CONFIG_NUMA */
#endif /* _ASM_IA64_MMZONE_H */
include/asm-ia64/nodedata.h
+2 -2
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@@ -17,7 +17,7 @@
#include <asm/percpu.h>
#include <asm/mmzone.h>
#ifdef CONFIG_DISCONTIGMEM
#ifdef CONFIG_NUMA
/*
* Node Data. One of these structures is located on each node of a NUMA system.
@@ -47,6 +47,6 @@ struct ia64_node_data {
*/
#define NODE_DATA(nid) (local_node_data->pg_data_ptrs[nid])
#endif /* CONFIG_DISCONTIGMEM */
#endif /* CONFIG_NUMA */
#endif /* _ASM_IA64_NODEDATA_H */
include/asm-ia64/page.h
+3 -3
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@@ -102,15 +102,15 @@ do { \
#ifdef CONFIG_VIRTUAL_MEM_MAP
extern int ia64_pfn_valid (unsigned long pfn);
#else
#elif defined(CONFIG_FLATMEM)
# define ia64_pfn_valid(pfn) 1
#endif
#ifndef CONFIG_DISCONTIGMEM
#ifdef CONFIG_FLATMEM
# define pfn_valid(pfn) (((pfn) < max_mapnr) && ia64_pfn_valid(pfn))
# define page_to_pfn(page) ((unsigned long) (page - mem_map))
# define pfn_to_page(pfn) (mem_map + (pfn))
#else
#elif defined(CONFIG_DISCONTIGMEM)
extern struct page *vmem_map;
extern unsigned long max_low_pfn;
# define pfn_valid(pfn) (((pfn) < max_low_pfn) && ia64_pfn_valid(pfn))
include/asm-ia64/sn/arch.h
+26 -10
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@@ -17,6 +17,32 @@
#include <asm/sn/types.h>
#include <asm/sn/sn_cpuid.h>
/*
* This is the maximum number of NUMALINK nodes that can be part of a single
* SSI kernel. This number includes C-brick, M-bricks, and TIOs. Nodes in
* remote partitions are NOT included in this number.
* The number of compact nodes cannot exceed size of a coherency domain.
* The purpose of this define is to specify a node count that includes
* all C/M/TIO nodes in an SSI system.
*
* SGI system can currently support up to 256 C/M nodes plus additional TIO nodes.
*
* Note: ACPI20 has an architectural limit of 256 nodes. When we upgrade
* to ACPI3.0, this limit will be removed. The notion of "compact nodes"
* should be deleted and TIOs should be included in MAX_NUMNODES.
*/
#define MAX_COMPACT_NODES 512
/*
* Maximum number of nodes in all partitions and in all coherency domains.
* This is the total number of nodes accessible in the numalink fabric. It
* includes all C & M bricks, plus all TIOs.
*
* This value is also the value of the maximum number of NASIDs in the numalink
* fabric.
*/
#define MAX_NUMALINK_NODES 16384
/*
* The following defines attributes of the HUB chip. These attributes are
* frequently referenced. They are kept in the per-cpu data areas of each cpu.
@@ -40,15 +66,6 @@ DECLARE_PER_CPU(struct sn_hub_info_s, __sn_hub_info);
#define enable_shub_wars_1_1() (sn_hub_info->shub_1_1_found)
/*
* This is the maximum number of nodes that can be part of a kernel.
* Effectively, it's the maximum number of compact node ids (cnodeid_t).
* This is not necessarily the same as MAX_NASIDS.
*/
#define MAX_COMPACT_NODES 2048
#define CPUS_PER_NODE 4
/*
* Compact node ID to nasid mappings kept in the per-cpu data areas of each
* cpu.
@@ -57,7 +74,6 @@ DECLARE_PER_CPU(short, __sn_cnodeid_to_nasid[MAX_NUMNODES]);
#define sn_cnodeid_to_nasid (&__get_cpu_var(__sn_cnodeid_to_nasid[0]))
extern u8 sn_partition_id;
extern u8 sn_system_size;
extern u8 sn_sharing_domain_size;
include/asm-ia64/sn/io.h
+10 -1
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@@ -14,7 +14,7 @@
extern void * sn_io_addr(unsigned long port) __attribute_const__; /* Forward definition */
extern void __sn_mmiowb(void); /* Forward definition */
extern int numionodes;
extern int num_cnodes;
#define __sn_mf_a() ia64_mfa()
@@ -35,6 +35,15 @@ extern void sn_dma_flush(unsigned long);
#define __sn_readl_relaxed ___sn_readl_relaxed
#define __sn_readq_relaxed ___sn_readq_relaxed
/*
* Convenience macros for setting/clearing bits using the above accessors
*/
#define __sn_setq_relaxed(addr, val) \
writeq((__sn_readq_relaxed(addr) | (val)), (addr))
#define __sn_clrq_relaxed(addr, val) \
writeq((__sn_readq_relaxed(addr) & ~(val)), (addr))
/*
* The following routines are SN Platform specific, called when
* a reference is made to inX/outX set macros. SN Platform
include/asm-ia64/sn/klconfig.h
+4 -30
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@@ -208,19 +208,6 @@ typedef struct lboard_s {
klconf_off_t brd_next_same; /* Next BOARD with same nasid */
} lboard_t;
#define KLCF_NUM_COMPS(_brd) ((_brd)->brd_numcompts)
#define NODE_OFFSET_TO_KLINFO(n,off) ((klinfo_t*) TO_NODE_CAC(n,off))
#define KLCF_NEXT(_brd) \
((_brd)->brd_next_same ? \
(NODE_OFFSET_TO_LBOARD((_brd)->brd_next_same_host, (_brd)->brd_next_same)): NULL)
#define KLCF_NEXT_ANY(_brd) \
((_brd)->brd_next_any ? \
(NODE_OFFSET_TO_LBOARD(NASID_GET(_brd), (_brd)->brd_next_any)): NULL)
#define KLCF_COMP(_brd, _ndx) \
((((_brd)->brd_compts[(_ndx)]) == 0) ? 0 : \
(NODE_OFFSET_TO_KLINFO(NASID_GET(_brd), (_brd)->brd_compts[(_ndx)])))
/*
* Generic info structure. This stores common info about a
* component.
@@ -249,24 +236,11 @@ typedef struct klinfo_s { /* Generic info */
} klinfo_t ;
static inline lboard_t *find_lboard_any(lboard_t * start, unsigned char brd_type)
static inline lboard_t *find_lboard_next(lboard_t * brd)
{
/* Search all boards stored on this node. */
while (start) {
if (start->brd_type == brd_type)
return start;
start = KLCF_NEXT_ANY(start);
}
/* Didn't find it. */
return (lboard_t *) NULL;
if (brd && brd->brd_next_any)
return NODE_OFFSET_TO_LBOARD(NASID_GET(brd), brd->brd_next_any);
return NULL;
}
/* external declarations of Linux kernel functions. */
extern lboard_t *root_lboard[];
extern klinfo_t *find_component(lboard_t *brd, klinfo_t *kli, unsigned char type);
extern klinfo_t *find_first_component(lboard_t *brd, unsigned char type);
#endif /* _ASM_IA64_SN_KLCONFIG_H */
include/asm-ia64/sn/l1.h
+12
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@@ -35,4 +35,16 @@
#define L1_BRICKTYPE_ATHENA 0x2b /* + */
#define L1_BRICKTYPE_DAYTONA 0x7a /* z */
/* board type response codes */
#define L1_BOARDTYPE_IP69 0x0100 /* CA */
#define L1_BOARDTYPE_IP63 0x0200 /* CB */
#define L1_BOARDTYPE_BASEIO 0x0300 /* IB */
#define L1_BOARDTYPE_PCIE2SLOT 0x0400 /* IC */
#define L1_BOARDTYPE_PCIX3SLOT 0x0500 /* ID */
#define L1_BOARDTYPE_PCIXPCIE4SLOT 0x0600 /* IE */
#define L1_BOARDTYPE_ABACUS 0x0700 /* AB */
#define L1_BOARDTYPE_DAYTONA 0x0800 /* AD */
#define L1_BOARDTYPE_INVAL (-1) /* invalid brick type */
#endif /* _ASM_IA64_SN_L1_H */
include/asm-ia64/sn/nodepda.h
-1
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@@ -55,7 +55,6 @@ struct nodepda_s {
*/
struct phys_cpuid phys_cpuid[NR_CPUS];
spinlock_t ptc_lock ____cacheline_aligned_in_smp;
spinlock_t bist_lock;
};
typedef struct nodepda_s nodepda_t;
include/asm-ia64/sn/sn_cpuid.h
-3
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@@ -105,7 +105,6 @@ extern short physical_node_map[]; /* indexed by nasid to get cnode */
#define cpuid_to_nasid(cpuid) (sn_nodepda->phys_cpuid[cpuid].nasid)
#define cpuid_to_subnode(cpuid) (sn_nodepda->phys_cpuid[cpuid].subnode)
#define cpuid_to_slice(cpuid) (sn_nodepda->phys_cpuid[cpuid].slice)
#define cpuid_to_cnodeid(cpuid) (physical_node_map[cpuid_to_nasid(cpuid)])
/*
@@ -113,8 +112,6 @@ extern short physical_node_map[]; /* indexed by nasid to get cnode */
* of potentially large tables.
*/
extern int nasid_slice_to_cpuid(int, int);
#define nasid_slice_to_cpu_physical_id(nasid, slice) \
cpu_physical_id(nasid_slice_to_cpuid(nasid, slice))
/*
* cnodeid_to_nasid - convert a cnodeid to a NASID
include/asm-ia64/sn/sn_sal.h
+45 -14
View File
@@ -47,6 +47,7 @@
#define SN_SAL_CONSOLE_PUTB 0x02000028
#define SN_SAL_CONSOLE_XMIT_CHARS 0x0200002a
#define SN_SAL_CONSOLE_READC 0x0200002b
#define SN_SAL_SYSCTL_OP 0x02000030
#define SN_SAL_SYSCTL_MODID_GET 0x02000031
#define SN_SAL_SYSCTL_GET 0x02000032
#define SN_SAL_SYSCTL_IOBRICK_MODULE_GET 0x02000033
@@ -67,7 +68,7 @@
#define SN_SAL_IOIF_INTERRUPT 0x0200004a
#define SN_SAL_HWPERF_OP 0x02000050 // lock
#define SN_SAL_IOIF_ERROR_INTERRUPT 0x02000051
#define SN_SAL_IOIF_PCI_SAFE 0x02000052
#define SN_SAL_IOIF_SLOT_ENABLE 0x02000053
#define SN_SAL_IOIF_SLOT_DISABLE 0x02000054
#define SN_SAL_IOIF_GET_HUBDEV_INFO 0x02000055
@@ -100,6 +101,13 @@
#define SAL_INTR_ALLOC 1
#define SAL_INTR_FREE 2
/*
* operations available on the generic SN_SAL_SYSCTL_OP
* runtime service
*/
#define SAL_SYSCTL_OP_IOBOARD 0x0001 /* retrieve board type */
#define SAL_SYSCTL_OP_TIO_JLCK_RST 0x0002 /* issue TIO clock reset */
/*
* IRouter (i.e. generalized system controller) operations
*/
@@ -198,26 +206,16 @@ ia64_sn_get_master_baseio_nasid(void)
return ret_stuff.v0;
}
static inline char *
static inline void *
ia64_sn_get_klconfig_addr(nasid_t nasid)
{
struct ia64_sal_retval ret_stuff;
int cnodeid;
cnodeid = nasid_to_cnodeid(nasid);
ret_stuff.status = 0;
ret_stuff.v0 = 0;
ret_stuff.v1 = 0;
ret_stuff.v2 = 0;
SAL_CALL(ret_stuff, SN_SAL_GET_KLCONFIG_ADDR, (u64)nasid, 0, 0, 0, 0, 0, 0);
/*
* We should panic if a valid cnode nasid does not produce
* a klconfig address.
*/
if (ret_stuff.status != 0) {
panic("ia64_sn_get_klconfig_addr: Returned error %lx\n", ret_stuff.status);
}
return ret_stuff.v0 ? __va(ret_stuff.v0) : NULL;
}
@@ -694,12 +692,10 @@ sn_change_memprotect(u64 paddr, u64 len, u64 perms, u64 *nasid_array)
unsigned long irq_flags;
cnodeid = nasid_to_cnodeid(get_node_number(paddr));
// spin_lock(&NODEPDA(cnodeid)->bist_lock);
local_irq_save(irq_flags);
ia64_sal_oemcall_nolock(&ret_stuff, SN_SAL_MEMPROTECT, paddr, len,
(u64)nasid_array, perms, 0, 0, 0);
local_irq_restore(irq_flags);
// spin_unlock(&NODEPDA(cnodeid)->bist_lock);
return ret_stuff.status;
}
#define SN_MEMPROT_ACCESS_CLASS_0 0x14a080
@@ -873,6 +869,41 @@ ia64_sn_sysctl_event_init(nasid_t nasid)
return (int) rv.v0;
}
/*
* Ask the system controller on the specified nasid to reset
* the CX corelet clock. Only valid on TIO nodes.
*/
static inline int
ia64_sn_sysctl_tio_clock_reset(nasid_t nasid)
{
struct ia64_sal_retval rv;
SAL_CALL_REENTRANT(rv, SN_SAL_SYSCTL_OP, SAL_SYSCTL_OP_TIO_JLCK_RST,
nasid, 0, 0, 0, 0, 0);
if (rv.status != 0)
return (int)rv.status;
if (rv.v0 != 0)
return (int)rv.v0;
return 0;
}
/*
* Get the associated ioboard type for a given nasid.
*/
static inline int
ia64_sn_sysctl_ioboard_get(nasid_t nasid)
{
struct ia64_sal_retval rv;
SAL_CALL_REENTRANT(rv, SN_SAL_SYSCTL_OP, SAL_SYSCTL_OP_IOBOARD,
nasid, 0, 0, 0, 0, 0);
if (rv.v0 != 0)
return (int)rv.v0;
if (rv.v1 != 0)
return (int)rv.v1;
return 0;
}
/**
* ia64_sn_get_fit_compt - read a FIT entry from the PROM header
* @nasid: NASID of node to read
include/asm-ia64/sn/tioca_provider.h
+7 -7
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@@ -182,11 +182,11 @@ tioca_tlbflush(struct tioca_kernel *tioca_kernel)
* touch every CL aligned GART entry.
*/
ca_base->ca_control2 &= ~(CA_GART_MEM_PARAM);
ca_base->ca_control2 |= CA_GART_FLUSH_TLB;
ca_base->ca_control2 |=
(0x2ull << CA_GART_MEM_PARAM_SHFT);
tmp = ca_base->ca_control2;
__sn_clrq_relaxed(&ca_base->ca_control2, CA_GART_MEM_PARAM);
__sn_setq_relaxed(&ca_base->ca_control2, CA_GART_FLUSH_TLB);
__sn_setq_relaxed(&ca_base->ca_control2,
(0x2ull << CA_GART_MEM_PARAM_SHFT));
tmp = __sn_readq_relaxed(&ca_base->ca_control2);
}
return;
@@ -196,8 +196,8 @@ tioca_tlbflush(struct tioca_kernel *tioca_kernel)
* Gart in uncached mode ... need an explicit flush.
*/
ca_base->ca_control2 |= CA_GART_FLUSH_TLB;
tmp = ca_base->ca_control2;
__sn_setq_relaxed(&ca_base->ca_control2, CA_GART_FLUSH_TLB);
tmp = __sn_readq_relaxed(&ca_base->ca_control2);
}
extern uint32_t tioca_gart_found;
include/asm-ia64/sn/tiocx.h
+2 -1
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@@ -19,6 +19,7 @@ struct cx_id_s {
struct cx_dev {
struct cx_id_s cx_id;
int bt; /* board/blade type */
void *soft; /* driver specific */
struct hubdev_info *hubdev;
struct device dev;
@@ -59,7 +60,7 @@ struct cx_drv {
extern struct sn_irq_info *tiocx_irq_alloc(nasid_t, int, int, nasid_t, int);
extern void tiocx_irq_free(struct sn_irq_info *);
extern int cx_device_unregister(struct cx_dev *);
extern int cx_device_register(nasid_t, int, int, struct hubdev_info *);
extern int cx_device_register(nasid_t, int, int, struct hubdev_info *, int);
extern int cx_driver_unregister(struct cx_drv *);
extern int cx_driver_register(struct cx_drv *);
extern uint64_t tiocx_dma_addr(uint64_t addr);
include/asm-ia64/sn/xp.h
+13 -3
View File
@@ -49,7 +49,7 @@
* C-brick nasids, thus the need for bitmaps which don't account for
* odd-numbered (non C-brick) nasids.
*/
#define XP_MAX_PHYSNODE_ID (MAX_PHYSNODE_ID / 2)
#define XP_MAX_PHYSNODE_ID (MAX_NUMALINK_NODES / 2)
#define XP_NASID_MASK_BYTES ((XP_MAX_PHYSNODE_ID + 7) / 8)
#define XP_NASID_MASK_WORDS ((XP_MAX_PHYSNODE_ID + 63) / 64)
@@ -217,7 +217,17 @@ enum xpc_retval {
xpcInvalidPartid, /* 42: invalid partition ID */
xpcLocalPartid, /* 43: local partition ID */
xpcUnknownReason /* 44: unknown reason -- must be last in list */
xpcOtherGoingDown, /* 44: other side going down, reason unknown */
xpcSystemGoingDown, /* 45: system is going down, reason unknown */
xpcSystemHalt, /* 46: system is being halted */
xpcSystemReboot, /* 47: system is being rebooted */
xpcSystemPoweroff, /* 48: system is being powered off */
xpcDisconnecting, /* 49: channel disconnecting (closing) */
xpcOpenCloseError, /* 50: channel open/close protocol error */
xpcUnknownReason /* 51: unknown reason -- must be last in list */
};
@@ -342,7 +352,7 @@ typedef void (*xpc_notify_func)(enum xpc_retval reason, partid_t partid,
*
* The 'func' field points to the function to call when aynchronous
* notification is required for such events as: a connection established/lost,
* or an incomming message received, or an error condition encountered. A
* or an incoming message received, or an error condition encountered. A
* non-NULL 'func' field indicates that there is an active registration for
* the channel.
*/
include/asm-ia64/sparsemem.h
+20
View File
@@ -0,0 +1,20 @@
#ifndef _ASM_IA64_SPARSEMEM_H
#define _ASM_IA64_SPARSEMEM_H
#ifdef CONFIG_SPARSEMEM
/*
* SECTION_SIZE_BITS 2^N: how big each section will be
* MAX_PHYSMEM_BITS 2^N: how much memory we can have in that space
*/
#define SECTION_SIZE_BITS (30)
#define MAX_PHYSMEM_BITS (50)
#ifdef CONFIG_FORCE_MAX_ZONEORDER
#if ((CONFIG_FORCE_MAX_ZONEORDER - 1 + PAGE_SHIFT) > SECTION_SIZE_BITS)
#undef SECTION_SIZE_BITS
#define SECTION_SIZE_BITS (CONFIG_FORCE_MAX_ZONEORDER - 1 + PAGE_SHIFT)
#endif
#endif
#endif /* CONFIG_SPARSEMEM */
#endif /* _ASM_IA64_SPARSEMEM_H */