From 6ea2bf81d1094e7dff2ae43060c8e23ed22ab194 Mon Sep 17 00:00:00 2001 From: Sheetal Date: Tue, 21 May 2024 11:59:10 +0000 Subject: [PATCH] NVIDIA: SAUCE: ASoC: Update PLL rate for T264 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The PLLs should be set with a VCO frequency in the 900MHz – 1GHz range to minimize jitter and ppm error. Update the PLLA rate accordingly. Here, 983040000 frequency is for multiple of 8K frequencies and 993484800 frequency is for multiple of 11.025K frequencies. https://jirasw.nvidia.com/browse/TAS-2399 Signed-off-by: Sheetal Signed-off-by: Laxman Dewangan Acked-by: Noah Wager Acked-by: Jacob Martin Signed-off-by: Noah Wager --- sound/soc/tegra/tegra_audio_graph_card.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/sound/soc/tegra/tegra_audio_graph_card.c b/sound/soc/tegra/tegra_audio_graph_card.c index ac9712b90091..e814cd2b5551 100644 --- a/sound/soc/tegra/tegra_audio_graph_card.c +++ b/sound/soc/tegra/tegra_audio_graph_card.c @@ -342,11 +342,22 @@ static const struct tegra_audio_cdata tegra186_data = { .plla_out0_rates[x11_RATE] = 45158400, }; +static const struct tegra_audio_cdata tegra264_data = { + /* PLLA1 */ + .plla_rates[x8_RATE] = 983040000, + .plla_rates[x11_RATE] = 993484800, + /* PLLA1_OUT1 */ + .plla_out0_rates[x8_RATE] = 49152000, + .plla_out0_rates[x11_RATE] = 45158400, +}; + static const struct of_device_id graph_of_tegra_match[] = { { .compatible = "nvidia,tegra210-audio-graph-card", .data = &tegra210_data }, { .compatible = "nvidia,tegra186-audio-graph-card", .data = &tegra186_data }, + { .compatible = "nvidia,tegra264-audio-graph-card", + .data = &tegra264_data }, {}, }; MODULE_DEVICE_TABLE(of, graph_of_tegra_match);