From 4080d2d11a2d572228c2b8d02406e997b87ba6a5 Mon Sep 17 00:00:00 2001 From: Stephen Boyd Date: Thu, 14 Mar 2013 20:31:37 -0700 Subject: [PATCH 1/2] ARM: msm: Stop counting before reprogramming clockevent If the clockevent is forcibly reprogrammed to have a different match value we mistakenly assume the timer is not ticking and program a new match value while the timer is running. Although we clear the timer before programming a new match, it's better to stop the timer before clearing it so that we're sure the proper amount of ticks are counted. Failure to do so can lead to missed ticks and system hangs. Signed-off-by: Stephen Boyd Signed-off-by: David Brown --- arch/arm/mach-msm/timer.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c index 2969027f02fa..f9fd77e8f1f5 100644 --- a/arch/arm/mach-msm/timer.c +++ b/arch/arm/mach-msm/timer.c @@ -62,7 +62,10 @@ static int msm_timer_set_next_event(unsigned long cycles, { u32 ctrl = readl_relaxed(event_base + TIMER_ENABLE); - writel_relaxed(0, event_base + TIMER_CLEAR); + ctrl &= ~TIMER_ENABLE_EN; + writel_relaxed(ctrl, event_base + TIMER_ENABLE); + + writel_relaxed(ctrl, event_base + TIMER_CLEAR); writel_relaxed(cycles, event_base + TIMER_MATCH_VAL); writel_relaxed(ctrl | TIMER_ENABLE_EN, event_base + TIMER_ENABLE); return 0; From 73a8c28f167c9e7bc42eafc0bcbd298031709430 Mon Sep 17 00:00:00 2001 From: Stephen Boyd Date: Wed, 10 Apr 2013 18:00:11 -0700 Subject: [PATCH 2/2] ARM: msm: Fix uncompess.h tx underrun check Bit 3 of the SR register is set if there is a tx underrun. If this bit isn't set, we should loop on the tx ready bit until we can transmit again. Otherwise we should skip the loop and transmit immediately. The code is doing the opposite though, checking for an underrun and then looping on the tx ready bit causing us to never loop on the tx read bit when the tx buffer may not be ready. This doesn't seem to affect my 8960 device too often, but in some cases I see a lost character or two from the decompressor prints. This also matches what we do in the assembly in debug-macro.S. Signed-off-by: Stephen Boyd Signed-off-by: David Brown --- arch/arm/mach-msm/include/mach/uncompress.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-msm/include/mach/uncompress.h b/arch/arm/mach-msm/include/mach/uncompress.h index fa97a10d8695..94324870fb04 100644 --- a/arch/arm/mach-msm/include/mach/uncompress.h +++ b/arch/arm/mach-msm/include/mach/uncompress.h @@ -37,7 +37,7 @@ static void putc(int c) * Wait for TX_READY to be set; but skip it if we have a * TX underrun. */ - if (UART_DM_SR & 0x08) + if (!(UART_DM_SR & 0x08)) while (!(UART_DM_ISR & 0x80)) cpu_relax();