ssb: implement spurious tone avoidance
And make use of it in b43. This fixes a regression introduced with
49d55cef5b
b43: N-PHY: implement spurious tone avoidance
This commit made BCM4322 use only MCS 0 on channel 13, which of course
resulted in performance drop (down to 0.7Mb/s).
Reported-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Cc: Stable <stable@vger.kernel.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
committed by
John W. Linville
parent
25b5632fb3
commit
46fc4c9093
@@ -675,3 +675,32 @@ u32 ssb_pmu_get_controlclock(struct ssb_chipcommon *cc)
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return 0;
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}
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}
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void ssb_pmu_spuravoid_pllupdate(struct ssb_chipcommon *cc, int spuravoid)
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{
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u32 pmu_ctl = 0;
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switch (cc->dev->bus->chip_id) {
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case 0x4322:
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ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL0, 0x11100070);
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ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL1, 0x1014140a);
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ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL5, 0x88888854);
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if (spuravoid == 1)
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ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL2, 0x05201828);
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else
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ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL2, 0x05001828);
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pmu_ctl = SSB_CHIPCO_PMU_CTL_PLL_UPD;
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break;
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case 43222:
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/* TODO: BCM43222 requires updating PLLs too */
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return;
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default:
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ssb_printk(KERN_ERR PFX
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"Unknown spuravoidance settings for chip 0x%04X, not changing PLL\n",
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cc->dev->bus->chip_id);
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return;
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}
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chipco_set32(cc, SSB_CHIPCO_PMU_CTL, pmu_ctl);
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}
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EXPORT_SYMBOL_GPL(ssb_pmu_spuravoid_pllupdate);
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