From 41610f47180110a4e5860d4ddca092ede3a4b056 Mon Sep 17 00:00:00 2001 From: Ketan Patil Date: Mon, 25 Mar 2024 08:27:31 +0000 Subject: [PATCH] NVIDIA: SAUCE: perf: smmuv3: Read ceid-override from DT BugLink: https://bugs.launchpad.net/bugs/2080908 A custom DT property ceid-override has been added to override value of SMMU_PMCG_CEID register for TBUs, as this register has not been implemented by HW team in T264. Add support in ARM SMMUv3 PMU driver to read this property from device tree instead of reading the register. http://nvbugs/4270693 Signed-off-by: Ketan Patil Reviewed-by: Pritesh Raithatha Signed-off-by: Bodla Rakesh Babu Signed-off-by: Laxman Dewangan Acked-by: Noah Wager Acked-by: Jacob Martin Signed-off-by: Noah Wager --- drivers/perf/arm_smmuv3_pmu.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/perf/arm_smmuv3_pmu.c b/drivers/perf/arm_smmuv3_pmu.c index 31e491e7f206..bd198e2dc531 100644 --- a/drivers/perf/arm_smmuv3_pmu.c +++ b/drivers/perf/arm_smmuv3_pmu.c @@ -849,7 +849,7 @@ static int smmu_pmu_probe(struct platform_device *pdev) struct smmu_pmu *smmu_pmu; struct resource *res_0; u32 cfgr, reg_size; - u64 ceid_64[2]; + u64 ceid_64[2], ceid; int irq, err; char *name; struct device *dev = &pdev->dev; @@ -895,8 +895,14 @@ static int smmu_pmu_probe(struct platform_device *pdev) if (irq > 0) smmu_pmu->irq = irq; - ceid_64[0] = readq_relaxed(smmu_pmu->reg_base + SMMU_PMCG_CEID0); - ceid_64[1] = readq_relaxed(smmu_pmu->reg_base + SMMU_PMCG_CEID1); + if (!of_property_read_u64(dev->of_node, "ceid0-override", &ceid)) { + ceid_64[0] = ceid; + ceid_64[1] = 0; + } else { + ceid_64[0] = readq_relaxed(smmu_pmu->reg_base + SMMU_PMCG_CEID0); + ceid_64[1] = readq_relaxed(smmu_pmu->reg_base + SMMU_PMCG_CEID1); + } + bitmap_from_arr32(smmu_pmu->supported_events, (u32 *)ceid_64, SMMU_PMCG_ARCH_MAX_EVENTS);