From 3bea3295736a01047bfc09804cfae0b57ade6598 Mon Sep 17 00:00:00 2001 From: Ketan Patil Date: Thu, 13 Jun 2024 10:10:22 +0000 Subject: [PATCH] NVIDIA: SAUCE: memory: tegra: Disable mc-err handling in upstream In t264, the mc-err handling flow is pretty different than t234 and older chips. The new flow has been added in downstream mc-err driver for t264. Hence it is needed to use downstream irq handler code for t264 mc- err. Do not specify irq handler for t264 in upstream mc driver, so that it can use the downstream mc-err handling code. Later on, we need to move downstream mc-err code into upstream mc driver and upstream it. http://nvbugs/4345191 Signed-off-by: Ketan Patil Signed-off-by: Bodla Rakesh Babu Signed-off-by: Laxman Dewangan Acked-by: Noah Wager Acked-by: Jacob Martin Signed-off-by: Noah Wager --- drivers/memory/tegra/mc.h | 7 +++++-- drivers/memory/tegra/tegra186.c | 7 +++++++ drivers/memory/tegra/tegra264.c | 2 +- 3 files changed, 13 insertions(+), 3 deletions(-) diff --git a/drivers/memory/tegra/mc.h b/drivers/memory/tegra/mc.h index fe7cd1264430..2b8b7f777a29 100644 --- a/drivers/memory/tegra/mc.h +++ b/drivers/memory/tegra/mc.h @@ -197,11 +197,14 @@ extern const struct tegra_mc_ops tegra30_mc_ops; #if defined(CONFIG_ARCH_TEGRA_186_SOC) || \ defined(CONFIG_ARCH_TEGRA_194_SOC) || \ - defined(CONFIG_ARCH_TEGRA_234_SOC) || \ - defined(CONFIG_ARCH_TEGRA_264_SOC) + defined(CONFIG_ARCH_TEGRA_234_SOC) extern const struct tegra_mc_ops tegra186_mc_ops; #endif +#if defined(CONFIG_ARCH_TEGRA_264_SOC) +extern const struct tegra_mc_ops tegra264_mc_ops; +#endif + irqreturn_t tegra30_mc_handle_irq(int irq, void *data); extern const char * const tegra_mc_status_names[32]; extern const char * const tegra_mc_error_names[8]; diff --git a/drivers/memory/tegra/tegra186.c b/drivers/memory/tegra/tegra186.c index 307ed21643a7..2315ec3c4ee7 100644 --- a/drivers/memory/tegra/tegra186.c +++ b/drivers/memory/tegra/tegra186.c @@ -180,6 +180,13 @@ const struct tegra_mc_ops tegra186_mc_ops = { .handle_irq = tegra30_mc_handle_irq, }; +const struct tegra_mc_ops tegra264_mc_ops = { + .probe = tegra186_mc_probe, + .remove = tegra186_mc_remove, + .probe_device = tegra186_mc_probe_device, + .resume = tegra186_mc_resume, +}; + #if defined(CONFIG_ARCH_TEGRA_186_SOC) static const struct tegra_mc_client tegra186_mc_clients[] = { { diff --git a/drivers/memory/tegra/tegra264.c b/drivers/memory/tegra/tegra264.c index 338914ee57c7..27fcdde8204a 100644 --- a/drivers/memory/tegra/tegra264.c +++ b/drivers/memory/tegra/tegra264.c @@ -287,7 +287,7 @@ const struct tegra_mc_soc tegra264_mc_soc = { MC_INT_SECERR_SEC | MC_INT_DECERR_VPR | MC_INT_SECURITY_VIOLATION | MC_INT_DECERR_EMEM, .has_addr_hi_reg = true, - .ops = &tegra186_mc_ops, + .ops = &tegra264_mc_ops, .icc_ops = &tegra264_mc_icc_ops, .ch_intmask = 0x0000ff00, .global_intstatus_channel_shift = 8,