Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
Pull crypto updates from Herbert Xu:
"Here is the crypto update for 4.15:
API:
- Disambiguate EBUSY when queueing crypto request by adding ENOSPC.
This change touches code outside the crypto API.
- Reset settings when empty string is written to rng_current.
Algorithms:
- Add OSCCA SM3 secure hash.
Drivers:
- Remove old mv_cesa driver (replaced by marvell/cesa).
- Enable rfc3686/ecb/cfb/ofb AES in crypto4xx.
- Add ccm/gcm AES in crypto4xx.
- Add support for BCM7278 in iproc-rng200.
- Add hash support on Exynos in s5p-sss.
- Fix fallback-induced error in vmx.
- Fix output IV in atmel-aes.
- Fix empty GCM hash in mediatek.
Others:
- Fix DoS potential in lib/mpi.
- Fix potential out-of-order issues with padata"
* 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (162 commits)
lib/mpi: call cond_resched() from mpi_powm() loop
crypto: stm32/hash - Fix return issue on update
crypto: dh - Remove pointless checks for NULL 'p' and 'g'
crypto: qat - Clean up error handling in qat_dh_set_secret()
crypto: dh - Don't permit 'key' or 'g' size longer than 'p'
crypto: dh - Don't permit 'p' to be 0
crypto: dh - Fix double free of ctx->p
hwrng: iproc-rng200 - Add support for BCM7278
dt-bindings: rng: Document BCM7278 RNG200 compatible
crypto: chcr - Replace _manual_ swap with swap macro
crypto: marvell - Add a NULL entry at the end of mv_cesa_plat_id_table[]
hwrng: virtio - Virtio RNG devices need to be re-registered after suspend/resume
crypto: atmel - remove empty functions
crypto: ecdh - remove empty exit()
MAINTAINERS: update maintainer for qat
crypto: caam - remove unused param of ctx_map_to_sec4_sg()
crypto: caam - remove unneeded edesc zeroization
crypto: atmel-aes - Reset the controller before each use
crypto: atmel-aes - properly set IV after {en,de}crypt
hwrng: core - Reset user selected rng by writing "" to rng_current
...
This commit is contained in:
+1
-1
@@ -53,7 +53,7 @@ struct dh {
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*
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* Return: size of the key in bytes
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*/
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int crypto_dh_key_len(const struct dh *params);
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unsigned int crypto_dh_key_len(const struct dh *params);
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/**
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* crypto_dh_encode_key() - encode the private key
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@@ -126,8 +126,7 @@ struct drbg_state {
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__u8 *ctr_null_value; /* CTR mode aligned zero buf */
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__u8 *outscratchpadbuf; /* CTR mode output scratchpad */
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__u8 *outscratchpad; /* CTR mode aligned outbuf */
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struct completion ctr_completion; /* CTR mode async handler */
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int ctr_async_err; /* CTR mode async error */
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struct crypto_wait ctr_wait; /* CTR mode async wait obj */
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bool seeded; /* DRBG fully seeded? */
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bool pr; /* Prediction resistance enabled? */
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@@ -54,7 +54,7 @@ struct ecdh {
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*
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* Return: size of the key in bytes
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*/
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int crypto_ecdh_key_len(const struct ecdh *params);
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unsigned int crypto_ecdh_key_len(const struct ecdh *params);
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/**
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* crypto_ecdh_encode_key() - encode the private key
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@@ -0,0 +1,8 @@
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#ifndef _CRYPTO_GCM_H
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#define _CRYPTO_GCM_H
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#define GCM_AES_IV_SIZE 12
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#define GCM_RFC4106_IV_SIZE 8
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#define GCM_RFC4543_IV_SIZE 8
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#endif
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@@ -227,7 +227,7 @@ struct gf128mul_4k *gf128mul_init_4k_lle(const be128 *g);
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struct gf128mul_4k *gf128mul_init_4k_bbe(const be128 *g);
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void gf128mul_4k_lle(be128 *a, const struct gf128mul_4k *t);
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void gf128mul_4k_bbe(be128 *a, const struct gf128mul_4k *t);
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void gf128mul_x8_ble(le128 *r, const le128 *x);
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static inline void gf128mul_free_4k(struct gf128mul_4k *t)
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{
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kzfree(t);
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+16
-12
@@ -75,6 +75,7 @@ struct ahash_request {
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* state of the HASH transformation at the beginning. This shall fill in
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* the internal structures used during the entire duration of the whole
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* transformation. No data processing happens at this point.
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* Note: mandatory.
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* @update: Push a chunk of data into the driver for transformation. This
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* function actually pushes blocks of data from upper layers into the
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* driver, which then passes those to the hardware as seen fit. This
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@@ -84,16 +85,20 @@ struct ahash_request {
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* context, as this function may be called in parallel with the same
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* transformation object. Data processing can happen synchronously
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* [SHASH] or asynchronously [AHASH] at this point.
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* Note: mandatory.
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* @final: Retrieve result from the driver. This function finalizes the
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* transformation and retrieves the resulting hash from the driver and
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* pushes it back to upper layers. No data processing happens at this
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* point.
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* point unless hardware requires it to finish the transformation
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* (then the data buffered by the device driver is processed).
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* Note: mandatory.
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* @finup: Combination of @update and @final. This function is effectively a
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* combination of @update and @final calls issued in sequence. As some
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* hardware cannot do @update and @final separately, this callback was
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* added to allow such hardware to be used at least by IPsec. Data
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* processing can happen synchronously [SHASH] or asynchronously [AHASH]
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* at this point.
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* Note: optional.
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* @digest: Combination of @init and @update and @final. This function
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* effectively behaves as the entire chain of operations, @init,
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* @update and @final issued in sequence. Just like @finup, this was
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@@ -416,11 +421,10 @@ static inline bool crypto_ahash_has_setkey(struct crypto_ahash *tfm)
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* needed to perform the cipher operation
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*
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* This function is a "short-hand" for the function calls of
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* crypto_ahash_update and crypto_shash_final. The parameters have the same
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* crypto_ahash_update and crypto_ahash_final. The parameters have the same
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* meaning as discussed for those separate functions.
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*
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* Return: 0 if the message digest creation was successful; < 0 if an error
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* occurred
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* Return: see crypto_ahash_final()
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*/
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int crypto_ahash_finup(struct ahash_request *req);
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@@ -433,8 +437,11 @@ int crypto_ahash_finup(struct ahash_request *req);
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* based on all data added to the cipher handle. The message digest is placed
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* into the output buffer registered with the ahash_request handle.
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*
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* Return: 0 if the message digest creation was successful; < 0 if an error
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* occurred
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* Return:
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* 0 if the message digest was successfully calculated;
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* -EINPROGRESS if data is feeded into hardware (DMA) or queued for later;
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* -EBUSY if queue is full and request should be resubmitted later;
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* other < 0 if an error occurred
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*/
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int crypto_ahash_final(struct ahash_request *req);
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@@ -447,8 +454,7 @@ int crypto_ahash_final(struct ahash_request *req);
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* crypto_ahash_update and crypto_ahash_final. The parameters have the same
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* meaning as discussed for those separate three functions.
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*
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* Return: 0 if the message digest creation was successful; < 0 if an error
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* occurred
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* Return: see crypto_ahash_final()
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*/
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int crypto_ahash_digest(struct ahash_request *req);
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@@ -493,8 +499,7 @@ static inline int crypto_ahash_import(struct ahash_request *req, const void *in)
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* handle. Any potentially existing state created by previous operations is
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* discarded.
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*
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* Return: 0 if the message digest initialization was successful; < 0 if an
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* error occurred
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* Return: see crypto_ahash_final()
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*/
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static inline int crypto_ahash_init(struct ahash_request *req)
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{
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@@ -510,8 +515,7 @@ static inline int crypto_ahash_init(struct ahash_request *req)
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* is pointed to by the scatter/gather list registered in the &ahash_request
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* handle
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*
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* Return: 0 if the message digest update was successful; < 0 if an error
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* occurred
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* Return: see crypto_ahash_final()
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*/
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static inline int crypto_ahash_update(struct ahash_request *req)
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{
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+1
-14
@@ -40,11 +40,6 @@ struct alg_sock {
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void *private;
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};
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struct af_alg_completion {
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struct completion completion;
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int err;
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};
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struct af_alg_control {
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struct af_alg_iv *iv;
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int op;
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@@ -152,7 +147,7 @@ struct af_alg_ctx {
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void *iv;
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size_t aead_assoclen;
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struct af_alg_completion completion;
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struct crypto_wait wait;
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size_t used;
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size_t rcvused;
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@@ -177,19 +172,11 @@ void af_alg_link_sg(struct af_alg_sgl *sgl_prev, struct af_alg_sgl *sgl_new);
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int af_alg_cmsg_send(struct msghdr *msg, struct af_alg_control *con);
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int af_alg_wait_for_completion(int err, struct af_alg_completion *completion);
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void af_alg_complete(struct crypto_async_request *req, int err);
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static inline struct alg_sock *alg_sk(struct sock *sk)
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{
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return (struct alg_sock *)sk;
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}
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static inline void af_alg_init_completion(struct af_alg_completion *completion)
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{
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init_completion(&completion->completion);
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}
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/**
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* Size of available buffer for sending data from user space to kernel.
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*
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@@ -0,0 +1,40 @@
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/*
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* Common values for SM3 algorithm
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*/
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#ifndef _CRYPTO_SM3_H
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#define _CRYPTO_SM3_H
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#include <linux/types.h>
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#define SM3_DIGEST_SIZE 32
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#define SM3_BLOCK_SIZE 64
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#define SM3_T1 0x79CC4519
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#define SM3_T2 0x7A879D8A
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#define SM3_IVA 0x7380166f
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#define SM3_IVB 0x4914b2b9
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#define SM3_IVC 0x172442d7
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#define SM3_IVD 0xda8a0600
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#define SM3_IVE 0xa96f30bc
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#define SM3_IVF 0x163138aa
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#define SM3_IVG 0xe38dee4d
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#define SM3_IVH 0xb0fb0e4e
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extern const u8 sm3_zero_message_hash[SM3_DIGEST_SIZE];
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struct sm3_state {
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u32 state[SM3_DIGEST_SIZE / 4];
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u64 count;
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u8 buffer[SM3_BLOCK_SIZE];
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};
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struct shash_desc;
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extern int crypto_sm3_update(struct shash_desc *desc, const u8 *data,
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unsigned int len);
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extern int crypto_sm3_finup(struct shash_desc *desc, const u8 *data,
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unsigned int len, u8 *hash);
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#endif
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@@ -0,0 +1,117 @@
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/*
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* sm3_base.h - core logic for SM3 implementations
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*
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* Copyright (C) 2017 ARM Limited or its affiliates.
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* Written by Gilad Ben-Yossef <gilad@benyossef.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include <crypto/internal/hash.h>
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#include <crypto/sm3.h>
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#include <linux/crypto.h>
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#include <linux/module.h>
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#include <asm/unaligned.h>
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typedef void (sm3_block_fn)(struct sm3_state *sst, u8 const *src, int blocks);
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static inline int sm3_base_init(struct shash_desc *desc)
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{
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struct sm3_state *sctx = shash_desc_ctx(desc);
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sctx->state[0] = SM3_IVA;
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sctx->state[1] = SM3_IVB;
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sctx->state[2] = SM3_IVC;
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sctx->state[3] = SM3_IVD;
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sctx->state[4] = SM3_IVE;
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sctx->state[5] = SM3_IVF;
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sctx->state[6] = SM3_IVG;
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sctx->state[7] = SM3_IVH;
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sctx->count = 0;
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return 0;
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}
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static inline int sm3_base_do_update(struct shash_desc *desc,
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const u8 *data,
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unsigned int len,
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sm3_block_fn *block_fn)
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{
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struct sm3_state *sctx = shash_desc_ctx(desc);
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unsigned int partial = sctx->count % SM3_BLOCK_SIZE;
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sctx->count += len;
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if (unlikely((partial + len) >= SM3_BLOCK_SIZE)) {
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int blocks;
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if (partial) {
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int p = SM3_BLOCK_SIZE - partial;
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memcpy(sctx->buffer + partial, data, p);
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data += p;
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len -= p;
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block_fn(sctx, sctx->buffer, 1);
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}
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blocks = len / SM3_BLOCK_SIZE;
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len %= SM3_BLOCK_SIZE;
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if (blocks) {
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block_fn(sctx, data, blocks);
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data += blocks * SM3_BLOCK_SIZE;
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}
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partial = 0;
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}
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if (len)
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memcpy(sctx->buffer + partial, data, len);
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return 0;
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}
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static inline int sm3_base_do_finalize(struct shash_desc *desc,
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sm3_block_fn *block_fn)
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{
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const int bit_offset = SM3_BLOCK_SIZE - sizeof(__be64);
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struct sm3_state *sctx = shash_desc_ctx(desc);
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__be64 *bits = (__be64 *)(sctx->buffer + bit_offset);
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unsigned int partial = sctx->count % SM3_BLOCK_SIZE;
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sctx->buffer[partial++] = 0x80;
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if (partial > bit_offset) {
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memset(sctx->buffer + partial, 0x0, SM3_BLOCK_SIZE - partial);
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partial = 0;
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block_fn(sctx, sctx->buffer, 1);
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}
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memset(sctx->buffer + partial, 0x0, bit_offset - partial);
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*bits = cpu_to_be64(sctx->count << 3);
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block_fn(sctx, sctx->buffer, 1);
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return 0;
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}
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static inline int sm3_base_finish(struct shash_desc *desc, u8 *out)
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{
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struct sm3_state *sctx = shash_desc_ctx(desc);
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__be32 *digest = (__be32 *)out;
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int i;
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for (i = 0; i < SM3_DIGEST_SIZE / sizeof(__be32); i++)
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put_unaligned_be32(sctx->state[i], digest++);
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*sctx = (struct sm3_state){};
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return 0;
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}
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Reference in New Issue
Block a user