[MIPS] Make I8259A_IRQ_BASE customizable
Move I8259A_IRQ_BASE from asm/i8259.h to asm/mach-generic/irq.h and make it really customizable. And remove I8259_IRQ_BASE declared on some platforms. Currently only NEC_CMBVR4133 is using custom I8259A_IRQ_BASE value. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
committed by
Ralf Baechle
parent
97dcb82de6
commit
2fa7937bd8
@@ -252,12 +252,8 @@ extern void ll_vrc5477_irq_disable(int vrc5477_irq);
|
||||
*/
|
||||
|
||||
#define NUM_CPU_IRQ 8
|
||||
#define NUM_I8259_IRQ 16
|
||||
#define NUM_VRC5477_IRQ 32
|
||||
|
||||
#define DDB_IRQ_BASE 0
|
||||
|
||||
#define I8259_IRQ_BASE DDB_IRQ_BASE
|
||||
#define CPU_IRQ_BASE MIPS_CPU_IRQ_BASE
|
||||
#define VRC5477_IRQ_BASE (CPU_IRQ_BASE + NUM_CPU_IRQ)
|
||||
|
||||
@@ -301,22 +297,22 @@ extern void ll_vrc5477_irq_disable(int vrc5477_irq);
|
||||
/*
|
||||
* i2859 irq assignment
|
||||
*/
|
||||
#define I8259_IRQ_RESERVED_0 (0 + I8259_IRQ_BASE)
|
||||
#define I8259_IRQ_KEYBOARD (1 + I8259_IRQ_BASE) /* M1543 default */
|
||||
#define I8259_IRQ_CASCADE (2 + I8259_IRQ_BASE)
|
||||
#define I8259_IRQ_UART_B (3 + I8259_IRQ_BASE) /* M1543 default, may conflict with RTC according to schematic diagram */
|
||||
#define I8259_IRQ_UART_A (4 + I8259_IRQ_BASE) /* M1543 default */
|
||||
#define I8259_IRQ_PARALLEL (5 + I8259_IRQ_BASE) /* M1543 default */
|
||||
#define I8259_IRQ_RESERVED_6 (6 + I8259_IRQ_BASE)
|
||||
#define I8259_IRQ_RESERVED_7 (7 + I8259_IRQ_BASE)
|
||||
#define I8259_IRQ_RTC (8 + I8259_IRQ_BASE) /* who set this? */
|
||||
#define I8259_IRQ_USB (9 + I8259_IRQ_BASE) /* ddb_setup */
|
||||
#define I8259_IRQ_PMU (10 + I8259_IRQ_BASE) /* ddb_setup */
|
||||
#define I8259_IRQ_RESERVED_11 (11 + I8259_IRQ_BASE)
|
||||
#define I8259_IRQ_RESERVED_12 (12 + I8259_IRQ_BASE) /* m1543_irq_setup */
|
||||
#define I8259_IRQ_RESERVED_13 (13 + I8259_IRQ_BASE)
|
||||
#define I8259_IRQ_HDC1 (14 + I8259_IRQ_BASE) /* default and ddb_setup */
|
||||
#define I8259_IRQ_HDC2 (15 + I8259_IRQ_BASE) /* default */
|
||||
#define I8259_IRQ_RESERVED_0 (0 + I8259A_IRQ_BASE)
|
||||
#define I8259_IRQ_KEYBOARD (1 + I8259A_IRQ_BASE) /* M1543 default */
|
||||
#define I8259_IRQ_CASCADE (2 + I8259A_IRQ_BASE)
|
||||
#define I8259_IRQ_UART_B (3 + I8259A_IRQ_BASE) /* M1543 default, may conflict with RTC according to schematic diagram */
|
||||
#define I8259_IRQ_UART_A (4 + I8259A_IRQ_BASE) /* M1543 default */
|
||||
#define I8259_IRQ_PARALLEL (5 + I8259A_IRQ_BASE) /* M1543 default */
|
||||
#define I8259_IRQ_RESERVED_6 (6 + I8259A_IRQ_BASE)
|
||||
#define I8259_IRQ_RESERVED_7 (7 + I8259A_IRQ_BASE)
|
||||
#define I8259_IRQ_RTC (8 + I8259A_IRQ_BASE) /* who set this? */
|
||||
#define I8259_IRQ_USB (9 + I8259A_IRQ_BASE) /* ddb_setup */
|
||||
#define I8259_IRQ_PMU (10 + I8259A_IRQ_BASE) /* ddb_setup */
|
||||
#define I8259_IRQ_RESERVED_11 (11 + I8259A_IRQ_BASE)
|
||||
#define I8259_IRQ_RESERVED_12 (12 + I8259A_IRQ_BASE) /* m1543_irq_setup */
|
||||
#define I8259_IRQ_RESERVED_13 (13 + I8259A_IRQ_BASE)
|
||||
#define I8259_IRQ_HDC1 (14 + I8259A_IRQ_BASE) /* default and ddb_setup */
|
||||
#define I8259_IRQ_HDC2 (15 + I8259A_IRQ_BASE) /* default */
|
||||
|
||||
|
||||
/*
|
||||
|
||||
@@ -18,6 +18,7 @@
|
||||
#include <linux/spinlock.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <irq.h>
|
||||
|
||||
/* i8259A PIC registers */
|
||||
#define PIC_MASTER_CMD 0x20
|
||||
@@ -42,8 +43,6 @@ extern void disable_8259A_irq(unsigned int irq);
|
||||
|
||||
extern void init_i8259_irqs(void);
|
||||
|
||||
#define I8259A_IRQ_BASE 0
|
||||
|
||||
/*
|
||||
* Do the traditional i8259 interrupt polling thing. This is for the few
|
||||
* cases where no better interrupt acknowledge method is available and we
|
||||
|
||||
@@ -18,7 +18,7 @@
|
||||
#ifdef CONFIG_I8259
|
||||
static inline int irq_canonicalize(int irq)
|
||||
{
|
||||
return ((irq == 2) ? 9 : irq);
|
||||
return ((irq == I8259A_IRQ_BASE + 2) ? I8259A_IRQ_BASE + 9 : irq);
|
||||
}
|
||||
#else
|
||||
#define irq_canonicalize(irq) (irq) /* Sane hardware, sane code ... */
|
||||
|
||||
@@ -12,6 +12,12 @@
|
||||
#define NR_IRQS 128
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_I8259
|
||||
#ifndef I8259A_IRQ_BASE
|
||||
#define I8259A_IRQ_BASE 0
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_IRQ_CPU
|
||||
|
||||
#ifndef MIPS_CPU_IRQ_BASE
|
||||
|
||||
@@ -2,6 +2,9 @@
|
||||
#define __ASM_MACH_VR41XX_IRQ_H
|
||||
|
||||
#include <asm/vr41xx/irq.h> /* for MIPS_CPU_IRQ_BASE */
|
||||
#ifdef CONFIG_NEC_CMBVR4133
|
||||
#include <asm/vr41xx/cmbvr4133.h> /* for I8259A_IRQ_BASE */
|
||||
#endif
|
||||
|
||||
#include_next <irq.h>
|
||||
|
||||
|
||||
@@ -35,8 +35,8 @@
|
||||
#define CMBVR41XX_INTD_IRQ GIU_IRQ(CMBVR41XX_INTD_PIN)
|
||||
#define CMBVR41XX_INTE_IRQ GIU_IRQ(CMBVR41XX_INTE_PIN)
|
||||
|
||||
#define I8259_IRQ_BASE 72
|
||||
#define I8259_IRQ(x) (I8259_IRQ_BASE + (x))
|
||||
#define I8259A_IRQ_BASE 72
|
||||
#define I8259_IRQ(x) (I8259A_IRQ_BASE + (x))
|
||||
#define TIMER_IRQ I8259_IRQ(0)
|
||||
#define KEYBOARD_IRQ I8259_IRQ(1)
|
||||
#define I8259_SLAVE_IRQ I8259_IRQ(2)
|
||||
@@ -52,6 +52,5 @@
|
||||
#define AUX_IRQ I8259_IRQ(12)
|
||||
#define IDE_PRIMARY_IRQ I8259_IRQ(14)
|
||||
#define IDE_SECONDARY_IRQ I8259_IRQ(15)
|
||||
#define I8259_IRQ_LAST IDE_SECONDARY_IRQ
|
||||
|
||||
#endif /* __NEC_CMBVR4133_H */
|
||||
|
||||
Reference in New Issue
Block a user