Merge tag 'omap-devel-dt-merged-for-v3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Device tree related changes for omaps. Note that this branch is based on omap-cleanup-sparseirq-for-v3.7 to avoid merge conflicts with the sparseirq changes for gpio-twl4030 driver. * tag 'omap-devel-dt-merged-for-v3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: arm/dts: Mux uart pins for omap4-sdp ARM: OMAP2+: select PINCTRL in Kconfig arm/dts: Add pinctrl driver entries for omap2/3/4 arm/dts: Add omap36xx.dtsi file and rename omap3-beagle to omap3-beagle-xm ARM: dts: omap3-overo: Add support for the blue LED Documentation: dt: Update the OMAP documentation with Overo/Toby ARM: dts: OMAP3: Add support for Gumstix Overo with Tobi expansion board ARM: dts: OMAP4: Add reg and interrupts for every nodes ARM: dts: AM33XX: Specify reg and interrupt property for all nodes ARM: dts: AM33XX: Convert all hex numbers to lower-case ARM: dts: omap3-beagle: Enable audio support ARM: dts: omap5: Add McPDM and DMIC section to the dtsi file ARM: dts: omap5: Add McBSP entries ARM: dts: omap4: Add reg-names for McPDM and DMIC ARM: dts: omap4: Add McBSP entries ARM: dts: omap3: Add McBSP entries ARM: dts: omap2420-h4: Include omap2420.dtsi file instead the common omap2 ARM: dts: omap2: Add McBSP entries for OMAP2420 and OMAP2430 SoC ARM: dts: omap3-beagle: Add heartbeat and mmc LEDs support ARM: dts: omap3: Add gpio-twl4030 properties for BeagleBoard and omap3-EVM ...
This commit is contained in:
Olof Johansson
@@ -0,0 +1,217 @@
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/*
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* OMAP GPIO handling defines and functions
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*
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* Copyright (C) 2003-2005 Nokia Corporation
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*
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* Written by Juha Yrjölä <juha.yrjola@nokia.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#ifndef __ASM_ARCH_OMAP_GPIO_H
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#define __ASM_ARCH_OMAP_GPIO_H
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#include <linux/io.h>
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#include <linux/platform_device.h>
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#include <mach/irqs.h>
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#define OMAP1_MPUIO_BASE 0xfffb5000
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/*
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* These are the omap15xx/16xx offsets. The omap7xx offset are
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* OMAP_MPUIO_ / 2 offsets below.
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*/
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#define OMAP_MPUIO_INPUT_LATCH 0x00
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#define OMAP_MPUIO_OUTPUT 0x04
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#define OMAP_MPUIO_IO_CNTL 0x08
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#define OMAP_MPUIO_KBR_LATCH 0x10
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#define OMAP_MPUIO_KBC 0x14
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#define OMAP_MPUIO_GPIO_EVENT_MODE 0x18
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#define OMAP_MPUIO_GPIO_INT_EDGE 0x1c
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#define OMAP_MPUIO_KBD_INT 0x20
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#define OMAP_MPUIO_GPIO_INT 0x24
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#define OMAP_MPUIO_KBD_MASKIT 0x28
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#define OMAP_MPUIO_GPIO_MASKIT 0x2c
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#define OMAP_MPUIO_GPIO_DEBOUNCING 0x30
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#define OMAP_MPUIO_LATCH 0x34
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#define OMAP34XX_NR_GPIOS 6
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/*
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* OMAP1510 GPIO registers
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*/
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#define OMAP1510_GPIO_DATA_INPUT 0x00
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#define OMAP1510_GPIO_DATA_OUTPUT 0x04
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#define OMAP1510_GPIO_DIR_CONTROL 0x08
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#define OMAP1510_GPIO_INT_CONTROL 0x0c
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#define OMAP1510_GPIO_INT_MASK 0x10
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#define OMAP1510_GPIO_INT_STATUS 0x14
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#define OMAP1510_GPIO_PIN_CONTROL 0x18
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#define OMAP1510_IH_GPIO_BASE 64
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/*
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* OMAP1610 specific GPIO registers
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*/
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#define OMAP1610_GPIO_REVISION 0x0000
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#define OMAP1610_GPIO_SYSCONFIG 0x0010
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#define OMAP1610_GPIO_SYSSTATUS 0x0014
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#define OMAP1610_GPIO_IRQSTATUS1 0x0018
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#define OMAP1610_GPIO_IRQENABLE1 0x001c
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#define OMAP1610_GPIO_WAKEUPENABLE 0x0028
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#define OMAP1610_GPIO_DATAIN 0x002c
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#define OMAP1610_GPIO_DATAOUT 0x0030
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#define OMAP1610_GPIO_DIRECTION 0x0034
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#define OMAP1610_GPIO_EDGE_CTRL1 0x0038
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#define OMAP1610_GPIO_EDGE_CTRL2 0x003c
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#define OMAP1610_GPIO_CLEAR_IRQENABLE1 0x009c
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#define OMAP1610_GPIO_CLEAR_WAKEUPENA 0x00a8
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#define OMAP1610_GPIO_CLEAR_DATAOUT 0x00b0
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#define OMAP1610_GPIO_SET_IRQENABLE1 0x00dc
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#define OMAP1610_GPIO_SET_WAKEUPENA 0x00e8
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#define OMAP1610_GPIO_SET_DATAOUT 0x00f0
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/*
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* OMAP7XX specific GPIO registers
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*/
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#define OMAP7XX_GPIO_DATA_INPUT 0x00
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#define OMAP7XX_GPIO_DATA_OUTPUT 0x04
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#define OMAP7XX_GPIO_DIR_CONTROL 0x08
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#define OMAP7XX_GPIO_INT_CONTROL 0x0c
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#define OMAP7XX_GPIO_INT_MASK 0x10
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#define OMAP7XX_GPIO_INT_STATUS 0x14
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/*
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* omap2+ specific GPIO registers
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*/
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#define OMAP24XX_GPIO_REVISION 0x0000
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#define OMAP24XX_GPIO_IRQSTATUS1 0x0018
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#define OMAP24XX_GPIO_IRQSTATUS2 0x0028
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#define OMAP24XX_GPIO_IRQENABLE2 0x002c
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#define OMAP24XX_GPIO_IRQENABLE1 0x001c
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#define OMAP24XX_GPIO_WAKE_EN 0x0020
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#define OMAP24XX_GPIO_CTRL 0x0030
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#define OMAP24XX_GPIO_OE 0x0034
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#define OMAP24XX_GPIO_DATAIN 0x0038
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#define OMAP24XX_GPIO_DATAOUT 0x003c
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#define OMAP24XX_GPIO_LEVELDETECT0 0x0040
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#define OMAP24XX_GPIO_LEVELDETECT1 0x0044
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#define OMAP24XX_GPIO_RISINGDETECT 0x0048
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#define OMAP24XX_GPIO_FALLINGDETECT 0x004c
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#define OMAP24XX_GPIO_DEBOUNCE_EN 0x0050
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#define OMAP24XX_GPIO_DEBOUNCE_VAL 0x0054
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#define OMAP24XX_GPIO_CLEARIRQENABLE1 0x0060
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#define OMAP24XX_GPIO_SETIRQENABLE1 0x0064
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#define OMAP24XX_GPIO_CLEARWKUENA 0x0080
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#define OMAP24XX_GPIO_SETWKUENA 0x0084
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#define OMAP24XX_GPIO_CLEARDATAOUT 0x0090
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#define OMAP24XX_GPIO_SETDATAOUT 0x0094
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#define OMAP4_GPIO_REVISION 0x0000
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#define OMAP4_GPIO_EOI 0x0020
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#define OMAP4_GPIO_IRQSTATUSRAW0 0x0024
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#define OMAP4_GPIO_IRQSTATUSRAW1 0x0028
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#define OMAP4_GPIO_IRQSTATUS0 0x002c
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#define OMAP4_GPIO_IRQSTATUS1 0x0030
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#define OMAP4_GPIO_IRQSTATUSSET0 0x0034
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#define OMAP4_GPIO_IRQSTATUSSET1 0x0038
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#define OMAP4_GPIO_IRQSTATUSCLR0 0x003c
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#define OMAP4_GPIO_IRQSTATUSCLR1 0x0040
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#define OMAP4_GPIO_IRQWAKEN0 0x0044
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#define OMAP4_GPIO_IRQWAKEN1 0x0048
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#define OMAP4_GPIO_IRQENABLE1 0x011c
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#define OMAP4_GPIO_WAKE_EN 0x0120
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#define OMAP4_GPIO_IRQSTATUS2 0x0128
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#define OMAP4_GPIO_IRQENABLE2 0x012c
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#define OMAP4_GPIO_CTRL 0x0130
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#define OMAP4_GPIO_OE 0x0134
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#define OMAP4_GPIO_DATAIN 0x0138
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#define OMAP4_GPIO_DATAOUT 0x013c
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#define OMAP4_GPIO_LEVELDETECT0 0x0140
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#define OMAP4_GPIO_LEVELDETECT1 0x0144
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#define OMAP4_GPIO_RISINGDETECT 0x0148
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#define OMAP4_GPIO_FALLINGDETECT 0x014c
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#define OMAP4_GPIO_DEBOUNCENABLE 0x0150
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#define OMAP4_GPIO_DEBOUNCINGTIME 0x0154
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#define OMAP4_GPIO_CLEARIRQENABLE1 0x0160
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#define OMAP4_GPIO_SETIRQENABLE1 0x0164
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#define OMAP4_GPIO_CLEARWKUENA 0x0180
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#define OMAP4_GPIO_SETWKUENA 0x0184
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#define OMAP4_GPIO_CLEARDATAOUT 0x0190
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#define OMAP4_GPIO_SETDATAOUT 0x0194
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#define OMAP_MAX_GPIO_LINES 192
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#define OMAP_MPUIO(nr) (OMAP_MAX_GPIO_LINES + (nr))
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#define OMAP_GPIO_IS_MPUIO(nr) ((nr) >= OMAP_MAX_GPIO_LINES)
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struct omap_gpio_dev_attr {
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int bank_width; /* GPIO bank width */
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bool dbck_flag; /* dbck required or not - True for OMAP3&4 */
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};
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struct omap_gpio_reg_offs {
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u16 revision;
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u16 direction;
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u16 datain;
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u16 dataout;
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u16 set_dataout;
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u16 clr_dataout;
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u16 irqstatus;
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u16 irqstatus2;
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u16 irqstatus_raw0;
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u16 irqstatus_raw1;
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u16 irqenable;
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u16 irqenable2;
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u16 set_irqenable;
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u16 clr_irqenable;
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u16 debounce;
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u16 debounce_en;
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u16 ctrl;
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u16 wkup_en;
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u16 leveldetect0;
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u16 leveldetect1;
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u16 risingdetect;
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u16 fallingdetect;
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u16 irqctrl;
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u16 edgectrl1;
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u16 edgectrl2;
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u16 pinctrl;
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bool irqenable_inv;
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};
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struct omap_gpio_platform_data {
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int bank_type;
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int bank_width; /* GPIO bank width */
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int bank_stride; /* Only needed for omap1 MPUIO */
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bool dbck_flag; /* dbck required or not - True for OMAP3&4 */
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bool loses_context; /* whether the bank would ever lose context */
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bool is_mpuio; /* whether the bank is of type MPUIO */
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u32 non_wakeup_gpios;
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struct omap_gpio_reg_offs *regs;
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/* Return context loss count due to PM states changing */
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int (*get_context_loss_count)(struct device *dev);
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};
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extern void omap2_gpio_prepare_for_idle(int off_mode);
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extern void omap2_gpio_resume_after_idle(void);
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extern void omap_set_gpio_debounce(int gpio, int enable);
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extern void omap_set_gpio_debounce_time(int gpio, int enable);
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#endif
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@@ -0,0 +1,67 @@
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/*
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* Maxim (Dallas) MAX3107/8 serial driver
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*
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* Copyright (C) 2012 Alexander Shiyan <shc_work@mail.ru>
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*
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* Based on max3100.c, by Christian Pellegrin <chripell@evolware.org>
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* Based on max3110.c, by Feng Tang <feng.tang@intel.com>
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* Based on max3107.c, by Aavamobile
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef _MAX310X_H_
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#define _MAX310X_H_
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/*
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* Example board initialization data:
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*
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* static struct max310x_pdata max3107_pdata = {
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* .driver_flags = MAX310X_EXT_CLK,
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* .uart_flags[0] = MAX310X_ECHO_SUPRESS | MAX310X_AUTO_DIR_CTRL,
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* .frequency = 3686400,
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* .gpio_base = -1,
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* };
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*
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* static struct spi_board_info spi_device_max3107[] = {
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* {
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* .modalias = "max3107",
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* .irq = IRQ_EINT3,
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* .bus_num = 1,
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* .chip_select = 1,
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* .platform_data = &max3107_pdata,
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* },
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* };
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*/
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#define MAX310X_MAX_UARTS 1
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/* MAX310X platform data structure */
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struct max310x_pdata {
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/* Flags global to driver */
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const u8 driver_flags:2;
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#define MAX310X_EXT_CLK (0x00000001) /* External clock enable */
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#define MAX310X_AUTOSLEEP (0x00000002) /* Enable AutoSleep mode */
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/* Flags global to UART port */
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const u8 uart_flags[MAX310X_MAX_UARTS];
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#define MAX310X_LOOPBACK (0x00000001) /* Loopback mode enable */
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#define MAX310X_ECHO_SUPRESS (0x00000002) /* Enable echo supress */
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#define MAX310X_AUTO_DIR_CTRL (0x00000004) /* Enable Auto direction
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* control (RS-485)
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*/
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/* Frequency (extrenal clock or crystal) */
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const int frequency;
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/* GPIO base number (can be negative) */
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const int gpio_base;
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/* Called during startup */
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void (*init)(void);
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/* Called before finish */
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void (*exit)(void);
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/* Suspend callback */
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void (*suspend)(int do_suspend);
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};
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#endif
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@@ -0,0 +1,11 @@
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#ifndef __OMAP1_BL_H__
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#define __OMAP1_BL_H__
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#include <linux/device.h>
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struct omap_backlight_config {
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int default_intensity;
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int (*set_power)(struct device *dev, int state);
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};
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#endif
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@@ -0,0 +1,93 @@
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/*
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* NXP (Philips) SCC+++(SCN+++) serial driver
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*
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* Copyright (C) 2012 Alexander Shiyan <shc_work@mail.ru>
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*
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* Based on sc26xx.c, by Thomas Bogendörfer (tsbogend@alpha.franken.de)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef __SCCNXP_H
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#define __SCCNXP_H
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#define SCCNXP_MAX_UARTS 2
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/* Output lines */
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#define LINE_OP0 1
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#define LINE_OP1 2
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#define LINE_OP2 3
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#define LINE_OP3 4
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#define LINE_OP4 5
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#define LINE_OP5 6
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#define LINE_OP6 7
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#define LINE_OP7 8
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/* Input lines */
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#define LINE_IP0 9
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#define LINE_IP1 10
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#define LINE_IP2 11
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#define LINE_IP3 12
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#define LINE_IP4 13
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#define LINE_IP5 14
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#define LINE_IP6 15
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/* Signals */
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#define DTR_OP 0 /* DTR */
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#define RTS_OP 4 /* RTS */
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#define DSR_IP 8 /* DSR */
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#define CTS_IP 12 /* CTS */
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#define DCD_IP 16 /* DCD */
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#define RNG_IP 20 /* RNG */
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#define DIR_OP 24 /* Special signal for control RS-485.
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* Goes high when transmit,
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* then goes low.
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*/
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/* Routing control signal 'sig' to line 'line' */
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#define MCTRL_SIG(sig, line) ((line) << (sig))
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/*
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* Example board initialization data:
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*
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* static struct resource sc2892_resources[] = {
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* DEFINE_RES_MEM(UART_PHYS_START, 0x10),
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* DEFINE_RES_IRQ(IRQ_EXT2),
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* };
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*
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* static struct sccnxp_pdata sc2892_info = {
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* .frequency = 3686400,
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* .mctrl_cfg[0] = MCTRL_SIG(DIR_OP, LINE_OP0),
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* .mctrl_cfg[1] = MCTRL_SIG(DIR_OP, LINE_OP1),
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* };
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*
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* static struct platform_device sc2892 = {
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* .name = "sc2892",
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* .id = -1,
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* .resource = sc2892_resources,
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* .num_resources = ARRAY_SIZE(sc2892_resources),
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* .dev = {
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* .platform_data = &sc2892_info,
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* },
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* };
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*/
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/* SCCNXP platform data structure */
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struct sccnxp_pdata {
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/* Frequency (extrenal clock or crystal) */
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int frequency;
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/* Shift for A0 line */
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const u8 reg_shift;
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/* Modem control lines configuration */
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const u32 mctrl_cfg[SCCNXP_MAX_UARTS];
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/* Called during startup */
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void (*init)(void);
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/* Called before finish */
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void (*exit)(void);
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};
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#endif
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