tmakin/tegra-linux-noble
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Pull altix-mmr into release branch

Browse Source
This commit is contained in:
Tony Luck
2005-10-28 11:15:08 -07:00
parent 9189674026 1fa9295728
commit 0d9136fdbc
6 changed files with 80 additions and 65 deletions
Download Patch File Download Diff File Expand all files Collapse all files
include/asm-ia64/sn/io.h
+9
View File
@@ -35,6 +35,15 @@ extern void sn_dma_flush(unsigned long);
#define __sn_readl_relaxed ___sn_readl_relaxed
#define __sn_readq_relaxed ___sn_readq_relaxed
/*
* Convenience macros for setting/clearing bits using the above accessors
*/
#define __sn_setq_relaxed(addr, val) \
writeq((__sn_readq_relaxed(addr) | (val)), (addr))
#define __sn_clrq_relaxed(addr, val) \
writeq((__sn_readq_relaxed(addr) & ~(val)), (addr))
/*
* The following routines are SN Platform specific, called when
* a reference is made to inX/outX set macros. SN Platform
include/asm-ia64/sn/tioca_provider.h
+7 -7
View File
@@ -182,11 +182,11 @@ tioca_tlbflush(struct tioca_kernel *tioca_kernel)
* touch every CL aligned GART entry.
*/
ca_base->ca_control2 &= ~(CA_GART_MEM_PARAM);
ca_base->ca_control2 |= CA_GART_FLUSH_TLB;
ca_base->ca_control2 |=
(0x2ull << CA_GART_MEM_PARAM_SHFT);
tmp = ca_base->ca_control2;
__sn_clrq_relaxed(&ca_base->ca_control2, CA_GART_MEM_PARAM);
__sn_setq_relaxed(&ca_base->ca_control2, CA_GART_FLUSH_TLB);
__sn_setq_relaxed(&ca_base->ca_control2,
(0x2ull << CA_GART_MEM_PARAM_SHFT));
tmp = __sn_readq_relaxed(&ca_base->ca_control2);
}
return;
@@ -196,8 +196,8 @@ tioca_tlbflush(struct tioca_kernel *tioca_kernel)
* Gart in uncached mode ... need an explicit flush.
*/
ca_base->ca_control2 |= CA_GART_FLUSH_TLB;
tmp = ca_base->ca_control2;
__sn_setq_relaxed(&ca_base->ca_control2, CA_GART_FLUSH_TLB);
tmp = __sn_readq_relaxed(&ca_base->ca_control2);
}
extern uint32_t tioca_gart_found;