Prathamesh Shete
4002ccd266
Extend the existing Tegra186 GPIO controller device tree bindings with support for the GPIO controllers found on Tegra238. Tegra238 has two GPIO controllers: the main controller and always-on (AON) controller. The number of pins is slightly different, but the programming model remains the same. Add a new header, include/dt-bindings/gpio/nvidia,tegra238-gpio.h, that defines port IDs as well as the TEGRA238_MAIN_GPIO() helper, both of which are used in conjunction to create a unique specifier for each pin. Signed-off-by: Prathamesh Shete <pshete@nvidia.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20260514124835.108532-1-pshete@nvidia.com Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
59 lines
1.9 KiB
C
59 lines
1.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
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/* Copyright (c) 2026, NVIDIA CORPORATION. All rights reserved. */
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/*
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* This header provides constants for binding nvidia,tegra238-gpio*.
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*
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* The first cell in Tegra's GPIO specifier is the GPIO ID. The macros below
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* provide names for this.
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*
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* The second cell contains standard flag values specified in gpio.h.
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*/
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#ifndef _DT_BINDINGS_GPIO_TEGRA238_GPIO_H
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#define _DT_BINDINGS_GPIO_TEGRA238_GPIO_H
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#include <dt-bindings/gpio/gpio.h>
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/* GPIOs implemented by main GPIO controller */
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#define TEGRA238_MAIN_GPIO_PORT_A 0
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#define TEGRA238_MAIN_GPIO_PORT_B 1
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#define TEGRA238_MAIN_GPIO_PORT_C 2
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#define TEGRA238_MAIN_GPIO_PORT_D 3
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#define TEGRA238_MAIN_GPIO_PORT_E 4
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#define TEGRA238_MAIN_GPIO_PORT_F 5
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#define TEGRA238_MAIN_GPIO_PORT_G 6
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#define TEGRA238_MAIN_GPIO_PORT_H 7
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#define TEGRA238_MAIN_GPIO_PORT_J 8
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#define TEGRA238_MAIN_GPIO_PORT_K 9
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#define TEGRA238_MAIN_GPIO_PORT_L 10
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#define TEGRA238_MAIN_GPIO_PORT_M 11
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#define TEGRA238_MAIN_GPIO_PORT_N 12
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#define TEGRA238_MAIN_GPIO_PORT_P 13
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#define TEGRA238_MAIN_GPIO_PORT_Q 14
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#define TEGRA238_MAIN_GPIO_PORT_R 15
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#define TEGRA238_MAIN_GPIO_PORT_S 16
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#define TEGRA238_MAIN_GPIO_PORT_T 17
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#define TEGRA238_MAIN_GPIO_PORT_U 18
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#define TEGRA238_MAIN_GPIO_PORT_V 19
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#define TEGRA238_MAIN_GPIO_PORT_W 20
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#define TEGRA238_MAIN_GPIO_PORT_X 21
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#define TEGRA238_MAIN_GPIO(port, offset) \
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((TEGRA238_MAIN_GPIO_PORT_##port * 8) + (offset))
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/* GPIOs implemented by AON GPIO controller */
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#define TEGRA238_AON_GPIO_PORT_AA 0
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#define TEGRA238_AON_GPIO_PORT_BB 1
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#define TEGRA238_AON_GPIO_PORT_CC 2
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#define TEGRA238_AON_GPIO_PORT_DD 3
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#define TEGRA238_AON_GPIO_PORT_EE 4
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#define TEGRA238_AON_GPIO_PORT_FF 5
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#define TEGRA238_AON_GPIO_PORT_GG 6
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#define TEGRA238_AON_GPIO_PORT_HH 7
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#define TEGRA238_AON_GPIO(port, offset) \
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((TEGRA238_AON_GPIO_PORT_##port * 8) + (offset))
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#endif
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