Aaron Kling
16e7bf68b1
Using pmu counters for usage stats. This enables dynamic frequency scaling on all of the currently supported Tegra gpus. The register offsets are valid for gk20a, gm20b, gp10b, and gv11b. If support is added for ga10b, this will need rearchitected. Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
18 lines
568 B
Makefile
18 lines
568 B
Makefile
# SPDX-License-Identifier: MIT
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nvkm-y += nvkm/subdev/clk/base.o
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nvkm-y += nvkm/subdev/clk/nv04.o
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nvkm-y += nvkm/subdev/clk/nv40.o
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nvkm-y += nvkm/subdev/clk/nv50.o
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nvkm-y += nvkm/subdev/clk/g84.o
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nvkm-y += nvkm/subdev/clk/gt215.o
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nvkm-y += nvkm/subdev/clk/mcp77.o
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nvkm-y += nvkm/subdev/clk/gf100.o
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nvkm-y += nvkm/subdev/clk/gk104.o
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nvkm-y += nvkm/subdev/clk/gk20a.o
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nvkm-y += nvkm/subdev/clk/gm20b.o
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nvkm-y += nvkm/subdev/clk/gp10b.o
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nvkm-$(CONFIG_PM_DEVFREQ) += nvkm/subdev/clk/gk20a_devfreq.o
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nvkm-y += nvkm/subdev/clk/pllnv04.o
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nvkm-y += nvkm/subdev/clk/pllgt215.o
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