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Peter De Schrijver 0165c547a5 clk: tegra: dfll: fix use of tune values
There was some confusion on the use of the tune values. They were
defined in 2 different structs, but only initialzed in one of them.
Remove most of the references in struct tegra_dfll_soc_data and adjust
the code accordingly. Only tune_high_min_millivolts is left, because
this can be adjusted using debugfs. Hence copy the initial value from
the cvb table at boot.
2026-10-16 10:05:05 -05:00
..
2026-02-02 16:42:07 -08:00
2020-12-07 16:56:41 -08:00
2025-07-26 23:49:18 -07:00
2024-10-17 12:02:42 -07:00
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