111e55db3c
commit 2468b0e3d5659dfde77f081f266e1111a981efb8 upstream.
When CONFIG_PREEMPT_COUNT is not configured (i.e. CONFIG_PREEMPT_NONE/
CONFIG_PREEMPT_VOLUNTARY), preempt_disable() / preempt_enable() merely
acts as a barrier(). However, in these cases cond_resched() can still
trigger a context switch and modify the CSR.EUEN, resulting in do_fpu()
exception being activated within the kernel-fpu critical sections, as
demonstrated in the following path:
dcn32_calculate_wm_and_dlg()
DC_FP_START()
dcn32_calculate_wm_and_dlg_fpu()
dcn32_find_dummy_latency_index_for_fw_based_mclk_switch()
dcn32_internal_validate_bw()
dcn32_enable_phantom_stream()
dc_create_stream_for_sink()
kzalloc(GFP_KERNEL)
__kmem_cache_alloc_node()
__cond_resched()
DC_FP_END()
This patch is similar to commit d02198550423a0b (x86/fpu: Improve crypto
performance by making kernel-mode FPU reliably usable in softirqs). It
uses local_bh_disable() instead of preempt_disable() for non-RT kernels
so it can avoid the cond_resched() issue, and also extend the kernel-fpu
application scenarios to the softirq context.
Cc: stable@vger.kernel.org
Signed-off-by: Tianyang Zhang <zhangtianyang@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
109 lines
2.2 KiB
C
109 lines
2.2 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2023 Loongson Technology Corporation Limited
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*/
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#include <linux/cpu.h>
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#include <linux/init.h>
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#include <asm/fpu.h>
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#include <asm/smp.h>
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static unsigned int euen_mask = CSR_EUEN_FPEN;
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/*
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* The critical section between kernel_fpu_begin() and kernel_fpu_end()
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* is non-reentrant. It is the caller's responsibility to avoid reentrance.
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* See drivers/gpu/drm/amd/display/amdgpu_dm/dc_fpu.c as an example.
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*/
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static DEFINE_PER_CPU(bool, in_kernel_fpu);
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static DEFINE_PER_CPU(unsigned int, euen_current);
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static inline void fpregs_lock(void)
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{
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if (IS_ENABLED(CONFIG_PREEMPT_RT))
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preempt_disable();
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else
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local_bh_disable();
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}
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static inline void fpregs_unlock(void)
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{
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if (IS_ENABLED(CONFIG_PREEMPT_RT))
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preempt_enable();
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else
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local_bh_enable();
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}
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void kernel_fpu_begin(void)
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{
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unsigned int *euen_curr;
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if (!irqs_disabled())
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fpregs_lock();
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WARN_ON(this_cpu_read(in_kernel_fpu));
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this_cpu_write(in_kernel_fpu, true);
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euen_curr = this_cpu_ptr(&euen_current);
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*euen_curr = csr_xchg32(euen_mask, euen_mask, LOONGARCH_CSR_EUEN);
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#ifdef CONFIG_CPU_HAS_LASX
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if (*euen_curr & CSR_EUEN_LASXEN)
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_save_lasx(¤t->thread.fpu);
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else
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#endif
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#ifdef CONFIG_CPU_HAS_LSX
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if (*euen_curr & CSR_EUEN_LSXEN)
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_save_lsx(¤t->thread.fpu);
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else
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#endif
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if (*euen_curr & CSR_EUEN_FPEN)
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_save_fp(¤t->thread.fpu);
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write_fcsr(LOONGARCH_FCSR0, 0);
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}
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EXPORT_SYMBOL_GPL(kernel_fpu_begin);
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void kernel_fpu_end(void)
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{
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unsigned int *euen_curr;
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WARN_ON(!this_cpu_read(in_kernel_fpu));
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euen_curr = this_cpu_ptr(&euen_current);
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#ifdef CONFIG_CPU_HAS_LASX
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if (*euen_curr & CSR_EUEN_LASXEN)
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_restore_lasx(¤t->thread.fpu);
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else
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#endif
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#ifdef CONFIG_CPU_HAS_LSX
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if (*euen_curr & CSR_EUEN_LSXEN)
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_restore_lsx(¤t->thread.fpu);
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else
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#endif
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if (*euen_curr & CSR_EUEN_FPEN)
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_restore_fp(¤t->thread.fpu);
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*euen_curr = csr_xchg32(*euen_curr, euen_mask, LOONGARCH_CSR_EUEN);
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this_cpu_write(in_kernel_fpu, false);
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if (!irqs_disabled())
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fpregs_unlock();
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}
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EXPORT_SYMBOL_GPL(kernel_fpu_end);
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static int __init init_euen_mask(void)
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{
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if (cpu_has_lsx)
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euen_mask |= CSR_EUEN_LSXEN;
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if (cpu_has_lasx)
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euen_mask |= CSR_EUEN_LASXEN;
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return 0;
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}
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arch_initcall(init_euen_mask);
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