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26 Commits

Author SHA1 Message Date
5358f50837 t210b01: disable actmon and interconnects
Signed-off-by: Thomas Makin <halorocker89@gmail.com>
2025-11-02 00:10:23 +00:00
4f8b7d41ad t210b01: override pcie compatible
Signed-off-by: Thomas Makin <halorocker89@gmail.com>
2025-11-02 00:10:22 +00:00
536a60889d pci: tegra: add t210b01 support
This commit also fixes configuration checks

Signed-off-by: Thomas Makin <halorocker89@gmail.com>
2025-11-02 00:10:22 +00:00
255e0f9183 typec: introduce bm92txx driver
TODO: fix commit
Signed-off-by: Thomas Makin <halorocker89@gmail.com>
2025-11-02 00:10:22 +00:00
718d907b59 [DEBUG] xusb-tegra
Signed-off-by: Thomas Makin <halorocker89@gmail.com>
2025-11-02 00:10:21 +00:00
8cd5b04d6e t210b01: add emc support
Signed-off-by: Thomas Makin <halorocker89@gmail.com>
2025-11-02 00:10:21 +00:00
9058cf8e44 memory: tegra186-emc: support t210b01
Tegra210b01 uses Tegra186 style emc management, as in it is
offloaded to BPMP. This driver already implements this, so no
reason to shoehorn in elsewhere.

Signed-off-by: Thomas Makin <halorocker89@gmail.com>
2025-11-02 00:10:21 +00:00
8e6a4ab49e abi
Signed-off-by: Thomas Makin <halorocker89@gmail.com>
2025-11-02 00:10:20 +00:00
d0c8af92e0 t210b01: add sdmmc suport
Signed-off-by: Thomas Makin <halorocker89@gmail.com>
2025-11-02 00:10:20 +00:00
e2e87d0cf7 nouveau: add tegra210b01 support
Signed-off-by: Thomas Makin <halorocker89@gmail.com>
2025-11-02 00:10:20 +00:00
9417244eb3 tegra210b01: do not enable venc
Signed-off-by: Thomas Makin <halorocker89@gmail.com>
2025-11-02 00:10:20 +00:00
a6d426fded tegra: pmc: fix t210b01 pmc support
Signed-off-by: Thomas Makin <halorocker89@gmail.com>
2025-11-02 00:10:19 +00:00
7f1e672cff tegra-drm: add t210b01 dsi support
Signed-off-by: Thomas Makin <halorocker89@gmail.com>
2025-11-02 00:10:19 +00:00
1a9c3cd738 enable max77812
Signed-off-by: Thomas Makin <halorocker89@gmail.com>
2025-11-02 00:10:19 +00:00
azkali
aca6072a76 panel: dsi-nx: Add dsi-nx panel driver
dsi-nx is a new blanket driver for panels on the Nintendo Switch.
The Switch boots Linux via the "hekate" custom bootloader, which
performs panel initialization and passes panel info to kernel.

This driver is based on panel-jdi-lpm062m326a by SwitchR.

Signed-off-by: Thomas Makin <halorocker89@gmail.com>
2025-11-02 00:10:18 +00:00
6ec3530c00 t210: add core dvfs floor/cap
Signed-off-by: Thomas Makin <halorocker89@gmail.com>
2025-11-02 00:10:18 +00:00
7f9577cec5 tegra: dfll: forward-port 4.9 dfll
Signed-off-by: Thomas Makin <halorocker89@gmail.com>
2025-11-02 00:10:18 +00:00
Laxman Dewangan
0b57a72543 regulator: core: add API to get min/max voltage for rails
Add API to get min/max rail voltage configured from platform for
given rails. This will help to set the pad voltage based on platform
specific power tree.

bug 200083043

Change-Id: I054734ca2a25b5c830525e27ab22e43534f67351
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/712001
(cherry picked from commit c0d1de0da091132d037e1bb32f2ee09b5c00369b)
Reviewed-on: http://git-master/r/1119836
Signed-off-by: Thomas Makin <halorocker89@gmail.com>
2025-11-02 00:10:18 +00:00
Alex Frid
78a3979426 clk: Add parent change notifications
Added parent change notifications to be used when drivers behavior
depends on physical nature of the parent, not just clock rate it
supplies (e.g., selection of Tegra DFLL as CPU clock source changes
mechanism of voltage control even if the clock rate stays the same
as on PLL).

Bug 200269751

Change-Id: I617c94927ef437caf240efd91497b49ad6f5c39d
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1573111
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: Peter De Schrijver <pdeschrijver@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Timo Alho <talho@nvidia.com>
Signed-off-by: Thomas Makin <halorocker89@gmail.com>
2025-11-02 00:10:17 +00:00
Alex Frid
a37c367e1a clk: tegra: Add subtree change notifications
Added PRE_SUBTREE_CHANGE and POST_SUBTREE_CHANGE that called before
and after rate change is propagated down the sub-tree rooted in clk.
This would allow children to be aware that next set rate operation
is triggered by downward rate propagation, rather than direct set rate
on a child clock.

Bug 200267979

Change-Id: I6f2acbeca7cead0ecd385dcb2e58ced32448e998
Signed-off-by: Alex Frid <afrid@nvidia.com>
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
(cherry picked from commit 62f0d763fcb6c9d5bd9a373d22d802503ab0fdc5)
Reviewed-on: https://git-master.nvidia.com/r/1558143
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Timo Alho <talho@nvidia.com>
Signed-off-by: Thomas Makin <halorocker89@gmail.com>
2025-11-02 00:10:17 +00:00
8a08c5af63 tegra: dfll: use tune1_low
Signed-off-by: Thomas Makin <halorocker89@gmail.com>
2025-11-02 00:10:17 +00:00
Jon Hunter
b3f48191fc soc/tegra: update sppedo and chip rev handling
- Make revisions consistent
- Enable T210B01 support
- Update speedo structs

soc/tegra: fuse: Add support for retrieving IDDQ information

Add helpers functions for retrieving IDDQ information which is used
by SYSEDP.

Bug 1811732

Change-Id: I889afecebc9b6d7c2085a528f5dfb58a095165ff
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: http://git-master/r/1255677

Conflicts:
	include/linux/tegra-fuse.h

soc: tegra: Don't confuse chip / speedo revisions

During T210 DVFS initialization SoC chip revision was incorrectly used
instead of speedo fuse revision to limit core maximum voltage. Fixed it
in this commit.

Bug 200269751
Bug 200277489

Change-Id: Ifadabb1840039f407d2abfd8b9a8782b865b5a13
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/1302687
Reviewed-on: https://git-master.nvidia.com/r/1563340
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Tested-by: Sachin Nikam <snikam@nvidia.com>

soc: tegra: Fix for Automotive speedo/process ids

This fixes to derive correct speedo/process ids for
automotive skus(0x17 and 0x23).

Also display the sku info in hexadecimal format.

Bug 200258423

Change-Id: Ifab5f957983494fcffeb253f7fdda6b6062c56c5
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1576315
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Timo Alho <talho@nvidia.com>

soc: fuse: Introduce T210b01 speedo IDs

Introduce T210b01 speedo ID initialization by implementing:

- Parse T210b01 speedo fuses programming revision from spare fuses
- T210b01 binning thresholds
- Detection of T210b01 SKUs

Bug 1906940

Change-Id: If7d168434c12b5e92250be608f9736fc80cc2886
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1576317
Reviewed-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

soc/tegra: fuse: update speedo IDs for Tegra210

Bug 200255986

[ There's a merge conflict during the cherry-pick from Kernel 4.4
  to 4.9 becauase a later patch got merged first -- Nicolin ]

Change-Id: Iacf188f4cccea03d3a82f7ad18455c18681c506d
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Reviewed-on: http://git-master/r/1262213
Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
GVS: Gerrit_Virtual_Submit
(cherry picked from commit 98a6b47e55b1e5754490420c1ca379793e3569d2)
Signed-off-by: Nicolin Chen <nicolinc@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1578888
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>

soc: tegra: Update T210 sku info

- Populated sku info ucm field, and selected DVFS ids appropriately
- Made "a02" DVFS ids selection forward looking
  (applied to all A02+ revisions)
- Applied vcm31_sku to a02 parts (was a01 only), but limit it to
  0x17 sku fuses (was applied to 0x07 and 0x13 as well)
- Made always on personality a must for sku 0x8F

Bug 200269751

Change-Id: I85cbe2f1621c271640643aa2d203b9dac5b8c992
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/1307422
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
(cherry picked from commit 9ffc1f1cc2cb588f440640921f77223a6baee280)
Reviewed-on: https://git-master.nvidia.com/r/1578889
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Tested-by: Nicolin Chen <nicolinc@nvidia.com>
Reviewed-by: Timo Alho <talho@nvidia.com>

soc: tegra: Add support for T210 sku 0x1F

Bug 2059069

Change-Id: I7d20b6f1b889a18f23ae2fe6662d7b08e950154e
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1669017
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bo Yan <byan@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

clk: soc: tegra: Add support for T210b01 sku 0x87

Bug 2075533

Change-Id: I07433bd7139a5c845065a9a1d46f5f6e9559fbb5
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1669169
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bo Yan <byan@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

soc: tegra: Add usage mode UCM field to sku info

Bug 200269751
Bug 200277498
Bug 200340064

Change-Id: I8044b350587e2298ec1b705dd01fec5fc6d83379
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/1307421
Signed-off-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1563330
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

soc/tegra: add support for getting b01 rev

soc/tegra: adjust revision handling for t210 skus

Signed-off-by: Thomas Makin <halorocker89@gmail.com>
2025-11-02 00:10:16 +00:00
Alex Frid
46093863d5 clk: soc: tegra: Rename DFLL tune1 to tune1_low
Renamed DFLL tune1 to tune1_low to be consistent with
tune0_low/tune0_high naming convention.

Bug 1967884

Change-Id: If23170305143b05c2918e04691c73fe13b777272
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1576306
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Signed-off-by: Thomas Makin <halorocker89@gmail.com>
2025-11-02 00:10:16 +00:00
c4f897149e arm64: t210b01: enable max77812
Signed-off-by: Thomas Makin <halorocker89@gmail.com>
2025-11-02 00:10:16 +00:00
81343aa1fd arm64: t210b01: add max77620 support
Signed-off-by: Thomas Makin <halorocker89@gmail.com>
2025-11-02 00:10:16 +00:00
6334568c2f arm64: t210: add initial support for nx
The Nintendo Switch is a video game console based on the
Tegra X1 (T210) and X1+ (T210B01).

Signed-off-by: Thomas Makin <halorocker89@gmail.com>
2025-11-02 00:10:15 +00:00

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