Merge branch 'pci/controller/affinity'
- Add MSI_FLAG_NO_AFFINITY flag for devices that mux MSIs onto a single IRQ line and cannot set the affinity of each MSI to a specific CPU core (Marek Vasut) - Use MSI_FLAG_NO_AFFINITY and remove unnecessary .irq_set_affinity() implementations in aardvark, altera, brcmstb, dwc, mediatek-gen3, mediatek, mobiveil, plda, rcar, tegra, vmd, xilinx-nwl, xilinx-xdma, and xilinx drivers to avoid "IRQ: set affinity failed" warnings (Marek Vasut) * pci/controller/affinity: PCI: xilinx: Silence 'set affinity failed' warning PCI: xilinx-xdma: Silence 'set affinity failed' warning PCI: xilinx-nwl: Silence 'set affinity failed' warning PCI: vmd: Silence 'set affinity failed' warning PCI: tegra: Silence 'set affinity failed' warning PCI: rcar-host: Silence 'set affinity failed' warning PCI: plda: Silence 'set affinity failed' warning PCI: mobiveil: Silence 'set affinity failed' warning PCI: mediatek: Silence 'set affinity failed' warning PCI: mediatek-gen3: Silence 'set affinity failed' warning PCI: dwc: Silence 'set affinity failed' warning PCI: brcmstb: Silence 'set affinity failed' warning PCI: altera-msi: Silence 'set affinity failed' warning PCI: aardvark: Silence 'set affinity failed' warning genirq/msi: Silence 'set affinity failed' warning
This commit is contained in:
@@ -189,12 +189,6 @@ static void ks_pcie_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
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(int)data->hwirq, msg->address_hi, msg->address_lo);
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}
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static int ks_pcie_msi_set_affinity(struct irq_data *irq_data,
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const struct cpumask *mask, bool force)
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{
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return -EINVAL;
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}
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static void ks_pcie_msi_mask(struct irq_data *data)
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{
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struct dw_pcie_rp *pp = irq_data_get_irq_chip_data(data);
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@@ -247,7 +241,6 @@ static struct irq_chip ks_pcie_msi_irq_chip = {
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.name = "KEYSTONE-PCI-MSI",
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.irq_ack = ks_pcie_msi_irq_ack,
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.irq_compose_msi_msg = ks_pcie_compose_msi_msg,
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.irq_set_affinity = ks_pcie_msi_set_affinity,
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.irq_mask = ks_pcie_msi_mask,
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.irq_unmask = ks_pcie_msi_unmask,
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};
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@@ -48,8 +48,9 @@ static struct irq_chip dw_pcie_msi_irq_chip = {
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};
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static struct msi_domain_info dw_pcie_msi_domain_info = {
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.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
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MSI_FLAG_PCI_MSIX | MSI_FLAG_MULTI_PCI_MSI),
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.flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
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MSI_FLAG_NO_AFFINITY | MSI_FLAG_PCI_MSIX |
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MSI_FLAG_MULTI_PCI_MSI,
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.chip = &dw_pcie_msi_irq_chip,
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};
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@@ -116,12 +117,6 @@ static void dw_pci_setup_msi_msg(struct irq_data *d, struct msi_msg *msg)
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(int)d->hwirq, msg->address_hi, msg->address_lo);
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}
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static int dw_pci_msi_set_affinity(struct irq_data *d,
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const struct cpumask *mask, bool force)
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{
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return -EINVAL;
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}
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static void dw_pci_bottom_mask(struct irq_data *d)
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{
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struct dw_pcie_rp *pp = irq_data_get_irq_chip_data(d);
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@@ -177,7 +172,6 @@ static struct irq_chip dw_pci_msi_bottom_irq_chip = {
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.name = "DWPCI-MSI",
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.irq_ack = dw_pci_bottom_ack,
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.irq_compose_msi_msg = dw_pci_setup_msi_msg,
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.irq_set_affinity = dw_pci_msi_set_affinity,
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.irq_mask = dw_pci_bottom_mask,
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.irq_unmask = dw_pci_bottom_unmask,
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};
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