From eef0d09399ae7b4b33a18d7d763aca7451053ba3 Mon Sep 17 00:00:00 2001 From: Alex Frid Date: Wed, 2 Aug 2017 12:50:34 -0700 Subject: [PATCH] clk: soc: tegra: Rename DFLL tune1 to tune1_low Renamed DFLL tune1 to tune1_low to be consistent with tune0_low/tune0_high naming convention. Bug 1967884 Change-Id: If23170305143b05c2918e04691c73fe13b777272 Signed-off-by: Alex Frid Reviewed-on: https://git-master.nvidia.com/r/1576306 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/clk/tegra/clk-dfll.c | 6 +-- drivers/clk/tegra/clk-tegra124-dfll-fcpu.c | 56 +++++++++++----------- drivers/clk/tegra/cvb.h | 2 +- 3 files changed, 32 insertions(+), 32 deletions(-) diff --git a/drivers/clk/tegra/clk-dfll.c b/drivers/clk/tegra/clk-dfll.c index 94291a7704c7..c8d7d45a5a97 100644 --- a/drivers/clk/tegra/clk-dfll.c +++ b/drivers/clk/tegra/clk-dfll.c @@ -531,7 +531,7 @@ static void dfll_tune_low(struct tegra_dfll *td) td->tune_range = DFLL_TUNE_LOW; dfll_writel(td, td->soc->cvb->cpu_dfll_data.tune0_low, DFLL_TUNE0); - dfll_writel(td, td->soc->cvb->cpu_dfll_data.tune1, DFLL_TUNE1); + dfll_writel(td, td->soc->cvb->cpu_dfll_data.tune1_low, DFLL_TUNE1); dfll_wmb(td); if (td->soc->set_clock_trimmers_low) @@ -551,8 +551,8 @@ static void dfll_tune_high(struct tegra_dfll *td) { td->tune_range = DFLL_TUNE_HIGH; - dfll_writel(td, td->soc->tune0_high, DFLL_TUNE0); - dfll_writel(td, td->soc->tune1, DFLL_TUNE1); + dfll_writel(td, td->soc->cvb->cpu_dfll_data.tune0_high, DFLL_TUNE0); + dfll_writel(td, td->soc->cvb->cpu_dfll_data.tune1_low, DFLL_TUNE1); dfll_wmb(td); if (td->soc->set_clock_trimmers_high) diff --git a/drivers/clk/tegra/clk-tegra124-dfll-fcpu.c b/drivers/clk/tegra/clk-tegra124-dfll-fcpu.c index 70dfd67296f8..b554155285aa 100644 --- a/drivers/clk/tegra/clk-tegra124-dfll-fcpu.c +++ b/drivers/clk/tegra/clk-tegra124-dfll-fcpu.c @@ -64,7 +64,7 @@ static const unsigned long tegra114_cpu_max_freq_table[] = { .cpu_dfll_data = { \ .tune0_low = 0x00b0039d, \ .tune0_high = 0x00b0009d, \ - .tune1 = 0x0000001f, \ + .tune1_low = 0x0000001f, \ .tune_high_min_millivolts = 1050, \ } @@ -100,7 +100,7 @@ static const struct cvb_table tegra114_cpu_cvb_tables[] = { .cpu_dfll_data = { .tune0_low = 0x00b0019d, .tune0_high = 0x00b0019d, - .tune1 = 0x0000001f, + .tune1_low = 0x0000001f, .tune_high_min_millivolts = 1000, } }, @@ -167,7 +167,7 @@ static const struct cvb_table tegra124_cpu_cvb_tables[] = { .cpu_dfll_data = { .tune0_low = 0x005020ff, .tune0_high = 0x005040ff, - .tune1 = 0x00000060, + .tune1_low = 0x00000060, } }, }; @@ -335,7 +335,7 @@ static struct cvb_table tegra210_cpu_cvb_tables[] = { .cpu_dfll_data = { .tune0_low = 0xffead0ff, .tune0_high = 0xffead0ff, - .tune1 = 0x20091d9, + .tune1_low = 0x20091d9, .tune_high_min_millivolts = 864, } }, @@ -348,7 +348,7 @@ static struct cvb_table tegra210_cpu_cvb_tables[] = { .cpu_dfll_data = { .tune0_low = 0xffead0ff, .tune0_high = 0xffead0ff, - .tune1 = 0x20091d9, + .tune1_low = 0x20091d9, .tune_high_min_millivolts = 864, } }, @@ -361,7 +361,7 @@ static struct cvb_table tegra210_cpu_cvb_tables[] = { .cpu_dfll_data = { .tune0_low = 0xffead0ff, .tune0_high = 0xffead0ff, - .tune1 = 0x20091d9, + .tune1_low = 0x20091d9, } }, { @@ -373,7 +373,7 @@ static struct cvb_table tegra210_cpu_cvb_tables[] = { .cpu_dfll_data = { .tune0_low = 0xffead0ff, .tune0_high = 0xffead0ff, - .tune1 = 0x20091d9, + .tune1_low = 0x20091d9, } }, { @@ -385,7 +385,7 @@ static struct cvb_table tegra210_cpu_cvb_tables[] = { .cpu_dfll_data = { .tune0_low = 0xffead0ff, .tune0_high = 0xffead0ff, - .tune1 = 0x20091d9, + .tune1_low = 0x20091d9, } }, { @@ -397,7 +397,7 @@ static struct cvb_table tegra210_cpu_cvb_tables[] = { .cpu_dfll_data = { .tune0_low = 0xffead0ff, .tune0_high = 0xffead0ff, - .tune1 = 0x20091d9, + .tune1_low = 0x20091d9, } }, { @@ -409,7 +409,7 @@ static struct cvb_table tegra210_cpu_cvb_tables[] = { .cpu_dfll_data = { .tune0_low = 0xffead0ff, .tune0_high = 0xffead0ff, - .tune1 = 0x20091d9, + .tune1_low = 0x20091d9, .tune_high_min_millivolts = 864, } }, @@ -422,7 +422,7 @@ static struct cvb_table tegra210_cpu_cvb_tables[] = { .cpu_dfll_data = { .tune0_low = 0xffead0ff, .tune0_high = 0xffead0ff, - .tune1 = 0x20091d9, + .tune1_low = 0x20091d9, .tune_high_min_millivolts = 864, } }, @@ -434,7 +434,7 @@ static struct cvb_table tegra210_cpu_cvb_tables[] = { TEGRA210_CPU_CVB_TABLE, .cpu_dfll_data = { .tune0_low = 0xffead0ff, - .tune1 = 0x20091d9, + .tune1_low = 0x20091d9, } }, { @@ -445,7 +445,7 @@ static struct cvb_table tegra210_cpu_cvb_tables[] = { TEGRA210_CPU_CVB_TABLE, .cpu_dfll_data = { .tune0_low = 0xffead0ff, - .tune1 = 0x25501d0, + .tune1_low = 0x25501d0, } }, { @@ -457,7 +457,7 @@ static struct cvb_table tegra210_cpu_cvb_tables[] = { .cpu_dfll_data = { .tune0_low = 0xffead0ff, .tune0_high = 0xffead0ff, - .tune1 = 0x20091d9, + .tune1_low = 0x20091d9, .tune_high_min_millivolts = 864, } }, @@ -470,7 +470,7 @@ static struct cvb_table tegra210_cpu_cvb_tables[] = { .cpu_dfll_data = { .tune0_low = 0xffead0ff, .tune0_high = 0xffead0ff, - .tune1 = 0x25501d0, + .tune1_low = 0x25501d0, .tune_high_min_millivolts = 864, } }, @@ -482,7 +482,7 @@ static struct cvb_table tegra210_cpu_cvb_tables[] = { TEGRA210_CPU_CVB_TABLE_XA, .cpu_dfll_data = { .tune0_low = 0xffead0ff, - .tune1 = 0x17711BD, + .tune1_low = 0x17711BD, } }, { @@ -494,7 +494,7 @@ static struct cvb_table tegra210_cpu_cvb_tables[] = { .cpu_dfll_data = { .tune0_low = 0xffead0ff, .tune0_high = 0xffead0ff, - .tune1 = 0x20091d9, + .tune1_low = 0x20091d9, .tune_high_min_millivolts = 864, } }, @@ -507,7 +507,7 @@ static struct cvb_table tegra210_cpu_cvb_tables[] = { .cpu_dfll_data = { .tune0_low = 0xffead0ff, .tune0_high = 0xffead0ff, - .tune1 = 0x25501d0, + .tune1_low = 0x25501d0, .tune_high_min_millivolts = 864, } }, @@ -519,7 +519,7 @@ static struct cvb_table tegra210_cpu_cvb_tables[] = { TEGRA210_CPU_CVB_TABLE, .cpu_dfll_data = { .tune0_low = 0xffead0ff, - .tune1 = 0x20091d9, + .tune1_low = 0x20091d9, } }, { @@ -530,7 +530,7 @@ static struct cvb_table tegra210_cpu_cvb_tables[] = { TEGRA210_CPU_CVB_TABLE, .cpu_dfll_data = { .tune0_low = 0xffead0ff, - .tune1 = 0x25501d0, + .tune1_low = 0x25501d0, } }, { @@ -542,7 +542,7 @@ static struct cvb_table tegra210_cpu_cvb_tables[] = { .cpu_dfll_data = { .tune0_low = 0xffead0ff, .tune0_high = 0xffead0ff, - .tune1 = 0x20091d9, + .tune1_low = 0x20091d9, .tune_high_min_millivolts = 864, } }, @@ -555,7 +555,7 @@ static struct cvb_table tegra210_cpu_cvb_tables[] = { .cpu_dfll_data = { .tune0_low = 0xffead0ff, .tune0_high = 0xffead0ff, - .tune1 = 0x25501d0, + .tune1_low = 0x25501d0, .tune_high_min_millivolts = 864, } }, @@ -568,7 +568,7 @@ static struct cvb_table tegra210_cpu_cvb_tables[] = { .cpu_dfll_data = { .tune0_low = 0xffead0ff, .tune0_high = 0xffead0ff, - .tune1 = 0x20091d9, + .tune1_low = 0x20091d9, .tune_high_min_millivolts = 864, } }, @@ -581,7 +581,7 @@ static struct cvb_table tegra210_cpu_cvb_tables[] = { .cpu_dfll_data = { .tune0_low = 0xffead0ff, .tune0_high = 0xffead0ff, - .tune1 = 0x25501d0, + .tune1_low = 0x25501d0, .tune_high_min_millivolts = 864, } }, @@ -682,7 +682,7 @@ static struct cvb_table tegra210b01_cpu_cvb_tables[] = { CPUB01_CVB_TABLE, .cpu_dfll_data = { .tune0_low = 0x0000ffcf, - .tune1 = 0x012207ff, + .tune1_low = 0x012207ff, .tune_high_min_millivolts = 850, } }, @@ -694,7 +694,7 @@ static struct cvb_table tegra210b01_cpu_cvb_tables[] = { .cpu_dfll_data = { .tune0_low = 0x0000ffa0, .tune0_high = 0x0000ffff, - .tune1 = 0x021107ff, + .tune1_low = 0x021107ff, .tune_high_min_millivolts = 850, } }, @@ -706,7 +706,7 @@ static struct cvb_table tegra210b01_cpu_cvb_tables[] = { .cpu_dfll_data = { .tune0_low = 0x0000ff90, .tune0_high = 0x0000ffff, - .tune1 = 0x021107ff, + .tune1_low = 0x021107ff, .tune_high_min_millivolts = 850, } }, @@ -717,7 +717,7 @@ static struct cvb_table tegra210b01_cpu_cvb_tables[] = { CPUB01_CVB_TABLE, .cpu_dfll_data = { .tune0_low = 0x0000ffcf, - .tune1 = 0x012207ff, + .tune1_low = 0x012207ff, .tune_high_min_millivolts = 850, } }, diff --git a/drivers/clk/tegra/cvb.h b/drivers/clk/tegra/cvb.h index 750095fe97d7..c2ff6379b35d 100644 --- a/drivers/clk/tegra/cvb.h +++ b/drivers/clk/tegra/cvb.h @@ -31,7 +31,7 @@ struct cvb_table_freq_entry { struct cvb_cpu_dfll_data { u32 tune0_low; u32 tune0_high; - u32 tune1; + u32 tune1_low; unsigned int tune_high_min_millivolts; };