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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband

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* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband: (26 commits)
  IB/qib: Defer HCA error events to tasklet
  mlx4_core: Bump the driver version to 1.0
  RDMA/cxgb4: Use printk_ratelimited() instead of printk_ratelimit()
  IB/mlx4: Support PMA counters for IBoE
  IB/mlx4: Use flow counters on IBoE ports
  IB/pma: Add include file for IBA performance counters definitions
  mlx4_core: Add network flow counters
  mlx4_core: Fix location of counter index in QP context struct
  mlx4_core: Read extended capabilities into the flags field
  mlx4_core: Extend capability flags to 64 bits
  IB/mlx4: Generate GID change events in IBoE code
  IB/core: Add GID change event
  RDMA/cma: Don't allow IPoIB port space for IBoE
  RDMA: Allow for NULL .modify_device() and .modify_port() methods
  IB/qib: Update active link width
  IB/qib: Fix potential deadlock with link down interrupt
  IB/qib: Add sysfs interface to read free contexts
  IB/mthca: Remove unnecessary read of PCI_CAP_ID_EXP
  IB/qib: Remove double define
  IB/qib: Remove unnecessary read of PCI_CAP_ID_EXP
  ...
This commit is contained in:
Linus Torvalds
2011-07-22 14:50:12 -07:00
parent 441c196e84 4460207561
commit ece236ce2f
53 changed files with 1006 additions and 1162 deletions
Download Patch File Download Diff File Expand all files Collapse all files
include/linux/mlx4/cmd.h
+3
View File
@@ -123,6 +123,9 @@ enum {
/* debug commands */
MLX4_CMD_QUERY_DEBUG_MSG = 0x2a,
MLX4_CMD_SET_DEBUG_MSG = 0x2b,
/* statistics commands */
MLX4_CMD_QUERY_IF_STAT = 0X54,
};
enum {
include/linux/mlx4/device.h
+38 -22
View File
@@ -58,22 +58,28 @@ enum {
};
enum {
MLX4_DEV_CAP_FLAG_RC = 1 << 0,
MLX4_DEV_CAP_FLAG_UC = 1 << 1,
MLX4_DEV_CAP_FLAG_UD = 1 << 2,
MLX4_DEV_CAP_FLAG_SRQ = 1 << 6,
MLX4_DEV_CAP_FLAG_IPOIB_CSUM = 1 << 7,
MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR = 1 << 8,
MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR = 1 << 9,
MLX4_DEV_CAP_FLAG_DPDP = 1 << 12,
MLX4_DEV_CAP_FLAG_BLH = 1 << 15,
MLX4_DEV_CAP_FLAG_MEM_WINDOW = 1 << 16,
MLX4_DEV_CAP_FLAG_APM = 1 << 17,
MLX4_DEV_CAP_FLAG_ATOMIC = 1 << 18,
MLX4_DEV_CAP_FLAG_RAW_MCAST = 1 << 19,
MLX4_DEV_CAP_FLAG_UD_AV_PORT = 1 << 20,
MLX4_DEV_CAP_FLAG_UD_MCAST = 1 << 21,
MLX4_DEV_CAP_FLAG_IBOE = 1 << 30
MLX4_DEV_CAP_FLAG_RC = 1LL << 0,
MLX4_DEV_CAP_FLAG_UC = 1LL << 1,
MLX4_DEV_CAP_FLAG_UD = 1LL << 2,
MLX4_DEV_CAP_FLAG_SRQ = 1LL << 6,
MLX4_DEV_CAP_FLAG_IPOIB_CSUM = 1LL << 7,
MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR = 1LL << 8,
MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR = 1LL << 9,
MLX4_DEV_CAP_FLAG_DPDP = 1LL << 12,
MLX4_DEV_CAP_FLAG_BLH = 1LL << 15,
MLX4_DEV_CAP_FLAG_MEM_WINDOW = 1LL << 16,
MLX4_DEV_CAP_FLAG_APM = 1LL << 17,
MLX4_DEV_CAP_FLAG_ATOMIC = 1LL << 18,
MLX4_DEV_CAP_FLAG_RAW_MCAST = 1LL << 19,
MLX4_DEV_CAP_FLAG_UD_AV_PORT = 1LL << 20,
MLX4_DEV_CAP_FLAG_UD_MCAST = 1LL << 21,
MLX4_DEV_CAP_FLAG_IBOE = 1LL << 30,
MLX4_DEV_CAP_FLAG_UC_LOOPBACK = 1LL << 32,
MLX4_DEV_CAP_FLAG_WOL = 1LL << 38,
MLX4_DEV_CAP_FLAG_UDP_RSS = 1LL << 40,
MLX4_DEV_CAP_FLAG_VEP_UC_STEER = 1LL << 41,
MLX4_DEV_CAP_FLAG_VEP_MC_STEER = 1LL << 42,
MLX4_DEV_CAP_FLAG_COUNTERS = 1LL << 48
};
enum {
@@ -253,15 +259,10 @@ struct mlx4_caps {
int mtt_entry_sz;
u32 max_msg_sz;
u32 page_size_cap;
u32 flags;
u64 flags;
u32 bmme_flags;
u32 reserved_lkey;
u16 stat_rate_support;
int udp_rss;
int loopback_support;
int vep_uc_steering;
int vep_mc_steering;
int wol;
u8 port_width_cap[MLX4_MAX_PORTS + 1];
int max_gso_sz;
int reserved_qps_cnt[MLX4_NUM_QP_REGION];
@@ -274,6 +275,7 @@ struct mlx4_caps {
u8 supported_type[MLX4_MAX_PORTS + 1];
u32 port_mask;
enum mlx4_port_type possible_type[MLX4_MAX_PORTS + 1];
u32 max_counters;
};
struct mlx4_buf_list {
@@ -438,6 +440,17 @@ union mlx4_ext_av {
struct mlx4_eth_av eth;
};
struct mlx4_counter {
u8 reserved1[3];
u8 counter_mode;
__be32 num_ifc;
u32 reserved2[2];
__be64 rx_frames;
__be64 rx_bytes;
__be64 tx_frames;
__be64 tx_bytes;
};
struct mlx4_dev {
struct pci_dev *pdev;
unsigned long flags;
@@ -568,4 +581,7 @@ void mlx4_release_eq(struct mlx4_dev *dev, int vec);
int mlx4_wol_read(struct mlx4_dev *dev, u64 *config, int port);
int mlx4_wol_write(struct mlx4_dev *dev, u64 config, int port);
int mlx4_counter_alloc(struct mlx4_dev *dev, u32 *idx);
void mlx4_counter_free(struct mlx4_dev *dev, u32 idx);
#endif /* MLX4_DEVICE_H */
include/linux/mlx4/qp.h
+4 -4
View File
@@ -54,7 +54,8 @@ enum mlx4_qp_optpar {
MLX4_QP_OPTPAR_RETRY_COUNT = 1 << 12,
MLX4_QP_OPTPAR_RNR_RETRY = 1 << 13,
MLX4_QP_OPTPAR_ACK_TIMEOUT = 1 << 14,
MLX4_QP_OPTPAR_SCHED_QUEUE = 1 << 16
MLX4_QP_OPTPAR_SCHED_QUEUE = 1 << 16,
MLX4_QP_OPTPAR_COUNTER_INDEX = 1 << 20
};
enum mlx4_qp_state {
@@ -99,7 +100,7 @@ struct mlx4_qp_path {
u8 fl;
u8 reserved1[2];
u8 pkey_index;
u8 reserved2;
u8 counter_index;
u8 grh_mylmc;
__be16 rlid;
u8 ackto;
@@ -111,8 +112,7 @@ struct mlx4_qp_path {
u8 sched_queue;
u8 vlan_index;
u8 reserved3[2];
u8 counter_index;
u8 reserved4;
u8 reserved4[2];
u8 dmac[6];
};