From 7661e680692e8cb70bf92f0e9b567849e2b6405a Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 26 Jun 2024 12:09:10 +0200 Subject: [PATCH 1/5] dt-bindings: mfd: syscon: Drop hwlocks Apparently there is no in-tree DTS syscon node having hwlocks, so drop the property to simplify the binding. Acked-by: Rob Herring (Arm) Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240626-dt-bindings-mfd-syscon-split-v3-1-3409903bb99b@linaro.org Signed-off-by: Lee Jones --- Documentation/devicetree/bindings/mfd/syscon.yaml | 5 ----- 1 file changed, 5 deletions(-) diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index 7ed12a938baa..0f8c26efa18a 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -112,11 +112,6 @@ properties: resets: maxItems: 1 - hwlocks: - maxItems: 1 - description: - Reference to a phandle of a hardware spinlock provider node. - required: - compatible - reg From cf87496ba236989a30995e9b98abd65651f5e629 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 26 Jun 2024 12:09:11 +0200 Subject: [PATCH 2/5] dt-bindings: soc: sprd: sc9863a-glbregs: Document SC9863A syscon Document sprd,sc9863a-glbregs compatible already used in DTS and other bindings example. Reviewed-by: Rob Herring (Arm) Reviewed-by: Baolin Wang Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240626-dt-bindings-mfd-syscon-split-v3-2-3409903bb99b@linaro.org Signed-off-by: Lee Jones --- .../soc/sprd/sprd,sc9863a-glbregs.yaml | 55 +++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/sprd/sprd,sc9863a-glbregs.yaml diff --git a/Documentation/devicetree/bindings/soc/sprd/sprd,sc9863a-glbregs.yaml b/Documentation/devicetree/bindings/soc/sprd/sprd,sc9863a-glbregs.yaml new file mode 100644 index 000000000000..49add564e5e1 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/sprd/sprd,sc9863a-glbregs.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/sprd/sprd,sc9863a-glbregs.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SC9863A Syscon + +maintainers: + - Orson Zhai + - Baolin Wang + - Chunyan Zhang + +properties: + compatible: + items: + - const: sprd,sc9863a-glbregs + - const: syscon + - const: simple-mfd + + reg: + maxItems: 1 + + ranges: true + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + +patternProperties: + "@[0-9a-f]+$": + $ref: /schemas/clock/sprd,sc9863a-clk.yaml + description: Clock controllers + +additionalProperties: false + +examples: + - | + syscon@20e00000 { + compatible = "sprd,sc9863a-glbregs", "syscon", "simple-mfd"; + reg = <0x20e00000 0x4000>; + ranges = <0 0x20e00000 0x4000>; + #address-cells = <1>; + #size-cells = <1>; + + apahb_gate: apahb-gate@0 { + compatible = "sprd,sc9863a-apahb-gate"; + reg = <0x0 0x1020>; + #clock-cells = <1>; + }; + }; + +... From c94ee67abd9d22d2f8cff93b3581d99695babe9f Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 26 Jun 2024 12:09:12 +0200 Subject: [PATCH 3/5] dt-bindings: soc: intel: lgm-syscon: Move to dedicated schema intel,lgm-syscon is not a simple syscon device - it has children - thus it should be fully documented in its own binding. Reviewed-by: Conor Dooley Reviewed-by: Rob Herring (Arm) Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240626-dt-bindings-mfd-syscon-split-v3-3-3409903bb99b@linaro.org Signed-off-by: Lee Jones --- .../devicetree/bindings/mfd/syscon.yaml | 1 - .../bindings/soc/intel/intel,lgm-syscon.yaml | 57 +++++++++++++++++++ 2 files changed, 57 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/soc/intel/intel,lgm-syscon.yaml diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index 0f8c26efa18a..99838787d437 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -57,7 +57,6 @@ properties: - hisilicon,pcie-sas-subctrl - hisilicon,peri-subctrl - hpe,gxp-sysreg - - intel,lgm-syscon - loongson,ls1b-syscon - loongson,ls1c-syscon - marvell,armada-3700-cpu-misc diff --git a/Documentation/devicetree/bindings/soc/intel/intel,lgm-syscon.yaml b/Documentation/devicetree/bindings/soc/intel/intel,lgm-syscon.yaml new file mode 100644 index 000000000000..6951d55356d5 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/intel/intel,lgm-syscon.yaml @@ -0,0 +1,57 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/intel/intel,lgm-syscon.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Intel Lightning Mountain(LGM) Syscon + +maintainers: + - Chuanhua Lei + - Rahul Tanwar + +properties: + compatible: + items: + - const: intel,lgm-syscon + - const: syscon + + reg: + maxItems: 1 + + ranges: true + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + +patternProperties: + "^emmc-phy@[0-9a-f]+$": + $ref: /schemas/phy/intel,lgm-emmc-phy.yaml# + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + +additionalProperties: false + +examples: + - | + chiptop@e0200000 { + compatible = "intel,lgm-syscon", "syscon"; + reg = <0xe0200000 0x100>; + ranges = <0x0 0xe0200000 0x100>; + #address-cells = <1>; + #size-cells = <1>; + + emmc-phy@a8 { + compatible = "intel,lgm-emmc-phy"; + reg = <0x00a8 0x10>; + clocks = <&emmc>; + #phy-cells = <0>; + }; + }; From 430ed952ed57bab9164a4bdfd0e73c6c523f11b0 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 26 Jun 2024 12:09:13 +0200 Subject: [PATCH 4/5] dt-bindings: soc: microchip: sparx5-cpu-syscon: Move to dedicated schema microchip,sparx5-cpu-syscon is not a simple syscon device - it has children and implements simple-mfd compatible - thus it should be fully documented in its own binding. Reviewed-by: Rob Herring (Arm) Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240626-dt-bindings-mfd-syscon-split-v3-4-3409903bb99b@linaro.org Signed-off-by: Lee Jones --- .../devicetree/bindings/mfd/syscon.yaml | 1 - .../microchip,sparx5-cpu-syscon.yaml | 49 +++++++++++++++++++ 2 files changed, 49 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/soc/microchip/microchip,sparx5-cpu-syscon.yaml diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index 99838787d437..7d0027cbca2c 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -70,7 +70,6 @@ properties: - mediatek,mt8173-pctl-a-syscfg - mediatek,mt8365-syscfg - microchip,lan966x-cpu-syscon - - microchip,sparx5-cpu-syscon - mstar,msc313-pmsleep - nuvoton,ma35d1-sys - nuvoton,wpcm450-shm diff --git a/Documentation/devicetree/bindings/soc/microchip/microchip,sparx5-cpu-syscon.yaml b/Documentation/devicetree/bindings/soc/microchip/microchip,sparx5-cpu-syscon.yaml new file mode 100644 index 000000000000..1f0b542d2296 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/microchip/microchip,sparx5-cpu-syscon.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/microchip/microchip,sparx5-cpu-syscon.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip Sparx5 CPU Syscon + +maintainers: + - Lars Povlsen + +properties: + compatible: + items: + - const: microchip,sparx5-cpu-syscon + - const: syscon + - const: simple-mfd + + reg: + maxItems: 1 + + mux-controller: + $ref: /schemas/mux/reg-mux.yaml# + +required: + - compatible + - reg + - mux-controller + +additionalProperties: false + +examples: + - | + soc { + #address-cells = <2>; + #size-cells = <1>; + + syscon@600000000 { + compatible = "microchip,sparx5-cpu-syscon", "syscon", + "simple-mfd"; + reg = <0x6 0x00000000 0xd0>; + + mux: mux-controller { + compatible = "mmio-mux"; + #mux-control-cells = <1>; + mux-reg-masks = <0x88 0xf0>; + }; + }; + }; From 174614d889a2315ebe48b7138db5cde9cc6428e5 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 26 Jun 2024 12:09:14 +0200 Subject: [PATCH 5/5] dt-bindings: soc: ti: am654-serdes-ctrl: Move to dedicated schema ti,am654-serdes-ctrl is not a simple syscon device - it has children - thus it should be fully documented in its own binding. Reviewed-by: Rob Herring (Arm) Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240626-dt-bindings-mfd-syscon-split-v3-5-3409903bb99b@linaro.org Signed-off-by: Lee Jones --- .../devicetree/bindings/mfd/syscon.yaml | 1 - .../bindings/soc/ti/ti,am654-serdes-ctrl.yaml | 42 +++++++++++++++++++ 2 files changed, 42 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/soc/ti/ti,am654-serdes-ctrl.yaml diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index 7d0027cbca2c..d331bb260a63 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -88,7 +88,6 @@ properties: - ti,am62-usb-phy-ctrl - ti,am62p-cpsw-mac-efuse - ti,am654-dss-oldi-io-ctrl - - ti,am654-serdes-ctrl - ti,j784s4-pcie-ctrl - const: syscon diff --git a/Documentation/devicetree/bindings/soc/ti/ti,am654-serdes-ctrl.yaml b/Documentation/devicetree/bindings/soc/ti/ti,am654-serdes-ctrl.yaml new file mode 100644 index 000000000000..a10a3b89ae05 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/ti/ti,am654-serdes-ctrl.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/ti/ti,am654-serdes-ctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments AM654 Serdes Control Syscon + +maintainers: + - Nishanth Menon + +properties: + compatible: + items: + - const: ti,am654-serdes-ctrl + - const: syscon + + reg: + maxItems: 1 + + mux-controller: + $ref: /schemas/mux/reg-mux.yaml# + +required: + - compatible + - reg + - mux-controller + +additionalProperties: false + +examples: + - | + clock@4080 { + compatible = "ti,am654-serdes-ctrl", "syscon"; + reg = <0x4080 0x4>; + + mux-controller { + compatible = "mmio-mux"; + #mux-control-cells = <1>; + mux-reg-masks = <0x0 0x3>; /* lane select */ + }; + };