From 1425bdd7ef88631d0623ce3d0b8c89d8a65815d2 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Thu, 22 Jun 2023 21:36:11 +0300 Subject: [PATCH 001/656] regmap: Revert "add 64-bit mode support" and Co. With unsigned int type we never ever can pass 64-bit value. Remove never properly worked code. Note, there are no users in kernel for this size of register offsets or data. This reverts commit afcc00b91f1865f6d0bbdb687dd642ce8a3c3c9e. Also revert other 64-bit code excerpts in the regmap implementation that had been induced by the false impression made by the above mentioned change that there is a support of that data size. Signed-off-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230622183613.58762-2-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown --- drivers/base/regmap/regmap.c | 122 ----------------------------------- 1 file changed, 122 deletions(-) diff --git a/drivers/base/regmap/regmap.c b/drivers/base/regmap/regmap.c index 89a7f1c459c1..8b37451fa931 100644 --- a/drivers/base/regmap/regmap.c +++ b/drivers/base/regmap/regmap.c @@ -311,26 +311,6 @@ static void regmap_format_32_native(void *buf, unsigned int val, memcpy(buf, &v, sizeof(v)); } -#ifdef CONFIG_64BIT -static void regmap_format_64_be(void *buf, unsigned int val, unsigned int shift) -{ - put_unaligned_be64((u64) val << shift, buf); -} - -static void regmap_format_64_le(void *buf, unsigned int val, unsigned int shift) -{ - put_unaligned_le64((u64) val << shift, buf); -} - -static void regmap_format_64_native(void *buf, unsigned int val, - unsigned int shift) -{ - u64 v = (u64) val << shift; - - memcpy(buf, &v, sizeof(v)); -} -#endif - static void regmap_parse_inplace_noop(void *buf) { } @@ -411,40 +391,6 @@ static unsigned int regmap_parse_32_native(const void *buf) return v; } -#ifdef CONFIG_64BIT -static unsigned int regmap_parse_64_be(const void *buf) -{ - return get_unaligned_be64(buf); -} - -static unsigned int regmap_parse_64_le(const void *buf) -{ - return get_unaligned_le64(buf); -} - -static void regmap_parse_64_be_inplace(void *buf) -{ - u64 v = get_unaligned_be64(buf); - - memcpy(buf, &v, sizeof(v)); -} - -static void regmap_parse_64_le_inplace(void *buf) -{ - u64 v = get_unaligned_le64(buf); - - memcpy(buf, &v, sizeof(v)); -} - -static unsigned int regmap_parse_64_native(const void *buf) -{ - u64 v; - - memcpy(&v, buf, sizeof(v)); - return v; -} -#endif - static void regmap_lock_hwlock(void *__map) { struct regmap *map = __map; @@ -1005,24 +951,6 @@ struct regmap *__regmap_init(struct device *dev, } break; -#ifdef CONFIG_64BIT - case 64: - switch (reg_endian) { - case REGMAP_ENDIAN_BIG: - map->format.format_reg = regmap_format_64_be; - break; - case REGMAP_ENDIAN_LITTLE: - map->format.format_reg = regmap_format_64_le; - break; - case REGMAP_ENDIAN_NATIVE: - map->format.format_reg = regmap_format_64_native; - break; - default: - goto err_hwlock; - } - break; -#endif - default: goto err_hwlock; } @@ -1086,28 +1014,6 @@ struct regmap *__regmap_init(struct device *dev, goto err_hwlock; } break; -#ifdef CONFIG_64BIT - case 64: - switch (val_endian) { - case REGMAP_ENDIAN_BIG: - map->format.format_val = regmap_format_64_be; - map->format.parse_val = regmap_parse_64_be; - map->format.parse_inplace = regmap_parse_64_be_inplace; - break; - case REGMAP_ENDIAN_LITTLE: - map->format.format_val = regmap_format_64_le; - map->format.parse_val = regmap_parse_64_le; - map->format.parse_inplace = regmap_parse_64_le_inplace; - break; - case REGMAP_ENDIAN_NATIVE: - map->format.format_val = regmap_format_64_native; - map->format.parse_val = regmap_parse_64_native; - break; - default: - goto err_hwlock; - } - break; -#endif } if (map->format.format_write) { @@ -2160,9 +2066,6 @@ static int regmap_noinc_readwrite(struct regmap *map, unsigned int reg, u8 *u8p; u16 *u16p; u32 *u32p; -#ifdef CONFIG_64BIT - u64 *u64p; -#endif int ret; int i; @@ -2182,13 +2085,6 @@ static int regmap_noinc_readwrite(struct regmap *map, unsigned int reg, if (write) lastval = (unsigned int)u32p[val_count - 1]; break; -#ifdef CONFIG_64BIT - case 8: - u64p = val; - if (write) - lastval = (unsigned int)u64p[val_count - 1]; - break; -#endif default: return -EINVAL; } @@ -2226,11 +2122,6 @@ static int regmap_noinc_readwrite(struct regmap *map, unsigned int reg, case 4: pr_cont("%x", u32p[i]); break; -#ifdef CONFIG_64BIT - case 8: - pr_cont("%llx", u64p[i]); - break; -#endif default: break; } @@ -2438,11 +2329,6 @@ int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val, case 4: ival = *(u32 *)(val + (i * val_bytes)); break; -#ifdef CONFIG_64BIT - case 8: - ival = *(u64 *)(val + (i * val_bytes)); - break; -#endif default: ret = -EINVAL; goto out; @@ -3207,9 +3093,6 @@ int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val, for (i = 0; i < val_count * val_bytes; i += val_bytes) map->format.parse_inplace(val + i); } else { -#ifdef CONFIG_64BIT - u64 *u64 = val; -#endif u32 *u32 = val; u16 *u16 = val; u8 *u8 = val; @@ -3225,11 +3108,6 @@ int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val, goto out; switch (map->format.val_bytes) { -#ifdef CONFIG_64BIT - case 8: - u64[i] = ival; - break; -#endif case 4: u32[i] = ival; break; From 039fd2e4134b7b880ba83f40a136df440047594a Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Thu, 22 Jun 2023 21:36:12 +0300 Subject: [PATCH 002/656] regmap: cache: Revert "Add 64-bit mode support" There is no support for 64-bit data size in regmap, so there is no point to have it in regmap cache. This reverts commit 8b7663de6e2bfe3c40e1846e1c4625f33d138757. Signed-off-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230622183613.58762-3-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown --- drivers/base/regmap/regcache.c | 15 --------------- 1 file changed, 15 deletions(-) diff --git a/drivers/base/regmap/regcache.c b/drivers/base/regmap/regcache.c index 28bc3ae9458a..156490ab7f34 100644 --- a/drivers/base/regmap/regcache.c +++ b/drivers/base/regmap/regcache.c @@ -590,14 +590,6 @@ void regcache_set_val(struct regmap *map, void *base, unsigned int idx, cache[idx] = val; break; } -#ifdef CONFIG_64BIT - case 8: { - u64 *cache = base; - - cache[idx] = val; - break; - } -#endif default: BUG(); } @@ -630,13 +622,6 @@ unsigned int regcache_get_val(struct regmap *map, const void *base, return cache[idx]; } -#ifdef CONFIG_64BIT - case 8: { - const u64 *cache = base; - - return cache[idx]; - } -#endif default: BUG(); } From 875403a7b524e9523e49dd32662adbc3e48cc12a Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Thu, 22 Jun 2023 21:36:13 +0300 Subject: [PATCH 003/656] regmap: mmio: Remove unused 64-bit support code regmap API does not support 64-bit data size, so there is no point to have it in regmap MMIO. Signed-off-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230622183613.58762-4-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown --- drivers/base/regmap/regmap-mmio.c | 24 ------------------------ 1 file changed, 24 deletions(-) diff --git a/drivers/base/regmap/regmap-mmio.c b/drivers/base/regmap/regmap-mmio.c index 8132b5c101c4..99d7fd85ca7d 100644 --- a/drivers/base/regmap/regmap-mmio.c +++ b/drivers/base/regmap/regmap-mmio.c @@ -202,15 +202,6 @@ static int regmap_mmio_noinc_write(void *context, unsigned int reg, writel(swab32(valp[i]), ctx->regs + reg); goto out_clk; } -#ifdef CONFIG_64BIT - case 8: - { - const u64 *valp = (const u64 *)val; - for (i = 0; i < val_count; i++) - writeq(swab64(valp[i]), ctx->regs + reg); - goto out_clk; - } -#endif default: ret = -EINVAL; goto out_clk; @@ -227,11 +218,6 @@ static int regmap_mmio_noinc_write(void *context, unsigned int reg, case 4: writesl(ctx->regs + reg, (const u32 *)val, val_count); break; -#ifdef CONFIG_64BIT - case 8: - writesq(ctx->regs + reg, (const u64 *)val, val_count); - break; -#endif default: ret = -EINVAL; break; @@ -363,11 +349,6 @@ static int regmap_mmio_noinc_read(void *context, unsigned int reg, case 4: readsl(ctx->regs + reg, (u32 *)val, val_count); break; -#ifdef CONFIG_64BIT - case 8: - readsq(ctx->regs + reg, (u64 *)val, val_count); - break; -#endif default: ret = -EINVAL; goto out_clk; @@ -387,11 +368,6 @@ static int regmap_mmio_noinc_read(void *context, unsigned int reg, case 4: swab32_array(val, val_count); break; -#ifdef CONFIG_64BIT - case 8: - swab64_array(val, val_count); - break; -#endif default: ret = -EINVAL; break; From d16db38c2a66060ee25c6b86ee7b6d66d40fc8e0 Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Mon, 3 Jul 2023 20:15:54 +0200 Subject: [PATCH 004/656] dt-bindings: regulator: Describe Qualcomm REFGEN regulator Modern Qualcomm SoCs have a REFGEN (reference voltage generator) regulator, providing reference voltage to on-chip IP, like PHYs. It's controlled through MMIO and we can toggle it or read its state back. Describe it. Signed-off-by: Konrad Dybcio Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20230628-topic-refgen-v3-1-9fbf0e605d23@linaro.org Signed-off-by: Mark Brown --- .../qcom,sdm845-refgen-regulator.yaml | 57 +++++++++++++++++++ 1 file changed, 57 insertions(+) create mode 100644 Documentation/devicetree/bindings/regulator/qcom,sdm845-refgen-regulator.yaml diff --git a/Documentation/devicetree/bindings/regulator/qcom,sdm845-refgen-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,sdm845-refgen-regulator.yaml new file mode 100644 index 000000000000..f02f97d4fdd2 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/qcom,sdm845-refgen-regulator.yaml @@ -0,0 +1,57 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/qcom,sdm845-refgen-regulator.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Technologies, Inc. REFGEN Regulator + +maintainers: + - Konrad Dybcio + +description: + The REFGEN (reference voltage generator) regulator provides reference + voltage for on-chip IPs (like PHYs) on some Qualcomm SoCs. + +allOf: + - $ref: regulator.yaml# + +properties: + compatible: + oneOf: + - items: + - enum: + - qcom,sc7180-refgen-regulator + - qcom,sc8180x-refgen-regulator + - qcom,sm8150-refgen-regulator + - const: qcom,sdm845-refgen-regulator + + - items: + - enum: + - qcom,sc7280-refgen-regulator + - qcom,sc8280xp-refgen-regulator + - qcom,sm6350-refgen-regulator + - qcom,sm6375-refgen-regulator + - qcom,sm8350-refgen-regulator + - const: qcom,sm8250-refgen-regulator + + - enum: + - qcom,sdm845-refgen-regulator + - qcom,sm8250-refgen-regulator + + reg: + maxItems: 1 + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + regulator@162f000 { + compatible = "qcom,sm8250-refgen-regulator"; + reg = <0x0162f000 0x84>; + }; +... From 7cbfbe23796086fdb72b681e2c182b02acd36a04 Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Mon, 3 Jul 2023 20:15:55 +0200 Subject: [PATCH 005/656] regulator: Introduce Qualcomm REFGEN regulator driver Modern Qualcomm SoCs have a REFGEN (reference voltage generator) regulator, providing reference voltage to on-chip IP, like PHYs. Add a driver to support toggling that regulator. Signed-off-by: Konrad Dybcio Link: https://lore.kernel.org/r/20230628-topic-refgen-v3-2-9fbf0e605d23@linaro.org Signed-off-by: Mark Brown --- drivers/regulator/Kconfig | 11 ++ drivers/regulator/Makefile | 1 + drivers/regulator/qcom-refgen-regulator.c | 154 ++++++++++++++++++++++ 3 files changed, 166 insertions(+) create mode 100644 drivers/regulator/qcom-refgen-regulator.c diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig index 823f8e6e4801..18a05b09406f 100644 --- a/drivers/regulator/Kconfig +++ b/drivers/regulator/Kconfig @@ -989,6 +989,17 @@ config REGULATOR_PWM This driver supports PWM controlled voltage regulators. PWM duty cycle can increase or decrease the voltage. +config REGULATOR_QCOM_REFGEN + tristate "Qualcomm REFGEN regulator driver" + depends on HAS_IOMEM + depends on REGMAP + help + This driver supports the MMIO-mapped reference voltage regulator, + used internally by some PHYs on many Qualcomm SoCs. + + Say M here if you want to include support for this regulator as + a module. The module will be named "qcom-refgen-regulator". + config REGULATOR_QCOM_RPM tristate "Qualcomm RPM regulator driver" depends on MFD_QCOM_RPM diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile index 15e0d614ff66..4f4589877e81 100644 --- a/drivers/regulator/Makefile +++ b/drivers/regulator/Makefile @@ -108,6 +108,7 @@ obj-$(CONFIG_REGULATOR_MT6380) += mt6380-regulator.o obj-$(CONFIG_REGULATOR_MT6397) += mt6397-regulator.o obj-$(CONFIG_REGULATOR_MTK_DVFSRC) += mtk-dvfsrc-regulator.o obj-$(CONFIG_REGULATOR_QCOM_LABIBB) += qcom-labibb-regulator.o +obj-$(CONFIG_REGULATOR_QCOM_REFGEN) += qcom-refgen-regulator.o obj-$(CONFIG_REGULATOR_QCOM_RPM) += qcom_rpm-regulator.o obj-$(CONFIG_REGULATOR_QCOM_RPMH) += qcom-rpmh-regulator.o obj-$(CONFIG_REGULATOR_QCOM_SMD_RPM) += qcom_smd-regulator.o diff --git a/drivers/regulator/qcom-refgen-regulator.c b/drivers/regulator/qcom-refgen-regulator.c new file mode 100644 index 000000000000..656fe330d38f --- /dev/null +++ b/drivers/regulator/qcom-refgen-regulator.c @@ -0,0 +1,154 @@ +// SPDX-License-Identifier: GPL-2.0-only +// Copyright (c) 2017, 2019-2020, The Linux Foundation. All rights reserved. +// Copyright (c) 2023, Linaro Limited + +#include +#include +#include +#include +#include +#include +#include +#include + +#define REFGEN_REG_BIAS_EN 0x08 +#define REFGEN_BIAS_EN_MASK GENMASK(2, 0) + #define REFGEN_BIAS_EN_ENABLE 0x7 + #define REFGEN_BIAS_EN_DISABLE 0x6 + +#define REFGEN_REG_BG_CTRL 0x14 +#define REFGEN_BG_CTRL_MASK GENMASK(2, 1) + #define REFGEN_BG_CTRL_ENABLE 0x3 + #define REFGEN_BG_CTRL_DISABLE 0x2 + +#define REFGEN_REG_PWRDWN_CTRL5 0x80 +#define REFGEN_PWRDWN_CTRL5_MASK BIT(0) + #define REFGEN_PWRDWN_CTRL5_ENABLE 0x1 + +static int qcom_sdm845_refgen_enable(struct regulator_dev *rdev) +{ + regmap_update_bits(rdev->regmap, REFGEN_REG_BG_CTRL, REFGEN_BG_CTRL_MASK, + FIELD_PREP(REFGEN_BG_CTRL_MASK, REFGEN_BG_CTRL_ENABLE)); + + regmap_write(rdev->regmap, REFGEN_REG_BIAS_EN, + FIELD_PREP(REFGEN_BIAS_EN_MASK, REFGEN_BIAS_EN_ENABLE)); + + return 0; +} + +static int qcom_sdm845_refgen_disable(struct regulator_dev *rdev) +{ + regmap_write(rdev->regmap, REFGEN_REG_BIAS_EN, + FIELD_PREP(REFGEN_BIAS_EN_MASK, REFGEN_BIAS_EN_DISABLE)); + + regmap_update_bits(rdev->regmap, REFGEN_REG_BG_CTRL, REFGEN_BG_CTRL_MASK, + FIELD_PREP(REFGEN_BG_CTRL_MASK, REFGEN_BG_CTRL_DISABLE)); + + return 0; +} + +static int qcom_sdm845_refgen_is_enabled(struct regulator_dev *rdev) +{ + u32 val; + + regmap_read(rdev->regmap, REFGEN_REG_BG_CTRL, &val); + if (FIELD_GET(REFGEN_BG_CTRL_MASK, val) != REFGEN_BG_CTRL_ENABLE) + return 0; + + regmap_read(rdev->regmap, REFGEN_REG_BIAS_EN, &val); + if (FIELD_GET(REFGEN_BIAS_EN_MASK, val) != REFGEN_BIAS_EN_ENABLE) + return 0; + + return 1; +} + +static struct regulator_desc sdm845_refgen_desc = { + .enable_time = 5, + .name = "refgen", + .owner = THIS_MODULE, + .type = REGULATOR_VOLTAGE, + .ops = &(const struct regulator_ops) { + .enable = qcom_sdm845_refgen_enable, + .disable = qcom_sdm845_refgen_disable, + .is_enabled = qcom_sdm845_refgen_is_enabled, + }, +}; + +static struct regulator_desc sm8250_refgen_desc = { + .enable_reg = REFGEN_REG_PWRDWN_CTRL5, + .enable_mask = REFGEN_PWRDWN_CTRL5_MASK, + .enable_val = REFGEN_PWRDWN_CTRL5_ENABLE, + .disable_val = 0, + .enable_time = 5, + .name = "refgen", + .owner = THIS_MODULE, + .type = REGULATOR_VOLTAGE, + .ops = &(const struct regulator_ops) { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + }, +}; + +static const struct regmap_config qcom_refgen_regmap_config = { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, + .fast_io = true, +}; + +static int qcom_refgen_probe(struct platform_device *pdev) +{ + struct regulator_init_data *init_data; + struct regulator_config config = {}; + const struct regulator_desc *rdesc; + struct device *dev = &pdev->dev; + struct regulator_dev *rdev; + struct regmap *regmap; + void __iomem *base; + + rdesc = of_device_get_match_data(dev); + if (!rdesc) + return -ENODATA; + + base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(base)) + return PTR_ERR(base); + + regmap = devm_regmap_init_mmio(dev, base, &qcom_refgen_regmap_config); + if (IS_ERR(regmap)) + return PTR_ERR(regmap); + + init_data = of_get_regulator_init_data(dev, dev->of_node, rdesc); + if (!init_data) + return -ENOMEM; + + config.dev = dev; + config.init_data = init_data; + config.of_node = dev->of_node; + config.regmap = regmap; + + rdev = devm_regulator_register(dev, rdesc, &config); + if (IS_ERR(rdev)) + return PTR_ERR(rdev); + + return 0; +} + +static const struct of_device_id qcom_refgen_match_table[] = { + { .compatible = "qcom,sdm845-refgen-regulator", .data = &sdm845_refgen_desc }, + { .compatible = "qcom,sm8250-refgen-regulator", .data = &sm8250_refgen_desc }, + { } +}; + +static struct platform_driver qcom_refgen_driver = { + .probe = qcom_refgen_probe, + .driver = { + .name = "qcom-refgen-regulator", + .of_match_table = qcom_refgen_match_table, + }, +}; +module_platform_driver(qcom_refgen_driver); + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("Qualcomm REFGEN regulator driver"); From 8978af5ef662541bc0a5a7722ad6942cd19daed0 Mon Sep 17 00:00:00 2001 From: ChiYuan Huang Date: Thu, 29 Jun 2023 22:29:55 +0800 Subject: [PATCH 006/656] regulator: dt-bindings: rt5739: Add compatible for rt5733 Add compatible string for rt5733. Signed-off-by: ChiYuan Huang Acked-by: Rob Herring Link: https://lore.kernel.org/r/1688048996-25606-2-git-send-email-cy_huang@richtek.com Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/regulator/richtek,rt5739.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/regulator/richtek,rt5739.yaml b/Documentation/devicetree/bindings/regulator/richtek,rt5739.yaml index 358297dd3fb7..e95e046e9ed6 100644 --- a/Documentation/devicetree/bindings/regulator/richtek,rt5739.yaml +++ b/Documentation/devicetree/bindings/regulator/richtek,rt5739.yaml @@ -21,6 +21,7 @@ allOf: properties: compatible: enum: + - richtek,rt5733 - richtek,rt5739 reg: From 6f5e285839845729858b8f6ca7cf3dd35e1f9a29 Mon Sep 17 00:00:00 2001 From: ChiYuan Huang Date: Thu, 29 Jun 2023 22:29:56 +0800 Subject: [PATCH 007/656] regulator: rt5739: Add DID check and compatible for rt5733 Add compatible and use DID to check rt5733. The only difference bwtween rt5733 and rt5739 is the output range and voltage step. These two chips can be distinguished from the DIE id. Signed-off-by: ChiYuan Huang Link: https://lore.kernel.org/r/1688048996-25606-3-git-send-email-cy_huang@richtek.com Signed-off-by: Mark Brown --- drivers/regulator/rt5739.c | 36 +++++++++++++++++++++++++++++------- 1 file changed, 29 insertions(+), 7 deletions(-) diff --git a/drivers/regulator/rt5739.c b/drivers/regulator/rt5739.c index 0ce6a1666752..91412c905ce6 100644 --- a/drivers/regulator/rt5739.c +++ b/drivers/regulator/rt5739.c @@ -31,10 +31,17 @@ #define RT5739_MODEVSEL1_MASK BIT(1) #define RT5739_MODEVSEL0_MASK BIT(0) #define RT5739_VID_MASK GENMASK(7, 5) +#define RT5739_DID_MASK GENMASK(3, 0) #define RT5739_ACTD_MASK BIT(7) #define RT5739_ENVSEL1_MASK BIT(1) #define RT5739_ENVSEL0_MASK BIT(0) +#define RT5733_CHIPDIE_ID 0x1 +#define RT5733_VOLT_MINUV 270000 +#define RT5733_VOLT_MAXUV 1401250 +#define RT5733_VOLT_STPUV 6250 +#define RT5733_N_VOLTS 182 + #define RT5739_VOLT_MINUV 300000 #define RT5739_VOLT_MAXUV 1300000 #define RT5739_VOLT_STPUV 5000 @@ -93,8 +100,11 @@ static int rt5739_set_suspend_voltage(struct regulator_dev *rdev, int uV) const struct regulator_desc *desc = rdev->desc; struct regmap *regmap = rdev_get_regmap(rdev); unsigned int reg, vsel; + int max_uV; - if (uV < RT5739_VOLT_MINUV || uV > RT5739_VOLT_MAXUV) + max_uV = desc->min_uV + desc->uV_step * (desc->n_voltages - 1); + + if (uV < desc->min_uV || uV > max_uV) return -EINVAL; if (desc->vsel_reg == RT5739_REG_NSEL0) @@ -102,7 +112,7 @@ static int rt5739_set_suspend_voltage(struct regulator_dev *rdev, int uV) else reg = RT5739_REG_NSEL0; - vsel = (uV - RT5739_VOLT_MINUV) / RT5739_VOLT_STPUV; + vsel = (uV - desc->min_uV) / desc->uV_step; return regmap_write(regmap, reg, vsel); } @@ -189,15 +199,12 @@ static unsigned int rt5739_of_map_mode(unsigned int mode) } static void rt5739_init_regulator_desc(struct regulator_desc *desc, - bool vsel_active_high) + bool vsel_active_high, u8 did) { /* Fixed */ desc->name = "rt5739-regulator"; desc->owner = THIS_MODULE; desc->ops = &rt5739_regulator_ops; - desc->n_voltages = RT5739_N_VOLTS; - desc->min_uV = RT5739_VOLT_MINUV; - desc->uV_step = RT5739_VOLT_STPUV; desc->vsel_mask = RT5739_VSEL_MASK; desc->enable_reg = RT5739_REG_CNTL2; desc->active_discharge_reg = RT5739_REG_CNTL1; @@ -213,6 +220,20 @@ static void rt5739_init_regulator_desc(struct regulator_desc *desc, desc->vsel_reg = RT5739_REG_NSEL0; desc->enable_mask = RT5739_ENVSEL0_MASK; } + + /* Assigned by CHIPDIE ID */ + switch (did) { + case RT5733_CHIPDIE_ID: + desc->n_voltages = RT5733_N_VOLTS; + desc->min_uV = RT5733_VOLT_MINUV; + desc->uV_step = RT5733_VOLT_STPUV; + break; + default: + desc->n_voltages = RT5739_N_VOLTS; + desc->min_uV = RT5739_VOLT_MINUV; + desc->uV_step = RT5739_VOLT_STPUV; + break; + } } static const struct regmap_config rt5739_regmap_config = { @@ -258,7 +279,7 @@ static int rt5739_probe(struct i2c_client *i2c) vsel_acth = device_property_read_bool(dev, "richtek,vsel-active-high"); - rt5739_init_regulator_desc(desc, vsel_acth); + rt5739_init_regulator_desc(desc, vsel_acth, vid & RT5739_DID_MASK); cfg.dev = dev; cfg.of_node = dev_of_node(dev); @@ -271,6 +292,7 @@ static int rt5739_probe(struct i2c_client *i2c) } static const struct of_device_id rt5739_device_table[] = { + { .compatible = "richtek,rt5733" }, { .compatible = "richtek,rt5739" }, { /* sentinel */ } }; From 42a95739c5bc4d7a6e93a43117e9283598ba2287 Mon Sep 17 00:00:00 2001 From: Biju Das Date: Thu, 29 Jun 2023 11:42:00 +0100 Subject: [PATCH 008/656] regulator: raa215300: Change the scope of the variables {clkin_name, xin_name} Change the scope of the variables {clkin_name, xin_name} from global->local to fix the below warning. drivers/regulator/raa215300.c:42:12: sparse: sparse: symbol 'xin_name' was not declared. Should it be static? Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202306250552.Fan9WTiN-lkp@intel.com/ Signed-off-by: Biju Das Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20230629104200.102663-1-biju.das.jz@bp.renesas.com Signed-off-by: Mark Brown --- drivers/regulator/raa215300.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/regulator/raa215300.c b/drivers/regulator/raa215300.c index 24a1c89f5dbc..8e1a4c86b978 100644 --- a/drivers/regulator/raa215300.c +++ b/drivers/regulator/raa215300.c @@ -38,8 +38,6 @@ #define RAA215300_REG_BLOCK_EN_RTC_EN BIT(6) #define RAA215300_RTC_DEFAULT_ADDR 0x6f -const char *clkin_name = "clkin"; -const char *xin_name = "xin"; static struct clk *clk; static const struct regmap_config raa215300_regmap_config = { @@ -71,8 +69,10 @@ static int raa215300_clk_present(struct i2c_client *client, const char *name) static int raa215300_i2c_probe(struct i2c_client *client) { struct device *dev = &client->dev; - const char *clk_name = xin_name; + const char *clkin_name = "clkin"; unsigned int pmic_version, val; + const char *xin_name = "xin"; + const char *clk_name = NULL; struct regmap *regmap; int ret; @@ -114,15 +114,17 @@ static int raa215300_i2c_probe(struct i2c_client *client) ret = raa215300_clk_present(client, xin_name); if (ret < 0) { return ret; - } else if (!ret) { + } else if (ret) { + clk_name = xin_name; + } else { ret = raa215300_clk_present(client, clkin_name); if (ret < 0) return ret; - - clk_name = clkin_name; + if (ret) + clk_name = clkin_name; } - if (ret) { + if (clk_name) { char *name = pmic_version >= 0x12 ? "isl1208" : "raa215300_a0"; struct device_node *np = client->dev.of_node; u32 addr = RAA215300_RTC_DEFAULT_ADDR; From 741da3f60479acc0de3d79501c4819e49fa28639 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Mon, 26 Jun 2023 11:15:44 +0200 Subject: [PATCH 009/656] regulator: raa215300: Switch back to use struct i2c_driver::probe MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit struct i2c_driver::probe_new is about to go away. Switch the driver to use the probe callback with the same prototype. Signed-off-by: Uwe Kleine-König Link: https://lore.kernel.org/r/20230626091544.557403-1-u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown --- drivers/regulator/raa215300.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/regulator/raa215300.c b/drivers/regulator/raa215300.c index 8e1a4c86b978..848a03a2fbd4 100644 --- a/drivers/regulator/raa215300.c +++ b/drivers/regulator/raa215300.c @@ -182,7 +182,7 @@ static struct i2c_driver raa215300_i2c_driver = { .name = "raa215300", .of_match_table = raa215300_dt_match, }, - .probe_new = raa215300_i2c_probe, + .probe = raa215300_i2c_probe, }; module_i2c_driver(raa215300_i2c_driver); From 0605d9fb411f3337482976842a3901d6c125d298 Mon Sep 17 00:00:00 2001 From: Maksim Kiselev Date: Sat, 24 Jun 2023 16:16:22 +0300 Subject: [PATCH 010/656] spi: sun6i: add quirk for dual and quad SPI modes support New Allwinner's SPI controllers can support dual and quad SPI modes. To enable one of these modes, we should set the corresponding bit in the SUN6I_BURST_CTL_CNT_REG register. DRM (28 bits) for dual mode and Quad_EN (29 bits) for quad transmission. Signed-off-by: Maksim Kiselev Link: https://lore.kernel.org/r/20230624131632.2972546-2-bigunclemax@gmail.com Signed-off-by: Mark Brown --- drivers/spi/spi-sun6i.c | 29 +++++++++++++++++++++++++---- 1 file changed, 25 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-sun6i.c b/drivers/spi/spi-sun6i.c index 30d541612253..cec2747235ab 100644 --- a/drivers/spi/spi-sun6i.c +++ b/drivers/spi/spi-sun6i.c @@ -83,6 +83,9 @@ #define SUN6I_XMIT_CNT_REG 0x34 #define SUN6I_BURST_CTL_CNT_REG 0x38 +#define SUN6I_BURST_CTL_CNT_STC_MASK GENMASK(23, 0) +#define SUN6I_BURST_CTL_CNT_DRM BIT(28) +#define SUN6I_BURST_CTL_CNT_QUAD_EN BIT(29) #define SUN6I_TXDATA_REG 0x200 #define SUN6I_RXDATA_REG 0x300 @@ -90,6 +93,7 @@ struct sun6i_spi_cfg { unsigned long fifo_depth; bool has_clk_ctl; + u32 mode_bits; }; struct sun6i_spi { @@ -266,7 +270,7 @@ static int sun6i_spi_transfer_one(struct spi_master *master, unsigned int div, div_cdr1, div_cdr2, timeout; unsigned int start, end, tx_time; unsigned int trig_level; - unsigned int tx_len = 0, rx_len = 0; + unsigned int tx_len = 0, rx_len = 0, nbits = 0; bool use_dma; int ret = 0; u32 reg; @@ -418,13 +422,29 @@ static int sun6i_spi_transfer_one(struct spi_master *master, sun6i_spi_write(sspi, SUN6I_GBL_CTL_REG, reg); /* Setup the transfer now... */ - if (sspi->tx_buf) + if (sspi->tx_buf) { tx_len = tfr->len; + nbits = tfr->tx_nbits; + } else if (tfr->rx_buf) { + nbits = tfr->rx_nbits; + } + + switch (nbits) { + case SPI_NBITS_DUAL: + reg = SUN6I_BURST_CTL_CNT_DRM; + break; + case SPI_NBITS_QUAD: + reg = SUN6I_BURST_CTL_CNT_QUAD_EN; + break; + case SPI_NBITS_SINGLE: + default: + reg = FIELD_PREP(SUN6I_BURST_CTL_CNT_STC_MASK, tx_len); + } /* Setup the counters */ + sun6i_spi_write(sspi, SUN6I_BURST_CTL_CNT_REG, reg); sun6i_spi_write(sspi, SUN6I_BURST_CNT_REG, tfr->len); sun6i_spi_write(sspi, SUN6I_XMIT_CNT_REG, tx_len); - sun6i_spi_write(sspi, SUN6I_BURST_CTL_CNT_REG, tx_len); if (!use_dma) { /* Fill the TX FIFO */ @@ -623,7 +643,8 @@ static int sun6i_spi_probe(struct platform_device *pdev) master->set_cs = sun6i_spi_set_cs; master->transfer_one = sun6i_spi_transfer_one; master->num_chipselect = 4; - master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST; + master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST | + sspi->cfg->mode_bits; master->bits_per_word_mask = SPI_BPW_MASK(8); master->dev.of_node = pdev->dev.of_node; master->auto_runtime_pm = true; From 25453d797d7abe8801951c8290ea11ea8bba7b96 Mon Sep 17 00:00:00 2001 From: Maksim Kiselev Date: Sat, 24 Jun 2023 16:16:23 +0300 Subject: [PATCH 011/656] spi: sun6i: add dual and quad SPI modes support for R329/D1/R528/T113s Listed SoCs have SPI controllers that can operate in dual or quad modes. This patch adds dual/quad mode bits for spi_master on these SoCS. Signed-off-by: Maksim Kiselev Link: https://lore.kernel.org/r/20230624131632.2972546-3-bigunclemax@gmail.com Signed-off-by: Mark Brown --- drivers/spi/spi-sun6i.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/spi/spi-sun6i.c b/drivers/spi/spi-sun6i.c index cec2747235ab..e9144d76bcdb 100644 --- a/drivers/spi/spi-sun6i.c +++ b/drivers/spi/spi-sun6i.c @@ -761,6 +761,7 @@ static const struct sun6i_spi_cfg sun8i_h3_spi_cfg = { static const struct sun6i_spi_cfg sun50i_r329_spi_cfg = { .fifo_depth = SUN8I_FIFO_DEPTH, + .mode_bits = SPI_RX_DUAL | SPI_TX_DUAL | SPI_RX_QUAD | SPI_TX_QUAD, }; static const struct of_device_id sun6i_spi_match[] = { From 68a199640d28ecd507bc53bccb5cd98f5330fafc Mon Sep 17 00:00:00 2001 From: Martin Kurbanov Date: Thu, 6 Jul 2023 14:03:30 +0300 Subject: [PATCH 012/656] spi: amlogic-spifc-a1: implement adjust_op_size() This enhancement eliminates the need for a loop in the amlogic_spifc_a1_exec_op() function and allows the SPI core to dynamically divide transactions into appropriately sized chunks. Signed-off-by: Martin Kurbanov Reviewed-by: Neil Armstrong Link: https://lore.kernel.org/r/20230706110331.19794-2-mmkurbanov@sberdevices.ru Signed-off-by: Mark Brown --- drivers/spi/spi-amlogic-spifc-a1.c | 66 +++++++++++------------------- 1 file changed, 25 insertions(+), 41 deletions(-) diff --git a/drivers/spi/spi-amlogic-spifc-a1.c b/drivers/spi/spi-amlogic-spifc-a1.c index 3c4224c38399..a92e4fc23396 100644 --- a/drivers/spi/spi-amlogic-spifc-a1.c +++ b/drivers/spi/spi-amlogic-spifc-a1.c @@ -72,7 +72,7 @@ #define SPIFC_A1_USER_DBUF_ADDR_REG 0x248 -#define SPIFC_A1_BUFFER_SIZE 512 +#define SPIFC_A1_BUFFER_SIZE 512U #define SPIFC_A1_MAX_HZ 200000000 #define SPIFC_A1_MIN_HZ 1000000 @@ -240,61 +240,44 @@ static int amlogic_spifc_a1_exec_op(struct spi_mem *mem, { struct amlogic_spifc_a1 *spifc = spi_controller_get_devdata(mem->spi->controller); - size_t off, nbytes = op->data.nbytes; - u32 cmd_cfg, addr_cfg, dummy_cfg, dmode; + size_t data_size = op->data.nbytes; int ret; amlogic_spifc_a1_user_init(spifc); + amlogic_spifc_a1_set_cmd(spifc, SPIFC_A1_USER_CMD(op)); - cmd_cfg = SPIFC_A1_USER_CMD(op); - amlogic_spifc_a1_set_cmd(spifc, cmd_cfg); + if (op->addr.nbytes) + amlogic_spifc_a1_set_addr(spifc, op->addr.val, + SPIFC_A1_USER_ADDR(op)); - if (op->addr.nbytes) { - addr_cfg = SPIFC_A1_USER_ADDR(op); - amlogic_spifc_a1_set_addr(spifc, op->addr.val, addr_cfg); - } + if (op->dummy.nbytes) + amlogic_spifc_a1_set_dummy(spifc, SPIFC_A1_USER_DUMMY(op)); - if (op->dummy.nbytes) { - dummy_cfg = SPIFC_A1_USER_DUMMY(op); - amlogic_spifc_a1_set_dummy(spifc, dummy_cfg); - } - - if (!op->data.nbytes) - return amlogic_spifc_a1_request(spifc, false); - - dmode = ilog2(op->data.buswidth); - off = 0; - - do { - size_t block_size = min_t(size_t, nbytes, SPIFC_A1_BUFFER_SIZE); - - amlogic_spifc_a1_set_cmd(spifc, cmd_cfg); - - if (op->addr.nbytes) - amlogic_spifc_a1_set_addr(spifc, op->addr.val + off, - addr_cfg); - - if (op->dummy.nbytes) - amlogic_spifc_a1_set_dummy(spifc, dummy_cfg); + if (data_size) { + u32 mode = ilog2(op->data.buswidth); writel(0, spifc->base + SPIFC_A1_USER_DBUF_ADDR_REG); if (op->data.dir == SPI_MEM_DATA_IN) - ret = amlogic_spifc_a1_read(spifc, - op->data.buf.in + off, - block_size, dmode); + ret = amlogic_spifc_a1_read(spifc, op->data.buf.in, + data_size, mode); else - ret = amlogic_spifc_a1_write(spifc, - op->data.buf.out + off, - block_size, dmode); - - nbytes -= block_size; - off += block_size; - } while (nbytes != 0 && !ret); + ret = amlogic_spifc_a1_write(spifc, op->data.buf.out, + data_size, mode); + } else { + ret = amlogic_spifc_a1_request(spifc, false); + } return ret; } +static int amlogic_spifc_a1_adjust_op_size(struct spi_mem *mem, + struct spi_mem_op *op) +{ + op->data.nbytes = min(op->data.nbytes, SPIFC_A1_BUFFER_SIZE); + return 0; +} + static void amlogic_spifc_a1_hw_init(struct amlogic_spifc_a1 *spifc) { u32 regv; @@ -314,6 +297,7 @@ static void amlogic_spifc_a1_hw_init(struct amlogic_spifc_a1 *spifc) static const struct spi_controller_mem_ops amlogic_spifc_a1_mem_ops = { .exec_op = amlogic_spifc_a1_exec_op, + .adjust_op_size = amlogic_spifc_a1_adjust_op_size, }; static int amlogic_spifc_a1_probe(struct platform_device *pdev) From 8d4d4c6813fea356ef79f182d8f4d82793c8f64b Mon Sep 17 00:00:00 2001 From: Martin Kurbanov Date: Thu, 6 Jul 2023 14:03:31 +0300 Subject: [PATCH 013/656] spi: amlogic-spifc-a1: add support for max_speed_hz This patch sets the clock rate (spi_transfer->max_speed_hz) from the amlogic_spifc_a1_exec_op(). Signed-off-by: Martin Kurbanov Reviewed-by: Neil Armstrong Link: https://lore.kernel.org/r/20230706110331.19794-3-mmkurbanov@sberdevices.ru Signed-off-by: Mark Brown --- drivers/spi/spi-amlogic-spifc-a1.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/spi/spi-amlogic-spifc-a1.c b/drivers/spi/spi-amlogic-spifc-a1.c index a92e4fc23396..605e9e40455c 100644 --- a/drivers/spi/spi-amlogic-spifc-a1.c +++ b/drivers/spi/spi-amlogic-spifc-a1.c @@ -107,6 +107,7 @@ struct amlogic_spifc_a1 { struct clk *clk; struct device *dev; void __iomem *base; + u32 curr_speed_hz; }; static int amlogic_spifc_a1_request(struct amlogic_spifc_a1 *spifc, bool read) @@ -235,6 +236,21 @@ static int amlogic_spifc_a1_write(struct amlogic_spifc_a1 *spifc, return amlogic_spifc_a1_request(spifc, false); } +static int amlogic_spifc_a1_set_freq(struct amlogic_spifc_a1 *spifc, u32 freq) +{ + int ret; + + if (freq == spifc->curr_speed_hz) + return 0; + + ret = clk_set_rate(spifc->clk, freq); + if (ret) + return ret; + + spifc->curr_speed_hz = freq; + return 0; +} + static int amlogic_spifc_a1_exec_op(struct spi_mem *mem, const struct spi_mem_op *op) { @@ -243,6 +259,10 @@ static int amlogic_spifc_a1_exec_op(struct spi_mem *mem, size_t data_size = op->data.nbytes; int ret; + ret = amlogic_spifc_a1_set_freq(spifc, mem->spi->max_speed_hz); + if (ret) + return ret; + amlogic_spifc_a1_user_init(spifc); amlogic_spifc_a1_set_cmd(spifc, SPIFC_A1_USER_CMD(op)); From fee681646fc831b154619ac0261afedcc7e671e7 Mon Sep 17 00:00:00 2001 From: Valentin Caron Date: Thu, 6 Jul 2023 10:13:42 +0200 Subject: [PATCH 014/656] spi: stm32: disable device mode with st,stm32f4-spi compatible STM32 SPI driver is not capable to handle device mode with stm32f4 soc. Stop probing if this case happens. Signed-off-by: Valentin Caron Link: https://lore.kernel.org/r/20230706081342.468090-1-valentin.caron@foss.st.com Signed-off-by: Mark Brown --- drivers/spi/spi-stm32.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/drivers/spi/spi-stm32.c b/drivers/spi/spi-stm32.c index 6d10fa4ab783..536d89e044cf 100644 --- a/drivers/spi/spi-stm32.c +++ b/drivers/spi/spi-stm32.c @@ -238,6 +238,7 @@ struct stm32_spi; * @baud_rate_div_min: minimum baud rate divisor * @baud_rate_div_max: maximum baud rate divisor * @has_fifo: boolean to know if fifo is used for driver + * @has_device_mode: is this compatible capable to switch on device mode * @flags: compatible specific SPI controller flags used at registration time */ struct stm32_spi_cfg { @@ -259,6 +260,7 @@ struct stm32_spi_cfg { unsigned int baud_rate_div_min; unsigned int baud_rate_div_max; bool has_fifo; + bool has_device_mode; u16 flags; }; @@ -1750,6 +1752,7 @@ static const struct stm32_spi_cfg stm32f4_spi_cfg = { .baud_rate_div_min = STM32F4_SPI_BR_DIV_MIN, .baud_rate_div_max = STM32F4_SPI_BR_DIV_MAX, .has_fifo = false, + .has_device_mode = false, .flags = SPI_MASTER_MUST_TX, }; @@ -1774,6 +1777,7 @@ static const struct stm32_spi_cfg stm32h7_spi_cfg = { .baud_rate_div_min = STM32H7_SPI_MBR_DIV_MIN, .baud_rate_div_max = STM32H7_SPI_MBR_DIV_MAX, .has_fifo = true, + .has_device_mode = true, }; static const struct of_device_id stm32_spi_of_match[] = { @@ -1798,8 +1802,13 @@ static int stm32_spi_probe(struct platform_device *pdev) struct device_node *np = pdev->dev.of_node; bool device_mode; int ret; + const struct stm32_spi_cfg *cfg = of_device_get_match_data(&pdev->dev); device_mode = of_property_read_bool(np, "spi-slave"); + if (!cfg->has_device_mode && device_mode) { + dev_err(&pdev->dev, "spi-slave not supported\n"); + return -EPERM; + } if (device_mode) ctrl = devm_spi_alloc_slave(&pdev->dev, sizeof(struct stm32_spi)); @@ -1817,9 +1826,7 @@ static int stm32_spi_probe(struct platform_device *pdev) spi->device_mode = device_mode; spin_lock_init(&spi->lock); - spi->cfg = (const struct stm32_spi_cfg *) - of_match_device(pdev->dev.driver->of_match_table, - &pdev->dev)->data; + spi->cfg = cfg; spi->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(spi->base)) From 15a6af94a2779d5dfb42ee4bfac858ea8e964a3f Mon Sep 17 00:00:00 2001 From: Stefan Moring Date: Wed, 28 Jun 2023 14:54:06 +0200 Subject: [PATCH 015/656] spi: Increase imx51 ecspi burst length based on transfer length IMX51 supports 4096 bit burst lengths. Using the spi transfer length instead of bits_per_word increases performance significantly. Signed-off-by: Stefan Moring Link: https://lore.kernel.org/r/20230628125406.237949-1-stefan.moring@technolution.nl Signed-off-by: Mark Brown --- drivers/spi/spi-imx.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c index 528ae46c087f..169d158b6f00 100644 --- a/drivers/spi/spi-imx.c +++ b/drivers/spi/spi-imx.c @@ -659,9 +659,13 @@ static int mx51_ecspi_prepare_transfer(struct spi_imx_data *spi_imx, if (spi_imx->slave_mode && is_imx53_ecspi(spi_imx)) ctrl |= (spi_imx->slave_burst * 8 - 1) << MX51_ECSPI_CTRL_BL_OFFSET; - else - ctrl |= (spi_imx->bits_per_word - 1) - << MX51_ECSPI_CTRL_BL_OFFSET; + else { + if (spi_imx->count >= 512) + ctrl |= 0xFFF << MX51_ECSPI_CTRL_BL_OFFSET; + else + ctrl |= (spi_imx->count*8 - 1) + << MX51_ECSPI_CTRL_BL_OFFSET; + } /* set clock speed */ ctrl &= ~(0xf << MX51_ECSPI_CTRL_POSTDIV_OFFSET | @@ -1258,6 +1262,7 @@ static int spi_imx_setupxfer(struct spi_device *spi, spi_imx->spi_bus_clk = t->speed_hz; spi_imx->bits_per_word = t->bits_per_word; + spi_imx->count = t->len; /* * Initialize the functions for transfer. To transfer non byte-aligned From 9303331461cb63a61e598655106a088c953e5660 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Fri, 7 Jul 2023 09:11:19 +0200 Subject: [PATCH 016/656] spi: rzv2m-csi: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is ignored (apart from emitting a warning) and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Eventually after all drivers are converted, .remove_new() is renamed to .remove(). Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Signed-off-by: Uwe Kleine-König Link: https://lore.kernel.org/r/20230707071119.3394198-1-u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown --- drivers/spi/spi-rzv2m-csi.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-rzv2m-csi.c b/drivers/spi/spi-rzv2m-csi.c index 14ad65da930d..c0d9a776770f 100644 --- a/drivers/spi/spi-rzv2m-csi.c +++ b/drivers/spi/spi-rzv2m-csi.c @@ -635,15 +635,13 @@ static int rzv2m_csi_probe(struct platform_device *pdev) return 0; } -static int rzv2m_csi_remove(struct platform_device *pdev) +static void rzv2m_csi_remove(struct platform_device *pdev) { struct rzv2m_csi_priv *csi = platform_get_drvdata(pdev); spi_unregister_controller(csi->controller); rzv2m_csi_sw_reset(csi, 1); clk_disable_unprepare(csi->csiclk); - - return 0; } static const struct of_device_id rzv2m_csi_match[] = { @@ -654,7 +652,7 @@ MODULE_DEVICE_TABLE(of, rzv2m_csi_match); static struct platform_driver rzv2m_csi_drv = { .probe = rzv2m_csi_probe, - .remove = rzv2m_csi_remove, + .remove_new = rzv2m_csi_remove, .driver = { .name = "rzv2m_csi", .of_match_table = rzv2m_csi_match, From 616a733ccaee2412cd8def29f6f106e22c3cfabb Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 6 Jul 2023 11:27:20 +0800 Subject: [PATCH 017/656] spi: atmel: Use devm_platform_get_and_ioremap_resource() Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Yangtao Li Link: https://lore.kernel.org/r/20230706032727.9180-1-frank.li@vivo.com Signed-off-by: Mark Brown --- drivers/spi/spi-atmel.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c index 152cd6773403..8a9c8b92be8c 100644 --- a/drivers/spi/spi-atmel.c +++ b/drivers/spi/spi-atmel.c @@ -1450,10 +1450,6 @@ static int atmel_spi_probe(struct platform_device *pdev) /* Select default pin state */ pinctrl_pm_select_default_state(&pdev->dev); - regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!regs) - return -ENXIO; - irq = platform_get_irq(pdev, 0); if (irq < 0) return irq; @@ -1490,7 +1486,7 @@ static int atmel_spi_probe(struct platform_device *pdev) spin_lock_init(&as->lock); as->pdev = pdev; - as->regs = devm_ioremap_resource(&pdev->dev, regs); + as->regs = devm_platform_get_and_ioremap_resource(pdev, 0, ®s); if (IS_ERR(as->regs)) { ret = PTR_ERR(as->regs); goto out_unmap_regs; From 2ae3c98b6e80f5b99afd9eafbdfab5146330dae5 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 6 Jul 2023 11:27:21 +0800 Subject: [PATCH 018/656] spi: davinci: Use devm_platform_get_and_ioremap_resource() Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Yangtao Li Link: https://lore.kernel.org/r/20230706032727.9180-2-frank.li@vivo.com Signed-off-by: Mark Brown --- drivers/spi/spi-davinci.c | 13 ++----------- 1 file changed, 2 insertions(+), 11 deletions(-) diff --git a/drivers/spi/spi-davinci.c b/drivers/spi/spi-davinci.c index b04811c911e2..a85fd0cb4a5e 100644 --- a/drivers/spi/spi-davinci.c +++ b/drivers/spi/spi-davinci.c @@ -895,25 +895,16 @@ static int davinci_spi_probe(struct platform_device *pdev) goto free_master; } - r = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (r == NULL) { - ret = -ENOENT; - goto free_master; - } - - dspi->pbase = r->start; - - dspi->base = devm_ioremap_resource(&pdev->dev, r); + dspi->base = devm_platform_get_and_ioremap_resource(pdev, 0, &r); if (IS_ERR(dspi->base)) { ret = PTR_ERR(dspi->base); goto free_master; } + dspi->pbase = r->start; init_completion(&dspi->done); ret = platform_get_irq(pdev, 0); - if (ret == 0) - ret = -EINVAL; if (ret < 0) goto free_master; dspi->irq = ret; From cb8ea3dd55acd191f80847488d2231a1d18ab1ed Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 6 Jul 2023 11:27:22 +0800 Subject: [PATCH 019/656] spi: ep93xx: Use devm_platform_get_and_ioremap_resource() Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Yangtao Li Link: https://lore.kernel.org/r/20230706032727.9180-3-frank.li@vivo.com Signed-off-by: Mark Brown --- drivers/spi/spi-ep93xx.c | 13 +++---------- 1 file changed, 3 insertions(+), 10 deletions(-) diff --git a/drivers/spi/spi-ep93xx.c b/drivers/spi/spi-ep93xx.c index 1615fd22f9a2..3693b3d425c7 100644 --- a/drivers/spi/spi-ep93xx.c +++ b/drivers/spi/spi-ep93xx.c @@ -661,13 +661,7 @@ static int ep93xx_spi_probe(struct platform_device *pdev) irq = platform_get_irq(pdev, 0); if (irq < 0) - return -EBUSY; - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) { - dev_err(&pdev->dev, "unable to get iomem resource\n"); - return -ENODEV; - } + return irq; master = spi_alloc_master(&pdev->dev, sizeof(*espi)); if (!master) @@ -705,13 +699,12 @@ static int ep93xx_spi_probe(struct platform_device *pdev) master->max_speed_hz = clk_get_rate(espi->clk) / 2; master->min_speed_hz = clk_get_rate(espi->clk) / (254 * 256); - espi->sspdr_phys = res->start + SSPDR; - - espi->mmio = devm_ioremap_resource(&pdev->dev, res); + espi->mmio = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(espi->mmio)) { error = PTR_ERR(espi->mmio); goto fail_release_master; } + espi->sspdr_phys = res->start + SSPDR; error = devm_request_irq(&pdev->dev, irq, ep93xx_spi_interrupt, 0, "ep93xx-spi", master); From 8c8e947b6be037d0a311f11688212c7d87aa5440 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 6 Jul 2023 11:27:23 +0800 Subject: [PATCH 020/656] spi: spi-nxp-fspi: Convert to devm_platform_ioremap_resource() and devm_platform_ioremap_resource_byname() Use devm_platform_ioremap_resource() and devm_platform_ioremap_resource_byname() to simplify code. Signed-off-by: Yangtao Li Reviewed-by: Haibo Chen Link: https://lore.kernel.org/r/20230706032727.9180-4-frank.li@vivo.com Signed-off-by: Mark Brown --- drivers/spi/spi-nxp-fspi.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-nxp-fspi.c b/drivers/spi/spi-nxp-fspi.c index 544017655787..4cf9b3bf7b57 100644 --- a/drivers/spi/spi-nxp-fspi.c +++ b/drivers/spi/spi-nxp-fspi.c @@ -1157,12 +1157,10 @@ static int nxp_fspi_probe(struct platform_device *pdev) /* find the resources - configuration register address space */ if (is_acpi_node(dev_fwnode(f->dev))) - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + f->iobase = devm_platform_ioremap_resource(pdev, 0); else - res = platform_get_resource_byname(pdev, - IORESOURCE_MEM, "fspi_base"); + f->iobase = devm_platform_ioremap_resource_byname(pdev, "fspi_base"); - f->iobase = devm_ioremap_resource(dev, res); if (IS_ERR(f->iobase)) { ret = PTR_ERR(f->iobase); goto err_put_ctrl; From b778d967979d7ed638fe1de8c2465ff33ace47d8 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 6 Jul 2023 11:27:24 +0800 Subject: [PATCH 021/656] spi: rspi: Use devm_platform_get_and_ioremap_resource() Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Yangtao Li Link: https://lore.kernel.org/r/20230706032727.9180-5-frank.li@vivo.com Signed-off-by: Mark Brown --- drivers/spi/spi-rspi.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c index 08ceebbaf69b..9312a9d58a1b 100644 --- a/drivers/spi/spi-rspi.c +++ b/drivers/spi/spi-rspi.c @@ -1317,8 +1317,7 @@ static int rspi_probe(struct platform_device *pdev) rspi->ops = ops; rspi->ctlr = ctlr; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - rspi->addr = devm_ioremap_resource(&pdev->dev, res); + rspi->addr = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(rspi->addr)) { ret = PTR_ERR(rspi->addr); goto error1; From 2e4ed2577936476e0e9bb9a07158e94effb86285 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 6 Jul 2023 11:27:25 +0800 Subject: [PATCH 022/656] spi: tegra20-slink: Use devm_platform_get_and_ioremap_resource() Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Yangtao Li Acked-by: Thierry Reding Link: https://lore.kernel.org/r/20230706032727.9180-6-frank.li@vivo.com Signed-off-by: Mark Brown --- drivers/spi/spi-tegra20-slink.c | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/drivers/spi/spi-tegra20-slink.c b/drivers/spi/spi-tegra20-slink.c index c2915f7672cc..8cfd9e4f60b5 100644 --- a/drivers/spi/spi-tegra20-slink.c +++ b/drivers/spi/spi-tegra20-slink.c @@ -1034,18 +1034,12 @@ static int tegra_slink_probe(struct platform_device *pdev) &master->max_speed_hz)) master->max_speed_hz = 25000000; /* 25MHz */ - r = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!r) { - dev_err(&pdev->dev, "No IO memory resource\n"); - ret = -ENODEV; - goto exit_free_master; - } - tspi->phys = r->start; - tspi->base = devm_ioremap_resource(&pdev->dev, r); + tspi->base = devm_platform_get_and_ioremap_resource(pdev, 0, &r); if (IS_ERR(tspi->base)) { ret = PTR_ERR(tspi->base); goto exit_free_master; } + tspi->phys = r->start; /* disabled clock may cause interrupt storm upon request */ tspi->clk = devm_clk_get(&pdev->dev, NULL); From 4f81b540ccdf023b7b39432f5c0a26c7eadcc9ce Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 6 Jul 2023 11:27:26 +0800 Subject: [PATCH 023/656] spi: s3c64xx: Use devm_platform_get_and_ioremap_resource() Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Yangtao Li Link: https://lore.kernel.org/r/20230706032727.9180-7-frank.li@vivo.com Signed-off-by: Mark Brown --- drivers/spi/spi-s3c64xx.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c index fd55697144cc..ad008597c7d8 100644 --- a/drivers/spi/spi-s3c64xx.c +++ b/drivers/spi/spi-s3c64xx.c @@ -1164,11 +1164,6 @@ static int s3c64xx_spi_probe(struct platform_device *pdev) return dev_err_probe(&pdev->dev, -ENODEV, "Platform_data missing!\n"); - mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!mem_res) - return dev_err_probe(&pdev->dev, -ENXIO, - "Unable to get SPI MEM resource\n"); - irq = platform_get_irq(pdev, 0); if (irq < 0) return dev_err_probe(&pdev->dev, irq, "Failed to get IRQ\n"); @@ -1185,7 +1180,6 @@ static int s3c64xx_spi_probe(struct platform_device *pdev) sdd->master = master; sdd->cntrlr_info = sci; sdd->pdev = pdev; - sdd->sfr_start = mem_res->start; if (pdev->dev.of_node) { ret = of_alias_get_id(pdev->dev.of_node, "spi"); if (ret < 0) @@ -1223,9 +1217,10 @@ static int s3c64xx_spi_probe(struct platform_device *pdev) if (!is_polling(sdd)) master->can_dma = s3c64xx_spi_can_dma; - sdd->regs = devm_ioremap_resource(&pdev->dev, mem_res); + sdd->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &mem_res); if (IS_ERR(sdd->regs)) return PTR_ERR(sdd->regs); + sdd->sfr_start = mem_res->start; if (sci->cfg_gpio && sci->cfg_gpio()) return dev_err_probe(&pdev->dev, -EBUSY, From 8c87a46e2ce3d5aaf315ffb61dcda62417e41bbf Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Wed, 5 Jul 2023 17:26:01 +0200 Subject: [PATCH 024/656] dt-bindings: spi: tegra-slink: Convert to json-schema Convert the Tegra SLINK bindings from the free-form text format to json-schema. Signed-off-by: Thierry Reding Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20230705152603.2514235-1-thierry.reding@gmail.com Signed-off-by: Mark Brown --- .../bindings/spi/nvidia,tegra20-slink.txt | 37 -------- .../bindings/spi/nvidia,tegra20-slink.yaml | 90 +++++++++++++++++++ 2 files changed, 90 insertions(+), 37 deletions(-) delete mode 100644 Documentation/devicetree/bindings/spi/nvidia,tegra20-slink.txt create mode 100644 Documentation/devicetree/bindings/spi/nvidia,tegra20-slink.yaml diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra20-slink.txt b/Documentation/devicetree/bindings/spi/nvidia,tegra20-slink.txt deleted file mode 100644 index 40d80b93e327..000000000000 --- a/Documentation/devicetree/bindings/spi/nvidia,tegra20-slink.txt +++ /dev/null @@ -1,37 +0,0 @@ -NVIDIA Tegra20/Tegra30 SLINK controller. - -Required properties: -- compatible : should be "nvidia,tegra20-slink", "nvidia,tegra30-slink". -- reg: Should contain SLINK registers location and length. -- interrupts: Should contain SLINK interrupts. -- clocks : Must contain one entry, for the module clock. - See ../clocks/clock-bindings.txt for details. -- resets : Must contain an entry for each entry in reset-names. - See ../reset/reset.txt for details. -- reset-names : Must include the following entries: - - spi -- dmas : Must contain an entry for each entry in clock-names. - See ../dma/dma.txt for details. -- dma-names : Must include the following entries: - - rx - - tx - -Recommended properties: -- spi-max-frequency: Definition as per - Documentation/devicetree/bindings/spi/spi-bus.txt - -Example: - -spi@7000d600 { - compatible = "nvidia,tegra20-slink"; - reg = <0x7000d600 0x200>; - interrupts = <0 82 0x04>; - spi-max-frequency = <25000000>; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&tegra_car 44>; - resets = <&tegra_car 44>; - reset-names = "spi"; - dmas = <&apbdma 16>, <&apbdma 16>; - dma-names = "rx", "tx"; -}; diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra20-slink.yaml b/Documentation/devicetree/bindings/spi/nvidia,tegra20-slink.yaml new file mode 100644 index 000000000000..291c25ec015d --- /dev/null +++ b/Documentation/devicetree/bindings/spi/nvidia,tegra20-slink.yaml @@ -0,0 +1,90 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/nvidia,tegra20-slink.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NVIDIA Tegra20/30 SLINK controller + +maintainers: + - Thierry Reding + - Jon Hunter + +properties: + compatible: + enum: + - nvidia,tegra20-slink + - nvidia,tegra30-slink + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: module clock + + resets: + items: + - description: module reset + + reset-names: + items: + - const: spi + + dmas: + items: + - description: DMA channel used for reception + - description: DMA channel used for transmission + + dma-names: + items: + - const: rx + - const: tx + + operating-points-v2: + $ref: /schemas/types.yaml#/definitions/phandle + + power-domains: + items: + - description: phandle to the core power domain + + spi-max-frequency: + description: Maximum SPI clocking speed of the controller in Hz. + $ref: /schemas/types.yaml#/definitions/uint32 + +allOf: + - $ref: spi-controller.yaml + +unevaluatedProperties: false + +required: + - compatible + - reg + - interrupts + - clocks + - resets + - reset-names + - dmas + - dma-names + +examples: + - | + #include + #include + + spi@7000d600 { + compatible = "nvidia,tegra20-slink"; + reg = <0x7000d600 0x200>; + interrupts = ; + spi-max-frequency = <25000000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&tegra_car TEGRA20_CLK_SBC2>; + resets = <&tegra_car 44>; + reset-names = "spi"; + dmas = <&apbdma 16>, <&apbdma 16>; + dma-names = "rx", "tx"; + }; From 17a9ab02f72c832293155a432895c889842b7da4 Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Wed, 5 Jul 2023 17:26:02 +0200 Subject: [PATCH 025/656] dt-bindings: spi: tegra-sflash: Convert to json-schema Convert the Tegra SFLASH controller bindings from the free-form text format to json-schema. Signed-off-by: Thierry Reding Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20230705152603.2514235-2-thierry.reding@gmail.com Signed-off-by: Mark Brown --- .../bindings/spi/nvidia,tegra20-sflash.txt | 37 --------- .../bindings/spi/nvidia,tegra20-sflash.yaml | 81 +++++++++++++++++++ 2 files changed, 81 insertions(+), 37 deletions(-) delete mode 100644 Documentation/devicetree/bindings/spi/nvidia,tegra20-sflash.txt create mode 100644 Documentation/devicetree/bindings/spi/nvidia,tegra20-sflash.yaml diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra20-sflash.txt b/Documentation/devicetree/bindings/spi/nvidia,tegra20-sflash.txt deleted file mode 100644 index c212491929b5..000000000000 --- a/Documentation/devicetree/bindings/spi/nvidia,tegra20-sflash.txt +++ /dev/null @@ -1,37 +0,0 @@ -NVIDIA Tegra20 SFLASH controller. - -Required properties: -- compatible : should be "nvidia,tegra20-sflash". -- reg: Should contain SFLASH registers location and length. -- interrupts: Should contain SFLASH interrupts. -- clocks : Must contain one entry, for the module clock. - See ../clocks/clock-bindings.txt for details. -- resets : Must contain an entry for each entry in reset-names. - See ../reset/reset.txt for details. -- reset-names : Must include the following entries: - - spi -- dmas : Must contain an entry for each entry in clock-names. - See ../dma/dma.txt for details. -- dma-names : Must include the following entries: - - rx - - tx - -Recommended properties: -- spi-max-frequency: Definition as per - Documentation/devicetree/bindings/spi/spi-bus.txt - -Example: - -spi@7000c380 { - compatible = "nvidia,tegra20-sflash"; - reg = <0x7000c380 0x80>; - interrupts = <0 39 0x04>; - spi-max-frequency = <25000000>; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&tegra_car 43>; - resets = <&tegra_car 43>; - reset-names = "spi"; - dmas = <&apbdma 11>, <&apbdma 11>; - dma-names = "rx", "tx"; -}; diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra20-sflash.yaml b/Documentation/devicetree/bindings/spi/nvidia,tegra20-sflash.yaml new file mode 100644 index 000000000000..e245bad85a25 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/nvidia,tegra20-sflash.yaml @@ -0,0 +1,81 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/nvidia,tegra20-sflash.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NVIDIA Tegra20 SFLASH controller + +maintainers: + - Thierry Reding + - Jon Hunter + +properties: + compatible: + const: nvidia,tegra20-sflash + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: module clock + + resets: + items: + - description: module reset + + reset-names: + items: + - const: spi + + dmas: + items: + - description: DMA channel used for reception + - description: DMA channel used for transmission + + dma-names: + items: + - const: rx + - const: tx + + spi-max-frequency: + description: Maximum SPI clocking speed of the controller in Hz. + $ref: /schemas/types.yaml#/definitions/uint32 + +allOf: + - $ref: spi-controller.yaml + +unevaluatedProperties: false + +required: + - compatible + - reg + - interrupts + - clocks + - resets + - reset-names + - dmas + - dma-names + +examples: + - | + #include + #include + + spi@7000c380 { + compatible = "nvidia,tegra20-sflash"; + reg = <0x7000c380 0x80>; + interrupts = ; + spi-max-frequency = <25000000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&tegra_car TEGRA20_CLK_SPI>; + resets = <&tegra_car 43>; + reset-names = "spi"; + dmas = <&apbdma 11>, <&apbdma 11>; + dma-names = "rx", "tx"; + }; From b8968c388b69d9cf31d7f5b1721ac7fe9f932cb9 Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Wed, 5 Jul 2023 17:26:03 +0200 Subject: [PATCH 026/656] dt-bindings: spi: Convert Tegra114 SPI to json-schema Convert the Tegra114 SPI controller device tree bindings from plain text to json-schema format. Signed-off-by: Thierry Reding Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20230705152603.2514235-3-thierry.reding@gmail.com Signed-off-by: Mark Brown --- .../bindings/spi/nvidia,tegra114-spi.txt | 61 ----------- .../bindings/spi/nvidia,tegra114-spi.yaml | 100 ++++++++++++++++++ 2 files changed, 100 insertions(+), 61 deletions(-) delete mode 100644 Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt create mode 100644 Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.yaml diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt b/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt deleted file mode 100644 index db8e0d71c5bc..000000000000 --- a/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt +++ /dev/null @@ -1,61 +0,0 @@ -NVIDIA Tegra114 SPI controller. - -Required properties: -- compatible : For Tegra114, must contain "nvidia,tegra114-spi". - Otherwise, must contain '"nvidia,-spi", "nvidia,tegra114-spi"' where - is tegra124, tegra132, or tegra210. -- reg: Should contain SPI registers location and length. -- interrupts: Should contain SPI interrupts. -- clock-names : Must include the following entries: - - spi -- resets : Must contain an entry for each entry in reset-names. - See ../reset/reset.txt for details. -- reset-names : Must include the following entries: - - spi -- dmas : Must contain an entry for each entry in clock-names. - See ../dma/dma.txt for details. -- dma-names : Must include the following entries: - - rx - - tx -- clocks : Must contain an entry for each entry in clock-names. - See ../clocks/clock-bindings.txt for details. - -Recommended properties: -- spi-max-frequency: Definition as per - Documentation/devicetree/bindings/spi/spi-bus.txt -Optional properties: -- nvidia,tx-clk-tap-delay: Delays the clock going out to the external device - with this tap value. This property is used to tune the outgoing data from - Tegra SPI master with respect to outgoing Tegra SPI master clock. - Tap values vary based on the platform design trace lengths from Tegra SPI - to corresponding slave devices. Valid tap values are from 0 thru 63. -- nvidia,rx-clk-tap-delay: Delays the clock coming in from the external device - with this tap value. This property is used to adjust the Tegra SPI master - clock with respect to the data from the SPI slave device. - Tap values vary based on the platform design trace lengths from Tegra SPI - to corresponding slave devices. Valid tap values are from 0 thru 63. - -Example: - -spi@7000d600 { - compatible = "nvidia,tegra114-spi"; - reg = <0x7000d600 0x200>; - interrupts = <0 82 0x04>; - spi-max-frequency = <25000000>; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&tegra_car 44>; - clock-names = "spi"; - resets = <&tegra_car 44>; - reset-names = "spi"; - dmas = <&apbdma 16>, <&apbdma 16>; - dma-names = "rx", "tx"; - @ { - ... - ... - nvidia,rx-clk-tap-delay = <0>; - nvidia,tx-clk-tap-delay = <16>; - ... - }; - -}; diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.yaml b/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.yaml new file mode 100644 index 000000000000..58222ffa53d7 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.yaml @@ -0,0 +1,100 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/nvidia,tegra114-spi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NVIDIA Tegra114 SPI controller + +maintainers: + - Thierry Reding + - Jon Hunter + +properties: + compatible: + oneOf: + - const: nvidia,tegra114-spi + - items: + - enum: + - nvidia,tegra210-spi + - nvidia,tegra124-spi + - const: nvidia,tegra114-spi + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: SPI module clock + + clock-names: + items: + - const: spi + + resets: + items: + - description: SPI module reset + + reset-names: + items: + - const: spi + + dmas: + items: + - description: DMA channel for the reception FIFO + - description: DMA channel for the transmission FIFO + + dma-names: + items: + - const: rx + - const: tx + + spi-max-frequency: + description: Maximum SPI clocking speed of the controller in Hz. + $ref: /schemas/types.yaml#/definitions/uint32 + +allOf: + - $ref: spi-controller.yaml + +unevaluatedProperties: false + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - resets + - reset-names + - dmas + - dma-names + +examples: + - | + spi@7000d600 { + compatible = "nvidia,tegra114-spi"; + reg = <0x7000d600 0x200>; + interrupts = <0 82 0x04>; + clocks = <&tegra_car 44>; + clock-names = "spi"; + resets = <&tegra_car 44>; + reset-names = "spi"; + dmas = <&apbdma 16>, <&apbdma 16>; + dma-names = "rx", "tx"; + + spi-max-frequency = <25000000>; + + #address-cells = <1>; + #size-cells = <0>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <20000000>; + nvidia,rx-clk-tap-delay = <0>; + nvidia,tx-clk-tap-delay = <16>; + }; + }; From e2051394a50c7dd49e9b56bfaf049a03972362ae Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Wed, 5 Jul 2023 09:42:19 +0200 Subject: [PATCH 027/656] gpiolib: add missing include gpiolib.h uses notifiers but doesn't include . Signed-off-by: Bartosz Golaszewski Reviewed-by: Kent Gibson Reviewed-by: Andy Shevchenko --- drivers/gpio/gpiolib.h | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpio/gpiolib.h b/drivers/gpio/gpiolib.h index cca81375f127..1409d52487c0 100644 --- a/drivers/gpio/gpiolib.h +++ b/drivers/gpio/gpiolib.h @@ -14,6 +14,7 @@ #include #include #include +#include #include #include From 3283d820dce649ad6d5eaa531d76251b4e22ad40 Mon Sep 17 00:00:00 2001 From: Shenwei Wang Date: Thu, 6 Jul 2023 09:56:11 -0500 Subject: [PATCH 028/656] gpio: mxc: add runtime pm support Add runtime PM support and allow the GPIO controller to enter into runtime suspend automatically when not in use to save power. However, it will automatically resume and enable clocks when a GPIO or IRQ is requested. While putting the GPIO module itself into power saving mode may not have an obvious impact on current dissipation, the function is necessary because the GPIO module disables its clock when idle. This enables the system an opportunity to power off the parent subsystem, and this conserves more power. The typical i.MX8 SoC features up to 8 GPIO controllers, but most of the controllers often remain unused. Signed-off-by: Shenwei Wang Reviewed-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-mxc.c | 61 +++++++++++++++++++++++++++++++++++++++-- 1 file changed, 59 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c index 9d0cec4b82a3..a9fb6bd9aa6f 100644 --- a/drivers/gpio/gpio-mxc.c +++ b/drivers/gpio/gpio-mxc.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -382,6 +383,23 @@ static int mxc_gpio_to_irq(struct gpio_chip *gc, unsigned offset) return irq_find_mapping(port->domain, offset); } +static int mxc_gpio_request(struct gpio_chip *chip, unsigned int offset) +{ + int ret; + + ret = gpiochip_generic_request(chip, offset); + if (ret) + return ret; + + return pm_runtime_resume_and_get(chip->parent); +} + +static void mxc_gpio_free(struct gpio_chip *chip, unsigned int offset) +{ + gpiochip_generic_free(chip, offset); + pm_runtime_put(chip->parent); +} + static int mxc_gpio_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; @@ -429,6 +447,10 @@ static int mxc_gpio_probe(struct platform_device *pdev) if (of_device_is_compatible(np, "fsl,imx7d-gpio")) port->power_off = true; + pm_runtime_get_noresume(&pdev->dev); + pm_runtime_set_active(&pdev->dev); + pm_runtime_enable(&pdev->dev); + /* disable the interrupt and clear the status */ writel(0, port->base + GPIO_IMR); writel(~0, port->base + GPIO_ISR); @@ -459,8 +481,8 @@ static int mxc_gpio_probe(struct platform_device *pdev) if (err) goto out_bgio; - port->gc.request = gpiochip_generic_request; - port->gc.free = gpiochip_generic_free; + port->gc.request = mxc_gpio_request; + port->gc.free = mxc_gpio_free; port->gc.to_irq = mxc_gpio_to_irq; port->gc.base = (pdev->id < 0) ? of_alias_get_id(np, "gpio") * 32 : pdev->id * 32; @@ -482,6 +504,8 @@ static int mxc_gpio_probe(struct platform_device *pdev) goto out_bgio; } + irq_domain_set_pm_device(port->domain, &pdev->dev); + /* gpio-mxc can be a generic irq chip */ err = mxc_gpio_init_gc(port, irq_base); if (err < 0) @@ -490,12 +514,15 @@ static int mxc_gpio_probe(struct platform_device *pdev) list_add_tail(&port->node, &mxc_gpio_ports); platform_set_drvdata(pdev, port); + pm_runtime_put_autosuspend(&pdev->dev); return 0; out_irqdomain_remove: irq_domain_remove(port->domain); out_bgio: + pm_runtime_disable(&pdev->dev); + pm_runtime_put_noidle(&pdev->dev); clk_disable_unprepare(port->clk); dev_info(&pdev->dev, "%s failed with errno %d\n", __func__, err); return err; @@ -572,6 +599,30 @@ static bool mxc_gpio_set_pad_wakeup(struct mxc_gpio_port *port, bool enable) return ret; } +static int mxc_gpio_runtime_suspend(struct device *dev) +{ + struct mxc_gpio_port *port = dev_get_drvdata(dev); + + mxc_gpio_save_regs(port); + clk_disable_unprepare(port->clk); + + return 0; +} + +static int mxc_gpio_runtime_resume(struct device *dev) +{ + struct mxc_gpio_port *port = dev_get_drvdata(dev); + int ret; + + ret = clk_prepare_enable(port->clk); + if (ret) + return ret; + + mxc_gpio_restore_regs(port); + + return 0; +} + static int __maybe_unused mxc_gpio_noirq_suspend(struct device *dev) { struct platform_device *pdev = to_platform_device(dev); @@ -597,14 +648,19 @@ static int __maybe_unused mxc_gpio_noirq_resume(struct device *dev) static const struct dev_pm_ops mxc_gpio_dev_pm_ops = { SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(mxc_gpio_noirq_suspend, mxc_gpio_noirq_resume) + SET_RUNTIME_PM_OPS(mxc_gpio_runtime_suspend, mxc_gpio_runtime_resume, NULL) }; static int mxc_gpio_syscore_suspend(void) { struct mxc_gpio_port *port; + int ret; /* walk through all ports */ list_for_each_entry(port, &mxc_gpio_ports, node) { + ret = clk_prepare_enable(port->clk); + if (ret) + return ret; mxc_gpio_save_regs(port); clk_disable_unprepare(port->clk); } @@ -625,6 +681,7 @@ static void mxc_gpio_syscore_resume(void) return; } mxc_gpio_restore_regs(port); + clk_disable_unprepare(port->clk); } } From 59a4a3512c94c2e59757cd9119fcf4faf53fe198 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Mon, 3 Jul 2023 17:23:06 +0300 Subject: [PATCH 029/656] gpiolib: of: Don't use GPIO chip fwnode in of_gpiochip_*() GPIO library should rely only on the GPIO device's fwnode. Hence, replace GPIO chip fwnode usage by respective OF node of the GPIO device. JFYI, this is partial revert of 8afe82550240 ("gpiolib: of: Prepare of_gpiochip_add() / of_gpiochip_remove() for fwnode"). Signed-off-by: Andy Shevchenko Tested-by: Benjamin Tissoires Reviewed-by: Linus Walleij Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpiolib-of.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpio/gpiolib-of.c b/drivers/gpio/gpiolib-of.c index 1436cdb5fa26..5fde5a3f5118 100644 --- a/drivers/gpio/gpiolib-of.c +++ b/drivers/gpio/gpiolib-of.c @@ -1078,16 +1078,16 @@ int of_gpiochip_add(struct gpio_chip *chip) if (ret) return ret; - fwnode_handle_get(chip->fwnode); + of_node_get(np); ret = of_gpiochip_scan_gpios(chip); if (ret) - fwnode_handle_put(chip->fwnode); + of_node_put(np); return ret; } void of_gpiochip_remove(struct gpio_chip *chip) { - fwnode_handle_put(chip->fwnode); + of_node_put(dev_of_node(&chip->gpiodev->dev)); } From 067dbc1ea5ce61ba174d0c5f2e375defe4d562e6 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Mon, 3 Jul 2023 17:23:07 +0300 Subject: [PATCH 030/656] gpiolib: acpi: Don't use GPIO chip fwnode in acpi_gpiochip_find() GPIO library should rely only on the GPIO device's fwnode. Hence, replace GPIO chip fwnode usage by respective handle of the GPIO device. Signed-off-by: Andy Shevchenko Tested-by: Benjamin Tissoires Reviewed-by: Linus Walleij Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpiolib-acpi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/gpiolib-acpi.c b/drivers/gpio/gpiolib-acpi.c index 97496c0f9133..fbda452fb4d6 100644 --- a/drivers/gpio/gpiolib-acpi.c +++ b/drivers/gpio/gpiolib-acpi.c @@ -128,7 +128,7 @@ static bool acpi_gpio_deferred_req_irqs_done; static int acpi_gpiochip_find(struct gpio_chip *gc, void *data) { - return ACPI_HANDLE_FWNODE(gc->fwnode) == data; + return device_match_acpi_handle(&gc->gpiodev->dev, data); } /** From daecca4b8433d47f0db4933bcc0f283d530ba22e Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Mon, 3 Jul 2023 17:23:08 +0300 Subject: [PATCH 031/656] gpiolib: Do not alter GPIO chip fwnode member Ideally we should not touch data in the given GPIO chip structure. Let's become closer to it by avoiding altering fwnode member. The GPIO library must use fwnode from GPIO device and the drivers might use one from GPIO chip in case they initialized it. Signed-off-by: Andy Shevchenko Tested-by: Benjamin Tissoires Reviewed-by: Linus Walleij Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpiolib.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index 251c875b5c34..826d927c2076 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c @@ -711,13 +711,6 @@ int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data, int base = 0; int ret = 0; - /* - * If the calling driver did not initialize firmware node, do it here - * using the parent device, if any. - */ - if (!gc->fwnode && gc->parent) - gc->fwnode = dev_fwnode(gc->parent); - /* * First: allocate and populate the internal stat container, and * set up the struct device. @@ -732,7 +725,14 @@ int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data, gc->gpiodev = gdev; gpiochip_set_data(gc, data); - device_set_node(&gdev->dev, gc->fwnode); + /* + * If the calling driver did not initialize firmware node, + * do it here using the parent device, if any. + */ + if (gc->fwnode) + device_set_node(&gdev->dev, gc->fwnode); + else if (gc->parent) + device_set_node(&gdev->dev, dev_fwnode(gc->parent)); gdev->id = ida_alloc(&gpio_ida, GFP_KERNEL); if (gdev->id < 0) { From b683b487dce74bd709aa21aa1056bcc9462d1dfc Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Wed, 21 Jun 2023 20:49:39 +0300 Subject: [PATCH 032/656] gpiolib: Make gpiochip_hierarchy_add_domain() return domain As a preparatory patch and for the sake of consistency, make gpiochip_hierarchy_add_domain() return IRQ domain. While at it, rename it to gpiochip_hierarchy_create_domain() to show the change. Signed-off-by: Andy Shevchenko Reviewed-by: Linus Walleij Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpiolib.c | 24 +++++++++++++----------- 1 file changed, 13 insertions(+), 11 deletions(-) diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index 826d927c2076..1c0d0e33c6bd 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c @@ -1292,12 +1292,14 @@ static void gpiochip_hierarchy_setup_domain_ops(struct irq_domain_ops *ops) ops->free = irq_domain_free_irqs_common; } -static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc) +static struct irq_domain *gpiochip_hierarchy_create_domain(struct gpio_chip *gc) { + struct irq_domain *domain; + if (!gc->irq.child_to_parent_hwirq || !gc->irq.fwnode) { chip_err(gc, "missing irqdomain vital data\n"); - return -EINVAL; + return ERR_PTR(-EINVAL); } if (!gc->irq.child_offset_to_irq) @@ -1309,7 +1311,7 @@ static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc) gpiochip_hierarchy_setup_domain_ops(&gc->irq.child_irq_domain_ops); - gc->irq.domain = irq_domain_create_hierarchy( + domain = irq_domain_create_hierarchy( gc->irq.parent_domain, 0, gc->ngpio, @@ -1317,12 +1319,12 @@ static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc) &gc->irq.child_irq_domain_ops, gc); - if (!gc->irq.domain) - return -ENOMEM; + if (!domain) + return ERR_PTR(-ENOMEM); gpiochip_set_hierarchical_irqchip(gc, gc->irq.chip); - return 0; + return domain; } static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc) @@ -1366,9 +1368,9 @@ EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_fourcell); #else -static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc) +static struct irq_domain *gpiochip_hierarchy_create_domain(struct gpio_chip *gc) { - return -EINVAL; + return ERR_PTR(-EINVAL); } static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc) @@ -1667,9 +1669,9 @@ static int gpiochip_add_irqchip(struct gpio_chip *gc, /* If a parent irqdomain is provided, let's build a hierarchy */ if (gpiochip_hierarchy_is_hierarchical(gc)) { - int ret = gpiochip_hierarchy_add_domain(gc); - if (ret) - return ret; + gc->irq.domain = gpiochip_hierarchy_create_domain(gc); + if (IS_ERR(gc->irq.domain)) + return PTR_ERR(gc->irq.domain); } else { gc->irq.domain = irq_domain_create_simple(fwnode, gc->ngpio, From 1efc43de1781bbb8780ee6f6f2291073003f1ff1 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Wed, 21 Jun 2023 20:49:40 +0300 Subject: [PATCH 033/656] gpiolib: Factor out gpiochip_simple_create_domain() As a preparatory patch and for the sake of consistency, factor out gpiochip_simple_create_domain(). Signed-off-by: Andy Shevchenko Reviewed-by: Linus Walleij Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpiolib.c | 23 ++++++++++++++++------- 1 file changed, 16 insertions(+), 7 deletions(-) diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index 1c0d0e33c6bd..796d2802ebb9 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c @@ -1447,6 +1447,19 @@ static const struct irq_domain_ops gpiochip_domain_ops = { .xlate = irq_domain_xlate_twocell, }; +static struct irq_domain *gpiochip_simple_create_domain(struct gpio_chip *gc) +{ + struct fwnode_handle *fwnode = dev_fwnode(&gc->gpiodev->dev); + struct irq_domain *domain; + + domain = irq_domain_create_simple(fwnode, gc->ngpio, gc->irq.first, + &gpiochip_domain_ops, gc); + if (!domain) + return ERR_PTR(-EINVAL); + + return domain; +} + /* * TODO: move these activate/deactivate in under the hierarchicial * irqchip implementation as static once SPMI and SSBI (all external @@ -1673,13 +1686,9 @@ static int gpiochip_add_irqchip(struct gpio_chip *gc, if (IS_ERR(gc->irq.domain)) return PTR_ERR(gc->irq.domain); } else { - gc->irq.domain = irq_domain_create_simple(fwnode, - gc->ngpio, - gc->irq.first, - &gpiochip_domain_ops, - gc); - if (!gc->irq.domain) - return -EINVAL; + gc->irq.domain = gpiochip_simple_create_domain(gc); + if (IS_ERR(gc->irq.domain)) + return PTR_ERR(gc->irq.domain); } if (gc->irq.parent_handler) { From 39f3ad73d4465d0333444bd5adce052f8e1c2783 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Wed, 21 Jun 2023 20:49:41 +0300 Subject: [PATCH 034/656] gpiolib: Do not assign error pointer to the GPIO IRQ chip domain Check domain for being an error pointer before assigning it to the GPIO IRQ chip domain. Signed-off-by: Andy Shevchenko Reviewed-by: Linus Walleij Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpiolib.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index 796d2802ebb9..e4300b99bfa5 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c @@ -1650,6 +1650,7 @@ static int gpiochip_add_irqchip(struct gpio_chip *gc, { struct fwnode_handle *fwnode = dev_fwnode(&gc->gpiodev->dev); struct irq_chip *irqchip = gc->irq.chip; + struct irq_domain *domain; unsigned int type; unsigned int i; @@ -1682,14 +1683,13 @@ static int gpiochip_add_irqchip(struct gpio_chip *gc, /* If a parent irqdomain is provided, let's build a hierarchy */ if (gpiochip_hierarchy_is_hierarchical(gc)) { - gc->irq.domain = gpiochip_hierarchy_create_domain(gc); - if (IS_ERR(gc->irq.domain)) - return PTR_ERR(gc->irq.domain); + domain = gpiochip_hierarchy_create_domain(gc); } else { - gc->irq.domain = gpiochip_simple_create_domain(gc); - if (IS_ERR(gc->irq.domain)) - return PTR_ERR(gc->irq.domain); + domain = gpiochip_simple_create_domain(gc); } + if (IS_ERR(domain)) + return PTR_ERR(domain); + gc->irq.domain = domain; if (gc->irq.parent_handler) { for (i = 0; i < gc->irq.num_parents; i++) { From 081bfdb303abaf5c818de5a444dd899c7de3fab0 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Wed, 21 Jun 2023 20:49:42 +0300 Subject: [PATCH 035/656] gpiolib: Split out gpiochip_irqchip_add_allocated_domain() helper The gpiochip_irqchip_add_allocated_domain() can be used in another place in the code. Signed-off-by: Andy Shevchenko Reviewed-by: Linus Walleij Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpiolib.c | 39 +++++++++++++++++++++++---------------- 1 file changed, 23 insertions(+), 16 deletions(-) diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index e4300b99bfa5..0179902d3b74 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c @@ -1638,6 +1638,28 @@ static void gpiochip_set_irq_hooks(struct gpio_chip *gc) } } +static int gpiochip_irqchip_add_allocated_domain(struct gpio_chip *gc, + struct irq_domain *domain, + bool allocated_externally) +{ + if (!domain) + return -EINVAL; + + gc->to_irq = gpiochip_to_irq; + gc->irq.domain = domain; + gc->irq.domain_is_allocated_externally = allocated_externally; + + /* + * Using barrier() here to prevent compiler from reordering + * gc->irq.initialized before adding irqdomain. + */ + barrier(); + + gc->irq.initialized = true; + + return 0; +} + /** * gpiochip_add_irqchip() - adds an IRQ chip to a GPIO chip * @gc: the GPIO chip to add the IRQ chip to @@ -1791,22 +1813,7 @@ static void gpiochip_irqchip_remove(struct gpio_chip *gc) int gpiochip_irqchip_add_domain(struct gpio_chip *gc, struct irq_domain *domain) { - if (!domain) - return -EINVAL; - - gc->to_irq = gpiochip_to_irq; - gc->irq.domain = domain; - gc->irq.domain_is_allocated_externally = true; - - /* - * Using barrier() here to prevent compiler from reordering - * gc->irq.initialized before adding irqdomain. - */ - barrier(); - - gc->irq.initialized = true; - - return 0; + return gpiochip_irqchip_add_allocated_domain(gc, domain, true); } EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_domain); From eec349dbe4fa2712d4933d674531778a93c50b28 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Wed, 21 Jun 2023 20:49:43 +0300 Subject: [PATCH 036/656] gpiolib: Replace open coded gpiochip_irqchip_add_allocated_domain() Replace open coded variant of gpiochip_irqchip_add_allocated_domain() in gpiochip_add_irqchip(). Signed-off-by: Andy Shevchenko Reviewed-by: Linus Walleij Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpiolib.c | 20 +++++++------------- 1 file changed, 7 insertions(+), 13 deletions(-) diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index 0179902d3b74..62199ec96db2 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c @@ -1645,6 +1645,9 @@ static int gpiochip_irqchip_add_allocated_domain(struct gpio_chip *gc, if (!domain) return -EINVAL; + if (gc->to_irq) + chip_warn(gc, "to_irq is redefined in %s and you shouldn't rely on it\n", __func__); + gc->to_irq = gpiochip_to_irq; gc->irq.domain = domain; gc->irq.domain_is_allocated_externally = allocated_externally; @@ -1675,6 +1678,7 @@ static int gpiochip_add_irqchip(struct gpio_chip *gc, struct irq_domain *domain; unsigned int type; unsigned int i; + int ret; if (!irqchip) return 0; @@ -1695,10 +1699,6 @@ static int gpiochip_add_irqchip(struct gpio_chip *gc, "%pfw: Ignoring %u default trigger\n", fwnode, type)) type = IRQ_TYPE_NONE; - if (gc->to_irq) - chip_warn(gc, "to_irq is redefined in %s and you shouldn't rely on it\n", __func__); - - gc->to_irq = gpiochip_to_irq; gc->irq.default_type = type; gc->irq.lock_key = lock_key; gc->irq.request_key = request_key; @@ -1711,7 +1711,6 @@ static int gpiochip_add_irqchip(struct gpio_chip *gc, } if (IS_ERR(domain)) return PTR_ERR(domain); - gc->irq.domain = domain; if (gc->irq.parent_handler) { for (i = 0; i < gc->irq.num_parents; i++) { @@ -1735,14 +1734,9 @@ static int gpiochip_add_irqchip(struct gpio_chip *gc, gpiochip_set_irq_hooks(gc); - /* - * Using barrier() here to prevent compiler from reordering - * gc->irq.initialized before initialization of above - * GPIO chip irq members. - */ - barrier(); - - gc->irq.initialized = true; + ret = gpiochip_irqchip_add_allocated_domain(gc, domain, false); + if (ret) + return ret; acpi_gpiochip_request_interrupts(gc); From d16e0b0e798700b036ad2701ce70525a6fbea8ea Mon Sep 17 00:00:00 2001 From: Samuel Holland Date: Mon, 26 Jun 2023 10:26:08 -0700 Subject: [PATCH 037/656] gpio: sifive: Support IRQ wake Each pin drives a separate interrupt in the parent IRQ domain, so there is no need to set IRQCHIP_MASK_ON_SUSPEND. Signed-off-by: Samuel Holland Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-sifive.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpio/gpio-sifive.c b/drivers/gpio/gpio-sifive.c index 745e5f67254e..efab7b58f739 100644 --- a/drivers/gpio/gpio-sifive.c +++ b/drivers/gpio/gpio-sifive.c @@ -150,6 +150,7 @@ static const struct irq_chip sifive_gpio_irqchip = { .irq_disable = sifive_gpio_irq_disable, .irq_eoi = sifive_gpio_irq_eoi, .irq_set_affinity = sifive_gpio_irq_set_affinity, + .irq_set_wake = irq_chip_set_wake_parent, .flags = IRQCHIP_IMMUTABLE, GPIOCHIP_IRQ_RESOURCE_HELPERS, }; From fbab5b2c09060e8034fee6ec2df69a62594fb7db Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Mon, 10 Jul 2023 18:49:18 +0300 Subject: [PATCH 038/656] spi: Remove unneeded OF node NULL checks In the couple of places the NULL check of OF node is implied by the call that takes it as a parameter. Drop the respective duplicate checks. Signed-off-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230710154932.68377-2-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown --- drivers/spi/spi.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 9291b2a0e887..8f3282a71c63 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -2399,9 +2399,6 @@ static void of_register_spi_devices(struct spi_controller *ctlr) struct spi_device *spi; struct device_node *nc; - if (!ctlr->dev.of_node) - return; - for_each_available_child_of_node(ctlr->dev.of_node, nc) { if (of_node_test_and_set_flag(nc, OF_POPULATED)) continue; @@ -3134,7 +3131,7 @@ int spi_register_controller(struct spi_controller *ctlr) if (WARN(id < 0, "couldn't get idr")) return id == -ENOSPC ? -EBUSY : id; ctlr->bus_num = id; - } else if (ctlr->dev.of_node) { + } else { /* Allocate dynamic bus number using Linux idr */ id = of_alias_get_id(ctlr->dev.of_node, "spi"); if (id >= 0) { From 440c47331bdb889e24128c75387c695ca81d9b9b Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Mon, 10 Jul 2023 18:49:19 +0300 Subject: [PATCH 039/656] spi: Drop duplicate IDR allocation code in spi_register_controller() Refactor spi_register_controller() to drop duplicate IDR allocation. Instead of if-else-if branching use two sequential if:s, which allows to re-use the logic of IDR allocation in all cases. Signed-off-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230710154932.68377-3-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown --- drivers/spi/spi.c | 50 ++++++++++++++++++++++------------------------- 1 file changed, 23 insertions(+), 27 deletions(-) diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 8f3282a71c63..6d74218cf38e 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -3081,6 +3081,20 @@ static int spi_controller_check_ops(struct spi_controller *ctlr) return 0; } +/* Allocate dynamic bus number using Linux idr */ +static int spi_controller_id_alloc(struct spi_controller *ctlr, int start, int end) +{ + int id; + + mutex_lock(&board_lock); + id = idr_alloc(&spi_master_idr, ctlr, start, end, GFP_KERNEL); + mutex_unlock(&board_lock); + if (WARN(id < 0, "couldn't get idr")) + return id == -ENOSPC ? -EBUSY : id; + ctlr->bus_num = id; + return 0; +} + /** * spi_register_controller - register SPI master or slave controller * @ctlr: initialized master, originally from spi_alloc_master() or @@ -3108,8 +3122,8 @@ int spi_register_controller(struct spi_controller *ctlr) { struct device *dev = ctlr->dev.parent; struct boardinfo *bi; + int first_dynamic; int status; - int id, first_dynamic; if (!dev) return -ENODEV; @@ -3122,27 +3136,13 @@ int spi_register_controller(struct spi_controller *ctlr) if (status) return status; + if (ctlr->bus_num < 0) + ctlr->bus_num = of_alias_get_id(ctlr->dev.of_node, "spi"); if (ctlr->bus_num >= 0) { /* Devices with a fixed bus num must check-in with the num */ - mutex_lock(&board_lock); - id = idr_alloc(&spi_master_idr, ctlr, ctlr->bus_num, - ctlr->bus_num + 1, GFP_KERNEL); - mutex_unlock(&board_lock); - if (WARN(id < 0, "couldn't get idr")) - return id == -ENOSPC ? -EBUSY : id; - ctlr->bus_num = id; - } else { - /* Allocate dynamic bus number using Linux idr */ - id = of_alias_get_id(ctlr->dev.of_node, "spi"); - if (id >= 0) { - ctlr->bus_num = id; - mutex_lock(&board_lock); - id = idr_alloc(&spi_master_idr, ctlr, ctlr->bus_num, - ctlr->bus_num + 1, GFP_KERNEL); - mutex_unlock(&board_lock); - if (WARN(id < 0, "couldn't get idr")) - return id == -ENOSPC ? -EBUSY : id; - } + status = spi_controller_id_alloc(ctlr, ctlr->bus_num, ctlr->bus_num + 1); + if (status) + return status; } if (ctlr->bus_num < 0) { first_dynamic = of_alias_get_highest_id("spi"); @@ -3151,13 +3151,9 @@ int spi_register_controller(struct spi_controller *ctlr) else first_dynamic++; - mutex_lock(&board_lock); - id = idr_alloc(&spi_master_idr, ctlr, first_dynamic, - 0, GFP_KERNEL); - mutex_unlock(&board_lock); - if (WARN(id < 0, "couldn't get idr")) - return id; - ctlr->bus_num = id; + status = spi_controller_id_alloc(ctlr, first_dynamic, 0); + if (status) + return status; } ctlr->bus_lock_flag = 0; init_completion(&ctlr->xfer_completion); From 2b308e7176e366a52a07a49868e3b1a295e56785 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Mon, 10 Jul 2023 18:49:20 +0300 Subject: [PATCH 040/656] spi: Replace if-else-if by bitops and multiplications Instead of if-else-if, simply call roundup_pow_of_two(BITS_PER_BYTES()). Note, there is no division assumed as compiler may optimize it away. Signed-off-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230710154932.68377-4-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown --- drivers/spi/spi.c | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 6d74218cf38e..125dea8fae00 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -3643,13 +3643,7 @@ int spi_split_transfers_maxwords(struct spi_controller *ctlr, size_t maxsize; int ret; - if (xfer->bits_per_word <= 8) - maxsize = maxwords; - else if (xfer->bits_per_word <= 16) - maxsize = 2 * maxwords; - else - maxsize = 4 * maxwords; - + maxsize = maxwords * roundup_pow_of_two(BITS_TO_BYTES(xfer->bits_per_word)); if (xfer->len > maxsize) { ret = __spi_split_transfer_maxsize(ctlr, msg, &xfer, maxsize, gfp); From f2daa4667fda1aa951b91da0ae9675a5da9d7716 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Mon, 10 Jul 2023 18:49:23 +0300 Subject: [PATCH 041/656] spi: Use sysfs_emit() to instead of s*printf() Follow the advice of the Documentation/filesystems/sysfs.rst and show() should only use sysfs_emit() or sysfs_emit_at() when formatting the value to be returned to user space. Signed-off-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230710154932.68377-7-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown --- drivers/spi/spi.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 125dea8fae00..eec2371ea52e 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -64,7 +64,7 @@ modalias_show(struct device *dev, struct device_attribute *a, char *buf) if (len != -ENODEV) return len; - return sprintf(buf, "%s%s\n", SPI_MODULE_PREFIX, spi->modalias); + return sysfs_emit(buf, "%s%s\n", SPI_MODULE_PREFIX, spi->modalias); } static DEVICE_ATTR_RO(modalias); @@ -89,7 +89,7 @@ static ssize_t driver_override_show(struct device *dev, ssize_t len; device_lock(dev); - len = snprintf(buf, PAGE_SIZE, "%s\n", spi->driver_override ? : ""); + len = sysfs_emit(buf, "%s\n", spi->driver_override ? : ""); device_unlock(dev); return len; } @@ -2814,8 +2814,7 @@ static ssize_t slave_show(struct device *dev, struct device_attribute *attr, struct device *child; child = device_find_any_child(&ctlr->dev); - return sprintf(buf, "%s\n", - child ? to_spi_device(child)->modalias : NULL); + return sysfs_emit(buf, "%s\n", child ? to_spi_device(child)->modalias : NULL); } static ssize_t slave_store(struct device *dev, struct device_attribute *attr, From edf6a864c996f9a9f5299a3b3e574a37e64000c5 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Mon, 10 Jul 2023 18:49:24 +0300 Subject: [PATCH 042/656] spi: Sort headers alphabetically Sorting headers alphabetically helps locating duplicates, and make it easier to figure out where to insert new headers. Signed-off-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230710154932.68377-8-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown --- drivers/spi/spi.c | 42 ++++++++++++++++++++--------------------- include/linux/spi/spi.h | 14 +++++++------- 2 files changed, 28 insertions(+), 28 deletions(-) diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index eec2371ea52e..4c90875e5db1 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -4,36 +4,36 @@ // Copyright (C) 2005 David Brownell // Copyright (C) 2008 Secret Lab Technologies Ltd. -#include -#include -#include +#include #include -#include +#include +#include +#include #include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include #include #include #include -#include +#include +#include +#include +#include +#include +#include +#include #include -#include #include #include -#include -#include -#include -#include -#include -#include #include -#include -#include -#include -#include -#include -#include -#include -#include -#include #define CREATE_TRACE_POINTS #include diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h index 32c94eae8926..21b77bdfac29 100644 --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h @@ -6,18 +6,18 @@ #ifndef __LINUX_SPI_H #define __LINUX_SPI_H +#include #include -#include -#include -#include -#include #include -#include +#include #include +#include +#include +#include +#include +#include #include -#include -#include struct dma_chan; struct software_node; From c397f09e5498994790503a64486213ef85e58db9 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Mon, 10 Jul 2023 18:49:28 +0300 Subject: [PATCH 043/656] spi: Get rid of old SPI_MASTER_NO_TX & SPI_MASTER_NO_RX Convert the users from SPI_MASTER_NO_TX and/or SPI_MASTER_NO_RX to SPI_CONTROLLER_NO_TX and/or SPI_CONTROLLER_NO_RX respectively and kill the not used anymore definitions. Signed-off-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230710154932.68377-12-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown --- drivers/spi/spi-bitbang-txrx.h | 16 ++++++++-------- drivers/spi/spi-bitbang.c | 2 +- drivers/spi/spi-gpio.c | 8 ++++---- drivers/spi/spi-lp8841-rtc.c | 8 ++++---- drivers/spi/spi-xtensa-xtfpga.c | 2 +- include/linux/spi/spi.h | 2 -- 6 files changed, 18 insertions(+), 20 deletions(-) diff --git a/drivers/spi/spi-bitbang-txrx.h b/drivers/spi/spi-bitbang-txrx.h index 2dcbe166df63..0cab48b7875b 100644 --- a/drivers/spi/spi-bitbang-txrx.h +++ b/drivers/spi/spi-bitbang-txrx.h @@ -57,7 +57,7 @@ bitbang_txrx_be_cpha0(struct spi_device *spi, for (word <<= (32 - bits); likely(bits); bits--) { /* setup MSB (to slave) on trailing edge */ - if ((flags & SPI_MASTER_NO_TX) == 0) { + if ((flags & SPI_CONTROLLER_NO_TX) == 0) { if ((word & (1 << 31)) != oldbit) { setmosi(spi, word & (1 << 31)); oldbit = word & (1 << 31); @@ -70,7 +70,7 @@ bitbang_txrx_be_cpha0(struct spi_device *spi, /* sample MSB (from slave) on leading edge */ word <<= 1; - if ((flags & SPI_MASTER_NO_RX) == 0) + if ((flags & SPI_CONTROLLER_NO_RX) == 0) word |= getmiso(spi); setsck(spi, cpol); } @@ -90,7 +90,7 @@ bitbang_txrx_be_cpha1(struct spi_device *spi, /* setup MSB (to slave) on leading edge */ setsck(spi, !cpol); - if ((flags & SPI_MASTER_NO_TX) == 0) { + if ((flags & SPI_CONTROLLER_NO_TX) == 0) { if ((word & (1 << 31)) != oldbit) { setmosi(spi, word & (1 << 31)); oldbit = word & (1 << 31); @@ -103,7 +103,7 @@ bitbang_txrx_be_cpha1(struct spi_device *spi, /* sample MSB (from slave) on trailing edge */ word <<= 1; - if ((flags & SPI_MASTER_NO_RX) == 0) + if ((flags & SPI_CONTROLLER_NO_RX) == 0) word |= getmiso(spi); } return word; @@ -122,7 +122,7 @@ bitbang_txrx_le_cpha0(struct spi_device *spi, for (; likely(bits); bits--) { /* setup LSB (to slave) on trailing edge */ - if ((flags & SPI_MASTER_NO_TX) == 0) { + if ((flags & SPI_CONTROLLER_NO_TX) == 0) { if ((word & 1) != oldbit) { setmosi(spi, word & 1); oldbit = word & 1; @@ -135,7 +135,7 @@ bitbang_txrx_le_cpha0(struct spi_device *spi, /* sample LSB (from slave) on leading edge */ word >>= 1; - if ((flags & SPI_MASTER_NO_RX) == 0) + if ((flags & SPI_CONTROLLER_NO_RX) == 0) word |= getmiso(spi) << rxbit; setsck(spi, cpol); } @@ -156,7 +156,7 @@ bitbang_txrx_le_cpha1(struct spi_device *spi, /* setup LSB (to slave) on leading edge */ setsck(spi, !cpol); - if ((flags & SPI_MASTER_NO_TX) == 0) { + if ((flags & SPI_CONTROLLER_NO_TX) == 0) { if ((word & 1) != oldbit) { setmosi(spi, word & 1); oldbit = word & 1; @@ -169,7 +169,7 @@ bitbang_txrx_le_cpha1(struct spi_device *spi, /* sample LSB (from slave) on trailing edge */ word >>= 1; - if ((flags & SPI_MASTER_NO_RX) == 0) + if ((flags & SPI_CONTROLLER_NO_RX) == 0) word |= getmiso(spi) << rxbit; } return word; diff --git a/drivers/spi/spi-bitbang.c b/drivers/spi/spi-bitbang.c index 27d0087f8688..862f209cada1 100644 --- a/drivers/spi/spi-bitbang.c +++ b/drivers/spi/spi-bitbang.c @@ -248,7 +248,7 @@ static int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t) if (spi->mode & SPI_3WIRE) { unsigned flags; - flags = t->tx_buf ? SPI_MASTER_NO_RX : SPI_MASTER_NO_TX; + flags = t->tx_buf ? SPI_CONTROLLER_NO_RX : SPI_CONTROLLER_NO_TX; return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t, flags); } return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t, 0); diff --git a/drivers/spi/spi-gpio.c b/drivers/spi/spi-gpio.c index 092afc7679d4..85e149ec2910 100644 --- a/drivers/spi/spi-gpio.c +++ b/drivers/spi/spi-gpio.c @@ -170,7 +170,7 @@ static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi, /* * These functions do not call setmosi or getmiso if respective flag - * (SPI_MASTER_NO_RX or SPI_MASTER_NO_TX) is set, so they are safe to + * (SPI_CONTROLLER_NO_RX or SPI_CONTROLLER_NO_TX) is set, so they are safe to * call when such pin is not present or defined in the controller. * A separate set of callbacks is defined to get highest possible * speed in the generic case (when both MISO and MOSI lines are @@ -416,11 +416,11 @@ static int spi_gpio_probe(struct platform_device *pdev) if (!spi_gpio->mosi) { /* HW configuration without MOSI pin * - * No setting SPI_MASTER_NO_RX here - if there is only + * No setting SPI_CONTROLLER_NO_RX here - if there is only * a MOSI pin connected the host can still do RX by * changing the direction of the line. */ - master->flags = SPI_MASTER_NO_TX; + master->flags = SPI_CONTROLLER_NO_TX; } master->bus_num = pdev->id; @@ -438,7 +438,7 @@ static int spi_gpio_probe(struct platform_device *pdev) bb->chipselect = spi_gpio_chipselect; bb->set_line_direction = spi_gpio_set_direction; - if (master->flags & SPI_MASTER_NO_TX) { + if (master->flags & SPI_CONTROLLER_NO_TX) { bb->txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0; bb->txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1; bb->txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2; diff --git a/drivers/spi/spi-lp8841-rtc.c b/drivers/spi/spi-lp8841-rtc.c index 2d436541d6c2..ccaa7a946359 100644 --- a/drivers/spi/spi-lp8841-rtc.c +++ b/drivers/spi/spi-lp8841-rtc.c @@ -75,14 +75,14 @@ bitbang_txrx_be_cpha0_lsb(struct spi_lp8841_rtc *data, for (; likely(bits); bits--) { /* setup LSB (to slave) on leading edge */ - if ((flags & SPI_MASTER_NO_TX) == 0) + if ((flags & SPI_CONTROLLER_NO_TX) == 0) setmosi(data, (word & 1)); usleep_range(usecs, usecs + 1); /* T(setup) */ /* sample LSB (from slave) on trailing edge */ word >>= 1; - if ((flags & SPI_MASTER_NO_RX) == 0) + if ((flags & SPI_CONTROLLER_NO_RX) == 0) word |= (getmiso(data) << 31); setsck(data, !cpol); @@ -113,7 +113,7 @@ spi_lp8841_rtc_transfer_one(struct spi_master *master, while (likely(count > 0)) { word = *tx++; bitbang_txrx_be_cpha0_lsb(data, 1, 0, - SPI_MASTER_NO_RX, word, 8); + SPI_CONTROLLER_NO_RX, word, 8); count--; } } else if (rx) { @@ -121,7 +121,7 @@ spi_lp8841_rtc_transfer_one(struct spi_master *master, writeb(data->state, data->iomem); while (likely(count > 0)) { word = bitbang_txrx_be_cpha0_lsb(data, 1, 0, - SPI_MASTER_NO_TX, word, 8); + SPI_CONTROLLER_NO_TX, word, 8); *rx++ = word; count--; } diff --git a/drivers/spi/spi-xtensa-xtfpga.c b/drivers/spi/spi-xtensa-xtfpga.c index 24dc845b940e..dbd85d7a1526 100644 --- a/drivers/spi/spi-xtensa-xtfpga.c +++ b/drivers/spi/spi-xtensa-xtfpga.c @@ -87,7 +87,7 @@ static int xtfpga_spi_probe(struct platform_device *pdev) if (!master) return -ENOMEM; - master->flags = SPI_MASTER_NO_RX; + master->flags = SPI_CONTROLLER_NO_RX; master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 16); master->bus_num = pdev->dev.id; master->dev.of_node = pdev->dev.of_node; diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h index 21b77bdfac29..debb54f37603 100644 --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h @@ -1623,8 +1623,6 @@ spi_transfer_is_last(struct spi_controller *ctlr, struct spi_transfer *xfer) #define spi_master spi_controller #define SPI_MASTER_HALF_DUPLEX SPI_CONTROLLER_HALF_DUPLEX -#define SPI_MASTER_NO_RX SPI_CONTROLLER_NO_RX -#define SPI_MASTER_NO_TX SPI_CONTROLLER_NO_TX #define SPI_MASTER_MUST_RX SPI_CONTROLLER_MUST_RX #define SPI_MASTER_MUST_TX SPI_CONTROLLER_MUST_TX From 90366cd60133a9f5b6a2f31360367c658585e125 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Mon, 10 Jul 2023 18:49:29 +0300 Subject: [PATCH 044/656] spi: Get rid of old SPI_MASTER_MUST_TX & SPI_MASTER_MUST_RX Convert the users from SPI_MASTER_MUST_TX and/or SPI_MASTER_MUST_RX to SPI_CONTROLLER_MUST_TX and/or SPI_CONTROLLER_MUST_RX respectively and kill the not used anymore definitions. Signed-off-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230710154932.68377-13-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown --- drivers/spi/spi-at91-usart.c | 2 +- drivers/spi/spi-atmel.c | 2 +- drivers/spi/spi-davinci.c | 2 +- drivers/spi/spi-fsl-lpspi.c | 2 +- drivers/spi/spi-meson-spicc.c | 2 +- drivers/spi/spi-mt65xx.c | 2 +- drivers/spi/spi-pci1xxxx.c | 2 +- drivers/spi/spi-pic32.c | 2 +- drivers/spi/spi-rb4xx.c | 2 +- drivers/spi/spi-slave-mt27xx.c | 2 +- drivers/spi/spi-stm32.c | 2 +- include/linux/spi/spi.h | 2 -- 12 files changed, 11 insertions(+), 13 deletions(-) diff --git a/drivers/spi/spi-at91-usart.c b/drivers/spi/spi-at91-usart.c index 7854d9790fe9..7dfe2b6c2990 100644 --- a/drivers/spi/spi-at91-usart.c +++ b/drivers/spi/spi-at91-usart.c @@ -527,7 +527,7 @@ static int at91_usart_spi_probe(struct platform_device *pdev) controller->dev.of_node = pdev->dev.parent->of_node; controller->bits_per_word_mask = SPI_BPW_MASK(8); controller->setup = at91_usart_spi_setup; - controller->flags = SPI_MASTER_MUST_RX | SPI_MASTER_MUST_TX; + controller->flags = SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX; controller->transfer_one = at91_usart_spi_transfer_one; controller->prepare_message = at91_usart_spi_prepare_message; controller->unprepare_message = at91_usart_spi_unprepare_message; diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c index 152cd6773403..0865993005b2 100644 --- a/drivers/spi/spi-atmel.c +++ b/drivers/spi/spi-atmel.c @@ -1475,7 +1475,7 @@ static int atmel_spi_probe(struct platform_device *pdev) host->bus_num = pdev->id; host->num_chipselect = 4; host->setup = atmel_spi_setup; - host->flags = (SPI_MASTER_MUST_RX | SPI_MASTER_MUST_TX | + host->flags = (SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX | SPI_MASTER_GPIO_SS); host->transfer_one = atmel_spi_one_transfer; host->set_cs = atmel_spi_set_cs; diff --git a/drivers/spi/spi-davinci.c b/drivers/spi/spi-davinci.c index b04811c911e2..014392459d5e 100644 --- a/drivers/spi/spi-davinci.c +++ b/drivers/spi/spi-davinci.c @@ -939,7 +939,7 @@ static int davinci_spi_probe(struct platform_device *pdev) master->bus_num = pdev->id; master->num_chipselect = pdata->num_chipselect; master->bits_per_word_mask = SPI_BPW_RANGE_MASK(2, 16); - master->flags = SPI_MASTER_MUST_RX | SPI_MASTER_GPIO_SS; + master->flags = SPI_CONTROLLER_MUST_RX | SPI_MASTER_GPIO_SS; master->setup = davinci_spi_setup; master->cleanup = davinci_spi_cleanup; master->can_dma = davinci_spi_can_dma; diff --git a/drivers/spi/spi-fsl-lpspi.c b/drivers/spi/spi-fsl-lpspi.c index fb68c72df171..1c907d5d5bb3 100644 --- a/drivers/spi/spi-fsl-lpspi.c +++ b/drivers/spi/spi-fsl-lpspi.c @@ -856,7 +856,7 @@ static int fsl_lpspi_probe(struct platform_device *pdev) controller->prepare_transfer_hardware = lpspi_prepare_xfer_hardware; controller->unprepare_transfer_hardware = lpspi_unprepare_xfer_hardware; controller->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; - controller->flags = SPI_MASTER_MUST_RX | SPI_MASTER_MUST_TX; + controller->flags = SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX; controller->dev.of_node = pdev->dev.of_node; controller->bus_num = pdev->id; controller->num_chipselect = fsl_lpspi->num_cs; diff --git a/drivers/spi/spi-meson-spicc.c b/drivers/spi/spi-meson-spicc.c index 141562c882f1..7a9eba35ac38 100644 --- a/drivers/spi/spi-meson-spicc.c +++ b/drivers/spi/spi-meson-spicc.c @@ -864,7 +864,7 @@ static int meson_spicc_probe(struct platform_device *pdev) SPI_BPW_MASK(24) | SPI_BPW_MASK(16) | SPI_BPW_MASK(8); - master->flags = (SPI_MASTER_MUST_RX | SPI_MASTER_MUST_TX); + master->flags = (SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX); master->min_speed_hz = spicc->data->min_speed_hz; master->max_speed_hz = spicc->data->max_speed_hz; master->setup = meson_spicc_setup; diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c index 39272ad6641b..0757985947dd 100644 --- a/drivers/spi/spi-mt65xx.c +++ b/drivers/spi/spi-mt65xx.c @@ -1142,7 +1142,7 @@ static int mtk_spi_probe(struct platform_device *pdev) master->mode_bits |= SPI_CS_HIGH; if (mdata->dev_comp->must_tx) - master->flags = SPI_MASTER_MUST_TX; + master->flags = SPI_CONTROLLER_MUST_TX; if (mdata->dev_comp->ipm_design) master->mode_bits |= SPI_LOOP | SPI_RX_DUAL | SPI_TX_DUAL | SPI_RX_QUAD | SPI_TX_QUAD; diff --git a/drivers/spi/spi-pci1xxxx.c b/drivers/spi/spi-pci1xxxx.c index 4445d82409d6..d23c42839da1 100644 --- a/drivers/spi/spi-pci1xxxx.c +++ b/drivers/spi/spi-pci1xxxx.c @@ -365,7 +365,7 @@ static int pci1xxxx_spi_probe(struct pci_dev *pdev, const struct pci_device_id * spi_host->bits_per_word_mask = SPI_BPW_MASK(8); spi_host->max_speed_hz = PCI1XXXX_SPI_MAX_CLOCK_HZ; spi_host->min_speed_hz = PCI1XXXX_SPI_MIN_CLOCK_HZ; - spi_host->flags = SPI_MASTER_MUST_TX; + spi_host->flags = SPI_CONTROLLER_MUST_TX; spi_master_set_devdata(spi_host, spi_sub_ptr); ret = devm_spi_register_master(dev, spi_host); if (ret) diff --git a/drivers/spi/spi-pic32.c b/drivers/spi/spi-pic32.c index f2af5e653f3d..e9b4c9cb97fb 100644 --- a/drivers/spi/spi-pic32.c +++ b/drivers/spi/spi-pic32.c @@ -773,7 +773,7 @@ static int pic32_spi_probe(struct platform_device *pdev) master->max_speed_hz = clk_get_rate(pic32s->clk); master->setup = pic32_spi_setup; master->cleanup = pic32_spi_cleanup; - master->flags = SPI_MASTER_MUST_TX | SPI_MASTER_MUST_RX; + master->flags = SPI_CONTROLLER_MUST_TX | SPI_CONTROLLER_MUST_RX; master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16) | SPI_BPW_MASK(32); master->transfer_one = pic32_spi_one_transfer; diff --git a/drivers/spi/spi-rb4xx.c b/drivers/spi/spi-rb4xx.c index 5073736d3d1f..c817889a7797 100644 --- a/drivers/spi/spi-rb4xx.c +++ b/drivers/spi/spi-rb4xx.c @@ -156,7 +156,7 @@ static int rb4xx_spi_probe(struct platform_device *pdev) master->num_chipselect = 3; master->mode_bits = SPI_TX_DUAL; master->bits_per_word_mask = SPI_BPW_MASK(8); - master->flags = SPI_MASTER_MUST_TX; + master->flags = SPI_CONTROLLER_MUST_TX; master->transfer_one = rb4xx_transfer_one; master->set_cs = rb4xx_set_cs; diff --git a/drivers/spi/spi-slave-mt27xx.c b/drivers/spi/spi-slave-mt27xx.c index 4e4d426bfb43..6d6772974783 100644 --- a/drivers/spi/spi-slave-mt27xx.c +++ b/drivers/spi/spi-slave-mt27xx.c @@ -414,7 +414,7 @@ static int mtk_spi_slave_probe(struct platform_device *pdev) mdata->dev_comp = of_id->data; if (mdata->dev_comp->must_rx) - ctlr->flags = SPI_MASTER_MUST_RX; + ctlr->flags = SPI_CONTROLLER_MUST_RX; platform_set_drvdata(pdev, ctlr); diff --git a/drivers/spi/spi-stm32.c b/drivers/spi/spi-stm32.c index 6d10fa4ab783..423212bd0675 100644 --- a/drivers/spi/spi-stm32.c +++ b/drivers/spi/spi-stm32.c @@ -1750,7 +1750,7 @@ static const struct stm32_spi_cfg stm32f4_spi_cfg = { .baud_rate_div_min = STM32F4_SPI_BR_DIV_MIN, .baud_rate_div_max = STM32F4_SPI_BR_DIV_MAX, .has_fifo = false, - .flags = SPI_MASTER_MUST_TX, + .flags = SPI_CONTROLLER_MUST_TX, }; static const struct stm32_spi_cfg stm32h7_spi_cfg = { diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h index debb54f37603..becad31aeea2 100644 --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h @@ -1623,8 +1623,6 @@ spi_transfer_is_last(struct spi_controller *ctlr, struct spi_transfer *xfer) #define spi_master spi_controller #define SPI_MASTER_HALF_DUPLEX SPI_CONTROLLER_HALF_DUPLEX -#define SPI_MASTER_MUST_RX SPI_CONTROLLER_MUST_RX -#define SPI_MASTER_MUST_TX SPI_CONTROLLER_MUST_TX #define spi_master_get_devdata(_ctlr) spi_controller_get_devdata(_ctlr) #define spi_master_set_devdata(_ctlr, _data) \ From 82238d2cbd99ebd09dda48fb7c1c8802097da6a2 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Mon, 10 Jul 2023 18:49:30 +0300 Subject: [PATCH 045/656] spi: Rename SPI_MASTER_GPIO_SS to SPI_CONTROLLER_GPIO_SS Rename SPI_MASTER_GPIO_SS to SPI_CONTROLLER_GPIO_SS and convert the users to SPI_CONTROLLER_GPIO_SS to follow the new naming shema. Signed-off-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230710154932.68377-14-andriy.shevchenko@linux.intel.com Reviewed-by: Serge Semin Signed-off-by: Mark Brown --- drivers/spi/spi-ath79.c | 2 +- drivers/spi/spi-atmel.c | 2 +- drivers/spi/spi-bitbang.c | 6 +++--- drivers/spi/spi-davinci.c | 2 +- drivers/spi/spi-dw-core.c | 2 +- drivers/spi/spi-gpio.c | 2 +- drivers/spi/spi-imx.c | 2 +- drivers/spi/spi-orion.c | 2 +- drivers/spi/spi-rockchip.c | 2 +- drivers/spi/spi-sifive.c | 2 +- drivers/spi/spi.c | 4 ++-- include/linux/spi/spi.h | 3 +-- 12 files changed, 15 insertions(+), 16 deletions(-) diff --git a/drivers/spi/spi-ath79.c b/drivers/spi/spi-ath79.c index d3dd21386f12..1b6d977d111c 100644 --- a/drivers/spi/spi-ath79.c +++ b/drivers/spi/spi-ath79.c @@ -185,7 +185,7 @@ static int ath79_spi_probe(struct platform_device *pdev) host->use_gpio_descriptors = true; host->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); - host->flags = SPI_MASTER_GPIO_SS; + host->flags = SPI_CONTROLLER_GPIO_SS; host->num_chipselect = 3; host->mem_ops = &ath79_mem_ops; diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c index 0865993005b2..9674499ed0a6 100644 --- a/drivers/spi/spi-atmel.c +++ b/drivers/spi/spi-atmel.c @@ -1476,7 +1476,7 @@ static int atmel_spi_probe(struct platform_device *pdev) host->num_chipselect = 4; host->setup = atmel_spi_setup; host->flags = (SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX | - SPI_MASTER_GPIO_SS); + SPI_CONTROLLER_GPIO_SS); host->transfer_one = atmel_spi_one_transfer; host->set_cs = atmel_spi_set_cs; host->cleanup = atmel_spi_cleanup; diff --git a/drivers/spi/spi-bitbang.c b/drivers/spi/spi-bitbang.c index 862f209cada1..ecd44016c197 100644 --- a/drivers/spi/spi-bitbang.c +++ b/drivers/spi/spi-bitbang.c @@ -349,11 +349,11 @@ int spi_bitbang_init(struct spi_bitbang *bitbang) /* * We only need the chipselect callback if we are actually using it. * If we just use GPIO descriptors, it is surplus. If the - * SPI_MASTER_GPIO_SS flag is set, we always need to call the + * SPI_CONTROLLER_GPIO_SS flag is set, we always need to call the * driver-specific chipselect routine. */ custom_cs = (!master->use_gpio_descriptors || - (master->flags & SPI_MASTER_GPIO_SS)); + (master->flags & SPI_CONTROLLER_GPIO_SS)); if (custom_cs && !bitbang->chipselect) return -EINVAL; @@ -371,7 +371,7 @@ int spi_bitbang_init(struct spi_bitbang *bitbang) master->transfer_one = spi_bitbang_transfer_one; /* * When using GPIO descriptors, the ->set_cs() callback doesn't even - * get called unless SPI_MASTER_GPIO_SS is set. + * get called unless SPI_CONTROLLER_GPIO_SS is set. */ if (custom_cs) master->set_cs = spi_bitbang_set_cs; diff --git a/drivers/spi/spi-davinci.c b/drivers/spi/spi-davinci.c index 014392459d5e..7ea2ac053052 100644 --- a/drivers/spi/spi-davinci.c +++ b/drivers/spi/spi-davinci.c @@ -939,7 +939,7 @@ static int davinci_spi_probe(struct platform_device *pdev) master->bus_num = pdev->id; master->num_chipselect = pdata->num_chipselect; master->bits_per_word_mask = SPI_BPW_RANGE_MASK(2, 16); - master->flags = SPI_CONTROLLER_MUST_RX | SPI_MASTER_GPIO_SS; + master->flags = SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_GPIO_SS; master->setup = davinci_spi_setup; master->cleanup = davinci_spi_cleanup; master->can_dma = davinci_spi_can_dma; diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c index a8ba41ad4541..45f5acc26b1d 100644 --- a/drivers/spi/spi-dw-core.c +++ b/drivers/spi/spi-dw-core.c @@ -932,7 +932,7 @@ int dw_spi_add_host(struct device *dev, struct dw_spi *dws) if (dws->mem_ops.exec_op) master->mem_ops = &dws->mem_ops; master->max_speed_hz = dws->max_freq; - master->flags = SPI_MASTER_GPIO_SS; + master->flags = SPI_CONTROLLER_GPIO_SS; master->auto_runtime_pm = true; /* Get default rx sample delay */ diff --git a/drivers/spi/spi-gpio.c b/drivers/spi/spi-gpio.c index 85e149ec2910..612db477ad12 100644 --- a/drivers/spi/spi-gpio.c +++ b/drivers/spi/spi-gpio.c @@ -434,7 +434,7 @@ static int spi_gpio_probe(struct platform_device *pdev) * line, that we need to do on selection. This makes the local * callback for chipselect always get called. */ - master->flags |= SPI_MASTER_GPIO_SS; + master->flags |= SPI_CONTROLLER_GPIO_SS; bb->chipselect = spi_gpio_chipselect; bb->set_line_direction = spi_gpio_set_direction; diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c index 528ae46c087f..8d97f2b32c2b 100644 --- a/drivers/spi/spi-imx.c +++ b/drivers/spi/spi-imx.c @@ -1779,7 +1779,7 @@ static int spi_imx_probe(struct platform_device *pdev) if (is_imx51_ecspi(spi_imx) || is_imx53_ecspi(spi_imx)) { controller->max_native_cs = 4; - controller->flags |= SPI_MASTER_GPIO_SS; + controller->flags |= SPI_CONTROLLER_GPIO_SS; } spi_imx->spi_drctl = spi_drctl; diff --git a/drivers/spi/spi-orion.c b/drivers/spi/spi-orion.c index ad9e83e34297..4882aafd0505 100644 --- a/drivers/spi/spi-orion.c +++ b/drivers/spi/spi-orion.c @@ -677,7 +677,7 @@ static int orion_spi_probe(struct platform_device *pdev) master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16); master->auto_runtime_pm = true; master->use_gpio_descriptors = true; - master->flags = SPI_MASTER_GPIO_SS; + master->flags = SPI_CONTROLLER_GPIO_SS; platform_set_drvdata(pdev, master); diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c index 143ede958ac1..a37943847e81 100644 --- a/drivers/spi/spi-rockchip.c +++ b/drivers/spi/spi-rockchip.c @@ -858,7 +858,7 @@ static int rockchip_spi_probe(struct platform_device *pdev) ctlr->mode_bits |= SPI_NO_CS; ctlr->slave_abort = rockchip_spi_slave_abort; } else { - ctlr->flags = SPI_MASTER_GPIO_SS; + ctlr->flags = SPI_CONTROLLER_GPIO_SS; ctlr->max_native_cs = ROCKCHIP_SPI_MAX_CS_NUM; /* * rk spi0 has two native cs, spi1..5 one cs only diff --git a/drivers/spi/spi-sifive.c b/drivers/spi/spi-sifive.c index dae9e097c333..2f77dae85386 100644 --- a/drivers/spi/spi-sifive.c +++ b/drivers/spi/spi-sifive.c @@ -379,7 +379,7 @@ static int sifive_spi_probe(struct platform_device *pdev) * we need to "left-align" the bits (unless SPI_LSB_FIRST) */ master->bits_per_word_mask = SPI_BPW_MASK(8); - master->flags = SPI_CONTROLLER_MUST_TX | SPI_MASTER_GPIO_SS; + master->flags = SPI_CONTROLLER_MUST_TX | SPI_CONTROLLER_GPIO_SS; master->prepare_message = sifive_spi_prepare_message; master->set_cs = sifive_spi_set_cs; master->transfer_one = sifive_spi_transfer_one; diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 4c90875e5db1..d9667f3f151e 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -1006,7 +1006,7 @@ static void spi_set_cs(struct spi_device *spi, bool enable, bool force) gpiod_set_value_cansleep(spi_get_csgpiod(spi, 0), activate); } /* Some SPI masters need both GPIO CS & slave_select */ - if ((spi->controller->flags & SPI_MASTER_GPIO_SS) && + if ((spi->controller->flags & SPI_CONTROLLER_GPIO_SS) && spi->controller->set_cs) spi->controller->set_cs(spi, !enable); } else if (spi->controller->set_cs) { @@ -3052,7 +3052,7 @@ static int spi_get_gpio_descs(struct spi_controller *ctlr) ctlr->unused_native_cs = ffs(~native_cs_mask) - 1; - if ((ctlr->flags & SPI_MASTER_GPIO_SS) && num_cs_gpios && + if ((ctlr->flags & SPI_CONTROLLER_GPIO_SS) && num_cs_gpios && ctlr->max_native_cs && ctlr->unused_native_cs >= ctlr->max_native_cs) { dev_err(dev, "No unused native chip select available\n"); return -EINVAL; diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h index becad31aeea2..39a2e6108694 100644 --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h @@ -562,8 +562,7 @@ struct spi_controller { #define SPI_CONTROLLER_NO_TX BIT(2) /* Can't do buffer write */ #define SPI_CONTROLLER_MUST_RX BIT(3) /* Requires rx */ #define SPI_CONTROLLER_MUST_TX BIT(4) /* Requires tx */ - -#define SPI_MASTER_GPIO_SS BIT(5) /* GPIO CS must select slave */ +#define SPI_CONTROLLER_GPIO_SS BIT(5) /* GPIO CS must select slave */ /* Flag indicating if the allocation of this struct is devres-managed */ bool devm_allocated; From 7a2b552c8e0e5bb280558f6c120140f5f06323bc Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Mon, 10 Jul 2023 18:49:31 +0300 Subject: [PATCH 046/656] spi: Convert to SPI_CONTROLLER_HALF_DUPLEX Convert the users under SPI subsystem to SPI_CONTROLLER_HALF_DUPLEX. Signed-off-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230710154932.68377-15-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown --- drivers/spi/spi-amd.c | 2 +- drivers/spi/spi-cavium-thunderx.c | 2 +- drivers/spi/spi-falcon.c | 2 +- drivers/spi/spi-lp8841-rtc.c | 2 +- drivers/spi/spi-mxs.c | 2 +- drivers/spi/spi-omap-uwire.c | 2 +- drivers/spi/spi-pic32-sqi.c | 2 +- drivers/spi/spi-qcom-qspi.c | 2 +- drivers/spi/spi-rockchip-sfc.c | 2 +- drivers/spi/spi-sprd-adi.c | 2 +- drivers/spi/spi-ti-qspi.c | 2 +- drivers/spi/spi-xcomm.c | 2 +- 12 files changed, 12 insertions(+), 12 deletions(-) diff --git a/drivers/spi/spi-amd.c b/drivers/spi/spi-amd.c index fecead757a3c..b19766571f28 100644 --- a/drivers/spi/spi-amd.c +++ b/drivers/spi/spi-amd.c @@ -404,7 +404,7 @@ static int amd_spi_probe(struct platform_device *pdev) master->bus_num = 0; master->num_chipselect = 4; master->mode_bits = 0; - master->flags = SPI_MASTER_HALF_DUPLEX; + master->flags = SPI_CONTROLLER_HALF_DUPLEX; master->max_speed_hz = AMD_SPI_MAX_HZ; master->min_speed_hz = AMD_SPI_MIN_HZ; master->setup = amd_spi_master_setup; diff --git a/drivers/spi/spi-cavium-thunderx.c b/drivers/spi/spi-cavium-thunderx.c index 60c0d6934654..535f7eb9fa69 100644 --- a/drivers/spi/spi-cavium-thunderx.c +++ b/drivers/spi/spi-cavium-thunderx.c @@ -64,7 +64,7 @@ static int thunderx_spi_probe(struct pci_dev *pdev, p->sys_freq = SYS_FREQ_DEFAULT; dev_info(dev, "Set system clock to %u\n", p->sys_freq); - master->flags = SPI_MASTER_HALF_DUPLEX; + master->flags = SPI_CONTROLLER_HALF_DUPLEX; master->num_chipselect = 4; master->mode_bits = SPI_CPHA | SPI_CPOL | SPI_CS_HIGH | SPI_LSB_FIRST | SPI_3WIRE; diff --git a/drivers/spi/spi-falcon.c b/drivers/spi/spi-falcon.c index 4c103dff0d44..8a8414cbb400 100644 --- a/drivers/spi/spi-falcon.c +++ b/drivers/spi/spi-falcon.c @@ -401,7 +401,7 @@ static int falcon_sflash_probe(struct platform_device *pdev) priv->master = master; master->mode_bits = SPI_MODE_3; - master->flags = SPI_MASTER_HALF_DUPLEX; + master->flags = SPI_CONTROLLER_HALF_DUPLEX; master->setup = falcon_sflash_setup; master->transfer_one_message = falcon_sflash_xfer_one; master->dev.of_node = pdev->dev.of_node; diff --git a/drivers/spi/spi-lp8841-rtc.c b/drivers/spi/spi-lp8841-rtc.c index ccaa7a946359..c6810720b3b5 100644 --- a/drivers/spi/spi-lp8841-rtc.c +++ b/drivers/spi/spi-lp8841-rtc.c @@ -191,7 +191,7 @@ spi_lp8841_rtc_probe(struct platform_device *pdev) return -ENOMEM; platform_set_drvdata(pdev, master); - master->flags = SPI_MASTER_HALF_DUPLEX; + master->flags = SPI_CONTROLLER_HALF_DUPLEX; master->mode_bits = SPI_CS_HIGH | SPI_3WIRE | SPI_LSB_FIRST; master->bus_num = pdev->id; diff --git a/drivers/spi/spi-mxs.c b/drivers/spi/spi-mxs.c index 963a53dd680b..cd0e7ae07162 100644 --- a/drivers/spi/spi-mxs.c +++ b/drivers/spi/spi-mxs.c @@ -572,7 +572,7 @@ static int mxs_spi_probe(struct platform_device *pdev) master->mode_bits = SPI_CPOL | SPI_CPHA; master->num_chipselect = 3; master->dev.of_node = np; - master->flags = SPI_MASTER_HALF_DUPLEX; + master->flags = SPI_CONTROLLER_HALF_DUPLEX; master->auto_runtime_pm = true; spi = spi_master_get_devdata(master); diff --git a/drivers/spi/spi-omap-uwire.c b/drivers/spi/spi-omap-uwire.c index 902d2e0c1f2f..f89aa9e52c23 100644 --- a/drivers/spi/spi-omap-uwire.c +++ b/drivers/spi/spi-omap-uwire.c @@ -486,7 +486,7 @@ static int uwire_probe(struct platform_device *pdev) /* the spi->mode bits understood by this driver: */ master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 16); - master->flags = SPI_MASTER_HALF_DUPLEX; + master->flags = SPI_CONTROLLER_HALF_DUPLEX; master->bus_num = 2; /* "official" */ master->num_chipselect = 4; diff --git a/drivers/spi/spi-pic32-sqi.c b/drivers/spi/spi-pic32-sqi.c index 51dfb49523f3..5cbebcf26a2a 100644 --- a/drivers/spi/spi-pic32-sqi.c +++ b/drivers/spi/spi-pic32-sqi.c @@ -648,7 +648,7 @@ static int pic32_sqi_probe(struct platform_device *pdev) master->dev.of_node = pdev->dev.of_node; master->mode_bits = SPI_MODE_3 | SPI_MODE_0 | SPI_TX_DUAL | SPI_RX_DUAL | SPI_TX_QUAD | SPI_RX_QUAD; - master->flags = SPI_MASTER_HALF_DUPLEX; + master->flags = SPI_CONTROLLER_HALF_DUPLEX; master->can_dma = pic32_sqi_can_dma; master->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 32); master->transfer_one_message = pic32_sqi_one_message; diff --git a/drivers/spi/spi-qcom-qspi.c b/drivers/spi/spi-qcom-qspi.c index a8a683d6145c..5a98c52bad32 100644 --- a/drivers/spi/spi-qcom-qspi.c +++ b/drivers/spi/spi-qcom-qspi.c @@ -724,7 +724,7 @@ static int qcom_qspi_probe(struct platform_device *pdev) master->mode_bits = SPI_MODE_0 | SPI_TX_DUAL | SPI_RX_DUAL | SPI_TX_QUAD | SPI_RX_QUAD; - master->flags = SPI_MASTER_HALF_DUPLEX; + master->flags = SPI_CONTROLLER_HALF_DUPLEX; master->prepare_message = qcom_qspi_prepare_message; master->transfer_one = qcom_qspi_transfer_one; master->handle_err = qcom_qspi_handle_err; diff --git a/drivers/spi/spi-rockchip-sfc.c b/drivers/spi/spi-rockchip-sfc.c index 583f4187f030..bd550e76ab3d 100644 --- a/drivers/spi/spi-rockchip-sfc.c +++ b/drivers/spi/spi-rockchip-sfc.c @@ -565,7 +565,7 @@ static int rockchip_sfc_probe(struct platform_device *pdev) if (!master) return -ENOMEM; - master->flags = SPI_MASTER_HALF_DUPLEX; + master->flags = SPI_CONTROLLER_HALF_DUPLEX; master->mem_ops = &rockchip_sfc_mem_ops; master->dev.of_node = pdev->dev.of_node; master->mode_bits = SPI_TX_QUAD | SPI_TX_DUAL | SPI_RX_QUAD | SPI_RX_DUAL; diff --git a/drivers/spi/spi-sprd-adi.c b/drivers/spi/spi-sprd-adi.c index 22e39c4c12c4..94d16aadfa44 100644 --- a/drivers/spi/spi-sprd-adi.c +++ b/drivers/spi/spi-sprd-adi.c @@ -580,7 +580,7 @@ static int sprd_adi_probe(struct platform_device *pdev) ctlr->dev.of_node = pdev->dev.of_node; ctlr->bus_num = pdev->id; ctlr->num_chipselect = num_chipselect; - ctlr->flags = SPI_MASTER_HALF_DUPLEX; + ctlr->flags = SPI_CONTROLLER_HALF_DUPLEX; ctlr->bits_per_word_mask = 0; ctlr->transfer_one = sprd_adi_transfer_one; diff --git a/drivers/spi/spi-ti-qspi.c b/drivers/spi/spi-ti-qspi.c index 5914335ff63d..bf4b40289bee 100644 --- a/drivers/spi/spi-ti-qspi.c +++ b/drivers/spi/spi-ti-qspi.c @@ -770,7 +770,7 @@ static int ti_qspi_probe(struct platform_device *pdev) master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_RX_DUAL | SPI_RX_QUAD; - master->flags = SPI_MASTER_HALF_DUPLEX; + master->flags = SPI_CONTROLLER_HALF_DUPLEX; master->setup = ti_qspi_setup; master->auto_runtime_pm = true; master->transfer_one_message = ti_qspi_start_transfer_one; diff --git a/drivers/spi/spi-xcomm.c b/drivers/spi/spi-xcomm.c index ae6218bcd02a..a3d57554f5ba 100644 --- a/drivers/spi/spi-xcomm.c +++ b/drivers/spi/spi-xcomm.c @@ -218,7 +218,7 @@ static int spi_xcomm_probe(struct i2c_client *i2c) master->num_chipselect = 16; master->mode_bits = SPI_CPHA | SPI_CPOL | SPI_3WIRE; master->bits_per_word_mask = SPI_BPW_MASK(8); - master->flags = SPI_MASTER_HALF_DUPLEX; + master->flags = SPI_CONTROLLER_HALF_DUPLEX; master->transfer_one_message = spi_xcomm_transfer_one; master->dev.of_node = i2c->dev.of_node; i2c_set_clientdata(i2c, master); From 702ca0269ed56e2d8dae7874a4d8af268e2a382e Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Mon, 10 Jul 2023 18:49:32 +0300 Subject: [PATCH 047/656] spi: Fix spelling typos and acronyms capitalization Fix - spelling typos - capitalization of acronyms in the comments. While at it, fix the multi-line comment style. Signed-off-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230710154932.68377-16-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown --- drivers/spi/spi.c | 54 ++++++++------- include/linux/spi/spi.h | 137 ++++++++++++++++++++----------------- include/trace/events/spi.h | 2 +- 3 files changed, 104 insertions(+), 89 deletions(-) diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index d9667f3f151e..ae2693ba1744 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -682,7 +682,7 @@ static int __spi_add_device(struct spi_device *spi) * @spi: spi_device to register * * Companion function to spi_alloc_device. Devices allocated with - * spi_alloc_device can be added onto the spi bus with this function. + * spi_alloc_device can be added onto the SPI bus with this function. * * Return: 0 on success; negative errno on failure */ @@ -889,7 +889,7 @@ int spi_register_board_info(struct spi_board_info const *info, unsigned n) * spi_res_alloc - allocate a spi resource that is life-cycle managed * during the processing of a spi_message while using * spi_transfer_one - * @spi: the spi device for which we allocate memory + * @spi: the SPI device for which we allocate memory * @release: the release code to execute for this resource * @size: size to alloc and return * @gfp: GFP allocation flags @@ -915,7 +915,7 @@ static void *spi_res_alloc(struct spi_device *spi, spi_res_release_t release, } /** - * spi_res_free - free an spi resource + * spi_res_free - free an SPI resource * @res: pointer to the custom data of a resource */ static void spi_res_free(void *res) @@ -931,7 +931,7 @@ static void spi_res_free(void *res) /** * spi_res_add - add a spi_res to the spi_message - * @message: the spi message + * @message: the SPI message * @res: the spi_resource */ static void spi_res_add(struct spi_message *message, void *res) @@ -943,7 +943,7 @@ static void spi_res_add(struct spi_message *message, void *res) } /** - * spi_res_release - release all spi resources for this message + * spi_res_release - release all SPI resources for this message * @ctlr: the @spi_controller * @message: the @spi_message */ @@ -1424,7 +1424,7 @@ int spi_delay_to_ns(struct spi_delay *_delay, struct spi_transfer *xfer) return -EINVAL; /* * If there is unknown effective speed, approximate it - * by underestimating with half of the requested hz. + * by underestimating with half of the requested Hz. */ hz = xfer->effective_speed_hz ?: xfer->speed_hz / 2; if (!hz) @@ -1739,11 +1739,11 @@ static int __spi_pump_transfer_message(struct spi_controller *ctlr, } /** - * __spi_pump_messages - function which processes spi message queue + * __spi_pump_messages - function which processes SPI message queue * @ctlr: controller to process queue for * @in_kthread: true if we are in the context of the message pump thread * - * This function checks if there is any spi message in the queue that + * This function checks if there is any SPI message in the queue that * needs processing and if so call out to the driver to initialize hardware * and transfer each message. * @@ -1758,7 +1758,7 @@ static void __spi_pump_messages(struct spi_controller *ctlr, bool in_kthread) unsigned long flags; int ret; - /* Take the IO mutex */ + /* Take the I/O mutex */ mutex_lock(&ctlr->io_mutex); /* Lock queue */ @@ -2169,8 +2169,8 @@ static int __spi_queued_transfer(struct spi_device *spi, /** * spi_queued_transfer - transfer function for queued transfers - * @spi: spi device which is requesting transfer - * @msg: spi message which is to handled is queued to driver queue + * @spi: SPI device which is requesting transfer + * @msg: SPI message which is to handled is queued to driver queue * * Return: zero on success, else a negative error code. */ @@ -2496,7 +2496,7 @@ static int acpi_spi_count(struct acpi_resource *ares, void *data) * acpi_spi_count_resources - Count the number of SpiSerialBus resources * @adev: ACPI device * - * Returns the number of SpiSerialBus resources in the ACPI-device's + * Return: the number of SpiSerialBus resources in the ACPI-device's * resource-list; or a negative error code. */ int acpi_spi_count_resources(struct acpi_device *adev) @@ -2630,10 +2630,10 @@ static int acpi_spi_add_resource(struct acpi_resource *ares, void *data) * @adev: ACPI Device for the spi device * @index: Index of the spi resource inside the ACPI Node * - * This should be used to allocate a new spi device from and ACPI Node. - * The caller is responsible for calling spi_add_device to register the spi device. + * This should be used to allocate a new SPI device from and ACPI Device node. + * The caller is responsible for calling spi_add_device to register the SPI device. * - * If ctlr is set to NULL, the Controller for the spi device will be looked up + * If ctlr is set to NULL, the Controller for the SPI device will be looked up * using the resource. * If index is set to -1, index is not used. * Note: If index is -1, ctlr must be set. @@ -3331,7 +3331,8 @@ void spi_unregister_controller(struct spi_controller *ctlr) if (IS_ENABLED(CONFIG_SPI_DYNAMIC)) mutex_unlock(&ctlr->add_lock); - /* Release the last reference on the controller if its driver + /* + * Release the last reference on the controller if its driver * has not yet been converted to devm_spi_alloc_master/slave(). */ if (!ctlr->devm_allocated) @@ -3544,7 +3545,7 @@ static int __spi_split_transfer_maxsize(struct spi_controller *ctlr, /* All the others need rx_buf/tx_buf also set */ for (i = 1, offset = maxsize; i < count; offset += maxsize, i++) { - /* Update rx_buf, tx_buf and dma */ + /* Update rx_buf, tx_buf and DMA */ if (xfers[i].rx_buf) xfers[i].rx_buf += offset; if (xfers[i].rx_dma) @@ -3614,7 +3615,7 @@ EXPORT_SYMBOL_GPL(spi_split_transfers_maxsize); /** - * spi_split_transfers_maxwords - split spi transfers into multiple transfers + * spi_split_transfers_maxwords - split SPI transfers into multiple transfers * when an individual transfer exceeds a * certain number of SPI words * @ctlr: the @spi_controller for this transfer @@ -3657,7 +3658,8 @@ EXPORT_SYMBOL_GPL(spi_split_transfers_maxwords); /*-------------------------------------------------------------------------*/ -/* Core methods for SPI controller protocol drivers. Some of the +/* + * Core methods for SPI controller protocol drivers. Some of the * other core methods are currently defined as inline functions. */ @@ -3717,7 +3719,7 @@ static int spi_set_cs_timing(struct spi_device *spi) * changes those settings, and must be called from a context that can sleep. * Except for SPI_CS_HIGH, which takes effect immediately, the changes take * effect the next time the device is selected and data is transferred to - * or from it. When this function returns, the spi device is deselected. + * or from it. When this function returns, the SPI device is deselected. * * Note that this call will fail if the protocol driver specifies an option * that the underlying controller or its driver does not support. For @@ -4057,7 +4059,7 @@ static int __spi_async(struct spi_device *spi, struct spi_message *message) * spi_async - asynchronous SPI transfer * @spi: device with which data will be exchanged * @message: describes the data transfers, including completion callback - * Context: any (irqs may be blocked, etc) + * Context: any (IRQs may be blocked, etc) * * This call may be used in_irq and other contexts which can't sleep, * as well as from task contexts which can sleep. @@ -4111,7 +4113,7 @@ EXPORT_SYMBOL_GPL(spi_async); * spi_async_locked - version of spi_async with exclusive bus usage * @spi: device with which data will be exchanged * @message: describes the data transfers, including completion callback - * Context: any (irqs may be blocked, etc) + * Context: any (IRQs may be blocked, etc) * * This call may be used in_irq and other contexts which can't sleep, * as well as from task contexts which can sleep. @@ -4374,9 +4376,9 @@ static u8 *buf; /** * spi_write_then_read - SPI synchronous write followed by read * @spi: device with which data will be exchanged - * @txbuf: data to be written (need not be dma-safe) + * @txbuf: data to be written (need not be DMA-safe) * @n_tx: size of txbuf, in bytes - * @rxbuf: buffer into which data will be read (need not be dma-safe) + * @rxbuf: buffer into which data will be read (need not be DMA-safe) * @n_rx: size of rxbuf, in bytes * Context: can sleep * @@ -4387,7 +4389,7 @@ static u8 *buf; * * Parameters to this routine are always copied using a small buffer. * Performance-sensitive or bulk transfer code should instead use - * spi_{async,sync}() calls with dma-safe buffers. + * spi_{async,sync}() calls with DMA-safe buffers. * * Return: zero on success, else a negative error code. */ @@ -4432,7 +4434,7 @@ int spi_write_then_read(struct spi_device *spi, x[0].tx_buf = local_buf; x[1].rx_buf = local_buf + n_tx; - /* Do the i/o */ + /* Do the I/O */ status = spi_sync(spi, &message); if (status == 0) memcpy(rxbuf, x[1].rx_buf, n_rx); diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h index 39a2e6108694..04daf61dfd3f 100644 --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h @@ -36,7 +36,7 @@ extern struct bus_type spi_bus_type; /** * struct spi_statistics - statistics for spi transfers - * @syncp: seqcount to protect members in this struct for per-cpu udate + * @syncp: seqcount to protect members in this struct for per-cpu update * on 32-bit systems * * @messages: number of spi-messages handled @@ -55,7 +55,7 @@ extern struct bus_type spi_bus_type; * @bytes_rx: number of bytes received from device * * @transfer_bytes_histo: - * transfer bytes histogramm + * transfer bytes histogram * * @transfers_split_maxsize: * number of transfers that have been split because of @@ -156,7 +156,7 @@ extern void spi_transfer_cs_change_delay_exec(struct spi_message *msg, * the device will bind to the named driver and only the named driver. * Do not set directly, because core frees it; use driver_set_override() to * set or clear it. - * @cs_gpiod: gpio descriptor of the chipselect line (optional, NULL when + * @cs_gpiod: GPIO descriptor of the chipselect line (optional, NULL when * not using a GPIO line) * @word_delay: delay to be inserted between consecutive * words of a transfer @@ -212,7 +212,7 @@ struct spi_device { void *controller_data; char modalias[SPI_NAME_SIZE]; const char *driver_override; - struct gpio_desc *cs_gpiod; /* Chip select gpio desc */ + struct gpio_desc *cs_gpiod; /* Chip select GPIO descriptor */ struct spi_delay word_delay; /* Inter-word delay */ /* CS delays */ struct spi_delay cs_setup; @@ -223,7 +223,7 @@ struct spi_device { struct spi_statistics __percpu *pcpu_statistics; /* - * likely need more hooks for more protocol options affecting how + * Likely need more hooks for more protocol options affecting how * the controller talks to each chip, like: * - memory packing (12 bit samples into low bits, others zeroed) * - priority @@ -299,11 +299,11 @@ static inline void spi_set_csgpiod(struct spi_device *spi, u8 idx, struct gpio_d /** * struct spi_driver - Host side "protocol" driver * @id_table: List of SPI devices supported by this driver - * @probe: Binds this driver to the spi device. Drivers can verify + * @probe: Binds this driver to the SPI device. Drivers can verify * that the device is actually present, and may need to configure * characteristics (such as bits_per_word) which weren't needed for * the initial configuration done during system setup. - * @remove: Unbinds this driver from the spi device + * @remove: Unbinds this driver from the SPI device * @shutdown: Standard shutdown callback used during system state * transitions such as powerdown/halt and kexec * @driver: SPI device drivers should initialize the name and owner @@ -415,7 +415,7 @@ extern struct spi_device *spi_new_ancillary_device(struct spi_device *spi, u8 ch * @queued: whether this controller is providing an internal message queue * @kworker: pointer to thread struct for message pump * @pump_messages: work struct for scheduling work to the message pump - * @queue_lock: spinlock to syncronise access to message queue + * @queue_lock: spinlock to synchronise access to message queue * @queue: message queue * @cur_msg: the currently in-flight message * @cur_msg_completion: a completion for the current in-flight message @@ -473,7 +473,7 @@ extern struct spi_device *spi_new_ancillary_device(struct spi_device *spi, u8 ch * @unprepare_message: undo any work done by prepare_message(). * @slave_abort: abort the ongoing transfer request on an SPI slave controller * @target_abort: abort the ongoing transfer request on an SPI target controller - * @cs_gpiods: Array of GPIO descs to use as chip select lines; one per CS + * @cs_gpiods: Array of GPIO descriptors to use as chip select lines; one per CS * number. Any individual value may be NULL for CS lines that * are not GPIOs (driven by the SPI controller itself). * @use_gpio_descriptors: Turns on the code in the SPI core to parse and grab @@ -500,7 +500,7 @@ extern struct spi_device *spi_new_ancillary_device(struct spi_device *spi, u8 ch * If the driver does not set this, the SPI core takes the snapshot as * close to the driver hand-over as possible. * @irq_flags: Interrupt enable state during PTP system timestamping - * @fallback: fallback to pio if dma transfer return failure with + * @fallback: fallback to PIO if DMA transfer return failure with * SPI_TRANS_FAIL_NO_START. * @queue_empty: signal green light for opportunistically skipping the queue * for spi_sync transfers. @@ -522,15 +522,17 @@ struct spi_controller { struct list_head list; - /* Other than negative (== assign one dynamically), bus_num is fully - * board-specific. usually that simplifies to being SOC-specific. - * example: one SOC has three SPI controllers, numbered 0..2, - * and one board's schematics might show it using SPI-2. software + /* + * Other than negative (== assign one dynamically), bus_num is fully + * board-specific. Usually that simplifies to being SoC-specific. + * example: one SoC has three SPI controllers, numbered 0..2, + * and one board's schematics might show it using SPI-2. Software * would normally use bus_num=2 for that controller. */ s16 bus_num; - /* chipselects will be integral to many controllers; some others + /* + * Chipselects will be integral to many controllers; some others * might use board-specific GPIOs. */ u16 num_chipselect; @@ -575,8 +577,8 @@ struct spi_controller { }; /* - * on some hardware transfer / message size may be constrained - * the limit may depend on device transfer settings + * On some hardware transfer / message size may be constrained + * the limit may depend on device transfer settings. */ size_t (*max_transfer_size)(struct spi_device *spi); size_t (*max_message_size)(struct spi_device *spi); @@ -594,7 +596,8 @@ struct spi_controller { /* Flag indicating that the SPI bus is locked for exclusive use */ bool bus_lock_flag; - /* Setup mode and clock, etc (spi driver may call many times). + /* + * Setup mode and clock, etc (SPI driver may call many times). * * IMPORTANT: this may be called when transfers to another * device are active. DO NOT UPDATE SHARED REGISTERS in ways @@ -612,18 +615,19 @@ struct spi_controller { */ int (*set_cs_timing)(struct spi_device *spi); - /* Bidirectional bulk transfers + /* + * Bidirectional bulk transfers * * + The transfer() method may not sleep; its main role is * just to add the message to the queue. * + For now there's no remove-from-queue operation, or * any other request management - * + To a given spi_device, message queueing is pure fifo + * + To a given spi_device, message queueing is pure FIFO * * + The controller's main job is to process its message queue, * selecting a chip (for masters), then transferring data * + If there are multiple spi_device children, the i/o queue - * arbitration algorithm is unspecified (round robin, fifo, + * arbitration algorithm is unspecified (round robin, FIFO, * priority, reservations, preemption, etc) * * + Chipselect stays active during the entire message @@ -704,7 +708,7 @@ struct spi_controller { const struct spi_controller_mem_ops *mem_ops; const struct spi_controller_mem_caps *mem_caps; - /* gpio chip select */ + /* GPIO chip select */ struct gpio_desc **cs_gpiods; bool use_gpio_descriptors; s8 unused_native_cs; @@ -788,7 +792,7 @@ void spi_take_timestamp_post(struct spi_controller *ctlr, struct spi_transfer *xfer, size_t progress, bool irqs_off); -/* The spi driver core manages memory for the spi_controller classdev */ +/* The SPI driver core manages memory for the spi_controller classdev */ extern struct spi_controller *__spi_alloc_controller(struct device *host, unsigned int size, bool slave); @@ -877,13 +881,13 @@ typedef void (*spi_res_release_t)(struct spi_controller *ctlr, void *res); /** - * struct spi_res - spi resource management structure + * struct spi_res - SPI resource management structure * @entry: list entry * @release: release code called prior to freeing this resource * @data: extra data allocated for the specific use-case * - * this is based on ideas from devres, but focused on life-cycle - * management during spi_message processing + * This is based on ideas from devres, but focused on life-cycle + * management during spi_message processing. */ struct spi_res { struct list_head entry; @@ -901,7 +905,7 @@ struct spi_res { * * The spi_messages themselves consist of a series of read+write transfer * segments. Those segments always read the same number of bits as they - * write; but one or the other is easily ignored by passing a null buffer + * write; but one or the other is easily ignored by passing a NULL buffer * pointer. (This is unlike most types of I/O API, because SPI hardware * is full duplex.) * @@ -912,8 +916,8 @@ struct spi_res { /** * struct spi_transfer - a read/write buffer pair - * @tx_buf: data to be written (dma-safe memory), or NULL - * @rx_buf: data to be read (dma-safe memory), or NULL + * @tx_buf: data to be written (DMA-safe memory), or NULL + * @rx_buf: data to be read (DMA-safe memory), or NULL * @tx_dma: DMA address of tx_buf, if @spi_message.is_dma_mapped * @rx_dma: DMA address of rx_buf, if @spi_message.is_dma_mapped * @tx_nbits: number of bits used for writing. If 0 the default @@ -936,7 +940,7 @@ struct spi_res { * @word_delay: inter word delay to be introduced after each word size * (set by bits_per_word) transmission. * @effective_speed_hz: the effective SCK-speed that was used to - * transfer this transfer. Set to 0 if the spi bus driver does + * transfer this transfer. Set to 0 if the SPI bus driver does * not support it. * @transfer_list: transfers are sequenced through @spi_message.transfers * @tx_sg: Scatterlist for transmit, currently not for client use @@ -965,16 +969,16 @@ struct spi_res { * transmitting the "pre" word, and the "post" timestamp after receiving * transmit confirmation from the controller for the "post" word. * @timestamped: true if the transfer has been timestamped - * @error: Error status logged by spi controller driver. + * @error: Error status logged by SPI controller driver. * * SPI transfers always write the same number of bytes as they read. * Protocol drivers should always provide @rx_buf and/or @tx_buf. * In some cases, they may also want to provide DMA addresses for * the data being transferred; that may reduce overhead, when the - * underlying driver uses dma. + * underlying driver uses DMA. * - * If the transmit buffer is null, zeroes will be shifted out - * while filling @rx_buf. If the receive buffer is null, the data + * If the transmit buffer is NULL, zeroes will be shifted out + * while filling @rx_buf. If the receive buffer is NULL, the data * shifted in will be discarded. Only "len" bytes shift out (or in). * It's an error to try to shift out a partial word. (For example, by * shifting out three bytes with word size of sixteen or twenty bits; @@ -1008,7 +1012,7 @@ struct spi_res { * Some devices need protocol transactions to be built from a series of * spi_message submissions, where the content of one message is determined * by the results of previous messages and where the whole transaction - * ends when the chipselect goes intactive. + * ends when the chipselect goes inactive. * * When SPI can transfer in 1x,2x or 4x. It can get this transfer information * from device through @tx_nbits and @rx_nbits. In Bi-direction, these @@ -1022,10 +1026,11 @@ struct spi_res { * and its transfers, ignore them until its completion callback. */ struct spi_transfer { - /* It's ok if tx_buf == rx_buf (right?) - * for MicroWire, one buffer must be null - * buffers must work with dma_*map_single() calls, unless - * spi_message.is_dma_mapped reports a pre-existing mapping + /* + * It's okay if tx_buf == rx_buf (right?). + * For MicroWire, one buffer must be NULL. + * Buffers must work with dma_*map_single() calls, unless + * spi_message.is_dma_mapped reports a pre-existing mapping. */ const void *tx_buf; void *rx_buf; @@ -1045,9 +1050,9 @@ struct spi_transfer { unsigned tx_nbits:3; unsigned rx_nbits:3; unsigned timestamped:1; -#define SPI_NBITS_SINGLE 0x01 /* 1bit transfer */ -#define SPI_NBITS_DUAL 0x02 /* 2bits transfer */ -#define SPI_NBITS_QUAD 0x04 /* 4bits transfer */ +#define SPI_NBITS_SINGLE 0x01 /* 1-bit transfer */ +#define SPI_NBITS_DUAL 0x02 /* 2-bit transfer */ +#define SPI_NBITS_QUAD 0x04 /* 4-bit transfer */ u8 bits_per_word; struct spi_delay delay; struct spi_delay cs_change_delay; @@ -1068,7 +1073,7 @@ struct spi_transfer { * struct spi_message - one multi-segment SPI transaction * @transfers: list of transfer segments in this transaction * @spi: SPI device to which the transaction is queued - * @is_dma_mapped: if true, the caller provided both dma and cpu virtual + * @is_dma_mapped: if true, the caller provided both DMA and CPU virtual * addresses for each transfer buffer * @complete: called to report transaction completions * @context: the argument to complete() when it's called @@ -1078,7 +1083,7 @@ struct spi_transfer { * @status: zero for success, else negative errno * @queue: for use by whichever driver currently owns the message * @state: for use by whichever driver currently owns the message - * @resources: for resource management when the spi message is processed + * @resources: for resource management when the SPI message is processed * @prepared: spi_prepare_message was called for the this message * * A @spi_message is used to execute an atomic sequence of data transfers, @@ -1105,7 +1110,8 @@ struct spi_message { /* spi_prepare_message() was called for this message */ bool prepared; - /* REVISIT: we might want a flag affecting the behavior of the + /* + * REVISIT: we might want a flag affecting the behavior of the * last transfer ... allowing things like "read 16 bit length L" * immediately followed by "read L bytes". Basically imposing * a specific message scheduling algorithm. @@ -1123,14 +1129,15 @@ struct spi_message { unsigned frame_length; unsigned actual_length; - /* For optional use by whatever driver currently owns the + /* + * For optional use by whatever driver currently owns the * spi_message ... between calls to spi_async and then later * complete(), that's the spi_controller controller driver. */ struct list_head queue; void *state; - /* List of spi_res reources when the spi message is processed */ + /* List of spi_res resources when the SPI message is processed */ struct list_head resources; }; @@ -1167,7 +1174,7 @@ spi_transfer_delay_exec(struct spi_transfer *t) /** * spi_message_init_with_transfers - Initialize spi_message and append transfers * @m: spi_message to be initialized - * @xfers: An array of spi transfers + * @xfers: An array of SPI transfers * @num_xfers: Number of items in the xfer array * * This function initializes the given spi_message and adds each spi_transfer in @@ -1184,10 +1191,10 @@ struct spi_transfer *xfers, unsigned int num_xfers) spi_message_add_tail(&xfers[i], m); } -/* It's fine to embed message and transaction structures in other data +/* + * It's fine to embed message and transaction structures in other data * structures so long as you don't free them while they're in use. */ - static inline struct spi_message *spi_message_alloc(unsigned ntrans, gfp_t flags) { struct spi_message *m; @@ -1290,7 +1297,7 @@ typedef void (*spi_replaced_release_t)(struct spi_controller *ctlr, * replacements that have occurred * so that they can get reverted * @release: some extra release code to get executed prior to - * relasing this structure + * releasing this structure * @extradata: pointer to some extra data if requested or NULL * @replaced_transfers: transfers that have been replaced and which need * to get restored @@ -1300,9 +1307,9 @@ typedef void (*spi_replaced_release_t)(struct spi_controller *ctlr, * @inserted_transfers: array of spi_transfers of array-size @inserted, * that have been replacing replaced_transfers * - * note: that @extradata will point to @inserted_transfers[@inserted] + * Note: that @extradata will point to @inserted_transfers[@inserted] * if some extra allocation is requested, so alignment will be the same - * as for spi_transfers + * as for spi_transfers. */ struct spi_replaced_transfers { spi_replaced_release_t release; @@ -1328,7 +1335,8 @@ extern int spi_split_transfers_maxwords(struct spi_controller *ctlr, /*---------------------------------------------------------------------------*/ -/* All these synchronous SPI transfer routines are utilities layered +/* + * All these synchronous SPI transfer routines are utilities layered * over the core async transfer primitive. Here, "synchronous" means * they will sleep uninterruptibly until the async transfer completes. */ @@ -1471,7 +1479,7 @@ static inline ssize_t spi_w8r16(struct spi_device *spi, u8 cmd) * * Callable only from contexts that can sleep. * - * Return: the (unsigned) sixteen bit number returned by the device in cpu + * Return: the (unsigned) sixteen bit number returned by the device in CPU * endianness, or else a negative error code. */ static inline ssize_t spi_w8r16be(struct spi_device *spi, u8 cmd) @@ -1499,7 +1507,7 @@ static inline ssize_t spi_w8r16be(struct spi_device *spi, u8 cmd) * As a rule, SPI devices can't be probed. Instead, board init code * provides a table listing the devices which are present, with enough * information to bind and set up the device's driver. There's basic - * support for nonstatic configurations too; enough to handle adding + * support for non-static configurations too; enough to handle adding * parport adapters, or microcontrollers acting as USB-to-SPI bridges. */ @@ -1536,12 +1544,13 @@ static inline ssize_t spi_w8r16be(struct spi_device *spi, u8 cmd) * are active in some dynamic board configuration models. */ struct spi_board_info { - /* The device name and module name are coupled, like platform_bus; + /* + * The device name and module name are coupled, like platform_bus; * "modalias" is normally the driver name. * * platform_data goes to spi_device.dev.platform_data, * controller_data goes to spi_device.controller_data, - * irq is copied too + * IRQ is copied too. */ char modalias[SPI_NAME_SIZE]; const void *platform_data; @@ -1553,7 +1562,8 @@ struct spi_board_info { u32 max_speed_hz; - /* bus_num is board specific and matches the bus_num of some + /* + * bus_num is board specific and matches the bus_num of some * spi_controller that will probably be registered later. * * chip_select reflects how this chip is wired to that master; @@ -1562,12 +1572,14 @@ struct spi_board_info { u16 bus_num; u16 chip_select; - /* mode becomes spi_device.mode, and is essential for chips + /* + * mode becomes spi_device.mode, and is essential for chips * where the default of SPI_CS_HIGH = 0 is wrong. */ u32 mode; - /* ... may need additional spi_device chip config data here. + /* + * ... may need additional spi_device chip config data here. * avoid stuff protocol drivers can set; but include stuff * needed to behave without being bound to a driver: * - quirks like clock rate mattering when not selected @@ -1584,7 +1596,8 @@ spi_register_board_info(struct spi_board_info const *info, unsigned n) { return 0; } #endif -/* If you're hotplugging an adapter with devices (parport, usb, etc) +/* + * If you're hotplugging an adapter with devices (parport, USB, etc) * use spi_new_device() to describe each device. You can also call * spi_unregister_device() to start making that device vanish, but * normally that would be handled by spi_unregister_controller(). diff --git a/include/trace/events/spi.h b/include/trace/events/spi.h index c0248a8fa79c..e63d4a24d879 100644 --- a/include/trace/events/spi.h +++ b/include/trace/events/spi.h @@ -167,7 +167,7 @@ TRACE_EVENT(spi_message_done, ); /* - * consider a buffer valid if non-NULL and if it doesn't match the dummy buffer + * Consider a buffer valid if non-NULL and if it doesn't match the dummy buffer * that only exist to work with controllers that have SPI_CONTROLLER_MUST_TX or * SPI_CONTROLLER_MUST_RX. */ From 3b38cabd5e12b8b54b9c9feab9ab0093b991f249 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Wed, 12 Jul 2023 14:48:32 +0800 Subject: [PATCH 048/656] spi: spi-cadence: Delete unmatched comments The function no longer returns a value, synchronize the comments. Signed-off-by: Yangtao Li Link: https://lore.kernel.org/r/20230712064832.67091-1-frank.li@vivo.com Signed-off-by: Mark Brown --- drivers/spi/spi-cadence.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/spi/spi-cadence.c b/drivers/spi/spi-cadence.c index de8fe3c5becb..42f101d357c3 100644 --- a/drivers/spi/spi-cadence.c +++ b/drivers/spi/spi-cadence.c @@ -690,8 +690,6 @@ remove_ctlr: * This function is called if a device is physically removed from the system or * if the driver module is being unloaded. It frees all resources allocated to * the device. - * - * Return: 0 on success and error value on error */ static void cdns_spi_remove(struct platform_device *pdev) { From 43818a4bf8ef8f38253bfb851ae64f3cdf45fdf4 Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Wed, 12 Jul 2023 12:01:05 +0200 Subject: [PATCH 049/656] gpio: sim: fix a typo in comment It was supposed to say 'for' not 'fo'. Signed-off-by: Bartosz Golaszewski Reviewed-by: Andy Shevchenko --- drivers/gpio/gpio-sim.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-sim.c b/drivers/gpio/gpio-sim.c index 8b49b0abacd5..cfbdade841e8 100644 --- a/drivers/gpio/gpio-sim.c +++ b/drivers/gpio/gpio-sim.c @@ -488,7 +488,7 @@ struct gpio_sim_device { * This structure however can be modified by callbacks of different * attributes so we need another lock. * - * We use this lock fo protecting all data structures owned by this + * We use this lock for protecting all data structures owned by this * object too. */ struct mutex lock; From 0f93a345aa42c40e2145c3719d878e7daa4eb6ee Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Wed, 12 Jul 2023 11:59:55 +0200 Subject: [PATCH 050/656] gpiolib: order includes alphabetically in gpiolib.h After adding the missing notifier.h header, let's order all includes alphabetically. Suggested-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski Reviewed-by: Andy Shevchenko --- drivers/gpio/gpiolib.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpio/gpiolib.h b/drivers/gpio/gpiolib.h index 1409d52487c0..7c562fbb9fb0 100644 --- a/drivers/gpio/gpiolib.h +++ b/drivers/gpio/gpiolib.h @@ -9,13 +9,13 @@ #ifndef GPIOLIB_H #define GPIOLIB_H -#include -#include /* for enum gpiod_flags */ -#include +#include #include +#include +#include /* for enum gpiod_flags */ +#include #include #include -#include #include #define GPIOCHIP_NAME "gpiochip" From 47ee108a113c72ec8ceee2c7af52c19ed72e6ad7 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Wed, 12 Jul 2023 00:21:52 +0100 Subject: [PATCH 051/656] regmap: Provide user selectable option to enable regmap Since apparently enabling all the KUnit tests shouldn't enable any new subsystems it is hard to enable the regmap KUnit tests in normal KUnit testing scenarios that don't enable any drivers. Add a Kconfig option to help with this and include it in the KUnit all tests config. Reviewed-by: David Gow Signed-off-by: Mark Brown Link: https://lore.kernel.org/r/20230712-regmap-kunit-enable-v1-1-13e296bd0204@kernel.org Signed-off-by: Mark Brown --- drivers/base/regmap/Kconfig | 12 +++++++++++- tools/testing/kunit/configs/all_tests.config | 2 ++ 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/base/regmap/Kconfig b/drivers/base/regmap/Kconfig index 0db2021f7477..b1affac70d5d 100644 --- a/drivers/base/regmap/Kconfig +++ b/drivers/base/regmap/Kconfig @@ -4,7 +4,7 @@ # subsystems should select the appropriate symbols. config REGMAP - bool "Register Map support" if KUNIT_ALL_TESTS + bool default y if (REGMAP_I2C || REGMAP_SPI || REGMAP_SPMI || REGMAP_W1 || REGMAP_AC97 || REGMAP_MMIO || REGMAP_IRQ || REGMAP_SOUNDWIRE || REGMAP_SOUNDWIRE_MBQ || REGMAP_SCCB || REGMAP_I3C || REGMAP_SPI_AVMM || REGMAP_MDIO || REGMAP_FSI) select IRQ_DOMAIN if REGMAP_IRQ select MDIO_BUS if REGMAP_MDIO @@ -23,6 +23,16 @@ config REGMAP_KUNIT default KUNIT_ALL_TESTS select REGMAP_RAM +config REGMAP_BUILD + bool "Enable regmap build" + depends on KUNIT + select REGMAP + help + This option exists purely to allow the regmap KUnit tests to + be enabled without having to enable some driver that uses + regmap due to unfortunate issues with how KUnit tests are + normally enabled. + config REGMAP_AC97 tristate diff --git a/tools/testing/kunit/configs/all_tests.config b/tools/testing/kunit/configs/all_tests.config index 0393940c706a..873f3e06ccad 100644 --- a/tools/testing/kunit/configs/all_tests.config +++ b/tools/testing/kunit/configs/all_tests.config @@ -33,5 +33,7 @@ CONFIG_DAMON_PADDR=y CONFIG_DEBUG_FS=y CONFIG_DAMON_DBGFS=y +CONFIG_REGMAP_BUILD=y + CONFIG_SECURITY=y CONFIG_SECURITY_APPARMOR=y From 497897cb200d03b89524e6b4dfb71c77af324766 Mon Sep 17 00:00:00 2001 From: Christoph Niedermaier Date: Thu, 13 Jul 2023 11:03:28 +0200 Subject: [PATCH 052/656] regulator: da9062: Make the use of IRQ optional This patch makes the use of IRQ optional to make the DA9061/62 usable for designs that don't have the IRQ pin connected, because the regulator is usable without IRQ. Signed-off-by: Christoph Niedermaier Reviewed-by: Adam Ward Reviewed-by: Marek Vasut Link: https://lore.kernel.org/r/20230713090328.3879-1-cniedermaier@dh-electronics.com Signed-off-by: Mark Brown --- drivers/regulator/da9062-regulator.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/regulator/da9062-regulator.c b/drivers/regulator/da9062-regulator.c index c28b061eef02..1d354db0c1bd 100644 --- a/drivers/regulator/da9062-regulator.c +++ b/drivers/regulator/da9062-regulator.c @@ -924,7 +924,7 @@ static int da9062_regulator_probe(struct platform_device *pdev) struct da9062_regulator *regl; struct regulator_config config = { }; const struct da9062_regulator_info *rinfo; - int irq, n, ret; + int n, ret; int max_regulators; switch (chip->chip_type) { @@ -1012,12 +1012,11 @@ static int da9062_regulator_probe(struct platform_device *pdev) } /* LDOs overcurrent event support */ - irq = platform_get_irq_byname(pdev, "LDO_LIM"); - if (irq < 0) - return irq; - regulators->irq_ldo_lim = irq; + regulators->irq_ldo_lim = platform_get_irq_byname_optional(pdev, "LDO_LIM"); + if (regulators->irq_ldo_lim < 0) + return 0; - ret = devm_request_threaded_irq(&pdev->dev, irq, + ret = devm_request_threaded_irq(&pdev->dev, regulators->irq_ldo_lim, NULL, da9062_ldo_lim_event, IRQF_TRIGGER_LOW | IRQF_ONESHOT, "LDO_LIM", regulators); From 62d9e475065597bfd9c3a646af4c4faab637a599 Mon Sep 17 00:00:00 2001 From: Danny Tsen Date: Wed, 26 Apr 2023 15:11:43 -0400 Subject: [PATCH 053/656] crypto: chacha20-p10 - An optimized Chacha20 implementation with 8-way unrolling for ppc64le Improve overall performance of chacha20 encrypt and decrypt operations for Power10 or later CPU. Signed-off-by: Danny Tsen Signed-off-by: Herbert Xu --- arch/powerpc/crypto/chacha-p10le-8x.S | 842 ++++++++++++++++++++++++++ 1 file changed, 842 insertions(+) create mode 100644 arch/powerpc/crypto/chacha-p10le-8x.S diff --git a/arch/powerpc/crypto/chacha-p10le-8x.S b/arch/powerpc/crypto/chacha-p10le-8x.S new file mode 100644 index 000000000000..17bedb66b822 --- /dev/null +++ b/arch/powerpc/crypto/chacha-p10le-8x.S @@ -0,0 +1,842 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +# +# Accelerated chacha20 implementation for ppc64le. +# +# Copyright 2023- IBM Corp. All rights reserved +# +#=================================================================================== +# Written by Danny Tsen +# +# chacha_p10le_8x(u32 *state, byte *dst, const byte *src, +# size_t len, int nrounds); +# +# do rounds, 8 quarter rounds +# 1. a += b; d ^= a; d <<<= 16; +# 2. c += d; b ^= c; b <<<= 12; +# 3. a += b; d ^= a; d <<<= 8; +# 4. c += d; b ^= c; b <<<= 7 +# +# row1 = (row1 + row2), row4 = row1 xor row4, row4 rotate each word by 16 +# row3 = (row3 + row4), row2 = row3 xor row2, row2 rotate each word by 12 +# row1 = (row1 + row2), row4 = row1 xor row4, row4 rotate each word by 8 +# row3 = (row3 + row4), row2 = row3 xor row2, row2 rotate each word by 7 +# +# 4 blocks (a b c d) +# +# a0 b0 c0 d0 +# a1 b1 c1 d1 +# ... +# a4 b4 c4 d4 +# ... +# a8 b8 c8 d8 +# ... +# a12 b12 c12 d12 +# a13 ... +# a14 ... +# a15 b15 c15 d15 +# +# Column round (v0, v4, v8, v12, v1, v5, v9, v13, v2, v6, v10, v14, v3, v7, v11, v15) +# Diagnal round (v0, v5, v10, v15, v1, v6, v11, v12, v2, v7, v8, v13, v3, v4, v9, v14) +# + +#include +#include +#include +#include + +.machine "any" +.text + +.macro SAVE_GPR GPR OFFSET FRAME + std \GPR,\OFFSET(\FRAME) +.endm + +.macro SAVE_VRS VRS OFFSET FRAME + li 16, \OFFSET + stvx \VRS, 16, \FRAME +.endm + +.macro SAVE_VSX VSX OFFSET FRAME + li 16, \OFFSET + stxvx \VSX, 16, \FRAME +.endm + +.macro RESTORE_GPR GPR OFFSET FRAME + ld \GPR,\OFFSET(\FRAME) +.endm + +.macro RESTORE_VRS VRS OFFSET FRAME + li 16, \OFFSET + lvx \VRS, 16, \FRAME +.endm + +.macro RESTORE_VSX VSX OFFSET FRAME + li 16, \OFFSET + lxvx \VSX, 16, \FRAME +.endm + +.macro SAVE_REGS + mflr 0 + std 0, 16(1) + stdu 1,-752(1) + + SAVE_GPR 14, 112, 1 + SAVE_GPR 15, 120, 1 + SAVE_GPR 16, 128, 1 + SAVE_GPR 17, 136, 1 + SAVE_GPR 18, 144, 1 + SAVE_GPR 19, 152, 1 + SAVE_GPR 20, 160, 1 + SAVE_GPR 21, 168, 1 + SAVE_GPR 22, 176, 1 + SAVE_GPR 23, 184, 1 + SAVE_GPR 24, 192, 1 + SAVE_GPR 25, 200, 1 + SAVE_GPR 26, 208, 1 + SAVE_GPR 27, 216, 1 + SAVE_GPR 28, 224, 1 + SAVE_GPR 29, 232, 1 + SAVE_GPR 30, 240, 1 + SAVE_GPR 31, 248, 1 + + addi 9, 1, 256 + SAVE_VRS 20, 0, 9 + SAVE_VRS 21, 16, 9 + SAVE_VRS 22, 32, 9 + SAVE_VRS 23, 48, 9 + SAVE_VRS 24, 64, 9 + SAVE_VRS 25, 80, 9 + SAVE_VRS 26, 96, 9 + SAVE_VRS 27, 112, 9 + SAVE_VRS 28, 128, 9 + SAVE_VRS 29, 144, 9 + SAVE_VRS 30, 160, 9 + SAVE_VRS 31, 176, 9 + + SAVE_VSX 14, 192, 9 + SAVE_VSX 15, 208, 9 + SAVE_VSX 16, 224, 9 + SAVE_VSX 17, 240, 9 + SAVE_VSX 18, 256, 9 + SAVE_VSX 19, 272, 9 + SAVE_VSX 20, 288, 9 + SAVE_VSX 21, 304, 9 + SAVE_VSX 22, 320, 9 + SAVE_VSX 23, 336, 9 + SAVE_VSX 24, 352, 9 + SAVE_VSX 25, 368, 9 + SAVE_VSX 26, 384, 9 + SAVE_VSX 27, 400, 9 + SAVE_VSX 28, 416, 9 + SAVE_VSX 29, 432, 9 + SAVE_VSX 30, 448, 9 + SAVE_VSX 31, 464, 9 +.endm # SAVE_REGS + +.macro RESTORE_REGS + addi 9, 1, 256 + RESTORE_VRS 20, 0, 9 + RESTORE_VRS 21, 16, 9 + RESTORE_VRS 22, 32, 9 + RESTORE_VRS 23, 48, 9 + RESTORE_VRS 24, 64, 9 + RESTORE_VRS 25, 80, 9 + RESTORE_VRS 26, 96, 9 + RESTORE_VRS 27, 112, 9 + RESTORE_VRS 28, 128, 9 + RESTORE_VRS 29, 144, 9 + RESTORE_VRS 30, 160, 9 + RESTORE_VRS 31, 176, 9 + + RESTORE_VSX 14, 192, 9 + RESTORE_VSX 15, 208, 9 + RESTORE_VSX 16, 224, 9 + RESTORE_VSX 17, 240, 9 + RESTORE_VSX 18, 256, 9 + RESTORE_VSX 19, 272, 9 + RESTORE_VSX 20, 288, 9 + RESTORE_VSX 21, 304, 9 + RESTORE_VSX 22, 320, 9 + RESTORE_VSX 23, 336, 9 + RESTORE_VSX 24, 352, 9 + RESTORE_VSX 25, 368, 9 + RESTORE_VSX 26, 384, 9 + RESTORE_VSX 27, 400, 9 + RESTORE_VSX 28, 416, 9 + RESTORE_VSX 29, 432, 9 + RESTORE_VSX 30, 448, 9 + RESTORE_VSX 31, 464, 9 + + RESTORE_GPR 14, 112, 1 + RESTORE_GPR 15, 120, 1 + RESTORE_GPR 16, 128, 1 + RESTORE_GPR 17, 136, 1 + RESTORE_GPR 18, 144, 1 + RESTORE_GPR 19, 152, 1 + RESTORE_GPR 20, 160, 1 + RESTORE_GPR 21, 168, 1 + RESTORE_GPR 22, 176, 1 + RESTORE_GPR 23, 184, 1 + RESTORE_GPR 24, 192, 1 + RESTORE_GPR 25, 200, 1 + RESTORE_GPR 26, 208, 1 + RESTORE_GPR 27, 216, 1 + RESTORE_GPR 28, 224, 1 + RESTORE_GPR 29, 232, 1 + RESTORE_GPR 30, 240, 1 + RESTORE_GPR 31, 248, 1 + + addi 1, 1, 752 + ld 0, 16(1) + mtlr 0 +.endm # RESTORE_REGS + +.macro QT_loop_8x + # QR(v0, v4, v8, v12, v1, v5, v9, v13, v2, v6, v10, v14, v3, v7, v11, v15) + xxlor 0, 32+25, 32+25 + xxlor 32+25, 20, 20 + vadduwm 0, 0, 4 + vadduwm 1, 1, 5 + vadduwm 2, 2, 6 + vadduwm 3, 3, 7 + vadduwm 16, 16, 20 + vadduwm 17, 17, 21 + vadduwm 18, 18, 22 + vadduwm 19, 19, 23 + + vpermxor 12, 12, 0, 25 + vpermxor 13, 13, 1, 25 + vpermxor 14, 14, 2, 25 + vpermxor 15, 15, 3, 25 + vpermxor 28, 28, 16, 25 + vpermxor 29, 29, 17, 25 + vpermxor 30, 30, 18, 25 + vpermxor 31, 31, 19, 25 + xxlor 32+25, 0, 0 + vadduwm 8, 8, 12 + vadduwm 9, 9, 13 + vadduwm 10, 10, 14 + vadduwm 11, 11, 15 + vadduwm 24, 24, 28 + vadduwm 25, 25, 29 + vadduwm 26, 26, 30 + vadduwm 27, 27, 31 + vxor 4, 4, 8 + vxor 5, 5, 9 + vxor 6, 6, 10 + vxor 7, 7, 11 + vxor 20, 20, 24 + vxor 21, 21, 25 + vxor 22, 22, 26 + vxor 23, 23, 27 + + xxlor 0, 32+25, 32+25 + xxlor 32+25, 21, 21 + vrlw 4, 4, 25 # + vrlw 5, 5, 25 + vrlw 6, 6, 25 + vrlw 7, 7, 25 + vrlw 20, 20, 25 # + vrlw 21, 21, 25 + vrlw 22, 22, 25 + vrlw 23, 23, 25 + xxlor 32+25, 0, 0 + vadduwm 0, 0, 4 + vadduwm 1, 1, 5 + vadduwm 2, 2, 6 + vadduwm 3, 3, 7 + vadduwm 16, 16, 20 + vadduwm 17, 17, 21 + vadduwm 18, 18, 22 + vadduwm 19, 19, 23 + + xxlor 0, 32+25, 32+25 + xxlor 32+25, 22, 22 + vpermxor 12, 12, 0, 25 + vpermxor 13, 13, 1, 25 + vpermxor 14, 14, 2, 25 + vpermxor 15, 15, 3, 25 + vpermxor 28, 28, 16, 25 + vpermxor 29, 29, 17, 25 + vpermxor 30, 30, 18, 25 + vpermxor 31, 31, 19, 25 + xxlor 32+25, 0, 0 + vadduwm 8, 8, 12 + vadduwm 9, 9, 13 + vadduwm 10, 10, 14 + vadduwm 11, 11, 15 + vadduwm 24, 24, 28 + vadduwm 25, 25, 29 + vadduwm 26, 26, 30 + vadduwm 27, 27, 31 + xxlor 0, 32+28, 32+28 + xxlor 32+28, 23, 23 + vxor 4, 4, 8 + vxor 5, 5, 9 + vxor 6, 6, 10 + vxor 7, 7, 11 + vxor 20, 20, 24 + vxor 21, 21, 25 + vxor 22, 22, 26 + vxor 23, 23, 27 + vrlw 4, 4, 28 # + vrlw 5, 5, 28 + vrlw 6, 6, 28 + vrlw 7, 7, 28 + vrlw 20, 20, 28 # + vrlw 21, 21, 28 + vrlw 22, 22, 28 + vrlw 23, 23, 28 + xxlor 32+28, 0, 0 + + # QR(v0, v5, v10, v15, v1, v6, v11, v12, v2, v7, v8, v13, v3, v4, v9, v14) + xxlor 0, 32+25, 32+25 + xxlor 32+25, 20, 20 + vadduwm 0, 0, 5 + vadduwm 1, 1, 6 + vadduwm 2, 2, 7 + vadduwm 3, 3, 4 + vadduwm 16, 16, 21 + vadduwm 17, 17, 22 + vadduwm 18, 18, 23 + vadduwm 19, 19, 20 + + vpermxor 15, 15, 0, 25 + vpermxor 12, 12, 1, 25 + vpermxor 13, 13, 2, 25 + vpermxor 14, 14, 3, 25 + vpermxor 31, 31, 16, 25 + vpermxor 28, 28, 17, 25 + vpermxor 29, 29, 18, 25 + vpermxor 30, 30, 19, 25 + + xxlor 32+25, 0, 0 + vadduwm 10, 10, 15 + vadduwm 11, 11, 12 + vadduwm 8, 8, 13 + vadduwm 9, 9, 14 + vadduwm 26, 26, 31 + vadduwm 27, 27, 28 + vadduwm 24, 24, 29 + vadduwm 25, 25, 30 + vxor 5, 5, 10 + vxor 6, 6, 11 + vxor 7, 7, 8 + vxor 4, 4, 9 + vxor 21, 21, 26 + vxor 22, 22, 27 + vxor 23, 23, 24 + vxor 20, 20, 25 + + xxlor 0, 32+25, 32+25 + xxlor 32+25, 21, 21 + vrlw 5, 5, 25 + vrlw 6, 6, 25 + vrlw 7, 7, 25 + vrlw 4, 4, 25 + vrlw 21, 21, 25 + vrlw 22, 22, 25 + vrlw 23, 23, 25 + vrlw 20, 20, 25 + xxlor 32+25, 0, 0 + + vadduwm 0, 0, 5 + vadduwm 1, 1, 6 + vadduwm 2, 2, 7 + vadduwm 3, 3, 4 + vadduwm 16, 16, 21 + vadduwm 17, 17, 22 + vadduwm 18, 18, 23 + vadduwm 19, 19, 20 + + xxlor 0, 32+25, 32+25 + xxlor 32+25, 22, 22 + vpermxor 15, 15, 0, 25 + vpermxor 12, 12, 1, 25 + vpermxor 13, 13, 2, 25 + vpermxor 14, 14, 3, 25 + vpermxor 31, 31, 16, 25 + vpermxor 28, 28, 17, 25 + vpermxor 29, 29, 18, 25 + vpermxor 30, 30, 19, 25 + xxlor 32+25, 0, 0 + + vadduwm 10, 10, 15 + vadduwm 11, 11, 12 + vadduwm 8, 8, 13 + vadduwm 9, 9, 14 + vadduwm 26, 26, 31 + vadduwm 27, 27, 28 + vadduwm 24, 24, 29 + vadduwm 25, 25, 30 + + xxlor 0, 32+28, 32+28 + xxlor 32+28, 23, 23 + vxor 5, 5, 10 + vxor 6, 6, 11 + vxor 7, 7, 8 + vxor 4, 4, 9 + vxor 21, 21, 26 + vxor 22, 22, 27 + vxor 23, 23, 24 + vxor 20, 20, 25 + vrlw 5, 5, 28 + vrlw 6, 6, 28 + vrlw 7, 7, 28 + vrlw 4, 4, 28 + vrlw 21, 21, 28 + vrlw 22, 22, 28 + vrlw 23, 23, 28 + vrlw 20, 20, 28 + xxlor 32+28, 0, 0 +.endm + +.macro QT_loop_4x + # QR(v0, v4, v8, v12, v1, v5, v9, v13, v2, v6, v10, v14, v3, v7, v11, v15) + vadduwm 0, 0, 4 + vadduwm 1, 1, 5 + vadduwm 2, 2, 6 + vadduwm 3, 3, 7 + vpermxor 12, 12, 0, 20 + vpermxor 13, 13, 1, 20 + vpermxor 14, 14, 2, 20 + vpermxor 15, 15, 3, 20 + vadduwm 8, 8, 12 + vadduwm 9, 9, 13 + vadduwm 10, 10, 14 + vadduwm 11, 11, 15 + vxor 4, 4, 8 + vxor 5, 5, 9 + vxor 6, 6, 10 + vxor 7, 7, 11 + vrlw 4, 4, 21 + vrlw 5, 5, 21 + vrlw 6, 6, 21 + vrlw 7, 7, 21 + vadduwm 0, 0, 4 + vadduwm 1, 1, 5 + vadduwm 2, 2, 6 + vadduwm 3, 3, 7 + vpermxor 12, 12, 0, 22 + vpermxor 13, 13, 1, 22 + vpermxor 14, 14, 2, 22 + vpermxor 15, 15, 3, 22 + vadduwm 8, 8, 12 + vadduwm 9, 9, 13 + vadduwm 10, 10, 14 + vadduwm 11, 11, 15 + vxor 4, 4, 8 + vxor 5, 5, 9 + vxor 6, 6, 10 + vxor 7, 7, 11 + vrlw 4, 4, 23 + vrlw 5, 5, 23 + vrlw 6, 6, 23 + vrlw 7, 7, 23 + + # QR(v0, v5, v10, v15, v1, v6, v11, v12, v2, v7, v8, v13, v3, v4, v9, v14) + vadduwm 0, 0, 5 + vadduwm 1, 1, 6 + vadduwm 2, 2, 7 + vadduwm 3, 3, 4 + vpermxor 15, 15, 0, 20 + vpermxor 12, 12, 1, 20 + vpermxor 13, 13, 2, 20 + vpermxor 14, 14, 3, 20 + vadduwm 10, 10, 15 + vadduwm 11, 11, 12 + vadduwm 8, 8, 13 + vadduwm 9, 9, 14 + vxor 5, 5, 10 + vxor 6, 6, 11 + vxor 7, 7, 8 + vxor 4, 4, 9 + vrlw 5, 5, 21 + vrlw 6, 6, 21 + vrlw 7, 7, 21 + vrlw 4, 4, 21 + vadduwm 0, 0, 5 + vadduwm 1, 1, 6 + vadduwm 2, 2, 7 + vadduwm 3, 3, 4 + vpermxor 15, 15, 0, 22 + vpermxor 12, 12, 1, 22 + vpermxor 13, 13, 2, 22 + vpermxor 14, 14, 3, 22 + vadduwm 10, 10, 15 + vadduwm 11, 11, 12 + vadduwm 8, 8, 13 + vadduwm 9, 9, 14 + vxor 5, 5, 10 + vxor 6, 6, 11 + vxor 7, 7, 8 + vxor 4, 4, 9 + vrlw 5, 5, 23 + vrlw 6, 6, 23 + vrlw 7, 7, 23 + vrlw 4, 4, 23 +.endm + +# Transpose +.macro TP_4x a0 a1 a2 a3 + xxmrghw 10, 32+\a0, 32+\a1 # a0, a1, b0, b1 + xxmrghw 11, 32+\a2, 32+\a3 # a2, a3, b2, b3 + xxmrglw 12, 32+\a0, 32+\a1 # c0, c1, d0, d1 + xxmrglw 13, 32+\a2, 32+\a3 # c2, c3, d2, d3 + xxpermdi 32+\a0, 10, 11, 0 # a0, a1, a2, a3 + xxpermdi 32+\a1, 10, 11, 3 # b0, b1, b2, b3 + xxpermdi 32+\a2, 12, 13, 0 # c0, c1, c2, c3 + xxpermdi 32+\a3, 12, 13, 3 # d0, d1, d2, d3 +.endm + +# key stream = working state + state +.macro Add_state S + vadduwm \S+0, \S+0, 16-\S + vadduwm \S+4, \S+4, 17-\S + vadduwm \S+8, \S+8, 18-\S + vadduwm \S+12, \S+12, 19-\S + + vadduwm \S+1, \S+1, 16-\S + vadduwm \S+5, \S+5, 17-\S + vadduwm \S+9, \S+9, 18-\S + vadduwm \S+13, \S+13, 19-\S + + vadduwm \S+2, \S+2, 16-\S + vadduwm \S+6, \S+6, 17-\S + vadduwm \S+10, \S+10, 18-\S + vadduwm \S+14, \S+14, 19-\S + + vadduwm \S+3, \S+3, 16-\S + vadduwm \S+7, \S+7, 17-\S + vadduwm \S+11, \S+11, 18-\S + vadduwm \S+15, \S+15, 19-\S +.endm + +# +# write 256 bytes +# +.macro Write_256 S + add 9, 14, 5 + add 16, 14, 4 + lxvw4x 0, 0, 9 + lxvw4x 1, 17, 9 + lxvw4x 2, 18, 9 + lxvw4x 3, 19, 9 + lxvw4x 4, 20, 9 + lxvw4x 5, 21, 9 + lxvw4x 6, 22, 9 + lxvw4x 7, 23, 9 + lxvw4x 8, 24, 9 + lxvw4x 9, 25, 9 + lxvw4x 10, 26, 9 + lxvw4x 11, 27, 9 + lxvw4x 12, 28, 9 + lxvw4x 13, 29, 9 + lxvw4x 14, 30, 9 + lxvw4x 15, 31, 9 + + xxlxor \S+32, \S+32, 0 + xxlxor \S+36, \S+36, 1 + xxlxor \S+40, \S+40, 2 + xxlxor \S+44, \S+44, 3 + xxlxor \S+33, \S+33, 4 + xxlxor \S+37, \S+37, 5 + xxlxor \S+41, \S+41, 6 + xxlxor \S+45, \S+45, 7 + xxlxor \S+34, \S+34, 8 + xxlxor \S+38, \S+38, 9 + xxlxor \S+42, \S+42, 10 + xxlxor \S+46, \S+46, 11 + xxlxor \S+35, \S+35, 12 + xxlxor \S+39, \S+39, 13 + xxlxor \S+43, \S+43, 14 + xxlxor \S+47, \S+47, 15 + + stxvw4x \S+32, 0, 16 + stxvw4x \S+36, 17, 16 + stxvw4x \S+40, 18, 16 + stxvw4x \S+44, 19, 16 + + stxvw4x \S+33, 20, 16 + stxvw4x \S+37, 21, 16 + stxvw4x \S+41, 22, 16 + stxvw4x \S+45, 23, 16 + + stxvw4x \S+34, 24, 16 + stxvw4x \S+38, 25, 16 + stxvw4x \S+42, 26, 16 + stxvw4x \S+46, 27, 16 + + stxvw4x \S+35, 28, 16 + stxvw4x \S+39, 29, 16 + stxvw4x \S+43, 30, 16 + stxvw4x \S+47, 31, 16 + +.endm + +# +# chacha20_p10le_8x(u32 *state, byte *dst, const byte *src, size_t len, int nrounds); +# +SYM_FUNC_START(chacha_p10le_8x) +.align 5 + cmpdi 6, 0 + ble Out_no_chacha + + SAVE_REGS + + # r17 - r31 mainly for Write_256 macro. + li 17, 16 + li 18, 32 + li 19, 48 + li 20, 64 + li 21, 80 + li 22, 96 + li 23, 112 + li 24, 128 + li 25, 144 + li 26, 160 + li 27, 176 + li 28, 192 + li 29, 208 + li 30, 224 + li 31, 240 + + mr 15, 6 # len + li 14, 0 # offset to inp and outp + + lxvw4x 48, 0, 3 # vr16, constants + lxvw4x 49, 17, 3 # vr17, key 1 + lxvw4x 50, 18, 3 # vr18, key 2 + lxvw4x 51, 19, 3 # vr19, counter, nonce + + # create (0, 1, 2, 3) counters + vspltisw 0, 0 + vspltisw 1, 1 + vspltisw 2, 2 + vspltisw 3, 3 + vmrghw 4, 0, 1 + vmrglw 5, 2, 3 + vsldoi 30, 4, 5, 8 # vr30 counter, 4 (0, 1, 2, 3) + + vspltisw 21, 12 + vspltisw 23, 7 + + addis 11, 2, permx@toc@ha + addi 11, 11, permx@toc@l + lxvw4x 32+20, 0, 11 + lxvw4x 32+22, 17, 11 + + sradi 8, 7, 1 + + mtctr 8 + + # save constants to vsx + xxlor 16, 48, 48 + xxlor 17, 49, 49 + xxlor 18, 50, 50 + xxlor 19, 51, 51 + + vspltisw 25, 4 + vspltisw 26, 8 + + xxlor 25, 32+26, 32+26 + xxlor 24, 32+25, 32+25 + + vadduwm 31, 30, 25 # counter = (0, 1, 2, 3) + (4, 4, 4, 4) + xxlor 30, 32+30, 32+30 + xxlor 31, 32+31, 32+31 + + xxlor 20, 32+20, 32+20 + xxlor 21, 32+21, 32+21 + xxlor 22, 32+22, 32+22 + xxlor 23, 32+23, 32+23 + + cmpdi 6, 512 + blt Loop_last + +Loop_8x: + xxspltw 32+0, 16, 0 + xxspltw 32+1, 16, 1 + xxspltw 32+2, 16, 2 + xxspltw 32+3, 16, 3 + + xxspltw 32+4, 17, 0 + xxspltw 32+5, 17, 1 + xxspltw 32+6, 17, 2 + xxspltw 32+7, 17, 3 + xxspltw 32+8, 18, 0 + xxspltw 32+9, 18, 1 + xxspltw 32+10, 18, 2 + xxspltw 32+11, 18, 3 + xxspltw 32+12, 19, 0 + xxspltw 32+13, 19, 1 + xxspltw 32+14, 19, 2 + xxspltw 32+15, 19, 3 + vadduwm 12, 12, 30 # increase counter + + xxspltw 32+16, 16, 0 + xxspltw 32+17, 16, 1 + xxspltw 32+18, 16, 2 + xxspltw 32+19, 16, 3 + + xxspltw 32+20, 17, 0 + xxspltw 32+21, 17, 1 + xxspltw 32+22, 17, 2 + xxspltw 32+23, 17, 3 + xxspltw 32+24, 18, 0 + xxspltw 32+25, 18, 1 + xxspltw 32+26, 18, 2 + xxspltw 32+27, 18, 3 + xxspltw 32+28, 19, 0 + xxspltw 32+29, 19, 1 + vadduwm 28, 28, 31 # increase counter + xxspltw 32+30, 19, 2 + xxspltw 32+31, 19, 3 + +.align 5 +quarter_loop_8x: + QT_loop_8x + + bdnz quarter_loop_8x + + xxlor 0, 32+30, 32+30 + xxlor 32+30, 30, 30 + vadduwm 12, 12, 30 + xxlor 32+30, 0, 0 + TP_4x 0, 1, 2, 3 + TP_4x 4, 5, 6, 7 + TP_4x 8, 9, 10, 11 + TP_4x 12, 13, 14, 15 + + xxlor 0, 48, 48 + xxlor 1, 49, 49 + xxlor 2, 50, 50 + xxlor 3, 51, 51 + xxlor 48, 16, 16 + xxlor 49, 17, 17 + xxlor 50, 18, 18 + xxlor 51, 19, 19 + Add_state 0 + xxlor 48, 0, 0 + xxlor 49, 1, 1 + xxlor 50, 2, 2 + xxlor 51, 3, 3 + Write_256 0 + addi 14, 14, 256 # offset +=256 + addi 15, 15, -256 # len -=256 + + xxlor 5, 32+31, 32+31 + xxlor 32+31, 31, 31 + vadduwm 28, 28, 31 + xxlor 32+31, 5, 5 + TP_4x 16+0, 16+1, 16+2, 16+3 + TP_4x 16+4, 16+5, 16+6, 16+7 + TP_4x 16+8, 16+9, 16+10, 16+11 + TP_4x 16+12, 16+13, 16+14, 16+15 + + xxlor 32, 16, 16 + xxlor 33, 17, 17 + xxlor 34, 18, 18 + xxlor 35, 19, 19 + Add_state 16 + Write_256 16 + addi 14, 14, 256 # offset +=256 + addi 15, 15, -256 # len +=256 + + xxlor 32+24, 24, 24 + xxlor 32+25, 25, 25 + xxlor 32+30, 30, 30 + vadduwm 30, 30, 25 + vadduwm 31, 30, 24 + xxlor 30, 32+30, 32+30 + xxlor 31, 32+31, 32+31 + + cmpdi 15, 0 + beq Out_loop + + cmpdi 15, 512 + blt Loop_last + + mtctr 8 + b Loop_8x + +Loop_last: + lxvw4x 48, 0, 3 # vr16, constants + lxvw4x 49, 17, 3 # vr17, key 1 + lxvw4x 50, 18, 3 # vr18, key 2 + lxvw4x 51, 19, 3 # vr19, counter, nonce + + vspltisw 21, 12 + vspltisw 23, 7 + addis 11, 2, permx@toc@ha + addi 11, 11, permx@toc@l + lxvw4x 32+20, 0, 11 + lxvw4x 32+22, 17, 11 + + sradi 8, 7, 1 + mtctr 8 + +Loop_4x: + vspltw 0, 16, 0 + vspltw 1, 16, 1 + vspltw 2, 16, 2 + vspltw 3, 16, 3 + + vspltw 4, 17, 0 + vspltw 5, 17, 1 + vspltw 6, 17, 2 + vspltw 7, 17, 3 + vspltw 8, 18, 0 + vspltw 9, 18, 1 + vspltw 10, 18, 2 + vspltw 11, 18, 3 + vspltw 12, 19, 0 + vadduwm 12, 12, 30 # increase counter + vspltw 13, 19, 1 + vspltw 14, 19, 2 + vspltw 15, 19, 3 + +.align 5 +quarter_loop: + QT_loop_4x + + bdnz quarter_loop + + vadduwm 12, 12, 30 + TP_4x 0, 1, 2, 3 + TP_4x 4, 5, 6, 7 + TP_4x 8, 9, 10, 11 + TP_4x 12, 13, 14, 15 + + Add_state 0 + Write_256 0 + addi 14, 14, 256 # offset += 256 + addi 15, 15, -256 # len += 256 + + # Update state counter + vspltisw 25, 4 + vadduwm 30, 30, 25 + + cmpdi 15, 0 + beq Out_loop + cmpdi 15, 256 + blt Out_loop + + mtctr 8 + b Loop_4x + +Out_loop: + RESTORE_REGS + blr + +Out_no_chacha: + li 3, 0 + blr +SYM_FUNC_END(chacha_p10le_8x) + +SYM_DATA_START_LOCAL(PERMX) +.align 5 +permx: +.long 0x22330011, 0x66774455, 0xaabb8899, 0xeeffccdd +.long 0x11223300, 0x55667744, 0x99aabb88, 0xddeeffcc +SYM_DATA_END(PERMX) From a09450e59c5a93aa13164a3024f9c1ba02ced874 Mon Sep 17 00:00:00 2001 From: Danny Tsen Date: Wed, 26 Apr 2023 15:11:44 -0400 Subject: [PATCH 054/656] crypt: chacha20-p10 - Glue code for optmized Chacha20 implementation for ppc64le Signed-off-by: Danny Tsen Signed-off-by: Herbert Xu --- arch/powerpc/crypto/chacha-p10-glue.c | 221 ++++++++++++++++++++++++++ 1 file changed, 221 insertions(+) create mode 100644 arch/powerpc/crypto/chacha-p10-glue.c diff --git a/arch/powerpc/crypto/chacha-p10-glue.c b/arch/powerpc/crypto/chacha-p10-glue.c new file mode 100644 index 000000000000..74fb86b0d209 --- /dev/null +++ b/arch/powerpc/crypto/chacha-p10-glue.c @@ -0,0 +1,221 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * PowerPC P10 (ppc64le) accelerated ChaCha and XChaCha stream ciphers, + * including ChaCha20 (RFC7539) + * + * Copyright 2023- IBM Corp. All rights reserved. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +asmlinkage void chacha_p10le_8x(u32 *state, u8 *dst, const u8 *src, + unsigned int len, int nrounds); + +static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_p10); + +static void vsx_begin(void) +{ + preempt_disable(); + enable_kernel_vsx(); +} + +static void vsx_end(void) +{ + disable_kernel_vsx(); + preempt_enable(); +} + +static void chacha_p10_do_8x(u32 *state, u8 *dst, const u8 *src, + unsigned int bytes, int nrounds) +{ + unsigned int l = bytes & ~0x0FF; + + if (l > 0) { + chacha_p10le_8x(state, dst, src, l, nrounds); + bytes -= l; + src += l; + dst += l; + state[12] += l / CHACHA_BLOCK_SIZE; + } + + if (bytes > 0) + chacha_crypt_generic(state, dst, src, bytes, nrounds); +} + +void hchacha_block_arch(const u32 *state, u32 *stream, int nrounds) +{ + hchacha_block_generic(state, stream, nrounds); +} +EXPORT_SYMBOL(hchacha_block_arch); + +void chacha_init_arch(u32 *state, const u32 *key, const u8 *iv) +{ + chacha_init_generic(state, key, iv); +} +EXPORT_SYMBOL(chacha_init_arch); + +void chacha_crypt_arch(u32 *state, u8 *dst, const u8 *src, unsigned int bytes, + int nrounds) +{ + if (!static_branch_likely(&have_p10) || bytes <= CHACHA_BLOCK_SIZE || + !crypto_simd_usable()) + return chacha_crypt_generic(state, dst, src, bytes, nrounds); + + do { + unsigned int todo = min_t(unsigned int, bytes, SZ_4K); + + vsx_begin(); + chacha_p10_do_8x(state, dst, src, todo, nrounds); + vsx_end(); + + bytes -= todo; + src += todo; + dst += todo; + } while (bytes); +} +EXPORT_SYMBOL(chacha_crypt_arch); + +static int chacha_p10_stream_xor(struct skcipher_request *req, + const struct chacha_ctx *ctx, const u8 *iv) +{ + struct skcipher_walk walk; + u32 state[16]; + int err; + + err = skcipher_walk_virt(&walk, req, false); + if (err) + return err; + + chacha_init_generic(state, ctx->key, iv); + + while (walk.nbytes > 0) { + unsigned int nbytes = walk.nbytes; + + if (nbytes < walk.total) + nbytes = rounddown(nbytes, walk.stride); + + if (!crypto_simd_usable()) { + chacha_crypt_generic(state, walk.dst.virt.addr, + walk.src.virt.addr, nbytes, + ctx->nrounds); + } else { + vsx_begin(); + chacha_p10_do_8x(state, walk.dst.virt.addr, + walk.src.virt.addr, nbytes, ctx->nrounds); + vsx_end(); + } + err = skcipher_walk_done(&walk, walk.nbytes - nbytes); + if (err) + break; + } + + return err; +} + +static int chacha_p10(struct skcipher_request *req) +{ + struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req); + struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm); + + return chacha_p10_stream_xor(req, ctx, req->iv); +} + +static int xchacha_p10(struct skcipher_request *req) +{ + struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req); + struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm); + struct chacha_ctx subctx; + u32 state[16]; + u8 real_iv[16]; + + chacha_init_generic(state, ctx->key, req->iv); + hchacha_block_arch(state, subctx.key, ctx->nrounds); + subctx.nrounds = ctx->nrounds; + + memcpy(&real_iv[0], req->iv + 24, 8); + memcpy(&real_iv[8], req->iv + 16, 8); + return chacha_p10_stream_xor(req, &subctx, real_iv); +} + +static struct skcipher_alg algs[] = { + { + .base.cra_name = "chacha20", + .base.cra_driver_name = "chacha20-p10", + .base.cra_priority = 300, + .base.cra_blocksize = 1, + .base.cra_ctxsize = sizeof(struct chacha_ctx), + .base.cra_module = THIS_MODULE, + + .min_keysize = CHACHA_KEY_SIZE, + .max_keysize = CHACHA_KEY_SIZE, + .ivsize = CHACHA_IV_SIZE, + .chunksize = CHACHA_BLOCK_SIZE, + .setkey = chacha20_setkey, + .encrypt = chacha_p10, + .decrypt = chacha_p10, + }, { + .base.cra_name = "xchacha20", + .base.cra_driver_name = "xchacha20-p10", + .base.cra_priority = 300, + .base.cra_blocksize = 1, + .base.cra_ctxsize = sizeof(struct chacha_ctx), + .base.cra_module = THIS_MODULE, + + .min_keysize = CHACHA_KEY_SIZE, + .max_keysize = CHACHA_KEY_SIZE, + .ivsize = XCHACHA_IV_SIZE, + .chunksize = CHACHA_BLOCK_SIZE, + .setkey = chacha20_setkey, + .encrypt = xchacha_p10, + .decrypt = xchacha_p10, + }, { + .base.cra_name = "xchacha12", + .base.cra_driver_name = "xchacha12-p10", + .base.cra_priority = 300, + .base.cra_blocksize = 1, + .base.cra_ctxsize = sizeof(struct chacha_ctx), + .base.cra_module = THIS_MODULE, + + .min_keysize = CHACHA_KEY_SIZE, + .max_keysize = CHACHA_KEY_SIZE, + .ivsize = XCHACHA_IV_SIZE, + .chunksize = CHACHA_BLOCK_SIZE, + .setkey = chacha12_setkey, + .encrypt = xchacha_p10, + .decrypt = xchacha_p10, + } +}; + +static int __init chacha_p10_init(void) +{ + static_branch_enable(&have_p10); + + return crypto_register_skciphers(algs, ARRAY_SIZE(algs)); +} + +static void __exit chacha_p10_exit(void) +{ + crypto_unregister_skciphers(algs, ARRAY_SIZE(algs)); +} + +module_cpu_feature_match(PPC_MODULE_FEATURE_P10, chacha_p10_init); +module_exit(chacha_p10_exit); + +MODULE_DESCRIPTION("ChaCha and XChaCha stream ciphers (P10 accelerated)"); +MODULE_AUTHOR("Danny Tsen "); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS_CRYPTO("chacha20"); +MODULE_ALIAS_CRYPTO("chacha20-p10"); +MODULE_ALIAS_CRYPTO("xchacha20"); +MODULE_ALIAS_CRYPTO("xchacha20-p10"); +MODULE_ALIAS_CRYPTO("xchacha12"); +MODULE_ALIAS_CRYPTO("xchacha12-p10"); From 09ef057bd2a125e01fe841c4f40ca9fb97cc5cd4 Mon Sep 17 00:00:00 2001 From: Danny Tsen Date: Wed, 26 Apr 2023 15:11:45 -0400 Subject: [PATCH 055/656] crypto: poly1305-p10 - An optimized Poly1305 implementation with 4-way unrolling for ppc64le Improve overall performance of Poly1305 for Power10 or later CPU. Signed-off-by: Danny Tsen Signed-off-by: Herbert Xu --- arch/powerpc/crypto/poly1305-p10le_64.S | 1075 +++++++++++++++++++++++ 1 file changed, 1075 insertions(+) create mode 100644 arch/powerpc/crypto/poly1305-p10le_64.S diff --git a/arch/powerpc/crypto/poly1305-p10le_64.S b/arch/powerpc/crypto/poly1305-p10le_64.S new file mode 100644 index 000000000000..a3c1987f1ecd --- /dev/null +++ b/arch/powerpc/crypto/poly1305-p10le_64.S @@ -0,0 +1,1075 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +# +# Accelerated poly1305 implementation for ppc64le. +# +# Copyright 2023- IBM Corp. All rights reserved +# +#=================================================================================== +# Written by Danny Tsen +# +# Poly1305 - this version mainly using vector/VSX/Scalar +# - 26 bits limbs +# - Handle multiple 64 byte blcok. +# +# Block size 16 bytes +# key = (r, s) +# clamp r &= 0x0FFFFFFC0FFFFFFC 0x0FFFFFFC0FFFFFFF +# p = 2^130 - 5 +# a += m +# a = (r + a) % p +# a += s +# +# Improve performance by breaking down polynominal to the sum of products with +# h4 = m1 * r⁴ + m2 * r³ + m3 * r² + m4 * r +# +# 07/22/21 - this revison based on the above sum of products. Setup r^4, r^3, r^2, r and s3, s2, s1, s0 +# to 9 vectors for multiplications. +# +# setup r^4, r^3, r^2, r vectors +# vs [r^1, r^3, r^2, r^4] +# vs0 = [r0,.....] +# vs1 = [r1,.....] +# vs2 = [r2,.....] +# vs3 = [r3,.....] +# vs4 = [r4,.....] +# vs5 = [r1*5,...] +# vs6 = [r2*5,...] +# vs7 = [r2*5,...] +# vs8 = [r4*5,...] +# +# Each word in a vector consists a member of a "r/s" in [a * r/s]. +# +# r0, r4*5, r3*5, r2*5, r1*5; +# r1, r0, r4*5, r3*5, r2*5; +# r2, r1, r0, r4*5, r3*5; +# r3, r2, r1, r0, r4*5; +# r4, r3, r2, r1, r0 ; +# +# +# poly1305_p10le_4blocks( uint8_t *k, uint32_t mlen, uint8_t *m) +# k = 32 bytes key +# r3 = k (r, s) +# r4 = mlen +# r5 = m +# +#include +#include +#include +#include + +.machine "any" + +.text + +.macro SAVE_GPR GPR OFFSET FRAME + std \GPR,\OFFSET(\FRAME) +.endm + +.macro SAVE_VRS VRS OFFSET FRAME + li 16, \OFFSET + stvx \VRS, 16, \FRAME +.endm + +.macro SAVE_VSX VSX OFFSET FRAME + li 16, \OFFSET + stxvx \VSX, 16, \FRAME +.endm + +.macro RESTORE_GPR GPR OFFSET FRAME + ld \GPR,\OFFSET(\FRAME) +.endm + +.macro RESTORE_VRS VRS OFFSET FRAME + li 16, \OFFSET + lvx \VRS, 16, \FRAME +.endm + +.macro RESTORE_VSX VSX OFFSET FRAME + li 16, \OFFSET + lxvx \VSX, 16, \FRAME +.endm + +.macro SAVE_REGS + mflr 0 + std 0, 16(1) + stdu 1,-752(1) + + SAVE_GPR 14, 112, 1 + SAVE_GPR 15, 120, 1 + SAVE_GPR 16, 128, 1 + SAVE_GPR 17, 136, 1 + SAVE_GPR 18, 144, 1 + SAVE_GPR 19, 152, 1 + SAVE_GPR 20, 160, 1 + SAVE_GPR 21, 168, 1 + SAVE_GPR 22, 176, 1 + SAVE_GPR 23, 184, 1 + SAVE_GPR 24, 192, 1 + SAVE_GPR 25, 200, 1 + SAVE_GPR 26, 208, 1 + SAVE_GPR 27, 216, 1 + SAVE_GPR 28, 224, 1 + SAVE_GPR 29, 232, 1 + SAVE_GPR 30, 240, 1 + SAVE_GPR 31, 248, 1 + + addi 9, 1, 256 + SAVE_VRS 20, 0, 9 + SAVE_VRS 21, 16, 9 + SAVE_VRS 22, 32, 9 + SAVE_VRS 23, 48, 9 + SAVE_VRS 24, 64, 9 + SAVE_VRS 25, 80, 9 + SAVE_VRS 26, 96, 9 + SAVE_VRS 27, 112, 9 + SAVE_VRS 28, 128, 9 + SAVE_VRS 29, 144, 9 + SAVE_VRS 30, 160, 9 + SAVE_VRS 31, 176, 9 + + SAVE_VSX 14, 192, 9 + SAVE_VSX 15, 208, 9 + SAVE_VSX 16, 224, 9 + SAVE_VSX 17, 240, 9 + SAVE_VSX 18, 256, 9 + SAVE_VSX 19, 272, 9 + SAVE_VSX 20, 288, 9 + SAVE_VSX 21, 304, 9 + SAVE_VSX 22, 320, 9 + SAVE_VSX 23, 336, 9 + SAVE_VSX 24, 352, 9 + SAVE_VSX 25, 368, 9 + SAVE_VSX 26, 384, 9 + SAVE_VSX 27, 400, 9 + SAVE_VSX 28, 416, 9 + SAVE_VSX 29, 432, 9 + SAVE_VSX 30, 448, 9 + SAVE_VSX 31, 464, 9 +.endm # SAVE_REGS + +.macro RESTORE_REGS + addi 9, 1, 256 + RESTORE_VRS 20, 0, 9 + RESTORE_VRS 21, 16, 9 + RESTORE_VRS 22, 32, 9 + RESTORE_VRS 23, 48, 9 + RESTORE_VRS 24, 64, 9 + RESTORE_VRS 25, 80, 9 + RESTORE_VRS 26, 96, 9 + RESTORE_VRS 27, 112, 9 + RESTORE_VRS 28, 128, 9 + RESTORE_VRS 29, 144, 9 + RESTORE_VRS 30, 160, 9 + RESTORE_VRS 31, 176, 9 + + RESTORE_VSX 14, 192, 9 + RESTORE_VSX 15, 208, 9 + RESTORE_VSX 16, 224, 9 + RESTORE_VSX 17, 240, 9 + RESTORE_VSX 18, 256, 9 + RESTORE_VSX 19, 272, 9 + RESTORE_VSX 20, 288, 9 + RESTORE_VSX 21, 304, 9 + RESTORE_VSX 22, 320, 9 + RESTORE_VSX 23, 336, 9 + RESTORE_VSX 24, 352, 9 + RESTORE_VSX 25, 368, 9 + RESTORE_VSX 26, 384, 9 + RESTORE_VSX 27, 400, 9 + RESTORE_VSX 28, 416, 9 + RESTORE_VSX 29, 432, 9 + RESTORE_VSX 30, 448, 9 + RESTORE_VSX 31, 464, 9 + + RESTORE_GPR 14, 112, 1 + RESTORE_GPR 15, 120, 1 + RESTORE_GPR 16, 128, 1 + RESTORE_GPR 17, 136, 1 + RESTORE_GPR 18, 144, 1 + RESTORE_GPR 19, 152, 1 + RESTORE_GPR 20, 160, 1 + RESTORE_GPR 21, 168, 1 + RESTORE_GPR 22, 176, 1 + RESTORE_GPR 23, 184, 1 + RESTORE_GPR 24, 192, 1 + RESTORE_GPR 25, 200, 1 + RESTORE_GPR 26, 208, 1 + RESTORE_GPR 27, 216, 1 + RESTORE_GPR 28, 224, 1 + RESTORE_GPR 29, 232, 1 + RESTORE_GPR 30, 240, 1 + RESTORE_GPR 31, 248, 1 + + addi 1, 1, 752 + ld 0, 16(1) + mtlr 0 +.endm # RESTORE_REGS + +# +# p[0] = a0*r0 + a1*r4*5 + a2*r3*5 + a3*r2*5 + a4*r1*5; +# p[1] = a0*r1 + a1*r0 + a2*r4*5 + a3*r3*5 + a4*r2*5; +# p[2] = a0*r2 + a1*r1 + a2*r0 + a3*r4*5 + a4*r3*5; +# p[3] = a0*r3 + a1*r2 + a2*r1 + a3*r0 + a4*r4*5; +# p[4] = a0*r4 + a1*r3 + a2*r2 + a3*r1 + a4*r0 ; +# +# [r^2, r^3, r^1, r^4] +# [m3, m2, m4, m1] +# +# multiply odd and even words +.macro mul_odd + vmulouw 14, 4, 26 + vmulouw 10, 5, 3 + vmulouw 11, 6, 2 + vmulouw 12, 7, 1 + vmulouw 13, 8, 0 + vmulouw 15, 4, 27 + vaddudm 14, 14, 10 + vaddudm 14, 14, 11 + vmulouw 10, 5, 26 + vmulouw 11, 6, 3 + vaddudm 14, 14, 12 + vaddudm 14, 14, 13 # x0 + vaddudm 15, 15, 10 + vaddudm 15, 15, 11 + vmulouw 12, 7, 2 + vmulouw 13, 8, 1 + vaddudm 15, 15, 12 + vaddudm 15, 15, 13 # x1 + vmulouw 16, 4, 28 + vmulouw 10, 5, 27 + vmulouw 11, 6, 26 + vaddudm 16, 16, 10 + vaddudm 16, 16, 11 + vmulouw 12, 7, 3 + vmulouw 13, 8, 2 + vaddudm 16, 16, 12 + vaddudm 16, 16, 13 # x2 + vmulouw 17, 4, 29 + vmulouw 10, 5, 28 + vmulouw 11, 6, 27 + vaddudm 17, 17, 10 + vaddudm 17, 17, 11 + vmulouw 12, 7, 26 + vmulouw 13, 8, 3 + vaddudm 17, 17, 12 + vaddudm 17, 17, 13 # x3 + vmulouw 18, 4, 30 + vmulouw 10, 5, 29 + vmulouw 11, 6, 28 + vaddudm 18, 18, 10 + vaddudm 18, 18, 11 + vmulouw 12, 7, 27 + vmulouw 13, 8, 26 + vaddudm 18, 18, 12 + vaddudm 18, 18, 13 # x4 +.endm + +.macro mul_even + vmuleuw 9, 4, 26 + vmuleuw 10, 5, 3 + vmuleuw 11, 6, 2 + vmuleuw 12, 7, 1 + vmuleuw 13, 8, 0 + vaddudm 14, 14, 9 + vaddudm 14, 14, 10 + vaddudm 14, 14, 11 + vaddudm 14, 14, 12 + vaddudm 14, 14, 13 # x0 + + vmuleuw 9, 4, 27 + vmuleuw 10, 5, 26 + vmuleuw 11, 6, 3 + vmuleuw 12, 7, 2 + vmuleuw 13, 8, 1 + vaddudm 15, 15, 9 + vaddudm 15, 15, 10 + vaddudm 15, 15, 11 + vaddudm 15, 15, 12 + vaddudm 15, 15, 13 # x1 + + vmuleuw 9, 4, 28 + vmuleuw 10, 5, 27 + vmuleuw 11, 6, 26 + vmuleuw 12, 7, 3 + vmuleuw 13, 8, 2 + vaddudm 16, 16, 9 + vaddudm 16, 16, 10 + vaddudm 16, 16, 11 + vaddudm 16, 16, 12 + vaddudm 16, 16, 13 # x2 + + vmuleuw 9, 4, 29 + vmuleuw 10, 5, 28 + vmuleuw 11, 6, 27 + vmuleuw 12, 7, 26 + vmuleuw 13, 8, 3 + vaddudm 17, 17, 9 + vaddudm 17, 17, 10 + vaddudm 17, 17, 11 + vaddudm 17, 17, 12 + vaddudm 17, 17, 13 # x3 + + vmuleuw 9, 4, 30 + vmuleuw 10, 5, 29 + vmuleuw 11, 6, 28 + vmuleuw 12, 7, 27 + vmuleuw 13, 8, 26 + vaddudm 18, 18, 9 + vaddudm 18, 18, 10 + vaddudm 18, 18, 11 + vaddudm 18, 18, 12 + vaddudm 18, 18, 13 # x4 +.endm + +# +# poly1305_setup_r +# +# setup r^4, r^3, r^2, r vectors +# [r, r^3, r^2, r^4] +# vs0 = [r0,...] +# vs1 = [r1,...] +# vs2 = [r2,...] +# vs3 = [r3,...] +# vs4 = [r4,...] +# vs5 = [r4*5,...] +# vs6 = [r3*5,...] +# vs7 = [r2*5,...] +# vs8 = [r1*5,...] +# +# r0, r4*5, r3*5, r2*5, r1*5; +# r1, r0, r4*5, r3*5, r2*5; +# r2, r1, r0, r4*5, r3*5; +# r3, r2, r1, r0, r4*5; +# r4, r3, r2, r1, r0 ; +# +.macro poly1305_setup_r + + # save r + xxlor 26, 58, 58 + xxlor 27, 59, 59 + xxlor 28, 60, 60 + xxlor 29, 61, 61 + xxlor 30, 62, 62 + + xxlxor 31, 31, 31 + +# [r, r^3, r^2, r^4] + # compute r^2 + vmr 4, 26 + vmr 5, 27 + vmr 6, 28 + vmr 7, 29 + vmr 8, 30 + bl do_mul # r^2 r^1 + xxpermdi 58, 58, 36, 0x3 # r0 + xxpermdi 59, 59, 37, 0x3 # r1 + xxpermdi 60, 60, 38, 0x3 # r2 + xxpermdi 61, 61, 39, 0x3 # r3 + xxpermdi 62, 62, 40, 0x3 # r4 + xxpermdi 36, 36, 36, 0x3 + xxpermdi 37, 37, 37, 0x3 + xxpermdi 38, 38, 38, 0x3 + xxpermdi 39, 39, 39, 0x3 + xxpermdi 40, 40, 40, 0x3 + vspltisb 13, 2 + vsld 9, 27, 13 + vsld 10, 28, 13 + vsld 11, 29, 13 + vsld 12, 30, 13 + vaddudm 0, 9, 27 + vaddudm 1, 10, 28 + vaddudm 2, 11, 29 + vaddudm 3, 12, 30 + + bl do_mul # r^4 r^3 + vmrgow 26, 26, 4 + vmrgow 27, 27, 5 + vmrgow 28, 28, 6 + vmrgow 29, 29, 7 + vmrgow 30, 30, 8 + vspltisb 13, 2 + vsld 9, 27, 13 + vsld 10, 28, 13 + vsld 11, 29, 13 + vsld 12, 30, 13 + vaddudm 0, 9, 27 + vaddudm 1, 10, 28 + vaddudm 2, 11, 29 + vaddudm 3, 12, 30 + + # r^2 r^4 + xxlor 0, 58, 58 + xxlor 1, 59, 59 + xxlor 2, 60, 60 + xxlor 3, 61, 61 + xxlor 4, 62, 62 + xxlor 5, 32, 32 + xxlor 6, 33, 33 + xxlor 7, 34, 34 + xxlor 8, 35, 35 + + vspltw 9, 26, 3 + vspltw 10, 26, 2 + vmrgow 26, 10, 9 + vspltw 9, 27, 3 + vspltw 10, 27, 2 + vmrgow 27, 10, 9 + vspltw 9, 28, 3 + vspltw 10, 28, 2 + vmrgow 28, 10, 9 + vspltw 9, 29, 3 + vspltw 10, 29, 2 + vmrgow 29, 10, 9 + vspltw 9, 30, 3 + vspltw 10, 30, 2 + vmrgow 30, 10, 9 + + vsld 9, 27, 13 + vsld 10, 28, 13 + vsld 11, 29, 13 + vsld 12, 30, 13 + vaddudm 0, 9, 27 + vaddudm 1, 10, 28 + vaddudm 2, 11, 29 + vaddudm 3, 12, 30 +.endm + +SYM_FUNC_START_LOCAL(do_mul) + mul_odd + + # do reduction ( h %= p ) + # carry reduction + vspltisb 9, 2 + vsrd 10, 14, 31 + vsrd 11, 17, 31 + vand 7, 17, 25 + vand 4, 14, 25 + vaddudm 18, 18, 11 + vsrd 12, 18, 31 + vaddudm 15, 15, 10 + + vsrd 11, 15, 31 + vand 8, 18, 25 + vand 5, 15, 25 + vaddudm 4, 4, 12 + vsld 10, 12, 9 + vaddudm 6, 16, 11 + + vsrd 13, 6, 31 + vand 6, 6, 25 + vaddudm 4, 4, 10 + vsrd 10, 4, 31 + vaddudm 7, 7, 13 + + vsrd 11, 7, 31 + vand 7, 7, 25 + vand 4, 4, 25 + vaddudm 5, 5, 10 + vaddudm 8, 8, 11 + blr +SYM_FUNC_END(do_mul) + +# +# init key +# +.macro do_poly1305_init + addis 10, 2, rmask@toc@ha + addi 10, 10, rmask@toc@l + + ld 11, 0(10) + ld 12, 8(10) + + li 14, 16 + li 15, 32 + addis 10, 2, cnum@toc@ha + addi 10, 10, cnum@toc@l + lvx 25, 0, 10 # v25 - mask + lvx 31, 14, 10 # v31 = 1a + lvx 19, 15, 10 # v19 = 1 << 24 + lxv 24, 48(10) # vs24 + lxv 25, 64(10) # vs25 + + # initialize + # load key from r3 to vectors + ld 9, 24(3) + ld 10, 32(3) + and. 9, 9, 11 + and. 10, 10, 12 + + # break 26 bits + extrdi 14, 9, 26, 38 + extrdi 15, 9, 26, 12 + extrdi 16, 9, 12, 0 + mtvsrdd 58, 0, 14 + insrdi 16, 10, 14, 38 + mtvsrdd 59, 0, 15 + extrdi 17, 10, 26, 24 + mtvsrdd 60, 0, 16 + extrdi 18, 10, 24, 0 + mtvsrdd 61, 0, 17 + mtvsrdd 62, 0, 18 + + # r1 = r1 * 5, r2 = r2 * 5, r3 = r3 * 5, r4 = r4 * 5 + li 9, 5 + mtvsrdd 36, 0, 9 + vmulouw 0, 27, 4 # v0 = rr0 + vmulouw 1, 28, 4 # v1 = rr1 + vmulouw 2, 29, 4 # v2 = rr2 + vmulouw 3, 30, 4 # v3 = rr3 +.endm + +# +# poly1305_p10le_4blocks( uint8_t *k, uint32_t mlen, uint8_t *m) +# k = 32 bytes key +# r3 = k (r, s) +# r4 = mlen +# r5 = m +# +SYM_FUNC_START(poly1305_p10le_4blocks) +.align 5 + cmpdi 5, 64 + blt Out_no_poly1305 + + SAVE_REGS + + do_poly1305_init + + li 21, 0 # counter to message + + poly1305_setup_r + + # load previous H state + # break/convert r6 to 26 bits + ld 9, 0(3) + ld 10, 8(3) + ld 19, 16(3) + sldi 19, 19, 24 + mtvsrdd 41, 0, 19 + extrdi 14, 9, 26, 38 + extrdi 15, 9, 26, 12 + extrdi 16, 9, 12, 0 + mtvsrdd 36, 0, 14 + insrdi 16, 10, 14, 38 + mtvsrdd 37, 0, 15 + extrdi 17, 10, 26, 24 + mtvsrdd 38, 0, 16 + extrdi 18, 10, 24, 0 + mtvsrdd 39, 0, 17 + mtvsrdd 40, 0, 18 + vor 8, 8, 9 + + # input m1 m2 + add 20, 4, 21 + xxlor 49, 24, 24 + xxlor 50, 25, 25 + lxvw4x 43, 0, 20 + addi 17, 20, 16 + lxvw4x 44, 0, 17 + vperm 14, 11, 12, 17 + vperm 15, 11, 12, 18 + vand 9, 14, 25 # a0 + vsrd 10, 14, 31 # >> 26 + vsrd 11, 10, 31 # 12 bits left + vand 10, 10, 25 # a1 + vspltisb 13, 12 + vand 16, 15, 25 + vsld 12, 16, 13 + vor 11, 11, 12 + vand 11, 11, 25 # a2 + vspltisb 13, 14 + vsrd 12, 15, 13 # >> 14 + vsrd 13, 12, 31 # >> 26, a4 + vand 12, 12, 25 # a3 + + vaddudm 20, 4, 9 + vaddudm 21, 5, 10 + vaddudm 22, 6, 11 + vaddudm 23, 7, 12 + vaddudm 24, 8, 13 + + # m3 m4 + addi 17, 17, 16 + lxvw4x 43, 0, 17 + addi 17, 17, 16 + lxvw4x 44, 0, 17 + vperm 14, 11, 12, 17 + vperm 15, 11, 12, 18 + vand 9, 14, 25 # a0 + vsrd 10, 14, 31 # >> 26 + vsrd 11, 10, 31 # 12 bits left + vand 10, 10, 25 # a1 + vspltisb 13, 12 + vand 16, 15, 25 + vsld 12, 16, 13 + vspltisb 13, 14 + vor 11, 11, 12 + vand 11, 11, 25 # a2 + vsrd 12, 15, 13 # >> 14 + vsrd 13, 12, 31 # >> 26, a4 + vand 12, 12, 25 # a3 + + # Smash 4 message blocks into 5 vectors of [m4, m2, m3, m1] + vmrgow 4, 9, 20 + vmrgow 5, 10, 21 + vmrgow 6, 11, 22 + vmrgow 7, 12, 23 + vmrgow 8, 13, 24 + vaddudm 8, 8, 19 + + addi 5, 5, -64 # len -= 64 + addi 21, 21, 64 # offset += 64 + + li 9, 64 + divdu 31, 5, 9 + + cmpdi 31, 0 + ble Skip_block_loop + + mtctr 31 + +# h4 = m1 * r⁴ + m2 * r³ + m3 * r² + m4 * r +# Rewrite the polynominal sum of product as follows, +# h1 = (h0 + m1) * r^2, h2 = (h0 + m2) * r^2 +# h3 = (h1 + m3) * r^2, h4 = (h2 + m4) * r^2 --> (h0 + m1) r*4 + (h3 + m3) r^2, (h0 + m2) r^4 + (h0 + m4) r^2 +# .... Repeat +# h5 = (h3 + m5) * r^2, h6 = (h4 + m6) * r^2 --> +# h7 = (h5 + m7) * r^2, h8 = (h6 + m8) * r^1 --> m5 * r^4 + m6 * r^3 + m7 * r^2 + m8 * r +# +loop_4blocks: + + # Multiply odd words and even words + mul_odd + mul_even + # carry reduction + vspltisb 9, 2 + vsrd 10, 14, 31 + vsrd 11, 17, 31 + vand 7, 17, 25 + vand 4, 14, 25 + vaddudm 18, 18, 11 + vsrd 12, 18, 31 + vaddudm 15, 15, 10 + + vsrd 11, 15, 31 + vand 8, 18, 25 + vand 5, 15, 25 + vaddudm 4, 4, 12 + vsld 10, 12, 9 + vaddudm 6, 16, 11 + + vsrd 13, 6, 31 + vand 6, 6, 25 + vaddudm 4, 4, 10 + vsrd 10, 4, 31 + vaddudm 7, 7, 13 + + vsrd 11, 7, 31 + vand 7, 7, 25 + vand 4, 4, 25 + vaddudm 5, 5, 10 + vaddudm 8, 8, 11 + + # input m1 m2 m3 m4 + add 20, 4, 21 + xxlor 49, 24, 24 + xxlor 50, 25, 25 + lxvw4x 43, 0, 20 + addi 17, 20, 16 + lxvw4x 44, 0, 17 + vperm 14, 11, 12, 17 + vperm 15, 11, 12, 18 + addi 17, 17, 16 + lxvw4x 43, 0, 17 + addi 17, 17, 16 + lxvw4x 44, 0, 17 + vperm 17, 11, 12, 17 + vperm 18, 11, 12, 18 + + vand 20, 14, 25 # a0 + vand 9, 17, 25 # a0 + vsrd 21, 14, 31 # >> 26 + vsrd 22, 21, 31 # 12 bits left + vsrd 10, 17, 31 # >> 26 + vsrd 11, 10, 31 # 12 bits left + + vand 21, 21, 25 # a1 + vand 10, 10, 25 # a1 + + vspltisb 13, 12 + vand 16, 15, 25 + vsld 23, 16, 13 + vor 22, 22, 23 + vand 22, 22, 25 # a2 + vand 16, 18, 25 + vsld 12, 16, 13 + vor 11, 11, 12 + vand 11, 11, 25 # a2 + vspltisb 13, 14 + vsrd 23, 15, 13 # >> 14 + vsrd 24, 23, 31 # >> 26, a4 + vand 23, 23, 25 # a3 + vsrd 12, 18, 13 # >> 14 + vsrd 13, 12, 31 # >> 26, a4 + vand 12, 12, 25 # a3 + + vaddudm 4, 4, 20 + vaddudm 5, 5, 21 + vaddudm 6, 6, 22 + vaddudm 7, 7, 23 + vaddudm 8, 8, 24 + + # Smash 4 message blocks into 5 vectors of [m4, m2, m3, m1] + vmrgow 4, 9, 4 + vmrgow 5, 10, 5 + vmrgow 6, 11, 6 + vmrgow 7, 12, 7 + vmrgow 8, 13, 8 + vaddudm 8, 8, 19 + + addi 5, 5, -64 # len -= 64 + addi 21, 21, 64 # offset += 64 + + bdnz loop_4blocks + +Skip_block_loop: + xxlor 58, 0, 0 + xxlor 59, 1, 1 + xxlor 60, 2, 2 + xxlor 61, 3, 3 + xxlor 62, 4, 4 + xxlor 32, 5, 5 + xxlor 33, 6, 6 + xxlor 34, 7, 7 + xxlor 35, 8, 8 + + # Multiply odd words and even words + mul_odd + mul_even + + # Sum the products. + xxpermdi 41, 31, 46, 0 + xxpermdi 42, 31, 47, 0 + vaddudm 4, 14, 9 + xxpermdi 36, 31, 36, 3 + vaddudm 5, 15, 10 + xxpermdi 37, 31, 37, 3 + xxpermdi 43, 31, 48, 0 + vaddudm 6, 16, 11 + xxpermdi 38, 31, 38, 3 + xxpermdi 44, 31, 49, 0 + vaddudm 7, 17, 12 + xxpermdi 39, 31, 39, 3 + xxpermdi 45, 31, 50, 0 + vaddudm 8, 18, 13 + xxpermdi 40, 31, 40, 3 + + # carry reduction + vspltisb 9, 2 + vsrd 10, 4, 31 + vsrd 11, 7, 31 + vand 7, 7, 25 + vand 4, 4, 25 + vaddudm 8, 8, 11 + vsrd 12, 8, 31 + vaddudm 5, 5, 10 + + vsrd 11, 5, 31 + vand 8, 8, 25 + vand 5, 5, 25 + vaddudm 4, 4, 12 + vsld 10, 12, 9 + vaddudm 6, 6, 11 + + vsrd 13, 6, 31 + vand 6, 6, 25 + vaddudm 4, 4, 10 + vsrd 10, 4, 31 + vaddudm 7, 7, 13 + + vsrd 11, 7, 31 + vand 7, 7, 25 + vand 4, 4, 25 + vaddudm 5, 5, 10 + vsrd 10, 5, 31 + vand 5, 5, 25 + vaddudm 6, 6, 10 + vaddudm 8, 8, 11 + + b do_final_update + +do_final_update: + # combine 26 bit limbs + # v4, v5, v6, v7 and v8 are 26 bit vectors + vsld 5, 5, 31 + vor 20, 4, 5 + vspltisb 11, 12 + vsrd 12, 6, 11 + vsld 6, 6, 31 + vsld 6, 6, 31 + vor 20, 20, 6 + vspltisb 11, 14 + vsld 7, 7, 11 + vor 21, 7, 12 + mfvsrld 16, 40 # save last 2 bytes + vsld 8, 8, 11 + vsld 8, 8, 31 + vor 21, 21, 8 + mfvsrld 17, 52 + mfvsrld 19, 53 + srdi 16, 16, 24 + + std 17, 0(3) + std 19, 8(3) + stw 16, 16(3) + +Out_loop: + li 3, 0 + + RESTORE_REGS + + blr + +Out_no_poly1305: + li 3, 0 + blr +SYM_FUNC_END(poly1305_p10le_4blocks) + +# +# ======================================================================= +# The following functions implement 64 x 64 bits multiplication poly1305. +# +SYM_FUNC_START_LOCAL(Poly1305_init_64) + # mask 0x0FFFFFFC0FFFFFFC + # mask 0x0FFFFFFC0FFFFFFF + addis 10, 2, rmask@toc@ha + addi 10, 10, rmask@toc@l + ld 11, 0(10) + ld 12, 8(10) + + # initialize + # load key from r3 + ld 9, 24(3) + ld 10, 32(3) + and. 9, 9, 11 # cramp mask r0 + and. 10, 10, 12 # cramp mask r1 + + srdi 21, 10, 2 + add 19, 21, 10 # s1: r19 - (r1 >> 2) *5 + + # setup r and s + li 25, 0 + mtvsrdd 32+0, 9, 19 # r0, s1 + mtvsrdd 32+1, 10, 9 # r1, r0 + mtvsrdd 32+2, 19, 25 # s1 + mtvsrdd 32+3, 9, 25 # r0 + + blr +SYM_FUNC_END(Poly1305_init_64) + +# Poly1305_mult +# v6 = (h0, h1), v8 = h2 +# v0 = (r0, s1), v1 = (r1, r0), v2 = s1, v3 = r0 +# +# Output: v7, v10, v11 +# +SYM_FUNC_START_LOCAL(Poly1305_mult) + # + # d0 = h0 * r0 + h1 * s1 + vmsumudm 7, 6, 0, 9 # h0 * r0, h1 * s1 + + # d1 = h0 * r1 + h1 * r0 + h2 * s1 + vmsumudm 11, 6, 1, 9 # h0 * r1, h1 * r0 + vmsumudm 10, 8, 2, 11 # d1 += h2 * s1 + + # d2 = r0 + vmsumudm 11, 8, 3, 9 # d2 = h2 * r0 + blr +SYM_FUNC_END(Poly1305_mult) + +# +# carry reduction +# h %=p +# +# Input: v7, v10, v11 +# Output: r27, r28, r29 +# +SYM_FUNC_START_LOCAL(Carry_reduction) + mfvsrld 27, 32+7 + mfvsrld 28, 32+10 + mfvsrld 29, 32+11 + mfvsrd 20, 32+7 # h0.h + mfvsrd 21, 32+10 # h1.h + + addc 28, 28, 20 + adde 29, 29, 21 + srdi 22, 29, 0x2 + sldi 23, 22, 0x2 + add 23, 23, 22 # (h2 & 3) * 5 + addc 27, 27, 23 # h0 + addze 28, 28 # h1 + andi. 29, 29, 0x3 # h2 + blr +SYM_FUNC_END(Carry_reduction) + +# +# poly1305 multiplication +# h *= r, h %= p +# d0 = h0 * r0 + h1 * s1 +# d1 = h0 * r1 + h1 * r0 + h2 * s1 +# d2 = h0 * r0 +# +# +# unsigned int poly1305_test_64s(unisgned char *state, const byte *src, size_t len, highbit) +# - no highbit if final leftover block (highbit = 0) +# +SYM_FUNC_START(poly1305_64s) + cmpdi 5, 0 + ble Out_no_poly1305_64 + + mflr 0 + std 0, 16(1) + stdu 1,-400(1) + + SAVE_GPR 14, 112, 1 + SAVE_GPR 15, 120, 1 + SAVE_GPR 16, 128, 1 + SAVE_GPR 17, 136, 1 + SAVE_GPR 18, 144, 1 + SAVE_GPR 19, 152, 1 + SAVE_GPR 20, 160, 1 + SAVE_GPR 21, 168, 1 + SAVE_GPR 22, 176, 1 + SAVE_GPR 23, 184, 1 + SAVE_GPR 24, 192, 1 + SAVE_GPR 25, 200, 1 + SAVE_GPR 26, 208, 1 + SAVE_GPR 27, 216, 1 + SAVE_GPR 28, 224, 1 + SAVE_GPR 29, 232, 1 + SAVE_GPR 30, 240, 1 + SAVE_GPR 31, 248, 1 + + # Init poly1305 + bl Poly1305_init_64 + + li 25, 0 # offset to inp and outp + + add 11, 25, 4 + + # load h + # h0, h1, h2? + ld 27, 0(3) + ld 28, 8(3) + lwz 29, 16(3) + + li 30, 16 + divdu 31, 5, 30 + + mtctr 31 + + mr 24, 6 # highbit + +Loop_block_64: + vxor 9, 9, 9 + + ld 20, 0(11) + ld 21, 8(11) + addi 11, 11, 16 + + addc 27, 27, 20 + adde 28, 28, 21 + adde 29, 29, 24 + + li 22, 0 + mtvsrdd 32+6, 27, 28 # h0, h1 + mtvsrdd 32+8, 29, 22 # h2 + + bl Poly1305_mult + + bl Carry_reduction + + bdnz Loop_block_64 + + std 27, 0(3) + std 28, 8(3) + stw 29, 16(3) + + li 3, 0 + + RESTORE_GPR 14, 112, 1 + RESTORE_GPR 15, 120, 1 + RESTORE_GPR 16, 128, 1 + RESTORE_GPR 17, 136, 1 + RESTORE_GPR 18, 144, 1 + RESTORE_GPR 19, 152, 1 + RESTORE_GPR 20, 160, 1 + RESTORE_GPR 21, 168, 1 + RESTORE_GPR 22, 176, 1 + RESTORE_GPR 23, 184, 1 + RESTORE_GPR 24, 192, 1 + RESTORE_GPR 25, 200, 1 + RESTORE_GPR 26, 208, 1 + RESTORE_GPR 27, 216, 1 + RESTORE_GPR 28, 224, 1 + RESTORE_GPR 29, 232, 1 + RESTORE_GPR 30, 240, 1 + RESTORE_GPR 31, 248, 1 + + addi 1, 1, 400 + ld 0, 16(1) + mtlr 0 + + blr + +Out_no_poly1305_64: + li 3, 0 + blr +SYM_FUNC_END(poly1305_64s) + +# +# Input: r3 = h, r4 = s, r5 = mac +# mac = h + s +# +SYM_FUNC_START(poly1305_emit_64) + ld 10, 0(3) + ld 11, 8(3) + ld 12, 16(3) + + # compare modulus + # h + 5 + (-p) + mr 6, 10 + mr 7, 11 + mr 8, 12 + addic. 6, 6, 5 + addze 7, 7 + addze 8, 8 + srdi 9, 8, 2 # overflow? + cmpdi 9, 0 + beq Skip_h64 + mr 10, 6 + mr 11, 7 + mr 12, 8 + +Skip_h64: + ld 6, 0(4) + ld 7, 8(4) + addc 10, 10, 6 + adde 11, 11, 7 + addze 12, 12 + + std 10, 0(5) + std 11, 8(5) + blr +SYM_FUNC_END(poly1305_emit_64) + +SYM_DATA_START_LOCAL(RMASK) +.align 5 +rmask: +.byte 0xff, 0xff, 0xff, 0x0f, 0xfc, 0xff, 0xff, 0x0f, 0xfc, 0xff, 0xff, 0x0f, 0xfc, 0xff, 0xff, 0x0f +cnum: +.long 0x03ffffff, 0x00000000, 0x03ffffff, 0x00000000 +.long 0x1a, 0x00, 0x1a, 0x00 +.long 0x01000000, 0x01000000, 0x01000000, 0x01000000 +.long 0x00010203, 0x04050607, 0x10111213, 0x14151617 +.long 0x08090a0b, 0x0c0d0e0f, 0x18191a1b, 0x1c1d1e1f +SYM_DATA_END(RMASK) From ba8f8624fde2cbd92b995e6d92d4ecc97cf2a7f0 Mon Sep 17 00:00:00 2001 From: Danny Tsen Date: Wed, 26 Apr 2023 15:11:46 -0400 Subject: [PATCH 056/656] crypto: poly1305-p10 - Glue code for optmized Poly1305 implementation for ppc64le Signed-off-by: Danny Tsen Signed-off-by: Herbert Xu --- arch/powerpc/crypto/poly1305-p10-glue.c | 186 ++++++++++++++++++++++++ 1 file changed, 186 insertions(+) create mode 100644 arch/powerpc/crypto/poly1305-p10-glue.c diff --git a/arch/powerpc/crypto/poly1305-p10-glue.c b/arch/powerpc/crypto/poly1305-p10-glue.c new file mode 100644 index 000000000000..95dd708573ee --- /dev/null +++ b/arch/powerpc/crypto/poly1305-p10-glue.c @@ -0,0 +1,186 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Poly1305 authenticator algorithm, RFC7539. + * + * Copyright 2023- IBM Corp. All rights reserved. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +asmlinkage void poly1305_p10le_4blocks(void *h, const u8 *m, u32 mlen); +asmlinkage void poly1305_64s(void *h, const u8 *m, u32 mlen, int highbit); +asmlinkage void poly1305_emit_64(void *h, void *s, u8 *dst); + +static void vsx_begin(void) +{ + preempt_disable(); + enable_kernel_vsx(); +} + +static void vsx_end(void) +{ + disable_kernel_vsx(); + preempt_enable(); +} + +static int crypto_poly1305_p10_init(struct shash_desc *desc) +{ + struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc); + + poly1305_core_init(&dctx->h); + dctx->buflen = 0; + dctx->rset = 0; + dctx->sset = false; + + return 0; +} + +static unsigned int crypto_poly1305_setdctxkey(struct poly1305_desc_ctx *dctx, + const u8 *inp, unsigned int len) +{ + unsigned int acc = 0; + + if (unlikely(!dctx->sset)) { + if (!dctx->rset && len >= POLY1305_BLOCK_SIZE) { + struct poly1305_core_key *key = &dctx->core_r; + + key->key.r64[0] = get_unaligned_le64(&inp[0]); + key->key.r64[1] = get_unaligned_le64(&inp[8]); + inp += POLY1305_BLOCK_SIZE; + len -= POLY1305_BLOCK_SIZE; + acc += POLY1305_BLOCK_SIZE; + dctx->rset = 1; + } + if (len >= POLY1305_BLOCK_SIZE) { + dctx->s[0] = get_unaligned_le32(&inp[0]); + dctx->s[1] = get_unaligned_le32(&inp[4]); + dctx->s[2] = get_unaligned_le32(&inp[8]); + dctx->s[3] = get_unaligned_le32(&inp[12]); + acc += POLY1305_BLOCK_SIZE; + dctx->sset = true; + } + } + return acc; +} + +static int crypto_poly1305_p10_update(struct shash_desc *desc, + const u8 *src, unsigned int srclen) +{ + struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc); + unsigned int bytes, used; + + if (unlikely(dctx->buflen)) { + bytes = min(srclen, POLY1305_BLOCK_SIZE - dctx->buflen); + memcpy(dctx->buf + dctx->buflen, src, bytes); + src += bytes; + srclen -= bytes; + dctx->buflen += bytes; + + if (dctx->buflen == POLY1305_BLOCK_SIZE) { + if (likely(!crypto_poly1305_setdctxkey(dctx, dctx->buf, + POLY1305_BLOCK_SIZE))) { + vsx_begin(); + poly1305_64s(&dctx->h, dctx->buf, + POLY1305_BLOCK_SIZE, 1); + vsx_end(); + } + dctx->buflen = 0; + } + } + + if (likely(srclen >= POLY1305_BLOCK_SIZE)) { + bytes = round_down(srclen, POLY1305_BLOCK_SIZE); + used = crypto_poly1305_setdctxkey(dctx, src, bytes); + if (likely(used)) { + srclen -= used; + src += used; + } + if (crypto_simd_usable() && (srclen >= POLY1305_BLOCK_SIZE*4)) { + vsx_begin(); + poly1305_p10le_4blocks(&dctx->h, src, srclen); + vsx_end(); + src += srclen - (srclen % (POLY1305_BLOCK_SIZE * 4)); + srclen %= POLY1305_BLOCK_SIZE * 4; + } + while (srclen >= POLY1305_BLOCK_SIZE) { + vsx_begin(); + poly1305_64s(&dctx->h, src, POLY1305_BLOCK_SIZE, 1); + vsx_end(); + srclen -= POLY1305_BLOCK_SIZE; + src += POLY1305_BLOCK_SIZE; + } + } + + if (unlikely(srclen)) { + dctx->buflen = srclen; + memcpy(dctx->buf, src, srclen); + } + + return 0; +} + +static int crypto_poly1305_p10_final(struct shash_desc *desc, u8 *dst) +{ + struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc); + + if (unlikely(!dctx->sset)) + return -ENOKEY; + + if ((dctx->buflen)) { + dctx->buf[dctx->buflen++] = 1; + memset(dctx->buf + dctx->buflen, 0, + POLY1305_BLOCK_SIZE - dctx->buflen); + vsx_begin(); + poly1305_64s(&dctx->h, dctx->buf, POLY1305_BLOCK_SIZE, 0); + vsx_end(); + dctx->buflen = 0; + } + + poly1305_emit_64(&dctx->h, &dctx->s, dst); + return 0; +} + +static struct shash_alg poly1305_alg = { + .digestsize = POLY1305_DIGEST_SIZE, + .init = crypto_poly1305_p10_init, + .update = crypto_poly1305_p10_update, + .final = crypto_poly1305_p10_final, + .descsize = sizeof(struct poly1305_desc_ctx), + .base = { + .cra_name = "poly1305", + .cra_driver_name = "poly1305-p10", + .cra_priority = 300, + .cra_blocksize = POLY1305_BLOCK_SIZE, + .cra_module = THIS_MODULE, + }, +}; + +static int __init poly1305_p10_init(void) +{ + return crypto_register_shash(&poly1305_alg); +} + +static void __exit poly1305_p10_exit(void) +{ + crypto_unregister_shash(&poly1305_alg); +} + +module_cpu_feature_match(PPC_MODULE_FEATURE_P10, poly1305_p10_init); +module_exit(poly1305_p10_exit); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Danny Tsen "); +MODULE_DESCRIPTION("Optimized Poly1305 for P10"); +MODULE_ALIAS_CRYPTO("poly1305"); +MODULE_ALIAS_CRYPTO("poly1305-p10"); From 161fca7e3e905d5e99dbd79ed55d9212e6d80eb0 Mon Sep 17 00:00:00 2001 From: Danny Tsen Date: Wed, 26 Apr 2023 15:11:47 -0400 Subject: [PATCH 057/656] crypto: powerpc - Add chacha20/poly1305-p10 to Kconfig and Makefile Defined CRYPTO_CHACHA20_P10 and CRYPTO POLY1305_P10 in Kconfig to support optimized implementation for Power10 and later CPU. Added new module driver chacha-p10-crypto and poly1305-p10-crypto. Signed-off-by: Danny Tsen Signed-off-by: Herbert Xu --- arch/powerpc/crypto/Kconfig | 26 ++++++++++++++++++++++++++ arch/powerpc/crypto/Makefile | 4 ++++ 2 files changed, 30 insertions(+) diff --git a/arch/powerpc/crypto/Kconfig b/arch/powerpc/crypto/Kconfig index ad1872518992..f25024afdda5 100644 --- a/arch/powerpc/crypto/Kconfig +++ b/arch/powerpc/crypto/Kconfig @@ -111,4 +111,30 @@ config CRYPTO_AES_GCM_P10 Support for cryptographic acceleration instructions on Power10 or later CPU. This module supports stitched acceleration for AES/GCM. +config CRYPTO_CHACHA20_P10 + tristate "Ciphers: ChaCha20, XChacha20, XChacha12 (P10 or later)" + depends on PPC64 && CPU_LITTLE_ENDIAN + select CRYPTO_SKCIPHER + select CRYPTO_LIB_CHACHA_GENERIC + select CRYPTO_ARCH_HAVE_LIB_CHACHA + help + Length-preserving ciphers: ChaCha20, XChaCha20, and XChaCha12 + stream cipher algorithms + + Architecture: PowerPC64 + - Power10 or later + - Little-endian + +config CRYPTO_POLY1305_P10 + tristate "Hash functions: Poly1305 (P10 or later)" + depends on PPC64 && CPU_LITTLE_ENDIAN + select CRYPTO_HASH + select CRYPTO_LIB_POLY1305_GENERIC + help + Poly1305 authenticator algorithm (RFC7539) + + Architecture: PowerPC64 + - Power10 or later + - Little-endian + endmenu diff --git a/arch/powerpc/crypto/Makefile b/arch/powerpc/crypto/Makefile index 7b4f516abec1..ebdac1b9eb9a 100644 --- a/arch/powerpc/crypto/Makefile +++ b/arch/powerpc/crypto/Makefile @@ -14,6 +14,8 @@ obj-$(CONFIG_CRYPTO_CRC32C_VPMSUM) += crc32c-vpmsum.o obj-$(CONFIG_CRYPTO_CRCT10DIF_VPMSUM) += crct10dif-vpmsum.o obj-$(CONFIG_CRYPTO_VPMSUM_TESTER) += crc-vpmsum_test.o obj-$(CONFIG_CRYPTO_AES_GCM_P10) += aes-gcm-p10-crypto.o +obj-$(CONFIG_CRYPTO_CHACHA20_P10) += chacha-p10-crypto.o +obj-$(CONFIG_CRYPTO_POLY1305_P10) += poly1305-p10-crypto.o aes-ppc-spe-y := aes-spe-core.o aes-spe-keys.o aes-tab-4k.o aes-spe-modes.o aes-spe-glue.o md5-ppc-y := md5-asm.o md5-glue.o @@ -23,6 +25,8 @@ sha256-ppc-spe-y := sha256-spe-asm.o sha256-spe-glue.o crc32c-vpmsum-y := crc32c-vpmsum_asm.o crc32c-vpmsum_glue.o crct10dif-vpmsum-y := crct10dif-vpmsum_asm.o crct10dif-vpmsum_glue.o aes-gcm-p10-crypto-y := aes-gcm-p10-glue.o aes-gcm-p10.o ghashp10-ppc.o aesp10-ppc.o +chacha-p10-crypto-y := chacha-p10-glue.o chacha-p10le-8x.o +poly1305-p10-crypto-y := poly1305-p10-glue.o poly1305-p10le_64.o quiet_cmd_perl = PERL $@ cmd_perl = $(PERL) $< $(if $(CONFIG_CPU_LITTLE_ENDIAN), linux-ppc64le, linux-ppc64) > $@ From 31ba6dd2298fd9c49ecf66200103b1e88055f7a0 Mon Sep 17 00:00:00 2001 From: Gaosheng Cui Date: Mon, 19 Jun 2023 21:24:24 +0800 Subject: [PATCH 058/656] KEYS: fix kernel-doc warnings in verify_pefile Fix kernel-doc warnings in verify_pefile: crypto/asymmetric_keys/verify_pefile.c:423: warning: Excess function parameter 'trust_keys' description in 'verify_pefile_signature' crypto/asymmetric_keys/verify_pefile.c:423: warning: Function parameter or member 'trusted_keys' not described in 'verify_pefile_signature' Signed-off-by: Gaosheng Cui Signed-off-by: Herbert Xu --- crypto/asymmetric_keys/verify_pefile.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/crypto/asymmetric_keys/verify_pefile.c b/crypto/asymmetric_keys/verify_pefile.c index 22beaf2213a2..f440767bd727 100644 --- a/crypto/asymmetric_keys/verify_pefile.c +++ b/crypto/asymmetric_keys/verify_pefile.c @@ -391,7 +391,7 @@ error_no_desc: * verify_pefile_signature - Verify the signature on a PE binary image * @pebuf: Buffer containing the PE binary image * @pelen: Length of the binary image - * @trust_keys: Signing certificate(s) to use as starting points + * @trusted_keys: Signing certificate(s) to use as starting points * @usage: The use to which the key is being put. * * Validate that the certificate chain inside the PKCS#7 message inside the PE From babb80b3ecc6f40c962e13c654ebcd27f25ee327 Mon Sep 17 00:00:00 2001 From: Azeem Shaikh Date: Tue, 20 Jun 2023 20:08:32 +0000 Subject: [PATCH 059/656] crypto: lrw,xts - Replace strlcpy with strscpy strlcpy() reads the entire source buffer first. This read may exceed the destination size limit. This is both inefficient and can lead to linear read overflows if a source string is not NUL-terminated [1]. In an effort to remove strlcpy() completely [2], replace strlcpy() here with strscpy(). Direct replacement is safe here since return value of -errno is used to check for truncation instead of sizeof(dest). [1] https://www.kernel.org/doc/html/latest/process/deprecated.html#strlcpy [2] https://github.com/KSPP/linux/issues/89 Signed-off-by: Azeem Shaikh Reviewed-by: Kees Cook Signed-off-by: Herbert Xu --- crypto/lrw.c | 6 +++--- crypto/xts.c | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/crypto/lrw.c b/crypto/lrw.c index 1b0f76ba3eb5..59260aefed28 100644 --- a/crypto/lrw.c +++ b/crypto/lrw.c @@ -357,10 +357,10 @@ static int lrw_create(struct crypto_template *tmpl, struct rtattr **tb) * cipher name. */ if (!strncmp(cipher_name, "ecb(", 4)) { - unsigned len; + int len; - len = strlcpy(ecb_name, cipher_name + 4, sizeof(ecb_name)); - if (len < 2 || len >= sizeof(ecb_name)) + len = strscpy(ecb_name, cipher_name + 4, sizeof(ecb_name)); + if (len < 2) goto err_free_inst; if (ecb_name[len - 1] != ')') diff --git a/crypto/xts.c b/crypto/xts.c index 09be909a6a1a..548b302c6c6a 100644 --- a/crypto/xts.c +++ b/crypto/xts.c @@ -396,10 +396,10 @@ static int xts_create(struct crypto_template *tmpl, struct rtattr **tb) * cipher name. */ if (!strncmp(cipher_name, "ecb(", 4)) { - unsigned len; + int len; - len = strlcpy(ctx->name, cipher_name + 4, sizeof(ctx->name)); - if (len < 2 || len >= sizeof(ctx->name)) + len = strscpy(ctx->name, cipher_name + 4, sizeof(ctx->name)); + if (len < 2) goto err_free_inst; if (ctx->name[len - 1] != ')') From 74c6df413f64f349e8ae4166d97324803bf55b58 Mon Sep 17 00:00:00 2001 From: "Chang S. Bae" Date: Wed, 21 Jun 2023 05:06:53 -0700 Subject: [PATCH 060/656] crypto: x86/aesni - Align the address before aes_set_key_common() aes_set_key_common() performs runtime alignment to the void *raw_ctx pointer. This facilitates consistent access to the 16byte-aligned address during key extension. However, the alignment is already handlded in the GCM-related setkey functions before invoking the common function. Consequently, the alignment in the common function is unnecessary for those functions. To establish a consistent approach throughout the glue code, remove the aes_ctx() call from its current location. Instead, place it at each call site where the runtime alignment is currently absent. Link: https://lore.kernel.org/lkml/20230605024623.GA4653@quark.localdomain/ Suggested-by: Eric Biggers Signed-off-by: Chang S. Bae Cc: linux-crypto@vger.kernel.org Cc: x86@kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Herbert Xu --- arch/x86/crypto/aesni-intel_glue.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/x86/crypto/aesni-intel_glue.c b/arch/x86/crypto/aesni-intel_glue.c index a5b0cb3efeba..c4eea7e746e7 100644 --- a/arch/x86/crypto/aesni-intel_glue.c +++ b/arch/x86/crypto/aesni-intel_glue.c @@ -229,10 +229,10 @@ static inline struct crypto_aes_ctx *aes_ctx(void *raw_ctx) return (struct crypto_aes_ctx *)ALIGN(addr, align); } -static int aes_set_key_common(struct crypto_tfm *tfm, void *raw_ctx, +static int aes_set_key_common(struct crypto_tfm *tfm, + struct crypto_aes_ctx *ctx, const u8 *in_key, unsigned int key_len) { - struct crypto_aes_ctx *ctx = aes_ctx(raw_ctx); int err; if (key_len != AES_KEYSIZE_128 && key_len != AES_KEYSIZE_192 && @@ -253,7 +253,7 @@ static int aes_set_key_common(struct crypto_tfm *tfm, void *raw_ctx, static int aes_set_key(struct crypto_tfm *tfm, const u8 *in_key, unsigned int key_len) { - return aes_set_key_common(tfm, crypto_tfm_ctx(tfm), in_key, key_len); + return aes_set_key_common(tfm, aes_ctx(crypto_tfm_ctx(tfm)), in_key, key_len); } static void aesni_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src) @@ -286,7 +286,7 @@ static int aesni_skcipher_setkey(struct crypto_skcipher *tfm, const u8 *key, unsigned int len) { return aes_set_key_common(crypto_skcipher_tfm(tfm), - crypto_skcipher_ctx(tfm), key, len); + aes_ctx(crypto_skcipher_ctx(tfm)), key, len); } static int ecb_encrypt(struct skcipher_request *req) @@ -893,13 +893,13 @@ static int xts_aesni_setkey(struct crypto_skcipher *tfm, const u8 *key, keylen /= 2; /* first half of xts-key is for crypt */ - err = aes_set_key_common(crypto_skcipher_tfm(tfm), ctx->raw_crypt_ctx, + err = aes_set_key_common(crypto_skcipher_tfm(tfm), aes_ctx(ctx->raw_crypt_ctx), key, keylen); if (err) return err; /* second half of xts-key is for tweak */ - return aes_set_key_common(crypto_skcipher_tfm(tfm), ctx->raw_tweak_ctx, + return aes_set_key_common(crypto_skcipher_tfm(tfm), aes_ctx(ctx->raw_tweak_ctx), key + keylen, keylen); } From 0f942bdfe9d463be3073301519492f8d53c6b2d5 Mon Sep 17 00:00:00 2001 From: Giovanni Cabiddu Date: Thu, 22 Jun 2023 10:26:35 +0100 Subject: [PATCH 061/656] crypto: qat - change value of default idle filter The power management configuration of 4xxx devices is too aggressive and in some conditions the device might be prematurely put to a low power state. Increase the idle filter value to prevent that. In future, this will be set by firmware. Fixes: e5745f34113b ("crypto: qat - enable power management for QAT GEN4") Signed-off-by: Giovanni Cabiddu Reviewed-by: Damian Muszynski Signed-off-by: Herbert Xu --- drivers/crypto/intel/qat/qat_common/adf_gen4_pm.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen4_pm.h b/drivers/crypto/intel/qat/qat_common/adf_gen4_pm.h index dd112923e006..c2768762cca3 100644 --- a/drivers/crypto/intel/qat/qat_common/adf_gen4_pm.h +++ b/drivers/crypto/intel/qat/qat_common/adf_gen4_pm.h @@ -35,7 +35,7 @@ #define ADF_GEN4_PM_MSG_PENDING BIT(0) #define ADF_GEN4_PM_MSG_PAYLOAD_BIT_MASK GENMASK(28, 1) -#define ADF_GEN4_PM_DEFAULT_IDLE_FILTER (0x0) +#define ADF_GEN4_PM_DEFAULT_IDLE_FILTER (0x6) #define ADF_GEN4_PM_MAX_IDLE_FILTER (0x7) #define ADF_GEN4_PM_DEFAULT_IDLE_SUPPORT (0x1) From 36124dea164cf684869e856b2ada23e8adab5f03 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Fri, 14 Jul 2023 12:17:45 +0300 Subject: [PATCH 062/656] spi: Remove code duplication in spi_add_device*() The commit 0c79378c0199 ("spi: add ancillary device support") added a dozen of duplicating lines of code. We may move them to the __spi_add_device(). Note, that the code may be called under the mutex. Signed-off-by: Andy Shevchenko Reviewed-by: Sebastian Reichel Link: https://lore.kernel.org/r/20230714091748.89681-2-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown --- drivers/spi/spi.c | 32 ++++++++++---------------------- 1 file changed, 10 insertions(+), 22 deletions(-) diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index ae2693ba1744..8e70f4183e62 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -631,6 +631,16 @@ static int __spi_add_device(struct spi_device *spi) struct device *dev = ctlr->dev.parent; int status; + /* Chipselects are numbered 0..max; validate. */ + if (spi_get_chipselect(spi, 0) >= ctlr->num_chipselect) { + dev_err(dev, "cs%d >= max %d\n", spi_get_chipselect(spi, 0), + ctlr->num_chipselect); + return -EINVAL; + } + + /* Set the bus ID string */ + spi_dev_set_name(spi); + /* * We need to make sure there's no other device with this * chipselect **BEFORE** we call setup(), else we'll trash @@ -689,19 +699,8 @@ static int __spi_add_device(struct spi_device *spi) int spi_add_device(struct spi_device *spi) { struct spi_controller *ctlr = spi->controller; - struct device *dev = ctlr->dev.parent; int status; - /* Chipselects are numbered 0..max; validate. */ - if (spi_get_chipselect(spi, 0) >= ctlr->num_chipselect) { - dev_err(dev, "cs%d >= max %d\n", spi_get_chipselect(spi, 0), - ctlr->num_chipselect); - return -EINVAL; - } - - /* Set the bus ID string */ - spi_dev_set_name(spi); - mutex_lock(&ctlr->add_lock); status = __spi_add_device(spi); mutex_unlock(&ctlr->add_lock); @@ -712,17 +711,6 @@ EXPORT_SYMBOL_GPL(spi_add_device); static int spi_add_device_locked(struct spi_device *spi) { struct spi_controller *ctlr = spi->controller; - struct device *dev = ctlr->dev.parent; - - /* Chipselects are numbered 0..max; validate. */ - if (spi_get_chipselect(spi, 0) >= ctlr->num_chipselect) { - dev_err(dev, "cs%d >= max %d\n", spi_get_chipselect(spi, 0), - ctlr->num_chipselect); - return -EINVAL; - } - - /* Set the bus ID string */ - spi_dev_set_name(spi); WARN_ON(!mutex_is_locked(&ctlr->add_lock)); return __spi_add_device(spi); From 7b5c6a545b3491fb785c75cee60e6b0c35a4de1b Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Fri, 14 Jul 2023 12:17:46 +0300 Subject: [PATCH 063/656] spi: Kill spi_add_device_locked() Now, spi_add_device_locked() has just a line on top of __spi_add_device(). Besides that, it has a single caller. So, just kill it and embed its parts into the caller. Signed-off-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230714091748.89681-3-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown --- drivers/spi/spi.c | 15 +++++---------- 1 file changed, 5 insertions(+), 10 deletions(-) diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 8e70f4183e62..05f702339182 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -708,14 +708,6 @@ int spi_add_device(struct spi_device *spi) } EXPORT_SYMBOL_GPL(spi_add_device); -static int spi_add_device_locked(struct spi_device *spi) -{ - struct spi_controller *ctlr = spi->controller; - - WARN_ON(!mutex_is_locked(&ctlr->add_lock)); - return __spi_add_device(spi); -} - /** * spi_new_device - instantiate one new SPI device * @ctlr: Controller to which device is connected @@ -2417,11 +2409,12 @@ static void of_register_spi_devices(struct spi_controller *ctlr) { } struct spi_device *spi_new_ancillary_device(struct spi_device *spi, u8 chip_select) { + struct spi_controller *ctlr = spi->controller; struct spi_device *ancillary; int rc = 0; /* Alloc an spi_device */ - ancillary = spi_alloc_device(spi->controller); + ancillary = spi_alloc_device(ctlr); if (!ancillary) { rc = -ENOMEM; goto err_out; @@ -2436,8 +2429,10 @@ struct spi_device *spi_new_ancillary_device(struct spi_device *spi, ancillary->max_speed_hz = spi->max_speed_hz; ancillary->mode = spi->mode; + WARN_ON(!mutex_is_locked(&ctlr->add_lock)); + /* Register the new device */ - rc = spi_add_device_locked(ancillary); + rc = __spi_add_device(ancillary); if (rc) { dev_err(&spi->dev, "failed to register ancillary device\n"); goto err_out; From 169f5312dc46deb986e368b6828bedbedd297f6e Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Fri, 14 Jul 2023 12:17:47 +0300 Subject: [PATCH 064/656] spi: Use BITS_TO_BYTES() BITS_TO_BYTES() is the existing macro which takes care about full bytes that may fully hold the given amount of bits. Use it. Signed-off-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230714091748.89681-4-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown --- drivers/spi/spi.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 05f702339182..8d6304cb061e 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -3877,11 +3877,9 @@ static int __spi_validate(struct spi_device *spi, struct spi_message *message) */ if ((spi->mode & SPI_CS_WORD) && (!(ctlr->mode_bits & SPI_CS_WORD) || spi_get_csgpiod(spi, 0))) { - size_t maxsize; + size_t maxsize = BITS_TO_BYTES(spi->bits_per_word); int ret; - maxsize = (spi->bits_per_word + 7) / 8; - /* spi_split_transfers_maxsize() requires message->spi */ message->spi = spi; From 75e308ffc4f0d36b895f1110ece8b77d4116fdb1 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Fri, 14 Jul 2023 12:17:48 +0300 Subject: [PATCH 065/656] spi: Use struct_size() helper The Documentation/process/deprecated.rst suggests to use flexible array members to provide a way to declare having a dynamically sized set of trailing elements in a structure.This makes code robust agains bunch of the issues described in the documentation, main of which is about the correctness of the sizeof() calculation for this data structure. Due to above, prefer struct_size() over open-coded versions. Signed-off-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230714091748.89681-5-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown --- include/linux/spi/spi.h | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h index 04daf61dfd3f..7f8b478fdeb3 100644 --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -1085,6 +1086,8 @@ struct spi_transfer { * @state: for use by whichever driver currently owns the message * @resources: for resource management when the SPI message is processed * @prepared: spi_prepare_message was called for the this message + * @t: for use with spi_message_alloc() when message and transfers have + * been allocated together * * A @spi_message is used to execute an atomic sequence of data transfers, * each represented by a struct spi_transfer. The sequence is "atomic" @@ -1139,6 +1142,9 @@ struct spi_message { /* List of spi_res resources when the SPI message is processed */ struct list_head resources; + + /* For embedding transfers into the memory of the message */ + struct spi_transfer t[]; }; static inline void spi_message_init_no_memset(struct spi_message *m) @@ -1199,16 +1205,13 @@ static inline struct spi_message *spi_message_alloc(unsigned ntrans, gfp_t flags { struct spi_message *m; - m = kzalloc(sizeof(struct spi_message) - + ntrans * sizeof(struct spi_transfer), - flags); + m = kzalloc(struct_size(m, t, ntrans), flags); if (m) { unsigned i; - struct spi_transfer *t = (struct spi_transfer *)(m + 1); spi_message_init_no_memset(m); - for (i = 0; i < ntrans; i++, t++) - spi_message_add_tail(t, m); + for (i = 0; i < ntrans; i++) + spi_message_add_tail(&m->t[i], m); } return m; } From 045a44d4c9b32578aacf0811063e5bb741c7c32c Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Fri, 14 Jul 2023 11:49:28 -0600 Subject: [PATCH 066/656] regulator: Explicitly include correct DT includes The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring Link: https://lore.kernel.org/r/20230714174930.4063320-1-robh@kernel.org Signed-off-by: Mark Brown --- drivers/regulator/act8945a-regulator.c | 2 +- drivers/regulator/atc260x-regulator.c | 3 ++- drivers/regulator/axp20x-regulator.c | 1 - drivers/regulator/cpcap-regulator.c | 2 +- drivers/regulator/fan53555.c | 2 +- drivers/regulator/fixed.c | 1 - drivers/regulator/ltc3589.c | 1 - drivers/regulator/max77826-regulator.c | 1 - drivers/regulator/mp5416.c | 2 +- drivers/regulator/mp886x.c | 2 +- drivers/regulator/mpq7920.c | 1 - drivers/regulator/mt6315-regulator.c | 2 +- drivers/regulator/mt6359-regulator.c | 3 ++- drivers/regulator/mtk-dvfsrc-regulator.c | 3 +-- drivers/regulator/pbias-regulator.c | 1 - drivers/regulator/pca9450-regulator.c | 1 - drivers/regulator/pwm-regulator.c | 2 +- drivers/regulator/qcom-rpmh-regulator.c | 1 - drivers/regulator/qcom_smd-regulator.c | 1 - drivers/regulator/qcom_usb_vbus-regulator.c | 1 - drivers/regulator/rk808-regulator.c | 3 ++- drivers/regulator/rt5759-regulator.c | 2 +- drivers/regulator/stm32-pwr.c | 3 +-- drivers/regulator/stm32-vrefbuf.c | 2 +- drivers/regulator/sy8824x.c | 2 +- drivers/regulator/sy8827n.c | 2 +- drivers/regulator/tps6286x-regulator.c | 2 +- drivers/regulator/tps6287x-regulator.c | 2 +- drivers/regulator/tps65218-regulator.c | 2 +- drivers/regulator/tps65219-regulator.c | 2 +- drivers/regulator/tps6594-regulator.c | 2 +- drivers/regulator/twl-regulator.c | 1 - drivers/regulator/twl6030-regulator.c | 1 - drivers/regulator/uniphier-regulator.c | 2 +- drivers/regulator/vctrl-regulator.c | 2 +- drivers/regulator/vexpress-regulator.c | 3 ++- 36 files changed, 28 insertions(+), 38 deletions(-) diff --git a/drivers/regulator/act8945a-regulator.c b/drivers/regulator/act8945a-regulator.c index e26264529b74..24cbdd833863 100644 --- a/drivers/regulator/act8945a-regulator.c +++ b/drivers/regulator/act8945a-regulator.c @@ -8,7 +8,7 @@ */ #include -#include +#include #include #include #include diff --git a/drivers/regulator/atc260x-regulator.c b/drivers/regulator/atc260x-regulator.c index 87e237d740bc..09fe51464090 100644 --- a/drivers/regulator/atc260x-regulator.c +++ b/drivers/regulator/atc260x-regulator.c @@ -7,7 +7,8 @@ #include #include -#include +#include +#include #include #include diff --git a/drivers/regulator/axp20x-regulator.c b/drivers/regulator/axp20x-regulator.c index 810f90f3e2a1..c657820b0bbb 100644 --- a/drivers/regulator/axp20x-regulator.c +++ b/drivers/regulator/axp20x-regulator.c @@ -20,7 +20,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/regulator/cpcap-regulator.c b/drivers/regulator/cpcap-regulator.c index 1fd79fb17303..6958d154442b 100644 --- a/drivers/regulator/cpcap-regulator.c +++ b/drivers/regulator/cpcap-regulator.c @@ -12,7 +12,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/regulator/fan53555.c b/drivers/regulator/fan53555.c index 289c06e09f47..48f312167e53 100644 --- a/drivers/regulator/fan53555.c +++ b/drivers/regulator/fan53555.c @@ -12,7 +12,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/regulator/fixed.c b/drivers/regulator/fixed.c index 364d1a2683b7..55130efae9b8 100644 --- a/drivers/regulator/fixed.c +++ b/drivers/regulator/fixed.c @@ -25,7 +25,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/regulator/ltc3589.c b/drivers/regulator/ltc3589.c index e9751c206d95..cf931b8c36dc 100644 --- a/drivers/regulator/ltc3589.c +++ b/drivers/regulator/ltc3589.c @@ -10,7 +10,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/regulator/max77826-regulator.c b/drivers/regulator/max77826-regulator.c index 3855f5e686d8..5590cdf615b7 100644 --- a/drivers/regulator/max77826-regulator.c +++ b/drivers/regulator/max77826-regulator.c @@ -9,7 +9,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/regulator/mp5416.c b/drivers/regulator/mp5416.c index 3886b252fbe7..d068ac93d373 100644 --- a/drivers/regulator/mp5416.c +++ b/drivers/regulator/mp5416.c @@ -10,7 +10,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/regulator/mp886x.c b/drivers/regulator/mp886x.c index ede1b1e58002..9911be2e6bac 100644 --- a/drivers/regulator/mp886x.c +++ b/drivers/regulator/mp886x.c @@ -9,7 +9,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/regulator/mpq7920.c b/drivers/regulator/mpq7920.c index bf677c535edc..4926c229109b 100644 --- a/drivers/regulator/mpq7920.c +++ b/drivers/regulator/mpq7920.c @@ -11,7 +11,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/regulator/mt6315-regulator.c b/drivers/regulator/mt6315-regulator.c index 8047081ea2f7..2608a6652d77 100644 --- a/drivers/regulator/mt6315-regulator.c +++ b/drivers/regulator/mt6315-regulator.c @@ -3,7 +3,7 @@ // Copyright (c) 2021 MediaTek Inc. #include -#include +#include #include #include #include diff --git a/drivers/regulator/mt6359-regulator.c b/drivers/regulator/mt6359-regulator.c index 3eb86ec21d08..5cf6448fb05f 100644 --- a/drivers/regulator/mt6359-regulator.c +++ b/drivers/regulator/mt6359-regulator.c @@ -2,12 +2,13 @@ // // Copyright (c) 2021 MediaTek Inc. +#include #include #include #include #include #include -#include +#include #include #include #include diff --git a/drivers/regulator/mtk-dvfsrc-regulator.c b/drivers/regulator/mtk-dvfsrc-regulator.c index efca67207a5a..f1280d45265d 100644 --- a/drivers/regulator/mtk-dvfsrc-regulator.c +++ b/drivers/regulator/mtk-dvfsrc-regulator.c @@ -6,8 +6,7 @@ #include #include #include -#include -#include +#include #include #include #include diff --git a/drivers/regulator/pbias-regulator.c b/drivers/regulator/pbias-regulator.c index 0c9873e9abdc..cd5a0d7e4455 100644 --- a/drivers/regulator/pbias-regulator.c +++ b/drivers/regulator/pbias-regulator.c @@ -25,7 +25,6 @@ #include #include #include -#include struct pbias_reg_info { u32 enable; diff --git a/drivers/regulator/pca9450-regulator.c b/drivers/regulator/pca9450-regulator.c index 91bfb7e026c9..2ab365d2749f 100644 --- a/drivers/regulator/pca9450-regulator.c +++ b/drivers/regulator/pca9450-regulator.c @@ -11,7 +11,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/regulator/pwm-regulator.c b/drivers/regulator/pwm-regulator.c index b64d99695b84..2aff6db748e2 100644 --- a/drivers/regulator/pwm-regulator.c +++ b/drivers/regulator/pwm-regulator.c @@ -10,11 +10,11 @@ #include #include #include +#include #include #include #include #include -#include #include #include diff --git a/drivers/regulator/qcom-rpmh-regulator.c b/drivers/regulator/qcom-rpmh-regulator.c index f3b280af0773..ec1b50721ec6 100644 --- a/drivers/regulator/qcom-rpmh-regulator.c +++ b/drivers/regulator/qcom-rpmh-regulator.c @@ -7,7 +7,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/regulator/qcom_smd-regulator.c b/drivers/regulator/qcom_smd-regulator.c index 18189f35db68..f53ada076252 100644 --- a/drivers/regulator/qcom_smd-regulator.c +++ b/drivers/regulator/qcom_smd-regulator.c @@ -6,7 +6,6 @@ #include #include -#include #include #include #include diff --git a/drivers/regulator/qcom_usb_vbus-regulator.c b/drivers/regulator/qcom_usb_vbus-regulator.c index 57ec613f4a0a..cd94ed67621f 100644 --- a/drivers/regulator/qcom_usb_vbus-regulator.c +++ b/drivers/regulator/qcom_usb_vbus-regulator.c @@ -8,7 +8,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/regulator/rk808-regulator.c b/drivers/regulator/rk808-regulator.c index 460525ed006c..867a2cf243f6 100644 --- a/drivers/regulator/rk808-regulator.c +++ b/drivers/regulator/rk808-regulator.c @@ -17,9 +17,10 @@ #include #include #include -#include +#include #include #include +#include #include #include #include diff --git a/drivers/regulator/rt5759-regulator.c b/drivers/regulator/rt5759-regulator.c index 90555a9ef1b0..c2553dcee050 100644 --- a/drivers/regulator/rt5759-regulator.c +++ b/drivers/regulator/rt5759-regulator.c @@ -4,7 +4,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/regulator/stm32-pwr.c b/drivers/regulator/stm32-pwr.c index 4c60eddad60d..85b0102fb9b1 100644 --- a/drivers/regulator/stm32-pwr.c +++ b/drivers/regulator/stm32-pwr.c @@ -6,8 +6,7 @@ #include #include #include -#include -#include +#include #include #include #include diff --git a/drivers/regulator/stm32-vrefbuf.c b/drivers/regulator/stm32-vrefbuf.c index f5ccc7dd309a..717144cbe0f9 100644 --- a/drivers/regulator/stm32-vrefbuf.c +++ b/drivers/regulator/stm32-vrefbuf.c @@ -10,7 +10,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/regulator/sy8824x.c b/drivers/regulator/sy8824x.c index d0703105c439..d49c0cba09fb 100644 --- a/drivers/regulator/sy8824x.c +++ b/drivers/regulator/sy8824x.c @@ -8,7 +8,7 @@ #include #include -#include +#include #include #include #include diff --git a/drivers/regulator/sy8827n.c b/drivers/regulator/sy8827n.c index 433959b43549..f11ff38b36c9 100644 --- a/drivers/regulator/sy8827n.c +++ b/drivers/regulator/sy8827n.c @@ -9,7 +9,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/regulator/tps6286x-regulator.c b/drivers/regulator/tps6286x-regulator.c index b1c4b5120745..c06f6d1dc737 100644 --- a/drivers/regulator/tps6286x-regulator.c +++ b/drivers/regulator/tps6286x-regulator.c @@ -4,7 +4,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/regulator/tps6287x-regulator.c b/drivers/regulator/tps6287x-regulator.c index b1c0963586ac..19a4a300a963 100644 --- a/drivers/regulator/tps6287x-regulator.c +++ b/drivers/regulator/tps6287x-regulator.c @@ -8,8 +8,8 @@ #include #include +#include #include -#include #include #include #include diff --git a/drivers/regulator/tps65218-regulator.c b/drivers/regulator/tps65218-regulator.c index 13985883e5f0..f44b5767099c 100644 --- a/drivers/regulator/tps65218-regulator.c +++ b/drivers/regulator/tps65218-regulator.c @@ -8,12 +8,12 @@ */ #include +#include #include #include #include #include #include -#include #include #include #include diff --git a/drivers/regulator/tps65219-regulator.c b/drivers/regulator/tps65219-regulator.c index 8971b507a79a..b4065356392f 100644 --- a/drivers/regulator/tps65219-regulator.c +++ b/drivers/regulator/tps65219-regulator.c @@ -15,8 +15,8 @@ #include #include #include +#include #include -#include #include #include #include diff --git a/drivers/regulator/tps6594-regulator.c b/drivers/regulator/tps6594-regulator.c index d5a574ec6d12..25ef102c8270 100644 --- a/drivers/regulator/tps6594-regulator.c +++ b/drivers/regulator/tps6594-regulator.c @@ -9,7 +9,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/regulator/twl-regulator.c b/drivers/regulator/twl-regulator.c index 3e724f5345de..5bacfcebf59a 100644 --- a/drivers/regulator/twl-regulator.c +++ b/drivers/regulator/twl-regulator.c @@ -12,7 +12,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/regulator/twl6030-regulator.c b/drivers/regulator/twl6030-regulator.c index f9c695f9bde8..6eed0f6e0adb 100644 --- a/drivers/regulator/twl6030-regulator.c +++ b/drivers/regulator/twl6030-regulator.c @@ -13,7 +13,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/regulator/uniphier-regulator.c b/drivers/regulator/uniphier-regulator.c index 7e2785e10dc6..1d8304b88bd6 100644 --- a/drivers/regulator/uniphier-regulator.c +++ b/drivers/regulator/uniphier-regulator.c @@ -7,7 +7,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/regulator/vctrl-regulator.c b/drivers/regulator/vctrl-regulator.c index 85dca90233f6..2796580a3a3c 100644 --- a/drivers/regulator/vctrl-regulator.c +++ b/drivers/regulator/vctrl-regulator.c @@ -10,7 +10,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/regulator/vexpress-regulator.c b/drivers/regulator/vexpress-regulator.c index b545dbc70a4d..6687077e9a97 100644 --- a/drivers/regulator/vexpress-regulator.c +++ b/drivers/regulator/vexpress-regulator.c @@ -8,7 +8,8 @@ #include #include #include -#include +#include +#include #include #include #include From 749396cb29a7d82cb5e324bf61be3fc948d97141 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Fri, 14 Jul 2023 11:49:52 -0600 Subject: [PATCH 067/656] spi: Explicitly include correct DT includes The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring Link: https://lore.kernel.org/r/20230714174955.4064174-1-robh@kernel.org Signed-off-by: Mark Brown --- drivers/spi/spi-ar934x.c | 3 ++- drivers/spi/spi-armada-3700.c | 3 +-- drivers/spi/spi-at91-usart.c | 1 - drivers/spi/spi-bcm2835.c | 2 +- drivers/spi/spi-bcm2835aux.c | 4 +--- drivers/spi/spi-cadence-quadspi.c | 1 - drivers/spi/spi-cadence-xspi.c | 1 - drivers/spi/spi-davinci.c | 1 - drivers/spi/spi-fsl-dspi.c | 3 ++- drivers/spi/spi-fsl-lib.c | 3 ++- drivers/spi/spi-fsl-lpspi.c | 1 - drivers/spi/spi-fsl-qspi.c | 1 - drivers/spi/spi-gpio.c | 1 - drivers/spi/spi-gxp.c | 1 - drivers/spi/spi-imx.c | 1 - drivers/spi/spi-ingenic.c | 2 +- drivers/spi/spi-lantiq-ssc.c | 3 ++- drivers/spi/spi-loopback-test.c | 2 +- drivers/spi/spi-lp8841-rtc.c | 1 - drivers/spi/spi-meson-spicc.c | 1 - drivers/spi/spi-mt7621.c | 2 ++ drivers/spi/spi-mtk-nor.c | 3 ++- drivers/spi/spi-mtk-snfi.c | 3 ++- drivers/spi/spi-npcm-fiu.c | 2 +- drivers/spi/spi-nxp-fspi.c | 1 - drivers/spi/spi-orion.c | 1 - drivers/spi/spi-qcom-qspi.c | 2 +- drivers/spi/spi-qup.c | 1 - drivers/spi/spi-rspi.c | 2 +- drivers/spi/spi-s3c64xx.c | 1 - drivers/spi/spi-sc18is602.c | 1 - drivers/spi/spi-sh-msiof.c | 1 - drivers/spi/spi-sn-f-ospi.c | 2 +- drivers/spi/spi-sprd-adi.c | 1 - drivers/spi/spi-sprd.c | 1 - drivers/spi/spi-stm32-qspi.c | 1 - drivers/spi/spi-sun6i.c | 2 +- drivers/spi/spi-tegra114.c | 1 - drivers/spi/spi-tegra20-slink.c | 1 - drivers/spi/spi-tegra210-quad.c | 1 - drivers/spi/spi-ti-qspi.c | 1 - drivers/spi/spi-wpcm-fiu.c | 3 +-- drivers/spi/spi-zynqmp-gqspi.c | 4 +--- 43 files changed, 26 insertions(+), 48 deletions(-) diff --git a/drivers/spi/spi-ar934x.c b/drivers/spi/spi-ar934x.c index 9dcada8c4cb9..58b98cea31d9 100644 --- a/drivers/spi/spi-ar934x.c +++ b/drivers/spi/spi-ar934x.c @@ -14,7 +14,8 @@ #include #include #include -#include +#include +#include #include #define DRIVER_NAME "spi-ar934x" diff --git a/drivers/spi/spi-armada-3700.c b/drivers/spi/spi-armada-3700.c index a7fb7c94e70e..0103ac0158c0 100644 --- a/drivers/spi/spi-armada-3700.c +++ b/drivers/spi/spi-armada-3700.c @@ -17,8 +17,7 @@ #include #include #include -#include -#include +#include #include #include diff --git a/drivers/spi/spi-at91-usart.c b/drivers/spi/spi-at91-usart.c index 7dfe2b6c2990..75d9bc606442 100644 --- a/drivers/spi/spi-at91-usart.c +++ b/drivers/spi/spi-at91-usart.c @@ -13,7 +13,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/spi/spi-bcm2835.c b/drivers/spi/spi-bcm2835.c index 3b253da98c05..b247ee887562 100644 --- a/drivers/spi/spi-bcm2835.c +++ b/drivers/spi/spi-bcm2835.c @@ -24,7 +24,7 @@ #include #include #include -#include +#include #include #include /* FIXME: using chip internals */ #include /* FIXME: using chip internals */ diff --git a/drivers/spi/spi-bcm2835aux.c b/drivers/spi/spi-bcm2835aux.c index 288f7b994b36..8ace417c0a29 100644 --- a/drivers/spi/spi-bcm2835aux.c +++ b/drivers/spi/spi-bcm2835aux.c @@ -20,9 +20,7 @@ #include #include #include -#include -#include -#include +#include #include #include #include diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c index abf10f92415d..e1a8cf08ef66 100644 --- a/drivers/spi/spi-cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -21,7 +21,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/spi/spi-cadence-xspi.c b/drivers/spi/spi-cadence-xspi.c index ce4a3145f065..11d623cbba2e 100644 --- a/drivers/spi/spi-cadence-xspi.c +++ b/drivers/spi/spi-cadence-xspi.c @@ -11,7 +11,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/spi/spi-davinci.c b/drivers/spi/spi-davinci.c index a3470cbaabdc..9a9f3bc0e2d5 100644 --- a/drivers/spi/spi-davinci.c +++ b/drivers/spi/spi-davinci.c @@ -15,7 +15,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c index 674cfe05f411..ca41c8a8ba42 100644 --- a/drivers/spi/spi-fsl-dspi.c +++ b/drivers/spi/spi-fsl-dspi.c @@ -13,7 +13,8 @@ #include #include #include -#include +#include +#include #include #include #include diff --git a/drivers/spi/spi-fsl-lib.c b/drivers/spi/spi-fsl-lib.c index 76e1192eb025..885757c29fbb 100644 --- a/drivers/spi/spi-fsl-lib.c +++ b/drivers/spi/spi-fsl-lib.c @@ -18,7 +18,8 @@ #include #include #include -#include +#include +#include #include #ifdef CONFIG_FSL_SOC #include diff --git a/drivers/spi/spi-fsl-lpspi.c b/drivers/spi/spi-fsl-lpspi.c index 1c907d5d5bb3..dfdcb69f66ab 100644 --- a/drivers/spi/spi-fsl-lpspi.c +++ b/drivers/spi/spi-fsl-lpspi.c @@ -17,7 +17,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/spi/spi-fsl-qspi.c b/drivers/spi/spi-fsl-qspi.c index 8ade61e5ebc0..e3de81248893 100644 --- a/drivers/spi/spi-fsl-qspi.c +++ b/drivers/spi/spi-fsl-qspi.c @@ -34,7 +34,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/spi/spi-gpio.c b/drivers/spi/spi-gpio.c index 612db477ad12..8aa905e407a8 100644 --- a/drivers/spi/spi-gpio.c +++ b/drivers/spi/spi-gpio.c @@ -10,7 +10,6 @@ #include #include #include -#include #include #include diff --git a/drivers/spi/spi-gxp.c b/drivers/spi/spi-gxp.c index 684d63f402f3..88ab3032736b 100644 --- a/drivers/spi/spi-gxp.c +++ b/drivers/spi/spi-gxp.c @@ -3,7 +3,6 @@ #include #include -#include #include #include #include diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c index db22f685ce91..3634fe8f6d68 100644 --- a/drivers/spi/spi-imx.c +++ b/drivers/spi/spi-imx.c @@ -20,7 +20,6 @@ #include #include #include -#include #include #include diff --git a/drivers/spi/spi-ingenic.c b/drivers/spi/spi-ingenic.c index 7d4b515a160d..cfa665a80bc6 100644 --- a/drivers/spi/spi-ingenic.c +++ b/drivers/spi/spi-ingenic.c @@ -12,7 +12,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/spi/spi-lantiq-ssc.c b/drivers/spi/spi-lantiq-ssc.c index 8d6ecc5d6f70..65568272cfd9 100644 --- a/drivers/spi/spi-lantiq-ssc.c +++ b/drivers/spi/spi-lantiq-ssc.c @@ -6,7 +6,8 @@ #include #include -#include +#include +#include #include #include #include diff --git a/drivers/spi/spi-loopback-test.c b/drivers/spi/spi-loopback-test.c index 675a73cf1579..bbf2015d8e5c 100644 --- a/drivers/spi/spi-loopback-test.c +++ b/drivers/spi/spi-loopback-test.c @@ -14,8 +14,8 @@ #include #include #include +#include #include -#include #include #include #include diff --git a/drivers/spi/spi-lp8841-rtc.c b/drivers/spi/spi-lp8841-rtc.c index c6810720b3b5..b357461f1b8b 100644 --- a/drivers/spi/spi-lp8841-rtc.c +++ b/drivers/spi/spi-lp8841-rtc.c @@ -15,7 +15,6 @@ #include #include #include -#include #include #define DRIVER_NAME "spi_lp8841_rtc" diff --git a/drivers/spi/spi-meson-spicc.c b/drivers/spi/spi-meson-spicc.c index 7a9eba35ac38..43d134f4b42b 100644 --- a/drivers/spi/spi-meson-spicc.c +++ b/drivers/spi/spi-meson-spicc.c @@ -15,7 +15,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/spi/spi-mt7621.c b/drivers/spi/spi-mt7621.c index 3e9d396b33bd..91600e5c22e4 100644 --- a/drivers/spi/spi-mt7621.c +++ b/drivers/spi/spi-mt7621.c @@ -14,7 +14,9 @@ #include #include #include +#include #include +#include #include #include diff --git a/drivers/spi/spi-mtk-nor.c b/drivers/spi/spi-mtk-nor.c index baa7a5353987..cf4ee8b19e42 100644 --- a/drivers/spi/spi-mtk-nor.c +++ b/drivers/spi/spi-mtk-nor.c @@ -13,7 +13,8 @@ #include #include #include -#include +#include +#include #include #include #include diff --git a/drivers/spi/spi-mtk-snfi.c b/drivers/spi/spi-mtk-snfi.c index bed8317cd205..4433a8a9299f 100644 --- a/drivers/spi/spi-mtk-snfi.c +++ b/drivers/spi/spi-mtk-snfi.c @@ -76,7 +76,8 @@ #include #include #include -#include +#include +#include #include #include #include diff --git a/drivers/spi/spi-npcm-fiu.c b/drivers/spi/spi-npcm-fiu.c index eb353561509a..9e8c914ff26c 100644 --- a/drivers/spi/spi-npcm-fiu.c +++ b/drivers/spi/spi-npcm-fiu.c @@ -12,7 +12,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/spi/spi-nxp-fspi.c b/drivers/spi/spi-nxp-fspi.c index 4cf9b3bf7b57..45a4acc95661 100644 --- a/drivers/spi/spi-nxp-fspi.c +++ b/drivers/spi/spi-nxp-fspi.c @@ -47,7 +47,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/spi/spi-orion.c b/drivers/spi/spi-orion.c index 4882aafd0505..faf2764b91a8 100644 --- a/drivers/spi/spi-orion.c +++ b/drivers/spi/spi-orion.c @@ -16,7 +16,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/spi/spi-qcom-qspi.c b/drivers/spi/spi-qcom-qspi.c index 5a98c52bad32..a0ad9802b606 100644 --- a/drivers/spi/spi-qcom-qspi.c +++ b/drivers/spi/spi-qcom-qspi.c @@ -9,7 +9,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/spi/spi-qup.c b/drivers/spi/spi-qup.c index 00e5e88e72c4..fd16acb1f578 100644 --- a/drivers/spi/spi-qup.c +++ b/drivers/spi/spi-qup.c @@ -11,7 +11,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c index 9312a9d58a1b..83bb16995e06 100644 --- a/drivers/spi/spi-rspi.c +++ b/drivers/spi/spi-rspi.c @@ -19,7 +19,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c index ad008597c7d8..889e48423c97 100644 --- a/drivers/spi/spi-s3c64xx.c +++ b/drivers/spi/spi-s3c64xx.c @@ -14,7 +14,6 @@ #include #include #include -#include #include diff --git a/drivers/spi/spi-sc18is602.c b/drivers/spi/spi-sc18is602.c index d52ed67243f7..c67a24daaaf9 100644 --- a/drivers/spi/spi-sc18is602.c +++ b/drivers/spi/spi-sc18is602.c @@ -12,7 +12,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/spi/spi-sh-msiof.c b/drivers/spi/spi-sh-msiof.c index 9e90b4f8b357..5c75b5c58d97 100644 --- a/drivers/spi/spi-sh-msiof.c +++ b/drivers/spi/spi-sh-msiof.c @@ -20,7 +20,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/spi/spi-sn-f-ospi.c b/drivers/spi/spi-sn-f-ospi.c index d64d3f75c726..85e4a01bc8b0 100644 --- a/drivers/spi/spi-sn-f-ospi.c +++ b/drivers/spi/spi-sn-f-ospi.c @@ -10,7 +10,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/spi/spi-sprd-adi.c b/drivers/spi/spi-sprd-adi.c index 94d16aadfa44..bf01feedbf93 100644 --- a/drivers/spi/spi-sprd-adi.c +++ b/drivers/spi/spi-sprd-adi.c @@ -11,7 +11,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/spi/spi-sprd.c b/drivers/spi/spi-sprd.c index 518c7eaca84e..95377cf748c0 100644 --- a/drivers/spi/spi-sprd.c +++ b/drivers/spi/spi-sprd.c @@ -11,7 +11,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/spi/spi-stm32-qspi.c b/drivers/spi/spi-stm32-qspi.c index 2b6804aa6901..def74ae9b5f6 100644 --- a/drivers/spi/spi-stm32-qspi.c +++ b/drivers/spi/spi-stm32-qspi.c @@ -14,7 +14,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/spi/spi-sun6i.c b/drivers/spi/spi-sun6i.c index e9144d76bcdb..3f5b1556ece0 100644 --- a/drivers/spi/spi-sun6i.c +++ b/drivers/spi/spi-sun6i.c @@ -14,7 +14,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c index 488df681eaef..ca4bdd45f56e 100644 --- a/drivers/spi/spi-tegra114.c +++ b/drivers/spi/spi-tegra114.c @@ -20,7 +20,6 @@ #include #include #include -#include #include #include diff --git a/drivers/spi/spi-tegra20-slink.c b/drivers/spi/spi-tegra20-slink.c index 8cfd9e4f60b5..4d6db6182c5e 100644 --- a/drivers/spi/spi-tegra20-slink.c +++ b/drivers/spi/spi-tegra20-slink.c @@ -21,7 +21,6 @@ #include #include #include -#include #include #include diff --git a/drivers/spi/spi-tegra210-quad.c b/drivers/spi/spi-tegra210-quad.c index fbd14dd7be44..e9ad9b0b598b 100644 --- a/drivers/spi/spi-tegra210-quad.c +++ b/drivers/spi/spi-tegra210-quad.c @@ -18,7 +18,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/spi/spi-ti-qspi.c b/drivers/spi/spi-ti-qspi.c index bf4b40289bee..4c81516b67db 100644 --- a/drivers/spi/spi-ti-qspi.c +++ b/drivers/spi/spi-ti-qspi.c @@ -22,7 +22,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/spi/spi-wpcm-fiu.c b/drivers/spi/spi-wpcm-fiu.c index f15312fdcdaf..852ffe013d32 100644 --- a/drivers/spi/spi-wpcm-fiu.c +++ b/drivers/spi/spi-wpcm-fiu.c @@ -3,9 +3,8 @@ #include #include +#include #include -#include -#include #include #include #include diff --git a/drivers/spi/spi-zynqmp-gqspi.c b/drivers/spi/spi-zynqmp-gqspi.c index fb2ca9b90eab..a6b892d01038 100644 --- a/drivers/spi/spi-zynqmp-gqspi.c +++ b/drivers/spi/spi-zynqmp-gqspi.c @@ -14,9 +14,7 @@ #include #include #include -#include -#include -#include +#include #include #include #include From a55265eeedafee12d9743196ce5bb43266509c31 Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Wed, 5 Jul 2023 11:01:43 +0200 Subject: [PATCH 068/656] spi: spi-fsl-lpspi: Remove num_cs from device struct This is only used during probe() call, so there is no need to store it longer than that. Signed-off-by: Alexander Stein Link: https://lore.kernel.org/r/20230705090145.1354663-1-alexander.stein@ew.tq-group.com Signed-off-by: Mark Brown --- drivers/spi/spi-fsl-lpspi.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-fsl-lpspi.c b/drivers/spi/spi-fsl-lpspi.c index dfdcb69f66ab..0a0677f11a3d 100644 --- a/drivers/spi/spi-fsl-lpspi.c +++ b/drivers/spi/spi-fsl-lpspi.c @@ -97,7 +97,6 @@ struct fsl_lpspi_data { struct clk *clk_ipg; struct clk *clk_per; bool is_slave; - u32 num_cs; bool is_only_cs1; bool is_first_byte; @@ -825,6 +824,7 @@ static int fsl_lpspi_probe(struct platform_device *pdev) struct spi_controller *controller; struct resource *res; int ret, irq; + u32 num_cs; u32 temp; bool is_slave; @@ -847,8 +847,8 @@ static int fsl_lpspi_probe(struct platform_device *pdev) fsl_lpspi->is_only_cs1 = of_property_read_bool((&pdev->dev)->of_node, "fsl,spi-only-use-cs1-sel"); if (of_property_read_u32((&pdev->dev)->of_node, "num-cs", - &fsl_lpspi->num_cs)) - fsl_lpspi->num_cs = 1; + &num_cs)) + num_cs = 1; controller->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 32); controller->transfer_one = fsl_lpspi_transfer_one; @@ -858,7 +858,7 @@ static int fsl_lpspi_probe(struct platform_device *pdev) controller->flags = SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX; controller->dev.of_node = pdev->dev.of_node; controller->bus_num = pdev->id; - controller->num_chipselect = fsl_lpspi->num_cs; + controller->num_chipselect = num_cs; controller->slave_abort = fsl_lpspi_slave_abort; if (!fsl_lpspi->is_slave) controller->use_gpio_descriptors = true; From af71cccadecedad3484c2208e2c4fc8eff927d4a Mon Sep 17 00:00:00 2001 From: Okan Sahin Date: Mon, 17 Jul 2023 08:07:35 +0300 Subject: [PATCH 069/656] regulator: max77857: Add ADI MAX77857/59/MAX77831 Regulator Support Regulator driver for MAX77857/59 and MAX77831. The MAX77857 is a high-efficiency, high-performance buck-boost converter targeted for systems requiring a wide input voltage range (2.5V to 16V). The MAX77859 is high-Efficiency Buck-Boost Converter for USB-PD/PPS Applications. It has wide input range (2.5V to 22V) The MAX77831 is a high-efficiency, high-performance buck-boost converter targeted for systems requiring wide input voltage range (2.5V to 16V). Signed-off-by: Okan Sahin Link: https://lore.kernel.org/r/20230717050736.10075-3-okan.sahin@analog.com Signed-off-by: Mark Brown --- drivers/regulator/Kconfig | 10 + drivers/regulator/Makefile | 1 + drivers/regulator/max77857-regulator.c | 459 +++++++++++++++++++++++++ 3 files changed, 470 insertions(+) create mode 100644 drivers/regulator/max77857-regulator.c diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig index 18a05b09406f..542a7b427994 100644 --- a/drivers/regulator/Kconfig +++ b/drivers/regulator/Kconfig @@ -584,6 +584,16 @@ config REGULATOR_MAX77650 Semiconductor. This device has a SIMO with three independent power rails and an LDO. +config REGULATOR_MAX77857 + tristate "ADI MAX77857/MAX77831 regulator support" + depends on I2C + select REGMAP_I2C + help + This driver controls a ADI MAX77857 and MAX77831 regulators. + via I2C bus. MAX77857 and MAX77831 are high efficiency buck-boost + converters with input voltage range (2.5V to 16V). Say Y here to + enable the regulator driver + config REGULATOR_MAX8649 tristate "Maxim 8649 voltage regulator" depends on I2C diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile index 4f4589877e81..77b22bdd2791 100644 --- a/drivers/regulator/Makefile +++ b/drivers/regulator/Makefile @@ -86,6 +86,7 @@ obj-$(CONFIG_REGULATOR_MAX77686) += max77686-regulator.o obj-$(CONFIG_REGULATOR_MAX77693) += max77693-regulator.o obj-$(CONFIG_REGULATOR_MAX77802) += max77802-regulator.o obj-$(CONFIG_REGULATOR_MAX77826) += max77826-regulator.o +obj-$(CONFIG_REGULATOR_MAX77857) += max77857-regulator.o obj-$(CONFIG_REGULATOR_MC13783) += mc13783-regulator.o obj-$(CONFIG_REGULATOR_MC13892) += mc13892-regulator.o obj-$(CONFIG_REGULATOR_MC13XXX_CORE) += mc13xxx-regulator-core.o diff --git a/drivers/regulator/max77857-regulator.c b/drivers/regulator/max77857-regulator.c new file mode 100644 index 000000000000..c5482ffd606e --- /dev/null +++ b/drivers/regulator/max77857-regulator.c @@ -0,0 +1,459 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2023 Analog Devices, Inc. + * ADI Regulator driver for the MAX77857 + * MAX77859 and MAX77831. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MAX77857_REG_INT_SRC 0x10 +#define MAX77857_REG_INT_MASK 0x11 +#define MAX77857_REG_CONT1 0x12 +#define MAX77857_REG_CONT2 0x13 +#define MAX77857_REG_CONT3 0x14 + +#define MAX77857_INT_SRC_OCP BIT(0) +#define MAX77857_INT_SRC_THS BIT(1) +#define MAX77857_INT_SRC_HARDSHORT BIT(2) +#define MAX77857_INT_SRC_OVP BIT(3) +#define MAX77857_INT_SRC_POK BIT(4) + +#define MAX77857_ILIM_MASK GENMASK(2, 0) +#define MAX77857_CONT1_FREQ GENMASK(4, 3) +#define MAX77857_CONT3_FPWM BIT(5) + +#define MAX77859_REG_INT_SRC 0x11 +#define MAX77859_REG_CONT1 0x13 +#define MAX77859_REG_CONT2 0x14 +#define MAX77859_REG_CONT3 0x15 +#define MAX77859_REG_CONT5 0x17 +#define MAX77859_CONT2_FPWM BIT(2) +#define MAX77859_CONT2_INTB BIT(3) +#define MAX77859_CONT3_DVS_START BIT(2) +#define MAX77859_VOLTAGE_SEL_MASK GENMASK(9, 0) + +#define MAX77859_CURRENT_MIN 1000000 +#define MAX77859_CURRENT_MAX 5000000 +#define MAX77859_CURRENT_STEP 50000 + +enum max77857_id { + ID_MAX77831 = 1, + ID_MAX77857, + ID_MAX77859, + ID_MAX77859A, +}; + +static bool max77857_volatile_reg(struct device *dev, unsigned int reg) +{ + enum max77857_id id = (enum max77857_id)dev_get_drvdata(dev); + + switch (id) { + case ID_MAX77831: + case ID_MAX77857: + return reg == MAX77857_REG_INT_SRC; + case ID_MAX77859: + case ID_MAX77859A: + return reg == MAX77859_REG_INT_SRC; + default: + return true; + } +} + +struct regmap_config max77857_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .cache_type = REGCACHE_MAPLE, + .volatile_reg = max77857_volatile_reg, +}; + +static int max77857_get_status(struct regulator_dev *rdev) +{ + unsigned int val; + int ret; + + ret = regmap_read(rdev->regmap, MAX77857_REG_INT_SRC, &val); + if (ret) + return ret; + + if (FIELD_GET(MAX77857_INT_SRC_POK, val)) + return REGULATOR_STATUS_ON; + + return REGULATOR_STATUS_ERROR; +} + +static unsigned int max77857_get_mode(struct regulator_dev *rdev) +{ + enum max77857_id id = (enum max77857_id)rdev_get_drvdata(rdev); + unsigned int regval; + int ret; + + switch (id) { + case ID_MAX77831: + case ID_MAX77857: + ret = regmap_read(rdev->regmap, MAX77857_REG_CONT3, ®val); + if (ret) + return ret; + + if (FIELD_GET(MAX77857_CONT3_FPWM, regval)) + return REGULATOR_MODE_FAST; + + break; + case ID_MAX77859: + case ID_MAX77859A: + ret = regmap_read(rdev->regmap, MAX77859_REG_CONT2, ®val); + if (ret) + return ret; + + if (FIELD_GET(MAX77859_CONT2_FPWM, regval)) + return REGULATOR_MODE_FAST; + + break; + default: + return -EINVAL; + } + + return REGULATOR_MODE_NORMAL; +} + +static int max77857_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + enum max77857_id id = (enum max77857_id)rdev_get_drvdata(rdev); + unsigned int reg, val; + + switch (id) { + case ID_MAX77831: + case ID_MAX77857: + reg = MAX77857_REG_CONT3; + val = MAX77857_CONT3_FPWM; + break; + case ID_MAX77859: + case ID_MAX77859A: + reg = MAX77859_REG_CONT2; + val = MAX77859_CONT2_FPWM; + break; + default: + return -EINVAL; + } + + switch (mode) { + case REGULATOR_MODE_FAST: + return regmap_set_bits(rdev->regmap, reg, val); + case REGULATOR_MODE_NORMAL: + return regmap_clear_bits(rdev->regmap, reg, val); + default: + return -EINVAL; + } +} + +static int max77857_get_error_flags(struct regulator_dev *rdev, + unsigned int *flags) +{ + unsigned int val; + int ret; + + ret = regmap_read(rdev->regmap, MAX77857_REG_INT_SRC, &val); + if (ret) + return ret; + + *flags = 0; + + if (FIELD_GET(MAX77857_INT_SRC_OVP, val)) + *flags |= REGULATOR_ERROR_OVER_VOLTAGE_WARN; + + if (FIELD_GET(MAX77857_INT_SRC_OCP, val) || + FIELD_GET(MAX77857_INT_SRC_HARDSHORT, val)) + *flags |= REGULATOR_ERROR_OVER_CURRENT; + + if (FIELD_GET(MAX77857_INT_SRC_THS, val)) + *flags |= REGULATOR_ERROR_OVER_TEMP; + + if (!FIELD_GET(MAX77857_INT_SRC_POK, val)) + *flags |= REGULATOR_ERROR_FAIL; + + return 0; +} + +static struct linear_range max77859_lin_ranges[] = { + REGULATOR_LINEAR_RANGE(3200000, 0x0A0, 0x320, 20000) +}; + +static const unsigned int max77859_ramp_table[4] = { + 1000, 500, 250, 125 +}; + +static int max77859_set_voltage_sel(struct regulator_dev *rdev, + unsigned int sel) +{ + __be16 reg; + int ret; + + reg = cpu_to_be16(sel); + + ret = regmap_bulk_write(rdev->regmap, MAX77859_REG_CONT3, ®, 2); + if (ret) + return ret; + + /* actually apply new voltage */ + return regmap_set_bits(rdev->regmap, MAX77859_REG_CONT3, + MAX77859_CONT3_DVS_START); +} + +int max77859_get_voltage_sel(struct regulator_dev *rdev) +{ + __be16 reg; + int ret; + + ret = regmap_bulk_read(rdev->regmap, MAX77859_REG_CONT3, ®, 2); + if (ret) + return ret; + + return FIELD_GET(MAX77859_VOLTAGE_SEL_MASK, __be16_to_cpu(reg)); +} + +int max77859_set_current_limit(struct regulator_dev *rdev, int min_uA, int max_uA) +{ + u32 selector; + + if (max_uA < MAX77859_CURRENT_MIN) + return -EINVAL; + + selector = 0x12 + (max_uA - MAX77859_CURRENT_MIN) / MAX77859_CURRENT_STEP; + + selector = clamp_val(selector, 0x00, 0x7F); + + return regmap_write(rdev->regmap, MAX77859_REG_CONT5, selector); +} + +int max77859_get_current_limit(struct regulator_dev *rdev) +{ + u32 selector; + int ret; + + ret = regmap_read(rdev->regmap, MAX77859_REG_CONT5, &selector); + if (ret) + return ret; + + if (selector <= 0x12) + return MAX77859_CURRENT_MIN; + + if (selector >= 0x64) + return MAX77859_CURRENT_MAX; + + return MAX77859_CURRENT_MIN + (selector - 0x12) * MAX77859_CURRENT_STEP; +} + +static const struct regulator_ops max77859_regulator_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .set_voltage_sel = max77859_set_voltage_sel, + .get_voltage_sel = max77859_get_voltage_sel, + .set_ramp_delay = regulator_set_ramp_delay_regmap, + .get_status = max77857_get_status, + .set_mode = max77857_set_mode, + .get_mode = max77857_get_mode, + .get_error_flags = max77857_get_error_flags, +}; + +static const struct regulator_ops max77859a_regulator_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .set_voltage_sel = max77859_set_voltage_sel, + .get_voltage_sel = max77859_get_voltage_sel, + .set_current_limit = max77859_set_current_limit, + .get_current_limit = max77859_get_current_limit, + .set_ramp_delay = regulator_set_ramp_delay_regmap, + .get_status = max77857_get_status, + .set_mode = max77857_set_mode, + .get_mode = max77857_get_mode, + .get_error_flags = max77857_get_error_flags, +}; + +static const struct regulator_ops max77857_regulator_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_ramp_delay = regulator_set_ramp_delay_regmap, + .get_status = max77857_get_status, + .set_mode = max77857_set_mode, + .get_mode = max77857_get_mode, + .get_error_flags = max77857_get_error_flags, +}; + +static struct linear_range max77857_lin_ranges[] = { + REGULATOR_LINEAR_RANGE(4485000, 0x3D, 0xCC, 73500) +}; + +static const unsigned int max77857_switch_freq[] = { + 1200000, 1500000, 1800000, 2100000 +}; + +static const unsigned int max77857_ramp_table[2][4] = { + { 1333, 667, 333, 227 }, /* when switch freq is 1.8MHz or 2.1MHz */ + { 1166, 667, 333, 167 }, /* when switch freq is 1.2MHz or 1.5MHz */ +}; + +static struct regulator_desc max77857_regulator_desc = { + .ops = &max77857_regulator_ops, + .name = "max77857", + .linear_ranges = max77857_lin_ranges, + .n_linear_ranges = ARRAY_SIZE(max77857_lin_ranges), + .vsel_mask = 0xFF, + .vsel_reg = MAX77857_REG_CONT2, + .ramp_delay_table = max77857_ramp_table[0], + .n_ramp_values = ARRAY_SIZE(max77857_ramp_table[0]), + .ramp_reg = MAX77857_REG_CONT3, + .ramp_mask = GENMASK(1, 0), + .ramp_delay = max77857_ramp_table[0][0], + .owner = THIS_MODULE, +}; + +static void max77857_calc_range(struct device *dev, enum max77857_id id) +{ + struct linear_range *range; + unsigned long vref_step; + u32 rtop = 0; + u32 rbot = 0; + + device_property_read_u32(dev, "adi,rtop-ohms", &rtop); + device_property_read_u32(dev, "adi,rbot-ohms", &rbot); + + if (!rbot || !rtop) + return; + + switch (id) { + case ID_MAX77831: + case ID_MAX77857: + range = max77857_lin_ranges; + vref_step = 4900UL; + break; + case ID_MAX77859: + case ID_MAX77859A: + range = max77859_lin_ranges; + vref_step = 1250UL; + break; + } + + range->step = DIV_ROUND_CLOSEST(vref_step * (rbot + rtop), rbot); + range->min = range->step * range->min_sel; +} + +static int max77857_probe(struct i2c_client *client) +{ + const struct i2c_device_id *i2c_id; + struct device *dev = &client->dev; + struct regulator_config cfg = { }; + struct regulator_dev *rdev; + struct regmap *regmap; + enum max77857_id id; + u32 switch_freq = 0; + int ret; + + i2c_id = i2c_client_get_device_id(client); + if (!i2c_id) + return -EINVAL; + + id = i2c_id->driver_data; + + dev_set_drvdata(dev, (void *)id); + + if (id == ID_MAX77859 || id == ID_MAX77859A) { + max77857_regulator_desc.ops = &max77859_regulator_ops; + max77857_regulator_desc.linear_ranges = max77859_lin_ranges; + max77857_regulator_desc.ramp_delay_table = max77859_ramp_table; + max77857_regulator_desc.ramp_delay = max77859_ramp_table[0]; + } + + if (id == ID_MAX77859A) + max77857_regulator_desc.ops = &max77859a_regulator_ops; + + max77857_calc_range(dev, id); + + regmap = devm_regmap_init_i2c(client, &max77857_regmap_config); + if (IS_ERR(regmap)) + return dev_err_probe(dev, PTR_ERR(regmap), + "cannot initialize regmap\n"); + + device_property_read_u32(dev, "adi,switch-frequency-hz", &switch_freq); + if (switch_freq) { + switch_freq = find_closest(switch_freq, max77857_switch_freq, + ARRAY_SIZE(max77857_switch_freq)); + + if (id == ID_MAX77831 && switch_freq == 3) + switch_freq = 2; + + switch (id) { + case ID_MAX77831: + case ID_MAX77857: + ret = regmap_update_bits(regmap, MAX77857_REG_CONT1, + MAX77857_CONT1_FREQ, switch_freq); + + if (switch_freq >= 2) + break; + + max77857_regulator_desc.ramp_delay_table = max77857_ramp_table[1]; + max77857_regulator_desc.ramp_delay = max77857_ramp_table[1][0]; + break; + case ID_MAX77859: + case ID_MAX77859A: + ret = regmap_update_bits(regmap, MAX77859_REG_CONT1, + MAX77857_CONT1_FREQ, switch_freq); + break; + } + if (ret) + return ret; + } + + cfg.dev = dev; + cfg.driver_data = (void *)id; + cfg.regmap = regmap; + cfg.init_data = of_get_regulator_init_data(dev, dev->of_node, + &max77857_regulator_desc); + if (!cfg.init_data) + return -ENOMEM; + + rdev = devm_regulator_register(dev, &max77857_regulator_desc, &cfg); + if (IS_ERR(rdev)) + return dev_err_probe(dev, PTR_ERR(rdev), + "cannot register regulator\n"); + + return 0; +} + +const struct i2c_device_id max77857_id[] = { + { "max77831", ID_MAX77831 }, + { "max77857", ID_MAX77857 }, + { "max77859", ID_MAX77859 }, + { "max77859a", ID_MAX77859A }, + { } +}; +MODULE_DEVICE_TABLE(i2c, max77857_id); + +static const struct of_device_id max77857_of_id[] = { + { .compatible = "adi,max77831", .data = (void *)ID_MAX77831 }, + { .compatible = "adi,max77857", .data = (void *)ID_MAX77857 }, + { .compatible = "adi,max77859", .data = (void *)ID_MAX77859 }, + { .compatible = "adi,max77859a", .data = (void *)ID_MAX77859A }, + { } +}; +MODULE_DEVICE_TABLE(of, max77857_of_id); + +struct i2c_driver max77857_driver = { + .driver = { + .name = "max77857", + .of_match_table = max77857_of_id, + }, + .id_table = max77857_id, + .probe_new = max77857_probe, +}; +module_i2c_driver(max77857_driver); + +MODULE_DESCRIPTION("Analog Devices MAX77857 Buck-Boost Converter Driver"); +MODULE_AUTHOR("Ibrahim Tilki "); +MODULE_AUTHOR("Okan Sahin "); +MODULE_LICENSE("GPL"); From 6d5373e98b37721987c16fd1c0f9500ecbb69f20 Mon Sep 17 00:00:00 2001 From: Okan Sahin Date: Mon, 17 Jul 2023 08:07:34 +0300 Subject: [PATCH 070/656] regulator: max77857: Add ADI MAX77857/59/MAX77831 Regulator bindings Add ADI MAX77857/59 and MAX77831 Regulator device tree document. Signed-off-by: Okan Sahin Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20230717050736.10075-2-okan.sahin@analog.com Signed-off-by: Mark Brown --- .../bindings/regulator/adi,max77857.yaml | 86 +++++++++++++++++++ 1 file changed, 86 insertions(+) create mode 100644 Documentation/devicetree/bindings/regulator/adi,max77857.yaml diff --git a/Documentation/devicetree/bindings/regulator/adi,max77857.yaml b/Documentation/devicetree/bindings/regulator/adi,max77857.yaml new file mode 100644 index 000000000000..d1fa74aca721 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/adi,max77857.yaml @@ -0,0 +1,86 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2022 Analog Devices Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/adi,max77857.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices MAX77857 Buck-Boost Converter + +maintainers: + - Ibrahim Tilki + - Okan Sahin + +description: Analog Devices MAX77857 Buck-Boost Converter + +properties: + compatible: + enum: + - adi,max77831 + - adi,max77857 + - adi,max77859 + - adi,max77859a + + reg: + description: I2C address of the device + items: + - enum: [0x66, 0x67, 0x6E, 0x6F] + + interrupts: + maxItems: 1 + + adi,switch-frequency-hz: + description: Switching frequency of the Buck-Boost converter in Hz. + items: + - enum: [1200000, 1500000, 1800000, 2100000] + + adi,rtop-ohms: + description: Top feedback resistor value in ohms for external feedback. + minimum: 150000 + maximum: 330000 + + adi,rbot-ohms: + description: Bottom feedback resistor value in ohms for external feedback. + +dependencies: + adi,rtop-ohms: [ 'adi,rbot-ohms' ] + adi,rbot-ohms: [ 'adi,rtop-ohms' ] + +required: + - compatible + - reg + +allOf: + - $ref: regulator.yaml# + - if: + properties: + compatible: + contains: + enum: + - adi,max77831 + + then: + properties: + adi,switch-frequency-hz: + items: + enum: [1200000, 1500000, 1800000] + +unevaluatedProperties: false + +examples: + - | + #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + + regulator@66 { + reg = <0x66>; + compatible = "adi,max77857"; + interrupt-parent = <&gpio>; + interrupts = <26 IRQ_TYPE_EDGE_FALLING>; + + adi,rtop-ohms = <312000>; + adi,rbot-ohms = <12000>; + }; + }; From f572ba797c639c9b1705908d3f5d71ed7c3f53e0 Mon Sep 17 00:00:00 2001 From: Fabrizio Castro Date: Sat, 15 Jul 2023 02:03:58 +0100 Subject: [PATCH 071/656] spi: rzv2m-csi: Add missing include Add missing include of bits.h file. Signed-off-by: Fabrizio Castro Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230715010407.1751715-2-fabrizio.castro.jz@renesas.com Signed-off-by: Mark Brown --- drivers/spi/spi-rzv2m-csi.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/spi/spi-rzv2m-csi.c b/drivers/spi/spi-rzv2m-csi.c index c0d9a776770f..b595f3b7294d 100644 --- a/drivers/spi/spi-rzv2m-csi.c +++ b/drivers/spi/spi-rzv2m-csi.c @@ -5,6 +5,7 @@ * Copyright (C) 2023 Renesas Electronics Corporation */ +#include #include #include #include From 74e27ce8d23c3aeb1a9fdcaf6261462506bbbfc3 Mon Sep 17 00:00:00 2001 From: Fabrizio Castro Date: Sat, 15 Jul 2023 02:03:59 +0100 Subject: [PATCH 072/656] spi: rzv2m-csi: Adopt HZ_PER_MHZ for max spi clock Make use of HZ_PER_MHZ for CSI_MAX_SPI_SCKO to make it clear what its value means. Signed-off-by: Fabrizio Castro Reviewed-by: Geert Uytterhoeven Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230715010407.1751715-3-fabrizio.castro.jz@renesas.com Signed-off-by: Mark Brown --- drivers/spi/spi-rzv2m-csi.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-rzv2m-csi.c b/drivers/spi/spi-rzv2m-csi.c index b595f3b7294d..3931045a85eb 100644 --- a/drivers/spi/spi-rzv2m-csi.c +++ b/drivers/spi/spi-rzv2m-csi.c @@ -13,6 +13,7 @@ #include #include #include +#include /* Registers */ #define CSI_MODE 0x00 /* CSI mode control */ @@ -71,7 +72,7 @@ #define TX_TIMEOUT_ERROR BIT(2) #define RX_TIMEOUT_ERROR BIT(3) -#define CSI_MAX_SPI_SCKO 8000000 +#define CSI_MAX_SPI_SCKO (8 * HZ_PER_MHZ) struct rzv2m_csi_priv { void __iomem *base; From aecf9fbdb7a4dc6d83e8d9984c8d9dc074d8ea2e Mon Sep 17 00:00:00 2001 From: Fabrizio Castro Date: Sat, 15 Jul 2023 02:04:00 +0100 Subject: [PATCH 073/656] spi: rzv2m-csi: Rework CSI_CKS_MAX definition Clock "csiclk" gets divided by 2 * CSI_CLKSEL_CKS in order to generate the serial clock (output from master), with CSI_CLKSEL_CKS ranging from 0x1 (that means "csiclk" is divided by 2) to 0x3FFF ("csiclk" is divided by 32766). CSI_CKS_MAX is used for referring to the setting corresponding to the maximum frequency divider. Value 0x3FFF for CSI_CKS_MAX doesn't really means much to the reader without an explanation and a more readable definition. Add a comment with a meaningful description and also replace value 0x3FFF with the corresponding GENMASK, to make it very clear what the macro means. Signed-off-by: Fabrizio Castro Reviewed-by: Geert Uytterhoeven Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230715010407.1751715-4-fabrizio.castro.jz@renesas.com Signed-off-by: Mark Brown --- drivers/spi/spi-rzv2m-csi.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-rzv2m-csi.c b/drivers/spi/spi-rzv2m-csi.c index 3931045a85eb..621774949bde 100644 --- a/drivers/spi/spi-rzv2m-csi.c +++ b/drivers/spi/spi-rzv2m-csi.c @@ -65,7 +65,12 @@ #define CSI_FIFO_SIZE_BYTES 32 #define CSI_FIFO_HALF_SIZE 16 #define CSI_EN_DIS_TIMEOUT_US 100 -#define CSI_CKS_MAX 0x3FFF +/* + * Clock "csiclk" gets divided by 2 * CSI_CLKSEL_CKS in order to generate the + * serial clock (output from master), with CSI_CLKSEL_CKS ranging from 0x1 (that + * means "csiclk" is divided by 2) to 0x3FFF ("csiclk" is divided by 32766). + */ +#define CSI_CKS_MAX GENMASK(13, 0) #define UNDERRUN_ERROR BIT(0) #define OVERFLOW_ERROR BIT(1) From 2ed2699f58891c72fcd462129345d09424f986c5 Mon Sep 17 00:00:00 2001 From: Fabrizio Castro Date: Sat, 15 Jul 2023 02:04:01 +0100 Subject: [PATCH 074/656] spi: rzv2m-csi: Leave readl_poll_timeout calls for last Both rzv2m_csi_sw_reset and rzv2m_csi_start_stop_operation call into readl_poll_timeout upon a certain condition, and return 0 otherwise. Flip the logic to improve readability. Signed-off-by: Fabrizio Castro Reviewed-by: Geert Uytterhoeven Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230715010407.1751715-5-fabrizio.castro.jz@renesas.com Signed-off-by: Mark Brown --- drivers/spi/spi-rzv2m-csi.c | 21 ++++++++++----------- 1 file changed, 10 insertions(+), 11 deletions(-) diff --git a/drivers/spi/spi-rzv2m-csi.c b/drivers/spi/spi-rzv2m-csi.c index 621774949bde..1c65cd5f2039 100644 --- a/drivers/spi/spi-rzv2m-csi.c +++ b/drivers/spi/spi-rzv2m-csi.c @@ -131,13 +131,12 @@ static int rzv2m_csi_sw_reset(struct rzv2m_csi_priv *csi, int assert) rzv2m_csi_reg_write_bit(csi, CSI_CNT, CSI_CNT_CSIRST, assert); - if (assert) { - return readl_poll_timeout(csi->base + CSI_MODE, reg, - !(reg & CSI_MODE_CSOT), 0, - CSI_EN_DIS_TIMEOUT_US); - } + if (!assert) + return 0; - return 0; + return readl_poll_timeout(csi->base + CSI_MODE, reg, + !(reg & CSI_MODE_CSOT), 0, + CSI_EN_DIS_TIMEOUT_US); } static int rzv2m_csi_start_stop_operation(const struct rzv2m_csi_priv *csi, @@ -147,12 +146,12 @@ static int rzv2m_csi_start_stop_operation(const struct rzv2m_csi_priv *csi, rzv2m_csi_reg_write_bit(csi, CSI_MODE, CSI_MODE_CSIE, enable); - if (!enable && wait) - return readl_poll_timeout(csi->base + CSI_MODE, reg, - !(reg & CSI_MODE_CSOT), 0, - CSI_EN_DIS_TIMEOUT_US); + if (enable || !wait) + return 0; - return 0; + return readl_poll_timeout(csi->base + CSI_MODE, reg, + !(reg & CSI_MODE_CSOT), 0, + CSI_EN_DIS_TIMEOUT_US); } static int rzv2m_csi_fill_txfifo(struct rzv2m_csi_priv *csi) From 9f5ac599801c0f7c0969fa94c638265ed988b9bc Mon Sep 17 00:00:00 2001 From: Fabrizio Castro Date: Sat, 15 Jul 2023 02:04:02 +0100 Subject: [PATCH 075/656] spi: rzv2m-csi: Replace unnecessary ternary operators The ternary operators used to initialize tx_completed and rx_completed are not necessary, replace them with a better implementation. Signed-off-by: Fabrizio Castro Reviewed-by: Geert Uytterhoeven Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230715010407.1751715-6-fabrizio.castro.jz@renesas.com Signed-off-by: Mark Brown --- drivers/spi/spi-rzv2m-csi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-rzv2m-csi.c b/drivers/spi/spi-rzv2m-csi.c index 1c65cd5f2039..038f1486b7d7 100644 --- a/drivers/spi/spi-rzv2m-csi.c +++ b/drivers/spi/spi-rzv2m-csi.c @@ -439,8 +439,8 @@ static int rzv2m_csi_setup(struct spi_device *spi) static int rzv2m_csi_pio_transfer(struct rzv2m_csi_priv *csi) { - bool tx_completed = csi->txbuf ? false : true; - bool rx_completed = csi->rxbuf ? false : true; + bool tx_completed = !csi->txbuf; + bool rx_completed = !csi->rxbuf; int ret = 0; /* Make sure the TX FIFO is empty */ From dfc07ee62c03eaaaf806fccc50bd52fcbc9f828f Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Mon, 17 Jul 2023 10:59:33 +0200 Subject: [PATCH 076/656] spi: spi-fsl-lpspi: Move controller initialization further down This is a preparation for reading number of chip-selects from hardware. This needs IO resources mapped and peripheral clocking enabled. No functional changes intended. Signed-off-by: Alexander Stein Link: https://lore.kernel.org/r/20230717085934.409476-2-alexander.stein@ew.tq-group.com Signed-off-by: Mark Brown --- drivers/spi/spi-fsl-lpspi.c | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/drivers/spi/spi-fsl-lpspi.c b/drivers/spi/spi-fsl-lpspi.c index 0a0677f11a3d..f3b7bb1e52eb 100644 --- a/drivers/spi/spi-fsl-lpspi.c +++ b/drivers/spi/spi-fsl-lpspi.c @@ -846,22 +846,6 @@ static int fsl_lpspi_probe(struct platform_device *pdev) fsl_lpspi->is_slave = is_slave; fsl_lpspi->is_only_cs1 = of_property_read_bool((&pdev->dev)->of_node, "fsl,spi-only-use-cs1-sel"); - if (of_property_read_u32((&pdev->dev)->of_node, "num-cs", - &num_cs)) - num_cs = 1; - - controller->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 32); - controller->transfer_one = fsl_lpspi_transfer_one; - controller->prepare_transfer_hardware = lpspi_prepare_xfer_hardware; - controller->unprepare_transfer_hardware = lpspi_unprepare_xfer_hardware; - controller->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; - controller->flags = SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX; - controller->dev.of_node = pdev->dev.of_node; - controller->bus_num = pdev->id; - controller->num_chipselect = num_cs; - controller->slave_abort = fsl_lpspi_slave_abort; - if (!fsl_lpspi->is_slave) - controller->use_gpio_descriptors = true; init_completion(&fsl_lpspi->xfer_done); @@ -911,6 +895,22 @@ static int fsl_lpspi_probe(struct platform_device *pdev) temp = readl(fsl_lpspi->base + IMX7ULP_PARAM); fsl_lpspi->txfifosize = 1 << (temp & 0x0f); fsl_lpspi->rxfifosize = 1 << ((temp >> 8) & 0x0f); + if (of_property_read_u32((&pdev->dev)->of_node, "num-cs", + &num_cs)) + num_cs = 1; + + controller->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 32); + controller->transfer_one = fsl_lpspi_transfer_one; + controller->prepare_transfer_hardware = lpspi_prepare_xfer_hardware; + controller->unprepare_transfer_hardware = lpspi_unprepare_xfer_hardware; + controller->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; + controller->flags = SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX; + controller->dev.of_node = pdev->dev.of_node; + controller->bus_num = pdev->id; + controller->num_chipselect = num_cs; + controller->slave_abort = fsl_lpspi_slave_abort; + if (!fsl_lpspi->is_slave) + controller->use_gpio_descriptors = true; ret = fsl_lpspi_dma_init(&pdev->dev, fsl_lpspi, controller); if (ret == -EPROBE_DEFER) From f46b06e62c86a688ebe691b004f3056818c8ed15 Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Mon, 17 Jul 2023 10:59:34 +0200 Subject: [PATCH 077/656] spi: spi-fsl-lpspi: Read chip-select amount from hardware for i.MX93 PARAM.PCSNUM register on i.MX93 indicates the number of supported (hw) chip-selects. LPSPI4 has 3 while others have only 2. Still allow overwriting from DT. Signed-off-by: Alexander Stein Link: https://lore.kernel.org/r/20230717085934.409476-3-alexander.stein@ew.tq-group.com Signed-off-by: Mark Brown --- drivers/spi/spi-fsl-lpspi.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-fsl-lpspi.c b/drivers/spi/spi-fsl-lpspi.c index f3b7bb1e52eb..e32e8cab5aa8 100644 --- a/drivers/spi/spi-fsl-lpspi.c +++ b/drivers/spi/spi-fsl-lpspi.c @@ -896,8 +896,12 @@ static int fsl_lpspi_probe(struct platform_device *pdev) fsl_lpspi->txfifosize = 1 << (temp & 0x0f); fsl_lpspi->rxfifosize = 1 << ((temp >> 8) & 0x0f); if (of_property_read_u32((&pdev->dev)->of_node, "num-cs", - &num_cs)) - num_cs = 1; + &num_cs)) { + if (of_device_is_compatible(pdev->dev.of_node, "fsl,imx93-spi")) + num_cs = ((temp >> 16) & 0xf); + else + num_cs = 1; + } controller->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 32); controller->transfer_one = fsl_lpspi_transfer_one; From 78908f45ccf1dc2f4d5fb395c460fdbbf7e9ac3a Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Mon, 17 Jul 2023 21:33:03 +0100 Subject: [PATCH 078/656] regmap: Let users check if a register is cached The HDA driver has a use case for checking if a register is cached which it bodges in awkwardly and unclearly. Provide an API which allows it to directly do what it's trying to do. Reviewed-by: Takashi Iwai Signed-off-by: Mark Brown Link: https://lore.kernel.org/r/20230717-regmap-cache-check-v1-1-73ef688afae3@kernel.org Signed-off-by: Mark Brown --- drivers/base/regmap/regcache.c | 23 +++++++++++++++++++++++ include/linux/regmap.h | 1 + 2 files changed, 24 insertions(+) diff --git a/drivers/base/regmap/regcache.c b/drivers/base/regmap/regcache.c index 156490ab7f34..8accf6292fe1 100644 --- a/drivers/base/regmap/regcache.c +++ b/drivers/base/regmap/regcache.c @@ -561,6 +561,29 @@ void regcache_cache_bypass(struct regmap *map, bool enable) } EXPORT_SYMBOL_GPL(regcache_cache_bypass); +/** + * regcache_reg_cached - Check if a register is cached + * + * @map: map to check + * @reg: register to check + * + * Reports if a register is cached. + */ +bool regcache_reg_cached(struct regmap *map, unsigned int reg) +{ + unsigned int val; + int ret; + + map->lock(map->lock_arg); + + ret = regcache_read(map, reg, &val); + + map->unlock(map->lock_arg); + + return ret == 0; +} +EXPORT_SYMBOL_GPL(regcache_reg_cached); + void regcache_set_val(struct regmap *map, void *base, unsigned int idx, unsigned int val) { diff --git a/include/linux/regmap.h b/include/linux/regmap.h index 8fc0b3ebce44..c9182a47736e 100644 --- a/include/linux/regmap.h +++ b/include/linux/regmap.h @@ -1287,6 +1287,7 @@ int regcache_drop_region(struct regmap *map, unsigned int min, void regcache_cache_only(struct regmap *map, bool enable); void regcache_cache_bypass(struct regmap *map, bool enable); void regcache_mark_dirty(struct regmap *map); +bool regcache_reg_cached(struct regmap *map, unsigned int reg); bool regmap_check_range_table(struct regmap *map, unsigned int reg, const struct regmap_access_table *table); From d881ee5a872fd539a8c693e4c8656b9343c9aae0 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Mon, 17 Jul 2023 21:33:04 +0100 Subject: [PATCH 079/656] regmap: Provide test for regcache_reg_present() Provide a KUnit test for the newly added API. Reviewed-by: Takashi Iwai Signed-off-by: Mark Brown Link: https://lore.kernel.org/r/20230717-regmap-cache-check-v1-2-73ef688afae3@kernel.org Signed-off-by: Mark Brown --- drivers/base/regmap/regmap-kunit.c | 40 ++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/drivers/base/regmap/regmap-kunit.c b/drivers/base/regmap/regmap-kunit.c index 24257aa9004d..8dd96a55d976 100644 --- a/drivers/base/regmap/regmap-kunit.c +++ b/drivers/base/regmap/regmap-kunit.c @@ -833,6 +833,45 @@ static void cache_drop(struct kunit *test) regmap_exit(map); } +static void cache_present(struct kunit *test) +{ + struct regcache_types *t = (struct regcache_types *)test->param_value; + struct regmap *map; + struct regmap_config config; + struct regmap_ram_data *data; + unsigned int val; + int i; + + config = test_regmap_config; + config.cache_type = t->type; + + map = gen_regmap(&config, &data); + KUNIT_ASSERT_FALSE(test, IS_ERR(map)); + if (IS_ERR(map)) + return; + + for (i = 0; i < BLOCK_TEST_SIZE; i++) + data->read[i] = false; + + /* No defaults so no registers cached. */ + for (i = 0; i < BLOCK_TEST_SIZE; i++) + KUNIT_ASSERT_FALSE(test, regcache_reg_cached(map, i)); + + /* We didn't trigger any reads */ + for (i = 0; i < BLOCK_TEST_SIZE; i++) + KUNIT_ASSERT_FALSE(test, data->read[i]); + + /* Fill the cache */ + for (i = 0; i < BLOCK_TEST_SIZE; i++) + KUNIT_EXPECT_EQ(test, 0, regmap_read(map, i, &val)); + + /* Now everything should be cached */ + for (i = 0; i < BLOCK_TEST_SIZE; i++) + KUNIT_ASSERT_TRUE(test, regcache_reg_cached(map, i)); + + regmap_exit(map); +} + struct raw_test_types { const char *name; @@ -1172,6 +1211,7 @@ static struct kunit_case regmap_test_cases[] = { KUNIT_CASE_PARAM(cache_sync_readonly, real_cache_types_gen_params), KUNIT_CASE_PARAM(cache_sync_patch, real_cache_types_gen_params), KUNIT_CASE_PARAM(cache_drop, sparse_cache_types_gen_params), + KUNIT_CASE_PARAM(cache_present, sparse_cache_types_gen_params), KUNIT_CASE_PARAM(raw_read_defaults_single, raw_test_types_gen_params), KUNIT_CASE_PARAM(raw_read_defaults, raw_test_types_gen_params), From 99aae70551f99536936438bbcfc562df69eeb79c Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Mon, 17 Jul 2023 21:33:05 +0100 Subject: [PATCH 080/656] ALSA: hda: Use regcache_reg_cached() rather than open coding The HDA driver intentionally drops repeated writes to registers in some circumstances, beyond the suppression of noop writes that regmap does in regmap_update_bits(). It does this by checking if the register is cached before doing a regmap_update_bits(), now we have an API for querying this directly use it directly rather than trying a read in cache only mode making the code a little clearer. Reviewed-by: Takashi Iwai Signed-off-by: Mark Brown Link: https://lore.kernel.org/r/20230717-regmap-cache-check-v1-3-73ef688afae3@kernel.org Signed-off-by: Mark Brown --- sound/hda/hdac_regmap.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/sound/hda/hdac_regmap.c b/sound/hda/hdac_regmap.c index 9b1bcabd8414..97cee096a286 100644 --- a/sound/hda/hdac_regmap.c +++ b/sound/hda/hdac_regmap.c @@ -556,17 +556,14 @@ EXPORT_SYMBOL_GPL(snd_hdac_regmap_update_raw); static int reg_raw_update_once(struct hdac_device *codec, unsigned int reg, unsigned int mask, unsigned int val) { - unsigned int orig; - int err; + int err = 0; if (!codec->regmap) return reg_raw_update(codec, reg, mask, val); mutex_lock(&codec->regmap_lock); - regcache_cache_only(codec->regmap, true); - err = regmap_read(codec->regmap, reg, &orig); - regcache_cache_only(codec->regmap, false); - if (err < 0) + /* Discard any updates to already initialised registers. */ + if (!regcache_reg_cached(codec->regmap, reg)) err = regmap_update_bits(codec->regmap, reg, mask, val); mutex_unlock(&codec->regmap_lock); return err; From 6023fffc3e276d1ab0d1262ea9be3b720325fede Mon Sep 17 00:00:00 2001 From: Yang Li Date: Tue, 18 Jul 2023 08:32:55 +0800 Subject: [PATCH 081/656] regulator: Remove duplicated include in mt6359-regulator.c ./drivers/regulator/mt6359-regulator.c: linux/platform_device.h is included more than once. Reported-by: Abaci Robot Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=5901 Signed-off-by: Yang Li Link: https://lore.kernel.org/r/20230718003255.124594-1-yang.lee@linux.alibaba.com Signed-off-by: Mark Brown --- drivers/regulator/mt6359-regulator.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/regulator/mt6359-regulator.c b/drivers/regulator/mt6359-regulator.c index 5cf6448fb05f..c8a788858824 100644 --- a/drivers/regulator/mt6359-regulator.c +++ b/drivers/regulator/mt6359-regulator.c @@ -2,7 +2,6 @@ // // Copyright (c) 2021 MediaTek Inc. -#include #include #include #include From 55b2395e4e92adc492c6b30ac109eb78250dcd9d Mon Sep 17 00:00:00 2001 From: Asmaa Mnebhi Date: Tue, 11 Jul 2023 11:12:48 -0400 Subject: [PATCH 082/656] gpio: mmio: handle "ngpios" properly in bgpio_init() bgpio_init() uses "sz" argument to populate ngpio, which is not accurate. Instead, read the "ngpios" property from the DT and if it doesn't exist, use the "sz" argument. With this change, drivers no longer need to overwrite the ngpio variable after calling bgpio_init(). If the "ngpios" property is specified, bgpio_bits is calculated as the round up value of ngpio. At the moment, the only requirement specified is that the round up value must be a multiple of 8 but it should also be a power of 2 because we provide accessors based on the bank size in bgpio_setup_accessors(). Signed-off-by: Asmaa Mnebhi Reviewed-by: Andy Shevchenko Reviewed-by: Linus Walleij Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-mmio.c | 9 +++++- drivers/gpio/gpiolib.c | 68 ++++++++++++++++++++++------------------ drivers/gpio/gpiolib.h | 1 + 3 files changed, 46 insertions(+), 32 deletions(-) diff --git a/drivers/gpio/gpio-mmio.c b/drivers/gpio/gpio-mmio.c index d9dff3dc92ae..74fdf0d87b2c 100644 --- a/drivers/gpio/gpio-mmio.c +++ b/drivers/gpio/gpio-mmio.c @@ -60,6 +60,8 @@ o ` ~~~~\___/~~~~ ` controller in FPGA is ,.` #include #include +#include "gpiolib.h" + static void bgpio_write8(void __iomem *reg, unsigned long data) { writeb(data, reg); @@ -614,10 +616,15 @@ int bgpio_init(struct gpio_chip *gc, struct device *dev, gc->parent = dev; gc->label = dev_name(dev); gc->base = -1; - gc->ngpio = gc->bgpio_bits; gc->request = bgpio_request; gc->be_bits = !!(flags & BGPIOF_BIG_ENDIAN); + ret = gpiochip_get_ngpios(gc, dev); + if (ret) + gc->ngpio = gc->bgpio_bits; + else + gc->bgpio_bits = roundup_pow_of_two(round_up(gc->ngpio, 8)); + ret = bgpio_setup_io(gc, dat, set, clr, flags); if (ret) return ret; diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index 62199ec96db2..edab00c9cb3c 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c @@ -700,6 +700,40 @@ void *gpiochip_get_data(struct gpio_chip *gc) } EXPORT_SYMBOL_GPL(gpiochip_get_data); +int gpiochip_get_ngpios(struct gpio_chip *gc, struct device *dev) +{ + u32 ngpios = gc->ngpio; + int ret; + + if (ngpios == 0) { + ret = device_property_read_u32(dev, "ngpios", &ngpios); + if (ret == -ENODATA) + /* + * -ENODATA means that there is no property found and + * we want to issue the error message to the user. + * Besides that, we want to return different error code + * to state that supplied value is not valid. + */ + ngpios = 0; + else if (ret) + return ret; + + gc->ngpio = ngpios; + } + + if (gc->ngpio == 0) { + chip_err(gc, "tried to insert a GPIO chip with zero lines\n"); + return -EINVAL; + } + + if (gc->ngpio > FASTPATH_NGPIO) + chip_warn(gc, "line cnt %u is greater than fast path cnt %u\n", + gc->ngpio, FASTPATH_NGPIO); + + return 0; +} +EXPORT_SYMBOL_GPL(gpiochip_get_ngpios); + int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data, struct lock_class_key *lock_key, struct lock_class_key *request_key) @@ -707,7 +741,6 @@ int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data, struct gpio_device *gdev; unsigned long flags; unsigned int i; - u32 ngpios = 0; int base = 0; int ret = 0; @@ -753,36 +786,9 @@ int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data, else gdev->owner = THIS_MODULE; - /* - * Try the device properties if the driver didn't supply the number - * of GPIO lines. - */ - ngpios = gc->ngpio; - if (ngpios == 0) { - ret = device_property_read_u32(&gdev->dev, "ngpios", &ngpios); - if (ret == -ENODATA) - /* - * -ENODATA means that there is no property found and - * we want to issue the error message to the user. - * Besides that, we want to return different error code - * to state that supplied value is not valid. - */ - ngpios = 0; - else if (ret) - goto err_free_dev_name; - - gc->ngpio = ngpios; - } - - if (gc->ngpio == 0) { - chip_err(gc, "tried to insert a GPIO chip with zero lines\n"); - ret = -EINVAL; + ret = gpiochip_get_ngpios(gc, &gdev->dev); + if (ret) goto err_free_dev_name; - } - - if (gc->ngpio > FASTPATH_NGPIO) - chip_warn(gc, "line cnt %u is greater than fast path cnt %u\n", - gc->ngpio, FASTPATH_NGPIO); gdev->descs = kcalloc(gc->ngpio, sizeof(*gdev->descs), GFP_KERNEL); if (!gdev->descs) { @@ -947,7 +953,7 @@ err_print_message: /* failures here can mean systems won't boot... */ if (ret != -EPROBE_DEFER) { pr_err("%s: GPIOs %d..%d (%s) failed to register, %d\n", __func__, - base, base + (int)ngpios - 1, + base, base + (int)gc->ngpio - 1, gc->label ? : "generic", ret); } return ret; diff --git a/drivers/gpio/gpiolib.h b/drivers/gpio/gpiolib.h index 7c562fbb9fb0..08e8e8274883 100644 --- a/drivers/gpio/gpiolib.h +++ b/drivers/gpio/gpiolib.h @@ -218,6 +218,7 @@ int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id, int gpio_set_debounce_timeout(struct gpio_desc *desc, unsigned int debounce); int gpiod_hog(struct gpio_desc *desc, const char *name, unsigned long lflags, enum gpiod_flags dflags); +int gpiochip_get_ngpios(struct gpio_chip *gc, struct device *dev); /* * Return the GPIO number of the passed descriptor relative to its chip From e91d0f05e66afba9a3804bccf3d0a4310bb30024 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Fri, 14 Jul 2023 11:44:58 -0600 Subject: [PATCH 083/656] gpio: Explicitly include correct DT includes The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring Reviewed-by: Andy Shevchenko Acked-by: Romain Perier Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-ath79.c | 3 ++- drivers/gpio/gpio-brcmstb.c | 4 ++-- drivers/gpio/gpio-creg-snps.c | 2 +- drivers/gpio/gpio-eic-sprd.c | 2 +- drivers/gpio/gpio-ge.c | 2 +- drivers/gpio/gpio-grgpio.c | 2 +- drivers/gpio/gpio-hlwd.c | 2 +- drivers/gpio/gpio-logicvc.c | 1 - drivers/gpio/gpio-mb86s7x.c | 2 +- drivers/gpio/gpio-mpc5200.c | 2 +- drivers/gpio/gpio-mpc8xxx.c | 4 +--- drivers/gpio/gpio-msc313.c | 1 - drivers/gpio/gpio-mxc.c | 1 - drivers/gpio/gpio-mxs.c | 1 - drivers/gpio/gpio-omap.c | 1 - drivers/gpio/gpio-palmas.c | 1 - drivers/gpio/gpio-pmic-eic-sprd.c | 2 +- drivers/gpio/gpio-pxa.c | 1 - drivers/gpio/gpio-rcar.c | 1 - drivers/gpio/gpio-rockchip.c | 2 +- drivers/gpio/gpio-sprd.c | 2 +- drivers/gpio/gpio-stp-xway.c | 3 ++- drivers/gpio/gpio-syscon.c | 1 - drivers/gpio/gpio-tegra.c | 2 +- drivers/gpio/gpio-tegra186.c | 2 +- drivers/gpio/gpio-tps6586x.c | 2 +- drivers/gpio/gpio-tps65910.c | 2 +- drivers/gpio/gpio-ts4800.c | 3 +-- drivers/gpio/gpio-ts4900.c | 2 +- drivers/gpio/gpio-uniphier.c | 1 - drivers/gpio/gpio-vf610.c | 1 - drivers/gpio/gpio-wcd934x.c | 3 ++- drivers/gpio/gpio-xilinx.c | 4 ++-- drivers/gpio/gpio-xra1403.c | 2 +- 34 files changed, 28 insertions(+), 39 deletions(-) diff --git a/drivers/gpio/gpio-ath79.c b/drivers/gpio/gpio-ath79.c index aa0a954b8392..f0c0c0f77eb0 100644 --- a/drivers/gpio/gpio-ath79.c +++ b/drivers/gpio/gpio-ath79.c @@ -9,8 +9,9 @@ */ #include +#include #include -#include +#include #include #include #include diff --git a/drivers/gpio/gpio-brcmstb.c b/drivers/gpio/gpio-brcmstb.c index 6566517fe0d8..bccdbfd5ec80 100644 --- a/drivers/gpio/gpio-brcmstb.c +++ b/drivers/gpio/gpio-brcmstb.c @@ -3,12 +3,12 @@ #include #include -#include -#include +#include #include #include #include #include +#include enum gio_reg_index { GIO_REG_ODEN = 0, diff --git a/drivers/gpio/gpio-creg-snps.c b/drivers/gpio/gpio-creg-snps.c index 789384c6e178..4968232f70f2 100644 --- a/drivers/gpio/gpio-creg-snps.c +++ b/drivers/gpio/gpio-creg-snps.c @@ -8,7 +8,7 @@ #include #include #include -#include +#include #define MAX_GPIO 32 diff --git a/drivers/gpio/gpio-eic-sprd.c b/drivers/gpio/gpio-eic-sprd.c index 84352a6f4973..67b1e09e8985 100644 --- a/drivers/gpio/gpio-eic-sprd.c +++ b/drivers/gpio/gpio-eic-sprd.c @@ -9,7 +9,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/gpio/gpio-ge.c b/drivers/gpio/gpio-ge.c index 7bd4c2a4cc11..4eecbc862abc 100644 --- a/drivers/gpio/gpio-ge.c +++ b/drivers/gpio/gpio-ge.c @@ -20,7 +20,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/gpio/gpio-grgpio.c b/drivers/gpio/gpio-grgpio.c index bea0e32c195d..0163c95f6dd7 100644 --- a/drivers/gpio/gpio-grgpio.c +++ b/drivers/gpio/gpio-grgpio.c @@ -19,10 +19,10 @@ #include #include #include +#include #include #include #include -#include #include #include #include diff --git a/drivers/gpio/gpio-hlwd.c b/drivers/gpio/gpio-hlwd.c index c208ac1c54a6..1bcfc1835dae 100644 --- a/drivers/gpio/gpio-hlwd.c +++ b/drivers/gpio/gpio-hlwd.c @@ -10,7 +10,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/gpio/gpio-logicvc.c b/drivers/gpio/gpio-logicvc.c index 992cc958a43f..2b9876bc1383 100644 --- a/drivers/gpio/gpio-logicvc.c +++ b/drivers/gpio/gpio-logicvc.c @@ -8,7 +8,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/gpio/gpio-mb86s7x.c b/drivers/gpio/gpio-mb86s7x.c index 37c5363e391e..ca7eb5e8bfaa 100644 --- a/drivers/gpio/gpio-mb86s7x.c +++ b/drivers/gpio/gpio-mb86s7x.c @@ -10,11 +10,11 @@ #include #include #include +#include #include #include #include #include -#include #include #include #include diff --git a/drivers/gpio/gpio-mpc5200.c b/drivers/gpio/gpio-mpc5200.c index 3b0bfff8c778..b49e3ca64015 100644 --- a/drivers/gpio/gpio-mpc5200.c +++ b/drivers/gpio/gpio-mpc5200.c @@ -10,7 +10,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/gpio/gpio-mpc8xxx.c b/drivers/gpio/gpio-mpc8xxx.c index 5979a36bf754..ebf2f511df59 100644 --- a/drivers/gpio/gpio-mpc8xxx.c +++ b/drivers/gpio/gpio-mpc8xxx.c @@ -9,12 +9,10 @@ #include #include #include +#include #include #include #include -#include -#include -#include #include #include #include diff --git a/drivers/gpio/gpio-msc313.c b/drivers/gpio/gpio-msc313.c index 036ad2324892..2f448eb23abb 100644 --- a/drivers/gpio/gpio-msc313.c +++ b/drivers/gpio/gpio-msc313.c @@ -6,7 +6,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c index a9fb6bd9aa6f..443f3e4d9aff 100644 --- a/drivers/gpio/gpio-mxc.c +++ b/drivers/gpio/gpio-mxc.c @@ -23,7 +23,6 @@ #include #include #include -#include #include #define IMX_SCU_WAKEUP_OFF 0 diff --git a/drivers/gpio/gpio-mxs.c b/drivers/gpio/gpio-mxs.c index 390e619a2831..8e04c9c4b5a2 100644 --- a/drivers/gpio/gpio-mxs.c +++ b/drivers/gpio/gpio-mxs.c @@ -14,7 +14,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index a08be5bf6808..2b78fde74e30 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -22,7 +22,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/gpio/gpio-palmas.c b/drivers/gpio/gpio-palmas.c index bac10c2faf56..6140e87c6754 100644 --- a/drivers/gpio/gpio-palmas.c +++ b/drivers/gpio/gpio-palmas.c @@ -12,7 +12,6 @@ #include #include #include -#include #include struct palmas_gpio { diff --git a/drivers/gpio/gpio-pmic-eic-sprd.c b/drivers/gpio/gpio-pmic-eic-sprd.c index c3e4d90f6b18..dabb0da3bd33 100644 --- a/drivers/gpio/gpio-pmic-eic-sprd.c +++ b/drivers/gpio/gpio-pmic-eic-sprd.c @@ -8,7 +8,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c index a1630ed4b741..7e9f7a32d3ee 100644 --- a/drivers/gpio/gpio-pxa.c +++ b/drivers/gpio/gpio-pxa.c @@ -20,7 +20,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c index 2525adb52f4f..86e69cde04da 100644 --- a/drivers/gpio/gpio-rcar.c +++ b/drivers/gpio/gpio-rcar.c @@ -15,7 +15,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/gpio/gpio-rockchip.c b/drivers/gpio/gpio-rockchip.c index e5de15a2ab9a..b35b9604413f 100644 --- a/drivers/gpio/gpio-rockchip.c +++ b/drivers/gpio/gpio-rockchip.c @@ -17,10 +17,10 @@ #include #include #include -#include #include #include #include +#include #include #include "../pinctrl/core.h" diff --git a/drivers/gpio/gpio-sprd.c b/drivers/gpio/gpio-sprd.c index 072b4e653216..c117c11bfb29 100644 --- a/drivers/gpio/gpio-sprd.c +++ b/drivers/gpio/gpio-sprd.c @@ -7,8 +7,8 @@ #include #include #include +#include #include -#include #include #include diff --git a/drivers/gpio/gpio-stp-xway.c b/drivers/gpio/gpio-stp-xway.c index 4750ea34204c..053d616f2e02 100644 --- a/drivers/gpio/gpio-stp-xway.c +++ b/drivers/gpio/gpio-stp-xway.c @@ -4,11 +4,12 @@ * Copyright (C) 2012 John Crispin */ +#include #include #include #include #include -#include +#include #include #include #include diff --git a/drivers/gpio/gpio-syscon.c b/drivers/gpio/gpio-syscon.c index 6076937b18e7..41bf47c8c983 100644 --- a/drivers/gpio/gpio-syscon.c +++ b/drivers/gpio/gpio-syscon.c @@ -9,7 +9,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/gpio/gpio-tegra.c b/drivers/gpio/gpio-tegra.c index 5b265a6fd3c1..ea715582bcf3 100644 --- a/drivers/gpio/gpio-tegra.c +++ b/drivers/gpio/gpio-tegra.c @@ -15,7 +15,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/gpio/gpio-tegra186.c b/drivers/gpio/gpio-tegra186.c index 80d08ddde40e..d87dd06db40d 100644 --- a/drivers/gpio/gpio-tegra186.c +++ b/drivers/gpio/gpio-tegra186.c @@ -11,7 +11,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/gpio/gpio-tps6586x.c b/drivers/gpio/gpio-tps6586x.c index c5713524b581..d277aa951143 100644 --- a/drivers/gpio/gpio-tps6586x.c +++ b/drivers/gpio/gpio-tps6586x.c @@ -15,7 +15,7 @@ #include #include #include -#include +#include #include /* GPIO control registers */ diff --git a/drivers/gpio/gpio-tps65910.c b/drivers/gpio/gpio-tps65910.c index 321e6945f0be..187d21580573 100644 --- a/drivers/gpio/gpio-tps65910.c +++ b/drivers/gpio/gpio-tps65910.c @@ -15,7 +15,7 @@ #include #include #include -#include +#include struct tps65910_gpio { struct gpio_chip gpio_chip; diff --git a/drivers/gpio/gpio-ts4800.c b/drivers/gpio/gpio-ts4800.c index 95d80ba14bee..4748e3d47106 100644 --- a/drivers/gpio/gpio-ts4800.c +++ b/drivers/gpio/gpio-ts4800.c @@ -7,8 +7,7 @@ #include #include -#include -#include +#include #include #define DEFAULT_PIN_NUMBER 16 diff --git a/drivers/gpio/gpio-ts4900.c b/drivers/gpio/gpio-ts4900.c index eba96319dac2..0f6397b77c9d 100644 --- a/drivers/gpio/gpio-ts4900.c +++ b/drivers/gpio/gpio-ts4900.c @@ -8,7 +8,7 @@ #include #include -#include +#include #include #include diff --git a/drivers/gpio/gpio-uniphier.c b/drivers/gpio/gpio-uniphier.c index 19ce6675cbc0..9725b7aa18a7 100644 --- a/drivers/gpio/gpio-uniphier.c +++ b/drivers/gpio/gpio-uniphier.c @@ -9,7 +9,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/gpio/gpio-vf610.c b/drivers/gpio/gpio-vf610.c index d3f3a69d4907..54e7c51f48c8 100644 --- a/drivers/gpio/gpio-vf610.c +++ b/drivers/gpio/gpio-vf610.c @@ -17,7 +17,6 @@ #include #include #include -#include #include #include diff --git a/drivers/gpio/gpio-wcd934x.c b/drivers/gpio/gpio-wcd934x.c index 817750e4e033..2bba27b13947 100644 --- a/drivers/gpio/gpio-wcd934x.c +++ b/drivers/gpio/gpio-wcd934x.c @@ -1,11 +1,12 @@ // SPDX-License-Identifier: GPL-2.0 // Copyright (c) 2019, Linaro Limited +#include #include #include +#include #include #include -#include #define WCD_PIN_MASK(p) BIT(p) #define WCD_REG_DIR_CTL_OFFSET 0x42 diff --git a/drivers/gpio/gpio-xilinx.c b/drivers/gpio/gpio-xilinx.c index 1fa66f2a667f..a16945e8319e 100644 --- a/drivers/gpio/gpio-xilinx.c +++ b/drivers/gpio/gpio-xilinx.c @@ -15,8 +15,8 @@ #include #include #include -#include -#include +#include +#include #include #include diff --git a/drivers/gpio/gpio-xra1403.c b/drivers/gpio/gpio-xra1403.c index bbc06cdd9634..eed8a1684830 100644 --- a/drivers/gpio/gpio-xra1403.c +++ b/drivers/gpio/gpio-xra1403.c @@ -8,9 +8,9 @@ #include #include #include +#include #include #include -#include #include #include #include From c9ab610e5cd98f7fe0213b382870437368f11457 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Wed, 19 Jul 2023 01:30:53 +0300 Subject: [PATCH 084/656] gpio: bcm-kona: Make driver OF-independent There is nothing in the driver that requires OF APIs, make the driver OF independent. Signed-off-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/Kconfig | 2 +- drivers/gpio/gpio-bcm-kona.c | 21 ++++++++------------- 2 files changed, 9 insertions(+), 14 deletions(-) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index e382dfebad7c..1cf267a3ed8b 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -191,7 +191,7 @@ config GPIO_RASPBERRYPI_EXP config GPIO_BCM_KONA bool "Broadcom Kona GPIO" - depends on OF_GPIO && (ARCH_BCM_MOBILE || COMPILE_TEST) + depends on ARCH_BCM_MOBILE || COMPILE_TEST help Turn on GPIO support for Broadcom "Kona" chips. diff --git a/drivers/gpio/gpio-bcm-kona.c b/drivers/gpio/gpio-bcm-kona.c index 70770429ba48..c977144eff10 100644 --- a/drivers/gpio/gpio-bcm-kona.c +++ b/drivers/gpio/gpio-bcm-kona.c @@ -8,12 +8,14 @@ #include #include -#include #include -#include #include +#include #include #include +#include +#include +#include #define BCM_GPIO_PASSWD 0x00a5a501 #define GPIO_PER_BANK 32 @@ -556,19 +558,12 @@ static void bcm_kona_gpio_reset(struct bcm_kona_gpio *kona_gpio) static int bcm_kona_gpio_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; - const struct of_device_id *match; struct bcm_kona_gpio_bank *bank; struct bcm_kona_gpio *kona_gpio; struct gpio_chip *chip; int ret; int i; - match = of_match_device(bcm_kona_gpio_of_match, dev); - if (!match) { - dev_err(dev, "Failed to find gpio controller\n"); - return -ENODEV; - } - kona_gpio = devm_kzalloc(dev, sizeof(*kona_gpio), GFP_KERNEL); if (!kona_gpio) return -ENOMEM; @@ -601,10 +596,10 @@ static int bcm_kona_gpio_probe(struct platform_device *pdev) chip->parent = dev; chip->ngpio = kona_gpio->num_bank * GPIO_PER_BANK; - kona_gpio->irq_domain = irq_domain_add_linear(dev->of_node, - chip->ngpio, - &bcm_kona_irq_ops, - kona_gpio); + kona_gpio->irq_domain = irq_domain_create_linear(dev_fwnode(dev), + chip->ngpio, + &bcm_kona_irq_ops, + kona_gpio); if (!kona_gpio->irq_domain) { dev_err(dev, "Couldn't allocate IRQ domain\n"); return -ENXIO; From ec72293cc2099859f79485861fbced41ae3fde60 Mon Sep 17 00:00:00 2001 From: Andrei Coardos Date: Wed, 19 Jul 2023 01:30:54 +0300 Subject: [PATCH 085/656] gpio: bcm-kona: remove unneeded platform_set_drvdata() call The platform_set_drvdata() call was never used, ever since the driver was originally added. It looks like this copy+paste left-over. Possibly the author copied from a driver that had this line, but also had a remove hook. Reviewed-by: Alexandru Ardelean Signed-off-by: Andrei Coardos Signed-off-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-bcm-kona.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpio/gpio-bcm-kona.c b/drivers/gpio/gpio-bcm-kona.c index c977144eff10..f67c0f76a196 100644 --- a/drivers/gpio/gpio-bcm-kona.c +++ b/drivers/gpio/gpio-bcm-kona.c @@ -592,7 +592,6 @@ static int bcm_kona_gpio_probe(struct platform_device *pdev) return -ENOMEM; kona_gpio->pdev = pdev; - platform_set_drvdata(pdev, kona_gpio); chip->parent = dev; chip->ngpio = kona_gpio->num_bank * GPIO_PER_BANK; From 91093b57ee3b2080a1f30895f862690f8d794161 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Wed, 19 Jul 2023 01:30:55 +0300 Subject: [PATCH 086/656] gpio: bcm-kona: Drop unused pdev member in private data structure The pdev member is assigned and not used, drop it. Signed-off-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-bcm-kona.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpio/gpio-bcm-kona.c b/drivers/gpio/gpio-bcm-kona.c index f67c0f76a196..5321ef98f442 100644 --- a/drivers/gpio/gpio-bcm-kona.c +++ b/drivers/gpio/gpio-bcm-kona.c @@ -64,7 +64,6 @@ struct bcm_kona_gpio { struct gpio_chip gpio_chip; struct irq_domain *irq_domain; struct bcm_kona_gpio_bank *banks; - struct platform_device *pdev; }; struct bcm_kona_gpio_bank { @@ -591,7 +590,6 @@ static int bcm_kona_gpio_probe(struct platform_device *pdev) if (!kona_gpio->banks) return -ENOMEM; - kona_gpio->pdev = pdev; chip->parent = dev; chip->ngpio = kona_gpio->num_bank * GPIO_PER_BANK; From 2920e08bef609c8b59f9996fd6852a7b97119d75 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Tue, 18 Jul 2023 22:14:53 +0200 Subject: [PATCH 087/656] regulator: max77857: Switch back to use struct i2c_driver's .probe() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit After commit b8a1a4cd5a98 ("i2c: Provide a temporary .probe_new() call-back type"), all drivers being converted to .probe_new() and then commit 03c835f498b5 ("i2c: Switch .probe() to not take an id parameter") convert back to (the new) .probe() to be able to eventually drop .probe_new() from struct i2c_driver. Signed-off-by: Uwe Kleine-König Link: https://lore.kernel.org/r/20230718201453.3953602-1-u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown --- drivers/regulator/max77857-regulator.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/regulator/max77857-regulator.c b/drivers/regulator/max77857-regulator.c index c5482ffd606e..d0fcb080f825 100644 --- a/drivers/regulator/max77857-regulator.c +++ b/drivers/regulator/max77857-regulator.c @@ -449,7 +449,7 @@ struct i2c_driver max77857_driver = { .of_match_table = max77857_of_id, }, .id_table = max77857_id, - .probe_new = max77857_probe, + .probe = max77857_probe, }; module_i2c_driver(max77857_driver); From 541e75954cadde0355ce7bebed5675625b2943a8 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Tue, 18 Jul 2023 21:39:31 +0200 Subject: [PATCH 088/656] regulator: max77857: mark more functions static A few functions in the new driver are global but only used in this file: drivers/regulator/max77857-regulator.c:209:5: error: no previous prototype for 'max77859_get_voltage_sel' [-Werror=missing-prototypes] drivers/regulator/max77857-regulator.c:221:5: error: no previous prototype for 'max77859_set_current_limit' [-Werror=missing-prototypes] drivers/regulator/max77857-regulator.c:235:5: error: no previous prototype for 'max77859_get_current_limit' [-Werror=missing-prototypes] Mark them static, which produces potentially better code and avoids the warning. Fixes: af71cccadeced ("regulator: max77857: Add ADI MAX77857/59/MAX77831 Regulator Support") Signed-off-by: Arnd Bergmann Link: https://lore.kernel.org/r/20230718193938.3593118-1-arnd@kernel.org Signed-off-by: Mark Brown --- drivers/regulator/max77857-regulator.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/regulator/max77857-regulator.c b/drivers/regulator/max77857-regulator.c index d0fcb080f825..58f825d8d2b0 100644 --- a/drivers/regulator/max77857-regulator.c +++ b/drivers/regulator/max77857-regulator.c @@ -206,7 +206,7 @@ static int max77859_set_voltage_sel(struct regulator_dev *rdev, MAX77859_CONT3_DVS_START); } -int max77859_get_voltage_sel(struct regulator_dev *rdev) +static int max77859_get_voltage_sel(struct regulator_dev *rdev) { __be16 reg; int ret; @@ -218,7 +218,7 @@ int max77859_get_voltage_sel(struct regulator_dev *rdev) return FIELD_GET(MAX77859_VOLTAGE_SEL_MASK, __be16_to_cpu(reg)); } -int max77859_set_current_limit(struct regulator_dev *rdev, int min_uA, int max_uA) +static int max77859_set_current_limit(struct regulator_dev *rdev, int min_uA, int max_uA) { u32 selector; @@ -232,7 +232,7 @@ int max77859_set_current_limit(struct regulator_dev *rdev, int min_uA, int max_u return regmap_write(rdev->regmap, MAX77859_REG_CONT5, selector); } -int max77859_get_current_limit(struct regulator_dev *rdev) +static int max77859_get_current_limit(struct regulator_dev *rdev) { u32 selector; int ret; From d5737d12779a171e76ad07635d1ed06a22009da7 Mon Sep 17 00:00:00 2001 From: Fabrizio Castro Date: Tue, 18 Jul 2023 20:24:50 +0100 Subject: [PATCH 089/656] spi: rzv2m-csi: Squash timing settings into one statement Register CLKSEL hosts the configuration for both clock polarity and data phase, and both values can be set in one write operation. Squash the clock polarity and data phase register writes into one statement, for efficiency. Signed-off-by: Fabrizio Castro Suggested-by: Andy Shevchenko Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230718192453.543549-2-fabrizio.castro.jz@renesas.com Signed-off-by: Mark Brown --- drivers/spi/spi-rzv2m-csi.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-rzv2m-csi.c b/drivers/spi/spi-rzv2m-csi.c index 038f1486b7d7..faf5898bc3e0 100644 --- a/drivers/spi/spi-rzv2m-csi.c +++ b/drivers/spi/spi-rzv2m-csi.c @@ -38,6 +38,7 @@ /* CSI_CLKSEL */ #define CSI_CLKSEL_CKP BIT(17) #define CSI_CLKSEL_DAP BIT(16) +#define CSI_CLKSEL_MODE (CSI_CLKSEL_CKP|CSI_CLKSEL_DAP) #define CSI_CLKSEL_SLAVE BIT(15) #define CSI_CLKSEL_CKS GENMASK(14, 1) @@ -408,10 +409,8 @@ static int rzv2m_csi_setup(struct spi_device *spi) writel(CSI_MODE_SETUP, csi->base + CSI_MODE); /* Setup clock polarity and phase timing */ - rzv2m_csi_reg_write_bit(csi, CSI_CLKSEL, CSI_CLKSEL_CKP, - !(spi->mode & SPI_CPOL)); - rzv2m_csi_reg_write_bit(csi, CSI_CLKSEL, CSI_CLKSEL_DAP, - !(spi->mode & SPI_CPHA)); + rzv2m_csi_reg_write_bit(csi, CSI_CLKSEL, CSI_CLKSEL_MODE, + ~spi->mode & SPI_MODE_X_MASK); /* Setup serial data order */ rzv2m_csi_reg_write_bit(csi, CSI_MODE, CSI_MODE_DIR, From 8dc4038a026a79b6222a43ccf7adf070c4ba54ea Mon Sep 17 00:00:00 2001 From: Fabrizio Castro Date: Tue, 18 Jul 2023 20:24:51 +0100 Subject: [PATCH 090/656] spi: rzv2m-csi: Improve data types, casting and alignment "unsigned int" is more appropriate than "int" for the members of "struct rzv2m_csi_priv". Using void* rather than u8* for txbuf and rxbuf allows for the removal of some type casting. Remove the unnecessary casting of "data" to "struct rzv2m_csi_priv*" in function "rzv2m_csi_irq_handler". Also, members "bytes_per_word" and "errors" introduce gaps in the structure. Adjust "struct rzv2m_csi_priv" and its members usage accordingly. Signed-off-by: Fabrizio Castro Suggested-by: Geert Uytterhoeven Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20230718192453.543549-3-fabrizio.castro.jz@renesas.com Signed-off-by: Mark Brown --- drivers/spi/spi-rzv2m-csi.c | 46 ++++++++++++++++++------------------- 1 file changed, 23 insertions(+), 23 deletions(-) diff --git a/drivers/spi/spi-rzv2m-csi.c b/drivers/spi/spi-rzv2m-csi.c index faf5898bc3e0..4dbb8c185a8a 100644 --- a/drivers/spi/spi-rzv2m-csi.c +++ b/drivers/spi/spi-rzv2m-csi.c @@ -63,8 +63,8 @@ /* CSI_FIFOTRG */ #define CSI_FIFOTRG_R_TRG GENMASK(2, 0) -#define CSI_FIFO_SIZE_BYTES 32 -#define CSI_FIFO_HALF_SIZE 16 +#define CSI_FIFO_SIZE_BYTES 32U +#define CSI_FIFO_HALF_SIZE 16U #define CSI_EN_DIS_TIMEOUT_US 100 /* * Clock "csiclk" gets divided by 2 * CSI_CLKSEL_CKS in order to generate the @@ -86,16 +86,16 @@ struct rzv2m_csi_priv { struct clk *pclk; struct device *dev; struct spi_controller *controller; - const u8 *txbuf; - u8 *rxbuf; - int buffer_len; - int bytes_sent; - int bytes_received; - int bytes_to_transfer; - int words_to_transfer; - unsigned char bytes_per_word; + const void *txbuf; + void *rxbuf; + unsigned int buffer_len; + unsigned int bytes_sent; + unsigned int bytes_received; + unsigned int bytes_to_transfer; + unsigned int words_to_transfer; + unsigned int bytes_per_word; wait_queue_head_t wait; - u8 errors; + u32 errors; u32 status; }; @@ -157,18 +157,18 @@ static int rzv2m_csi_start_stop_operation(const struct rzv2m_csi_priv *csi, static int rzv2m_csi_fill_txfifo(struct rzv2m_csi_priv *csi) { - int i; + unsigned int i; if (readl(csi->base + CSI_OFIFOL)) return -EIO; if (csi->bytes_per_word == 2) { - u16 *buf = (u16 *)csi->txbuf; + const u16 *buf = csi->txbuf; for (i = 0; i < csi->words_to_transfer; i++) writel(buf[i], csi->base + CSI_OFIFO); } else { - u8 *buf = (u8 *)csi->txbuf; + const u8 *buf = csi->txbuf; for (i = 0; i < csi->words_to_transfer; i++) writel(buf[i], csi->base + CSI_OFIFO); @@ -182,18 +182,18 @@ static int rzv2m_csi_fill_txfifo(struct rzv2m_csi_priv *csi) static int rzv2m_csi_read_rxfifo(struct rzv2m_csi_priv *csi) { - int i; + unsigned int i; if (readl(csi->base + CSI_IFIFOL) != csi->bytes_to_transfer) return -EIO; if (csi->bytes_per_word == 2) { - u16 *buf = (u16 *)csi->rxbuf; + u16 *buf = csi->rxbuf; for (i = 0; i < csi->words_to_transfer; i++) buf[i] = (u16)readl(csi->base + CSI_IFIFO); } else { - u8 *buf = (u8 *)csi->rxbuf; + u8 *buf = csi->rxbuf; for (i = 0; i < csi->words_to_transfer; i++) buf[i] = (u8)readl(csi->base + CSI_IFIFO); @@ -207,9 +207,9 @@ static int rzv2m_csi_read_rxfifo(struct rzv2m_csi_priv *csi) static inline void rzv2m_csi_calc_current_transfer(struct rzv2m_csi_priv *csi) { - int bytes_transferred = max_t(int, csi->bytes_received, csi->bytes_sent); - int bytes_remaining = csi->buffer_len - bytes_transferred; - int to_transfer; + unsigned int bytes_transferred = max(csi->bytes_received, csi->bytes_sent); + unsigned int bytes_remaining = csi->buffer_len - bytes_transferred; + unsigned int to_transfer; if (csi->txbuf) /* @@ -217,9 +217,9 @@ static inline void rzv2m_csi_calc_current_transfer(struct rzv2m_csi_priv *csi) * hard to raise an overflow error (which is only possible * when IP transmits and receives at the same time). */ - to_transfer = min_t(int, CSI_FIFO_HALF_SIZE, bytes_remaining); + to_transfer = min(CSI_FIFO_HALF_SIZE, bytes_remaining); else - to_transfer = min_t(int, CSI_FIFO_SIZE_BYTES, bytes_remaining); + to_transfer = min(CSI_FIFO_SIZE_BYTES, bytes_remaining); if (csi->bytes_per_word == 2) to_transfer >>= 1; @@ -339,7 +339,7 @@ static inline int rzv2m_csi_wait_for_rx_ready(struct rzv2m_csi_priv *csi) static irqreturn_t rzv2m_csi_irq_handler(int irq, void *data) { - struct rzv2m_csi_priv *csi = (struct rzv2m_csi_priv *)data; + struct rzv2m_csi_priv *csi = data; csi->status = readl(csi->base + CSI_INT); rzv2m_csi_disable_irqs(csi, csi->status); From 7b63568fce9cb34cb0ad4caf9231555eb768c8e6 Mon Sep 17 00:00:00 2001 From: Fabrizio Castro Date: Tue, 18 Jul 2023 20:24:52 +0100 Subject: [PATCH 091/656] spi: rzv2m-csi: Get rid of the x_trg{_words} tables Table x_trg can be replaced with ilog2(), and table x_trg_words can be replaced with rounddown_pow_of_two(). Replace the tables usage with the corresponding macros. While at it, remove a couple of unnecessary empty lines. Signed-off-by: Fabrizio Castro Suggested-by: Andy Shevchenko Reviewed-by: Andy Shevchenko Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20230718192453.543549-4-fabrizio.castro.jz@renesas.com Signed-off-by: Mark Brown --- drivers/spi/spi-rzv2m-csi.c | 21 +++------------------ 1 file changed, 3 insertions(+), 18 deletions(-) diff --git a/drivers/spi/spi-rzv2m-csi.c b/drivers/spi/spi-rzv2m-csi.c index 4dbb8c185a8a..62575a61608a 100644 --- a/drivers/spi/spi-rzv2m-csi.c +++ b/drivers/spi/spi-rzv2m-csi.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -99,20 +100,6 @@ struct rzv2m_csi_priv { u32 status; }; -static const unsigned char x_trg[] = { - 0, 1, 1, 2, 2, 2, 2, 3, - 3, 3, 3, 3, 3, 3, 3, 4, - 4, 4, 4, 4, 4, 4, 4, 4, - 4, 4, 4, 4, 4, 4, 4, 5 -}; - -static const unsigned char x_trg_words[] = { - 1, 2, 2, 4, 4, 4, 4, 8, - 8, 8, 8, 8, 8, 8, 8, 16, - 16, 16, 16, 16, 16, 16, 16, 16, - 16, 16, 16, 16, 16, 16, 16, 32 -}; - static void rzv2m_csi_reg_write_bit(const struct rzv2m_csi_priv *csi, int reg_offs, int bit_mask, u32 value) { @@ -230,7 +217,7 @@ static inline void rzv2m_csi_calc_current_transfer(struct rzv2m_csi_priv *csi) * less than or equal to the number of bytes we need to transfer. * This may result in multiple smaller transfers. */ - csi->words_to_transfer = x_trg_words[to_transfer - 1]; + csi->words_to_transfer = rounddown_pow_of_two(to_transfer); if (csi->bytes_per_word == 2) csi->bytes_to_transfer = csi->words_to_transfer << 1; @@ -241,7 +228,7 @@ static inline void rzv2m_csi_calc_current_transfer(struct rzv2m_csi_priv *csi) static inline void rzv2m_csi_set_rx_fifo_trigger_level(struct rzv2m_csi_priv *csi) { rzv2m_csi_reg_write_bit(csi, CSI_FIFOTRG, CSI_FIFOTRG_R_TRG, - x_trg[csi->words_to_transfer - 1]); + ilog2(csi->words_to_transfer)); } static inline void rzv2m_csi_enable_rx_trigger(struct rzv2m_csi_priv *csi, @@ -314,7 +301,6 @@ static int rzv2m_csi_wait_for_tx_empty(struct rzv2m_csi_priv *csi) return 0; ret = rzv2m_csi_wait_for_interrupt(csi, CSI_INT_TREND, CSI_CNT_TREND_E); - if (ret == -ETIMEDOUT) csi->errors |= TX_TIMEOUT_ERROR; @@ -330,7 +316,6 @@ static inline int rzv2m_csi_wait_for_rx_ready(struct rzv2m_csi_priv *csi) ret = rzv2m_csi_wait_for_interrupt(csi, CSI_INT_R_TRGR, CSI_CNT_R_TRGR_E); - if (ret == -ETIMEDOUT) csi->errors |= RX_TIMEOUT_ERROR; From c5a7b66811d22a4901bd358447e59160dbda8f65 Mon Sep 17 00:00:00 2001 From: Fabrizio Castro Date: Tue, 18 Jul 2023 20:24:53 +0100 Subject: [PATCH 092/656] spi: rzv2m-csi: Make use of device_set_node Use device_set_node instead of assigning controller->dev.of_node directly because it also sets the firmware node. Signed-off-by: Fabrizio Castro Suggested-by: Andy Shevchenko Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230718192453.543549-5-fabrizio.castro.jz@renesas.com Signed-off-by: Mark Brown --- drivers/spi/spi-rzv2m-csi.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-rzv2m-csi.c b/drivers/spi/spi-rzv2m-csi.c index 62575a61608a..d098aefa370d 100644 --- a/drivers/spi/spi-rzv2m-csi.c +++ b/drivers/spi/spi-rzv2m-csi.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -589,12 +590,13 @@ static int rzv2m_csi_probe(struct platform_device *pdev) init_waitqueue_head(&csi->wait); controller->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST; - controller->dev.of_node = pdev->dev.of_node; controller->bits_per_word_mask = SPI_BPW_MASK(16) | SPI_BPW_MASK(8); controller->setup = rzv2m_csi_setup; controller->transfer_one = rzv2m_csi_transfer_one; controller->use_gpio_descriptors = true; + device_set_node(&controller->dev, dev_fwnode(dev)); + ret = devm_request_irq(dev, irq, rzv2m_csi_irq_handler, 0, dev_name(dev), csi); if (ret) From 2ce8284c31156c432df60d4497ec68cca04e128f Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Tue, 18 Jul 2023 08:30:43 -0600 Subject: [PATCH 093/656] power: Explicitly include correct DT includes The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Acked-by: David Lechner Signed-off-by: Rob Herring Reviewed-by: Simon Glass Signed-off-by: Sebastian Reichel --- drivers/power/reset/as3722-poweroff.c | 1 - drivers/power/reset/brcm-kona-reset.c | 4 ++-- drivers/power/reset/gpio-poweroff.c | 3 ++- drivers/power/reset/gpio-restart.c | 2 +- drivers/power/reset/keystone-reset.c | 3 ++- drivers/power/reset/ocelot-reset.c | 4 ++-- drivers/power/reset/odroid-go-ultra-poweroff.c | 3 ++- drivers/power/reset/oxnas-restart.c | 2 -- drivers/power/reset/st-poweroff.c | 2 +- drivers/power/reset/syscon-poweroff.c | 3 +-- drivers/power/reset/syscon-reboot.c | 3 +-- drivers/power/reset/xgene-reboot.c | 2 +- drivers/power/supply/axp20x_ac_power.c | 1 - drivers/power/supply/axp20x_battery.c | 1 - drivers/power/supply/axp20x_usb_power.c | 1 - drivers/power/supply/cpcap-battery.c | 2 +- drivers/power/supply/da9150-charger.c | 2 -- drivers/power/supply/da9150-fg.c | 1 - drivers/power/supply/lego_ev3_battery.c | 2 +- drivers/power/supply/ltc2941-battery-gauge.c | 2 +- drivers/power/supply/ltc4162-l-charger.c | 2 +- drivers/power/supply/max14656_charger_detector.c | 2 +- drivers/power/supply/max17040_battery.c | 2 +- drivers/power/supply/max8903_charger.c | 1 - drivers/power/supply/rn5t618_power.c | 1 - drivers/power/supply/rt5033_charger.c | 2 +- drivers/power/supply/rt9455_charger.c | 3 +-- drivers/power/supply/sbs-battery.c | 2 +- drivers/power/supply/tps65090-charger.c | 2 +- drivers/power/supply/tps65217_charger.c | 1 - drivers/power/supply/twl4030_charger.c | 1 + 31 files changed, 26 insertions(+), 37 deletions(-) diff --git a/drivers/power/reset/as3722-poweroff.c b/drivers/power/reset/as3722-poweroff.c index 80edff1a556f..829e0dba2fda 100644 --- a/drivers/power/reset/as3722-poweroff.c +++ b/drivers/power/reset/as3722-poweroff.c @@ -10,7 +10,6 @@ #include #include #include -#include #include #include diff --git a/drivers/power/reset/brcm-kona-reset.c b/drivers/power/reset/brcm-kona-reset.c index 3de024e3ceb7..64e241c77f83 100644 --- a/drivers/power/reset/brcm-kona-reset.c +++ b/drivers/power/reset/brcm-kona-reset.c @@ -2,8 +2,8 @@ // Copyright (C) 2016 Broadcom #include -#include -#include +#include +#include #include #define RSTMGR_REG_WR_ACCESS_OFFSET 0 diff --git a/drivers/power/reset/gpio-poweroff.c b/drivers/power/reset/gpio-poweroff.c index 84b3c3528afa..b28f24da1b3c 100644 --- a/drivers/power/reset/gpio-poweroff.c +++ b/drivers/power/reset/gpio-poweroff.c @@ -11,8 +11,9 @@ #include #include #include +#include #include -#include +#include #include #define DEFAULT_TIMEOUT_MS 3000 diff --git a/drivers/power/reset/gpio-restart.c b/drivers/power/reset/gpio-restart.c index a479d3536eb1..3aa19765772d 100644 --- a/drivers/power/reset/gpio-restart.c +++ b/drivers/power/reset/gpio-restart.c @@ -12,8 +12,8 @@ #include #include #include -#include #include +#include struct gpio_restart { struct gpio_desc *reset_gpio; diff --git a/drivers/power/reset/keystone-reset.c b/drivers/power/reset/keystone-reset.c index 83a4e1c9bf94..dbc4ff61cd74 100644 --- a/drivers/power/reset/keystone-reset.c +++ b/drivers/power/reset/keystone-reset.c @@ -10,10 +10,11 @@ #include #include #include +#include #include #include #include -#include +#include #define RSTYPE_RG 0x0 #define RSCTRL_RG 0x4 diff --git a/drivers/power/reset/ocelot-reset.c b/drivers/power/reset/ocelot-reset.c index 8caa90cb58fc..44c7730086e4 100644 --- a/drivers/power/reset/ocelot-reset.c +++ b/drivers/power/reset/ocelot-reset.c @@ -8,10 +8,10 @@ #include #include #include +#include #include -#include -#include #include +#include #include #include diff --git a/drivers/power/reset/odroid-go-ultra-poweroff.c b/drivers/power/reset/odroid-go-ultra-poweroff.c index f46271da4e8e..9cac7aef77f0 100644 --- a/drivers/power/reset/odroid-go-ultra-poweroff.c +++ b/drivers/power/reset/odroid-go-ultra-poweroff.c @@ -4,7 +4,8 @@ */ #include #include -#include +#include +#include #include #include #include diff --git a/drivers/power/reset/oxnas-restart.c b/drivers/power/reset/oxnas-restart.c index 13090bec058a..dd321caa28b6 100644 --- a/drivers/power/reset/oxnas-restart.c +++ b/drivers/power/reset/oxnas-restart.c @@ -13,8 +13,6 @@ #include #include #include -#include -#include #include #include #include diff --git a/drivers/power/reset/st-poweroff.c b/drivers/power/reset/st-poweroff.c index 5ccaacffab54..56ba21873882 100644 --- a/drivers/power/reset/st-poweroff.c +++ b/drivers/power/reset/st-poweroff.c @@ -9,7 +9,7 @@ #include #include -#include +#include #include #include #include diff --git a/drivers/power/reset/syscon-poweroff.c b/drivers/power/reset/syscon-poweroff.c index ed58bdf41e27..430d440d55c6 100644 --- a/drivers/power/reset/syscon-poweroff.c +++ b/drivers/power/reset/syscon-poweroff.c @@ -10,8 +10,7 @@ #include #include #include -#include -#include +#include #include #include #include diff --git a/drivers/power/reset/syscon-reboot.c b/drivers/power/reset/syscon-reboot.c index 45e34e6885f7..4d622c19bc48 100644 --- a/drivers/power/reset/syscon-reboot.c +++ b/drivers/power/reset/syscon-reboot.c @@ -9,8 +9,7 @@ #include #include #include -#include -#include +#include #include #include #include diff --git a/drivers/power/reset/xgene-reboot.c b/drivers/power/reset/xgene-reboot.c index 0b0d2fd2bd0c..3260bd93158e 100644 --- a/drivers/power/reset/xgene-reboot.c +++ b/drivers/power/reset/xgene-reboot.c @@ -13,7 +13,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/power/supply/axp20x_ac_power.c b/drivers/power/supply/axp20x_ac_power.c index 57e50208d537..19a118633115 100644 --- a/drivers/power/supply/axp20x_ac_power.c +++ b/drivers/power/supply/axp20x_ac_power.c @@ -13,7 +13,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/power/supply/axp20x_battery.c b/drivers/power/supply/axp20x_battery.c index 9106077c0dbb..6ac5c80cfda2 100644 --- a/drivers/power/supply/axp20x_battery.c +++ b/drivers/power/supply/axp20x_battery.c @@ -22,7 +22,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/power/supply/axp20x_usb_power.c b/drivers/power/supply/axp20x_usb_power.c index 51c3f9b6458d..bde17406c130 100644 --- a/drivers/power/supply/axp20x_usb_power.c +++ b/drivers/power/supply/axp20x_usb_power.c @@ -15,7 +15,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/power/supply/cpcap-battery.c b/drivers/power/supply/cpcap-battery.c index d98d9244e394..5dd76c0ac98d 100644 --- a/drivers/power/supply/cpcap-battery.c +++ b/drivers/power/supply/cpcap-battery.c @@ -15,7 +15,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/power/supply/da9150-charger.c b/drivers/power/supply/da9150-charger.c index a87aeaea38e1..27f897067aa3 100644 --- a/drivers/power/supply/da9150-charger.c +++ b/drivers/power/supply/da9150-charger.c @@ -11,8 +11,6 @@ #include #include #include -#include -#include #include #include #include diff --git a/drivers/power/supply/da9150-fg.c b/drivers/power/supply/da9150-fg.c index 8c5e2c49d6c1..652c1f213af1 100644 --- a/drivers/power/supply/da9150-fg.c +++ b/drivers/power/supply/da9150-fg.c @@ -11,7 +11,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/power/supply/lego_ev3_battery.c b/drivers/power/supply/lego_ev3_battery.c index ccb00be38e2c..9085de0ae1b2 100644 --- a/drivers/power/supply/lego_ev3_battery.c +++ b/drivers/power/supply/lego_ev3_battery.c @@ -20,7 +20,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/power/supply/ltc2941-battery-gauge.c b/drivers/power/supply/ltc2941-battery-gauge.c index cad39a8f829d..a1ddc4b060ce 100644 --- a/drivers/power/supply/ltc2941-battery-gauge.c +++ b/drivers/power/supply/ltc2941-battery-gauge.c @@ -11,7 +11,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/power/supply/ltc4162-l-charger.c b/drivers/power/supply/ltc4162-l-charger.c index ec5b4a20ad43..f0eace731480 100644 --- a/drivers/power/supply/ltc4162-l-charger.c +++ b/drivers/power/supply/ltc4162-l-charger.c @@ -6,7 +6,7 @@ #include #include -#include +#include #include #include #include diff --git a/drivers/power/supply/max14656_charger_detector.c b/drivers/power/supply/max14656_charger_detector.c index fbdf12cf64eb..89f2af72dfcd 100644 --- a/drivers/power/supply/max14656_charger_detector.c +++ b/drivers/power/supply/max14656_charger_detector.c @@ -14,8 +14,8 @@ #include #include #include +#include #include -#include #include #include #include diff --git a/drivers/power/supply/max17040_battery.c b/drivers/power/supply/max17040_battery.c index 22ea7de47a53..ff42db672899 100644 --- a/drivers/power/supply/max17040_battery.c +++ b/drivers/power/supply/max17040_battery.c @@ -15,7 +15,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/power/supply/max8903_charger.c b/drivers/power/supply/max8903_charger.c index 54d50b55fbae..e65d0141f260 100644 --- a/drivers/power/supply/max8903_charger.c +++ b/drivers/power/supply/max8903_charger.c @@ -10,7 +10,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/power/supply/rn5t618_power.c b/drivers/power/supply/rn5t618_power.c index a5e09ac78a50..ebea3522a2ac 100644 --- a/drivers/power/supply/rn5t618_power.c +++ b/drivers/power/supply/rn5t618_power.c @@ -14,7 +14,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/power/supply/rt5033_charger.c b/drivers/power/supply/rt5033_charger.c index 5218dfbf5e1b..c0c516f22c66 100644 --- a/drivers/power/supply/rt5033_charger.c +++ b/drivers/power/supply/rt5033_charger.c @@ -6,8 +6,8 @@ * Author: Beomho Seo */ +#include #include -#include #include #include #include diff --git a/drivers/power/supply/rt9455_charger.c b/drivers/power/supply/rt9455_charger.c index ff4dcf77c788..c345a77f9f78 100644 --- a/drivers/power/supply/rt9455_charger.c +++ b/drivers/power/supply/rt9455_charger.c @@ -8,8 +8,7 @@ #include #include #include -#include -#include +#include #include #include #include diff --git a/drivers/power/supply/sbs-battery.c b/drivers/power/supply/sbs-battery.c index 62a354e01204..cdfc8466d129 100644 --- a/drivers/power/supply/sbs-battery.c +++ b/drivers/power/supply/sbs-battery.c @@ -16,7 +16,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/power/supply/tps65090-charger.c b/drivers/power/supply/tps65090-charger.c index 0990b2fa6cd8..f96c705e0a9f 100644 --- a/drivers/power/supply/tps65090-charger.c +++ b/drivers/power/supply/tps65090-charger.c @@ -13,7 +13,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/power/supply/tps65217_charger.c b/drivers/power/supply/tps65217_charger.c index a4bc9f2a10bc..96341cbde4fa 100644 --- a/drivers/power/supply/tps65217_charger.c +++ b/drivers/power/supply/tps65217_charger.c @@ -17,7 +17,6 @@ #include #include #include -#include #include #include diff --git a/drivers/power/supply/twl4030_charger.c b/drivers/power/supply/twl4030_charger.c index 7adfd69fe649..e78d061d8d32 100644 --- a/drivers/power/supply/twl4030_charger.c +++ b/drivers/power/supply/twl4030_charger.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include From da28e18d6a31448a5f67e59e835669e930f8c044 Mon Sep 17 00:00:00 2001 From: Ricardo Rivera-Matos Date: Fri, 14 Jul 2023 12:45:29 -0500 Subject: [PATCH 094/656] power: supply: bq24190: Considers FORCE_20PCT when getting IPRECHG Adds a check of the FORCE_20PCT bit when getting the precharge current value. According to the bit description for the FORCE_20PCT bit, when FORCE_20PCT is true, the precharge current target is 50% of what is configured in the IPRECHG bit field. Signed-off-by: Ricardo Rivera-Matos Reviewed-by: David Rhodes Signed-off-by: Sebastian Reichel --- drivers/power/supply/bq24190_charger.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/drivers/power/supply/bq24190_charger.c b/drivers/power/supply/bq24190_charger.c index ef8235848f56..3f99cb9590ba 100644 --- a/drivers/power/supply/bq24190_charger.c +++ b/drivers/power/supply/bq24190_charger.c @@ -965,7 +965,7 @@ static int bq24190_charger_get_precharge(struct bq24190_dev_info *bdi, union power_supply_propval *val) { u8 v; - int ret; + int curr, ret; ret = bq24190_read_mask(bdi, BQ24190_REG_PCTCC, BQ24190_REG_PCTCC_IPRECHG_MASK, @@ -973,7 +973,20 @@ static int bq24190_charger_get_precharge(struct bq24190_dev_info *bdi, if (ret < 0) return ret; - val->intval = ++v * 128 * 1000; + curr = ++v * 128 * 1000; + + ret = bq24190_read_mask(bdi, BQ24190_REG_CCC, + BQ24190_REG_CCC_FORCE_20PCT_MASK, + BQ24190_REG_CCC_FORCE_20PCT_SHIFT, &v); + if (ret < 0) + return ret; + + /* If FORCE_20PCT is enabled, then current is 50% of IPRECHG value */ + if (v) + curr /= 2; + + val->intval = curr; + return 0; } From 7b9fc309c0b57c5b1230bf3e0a8bb9e937eb6529 Mon Sep 17 00:00:00 2001 From: Colin Ian King Date: Tue, 27 Jun 2023 13:17:07 +0100 Subject: [PATCH 095/656] power: supply: bd99954: make read-only array sub_status_reg Don't populate the read-only array on the stack, instead make it static const. Signed-off-by: Colin Ian King Reviewed-by: Matti Vaittinen Signed-off-by: Sebastian Reichel --- drivers/power/supply/bd99954-charger.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/power/supply/bd99954-charger.c b/drivers/power/supply/bd99954-charger.c index 086dcf4033c1..1ed1d9f99fb3 100644 --- a/drivers/power/supply/bd99954-charger.c +++ b/drivers/power/supply/bd99954-charger.c @@ -536,7 +536,7 @@ static irqreturn_t bd9995x_irq_handler_thread(int irq, void *private) for_each_set_bit(i, &tmp, 7) { int sub_status, sub_mask; - int sub_status_reg[] = { + static const int sub_status_reg[] = { INT1_STATUS, INT2_STATUS, INT3_STATUS, INT4_STATUS, INT5_STATUS, INT6_STATUS, INT7_STATUS, }; From d40befed9a581740f6ceb0e5998ec2f59bfbc559 Mon Sep 17 00:00:00 2001 From: Kamel Bouhara Date: Tue, 20 Jun 2023 08:26:57 +0200 Subject: [PATCH 096/656] power: reset: at91-reset: add sysfs interface to the power on reason Introduce a list of generic reset sources and use them to export the power on reason through sysfs. Update the ABI documentation to describe this new interface. Signed-off-by: Kamel Bouhara Acked-by: Nicolas Ferre [Miquel Raynal: Follow-up on Kamel's work, 4 years later] Signed-off-by: Miquel Raynal Signed-off-by: Sebastian Reichel --- .../testing/sysfs-platform-power-on-reason | 12 ++++++ drivers/power/reset/at91-reset.c | 37 ++++++++++++++----- include/linux/power/power_on_reason.h | 19 ++++++++++ 3 files changed, 58 insertions(+), 10 deletions(-) create mode 100644 Documentation/ABI/testing/sysfs-platform-power-on-reason create mode 100644 include/linux/power/power_on_reason.h diff --git a/Documentation/ABI/testing/sysfs-platform-power-on-reason b/Documentation/ABI/testing/sysfs-platform-power-on-reason new file mode 100644 index 000000000000..c3b29dbc64bf --- /dev/null +++ b/Documentation/ABI/testing/sysfs-platform-power-on-reason @@ -0,0 +1,12 @@ +What: /sys/devices/platform/.../power_on_reason +Date: June 2023 +KernelVersion: 6.5 +Contact: Kamel Bouhara +Description: Shows system power on reason. The following strings/reasons can + be read (the list can be extended): + "regular power-up", "RTC wakeup", "watchdog timeout", + "software reset", "reset button action", "CPU clock failure", + "crystal oscillator failure", "brown-out reset", + "unknown reason". + + The file is read only. diff --git a/drivers/power/reset/at91-reset.c b/drivers/power/reset/at91-reset.c index d6884841a6dc..aa9b012d3d00 100644 --- a/drivers/power/reset/at91-reset.c +++ b/drivers/power/reset/at91-reset.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include @@ -149,44 +150,54 @@ static int at91_reset(struct notifier_block *this, unsigned long mode, return NOTIFY_DONE; } -static const char * __init at91_reset_reason(struct at91_reset *reset) +static const char *at91_reset_reason(struct at91_reset *reset) { u32 reg = readl(reset->rstc_base + AT91_RSTC_SR); const char *reason; switch ((reg & AT91_RSTC_RSTTYP) >> 8) { case RESET_TYPE_GENERAL: - reason = "general reset"; + reason = POWER_ON_REASON_REGULAR; break; case RESET_TYPE_WAKEUP: - reason = "wakeup"; + reason = POWER_ON_REASON_RTC; break; case RESET_TYPE_WATCHDOG: - reason = "watchdog reset"; + reason = POWER_ON_REASON_WATCHDOG; break; case RESET_TYPE_SOFTWARE: - reason = "software reset"; + reason = POWER_ON_REASON_SOFTWARE; break; case RESET_TYPE_USER: - reason = "user reset"; + reason = POWER_ON_REASON_RST_BTN; break; case RESET_TYPE_CPU_FAIL: - reason = "CPU clock failure detection"; + reason = POWER_ON_REASON_CPU_CLK_FAIL; break; case RESET_TYPE_XTAL_FAIL: - reason = "32.768 kHz crystal failure detection"; + reason = POWER_ON_REASON_XTAL_FAIL; break; case RESET_TYPE_ULP2: - reason = "ULP2 reset"; + reason = POWER_ON_REASON_BROWN_OUT; break; default: - reason = "unknown reset"; + reason = POWER_ON_REASON_UNKNOWN; break; } return reason; } +static ssize_t power_on_reason_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct platform_device *pdev = to_platform_device(dev); + struct at91_reset *reset = platform_get_drvdata(pdev); + + return sprintf(buf, "%s\n", at91_reset_reason(reset)); +} +static DEVICE_ATTR_RO(power_on_reason); + static const struct of_device_id at91_ramc_of_match[] = { { .compatible = "atmel,at91sam9260-sdramc", @@ -391,6 +402,12 @@ static int __init at91_reset_probe(struct platform_device *pdev) if (ret) goto disable_clk; + ret = device_create_file(&pdev->dev, &dev_attr_power_on_reason); + if (ret) { + dev_err(&pdev->dev, "Could not create sysfs entry\n"); + return ret; + } + dev_info(&pdev->dev, "Starting after %s\n", at91_reset_reason(reset)); return 0; diff --git a/include/linux/power/power_on_reason.h b/include/linux/power/power_on_reason.h new file mode 100644 index 000000000000..95a1ec0c403c --- /dev/null +++ b/include/linux/power/power_on_reason.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Author: Kamel Bouhra + */ + +#ifndef POWER_ON_REASON_H +#define POWER_ON_REASON_H + +#define POWER_ON_REASON_REGULAR "regular power-up" +#define POWER_ON_REASON_RTC "RTC wakeup" +#define POWER_ON_REASON_WATCHDOG "watchdog timeout" +#define POWER_ON_REASON_SOFTWARE "software reset" +#define POWER_ON_REASON_RST_BTN "reset button action" +#define POWER_ON_REASON_CPU_CLK_FAIL "CPU clock failure" +#define POWER_ON_REASON_XTAL_FAIL "crystal oscillator failure" +#define POWER_ON_REASON_BROWN_OUT "brown-out reset" +#define POWER_ON_REASON_UNKNOWN "unknown reason" + +#endif /* POWER_ON_REASON_H */ From 0b64a0e53cc7875c2410b26a20c1269d72cd1428 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Tue, 4 Jul 2023 21:03:03 +0800 Subject: [PATCH 097/656] power: reset: at91-poweroff: Convert to devm_platform_ioremap_resource() Use devm_platform_ioremap_resource() to simplify code. Signed-off-by: Yangtao Li Signed-off-by: Sebastian Reichel --- drivers/power/reset/at91-poweroff.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/power/reset/at91-poweroff.c b/drivers/power/reset/at91-poweroff.c index 9e74e131c675..dd5399785b69 100644 --- a/drivers/power/reset/at91-poweroff.c +++ b/drivers/power/reset/at91-poweroff.c @@ -151,13 +151,11 @@ static void at91_poweroff_dt_set_wakeup_mode(struct platform_device *pdev) static int __init at91_poweroff_probe(struct platform_device *pdev) { - struct resource *res; struct device_node *np; u32 ddr_type; int ret; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - at91_shdwc.shdwc_base = devm_ioremap_resource(&pdev->dev, res); + at91_shdwc.shdwc_base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(at91_shdwc.shdwc_base)) return PTR_ERR(at91_shdwc.shdwc_base); From 5d002da7296c50d3fcc50af29bf1e507585703e0 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Tue, 4 Jul 2023 21:03:04 +0800 Subject: [PATCH 098/656] power: reset: at91-sama5d2_shdwc: Convert to devm_platform_ioremap_resource() Use devm_platform_ioremap_resource() to simplify code. Signed-off-by: Yangtao Li Signed-off-by: Sebastian Reichel --- drivers/power/reset/at91-sama5d2_shdwc.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/power/reset/at91-sama5d2_shdwc.c b/drivers/power/reset/at91-sama5d2_shdwc.c index d8ecffe72f16..e76b102b57b1 100644 --- a/drivers/power/reset/at91-sama5d2_shdwc.c +++ b/drivers/power/reset/at91-sama5d2_shdwc.c @@ -331,7 +331,6 @@ static const struct of_device_id at91_pmc_ids[] = { static int __init at91_shdwc_probe(struct platform_device *pdev) { - struct resource *res; const struct of_device_id *match; struct device_node *np; u32 ddr_type; @@ -349,8 +348,7 @@ static int __init at91_shdwc_probe(struct platform_device *pdev) platform_set_drvdata(pdev, at91_shdwc); - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - at91_shdwc->shdwc_base = devm_ioremap_resource(&pdev->dev, res); + at91_shdwc->shdwc_base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(at91_shdwc->shdwc_base)) return PTR_ERR(at91_shdwc->shdwc_base); From 79d2a09d953fd1939b16e4baf83ab60d2b305e59 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Tue, 4 Jul 2023 21:03:05 +0800 Subject: [PATCH 099/656] power: reset: brcm-kona: Convert to devm_platform_ioremap_resource() Use devm_platform_ioremap_resource() to simplify code. Signed-off-by: Yangtao Li Acked-by: Florian Fainelli Signed-off-by: Sebastian Reichel --- drivers/power/reset/brcm-kona-reset.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/power/reset/brcm-kona-reset.c b/drivers/power/reset/brcm-kona-reset.c index 64e241c77f83..d05728b1db09 100644 --- a/drivers/power/reset/brcm-kona-reset.c +++ b/drivers/power/reset/brcm-kona-reset.c @@ -38,9 +38,7 @@ static struct notifier_block kona_reset_nb = { static int kona_reset_probe(struct platform_device *pdev) { - struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - - kona_reset_base = devm_ioremap_resource(&pdev->dev, res); + kona_reset_base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(kona_reset_base)) return PTR_ERR(kona_reset_base); From 808e964e302f4e7b2a84d9f87c7cfd2bdd62a4e5 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Tue, 4 Jul 2023 21:03:06 +0800 Subject: [PATCH 100/656] power: reset: gemini-poweroff: Convert to devm_platform_ioremap_resource() Use devm_platform_ioremap_resource() to simplify code. Signed-off-by: Yangtao Li Signed-off-by: Sebastian Reichel --- drivers/power/reset/gemini-poweroff.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/power/reset/gemini-poweroff.c b/drivers/power/reset/gemini-poweroff.c index b7f7a8225f22..d309b610142c 100644 --- a/drivers/power/reset/gemini-poweroff.c +++ b/drivers/power/reset/gemini-poweroff.c @@ -91,7 +91,6 @@ static void gemini_poweroff(void) static int gemini_poweroff_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; - struct resource *res; struct gemini_powercon *gpw; u32 val; int irq; @@ -101,8 +100,7 @@ static int gemini_poweroff_probe(struct platform_device *pdev) if (!gpw) return -ENOMEM; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - gpw->base = devm_ioremap_resource(dev, res); + gpw->base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(gpw->base)) return PTR_ERR(gpw->base); From 19223ffa3d84f66ccb09a154dfa26cd40034595c Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Tue, 4 Jul 2023 21:03:07 +0800 Subject: [PATCH 101/656] power: reset: msm: Convert to devm_platform_ioremap_resource() Use devm_platform_ioremap_resource() to simplify code. Signed-off-by: Yangtao Li Signed-off-by: Sebastian Reichel --- drivers/power/reset/msm-poweroff.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/drivers/power/reset/msm-poweroff.c b/drivers/power/reset/msm-poweroff.c index 0c439f83bf65..b9a401bd280b 100644 --- a/drivers/power/reset/msm-poweroff.c +++ b/drivers/power/reset/msm-poweroff.c @@ -35,11 +35,7 @@ static void do_msm_poweroff(void) static int msm_restart_probe(struct platform_device *pdev) { - struct device *dev = &pdev->dev; - struct resource *mem; - - mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); - msm_ps_hold = devm_ioremap_resource(dev, mem); + msm_ps_hold = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(msm_ps_hold)) return PTR_ERR(msm_ps_hold); From 1a80588314caa933fbc1b295d16723086c7b797a Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Tue, 4 Jul 2023 21:03:08 +0800 Subject: [PATCH 102/656] power: reset: ocelot: Convert to devm_platform_ioremap_resource() Use devm_platform_ioremap_resource() to simplify code. Signed-off-by: Yangtao Li Signed-off-by: Sebastian Reichel --- drivers/power/reset/ocelot-reset.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/power/reset/ocelot-reset.c b/drivers/power/reset/ocelot-reset.c index 44c7730086e4..56be64decf54 100644 --- a/drivers/power/reset/ocelot-reset.c +++ b/drivers/power/reset/ocelot-reset.c @@ -69,8 +69,6 @@ static int ocelot_restart_handle(struct notifier_block *this, static int ocelot_reset_probe(struct platform_device *pdev) { struct ocelot_reset_context *ctx; - struct resource *res; - struct device *dev = &pdev->dev; int err; @@ -78,8 +76,7 @@ static int ocelot_reset_probe(struct platform_device *pdev) if (!ctx) return -ENOMEM; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - ctx->base = devm_ioremap_resource(dev, res); + ctx->base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(ctx->base)) return PTR_ERR(ctx->base); From b52d51d88432dd7cf7bc57ea11d3ef1efad8cb96 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Tue, 13 Jun 2023 17:07:23 +0800 Subject: [PATCH 103/656] power: supply: core: Avoid duplicate hwmon device from thermal framework When the power supply device being registered supports a temperature readout, the core registers a thermal zone for it. The thermal core would register a hwmon device for that unless told otherwise. When CONFIG_POWER_SUPPLY_HWMON is enabled, the power supply core creates a hwmon device. This results in a second entry, one which has a better name than the one registered through the thermal framework. It could potentially have readouts other than temperature. To simplify the result, tell the thermal framework to not register a hwmon device if CONFIG_POWER_SUPPLY_HWMON is enabled. The result is one hwmon device with all the readings the device supports. Signed-off-by: Chen-Yu Tsai Signed-off-by: Sebastian Reichel --- drivers/power/supply/power_supply_core.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/power/supply/power_supply_core.c b/drivers/power/supply/power_supply_core.c index 3791aec69ddc..4aa466c945e2 100644 --- a/drivers/power/supply/power_supply_core.c +++ b/drivers/power/supply/power_supply_core.c @@ -1305,8 +1305,12 @@ static int psy_register_thermal(struct power_supply *psy) /* Register battery zone device psy reports temperature */ if (psy_has_property(psy->desc, POWER_SUPPLY_PROP_TEMP)) { + /* Prefer our hwmon device and avoid duplicates */ + struct thermal_zone_params tzp = { + .no_hwmon = IS_ENABLED(CONFIG_POWER_SUPPLY_HWMON) + }; psy->tzd = thermal_zone_device_register(psy->desc->name, - 0, 0, psy, &psy_tzd_ops, NULL, 0, 0); + 0, 0, psy, &psy_tzd_ops, &tzp, 0, 0); if (IS_ERR(psy->tzd)) return PTR_ERR(psy->tzd); ret = thermal_zone_device_enable(psy->tzd); From af73fd32b4f2d23bb61c37f533ddae49e10ef3b0 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Fri, 30 Jun 2023 18:58:37 +0200 Subject: [PATCH 104/656] power: reset: oxnas-restart: remove obsolete restart driver Due to lack of maintenance and stall of development for a few years now, and since no new features will ever be added upstream, remove support for OX810 and OX820 restart feature. Acked-by: Linus Walleij Acked-by: Arnd Bergmann Acked-by: Daniel Golle Acked-by: Andy Shevchenko Signed-off-by: Neil Armstrong Signed-off-by: Sebastian Reichel --- drivers/power/reset/Kconfig | 7 - drivers/power/reset/Makefile | 1 - drivers/power/reset/oxnas-restart.c | 231 ---------------------------- 3 files changed, 239 deletions(-) delete mode 100644 drivers/power/reset/oxnas-restart.c diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig index fff07b2bd77b..59e1ebb7842e 100644 --- a/drivers/power/reset/Kconfig +++ b/drivers/power/reset/Kconfig @@ -148,13 +148,6 @@ config POWER_RESET_ODROID_GO_ULTRA_POWEROFF help This driver supports Power off for Odroid Go Ultra device. -config POWER_RESET_OXNAS - bool "OXNAS SoC restart driver" - depends on ARCH_OXNAS - default MACH_OX820 - help - Restart support for OXNAS/PLXTECH OX820 SoC. - config POWER_RESET_PIIX4_POWEROFF tristate "Intel PIIX4 power-off driver" depends on PCI diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile index d763e6735ee3..a95d1bd275d1 100644 --- a/drivers/power/reset/Makefile +++ b/drivers/power/reset/Makefile @@ -14,7 +14,6 @@ obj-$(CONFIG_POWER_RESET_HISI) += hisi-reboot.o obj-$(CONFIG_POWER_RESET_LINKSTATION) += linkstation-poweroff.o obj-$(CONFIG_POWER_RESET_MSM) += msm-poweroff.o obj-$(CONFIG_POWER_RESET_MT6323) += mt6323-poweroff.o -obj-$(CONFIG_POWER_RESET_OXNAS) += oxnas-restart.o obj-$(CONFIG_POWER_RESET_QCOM_PON) += qcom-pon.o obj-$(CONFIG_POWER_RESET_OCELOT_RESET) += ocelot-reset.o obj-$(CONFIG_POWER_RESET_ODROID_GO_ULTRA_POWEROFF) += odroid-go-ultra-poweroff.o diff --git a/drivers/power/reset/oxnas-restart.c b/drivers/power/reset/oxnas-restart.c deleted file mode 100644 index dd321caa28b6..000000000000 --- a/drivers/power/reset/oxnas-restart.c +++ /dev/null @@ -1,231 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0) -/* - * oxnas SoC reset driver - * based on: - * Microsemi MIPS SoC reset driver - * and ox820_assert_system_reset() written by Ma Hajun - * - * Copyright (c) 2013 Ma Hajun - * Copyright (c) 2017 Microsemi Corporation - * Copyright (c) 2020 Daniel Golle - */ -#include -#include -#include -#include -#include -#include -#include - -/* bit numbers of reset control register */ -#define OX820_SYS_CTRL_RST_SCU 0 -#define OX820_SYS_CTRL_RST_COPRO 1 -#define OX820_SYS_CTRL_RST_ARM0 2 -#define OX820_SYS_CTRL_RST_ARM1 3 -#define OX820_SYS_CTRL_RST_USBHS 4 -#define OX820_SYS_CTRL_RST_USBHSPHYA 5 -#define OX820_SYS_CTRL_RST_MACA 6 -#define OX820_SYS_CTRL_RST_MAC OX820_SYS_CTRL_RST_MACA -#define OX820_SYS_CTRL_RST_PCIEA 7 -#define OX820_SYS_CTRL_RST_SGDMA 8 -#define OX820_SYS_CTRL_RST_CIPHER 9 -#define OX820_SYS_CTRL_RST_DDR 10 -#define OX820_SYS_CTRL_RST_SATA 11 -#define OX820_SYS_CTRL_RST_SATA_LINK 12 -#define OX820_SYS_CTRL_RST_SATA_PHY 13 -#define OX820_SYS_CTRL_RST_PCIEPHY 14 -#define OX820_SYS_CTRL_RST_STATIC 15 -#define OX820_SYS_CTRL_RST_GPIO 16 -#define OX820_SYS_CTRL_RST_UART1 17 -#define OX820_SYS_CTRL_RST_UART2 18 -#define OX820_SYS_CTRL_RST_MISC 19 -#define OX820_SYS_CTRL_RST_I2S 20 -#define OX820_SYS_CTRL_RST_SD 21 -#define OX820_SYS_CTRL_RST_MACB 22 -#define OX820_SYS_CTRL_RST_PCIEB 23 -#define OX820_SYS_CTRL_RST_VIDEO 24 -#define OX820_SYS_CTRL_RST_DDR_PHY 25 -#define OX820_SYS_CTRL_RST_USBHSPHYB 26 -#define OX820_SYS_CTRL_RST_USBDEV 27 -#define OX820_SYS_CTRL_RST_ARMDBG 29 -#define OX820_SYS_CTRL_RST_PLLA 30 -#define OX820_SYS_CTRL_RST_PLLB 31 - -/* bit numbers of clock control register */ -#define OX820_SYS_CTRL_CLK_COPRO 0 -#define OX820_SYS_CTRL_CLK_DMA 1 -#define OX820_SYS_CTRL_CLK_CIPHER 2 -#define OX820_SYS_CTRL_CLK_SD 3 -#define OX820_SYS_CTRL_CLK_SATA 4 -#define OX820_SYS_CTRL_CLK_I2S 5 -#define OX820_SYS_CTRL_CLK_USBHS 6 -#define OX820_SYS_CTRL_CLK_MACA 7 -#define OX820_SYS_CTRL_CLK_MAC OX820_SYS_CTRL_CLK_MACA -#define OX820_SYS_CTRL_CLK_PCIEA 8 -#define OX820_SYS_CTRL_CLK_STATIC 9 -#define OX820_SYS_CTRL_CLK_MACB 10 -#define OX820_SYS_CTRL_CLK_PCIEB 11 -#define OX820_SYS_CTRL_CLK_REF600 12 -#define OX820_SYS_CTRL_CLK_USBDEV 13 -#define OX820_SYS_CTRL_CLK_DDR 14 -#define OX820_SYS_CTRL_CLK_DDRPHY 15 -#define OX820_SYS_CTRL_CLK_DDRCK 16 - -/* Regmap offsets */ -#define OX820_CLK_SET_REGOFFSET 0x2c -#define OX820_CLK_CLR_REGOFFSET 0x30 -#define OX820_RST_SET_REGOFFSET 0x34 -#define OX820_RST_CLR_REGOFFSET 0x38 -#define OX820_SECONDARY_SEL_REGOFFSET 0x14 -#define OX820_TERTIARY_SEL_REGOFFSET 0x8c -#define OX820_QUATERNARY_SEL_REGOFFSET 0x94 -#define OX820_DEBUG_SEL_REGOFFSET 0x9c -#define OX820_ALTERNATIVE_SEL_REGOFFSET 0xa4 -#define OX820_PULLUP_SEL_REGOFFSET 0xac -#define OX820_SEC_SECONDARY_SEL_REGOFFSET 0x100014 -#define OX820_SEC_TERTIARY_SEL_REGOFFSET 0x10008c -#define OX820_SEC_QUATERNARY_SEL_REGOFFSET 0x100094 -#define OX820_SEC_DEBUG_SEL_REGOFFSET 0x10009c -#define OX820_SEC_ALTERNATIVE_SEL_REGOFFSET 0x1000a4 -#define OX820_SEC_PULLUP_SEL_REGOFFSET 0x1000ac - -struct oxnas_restart_context { - struct regmap *sys_ctrl; - struct notifier_block restart_handler; -}; - -static int ox820_restart_handle(struct notifier_block *this, - unsigned long mode, void *cmd) -{ - struct oxnas_restart_context *ctx = container_of(this, struct - oxnas_restart_context, - restart_handler); - u32 value; - - /* - * Assert reset to cores as per power on defaults - * Don't touch the DDR interface as things will come to an impromptu - * stop NB Possibly should be asserting reset for PLLB, but there are - * timing concerns here according to the docs - */ - value = BIT(OX820_SYS_CTRL_RST_COPRO) | - BIT(OX820_SYS_CTRL_RST_USBHS) | - BIT(OX820_SYS_CTRL_RST_USBHSPHYA) | - BIT(OX820_SYS_CTRL_RST_MACA) | - BIT(OX820_SYS_CTRL_RST_PCIEA) | - BIT(OX820_SYS_CTRL_RST_SGDMA) | - BIT(OX820_SYS_CTRL_RST_CIPHER) | - BIT(OX820_SYS_CTRL_RST_SATA) | - BIT(OX820_SYS_CTRL_RST_SATA_LINK) | - BIT(OX820_SYS_CTRL_RST_SATA_PHY) | - BIT(OX820_SYS_CTRL_RST_PCIEPHY) | - BIT(OX820_SYS_CTRL_RST_STATIC) | - BIT(OX820_SYS_CTRL_RST_UART1) | - BIT(OX820_SYS_CTRL_RST_UART2) | - BIT(OX820_SYS_CTRL_RST_MISC) | - BIT(OX820_SYS_CTRL_RST_I2S) | - BIT(OX820_SYS_CTRL_RST_SD) | - BIT(OX820_SYS_CTRL_RST_MACB) | - BIT(OX820_SYS_CTRL_RST_PCIEB) | - BIT(OX820_SYS_CTRL_RST_VIDEO) | - BIT(OX820_SYS_CTRL_RST_USBHSPHYB) | - BIT(OX820_SYS_CTRL_RST_USBDEV); - - regmap_write(ctx->sys_ctrl, OX820_RST_SET_REGOFFSET, value); - - /* Release reset to cores as per power on defaults */ - regmap_write(ctx->sys_ctrl, OX820_RST_CLR_REGOFFSET, - BIT(OX820_SYS_CTRL_RST_GPIO)); - - /* - * Disable clocks to cores as per power-on defaults - must leave DDR - * related clocks enabled otherwise we'll stop rather abruptly. - */ - value = BIT(OX820_SYS_CTRL_CLK_COPRO) | - BIT(OX820_SYS_CTRL_CLK_DMA) | - BIT(OX820_SYS_CTRL_CLK_CIPHER) | - BIT(OX820_SYS_CTRL_CLK_SD) | - BIT(OX820_SYS_CTRL_CLK_SATA) | - BIT(OX820_SYS_CTRL_CLK_I2S) | - BIT(OX820_SYS_CTRL_CLK_USBHS) | - BIT(OX820_SYS_CTRL_CLK_MAC) | - BIT(OX820_SYS_CTRL_CLK_PCIEA) | - BIT(OX820_SYS_CTRL_CLK_STATIC) | - BIT(OX820_SYS_CTRL_CLK_MACB) | - BIT(OX820_SYS_CTRL_CLK_PCIEB) | - BIT(OX820_SYS_CTRL_CLK_REF600) | - BIT(OX820_SYS_CTRL_CLK_USBDEV); - - regmap_write(ctx->sys_ctrl, OX820_CLK_CLR_REGOFFSET, value); - - /* Enable clocks to cores as per power-on defaults */ - - /* Set sys-control pin mux'ing as per power-on defaults */ - regmap_write(ctx->sys_ctrl, OX820_SECONDARY_SEL_REGOFFSET, 0); - regmap_write(ctx->sys_ctrl, OX820_TERTIARY_SEL_REGOFFSET, 0); - regmap_write(ctx->sys_ctrl, OX820_QUATERNARY_SEL_REGOFFSET, 0); - regmap_write(ctx->sys_ctrl, OX820_DEBUG_SEL_REGOFFSET, 0); - regmap_write(ctx->sys_ctrl, OX820_ALTERNATIVE_SEL_REGOFFSET, 0); - regmap_write(ctx->sys_ctrl, OX820_PULLUP_SEL_REGOFFSET, 0); - - regmap_write(ctx->sys_ctrl, OX820_SEC_SECONDARY_SEL_REGOFFSET, 0); - regmap_write(ctx->sys_ctrl, OX820_SEC_TERTIARY_SEL_REGOFFSET, 0); - regmap_write(ctx->sys_ctrl, OX820_SEC_QUATERNARY_SEL_REGOFFSET, 0); - regmap_write(ctx->sys_ctrl, OX820_SEC_DEBUG_SEL_REGOFFSET, 0); - regmap_write(ctx->sys_ctrl, OX820_SEC_ALTERNATIVE_SEL_REGOFFSET, 0); - regmap_write(ctx->sys_ctrl, OX820_SEC_PULLUP_SEL_REGOFFSET, 0); - - /* - * No need to save any state, as the ROM loader can determine whether - * reset is due to power cycling or programatic action, just hit the - * (self-clearing) CPU reset bit of the block reset register - */ - value = - BIT(OX820_SYS_CTRL_RST_SCU) | - BIT(OX820_SYS_CTRL_RST_ARM0) | - BIT(OX820_SYS_CTRL_RST_ARM1); - - regmap_write(ctx->sys_ctrl, OX820_RST_SET_REGOFFSET, value); - - pr_emerg("Unable to restart system\n"); - return NOTIFY_DONE; -} - -static int ox820_restart_probe(struct platform_device *pdev) -{ - struct oxnas_restart_context *ctx; - struct regmap *sys_ctrl; - struct device *dev = &pdev->dev; - int err = 0; - - sys_ctrl = syscon_node_to_regmap(pdev->dev.of_node); - if (IS_ERR(sys_ctrl)) - return PTR_ERR(sys_ctrl); - - ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL); - if (!ctx) - return -ENOMEM; - - ctx->sys_ctrl = sys_ctrl; - ctx->restart_handler.notifier_call = ox820_restart_handle; - ctx->restart_handler.priority = 192; - err = register_restart_handler(&ctx->restart_handler); - if (err) - dev_err(dev, "can't register restart notifier (err=%d)\n", err); - - return err; -} - -static const struct of_device_id ox820_restart_of_match[] = { - { .compatible = "oxsemi,ox820-sys-ctrl" }, - {} -}; - -static struct platform_driver ox820_restart_driver = { - .probe = ox820_restart_probe, - .driver = { - .name = "ox820-chip-reset", - .of_match_table = ox820_restart_of_match, - }, -}; -builtin_platform_driver(ox820_restart_driver); From b582763721828f6c3fcf94d371623127f0198f3f Mon Sep 17 00:00:00 2001 From: Mario Limonciello Date: Fri, 23 Jun 2023 08:49:51 -0500 Subject: [PATCH 105/656] crypto: ccp - Rename macro for security attributes The attribute_show() macro is only valid for determining the availability of security related sysfs entries. Rename the macro to better show this relationship. Acked-by: Tom Lendacky Signed-off-by: Mario Limonciello Signed-off-by: Herbert Xu --- drivers/crypto/ccp/sp-pci.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/drivers/crypto/ccp/sp-pci.c b/drivers/crypto/ccp/sp-pci.c index b603ad9b8341..c8f075a7f49f 100644 --- a/drivers/crypto/ccp/sp-pci.c +++ b/drivers/crypto/ccp/sp-pci.c @@ -32,7 +32,7 @@ struct sp_pci { }; static struct sp_device *sp_dev_master; -#define attribute_show(name, def) \ +#define security_attribute_show(name, def) \ static ssize_t name##_show(struct device *d, struct device_attribute *attr, \ char *buf) \ { \ @@ -42,24 +42,24 @@ static ssize_t name##_show(struct device *d, struct device_attribute *attr, \ return sysfs_emit(buf, "%d\n", (psp->capability & bit) > 0); \ } -attribute_show(fused_part, FUSED_PART) +security_attribute_show(fused_part, FUSED_PART) static DEVICE_ATTR_RO(fused_part); -attribute_show(debug_lock_on, DEBUG_LOCK_ON) +security_attribute_show(debug_lock_on, DEBUG_LOCK_ON) static DEVICE_ATTR_RO(debug_lock_on); -attribute_show(tsme_status, TSME_STATUS) +security_attribute_show(tsme_status, TSME_STATUS) static DEVICE_ATTR_RO(tsme_status); -attribute_show(anti_rollback_status, ANTI_ROLLBACK_STATUS) +security_attribute_show(anti_rollback_status, ANTI_ROLLBACK_STATUS) static DEVICE_ATTR_RO(anti_rollback_status); -attribute_show(rpmc_production_enabled, RPMC_PRODUCTION_ENABLED) +security_attribute_show(rpmc_production_enabled, RPMC_PRODUCTION_ENABLED) static DEVICE_ATTR_RO(rpmc_production_enabled); -attribute_show(rpmc_spirom_available, RPMC_SPIROM_AVAILABLE) +security_attribute_show(rpmc_spirom_available, RPMC_SPIROM_AVAILABLE) static DEVICE_ATTR_RO(rpmc_spirom_available); -attribute_show(hsp_tpm_available, HSP_TPM_AVAILABLE) +security_attribute_show(hsp_tpm_available, HSP_TPM_AVAILABLE) static DEVICE_ATTR_RO(hsp_tpm_available); -attribute_show(rom_armor_enforced, ROM_ARMOR_ENFORCED) +security_attribute_show(rom_armor_enforced, ROM_ARMOR_ENFORCED) static DEVICE_ATTR_RO(rom_armor_enforced); -static struct attribute *psp_attrs[] = { +static struct attribute *psp_security_attrs[] = { &dev_attr_fused_part.attr, &dev_attr_debug_lock_on.attr, &dev_attr_tsme_status.attr, @@ -83,13 +83,13 @@ static umode_t psp_security_is_visible(struct kobject *kobj, struct attribute *a return 0; } -static struct attribute_group psp_attr_group = { - .attrs = psp_attrs, +static struct attribute_group psp_security_attr_group = { + .attrs = psp_security_attrs, .is_visible = psp_security_is_visible, }; static const struct attribute_group *psp_groups[] = { - &psp_attr_group, + &psp_security_attr_group, NULL, }; From 2e424c33d8e748b65b683988f80e711cd6a7f619 Mon Sep 17 00:00:00 2001 From: Mario Limonciello Date: Fri, 23 Jun 2023 08:49:52 -0500 Subject: [PATCH 106/656] crypto: ccp - Add support for displaying PSP firmware versions As it's not always obvious what PSP bootloader or TEE version are present in OEM systems, add the ability to get this information from sysfs for supported platforms. Acked-by: Tom Lendacky Signed-off-by: Mario Limonciello Signed-off-by: Herbert Xu --- Documentation/ABI/testing/sysfs-driver-ccp | 18 ++++++ drivers/crypto/ccp/sp-dev.h | 2 + drivers/crypto/ccp/sp-pci.c | 64 ++++++++++++++++++++++ 3 files changed, 84 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-driver-ccp b/Documentation/ABI/testing/sysfs-driver-ccp index 7aded9b75553..ee6b787eee7a 100644 --- a/Documentation/ABI/testing/sysfs-driver-ccp +++ b/Documentation/ABI/testing/sysfs-driver-ccp @@ -85,3 +85,21 @@ Description: Possible values: 0: Not enforced 1: Enforced + +What: /sys/bus/pci/devices//bootloader_version +Date: June 2023 +KernelVersion: 6.4 +Contact: mario.limonciello@amd.com +Description: + The /sys/bus/pci/devices//bootloader_version + file reports the firmware version of the AMD AGESA + bootloader. + +What: /sys/bus/pci/devices//tee_version +Date: June 2023 +KernelVersion: 6.4 +Contact: mario.limonciello@amd.com +Description: + The /sys/bus/pci/devices//tee_version + file reports the firmware version of the AMD Trusted + Execution Environment (TEE). diff --git a/drivers/crypto/ccp/sp-dev.h b/drivers/crypto/ccp/sp-dev.h index 1253a0217985..76c32ee6bd65 100644 --- a/drivers/crypto/ccp/sp-dev.h +++ b/drivers/crypto/ccp/sp-dev.h @@ -51,6 +51,7 @@ struct tee_vdata { const unsigned int cmdbuff_addr_hi_reg; const unsigned int ring_wptr_reg; const unsigned int ring_rptr_reg; + const unsigned int info_reg; }; struct platform_access_vdata { @@ -69,6 +70,7 @@ struct psp_vdata { const unsigned int feature_reg; const unsigned int inten_reg; const unsigned int intsts_reg; + const unsigned int bootloader_info_reg; }; /* Structure to hold SP device data */ diff --git a/drivers/crypto/ccp/sp-pci.c b/drivers/crypto/ccp/sp-pci.c index c8f075a7f49f..6c93577950c7 100644 --- a/drivers/crypto/ccp/sp-pci.c +++ b/drivers/crypto/ccp/sp-pci.c @@ -8,6 +8,7 @@ * Author: Gary R Hook */ +#include #include #include #include @@ -24,6 +25,12 @@ #include "ccp-dev.h" #include "psp-dev.h" +/* used for version string AA.BB.CC.DD */ +#define AA GENMASK(31, 24) +#define BB GENMASK(23, 16) +#define CC GENMASK(15, 8) +#define DD GENMASK(7, 0) + #define MSIX_VECTORS 2 struct sp_pci { @@ -88,8 +95,65 @@ static struct attribute_group psp_security_attr_group = { .is_visible = psp_security_is_visible, }; +#define version_attribute_show(name, _offset) \ +static ssize_t name##_show(struct device *d, struct device_attribute *attr, \ + char *buf) \ +{ \ + struct sp_device *sp = dev_get_drvdata(d); \ + struct psp_device *psp = sp->psp_data; \ + unsigned int val = ioread32(psp->io_regs + _offset); \ + return sysfs_emit(buf, "%02lx.%02lx.%02lx.%02lx\n", \ + FIELD_GET(AA, val), \ + FIELD_GET(BB, val), \ + FIELD_GET(CC, val), \ + FIELD_GET(DD, val)); \ +} + +version_attribute_show(bootloader_version, psp->vdata->bootloader_info_reg) +static DEVICE_ATTR_RO(bootloader_version); +version_attribute_show(tee_version, psp->vdata->tee->info_reg) +static DEVICE_ATTR_RO(tee_version); + +static struct attribute *psp_firmware_attrs[] = { + &dev_attr_bootloader_version.attr, + &dev_attr_tee_version.attr, + NULL, +}; + +static umode_t psp_firmware_is_visible(struct kobject *kobj, struct attribute *attr, int idx) +{ + struct device *dev = kobj_to_dev(kobj); + struct sp_device *sp = dev_get_drvdata(dev); + struct psp_device *psp = sp->psp_data; + unsigned int val = 0xffffffff; + + if (!psp) + return 0; + + if (attr == &dev_attr_bootloader_version.attr && + psp->vdata->bootloader_info_reg) + val = ioread32(psp->io_regs + psp->vdata->bootloader_info_reg); + + if (attr == &dev_attr_tee_version.attr && + psp->capability & PSP_CAPABILITY_TEE && + psp->vdata->tee->info_reg) + val = ioread32(psp->io_regs + psp->vdata->tee->info_reg); + + /* If platform disallows accessing this register it will be all f's */ + if (val != 0xffffffff) + return 0444; + + return 0; +} + +static struct attribute_group psp_firmware_attr_group = { + .attrs = psp_firmware_attrs, + .is_visible = psp_firmware_is_visible, +}; + static const struct attribute_group *psp_groups[] = { &psp_security_attr_group, + &psp_firmware_attr_group, NULL, }; From e938b08ad8cd7b757b7b37e8fb1c20897dd3ec09 Mon Sep 17 00:00:00 2001 From: Mario Limonciello Date: Fri, 23 Jun 2023 08:49:53 -0500 Subject: [PATCH 107/656] crypto: ccp - Add bootloader and TEE version offsets The bootloader and TEE versions are stored in registers that can be accessed from sysfs. This exports the information for recent client and datacenter parts. Acked-by: Tom Lendacky Signed-off-by: Mario Limonciello Signed-off-by: Herbert Xu --- drivers/crypto/ccp/sp-pci.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/crypto/ccp/sp-pci.c b/drivers/crypto/ccp/sp-pci.c index 6c93577950c7..205b93d229a9 100644 --- a/drivers/crypto/ccp/sp-pci.c +++ b/drivers/crypto/ccp/sp-pci.c @@ -423,6 +423,7 @@ static const struct tee_vdata teev1 = { .cmdbuff_addr_hi_reg = 0x1054c, /* C2PMSG_19 */ .ring_wptr_reg = 0x10550, /* C2PMSG_20 */ .ring_rptr_reg = 0x10554, /* C2PMSG_21 */ + .info_reg = 0x109e8, /* C2PMSG_58 */ }; static const struct tee_vdata teev2 = { @@ -448,6 +449,7 @@ static const struct platform_access_vdata pa_v2 = { static const struct psp_vdata pspv1 = { .sev = &sevv1, + .bootloader_info_reg = 0x105ec, /* C2PMSG_59 */ .feature_reg = 0x105fc, /* C2PMSG_63 */ .inten_reg = 0x10610, /* P2CMSG_INTEN */ .intsts_reg = 0x10614, /* P2CMSG_INTSTS */ @@ -455,6 +457,7 @@ static const struct psp_vdata pspv1 = { static const struct psp_vdata pspv2 = { .sev = &sevv2, + .bootloader_info_reg = 0x109ec, /* C2PMSG_59 */ .feature_reg = 0x109fc, /* C2PMSG_63 */ .inten_reg = 0x10690, /* P2CMSG_INTEN */ .intsts_reg = 0x10694, /* P2CMSG_INTSTS */ @@ -463,6 +466,7 @@ static const struct psp_vdata pspv2 = { static const struct psp_vdata pspv3 = { .tee = &teev1, .platform_access = &pa_v1, + .bootloader_info_reg = 0x109ec, /* C2PMSG_59 */ .feature_reg = 0x109fc, /* C2PMSG_63 */ .inten_reg = 0x10690, /* P2CMSG_INTEN */ .intsts_reg = 0x10694, /* P2CMSG_INTSTS */ @@ -471,6 +475,7 @@ static const struct psp_vdata pspv3 = { static const struct psp_vdata pspv4 = { .sev = &sevv2, .tee = &teev1, + .bootloader_info_reg = 0x109ec, /* C2PMSG_59 */ .feature_reg = 0x109fc, /* C2PMSG_63 */ .inten_reg = 0x10690, /* P2CMSG_INTEN */ .intsts_reg = 0x10694, /* P2CMSG_INTSTS */ From b8440d55f7d4ad2b669902301c87c482faf9a8f4 Mon Sep 17 00:00:00 2001 From: Mario Limonciello Date: Fri, 23 Jun 2023 08:49:54 -0500 Subject: [PATCH 108/656] crypto: ccp - move setting PSP master to earlier in the init Dynamic boost control needs to use platform access symbols that look for the PSP master as part of initialization. So move the PSP master before psp_init() so that dynamic boost control can be initialized properly. Acked-by: Tom Lendacky Signed-off-by: Mario Limonciello Signed-off-by: Herbert Xu --- drivers/crypto/ccp/psp-dev.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/crypto/ccp/psp-dev.c b/drivers/crypto/ccp/psp-dev.c index e3d6955d3265..3390f0bd6408 100644 --- a/drivers/crypto/ccp/psp-dev.c +++ b/drivers/crypto/ccp/psp-dev.c @@ -173,13 +173,14 @@ int psp_dev_init(struct sp_device *sp) goto e_err; } + /* master device must be set for platform access */ + if (psp->sp->set_psp_master_device) + psp->sp->set_psp_master_device(psp->sp); + ret = psp_init(psp); if (ret) goto e_irq; - if (sp->set_psp_master_device) - sp->set_psp_master_device(sp); - /* Enable interrupt */ iowrite32(-1, psp->io_regs + psp->vdata->inten_reg); @@ -188,6 +189,9 @@ int psp_dev_init(struct sp_device *sp) return 0; e_irq: + if (sp->clear_psp_master_device) + sp->clear_psp_master_device(sp); + sp_free_psp_irq(psp->sp, psp); e_err: sp->psp_data = NULL; From c04cf9e14f109ebcc425c1efd2c01294c52a4d62 Mon Sep 17 00:00:00 2001 From: Mario Limonciello Date: Fri, 23 Jun 2023 08:49:55 -0500 Subject: [PATCH 109/656] crypto: ccp - Add support for fetching a nonce for dynamic boost control Dynamic Boost Control is a feature offered on AMD client platforms that allows software to request and set power or frequency limits. Only software that has authenticated with the PSP can retrieve or set these limits. Create a character device and ioctl for fetching the nonce. This ioctl supports optionally passing authentication information which will influence how many calls the nonce is valid for. Acked-by: Tom Lendacky Signed-off-by: Mario Limonciello Signed-off-by: Herbert Xu --- drivers/crypto/ccp/Makefile | 3 +- drivers/crypto/ccp/dbc.c | 191 ++++++++++++++++++++++++++++ drivers/crypto/ccp/dbc.h | 44 +++++++ drivers/crypto/ccp/psp-dev.c | 9 ++ drivers/crypto/ccp/psp-dev.h | 1 + drivers/crypto/ccp/sp-dev.h | 5 + drivers/crypto/ccp/sp-pci.c | 1 + include/linux/psp-platform-access.h | 1 + include/uapi/linux/psp-dbc.h | 67 ++++++++++ 9 files changed, 321 insertions(+), 1 deletion(-) create mode 100644 drivers/crypto/ccp/dbc.c create mode 100644 drivers/crypto/ccp/dbc.h create mode 100644 include/uapi/linux/psp-dbc.h diff --git a/drivers/crypto/ccp/Makefile b/drivers/crypto/ccp/Makefile index f6196495e862..aa0ba2d17e1e 100644 --- a/drivers/crypto/ccp/Makefile +++ b/drivers/crypto/ccp/Makefile @@ -11,7 +11,8 @@ ccp-$(CONFIG_PCI) += sp-pci.o ccp-$(CONFIG_CRYPTO_DEV_SP_PSP) += psp-dev.o \ sev-dev.o \ tee-dev.o \ - platform-access.o + platform-access.o \ + dbc.o obj-$(CONFIG_CRYPTO_DEV_CCP_CRYPTO) += ccp-crypto.o ccp-crypto-objs := ccp-crypto-main.o \ diff --git a/drivers/crypto/ccp/dbc.c b/drivers/crypto/ccp/dbc.c new file mode 100644 index 000000000000..f65e93a81e53 --- /dev/null +++ b/drivers/crypto/ccp/dbc.c @@ -0,0 +1,191 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * AMD Secure Processor Dynamic Boost Control interface + * + * Copyright (C) 2023 Advanced Micro Devices, Inc. + * + * Author: Mario Limonciello + */ + +#include "dbc.h" + +struct error_map { + u32 psp; + int ret; +}; + +#define DBC_ERROR_ACCESS_DENIED 0x0001 +#define DBC_ERROR_EXCESS_DATA 0x0004 +#define DBC_ERROR_BAD_PARAMETERS 0x0006 +#define DBC_ERROR_BAD_STATE 0x0007 +#define DBC_ERROR_NOT_IMPLEMENTED 0x0009 +#define DBC_ERROR_BUSY 0x000D +#define DBC_ERROR_MESSAGE_FAILURE 0x0307 +#define DBC_ERROR_OVERFLOW 0x300F +#define DBC_ERROR_SIGNATURE_INVALID 0x3072 + +static struct error_map error_codes[] = { + {DBC_ERROR_ACCESS_DENIED, -EACCES}, + {DBC_ERROR_EXCESS_DATA, -E2BIG}, + {DBC_ERROR_BAD_PARAMETERS, -EINVAL}, + {DBC_ERROR_BAD_STATE, -EAGAIN}, + {DBC_ERROR_MESSAGE_FAILURE, -ENOENT}, + {DBC_ERROR_NOT_IMPLEMENTED, -ENOENT}, + {DBC_ERROR_BUSY, -EBUSY}, + {DBC_ERROR_OVERFLOW, -ENFILE}, + {DBC_ERROR_SIGNATURE_INVALID, -EPERM}, + {0x0, 0x0}, +}; + +static int send_dbc_cmd(struct psp_dbc_device *dbc_dev, + enum psp_platform_access_msg msg) +{ + int ret; + + dbc_dev->mbox->req.header.status = 0; + ret = psp_send_platform_access_msg(msg, (struct psp_request *)dbc_dev->mbox); + if (ret == -EIO) { + int i; + + dev_dbg(dbc_dev->dev, + "msg 0x%x failed with PSP error: 0x%x\n", + msg, dbc_dev->mbox->req.header.status); + + for (i = 0; error_codes[i].psp; i++) { + if (dbc_dev->mbox->req.header.status == error_codes[i].psp) + return error_codes[i].ret; + } + } + + return ret; +} + +static int send_dbc_nonce(struct psp_dbc_device *dbc_dev) +{ + int ret; + + dbc_dev->mbox->req.header.payload_size = sizeof(dbc_dev->mbox->dbc_nonce); + ret = send_dbc_cmd(dbc_dev, PSP_DYNAMIC_BOOST_GET_NONCE); + if (ret == -EAGAIN) { + dev_dbg(dbc_dev->dev, "retrying get nonce\n"); + ret = send_dbc_cmd(dbc_dev, PSP_DYNAMIC_BOOST_GET_NONCE); + } + + return ret; +} + +void dbc_dev_destroy(struct psp_device *psp) +{ + struct psp_dbc_device *dbc_dev = psp->dbc_data; + + if (!dbc_dev) + return; + + misc_deregister(&dbc_dev->char_dev); + mutex_destroy(&dbc_dev->ioctl_mutex); + psp->dbc_data = NULL; +} + +static long dbc_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) +{ + struct psp_device *psp_master = psp_get_master_device(); + void __user *argp = (void __user *)arg; + struct psp_dbc_device *dbc_dev; + int ret; + + if (!psp_master || !psp_master->dbc_data) + return -ENODEV; + dbc_dev = psp_master->dbc_data; + + mutex_lock(&dbc_dev->ioctl_mutex); + + switch (cmd) { + case DBCIOCNONCE: + if (copy_from_user(&dbc_dev->mbox->dbc_nonce.user, argp, + sizeof(struct dbc_user_nonce))) { + ret = -EFAULT; + goto unlock; + } + + ret = send_dbc_nonce(dbc_dev); + if (ret) + goto unlock; + + if (copy_to_user(argp, &dbc_dev->mbox->dbc_nonce.user, + sizeof(struct dbc_user_nonce))) { + ret = -EFAULT; + goto unlock; + } + break; + default: + ret = -EINVAL; + + } +unlock: + mutex_unlock(&dbc_dev->ioctl_mutex); + + return ret; +} + +static const struct file_operations dbc_fops = { + .owner = THIS_MODULE, + .unlocked_ioctl = dbc_ioctl, +}; + +int dbc_dev_init(struct psp_device *psp) +{ + struct device *dev = psp->dev; + struct psp_dbc_device *dbc_dev; + int ret; + + if (!PSP_FEATURE(psp, DBC)) + return 0; + + dbc_dev = devm_kzalloc(dev, sizeof(*dbc_dev), GFP_KERNEL); + if (!dbc_dev) + return -ENOMEM; + + BUILD_BUG_ON(sizeof(union dbc_buffer) > PAGE_SIZE); + dbc_dev->mbox = (void *)devm_get_free_pages(dev, GFP_KERNEL, 0); + if (!dbc_dev->mbox) { + ret = -ENOMEM; + goto cleanup_dev; + } + + psp->dbc_data = dbc_dev; + dbc_dev->dev = dev; + + ret = send_dbc_nonce(dbc_dev); + if (ret == -EACCES) { + dev_dbg(dbc_dev->dev, + "dynamic boost control was previously authenticated\n"); + ret = 0; + } + dev_dbg(dbc_dev->dev, "dynamic boost control is %savailable\n", + ret ? "un" : ""); + if (ret) { + ret = 0; + goto cleanup_mbox; + } + + dbc_dev->char_dev.minor = MISC_DYNAMIC_MINOR; + dbc_dev->char_dev.name = "dbc"; + dbc_dev->char_dev.fops = &dbc_fops; + dbc_dev->char_dev.mode = 0600; + ret = misc_register(&dbc_dev->char_dev); + if (ret) + goto cleanup_mbox; + + mutex_init(&dbc_dev->ioctl_mutex); + + return 0; + +cleanup_mbox: + devm_free_pages(dev, (unsigned long)dbc_dev->mbox); + +cleanup_dev: + psp->dbc_data = NULL; + devm_kfree(dev, dbc_dev); + + return ret; +} diff --git a/drivers/crypto/ccp/dbc.h b/drivers/crypto/ccp/dbc.h new file mode 100644 index 000000000000..1c3a0a078d15 --- /dev/null +++ b/drivers/crypto/ccp/dbc.h @@ -0,0 +1,44 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * AMD Platform Security Processor (PSP) Dynamic Boost Control support + * + * Copyright (C) 2023 Advanced Micro Devices, Inc. + * + * Author: Mario Limonciello + */ + +#ifndef __DBC_H__ +#define __DBC_H__ + +#include + +#include +#include +#include + +#include "psp-dev.h" + +struct psp_dbc_device { + struct device *dev; + + union dbc_buffer *mbox; + + struct mutex ioctl_mutex; + + struct miscdevice char_dev; +}; + +struct dbc_nonce { + struct psp_req_buffer_hdr header; + struct dbc_user_nonce user; +} __packed; + +union dbc_buffer { + struct psp_request req; + struct dbc_nonce dbc_nonce; +}; + +void dbc_dev_destroy(struct psp_device *psp); +int dbc_dev_init(struct psp_device *psp); + +#endif /* __DBC_H */ diff --git a/drivers/crypto/ccp/psp-dev.c b/drivers/crypto/ccp/psp-dev.c index 3390f0bd6408..d42d7bc62352 100644 --- a/drivers/crypto/ccp/psp-dev.c +++ b/drivers/crypto/ccp/psp-dev.c @@ -15,6 +15,7 @@ #include "sev-dev.h" #include "tee-dev.h" #include "platform-access.h" +#include "dbc.h" struct psp_device *psp_master; @@ -112,6 +113,12 @@ static void psp_init_platform_access(struct psp_device *psp) dev_warn(psp->dev, "platform access init failed: %d\n", ret); return; } + + /* dbc must come after platform access as it tests the feature */ + ret = dbc_dev_init(psp); + if (ret) + dev_warn(psp->dev, "failed to init dynamic boost control: %d\n", + ret); } static int psp_init(struct psp_device *psp) @@ -217,6 +224,8 @@ void psp_dev_destroy(struct sp_device *sp) tee_dev_destroy(psp); + dbc_dev_destroy(psp); + platform_access_dev_destroy(psp); sp_free_psp_irq(sp, psp); diff --git a/drivers/crypto/ccp/psp-dev.h b/drivers/crypto/ccp/psp-dev.h index 505e4bdeaca8..8a4de69399c5 100644 --- a/drivers/crypto/ccp/psp-dev.h +++ b/drivers/crypto/ccp/psp-dev.h @@ -40,6 +40,7 @@ struct psp_device { void *sev_data; void *tee_data; void *platform_access_data; + void *dbc_data; unsigned int capability; }; diff --git a/drivers/crypto/ccp/sp-dev.h b/drivers/crypto/ccp/sp-dev.h index 76c32ee6bd65..2329ad524b49 100644 --- a/drivers/crypto/ccp/sp-dev.h +++ b/drivers/crypto/ccp/sp-dev.h @@ -28,6 +28,10 @@ #define CACHE_NONE 0x00 #define CACHE_WB_NO_ALLOC 0xb7 +#define PLATFORM_FEATURE_DBC 0x1 + +#define PSP_FEATURE(psp, feat) (psp->vdata && psp->vdata->platform_features & PLATFORM_FEATURE_##feat) + /* Structure to hold CCP device data */ struct ccp_device; struct ccp_vdata { @@ -71,6 +75,7 @@ struct psp_vdata { const unsigned int inten_reg; const unsigned int intsts_reg; const unsigned int bootloader_info_reg; + const unsigned int platform_features; }; /* Structure to hold SP device data */ diff --git a/drivers/crypto/ccp/sp-pci.c b/drivers/crypto/ccp/sp-pci.c index 205b93d229a9..b6ab56abeb68 100644 --- a/drivers/crypto/ccp/sp-pci.c +++ b/drivers/crypto/ccp/sp-pci.c @@ -470,6 +470,7 @@ static const struct psp_vdata pspv3 = { .feature_reg = 0x109fc, /* C2PMSG_63 */ .inten_reg = 0x10690, /* P2CMSG_INTEN */ .intsts_reg = 0x10694, /* P2CMSG_INTSTS */ + .platform_features = PLATFORM_FEATURE_DBC, }; static const struct psp_vdata pspv4 = { diff --git a/include/linux/psp-platform-access.h b/include/linux/psp-platform-access.h index 75da8f5f7ad8..53b4a1df5180 100644 --- a/include/linux/psp-platform-access.h +++ b/include/linux/psp-platform-access.h @@ -8,6 +8,7 @@ enum psp_platform_access_msg { PSP_CMD_NONE = 0x0, PSP_I2C_REQ_BUS_CMD = 0x64, + PSP_DYNAMIC_BOOST_GET_NONCE, }; struct psp_req_buffer_hdr { diff --git a/include/uapi/linux/psp-dbc.h b/include/uapi/linux/psp-dbc.h new file mode 100644 index 000000000000..d032f78934e2 --- /dev/null +++ b/include/uapi/linux/psp-dbc.h @@ -0,0 +1,67 @@ +/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */ +/* + * Userspace interface for AMD Dynamic Boost Control (DBC) + * + * Copyright (C) 2023 Advanced Micro Devices, Inc. + * + * Author: Mario Limonciello + */ + +#ifndef __PSP_DBC_USER_H__ +#define __PSP_DBC_USER_H__ + +#include + +/** + * DOC: AMD Dynamic Boost Control (DBC) interface + */ + +#define DBC_NONCE_SIZE 16 +#define DBC_SIG_SIZE 32 + +/** + * struct dbc_user_nonce - Nonce exchange structure (input/output). + * @auth_needed: Whether the PSP should authenticate this request (input). + * 0: no authentication, PSP will return single use nonce. + * 1: authentication: PSP will return multi-use nonce. + * @nonce: 8 byte value used for future authentication (output). + * @signature: Optional 32 byte signature created by software using a + * previous nonce (input). + */ +struct dbc_user_nonce { + __u32 auth_needed; + __u8 nonce[DBC_NONCE_SIZE]; + __u8 signature[DBC_SIG_SIZE]; +} __packed; + +/** + * Dynamic Boost Control (DBC) IOC + * + * possible return codes for all DBC IOCTLs: + * 0: success + * -EINVAL: invalid input + * -E2BIG: excess data passed + * -EFAULT: failed to copy to/from userspace + * -EBUSY: mailbox in recovery or in use + * -ENODEV: driver not bound with PSP device + * -EACCES: request isn't authorized + * -EINVAL: invalid parameter + * -ETIMEDOUT: request timed out + * -EAGAIN: invalid request for state machine + * -ENOENT: not implemented + * -ENFILE: overflow + * -EPERM: invalid signature + * -EIO: unknown error + */ +#define DBC_IOC_TYPE 'D' + +/** + * DBCIOCNONCE - Fetch a nonce from the PSP for authenticating commands. + * If a nonce is fetched without authentication it can only + * be utilized for one command. + * If a nonce is fetched with authentication it can be used + * for multiple requests. + */ +#define DBCIOCNONCE _IOWR(DBC_IOC_TYPE, 0x1, struct dbc_user_nonce) + +#endif /* __PSP_DBC_USER_H__ */ From d9408716d2126439fbc46f6c40e72792069b8411 Mon Sep 17 00:00:00 2001 From: Mario Limonciello Date: Fri, 23 Jun 2023 08:49:56 -0500 Subject: [PATCH 110/656] crypto: ccp - Add support for setting user ID for dynamic boost control As part of the authentication flow for Dynamic Boost Control, the calling software will need to send a uid used in all of its future communications. Add support for another IOCTL call to let userspace software set this up. Acked-by: Tom Lendacky Signed-off-by: Mario Limonciello Signed-off-by: Herbert Xu --- drivers/crypto/ccp/dbc.c | 18 ++++++++++++++++++ drivers/crypto/ccp/dbc.h | 6 ++++++ include/linux/psp-platform-access.h | 1 + include/uapi/linux/psp-dbc.h | 20 ++++++++++++++++++++ 4 files changed, 45 insertions(+) diff --git a/drivers/crypto/ccp/dbc.c b/drivers/crypto/ccp/dbc.c index f65e93a81e53..c6f5fb3658ca 100644 --- a/drivers/crypto/ccp/dbc.c +++ b/drivers/crypto/ccp/dbc.c @@ -117,6 +117,24 @@ static long dbc_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) goto unlock; } break; + case DBCIOCUID: + dbc_dev->mbox->req.header.payload_size = sizeof(dbc_dev->mbox->dbc_set_uid); + if (copy_from_user(&dbc_dev->mbox->dbc_set_uid.user, argp, + sizeof(struct dbc_user_setuid))) { + ret = -EFAULT; + goto unlock; + } + + ret = send_dbc_cmd(dbc_dev, PSP_DYNAMIC_BOOST_SET_UID); + if (ret) + goto unlock; + + if (copy_to_user(argp, &dbc_dev->mbox->dbc_set_uid.user, + sizeof(struct dbc_user_setuid))) { + ret = -EFAULT; + goto unlock; + } + break; default: ret = -EINVAL; diff --git a/drivers/crypto/ccp/dbc.h b/drivers/crypto/ccp/dbc.h index 1c3a0a078d15..156435100076 100644 --- a/drivers/crypto/ccp/dbc.h +++ b/drivers/crypto/ccp/dbc.h @@ -33,9 +33,15 @@ struct dbc_nonce { struct dbc_user_nonce user; } __packed; +struct dbc_set_uid { + struct psp_req_buffer_hdr header; + struct dbc_user_setuid user; +} __packed; + union dbc_buffer { struct psp_request req; struct dbc_nonce dbc_nonce; + struct dbc_set_uid dbc_set_uid; }; void dbc_dev_destroy(struct psp_device *psp); diff --git a/include/linux/psp-platform-access.h b/include/linux/psp-platform-access.h index 53b4a1df5180..18b9e0f0cb03 100644 --- a/include/linux/psp-platform-access.h +++ b/include/linux/psp-platform-access.h @@ -9,6 +9,7 @@ enum psp_platform_access_msg { PSP_CMD_NONE = 0x0, PSP_I2C_REQ_BUS_CMD = 0x64, PSP_DYNAMIC_BOOST_GET_NONCE, + PSP_DYNAMIC_BOOST_SET_UID, }; struct psp_req_buffer_hdr { diff --git a/include/uapi/linux/psp-dbc.h b/include/uapi/linux/psp-dbc.h index d032f78934e2..7443c78ede19 100644 --- a/include/uapi/linux/psp-dbc.h +++ b/include/uapi/linux/psp-dbc.h @@ -18,6 +18,7 @@ #define DBC_NONCE_SIZE 16 #define DBC_SIG_SIZE 32 +#define DBC_UID_SIZE 16 /** * struct dbc_user_nonce - Nonce exchange structure (input/output). @@ -34,6 +35,16 @@ struct dbc_user_nonce { __u8 signature[DBC_SIG_SIZE]; } __packed; +/** + * struct dbc_user_setuid - UID exchange structure (input). + * @uid: 16 byte value representing software identity + * @signature: 32 byte signature created by software using a previous nonce + */ +struct dbc_user_setuid { + __u8 uid[DBC_UID_SIZE]; + __u8 signature[DBC_SIG_SIZE]; +} __packed; + /** * Dynamic Boost Control (DBC) IOC * @@ -64,4 +75,13 @@ struct dbc_user_nonce { */ #define DBCIOCNONCE _IOWR(DBC_IOC_TYPE, 0x1, struct dbc_user_nonce) +/** + * DBCIOCUID - Set the user ID (UID) of a calling process. + * The user ID is 8 bytes long. It must be programmed using a + * 32 byte signature built using the nonce fetched from + * DBCIOCNONCE. + * The UID can only be set once until the system is rebooted. + */ +#define DBCIOCUID _IOW(DBC_IOC_TYPE, 0x2, struct dbc_user_setuid) + #endif /* __PSP_DBC_USER_H__ */ From e2cfe05e9277b5a7abbbc186fec1ad37348dd956 Mon Sep 17 00:00:00 2001 From: Mario Limonciello Date: Fri, 23 Jun 2023 08:49:57 -0500 Subject: [PATCH 111/656] crypto: ccp - Add support for getting and setting DBC parameters After software has authenticated a dynamic boost control request, it can fetch and set supported parameters using a selection of messages. Add support for these messages and export the ability to do this to userspace. Acked-by: Tom Lendacky Signed-off-by: Mario Limonciello Signed-off-by: Herbert Xu --- drivers/crypto/ccp/dbc.c | 41 ++++++++++++++++++++ drivers/crypto/ccp/dbc.h | 6 +++ include/linux/psp-platform-access.h | 2 + include/uapi/linux/psp-dbc.h | 60 +++++++++++++++++++++++++++++ 4 files changed, 109 insertions(+) diff --git a/drivers/crypto/ccp/dbc.c b/drivers/crypto/ccp/dbc.c index c6f5fb3658ca..839ea14b9a85 100644 --- a/drivers/crypto/ccp/dbc.c +++ b/drivers/crypto/ccp/dbc.c @@ -74,6 +74,30 @@ static int send_dbc_nonce(struct psp_dbc_device *dbc_dev) return ret; } +static int send_dbc_parameter(struct psp_dbc_device *dbc_dev) +{ + dbc_dev->mbox->req.header.payload_size = sizeof(dbc_dev->mbox->dbc_param); + + switch (dbc_dev->mbox->dbc_param.user.msg_index) { + case PARAM_SET_FMAX_CAP: + case PARAM_SET_PWR_CAP: + case PARAM_SET_GFX_MODE: + return send_dbc_cmd(dbc_dev, PSP_DYNAMIC_BOOST_SET_PARAMETER); + case PARAM_GET_FMAX_CAP: + case PARAM_GET_PWR_CAP: + case PARAM_GET_CURR_TEMP: + case PARAM_GET_FMAX_MAX: + case PARAM_GET_FMAX_MIN: + case PARAM_GET_SOC_PWR_MAX: + case PARAM_GET_SOC_PWR_MIN: + case PARAM_GET_SOC_PWR_CUR: + case PARAM_GET_GFX_MODE: + return send_dbc_cmd(dbc_dev, PSP_DYNAMIC_BOOST_GET_PARAMETER); + } + + return -EINVAL; +} + void dbc_dev_destroy(struct psp_device *psp) { struct psp_dbc_device *dbc_dev = psp->dbc_data; @@ -135,6 +159,23 @@ static long dbc_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) goto unlock; } break; + case DBCIOCPARAM: + if (copy_from_user(&dbc_dev->mbox->dbc_param.user, argp, + sizeof(struct dbc_user_param))) { + ret = -EFAULT; + goto unlock; + } + + ret = send_dbc_parameter(dbc_dev); + if (ret) + goto unlock; + + if (copy_to_user(argp, &dbc_dev->mbox->dbc_param.user, + sizeof(struct dbc_user_param))) { + ret = -EFAULT; + goto unlock; + } + break; default: ret = -EINVAL; diff --git a/drivers/crypto/ccp/dbc.h b/drivers/crypto/ccp/dbc.h index 156435100076..e963099ca38e 100644 --- a/drivers/crypto/ccp/dbc.h +++ b/drivers/crypto/ccp/dbc.h @@ -38,10 +38,16 @@ struct dbc_set_uid { struct dbc_user_setuid user; } __packed; +struct dbc_param { + struct psp_req_buffer_hdr header; + struct dbc_user_param user; +} __packed; + union dbc_buffer { struct psp_request req; struct dbc_nonce dbc_nonce; struct dbc_set_uid dbc_set_uid; + struct dbc_param dbc_param; }; void dbc_dev_destroy(struct psp_device *psp); diff --git a/include/linux/psp-platform-access.h b/include/linux/psp-platform-access.h index 18b9e0f0cb03..c1dc87fc536b 100644 --- a/include/linux/psp-platform-access.h +++ b/include/linux/psp-platform-access.h @@ -10,6 +10,8 @@ enum psp_platform_access_msg { PSP_I2C_REQ_BUS_CMD = 0x64, PSP_DYNAMIC_BOOST_GET_NONCE, PSP_DYNAMIC_BOOST_SET_UID, + PSP_DYNAMIC_BOOST_GET_PARAMETER, + PSP_DYNAMIC_BOOST_SET_PARAMETER, }; struct psp_req_buffer_hdr { diff --git a/include/uapi/linux/psp-dbc.h b/include/uapi/linux/psp-dbc.h index 7443c78ede19..b3845a9ff5fd 100644 --- a/include/uapi/linux/psp-dbc.h +++ b/include/uapi/linux/psp-dbc.h @@ -45,6 +45,23 @@ struct dbc_user_setuid { __u8 signature[DBC_SIG_SIZE]; } __packed; +/** + * struct dbc_user_param - Parameter exchange structure (input/output). + * @msg_index: Message indicating what parameter to set or get (input) + * @param: 4 byte parameter, units are message specific. (input/output) + * @signature: 32 byte signature. + * - When sending a message this is to be created by software + * using a previous nonce (input) + * - For interpreting results, this signature is updated by the + * PSP to allow software to validate the authenticity of the + * results. + */ +struct dbc_user_param { + __u32 msg_index; + __u32 param; + __u8 signature[DBC_SIG_SIZE]; +} __packed; + /** * Dynamic Boost Control (DBC) IOC * @@ -84,4 +101,47 @@ struct dbc_user_setuid { */ #define DBCIOCUID _IOW(DBC_IOC_TYPE, 0x2, struct dbc_user_setuid) +/** + * DBCIOCPARAM - Set or get a parameter from the PSP. + * This request will only work after DBCIOCUID has successfully + * set the UID of the calling process. + * Whether the parameter is set or get is controlled by the + * message ID in the request. + * This command must be sent using a 32 byte signature built + * using the nonce fetched from DBCIOCNONCE. + * When the command succeeds, the 32 byte signature will be + * updated by the PSP for software to authenticate the results. + */ +#define DBCIOCPARAM _IOWR(DBC_IOC_TYPE, 0x3, struct dbc_user_param) + +/** + * enum dbc_cmd_msg - Messages utilized by DBCIOCPARAM + * @PARAM_GET_FMAX_CAP: Get frequency cap (MHz) + * @PARAM_SET_FMAX_CAP: Set frequency cap (MHz) + * @PARAM_GET_PWR_CAP: Get socket power cap (mW) + * @PARAM_SET_PWR_CAP: Set socket power cap (mW) + * @PARAM_GET_GFX_MODE: Get graphics mode (0/1) + * @PARAM_SET_GFX_MODE: Set graphics mode (0/1) + * @PARAM_GET_CURR_TEMP: Get current temperature (degrees C) + * @PARAM_GET_FMAX_MAX: Get maximum allowed value for frequency (MHz) + * @PARAM_GET_FMAX_MIN: Get minimum allowed value for frequency (MHz) + * @PARAM_GET_SOC_PWR_MAX: Get maximum allowed value for SoC power (mw) + * @PARAM_GET_SOC_PWR_MIN: Get minimum allowed value for SoC power (mw) + * @PARAM_GET_SOC_PWR_CUR: Get current value for SoC Power (mW) + */ +enum dbc_cmd_msg { + PARAM_GET_FMAX_CAP = 0x3, + PARAM_SET_FMAX_CAP = 0x4, + PARAM_GET_PWR_CAP = 0x5, + PARAM_SET_PWR_CAP = 0x6, + PARAM_GET_GFX_MODE = 0x7, + PARAM_SET_GFX_MODE = 0x8, + PARAM_GET_CURR_TEMP = 0x9, + PARAM_GET_FMAX_MAX = 0xA, + PARAM_GET_FMAX_MIN = 0xB, + PARAM_GET_SOC_PWR_MAX = 0xC, + PARAM_GET_SOC_PWR_MIN = 0xD, + PARAM_GET_SOC_PWR_CUR = 0xE, +}; + #endif /* __PSP_DBC_USER_H__ */ From febe3ed3222f92672d3e0471893aa8ab23275c28 Mon Sep 17 00:00:00 2001 From: Mario Limonciello Date: Fri, 23 Jun 2023 08:49:58 -0500 Subject: [PATCH 112/656] crypto: ccp - Add a sample library for ioctl use Add a small shared library that demonstrates the usage of the IOCTL interface. This library can be linked to but, is intended to be loaded and used by higher level languages Acked-by: Tom Lendacky Signed-off-by: Mario Limonciello Signed-off-by: Herbert Xu --- tools/crypto/ccp/Makefile | 13 +++++++ tools/crypto/ccp/dbc.c | 72 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 85 insertions(+) create mode 100644 tools/crypto/ccp/Makefile create mode 100644 tools/crypto/ccp/dbc.c diff --git a/tools/crypto/ccp/Makefile b/tools/crypto/ccp/Makefile new file mode 100644 index 000000000000..ae4a66d1558a --- /dev/null +++ b/tools/crypto/ccp/Makefile @@ -0,0 +1,13 @@ +# SPDX-License-Identifier: GPL-2.0-only +CFLAGS += -D__EXPORTED_HEADERS__ -I../../../include/uapi -I../../../include + +TARGET = dbc_library.so + +all: $(TARGET) + +dbc_library.so: dbc.c + $(CC) $(CFLAGS) $(LDFLAGS) -shared -o $@ $< + chmod -x $@ + +clean: + $(RM) $(TARGET) diff --git a/tools/crypto/ccp/dbc.c b/tools/crypto/ccp/dbc.c new file mode 100644 index 000000000000..37e813175642 --- /dev/null +++ b/tools/crypto/ccp/dbc.c @@ -0,0 +1,72 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * AMD Secure Processor Dynamic Boost Control sample library + * + * Copyright (C) 2023 Advanced Micro Devices, Inc. + * + * Author: Mario Limonciello + */ + +#include +#include +#include + +/* if uapi header isn't installed, this might not yet exist */ +#ifndef __packed +#define __packed __attribute__((packed)) +#endif +#include + +int get_nonce(int fd, void *nonce_out, void *signature) +{ + struct dbc_user_nonce tmp = { + .auth_needed = !!signature, + }; + int ret; + + assert(nonce_out); + + if (signature) + memcpy(tmp.signature, signature, sizeof(tmp.signature)); + + ret = ioctl(fd, DBCIOCNONCE, &tmp); + if (ret) + return ret; + memcpy(nonce_out, tmp.nonce, sizeof(tmp.nonce)); + + return 0; +} + +int set_uid(int fd, __u8 *uid, __u8 *signature) +{ + struct dbc_user_setuid tmp; + + assert(uid); + assert(signature); + + memcpy(tmp.uid, uid, sizeof(tmp.uid)); + memcpy(tmp.signature, signature, sizeof(tmp.signature)); + + return ioctl(fd, DBCIOCUID, &tmp); +} + +int process_param(int fd, int msg_index, __u8 *signature, int *data) +{ + struct dbc_user_param tmp = { + .msg_index = msg_index, + .param = *data, + }; + int ret; + + assert(signature); + assert(data); + + memcpy(tmp.signature, signature, sizeof(tmp.signature)); + + ret = ioctl(fd, DBCIOCPARAM, &tmp); + if (ret) + return ret; + + *data = tmp.param; + return 0; +} From f40d42f116cf965a9e37e2991f19ca1b5b156210 Mon Sep 17 00:00:00 2001 From: Mario Limonciello Date: Fri, 23 Jun 2023 08:49:59 -0500 Subject: [PATCH 113/656] crypto: ccp - Add a sample python script for Dynamic Boost Control Dynamic Boost Control commands are triggered by userspace with an IOCTL interface that userspace will prepare proper buffers for a request. To allow prototyping and testing this interface, add a python3 command line script that loads the dbc_library.so for utilizing the IOCTLs. The signature to use and UID are passed as arguments to this script. Acked-by: Tom Lendacky Signed-off-by: Mario Limonciello Signed-off-by: Herbert Xu --- tools/crypto/ccp/.gitignore | 1 + tools/crypto/ccp/dbc.py | 64 +++++++++++++++++ tools/crypto/ccp/dbc_cli.py | 134 ++++++++++++++++++++++++++++++++++++ 3 files changed, 199 insertions(+) create mode 100644 tools/crypto/ccp/.gitignore create mode 100644 tools/crypto/ccp/dbc.py create mode 100755 tools/crypto/ccp/dbc_cli.py diff --git a/tools/crypto/ccp/.gitignore b/tools/crypto/ccp/.gitignore new file mode 100644 index 000000000000..bee8a64b79a9 --- /dev/null +++ b/tools/crypto/ccp/.gitignore @@ -0,0 +1 @@ +__pycache__ diff --git a/tools/crypto/ccp/dbc.py b/tools/crypto/ccp/dbc.py new file mode 100644 index 000000000000..3f6a825ffc9e --- /dev/null +++ b/tools/crypto/ccp/dbc.py @@ -0,0 +1,64 @@ +#!/usr/bin/python3 +# SPDX-License-Identifier: GPL-2.0 + +import ctypes +import os + +DBC_UID_SIZE = 16 +DBC_NONCE_SIZE = 16 +DBC_SIG_SIZE = 32 + +PARAM_GET_FMAX_CAP = (0x3,) +PARAM_SET_FMAX_CAP = (0x4,) +PARAM_GET_PWR_CAP = (0x5,) +PARAM_SET_PWR_CAP = (0x6,) +PARAM_GET_GFX_MODE = (0x7,) +PARAM_SET_GFX_MODE = (0x8,) +PARAM_GET_CURR_TEMP = (0x9,) +PARAM_GET_FMAX_MAX = (0xA,) +PARAM_GET_FMAX_MIN = (0xB,) +PARAM_GET_SOC_PWR_MAX = (0xC,) +PARAM_GET_SOC_PWR_MIN = (0xD,) +PARAM_GET_SOC_PWR_CUR = (0xE,) + +DEVICE_NODE = "/dev/dbc" + +lib = ctypes.CDLL("./dbc_library.so", mode=ctypes.RTLD_GLOBAL) + + +def handle_error(code): + val = code * -1 + raise OSError(val, os.strerror(val)) + + +def get_nonce(device, signature): + if not device: + raise ValueError("Device required") + buf = ctypes.create_string_buffer(DBC_NONCE_SIZE) + ret = lib.get_nonce(device.fileno(), ctypes.byref(buf), signature) + if ret: + handle_error(ret) + return buf.value + + +def set_uid(device, new_uid, signature): + if not signature: + raise ValueError("Signature required") + if not new_uid: + raise ValueError("UID required") + ret = lib.set_uid(device.fileno(), new_uid, signature) + if ret: + handle_error(ret) + return True + + +def process_param(device, message, signature, data=None): + if not signature: + raise ValueError("Signature required") + if type(message) != tuple: + raise ValueError("Expected message tuple") + arg = ctypes.c_int(data if data else 0) + ret = lib.process_param(device.fileno(), message[0], signature, ctypes.pointer(arg)) + if ret: + handle_error(ret) + return arg, signature diff --git a/tools/crypto/ccp/dbc_cli.py b/tools/crypto/ccp/dbc_cli.py new file mode 100755 index 000000000000..bf52233fd038 --- /dev/null +++ b/tools/crypto/ccp/dbc_cli.py @@ -0,0 +1,134 @@ +#!/usr/bin/python3 +# SPDX-License-Identifier: GPL-2.0 +import argparse +import binascii +import os +import errno +from dbc import * + +ERRORS = { + errno.EACCES: "Access is denied", + errno.E2BIG: "Excess data provided", + errno.EINVAL: "Bad parameters", + errno.EAGAIN: "Bad state", + errno.ENOENT: "Not implemented or message failure", + errno.EBUSY: "Busy", + errno.ENFILE: "Overflow", + errno.EPERM: "Signature invalid", +} + +messages = { + "get-fmax-cap": PARAM_GET_FMAX_CAP, + "set-fmax-cap": PARAM_SET_FMAX_CAP, + "get-power-cap": PARAM_GET_PWR_CAP, + "set-power-cap": PARAM_SET_PWR_CAP, + "get-graphics-mode": PARAM_GET_GFX_MODE, + "set-graphics-mode": PARAM_SET_GFX_MODE, + "get-current-temp": PARAM_GET_CURR_TEMP, + "get-fmax-max": PARAM_GET_FMAX_MAX, + "get-fmax-min": PARAM_GET_FMAX_MIN, + "get-soc-power-max": PARAM_GET_SOC_PWR_MAX, + "get-soc-power-min": PARAM_GET_SOC_PWR_MIN, + "get-soc-power-cur": PARAM_GET_SOC_PWR_CUR, +} + + +def _pretty_buffer(ba): + return str(binascii.hexlify(ba, " ")) + + +def parse_args(): + parser = argparse.ArgumentParser( + description="Dynamic Boost control command line interface" + ) + parser.add_argument( + "command", + choices=["get-nonce", "get-param", "set-param", "set-uid"], + help="Command to send", + ) + parser.add_argument("--device", default="/dev/dbc", help="Device to operate") + parser.add_argument("--signature", help="File containing signature for command") + parser.add_argument("--message", choices=messages.keys(), help="Message index") + parser.add_argument("--data", help="Argument to pass to message") + parser.add_argument("--uid", help="File containing UID to pass") + return parser.parse_args() + + +def pretty_error(code): + if code in ERRORS: + print(ERRORS[code]) + else: + print("failed with return code %d" % code) + + +if __name__ == "__main__": + args = parse_args() + data = 0 + sig = None + uid = None + if not os.path.exists(args.device): + raise IOError("Missing device {device}".format(device=args.device)) + if args.signature: + if not os.path.exists(args.signature): + raise ValueError("Invalid signature file %s" % args.signature) + with open(args.signature, "rb") as f: + sig = f.read() + if len(sig) != DBC_SIG_SIZE: + raise ValueError( + "Invalid signature length %d (expected %d)" % (len(sig), DBC_SIG_SIZE) + ) + if args.uid: + if not os.path.exists(args.uid): + raise ValueError("Invalid uid file %s" % args.uid) + with open(args.uid, "rb") as f: + uid = f.read() + if len(uid) != DBC_UID_SIZE: + raise ValueError( + "Invalid UID length %d (expected %d)" % (len(uid), DBC_UID_SIZE) + ) + if args.data: + try: + data = int(args.data, 10) + except ValueError: + data = int(args.data, 16) + + with open(args.device) as d: + if args.command == "get-nonce": + try: + nonce = get_nonce(d, sig) + print("Nonce: %s" % _pretty_buffer(bytes(nonce))) + except OSError as e: + pretty_error(e.errno) + elif args.command == "set-uid": + try: + result = set_uid(d, uid, sig) + if result: + print("Set UID") + except OSError as e: + pretty_error(e.errno) + elif args.command == "get-param": + if not args.message or args.message.startswith("set"): + raise ValueError("Invalid message %s" % args.message) + try: + param, signature = process_param(d, messages[args.message], sig) + print( + "Parameter: {par}, response signature {sig}".format( + par=param, + sig=_pretty_buffer(bytes(signature)), + ) + ) + except OSError as e: + pretty_error(e.errno) + elif args.command == "set-param": + if not args.message or args.message.startswith("get"): + raise ValueError("Invalid message %s" % args.message) + try: + param, signature = process_param(d, messages[args.message], sig, data) + print( + "Parameter: {par}, response signature {sig}".format( + par=param, + sig=_pretty_buffer(bytes(signature)), + ) + ) + except OSError as e: + pretty_error(e.errno) From 15f8aa7bb3e550278aa561e81b2e72ffa8e442b7 Mon Sep 17 00:00:00 2001 From: Mario Limonciello Date: Fri, 23 Jun 2023 08:50:00 -0500 Subject: [PATCH 114/656] crypto: ccp - Add unit tests for dynamic boost control Interacting with dynamic boost control messages requires the caller to supply a signature. To allow validation of individual dynamic boost control components, introduce a set of tests that can be run. The tests can be run in 3 distinct different environments, and so certain tests will be skipped depending on the environment. 1. Systems that do not support DBC. 2. Production systems that support DBC but are secured silicon. 3. Pre-production systems that support DBC but are unsecured silicon. Unsecured silicon does not validate the signature, and so this allows testing more of the state machine and functionality. Acked-by: Tom Lendacky Signed-off-by: Mario Limonciello Signed-off-by: Herbert Xu --- tools/crypto/ccp/test_dbc.py | 266 +++++++++++++++++++++++++++++++++++ 1 file changed, 266 insertions(+) create mode 100755 tools/crypto/ccp/test_dbc.py diff --git a/tools/crypto/ccp/test_dbc.py b/tools/crypto/ccp/test_dbc.py new file mode 100755 index 000000000000..998bb3e3cd04 --- /dev/null +++ b/tools/crypto/ccp/test_dbc.py @@ -0,0 +1,266 @@ +#!/usr/bin/python3 +# SPDX-License-Identifier: GPL-2.0 +import unittest +import os +import time +import glob +from dbc import * + +# Artificial delay between set commands +SET_DELAY = 0.5 + + +class invalid_param(ctypes.Structure): + _fields_ = [ + ("data", ctypes.c_uint8), + ] + + +def system_is_secured() -> bool: + fused_part = glob.glob("/sys/bus/pci/drivers/ccp/**/fused_part")[0] + if os.path.exists(fused_part): + with open(fused_part, "r") as r: + return int(r.read()) == 1 + return True + + +class DynamicBoostControlTest(unittest.TestCase): + def __init__(self, data) -> None: + self.d = None + self.signature = "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF" + self.uid = "1111111111111111" + super().__init__(data) + + def setUp(self) -> None: + self.d = open(DEVICE_NODE) + return super().setUp() + + def tearDown(self) -> None: + if self.d: + self.d.close() + return super().tearDown() + + +class TestUnsupportedSystem(DynamicBoostControlTest): + def setUp(self) -> None: + if os.path.exists(DEVICE_NODE): + self.skipTest("system is supported") + with self.assertRaises(FileNotFoundError) as error: + super().setUp() + self.assertEqual(error.exception.errno, 2) + + def test_unauthenticated_nonce(self) -> None: + """fetch unauthenticated nonce""" + with self.assertRaises(ValueError) as error: + get_nonce(self.d, None) + + +class TestInvalidIoctls(DynamicBoostControlTest): + def __init__(self, data) -> None: + self.data = invalid_param() + self.data.data = 1 + super().__init__(data) + + def setUp(self) -> None: + if not os.path.exists(DEVICE_NODE): + self.skipTest("system is unsupported") + return super().setUp() + + def test_invalid_nonce_ioctl(self) -> None: + """tries to call get_nonce ioctl with invalid data structures""" + + # 0x1 (get nonce), and invalid data + INVALID1 = IOWR(ord("D"), 0x01, invalid_param) + with self.assertRaises(OSError) as error: + fcntl.ioctl(self.d, INVALID1, self.data, True) + self.assertEqual(error.exception.errno, 22) + + def test_invalid_setuid_ioctl(self) -> None: + """tries to call set_uid ioctl with invalid data structures""" + + # 0x2 (set uid), and invalid data + INVALID2 = IOW(ord("D"), 0x02, invalid_param) + with self.assertRaises(OSError) as error: + fcntl.ioctl(self.d, INVALID2, self.data, True) + self.assertEqual(error.exception.errno, 22) + + def test_invalid_setuid_rw_ioctl(self) -> None: + """tries to call set_uid ioctl with invalid data structures""" + + # 0x2 as RW (set uid), and invalid data + INVALID3 = IOWR(ord("D"), 0x02, invalid_param) + with self.assertRaises(OSError) as error: + fcntl.ioctl(self.d, INVALID3, self.data, True) + self.assertEqual(error.exception.errno, 22) + + def test_invalid_param_ioctl(self) -> None: + """tries to call param ioctl with invalid data structures""" + # 0x3 (param), and invalid data + INVALID4 = IOWR(ord("D"), 0x03, invalid_param) + with self.assertRaises(OSError) as error: + fcntl.ioctl(self.d, INVALID4, self.data, True) + self.assertEqual(error.exception.errno, 22) + + def test_invalid_call_ioctl(self) -> None: + """tries to call the DBC ioctl with invalid data structures""" + # 0x4, and invalid data + INVALID5 = IOWR(ord("D"), 0x04, invalid_param) + with self.assertRaises(OSError) as error: + fcntl.ioctl(self.d, INVALID5, self.data, True) + self.assertEqual(error.exception.errno, 22) + + +class TestInvalidSignature(DynamicBoostControlTest): + def setUp(self) -> None: + if not os.path.exists(DEVICE_NODE): + self.skipTest("system is unsupported") + if not system_is_secured(): + self.skipTest("system is unfused") + return super().setUp() + + def test_unauthenticated_nonce(self) -> None: + """fetch unauthenticated nonce""" + get_nonce(self.d, None) + + def test_multiple_unauthenticated_nonce(self) -> None: + """ensure state machine always returns nonce""" + for count in range(0, 2): + get_nonce(self.d, None) + + def test_authenticated_nonce(self) -> None: + """fetch authenticated nonce""" + with self.assertRaises(OSError) as error: + get_nonce(self.d, self.signature) + self.assertEqual(error.exception.errno, 1) + + def test_set_uid(self) -> None: + """set uid""" + with self.assertRaises(OSError) as error: + set_uid(self.d, self.uid, self.signature) + self.assertEqual(error.exception.errno, 1) + + def test_get_param(self) -> None: + """fetch a parameter""" + with self.assertRaises(OSError) as error: + process_param(self.d, PARAM_GET_SOC_PWR_CUR, self.signature) + self.assertEqual(error.exception.errno, 1) + + def test_set_param(self) -> None: + """set a parameter""" + with self.assertRaises(OSError) as error: + process_param(self.d, PARAM_SET_PWR_CAP, self.signature, 1000) + self.assertEqual(error.exception.errno, 1) + + +class TestUnFusedSystem(DynamicBoostControlTest): + def setup_identity(self) -> None: + """sets up the identity of the caller""" + # if already authenticated these may fail + try: + get_nonce(self.d, None) + except PermissionError: + pass + try: + set_uid(self.d, self.uid, self.signature) + except BlockingIOError: + pass + try: + get_nonce(self.d, self.signature) + except PermissionError: + pass + + def setUp(self) -> None: + if not os.path.exists(DEVICE_NODE): + self.skipTest("system is unsupported") + if system_is_secured(): + self.skipTest("system is fused") + super().setUp() + self.setup_identity() + time.sleep(SET_DELAY) + + def test_get_valid_param(self) -> None: + """fetch all possible parameters""" + # SOC power + soc_power_max = process_param(self.d, PARAM_GET_SOC_PWR_MAX, self.signature) + soc_power_min = process_param(self.d, PARAM_GET_SOC_PWR_MIN, self.signature) + self.assertGreater(soc_power_max.parameter, soc_power_min.parameter) + + # fmax + fmax_max = process_param(self.d, PARAM_GET_FMAX_MAX, self.signature) + fmax_min = process_param(self.d, PARAM_GET_FMAX_MIN, self.signature) + self.assertGreater(fmax_max.parameter, fmax_min.parameter) + + # cap values + keys = { + "fmax-cap": PARAM_GET_FMAX_CAP, + "power-cap": PARAM_GET_PWR_CAP, + "current-temp": PARAM_GET_CURR_TEMP, + "soc-power-cur": PARAM_GET_SOC_PWR_CUR, + } + for k in keys: + result = process_param(self.d, keys[k], self.signature) + self.assertGreater(result.parameter, 0) + + def test_get_invalid_param(self) -> None: + """fetch an invalid parameter""" + try: + set_uid(self.d, self.uid, self.signature) + except OSError: + pass + with self.assertRaises(OSError) as error: + process_param(self.d, (0xF,), self.signature) + self.assertEqual(error.exception.errno, 22) + + def test_set_fmax(self) -> None: + """get/set fmax limit""" + # fetch current + original = process_param(self.d, PARAM_GET_FMAX_CAP, self.signature) + + # set the fmax + target = original.parameter - 100 + process_param(self.d, PARAM_SET_FMAX_CAP, self.signature, target) + time.sleep(SET_DELAY) + new = process_param(self.d, PARAM_GET_FMAX_CAP, self.signature) + self.assertEqual(new.parameter, target) + + # revert back to current + process_param(self.d, PARAM_SET_FMAX_CAP, self.signature, original.parameter) + time.sleep(SET_DELAY) + cur = process_param(self.d, PARAM_GET_FMAX_CAP, self.signature) + self.assertEqual(cur.parameter, original.parameter) + + def test_set_power_cap(self) -> None: + """get/set power cap limit""" + # fetch current + original = process_param(self.d, PARAM_GET_PWR_CAP, self.signature) + + # set the fmax + target = original.parameter - 10 + process_param(self.d, PARAM_SET_PWR_CAP, self.signature, target) + time.sleep(SET_DELAY) + new = process_param(self.d, PARAM_GET_PWR_CAP, self.signature) + self.assertEqual(new.parameter, target) + + # revert back to current + process_param(self.d, PARAM_SET_PWR_CAP, self.signature, original.parameter) + time.sleep(SET_DELAY) + cur = process_param(self.d, PARAM_GET_PWR_CAP, self.signature) + self.assertEqual(cur.parameter, original.parameter) + + def test_set_3d_graphics_mode(self) -> None: + """set/get 3d graphics mode""" + # these aren't currently implemented but may be some day + # they are *expected* to fail + with self.assertRaises(OSError) as error: + process_param(self.d, PARAM_GET_GFX_MODE, self.signature) + self.assertEqual(error.exception.errno, 2) + + time.sleep(SET_DELAY) + + with self.assertRaises(OSError) as error: + process_param(self.d, PARAM_SET_GFX_MODE, self.signature, 1) + self.assertEqual(error.exception.errno, 2) + + +if __name__ == "__main__": + unittest.main() From 4b97d282235dd4d9bff1b6aa327350101bc79471 Mon Sep 17 00:00:00 2001 From: Mario Limonciello Date: Fri, 23 Jun 2023 08:50:01 -0500 Subject: [PATCH 115/656] crypto: ccp - Add Mario to MAINTAINERS I will maintain the platform access interface and dynamic boost control support. Acked-by: Tom Lendacky Signed-off-by: Mario Limonciello Signed-off-by: Herbert Xu --- MAINTAINERS | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 3be1bdfe8ecc..64602d4169d0 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -915,6 +915,18 @@ S: Supported F: drivers/crypto/ccp/sev* F: include/uapi/linux/psp-sev.h +AMD CRYPTOGRAPHIC COPROCESSOR (CCP) DRIVER - DBC SUPPORT +M: Mario Limonciello +L: linux-crypto@vger.kernel.org +S: Supported +F: drivers/crypto/ccp/dbc.c +F: drivers/crypto/ccp/dbc.h +F: drivers/crypto/ccp/platform-access.c +F: drivers/crypto/ccp/platform-access.h +F: include/uapi/linux/psp-dbc.h +F: tools/crypto/ccp/*.c +F: tools/crypto/ccp/*.py + AMD DISPLAY CORE M: Harry Wentland M: Leo Li From 20508b751b4bef2cda999fe0268071b0fc335ac7 Mon Sep 17 00:00:00 2001 From: Jiapeng Chong Date: Fri, 30 Jun 2023 15:54:24 +0800 Subject: [PATCH 116/656] crypto: sig - Remove some unused functions These functions are defined in the sig.c file, but not called elsewhere, so delete these unused functions. crypto/sig.c:24:34: warning: unused function '__crypto_sig_tfm'. Reported-by: Abaci Robot Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=5701 Signed-off-by: Jiapeng Chong Signed-off-by: Herbert Xu --- crypto/sig.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/crypto/sig.c b/crypto/sig.c index b48c18ec65cd..224c47019297 100644 --- a/crypto/sig.c +++ b/crypto/sig.c @@ -21,11 +21,6 @@ static const struct crypto_type crypto_sig_type; -static inline struct crypto_sig *__crypto_sig_tfm(struct crypto_tfm *tfm) -{ - return container_of(tfm, struct crypto_sig, base); -} - static int crypto_sig_init_tfm(struct crypto_tfm *tfm) { if (tfm->__crt_alg->cra_type != &crypto_sig_type) From 865b50fe6ea85b41354967df03c317eb1627cc13 Mon Sep 17 00:00:00 2001 From: Lucas Segarra Fernandez Date: Fri, 30 Jun 2023 17:32:07 +0200 Subject: [PATCH 117/656] crypto: qat - add fw_counters debugfs file Expose FW counters statistics by providing the "fw_counters" file under debugfs. Currently the statistics include the number of requests sent to the FW and the number of responses received from the FW for each Acceleration Engine, for all the QAT product line. This patch is based on earlier work done by Marco Chiappero. Co-developed-by: Adam Guerin Signed-off-by: Adam Guerin Signed-off-by: Lucas Segarra Fernandez Reviewed-by: Giovanni Cabiddu Reviewed-by: Andy Shevchenko Signed-off-by: Herbert Xu --- Documentation/ABI/testing/debugfs-driver-qat | 10 + drivers/crypto/intel/qat/qat_common/Makefile | 1 + .../intel/qat/qat_common/adf_accel_devices.h | 1 + .../crypto/intel/qat/qat_common/adf_admin.c | 18 ++ .../intel/qat/qat_common/adf_common_drv.h | 1 + .../crypto/intel/qat/qat_common/adf_dbgfs.c | 7 + .../intel/qat/qat_common/adf_fw_counters.c | 264 ++++++++++++++++++ .../intel/qat/qat_common/adf_fw_counters.h | 11 + 8 files changed, 313 insertions(+) create mode 100644 Documentation/ABI/testing/debugfs-driver-qat create mode 100644 drivers/crypto/intel/qat/qat_common/adf_fw_counters.c create mode 100644 drivers/crypto/intel/qat/qat_common/adf_fw_counters.h diff --git a/Documentation/ABI/testing/debugfs-driver-qat b/Documentation/ABI/testing/debugfs-driver-qat new file mode 100644 index 000000000000..22d39c0ca1b2 --- /dev/null +++ b/Documentation/ABI/testing/debugfs-driver-qat @@ -0,0 +1,10 @@ +What: /sys/kernel/debug/qat__/qat/fw_counters +Date: November 2023 +KernelVersion: 6.6 +Contact: qat-linux@intel.com +Description: (RO) Read returns the number of requests sent to the FW and the number of responses + received from the FW for each Acceleration Engine + Reported firmware counters:: + + : Number of requests sent from Acceleration Engine N to FW and responses + Acceleration Engine N received from FW diff --git a/drivers/crypto/intel/qat/qat_common/Makefile b/drivers/crypto/intel/qat/qat_common/Makefile index 38de3aba6e8c..f541046cdf9a 100644 --- a/drivers/crypto/intel/qat/qat_common/Makefile +++ b/drivers/crypto/intel/qat/qat_common/Makefile @@ -28,6 +28,7 @@ intel_qat-objs := adf_cfg.o \ qat_bl.o intel_qat-$(CONFIG_DEBUG_FS) += adf_transport_debug.o \ + adf_fw_counters.o \ adf_dbgfs.o intel_qat-$(CONFIG_PCI_IOV) += adf_sriov.o adf_vf_isr.o adf_pfvf_utils.o \ diff --git a/drivers/crypto/intel/qat/qat_common/adf_accel_devices.h b/drivers/crypto/intel/qat/qat_common/adf_accel_devices.h index 0399417b91fc..a54a994b5e27 100644 --- a/drivers/crypto/intel/qat/qat_common/adf_accel_devices.h +++ b/drivers/crypto/intel/qat/qat_common/adf_accel_devices.h @@ -292,6 +292,7 @@ struct adf_accel_dev { unsigned long status; atomic_t ref_count; struct dentry *debugfs_dir; + struct dentry *fw_cntr_dbgfile; struct list_head list; struct module *owner; struct adf_accel_pci accel_pci_dev; diff --git a/drivers/crypto/intel/qat/qat_common/adf_admin.c b/drivers/crypto/intel/qat/qat_common/adf_admin.c index 118775ee02f2..4716b82d48ec 100644 --- a/drivers/crypto/intel/qat/qat_common/adf_admin.c +++ b/drivers/crypto/intel/qat/qat_common/adf_admin.c @@ -223,6 +223,24 @@ static int adf_get_dc_capabilities(struct adf_accel_dev *accel_dev, return 0; } +int adf_get_ae_fw_counters(struct adf_accel_dev *accel_dev, u16 ae, u64 *reqs, u64 *resps) +{ + struct icp_qat_fw_init_admin_resp resp = { }; + struct icp_qat_fw_init_admin_req req = { }; + int ret; + + req.cmd_id = ICP_QAT_FW_COUNTERS_GET; + + ret = adf_put_admin_msg_sync(accel_dev, ae, &req, &resp); + if (ret || resp.status) + return -EFAULT; + + *reqs = resp.req_rec_count; + *resps = resp.resp_sent_count; + + return 0; +} + /** * adf_send_admin_init() - Function sends init message to FW * @accel_dev: Pointer to acceleration device. diff --git a/drivers/crypto/intel/qat/qat_common/adf_common_drv.h b/drivers/crypto/intel/qat/qat_common/adf_common_drv.h index b8132eb9bc2a..4682be073c99 100644 --- a/drivers/crypto/intel/qat/qat_common/adf_common_drv.h +++ b/drivers/crypto/intel/qat/qat_common/adf_common_drv.h @@ -94,6 +94,7 @@ void adf_exit_aer(void); int adf_init_admin_comms(struct adf_accel_dev *accel_dev); void adf_exit_admin_comms(struct adf_accel_dev *accel_dev); int adf_send_admin_init(struct adf_accel_dev *accel_dev); +int adf_get_ae_fw_counters(struct adf_accel_dev *accel_dev, u16 ae, u64 *reqs, u64 *resps); int adf_init_admin_pm(struct adf_accel_dev *accel_dev, u32 idle_delay); int adf_init_arb(struct adf_accel_dev *accel_dev); void adf_exit_arb(struct adf_accel_dev *accel_dev); diff --git a/drivers/crypto/intel/qat/qat_common/adf_dbgfs.c b/drivers/crypto/intel/qat/qat_common/adf_dbgfs.c index d0a2f892e6eb..5080ecffab03 100644 --- a/drivers/crypto/intel/qat/qat_common/adf_dbgfs.c +++ b/drivers/crypto/intel/qat/qat_common/adf_dbgfs.c @@ -6,6 +6,7 @@ #include "adf_cfg.h" #include "adf_common_drv.h" #include "adf_dbgfs.h" +#include "adf_fw_counters.h" /** * adf_dbgfs_init() - add persistent debugfs entries @@ -56,6 +57,9 @@ void adf_dbgfs_add(struct adf_accel_dev *accel_dev) { if (!accel_dev->debugfs_dir) return; + + if (!accel_dev->is_vf) + adf_fw_counters_dbgfs_add(accel_dev); } /** @@ -66,4 +70,7 @@ void adf_dbgfs_rm(struct adf_accel_dev *accel_dev) { if (!accel_dev->debugfs_dir) return; + + if (!accel_dev->is_vf) + adf_fw_counters_dbgfs_rm(accel_dev); } diff --git a/drivers/crypto/intel/qat/qat_common/adf_fw_counters.c b/drivers/crypto/intel/qat/qat_common/adf_fw_counters.c new file mode 100644 index 000000000000..cb6e09ef5c9f --- /dev/null +++ b/drivers/crypto/intel/qat/qat_common/adf_fw_counters.c @@ -0,0 +1,264 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* Copyright(c) 2023 Intel Corporation */ +#include +#include +#include +#include +#include +#include +#include + +#include "adf_accel_devices.h" +#include "adf_common_drv.h" +#include "adf_fw_counters.h" + +#define ADF_FW_COUNTERS_MAX_PADDING 16 + +enum adf_fw_counters_types { + ADF_FW_REQUESTS, + ADF_FW_RESPONSES, + ADF_FW_COUNTERS_COUNT +}; + +static const char * const adf_fw_counter_names[] = { + [ADF_FW_REQUESTS] = "Requests", + [ADF_FW_RESPONSES] = "Responses", +}; + +static_assert(ARRAY_SIZE(adf_fw_counter_names) == ADF_FW_COUNTERS_COUNT); + +struct adf_ae_counters { + u16 ae; + u64 values[ADF_FW_COUNTERS_COUNT]; +}; + +struct adf_fw_counters { + u16 ae_count; + struct adf_ae_counters ae_counters[]; +}; + +static void adf_fw_counters_parse_ae_values(struct adf_ae_counters *ae_counters, u32 ae, + u64 req_count, u64 resp_count) +{ + ae_counters->ae = ae; + ae_counters->values[ADF_FW_REQUESTS] = req_count; + ae_counters->values[ADF_FW_RESPONSES] = resp_count; +} + +static int adf_fw_counters_load_from_device(struct adf_accel_dev *accel_dev, + struct adf_fw_counters *fw_counters) +{ + struct adf_hw_device_data *hw_data = GET_HW_DATA(accel_dev); + unsigned long ae_mask; + unsigned int i; + unsigned long ae; + + /* Ignore the admin AEs */ + ae_mask = hw_data->ae_mask & ~hw_data->admin_ae_mask; + + if (hweight_long(ae_mask) > fw_counters->ae_count) + return -EINVAL; + + i = 0; + for_each_set_bit(ae, &ae_mask, GET_MAX_ACCELENGINES(accel_dev)) { + u64 req_count, resp_count; + int ret; + + ret = adf_get_ae_fw_counters(accel_dev, ae, &req_count, &resp_count); + if (ret) + return ret; + + adf_fw_counters_parse_ae_values(&fw_counters->ae_counters[i++], ae, + req_count, resp_count); + } + + return 0; +} + +static struct adf_fw_counters *adf_fw_counters_allocate(unsigned long ae_count) +{ + struct adf_fw_counters *fw_counters; + + if (unlikely(!ae_count)) + return ERR_PTR(-EINVAL); + + fw_counters = kmalloc(struct_size(fw_counters, ae_counters, ae_count), GFP_KERNEL); + if (!fw_counters) + return ERR_PTR(-ENOMEM); + + fw_counters->ae_count = ae_count; + + return fw_counters; +} + +/** + * adf_fw_counters_get() - Return FW counters for the provided device. + * @accel_dev: Pointer to a QAT acceleration device + * + * Allocates and returns a table of counters containing execution statistics + * for each non-admin AE available through the supplied acceleration device. + * The caller becomes the owner of such memory and is responsible for + * the deallocation through a call to kfree(). + * + * Returns: a pointer to a dynamically allocated struct adf_fw_counters + * on success, or a negative value on error. + */ +static struct adf_fw_counters *adf_fw_counters_get(struct adf_accel_dev *accel_dev) +{ + struct adf_hw_device_data *hw_data = GET_HW_DATA(accel_dev); + struct adf_fw_counters *fw_counters; + unsigned long ae_count; + int ret; + + if (!adf_dev_started(accel_dev)) { + dev_err(&GET_DEV(accel_dev), "QAT Device not started\n"); + return ERR_PTR(-EFAULT); + } + + /* Ignore the admin AEs */ + ae_count = hweight_long(hw_data->ae_mask & ~hw_data->admin_ae_mask); + + fw_counters = adf_fw_counters_allocate(ae_count); + if (IS_ERR(fw_counters)) + return fw_counters; + + ret = adf_fw_counters_load_from_device(accel_dev, fw_counters); + if (ret) { + kfree(fw_counters); + dev_err(&GET_DEV(accel_dev), + "Failed to create QAT fw_counters file table [%d].\n", ret); + return ERR_PTR(ret); + } + + return fw_counters; +} + +static void *qat_fw_counters_seq_start(struct seq_file *sfile, loff_t *pos) +{ + struct adf_fw_counters *fw_counters = sfile->private; + + if (*pos == 0) + return SEQ_START_TOKEN; + + if (*pos > fw_counters->ae_count) + return NULL; + + return &fw_counters->ae_counters[*pos - 1]; +} + +static void *qat_fw_counters_seq_next(struct seq_file *sfile, void *v, loff_t *pos) +{ + struct adf_fw_counters *fw_counters = sfile->private; + + (*pos)++; + + if (*pos > fw_counters->ae_count) + return NULL; + + return &fw_counters->ae_counters[*pos - 1]; +} + +static void qat_fw_counters_seq_stop(struct seq_file *sfile, void *v) {} + +static int qat_fw_counters_seq_show(struct seq_file *sfile, void *v) +{ + int i; + + if (v == SEQ_START_TOKEN) { + seq_puts(sfile, "AE "); + for (i = 0; i < ADF_FW_COUNTERS_COUNT; ++i) + seq_printf(sfile, " %*s", ADF_FW_COUNTERS_MAX_PADDING, + adf_fw_counter_names[i]); + } else { + struct adf_ae_counters *ae_counters = (struct adf_ae_counters *)v; + + seq_printf(sfile, "%2d:", ae_counters->ae); + for (i = 0; i < ADF_FW_COUNTERS_COUNT; ++i) + seq_printf(sfile, " %*llu", ADF_FW_COUNTERS_MAX_PADDING, + ae_counters->values[i]); + } + seq_putc(sfile, '\n'); + + return 0; +} + +static const struct seq_operations qat_fw_counters_sops = { + .start = qat_fw_counters_seq_start, + .next = qat_fw_counters_seq_next, + .stop = qat_fw_counters_seq_stop, + .show = qat_fw_counters_seq_show, +}; + +static int qat_fw_counters_file_open(struct inode *inode, struct file *file) +{ + struct adf_accel_dev *accel_dev = inode->i_private; + struct seq_file *fw_counters_seq_file; + struct adf_fw_counters *fw_counters; + int ret; + + fw_counters = adf_fw_counters_get(accel_dev); + if (IS_ERR(fw_counters)) + return PTR_ERR(fw_counters); + + ret = seq_open(file, &qat_fw_counters_sops); + if (unlikely(ret)) { + kfree(fw_counters); + return ret; + } + + fw_counters_seq_file = file->private_data; + fw_counters_seq_file->private = fw_counters; + return ret; +} + +static int qat_fw_counters_file_release(struct inode *inode, struct file *file) +{ + struct seq_file *seq = file->private_data; + + kfree(seq->private); + seq->private = NULL; + + return seq_release(inode, file); } + +static const struct file_operations qat_fw_counters_fops = { + .owner = THIS_MODULE, + .open = qat_fw_counters_file_open, + .read = seq_read, + .llseek = seq_lseek, + .release = qat_fw_counters_file_release, +}; + +/** + * adf_fw_counters_dbgfs_add() - Create a debugfs file containing FW + * execution counters. + * @accel_dev: Pointer to a QAT acceleration device + * + * Function creates a file to display a table with statistics for the given + * QAT acceleration device. The table stores device specific execution values + * for each AE, such as the number of requests sent to the FW and responses + * received from the FW. + * + * Return: void + */ +void adf_fw_counters_dbgfs_add(struct adf_accel_dev *accel_dev) +{ + accel_dev->fw_cntr_dbgfile = debugfs_create_file("fw_counters", 0400, + accel_dev->debugfs_dir, + accel_dev, + &qat_fw_counters_fops); +} + +/** + * adf_fw_counters_dbgfs_rm() - Remove the debugfs file containing FW counters. + * @accel_dev: Pointer to a QAT acceleration device. + * + * Function removes the file providing the table of statistics for the given + * QAT acceleration device. + * + * Return: void + */ +void adf_fw_counters_dbgfs_rm(struct adf_accel_dev *accel_dev) +{ + debugfs_remove(accel_dev->fw_cntr_dbgfile); + accel_dev->fw_cntr_dbgfile = NULL; +} diff --git a/drivers/crypto/intel/qat/qat_common/adf_fw_counters.h b/drivers/crypto/intel/qat/qat_common/adf_fw_counters.h new file mode 100644 index 000000000000..91b3b6a95f1f --- /dev/null +++ b/drivers/crypto/intel/qat/qat_common/adf_fw_counters.h @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright(c) 2023 Intel Corporation */ +#ifndef ADF_FW_COUNTERS_H +#define ADF_FW_COUNTERS_H + +struct adf_accel_dev; + +void adf_fw_counters_dbgfs_add(struct adf_accel_dev *accel_dev); +void adf_fw_counters_dbgfs_rm(struct adf_accel_dev *accel_dev); + +#endif From fd77d8da1fa85a7549ce3cd50222f9f795cc5f5d Mon Sep 17 00:00:00 2001 From: Damian Muszynski Date: Fri, 30 Jun 2023 19:03:54 +0200 Subject: [PATCH 118/656] crypto: qat - add internal timer for qat 4xxx The power management feature in QAT 4xxx devices can disable clock sources used to implement timers. Because of that, the firmware needs to get an external reliable source of time. Add a kernel delayed work that periodically sends an event to the firmware. This is triggered every 200ms. At each execution, the driver sends a sync request to the firmware reporting the current timestamp counter value. This is a pre-requisite for enabling the heartbeat, telemetry and rate limiting features. Signed-off-by: Damian Muszynski Reviewed-by: Giovanni Cabiddu Reviewed-by: Andy Shevchenko Signed-off-by: Herbert Xu --- .../intel/qat/qat_4xxx/adf_4xxx_hw_data.c | 3 + drivers/crypto/intel/qat/qat_common/Makefile | 1 + .../intel/qat/qat_common/adf_accel_devices.h | 3 + .../crypto/intel/qat/qat_common/adf_admin.c | 12 ++++ .../intel/qat/qat_common/adf_common_drv.h | 3 + .../intel/qat/qat_common/adf_gen4_timer.c | 70 +++++++++++++++++++ .../intel/qat/qat_common/adf_gen4_timer.h | 21 ++++++ .../crypto/intel/qat/qat_common/adf_init.c | 13 ++++ drivers/crypto/intel/qat/qat_common/adf_isr.c | 6 ++ .../qat/qat_common/icp_qat_fw_init_admin.h | 5 ++ 10 files changed, 137 insertions(+) create mode 100644 drivers/crypto/intel/qat/qat_common/adf_gen4_timer.c create mode 100644 drivers/crypto/intel/qat/qat_common/adf_gen4_timer.h diff --git a/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c b/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c index e543a9e24a06..831d460bc503 100644 --- a/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c +++ b/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c @@ -8,6 +8,7 @@ #include #include #include +#include #include "adf_4xxx_hw_data.h" #include "icp_qat_hw.h" @@ -508,6 +509,8 @@ void adf_init_hw_data_4xxx(struct adf_hw_device_data *hw_data, u32 dev_id) hw_data->enable_pm = adf_gen4_enable_pm; hw_data->handle_pm_interrupt = adf_gen4_handle_pm_interrupt; hw_data->dev_config = adf_gen4_dev_config; + hw_data->start_timer = adf_gen4_timer_start; + hw_data->stop_timer = adf_gen4_timer_stop; adf_gen4_init_hw_csr_ops(&hw_data->csr_ops); adf_gen4_init_pf_pfvf_ops(&hw_data->pfvf_ops); diff --git a/drivers/crypto/intel/qat/qat_common/Makefile b/drivers/crypto/intel/qat/qat_common/Makefile index f541046cdf9a..6a82ef8df733 100644 --- a/drivers/crypto/intel/qat/qat_common/Makefile +++ b/drivers/crypto/intel/qat/qat_common/Makefile @@ -17,6 +17,7 @@ intel_qat-objs := adf_cfg.o \ adf_gen4_pm.o \ adf_gen2_dc.o \ adf_gen4_dc.o \ + adf_gen4_timer.o \ qat_crypto.o \ qat_compression.o \ qat_comp_algs.o \ diff --git a/drivers/crypto/intel/qat/qat_common/adf_accel_devices.h b/drivers/crypto/intel/qat/qat_common/adf_accel_devices.h index a54a994b5e27..2198b410b029 100644 --- a/drivers/crypto/intel/qat/qat_common/adf_accel_devices.h +++ b/drivers/crypto/intel/qat/qat_common/adf_accel_devices.h @@ -188,6 +188,8 @@ struct adf_hw_device_data { int (*init_admin_comms)(struct adf_accel_dev *accel_dev); void (*exit_admin_comms)(struct adf_accel_dev *accel_dev); int (*send_admin_init)(struct adf_accel_dev *accel_dev); + int (*start_timer)(struct adf_accel_dev *accel_dev); + void (*stop_timer)(struct adf_accel_dev *accel_dev); int (*init_arb)(struct adf_accel_dev *accel_dev); void (*exit_arb)(struct adf_accel_dev *accel_dev); const u32 *(*get_arb_mapping)(struct adf_accel_dev *accel_dev); @@ -296,6 +298,7 @@ struct adf_accel_dev { struct list_head list; struct module *owner; struct adf_accel_pci accel_pci_dev; + struct adf_timer *timer; union { struct { /* protects VF2PF interrupts access */ diff --git a/drivers/crypto/intel/qat/qat_common/adf_admin.c b/drivers/crypto/intel/qat/qat_common/adf_admin.c index 4716b82d48ec..d6cb7f50bb5a 100644 --- a/drivers/crypto/intel/qat/qat_common/adf_admin.c +++ b/drivers/crypto/intel/qat/qat_common/adf_admin.c @@ -241,6 +241,18 @@ int adf_get_ae_fw_counters(struct adf_accel_dev *accel_dev, u16 ae, u64 *reqs, u return 0; } +int adf_send_admin_tim_sync(struct adf_accel_dev *accel_dev, u32 cnt) +{ + u32 ae_mask = accel_dev->hw_device->ae_mask; + struct icp_qat_fw_init_admin_req req = { }; + struct icp_qat_fw_init_admin_resp resp = { }; + + req.cmd_id = ICP_QAT_FW_SYNC; + req.int_timer_ticks = cnt; + + return adf_send_admin(accel_dev, &req, &resp, ae_mask); +} + /** * adf_send_admin_init() - Function sends init message to FW * @accel_dev: Pointer to acceleration device. diff --git a/drivers/crypto/intel/qat/qat_common/adf_common_drv.h b/drivers/crypto/intel/qat/qat_common/adf_common_drv.h index 4682be073c99..e0d472071354 100644 --- a/drivers/crypto/intel/qat/qat_common/adf_common_drv.h +++ b/drivers/crypto/intel/qat/qat_common/adf_common_drv.h @@ -96,6 +96,7 @@ void adf_exit_admin_comms(struct adf_accel_dev *accel_dev); int adf_send_admin_init(struct adf_accel_dev *accel_dev); int adf_get_ae_fw_counters(struct adf_accel_dev *accel_dev, u16 ae, u64 *reqs, u64 *resps); int adf_init_admin_pm(struct adf_accel_dev *accel_dev, u32 idle_delay); +int adf_send_admin_tim_sync(struct adf_accel_dev *accel_dev, u32 cnt); int adf_init_arb(struct adf_accel_dev *accel_dev); void adf_exit_arb(struct adf_accel_dev *accel_dev); void adf_update_ring_arb(struct adf_etr_ring_data *ring); @@ -194,6 +195,8 @@ int qat_uclo_set_cfg_ae_mask(struct icp_qat_fw_loader_handle *handle, int adf_init_misc_wq(void); void adf_exit_misc_wq(void); bool adf_misc_wq_queue_work(struct work_struct *work); +bool adf_misc_wq_queue_delayed_work(struct delayed_work *work, + unsigned long delay); #if defined(CONFIG_PCI_IOV) int adf_sriov_configure(struct pci_dev *pdev, int numvfs); void adf_disable_sriov(struct adf_accel_dev *accel_dev); diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen4_timer.c b/drivers/crypto/intel/qat/qat_common/adf_gen4_timer.c new file mode 100644 index 000000000000..646c57922fcd --- /dev/null +++ b/drivers/crypto/intel/qat/qat_common/adf_gen4_timer.c @@ -0,0 +1,70 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* Copyright(c) 2023 Intel Corporation */ + +#include +#include +#include +#include +#include +#include +#include + +#include "adf_accel_devices.h" +#include "adf_common_drv.h" +#include "adf_gen4_timer.h" + +#define ADF_GEN4_TIMER_PERIOD_MS 200 + +/* This periodic update is used to trigger HB, RL & TL fw events */ +static void work_handler(struct work_struct *work) +{ + struct adf_accel_dev *accel_dev; + struct adf_timer *timer_ctx; + u32 time_periods; + + timer_ctx = container_of(to_delayed_work(work), struct adf_timer, work_ctx); + accel_dev = timer_ctx->accel_dev; + + adf_misc_wq_queue_delayed_work(&timer_ctx->work_ctx, + msecs_to_jiffies(ADF_GEN4_TIMER_PERIOD_MS)); + + time_periods = div_u64(ktime_ms_delta(ktime_get_real(), timer_ctx->initial_ktime), + ADF_GEN4_TIMER_PERIOD_MS); + + if (adf_send_admin_tim_sync(accel_dev, time_periods)) + dev_err(&GET_DEV(accel_dev), "Failed to synchronize qat timer\n"); +} + +int adf_gen4_timer_start(struct adf_accel_dev *accel_dev) +{ + struct adf_timer *timer_ctx; + + timer_ctx = kzalloc(sizeof(*timer_ctx), GFP_KERNEL); + if (!timer_ctx) + return -ENOMEM; + + timer_ctx->accel_dev = accel_dev; + accel_dev->timer = timer_ctx; + timer_ctx->initial_ktime = ktime_get_real(); + + INIT_DELAYED_WORK(&timer_ctx->work_ctx, work_handler); + adf_misc_wq_queue_delayed_work(&timer_ctx->work_ctx, + msecs_to_jiffies(ADF_GEN4_TIMER_PERIOD_MS)); + + return 0; +} +EXPORT_SYMBOL_GPL(adf_gen4_timer_start); + +void adf_gen4_timer_stop(struct adf_accel_dev *accel_dev) +{ + struct adf_timer *timer_ctx = accel_dev->timer; + + if (!timer_ctx) + return; + + cancel_delayed_work_sync(&timer_ctx->work_ctx); + + kfree(timer_ctx); + accel_dev->timer = NULL; +} +EXPORT_SYMBOL_GPL(adf_gen4_timer_stop); diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen4_timer.h b/drivers/crypto/intel/qat/qat_common/adf_gen4_timer.h new file mode 100644 index 000000000000..66a709e7b358 --- /dev/null +++ b/drivers/crypto/intel/qat/qat_common/adf_gen4_timer.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright(c) 2023 Intel Corporation */ + +#ifndef ADF_GEN4_TIMER_H_ +#define ADF_GEN4_TIMER_H_ + +#include +#include + +struct adf_accel_dev; + +struct adf_timer { + struct adf_accel_dev *accel_dev; + struct delayed_work work_ctx; + ktime_t initial_ktime; +}; + +int adf_gen4_timer_start(struct adf_accel_dev *accel_dev); +void adf_gen4_timer_stop(struct adf_accel_dev *accel_dev); + +#endif /* ADF_GEN4_TIMER_H_ */ diff --git a/drivers/crypto/intel/qat/qat_common/adf_init.c b/drivers/crypto/intel/qat/qat_common/adf_init.c index 826179c98524..0acba0f988da 100644 --- a/drivers/crypto/intel/qat/qat_common/adf_init.c +++ b/drivers/crypto/intel/qat/qat_common/adf_init.c @@ -163,6 +163,7 @@ static int adf_dev_start(struct adf_accel_dev *accel_dev) struct adf_hw_device_data *hw_data = accel_dev->hw_device; struct service_hndl *service; struct list_head *list_itr; + int ret; set_bit(ADF_STATUS_STARTING, &accel_dev->status); @@ -187,6 +188,14 @@ static int adf_dev_start(struct adf_accel_dev *accel_dev) return -EFAULT; } + if (hw_data->start_timer) { + ret = hw_data->start_timer(accel_dev); + if (ret) { + dev_err(&GET_DEV(accel_dev), "Failed to start internal sync timer\n"); + return ret; + } + } + list_for_each(list_itr, &service_table) { service = list_entry(list_itr, struct service_hndl, list); if (service->event_hld(accel_dev, ADF_EVENT_START)) { @@ -235,6 +244,7 @@ static int adf_dev_start(struct adf_accel_dev *accel_dev) */ static void adf_dev_stop(struct adf_accel_dev *accel_dev) { + struct adf_hw_device_data *hw_data = accel_dev->hw_device; struct service_hndl *service; struct list_head *list_itr; bool wait = false; @@ -270,6 +280,9 @@ static void adf_dev_stop(struct adf_accel_dev *accel_dev) } } + if (hw_data->stop_timer) + hw_data->stop_timer(accel_dev); + if (wait) msleep(100); diff --git a/drivers/crypto/intel/qat/qat_common/adf_isr.c b/drivers/crypto/intel/qat/qat_common/adf_isr.c index ad9e135b8560..2aba194a7c29 100644 --- a/drivers/crypto/intel/qat/qat_common/adf_isr.c +++ b/drivers/crypto/intel/qat/qat_common/adf_isr.c @@ -380,3 +380,9 @@ bool adf_misc_wq_queue_work(struct work_struct *work) { return queue_work(adf_misc_wq, work); } + +bool adf_misc_wq_queue_delayed_work(struct delayed_work *work, + unsigned long delay) +{ + return queue_delayed_work(adf_misc_wq, work, delay); +} diff --git a/drivers/crypto/intel/qat/qat_common/icp_qat_fw_init_admin.h b/drivers/crypto/intel/qat/qat_common/icp_qat_fw_init_admin.h index 56cb827f93ea..d853c9242acf 100644 --- a/drivers/crypto/intel/qat/qat_common/icp_qat_fw_init_admin.h +++ b/drivers/crypto/intel/qat/qat_common/icp_qat_fw_init_admin.h @@ -37,6 +37,9 @@ struct icp_qat_fw_init_admin_req { __u16 ibuf_size_in_kb; __u16 resrvd3; }; + struct { + __u32 int_timer_ticks; + }; __u32 idle_filter; }; @@ -97,6 +100,8 @@ struct icp_qat_fw_init_admin_resp { }; } __packed; +#define ICP_QAT_FW_SYNC ICP_QAT_FW_HEARTBEAT_SYNC + #define ICP_QAT_FW_COMN_HEARTBEAT_OK 0 #define ICP_QAT_FW_COMN_HEARTBEAT_BLOCKED 1 #define ICP_QAT_FW_COMN_HEARTBEAT_FLAG_BITPOS 0 From 7f77b6797b34862e6164335c894f587387bff082 Mon Sep 17 00:00:00 2001 From: Damian Muszynski Date: Fri, 30 Jun 2023 19:03:55 +0200 Subject: [PATCH 119/656] crypto: qat - drop obsolete heartbeat interface Drop legacy heartbeat interface from FW API as it is no longer used. Signed-off-by: Damian Muszynski Reviewed-by: Giovanni Cabiddu Reviewed-by: Andy Shevchenko Signed-off-by: Herbert Xu --- .../intel/qat/qat_common/icp_qat_fw_init_admin.h | 15 --------------- 1 file changed, 15 deletions(-) diff --git a/drivers/crypto/intel/qat/qat_common/icp_qat_fw_init_admin.h b/drivers/crypto/intel/qat/qat_common/icp_qat_fw_init_admin.h index d853c9242acf..6ea19b4fb0ce 100644 --- a/drivers/crypto/intel/qat/qat_common/icp_qat_fw_init_admin.h +++ b/drivers/crypto/intel/qat/qat_common/icp_qat_fw_init_admin.h @@ -102,19 +102,4 @@ struct icp_qat_fw_init_admin_resp { #define ICP_QAT_FW_SYNC ICP_QAT_FW_HEARTBEAT_SYNC -#define ICP_QAT_FW_COMN_HEARTBEAT_OK 0 -#define ICP_QAT_FW_COMN_HEARTBEAT_BLOCKED 1 -#define ICP_QAT_FW_COMN_HEARTBEAT_FLAG_BITPOS 0 -#define ICP_QAT_FW_COMN_HEARTBEAT_FLAG_MASK 0x1 -#define ICP_QAT_FW_COMN_STATUS_RESRVD_FLD_MASK 0xFE -#define ICP_QAT_FW_COMN_HEARTBEAT_HDR_FLAG_GET(hdr_t) \ - ICP_QAT_FW_COMN_HEARTBEAT_FLAG_GET(hdr_t.flags) - -#define ICP_QAT_FW_COMN_HEARTBEAT_HDR_FLAG_SET(hdr_t, val) \ - ICP_QAT_FW_COMN_HEARTBEAT_FLAG_SET(hdr_t, val) - -#define ICP_QAT_FW_COMN_HEARTBEAT_FLAG_GET(flags) \ - QAT_FIELD_GET(flags, \ - ICP_QAT_FW_COMN_HEARTBEAT_FLAG_BITPOS, \ - ICP_QAT_FW_COMN_HEARTBEAT_FLAG_MASK) #endif From e2980ba57e797e58a5476fbc4296f40551fb3404 Mon Sep 17 00:00:00 2001 From: Damian Muszynski Date: Fri, 30 Jun 2023 19:03:56 +0200 Subject: [PATCH 120/656] crypto: qat - add measure clock frequency The QAT hardware does not expose a mechanism to report its clock frequency. This is required to implement the Heartbeat feature. Add a clock measuring algorithm that estimates the frequency by comparing the internal timestamp counter incremented by the firmware with the time measured by the kernel. The frequency value is only used internally and not exposed to the user. Signed-off-by: Damian Muszynski Reviewed-by: Giovanni Cabiddu Reviewed-by: Andy Shevchenko Signed-off-by: Herbert Xu --- .../intel/qat/qat_4xxx/adf_4xxx_hw_data.c | 10 ++ .../intel/qat/qat_4xxx/adf_4xxx_hw_data.h | 4 + .../intel/qat/qat_c3xxx/adf_c3xxx_hw_data.c | 25 ++++ .../intel/qat/qat_c3xxx/adf_c3xxx_hw_data.h | 7 + .../intel/qat/qat_c62x/adf_c62x_hw_data.c | 25 ++++ .../intel/qat/qat_c62x/adf_c62x_hw_data.h | 7 + drivers/crypto/intel/qat/qat_common/Makefile | 1 + .../intel/qat/qat_common/adf_accel_devices.h | 2 + .../crypto/intel/qat/qat_common/adf_admin.c | 17 +++ .../crypto/intel/qat/qat_common/adf_clock.c | 131 ++++++++++++++++++ .../crypto/intel/qat/qat_common/adf_clock.h | 14 ++ .../intel/qat/qat_common/adf_common_drv.h | 1 + .../crypto/intel/qat/qat_common/adf_init.c | 8 ++ .../qat/qat_common/icp_qat_fw_init_admin.h | 1 + .../qat/qat_dh895xcc/adf_dh895xcc_hw_data.c | 10 ++ .../qat/qat_dh895xcc/adf_dh895xcc_hw_data.h | 5 + 16 files changed, 268 insertions(+) create mode 100644 drivers/crypto/intel/qat/qat_common/adf_clock.c create mode 100644 drivers/crypto/intel/qat/qat_common/adf_clock.h diff --git a/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c b/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c index 831d460bc503..9cda0c17992a 100644 --- a/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c +++ b/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c @@ -3,6 +3,7 @@ #include #include #include +#include #include #include #include @@ -318,6 +319,14 @@ static void get_admin_info(struct admin_info *admin_csrs_info) admin_csrs_info->admin_msg_lr = ADF_4XXX_ADMINMSGLR_OFFSET; } +static u32 get_heartbeat_clock(struct adf_hw_device_data *self) +{ + /* + * 4XXX uses KPT counter for HB + */ + return ADF_4XXX_KPT_COUNTER_FREQ; +} + static void adf_enable_error_correction(struct adf_accel_dev *accel_dev) { struct adf_bar *misc_bar = &GET_BARS(accel_dev)[ADF_4XXX_PMISC_BAR]; @@ -511,6 +520,7 @@ void adf_init_hw_data_4xxx(struct adf_hw_device_data *hw_data, u32 dev_id) hw_data->dev_config = adf_gen4_dev_config; hw_data->start_timer = adf_gen4_timer_start; hw_data->stop_timer = adf_gen4_timer_stop; + hw_data->get_hb_clock = get_heartbeat_clock; adf_gen4_init_hw_csr_ops(&hw_data->csr_ops); adf_gen4_init_pf_pfvf_ops(&hw_data->pfvf_ops); diff --git a/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.h b/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.h index e5b314d2b60e..bb3d95a8fb21 100644 --- a/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.h +++ b/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.h @@ -3,6 +3,7 @@ #ifndef ADF_4XXX_HW_DATA_H_ #define ADF_4XXX_HW_DATA_H_ +#include #include /* PCIe configuration space */ @@ -64,6 +65,9 @@ #define ADF_402XX_ASYM_OBJ "qat_402xx_asym.bin" #define ADF_402XX_ADMIN_OBJ "qat_402xx_admin.bin" +/* Clocks frequency */ +#define ADF_4XXX_KPT_COUNTER_FREQ (100 * HZ_PER_MHZ) + /* qat_4xxx fuse bits are different from old GENs, redefine them */ enum icp_qat_4xxx_slice_mask { ICP_ACCEL_4XXX_MASK_CIPHER_SLICE = BIT(0), diff --git a/drivers/crypto/intel/qat/qat_c3xxx/adf_c3xxx_hw_data.c b/drivers/crypto/intel/qat/qat_c3xxx/adf_c3xxx_hw_data.c index 475643654e64..2c6a1dd9780c 100644 --- a/drivers/crypto/intel/qat/qat_c3xxx/adf_c3xxx_hw_data.c +++ b/drivers/crypto/intel/qat/qat_c3xxx/adf_c3xxx_hw_data.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only) /* Copyright(c) 2014 - 2021 Intel Corporation */ #include +#include #include #include #include @@ -50,6 +51,28 @@ static u32 get_ae_mask(struct adf_hw_device_data *self) return ~(fuses | straps) & ADF_C3XXX_ACCELENGINES_MASK; } +static u32 get_ts_clock(struct adf_hw_device_data *self) +{ + /* + * Timestamp update interval is 16 AE clock ticks for c3xxx. + */ + return self->clock_frequency / 16; +} + +static int measure_clock(struct adf_accel_dev *accel_dev) +{ + u32 frequency; + int ret; + + ret = adf_dev_measure_clock(accel_dev, &frequency, ADF_C3XXX_MIN_AE_FREQ, + ADF_C3XXX_MAX_AE_FREQ); + if (ret) + return ret; + + accel_dev->hw_device->clock_frequency = frequency; + return 0; +} + static u32 get_misc_bar_id(struct adf_hw_device_data *self) { return ADF_C3XXX_PMISC_BAR; @@ -127,6 +150,8 @@ void adf_init_hw_data_c3xxx(struct adf_hw_device_data *hw_data) hw_data->set_ssm_wdtimer = adf_gen2_set_ssm_wdtimer; hw_data->disable_iov = adf_disable_sriov; hw_data->dev_config = adf_gen2_dev_config; + hw_data->measure_clock = measure_clock; + hw_data->get_hb_clock = get_ts_clock; adf_gen2_init_pf_pfvf_ops(&hw_data->pfvf_ops); adf_gen2_init_hw_csr_ops(&hw_data->csr_ops); diff --git a/drivers/crypto/intel/qat/qat_c3xxx/adf_c3xxx_hw_data.h b/drivers/crypto/intel/qat/qat_c3xxx/adf_c3xxx_hw_data.h index 336a06f11dbd..690c6a1aa172 100644 --- a/drivers/crypto/intel/qat/qat_c3xxx/adf_c3xxx_hw_data.h +++ b/drivers/crypto/intel/qat/qat_c3xxx/adf_c3xxx_hw_data.h @@ -3,6 +3,8 @@ #ifndef ADF_C3XXX_HW_DATA_H_ #define ADF_C3XXX_HW_DATA_H_ +#include + /* PCIe configuration space */ #define ADF_C3XXX_PMISC_BAR 0 #define ADF_C3XXX_ETR_BAR 1 @@ -19,6 +21,11 @@ #define ADF_C3XXX_AE2FUNC_MAP_GRP_A_NUM_REGS 48 #define ADF_C3XXX_AE2FUNC_MAP_GRP_B_NUM_REGS 6 +/* Clocks frequency */ +#define ADF_C3XXX_AE_FREQ (685 * HZ_PER_MHZ) +#define ADF_C3XXX_MIN_AE_FREQ (533 * HZ_PER_MHZ) +#define ADF_C3XXX_MAX_AE_FREQ (685 * HZ_PER_MHZ) + /* Firmware Binary */ #define ADF_C3XXX_FW "qat_c3xxx.bin" #define ADF_C3XXX_MMP "qat_c3xxx_mmp.bin" diff --git a/drivers/crypto/intel/qat/qat_c62x/adf_c62x_hw_data.c b/drivers/crypto/intel/qat/qat_c62x/adf_c62x_hw_data.c index e14270703670..081702be839e 100644 --- a/drivers/crypto/intel/qat/qat_c62x/adf_c62x_hw_data.c +++ b/drivers/crypto/intel/qat/qat_c62x/adf_c62x_hw_data.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only) /* Copyright(c) 2014 - 2021 Intel Corporation */ #include +#include #include #include #include @@ -50,6 +51,28 @@ static u32 get_ae_mask(struct adf_hw_device_data *self) return ~(fuses | straps) & ADF_C62X_ACCELENGINES_MASK; } +static u32 get_ts_clock(struct adf_hw_device_data *self) +{ + /* + * Timestamp update interval is 16 AE clock ticks for c62x. + */ + return self->clock_frequency / 16; +} + +static int measure_clock(struct adf_accel_dev *accel_dev) +{ + u32 frequency; + int ret; + + ret = adf_dev_measure_clock(accel_dev, &frequency, ADF_C62X_MIN_AE_FREQ, + ADF_C62X_MAX_AE_FREQ); + if (ret) + return ret; + + accel_dev->hw_device->clock_frequency = frequency; + return 0; +} + static u32 get_misc_bar_id(struct adf_hw_device_data *self) { return ADF_C62X_PMISC_BAR; @@ -129,6 +152,8 @@ void adf_init_hw_data_c62x(struct adf_hw_device_data *hw_data) hw_data->set_ssm_wdtimer = adf_gen2_set_ssm_wdtimer; hw_data->disable_iov = adf_disable_sriov; hw_data->dev_config = adf_gen2_dev_config; + hw_data->measure_clock = measure_clock; + hw_data->get_hb_clock = get_ts_clock; adf_gen2_init_pf_pfvf_ops(&hw_data->pfvf_ops); adf_gen2_init_hw_csr_ops(&hw_data->csr_ops); diff --git a/drivers/crypto/intel/qat/qat_c62x/adf_c62x_hw_data.h b/drivers/crypto/intel/qat/qat_c62x/adf_c62x_hw_data.h index 008c0a3a9769..13e6ebf6fd91 100644 --- a/drivers/crypto/intel/qat/qat_c62x/adf_c62x_hw_data.h +++ b/drivers/crypto/intel/qat/qat_c62x/adf_c62x_hw_data.h @@ -3,6 +3,8 @@ #ifndef ADF_C62X_HW_DATA_H_ #define ADF_C62X_HW_DATA_H_ +#include + /* PCIe configuration space */ #define ADF_C62X_SRAM_BAR 0 #define ADF_C62X_PMISC_BAR 1 @@ -19,6 +21,11 @@ #define ADF_C62X_AE2FUNC_MAP_GRP_A_NUM_REGS 80 #define ADF_C62X_AE2FUNC_MAP_GRP_B_NUM_REGS 10 +/* Clocks frequency */ +#define ADF_C62X_AE_FREQ (685 * HZ_PER_MHZ) +#define ADF_C62X_MIN_AE_FREQ (533 * HZ_PER_MHZ) +#define ADF_C62X_MAX_AE_FREQ (800 * HZ_PER_MHZ) + /* Firmware Binary */ #define ADF_C62X_FW "qat_c62x.bin" #define ADF_C62X_MMP "qat_c62x_mmp.bin" diff --git a/drivers/crypto/intel/qat/qat_common/Makefile b/drivers/crypto/intel/qat/qat_common/Makefile index 6a82ef8df733..b3e32d2abf45 100644 --- a/drivers/crypto/intel/qat/qat_common/Makefile +++ b/drivers/crypto/intel/qat/qat_common/Makefile @@ -18,6 +18,7 @@ intel_qat-objs := adf_cfg.o \ adf_gen2_dc.o \ adf_gen4_dc.o \ adf_gen4_timer.o \ + adf_clock.o \ qat_crypto.o \ qat_compression.o \ qat_comp_algs.o \ diff --git a/drivers/crypto/intel/qat/qat_common/adf_accel_devices.h b/drivers/crypto/intel/qat/qat_common/adf_accel_devices.h index 2198b410b029..c96f59cb7de9 100644 --- a/drivers/crypto/intel/qat/qat_common/adf_accel_devices.h +++ b/drivers/crypto/intel/qat/qat_common/adf_accel_devices.h @@ -190,6 +190,8 @@ struct adf_hw_device_data { int (*send_admin_init)(struct adf_accel_dev *accel_dev); int (*start_timer)(struct adf_accel_dev *accel_dev); void (*stop_timer)(struct adf_accel_dev *accel_dev); + uint32_t (*get_hb_clock)(struct adf_hw_device_data *self); + int (*measure_clock)(struct adf_accel_dev *accel_dev); int (*init_arb)(struct adf_accel_dev *accel_dev); void (*exit_arb)(struct adf_accel_dev *accel_dev); const u32 *(*get_arb_mapping)(struct adf_accel_dev *accel_dev); diff --git a/drivers/crypto/intel/qat/qat_common/adf_admin.c b/drivers/crypto/intel/qat/qat_common/adf_admin.c index d6cb7f50bb5a..966e7ea271a2 100644 --- a/drivers/crypto/intel/qat/qat_common/adf_admin.c +++ b/drivers/crypto/intel/qat/qat_common/adf_admin.c @@ -15,6 +15,7 @@ #define ADF_CONST_TABLE_SIZE 1024 #define ADF_ADMIN_POLL_DELAY_US 20 #define ADF_ADMIN_POLL_TIMEOUT_US (5 * USEC_PER_SEC) +#define ADF_ONE_AE 1 static const u8 const_tab[1024] __aligned(1024) = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -194,6 +195,22 @@ static int adf_set_fw_constants(struct adf_accel_dev *accel_dev) return adf_send_admin(accel_dev, &req, &resp, ae_mask); } +int adf_get_fw_timestamp(struct adf_accel_dev *accel_dev, u64 *timestamp) +{ + struct icp_qat_fw_init_admin_req req = { }; + struct icp_qat_fw_init_admin_resp resp; + unsigned int ae_mask = ADF_ONE_AE; + int ret; + + req.cmd_id = ICP_QAT_FW_TIMER_GET; + ret = adf_send_admin(accel_dev, &req, &resp, ae_mask); + if (ret) + return ret; + + *timestamp = resp.timestamp; + return 0; +} + static int adf_get_dc_capabilities(struct adf_accel_dev *accel_dev, u32 *capabilities) { diff --git a/drivers/crypto/intel/qat/qat_common/adf_clock.c b/drivers/crypto/intel/qat/qat_common/adf_clock.c new file mode 100644 index 000000000000..dc0778691eb0 --- /dev/null +++ b/drivers/crypto/intel/qat/qat_common/adf_clock.c @@ -0,0 +1,131 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* Copyright(c) 2023 Intel Corporation */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "adf_accel_devices.h" +#include "adf_clock.h" +#include "adf_common_drv.h" + +#define MEASURE_CLOCK_RETRIES 10 +#define MEASURE_CLOCK_DELAY_US 10000 +#define ME_CLK_DIVIDER 16 +#define MEASURE_CLOCK_DELTA_THRESHOLD_US 100 + +static inline u64 timespec_to_us(const struct timespec64 *ts) +{ + return (u64)DIV_ROUND_CLOSEST_ULL(timespec64_to_ns(ts), NSEC_PER_USEC); +} + +static inline u64 timespec_to_ms(const struct timespec64 *ts) +{ + return (u64)DIV_ROUND_CLOSEST_ULL(timespec64_to_ns(ts), NSEC_PER_MSEC); +} + +u64 adf_clock_get_current_time(void) +{ + struct timespec64 ts; + + ktime_get_real_ts64(&ts); + return timespec_to_ms(&ts); +} + +static int measure_clock(struct adf_accel_dev *accel_dev, u32 *frequency) +{ + struct timespec64 ts1, ts2, ts3, ts4; + u64 timestamp1, timestamp2, temp; + u32 delta_us, tries; + int ret; + + tries = MEASURE_CLOCK_RETRIES; + do { + ktime_get_real_ts64(&ts1); + ret = adf_get_fw_timestamp(accel_dev, ×tamp1); + if (ret) { + dev_err(&GET_DEV(accel_dev), + "Failed to get fw timestamp\n"); + return ret; + } + ktime_get_real_ts64(&ts2); + delta_us = timespec_to_us(&ts2) - timespec_to_us(&ts1); + } while (delta_us > MEASURE_CLOCK_DELTA_THRESHOLD_US && --tries); + + if (!tries) { + dev_err(&GET_DEV(accel_dev), "Excessive clock measure delay\n"); + return -ETIMEDOUT; + } + + fsleep(MEASURE_CLOCK_DELAY_US); + + tries = MEASURE_CLOCK_RETRIES; + do { + ktime_get_real_ts64(&ts3); + if (adf_get_fw_timestamp(accel_dev, ×tamp2)) { + dev_err(&GET_DEV(accel_dev), + "Failed to get fw timestamp\n"); + return -EIO; + } + ktime_get_real_ts64(&ts4); + delta_us = timespec_to_us(&ts4) - timespec_to_us(&ts3); + } while (delta_us > MEASURE_CLOCK_DELTA_THRESHOLD_US && --tries); + + if (!tries) { + dev_err(&GET_DEV(accel_dev), "Excessive clock measure delay\n"); + return -ETIMEDOUT; + } + + delta_us = timespec_to_us(&ts3) - timespec_to_us(&ts1); + temp = (timestamp2 - timestamp1) * ME_CLK_DIVIDER * 10; + temp = DIV_ROUND_CLOSEST_ULL(temp, delta_us); + /* + * Enclose the division to allow the preprocessor to precalculate it, + * and avoid promoting r-value to 64-bit before division. + */ + *frequency = temp * (HZ_PER_MHZ / 10); + + return 0; +} + +/** + * adf_dev_measure_clock() - measures device clock frequency + * @accel_dev: Pointer to acceleration device. + * @frequency: Pointer to variable where result will be stored + * @min: Minimal allowed frequency value + * @max: Maximal allowed frequency value + * + * If the measurement result will go beyond the min/max thresholds the value + * will take the value of the crossed threshold. + * + * This algorithm compares the device firmware timestamp with the kernel + * timestamp. So we can't expect too high accuracy from this measurement. + * + * Return: + * * 0 - measurement succeed + * * -ETIMEDOUT - measurement failed + */ +int adf_dev_measure_clock(struct adf_accel_dev *accel_dev, + u32 *frequency, u32 min, u32 max) +{ + int ret; + u32 freq; + + ret = measure_clock(accel_dev, &freq); + if (ret) + return ret; + + *frequency = clamp(freq, min, max); + + if (*frequency != freq) + dev_warn(&GET_DEV(accel_dev), + "Measured clock %d Hz is out of range, assuming %d\n", + freq, *frequency); + return 0; +} +EXPORT_SYMBOL_GPL(adf_dev_measure_clock); diff --git a/drivers/crypto/intel/qat/qat_common/adf_clock.h b/drivers/crypto/intel/qat/qat_common/adf_clock.h new file mode 100644 index 000000000000..e309bc0dc35c --- /dev/null +++ b/drivers/crypto/intel/qat/qat_common/adf_clock.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright(c) 2023 Intel Corporation */ +#ifndef ADF_CLOCK_H +#define ADF_CLOCK_H + +#include + +struct adf_accel_dev; + +int adf_dev_measure_clock(struct adf_accel_dev *accel_dev, u32 *frequency, + u32 min, u32 max); +u64 adf_clock_get_current_time(void); + +#endif diff --git a/drivers/crypto/intel/qat/qat_common/adf_common_drv.h b/drivers/crypto/intel/qat/qat_common/adf_common_drv.h index e0d472071354..a9552832858f 100644 --- a/drivers/crypto/intel/qat/qat_common/adf_common_drv.h +++ b/drivers/crypto/intel/qat/qat_common/adf_common_drv.h @@ -97,6 +97,7 @@ int adf_send_admin_init(struct adf_accel_dev *accel_dev); int adf_get_ae_fw_counters(struct adf_accel_dev *accel_dev, u16 ae, u64 *reqs, u64 *resps); int adf_init_admin_pm(struct adf_accel_dev *accel_dev, u32 idle_delay); int adf_send_admin_tim_sync(struct adf_accel_dev *accel_dev, u32 cnt); +int adf_get_fw_timestamp(struct adf_accel_dev *accel_dev, u64 *timestamp); int adf_init_arb(struct adf_accel_dev *accel_dev); void adf_exit_arb(struct adf_accel_dev *accel_dev); void adf_update_ring_arb(struct adf_etr_ring_data *ring); diff --git a/drivers/crypto/intel/qat/qat_common/adf_init.c b/drivers/crypto/intel/qat/qat_common/adf_init.c index 0acba0f988da..53fca6a7e2af 100644 --- a/drivers/crypto/intel/qat/qat_common/adf_init.c +++ b/drivers/crypto/intel/qat/qat_common/adf_init.c @@ -178,6 +178,14 @@ static int adf_dev_start(struct adf_accel_dev *accel_dev) return -EFAULT; } + if (hw_data->measure_clock) { + ret = hw_data->measure_clock(accel_dev); + if (ret) { + dev_err(&GET_DEV(accel_dev), "Failed measure device clock\n"); + return ret; + } + } + /* Set ssm watch dog timer */ if (hw_data->set_ssm_wdtimer) hw_data->set_ssm_wdtimer(accel_dev); diff --git a/drivers/crypto/intel/qat/qat_common/icp_qat_fw_init_admin.h b/drivers/crypto/intel/qat/qat_common/icp_qat_fw_init_admin.h index 6ea19b4fb0ce..e836fbaeec62 100644 --- a/drivers/crypto/intel/qat/qat_common/icp_qat_fw_init_admin.h +++ b/drivers/crypto/intel/qat/qat_common/icp_qat_fw_init_admin.h @@ -16,6 +16,7 @@ enum icp_qat_fw_init_admin_cmd_id { ICP_QAT_FW_HEARTBEAT_SYNC = 7, ICP_QAT_FW_HEARTBEAT_GET = 8, ICP_QAT_FW_COMP_CAPABILITY_GET = 9, + ICP_QAT_FW_TIMER_GET = 19, ICP_QAT_FW_PM_STATE_CONFIG = 128, }; diff --git a/drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c b/drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c index 1ebe0b351fae..c57403a6fbac 100644 --- a/drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c +++ b/drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c @@ -44,6 +44,14 @@ static u32 get_misc_bar_id(struct adf_hw_device_data *self) return ADF_DH895XCC_PMISC_BAR; } +static u32 get_ts_clock(struct adf_hw_device_data *self) +{ + /* + * Timestamp update interval is 16 AE clock ticks for dh895xcc. + */ + return self->clock_frequency / 16; +} + static u32 get_etr_bar_id(struct adf_hw_device_data *self) { return ADF_DH895XCC_ETR_BAR; @@ -237,6 +245,8 @@ void adf_init_hw_data_dh895xcc(struct adf_hw_device_data *hw_data) hw_data->reset_device = adf_reset_sbr; hw_data->disable_iov = adf_disable_sriov; hw_data->dev_config = adf_gen2_dev_config; + hw_data->clock_frequency = ADF_DH895X_AE_FREQ; + hw_data->get_hb_clock = get_ts_clock; adf_gen2_init_pf_pfvf_ops(&hw_data->pfvf_ops); hw_data->pfvf_ops.enable_vf2pf_interrupts = enable_vf2pf_interrupts; diff --git a/drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.h b/drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.h index 7b674bbe4192..cd3a21985455 100644 --- a/drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.h +++ b/drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.h @@ -3,6 +3,8 @@ #ifndef ADF_DH895x_HW_DATA_H_ #define ADF_DH895x_HW_DATA_H_ +#include + /* PCIe configuration space */ #define ADF_DH895XCC_SRAM_BAR 0 #define ADF_DH895XCC_PMISC_BAR 1 @@ -30,6 +32,9 @@ #define ADF_DH895XCC_AE2FUNC_MAP_GRP_A_NUM_REGS 96 #define ADF_DH895XCC_AE2FUNC_MAP_GRP_B_NUM_REGS 12 +/* Clocks frequency */ +#define ADF_DH895X_AE_FREQ (933 * HZ_PER_MHZ) + /* FW names */ #define ADF_DH895XCC_FW "qat_895xcc.bin" #define ADF_DH895XCC_MMP "qat_895xcc_mmp.bin" From 359b84f8db942ef46d24de8aa397790c3fae22e0 Mon Sep 17 00:00:00 2001 From: Damian Muszynski Date: Fri, 30 Jun 2023 19:03:57 +0200 Subject: [PATCH 121/656] crypto: qat - add heartbeat feature Under some circumstances, firmware in the QAT devices could become unresponsive. The Heartbeat feature provides a mechanism to detect unresponsive devices. The QAT FW periodically writes to memory a set of counters that allow to detect the liveness of a device. This patch adds logic to enable the reporting of those counters, analyze them and report if a device is alive or not. In particular this adds (1) heartbeat enabling, reading and detection logic (2) reporting of heartbeat status and configuration via debugfs (3) documentation for the newly created sysfs entries (4) configuration of FW settings related to heartbeat, e.g. tick period (5) logic to convert time in ms (provided by the user) to clock ticks This patch introduces a new folder in debugfs called heartbeat with the following attributes: - status - queries_sent - queries_failed - config All attributes except config are reading only. In particular: - `status` file returns 0 when device is operational and -1 otherwise. - `queries_sent` returns the total number of heartbeat queries sent. - `queries_failed` returns the total number of heartbeat queries failed. - `config` allows to adjust the frequency at which the firmware writes counters to memory. This period is given in milliseconds and it is fixed for GEN4 devices. Signed-off-by: Damian Muszynski Reviewed-by: Giovanni Cabiddu Reviewed-by: Andy Shevchenko Signed-off-by: Herbert Xu --- Documentation/ABI/testing/debugfs-driver-qat | 51 ++++ .../intel/qat/qat_4xxx/adf_4xxx_hw_data.c | 1 + drivers/crypto/intel/qat/qat_4xxx/adf_drv.c | 3 + .../intel/qat/qat_c3xxx/adf_c3xxx_hw_data.c | 1 + .../intel/qat/qat_c62x/adf_c62x_hw_data.c | 1 + drivers/crypto/intel/qat/qat_common/Makefile | 2 + .../intel/qat/qat_common/adf_accel_devices.h | 7 + .../crypto/intel/qat/qat_common/adf_admin.c | 14 + .../intel/qat/qat_common/adf_cfg_strings.h | 2 + .../intel/qat/qat_common/adf_common_drv.h | 1 + .../crypto/intel/qat/qat_common/adf_dbgfs.c | 9 +- .../intel/qat/qat_common/adf_gen2_config.c | 7 + .../intel/qat/qat_common/adf_gen2_hw_data.h | 3 + .../intel/qat/qat_common/adf_gen4_hw_data.h | 3 + .../intel/qat/qat_common/adf_heartbeat.c | 268 ++++++++++++++++++ .../intel/qat/qat_common/adf_heartbeat.h | 73 +++++ .../qat/qat_common/adf_heartbeat_dbgfs.c | 194 +++++++++++++ .../qat/qat_common/adf_heartbeat_dbgfs.h | 12 + .../crypto/intel/qat/qat_common/adf_init.c | 7 + .../qat/qat_common/icp_qat_fw_init_admin.h | 4 + .../qat/qat_dh895xcc/adf_dh895xcc_hw_data.c | 1 + 21 files changed, 662 insertions(+), 2 deletions(-) create mode 100644 drivers/crypto/intel/qat/qat_common/adf_heartbeat.c create mode 100644 drivers/crypto/intel/qat/qat_common/adf_heartbeat.h create mode 100644 drivers/crypto/intel/qat/qat_common/adf_heartbeat_dbgfs.c create mode 100644 drivers/crypto/intel/qat/qat_common/adf_heartbeat_dbgfs.h diff --git a/Documentation/ABI/testing/debugfs-driver-qat b/Documentation/ABI/testing/debugfs-driver-qat index 22d39c0ca1b2..6731ffacc5f0 100644 --- a/Documentation/ABI/testing/debugfs-driver-qat +++ b/Documentation/ABI/testing/debugfs-driver-qat @@ -8,3 +8,54 @@ Description: (RO) Read returns the number of requests sent to the FW and the num : Number of requests sent from Acceleration Engine N to FW and responses Acceleration Engine N received from FW + +What: /sys/kernel/debug/qat__/heartbeat/config +Date: November 2023 +KernelVersion: 6.6 +Contact: qat-linux@intel.com +Description: (RW) Read returns value of the Heartbeat update period. + Write to the file changes this period value. + + This period should reflect planned polling interval of device + health status. High frequency Heartbeat monitoring wastes CPU cycles + but minimizes the customer’s system downtime. Also, if there are + large service requests that take some time to complete, high frequency + Heartbeat monitoring could result in false reports of unresponsiveness + and in those cases, period needs to be increased. + + This parameter is effective only for c3xxx, c62x, dh895xcc devices. + 4xxx has this value internally fixed to 200ms. + + Default value is set to 500. Minimal allowed value is 200. + All values are expressed in milliseconds. + +What: /sys/kernel/debug/qat__/heartbeat/queries_failed +Date: November 2023 +KernelVersion: 6.6 +Contact: qat-linux@intel.com +Description: (RO) Read returns the number of times the device became unresponsive. + + Attribute returns value of the counter which is incremented when + status query results negative. + +What: /sys/kernel/debug/qat__/heartbeat/queries_sent +Date: November 2023 +KernelVersion: 6.6 +Contact: qat-linux@intel.com +Description: (RO) Read returns the number of times the control process checked + if the device is responsive. + + Attribute returns value of the counter which is incremented on + every status query. + +What: /sys/kernel/debug/qat__/heartbeat/status +Date: November 2023 +KernelVersion: 6.6 +Contact: qat-linux@intel.com +Description: (RO) Read returns the device health status. + + Returns 0 when device is healthy or -1 when is unresponsive + or the query failed to send. + + The driver does not monitor for Heartbeat. It is left for a user + to poll the status periodically. diff --git a/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c b/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c index 9cda0c17992a..268a1f7694fc 100644 --- a/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c +++ b/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c @@ -521,6 +521,7 @@ void adf_init_hw_data_4xxx(struct adf_hw_device_data *hw_data, u32 dev_id) hw_data->start_timer = adf_gen4_timer_start; hw_data->stop_timer = adf_gen4_timer_stop; hw_data->get_hb_clock = get_heartbeat_clock; + hw_data->num_hb_ctrs = ADF_NUM_HB_CNT_PER_AE; adf_gen4_init_hw_csr_ops(&hw_data->csr_ops); adf_gen4_init_pf_pfvf_ops(&hw_data->pfvf_ops); diff --git a/drivers/crypto/intel/qat/qat_4xxx/adf_drv.c b/drivers/crypto/intel/qat/qat_4xxx/adf_drv.c index 1a15600361d0..6d4e2e139ffa 100644 --- a/drivers/crypto/intel/qat/qat_4xxx/adf_drv.c +++ b/drivers/crypto/intel/qat/qat_4xxx/adf_drv.c @@ -8,6 +8,7 @@ #include #include #include +#include #include "adf_4xxx_hw_data.h" #include "qat_compression.h" @@ -77,6 +78,8 @@ static int adf_cfg_dev_init(struct adf_accel_dev *accel_dev) if (ret) return ret; + adf_heartbeat_save_cfg_param(accel_dev, ADF_CFG_HB_TIMER_MIN_MS); + return 0; } diff --git a/drivers/crypto/intel/qat/qat_c3xxx/adf_c3xxx_hw_data.c b/drivers/crypto/intel/qat/qat_c3xxx/adf_c3xxx_hw_data.c index 2c6a1dd9780c..e81d11409426 100644 --- a/drivers/crypto/intel/qat/qat_c3xxx/adf_c3xxx_hw_data.c +++ b/drivers/crypto/intel/qat/qat_c3xxx/adf_c3xxx_hw_data.c @@ -152,6 +152,7 @@ void adf_init_hw_data_c3xxx(struct adf_hw_device_data *hw_data) hw_data->dev_config = adf_gen2_dev_config; hw_data->measure_clock = measure_clock; hw_data->get_hb_clock = get_ts_clock; + hw_data->num_hb_ctrs = ADF_NUM_HB_CNT_PER_AE; adf_gen2_init_pf_pfvf_ops(&hw_data->pfvf_ops); adf_gen2_init_hw_csr_ops(&hw_data->csr_ops); diff --git a/drivers/crypto/intel/qat/qat_c62x/adf_c62x_hw_data.c b/drivers/crypto/intel/qat/qat_c62x/adf_c62x_hw_data.c index 081702be839e..1a8c8e3a48e9 100644 --- a/drivers/crypto/intel/qat/qat_c62x/adf_c62x_hw_data.c +++ b/drivers/crypto/intel/qat/qat_c62x/adf_c62x_hw_data.c @@ -154,6 +154,7 @@ void adf_init_hw_data_c62x(struct adf_hw_device_data *hw_data) hw_data->dev_config = adf_gen2_dev_config; hw_data->measure_clock = measure_clock; hw_data->get_hb_clock = get_ts_clock; + hw_data->num_hb_ctrs = ADF_NUM_HB_CNT_PER_AE; adf_gen2_init_pf_pfvf_ops(&hw_data->pfvf_ops); adf_gen2_init_hw_csr_ops(&hw_data->csr_ops); diff --git a/drivers/crypto/intel/qat/qat_common/Makefile b/drivers/crypto/intel/qat/qat_common/Makefile index b3e32d2abf45..43622c7fca71 100644 --- a/drivers/crypto/intel/qat/qat_common/Makefile +++ b/drivers/crypto/intel/qat/qat_common/Makefile @@ -31,6 +31,8 @@ intel_qat-objs := adf_cfg.o \ intel_qat-$(CONFIG_DEBUG_FS) += adf_transport_debug.o \ adf_fw_counters.o \ + adf_heartbeat.o \ + adf_heartbeat_dbgfs.o \ adf_dbgfs.o intel_qat-$(CONFIG_PCI_IOV) += adf_sriov.o adf_vf_isr.o adf_pfvf_utils.o \ diff --git a/drivers/crypto/intel/qat/qat_common/adf_accel_devices.h b/drivers/crypto/intel/qat/qat_common/adf_accel_devices.h index c96f59cb7de9..ab897e1717e0 100644 --- a/drivers/crypto/intel/qat/qat_common/adf_accel_devices.h +++ b/drivers/crypto/intel/qat/qat_common/adf_accel_devices.h @@ -233,6 +233,7 @@ struct adf_hw_device_data { u8 num_accel; u8 num_logical_accel; u8 num_engines; + u32 num_hb_ctrs; }; /* CSR write macro */ @@ -245,6 +246,11 @@ struct adf_hw_device_data { #define ADF_CFG_NUM_SERVICES 4 #define ADF_SRV_TYPE_BIT_LEN 3 #define ADF_SRV_TYPE_MASK 0x7 +#define ADF_AE_ADMIN_THREAD 7 +#define ADF_NUM_THREADS_PER_AE 8 +#define ADF_NUM_PKE_STRAND 2 +#define ADF_AE_STRAND0_THREAD 8 +#define ADF_AE_STRAND1_THREAD 9 #define GET_DEV(accel_dev) ((accel_dev)->accel_pci_dev.pci_dev->dev) #define GET_BARS(accel_dev) ((accel_dev)->accel_pci_dev.pci_bars) @@ -301,6 +307,7 @@ struct adf_accel_dev { struct module *owner; struct adf_accel_pci accel_pci_dev; struct adf_timer *timer; + struct adf_heartbeat *heartbeat; union { struct { /* protects VF2PF interrupts access */ diff --git a/drivers/crypto/intel/qat/qat_common/adf_admin.c b/drivers/crypto/intel/qat/qat_common/adf_admin.c index 966e7ea271a2..ff790823b868 100644 --- a/drivers/crypto/intel/qat/qat_common/adf_admin.c +++ b/drivers/crypto/intel/qat/qat_common/adf_admin.c @@ -8,6 +8,7 @@ #include #include "adf_accel_devices.h" #include "adf_common_drv.h" +#include "adf_heartbeat.h" #include "icp_qat_fw_init_admin.h" #define ADF_ADMIN_MAILBOX_STRIDE 0x1000 @@ -270,6 +271,19 @@ int adf_send_admin_tim_sync(struct adf_accel_dev *accel_dev, u32 cnt) return adf_send_admin(accel_dev, &req, &resp, ae_mask); } +int adf_send_admin_hb_timer(struct adf_accel_dev *accel_dev, uint32_t ticks) +{ + u32 ae_mask = accel_dev->hw_device->ae_mask; + struct icp_qat_fw_init_admin_req req = { }; + struct icp_qat_fw_init_admin_resp resp; + + req.cmd_id = ICP_QAT_FW_HEARTBEAT_TIMER_SET; + req.init_cfg_ptr = accel_dev->heartbeat->dma.phy_addr; + req.heartbeat_ticks = ticks; + + return adf_send_admin(accel_dev, &req, &resp, ae_mask); +} + /** * adf_send_admin_init() - Function sends init message to FW * @accel_dev: Pointer to acceleration device. diff --git a/drivers/crypto/intel/qat/qat_common/adf_cfg_strings.h b/drivers/crypto/intel/qat/qat_common/adf_cfg_strings.h index 3ae1e5caee0e..6066dc637352 100644 --- a/drivers/crypto/intel/qat/qat_common/adf_cfg_strings.h +++ b/drivers/crypto/intel/qat/qat_common/adf_cfg_strings.h @@ -47,4 +47,6 @@ #define ADF_ETRMGR_CORE_AFFINITY_FORMAT \ ADF_ETRMGR_BANK "%d" ADF_ETRMGR_CORE_AFFINITY #define ADF_ACCEL_STR "Accelerator%d" +#define ADF_HEARTBEAT_TIMER "HeartbeatTimer" + #endif diff --git a/drivers/crypto/intel/qat/qat_common/adf_common_drv.h b/drivers/crypto/intel/qat/qat_common/adf_common_drv.h index a9552832858f..799a2193d3e5 100644 --- a/drivers/crypto/intel/qat/qat_common/adf_common_drv.h +++ b/drivers/crypto/intel/qat/qat_common/adf_common_drv.h @@ -97,6 +97,7 @@ int adf_send_admin_init(struct adf_accel_dev *accel_dev); int adf_get_ae_fw_counters(struct adf_accel_dev *accel_dev, u16 ae, u64 *reqs, u64 *resps); int adf_init_admin_pm(struct adf_accel_dev *accel_dev, u32 idle_delay); int adf_send_admin_tim_sync(struct adf_accel_dev *accel_dev, u32 cnt); +int adf_send_admin_hb_timer(struct adf_accel_dev *accel_dev, uint32_t ticks); int adf_get_fw_timestamp(struct adf_accel_dev *accel_dev, u64 *timestamp); int adf_init_arb(struct adf_accel_dev *accel_dev); void adf_exit_arb(struct adf_accel_dev *accel_dev); diff --git a/drivers/crypto/intel/qat/qat_common/adf_dbgfs.c b/drivers/crypto/intel/qat/qat_common/adf_dbgfs.c index 5080ecffab03..04845f8d72be 100644 --- a/drivers/crypto/intel/qat/qat_common/adf_dbgfs.c +++ b/drivers/crypto/intel/qat/qat_common/adf_dbgfs.c @@ -7,6 +7,7 @@ #include "adf_common_drv.h" #include "adf_dbgfs.h" #include "adf_fw_counters.h" +#include "adf_heartbeat_dbgfs.h" /** * adf_dbgfs_init() - add persistent debugfs entries @@ -58,8 +59,10 @@ void adf_dbgfs_add(struct adf_accel_dev *accel_dev) if (!accel_dev->debugfs_dir) return; - if (!accel_dev->is_vf) + if (!accel_dev->is_vf) { adf_fw_counters_dbgfs_add(accel_dev); + adf_heartbeat_dbgfs_add(accel_dev); + } } /** @@ -71,6 +74,8 @@ void adf_dbgfs_rm(struct adf_accel_dev *accel_dev) if (!accel_dev->debugfs_dir) return; - if (!accel_dev->is_vf) + if (!accel_dev->is_vf) { + adf_heartbeat_dbgfs_rm(accel_dev); adf_fw_counters_dbgfs_rm(accel_dev); + } } diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen2_config.c b/drivers/crypto/intel/qat/qat_common/adf_gen2_config.c index eeb30da7587a..c27ff6d18e11 100644 --- a/drivers/crypto/intel/qat/qat_common/adf_gen2_config.c +++ b/drivers/crypto/intel/qat/qat_common/adf_gen2_config.c @@ -7,6 +7,7 @@ #include "adf_common_drv.h" #include "qat_crypto.h" #include "qat_compression.h" +#include "adf_heartbeat.h" #include "adf_transport_access_macros.h" static int adf_gen2_crypto_dev_config(struct adf_accel_dev *accel_dev) @@ -195,6 +196,12 @@ int adf_gen2_dev_config(struct adf_accel_dev *accel_dev) if (ret) goto err; + ret = adf_cfg_section_add(accel_dev, ADF_GENERAL_SEC); + if (ret) + goto err; + + adf_heartbeat_save_cfg_param(accel_dev, ADF_CFG_HB_TIMER_DEFAULT_MS); + set_bit(ADF_STATUS_CONFIGURED, &accel_dev->status); return ret; diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen2_hw_data.h b/drivers/crypto/intel/qat/qat_common/adf_gen2_hw_data.h index e4bc07529be4..6bd341061de4 100644 --- a/drivers/crypto/intel/qat/qat_common/adf_gen2_hw_data.h +++ b/drivers/crypto/intel/qat/qat_common/adf_gen2_hw_data.h @@ -145,6 +145,9 @@ do { \ #define ADF_GEN2_CERRSSMSH(i) ((i) * 0x4000 + 0x10) #define ADF_GEN2_ERRSSMSH_EN BIT(3) +/* Number of heartbeat counter pairs */ +#define ADF_NUM_HB_CNT_PER_AE ADF_NUM_THREADS_PER_AE + /* Interrupts */ #define ADF_GEN2_SMIAPF0_MASK_OFFSET (0x3A000 + 0x28) #define ADF_GEN2_SMIAPF1_MASK_OFFSET (0x3A000 + 0x30) diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.h b/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.h index 4fb4b3df5a18..02d7a019ebf8 100644 --- a/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.h +++ b/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.h @@ -136,6 +136,9 @@ do { \ #define ADF_GEN4_VFLNOTIFY BIT(7) +/* Number of heartbeat counter pairs */ +#define ADF_NUM_HB_CNT_PER_AE ADF_NUM_THREADS_PER_AE + void adf_gen4_set_ssm_wdtimer(struct adf_accel_dev *accel_dev); void adf_gen4_init_hw_csr_ops(struct adf_hw_csr_ops *csr_ops); int adf_gen4_ring_pair_reset(struct adf_accel_dev *accel_dev, u32 bank_number); diff --git a/drivers/crypto/intel/qat/qat_common/adf_heartbeat.c b/drivers/crypto/intel/qat/qat_common/adf_heartbeat.c new file mode 100644 index 000000000000..7358aac8e56d --- /dev/null +++ b/drivers/crypto/intel/qat/qat_common/adf_heartbeat.c @@ -0,0 +1,268 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* Copyright(c) 2023 Intel Corporation */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "adf_accel_devices.h" +#include "adf_cfg.h" +#include "adf_cfg_strings.h" +#include "adf_clock.h" +#include "adf_common_drv.h" +#include "adf_heartbeat.h" +#include "adf_transport_internal.h" +#include "icp_qat_fw_init_admin.h" + +/* Heartbeat counter pair */ +struct hb_cnt_pair { + __u16 resp_heartbeat_cnt; + __u16 req_heartbeat_cnt; +}; + +static int adf_hb_check_polling_freq(struct adf_accel_dev *accel_dev) +{ + u64 curr_time = adf_clock_get_current_time(); + u64 polling_time = curr_time - accel_dev->heartbeat->last_hb_check_time; + + if (polling_time < accel_dev->heartbeat->hb_timer) { + dev_warn(&GET_DEV(accel_dev), + "HB polling too frequent. Configured HB timer %d ms\n", + accel_dev->heartbeat->hb_timer); + return -EINVAL; + } + + accel_dev->heartbeat->last_hb_check_time = curr_time; + return 0; +} + +static int get_timer_ticks(struct adf_accel_dev *accel_dev, unsigned int *value) +{ + char timer_str[ADF_CFG_MAX_VAL_LEN_IN_BYTES] = { }; + u32 timer_ms = ADF_CFG_HB_TIMER_DEFAULT_MS; + int cfg_read_status; + u32 ticks; + int ret; + + cfg_read_status = adf_cfg_get_param_value(accel_dev, ADF_GENERAL_SEC, + ADF_HEARTBEAT_TIMER, timer_str); + if (cfg_read_status == 0) { + if (kstrtouint(timer_str, 10, &timer_ms)) + dev_dbg(&GET_DEV(accel_dev), + "kstrtouint failed to parse the %s, param value", + ADF_HEARTBEAT_TIMER); + } + + if (timer_ms < ADF_CFG_HB_TIMER_MIN_MS) { + dev_err(&GET_DEV(accel_dev), "Timer cannot be less than %u\n", + ADF_CFG_HB_TIMER_MIN_MS); + return -EINVAL; + } + + /* + * On 4xxx devices adf_timer is responsible for HB updates and + * its period is fixed to 200ms + */ + if (accel_dev->timer) + timer_ms = ADF_CFG_HB_TIMER_MIN_MS; + + ret = adf_heartbeat_ms_to_ticks(accel_dev, timer_ms, &ticks); + if (ret) + return ret; + + adf_heartbeat_save_cfg_param(accel_dev, timer_ms); + + accel_dev->heartbeat->hb_timer = timer_ms; + *value = ticks; + + return 0; +} + +static int check_ae(struct hb_cnt_pair *curr, struct hb_cnt_pair *prev, + u16 *count, const size_t hb_ctrs) +{ + size_t thr; + + /* loop through all threads in AE */ + for (thr = 0; thr < hb_ctrs; thr++) { + u16 req = curr[thr].req_heartbeat_cnt; + u16 resp = curr[thr].resp_heartbeat_cnt; + u16 last = prev[thr].resp_heartbeat_cnt; + + if ((thr == ADF_AE_ADMIN_THREAD || req != resp) && resp == last) { + u16 retry = ++count[thr]; + + if (retry >= ADF_CFG_HB_COUNT_THRESHOLD) + return -EIO; + + } else { + count[thr] = 0; + } + } + return 0; +} + +static int adf_hb_get_status(struct adf_accel_dev *accel_dev) +{ + struct adf_hw_device_data *hw_device = accel_dev->hw_device; + struct hb_cnt_pair *live_stats, *last_stats, *curr_stats; + const size_t hb_ctrs = hw_device->num_hb_ctrs; + const unsigned long ae_mask = hw_device->ae_mask; + const size_t max_aes = hw_device->num_engines; + const size_t dev_ctrs = size_mul(max_aes, hb_ctrs); + const size_t stats_size = size_mul(dev_ctrs, sizeof(*curr_stats)); + struct hb_cnt_pair *ae_curr_p, *ae_prev_p; + u16 *count_fails, *ae_count_p; + size_t ae_offset; + size_t ae = 0; + int ret = 0; + + live_stats = accel_dev->heartbeat->dma.virt_addr; + last_stats = live_stats + dev_ctrs; + count_fails = (u16 *)(last_stats + dev_ctrs); + + curr_stats = kmemdup(live_stats, stats_size, GFP_KERNEL); + if (!curr_stats) + return -ENOMEM; + + /* loop through active AEs */ + for_each_set_bit(ae, &ae_mask, max_aes) { + ae_offset = size_mul(ae, hb_ctrs); + ae_curr_p = curr_stats + ae_offset; + ae_prev_p = last_stats + ae_offset; + ae_count_p = count_fails + ae_offset; + + ret = check_ae(ae_curr_p, ae_prev_p, ae_count_p, hb_ctrs); + if (ret) + break; + } + + /* Copy current stats for the next iteration */ + memcpy(last_stats, curr_stats, stats_size); + kfree(curr_stats); + + return ret; +} + +void adf_heartbeat_status(struct adf_accel_dev *accel_dev, + enum adf_device_heartbeat_status *hb_status) +{ + struct adf_heartbeat *hb; + + if (!adf_dev_started(accel_dev) || + test_bit(ADF_STATUS_RESTARTING, &accel_dev->status)) { + *hb_status = HB_DEV_UNRESPONSIVE; + return; + } + + if (adf_hb_check_polling_freq(accel_dev) == -EINVAL) { + *hb_status = HB_DEV_UNSUPPORTED; + return; + } + + hb = accel_dev->heartbeat; + hb->hb_sent_counter++; + + if (adf_hb_get_status(accel_dev)) { + dev_err(&GET_DEV(accel_dev), + "Heartbeat ERROR: QAT is not responding.\n"); + *hb_status = HB_DEV_UNRESPONSIVE; + hb->hb_failed_counter++; + return; + } + + *hb_status = HB_DEV_ALIVE; +} + +int adf_heartbeat_ms_to_ticks(struct adf_accel_dev *accel_dev, unsigned int time_ms, + u32 *value) +{ + struct adf_hw_device_data *hw_data = accel_dev->hw_device; + u32 clk_per_sec; + + /* HB clock may be different than AE clock */ + if (!hw_data->get_hb_clock) + return -EINVAL; + + clk_per_sec = hw_data->get_hb_clock(hw_data); + *value = time_ms * (clk_per_sec / MSEC_PER_SEC); + + return 0; +} + +int adf_heartbeat_save_cfg_param(struct adf_accel_dev *accel_dev, + unsigned int timer_ms) +{ + char timer_str[ADF_CFG_MAX_VAL_LEN_IN_BYTES]; + + snprintf(timer_str, sizeof(timer_str), "%u", timer_ms); + return adf_cfg_add_key_value_param(accel_dev, ADF_GENERAL_SEC, + ADF_HEARTBEAT_TIMER, timer_str, + ADF_STR); +} +EXPORT_SYMBOL_GPL(adf_heartbeat_save_cfg_param); + +int adf_heartbeat_init(struct adf_accel_dev *accel_dev) +{ + struct adf_heartbeat *hb; + + hb = kzalloc(sizeof(*hb), GFP_KERNEL); + if (!hb) + goto err_ret; + + hb->dma.virt_addr = dma_alloc_coherent(&GET_DEV(accel_dev), PAGE_SIZE, + &hb->dma.phy_addr, GFP_KERNEL); + if (!hb->dma.virt_addr) + goto err_free; + + accel_dev->heartbeat = hb; + + return 0; + +err_free: + kfree(hb); +err_ret: + return -ENOMEM; +} + +int adf_heartbeat_start(struct adf_accel_dev *accel_dev) +{ + unsigned int timer_ticks; + int ret; + + if (!accel_dev->heartbeat) { + dev_warn(&GET_DEV(accel_dev), "Heartbeat instance not found!"); + return -EFAULT; + } + + ret = get_timer_ticks(accel_dev, &timer_ticks); + if (ret) + return ret; + + ret = adf_send_admin_hb_timer(accel_dev, timer_ticks); + if (ret) + dev_warn(&GET_DEV(accel_dev), "Heartbeat not supported!"); + + return ret; +} + +void adf_heartbeat_shutdown(struct adf_accel_dev *accel_dev) +{ + struct adf_heartbeat *hb = accel_dev->heartbeat; + + if (!hb) + return; + + if (hb->dma.virt_addr) + dma_free_coherent(&GET_DEV(accel_dev), PAGE_SIZE, + hb->dma.virt_addr, hb->dma.phy_addr); + + kfree(hb); + accel_dev->heartbeat = NULL; +} diff --git a/drivers/crypto/intel/qat/qat_common/adf_heartbeat.h b/drivers/crypto/intel/qat/qat_common/adf_heartbeat.h new file mode 100644 index 000000000000..297147f44150 --- /dev/null +++ b/drivers/crypto/intel/qat/qat_common/adf_heartbeat.h @@ -0,0 +1,73 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright(c) 2023 Intel Corporation */ + +#ifndef ADF_HEARTBEAT_H_ +#define ADF_HEARTBEAT_H_ + +#include + +struct adf_accel_dev; +struct dentry; + +#define ADF_CFG_HB_TIMER_MIN_MS 200 +#define ADF_CFG_HB_TIMER_DEFAULT_MS 500 +#define ADF_CFG_HB_COUNT_THRESHOLD 3 + +enum adf_device_heartbeat_status { + HB_DEV_UNRESPONSIVE = 0, + HB_DEV_ALIVE, + HB_DEV_UNSUPPORTED, +}; + +struct adf_heartbeat { + unsigned int hb_sent_counter; + unsigned int hb_failed_counter; + unsigned int hb_timer; + u64 last_hb_check_time; + struct hb_dma_addr { + dma_addr_t phy_addr; + void *virt_addr; + } dma; + struct { + struct dentry *base_dir; + struct dentry *status; + struct dentry *cfg; + struct dentry *sent; + struct dentry *failed; + } dbgfs; +}; + +#ifdef CONFIG_DEBUG_FS +int adf_heartbeat_init(struct adf_accel_dev *accel_dev); +int adf_heartbeat_start(struct adf_accel_dev *accel_dev); +void adf_heartbeat_shutdown(struct adf_accel_dev *accel_dev); + +int adf_heartbeat_ms_to_ticks(struct adf_accel_dev *accel_dev, unsigned int time_ms, + uint32_t *value); +int adf_heartbeat_save_cfg_param(struct adf_accel_dev *accel_dev, + unsigned int timer_ms); +void adf_heartbeat_status(struct adf_accel_dev *accel_dev, + enum adf_device_heartbeat_status *hb_status); + +#else +static inline int adf_heartbeat_init(struct adf_accel_dev *accel_dev) +{ + return 0; +} + +static inline int adf_heartbeat_start(struct adf_accel_dev *accel_dev) +{ + return 0; +} + +static inline void adf_heartbeat_shutdown(struct adf_accel_dev *accel_dev) +{ +} + +static inline int adf_heartbeat_save_cfg_param(struct adf_accel_dev *accel_dev, + unsigned int timer_ms) +{ + return 0; +} +#endif +#endif /* ADF_HEARTBEAT_H_ */ diff --git a/drivers/crypto/intel/qat/qat_common/adf_heartbeat_dbgfs.c b/drivers/crypto/intel/qat/qat_common/adf_heartbeat_dbgfs.c new file mode 100644 index 000000000000..803cbfd838f0 --- /dev/null +++ b/drivers/crypto/intel/qat/qat_common/adf_heartbeat_dbgfs.c @@ -0,0 +1,194 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* Copyright(c) 2023 Intel Corporation */ + +#include +#include +#include +#include +#include +#include +#include +#include "adf_cfg.h" +#include "adf_common_drv.h" +#include "adf_heartbeat.h" +#include "adf_heartbeat_dbgfs.h" + +#define HB_OK 0 +#define HB_ERROR -1 +#define HB_STATUS_MAX_STRLEN 4 +#define HB_STATS_MAX_STRLEN 16 + +static ssize_t adf_hb_stats_read(struct file *file, char __user *user_buffer, + size_t count, loff_t *ppos) +{ + char buf[HB_STATS_MAX_STRLEN]; + unsigned int *value; + int len; + + if (*ppos > 0) + return 0; + + value = file->private_data; + len = scnprintf(buf, sizeof(buf), "%u\n", *value); + + return simple_read_from_buffer(user_buffer, count, ppos, buf, len + 1); +} + +static const struct file_operations adf_hb_stats_fops = { + .owner = THIS_MODULE, + .open = simple_open, + .read = adf_hb_stats_read, +}; + +static ssize_t adf_hb_status_read(struct file *file, char __user *user_buf, + size_t count, loff_t *ppos) +{ + enum adf_device_heartbeat_status hb_status; + char ret_str[HB_STATUS_MAX_STRLEN]; + struct adf_accel_dev *accel_dev; + int ret_code; + size_t len; + + if (*ppos > 0) + return 0; + + accel_dev = file->private_data; + ret_code = HB_OK; + + adf_heartbeat_status(accel_dev, &hb_status); + + if (hb_status != HB_DEV_ALIVE) + ret_code = HB_ERROR; + + len = scnprintf(ret_str, sizeof(ret_str), "%d\n", ret_code); + + return simple_read_from_buffer(user_buf, count, ppos, ret_str, len + 1); +} + +static const struct file_operations adf_hb_status_fops = { + .owner = THIS_MODULE, + .open = simple_open, + .read = adf_hb_status_read, +}; + +static ssize_t adf_hb_cfg_read(struct file *file, char __user *user_buf, + size_t count, loff_t *ppos) +{ + char timer_str[ADF_CFG_MAX_VAL_LEN_IN_BYTES]; + struct adf_accel_dev *accel_dev; + unsigned int timer_ms; + int len; + + if (*ppos > 0) + return 0; + + accel_dev = file->private_data; + timer_ms = accel_dev->heartbeat->hb_timer; + len = scnprintf(timer_str, sizeof(timer_str), "%u\n", timer_ms); + + return simple_read_from_buffer(user_buf, count, ppos, timer_str, + len + 1); +} + +static ssize_t adf_hb_cfg_write(struct file *file, const char __user *user_buf, + size_t count, loff_t *ppos) +{ + char input_str[ADF_CFG_MAX_VAL_LEN_IN_BYTES] = { }; + struct adf_accel_dev *accel_dev; + int ret, written_chars; + unsigned int timer_ms; + u32 ticks; + + accel_dev = file->private_data; + timer_ms = ADF_CFG_HB_TIMER_DEFAULT_MS; + + /* last byte left as string termination */ + if (count > sizeof(input_str) - 1) + return -EINVAL; + + written_chars = simple_write_to_buffer(input_str, sizeof(input_str) - 1, + ppos, user_buf, count); + if (written_chars > 0) { + ret = kstrtouint(input_str, 10, &timer_ms); + if (ret) { + dev_err(&GET_DEV(accel_dev), + "heartbeat_cfg: Invalid value\n"); + return ret; + } + + if (timer_ms < ADF_CFG_HB_TIMER_MIN_MS) { + dev_err(&GET_DEV(accel_dev), + "heartbeat_cfg: Invalid value\n"); + return -EINVAL; + } + + /* + * On 4xxx devices adf_timer is responsible for HB updates and + * its period is fixed to 200ms + */ + if (accel_dev->timer) + timer_ms = ADF_CFG_HB_TIMER_MIN_MS; + + ret = adf_heartbeat_save_cfg_param(accel_dev, timer_ms); + if (ret) + return ret; + + ret = adf_heartbeat_ms_to_ticks(accel_dev, timer_ms, &ticks); + if (ret) + return ret; + + ret = adf_send_admin_hb_timer(accel_dev, ticks); + if (ret) + return ret; + + accel_dev->heartbeat->hb_timer = timer_ms; + } + + return written_chars; +} + +static const struct file_operations adf_hb_cfg_fops = { + .owner = THIS_MODULE, + .open = simple_open, + .read = adf_hb_cfg_read, + .write = adf_hb_cfg_write, +}; + +void adf_heartbeat_dbgfs_add(struct adf_accel_dev *accel_dev) +{ + struct adf_heartbeat *hb = accel_dev->heartbeat; + + if (!hb) + return; + + hb->dbgfs.base_dir = debugfs_create_dir("heartbeat", accel_dev->debugfs_dir); + hb->dbgfs.status = debugfs_create_file("status", 0400, hb->dbgfs.base_dir, + accel_dev, &adf_hb_status_fops); + hb->dbgfs.sent = debugfs_create_file("queries_sent", 0400, hb->dbgfs.base_dir, + &hb->hb_sent_counter, &adf_hb_stats_fops); + hb->dbgfs.failed = debugfs_create_file("queries_failed", 0400, hb->dbgfs.base_dir, + &hb->hb_failed_counter, &adf_hb_stats_fops); + hb->dbgfs.cfg = debugfs_create_file("config", 0600, hb->dbgfs.base_dir, + accel_dev, &adf_hb_cfg_fops); +} +EXPORT_SYMBOL_GPL(adf_heartbeat_dbgfs_add); + +void adf_heartbeat_dbgfs_rm(struct adf_accel_dev *accel_dev) +{ + struct adf_heartbeat *hb = accel_dev->heartbeat; + + if (!hb) + return; + + debugfs_remove(hb->dbgfs.status); + hb->dbgfs.status = NULL; + debugfs_remove(hb->dbgfs.sent); + hb->dbgfs.sent = NULL; + debugfs_remove(hb->dbgfs.failed); + hb->dbgfs.failed = NULL; + debugfs_remove(hb->dbgfs.cfg); + hb->dbgfs.cfg = NULL; + debugfs_remove(hb->dbgfs.base_dir); + hb->dbgfs.base_dir = NULL; +} +EXPORT_SYMBOL_GPL(adf_heartbeat_dbgfs_rm); diff --git a/drivers/crypto/intel/qat/qat_common/adf_heartbeat_dbgfs.h b/drivers/crypto/intel/qat/qat_common/adf_heartbeat_dbgfs.h new file mode 100644 index 000000000000..84dd29ea6454 --- /dev/null +++ b/drivers/crypto/intel/qat/qat_common/adf_heartbeat_dbgfs.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright(c) 2023 Intel Corporation */ + +#ifndef ADF_HEARTBEAT_DBGFS_H_ +#define ADF_HEARTBEAT_DBGFS_H_ + +struct adf_accel_dev; + +void adf_heartbeat_dbgfs_add(struct adf_accel_dev *accel_dev); +void adf_heartbeat_dbgfs_rm(struct adf_accel_dev *accel_dev); + +#endif /* ADF_HEARTBEAT_DBGFS_H_ */ diff --git a/drivers/crypto/intel/qat/qat_common/adf_init.c b/drivers/crypto/intel/qat/qat_common/adf_init.c index 53fca6a7e2af..89001fe92e76 100644 --- a/drivers/crypto/intel/qat/qat_common/adf_init.c +++ b/drivers/crypto/intel/qat/qat_common/adf_init.c @@ -8,6 +8,7 @@ #include "adf_cfg.h" #include "adf_common_drv.h" #include "adf_dbgfs.h" +#include "adf_heartbeat.h" static LIST_HEAD(service_table); static DEFINE_MUTEX(service_lock); @@ -129,6 +130,8 @@ static int adf_dev_init(struct adf_accel_dev *accel_dev) return -EFAULT; } + adf_heartbeat_init(accel_dev); + /* * Subservice initialisation is divided into two stages: init and start. * This is to facilitate any ordering dependencies between services @@ -204,6 +207,8 @@ static int adf_dev_start(struct adf_accel_dev *accel_dev) } } + adf_heartbeat_start(accel_dev); + list_for_each(list_itr, &service_table) { service = list_entry(list_itr, struct service_hndl, list); if (service->event_hld(accel_dev, ADF_EVENT_START)) { @@ -347,6 +352,8 @@ static void adf_dev_shutdown(struct adf_accel_dev *accel_dev) clear_bit(accel_dev->accel_id, service->init_status); } + adf_heartbeat_shutdown(accel_dev); + hw_data->disable_iov(accel_dev); if (test_bit(ADF_STATUS_IRQ_ALLOCATED, &accel_dev->status)) { diff --git a/drivers/crypto/intel/qat/qat_common/icp_qat_fw_init_admin.h b/drivers/crypto/intel/qat/qat_common/icp_qat_fw_init_admin.h index e836fbaeec62..3e968a4bcc9c 100644 --- a/drivers/crypto/intel/qat/qat_common/icp_qat_fw_init_admin.h +++ b/drivers/crypto/intel/qat/qat_common/icp_qat_fw_init_admin.h @@ -16,6 +16,7 @@ enum icp_qat_fw_init_admin_cmd_id { ICP_QAT_FW_HEARTBEAT_SYNC = 7, ICP_QAT_FW_HEARTBEAT_GET = 8, ICP_QAT_FW_COMP_CAPABILITY_GET = 9, + ICP_QAT_FW_HEARTBEAT_TIMER_SET = 13, ICP_QAT_FW_TIMER_GET = 19, ICP_QAT_FW_PM_STATE_CONFIG = 128, }; @@ -41,6 +42,9 @@ struct icp_qat_fw_init_admin_req { struct { __u32 int_timer_ticks; }; + struct { + __u32 heartbeat_ticks; + }; __u32 idle_filter; }; diff --git a/drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c b/drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c index c57403a6fbac..8fbab905c5cc 100644 --- a/drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c +++ b/drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c @@ -247,6 +247,7 @@ void adf_init_hw_data_dh895xcc(struct adf_hw_device_data *hw_data) hw_data->dev_config = adf_gen2_dev_config; hw_data->clock_frequency = ADF_DH895X_AE_FREQ; hw_data->get_hb_clock = get_ts_clock; + hw_data->num_hb_ctrs = ADF_NUM_HB_CNT_PER_AE; adf_gen2_init_pf_pfvf_ops(&hw_data->pfvf_ops); hw_data->pfvf_ops.enable_vf2pf_interrupts = enable_vf2pf_interrupts; From bec61a294dbec1c5929aa6f138cddcab68a62311 Mon Sep 17 00:00:00 2001 From: Damian Muszynski Date: Fri, 30 Jun 2023 19:03:58 +0200 Subject: [PATCH 122/656] crypto: qat - add heartbeat counters check A firmware update for QAT GEN2 changed the format of a data structure used to report the heartbeat counters. To support all firmware versions, extend the heartbeat logic with an algorithm that detects the number of counters returned by firmware. The algorithm detects the number of counters to be used (and size of the corresponding data structure) by the comparison the expected size of the data in memory, with the data which was written by the firmware. Firmware detection is done one time during the first read of heartbeat debugfs file to avoid increasing the time needed to load the module. Signed-off-by: Damian Muszynski Reviewed-by: Giovanni Cabiddu Reviewed-by: Andy Shevchenko Signed-off-by: Herbert Xu --- .../intel/qat/qat_c3xxx/adf_c3xxx_hw_data.c | 2 + .../intel/qat/qat_c62x/adf_c62x_hw_data.c | 2 + .../intel/qat/qat_common/adf_accel_devices.h | 1 + .../intel/qat/qat_common/adf_heartbeat.c | 68 +++++++++++++++++++ .../intel/qat/qat_common/adf_heartbeat.h | 6 ++ .../qat/qat_dh895xcc/adf_dh895xcc_hw_data.c | 2 + 6 files changed, 81 insertions(+) diff --git a/drivers/crypto/intel/qat/qat_c3xxx/adf_c3xxx_hw_data.c b/drivers/crypto/intel/qat/qat_c3xxx/adf_c3xxx_hw_data.c index e81d11409426..9c00c441b602 100644 --- a/drivers/crypto/intel/qat/qat_c3xxx/adf_c3xxx_hw_data.c +++ b/drivers/crypto/intel/qat/qat_c3xxx/adf_c3xxx_hw_data.c @@ -8,6 +8,7 @@ #include #include #include "adf_c3xxx_hw_data.h" +#include "adf_heartbeat.h" #include "icp_qat_hw.h" /* Worker thread to service arbiter mappings */ @@ -153,6 +154,7 @@ void adf_init_hw_data_c3xxx(struct adf_hw_device_data *hw_data) hw_data->measure_clock = measure_clock; hw_data->get_hb_clock = get_ts_clock; hw_data->num_hb_ctrs = ADF_NUM_HB_CNT_PER_AE; + hw_data->check_hb_ctrs = adf_heartbeat_check_ctrs; adf_gen2_init_pf_pfvf_ops(&hw_data->pfvf_ops); adf_gen2_init_hw_csr_ops(&hw_data->csr_ops); diff --git a/drivers/crypto/intel/qat/qat_c62x/adf_c62x_hw_data.c b/drivers/crypto/intel/qat/qat_c62x/adf_c62x_hw_data.c index 1a8c8e3a48e9..355a781693eb 100644 --- a/drivers/crypto/intel/qat/qat_c62x/adf_c62x_hw_data.c +++ b/drivers/crypto/intel/qat/qat_c62x/adf_c62x_hw_data.c @@ -8,6 +8,7 @@ #include #include #include "adf_c62x_hw_data.h" +#include "adf_heartbeat.h" #include "icp_qat_hw.h" /* Worker thread to service arbiter mappings */ @@ -155,6 +156,7 @@ void adf_init_hw_data_c62x(struct adf_hw_device_data *hw_data) hw_data->measure_clock = measure_clock; hw_data->get_hb_clock = get_ts_clock; hw_data->num_hb_ctrs = ADF_NUM_HB_CNT_PER_AE; + hw_data->check_hb_ctrs = adf_heartbeat_check_ctrs; adf_gen2_init_pf_pfvf_ops(&hw_data->pfvf_ops); adf_gen2_init_hw_csr_ops(&hw_data->csr_ops); diff --git a/drivers/crypto/intel/qat/qat_common/adf_accel_devices.h b/drivers/crypto/intel/qat/qat_common/adf_accel_devices.h index ab897e1717e0..e57abde66f4f 100644 --- a/drivers/crypto/intel/qat/qat_common/adf_accel_devices.h +++ b/drivers/crypto/intel/qat/qat_common/adf_accel_devices.h @@ -190,6 +190,7 @@ struct adf_hw_device_data { int (*send_admin_init)(struct adf_accel_dev *accel_dev); int (*start_timer)(struct adf_accel_dev *accel_dev); void (*stop_timer)(struct adf_accel_dev *accel_dev); + void (*check_hb_ctrs)(struct adf_accel_dev *accel_dev); uint32_t (*get_hb_clock)(struct adf_hw_device_data *self); int (*measure_clock)(struct adf_accel_dev *accel_dev); int (*init_arb)(struct adf_accel_dev *accel_dev); diff --git a/drivers/crypto/intel/qat/qat_common/adf_heartbeat.c b/drivers/crypto/intel/qat/qat_common/adf_heartbeat.c index 7358aac8e56d..beef9a5f6c75 100644 --- a/drivers/crypto/intel/qat/qat_common/adf_heartbeat.c +++ b/drivers/crypto/intel/qat/qat_common/adf_heartbeat.c @@ -20,6 +20,8 @@ #include "adf_transport_internal.h" #include "icp_qat_fw_init_admin.h" +#define ADF_HB_EMPTY_SIG 0xA5A5A5A5 + /* Heartbeat counter pair */ struct hb_cnt_pair { __u16 resp_heartbeat_cnt; @@ -42,6 +44,57 @@ static int adf_hb_check_polling_freq(struct adf_accel_dev *accel_dev) return 0; } +/** + * validate_hb_ctrs_cnt() - checks if the number of heartbeat counters should + * be updated by one to support the currently loaded firmware. + * @accel_dev: Pointer to acceleration device. + * + * Return: + * * true - hb_ctrs must increased by ADF_NUM_PKE_STRAND + * * false - no changes needed + */ +static bool validate_hb_ctrs_cnt(struct adf_accel_dev *accel_dev) +{ + const size_t hb_ctrs = accel_dev->hw_device->num_hb_ctrs; + const size_t max_aes = accel_dev->hw_device->num_engines; + const size_t hb_struct_size = sizeof(struct hb_cnt_pair); + const size_t exp_diff_size = array3_size(ADF_NUM_PKE_STRAND, max_aes, + hb_struct_size); + const size_t dev_ctrs = size_mul(max_aes, hb_ctrs); + const size_t stats_size = size_mul(dev_ctrs, hb_struct_size); + const u32 exp_diff_cnt = exp_diff_size / sizeof(u32); + const u32 stats_el_cnt = stats_size / sizeof(u32); + struct hb_cnt_pair *hb_stats = accel_dev->heartbeat->dma.virt_addr; + const u32 *mem_to_chk = (u32 *)(hb_stats + dev_ctrs); + u32 el_diff_cnt = 0; + int i; + + /* count how many bytes are different from pattern */ + for (i = 0; i < stats_el_cnt; i++) { + if (mem_to_chk[i] == ADF_HB_EMPTY_SIG) + break; + + el_diff_cnt++; + } + + return el_diff_cnt && el_diff_cnt == exp_diff_cnt; +} + +void adf_heartbeat_check_ctrs(struct adf_accel_dev *accel_dev) +{ + struct hb_cnt_pair *hb_stats = accel_dev->heartbeat->dma.virt_addr; + const size_t hb_ctrs = accel_dev->hw_device->num_hb_ctrs; + const size_t max_aes = accel_dev->hw_device->num_engines; + const size_t dev_ctrs = size_mul(max_aes, hb_ctrs); + const size_t stats_size = size_mul(dev_ctrs, sizeof(struct hb_cnt_pair)); + const size_t mem_items_to_fill = size_mul(stats_size, 2) / sizeof(u32); + + /* fill hb stats memory with pattern */ + memset32((uint32_t *)hb_stats, ADF_HB_EMPTY_SIG, mem_items_to_fill); + accel_dev->heartbeat->ctrs_cnt_checked = false; +} +EXPORT_SYMBOL_GPL(adf_heartbeat_check_ctrs); + static int get_timer_ticks(struct adf_accel_dev *accel_dev, unsigned int *value) { char timer_str[ADF_CFG_MAX_VAL_LEN_IN_BYTES] = { }; @@ -123,6 +176,13 @@ static int adf_hb_get_status(struct adf_accel_dev *accel_dev) size_t ae = 0; int ret = 0; + if (!accel_dev->heartbeat->ctrs_cnt_checked) { + if (validate_hb_ctrs_cnt(accel_dev)) + hw_device->num_hb_ctrs += ADF_NUM_PKE_STRAND; + + accel_dev->heartbeat->ctrs_cnt_checked = true; + } + live_stats = accel_dev->heartbeat->dma.virt_addr; last_stats = live_stats + dev_ctrs; count_fails = (u16 *)(last_stats + dev_ctrs); @@ -221,6 +281,11 @@ int adf_heartbeat_init(struct adf_accel_dev *accel_dev) if (!hb->dma.virt_addr) goto err_free; + /* + * Default set this flag as true to avoid unnecessary checks, + * it will be reset on platforms that need such a check + */ + hb->ctrs_cnt_checked = true; accel_dev->heartbeat = hb; return 0; @@ -241,6 +306,9 @@ int adf_heartbeat_start(struct adf_accel_dev *accel_dev) return -EFAULT; } + if (accel_dev->hw_device->check_hb_ctrs) + accel_dev->hw_device->check_hb_ctrs(accel_dev); + ret = get_timer_ticks(accel_dev, &timer_ticks); if (ret) return ret; diff --git a/drivers/crypto/intel/qat/qat_common/adf_heartbeat.h b/drivers/crypto/intel/qat/qat_common/adf_heartbeat.h index 297147f44150..b22e3cb29798 100644 --- a/drivers/crypto/intel/qat/qat_common/adf_heartbeat.h +++ b/drivers/crypto/intel/qat/qat_common/adf_heartbeat.h @@ -24,6 +24,7 @@ struct adf_heartbeat { unsigned int hb_failed_counter; unsigned int hb_timer; u64 last_hb_check_time; + bool ctrs_cnt_checked; struct hb_dma_addr { dma_addr_t phy_addr; void *virt_addr; @@ -48,6 +49,7 @@ int adf_heartbeat_save_cfg_param(struct adf_accel_dev *accel_dev, unsigned int timer_ms); void adf_heartbeat_status(struct adf_accel_dev *accel_dev, enum adf_device_heartbeat_status *hb_status); +void adf_heartbeat_check_ctrs(struct adf_accel_dev *accel_dev); #else static inline int adf_heartbeat_init(struct adf_accel_dev *accel_dev) @@ -69,5 +71,9 @@ static inline int adf_heartbeat_save_cfg_param(struct adf_accel_dev *accel_dev, { return 0; } + +static inline void adf_heartbeat_check_ctrs(struct adf_accel_dev *accel_dev) +{ +} #endif #endif /* ADF_HEARTBEAT_H_ */ diff --git a/drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c b/drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c index 8fbab905c5cc..09551f949126 100644 --- a/drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c +++ b/drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c @@ -7,6 +7,7 @@ #include #include #include "adf_dh895xcc_hw_data.h" +#include "adf_heartbeat.h" #include "icp_qat_hw.h" #define ADF_DH895XCC_VF_MSK 0xFFFFFFFF @@ -248,6 +249,7 @@ void adf_init_hw_data_dh895xcc(struct adf_hw_device_data *hw_data) hw_data->clock_frequency = ADF_DH895X_AE_FREQ; hw_data->get_hb_clock = get_ts_clock; hw_data->num_hb_ctrs = ADF_NUM_HB_CNT_PER_AE; + hw_data->check_hb_ctrs = adf_heartbeat_check_ctrs; adf_gen2_init_pf_pfvf_ops(&hw_data->pfvf_ops); hw_data->pfvf_ops.enable_vf2pf_interrupts = enable_vf2pf_interrupts; From 039980de89dc9dd757418d6f296e4126cc3f86c3 Mon Sep 17 00:00:00 2001 From: Martin Kaiser Date: Sun, 2 Jul 2023 19:35:02 +0200 Subject: [PATCH 123/656] hwrng: nomadik - keep clock enabled while hwrng is registered The nomadik driver uses devres to register itself with the hwrng core, the driver will be unregistered from hwrng when its device goes out of scope. This happens after the driver's remove function is called. However, nomadik's clock is disabled in the remove function. There's a short timeframe where nomadik is still registered with the hwrng core although its clock is disabled. I suppose the clock must be active to access the hardware and serve requests from the hwrng core. Switch to devm_clk_get_enabled and let devres disable the clock and unregister the hwrng. This avoids the race condition. Fixes: 3e75241be808 ("hwrng: drivers - Use device-managed registration API") Signed-off-by: Martin Kaiser Signed-off-by: Herbert Xu --- drivers/char/hw_random/nomadik-rng.c | 12 +++--------- 1 file changed, 3 insertions(+), 9 deletions(-) diff --git a/drivers/char/hw_random/nomadik-rng.c b/drivers/char/hw_random/nomadik-rng.c index e8f9621e7954..3774adf903a8 100644 --- a/drivers/char/hw_random/nomadik-rng.c +++ b/drivers/char/hw_random/nomadik-rng.c @@ -13,8 +13,6 @@ #include #include -static struct clk *rng_clk; - static int nmk_rng_read(struct hwrng *rng, void *data, size_t max, bool wait) { void __iomem *base = (void __iomem *)rng->priv; @@ -36,21 +34,20 @@ static struct hwrng nmk_rng = { static int nmk_rng_probe(struct amba_device *dev, const struct amba_id *id) { + struct clk *rng_clk; void __iomem *base; int ret; - rng_clk = devm_clk_get(&dev->dev, NULL); + rng_clk = devm_clk_get_enabled(&dev->dev, NULL); if (IS_ERR(rng_clk)) { dev_err(&dev->dev, "could not get rng clock\n"); ret = PTR_ERR(rng_clk); return ret; } - clk_prepare_enable(rng_clk); - ret = amba_request_regions(dev, dev->dev.init_name); if (ret) - goto out_clk; + return ret; ret = -ENOMEM; base = devm_ioremap(&dev->dev, dev->res.start, resource_size(&dev->res)); @@ -64,15 +61,12 @@ static int nmk_rng_probe(struct amba_device *dev, const struct amba_id *id) out_release: amba_release_regions(dev); -out_clk: - clk_disable_unprepare(rng_clk); return ret; } static void nmk_rng_remove(struct amba_device *dev) { amba_release_regions(dev); - clk_disable_unprepare(rng_clk); } static const struct amba_id nmk_rng_ids[] = { From 6a52ee38c79825ef469ab3ed8588d17e90d2049c Mon Sep 17 00:00:00 2001 From: Martin Kaiser Date: Sun, 2 Jul 2023 19:35:03 +0200 Subject: [PATCH 124/656] hwrng: nomadik - use dev_err_probe Use dev_err_probe to print a message and return an error. This makes the code a tiny bit shorter. Signed-off-by: Martin Kaiser Signed-off-by: Herbert Xu --- drivers/char/hw_random/nomadik-rng.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/drivers/char/hw_random/nomadik-rng.c b/drivers/char/hw_random/nomadik-rng.c index 3774adf903a8..8c6a40d6ce3d 100644 --- a/drivers/char/hw_random/nomadik-rng.c +++ b/drivers/char/hw_random/nomadik-rng.c @@ -39,11 +39,8 @@ static int nmk_rng_probe(struct amba_device *dev, const struct amba_id *id) int ret; rng_clk = devm_clk_get_enabled(&dev->dev, NULL); - if (IS_ERR(rng_clk)) { - dev_err(&dev->dev, "could not get rng clock\n"); - ret = PTR_ERR(rng_clk); - return ret; - } + if (IS_ERR(rng_clk)) + return dev_err_probe(&dev->dev, PTR_ERR(rng_clk), "could not get rng clock\n"); ret = amba_request_regions(dev, dev->dev.init_name); if (ret) From 8690b09c30b274691bc5bb7b1332a27a7cbe5db7 Mon Sep 17 00:00:00 2001 From: You Kangren Date: Tue, 4 Jul 2023 20:45:32 +0800 Subject: [PATCH 125/656] crypto: qat - replace the if statement with min() Mark UWORD_CPYBUF_SIZE with U suffix to make its type the same with words_num. Then replace the if statement with min() in qat_uclo_wr_uimage_raw_page() to make code shorter. Reviewed-by: Andy Shevchenko Signed-off-by: You Kangren Signed-off-by: Herbert Xu --- drivers/crypto/intel/qat/qat_common/qat_uclo.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/drivers/crypto/intel/qat/qat_common/qat_uclo.c b/drivers/crypto/intel/qat/qat_common/qat_uclo.c index ce837bcc1cab..4bd150d1441a 100644 --- a/drivers/crypto/intel/qat/qat_common/qat_uclo.c +++ b/drivers/crypto/intel/qat/qat_common/qat_uclo.c @@ -11,7 +11,7 @@ #include "icp_qat_hal.h" #include "icp_qat_fw_loader_handle.h" -#define UWORD_CPYBUF_SIZE 1024 +#define UWORD_CPYBUF_SIZE 1024U #define INVLD_UWORD 0xffffffffffull #define PID_MINOR_REV 0xf #define PID_MAJOR_REV (0xf << 4) @@ -1986,10 +1986,7 @@ static void qat_uclo_wr_uimage_raw_page(struct icp_qat_fw_loader_handle *handle, uw_relative_addr = 0; words_num = encap_page->micro_words_num; while (words_num) { - if (words_num < UWORD_CPYBUF_SIZE) - cpylen = words_num; - else - cpylen = UWORD_CPYBUF_SIZE; + cpylen = min(words_num, UWORD_CPYBUF_SIZE); /* load the buffer */ for (i = 0; i < cpylen; i++) From ea6084559285f4436434630a0e0d9e82709a04f2 Mon Sep 17 00:00:00 2001 From: Martin Kaiser Date: Tue, 4 Jul 2023 19:06:44 +0200 Subject: [PATCH 126/656] hwrng: imx-rngc - use dev_err_probe Simplify the code by calling dev_err_probe instead of dev_err and return. While at it, use the same device for all error messages. Signed-off-by: Martin Kaiser Reviewed-by: Rouven Czerwinski Reviewed-by: Rouven Czerwinski Signed-off-by: Herbert Xu --- drivers/char/hw_random/imx-rngc.c | 24 ++++++++---------------- 1 file changed, 8 insertions(+), 16 deletions(-) diff --git a/drivers/char/hw_random/imx-rngc.c b/drivers/char/hw_random/imx-rngc.c index bf07f17f78c8..e4b385b01b11 100644 --- a/drivers/char/hw_random/imx-rngc.c +++ b/drivers/char/hw_random/imx-rngc.c @@ -239,10 +239,8 @@ static int __init imx_rngc_probe(struct platform_device *pdev) return PTR_ERR(rngc->base); rngc->clk = devm_clk_get_enabled(&pdev->dev, NULL); - if (IS_ERR(rngc->clk)) { - dev_err(&pdev->dev, "Can not get rng_clk\n"); - return PTR_ERR(rngc->clk); - } + if (IS_ERR(rngc->clk)) + return dev_err_probe(&pdev->dev, PTR_ERR(rngc->clk), "Cannot get rng_clk\n"); irq = platform_get_irq(pdev, 0); if (irq < 0) @@ -272,24 +270,18 @@ static int __init imx_rngc_probe(struct platform_device *pdev) ret = devm_request_irq(&pdev->dev, irq, imx_rngc_irq, 0, pdev->name, (void *)rngc); - if (ret) { - dev_err(rngc->dev, "Can't get interrupt working.\n"); - return ret; - } + if (ret) + return dev_err_probe(&pdev->dev, ret, "Can't get interrupt working.\n"); if (self_test) { ret = imx_rngc_self_test(rngc); - if (ret) { - dev_err(rngc->dev, "self test failed\n"); - return ret; - } + if (ret) + return dev_err_probe(&pdev->dev, ret, "self test failed\n"); } ret = devm_hwrng_register(&pdev->dev, &rngc->rng); - if (ret) { - dev_err(&pdev->dev, "hwrng registration failed\n"); - return ret; - } + if (ret) + return dev_err_probe(&pdev->dev, ret, "hwrng registration failed\n"); dev_info(&pdev->dev, "Freescale RNG%c registered (HW revision %d.%02d)\n", From b4198a9a538c330cdff7239f8aba0792d31fab42 Mon Sep 17 00:00:00 2001 From: Martin Kaiser Date: Tue, 4 Jul 2023 19:10:51 +0200 Subject: [PATCH 127/656] hwrng: exynos - switch to DEFINE_SIMPLE_DEV_PM_OPS SIMPLE_DEV_PM_OPS is deprecated, replace it with DEFINE_SIMPLE_DEV_PM_OPS and use pm_sleep_ptr for setting the driver's pm routines. We can now remove the __maybe_unused qualifier in the suspend and resume functions. Signed-off-by: Martin Kaiser Signed-off-by: Herbert Xu --- drivers/char/hw_random/exynos-trng.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/char/hw_random/exynos-trng.c b/drivers/char/hw_random/exynos-trng.c index 9cc3d542dd0f..30207b7ac5f4 100644 --- a/drivers/char/hw_random/exynos-trng.c +++ b/drivers/char/hw_random/exynos-trng.c @@ -185,14 +185,14 @@ static int exynos_trng_remove(struct platform_device *pdev) return 0; } -static int __maybe_unused exynos_trng_suspend(struct device *dev) +static int exynos_trng_suspend(struct device *dev) { pm_runtime_put_sync(dev); return 0; } -static int __maybe_unused exynos_trng_resume(struct device *dev) +static int exynos_trng_resume(struct device *dev) { int ret; @@ -205,7 +205,7 @@ static int __maybe_unused exynos_trng_resume(struct device *dev) return 0; } -static SIMPLE_DEV_PM_OPS(exynos_trng_pm_ops, exynos_trng_suspend, +static DEFINE_SIMPLE_DEV_PM_OPS(exynos_trng_pm_ops, exynos_trng_suspend, exynos_trng_resume); static const struct of_device_id exynos_trng_dt_match[] = { @@ -219,7 +219,7 @@ MODULE_DEVICE_TABLE(of, exynos_trng_dt_match); static struct platform_driver exynos_trng_driver = { .driver = { .name = "exynos-trng", - .pm = &exynos_trng_pm_ops, + .pm = pm_sleep_ptr(&exynos_trng_pm_ops), .of_match_table = exynos_trng_dt_match, }, .probe = exynos_trng_probe, From b157d50bd2de501023391bab81f6198153398b2d Mon Sep 17 00:00:00 2001 From: Martin Kaiser Date: Tue, 4 Jul 2023 19:32:00 +0200 Subject: [PATCH 128/656] hwrng: pic32 - enable compile-testing Enable compile testing for the pic32 driver. Remove the dependency on HW_RANDOM. The pic32 config section is under "if HW_RANDOM". Signed-off-by: Martin Kaiser Signed-off-by: Herbert Xu --- drivers/char/hw_random/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig index e0b3786ca51b..1aeba12391a1 100644 --- a/drivers/char/hw_random/Kconfig +++ b/drivers/char/hw_random/Kconfig @@ -385,7 +385,7 @@ config HW_RANDOM_STM32 config HW_RANDOM_PIC32 tristate "Microchip PIC32 Random Number Generator support" - depends on HW_RANDOM && MACH_PIC32 + depends on MACH_PIC32 || COMPILE_TEST default y help This driver provides kernel-side support for the Random Number From 6755ad74aac0fb1c79b14724feb81b2f6ff25847 Mon Sep 17 00:00:00 2001 From: Martin Kaiser Date: Tue, 4 Jul 2023 19:32:01 +0200 Subject: [PATCH 129/656] hwrng: pic32 - use devm_clk_get_enabled Use devm_clk_get_enabled in the pic32 driver. Ensure that the clock is enabled as long as the driver is registered with the hwrng core. Fixes: 7ea39973d1e5 ("hwrng: pic32 - Use device-managed registration API") Signed-off-by: Martin Kaiser Signed-off-by: Herbert Xu --- drivers/char/hw_random/pic32-rng.c | 19 +++++-------------- 1 file changed, 5 insertions(+), 14 deletions(-) diff --git a/drivers/char/hw_random/pic32-rng.c b/drivers/char/hw_random/pic32-rng.c index 99c8bd0859a1..e04a054e8930 100644 --- a/drivers/char/hw_random/pic32-rng.c +++ b/drivers/char/hw_random/pic32-rng.c @@ -36,7 +36,6 @@ struct pic32_rng { void __iomem *base; struct hwrng rng; - struct clk *clk; }; /* @@ -70,6 +69,7 @@ static int pic32_rng_read(struct hwrng *rng, void *buf, size_t max, static int pic32_rng_probe(struct platform_device *pdev) { struct pic32_rng *priv; + struct clk *clk; u32 v; int ret; @@ -81,13 +81,9 @@ static int pic32_rng_probe(struct platform_device *pdev) if (IS_ERR(priv->base)) return PTR_ERR(priv->base); - priv->clk = devm_clk_get(&pdev->dev, NULL); - if (IS_ERR(priv->clk)) - return PTR_ERR(priv->clk); - - ret = clk_prepare_enable(priv->clk); - if (ret) - return ret; + clk = devm_clk_get_enabled(&pdev->dev, NULL); + if (IS_ERR(clk)) + return PTR_ERR(clk); /* enable TRNG in enhanced mode */ v = TRNGEN | TRNGMOD; @@ -98,15 +94,11 @@ static int pic32_rng_probe(struct platform_device *pdev) ret = devm_hwrng_register(&pdev->dev, &priv->rng); if (ret) - goto err_register; + return ret; platform_set_drvdata(pdev, priv); return 0; - -err_register: - clk_disable_unprepare(priv->clk); - return ret; } static int pic32_rng_remove(struct platform_device *pdev) @@ -114,7 +106,6 @@ static int pic32_rng_remove(struct platform_device *pdev) struct pic32_rng *rng = platform_get_drvdata(pdev); writel(0, rng->base + RNGCON); - clk_disable_unprepare(rng->clk); return 0; } From 97c63a9dea2929fc4fd42f1d4446d97b6c011a1f Mon Sep 17 00:00:00 2001 From: Martin Kaiser Date: Tue, 4 Jul 2023 19:32:02 +0200 Subject: [PATCH 130/656] hwrng: pic32 - remove unused defines Remove some unused defines and fix the indentation. Signed-off-by: Martin Kaiser Signed-off-by: Herbert Xu --- drivers/char/hw_random/pic32-rng.c | 13 +++---------- 1 file changed, 3 insertions(+), 10 deletions(-) diff --git a/drivers/char/hw_random/pic32-rng.c b/drivers/char/hw_random/pic32-rng.c index e04a054e8930..c1b3f5915f03 100644 --- a/drivers/char/hw_random/pic32-rng.c +++ b/drivers/char/hw_random/pic32-rng.c @@ -19,19 +19,12 @@ #include #define RNGCON 0x04 -#define TRNGEN BIT(8) -#define PRNGEN BIT(9) -#define PRNGCONT BIT(10) -#define TRNGMOD BIT(11) -#define SEEDLOAD BIT(12) -#define RNGPOLY1 0x08 -#define RNGPOLY2 0x0C -#define RNGNUMGEN1 0x10 -#define RNGNUMGEN2 0x14 +#define TRNGEN BIT(8) +#define TRNGMOD BIT(11) #define RNGSEED1 0x18 #define RNGSEED2 0x1C #define RNGRCNT 0x20 -#define RCNT_MASK 0x7F +#define RCNT_MASK 0x7F struct pic32_rng { void __iomem *base; From ac0042fa5aa5ac7929d95f4bf9185429ccdb70cb Mon Sep 17 00:00:00 2001 From: Martin Kaiser Date: Tue, 4 Jul 2023 19:32:03 +0200 Subject: [PATCH 131/656] hwrng: pic32 - enable TRNG only while it's used The probe function enables the TRNG hardware before registering the driver. If registration fails, probe returns an error, but the TRNG remains enabled. Define init and cleanup functions, enable and disable the hardware there. Signed-off-by: Martin Kaiser Signed-off-by: Herbert Xu --- drivers/char/hw_random/pic32-rng.c | 41 ++++++++++++++---------------- 1 file changed, 19 insertions(+), 22 deletions(-) diff --git a/drivers/char/hw_random/pic32-rng.c b/drivers/char/hw_random/pic32-rng.c index c1b3f5915f03..1902f4389a3f 100644 --- a/drivers/char/hw_random/pic32-rng.c +++ b/drivers/char/hw_random/pic32-rng.c @@ -38,6 +38,15 @@ struct pic32_rng { */ #define RNG_TIMEOUT 500 +static int pic32_rng_init(struct hwrng *rng) +{ + struct pic32_rng *priv = container_of(rng, struct pic32_rng, rng); + + /* enable TRNG in enhanced mode */ + writel(TRNGEN | TRNGMOD, priv->base + RNGCON); + return 0; +} + static int pic32_rng_read(struct hwrng *rng, void *buf, size_t max, bool wait) { @@ -59,12 +68,17 @@ static int pic32_rng_read(struct hwrng *rng, void *buf, size_t max, return -EIO; } +static void pic32_rng_cleanup(struct hwrng *rng) +{ + struct pic32_rng *priv = container_of(rng, struct pic32_rng, rng); + + writel(0, priv->base + RNGCON); +} + static int pic32_rng_probe(struct platform_device *pdev) { struct pic32_rng *priv; struct clk *clk; - u32 v; - int ret; priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); if (!priv) @@ -78,28 +92,12 @@ static int pic32_rng_probe(struct platform_device *pdev) if (IS_ERR(clk)) return PTR_ERR(clk); - /* enable TRNG in enhanced mode */ - v = TRNGEN | TRNGMOD; - writel(v, priv->base + RNGCON); - priv->rng.name = pdev->name; + priv->rng.init = pic32_rng_init; priv->rng.read = pic32_rng_read; + priv->rng.cleanup = pic32_rng_cleanup; - ret = devm_hwrng_register(&pdev->dev, &priv->rng); - if (ret) - return ret; - - platform_set_drvdata(pdev, priv); - - return 0; -} - -static int pic32_rng_remove(struct platform_device *pdev) -{ - struct pic32_rng *rng = platform_get_drvdata(pdev); - - writel(0, rng->base + RNGCON); - return 0; + return devm_hwrng_register(&pdev->dev, &priv->rng); } static const struct of_device_id pic32_rng_of_match[] __maybe_unused = { @@ -110,7 +108,6 @@ MODULE_DEVICE_TABLE(of, pic32_rng_of_match); static struct platform_driver pic32_rng_driver = { .probe = pic32_rng_probe, - .remove = pic32_rng_remove, .driver = { .name = "pic32-rng", .of_match_table = of_match_ptr(pic32_rng_of_match), From aa4b2f9ea53e9fc93f9d30746c32af5ac25f2a46 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Wed, 5 Jul 2023 15:21:54 +0800 Subject: [PATCH 132/656] crypto: omap-des - Use devm_platform_get_and_ioremap_resource() Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Yangtao Li Signed-off-by: Herbert Xu --- drivers/crypto/omap-des.c | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/drivers/crypto/omap-des.c b/drivers/crypto/omap-des.c index f783769ea110..371a51094e34 100644 --- a/drivers/crypto/omap-des.c +++ b/drivers/crypto/omap-des.c @@ -971,18 +971,12 @@ static int omap_des_probe(struct platform_device *pdev) dd->dev = dev; platform_set_drvdata(pdev, dd); - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) { - dev_err(dev, "no MEM resource info\n"); - goto err_res; - } - err = (dev->of_node) ? omap_des_get_of(dd, pdev) : omap_des_get_pdev(dd, pdev); if (err) goto err_res; - dd->io_base = devm_ioremap_resource(dev, res); + dd->io_base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(dd->io_base)) { err = PTR_ERR(dd->io_base); goto err_res; From 1c5ff2fc35ac2c6da3509f7afa97b91f328dcfaa Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Wed, 5 Jul 2023 15:21:55 +0800 Subject: [PATCH 133/656] crypto: keembay - Convert to devm_platform_ioremap_resource() Use devm_platform_ioremap_resource() to simplify code. Signed-off-by: Yangtao Li Signed-off-by: Herbert Xu --- drivers/crypto/intel/keembay/keembay-ocs-hcu-core.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) diff --git a/drivers/crypto/intel/keembay/keembay-ocs-hcu-core.c b/drivers/crypto/intel/keembay/keembay-ocs-hcu-core.c index d4bcbed1f546..51a6de6294cb 100644 --- a/drivers/crypto/intel/keembay/keembay-ocs-hcu-core.c +++ b/drivers/crypto/intel/keembay/keembay-ocs-hcu-core.c @@ -1170,7 +1170,6 @@ static int kmb_ocs_hcu_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct ocs_hcu_dev *hcu_dev; - struct resource *hcu_mem; int rc; hcu_dev = devm_kzalloc(dev, sizeof(*hcu_dev), GFP_KERNEL); @@ -1184,14 +1183,7 @@ static int kmb_ocs_hcu_probe(struct platform_device *pdev) if (rc) return rc; - /* Get the memory address and remap. */ - hcu_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!hcu_mem) { - dev_err(dev, "Could not retrieve io mem resource.\n"); - return -ENODEV; - } - - hcu_dev->io_base = devm_ioremap_resource(dev, hcu_mem); + hcu_dev->io_base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(hcu_dev->io_base)) return PTR_ERR(hcu_dev->io_base); From 3aaafe054b7140418c9355512bc1a7a4980943c3 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Wed, 5 Jul 2023 15:21:56 +0800 Subject: [PATCH 134/656] crypto: atmel-aes - Use devm_platform_get_and_ioremap_resource() Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Yangtao Li Signed-off-by: Herbert Xu --- drivers/crypto/atmel-aes.c | 15 +++------------ 1 file changed, 3 insertions(+), 12 deletions(-) diff --git a/drivers/crypto/atmel-aes.c b/drivers/crypto/atmel-aes.c index 143d33fbb316..9692254faad9 100644 --- a/drivers/crypto/atmel-aes.c +++ b/drivers/crypto/atmel-aes.c @@ -2566,11 +2566,9 @@ static int atmel_aes_probe(struct platform_device *pdev) crypto_init_queue(&aes_dd->queue, ATMEL_AES_QUEUE_LENGTH); - /* Get the base address */ - aes_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!aes_res) { - dev_err(dev, "no MEM resource info\n"); - err = -ENODEV; + aes_dd->io_base = devm_platform_get_and_ioremap_resource(pdev, 0, &aes_res); + if (IS_ERR(aes_dd->io_base)) { + err = PTR_ERR(aes_dd->io_base); goto err_tasklet_kill; } aes_dd->phys_base = aes_res->start; @@ -2597,13 +2595,6 @@ static int atmel_aes_probe(struct platform_device *pdev) goto err_tasklet_kill; } - aes_dd->io_base = devm_ioremap_resource(&pdev->dev, aes_res); - if (IS_ERR(aes_dd->io_base)) { - dev_err(dev, "can't ioremap\n"); - err = PTR_ERR(aes_dd->io_base); - goto err_tasklet_kill; - } - err = clk_prepare(aes_dd->iclk); if (err) goto err_tasklet_kill; From f069fa9d789d908e21350fcfb6a34271a3f2d9b6 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Wed, 5 Jul 2023 15:21:57 +0800 Subject: [PATCH 135/656] crypto: atmel-sha - Use devm_platform_get_and_ioremap_resource() Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Yangtao Li Signed-off-by: Herbert Xu --- drivers/crypto/atmel-sha.c | 15 +++------------ 1 file changed, 3 insertions(+), 12 deletions(-) diff --git a/drivers/crypto/atmel-sha.c b/drivers/crypto/atmel-sha.c index 6bef634d3c86..f2031f934be9 100644 --- a/drivers/crypto/atmel-sha.c +++ b/drivers/crypto/atmel-sha.c @@ -2604,11 +2604,9 @@ static int atmel_sha_probe(struct platform_device *pdev) crypto_init_queue(&sha_dd->queue, ATMEL_SHA_QUEUE_LENGTH); - /* Get the base address */ - sha_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!sha_res) { - dev_err(dev, "no MEM resource info\n"); - err = -ENODEV; + sha_dd->io_base = devm_platform_get_and_ioremap_resource(pdev, 0, &sha_res); + if (IS_ERR(sha_dd->io_base)) { + err = PTR_ERR(sha_dd->io_base); goto err_tasklet_kill; } sha_dd->phys_base = sha_res->start; @@ -2635,13 +2633,6 @@ static int atmel_sha_probe(struct platform_device *pdev) goto err_tasklet_kill; } - sha_dd->io_base = devm_ioremap_resource(&pdev->dev, sha_res); - if (IS_ERR(sha_dd->io_base)) { - dev_err(dev, "can't ioremap\n"); - err = PTR_ERR(sha_dd->io_base); - goto err_tasklet_kill; - } - err = clk_prepare(sha_dd->iclk); if (err) goto err_tasklet_kill; From 32f91bb3df785a6334aa5acd46ac85dabff7368b Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Wed, 5 Jul 2023 15:21:58 +0800 Subject: [PATCH 136/656] crypto: atmel-tdes - Use devm_platform_get_and_ioremap_resource() Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Yangtao Li Signed-off-by: Herbert Xu --- drivers/crypto/atmel-tdes.c | 14 +++----------- 1 file changed, 3 insertions(+), 11 deletions(-) diff --git a/drivers/crypto/atmel-tdes.c b/drivers/crypto/atmel-tdes.c index c9ded8be9c39..ba8981f326cf 100644 --- a/drivers/crypto/atmel-tdes.c +++ b/drivers/crypto/atmel-tdes.c @@ -1172,11 +1172,9 @@ static int atmel_tdes_probe(struct platform_device *pdev) crypto_init_queue(&tdes_dd->queue, ATMEL_TDES_QUEUE_LENGTH); - /* Get the base address */ - tdes_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!tdes_res) { - dev_err(dev, "no MEM resource info\n"); - err = -ENODEV; + tdes_dd->io_base = devm_platform_get_and_ioremap_resource(pdev, 0, &tdes_res); + if (IS_ERR(tdes_dd->io_base)) { + err = PTR_ERR(tdes_dd->io_base); goto err_tasklet_kill; } tdes_dd->phys_base = tdes_res->start; @@ -1203,12 +1201,6 @@ static int atmel_tdes_probe(struct platform_device *pdev) goto err_tasklet_kill; } - tdes_dd->io_base = devm_ioremap_resource(&pdev->dev, tdes_res); - if (IS_ERR(tdes_dd->io_base)) { - err = PTR_ERR(tdes_dd->io_base); - goto err_tasklet_kill; - } - err = atmel_tdes_hw_version_init(tdes_dd); if (err) goto err_tasklet_kill; From 66c7b6473e2d6838973216a853ed1cc8dd193dc7 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Wed, 5 Jul 2023 19:52:42 +0800 Subject: [PATCH 137/656] hwrng: timeriomem - Use devm_platform_get_and_ioremap_resource() Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Yangtao Li Reviewed-by: Martin Kaiser Signed-off-by: Herbert Xu --- drivers/char/hw_random/timeriomem-rng.c | 25 ++++++++++--------------- 1 file changed, 10 insertions(+), 15 deletions(-) diff --git a/drivers/char/hw_random/timeriomem-rng.c b/drivers/char/hw_random/timeriomem-rng.c index 26f322d19a88..3db9d868efb1 100644 --- a/drivers/char/hw_random/timeriomem-rng.c +++ b/drivers/char/hw_random/timeriomem-rng.c @@ -113,16 +113,6 @@ static int timeriomem_rng_probe(struct platform_device *pdev) return -EINVAL; } - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) - return -ENXIO; - - if (res->start % 4 != 0 || resource_size(res) < 4) { - dev_err(&pdev->dev, - "address must be at least four bytes wide and 32-bit aligned\n"); - return -EINVAL; - } - /* Allocate memory for the device structure (and zero it) */ priv = devm_kzalloc(&pdev->dev, sizeof(struct timeriomem_rng_private), GFP_KERNEL); @@ -131,6 +121,16 @@ static int timeriomem_rng_probe(struct platform_device *pdev) platform_set_drvdata(pdev, priv); + priv->io_base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); + if (IS_ERR(priv->io_base)) + return PTR_ERR(priv->io_base); + + if (res->start % 4 != 0 || resource_size(res) < 4) { + dev_err(&pdev->dev, + "address must be at least four bytes wide and 32-bit aligned\n"); + return -EINVAL; + } + if (pdev->dev.of_node) { int i; @@ -158,11 +158,6 @@ static int timeriomem_rng_probe(struct platform_device *pdev) priv->rng_ops.name = dev_name(&pdev->dev); priv->rng_ops.read = timeriomem_rng_read; - priv->io_base = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(priv->io_base)) { - return PTR_ERR(priv->io_base); - } - /* Assume random data is already available. */ priv->present = 1; complete(&priv->completion); From b3882fa2a10e28b7642d0c11fcc26caab90e0fa4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Fri, 7 Jul 2023 09:07:53 +0200 Subject: [PATCH 138/656] crypto: starfive - Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is ignored (apart from emitting a warning) and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Eventually after all drivers are converted, .remove_new() is renamed to .remove(). Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Signed-off-by: Uwe Kleine-König Signed-off-by: Herbert Xu --- drivers/crypto/starfive/jh7110-cryp.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/crypto/starfive/jh7110-cryp.c b/drivers/crypto/starfive/jh7110-cryp.c index cc43556b6c80..e573c097a4a0 100644 --- a/drivers/crypto/starfive/jh7110-cryp.c +++ b/drivers/crypto/starfive/jh7110-cryp.c @@ -212,7 +212,7 @@ err_probe_defer: return ret; } -static int starfive_cryp_remove(struct platform_device *pdev) +static void starfive_cryp_remove(struct platform_device *pdev) { struct starfive_cryp_dev *cryp = platform_get_drvdata(pdev); @@ -233,8 +233,6 @@ static int starfive_cryp_remove(struct platform_device *pdev) clk_disable_unprepare(cryp->hclk); clk_disable_unprepare(cryp->ahb); reset_control_assert(cryp->rst); - - return 0; } static const struct of_device_id starfive_dt_ids[] __maybe_unused = { @@ -245,7 +243,7 @@ MODULE_DEVICE_TABLE(of, starfive_dt_ids); static struct platform_driver starfive_cryp_driver = { .probe = starfive_cryp_probe, - .remove = starfive_cryp_remove, + .remove_new = starfive_cryp_remove, .driver = { .name = DRIVER_NAME, .of_match_table = starfive_dt_ids, From b0ab0797f7ab74bd6e78ddce7d2ea580e588c60d Mon Sep 17 00:00:00 2001 From: Weili Qian Date: Fri, 7 Jul 2023 21:18:19 +0800 Subject: [PATCH 139/656] crypto: hisilicon/hpre - ensure private key less than n The private key of the curve key size generated by stdrng, which maybe not less than n. Therefore, the private key with the curve key size minus 1 is generated to ensure that the private key is less than n. Signed-off-by: Weili Qian Signed-off-by: Herbert Xu --- drivers/crypto/hisilicon/hpre/hpre_crypto.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/crypto/hisilicon/hpre/hpre_crypto.c b/drivers/crypto/hisilicon/hpre/hpre_crypto.c index 8ede77310dc5..9a1c61be32cc 100644 --- a/drivers/crypto/hisilicon/hpre/hpre_crypto.c +++ b/drivers/crypto/hisilicon/hpre/hpre_crypto.c @@ -1392,9 +1392,9 @@ static int hpre_ecdh_set_secret(struct crypto_kpp *tfm, const void *buf, unsigned int len) { struct hpre_ctx *ctx = kpp_tfm_ctx(tfm); + unsigned int sz, sz_shift, curve_sz; struct device *dev = ctx->dev; char key[HPRE_ECC_MAX_KSZ]; - unsigned int sz, sz_shift; struct ecdh params; int ret; @@ -1406,7 +1406,13 @@ static int hpre_ecdh_set_secret(struct crypto_kpp *tfm, const void *buf, /* Use stdrng to generate private key */ if (!params.key || !params.key_size) { params.key = key; - params.key_size = hpre_ecdh_get_curvesz(ctx->curve_id); + curve_sz = hpre_ecdh_get_curvesz(ctx->curve_id); + if (!curve_sz) { + dev_err(dev, "Invalid curve size!\n"); + return -EINVAL; + } + + params.key_size = curve_sz - 1; ret = ecdh_gen_privkey(ctx, ¶ms); if (ret) return ret; From ee43f5bb23340c27603c3ad8ef94f677ad7cb9ad Mon Sep 17 00:00:00 2001 From: Guenter Roeck Date: Wed, 19 Jul 2023 20:28:48 -0700 Subject: [PATCH 140/656] regmap: Reject fast_io regmap configurations with RBTREE and MAPLE caches REGCACHE_RBTREE and REGCACHE_MAPLE dynamically allocate memory for regmap operations. This is incompatible with spinlock based locking which is used for fast_io operations. Reject affected configurations. Signed-off-by: Guenter Roeck Link: https://lore.kernel.org/r/20230720032848.1306349-2-linux@roeck-us.net Signed-off-by: Mark Brown --- drivers/base/regmap/regmap.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/base/regmap/regmap.c b/drivers/base/regmap/regmap.c index 8b37451fa931..6c637b18d6b0 100644 --- a/drivers/base/regmap/regmap.c +++ b/drivers/base/regmap/regmap.c @@ -723,6 +723,15 @@ struct regmap *__regmap_init(struct device *dev, } else { if ((bus && bus->fast_io) || config->fast_io) { + /* + * fast_io is incompatible with REGCACHE_RBTREE and REGCACHE_MAPLE + * since both need to dynamically allocate memory. + */ + if (config->cache_type == REGCACHE_RBTREE || + config->cache_type == REGCACHE_MAPLE) { + ret = -EINVAL; + goto err_name; + } if (config->use_raw_spinlock) { raw_spin_lock_init(&map->raw_spinlock); map->lock = regmap_lock_raw_spinlock; From 1e7dae68510aa90a022fefed392fa794b16bc68b Mon Sep 17 00:00:00 2001 From: Yuanjun Gong Date: Thu, 20 Jul 2023 22:08:59 +0800 Subject: [PATCH 141/656] spi: fix return value check in bcm2835_spi_probe() in bcm2835_spi_probe(), clk_prepare_enable() may fail, therefore, the return value of clk_prepare_enable() should be checked, and the function should return error if clk_prepare_enable() fails. Signed-off-by: Yuanjun Gong Link: https://lore.kernel.org/r/20230720140859.33883-1-ruc_gongyuanjun@163.com Signed-off-by: Mark Brown --- drivers/spi/spi-bcm2835.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-bcm2835.c b/drivers/spi/spi-bcm2835.c index b247ee887562..83fd062fc491 100644 --- a/drivers/spi/spi-bcm2835.c +++ b/drivers/spi/spi-bcm2835.c @@ -1363,7 +1363,9 @@ static int bcm2835_spi_probe(struct platform_device *pdev) if (bs->irq <= 0) return bs->irq ? bs->irq : -ENODEV; - clk_prepare_enable(bs->clk); + err = clk_prepare_enable(bs->clk); + if (err) + return err; bs->clk_hz = clk_get_rate(bs->clk); err = bcm2835_dma_init(ctlr, &pdev->dev, bs); From a90a987ebe008c941338285764e5afc0d663f54d Mon Sep 17 00:00:00 2001 From: Yuanjun Gong Date: Thu, 20 Jul 2023 22:09:09 +0800 Subject: [PATCH 142/656] spi: use devm_clk_get_enabled() in mcfqspi_probe() in mcfqspi_probe(), the return value of function clk_prepare_enable() should be checked, since it may fail. using devm_clk_get_enabled() instead of devm_clk_get() and clk_prepare_enable() can avoid this problem. Signed-off-by: Yuanjun Gong Link: https://lore.kernel.org/r/20230720140909.34084-1-ruc_gongyuanjun@163.com Signed-off-by: Mark Brown --- drivers/spi/spi-coldfire-qspi.c | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/drivers/spi/spi-coldfire-qspi.c b/drivers/spi/spi-coldfire-qspi.c index b1bd8a6b5bf9..31174e7ca7a6 100644 --- a/drivers/spi/spi-coldfire-qspi.c +++ b/drivers/spi/spi-coldfire-qspi.c @@ -381,13 +381,12 @@ static int mcfqspi_probe(struct platform_device *pdev) goto fail0; } - mcfqspi->clk = devm_clk_get(&pdev->dev, "qspi_clk"); + mcfqspi->clk = devm_clk_get_enabled(&pdev->dev, "qspi_clk"); if (IS_ERR(mcfqspi->clk)) { dev_dbg(&pdev->dev, "clk_get failed\n"); status = PTR_ERR(mcfqspi->clk); goto fail0; } - clk_prepare_enable(mcfqspi->clk); master->bus_num = pdata->bus_num; master->num_chipselect = pdata->num_chipselect; @@ -396,7 +395,7 @@ static int mcfqspi_probe(struct platform_device *pdev) status = mcfqspi_cs_setup(mcfqspi); if (status) { dev_dbg(&pdev->dev, "error initializing cs_control\n"); - goto fail1; + goto fail0; } init_waitqueue_head(&mcfqspi->waitq); @@ -414,18 +413,16 @@ static int mcfqspi_probe(struct platform_device *pdev) status = devm_spi_register_master(&pdev->dev, master); if (status) { dev_dbg(&pdev->dev, "spi_register_master failed\n"); - goto fail2; + goto fail1; } dev_info(&pdev->dev, "Coldfire QSPI bus driver\n"); return 0; -fail2: +fail1: pm_runtime_disable(&pdev->dev); mcfqspi_cs_teardown(mcfqspi); -fail1: - clk_disable_unprepare(mcfqspi->clk); fail0: spi_master_put(master); From 212892b89d50cf4fd750f999a0c1b167708d45cd Mon Sep 17 00:00:00 2001 From: Andrew Davis Date: Thu, 13 Jul 2023 15:20:46 -0500 Subject: [PATCH 143/656] gpio: pisosr: Use devm_gpiochip_add_data() to simplify remove path Use devm version of gpiochip add function to handle removal for us. While here update copyright and module author. Signed-off-by: Andrew Davis Reviewed-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-pisosr.c | 28 ++++++++++++---------------- 1 file changed, 12 insertions(+), 16 deletions(-) diff --git a/drivers/gpio/gpio-pisosr.c b/drivers/gpio/gpio-pisosr.c index 67071bea08c2..e3013e778e15 100644 --- a/drivers/gpio/gpio-pisosr.c +++ b/drivers/gpio/gpio-pisosr.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/ - * Andrew F. Davis + * Copyright (C) 2015-2023 Texas Instruments Incorporated - https://www.ti.com/ + * Andrew Davis */ #include @@ -116,6 +116,11 @@ static const struct gpio_chip template_chip = { .can_sleep = true, }; +static void pisosr_mutex_destroy(void *lock) +{ + mutex_destroy(lock); +} + static int pisosr_gpio_probe(struct spi_device *spi) { struct device *dev = &spi->dev; @@ -126,8 +131,6 @@ static int pisosr_gpio_probe(struct spi_device *spi) if (!gpio) return -ENOMEM; - spi_set_drvdata(spi, gpio); - gpio->chip = template_chip; gpio->chip.parent = dev; of_property_read_u16(dev->of_node, "ngpios", &gpio->chip.ngpio); @@ -145,8 +148,11 @@ static int pisosr_gpio_probe(struct spi_device *spi) "Unable to allocate load GPIO\n"); mutex_init(&gpio->lock); + ret = devm_add_action_or_reset(dev, pisosr_mutex_destroy, &gpio->lock); + if (ret) + return ret; - ret = gpiochip_add_data(&gpio->chip, gpio); + ret = devm_gpiochip_add_data(dev, &gpio->chip, gpio); if (ret < 0) { dev_err(dev, "Unable to register gpiochip\n"); return ret; @@ -155,15 +161,6 @@ static int pisosr_gpio_probe(struct spi_device *spi) return 0; } -static void pisosr_gpio_remove(struct spi_device *spi) -{ - struct pisosr_gpio *gpio = spi_get_drvdata(spi); - - gpiochip_remove(&gpio->chip); - - mutex_destroy(&gpio->lock); -} - static const struct spi_device_id pisosr_gpio_id_table[] = { { "pisosr-gpio", }, { /* sentinel */ } @@ -182,11 +179,10 @@ static struct spi_driver pisosr_gpio_driver = { .of_match_table = pisosr_gpio_of_match_table, }, .probe = pisosr_gpio_probe, - .remove = pisosr_gpio_remove, .id_table = pisosr_gpio_id_table, }; module_spi_driver(pisosr_gpio_driver); -MODULE_AUTHOR("Andrew F. Davis "); +MODULE_AUTHOR("Andrew Davis "); MODULE_DESCRIPTION("SPI Compatible PISO Shift Register GPIO Driver"); MODULE_LICENSE("GPL v2"); From 320630c45e6668c7b9b59489068cd1f85637a6ff Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 12 Jul 2023 09:45:53 +0200 Subject: [PATCH 144/656] dt-bindings: gpio: snps,dw-apb: allow gpio-line-names Allow the GPIO controller subnode to define GPIO names. Already used in at least on DTS: bitmain/bm1880-sophon-edge.dtb: gpio@50027000: gpio-controller@0: 'gpio-line-names' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski Acked-by: Serge Semin Acked-by: Rob Herring Signed-off-by: Bartosz Golaszewski --- Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml b/Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml index b391cc1b4590..209f03bba0a7 100644 --- a/Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml @@ -61,6 +61,10 @@ patternProperties: '#gpio-cells': const: 2 + gpio-line-names: + minItems: 1 + maxItems: 32 + ngpios: default: 32 minimum: 1 From b0393e1fe40e962574613a5cdc4a470d6c1de023 Mon Sep 17 00:00:00 2001 From: Guenter Roeck Date: Thu, 20 Jul 2023 10:20:21 -0700 Subject: [PATCH 145/656] regmap: maple: Use alloc_flags for memory allocations REGCACHE_MAPLE needs to allocate memory for regmap operations. This results in lockdep splats if used with fast_io since fast_io uses spinlocks for locking. BUG: sleeping function called from invalid context at include/linux/sched/mm.h:306 in_atomic(): 1, irqs_disabled(): 128, non_block: 0, pid: 167, name: kunit_try_catch preempt_count: 1, expected: 0 1 lock held by kunit_try_catch/167: #0: 838e9c10 (regmap_kunit:86:(config)->lock){....}-{2:2}, at: regmap_lock_spinlock+0x14/0x1c irq event stamp: 146 hardirqs last enabled at (145): [<8078bfa8>] crng_make_state+0x1a0/0x294 hardirqs last disabled at (146): [<80c5f62c>] _raw_spin_lock_irqsave+0x7c/0x80 softirqs last enabled at (0): [<80110cc4>] copy_process+0x810/0x216c softirqs last disabled at (0): [<00000000>] 0x0 CPU: 0 PID: 167 Comm: kunit_try_catch Tainted: G N 6.5.0-rc1-00028-gc4be22597a36-dirty #6 Hardware name: Generic DT based system unwind_backtrace from show_stack+0x18/0x1c show_stack from dump_stack_lvl+0x38/0x5c dump_stack_lvl from __might_resched+0x188/0x2d0 __might_resched from __kmem_cache_alloc_node+0x1f4/0x258 __kmem_cache_alloc_node from __kmalloc+0x48/0x170 __kmalloc from regcache_maple_write+0x194/0x248 regcache_maple_write from _regmap_write+0x88/0x140 _regmap_write from regmap_write+0x44/0x68 regmap_write from basic_read_write+0x8c/0x27c basic_read_write from kunit_generic_run_threadfn_adapter+0x1c/0x28 kunit_generic_run_threadfn_adapter from kthread+0xf8/0x120 kthread from ret_from_fork+0x14/0x3c Exception stack(0x881a5fb0 to 0x881a5ff8) 5fa0: 00000000 00000000 00000000 00000000 5fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 5fe0: 00000000 00000000 00000000 00000000 00000013 00000000 Use map->alloc_flags instead of GFP_KERNEL for memory allocations to fix the problem. Fixes: f033c26de5a5 ("regmap: Add maple tree based register cache") Cc: Dan Carpenter Signed-off-by: Guenter Roeck Link: https://lore.kernel.org/r/20230720172021.2617326-1-linux@roeck-us.net Signed-off-by: Mark Brown --- drivers/base/regmap/regcache-maple.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/base/regmap/regcache-maple.c b/drivers/base/regmap/regcache-maple.c index 283c2e02a298..41edd6a430eb 100644 --- a/drivers/base/regmap/regcache-maple.c +++ b/drivers/base/regmap/regcache-maple.c @@ -74,7 +74,7 @@ static int regcache_maple_write(struct regmap *map, unsigned int reg, rcu_read_unlock(); entry = kmalloc((last - index + 1) * sizeof(unsigned long), - GFP_KERNEL); + map->alloc_flags); if (!entry) return -ENOMEM; @@ -92,7 +92,7 @@ static int regcache_maple_write(struct regmap *map, unsigned int reg, mas_lock(&mas); mas_set_range(&mas, index, last); - ret = mas_store_gfp(&mas, entry, GFP_KERNEL); + ret = mas_store_gfp(&mas, entry, map->alloc_flags); mas_unlock(&mas); @@ -134,7 +134,7 @@ static int regcache_maple_drop(struct regmap *map, unsigned int min, lower = kmemdup(entry, ((min - mas.index) * sizeof(unsigned long)), - GFP_KERNEL); + map->alloc_flags); if (!lower) { ret = -ENOMEM; goto out_unlocked; @@ -148,7 +148,7 @@ static int regcache_maple_drop(struct regmap *map, unsigned int min, upper = kmemdup(&entry[max + 1], ((mas.last - max) * sizeof(unsigned long)), - GFP_KERNEL); + map->alloc_flags); if (!upper) { ret = -ENOMEM; goto out_unlocked; @@ -162,7 +162,7 @@ static int regcache_maple_drop(struct regmap *map, unsigned int min, /* Insert new nodes with the saved data */ if (lower) { mas_set_range(&mas, lower_index, lower_last); - ret = mas_store_gfp(&mas, lower, GFP_KERNEL); + ret = mas_store_gfp(&mas, lower, map->alloc_flags); if (ret != 0) goto out; lower = NULL; @@ -170,7 +170,7 @@ static int regcache_maple_drop(struct regmap *map, unsigned int min, if (upper) { mas_set_range(&mas, upper_index, upper_last); - ret = mas_store_gfp(&mas, upper, GFP_KERNEL); + ret = mas_store_gfp(&mas, upper, map->alloc_flags); if (ret != 0) goto out; upper = NULL; @@ -320,7 +320,7 @@ static int regcache_maple_insert_block(struct regmap *map, int first, unsigned long *entry; int i, ret; - entry = kcalloc(last - first + 1, sizeof(unsigned long), GFP_KERNEL); + entry = kcalloc(last - first + 1, sizeof(unsigned long), map->alloc_flags); if (!entry) return -ENOMEM; @@ -331,7 +331,7 @@ static int regcache_maple_insert_block(struct regmap *map, int first, mas_set_range(&mas, map->reg_defaults[first].reg, map->reg_defaults[last].reg); - ret = mas_store_gfp(&mas, entry, GFP_KERNEL); + ret = mas_store_gfp(&mas, entry, map->alloc_flags); mas_unlock(&mas); From 813ebba3b100997a24984040673d35cb2dc9f418 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Fri, 21 Jul 2023 09:33:03 +0200 Subject: [PATCH 146/656] regulator: max8893: Drop "_new" from probe callback MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The driver was introduced when .probe_new was the right probe callback to use for i2c drivers. Today .probe is the right one (again) and the driver was already switched in commit 964e186547b2 ("regulator: Switch i2c drivers back to use .probe()") but the name continued to include "_new". To prevent code readers wondering about what might be new here, drop that part of the name. Signed-off-by: Uwe Kleine-König Link: https://lore.kernel.org/r/20230721073303.112597-1-u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown --- drivers/regulator/max8893.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/regulator/max8893.c b/drivers/regulator/max8893.c index cb0e72948dd4..30592425e193 100644 --- a/drivers/regulator/max8893.c +++ b/drivers/regulator/max8893.c @@ -125,7 +125,7 @@ static const struct regmap_config max8893_regmap = { .val_bits = 8, }; -static int max8893_probe_new(struct i2c_client *i2c) +static int max8893_probe(struct i2c_client *i2c) { int id, ret; struct regulator_config config = {.dev = &i2c->dev}; @@ -168,7 +168,7 @@ static const struct i2c_device_id max8893_ids[] = { MODULE_DEVICE_TABLE(i2c, max8893_ids); static struct i2c_driver max8893_driver = { - .probe = max8893_probe_new, + .probe = max8893_probe, .driver = { .name = "max8893", .probe_type = PROBE_PREFER_ASYNCHRONOUS, From 4fdef8553df58953f572f1cb46d357c735c683a9 Mon Sep 17 00:00:00 2001 From: Rohit Agarwal Date: Tue, 11 Jul 2023 13:30:12 +0530 Subject: [PATCH 147/656] regulator: dt-bindings: qcom,rpmh: Update PMX65 entry PMX65 does not have vdd-l18-supply separately and its already part of vdd-l2-l18-supply property specified. Updating this PMX65 dt-bindings entry accordingly. Signed-off-by: Rohit Agarwal Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/1689062414-3654-2-git-send-email-quic_rohiagar@quicinc.com Signed-off-by: Mark Brown --- .../devicetree/bindings/regulator/qcom,rpmh-regulator.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml index b9498504ad79..12a1e0c35ab2 100644 --- a/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml @@ -424,7 +424,7 @@ allOf: vdd-l11-l13-supply: true patternProperties: "^vdd-l[1347]-supply$": true - "^vdd-l1[0245789]-supply$": true + "^vdd-l1[024579]-supply$": true "^vdd-l2[01]-supply$": true "^vdd-s[1-8]-supply$": true From 0ef3d931632e3fce51ed5510935238937d644c97 Mon Sep 17 00:00:00 2001 From: Rohit Agarwal Date: Tue, 11 Jul 2023 13:30:13 +0530 Subject: [PATCH 148/656] regulator: dt-bindings: qcom,rpmh: Add PMX75 compatible Add PMX75 compatibles for PMIC found in SDX75 platform. Signed-off-by: Rohit Agarwal Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/1689062414-3654-3-git-send-email-quic_rohiagar@quicinc.com Signed-off-by: Mark Brown --- .../regulator/qcom,rpmh-regulator.yaml | 20 +++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml index 12a1e0c35ab2..72b533c3761a 100644 --- a/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml @@ -53,6 +53,7 @@ description: | For PMR735A, smps1 - smps3, ldo1 - ldo7 For PMX55, smps1 - smps7, ldo1 - ldo16 For PMX65, smps1 - smps8, ldo1 - ldo21 + For PMX75, smps1 - smps10, ldo1 - ldo21 properties: compatible: @@ -84,6 +85,7 @@ properties: - qcom,pmr735a-rpmh-regulators - qcom,pmx55-rpmh-regulators - qcom,pmx65-rpmh-regulators + - qcom,pmx75-rpmh-regulators qcom,pmic-id: description: | @@ -428,6 +430,24 @@ allOf: "^vdd-l2[01]-supply$": true "^vdd-s[1-8]-supply$": true + - if: + properties: + compatible: + enum: + - qcom,pmx75-rpmh-regulators + then: + properties: + vdd-l2-l18-supply: true + vdd-l4-l16-supply: true + vdd-l5-l6-supply: true + vdd-l8-l9-supply: true + vdd-l11-l13-supply: true + vdd-l20-l21-supply: true + patternProperties: + "^vdd-l[137]-supply$": true + "^vdd-l1[024579]-supply$": true + "^vdd-s([1-9]|10)-supply$": true + unevaluatedProperties: false examples: From 0b294ed669ead34a348d17d06b6d4d58712b14e2 Mon Sep 17 00:00:00 2001 From: Rohit Agarwal Date: Tue, 11 Jul 2023 13:30:14 +0530 Subject: [PATCH 149/656] regulator: qcom-rpmh: Add regulators support for PMX75 Add support from RPMH regulators found in PMX75 for SDX75 platform. Signed-off-by: Rohit Agarwal Link: https://lore.kernel.org/r/1689062414-3654-4-git-send-email-quic_rohiagar@quicinc.com Signed-off-by: Mark Brown --- drivers/regulator/qcom-rpmh-regulator.c | 38 +++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/drivers/regulator/qcom-rpmh-regulator.c b/drivers/regulator/qcom-rpmh-regulator.c index ec1b50721ec6..88ddd6c54d04 100644 --- a/drivers/regulator/qcom-rpmh-regulator.c +++ b/drivers/regulator/qcom-rpmh-regulator.c @@ -1272,6 +1272,40 @@ static const struct rpmh_vreg_init_data pmx65_vreg_data[] = { {} }; +static const struct rpmh_vreg_init_data pmx75_vreg_data[] = { + RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps525_lv, "vdd-s1"), + RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps525_lv, "vdd-s2"), + RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps525_lv, "vdd-s3"), + RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps525_mv, "vdd-s4"), + RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps525_lv, "vdd-s5"), + RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps525_lv, "vdd-s6"), + RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps525_lv, "vdd-s7"), + RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps525_lv, "vdd-s8"), + RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps525_lv, "vdd-s9"), + RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps525_lv, "vdd-s10"), + RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo515, "vdd-l1"), + RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo515, "vdd-l2-18"), + RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo515, "vdd-l3"), + RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo515, "vdd-l4-l16"), + RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo_lv, "vdd-l5-l6"), + RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo_lv, "vdd-l5-l6"), + RPMH_VREG("ldo7", "ldo%s7", &pmic5_nldo515, "vdd-l7"), + RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo515, "vdd-l8-l9"), + RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo515, "vdd-l8-l9"), + RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l10"), + RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l11-l13"), + RPMH_VREG("ldo12", "ldo%s12", &pmic5_nldo515, "vdd-l12"), + RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l11-l13"), + RPMH_VREG("ldo14", "ldo%s14", &pmic5_nldo515, "vdd-l14"), + RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo515, "vdd-l15"), + RPMH_VREG("ldo16", "ldo%s16", &pmic5_nldo515, "vdd-l4-l16"), + RPMH_VREG("ldo17", "ldo%s17", &pmic5_nldo515, "vdd-l17"), + /* ldo18 not configured */ + RPMH_VREG("ldo19", "ldo%s19", &pmic5_nldo515, "vdd-l19"), + RPMH_VREG("ldo20", "ldo%s20", &pmic5_nldo515, "vdd-l20-l21"), + RPMH_VREG("ldo21", "ldo%s21", &pmic5_nldo515, "vdd-l20-l21"), +}; + static const struct rpmh_vreg_init_data pm7325_vreg_data[] = { RPMH_VREG("smps1", "smp%s1", &pmic5_hfsmps510, "vdd-s1"), RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps520, "vdd-s2"), @@ -1493,6 +1527,10 @@ static const struct of_device_id __maybe_unused rpmh_regulator_match_table[] = { .compatible = "qcom,pmx65-rpmh-regulators", .data = pmx65_vreg_data, }, + { + .compatible = "qcom,pmx75-rpmh-regulators", + .data = pmx75_vreg_data, + }, { .compatible = "qcom,pm7325-rpmh-regulators", .data = pm7325_vreg_data, From 0c8b0bf42c8cef56f7cd9cd876fbb7ece9217064 Mon Sep 17 00:00:00 2001 From: Dan Carpenter Date: Fri, 21 Jul 2023 17:55:33 +0300 Subject: [PATCH 150/656] regmap: rbtree: Use alloc_flags for memory allocations The kunit tests discovered a sleeping in atomic bug. The allocations in the regcache-rbtree code should use the map->alloc_flags instead of GFP_KERNEL. [ 5.005510] BUG: sleeping function called from invalid context at include/linux/sched/mm.h:306 [ 5.005960] in_atomic(): 1, irqs_disabled(): 128, non_block: 0, pid: 117, name: kunit_try_catch [ 5.006219] preempt_count: 1, expected: 0 [ 5.006414] 1 lock held by kunit_try_catch/117: [ 5.006590] #0: 833b9010 (regmap_kunit:86:(config)->lock){....}-{2:2}, at: regmap_lock_spinlock+0x14/0x1c [ 5.007493] irq event stamp: 162 [ 5.007627] hardirqs last enabled at (161): [<80786738>] crng_make_state+0x1a0/0x294 [ 5.007871] hardirqs last disabled at (162): [<80c531ec>] _raw_spin_lock_irqsave+0x7c/0x80 [ 5.008119] softirqs last enabled at (0): [<801110ac>] copy_process+0x810/0x2138 [ 5.008356] softirqs last disabled at (0): [<00000000>] 0x0 [ 5.008688] CPU: 0 PID: 117 Comm: kunit_try_catch Tainted: G N 6.4.4-rc3-g0e8d2fdfb188 #1 [ 5.009011] Hardware name: Generic DT based system [ 5.009277] unwind_backtrace from show_stack+0x18/0x1c [ 5.009497] show_stack from dump_stack_lvl+0x38/0x5c [ 5.009676] dump_stack_lvl from __might_resched+0x188/0x2d0 [ 5.009860] __might_resched from __kmem_cache_alloc_node+0x1dc/0x25c [ 5.010061] __kmem_cache_alloc_node from kmalloc_trace+0x30/0xc8 [ 5.010254] kmalloc_trace from regcache_rbtree_write+0x26c/0x468 [ 5.010446] regcache_rbtree_write from _regmap_write+0x88/0x140 [ 5.010634] _regmap_write from regmap_write+0x44/0x68 [ 5.010803] regmap_write from basic_read_write+0x8c/0x270 [ 5.010980] basic_read_write from kunit_try_run_case+0x48/0xa0 Fixes: 28644c809f44 ("regmap: Add the rbtree cache support") Reported-by: Guenter Roeck Closes: https://lore.kernel.org/all/ee59d128-413c-48ad-a3aa-d9d350c80042@roeck-us.net/ Signed-off-by: Dan Carpenter Tested-by: Guenter Roeck Link: https://lore.kernel.org/r/58f12a07-5f4b-4a8f-ab84-0a42d1908cb9@moroto.mountain Signed-off-by: Mark Brown --- drivers/base/regmap/regcache-rbtree.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/base/regmap/regcache-rbtree.c b/drivers/base/regmap/regcache-rbtree.c index fabf87058d80..ae6b8788d5f3 100644 --- a/drivers/base/regmap/regcache-rbtree.c +++ b/drivers/base/regmap/regcache-rbtree.c @@ -277,7 +277,7 @@ static int regcache_rbtree_insert_to_block(struct regmap *map, blk = krealloc(rbnode->block, blklen * map->cache_word_size, - GFP_KERNEL); + map->alloc_flags); if (!blk) return -ENOMEM; @@ -286,7 +286,7 @@ static int regcache_rbtree_insert_to_block(struct regmap *map, if (BITS_TO_LONGS(blklen) > BITS_TO_LONGS(rbnode->blklen)) { present = krealloc(rbnode->cache_present, BITS_TO_LONGS(blklen) * sizeof(*present), - GFP_KERNEL); + map->alloc_flags); if (!present) return -ENOMEM; @@ -320,7 +320,7 @@ regcache_rbtree_node_alloc(struct regmap *map, unsigned int reg) const struct regmap_range *range; int i; - rbnode = kzalloc(sizeof(*rbnode), GFP_KERNEL); + rbnode = kzalloc(sizeof(*rbnode), map->alloc_flags); if (!rbnode) return NULL; @@ -346,13 +346,13 @@ regcache_rbtree_node_alloc(struct regmap *map, unsigned int reg) } rbnode->block = kmalloc_array(rbnode->blklen, map->cache_word_size, - GFP_KERNEL); + map->alloc_flags); if (!rbnode->block) goto err_free; rbnode->cache_present = kcalloc(BITS_TO_LONGS(rbnode->blklen), sizeof(*rbnode->cache_present), - GFP_KERNEL); + map->alloc_flags); if (!rbnode->cache_present) goto err_free_block; From e02a4ccbeced64aa10f4e99683c721ec43e993c1 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Fri, 21 Jul 2023 17:31:36 +0100 Subject: [PATCH 151/656] regmap: Remove dynamic allocation warnings for rbtree and maple Thanks to Dan and Guenter's very prompt updates of the rbtree and maple caches to support GPF_ATOMIC allocations and since the update shook out a bunch of users at least some of whom have been suitably careful about ensuring that the cache is prepoulated so there are no dynamic allocations after init let's revert the warnings. Signed-off-by: Mark Brown Link: https://lore.kernel.org/r/20230721-regmap-enable-kmalloc-v1-1-f78287e794d3@kernel.org --- drivers/base/regmap/regmap.c | 9 --------- 1 file changed, 9 deletions(-) diff --git a/drivers/base/regmap/regmap.c b/drivers/base/regmap/regmap.c index 6c637b18d6b0..8b37451fa931 100644 --- a/drivers/base/regmap/regmap.c +++ b/drivers/base/regmap/regmap.c @@ -723,15 +723,6 @@ struct regmap *__regmap_init(struct device *dev, } else { if ((bus && bus->fast_io) || config->fast_io) { - /* - * fast_io is incompatible with REGCACHE_RBTREE and REGCACHE_MAPLE - * since both need to dynamically allocate memory. - */ - if (config->cache_type == REGCACHE_RBTREE || - config->cache_type == REGCACHE_MAPLE) { - ret = -EINVAL; - goto err_name; - } if (config->use_raw_spinlock) { raw_spin_lock_init(&map->raw_spinlock); map->lock = regmap_lock_raw_spinlock; From d4211390d88902462a7642eb22fd83083588eaf7 Mon Sep 17 00:00:00 2001 From: Martin Kaiser Date: Mon, 10 Jul 2023 22:27:27 +0200 Subject: [PATCH 152/656] hwrng: ingenic - enable compile testing Enable compile testing for the ingenic-trng driver. Remove the dependency on HW_RANDOM. The ingenic-trng config section is under "if HW_RANDOM". Signed-off-by: Martin Kaiser Signed-off-by: Herbert Xu --- drivers/char/hw_random/Kconfig | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig index 1aeba12391a1..5d72b8da3c36 100644 --- a/drivers/char/hw_random/Kconfig +++ b/drivers/char/hw_random/Kconfig @@ -271,8 +271,7 @@ config HW_RANDOM_INGENIC_RNG config HW_RANDOM_INGENIC_TRNG tristate "Ingenic True Random Number Generator support" - depends on HW_RANDOM - depends on MACH_X1830 + depends on MACH_X1830 || COMPILE_TEST default HW_RANDOM help This driver provides kernel-side support for the True Random Number Generator From 4cb9a7271f46eb1cc58099a3503d4b3f3969e37c Mon Sep 17 00:00:00 2001 From: Martin Kaiser Date: Mon, 10 Jul 2023 22:27:28 +0200 Subject: [PATCH 153/656] hwrng: ingenic - remove two unused defines Remove two defines which are not used in the ingenic-trng driver's code. Signed-off-by: Martin Kaiser Signed-off-by: Herbert Xu --- drivers/char/hw_random/ingenic-trng.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/char/hw_random/ingenic-trng.c b/drivers/char/hw_random/ingenic-trng.c index 0eb80f786f4d..64286cbdf158 100644 --- a/drivers/char/hw_random/ingenic-trng.c +++ b/drivers/char/hw_random/ingenic-trng.c @@ -22,8 +22,6 @@ #define TRNG_REG_STATUS_OFFSET 0x08 /* bits within the CFG register */ -#define CFG_RDY_CLR BIT(12) -#define CFG_INT_MASK BIT(11) #define CFG_GEN_EN BIT(0) /* bits within the STATUS register */ From 099f236879068547a05d02b92fb2861694027440 Mon Sep 17 00:00:00 2001 From: Martin Kaiser Date: Mon, 10 Jul 2023 22:27:29 +0200 Subject: [PATCH 154/656] hwrng: ingenic - remove dead assignments Don't assign a value to ret if we're about to return from the probe function and ret's value is not used. Signed-off-by: Martin Kaiser Signed-off-by: Herbert Xu --- drivers/char/hw_random/ingenic-trng.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/char/hw_random/ingenic-trng.c b/drivers/char/hw_random/ingenic-trng.c index 64286cbdf158..bfec28ceab00 100644 --- a/drivers/char/hw_random/ingenic-trng.c +++ b/drivers/char/hw_random/ingenic-trng.c @@ -86,13 +86,11 @@ static int ingenic_trng_probe(struct platform_device *pdev) trng->base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(trng->base)) { pr_err("%s: Failed to map DTRNG registers\n", __func__); - ret = PTR_ERR(trng->base); return PTR_ERR(trng->base); } trng->clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(trng->clk)) { - ret = PTR_ERR(trng->clk); pr_crit("%s: Cannot get DTRNG clock\n", __func__); return PTR_ERR(trng->clk); } From e4ab6e72e84d4cfd6f8e5f477204f3053a79108f Mon Sep 17 00:00:00 2001 From: Martin Kaiser Date: Mon, 10 Jul 2023 22:27:30 +0200 Subject: [PATCH 155/656] hwrng: ingenic - use devm_clk_get_enabled Use devm_clk_get_enabled in the ingenic-trng driver. We don't have to disable and unprepare the clock any more in error paths or in the remove function. Signed-off-by: Martin Kaiser Signed-off-by: Herbert Xu --- drivers/char/hw_random/ingenic-trng.c | 24 ++++++------------------ 1 file changed, 6 insertions(+), 18 deletions(-) diff --git a/drivers/char/hw_random/ingenic-trng.c b/drivers/char/hw_random/ingenic-trng.c index bfec28ceab00..906fa78de47e 100644 --- a/drivers/char/hw_random/ingenic-trng.c +++ b/drivers/char/hw_random/ingenic-trng.c @@ -29,7 +29,6 @@ struct ingenic_trng { void __iomem *base; - struct clk *clk; struct hwrng rng; }; @@ -77,6 +76,7 @@ static int ingenic_trng_read(struct hwrng *rng, void *buf, size_t max, bool wait static int ingenic_trng_probe(struct platform_device *pdev) { struct ingenic_trng *trng; + struct clk *clk; int ret; trng = devm_kzalloc(&pdev->dev, sizeof(*trng), GFP_KERNEL); @@ -89,16 +89,10 @@ static int ingenic_trng_probe(struct platform_device *pdev) return PTR_ERR(trng->base); } - trng->clk = devm_clk_get(&pdev->dev, NULL); - if (IS_ERR(trng->clk)) { - pr_crit("%s: Cannot get DTRNG clock\n", __func__); - return PTR_ERR(trng->clk); - } - - ret = clk_prepare_enable(trng->clk); - if (ret) { - pr_crit("%s: Unable to enable DTRNG clock\n", __func__); - return ret; + clk = devm_clk_get_enabled(&pdev->dev, NULL); + if (IS_ERR(clk)) { + pr_crit("%s: Cannot get and enable DTRNG clock\n", __func__); + return PTR_ERR(clk); } trng->rng.name = pdev->name; @@ -109,17 +103,13 @@ static int ingenic_trng_probe(struct platform_device *pdev) ret = hwrng_register(&trng->rng); if (ret) { dev_err(&pdev->dev, "Failed to register hwrng\n"); - goto err_unprepare_clk; + return ret; } platform_set_drvdata(pdev, trng); dev_info(&pdev->dev, "Ingenic DTRNG driver registered\n"); return 0; - -err_unprepare_clk: - clk_disable_unprepare(trng->clk); - return ret; } static int ingenic_trng_remove(struct platform_device *pdev) @@ -133,8 +123,6 @@ static int ingenic_trng_remove(struct platform_device *pdev) ctrl &= ~CFG_GEN_EN; writel(ctrl, trng->base + TRNG_REG_CFG_OFFSET); - clk_disable_unprepare(trng->clk); - return 0; } From 6257490b95252b0c22e4b518570d438cedc78a0d Mon Sep 17 00:00:00 2001 From: Martin Kaiser Date: Mon, 10 Jul 2023 22:27:31 +0200 Subject: [PATCH 156/656] hwrng: ingenic - use dev_err_probe in error paths Use dev_err_probe in error paths to make the code a bit shorter. Signed-off-by: Martin Kaiser Signed-off-by: Herbert Xu --- drivers/char/hw_random/ingenic-trng.c | 20 ++++++++------------ 1 file changed, 8 insertions(+), 12 deletions(-) diff --git a/drivers/char/hw_random/ingenic-trng.c b/drivers/char/hw_random/ingenic-trng.c index 906fa78de47e..cc88a941c929 100644 --- a/drivers/char/hw_random/ingenic-trng.c +++ b/drivers/char/hw_random/ingenic-trng.c @@ -84,16 +84,14 @@ static int ingenic_trng_probe(struct platform_device *pdev) return -ENOMEM; trng->base = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(trng->base)) { - pr_err("%s: Failed to map DTRNG registers\n", __func__); - return PTR_ERR(trng->base); - } + if (IS_ERR(trng->base)) + return dev_err_probe(&pdev->dev, PTR_ERR(trng->base), + "%s: Failed to map DTRNG registers\n", __func__); clk = devm_clk_get_enabled(&pdev->dev, NULL); - if (IS_ERR(clk)) { - pr_crit("%s: Cannot get and enable DTRNG clock\n", __func__); - return PTR_ERR(clk); - } + if (IS_ERR(clk)) + return dev_err_probe(&pdev->dev, PTR_ERR(clk), + "%s: Cannot get and enable DTRNG clock\n", __func__); trng->rng.name = pdev->name; trng->rng.init = ingenic_trng_init; @@ -101,10 +99,8 @@ static int ingenic_trng_probe(struct platform_device *pdev) trng->rng.read = ingenic_trng_read; ret = hwrng_register(&trng->rng); - if (ret) { - dev_err(&pdev->dev, "Failed to register hwrng\n"); - return ret; - } + if (ret) + return dev_err_probe(&pdev->dev, ret, "Failed to register hwrng\n"); platform_set_drvdata(pdev, trng); From 71839a641066881e032b6353516b16bdafbf606a Mon Sep 17 00:00:00 2001 From: Martin Kaiser Date: Mon, 10 Jul 2023 22:27:32 +0200 Subject: [PATCH 157/656] hwrng: ingenic - don't disable the rng in ingenic_trng_remove There's no need to disable the rng in ingenic_trng_remove. The driver's init function sets the CFG_GEN_EN bit to enable the rng. The cleanup function clears CFG_GEN_EN to revert this. The remove function calls hwrng_unregister. If the ingenic-trng is not the current rng at this point, CFG_GEN_EN has already been cleared. If the ingenic-trng is the current rng, drop_current_rng will call the cleanup function. Signed-off-by: Martin Kaiser Signed-off-by: Herbert Xu --- drivers/char/hw_random/ingenic-trng.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/drivers/char/hw_random/ingenic-trng.c b/drivers/char/hw_random/ingenic-trng.c index cc88a941c929..9c54721f8399 100644 --- a/drivers/char/hw_random/ingenic-trng.c +++ b/drivers/char/hw_random/ingenic-trng.c @@ -111,14 +111,9 @@ static int ingenic_trng_probe(struct platform_device *pdev) static int ingenic_trng_remove(struct platform_device *pdev) { struct ingenic_trng *trng = platform_get_drvdata(pdev); - unsigned int ctrl; hwrng_unregister(&trng->rng); - ctrl = readl(trng->base + TRNG_REG_CFG_OFFSET); - ctrl &= ~CFG_GEN_EN; - writel(ctrl, trng->base + TRNG_REG_CFG_OFFSET); - return 0; } From a40be5e89ff636533fc849f3db8964388c0ee8f1 Mon Sep 17 00:00:00 2001 From: Martin Kaiser Date: Mon, 10 Jul 2023 22:27:33 +0200 Subject: [PATCH 158/656] hwrng: ingenic - switch to device managed registration Call devm_hwrng_register for device managed registration of the ingenic-trng driver. ingenic_trng_remove can then be deleted. Signed-off-by: Martin Kaiser Signed-off-by: Herbert Xu --- drivers/char/hw_random/ingenic-trng.c | 12 +----------- 1 file changed, 1 insertion(+), 11 deletions(-) diff --git a/drivers/char/hw_random/ingenic-trng.c b/drivers/char/hw_random/ingenic-trng.c index 9c54721f8399..3967a8dbe967 100644 --- a/drivers/char/hw_random/ingenic-trng.c +++ b/drivers/char/hw_random/ingenic-trng.c @@ -98,7 +98,7 @@ static int ingenic_trng_probe(struct platform_device *pdev) trng->rng.cleanup = ingenic_trng_cleanup; trng->rng.read = ingenic_trng_read; - ret = hwrng_register(&trng->rng); + ret = devm_hwrng_register(&pdev->dev, &trng->rng); if (ret) return dev_err_probe(&pdev->dev, ret, "Failed to register hwrng\n"); @@ -108,15 +108,6 @@ static int ingenic_trng_probe(struct platform_device *pdev) return 0; } -static int ingenic_trng_remove(struct platform_device *pdev) -{ - struct ingenic_trng *trng = platform_get_drvdata(pdev); - - hwrng_unregister(&trng->rng); - - return 0; -} - static const struct of_device_id ingenic_trng_of_match[] = { { .compatible = "ingenic,x1830-dtrng" }, { /* sentinel */ } @@ -125,7 +116,6 @@ MODULE_DEVICE_TABLE(of, ingenic_trng_of_match); static struct platform_driver ingenic_trng_driver = { .probe = ingenic_trng_probe, - .remove = ingenic_trng_remove, .driver = { .name = "ingenic-trng", .of_match_table = ingenic_trng_of_match, From e8c1fdcc62d373da38f673e474564fbed9e249dd Mon Sep 17 00:00:00 2001 From: Martin Kaiser Date: Thu, 13 Jul 2023 09:04:44 +0200 Subject: [PATCH 159/656] hwrng: ba431 - do not set drvdata Do not set drvdata in the ba431 driver. Nobody is using it. Signed-off-by: Martin Kaiser Signed-off-by: Herbert Xu --- drivers/char/hw_random/ba431-rng.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/char/hw_random/ba431-rng.c b/drivers/char/hw_random/ba431-rng.c index 5b7ca0416490..b1518dd52a24 100644 --- a/drivers/char/hw_random/ba431-rng.c +++ b/drivers/char/hw_random/ba431-rng.c @@ -189,8 +189,6 @@ static int ba431_trng_probe(struct platform_device *pdev) ba431->rng.cleanup = ba431_trng_cleanup; ba431->rng.read = ba431_trng_read; - platform_set_drvdata(pdev, ba431); - ret = devm_hwrng_register(&pdev->dev, &ba431->rng); if (ret) { dev_err(&pdev->dev, "BA431 registration failed (%d)\n", ret); From 97b7aa77d1705ea25d484a77de44bf55d0a772a0 Mon Sep 17 00:00:00 2001 From: Martin Kaiser Date: Thu, 13 Jul 2023 09:04:45 +0200 Subject: [PATCH 160/656] hwrng: ba431 - don't init of_device_id's data We have no device-specific data for silex-insight,ba431-rng. There's no need to set .data = NULL, this is the default. Signed-off-by: Martin Kaiser Signed-off-by: Herbert Xu --- drivers/char/hw_random/ba431-rng.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/char/hw_random/ba431-rng.c b/drivers/char/hw_random/ba431-rng.c index b1518dd52a24..d2a9d16323a6 100644 --- a/drivers/char/hw_random/ba431-rng.c +++ b/drivers/char/hw_random/ba431-rng.c @@ -201,7 +201,7 @@ static int ba431_trng_probe(struct platform_device *pdev) } static const struct of_device_id ba431_trng_dt_ids[] = { - { .compatible = "silex-insight,ba431-rng", .data = NULL }, + { .compatible = "silex-insight,ba431-rng" }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, ba431_trng_dt_ids); From 1422e363516c8ac5183a72124bd860d796ebd9e7 Mon Sep 17 00:00:00 2001 From: Martin Kaiser Date: Thu, 13 Jul 2023 09:04:46 +0200 Subject: [PATCH 161/656] hwrng: ba431 - use dev_err_probe after failed registration Use dev_err_probe to print the error message after a failed hwrng registration. Signed-off-by: Martin Kaiser Signed-off-by: Herbert Xu --- drivers/char/hw_random/ba431-rng.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/char/hw_random/ba431-rng.c b/drivers/char/hw_random/ba431-rng.c index d2a9d16323a6..9de7466e6896 100644 --- a/drivers/char/hw_random/ba431-rng.c +++ b/drivers/char/hw_random/ba431-rng.c @@ -190,10 +190,8 @@ static int ba431_trng_probe(struct platform_device *pdev) ba431->rng.read = ba431_trng_read; ret = devm_hwrng_register(&pdev->dev, &ba431->rng); - if (ret) { - dev_err(&pdev->dev, "BA431 registration failed (%d)\n", ret); - return ret; - } + if (ret) + return dev_err_probe(&pdev->dev, ret, "BA431 registration failed\n"); dev_info(&pdev->dev, "BA431 TRNG registered\n"); From 0d51794386325e90f2215fe9b2f4cb7390029260 Mon Sep 17 00:00:00 2001 From: Lionel Debieve Date: Thu, 13 Jul 2023 17:15:12 +0200 Subject: [PATCH 162/656] dt-bindings: crypto: add new compatible for stm32-hash Add a new compatible for stm32mp13 support. Signed-off-by: Lionel Debieve Signed-off-by: Thomas Bourgoin Acked-by: Conor Dooley Signed-off-by: Herbert Xu --- Documentation/devicetree/bindings/crypto/st,stm32-hash.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/crypto/st,stm32-hash.yaml b/Documentation/devicetree/bindings/crypto/st,stm32-hash.yaml index b767ec72a999..ac480765cde0 100644 --- a/Documentation/devicetree/bindings/crypto/st,stm32-hash.yaml +++ b/Documentation/devicetree/bindings/crypto/st,stm32-hash.yaml @@ -20,6 +20,7 @@ properties: - stericsson,ux500-hash - st,stm32f456-hash - st,stm32f756-hash + - st,stm32mp13-hash reg: maxItems: 1 From b6248fb8b8324cfde5eefe2ead1ba3650452d410 Mon Sep 17 00:00:00 2001 From: Thomas Bourgoin Date: Thu, 13 Jul 2023 17:15:13 +0200 Subject: [PATCH 163/656] crypto: stm32 - add new algorithms support Add the all SHA-2 (up to 512) and SHA-3 algorithm support. Update compatible table to add stm32mp13. Signed-off-by: Thomas Bourgoin Signed-off-by: Herbert Xu --- drivers/crypto/stm32/Kconfig | 2 + drivers/crypto/stm32/stm32-hash.c | 676 ++++++++++++++++++++++++------ 2 files changed, 548 insertions(+), 130 deletions(-) diff --git a/drivers/crypto/stm32/Kconfig b/drivers/crypto/stm32/Kconfig index 4fc581e9e595..49dfd161e9b9 100644 --- a/drivers/crypto/stm32/Kconfig +++ b/drivers/crypto/stm32/Kconfig @@ -16,6 +16,8 @@ config CRYPTO_DEV_STM32_HASH select CRYPTO_MD5 select CRYPTO_SHA1 select CRYPTO_SHA256 + select CRYPTO_SHA512 + select CRYPTO_SHA3 select CRYPTO_ENGINE help This enables support for the HASH hw accelerator which can be found diff --git a/drivers/crypto/stm32/stm32-hash.c b/drivers/crypto/stm32/stm32-hash.c index f0df32382719..30e42a402aa7 100644 --- a/drivers/crypto/stm32/stm32-hash.c +++ b/drivers/crypto/stm32/stm32-hash.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #define HASH_CR 0x00 @@ -45,19 +46,11 @@ #define HASH_CR_DMAE BIT(3) #define HASH_CR_DATATYPE_POS 4 #define HASH_CR_MODE BIT(6) +#define HASH_CR_ALGO_POS 7 #define HASH_CR_MDMAT BIT(13) #define HASH_CR_DMAA BIT(14) #define HASH_CR_LKEY BIT(16) -#define HASH_CR_ALGO_SHA1 0x0 -#define HASH_CR_ALGO_MD5 0x80 -#define HASH_CR_ALGO_SHA224 0x40000 -#define HASH_CR_ALGO_SHA256 0x40080 - -#define HASH_CR_UX500_EMPTYMSG BIT(20) -#define HASH_CR_UX500_ALGO_SHA1 BIT(7) -#define HASH_CR_UX500_ALGO_SHA256 0x0 - /* Interrupt */ #define HASH_DINIE BIT(0) #define HASH_DCIE BIT(1) @@ -66,9 +59,6 @@ #define HASH_MASK_CALC_COMPLETION BIT(0) #define HASH_MASK_DATA_INPUT BIT(1) -/* Context swap register */ -#define HASH_CSR_REGISTER_NUMBER 54 - /* Status Flags */ #define HASH_SR_DATA_INPUT_READY BIT(0) #define HASH_SR_OUTPUT_READY BIT(1) @@ -79,6 +69,18 @@ #define HASH_STR_NBLW_MASK GENMASK(4, 0) #define HASH_STR_DCAL BIT(8) +/* HWCFGR Register */ +#define HASH_HWCFG_DMA_MASK GENMASK(3, 0) + +/* Context swap register */ +#define HASH_CSR_NB_SHA256_HMAC 54 +#define HASH_CSR_NB_SHA256 38 +#define HASH_CSR_NB_SHA512_HMAC 103 +#define HASH_CSR_NB_SHA512 91 +#define HASH_CSR_NB_SHA3_HMAC 88 +#define HASH_CSR_NB_SHA3 72 +#define HASH_CSR_NB_MAX HASH_CSR_NB_SHA512_HMAC + #define HASH_FLAGS_INIT BIT(0) #define HASH_FLAGS_OUTPUT_READY BIT(1) #define HASH_FLAGS_CPU BIT(2) @@ -87,20 +89,20 @@ #define HASH_FLAGS_HMAC_INIT BIT(5) #define HASH_FLAGS_HMAC_FINAL BIT(6) #define HASH_FLAGS_HMAC_KEY BIT(7) - +#define HASH_FLAGS_SHA3_MODE BIT(8) #define HASH_FLAGS_FINAL BIT(15) #define HASH_FLAGS_FINUP BIT(16) -#define HASH_FLAGS_ALGO_MASK GENMASK(21, 18) -#define HASH_FLAGS_MD5 BIT(18) -#define HASH_FLAGS_SHA1 BIT(19) -#define HASH_FLAGS_SHA224 BIT(20) -#define HASH_FLAGS_SHA256 BIT(21) +#define HASH_FLAGS_ALGO_MASK GENMASK(20, 17) +#define HASH_FLAGS_ALGO_SHIFT 17 +#define HASH_FLAGS_ERRORS BIT(21) #define HASH_FLAGS_EMPTY BIT(22) #define HASH_FLAGS_HMAC BIT(23) #define HASH_OP_UPDATE 1 #define HASH_OP_FINAL 2 +#define HASH_BURST_LEVEL 4 + enum stm32_hash_data_format { HASH_DATA_32_BITS = 0x0, HASH_DATA_16_BITS = 0x1, @@ -108,11 +110,26 @@ enum stm32_hash_data_format { HASH_DATA_1_BIT = 0x3 }; -#define HASH_BUFLEN 256 -#define HASH_LONG_KEY 64 -#define HASH_MAX_KEY_SIZE (SHA256_BLOCK_SIZE * 8) -#define HASH_QUEUE_LENGTH 16 -#define HASH_DMA_THRESHOLD 50 +#define HASH_BUFLEN (SHA3_224_BLOCK_SIZE + 4) +#define HASH_MAX_KEY_SIZE (SHA512_BLOCK_SIZE * 8) + +enum stm32_hash_algo { + HASH_SHA1 = 0, + HASH_MD5 = 1, + HASH_SHA224 = 2, + HASH_SHA256 = 3, + HASH_SHA3_224 = 4, + HASH_SHA3_256 = 5, + HASH_SHA3_384 = 6, + HASH_SHA3_512 = 7, + HASH_SHA384 = 12, + HASH_SHA512 = 15, +}; + +enum ux500_hash_algo { + HASH_SHA256_UX500 = 0, + HASH_SHA1_UX500 = 1, +}; #define HASH_AUTOSUSPEND_DELAY 50 @@ -130,19 +147,19 @@ struct stm32_hash_state { u32 flags; u16 bufcnt; - u16 buflen; + u16 blocklen; u8 buffer[HASH_BUFLEN] __aligned(4); /* hash state */ - u32 hw_context[3 + HASH_CSR_REGISTER_NUMBER]; + u32 hw_context[3 + HASH_CSR_NB_MAX]; }; struct stm32_hash_request_ctx { struct stm32_hash_dev *hdev; unsigned long op; - u8 digest[SHA256_DIGEST_SIZE] __aligned(sizeof(u32)); + u8 digest[SHA512_DIGEST_SIZE] __aligned(sizeof(u32)); size_t digcnt; /* DMA */ @@ -166,12 +183,13 @@ struct stm32_hash_algs_info { }; struct stm32_hash_pdata { - struct stm32_hash_algs_info *algs_info; - size_t algs_info_size; - bool has_sr; - bool has_mdmat; - bool broken_emptymsg; - bool ux500; + const int alg_shift; + const struct stm32_hash_algs_info *algs_info; + size_t algs_info_size; + bool has_sr; + bool has_mdmat; + bool broken_emptymsg; + bool ux500; }; struct stm32_hash_dev { @@ -182,7 +200,6 @@ struct stm32_hash_dev { void __iomem *io_base; phys_addr_t phys_base; u32 dma_mode; - u32 dma_maxburst; bool polled; struct ahash_request *req; @@ -275,31 +292,19 @@ static void stm32_hash_write_ctrl(struct stm32_hash_dev *hdev, int bufcnt) struct crypto_ahash *tfm = crypto_ahash_reqtfm(hdev->req); struct stm32_hash_ctx *ctx = crypto_ahash_ctx(tfm); struct stm32_hash_state *state = &rctx->state; + u32 alg = (state->flags & HASH_FLAGS_ALGO_MASK) >> HASH_FLAGS_ALGO_SHIFT; u32 reg = HASH_CR_INIT; if (!(hdev->flags & HASH_FLAGS_INIT)) { - switch (state->flags & HASH_FLAGS_ALGO_MASK) { - case HASH_FLAGS_MD5: - reg |= HASH_CR_ALGO_MD5; - break; - case HASH_FLAGS_SHA1: - if (hdev->pdata->ux500) - reg |= HASH_CR_UX500_ALGO_SHA1; + if (hdev->pdata->ux500) { + reg |= ((alg & BIT(0)) << HASH_CR_ALGO_POS); + } else { + if (hdev->pdata->alg_shift == HASH_CR_ALGO_POS) + reg |= ((alg & BIT(1)) << 17) | + ((alg & BIT(0)) << HASH_CR_ALGO_POS); else - reg |= HASH_CR_ALGO_SHA1; - break; - case HASH_FLAGS_SHA224: - reg |= HASH_CR_ALGO_SHA224; - break; - case HASH_FLAGS_SHA256: - if (hdev->pdata->ux500) - reg |= HASH_CR_UX500_ALGO_SHA256; - else - reg |= HASH_CR_ALGO_SHA256; - break; - default: - reg |= HASH_CR_ALGO_MD5; + reg |= alg << hdev->pdata->alg_shift; } reg |= (rctx->data_type << HASH_CR_DATATYPE_POS); @@ -307,7 +312,7 @@ static void stm32_hash_write_ctrl(struct stm32_hash_dev *hdev, int bufcnt) if (state->flags & HASH_FLAGS_HMAC) { hdev->flags |= HASH_FLAGS_HMAC; reg |= HASH_CR_MODE; - if (ctx->keylen > HASH_LONG_KEY) + if (ctx->keylen > crypto_ahash_blocksize(tfm)) reg |= HASH_CR_LKEY; } @@ -318,6 +323,12 @@ static void stm32_hash_write_ctrl(struct stm32_hash_dev *hdev, int bufcnt) hdev->flags |= HASH_FLAGS_INIT; + /* + * After first block + 1 words are fill up, + * we only need to fill 1 block to start partial computation + */ + rctx->state.blocklen -= sizeof(u32); + dev_dbg(hdev->dev, "Write Control %x\n", reg); } } @@ -327,9 +338,9 @@ static void stm32_hash_append_sg(struct stm32_hash_request_ctx *rctx) struct stm32_hash_state *state = &rctx->state; size_t count; - while ((state->bufcnt < state->buflen) && rctx->total) { + while ((state->bufcnt < state->blocklen) && rctx->total) { count = min(rctx->sg->length - rctx->offset, rctx->total); - count = min_t(size_t, count, state->buflen - state->bufcnt); + count = min_t(size_t, count, state->blocklen - state->bufcnt); if (count <= 0) { if ((rctx->sg->length == 0) && !sg_is_last(rctx->sg)) { @@ -419,20 +430,59 @@ static int stm32_hash_xmit_cpu(struct stm32_hash_dev *hdev, return 0; } +static int hash_swap_reg(struct stm32_hash_request_ctx *rctx) +{ + struct stm32_hash_state *state = &rctx->state; + + switch ((state->flags & HASH_FLAGS_ALGO_MASK) >> + HASH_FLAGS_ALGO_SHIFT) { + case HASH_MD5: + case HASH_SHA1: + case HASH_SHA224: + case HASH_SHA256: + if (state->flags & HASH_FLAGS_HMAC) + return HASH_CSR_NB_SHA256_HMAC; + else + return HASH_CSR_NB_SHA256; + break; + + case HASH_SHA384: + case HASH_SHA512: + if (state->flags & HASH_FLAGS_HMAC) + return HASH_CSR_NB_SHA512_HMAC; + else + return HASH_CSR_NB_SHA512; + break; + + case HASH_SHA3_224: + case HASH_SHA3_256: + case HASH_SHA3_384: + case HASH_SHA3_512: + if (state->flags & HASH_FLAGS_HMAC) + return HASH_CSR_NB_SHA3_HMAC; + else + return HASH_CSR_NB_SHA3; + break; + + default: + return -EINVAL; + } +} + static int stm32_hash_update_cpu(struct stm32_hash_dev *hdev) { struct stm32_hash_request_ctx *rctx = ahash_request_ctx(hdev->req); struct stm32_hash_state *state = &rctx->state; u32 *preg = state->hw_context; int bufcnt, err = 0, final; - int i; + int i, swap_reg; dev_dbg(hdev->dev, "%s flags %x\n", __func__, state->flags); final = state->flags & HASH_FLAGS_FINAL; - while ((rctx->total >= state->buflen) || - (state->bufcnt + rctx->total >= state->buflen)) { + while ((rctx->total >= state->blocklen) || + (state->bufcnt + rctx->total >= state->blocklen)) { stm32_hash_append_sg(rctx); bufcnt = state->bufcnt; state->bufcnt = 0; @@ -455,11 +505,13 @@ static int stm32_hash_update_cpu(struct stm32_hash_dev *hdev) if (stm32_hash_wait_busy(hdev)) return -ETIMEDOUT; + swap_reg = hash_swap_reg(rctx); + if (!hdev->pdata->ux500) *preg++ = stm32_hash_read(hdev, HASH_IMR); *preg++ = stm32_hash_read(hdev, HASH_STR); *preg++ = stm32_hash_read(hdev, HASH_CR); - for (i = 0; i < HASH_CSR_REGISTER_NUMBER; i++) + for (i = 0; i < swap_reg; i++) *preg++ = stm32_hash_read(hdev, HASH_CSR(i)); state->flags |= HASH_FLAGS_INIT; @@ -544,7 +596,7 @@ static int stm32_hash_hmac_dma_send(struct stm32_hash_dev *hdev) struct stm32_hash_ctx *ctx = crypto_ahash_ctx(tfm); int err; - if (ctx->keylen < HASH_DMA_THRESHOLD || (hdev->dma_mode == 1)) { + if (ctx->keylen < rctx->state.blocklen || hdev->dma_mode == 1) { err = stm32_hash_write_key(hdev); if (stm32_hash_wait_busy(hdev)) return -ETIMEDOUT; @@ -579,8 +631,8 @@ static int stm32_hash_dma_init(struct stm32_hash_dev *hdev) dma_conf.direction = DMA_MEM_TO_DEV; dma_conf.dst_addr = hdev->phys_base + HASH_DIN; dma_conf.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; - dma_conf.src_maxburst = hdev->dma_maxburst; - dma_conf.dst_maxburst = hdev->dma_maxburst; + dma_conf.src_maxburst = HASH_BURST_LEVEL; + dma_conf.dst_maxburst = HASH_BURST_LEVEL; dma_conf.device_fc = false; chan = dma_request_chan(hdev->dev, "in"); @@ -614,7 +666,6 @@ static int stm32_hash_dma_send(struct stm32_hash_dev *hdev) rctx->total = hdev->req->nbytes; rctx->nents = sg_nents(rctx->sg); - if (rctx->nents < 0) return -EINVAL; @@ -718,11 +769,12 @@ static struct stm32_hash_dev *stm32_hash_find_dev(struct stm32_hash_ctx *ctx) static bool stm32_hash_dma_aligned_data(struct ahash_request *req) { struct scatterlist *sg; + struct stm32_hash_request_ctx *rctx = ahash_request_ctx(req); struct stm32_hash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(req)); struct stm32_hash_dev *hdev = stm32_hash_find_dev(ctx); int i; - if (req->nbytes <= HASH_DMA_THRESHOLD) + if (!hdev->dma_lch || req->nbytes <= rctx->state.blocklen) return false; if (sg_nents(req->src) > 1) { @@ -748,31 +800,64 @@ static int stm32_hash_init(struct ahash_request *req) struct stm32_hash_request_ctx *rctx = ahash_request_ctx(req); struct stm32_hash_dev *hdev = stm32_hash_find_dev(ctx); struct stm32_hash_state *state = &rctx->state; + bool sha3_mode = ctx->flags & HASH_FLAGS_SHA3_MODE; rctx->hdev = hdev; state->flags = HASH_FLAGS_CPU; + if (sha3_mode) + state->flags |= HASH_FLAGS_SHA3_MODE; + rctx->digcnt = crypto_ahash_digestsize(tfm); switch (rctx->digcnt) { case MD5_DIGEST_SIZE: - state->flags |= HASH_FLAGS_MD5; + state->flags |= HASH_MD5 << HASH_FLAGS_ALGO_SHIFT; break; case SHA1_DIGEST_SIZE: - state->flags |= HASH_FLAGS_SHA1; + if (hdev->pdata->ux500) + state->flags |= HASH_SHA1_UX500 << HASH_FLAGS_ALGO_SHIFT; + else + state->flags |= HASH_SHA1 << HASH_FLAGS_ALGO_SHIFT; break; case SHA224_DIGEST_SIZE: - state->flags |= HASH_FLAGS_SHA224; + if (sha3_mode) + state->flags |= HASH_SHA3_224 << HASH_FLAGS_ALGO_SHIFT; + else + state->flags |= HASH_SHA224 << HASH_FLAGS_ALGO_SHIFT; break; case SHA256_DIGEST_SIZE: - state->flags |= HASH_FLAGS_SHA256; + if (sha3_mode) { + state->flags |= HASH_SHA3_256 << HASH_FLAGS_ALGO_SHIFT; + } else { + if (hdev->pdata->ux500) + state->flags |= HASH_SHA256_UX500 << HASH_FLAGS_ALGO_SHIFT; + else + state->flags |= HASH_SHA256 << HASH_FLAGS_ALGO_SHIFT; + } + break; + case SHA384_DIGEST_SIZE: + if (sha3_mode) + state->flags |= HASH_SHA3_384 << HASH_FLAGS_ALGO_SHIFT; + else + state->flags |= HASH_SHA384 << HASH_FLAGS_ALGO_SHIFT; + break; + case SHA512_DIGEST_SIZE: + if (sha3_mode) + state->flags |= HASH_SHA3_512 << HASH_FLAGS_ALGO_SHIFT; + else + state->flags |= HASH_SHA512 << HASH_FLAGS_ALGO_SHIFT; break; default: return -EINVAL; } rctx->state.bufcnt = 0; - rctx->state.buflen = HASH_BUFLEN; + rctx->state.blocklen = crypto_ahash_blocksize(tfm) + sizeof(u32); + if (rctx->state.blocklen > HASH_BUFLEN) { + dev_err(hdev->dev, "Error, block too large"); + return -EINVAL; + } rctx->total = 0; rctx->offset = 0; rctx->data_type = HASH_DATA_8_BITS; @@ -842,6 +927,7 @@ static void stm32_hash_emptymsg_fallback(struct ahash_request *req) static void stm32_hash_copy_hash(struct ahash_request *req) { + struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); struct stm32_hash_request_ctx *rctx = ahash_request_ctx(req); struct stm32_hash_state *state = &rctx->state; struct stm32_hash_dev *hdev = rctx->hdev; @@ -851,22 +937,7 @@ static void stm32_hash_copy_hash(struct ahash_request *req) if (hdev->pdata->broken_emptymsg && (state->flags & HASH_FLAGS_EMPTY)) return stm32_hash_emptymsg_fallback(req); - switch (state->flags & HASH_FLAGS_ALGO_MASK) { - case HASH_FLAGS_MD5: - hashsize = MD5_DIGEST_SIZE; - break; - case HASH_FLAGS_SHA1: - hashsize = SHA1_DIGEST_SIZE; - break; - case HASH_FLAGS_SHA224: - hashsize = SHA224_DIGEST_SIZE; - break; - case HASH_FLAGS_SHA256: - hashsize = SHA256_DIGEST_SIZE; - break; - default: - return; - } + hashsize = crypto_ahash_digestsize(tfm); for (i = 0; i < hashsize / sizeof(u32); i++) { if (hdev->pdata->ux500) @@ -881,6 +952,11 @@ static void stm32_hash_copy_hash(struct ahash_request *req) static int stm32_hash_finish(struct ahash_request *req) { struct stm32_hash_request_ctx *rctx = ahash_request_ctx(req); + u32 reg; + + reg = stm32_hash_read(rctx->hdev, HASH_SR); + reg &= ~HASH_SR_OUTPUT_READY; + stm32_hash_write(rctx->hdev, HASH_SR, reg); if (!req->result) return -EINVAL; @@ -920,6 +996,7 @@ static int stm32_hash_one_request(struct crypto_engine *engine, void *areq) struct stm32_hash_request_ctx *rctx = ahash_request_ctx(req); struct stm32_hash_dev *hdev = stm32_hash_find_dev(ctx); struct stm32_hash_state *state = &rctx->state; + int swap_reg; int err = 0; if (!hdev) @@ -932,6 +1009,7 @@ static int stm32_hash_one_request(struct crypto_engine *engine, void *areq) hdev->req = req; hdev->flags = 0; + swap_reg = hash_swap_reg(rctx); if (state->flags & HASH_FLAGS_INIT) { u32 *preg = rctx->state.hw_context; @@ -945,7 +1023,7 @@ static int stm32_hash_one_request(struct crypto_engine *engine, void *areq) reg = *preg++ | HASH_CR_INIT; stm32_hash_write(hdev, HASH_CR, reg); - for (i = 0; i < HASH_CSR_REGISTER_NUMBER; i++) + for (i = 0; i < swap_reg; i++) stm32_hash_write(hdev, HASH_CSR(i), *preg++); hdev->flags |= HASH_FLAGS_INIT; @@ -1000,7 +1078,7 @@ static int stm32_hash_update(struct ahash_request *req) rctx->sg = req->src; rctx->offset = 0; - if ((state->bufcnt + rctx->total < state->buflen)) { + if ((state->bufcnt + rctx->total < state->blocklen)) { stm32_hash_append_sg(rctx); return 0; } @@ -1102,8 +1180,7 @@ static int stm32_hash_init_fallback(struct crypto_tfm *tfm) return 0; } -static int stm32_hash_cra_init_algs(struct crypto_tfm *tfm, - const char *algs_hmac_name) +static int stm32_hash_cra_init_algs(struct crypto_tfm *tfm, u32 algs_flags) { struct stm32_hash_ctx *ctx = crypto_tfm_ctx(tfm); @@ -1112,8 +1189,8 @@ static int stm32_hash_cra_init_algs(struct crypto_tfm *tfm, ctx->keylen = 0; - if (algs_hmac_name) - ctx->flags |= HASH_FLAGS_HMAC; + if (algs_flags) + ctx->flags |= algs_flags; ctx->enginectx.op.do_one_request = stm32_hash_one_request; @@ -1122,28 +1199,25 @@ static int stm32_hash_cra_init_algs(struct crypto_tfm *tfm, static int stm32_hash_cra_init(struct crypto_tfm *tfm) { - return stm32_hash_cra_init_algs(tfm, NULL); + return stm32_hash_cra_init_algs(tfm, 0); } -static int stm32_hash_cra_md5_init(struct crypto_tfm *tfm) +static int stm32_hash_cra_hmac_init(struct crypto_tfm *tfm) { - return stm32_hash_cra_init_algs(tfm, "md5"); + return stm32_hash_cra_init_algs(tfm, HASH_FLAGS_HMAC); } -static int stm32_hash_cra_sha1_init(struct crypto_tfm *tfm) +static int stm32_hash_cra_sha3_init(struct crypto_tfm *tfm) { - return stm32_hash_cra_init_algs(tfm, "sha1"); + return stm32_hash_cra_init_algs(tfm, HASH_FLAGS_SHA3_MODE); } -static int stm32_hash_cra_sha224_init(struct crypto_tfm *tfm) +static int stm32_hash_cra_sha3_hmac_init(struct crypto_tfm *tfm) { - return stm32_hash_cra_init_algs(tfm, "sha224"); + return stm32_hash_cra_init_algs(tfm, HASH_FLAGS_SHA3_MODE | + HASH_FLAGS_HMAC); } -static int stm32_hash_cra_sha256_init(struct crypto_tfm *tfm) -{ - return stm32_hash_cra_init_algs(tfm, "sha256"); -} static void stm32_hash_cra_exit(struct crypto_tfm *tfm) { @@ -1185,8 +1259,6 @@ static irqreturn_t stm32_hash_irq_handler(int irq, void *dev_id) reg = stm32_hash_read(hdev, HASH_SR); if (reg & HASH_SR_OUTPUT_READY) { - reg &= ~HASH_SR_OUTPUT_READY; - stm32_hash_write(hdev, HASH_SR, reg); hdev->flags |= HASH_FLAGS_OUTPUT_READY; /* Disable IT*/ stm32_hash_write(hdev, HASH_IMR, 0); @@ -1244,12 +1316,12 @@ static struct ahash_alg algs_md5[] = { .cra_blocksize = MD5_HMAC_BLOCK_SIZE, .cra_ctxsize = sizeof(struct stm32_hash_ctx), .cra_alignmask = 3, - .cra_init = stm32_hash_cra_md5_init, + .cra_init = stm32_hash_cra_hmac_init, .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } } - }, + } }; static struct ahash_alg algs_sha1[] = { @@ -1300,7 +1372,7 @@ static struct ahash_alg algs_sha1[] = { .cra_blocksize = SHA1_BLOCK_SIZE, .cra_ctxsize = sizeof(struct stm32_hash_ctx), .cra_alignmask = 3, - .cra_init = stm32_hash_cra_sha1_init, + .cra_init = stm32_hash_cra_hmac_init, .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } @@ -1356,7 +1428,7 @@ static struct ahash_alg algs_sha224[] = { .cra_blocksize = SHA224_BLOCK_SIZE, .cra_ctxsize = sizeof(struct stm32_hash_ctx), .cra_alignmask = 3, - .cra_init = stm32_hash_cra_sha224_init, + .cra_init = stm32_hash_cra_hmac_init, .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } @@ -1412,7 +1484,7 @@ static struct ahash_alg algs_sha256[] = { .cra_blocksize = SHA256_BLOCK_SIZE, .cra_ctxsize = sizeof(struct stm32_hash_ctx), .cra_alignmask = 3, - .cra_init = stm32_hash_cra_sha256_init, + .cra_init = stm32_hash_cra_hmac_init, .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } @@ -1420,6 +1492,330 @@ static struct ahash_alg algs_sha256[] = { }, }; +static struct ahash_alg algs_sha384_sha512[] = { + { + .init = stm32_hash_init, + .update = stm32_hash_update, + .final = stm32_hash_final, + .finup = stm32_hash_finup, + .digest = stm32_hash_digest, + .export = stm32_hash_export, + .import = stm32_hash_import, + .halg = { + .digestsize = SHA384_DIGEST_SIZE, + .statesize = sizeof(struct stm32_hash_state), + .base = { + .cra_name = "sha384", + .cra_driver_name = "stm32-sha384", + .cra_priority = 200, + .cra_flags = CRYPTO_ALG_ASYNC | + CRYPTO_ALG_KERN_DRIVER_ONLY, + .cra_blocksize = SHA384_BLOCK_SIZE, + .cra_ctxsize = sizeof(struct stm32_hash_ctx), + .cra_alignmask = 3, + .cra_init = stm32_hash_cra_init, + .cra_exit = stm32_hash_cra_exit, + .cra_module = THIS_MODULE, + } + } + }, + { + .init = stm32_hash_init, + .update = stm32_hash_update, + .final = stm32_hash_final, + .finup = stm32_hash_finup, + .digest = stm32_hash_digest, + .setkey = stm32_hash_setkey, + .export = stm32_hash_export, + .import = stm32_hash_import, + .halg = { + .digestsize = SHA384_DIGEST_SIZE, + .statesize = sizeof(struct stm32_hash_state), + .base = { + .cra_name = "hmac(sha384)", + .cra_driver_name = "stm32-hmac-sha384", + .cra_priority = 200, + .cra_flags = CRYPTO_ALG_ASYNC | + CRYPTO_ALG_KERN_DRIVER_ONLY, + .cra_blocksize = SHA384_BLOCK_SIZE, + .cra_ctxsize = sizeof(struct stm32_hash_ctx), + .cra_alignmask = 3, + .cra_init = stm32_hash_cra_hmac_init, + .cra_exit = stm32_hash_cra_exit, + .cra_module = THIS_MODULE, + } + } + }, + { + .init = stm32_hash_init, + .update = stm32_hash_update, + .final = stm32_hash_final, + .finup = stm32_hash_finup, + .digest = stm32_hash_digest, + .export = stm32_hash_export, + .import = stm32_hash_import, + .halg = { + .digestsize = SHA512_DIGEST_SIZE, + .statesize = sizeof(struct stm32_hash_state), + .base = { + .cra_name = "sha512", + .cra_driver_name = "stm32-sha512", + .cra_priority = 200, + .cra_flags = CRYPTO_ALG_ASYNC | + CRYPTO_ALG_KERN_DRIVER_ONLY, + .cra_blocksize = SHA512_BLOCK_SIZE, + .cra_ctxsize = sizeof(struct stm32_hash_ctx), + .cra_alignmask = 3, + .cra_init = stm32_hash_cra_init, + .cra_exit = stm32_hash_cra_exit, + .cra_module = THIS_MODULE, + } + } + }, + { + .init = stm32_hash_init, + .update = stm32_hash_update, + .final = stm32_hash_final, + .finup = stm32_hash_finup, + .digest = stm32_hash_digest, + .export = stm32_hash_export, + .import = stm32_hash_import, + .setkey = stm32_hash_setkey, + .halg = { + .digestsize = SHA512_DIGEST_SIZE, + .statesize = sizeof(struct stm32_hash_state), + .base = { + .cra_name = "hmac(sha512)", + .cra_driver_name = "stm32-hmac-sha512", + .cra_priority = 200, + .cra_flags = CRYPTO_ALG_ASYNC | + CRYPTO_ALG_KERN_DRIVER_ONLY, + .cra_blocksize = SHA512_BLOCK_SIZE, + .cra_ctxsize = sizeof(struct stm32_hash_ctx), + .cra_alignmask = 3, + .cra_init = stm32_hash_cra_hmac_init, + .cra_exit = stm32_hash_cra_exit, + .cra_module = THIS_MODULE, + } + } + }, +}; + +static struct ahash_alg algs_sha3[] = { + { + .init = stm32_hash_init, + .update = stm32_hash_update, + .final = stm32_hash_final, + .finup = stm32_hash_finup, + .digest = stm32_hash_digest, + .export = stm32_hash_export, + .import = stm32_hash_import, + .halg = { + .digestsize = SHA3_224_DIGEST_SIZE, + .statesize = sizeof(struct stm32_hash_state), + .base = { + .cra_name = "sha3-224", + .cra_driver_name = "stm32-sha3-224", + .cra_priority = 200, + .cra_flags = CRYPTO_ALG_ASYNC | + CRYPTO_ALG_KERN_DRIVER_ONLY, + .cra_blocksize = SHA3_224_BLOCK_SIZE, + .cra_ctxsize = sizeof(struct stm32_hash_ctx), + .cra_alignmask = 3, + .cra_init = stm32_hash_cra_sha3_init, + .cra_exit = stm32_hash_cra_exit, + .cra_module = THIS_MODULE, + } + } + }, + { + .init = stm32_hash_init, + .update = stm32_hash_update, + .final = stm32_hash_final, + .finup = stm32_hash_finup, + .digest = stm32_hash_digest, + .export = stm32_hash_export, + .import = stm32_hash_import, + .setkey = stm32_hash_setkey, + .halg = { + .digestsize = SHA3_224_DIGEST_SIZE, + .statesize = sizeof(struct stm32_hash_state), + .base = { + .cra_name = "hmac(sha3-224)", + .cra_driver_name = "stm32-hmac-sha3-224", + .cra_priority = 200, + .cra_flags = CRYPTO_ALG_ASYNC | + CRYPTO_ALG_KERN_DRIVER_ONLY, + .cra_blocksize = SHA3_224_BLOCK_SIZE, + .cra_ctxsize = sizeof(struct stm32_hash_ctx), + .cra_alignmask = 3, + .cra_init = stm32_hash_cra_sha3_hmac_init, + .cra_exit = stm32_hash_cra_exit, + .cra_module = THIS_MODULE, + } + } + }, + { + .init = stm32_hash_init, + .update = stm32_hash_update, + .final = stm32_hash_final, + .finup = stm32_hash_finup, + .digest = stm32_hash_digest, + .export = stm32_hash_export, + .import = stm32_hash_import, + .halg = { + .digestsize = SHA3_256_DIGEST_SIZE, + .statesize = sizeof(struct stm32_hash_state), + .base = { + .cra_name = "sha3-256", + .cra_driver_name = "stm32-sha3-256", + .cra_priority = 200, + .cra_flags = CRYPTO_ALG_ASYNC | + CRYPTO_ALG_KERN_DRIVER_ONLY, + .cra_blocksize = SHA3_256_BLOCK_SIZE, + .cra_ctxsize = sizeof(struct stm32_hash_ctx), + .cra_alignmask = 3, + .cra_init = stm32_hash_cra_sha3_init, + .cra_exit = stm32_hash_cra_exit, + .cra_module = THIS_MODULE, + } + } + }, + { + .init = stm32_hash_init, + .update = stm32_hash_update, + .final = stm32_hash_final, + .finup = stm32_hash_finup, + .digest = stm32_hash_digest, + .export = stm32_hash_export, + .import = stm32_hash_import, + .setkey = stm32_hash_setkey, + .halg = { + .digestsize = SHA3_256_DIGEST_SIZE, + .statesize = sizeof(struct stm32_hash_state), + .base = { + .cra_name = "hmac(sha3-256)", + .cra_driver_name = "stm32-hmac-sha3-256", + .cra_priority = 200, + .cra_flags = CRYPTO_ALG_ASYNC | + CRYPTO_ALG_KERN_DRIVER_ONLY, + .cra_blocksize = SHA3_256_BLOCK_SIZE, + .cra_ctxsize = sizeof(struct stm32_hash_ctx), + .cra_alignmask = 3, + .cra_init = stm32_hash_cra_sha3_hmac_init, + .cra_exit = stm32_hash_cra_exit, + .cra_module = THIS_MODULE, + } + } + }, + { + .init = stm32_hash_init, + .update = stm32_hash_update, + .final = stm32_hash_final, + .finup = stm32_hash_finup, + .digest = stm32_hash_digest, + .export = stm32_hash_export, + .import = stm32_hash_import, + .halg = { + .digestsize = SHA3_384_DIGEST_SIZE, + .statesize = sizeof(struct stm32_hash_state), + .base = { + .cra_name = "sha3-384", + .cra_driver_name = "stm32-sha3-384", + .cra_priority = 200, + .cra_flags = CRYPTO_ALG_ASYNC | + CRYPTO_ALG_KERN_DRIVER_ONLY, + .cra_blocksize = SHA3_384_BLOCK_SIZE, + .cra_ctxsize = sizeof(struct stm32_hash_ctx), + .cra_alignmask = 3, + .cra_init = stm32_hash_cra_sha3_init, + .cra_exit = stm32_hash_cra_exit, + .cra_module = THIS_MODULE, + } + } + }, + { + .init = stm32_hash_init, + .update = stm32_hash_update, + .final = stm32_hash_final, + .finup = stm32_hash_finup, + .digest = stm32_hash_digest, + .export = stm32_hash_export, + .import = stm32_hash_import, + .setkey = stm32_hash_setkey, + .halg = { + .digestsize = SHA3_384_DIGEST_SIZE, + .statesize = sizeof(struct stm32_hash_state), + .base = { + .cra_name = "hmac(sha3-384)", + .cra_driver_name = "stm32-hmac-sha3-384", + .cra_priority = 200, + .cra_flags = CRYPTO_ALG_ASYNC | + CRYPTO_ALG_KERN_DRIVER_ONLY, + .cra_blocksize = SHA3_384_BLOCK_SIZE, + .cra_ctxsize = sizeof(struct stm32_hash_ctx), + .cra_alignmask = 3, + .cra_init = stm32_hash_cra_sha3_hmac_init, + .cra_exit = stm32_hash_cra_exit, + .cra_module = THIS_MODULE, + } + } + }, + { + .init = stm32_hash_init, + .update = stm32_hash_update, + .final = stm32_hash_final, + .finup = stm32_hash_finup, + .digest = stm32_hash_digest, + .export = stm32_hash_export, + .import = stm32_hash_import, + .halg = { + .digestsize = SHA3_512_DIGEST_SIZE, + .statesize = sizeof(struct stm32_hash_state), + .base = { + .cra_name = "sha3-512", + .cra_driver_name = "stm32-sha3-512", + .cra_priority = 200, + .cra_flags = CRYPTO_ALG_ASYNC | + CRYPTO_ALG_KERN_DRIVER_ONLY, + .cra_blocksize = SHA3_512_BLOCK_SIZE, + .cra_ctxsize = sizeof(struct stm32_hash_ctx), + .cra_alignmask = 3, + .cra_init = stm32_hash_cra_sha3_init, + .cra_exit = stm32_hash_cra_exit, + .cra_module = THIS_MODULE, + } + } + }, + { + .init = stm32_hash_init, + .update = stm32_hash_update, + .final = stm32_hash_final, + .finup = stm32_hash_finup, + .digest = stm32_hash_digest, + .export = stm32_hash_export, + .import = stm32_hash_import, + .setkey = stm32_hash_setkey, + .halg = { + .digestsize = SHA3_512_DIGEST_SIZE, + .statesize = sizeof(struct stm32_hash_state), + .base = { + .cra_name = "hmac(sha3-512)", + .cra_driver_name = "stm32-hmac-sha3-512", + .cra_priority = 200, + .cra_flags = CRYPTO_ALG_ASYNC | + CRYPTO_ALG_KERN_DRIVER_ONLY, + .cra_blocksize = SHA3_512_BLOCK_SIZE, + .cra_ctxsize = sizeof(struct stm32_hash_ctx), + .cra_alignmask = 3, + .cra_init = stm32_hash_cra_sha3_hmac_init, + .cra_exit = stm32_hash_cra_exit, + .cra_module = THIS_MODULE, + } + } + } +}; + static int stm32_hash_register_algs(struct stm32_hash_dev *hdev) { unsigned int i, j; @@ -1471,6 +1867,7 @@ static struct stm32_hash_algs_info stm32_hash_algs_info_ux500[] = { }; static const struct stm32_hash_pdata stm32_hash_pdata_ux500 = { + .alg_shift = 7, .algs_info = stm32_hash_algs_info_ux500, .algs_info_size = ARRAY_SIZE(stm32_hash_algs_info_ux500), .broken_emptymsg = true, @@ -1489,6 +1886,7 @@ static struct stm32_hash_algs_info stm32_hash_algs_info_stm32f4[] = { }; static const struct stm32_hash_pdata stm32_hash_pdata_stm32f4 = { + .alg_shift = 7, .algs_info = stm32_hash_algs_info_stm32f4, .algs_info_size = ARRAY_SIZE(stm32_hash_algs_info_stm32f4), .has_sr = true, @@ -1515,25 +1913,49 @@ static struct stm32_hash_algs_info stm32_hash_algs_info_stm32f7[] = { }; static const struct stm32_hash_pdata stm32_hash_pdata_stm32f7 = { + .alg_shift = 7, .algs_info = stm32_hash_algs_info_stm32f7, .algs_info_size = ARRAY_SIZE(stm32_hash_algs_info_stm32f7), .has_sr = true, .has_mdmat = true, }; +static struct stm32_hash_algs_info stm32_hash_algs_info_stm32mp13[] = { + { + .algs_list = algs_sha1, + .size = ARRAY_SIZE(algs_sha1), + }, + { + .algs_list = algs_sha224, + .size = ARRAY_SIZE(algs_sha224), + }, + { + .algs_list = algs_sha256, + .size = ARRAY_SIZE(algs_sha256), + }, + { + .algs_list = algs_sha384_sha512, + .size = ARRAY_SIZE(algs_sha384_sha512), + }, + { + .algs_list = algs_sha3, + .size = ARRAY_SIZE(algs_sha3), + }, +}; + +static const struct stm32_hash_pdata stm32_hash_pdata_stm32mp13 = { + .alg_shift = 17, + .algs_info = stm32_hash_algs_info_stm32mp13, + .algs_info_size = ARRAY_SIZE(stm32_hash_algs_info_stm32mp13), + .has_sr = true, + .has_mdmat = true, +}; + static const struct of_device_id stm32_hash_of_match[] = { - { - .compatible = "stericsson,ux500-hash", - .data = &stm32_hash_pdata_ux500, - }, - { - .compatible = "st,stm32f456-hash", - .data = &stm32_hash_pdata_stm32f4, - }, - { - .compatible = "st,stm32f756-hash", - .data = &stm32_hash_pdata_stm32f7, - }, + { .compatible = "stericsson,ux500-hash", .data = &stm32_hash_pdata_ux500 }, + { .compatible = "st,stm32f456-hash", .data = &stm32_hash_pdata_stm32f4 }, + { .compatible = "st,stm32f756-hash", .data = &stm32_hash_pdata_stm32f7 }, + { .compatible = "st,stm32mp13-hash", .data = &stm32_hash_pdata_stm32mp13 }, {}, }; @@ -1548,12 +1970,6 @@ static int stm32_hash_get_of_match(struct stm32_hash_dev *hdev, return -EINVAL; } - if (of_property_read_u32(dev->of_node, "dma-maxburst", - &hdev->dma_maxburst)) { - dev_info(dev, "dma-maxburst not specified, using 0\n"); - hdev->dma_maxburst = 0; - } - return 0; } @@ -1663,7 +2079,7 @@ static int stm32_hash_probe(struct platform_device *pdev) /* FIXME: implement DMA mode for Ux500 */ hdev->dma_mode = 0; else - hdev->dma_mode = stm32_hash_read(hdev, HASH_HWCFGR); + hdev->dma_mode = stm32_hash_read(hdev, HASH_HWCFGR) & HASH_HWCFG_DMA_MASK; /* Register algos */ ret = stm32_hash_register_algs(hdev); @@ -1772,6 +2188,6 @@ static struct platform_driver stm32_hash_driver = { module_platform_driver(stm32_hash_driver); -MODULE_DESCRIPTION("STM32 SHA1/224/256 & MD5 (HMAC) hw accelerator driver"); +MODULE_DESCRIPTION("STM32 SHA1/SHA2/SHA3 & MD5 (HMAC) hw accelerator driver"); MODULE_AUTHOR("Lionel Debieve "); MODULE_LICENSE("GPL v2"); From 0e99d38ff6ad4baf0c24ec0aca8a01c522ef4dcd Mon Sep 17 00:00:00 2001 From: Thomas Bourgoin Date: Thu, 13 Jul 2023 17:15:14 +0200 Subject: [PATCH 164/656] crypto: stm32 - remove bufcnt in stm32_hash_write_ctrl. Commit "crypto: stm32 - Fix empty message processing" remove the use of the argument bufcnt in stm32_hash_write_ctrl. Hence, we can remove it from the function prototype and simplify the function declaration. Signed-off-by: Thomas Bourgoin Signed-off-by: Herbert Xu --- drivers/crypto/stm32/stm32-hash.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/crypto/stm32/stm32-hash.c b/drivers/crypto/stm32/stm32-hash.c index 30e42a402aa7..c179a6c1a457 100644 --- a/drivers/crypto/stm32/stm32-hash.c +++ b/drivers/crypto/stm32/stm32-hash.c @@ -286,7 +286,7 @@ static int stm32_hash_write_key(struct stm32_hash_dev *hdev) return 0; } -static void stm32_hash_write_ctrl(struct stm32_hash_dev *hdev, int bufcnt) +static void stm32_hash_write_ctrl(struct stm32_hash_dev *hdev) { struct stm32_hash_request_ctx *rctx = ahash_request_ctx(hdev->req); struct crypto_ahash *tfm = crypto_ahash_reqtfm(hdev->req); @@ -395,7 +395,7 @@ static int stm32_hash_xmit_cpu(struct stm32_hash_dev *hdev, hdev->flags |= HASH_FLAGS_CPU; - stm32_hash_write_ctrl(hdev, length); + stm32_hash_write_ctrl(hdev); if (stm32_hash_wait_busy(hdev)) return -ETIMEDOUT; @@ -669,7 +669,7 @@ static int stm32_hash_dma_send(struct stm32_hash_dev *hdev) if (rctx->nents < 0) return -EINVAL; - stm32_hash_write_ctrl(hdev, rctx->total); + stm32_hash_write_ctrl(hdev); if (hdev->flags & HASH_FLAGS_HMAC) { err = stm32_hash_hmac_dma_send(hdev); From d9c83f71eeceed2cb54bb78be84f2d4055fd9a1f Mon Sep 17 00:00:00 2001 From: Thomas Bourgoin Date: Thu, 13 Jul 2023 17:15:15 +0200 Subject: [PATCH 165/656] crypto: stm32 - fix loop iterating through scatterlist for DMA We were reading the length of the scatterlist sg after copying value of tsg inside. So we are using the size of the previous scatterlist and for the first one we are using an unitialised value. Fix this by copying tsg in sg[0] before reading the size. Fixes : 8a1012d3f2ab ("crypto: stm32 - Support for STM32 HASH module") Cc: stable@vger.kernel.org Signed-off-by: Thomas Bourgoin Signed-off-by: Herbert Xu --- drivers/crypto/stm32/stm32-hash.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/crypto/stm32/stm32-hash.c b/drivers/crypto/stm32/stm32-hash.c index c179a6c1a457..519fb716acee 100644 --- a/drivers/crypto/stm32/stm32-hash.c +++ b/drivers/crypto/stm32/stm32-hash.c @@ -678,9 +678,9 @@ static int stm32_hash_dma_send(struct stm32_hash_dev *hdev) } for_each_sg(rctx->sg, tsg, rctx->nents, i) { + sg[0] = *tsg; len = sg->length; - sg[0] = *tsg; if (sg_is_last(sg)) { if (hdev->dma_mode == 1) { len = (ALIGN(sg->length, 16) - 16); From a10618f397062823a84cd4abedc51f46b9d4410f Mon Sep 17 00:00:00 2001 From: Thomas Bourgoin Date: Thu, 13 Jul 2023 17:15:16 +0200 Subject: [PATCH 166/656] crypto: stm32 - check request size and scatterlist size when using DMA. When we are sending the data to HASH with the DMA, we send all the data provided in the scatterlists of the request. But in some cases (ex : tcrypt performances tests), we should only send req->nbytes When iterating through the scatterlist we verify if it is the last scatterlist or if the number of bytes sent plus the data of the current scatterlist is superior of the total number of bytes to hash. Signed-off-by: Thomas Bourgoin Signed-off-by: Herbert Xu --- drivers/crypto/stm32/stm32-hash.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/drivers/crypto/stm32/stm32-hash.c b/drivers/crypto/stm32/stm32-hash.c index 519fb716acee..701995a72e57 100644 --- a/drivers/crypto/stm32/stm32-hash.c +++ b/drivers/crypto/stm32/stm32-hash.c @@ -659,8 +659,9 @@ static int stm32_hash_dma_send(struct stm32_hash_dev *hdev) struct stm32_hash_request_ctx *rctx = ahash_request_ctx(hdev->req); u32 *buffer = (void *)rctx->state.buffer; struct scatterlist sg[1], *tsg; - int err = 0, len = 0, reg, ncp = 0; - unsigned int i; + int err = 0, reg, ncp = 0; + unsigned int i, len = 0, bufcnt = 0; + bool is_last = false; rctx->sg = hdev->req->src; rctx->total = hdev->req->nbytes; @@ -681,7 +682,9 @@ static int stm32_hash_dma_send(struct stm32_hash_dev *hdev) sg[0] = *tsg; len = sg->length; - if (sg_is_last(sg)) { + if (sg_is_last(sg) || (bufcnt + sg[0].length) >= rctx->total) { + sg->length = rctx->total - bufcnt; + is_last = true; if (hdev->dma_mode == 1) { len = (ALIGN(sg->length, 16) - 16); @@ -707,13 +710,15 @@ static int stm32_hash_dma_send(struct stm32_hash_dev *hdev) return -ENOMEM; } - err = stm32_hash_xmit_dma(hdev, sg, len, - !sg_is_last(sg)); + err = stm32_hash_xmit_dma(hdev, sg, len, !is_last); + bufcnt += sg[0].length; dma_unmap_sg(hdev->dev, sg, 1, DMA_TO_DEVICE); if (err == -ENOMEM) return err; + if (is_last) + break; } if (hdev->dma_mode == 1) { From a4adfbc2544933ac12e7fbd50708290265546dbc Mon Sep 17 00:00:00 2001 From: Thomas Bourgoin Date: Thu, 13 Jul 2023 17:15:17 +0200 Subject: [PATCH 167/656] crypto: stm32 - fix MDMAT condition If IP has MDMAT support, set or reset the bit MDMAT in Control Register. Fixes: b56403a25af7 ("crypto: stm32/hash - Support Ux500 hash") Cc: stable@vger.kernel.org Reviewed-by: Linus Walleij Signed-off-by: Thomas Bourgoin Signed-off-by: Herbert Xu --- drivers/crypto/stm32/stm32-hash.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/crypto/stm32/stm32-hash.c b/drivers/crypto/stm32/stm32-hash.c index 701995a72e57..a48e6a14da2e 100644 --- a/drivers/crypto/stm32/stm32-hash.c +++ b/drivers/crypto/stm32/stm32-hash.c @@ -544,7 +544,7 @@ static int stm32_hash_xmit_dma(struct stm32_hash_dev *hdev, reg = stm32_hash_read(hdev, HASH_CR); - if (!hdev->pdata->has_mdmat) { + if (hdev->pdata->has_mdmat) { if (mdma) reg |= HASH_CR_MDMAT; else From 1e3b2e805587ab5aa3ecdfe6339ad120ceaef7d3 Mon Sep 17 00:00:00 2001 From: Thomas Bourgoin Date: Thu, 13 Jul 2023 17:15:18 +0200 Subject: [PATCH 168/656] crypto: stm32 - remove flag HASH_FLAGS_DMA_READY Remove flag HASH_FLAGS_DMA_READY as it can put the driver in a deadlock state. If the DMA automatically set the DCAL bit, the interrupt indicating the end of a computation can be raised before the DMA complete sequence. Signed-off-by: Thomas Bourgoin Signed-off-by: Herbert Xu --- drivers/crypto/stm32/stm32-hash.c | 21 ++++++++------------- 1 file changed, 8 insertions(+), 13 deletions(-) diff --git a/drivers/crypto/stm32/stm32-hash.c b/drivers/crypto/stm32/stm32-hash.c index a48e6a14da2e..88a186c3dd78 100644 --- a/drivers/crypto/stm32/stm32-hash.c +++ b/drivers/crypto/stm32/stm32-hash.c @@ -84,12 +84,11 @@ #define HASH_FLAGS_INIT BIT(0) #define HASH_FLAGS_OUTPUT_READY BIT(1) #define HASH_FLAGS_CPU BIT(2) -#define HASH_FLAGS_DMA_READY BIT(3) -#define HASH_FLAGS_DMA_ACTIVE BIT(4) -#define HASH_FLAGS_HMAC_INIT BIT(5) -#define HASH_FLAGS_HMAC_FINAL BIT(6) -#define HASH_FLAGS_HMAC_KEY BIT(7) -#define HASH_FLAGS_SHA3_MODE BIT(8) +#define HASH_FLAGS_DMA_ACTIVE BIT(3) +#define HASH_FLAGS_HMAC_INIT BIT(4) +#define HASH_FLAGS_HMAC_FINAL BIT(5) +#define HASH_FLAGS_HMAC_KEY BIT(6) +#define HASH_FLAGS_SHA3_MODE BIT(7) #define HASH_FLAGS_FINAL BIT(15) #define HASH_FLAGS_FINUP BIT(16) #define HASH_FLAGS_ALGO_MASK GENMASK(20, 17) @@ -585,8 +584,6 @@ static void stm32_hash_dma_callback(void *param) struct stm32_hash_dev *hdev = param; complete(&hdev->dma_completion); - - hdev->flags |= HASH_FLAGS_DMA_READY; } static int stm32_hash_hmac_dma_send(struct stm32_hash_dev *hdev) @@ -1241,11 +1238,9 @@ static irqreturn_t stm32_hash_irq_thread(int irq, void *dev_id) hdev->flags &= ~HASH_FLAGS_OUTPUT_READY; goto finish; } - } else if (HASH_FLAGS_DMA_READY & hdev->flags) { - if (HASH_FLAGS_DMA_ACTIVE & hdev->flags) { - hdev->flags &= ~HASH_FLAGS_DMA_ACTIVE; - goto finish; - } + } else if (HASH_FLAGS_DMA_ACTIVE & hdev->flags) { + hdev->flags &= ~HASH_FLAGS_DMA_ACTIVE; + goto finish; } return IRQ_HANDLED; From 5cd4ed98cfb743cd8f363ccc674313c14c17acd5 Mon Sep 17 00:00:00 2001 From: Weili Qian Date: Fri, 14 Jul 2023 19:41:35 +0800 Subject: [PATCH 169/656] crypto: hisilicon/qm - flush all work before driver removed Before removing the driver, flush inter-function communication work, and subsequent communication work is not processed. This prevents communication threads from accessing released memory. Fixes: ("crypto: hisilicon/qm - enable PF and VFs communication") Signed-off-by: Weili Qian Signed-off-by: Herbert Xu --- drivers/crypto/hisilicon/qm.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/crypto/hisilicon/qm.c b/drivers/crypto/hisilicon/qm.c index edc6fd44e7ca..81c21ca40375 100644 --- a/drivers/crypto/hisilicon/qm.c +++ b/drivers/crypto/hisilicon/qm.c @@ -954,6 +954,11 @@ static irqreturn_t qm_mb_cmd_irq(int irq, void *data) if (!val) return IRQ_NONE; + if (test_bit(QM_DRIVER_REMOVING, &qm->misc_ctl)) { + dev_warn(&qm->pdev->dev, "Driver is down, message cannot be processed!\n"); + return IRQ_HANDLED; + } + schedule_work(&qm->cmd_process); return IRQ_HANDLED; @@ -2743,6 +2748,9 @@ void hisi_qm_wait_task_finish(struct hisi_qm *qm, struct hisi_qm_list *qm_list) test_bit(QM_RESETTING, &qm->misc_ctl)) msleep(WAIT_PERIOD); + if (test_bit(QM_SUPPORT_MB_COMMAND, &qm->caps)) + flush_work(&qm->cmd_process); + udelay(REMOVE_WAIT_DELAY); } EXPORT_SYMBOL_GPL(hisi_qm_wait_task_finish); From 4b3ee3ff2dd66b45dd5ec374a95af06eb26d35ac Mon Sep 17 00:00:00 2001 From: Weili Qian Date: Fri, 14 Jul 2023 19:41:36 +0800 Subject: [PATCH 170/656] crypto: hisilicon/qm - stop function and write data to memory When the system is shut down, the process is killed, but the accelerator device does not stop executing the tasks. If the accelerator device still accesses the memory and writes back data to the memory after the memory is reclaimed by the system, an NFE error may occur. Therefore, before the system is shut down, the driver needs to stop the device and write data back to the memory. Signed-off-by: Weili Qian Signed-off-by: Herbert Xu --- drivers/crypto/hisilicon/qm.c | 14 ++++++++------ include/linux/hisi_acc_qm.h | 2 +- 2 files changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/crypto/hisilicon/qm.c b/drivers/crypto/hisilicon/qm.c index 81c21ca40375..fdff87c09aaf 100644 --- a/drivers/crypto/hisilicon/qm.c +++ b/drivers/crypto/hisilicon/qm.c @@ -1002,7 +1002,7 @@ static void qm_reset_function(struct hisi_qm *qm) return; } - ret = hisi_qm_stop(qm, QM_FLR); + ret = hisi_qm_stop(qm, QM_DOWN); if (ret) { dev_err(dev, "failed to stop qm when reset function\n"); goto clear_bit; @@ -3251,7 +3251,7 @@ int hisi_qm_stop(struct hisi_qm *qm, enum qm_stop_reason r) } if (qm->status.stop_reason == QM_SOFT_RESET || - qm->status.stop_reason == QM_FLR) { + qm->status.stop_reason == QM_DOWN) { hisi_qm_set_hw_reset(qm, QM_RESET_STOP_TX_OFFSET); ret = qm_stop_started_qp(qm); if (ret < 0) { @@ -4547,11 +4547,11 @@ void hisi_qm_reset_prepare(struct pci_dev *pdev) if (qm->fun_type == QM_HW_PF) qm_cmd_uninit(qm); - ret = qm_try_stop_vfs(qm, QM_PF_FLR_PREPARE, QM_FLR); + ret = qm_try_stop_vfs(qm, QM_PF_FLR_PREPARE, QM_DOWN); if (ret) pci_err(pdev, "failed to stop vfs by pf in FLR.\n"); - ret = hisi_qm_stop(qm, QM_FLR); + ret = hisi_qm_stop(qm, QM_DOWN); if (ret) { pci_err(pdev, "Failed to stop QM, ret = %d.\n", ret); hisi_qm_set_hw_reset(qm, QM_RESET_STOP_TX_OFFSET); @@ -4649,9 +4649,11 @@ void hisi_qm_dev_shutdown(struct pci_dev *pdev) struct hisi_qm *qm = pci_get_drvdata(pdev); int ret; - ret = hisi_qm_stop(qm, QM_NORMAL); + ret = hisi_qm_stop(qm, QM_DOWN); if (ret) dev_err(&pdev->dev, "Fail to stop qm in shutdown!\n"); + + hisi_qm_cache_wb(qm); } EXPORT_SYMBOL_GPL(hisi_qm_dev_shutdown); @@ -4815,7 +4817,7 @@ static void qm_handle_cmd_msg(struct hisi_qm *qm, u32 fun_num) cmd = msg & QM_MB_CMD_DATA_MASK; switch (cmd) { case QM_PF_FLR_PREPARE: - qm_pf_reset_vf_process(qm, QM_FLR); + qm_pf_reset_vf_process(qm, QM_DOWN); break; case QM_PF_SRST_PREPARE: qm_pf_reset_vf_process(qm, QM_SOFT_RESET); diff --git a/include/linux/hisi_acc_qm.h b/include/linux/hisi_acc_qm.h index a7d54d4d41fd..39fbfb4be944 100644 --- a/include/linux/hisi_acc_qm.h +++ b/include/linux/hisi_acc_qm.h @@ -104,7 +104,7 @@ enum qm_stop_reason { QM_NORMAL, QM_SOFT_RESET, - QM_FLR, + QM_DOWN, }; enum qm_state { From b925a0cc87a1b950bc87ebf869e6d2dff0839e5f Mon Sep 17 00:00:00 2001 From: Weili Qian Date: Fri, 14 Jul 2023 19:41:37 +0800 Subject: [PATCH 171/656] crypto: hisilicon/qm - increase device doorbell timeout When both the accelerator device and SMMU are busy, the processing time of the doorbell may be prolonged. As a result, the doorbell may timeout, especially in the sva scenario. Therefore, the doorbell timeout is increased. Signed-off-by: Weili Qian Signed-off-by: Herbert Xu --- drivers/crypto/hisilicon/qm.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/crypto/hisilicon/qm.c b/drivers/crypto/hisilicon/qm.c index fdff87c09aaf..a99fd589445c 100644 --- a/drivers/crypto/hisilicon/qm.c +++ b/drivers/crypto/hisilicon/qm.c @@ -88,6 +88,8 @@ #define QM_DB_PRIORITY_SHIFT_V1 48 #define QM_PAGE_SIZE 0x0034 #define QM_QP_DB_INTERVAL 0x10000 +#define QM_DB_TIMEOUT_CFG 0x100074 +#define QM_DB_TIMEOUT_SET 0x1fffff #define QM_MEM_START_INIT 0x100040 #define QM_MEM_INIT_DONE 0x100044 @@ -5381,6 +5383,8 @@ int hisi_qm_init(struct hisi_qm *qm) goto err_pci_init; if (qm->fun_type == QM_HW_PF) { + /* Set the doorbell timeout to QM_DB_TIMEOUT_CFG ns. */ + writel(QM_DB_TIMEOUT_SET, qm->io_base + QM_DB_TIMEOUT_CFG); qm_disable_clock_gate(qm); ret = qm_dev_mem_reset(qm); if (ret) { @@ -5548,6 +5552,8 @@ static int qm_rebuild_for_resume(struct hisi_qm *qm) qm_cmd_init(qm); hisi_qm_dev_err_init(qm); + /* Set the doorbell timeout to QM_DB_TIMEOUT_CFG ns. */ + writel(QM_DB_TIMEOUT_SET, qm->io_base + QM_DB_TIMEOUT_CFG); qm_disable_clock_gate(qm); ret = qm_dev_mem_reset(qm); if (ret) From 391dde6e48ff84687395a0a4e84f7e1540301e4e Mon Sep 17 00:00:00 2001 From: Weili Qian Date: Fri, 14 Jul 2023 19:41:38 +0800 Subject: [PATCH 172/656] crypto: hisilicon/hpre - enable sva error interrupt event Enable sva error interrupt event. When an error occurs on the sva module, the device reports an abnormal interrupt to the driver. Signed-off-by: Weili Qian Signed-off-by: Herbert Xu --- drivers/crypto/hisilicon/hpre/hpre_main.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/crypto/hisilicon/hpre/hpre_main.c b/drivers/crypto/hisilicon/hpre/hpre_main.c index 5d0adfb54a34..39297ce70f44 100644 --- a/drivers/crypto/hisilicon/hpre/hpre_main.c +++ b/drivers/crypto/hisilicon/hpre/hpre_main.c @@ -209,7 +209,7 @@ static const struct hisi_qm_cap_info hpre_basic_info[] = { {HPRE_QM_RESET_MASK_CAP, 0x3128, 0, GENMASK(31, 0), 0x0, 0xC37, 0x6C37}, {HPRE_QM_OOO_SHUTDOWN_MASK_CAP, 0x3128, 0, GENMASK(31, 0), 0x0, 0x4, 0x6C37}, {HPRE_QM_CE_MASK_CAP, 0x312C, 0, GENMASK(31, 0), 0x0, 0x8, 0x8}, - {HPRE_NFE_MASK_CAP, 0x3130, 0, GENMASK(31, 0), 0x0, 0x3FFFFE, 0xFFFFFE}, + {HPRE_NFE_MASK_CAP, 0x3130, 0, GENMASK(31, 0), 0x0, 0x3FFFFE, 0x1FFFFFE}, {HPRE_RESET_MASK_CAP, 0x3134, 0, GENMASK(31, 0), 0x0, 0x3FFFFE, 0xBFFFFE}, {HPRE_OOO_SHUTDOWN_MASK_CAP, 0x3134, 0, GENMASK(31, 0), 0x0, 0x22, 0xBFFFFE}, {HPRE_CE_MASK_CAP, 0x3138, 0, GENMASK(31, 0), 0x0, 0x1, 0x1}, @@ -275,6 +275,9 @@ static const struct hpre_hw_error hpre_hw_errors[] = { }, { .int_msk = BIT(23), .msg = "sva_fsm_timeout_int_set" + }, { + .int_msk = BIT(24), + .msg = "sva_int_set" }, { /* sentinel */ } From 28b776098379fb698702b972df159aeca30aa6e3 Mon Sep 17 00:00:00 2001 From: Eric Biggers Date: Fri, 14 Jul 2023 22:01:04 -0700 Subject: [PATCH 173/656] crypto: x86/aesni - remove unused parameter to aes_set_key_common() The 'tfm' parameter to aes_set_key_common() is never used, so remove it. Signed-off-by: Eric Biggers Signed-off-by: Herbert Xu --- arch/x86/crypto/aesni-intel_glue.c | 22 +++++++++------------- 1 file changed, 9 insertions(+), 13 deletions(-) diff --git a/arch/x86/crypto/aesni-intel_glue.c b/arch/x86/crypto/aesni-intel_glue.c index c4eea7e746e7..39d6a62ac627 100644 --- a/arch/x86/crypto/aesni-intel_glue.c +++ b/arch/x86/crypto/aesni-intel_glue.c @@ -229,8 +229,7 @@ static inline struct crypto_aes_ctx *aes_ctx(void *raw_ctx) return (struct crypto_aes_ctx *)ALIGN(addr, align); } -static int aes_set_key_common(struct crypto_tfm *tfm, - struct crypto_aes_ctx *ctx, +static int aes_set_key_common(struct crypto_aes_ctx *ctx, const u8 *in_key, unsigned int key_len) { int err; @@ -253,7 +252,8 @@ static int aes_set_key_common(struct crypto_tfm *tfm, static int aes_set_key(struct crypto_tfm *tfm, const u8 *in_key, unsigned int key_len) { - return aes_set_key_common(tfm, aes_ctx(crypto_tfm_ctx(tfm)), in_key, key_len); + return aes_set_key_common(aes_ctx(crypto_tfm_ctx(tfm)), in_key, + key_len); } static void aesni_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src) @@ -285,8 +285,7 @@ static void aesni_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src) static int aesni_skcipher_setkey(struct crypto_skcipher *tfm, const u8 *key, unsigned int len) { - return aes_set_key_common(crypto_skcipher_tfm(tfm), - aes_ctx(crypto_skcipher_ctx(tfm)), key, len); + return aes_set_key_common(aes_ctx(crypto_skcipher_ctx(tfm)), key, len); } static int ecb_encrypt(struct skcipher_request *req) @@ -627,8 +626,7 @@ static int common_rfc4106_set_key(struct crypto_aead *aead, const u8 *key, memcpy(ctx->nonce, key + key_len, sizeof(ctx->nonce)); - return aes_set_key_common(crypto_aead_tfm(aead), - &ctx->aes_key_expanded, key, key_len) ?: + return aes_set_key_common(&ctx->aes_key_expanded, key, key_len) ?: rfc4106_set_hash_subkey(ctx->hash_subkey, key, key_len); } @@ -893,14 +891,13 @@ static int xts_aesni_setkey(struct crypto_skcipher *tfm, const u8 *key, keylen /= 2; /* first half of xts-key is for crypt */ - err = aes_set_key_common(crypto_skcipher_tfm(tfm), aes_ctx(ctx->raw_crypt_ctx), - key, keylen); + err = aes_set_key_common(aes_ctx(ctx->raw_crypt_ctx), key, keylen); if (err) return err; /* second half of xts-key is for tweak */ - return aes_set_key_common(crypto_skcipher_tfm(tfm), aes_ctx(ctx->raw_tweak_ctx), - key + keylen, keylen); + return aes_set_key_common(aes_ctx(ctx->raw_tweak_ctx), key + keylen, + keylen); } static int xts_crypt(struct skcipher_request *req, bool encrypt) @@ -1150,8 +1147,7 @@ static int generic_gcmaes_set_key(struct crypto_aead *aead, const u8 *key, { struct generic_gcmaes_ctx *ctx = generic_gcmaes_ctx_get(aead); - return aes_set_key_common(crypto_aead_tfm(aead), - &ctx->aes_key_expanded, key, key_len) ?: + return aes_set_key_common(&ctx->aes_key_expanded, key, key_len) ?: rfc4106_set_hash_subkey(ctx->hash_subkey, key, key_len); } From dd105461ad15ea930d88aec1e4fcfc1f3186da43 Mon Sep 17 00:00:00 2001 From: Martin Kaiser Date: Sun, 16 Jul 2023 16:11:12 +0200 Subject: [PATCH 174/656] hwrng: arm-smccc-trng - don't set drvdata Don't set drvdata, there's nobody who reads it. Signed-off-by: Martin Kaiser Signed-off-by: Herbert Xu --- drivers/char/hw_random/arm_smccc_trng.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/char/hw_random/arm_smccc_trng.c b/drivers/char/hw_random/arm_smccc_trng.c index e34c3ea692b6..7e954341b09f 100644 --- a/drivers/char/hw_random/arm_smccc_trng.c +++ b/drivers/char/hw_random/arm_smccc_trng.c @@ -105,8 +105,6 @@ static int smccc_trng_probe(struct platform_device *pdev) trng->name = "smccc_trng"; trng->read = smccc_trng_read; - platform_set_drvdata(pdev, trng); - return devm_hwrng_register(&pdev->dev, trng); } From ffb57ee9c0e2a9aae89016ee7b793a666c6aa4a5 Mon Sep 17 00:00:00 2001 From: Christophe JAILLET Date: Fri, 21 Jul 2023 19:25:43 +0200 Subject: [PATCH 175/656] regmap: Fix the type used for a bitmap pointer Bitmaps should be defined as 'unsigned long', not 'long'. Fix the type of 'cache_present' is the 'struct regcache_rbtree_node'. Signed-off-by: Christophe JAILLET Link: https://lore.kernel.org/r/5600df5003d23da10efcfafbda97ca55776d0d29.1689960321.git.christophe.jaillet@wanadoo.fr Signed-off-by: Mark Brown --- drivers/base/regmap/regcache-rbtree.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/base/regmap/regcache-rbtree.c b/drivers/base/regmap/regcache-rbtree.c index 06788965aa29..db716ffd083e 100644 --- a/drivers/base/regmap/regcache-rbtree.c +++ b/drivers/base/regmap/regcache-rbtree.c @@ -22,7 +22,7 @@ struct regcache_rbtree_node { /* block of adjacent registers */ void *block; /* Which registers are present */ - long *cache_present; + unsigned long *cache_present; /* base register handled by this block */ unsigned int base_reg; /* number of registers available in the block */ From 8858babff615ee366bf570c1facfbd0845dd924e Mon Sep 17 00:00:00 2001 From: William Qiu Date: Mon, 24 Jul 2023 18:10:53 +0800 Subject: [PATCH 176/656] dt-bindings: spi: add reference file to YAML In JH7110 SoC, the spi module needs to use "arm,primecell-periphid" to override the h/w ID value to correctly init "spi_dev", so add "primecell.yaml" as the reference file for YAML. Signed-off-by: William Qiu Link: https://lore.kernel.org/r/20230724101054.25268-2-william.qiu@starfivetech.com Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/spi/spi-pl022.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/spi/spi-pl022.yaml b/Documentation/devicetree/bindings/spi/spi-pl022.yaml index 91e540a92faf..5e5a704a766e 100644 --- a/Documentation/devicetree/bindings/spi/spi-pl022.yaml +++ b/Documentation/devicetree/bindings/spi/spi-pl022.yaml @@ -11,6 +11,7 @@ maintainers: allOf: - $ref: spi-controller.yaml# + - $ref: /schemas/arm/primecell.yaml# # We need a select here so we don't match all nodes with 'arm,primecell' select: From 49aa77165c00e5047b17b0072bbb41cc83a9f197 Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Fri, 21 Jul 2023 13:10:19 +0200 Subject: [PATCH 177/656] spi: lpspi: Add power-domains to the DT bindings i.MX8(X) based SoC use a power domain. Allow supplying this domain in bindings. Signed-off-by: Alexander Stein Acked-by: Rob Herring Link: https://lore.kernel.org/r/20230721111020.1234278-2-alexander.stein@ew.tq-group.com Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml b/Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml index e91425012319..727c5346b8ce 100644 --- a/Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml +++ b/Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml @@ -63,6 +63,9 @@ properties: maximum: 2 default: 1 + power-domains: + maxItems: 1 + required: - compatible - reg From 6a270bbd3a74c432b867214044377ccfcdb5ddc4 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 11 Jul 2023 09:20:53 +0200 Subject: [PATCH 178/656] gpio: mxc: Improve PM configuration MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit If CONFIG_PM=n (e.g. m68k/allmodconfig): drivers/gpio/gpio-mxc.c:612:12: error: ‘mxc_gpio_runtime_resume’ defined but not used [-Werror=unused-function] 612 | static int mxc_gpio_runtime_resume(struct device *dev) | ^~~~~~~~~~~~~~~~~~~~~~~ drivers/gpio/gpio-mxc.c:602:12: error: ‘mxc_gpio_runtime_suspend’ defined but not used [-Werror=unused-function] 602 | static int mxc_gpio_runtime_suspend(struct device *dev) | ^~~~~~~~~~~~~~~~~~~~~~~~ Fix this by using the non-SET *_PM_OPS to configure the dev_pm_ops callbacks, and by wrapping the driver.pm initializer insider pm_ptr(). As NOIRQ_SYSTEM_SLEEP_PM_OPS() uses pm_sleep_ptr() internally, the __maybe_unused annotations for the noirq callbacks are no longer needed, and can be removed. Fixes: 3283d820dce649ad ("gpio: mxc: add runtime pm support") Reported-by: noreply@ellerman.id.au Signed-off-by: Geert Uytterhoeven Reviewed-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-mxc.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c index 443f3e4d9aff..377d3ab8d626 100644 --- a/drivers/gpio/gpio-mxc.c +++ b/drivers/gpio/gpio-mxc.c @@ -622,7 +622,7 @@ static int mxc_gpio_runtime_resume(struct device *dev) return 0; } -static int __maybe_unused mxc_gpio_noirq_suspend(struct device *dev) +static int mxc_gpio_noirq_suspend(struct device *dev) { struct platform_device *pdev = to_platform_device(dev); struct mxc_gpio_port *port = platform_get_drvdata(pdev); @@ -633,7 +633,7 @@ static int __maybe_unused mxc_gpio_noirq_suspend(struct device *dev) return 0; } -static int __maybe_unused mxc_gpio_noirq_resume(struct device *dev) +static int mxc_gpio_noirq_resume(struct device *dev) { struct platform_device *pdev = to_platform_device(dev); struct mxc_gpio_port *port = platform_get_drvdata(pdev); @@ -646,8 +646,8 @@ static int __maybe_unused mxc_gpio_noirq_resume(struct device *dev) } static const struct dev_pm_ops mxc_gpio_dev_pm_ops = { - SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(mxc_gpio_noirq_suspend, mxc_gpio_noirq_resume) - SET_RUNTIME_PM_OPS(mxc_gpio_runtime_suspend, mxc_gpio_runtime_resume, NULL) + NOIRQ_SYSTEM_SLEEP_PM_OPS(mxc_gpio_noirq_suspend, mxc_gpio_noirq_resume) + RUNTIME_PM_OPS(mxc_gpio_runtime_suspend, mxc_gpio_runtime_resume, NULL) }; static int mxc_gpio_syscore_suspend(void) @@ -694,7 +694,7 @@ static struct platform_driver mxc_gpio_driver = { .name = "gpio-mxc", .of_match_table = mxc_gpio_dt_ids, .suppress_bind_attrs = true, - .pm = &mxc_gpio_dev_pm_ops, + .pm = pm_ptr(&mxc_gpio_dev_pm_ops), }, .probe = mxc_gpio_probe, }; From 5d472a7ef0f35e39906ef0eafa0c76727949f56b Mon Sep 17 00:00:00 2001 From: Samuel Holland Date: Mon, 24 Jul 2023 17:40:39 -0700 Subject: [PATCH 179/656] gpio: sifive: Directly use the device's fwnode There is no need to convert dev->of_node back to a fwnode_handle. Signed-off-by: Samuel Holland Reviewed-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-sifive.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-sifive.c b/drivers/gpio/gpio-sifive.c index efab7b58f739..a1b5bae05a35 100644 --- a/drivers/gpio/gpio-sifive.c +++ b/drivers/gpio/gpio-sifive.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -255,7 +256,7 @@ static int sifive_gpio_probe(struct platform_device *pdev) chip->gc.owner = THIS_MODULE; girq = &chip->gc.irq; gpio_irq_chip_set_chip(girq, &sifive_gpio_irqchip); - girq->fwnode = of_node_to_fwnode(node); + girq->fwnode = dev_fwnode(dev); girq->parent_domain = parent; girq->child_to_parent_hwirq = sifive_gpio_child_to_parent_hwirq; girq->handler = handle_bad_irq; From 1cd9cee75f99cfe31a6e339af518679649812838 Mon Sep 17 00:00:00 2001 From: Samuel Holland Date: Mon, 24 Jul 2023 17:40:40 -0700 Subject: [PATCH 180/656] gpio: sifive: Look up IRQs only once during probe of_irq_count(), or eqivalently platform_irq_count(), simply looks up successively-numbered IRQs until that fails. Since this driver needs to look up each IRQ anyway to get its virq number, use that existing loop to count the IRQs at the same time. The check against SIFIVE_GPIO_MAX functioned as a bounds check for chip->irq_number. That is now handled by the loop condition. Signed-off-by: Samuel Holland Reviewed-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-sifive.c | 17 +++++------------ 1 file changed, 5 insertions(+), 12 deletions(-) diff --git a/drivers/gpio/gpio-sifive.c b/drivers/gpio/gpio-sifive.c index a1b5bae05a35..e292c333f8dd 100644 --- a/drivers/gpio/gpio-sifive.c +++ b/drivers/gpio/gpio-sifive.c @@ -187,7 +187,7 @@ static int sifive_gpio_probe(struct platform_device *pdev) struct irq_domain *parent; struct gpio_irq_chip *girq; struct sifive_gpio *chip; - int ret, ngpio, i; + int ret, ngpio; chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL); if (!chip) @@ -204,13 +204,6 @@ static int sifive_gpio_probe(struct platform_device *pdev) if (IS_ERR(chip->regs)) return PTR_ERR(chip->regs); - ngpio = of_irq_count(node); - if (ngpio > SIFIVE_GPIO_MAX) { - dev_err(dev, "Too many GPIO interrupts (max=%d)\n", - SIFIVE_GPIO_MAX); - return -ENXIO; - } - irq_parent = of_irq_find_parent(node); if (!irq_parent) { dev_err(dev, "no IRQ parent node\n"); @@ -223,11 +216,11 @@ static int sifive_gpio_probe(struct platform_device *pdev) return -ENODEV; } - for (i = 0; i < ngpio; i++) { - ret = platform_get_irq(pdev, i); + for (ngpio = 0; ngpio < SIFIVE_GPIO_MAX; ngpio++) { + ret = platform_get_irq_optional(pdev, ngpio); if (ret < 0) - return ret; - chip->irq_number[i] = ret; + break; + chip->irq_number[ngpio] = ret; } ret = bgpio_init(&chip->gc, dev, 4, From 3b5560c8f074aee8839b66093b4d565702a6921d Mon Sep 17 00:00:00 2001 From: Samuel Holland Date: Mon, 24 Jul 2023 17:40:41 -0700 Subject: [PATCH 181/656] gpio: sifive: Get the parent IRQ's domain from its irq_data Do not parse the devicetree again when the data is already available from the IRQ subsystem. This follows the example of the ThunderX and X-Gene GPIO drivers. The ngpio check is needed to avoid a possible out-of-bounds read. Signed-off-by: Samuel Holland Reviewed-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-sifive.c | 25 ++++++++++--------------- 1 file changed, 10 insertions(+), 15 deletions(-) diff --git a/drivers/gpio/gpio-sifive.c b/drivers/gpio/gpio-sifive.c index e292c333f8dd..8033bb8246c6 100644 --- a/drivers/gpio/gpio-sifive.c +++ b/drivers/gpio/gpio-sifive.c @@ -6,7 +6,6 @@ #include #include #include -#include #include #include #include @@ -182,8 +181,6 @@ static const struct regmap_config sifive_gpio_regmap_config = { static int sifive_gpio_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; - struct device_node *node = pdev->dev.of_node; - struct device_node *irq_parent; struct irq_domain *parent; struct gpio_irq_chip *girq; struct sifive_gpio *chip; @@ -204,24 +201,22 @@ static int sifive_gpio_probe(struct platform_device *pdev) if (IS_ERR(chip->regs)) return PTR_ERR(chip->regs); - irq_parent = of_irq_find_parent(node); - if (!irq_parent) { - dev_err(dev, "no IRQ parent node\n"); - return -ENODEV; - } - parent = irq_find_host(irq_parent); - of_node_put(irq_parent); - if (!parent) { - dev_err(dev, "no IRQ parent domain\n"); - return -ENODEV; - } - for (ngpio = 0; ngpio < SIFIVE_GPIO_MAX; ngpio++) { ret = platform_get_irq_optional(pdev, ngpio); if (ret < 0) break; chip->irq_number[ngpio] = ret; } + if (!ngpio) { + dev_err(dev, "no IRQ found\n"); + return -ENODEV; + } + + /* + * The check above ensures at least one parent IRQ is valid. + * Assume all parent IRQs belong to the same domain. + */ + parent = irq_get_irq_data(chip->irq_number[0])->domain; ret = bgpio_init(&chip->gc, dev, 4, chip->base + SIFIVE_GPIO_INPUT_VAL, From 6b4c76ded3582651afca319f2ca58c22ec908529 Mon Sep 17 00:00:00 2001 From: Samuel Holland Date: Mon, 24 Jul 2023 17:40:42 -0700 Subject: [PATCH 182/656] gpio: sifive: Allow building the driver as a module This can reduce the kernel image size in multiplatform configurations. Acked-by: Palmer Dabbelt Reviewed-by: Andy Shevchenko Signed-off-by: Samuel Holland Signed-off-by: Bartosz Golaszewski --- drivers/gpio/Kconfig | 2 +- drivers/gpio/gpio-sifive.c | 6 +++++- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 1cf267a3ed8b..398d9ef7e680 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -564,7 +564,7 @@ config GPIO_SAMA5D2_PIOBU maintain their value during backup/self-refresh. config GPIO_SIFIVE - bool "SiFive GPIO support" + tristate "SiFive GPIO support" depends on OF_GPIO select IRQ_DOMAIN_HIERARCHY select GPIO_GENERIC diff --git a/drivers/gpio/gpio-sifive.c b/drivers/gpio/gpio-sifive.c index 8033bb8246c6..8decd9b5d229 100644 --- a/drivers/gpio/gpio-sifive.c +++ b/drivers/gpio/gpio-sifive.c @@ -267,4 +267,8 @@ static struct platform_driver sifive_gpio_driver = { .of_match_table = sifive_gpio_match, }, }; -builtin_platform_driver(sifive_gpio_driver) +module_platform_driver(sifive_gpio_driver) + +MODULE_AUTHOR("Yash Shah "); +MODULE_DESCRIPTION("SiFive GPIO driver"); +MODULE_LICENSE("GPL"); From 55c8b8ddc0d95912c7b0d066aaa4bbac146e3c42 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 25 Jul 2023 12:54:21 +0200 Subject: [PATCH 183/656] regulator: dt-bindings: mps,mpq7920: drop incorrect ref to regulator.yaml "regulators" node is just grouping regulators, but itself is not describing one regulator, thus reference to regulator.yaml schema is incorrect. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230725105421.99160-2-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/regulator/mps,mpq7920.yaml | 1 - 1 file changed, 1 deletion(-) diff --git a/Documentation/devicetree/bindings/regulator/mps,mpq7920.yaml b/Documentation/devicetree/bindings/regulator/mps,mpq7920.yaml index f3fcfc8be72f..019c60942efc 100644 --- a/Documentation/devicetree/bindings/regulator/mps,mpq7920.yaml +++ b/Documentation/devicetree/bindings/regulator/mps,mpq7920.yaml @@ -21,7 +21,6 @@ properties: regulators: type: object - $ref: regulator.yaml# description: | list of regulators provided by this controller, must be named From 269cb04b601dd8c35bbee180a9800335b93111fb Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Fri, 14 Jul 2023 16:14:07 +0800 Subject: [PATCH 184/656] regulator: Use bitfield values for range selectors Right now the regulator helpers expect raw register values for the range selectors. This is different from the voltage selectors, which are normalized as bitfield values. This leads to a bit of confusion. Also, raw values are harder to copy from datasheets or match up with them, as datasheets will typically have bitfield values. Make the helpers expect bitfield values, and convert existing users. The field in regulator_desc is renamed to |linear_range_selectors_bitfield|. This is intended to cause drivers added in the same merge window and out-of-tree drivers using the incorrect variable and values to break, preventing incorrect values being used on actual hardware and potentially producing magic smoke. Also include bitops.h explicitly for ffs(), and reorder the header include statements. While at it, also replace module.h with export.h, since the only use is EXPORT_SYMBOL_GPL. Signed-off-by: Chen-Yu Tsai Link: https://lore.kernel.org/r/20230714081408.274567-1-wenst@chromium.org Signed-off-by: Mark Brown --- drivers/regulator/atc260x-regulator.c | 4 ++-- drivers/regulator/bd718x7-regulator.c | 22 +++++++++++----------- drivers/regulator/helpers.c | 15 +++++++++------ drivers/regulator/max77541-regulator.c | 6 +++--- drivers/regulator/max77650-regulator.c | 2 +- drivers/regulator/rohm-regulator.c | 2 +- drivers/regulator/tps6287x-regulator.c | 4 ++-- include/linux/regulator/driver.h | 11 ++++++----- 8 files changed, 35 insertions(+), 31 deletions(-) diff --git a/drivers/regulator/atc260x-regulator.c b/drivers/regulator/atc260x-regulator.c index 09fe51464090..3e9f8fd54fca 100644 --- a/drivers/regulator/atc260x-regulator.c +++ b/drivers/regulator/atc260x-regulator.c @@ -38,7 +38,7 @@ static const struct linear_range atc2609a_ldo_voltage_ranges1[] = { }; static const unsigned int atc260x_ldo_voltage_range_sel[] = { - 0x0, 0x20, + 0x0, 0x1, }; static int atc260x_dcdc_set_voltage_time_sel(struct regulator_dev *rdev, @@ -428,7 +428,7 @@ enum atc2609a_reg_ids { .vsel_mask = GENMASK(4, 1), \ .vsel_range_reg = ATC2609A_PMU_LDO##num##_CTL0, \ .vsel_range_mask = BIT(5), \ - .linear_range_selectors = atc260x_ldo_voltage_range_sel, \ + .linear_range_selectors_bitfield = atc260x_ldo_voltage_range_sel, \ .enable_reg = ATC2609A_PMU_LDO##num##_CTL0, \ .enable_mask = BIT(0), \ .enable_time = 2000, \ diff --git a/drivers/regulator/bd718x7-regulator.c b/drivers/regulator/bd718x7-regulator.c index b0b9938c20a1..c3fb05dce40c 100644 --- a/drivers/regulator/bd718x7-regulator.c +++ b/drivers/regulator/bd718x7-regulator.c @@ -289,7 +289,7 @@ static const struct linear_range bd71837_buck5_volts[] = { * and 0x1 for last 3 ranges. */ static const unsigned int bd71837_buck5_volt_range_sel[] = { - 0x0, 0x0, 0x0, 0x80, 0x80, 0x80 + 0x0, 0x0, 0x0, 0x1, 0x1, 0x1 }; /* @@ -309,7 +309,7 @@ static const struct linear_range bd71847_buck3_volts[] = { }; static const unsigned int bd71847_buck3_volt_range_sel[] = { - 0x0, 0x0, 0x0, 0x40, 0x80, 0x80, 0x80 + 0x0, 0x0, 0x0, 0x1, 0x2, 0x2, 0x2 }; static const struct linear_range bd71847_buck4_volts[] = { @@ -317,7 +317,7 @@ static const struct linear_range bd71847_buck4_volts[] = { REGULATOR_LINEAR_RANGE(2600000, 0x00, 0x03, 100000), }; -static const unsigned int bd71847_buck4_volt_range_sel[] = { 0x0, 0x40 }; +static const unsigned int bd71847_buck4_volt_range_sel[] = { 0x0, 0x1 }; /* * BUCK6 @@ -360,7 +360,7 @@ static const struct linear_range bd718xx_ldo1_volts[] = { REGULATOR_LINEAR_RANGE(1600000, 0x00, 0x03, 100000), }; -static const unsigned int bd718xx_ldo1_volt_range_sel[] = { 0x0, 0x20 }; +static const unsigned int bd718xx_ldo1_volt_range_sel[] = { 0x0, 0x1 }; /* * LDO2 @@ -403,7 +403,7 @@ static const struct linear_range bd71847_ldo5_volts[] = { REGULATOR_LINEAR_RANGE(800000, 0x00, 0x0F, 100000), }; -static const unsigned int bd71847_ldo5_volt_range_sel[] = { 0x0, 0x20 }; +static const unsigned int bd71847_ldo5_volt_range_sel[] = { 0x0, 0x1 }; /* * LDO6 @@ -817,7 +817,7 @@ static struct bd718xx_regulator_data bd71847_regulators[] = { .vsel_mask = BD718XX_1ST_NODVS_BUCK_MASK, .vsel_range_reg = BD718XX_REG_1ST_NODVS_BUCK_VOLT, .vsel_range_mask = BD71847_BUCK3_RANGE_MASK, - .linear_range_selectors = bd71847_buck3_volt_range_sel, + .linear_range_selectors_bitfield = bd71847_buck3_volt_range_sel, .enable_reg = BD718XX_REG_1ST_NODVS_BUCK_CTRL, .enable_mask = BD718XX_BUCK_EN, .enable_time = BD71847_BUCK3_STARTUP_TIME, @@ -845,7 +845,7 @@ static struct bd718xx_regulator_data bd71847_regulators[] = { .vsel_mask = BD71847_BUCK4_MASK, .vsel_range_reg = BD718XX_REG_2ND_NODVS_BUCK_VOLT, .vsel_range_mask = BD71847_BUCK4_RANGE_MASK, - .linear_range_selectors = bd71847_buck4_volt_range_sel, + .linear_range_selectors_bitfield = bd71847_buck4_volt_range_sel, .enable_mask = BD718XX_BUCK_EN, .enable_time = BD71847_BUCK4_STARTUP_TIME, .owner = THIS_MODULE, @@ -916,7 +916,7 @@ static struct bd718xx_regulator_data bd71847_regulators[] = { .vsel_mask = BD718XX_LDO1_MASK, .vsel_range_reg = BD718XX_REG_LDO1_VOLT, .vsel_range_mask = BD718XX_LDO1_RANGE_MASK, - .linear_range_selectors = bd718xx_ldo1_volt_range_sel, + .linear_range_selectors_bitfield = bd718xx_ldo1_volt_range_sel, .enable_reg = BD718XX_REG_LDO1_VOLT, .enable_mask = BD718XX_LDO_EN, .enable_time = BD71847_LDO1_STARTUP_TIME, @@ -1010,7 +1010,7 @@ static struct bd718xx_regulator_data bd71847_regulators[] = { .vsel_mask = BD71847_LDO5_MASK, .vsel_range_reg = BD718XX_REG_LDO5_VOLT, .vsel_range_mask = BD71847_LDO5_RANGE_MASK, - .linear_range_selectors = bd71847_ldo5_volt_range_sel, + .linear_range_selectors_bitfield = bd71847_ldo5_volt_range_sel, .enable_reg = BD718XX_REG_LDO5_VOLT, .enable_mask = BD718XX_LDO_EN, .enable_time = BD71847_LDO5_STARTUP_TIME, @@ -1232,7 +1232,7 @@ static struct bd718xx_regulator_data bd71837_regulators[] = { .vsel_mask = BD71837_BUCK5_MASK, .vsel_range_reg = BD718XX_REG_1ST_NODVS_BUCK_VOLT, .vsel_range_mask = BD71837_BUCK5_RANGE_MASK, - .linear_range_selectors = bd71837_buck5_volt_range_sel, + .linear_range_selectors_bitfield = bd71837_buck5_volt_range_sel, .enable_reg = BD718XX_REG_1ST_NODVS_BUCK_CTRL, .enable_mask = BD718XX_BUCK_EN, .enable_time = BD71837_BUCK5_STARTUP_TIME, @@ -1328,7 +1328,7 @@ static struct bd718xx_regulator_data bd71837_regulators[] = { .vsel_mask = BD718XX_LDO1_MASK, .vsel_range_reg = BD718XX_REG_LDO1_VOLT, .vsel_range_mask = BD718XX_LDO1_RANGE_MASK, - .linear_range_selectors = bd718xx_ldo1_volt_range_sel, + .linear_range_selectors_bitfield = bd718xx_ldo1_volt_range_sel, .enable_reg = BD718XX_REG_LDO1_VOLT, .enable_mask = BD718XX_LDO_EN, .enable_time = BD71837_LDO1_STARTUP_TIME, diff --git a/drivers/regulator/helpers.c b/drivers/regulator/helpers.c index e6c999ba3fa2..5ad5f3b3a6b5 100644 --- a/drivers/regulator/helpers.c +++ b/drivers/regulator/helpers.c @@ -5,13 +5,14 @@ // Copyright 2007, 2008 Wolfson Microelectronics PLC. // Copyright 2008 SlimLogic Ltd. -#include -#include +#include #include +#include +#include +#include #include #include #include -#include #include "internal.h" @@ -104,13 +105,14 @@ static int regulator_range_selector_to_index(struct regulator_dev *rdev, { int i; - if (!rdev->desc->linear_range_selectors) + if (!rdev->desc->linear_range_selectors_bitfield) return -EINVAL; rval &= rdev->desc->vsel_range_mask; + rval >>= ffs(rdev->desc->vsel_range_mask) - 1; for (i = 0; i < rdev->desc->n_linear_ranges; i++) { - if (rdev->desc->linear_range_selectors[i] == rval) + if (rdev->desc->linear_range_selectors_bitfield[i] == rval) return i; } return -EINVAL; @@ -194,7 +196,8 @@ int regulator_set_voltage_sel_pickable_regmap(struct regulator_dev *rdev, sel <<= ffs(rdev->desc->vsel_mask) - 1; sel += rdev->desc->linear_ranges[i].min_sel; - range = rdev->desc->linear_range_selectors[i]; + range = rdev->desc->linear_range_selectors_bitfield[i]; + range <<= ffs(rdev->desc->vsel_mask) - 1; if (rdev->desc->vsel_reg == rdev->desc->vsel_range_reg) { ret = regmap_update_bits(rdev->regmap, diff --git a/drivers/regulator/max77541-regulator.c b/drivers/regulator/max77541-regulator.c index 2976f9cb3e26..e6b3d9147c37 100644 --- a/drivers/regulator/max77541-regulator.c +++ b/drivers/regulator/max77541-regulator.c @@ -44,7 +44,7 @@ static const struct linear_range max77541_buck_ranges[] = { }; static const unsigned int max77541_buck_volt_range_sel[] = { - 0x00, 0x00, 0x40, 0x40, 0x80, 0x80, + 0x0, 0x0, 0x1, 0x1, 0x2, 0x2, }; enum max77541_regulators { @@ -67,7 +67,7 @@ enum max77541_regulators { .vsel_mask = MAX77541_BITS_MX_VOUT, \ .vsel_range_reg = MAX77541_REG_M ## _id ## _CFG1, \ .vsel_range_mask = MAX77541_BITS_MX_CFG1_RNG, \ - .linear_range_selectors = max77541_buck_volt_range_sel, \ + .linear_range_selectors_bitfield = max77541_buck_volt_range_sel, \ .owner = THIS_MODULE, \ } @@ -86,7 +86,7 @@ enum max77541_regulators { .vsel_mask = MAX77541_BITS_MX_VOUT, \ .vsel_range_reg = MAX77541_REG_M ## _id ## _CFG1, \ .vsel_range_mask = MAX77541_BITS_MX_CFG1_RNG, \ - .linear_range_selectors = max77541_buck_volt_range_sel, \ + .linear_range_selectors_bitfield = max77541_buck_volt_range_sel, \ .owner = THIS_MODULE, \ } diff --git a/drivers/regulator/max77650-regulator.c b/drivers/regulator/max77650-regulator.c index f6539b945037..94abfbb2bc1e 100644 --- a/drivers/regulator/max77650-regulator.c +++ b/drivers/regulator/max77650-regulator.c @@ -239,7 +239,7 @@ static struct max77650_regulator_desc max77651_SBB1_desc = { .supply_name = "in-sbb1", .id = MAX77650_REGULATOR_ID_SBB1, .ops = &max77651_SBB1_regulator_ops, - .linear_range_selectors = max77651_sbb1_volt_range_sel, + .linear_range_selectors_bitfield = max77651_sbb1_volt_range_sel, .linear_ranges = max77651_sbb1_volt_ranges, .n_linear_ranges = ARRAY_SIZE(max77651_sbb1_volt_ranges), .n_voltages = 58, diff --git a/drivers/regulator/rohm-regulator.c b/drivers/regulator/rohm-regulator.c index f97a9a51ee76..0e2418ed957c 100644 --- a/drivers/regulator/rohm-regulator.c +++ b/drivers/regulator/rohm-regulator.c @@ -36,7 +36,7 @@ static int set_dvs_level(const struct regulator_desc *desc, } for (i = 0; i < desc->n_voltages; i++) { /* NOTE to next hacker - Does not support pickable ranges */ - if (desc->linear_range_selectors) + if (desc->linear_range_selectors_bitfield) return -EINVAL; if (desc->n_linear_ranges) ret = regulator_desc_list_voltage_linear_range(desc, i); diff --git a/drivers/regulator/tps6287x-regulator.c b/drivers/regulator/tps6287x-regulator.c index 19a4a300a963..d022184a8e7d 100644 --- a/drivers/regulator/tps6287x-regulator.c +++ b/drivers/regulator/tps6287x-regulator.c @@ -41,7 +41,7 @@ static const struct linear_range tps6287x_voltage_ranges[] = { }; static const unsigned int tps6287x_voltage_range_sel[] = { - 0x0, 0x4, 0x8, 0xC + 0x0, 0x1, 0x2, 0x3 }; static const unsigned int tps6287x_ramp_table[] = { @@ -122,7 +122,7 @@ static struct regulator_desc tps6287x_reg = { .n_voltages = 256, .linear_ranges = tps6287x_voltage_ranges, .n_linear_ranges = ARRAY_SIZE(tps6287x_voltage_ranges), - .linear_range_selectors = tps6287x_voltage_range_sel, + .linear_range_selectors_bitfield = tps6287x_voltage_range_sel, }; static int tps6287x_i2c_probe(struct i2c_client *i2c) diff --git a/include/linux/regulator/driver.h b/include/linux/regulator/driver.h index c6ef7d68eb9a..4b7eceb3828b 100644 --- a/include/linux/regulator/driver.h +++ b/include/linux/regulator/driver.h @@ -292,11 +292,12 @@ enum regulator_type { * @ramp_delay: Time to settle down after voltage change (unit: uV/us) * @min_dropout_uV: The minimum dropout voltage this regulator can handle * @linear_ranges: A constant table of possible voltage ranges. - * @linear_range_selectors: A constant table of voltage range selectors. - * If pickable ranges are used each range must - * have corresponding selector here. + * @linear_range_selectors_bitfield: A constant table of voltage range + * selectors as bitfield values. If + * pickable ranges are used each range + * must have corresponding selector here. * @n_linear_ranges: Number of entries in the @linear_ranges (and in - * linear_range_selectors if used) table(s). + * linear_range_selectors_bitfield if used) table(s). * @volt_table: Voltage mapping table (if table based mapping) * @curr_table: Current limit mapping table (if table based mapping) * @@ -384,7 +385,7 @@ struct regulator_desc { int min_dropout_uV; const struct linear_range *linear_ranges; - const unsigned int *linear_range_selectors; + const unsigned int *linear_range_selectors_bitfield; int n_linear_ranges; From 908e5a3d4e6f60fa2d3912be7087e745639c4404 Mon Sep 17 00:00:00 2001 From: Minjie Du Date: Tue, 25 Jul 2023 11:50:37 +0800 Subject: [PATCH 185/656] spi: fsl-dspi: Use dev_err_probe() in dspi_request_dma() It is possible for dma_request_chan() to return EPROBE_DEFER, which means dev is not ready yet. At this point dev_err() will have no output. Signed-off-by: Minjie Du Link: https://lore.kernel.org/r/20230725035038.1702-1-duminjie@vivo.com Signed-off-by: Mark Brown --- drivers/spi/spi-fsl-dspi.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c index ca41c8a8ba42..150d2ebf234b 100644 --- a/drivers/spi/spi-fsl-dspi.c +++ b/drivers/spi/spi-fsl-dspi.c @@ -503,15 +503,14 @@ static int dspi_request_dma(struct fsl_dspi *dspi, phys_addr_t phy_addr) dma->chan_rx = dma_request_chan(dev, "rx"); if (IS_ERR(dma->chan_rx)) { - dev_err(dev, "rx dma channel not available\n"); - ret = PTR_ERR(dma->chan_rx); - return ret; + return dev_err_probe(dev, PTR_ERR(dma->chan_rx), + "rx dma channel not available\n"); } dma->chan_tx = dma_request_chan(dev, "tx"); if (IS_ERR(dma->chan_tx)) { - dev_err(dev, "tx dma channel not available\n"); ret = PTR_ERR(dma->chan_tx); + dev_err_probe(dev, ret, "tx dma channel not available\n"); goto err_tx_channel; } From 7ad1c439fb25907dba31af5d66b44c6a3b999c89 Mon Sep 17 00:00:00 2001 From: YueHaibing Date: Tue, 25 Jul 2023 21:54:11 +0800 Subject: [PATCH 186/656] spi: fsl: Remove unused extern declarations commit b36ece832512 ("spi/mpc8xxx: refactor the common code for SPI/eSPI controller") left mpc8xxx_spi_bufs() behind. And since commit 3c5395b66ff6 ("spi: fsl-(e)spi: simplify cleanup code") mpc8xxx_spi_remove() is not used anymore. Signed-off-by: YueHaibing Link: https://lore.kernel.org/r/20230725135411.21152-1-yuehaibing@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-fsl-lib.h | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/spi/spi-fsl-lib.h b/drivers/spi/spi-fsl-lib.h index 015a1abb6a84..50a07f984b23 100644 --- a/drivers/spi/spi-fsl-lib.h +++ b/drivers/spi/spi-fsl-lib.h @@ -103,12 +103,9 @@ extern void mpc8xxx_spi_rx_buf_u32(u32 data, struct mpc8xxx_spi *mpc8xxx_spi); extern struct mpc8xxx_spi_probe_info *to_of_pinfo( struct fsl_spi_platform_data *pdata); -extern int mpc8xxx_spi_bufs(struct mpc8xxx_spi *mspi, - struct spi_transfer *t, unsigned int len); extern const char *mpc8xxx_spi_strmode(unsigned int flags); extern void mpc8xxx_spi_probe(struct device *dev, struct resource *mem, unsigned int irq); -extern int mpc8xxx_spi_remove(struct device *dev); extern int of_mpc8xxx_spi_probe(struct platform_device *ofdev); #endif /* __SPI_FSL_LIB_H__ */ From 6b677c1ae8e4096c84fbcbe1b7fd300dab0b381b Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 25 Jul 2023 17:47:43 +0200 Subject: [PATCH 187/656] regulator: REGULATOR_QCOM_REFGEN should depend on ARCH_QCOM The Qualcomm MMIO-mapped reference voltage regulator is only present on Qualcomm SoCs. Hence add a dependency on ARCH_QCOM, to prevent asking the user about this driver when configuring a kernel without Qualcomm SoC support. Fixes: 7cbfbe23796086fd ("regulator: Introduce Qualcomm REFGEN regulator driver") Signed-off-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/60938ed138c9331ba3d2891fbd3b3d6644d3fbdc.1690300012.git.geert+renesas@glider.be Signed-off-by: Mark Brown --- drivers/regulator/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig index 542a7b427994..94f44736473e 100644 --- a/drivers/regulator/Kconfig +++ b/drivers/regulator/Kconfig @@ -1001,6 +1001,7 @@ config REGULATOR_PWM config REGULATOR_QCOM_REFGEN tristate "Qualcomm REFGEN regulator driver" + depends on ARCH_QCOM || COMPILE_TEST depends on HAS_IOMEM depends on REGMAP help From 9b7e0645ba65e4824436a2f1817843291e744443 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 25 Jul 2023 14:46:27 +0200 Subject: [PATCH 188/656] regulator: dt-bindings: dlg,da9121: add buck2 constraints Instead of describing the constraints for some devices (buck2 not present), code it in allOf:if:then section to actually allow validation of this requirement. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230725124629.150113-1-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown --- .../bindings/regulator/dlg,da9121.yaml | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/regulator/dlg,da9121.yaml b/Documentation/devicetree/bindings/regulator/dlg,da9121.yaml index dc626517c2ad..43f99bc8fbd4 100644 --- a/Documentation/devicetree/bindings/regulator/dlg,da9121.yaml +++ b/Documentation/devicetree/bindings/regulator/dlg,da9121.yaml @@ -97,8 +97,6 @@ properties: properties: regulator-name: pattern: "^BUCK([1-2])$" - description: | - BUCK2 present in DA9122, DA9220, DA9131, DA9132 only regulator-initial-mode: enum: [ 0, 1, 2, 3 ] @@ -122,6 +120,23 @@ required: - reg - regulators +allOf: + - if: + properties: + compatible: + not: + contains: + enum: + - dlg,da9122 + - dlg,da9131 + - dlg,da9132 + - dlg,da9220 + then: + properties: + regulators: + properties: + buck2: false + additionalProperties: false examples: From e5481cc40d00b9f4a3250b2fd4a805e3d000b229 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 25 Jul 2023 14:46:28 +0200 Subject: [PATCH 189/656] regulator: dt-bindings: dlg,da9121: allow different names Regulator names, as specified by regulator-name, are board-dependent and should describe the name used on the actual board. Do not enforce generic buck1/2 names. This also fixes dtbs_check warnings like: zynqmp-sm-k26-revA.dtb: pmic@33: regulators:buck1:regulator-name:0: 'da9131_buck1' does not match '^BUCK([1-2])$' Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230725124629.150113-2-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/regulator/dlg,da9121.yaml | 3 --- 1 file changed, 3 deletions(-) diff --git a/Documentation/devicetree/bindings/regulator/dlg,da9121.yaml b/Documentation/devicetree/bindings/regulator/dlg,da9121.yaml index 43f99bc8fbd4..13b3f75f8e5e 100644 --- a/Documentation/devicetree/bindings/regulator/dlg,da9121.yaml +++ b/Documentation/devicetree/bindings/regulator/dlg,da9121.yaml @@ -95,9 +95,6 @@ properties: Properties for a single BUCK regulator properties: - regulator-name: - pattern: "^BUCK([1-2])$" - regulator-initial-mode: enum: [ 0, 1, 2, 3 ] description: Defined in include/dt-bindings/regulator/dlg,da9121-regulator.h From 7631a0c5b093fe1bc27b4770021c4aa0d06fb3c5 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 25 Jul 2023 14:46:29 +0200 Subject: [PATCH 190/656] regulator: dt-bindings: active-semi,act8846: correct supplies Regulator supplies are per-device, not per regulator, so they are expected to be present in device node. Moving them to proper place allows to simplify a lot, because now none of the regulators differ. This also fixes dtbs_check warnings like: rk3368-evb-act8846.dtb: act8846@5a: 'inl1-supply', 'inl2-supply', 'inl3-supply', 'vp1-supply', 'vp2-supply', 'vp3-supply', 'vp4-supply' do not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230725124629.150113-3-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown --- .../regulator/active-semi,act8846.yaml | 82 +++++-------------- 1 file changed, 22 insertions(+), 60 deletions(-) diff --git a/Documentation/devicetree/bindings/regulator/active-semi,act8846.yaml b/Documentation/devicetree/bindings/regulator/active-semi,act8846.yaml index 3725348bb235..02f45b5834d0 100644 --- a/Documentation/devicetree/bindings/regulator/active-semi,act8846.yaml +++ b/Documentation/devicetree/bindings/regulator/active-semi,act8846.yaml @@ -28,75 +28,37 @@ properties: the VSEL pin is assumed to be low. type: boolean + inl1-supply: + description: Handle to the INL1 input supply (REG5-7) + + inl2-supply: + description: Handle to the INL2 input supply (REG8-9) + + inl3-supply: + description: Handle to the INL3 input supply (REG10-12) + + vp1-supply: + description: Handle to the VP1 input supply (REG1) + + vp2-supply: + description: Handle to the VP2 input supply (REG2) + + vp3-supply: + description: Handle to the VP3 input supply (REG3) + + vp4-supply: + description: Handle to the VP4 input supply (REG4) + regulators: type: object additionalProperties: false - properties: - REG1: - type: object - $ref: /schemas/regulator/regulator.yaml# - unevaluatedProperties: false - - properties: - vp1-supply: - description: Handle to the VP1 input supply - - REG2: - type: object - $ref: /schemas/regulator/regulator.yaml# - unevaluatedProperties: false - - properties: - vp2-supply: - description: Handle to the VP2 input supply - - REG3: - type: object - $ref: /schemas/regulator/regulator.yaml# - unevaluatedProperties: false - - properties: - vp3-supply: - description: Handle to the VP3 input supply - - REG4: - type: object - $ref: /schemas/regulator/regulator.yaml# - unevaluatedProperties: false - - properties: - vp4-supply: - description: Handle to the VP4 input supply - patternProperties: - "^REG[5-7]$": + "^REG([1-9]|1[0-2])$": type: object $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false - properties: - inl1-supply: - description: Handle to the INL1 input supply - - "^REG[8-9]$": - type: object - $ref: /schemas/regulator/regulator.yaml# - unevaluatedProperties: false - - properties: - inl2-supply: - description: Handle to the INL2 input supply - - "^REG1[0-2]$": - type: object - $ref: /schemas/regulator/regulator.yaml# - unevaluatedProperties: false - - properties: - inl3-supply: - description: Handle to the INL3 input supply - additionalProperties: false required: From 75d9bf03e2fa38242b35e941ce7c7cdabe479961 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 25 Jul 2023 18:40:47 +0200 Subject: [PATCH 191/656] regulator: dt-bindings: qcom,rpm: fix pattern for children The "or" (|) in regular expression must be within parentheses, otherwise it is not really an "or" and it matches supplies: qcom-apq8060-dragonboard.dtb: regulators-1: vdd_ncp-supply: [[34]] is not of type 'object' Fixes: fde0e25b71a9 ("dt-bindings: regulators: convert non-smd RPM Regulators bindings to dt-schema") Cc: stable@vger.kernel.org Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230725164047.368892-1-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown --- .../devicetree/bindings/regulator/qcom,rpm-regulator.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/regulator/qcom,rpm-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,rpm-regulator.yaml index 8a08698e3484..b4eb4001eb3d 100644 --- a/Documentation/devicetree/bindings/regulator/qcom,rpm-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/qcom,rpm-regulator.yaml @@ -49,7 +49,7 @@ patternProperties: ".*-supply$": description: Input supply phandle(s) for this node - "^((s|l|lvs)[0-9]*)|(s[1-2][a-b])|(ncp)|(mvs)|(usb-switch)|(hdmi-switch)$": + "^((s|l|lvs)[0-9]*|s[1-2][a-b]|ncp|mvs|usb-switch|hdmi-switch)$": description: List of regulators and its properties $ref: regulator.yaml# unevaluatedProperties: false From d2d54819779e1ec0d7908ec98220fa54e72adc48 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 26 Jul 2023 09:49:40 +0200 Subject: [PATCH 192/656] regulator: dt-bindings: add missing unevaluatedProperties for each regulator Each regulator node, which references common regulator.yaml schema, should disallow additional or unevaluated properties. Otherwise mistakes in properties will go unnoticed. Reported-by: Konrad Dybcio Closes: https://git.codelinaro.org/linaro/qcomlt/kernel/-/commit/1c8aeef8a6e84520b77f0c270d99c8bf692c5933 Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230726074940.121040-1-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/regulator/mps,mp5416.yaml | 2 ++ Documentation/devicetree/bindings/regulator/mps,mpq7920.yaml | 2 ++ Documentation/devicetree/bindings/regulator/pfuze100.yaml | 4 ++++ .../devicetree/bindings/regulator/qcom,rpmh-regulator.yaml | 2 ++ .../devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml | 1 + .../bindings/regulator/richtek,rt4831-regulator.yaml | 1 + .../bindings/regulator/richtek,rtmv20-regulator.yaml | 1 + .../bindings/regulator/richtek,rtq6752-regulator.yaml | 1 + .../devicetree/bindings/regulator/st,stm32mp1-pwr-reg.yaml | 2 +- Documentation/devicetree/bindings/regulator/wlf,arizona.yaml | 2 ++ 10 files changed, 17 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/regulator/mps,mp5416.yaml b/Documentation/devicetree/bindings/regulator/mps,mp5416.yaml index 2e720d152890..0221397eb51e 100644 --- a/Documentation/devicetree/bindings/regulator/mps,mp5416.yaml +++ b/Documentation/devicetree/bindings/regulator/mps,mp5416.yaml @@ -29,10 +29,12 @@ properties: patternProperties: "^buck[1-4]$": $ref: regulator.yaml# + unevaluatedProperties: false type: object "^ldo[1-4]$": $ref: regulator.yaml# + unevaluatedProperties: false type: object additionalProperties: false diff --git a/Documentation/devicetree/bindings/regulator/mps,mpq7920.yaml b/Documentation/devicetree/bindings/regulator/mps,mpq7920.yaml index 019c60942efc..6de5b027f990 100644 --- a/Documentation/devicetree/bindings/regulator/mps,mpq7920.yaml +++ b/Documentation/devicetree/bindings/regulator/mps,mpq7920.yaml @@ -38,11 +38,13 @@ properties: ldortc: type: object $ref: regulator.yaml# + unevaluatedProperties: false patternProperties: "^ldo[1-4]$": type: object $ref: regulator.yaml# + unevaluatedProperties: false "^buck[1-4]$": type: object diff --git a/Documentation/devicetree/bindings/regulator/pfuze100.yaml b/Documentation/devicetree/bindings/regulator/pfuze100.yaml index e384e4953f0a..0eda44752cdd 100644 --- a/Documentation/devicetree/bindings/regulator/pfuze100.yaml +++ b/Documentation/devicetree/bindings/regulator/pfuze100.yaml @@ -68,18 +68,22 @@ properties: "^sw([1-4]|[1-4][a-c]|[1-4][a-c][a-c])$": $ref: regulator.yaml# type: object + unevaluatedProperties: false "^vgen[1-6]$": $ref: regulator.yaml# type: object + unevaluatedProperties: false "^vldo[1-4]$": $ref: regulator.yaml# type: object + unevaluatedProperties: false "^(vsnvs|vref|vrefddr|swbst|coin|v33|vccsd)$": $ref: regulator.yaml# type: object + unevaluatedProperties: false additionalProperties: false diff --git a/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml index 72b533c3761a..e758093365bc 100644 --- a/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml @@ -111,6 +111,7 @@ properties: bob: type: object $ref: regulator.yaml# + unevaluatedProperties: false description: BOB regulator node. dependencies: regulator-allow-set-load: [ regulator-allowed-modes ] @@ -119,6 +120,7 @@ patternProperties: "^(smps|ldo|lvs|bob)[0-9]+$": type: object $ref: regulator.yaml# + unevaluatedProperties: false description: smps/ldo regulator nodes(s). dependencies: regulator-allow-set-load: [ regulator-allowed-modes ] diff --git a/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml index a8ca8e0b27f8..9ea8ac0786ac 100644 --- a/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml @@ -110,6 +110,7 @@ patternProperties: "^((s|l|lvs|5vs)[0-9]*)|(boost-bypass)|(bob)$": description: List of regulators and its properties $ref: regulator.yaml# + unevaluatedProperties: false additionalProperties: false diff --git a/Documentation/devicetree/bindings/regulator/richtek,rt4831-regulator.yaml b/Documentation/devicetree/bindings/regulator/richtek,rt4831-regulator.yaml index d9c23333e157..cd06e957b9db 100644 --- a/Documentation/devicetree/bindings/regulator/richtek,rt4831-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/richtek,rt4831-regulator.yaml @@ -29,6 +29,7 @@ patternProperties: "^DSV(LCM|P|N)$": type: object $ref: regulator.yaml# + unevaluatedProperties: false description: Properties for single Display Bias Voltage regulator. diff --git a/Documentation/devicetree/bindings/regulator/richtek,rtmv20-regulator.yaml b/Documentation/devicetree/bindings/regulator/richtek,rtmv20-regulator.yaml index 446ec5127d1f..fec3d396ca50 100644 --- a/Documentation/devicetree/bindings/regulator/richtek,rtmv20-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/richtek,rtmv20-regulator.yaml @@ -121,6 +121,7 @@ properties: description: load switch current regulator description. type: object $ref: regulator.yaml# + unevaluatedProperties: false required: - compatible diff --git a/Documentation/devicetree/bindings/regulator/richtek,rtq6752-regulator.yaml b/Documentation/devicetree/bindings/regulator/richtek,rtq6752-regulator.yaml index e6e5a9a7d940..ef62c618de67 100644 --- a/Documentation/devicetree/bindings/regulator/richtek,rtq6752-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/richtek,rtq6752-regulator.yaml @@ -35,6 +35,7 @@ properties: "^(p|n)avdd$": type: object $ref: regulator.yaml# + unevaluatedProperties: false description: | regulator description for pavdd and navdd. diff --git a/Documentation/devicetree/bindings/regulator/st,stm32mp1-pwr-reg.yaml b/Documentation/devicetree/bindings/regulator/st,stm32mp1-pwr-reg.yaml index 7d53cfa2c288..c9586d277f41 100644 --- a/Documentation/devicetree/bindings/regulator/st,stm32mp1-pwr-reg.yaml +++ b/Documentation/devicetree/bindings/regulator/st,stm32mp1-pwr-reg.yaml @@ -25,8 +25,8 @@ properties: patternProperties: "^(reg11|reg18|usb33)$": type: object - $ref: regulator.yaml# + unevaluatedProperties: false required: - compatible diff --git a/Documentation/devicetree/bindings/regulator/wlf,arizona.yaml b/Documentation/devicetree/bindings/regulator/wlf,arizona.yaml index 011819c10988..11e378648b3f 100644 --- a/Documentation/devicetree/bindings/regulator/wlf,arizona.yaml +++ b/Documentation/devicetree/bindings/regulator/wlf,arizona.yaml @@ -29,11 +29,13 @@ properties: Initial data for the LDO1 regulator. $ref: regulator.yaml# type: object + unevaluatedProperties: false micvdd: description: Initial data for the MICVDD regulator. $ref: regulator.yaml# type: object + unevaluatedProperties: false additionalProperties: true From 29a449e765ff70a5bd533be94babb6d36985d096 Mon Sep 17 00:00:00 2001 From: Zhang Shurong Date: Sat, 22 Jul 2023 23:49:09 +0800 Subject: [PATCH 193/656] spi: tegra20-sflash: fix to check return value of platform_get_irq() in tegra_sflash_probe() The platform_get_irq might be failed and return a negative result. So there should have an error handling code. Fixed this by adding an error handling code. Fixes: 8528547bcc33 ("spi: tegra: add spi driver for sflash controller") Signed-off-by: Zhang Shurong Link: https://lore.kernel.org/r/tencent_71FC162D589E4788C2152AAC84CD8D5C6D06@qq.com Signed-off-by: Mark Brown --- drivers/spi/spi-tegra20-sflash.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-tegra20-sflash.c b/drivers/spi/spi-tegra20-sflash.c index 4286310628a2..0c5507473f97 100644 --- a/drivers/spi/spi-tegra20-sflash.c +++ b/drivers/spi/spi-tegra20-sflash.c @@ -455,7 +455,11 @@ static int tegra_sflash_probe(struct platform_device *pdev) goto exit_free_master; } - tsd->irq = platform_get_irq(pdev, 0); + ret = platform_get_irq(pdev, 0); + if (ret < 0) + goto exit_free_master; + tsd->irq = ret; + ret = request_irq(tsd->irq, tegra_sflash_isr, 0, dev_name(&pdev->dev), tsd); if (ret < 0) { From 905c50cd15c1256a869b0a98da5025db0be89b9e Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Mon, 24 Jul 2023 19:13:15 +0300 Subject: [PATCH 194/656] gpio: ge: Add missing header Add missing platform_device.h that used to be implied by of_device.h. While at it, sort headers alphabetically for better maintenance. Reported-by: Randy Dunlap Fixes: e91d0f05e66a ("gpio: Explicitly include correct DT includes") Closes: https://lore.kernel.org/r/65b4ac1a-1128-6e2a-92c0-9bbcca4b760a@infradead.org Signed-off-by: Andy Shevchenko Reviewed-by: Rob Herring Acked-by: Randy Dunlap Tested-by: Randy Dunlap # build-tested Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-ge.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/gpio/gpio-ge.c b/drivers/gpio/gpio-ge.c index 4eecbc862abc..ecadb81ce7f8 100644 --- a/drivers/gpio/gpio-ge.c +++ b/drivers/gpio/gpio-ge.c @@ -17,13 +17,14 @@ * the I/O interrupt controllers mask to stop them propergating */ -#include -#include -#include -#include -#include -#include #include +#include +#include +#include +#include +#include +#include +#include #define GEF_GPIO_DIRECT 0x00 #define GEF_GPIO_IN 0x04 From 94484a7935161795b3d8ff0168684821083e8ddf Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Mon, 24 Jul 2023 19:13:16 +0300 Subject: [PATCH 195/656] gpio: ge: Fix English spelling and grammar Fix English spelling and grammar in the comments. While at it, fix the MODULE_AUTHOR() email address format. Reported-by: Randy Dunlap Closes: https://lore.kernel.org/r/65b4ac1a-1128-6e2a-92c0-9bbcca4b760a@infradead.org Signed-off-by: Andy Shevchenko Acked-by: Randy Dunlap Tested-by: Randy Dunlap # build-tested Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-ge.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/gpio/gpio-ge.c b/drivers/gpio/gpio-ge.c index ecadb81ce7f8..f92b3c8a3a8a 100644 --- a/drivers/gpio/gpio-ge.c +++ b/drivers/gpio/gpio-ge.c @@ -10,11 +10,12 @@ * kind, whether express or implied. */ -/* TODO +/* + * TODO: * - * Configuration of output modes (totem-pole/open-drain) - * Interrupt configuration - interrupts are always generated the FPGA relies on - * the I/O interrupt controllers mask to stop them propergating + * Configuration of output modes (totem-pole/open-drain). + * Interrupt configuration - interrupts are always generated, the FPGA relies + * on the I/O interrupt controllers mask to stop them from being propagated. */ #include @@ -104,5 +105,5 @@ static struct platform_driver gef_gpio_driver = { module_platform_driver_probe(gef_gpio_driver, gef_gpio_probe); MODULE_DESCRIPTION("GE I/O FPGA GPIO driver"); -MODULE_AUTHOR("Martyn Welch "); MODULE_LICENSE("GPL"); From 0cf2b4f550fd6e2e7378a9f13a216a784ebcd7c0 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Mon, 24 Jul 2023 19:13:17 +0300 Subject: [PATCH 196/656] gpio: ge: Make driver OF-independent There is nothing in the driver that requires OF APIs, make the driver OF independent. Signed-off-by: Andy Shevchenko Acked-by: Randy Dunlap Tested-by: Randy Dunlap # build-tested Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-ge.c | 33 +++++++++++++-------------------- 1 file changed, 13 insertions(+), 20 deletions(-) diff --git a/drivers/gpio/gpio-ge.c b/drivers/gpio/gpio-ge.c index f92b3c8a3a8a..d019669048e6 100644 --- a/drivers/gpio/gpio-ge.c +++ b/drivers/gpio/gpio-ge.c @@ -21,10 +21,10 @@ #include #include #include +#include #include -#include -#include #include +#include #include #define GEF_GPIO_DIRECT 0x00 @@ -54,6 +54,7 @@ MODULE_DEVICE_TABLE(of, gef_gpio_ids); static int __init gef_gpio_probe(struct platform_device *pdev) { + struct device *dev = &pdev->dev; struct gpio_chip *gc; void __iomem *regs; int ret; @@ -62,38 +63,30 @@ static int __init gef_gpio_probe(struct platform_device *pdev) if (!gc) return -ENOMEM; - regs = of_iomap(pdev->dev.of_node, 0); - if (!regs) - return -ENOMEM; + regs = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(regs)) + return PTR_ERR(regs); ret = bgpio_init(gc, &pdev->dev, 4, regs + GEF_GPIO_IN, regs + GEF_GPIO_OUT, NULL, NULL, regs + GEF_GPIO_DIRECT, BGPIOF_BIG_ENDIAN_BYTE_ORDER); - if (ret) { - dev_err(&pdev->dev, "bgpio_init failed\n"); - goto err0; - } + if (ret) + return dev_err_probe(dev, ret, "bgpio_init failed\n"); /* Setup pointers to chip functions */ - gc->label = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%pOF", pdev->dev.of_node); - if (!gc->label) { - ret = -ENOMEM; - goto err0; - } + gc->label = devm_kasprintf(dev, GFP_KERNEL, "%pfw", dev_fwnode(dev)); + if (!gc->label) + return -ENOMEM; gc->base = -1; - gc->ngpio = (u16)(uintptr_t)of_device_get_match_data(&pdev->dev); + gc->ngpio = (uintptr_t)device_get_match_data(dev); /* This function adds a memory mapped GPIO chip */ ret = devm_gpiochip_add_data(&pdev->dev, gc, NULL); if (ret) - goto err0; + return dev_err_probe(dev, ret, "GPIO chip registration failed\n"); return 0; -err0: - iounmap(regs); - pr_err("%pOF: GPIO chip registration failed\n", pdev->dev.of_node); - return ret; }; static struct platform_driver gef_gpio_driver = { From 806693e6cb8cb96349e482670cf0c82fe6359c4a Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Mon, 24 Jul 2023 19:13:18 +0300 Subject: [PATCH 197/656] gpio: ge: Utilise temporary variable for struct device We have a temporary variable to keep pointer to struct device. Utilise it inside the ->probe() implementation. Signed-off-by: Andy Shevchenko Acked-by: Randy Dunlap Tested-by: Randy Dunlap # build-tested Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-ge.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpio/gpio-ge.c b/drivers/gpio/gpio-ge.c index d019669048e6..268de5496fcb 100644 --- a/drivers/gpio/gpio-ge.c +++ b/drivers/gpio/gpio-ge.c @@ -59,7 +59,7 @@ static int __init gef_gpio_probe(struct platform_device *pdev) void __iomem *regs; int ret; - gc = devm_kzalloc(&pdev->dev, sizeof(*gc), GFP_KERNEL); + gc = devm_kzalloc(dev, sizeof(*gc), GFP_KERNEL); if (!gc) return -ENOMEM; @@ -67,9 +67,9 @@ static int __init gef_gpio_probe(struct platform_device *pdev) if (IS_ERR(regs)) return PTR_ERR(regs); - ret = bgpio_init(gc, &pdev->dev, 4, regs + GEF_GPIO_IN, - regs + GEF_GPIO_OUT, NULL, NULL, - regs + GEF_GPIO_DIRECT, BGPIOF_BIG_ENDIAN_BYTE_ORDER); + ret = bgpio_init(gc, dev, 4, regs + GEF_GPIO_IN, regs + GEF_GPIO_OUT, + NULL, NULL, regs + GEF_GPIO_DIRECT, + BGPIOF_BIG_ENDIAN_BYTE_ORDER); if (ret) return dev_err_probe(dev, ret, "bgpio_init failed\n"); @@ -82,7 +82,7 @@ static int __init gef_gpio_probe(struct platform_device *pdev) gc->ngpio = (uintptr_t)device_get_match_data(dev); /* This function adds a memory mapped GPIO chip */ - ret = devm_gpiochip_add_data(&pdev->dev, gc, NULL); + ret = devm_gpiochip_add_data(dev, gc, NULL); if (ret) return dev_err_probe(dev, ret, "GPIO chip registration failed\n"); From a13f5e77a510af20800829190a282dfe78c83787 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Mon, 24 Jul 2023 19:13:19 +0300 Subject: [PATCH 198/656] gpio: ge: Replace GPLv2 boilerplate with SPDX Replace the GPLv2 boilerplate text with a nice and short SPDX header. Signed-off-by: Andy Shevchenko Acked-by: Randy Dunlap Tested-by: Randy Dunlap # build-tested Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-ge.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/gpio/gpio-ge.c b/drivers/gpio/gpio-ge.c index 268de5496fcb..5dc49648d8e3 100644 --- a/drivers/gpio/gpio-ge.c +++ b/drivers/gpio/gpio-ge.c @@ -1,13 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * Driver for GE FPGA based GPIO * * Author: Martyn Welch * * 2008 (c) GE Intelligent Platforms Embedded Systems, Inc. - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. */ /* From 55b473538247550305abe0ae931d31249c6b1a47 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Mon, 24 Jul 2023 19:13:20 +0300 Subject: [PATCH 199/656] gpio: ge: Enable COMPILE_TEST for the driver Driver is so simple, yet there was a room for mistakes. Reduce their appearance in the future by enabling COMPILE_TEST option. Signed-off-by: Andy Shevchenko Acked-by: Randy Dunlap Tested-by: Randy Dunlap # build-tested Signed-off-by: Bartosz Golaszewski --- drivers/gpio/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 398d9ef7e680..8b41893bc5cd 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -283,7 +283,7 @@ config GPIO_EXAR config GPIO_GE_FPGA bool "GE FPGA based GPIO" - depends on GE_FPGA + depends on GE_FPGA || COMPILE_TEST select GPIO_GENERIC help Support for common GPIO functionality provided on some GE Single Board From 27d5a3cc2137f9e7bf03e4420ef01653d913d3b1 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Tue, 25 Jul 2023 18:23:30 +0800 Subject: [PATCH 200/656] dt-bindings: gpio: fsl-imx-gpio: support i.MX8QM/DXL Add i.MX8QM/DXL gpio compatible which is compatible with i.MX35. Signed-off-by: Peng Fan Acked-by: Krzysztof Kozlowski Signed-off-by: Bartosz Golaszewski --- Documentation/devicetree/bindings/gpio/fsl-imx-gpio.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/gpio/fsl-imx-gpio.yaml b/Documentation/devicetree/bindings/gpio/fsl-imx-gpio.yaml index ae18603697d7..d0ca2af89f1e 100644 --- a/Documentation/devicetree/bindings/gpio/fsl-imx-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/fsl-imx-gpio.yaml @@ -32,10 +32,12 @@ properties: - fsl,imx6sx-gpio - fsl,imx6ul-gpio - fsl,imx7d-gpio + - fsl,imx8dxl-gpio - fsl,imx8mm-gpio - fsl,imx8mn-gpio - fsl,imx8mp-gpio - fsl,imx8mq-gpio + - fsl,imx8qm-gpio - fsl,imx8qxp-gpio - fsl,imxrt1050-gpio - fsl,imxrt1170-gpio From 92f7a35836c2e13ae5f0dc8c7f889e92f66a9d19 Mon Sep 17 00:00:00 2001 From: William Breathitt Gray Date: Thu, 20 Jul 2023 14:49:43 -0400 Subject: [PATCH 201/656] gpio: 104-dio-48e: Add Counter/Timer support The 104-DIO-48E features an 8254 Counter/Timer chip providing three counter/timers which can be used for frequency measurement, frequency output, pulse width modulation, pulse width measurement, event count, etc. The counter/timers use the same addresses as PPI 0 (addresses 0x0 to 0x3), so a raw_spinlock_t is used to synchronize operations between the two regmap mappings to prevent clobbering. Reviewed-by: Linus Walleij Signed-off-by: William Breathitt Gray Signed-off-by: Bartosz Golaszewski --- drivers/gpio/Kconfig | 1 + drivers/gpio/gpio-104-dio-48e.c | 127 ++++++++++++++++++++++++++++---- 2 files changed, 112 insertions(+), 16 deletions(-) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 8b41893bc5cd..61a8d07e5a1c 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -858,6 +858,7 @@ config GPIO_104_DIO_48E select REGMAP_IRQ select GPIOLIB_IRQCHIP select GPIO_I8255 + select I8254 help Enables GPIO support for the ACCES 104-DIO-48E series (104-DIO-48E, 104-DIO-24E). The base port addresses for the devices may be diff --git a/drivers/gpio/gpio-104-dio-48e.c b/drivers/gpio/gpio-104-dio-48e.c index 8ff5f4ff5958..4df9becaf349 100644 --- a/drivers/gpio/gpio-104-dio-48e.c +++ b/drivers/gpio/gpio-104-dio-48e.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include @@ -16,6 +17,7 @@ #include #include #include +#include #include #include "gpio-i8255.h" @@ -37,6 +39,8 @@ MODULE_PARM_DESC(irq, "ACCES 104-DIO-48E interrupt line numbers"); #define DIO48E_ENABLE_INTERRUPT 0xB #define DIO48E_DISABLE_INTERRUPT DIO48E_ENABLE_INTERRUPT +#define DIO48E_ENABLE_COUNTER_TIMER_ADDRESSING 0xD +#define DIO48E_DISABLE_COUNTER_TIMER_ADDRESSING DIO48E_ENABLE_COUNTER_TIMER_ADDRESSING #define DIO48E_CLEAR_INTERRUPT 0xF #define DIO48E_NUM_PPI 2 @@ -75,18 +79,20 @@ static const struct regmap_access_table dio48e_precious_table = { .yes_ranges = dio48e_precious_ranges, .n_yes_ranges = ARRAY_SIZE(dio48e_precious_ranges), }; -static const struct regmap_config dio48e_regmap_config = { - .reg_bits = 8, - .reg_stride = 1, - .val_bits = 8, - .io_port = true, - .max_register = 0xF, - .wr_table = &dio48e_wr_table, - .rd_table = &dio48e_rd_table, - .volatile_table = &dio48e_volatile_table, - .precious_table = &dio48e_precious_table, - .cache_type = REGCACHE_FLAT, - .use_raw_spinlock = true, + +static const struct regmap_range pit_wr_ranges[] = { + regmap_reg_range(0x0, 0x3), +}; +static const struct regmap_range pit_rd_ranges[] = { + regmap_reg_range(0x0, 0x2), +}; +static const struct regmap_access_table pit_wr_table = { + .yes_ranges = pit_wr_ranges, + .n_yes_ranges = ARRAY_SIZE(pit_wr_ranges), +}; +static const struct regmap_access_table pit_rd_table = { + .yes_ranges = pit_rd_ranges, + .n_yes_ranges = ARRAY_SIZE(pit_rd_ranges), }; /* only bit 3 on each respective Port C supports interrupts */ @@ -102,14 +108,56 @@ static const struct regmap_irq dio48e_regmap_irqs[] = { /** * struct dio48e_gpio - GPIO device private data structure + * @lock: synchronization lock to prevent I/O race conditions * @map: Regmap for the device + * @regs: virtual mapping for device registers + * @flags: IRQ flags saved during locking * @irq_mask: Current IRQ mask state on the device */ struct dio48e_gpio { + raw_spinlock_t lock; struct regmap *map; + void __iomem *regs; + unsigned long flags; unsigned int irq_mask; }; +static void dio48e_regmap_lock(void *lock_arg) __acquires(&dio48egpio->lock) +{ + struct dio48e_gpio *const dio48egpio = lock_arg; + unsigned long flags; + + raw_spin_lock_irqsave(&dio48egpio->lock, flags); + dio48egpio->flags = flags; +} + +static void dio48e_regmap_unlock(void *lock_arg) __releases(&dio48egpio->lock) +{ + struct dio48e_gpio *const dio48egpio = lock_arg; + + raw_spin_unlock_irqrestore(&dio48egpio->lock, dio48egpio->flags); +} + +static void pit_regmap_lock(void *lock_arg) __acquires(&dio48egpio->lock) +{ + struct dio48e_gpio *const dio48egpio = lock_arg; + unsigned long flags; + + raw_spin_lock_irqsave(&dio48egpio->lock, flags); + dio48egpio->flags = flags; + + iowrite8(0x00, dio48egpio->regs + DIO48E_ENABLE_COUNTER_TIMER_ADDRESSING); +} + +static void pit_regmap_unlock(void *lock_arg) __releases(&dio48egpio->lock) +{ + struct dio48e_gpio *const dio48egpio = lock_arg; + + ioread8(dio48egpio->regs + DIO48E_DISABLE_COUNTER_TIMER_ADDRESSING); + + raw_spin_unlock_irqrestore(&dio48egpio->lock, dio48egpio->flags); +} + static int dio48e_handle_mask_sync(const int index, const unsigned int mask_buf_def, const unsigned int mask_buf, @@ -176,6 +224,9 @@ static int dio48e_probe(struct device *dev, unsigned int id) struct i8255_regmap_config config = {}; void __iomem *regs; struct regmap *map; + struct regmap_config dio48e_regmap_config; + struct regmap_config pit_regmap_config; + struct i8254_regmap_config pit_config; int err; struct regmap_irq_chip *chip; struct dio48e_gpio *dio48egpio; @@ -187,21 +238,58 @@ static int dio48e_probe(struct device *dev, unsigned int id) return -EBUSY; } + dio48egpio = devm_kzalloc(dev, sizeof(*dio48egpio), GFP_KERNEL); + if (!dio48egpio) + return -ENOMEM; + regs = devm_ioport_map(dev, base[id], DIO48E_EXTENT); if (!regs) return -ENOMEM; + dio48egpio->regs = regs; + + raw_spin_lock_init(&dio48egpio->lock); + + dio48e_regmap_config = (struct regmap_config) { + .reg_bits = 8, + .reg_stride = 1, + .val_bits = 8, + .lock = dio48e_regmap_lock, + .unlock = dio48e_regmap_unlock, + .lock_arg = dio48egpio, + .io_port = true, + .wr_table = &dio48e_wr_table, + .rd_table = &dio48e_rd_table, + .volatile_table = &dio48e_volatile_table, + .precious_table = &dio48e_precious_table, + .cache_type = REGCACHE_FLAT, + }; + map = devm_regmap_init_mmio(dev, regs, &dio48e_regmap_config); if (IS_ERR(map)) return dev_err_probe(dev, PTR_ERR(map), "Unable to initialize register map\n"); - dio48egpio = devm_kzalloc(dev, sizeof(*dio48egpio), GFP_KERNEL); - if (!dio48egpio) - return -ENOMEM; - dio48egpio->map = map; + pit_regmap_config = (struct regmap_config) { + .name = "i8254", + .reg_bits = 8, + .reg_stride = 1, + .val_bits = 8, + .lock = pit_regmap_lock, + .unlock = pit_regmap_unlock, + .lock_arg = dio48egpio, + .io_port = true, + .wr_table = &pit_wr_table, + .rd_table = &pit_rd_table, + }; + + pit_config.map = devm_regmap_init_mmio(dev, regs, &pit_regmap_config); + if (IS_ERR(pit_config.map)) + return dev_err_probe(dev, PTR_ERR(pit_config.map), + "Unable to initialize i8254 register map\n"); + chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL); if (!chip) return -ENOMEM; @@ -225,6 +313,12 @@ static int dio48e_probe(struct device *dev, unsigned int id) if (err) return dev_err_probe(dev, err, "IRQ registration failed\n"); + pit_config.parent = dev; + + err = devm_i8254_regmap_register(dev, &pit_config); + if (err) + return err; + config.parent = dev; config.map = map; config.num_ppi = DIO48E_NUM_PPI; @@ -245,3 +339,4 @@ module_isa_driver_with_irq(dio48e_driver, num_dio48e, num_irq); MODULE_AUTHOR("William Breathitt Gray "); MODULE_DESCRIPTION("ACCES 104-DIO-48E GPIO driver"); MODULE_LICENSE("GPL v2"); +MODULE_IMPORT_NS(I8254); From cfef69cbe3726c095f55769bd0e7c72f32bf5060 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 27 Jul 2023 10:54:34 +0200 Subject: [PATCH 202/656] regulator: dt-bindings: dlg,slg51000: Convert to DT schema Convert the bindings for Dialog Semiconductor SLG51000 Voltage Regulator to DT schema. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230727085434.16596-1-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown --- .../bindings/regulator/dlg,slg51000.yaml | 132 ++++++++++++++++++ .../bindings/regulator/slg51000.txt | 88 ------------ MAINTAINERS | 2 +- 3 files changed, 133 insertions(+), 89 deletions(-) create mode 100644 Documentation/devicetree/bindings/regulator/dlg,slg51000.yaml delete mode 100644 Documentation/devicetree/bindings/regulator/slg51000.txt diff --git a/Documentation/devicetree/bindings/regulator/dlg,slg51000.yaml b/Documentation/devicetree/bindings/regulator/dlg,slg51000.yaml new file mode 100644 index 000000000000..bad140418e49 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/dlg,slg51000.yaml @@ -0,0 +1,132 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/dlg,slg51000.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Dialog Semiconductor SLG51000 Voltage Regulator + +maintainers: + - Eric Jeong + - Support Opensource + +properties: + compatible: + const: dlg,slg51000 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + dlg,cs-gpios: + maxItems: 1 + description: + GPIO for chip select + + vin3-supply: + description: + Input supply for ldo3, required if regulator is enabled + + vin4-supply: + description: + Input supply for ldo4, required if regulator is enabled + + vin5-supply: + description: + Input supply for ldo5, required if regulator is enabled + + vin6-supply: + description: + Input supply for ldo6, required if regulator is enabled + + vin7-supply: + description: + Input supply for ldo7, required if regulator is enabled + + regulators: + type: object + additionalProperties: false + + patternProperties: + "^ldo[1-7]$": + type: object + $ref: /schemas/regulator/regulator.yaml# + unevaluatedProperties: false + + properties: + enable-gpios: + maxItems: 1 + + required: + - regulator-name + +required: + - compatible + - reg + - regulators + +additionalProperties: false + +examples: + - | + #include + #include + #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + + pmic@75 { + compatible = "dlg,slg51000"; + reg = <0x75>; + dlg,cs-gpios = <&tlmm 69 GPIO_ACTIVE_HIGH>; + vin5-supply = <&vreg_s1f_1p2>; + vin6-supply = <&vreg_s1f_1p2>; + + regulators { + ldo1 { + regulator-name = "slg51000_b_ldo1"; + regulator-min-microvolt = <2400000>; + regulator-max-microvolt = <3300000>; + }; + + ldo2 { + regulator-name = "slg51000_b_ldo2"; + regulator-min-microvolt = <2400000>; + regulator-max-microvolt = <3300000>; + }; + + ldo3 { + regulator-name = "slg51000_b_ldo3"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3750000>; + }; + + ldo4 { + regulator-name = "slg51000_b_ldo4"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3750000>; + }; + + ldo5 { + regulator-name = "slg51000_b_ldo5"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1200000>; + }; + + ldo6 { + regulator-name = "slg51000_b_ldo6"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1200000>; + }; + + ldo7 { + regulator-name = "slg51000_b_ldo7"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3750000>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/regulator/slg51000.txt b/Documentation/devicetree/bindings/regulator/slg51000.txt deleted file mode 100644 index aa0733e49b90..000000000000 --- a/Documentation/devicetree/bindings/regulator/slg51000.txt +++ /dev/null @@ -1,88 +0,0 @@ -* Dialog Semiconductor SLG51000 Voltage Regulator - -Required properties: -- compatible : Should be "dlg,slg51000" for SLG51000 -- reg : Specifies the I2C slave address. -- xxx-supply: Input voltage supply regulator for ldo3 to ldo7. - These entries are required if regulators are enabled for a device. - An absence of these properties can cause the regulator registration to fail. - If some of input supply is powered through battery or always-on supply then - also it is required to have these parameters with proper node handle of always - on power supply. - vin3-supply: Input supply for ldo3 - vin4-supply: Input supply for ldo4 - vin5-supply: Input supply for ldo5 - vin6-supply: Input supply for ldo6 - vin7-supply: Input supply for ldo7 - -Optional properties: -- interrupt-parent : Specifies the reference to the interrupt controller. -- interrupts : IRQ line information. -- dlg,cs-gpios : Specify a valid GPIO for chip select - -Sub-nodes: -- regulators : This node defines the settings for the regulators. - The content of the sub-node is defined by the standard binding - for regulators; see regulator.txt. - - The SLG51000 regulators are bound using their names listed below: - ldo1 - ldo2 - ldo3 - ldo4 - ldo5 - ldo6 - ldo7 - -Optional properties for regulators: -- enable-gpios : Specify a valid GPIO for platform control of the regulator. - -Example: - pmic: slg51000@75 { - compatible = "dlg,slg51000"; - reg = <0x75>; - - regulators { - ldo1 { - regulator-name = "ldo1"; - regulator-min-microvolt = <2400000>; - regulator-max-microvolt = <3300000>; - }; - - ldo2 { - regulator-name = "ldo2"; - regulator-min-microvolt = <2400000>; - regulator-max-microvolt = <3300000>; - }; - - ldo3 { - regulator-name = "ldo3"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <3750000>; - }; - - ldo4 { - regulator-name = "ldo4"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <3750000>; - }; - - ldo5 { - regulator-name = "ldo5"; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1200000>; - }; - - ldo6 { - regulator-name = "ldo6"; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1200000>; - }; - - ldo7 { - regulator-name = "ldo7"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <3750000>; - }; - }; - }; diff --git a/MAINTAINERS b/MAINTAINERS index d516295978a4..7ff9b94ac3ba 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6010,7 +6010,7 @@ F: Documentation/devicetree/bindings/mfd/da90*.txt F: Documentation/devicetree/bindings/mfd/dlg,da90*.yaml F: Documentation/devicetree/bindings/regulator/da92*.txt F: Documentation/devicetree/bindings/regulator/dlg,da9*.yaml -F: Documentation/devicetree/bindings/regulator/slg51000.txt +F: Documentation/devicetree/bindings/regulator/dlg,slg51000.yaml F: Documentation/devicetree/bindings/sound/da[79]*.txt F: Documentation/devicetree/bindings/thermal/da90??-thermal.txt F: Documentation/devicetree/bindings/watchdog/da90??-wdt.txt From b505e2ecf31b6a2a62c76203558384d7646ab02f Mon Sep 17 00:00:00 2001 From: Ruan Jinjie Date: Thu, 27 Jul 2023 11:05:58 +0000 Subject: [PATCH 203/656] spi: stm32: Remove redundant dev_err_probe() There is no need to call the dev_err_probe() function directly to print a custom message when handling an error from platform_get_irq() function as it is going to display an appropriate error message in case of a failure. Signed-off-by: Ruan Jinjie Link: https://lore.kernel.org/r/20230727110558.2904084-1-ruanjinjie@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-stm32.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/spi/spi-stm32.c b/drivers/spi/spi-stm32.c index 8cf7b41481b2..d16ee6e54de9 100644 --- a/drivers/spi/spi-stm32.c +++ b/drivers/spi/spi-stm32.c @@ -1836,8 +1836,7 @@ static int stm32_spi_probe(struct platform_device *pdev) spi->irq = platform_get_irq(pdev, 0); if (spi->irq <= 0) - return dev_err_probe(&pdev->dev, spi->irq, - "failed to get irq\n"); + return spi->irq; ret = devm_request_threaded_irq(&pdev->dev, spi->irq, spi->cfg->irq_handler_event, From b2b561757027ef03b1243c828820a9004458194c Mon Sep 17 00:00:00 2001 From: Chen Jiahao Date: Thu, 27 Jul 2023 21:16:35 +0800 Subject: [PATCH 204/656] spi: s3c64xx: Clean up redundant dev_err_probe() Referring to platform_get_irq()'s definition, the return value has already been checked if ret < 0, and printed via dev_err_probe(). Calling dev_err_probe() one more time outside platform_get_irq() is obviously redundant. Removing dev_err_probe() outside platform_get_irq() to clean up above problem. Signed-off-by: Chen Jiahao Reviewed-by: Andi Shyti Link: https://lore.kernel.org/r/20230727131635.2898051-1-chenjiahao16@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-s3c64xx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c index a1b68fdc205d..bf7cb18be9dc 100644 --- a/drivers/spi/spi-s3c64xx.c +++ b/drivers/spi/spi-s3c64xx.c @@ -1167,7 +1167,7 @@ static int s3c64xx_spi_probe(struct platform_device *pdev) irq = platform_get_irq(pdev, 0); if (irq < 0) - return dev_err_probe(&pdev->dev, irq, "Failed to get IRQ\n"); + return irq; master = devm_spi_alloc_master(&pdev->dev, sizeof(*sdd)); if (!master) From e22471c2331c984ba48e89acd00d0ba1f60a3ea7 Mon Sep 17 00:00:00 2001 From: Jia Jie Ho Date: Mon, 17 Jul 2023 12:03:02 +0800 Subject: [PATCH 205/656] crypto: starfive - Add AES skcipher and aead support Adding AES skcipher and aead support to Starfive crypto module. Skcipher modes of operation include ecb, cbc, ctr, ofb, cfb. Aead modes include ccm and gcm. v1->v2: - Add include interrupt.h to fix compile error. (Herbert) Co-developed-by: Huan Feng Signed-off-by: Huan Feng Signed-off-by: Jia Jie Ho Signed-off-by: Herbert Xu --- drivers/crypto/starfive/Kconfig | 2 + drivers/crypto/starfive/Makefile | 2 +- drivers/crypto/starfive/jh7110-aes.c | 1034 +++++++++++++++++++++++++ drivers/crypto/starfive/jh7110-cryp.c | 36 +- drivers/crypto/starfive/jh7110-cryp.h | 65 ++ 5 files changed, 1132 insertions(+), 7 deletions(-) create mode 100644 drivers/crypto/starfive/jh7110-aes.c diff --git a/drivers/crypto/starfive/Kconfig b/drivers/crypto/starfive/Kconfig index df745fcb09df..2cb192502c1b 100644 --- a/drivers/crypto/starfive/Kconfig +++ b/drivers/crypto/starfive/Kconfig @@ -12,6 +12,8 @@ config CRYPTO_DEV_JH7110 select CRYPTO_SHA512 select CRYPTO_SM3_GENERIC select CRYPTO_RSA + select CRYPTO_AES + select CRYPTO_CCM help Support for StarFive JH7110 crypto hardware acceleration engine. This module provides acceleration for public key algo, diff --git a/drivers/crypto/starfive/Makefile b/drivers/crypto/starfive/Makefile index 98b01d2f1ccf..8c137afe58ad 100644 --- a/drivers/crypto/starfive/Makefile +++ b/drivers/crypto/starfive/Makefile @@ -1,4 +1,4 @@ # SPDX-License-Identifier: GPL-2.0 obj-$(CONFIG_CRYPTO_DEV_JH7110) += jh7110-crypto.o -jh7110-crypto-objs := jh7110-cryp.o jh7110-hash.o jh7110-rsa.o +jh7110-crypto-objs := jh7110-cryp.o jh7110-hash.o jh7110-rsa.o jh7110-aes.o diff --git a/drivers/crypto/starfive/jh7110-aes.c b/drivers/crypto/starfive/jh7110-aes.c new file mode 100644 index 000000000000..04dd7958054f --- /dev/null +++ b/drivers/crypto/starfive/jh7110-aes.c @@ -0,0 +1,1034 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * StarFive AES acceleration driver + * + * Copyright (c) 2022 StarFive Technology + */ + +#include +#include +#include +#include +#include +#include "jh7110-cryp.h" + +#define STARFIVE_AES_REGS_OFFSET 0x100 +#define STARFIVE_AES_AESDIO0R (STARFIVE_AES_REGS_OFFSET + 0x0) +#define STARFIVE_AES_KEY0 (STARFIVE_AES_REGS_OFFSET + 0x4) +#define STARFIVE_AES_KEY1 (STARFIVE_AES_REGS_OFFSET + 0x8) +#define STARFIVE_AES_KEY2 (STARFIVE_AES_REGS_OFFSET + 0xC) +#define STARFIVE_AES_KEY3 (STARFIVE_AES_REGS_OFFSET + 0x10) +#define STARFIVE_AES_KEY4 (STARFIVE_AES_REGS_OFFSET + 0x14) +#define STARFIVE_AES_KEY5 (STARFIVE_AES_REGS_OFFSET + 0x18) +#define STARFIVE_AES_KEY6 (STARFIVE_AES_REGS_OFFSET + 0x1C) +#define STARFIVE_AES_KEY7 (STARFIVE_AES_REGS_OFFSET + 0x20) +#define STARFIVE_AES_CSR (STARFIVE_AES_REGS_OFFSET + 0x24) +#define STARFIVE_AES_IV0 (STARFIVE_AES_REGS_OFFSET + 0x28) +#define STARFIVE_AES_IV1 (STARFIVE_AES_REGS_OFFSET + 0x2C) +#define STARFIVE_AES_IV2 (STARFIVE_AES_REGS_OFFSET + 0x30) +#define STARFIVE_AES_IV3 (STARFIVE_AES_REGS_OFFSET + 0x34) +#define STARFIVE_AES_NONCE0 (STARFIVE_AES_REGS_OFFSET + 0x3C) +#define STARFIVE_AES_NONCE1 (STARFIVE_AES_REGS_OFFSET + 0x40) +#define STARFIVE_AES_NONCE2 (STARFIVE_AES_REGS_OFFSET + 0x44) +#define STARFIVE_AES_NONCE3 (STARFIVE_AES_REGS_OFFSET + 0x48) +#define STARFIVE_AES_ALEN0 (STARFIVE_AES_REGS_OFFSET + 0x4C) +#define STARFIVE_AES_ALEN1 (STARFIVE_AES_REGS_OFFSET + 0x50) +#define STARFIVE_AES_MLEN0 (STARFIVE_AES_REGS_OFFSET + 0x54) +#define STARFIVE_AES_MLEN1 (STARFIVE_AES_REGS_OFFSET + 0x58) +#define STARFIVE_AES_IVLEN (STARFIVE_AES_REGS_OFFSET + 0x5C) + +#define FLG_MODE_MASK GENMASK(2, 0) +#define FLG_ENCRYPT BIT(4) + +/* Misc */ +#define CCM_B0_ADATA 0x40 +#define AES_BLOCK_32 (AES_BLOCK_SIZE / sizeof(u32)) + +static inline int starfive_aes_wait_busy(struct starfive_cryp_dev *cryp) +{ + u32 status; + + return readl_relaxed_poll_timeout(cryp->base + STARFIVE_AES_CSR, status, + !(status & STARFIVE_AES_BUSY), 10, 100000); +} + +static inline int starfive_aes_wait_keydone(struct starfive_cryp_dev *cryp) +{ + u32 status; + + return readl_relaxed_poll_timeout(cryp->base + STARFIVE_AES_CSR, status, + (status & STARFIVE_AES_KEY_DONE), 10, 100000); +} + +static inline int starfive_aes_wait_gcmdone(struct starfive_cryp_dev *cryp) +{ + u32 status; + + return readl_relaxed_poll_timeout(cryp->base + STARFIVE_AES_CSR, status, + (status & STARFIVE_AES_GCM_DONE), 10, 100000); +} + +static inline int is_gcm(struct starfive_cryp_dev *cryp) +{ + return (cryp->flags & FLG_MODE_MASK) == STARFIVE_AES_MODE_GCM; +} + +static inline int is_encrypt(struct starfive_cryp_dev *cryp) +{ + return cryp->flags & FLG_ENCRYPT; +} + +static void starfive_aes_aead_hw_start(struct starfive_cryp_ctx *ctx, u32 hw_mode) +{ + struct starfive_cryp_dev *cryp = ctx->cryp; + unsigned int value; + + switch (hw_mode) { + case STARFIVE_AES_MODE_GCM: + value = readl(ctx->cryp->base + STARFIVE_AES_CSR); + value |= STARFIVE_AES_GCM_START; + writel(value, cryp->base + STARFIVE_AES_CSR); + starfive_aes_wait_gcmdone(cryp); + break; + case STARFIVE_AES_MODE_CCM: + value = readl(ctx->cryp->base + STARFIVE_AES_CSR); + value |= STARFIVE_AES_CCM_START; + writel(value, cryp->base + STARFIVE_AES_CSR); + break; + } +} + +static inline void starfive_aes_set_ivlen(struct starfive_cryp_ctx *ctx) +{ + struct starfive_cryp_dev *cryp = ctx->cryp; + + if (is_gcm(cryp)) + writel(GCM_AES_IV_SIZE, cryp->base + STARFIVE_AES_IVLEN); + else + writel(AES_BLOCK_SIZE, cryp->base + STARFIVE_AES_IVLEN); +} + +static inline void starfive_aes_set_alen(struct starfive_cryp_ctx *ctx) +{ + struct starfive_cryp_dev *cryp = ctx->cryp; + + writel(upper_32_bits(cryp->assoclen), cryp->base + STARFIVE_AES_ALEN0); + writel(lower_32_bits(cryp->assoclen), cryp->base + STARFIVE_AES_ALEN1); +} + +static inline void starfive_aes_set_mlen(struct starfive_cryp_ctx *ctx) +{ + struct starfive_cryp_dev *cryp = ctx->cryp; + + writel(upper_32_bits(cryp->total_in), cryp->base + STARFIVE_AES_MLEN0); + writel(lower_32_bits(cryp->total_in), cryp->base + STARFIVE_AES_MLEN1); +} + +static inline int starfive_aes_ccm_check_iv(const u8 *iv) +{ + /* 2 <= L <= 8, so 1 <= L' <= 7. */ + if (iv[0] < 1 || iv[0] > 7) + return -EINVAL; + + return 0; +} + +static int starfive_aes_write_iv(struct starfive_cryp_ctx *ctx, u32 *iv) +{ + struct starfive_cryp_dev *cryp = ctx->cryp; + + writel(iv[0], cryp->base + STARFIVE_AES_IV0); + writel(iv[1], cryp->base + STARFIVE_AES_IV1); + writel(iv[2], cryp->base + STARFIVE_AES_IV2); + + if (is_gcm(cryp)) { + if (starfive_aes_wait_gcmdone(cryp)) + return -ETIMEDOUT; + + return 0; + } + + writel(iv[3], cryp->base + STARFIVE_AES_IV3); + + return 0; +} + +static inline void starfive_aes_get_iv(struct starfive_cryp_dev *cryp, u32 *iv) +{ + iv[0] = readl(cryp->base + STARFIVE_AES_IV0); + iv[1] = readl(cryp->base + STARFIVE_AES_IV1); + iv[2] = readl(cryp->base + STARFIVE_AES_IV2); + iv[3] = readl(cryp->base + STARFIVE_AES_IV3); +} + +static inline void starfive_aes_write_nonce(struct starfive_cryp_ctx *ctx, u32 *nonce) +{ + struct starfive_cryp_dev *cryp = ctx->cryp; + + writel(nonce[0], cryp->base + STARFIVE_AES_NONCE0); + writel(nonce[1], cryp->base + STARFIVE_AES_NONCE1); + writel(nonce[2], cryp->base + STARFIVE_AES_NONCE2); + writel(nonce[3], cryp->base + STARFIVE_AES_NONCE3); +} + +static int starfive_aes_write_key(struct starfive_cryp_ctx *ctx) +{ + struct starfive_cryp_dev *cryp = ctx->cryp; + u32 *key = (u32 *)ctx->key; + + if (ctx->keylen >= AES_KEYSIZE_128) { + writel(key[0], cryp->base + STARFIVE_AES_KEY0); + writel(key[1], cryp->base + STARFIVE_AES_KEY1); + writel(key[2], cryp->base + STARFIVE_AES_KEY2); + writel(key[3], cryp->base + STARFIVE_AES_KEY3); + } + + if (ctx->keylen >= AES_KEYSIZE_192) { + writel(key[4], cryp->base + STARFIVE_AES_KEY4); + writel(key[5], cryp->base + STARFIVE_AES_KEY5); + } + + if (ctx->keylen >= AES_KEYSIZE_256) { + writel(key[6], cryp->base + STARFIVE_AES_KEY6); + writel(key[7], cryp->base + STARFIVE_AES_KEY7); + } + + if (starfive_aes_wait_keydone(cryp)) + return -ETIMEDOUT; + + return 0; +} + +static int starfive_aes_ccm_init(struct starfive_cryp_ctx *ctx) +{ + struct starfive_cryp_dev *cryp = ctx->cryp; + u8 iv[AES_BLOCK_SIZE], b0[AES_BLOCK_SIZE]; + unsigned int textlen; + + memcpy(iv, cryp->req.areq->iv, AES_BLOCK_SIZE); + memset(iv + AES_BLOCK_SIZE - 1 - iv[0], 0, iv[0] + 1); + + /* Build B0 */ + memcpy(b0, iv, AES_BLOCK_SIZE); + + b0[0] |= (8 * ((cryp->authsize - 2) / 2)); + + if (cryp->assoclen) + b0[0] |= CCM_B0_ADATA; + + textlen = cryp->total_in; + + b0[AES_BLOCK_SIZE - 2] = textlen >> 8; + b0[AES_BLOCK_SIZE - 1] = textlen & 0xFF; + + starfive_aes_write_nonce(ctx, (u32 *)b0); + + return 0; +} + +static int starfive_aes_hw_init(struct starfive_cryp_ctx *ctx) +{ + struct starfive_cryp_request_ctx *rctx = ctx->rctx; + struct starfive_cryp_dev *cryp = ctx->cryp; + u32 hw_mode; + + /* reset */ + rctx->csr.aes.v = 0; + rctx->csr.aes.aesrst = 1; + writel(rctx->csr.aes.v, cryp->base + STARFIVE_AES_CSR); + + /* csr setup */ + hw_mode = cryp->flags & FLG_MODE_MASK; + + rctx->csr.aes.v = 0; + + switch (ctx->keylen) { + case AES_KEYSIZE_128: + rctx->csr.aes.keymode = STARFIVE_AES_KEYMODE_128; + break; + case AES_KEYSIZE_192: + rctx->csr.aes.keymode = STARFIVE_AES_KEYMODE_192; + break; + case AES_KEYSIZE_256: + rctx->csr.aes.keymode = STARFIVE_AES_KEYMODE_256; + break; + } + + rctx->csr.aes.mode = hw_mode; + rctx->csr.aes.cmode = !is_encrypt(cryp); + rctx->csr.aes.ie = 1; + + if (hw_mode == STARFIVE_AES_MODE_CFB || + hw_mode == STARFIVE_AES_MODE_OFB) + rctx->csr.aes.stmode = STARFIVE_AES_MODE_XFB_128; + else + rctx->csr.aes.stmode = STARFIVE_AES_MODE_XFB_1; + + if (cryp->side_chan) { + rctx->csr.aes.delay_aes = 1; + rctx->csr.aes.vaes_start = 1; + } + + writel(rctx->csr.aes.v, cryp->base + STARFIVE_AES_CSR); + + cryp->err = starfive_aes_write_key(ctx); + if (cryp->err) + return cryp->err; + + switch (hw_mode) { + case STARFIVE_AES_MODE_GCM: + starfive_aes_set_alen(ctx); + starfive_aes_set_mlen(ctx); + starfive_aes_set_ivlen(ctx); + starfive_aes_aead_hw_start(ctx, hw_mode); + starfive_aes_write_iv(ctx, (void *)cryp->req.areq->iv); + break; + case STARFIVE_AES_MODE_CCM: + starfive_aes_set_alen(ctx); + starfive_aes_set_mlen(ctx); + starfive_aes_ccm_init(ctx); + starfive_aes_aead_hw_start(ctx, hw_mode); + break; + case STARFIVE_AES_MODE_OFB: + case STARFIVE_AES_MODE_CFB: + case STARFIVE_AES_MODE_CBC: + case STARFIVE_AES_MODE_CTR: + starfive_aes_write_iv(ctx, (void *)cryp->req.sreq->iv); + break; + default: + break; + } + + return cryp->err; +} + +static int starfive_aes_read_authtag(struct starfive_cryp_dev *cryp) +{ + int i, start_addr; + + if (starfive_aes_wait_busy(cryp)) + return dev_err_probe(cryp->dev, -ETIMEDOUT, + "Timeout waiting for tag generation."); + + start_addr = STARFIVE_AES_NONCE0; + + if (is_gcm(cryp)) + for (i = 0; i < AES_BLOCK_32; i++, start_addr += 4) + cryp->tag_out[i] = readl(cryp->base + start_addr); + else + for (i = 0; i < AES_BLOCK_32; i++) + cryp->tag_out[i] = readl(cryp->base + STARFIVE_AES_AESDIO0R); + + if (is_encrypt(cryp)) { + scatterwalk_copychunks(cryp->tag_out, &cryp->out_walk, cryp->authsize, 1); + } else { + scatterwalk_copychunks(cryp->tag_in, &cryp->in_walk, cryp->authsize, 0); + + if (crypto_memneq(cryp->tag_in, cryp->tag_out, cryp->authsize)) + return dev_err_probe(cryp->dev, -EBADMSG, "Failed tag verification\n"); + } + + return 0; +} + +static void starfive_aes_finish_req(struct starfive_cryp_dev *cryp) +{ + union starfive_aes_csr csr; + int err = cryp->err; + + if (!err && cryp->authsize) + err = starfive_aes_read_authtag(cryp); + + if (!err && ((cryp->flags & FLG_MODE_MASK) == STARFIVE_AES_MODE_CBC || + (cryp->flags & FLG_MODE_MASK) == STARFIVE_AES_MODE_CTR)) + starfive_aes_get_iv(cryp, (void *)cryp->req.sreq->iv); + + /* reset irq flags*/ + csr.v = 0; + csr.aesrst = 1; + writel(csr.v, cryp->base + STARFIVE_AES_CSR); + + if (cryp->authsize) + crypto_finalize_aead_request(cryp->engine, cryp->req.areq, err); + else + crypto_finalize_skcipher_request(cryp->engine, cryp->req.sreq, + err); +} + +void starfive_aes_done_task(unsigned long param) +{ + struct starfive_cryp_dev *cryp = (struct starfive_cryp_dev *)param; + u32 block[AES_BLOCK_32]; + u32 stat; + int i; + + for (i = 0; i < AES_BLOCK_32; i++) + block[i] = readl(cryp->base + STARFIVE_AES_AESDIO0R); + + scatterwalk_copychunks(block, &cryp->out_walk, min_t(size_t, AES_BLOCK_SIZE, + cryp->total_out), 1); + + cryp->total_out -= min_t(size_t, AES_BLOCK_SIZE, cryp->total_out); + + if (!cryp->total_out) { + starfive_aes_finish_req(cryp); + return; + } + + memset(block, 0, AES_BLOCK_SIZE); + scatterwalk_copychunks(block, &cryp->in_walk, min_t(size_t, AES_BLOCK_SIZE, + cryp->total_in), 0); + cryp->total_in -= min_t(size_t, AES_BLOCK_SIZE, cryp->total_in); + + for (i = 0; i < AES_BLOCK_32; i++) + writel(block[i], cryp->base + STARFIVE_AES_AESDIO0R); + + stat = readl(cryp->base + STARFIVE_IE_MASK_OFFSET); + stat &= ~STARFIVE_IE_MASK_AES_DONE; + writel(stat, cryp->base + STARFIVE_IE_MASK_OFFSET); +} + +static int starfive_aes_gcm_write_adata(struct starfive_cryp_ctx *ctx) +{ + struct starfive_cryp_dev *cryp = ctx->cryp; + struct starfive_cryp_request_ctx *rctx = ctx->rctx; + u32 *buffer; + int total_len, loop; + + total_len = ALIGN(cryp->assoclen, AES_BLOCK_SIZE) / sizeof(unsigned int); + buffer = (u32 *)rctx->adata; + + for (loop = 0; loop < total_len; loop += 4) { + writel(*buffer, cryp->base + STARFIVE_AES_NONCE0); + buffer++; + writel(*buffer, cryp->base + STARFIVE_AES_NONCE1); + buffer++; + writel(*buffer, cryp->base + STARFIVE_AES_NONCE2); + buffer++; + writel(*buffer, cryp->base + STARFIVE_AES_NONCE3); + buffer++; + } + + if (starfive_aes_wait_gcmdone(cryp)) + return dev_err_probe(cryp->dev, -ETIMEDOUT, + "Timeout processing gcm aad block"); + + return 0; +} + +static int starfive_aes_ccm_write_adata(struct starfive_cryp_ctx *ctx) +{ + struct starfive_cryp_dev *cryp = ctx->cryp; + struct starfive_cryp_request_ctx *rctx = ctx->rctx; + u32 *buffer; + u8 *ci; + int total_len, loop; + + total_len = cryp->assoclen; + + ci = rctx->adata; + writeb(*ci, cryp->base + STARFIVE_AES_AESDIO0R); + ci++; + writeb(*ci, cryp->base + STARFIVE_AES_AESDIO0R); + ci++; + total_len -= 2; + buffer = (u32 *)ci; + + for (loop = 0; loop < 3; loop++, buffer++) + writel(*buffer, cryp->base + STARFIVE_AES_AESDIO0R); + + total_len -= 12; + + while (total_len > 0) { + for (loop = 0; loop < AES_BLOCK_32; loop++, buffer++) + writel(*buffer, cryp->base + STARFIVE_AES_AESDIO0R); + + total_len -= AES_BLOCK_SIZE; + } + + if (starfive_aes_wait_busy(cryp)) + return dev_err_probe(cryp->dev, -ETIMEDOUT, + "Timeout processing ccm aad block"); + + return 0; +} + +static int starfive_aes_prepare_req(struct skcipher_request *req, + struct aead_request *areq) +{ + struct starfive_cryp_ctx *ctx; + struct starfive_cryp_request_ctx *rctx; + struct starfive_cryp_dev *cryp; + + if (!req && !areq) + return -EINVAL; + + ctx = req ? crypto_skcipher_ctx(crypto_skcipher_reqtfm(req)) : + crypto_aead_ctx(crypto_aead_reqtfm(areq)); + + cryp = ctx->cryp; + rctx = req ? skcipher_request_ctx(req) : aead_request_ctx(areq); + + if (req) { + cryp->req.sreq = req; + cryp->total_in = req->cryptlen; + cryp->total_out = req->cryptlen; + cryp->assoclen = 0; + cryp->authsize = 0; + } else { + cryp->req.areq = areq; + cryp->assoclen = areq->assoclen; + cryp->authsize = crypto_aead_authsize(crypto_aead_reqtfm(areq)); + if (is_encrypt(cryp)) { + cryp->total_in = areq->cryptlen; + cryp->total_out = areq->cryptlen; + } else { + cryp->total_in = areq->cryptlen - cryp->authsize; + cryp->total_out = cryp->total_in; + } + } + + rctx->in_sg = req ? req->src : areq->src; + scatterwalk_start(&cryp->in_walk, rctx->in_sg); + + rctx->out_sg = req ? req->dst : areq->dst; + scatterwalk_start(&cryp->out_walk, rctx->out_sg); + + if (cryp->assoclen) { + rctx->adata = kzalloc(ALIGN(cryp->assoclen, AES_BLOCK_SIZE), GFP_KERNEL); + if (IS_ERR(rctx->adata)) + return dev_err_probe(cryp->dev, PTR_ERR(rctx->adata), + "Failed to alloc memory for adata"); + + scatterwalk_copychunks(rctx->adata, &cryp->in_walk, cryp->assoclen, 0); + scatterwalk_copychunks(NULL, &cryp->out_walk, cryp->assoclen, 2); + } + + ctx->rctx = rctx; + + return starfive_aes_hw_init(ctx); +} + +static int starfive_aes_do_one_req(struct crypto_engine *engine, void *areq) +{ + struct skcipher_request *req = + container_of(areq, struct skcipher_request, base); + struct starfive_cryp_ctx *ctx = + crypto_skcipher_ctx(crypto_skcipher_reqtfm(req)); + struct starfive_cryp_dev *cryp = ctx->cryp; + u32 block[AES_BLOCK_32]; + u32 stat; + int i; + + /* + * Write first plain/ciphertext block to start the module + * then let irq tasklet handle the rest of the data blocks. + */ + scatterwalk_copychunks(block, &cryp->in_walk, min_t(size_t, AES_BLOCK_SIZE, + cryp->total_in), 0); + cryp->total_in -= min_t(size_t, AES_BLOCK_SIZE, cryp->total_in); + + for (i = 0; i < AES_BLOCK_32; i++) + writel(block[i], cryp->base + STARFIVE_AES_AESDIO0R); + + stat = readl(cryp->base + STARFIVE_IE_MASK_OFFSET); + stat &= ~STARFIVE_IE_MASK_AES_DONE; + writel(stat, cryp->base + STARFIVE_IE_MASK_OFFSET); + + return 0; +} + +static int starfive_aes_skcipher_prepare_req(struct crypto_engine *engine, + void *areq) +{ + struct skcipher_request *req = + container_of(areq, struct skcipher_request, base); + + return starfive_aes_prepare_req(req, NULL); +} + +static int starfive_aes_init_tfm(struct crypto_skcipher *tfm) +{ + struct starfive_cryp_ctx *ctx = crypto_skcipher_ctx(tfm); + + ctx->cryp = starfive_cryp_find_dev(ctx); + if (!ctx->cryp) + return -ENODEV; + + crypto_skcipher_set_reqsize(tfm, sizeof(struct starfive_cryp_request_ctx) + + sizeof(struct skcipher_request)); + + ctx->enginectx.op.do_one_request = starfive_aes_do_one_req; + ctx->enginectx.op.prepare_request = starfive_aes_skcipher_prepare_req; + ctx->enginectx.op.unprepare_request = NULL; + + return 0; +} + +static void starfive_aes_exit_tfm(struct crypto_skcipher *tfm) +{ + struct starfive_cryp_ctx *ctx = crypto_skcipher_ctx(tfm); + + ctx->enginectx.op.do_one_request = NULL; + ctx->enginectx.op.prepare_request = NULL; + ctx->enginectx.op.unprepare_request = NULL; +} + +static int starfive_aes_aead_do_one_req(struct crypto_engine *engine, void *areq) +{ + struct aead_request *req = + container_of(areq, struct aead_request, base); + struct starfive_cryp_ctx *ctx = + crypto_aead_ctx(crypto_aead_reqtfm(req)); + struct starfive_cryp_dev *cryp = ctx->cryp; + struct starfive_cryp_request_ctx *rctx = ctx->rctx; + u32 block[AES_BLOCK_32]; + u32 stat; + int i; + + if (!cryp->assoclen) + goto write_text; + + if ((cryp->flags & FLG_MODE_MASK) == STARFIVE_AES_MODE_CCM) + cryp->err = starfive_aes_ccm_write_adata(ctx); + else + cryp->err = starfive_aes_gcm_write_adata(ctx); + + kfree(rctx->adata); + + if (cryp->err) + return cryp->err; + +write_text: + if (!cryp->total_in) + goto finish_req; + + /* + * Write first plain/ciphertext block to start the module + * then let irq tasklet handle the rest of the data blocks. + */ + scatterwalk_copychunks(block, &cryp->in_walk, min_t(size_t, AES_BLOCK_SIZE, + cryp->total_in), 0); + cryp->total_in -= min_t(size_t, AES_BLOCK_SIZE, cryp->total_in); + + for (i = 0; i < AES_BLOCK_32; i++) + writel(block[i], cryp->base + STARFIVE_AES_AESDIO0R); + + stat = readl(cryp->base + STARFIVE_IE_MASK_OFFSET); + stat &= ~STARFIVE_IE_MASK_AES_DONE; + writel(stat, cryp->base + STARFIVE_IE_MASK_OFFSET); + + return 0; + +finish_req: + starfive_aes_finish_req(cryp); + return 0; +} + +static int starfive_aes_aead_prepare_req(struct crypto_engine *engine, void *areq) +{ + struct aead_request *req = + container_of(areq, struct aead_request, base); + + return starfive_aes_prepare_req(NULL, req); +} + +static int starfive_aes_aead_init_tfm(struct crypto_aead *tfm) +{ + struct starfive_cryp_ctx *ctx = crypto_aead_ctx(tfm); + struct starfive_cryp_dev *cryp = ctx->cryp; + struct crypto_tfm *aead = crypto_aead_tfm(tfm); + struct crypto_alg *alg = aead->__crt_alg; + + ctx->cryp = starfive_cryp_find_dev(ctx); + if (!ctx->cryp) + return -ENODEV; + + if (alg->cra_flags & CRYPTO_ALG_NEED_FALLBACK) { + ctx->aead_fbk = crypto_alloc_aead(alg->cra_name, 0, + CRYPTO_ALG_NEED_FALLBACK); + if (IS_ERR(ctx->aead_fbk)) + return dev_err_probe(cryp->dev, PTR_ERR(ctx->aead_fbk), + "%s() failed to allocate fallback for %s\n", + __func__, alg->cra_name); + } + + crypto_aead_set_reqsize(tfm, sizeof(struct starfive_cryp_ctx) + + sizeof(struct aead_request)); + + ctx->enginectx.op.do_one_request = starfive_aes_aead_do_one_req; + ctx->enginectx.op.prepare_request = starfive_aes_aead_prepare_req; + ctx->enginectx.op.unprepare_request = NULL; + + return 0; +} + +static void starfive_aes_aead_exit_tfm(struct crypto_aead *tfm) +{ + struct starfive_cryp_ctx *ctx = crypto_aead_ctx(tfm); + + if (ctx->aead_fbk) { + crypto_free_aead(ctx->aead_fbk); + ctx->aead_fbk = NULL; + } + + ctx->enginectx.op.do_one_request = NULL; + ctx->enginectx.op.prepare_request = NULL; + ctx->enginectx.op.unprepare_request = NULL; +} + +static int starfive_aes_crypt(struct skcipher_request *req, unsigned long flags) +{ + struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req); + struct starfive_cryp_ctx *ctx = crypto_skcipher_ctx(tfm); + struct starfive_cryp_dev *cryp = ctx->cryp; + unsigned int blocksize_align = crypto_skcipher_blocksize(tfm) - 1; + + cryp->flags = flags; + + if ((cryp->flags & FLG_MODE_MASK) == STARFIVE_AES_MODE_ECB || + (cryp->flags & FLG_MODE_MASK) == STARFIVE_AES_MODE_CBC) + if (req->cryptlen & blocksize_align) + return -EINVAL; + + return crypto_transfer_skcipher_request_to_engine(cryp->engine, req); +} + +static int starfive_aes_aead_crypt(struct aead_request *req, unsigned long flags) +{ + struct starfive_cryp_ctx *ctx = crypto_aead_ctx(crypto_aead_reqtfm(req)); + struct starfive_cryp_dev *cryp = ctx->cryp; + + cryp->flags = flags; + + /* + * HW engine could not perform CCM tag verification on + * non-blocksize aligned text, use fallback algo instead + */ + if (ctx->aead_fbk && !is_encrypt(cryp)) { + struct aead_request *subreq = aead_request_ctx(req); + + aead_request_set_tfm(subreq, ctx->aead_fbk); + aead_request_set_callback(subreq, req->base.flags, + req->base.complete, req->base.data); + aead_request_set_crypt(subreq, req->src, + req->dst, req->cryptlen, req->iv); + aead_request_set_ad(subreq, req->assoclen); + + return crypto_aead_decrypt(subreq); + } + + return crypto_transfer_aead_request_to_engine(cryp->engine, req); +} + +static int starfive_aes_setkey(struct crypto_skcipher *tfm, const u8 *key, + unsigned int keylen) +{ + struct starfive_cryp_ctx *ctx = crypto_skcipher_ctx(tfm); + + if (!key || !keylen) + return -EINVAL; + + if (keylen != AES_KEYSIZE_128 && + keylen != AES_KEYSIZE_192 && + keylen != AES_KEYSIZE_256) + return -EINVAL; + + memcpy(ctx->key, key, keylen); + ctx->keylen = keylen; + + return 0; +} + +static int starfive_aes_aead_setkey(struct crypto_aead *tfm, const u8 *key, + unsigned int keylen) +{ + struct starfive_cryp_ctx *ctx = crypto_aead_ctx(tfm); + + if (!key || !keylen) + return -EINVAL; + + if (keylen != AES_KEYSIZE_128 && + keylen != AES_KEYSIZE_192 && + keylen != AES_KEYSIZE_256) + return -EINVAL; + + memcpy(ctx->key, key, keylen); + ctx->keylen = keylen; + + if (ctx->aead_fbk) + return crypto_aead_setkey(ctx->aead_fbk, key, keylen); + + return 0; +} + +static int starfive_aes_gcm_setauthsize(struct crypto_aead *tfm, + unsigned int authsize) +{ + return crypto_gcm_check_authsize(authsize); +} + +static int starfive_aes_ccm_setauthsize(struct crypto_aead *tfm, + unsigned int authsize) +{ + struct starfive_cryp_ctx *ctx = crypto_aead_ctx(tfm); + + switch (authsize) { + case 4: + case 6: + case 8: + case 10: + case 12: + case 14: + case 16: + break; + default: + return -EINVAL; + } + + return crypto_aead_setauthsize(ctx->aead_fbk, authsize); +} + +static int starfive_aes_ecb_encrypt(struct skcipher_request *req) +{ + return starfive_aes_crypt(req, STARFIVE_AES_MODE_ECB | FLG_ENCRYPT); +} + +static int starfive_aes_ecb_decrypt(struct skcipher_request *req) +{ + return starfive_aes_crypt(req, STARFIVE_AES_MODE_ECB); +} + +static int starfive_aes_cbc_encrypt(struct skcipher_request *req) +{ + return starfive_aes_crypt(req, STARFIVE_AES_MODE_CBC | FLG_ENCRYPT); +} + +static int starfive_aes_cbc_decrypt(struct skcipher_request *req) +{ + return starfive_aes_crypt(req, STARFIVE_AES_MODE_CBC); +} + +static int starfive_aes_cfb_encrypt(struct skcipher_request *req) +{ + return starfive_aes_crypt(req, STARFIVE_AES_MODE_CFB | FLG_ENCRYPT); +} + +static int starfive_aes_cfb_decrypt(struct skcipher_request *req) +{ + return starfive_aes_crypt(req, STARFIVE_AES_MODE_CFB); +} + +static int starfive_aes_ofb_encrypt(struct skcipher_request *req) +{ + return starfive_aes_crypt(req, STARFIVE_AES_MODE_OFB | FLG_ENCRYPT); +} + +static int starfive_aes_ofb_decrypt(struct skcipher_request *req) +{ + return starfive_aes_crypt(req, STARFIVE_AES_MODE_OFB); +} + +static int starfive_aes_ctr_encrypt(struct skcipher_request *req) +{ + return starfive_aes_crypt(req, STARFIVE_AES_MODE_CTR | FLG_ENCRYPT); +} + +static int starfive_aes_ctr_decrypt(struct skcipher_request *req) +{ + return starfive_aes_crypt(req, STARFIVE_AES_MODE_CTR); +} + +static int starfive_aes_gcm_encrypt(struct aead_request *req) +{ + return starfive_aes_aead_crypt(req, STARFIVE_AES_MODE_GCM | FLG_ENCRYPT); +} + +static int starfive_aes_gcm_decrypt(struct aead_request *req) +{ + return starfive_aes_aead_crypt(req, STARFIVE_AES_MODE_GCM); +} + +static int starfive_aes_ccm_encrypt(struct aead_request *req) +{ + int ret; + + ret = starfive_aes_ccm_check_iv(req->iv); + if (ret) + return ret; + + return starfive_aes_aead_crypt(req, STARFIVE_AES_MODE_CCM | FLG_ENCRYPT); +} + +static int starfive_aes_ccm_decrypt(struct aead_request *req) +{ + int ret; + + ret = starfive_aes_ccm_check_iv(req->iv); + if (ret) + return ret; + + return starfive_aes_aead_crypt(req, STARFIVE_AES_MODE_CCM); +} + +static struct skcipher_alg skcipher_algs[] = { +{ + .init = starfive_aes_init_tfm, + .exit = starfive_aes_exit_tfm, + .setkey = starfive_aes_setkey, + .encrypt = starfive_aes_ecb_encrypt, + .decrypt = starfive_aes_ecb_decrypt, + .min_keysize = AES_MIN_KEY_SIZE, + .max_keysize = AES_MAX_KEY_SIZE, + .base = { + .cra_name = "ecb(aes)", + .cra_driver_name = "starfive-ecb-aes", + .cra_priority = 200, + .cra_flags = CRYPTO_ALG_ASYNC, + .cra_blocksize = AES_BLOCK_SIZE, + .cra_ctxsize = sizeof(struct starfive_cryp_ctx), + .cra_alignmask = 0xf, + .cra_module = THIS_MODULE, + }, +}, { + .init = starfive_aes_init_tfm, + .exit = starfive_aes_exit_tfm, + .setkey = starfive_aes_setkey, + .encrypt = starfive_aes_cbc_encrypt, + .decrypt = starfive_aes_cbc_decrypt, + .min_keysize = AES_MIN_KEY_SIZE, + .max_keysize = AES_MAX_KEY_SIZE, + .ivsize = AES_BLOCK_SIZE, + .base = { + .cra_name = "cbc(aes)", + .cra_driver_name = "starfive-cbc-aes", + .cra_priority = 200, + .cra_flags = CRYPTO_ALG_ASYNC, + .cra_blocksize = AES_BLOCK_SIZE, + .cra_ctxsize = sizeof(struct starfive_cryp_ctx), + .cra_alignmask = 0xf, + .cra_module = THIS_MODULE, + }, +}, { + .init = starfive_aes_init_tfm, + .exit = starfive_aes_exit_tfm, + .setkey = starfive_aes_setkey, + .encrypt = starfive_aes_ctr_encrypt, + .decrypt = starfive_aes_ctr_decrypt, + .min_keysize = AES_MIN_KEY_SIZE, + .max_keysize = AES_MAX_KEY_SIZE, + .ivsize = AES_BLOCK_SIZE, + .base = { + .cra_name = "ctr(aes)", + .cra_driver_name = "starfive-ctr-aes", + .cra_priority = 200, + .cra_flags = CRYPTO_ALG_ASYNC, + .cra_blocksize = 1, + .cra_ctxsize = sizeof(struct starfive_cryp_ctx), + .cra_alignmask = 0xf, + .cra_module = THIS_MODULE, + }, +}, { + .init = starfive_aes_init_tfm, + .exit = starfive_aes_exit_tfm, + .setkey = starfive_aes_setkey, + .encrypt = starfive_aes_cfb_encrypt, + .decrypt = starfive_aes_cfb_decrypt, + .min_keysize = AES_MIN_KEY_SIZE, + .max_keysize = AES_MAX_KEY_SIZE, + .ivsize = AES_BLOCK_SIZE, + .base = { + .cra_name = "cfb(aes)", + .cra_driver_name = "starfive-cfb-aes", + .cra_priority = 200, + .cra_flags = CRYPTO_ALG_ASYNC, + .cra_blocksize = 1, + .cra_ctxsize = sizeof(struct starfive_cryp_ctx), + .cra_alignmask = 0xf, + .cra_module = THIS_MODULE, + }, +}, { + .init = starfive_aes_init_tfm, + .exit = starfive_aes_exit_tfm, + .setkey = starfive_aes_setkey, + .encrypt = starfive_aes_ofb_encrypt, + .decrypt = starfive_aes_ofb_decrypt, + .min_keysize = AES_MIN_KEY_SIZE, + .max_keysize = AES_MAX_KEY_SIZE, + .ivsize = AES_BLOCK_SIZE, + .base = { + .cra_name = "ofb(aes)", + .cra_driver_name = "starfive-ofb-aes", + .cra_priority = 200, + .cra_flags = CRYPTO_ALG_ASYNC, + .cra_blocksize = 1, + .cra_ctxsize = sizeof(struct starfive_cryp_ctx), + .cra_alignmask = 0xf, + .cra_module = THIS_MODULE, + }, +}, +}; + +static struct aead_alg aead_algs[] = { +{ + .setkey = starfive_aes_aead_setkey, + .setauthsize = starfive_aes_gcm_setauthsize, + .encrypt = starfive_aes_gcm_encrypt, + .decrypt = starfive_aes_gcm_decrypt, + .init = starfive_aes_aead_init_tfm, + .exit = starfive_aes_aead_exit_tfm, + .ivsize = GCM_AES_IV_SIZE, + .maxauthsize = AES_BLOCK_SIZE, + .base = { + .cra_name = "gcm(aes)", + .cra_driver_name = "starfive-gcm-aes", + .cra_priority = 200, + .cra_flags = CRYPTO_ALG_ASYNC, + .cra_blocksize = 1, + .cra_ctxsize = sizeof(struct starfive_cryp_ctx), + .cra_alignmask = 0xf, + .cra_module = THIS_MODULE, + }, +}, { + .setkey = starfive_aes_aead_setkey, + .setauthsize = starfive_aes_ccm_setauthsize, + .encrypt = starfive_aes_ccm_encrypt, + .decrypt = starfive_aes_ccm_decrypt, + .init = starfive_aes_aead_init_tfm, + .exit = starfive_aes_aead_exit_tfm, + .ivsize = AES_BLOCK_SIZE, + .maxauthsize = AES_BLOCK_SIZE, + .base = { + .cra_name = "ccm(aes)", + .cra_driver_name = "starfive-ccm-aes", + .cra_priority = 200, + .cra_flags = CRYPTO_ALG_ASYNC | + CRYPTO_ALG_NEED_FALLBACK, + .cra_blocksize = 1, + .cra_ctxsize = sizeof(struct starfive_cryp_ctx), + .cra_alignmask = 0xf, + .cra_module = THIS_MODULE, + }, +}, +}; + +int starfive_aes_register_algs(void) +{ + int ret; + + ret = crypto_register_skciphers(skcipher_algs, ARRAY_SIZE(skcipher_algs)); + if (ret) + return ret; + + ret = crypto_register_aeads(aead_algs, ARRAY_SIZE(aead_algs)); + if (ret) + crypto_unregister_skciphers(skcipher_algs, ARRAY_SIZE(skcipher_algs)); + + return ret; +} + +void starfive_aes_unregister_algs(void) +{ + crypto_unregister_aeads(aead_algs, ARRAY_SIZE(aead_algs)); + crypto_unregister_skciphers(skcipher_algs, ARRAY_SIZE(skcipher_algs)); +} diff --git a/drivers/crypto/starfive/jh7110-cryp.c b/drivers/crypto/starfive/jh7110-cryp.c index e573c097a4a0..ab37010ceb88 100644 --- a/drivers/crypto/starfive/jh7110-cryp.c +++ b/drivers/crypto/starfive/jh7110-cryp.c @@ -51,6 +51,13 @@ struct starfive_cryp_dev *starfive_cryp_find_dev(struct starfive_cryp_ctx *ctx) return cryp; } +static u16 side_chan; +module_param(side_chan, ushort, 0); +MODULE_PARM_DESC(side_chan, "Enable side channel mitigation for AES module.\n" + "Enabling this feature will reduce speed performance.\n" + " 0 - Disabled\n" + " other - Enabled"); + static int starfive_dma_init(struct starfive_cryp_dev *cryp) { dma_cap_mask_t mask; @@ -82,20 +89,26 @@ static void starfive_dma_cleanup(struct starfive_cryp_dev *cryp) static irqreturn_t starfive_cryp_irq(int irq, void *priv) { u32 status; + u32 mask; struct starfive_cryp_dev *cryp = (struct starfive_cryp_dev *)priv; + mask = readl(cryp->base + STARFIVE_IE_MASK_OFFSET); status = readl(cryp->base + STARFIVE_IE_FLAG_OFFSET); + if (status & STARFIVE_IE_FLAG_AES_DONE) { + mask |= STARFIVE_IE_MASK_AES_DONE; + writel(mask, cryp->base + STARFIVE_IE_MASK_OFFSET); + tasklet_schedule(&cryp->aes_done); + } + if (status & STARFIVE_IE_FLAG_HASH_DONE) { - status = readl(cryp->base + STARFIVE_IE_MASK_OFFSET); - status |= STARFIVE_IE_MASK_HASH_DONE; - writel(status, cryp->base + STARFIVE_IE_MASK_OFFSET); + mask |= STARFIVE_IE_MASK_HASH_DONE; + writel(mask, cryp->base + STARFIVE_IE_MASK_OFFSET); tasklet_schedule(&cryp->hash_done); } if (status & STARFIVE_IE_FLAG_PKA_DONE) { - status = readl(cryp->base + STARFIVE_IE_MASK_OFFSET); - status |= STARFIVE_IE_MASK_PKA_DONE; - writel(status, cryp->base + STARFIVE_IE_MASK_OFFSET); + mask |= STARFIVE_IE_MASK_PKA_DONE; + writel(mask, cryp->base + STARFIVE_IE_MASK_OFFSET); complete(&cryp->pka_done); } @@ -121,10 +134,12 @@ static int starfive_cryp_probe(struct platform_device *pdev) return dev_err_probe(&pdev->dev, PTR_ERR(cryp->base), "Error remapping memory for platform device\n"); + tasklet_init(&cryp->aes_done, starfive_aes_done_task, (unsigned long)cryp); tasklet_init(&cryp->hash_done, starfive_hash_done_task, (unsigned long)cryp); cryp->phys_base = res->start; cryp->dma_maxburst = 32; + cryp->side_chan = side_chan; cryp->hclk = devm_clk_get(&pdev->dev, "hclk"); if (IS_ERR(cryp->hclk)) @@ -180,6 +195,10 @@ static int starfive_cryp_probe(struct platform_device *pdev) if (ret) goto err_engine_start; + ret = starfive_aes_register_algs(); + if (ret) + goto err_algs_aes; + ret = starfive_hash_register_algs(); if (ret) goto err_algs_hash; @@ -193,6 +212,8 @@ static int starfive_cryp_probe(struct platform_device *pdev) err_algs_rsa: starfive_hash_unregister_algs(); err_algs_hash: + starfive_aes_unregister_algs(); +err_algs_aes: crypto_engine_stop(cryp->engine); err_engine_start: crypto_engine_exit(cryp->engine); @@ -207,6 +228,7 @@ err_dma_init: clk_disable_unprepare(cryp->ahb); reset_control_assert(cryp->rst); + tasklet_kill(&cryp->aes_done); tasklet_kill(&cryp->hash_done); err_probe_defer: return ret; @@ -216,9 +238,11 @@ static void starfive_cryp_remove(struct platform_device *pdev) { struct starfive_cryp_dev *cryp = platform_get_drvdata(pdev); + starfive_aes_unregister_algs(); starfive_hash_unregister_algs(); starfive_rsa_unregister_algs(); + tasklet_kill(&cryp->aes_done); tasklet_kill(&cryp->hash_done); crypto_engine_stop(cryp->engine); diff --git a/drivers/crypto/starfive/jh7110-cryp.h b/drivers/crypto/starfive/jh7110-cryp.h index 0cdcffc0d7d4..b6d809e8fe45 100644 --- a/drivers/crypto/starfive/jh7110-cryp.h +++ b/drivers/crypto/starfive/jh7110-cryp.h @@ -5,7 +5,9 @@ #include #include #include +#include +#include #include #include #include @@ -17,13 +19,56 @@ #define STARFIVE_DMA_IN_LEN_OFFSET 0x10 #define STARFIVE_DMA_OUT_LEN_OFFSET 0x14 +#define STARFIVE_IE_MASK_AES_DONE 0x1 #define STARFIVE_IE_MASK_HASH_DONE 0x4 #define STARFIVE_IE_MASK_PKA_DONE 0x8 +#define STARFIVE_IE_FLAG_AES_DONE 0x1 #define STARFIVE_IE_FLAG_HASH_DONE 0x4 #define STARFIVE_IE_FLAG_PKA_DONE 0x8 #define STARFIVE_MSG_BUFFER_SIZE SZ_16K #define MAX_KEY_SIZE SHA512_BLOCK_SIZE +#define STARFIVE_AES_IV_LEN AES_BLOCK_SIZE +#define STARFIVE_AES_CTR_LEN AES_BLOCK_SIZE + +union starfive_aes_csr { + u32 v; + struct { + u32 cmode :1; +#define STARFIVE_AES_KEYMODE_128 0x0 +#define STARFIVE_AES_KEYMODE_192 0x1 +#define STARFIVE_AES_KEYMODE_256 0x2 + u32 keymode :2; +#define STARFIVE_AES_BUSY BIT(3) + u32 busy :1; + u32 done :1; +#define STARFIVE_AES_KEY_DONE BIT(5) + u32 krdy :1; + u32 aesrst :1; + u32 ie :1; +#define STARFIVE_AES_CCM_START BIT(8) + u32 ccm_start :1; +#define STARFIVE_AES_MODE_ECB 0x0 +#define STARFIVE_AES_MODE_CBC 0x1 +#define STARFIVE_AES_MODE_CFB 0x2 +#define STARFIVE_AES_MODE_OFB 0x3 +#define STARFIVE_AES_MODE_CTR 0x4 +#define STARFIVE_AES_MODE_CCM 0x5 +#define STARFIVE_AES_MODE_GCM 0x6 + u32 mode :3; +#define STARFIVE_AES_GCM_START BIT(12) + u32 gcm_start :1; +#define STARFIVE_AES_GCM_DONE BIT(13) + u32 gcm_done :1; + u32 delay_aes :1; + u32 vaes_start :1; + u32 rsvd_0 :8; +#define STARFIVE_AES_MODE_XFB_1 0x0 +#define STARFIVE_AES_MODE_XFB_128 0x5 + u32 stmode :3; + u32 rsvd_1 :5; + }; +}; union starfive_hash_csr { u32 v; @@ -116,6 +161,7 @@ struct starfive_cryp_ctx { struct starfive_rsa_key rsa_key; struct crypto_akcipher *akcipher_fbk; struct crypto_ahash *ahash_fbk; + struct crypto_aead *aead_fbk; }; struct starfive_cryp_dev { @@ -133,13 +179,26 @@ struct starfive_cryp_dev { struct dma_chan *rx; struct dma_slave_config cfg_in; struct dma_slave_config cfg_out; + struct scatter_walk in_walk; + struct scatter_walk out_walk; struct crypto_engine *engine; + struct tasklet_struct aes_done; struct tasklet_struct hash_done; struct completion pka_done; + size_t assoclen; + size_t total_in; + size_t total_out; + u32 tag_in[4]; + u32 tag_out[4]; + unsigned int authsize; + unsigned long flags; int err; + bool side_chan; union starfive_alg_cr alg_cr; union { struct ahash_request *hreq; + struct aead_request *areq; + struct skcipher_request *sreq; } req; }; @@ -147,6 +206,7 @@ struct starfive_cryp_request_ctx { union { union starfive_hash_csr hash; union starfive_pka_cacr pka; + union starfive_aes_csr aes; } csr; struct scatterlist *in_sg; @@ -157,6 +217,7 @@ struct starfive_cryp_request_ctx { unsigned int blksize; unsigned int digsize; unsigned long in_sg_len; + unsigned char *adata; u8 rsa_data[] __aligned(sizeof(u32)); }; @@ -168,5 +229,9 @@ void starfive_hash_unregister_algs(void); int starfive_rsa_register_algs(void); void starfive_rsa_unregister_algs(void); +int starfive_aes_register_algs(void); +void starfive_aes_unregister_algs(void); + void starfive_hash_done_task(unsigned long param); +void starfive_aes_done_task(unsigned long param); #endif From 9f3fa6bc4ff8515da1349c44a77e7327bd2f4788 Mon Sep 17 00:00:00 2001 From: Mahmoud Adam Date: Mon, 17 Jul 2023 12:55:09 +0000 Subject: [PATCH 206/656] KEYS: use kfree_sensitive with key key might contain private part of the key, so better use kfree_sensitive to free it Signed-off-by: Mahmoud Adam Signed-off-by: Herbert Xu --- crypto/asymmetric_keys/public_key.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/crypto/asymmetric_keys/public_key.c b/crypto/asymmetric_keys/public_key.c index 773e159dbbcb..abeecb8329b3 100644 --- a/crypto/asymmetric_keys/public_key.c +++ b/crypto/asymmetric_keys/public_key.c @@ -42,7 +42,7 @@ static void public_key_describe(const struct key *asymmetric_key, void public_key_free(struct public_key *key) { if (key) { - kfree(key->key); + kfree_sensitive(key->key); kfree(key->params); kfree(key); } @@ -263,7 +263,7 @@ error_free_tfm: else crypto_free_akcipher(tfm); error_free_key: - kfree(key); + kfree_sensitive(key); pr_devel("<==%s() = %d\n", __func__, ret); return ret; } @@ -369,7 +369,7 @@ error_free_tfm: else crypto_free_akcipher(tfm); error_free_key: - kfree(key); + kfree_sensitive(key); pr_devel("<==%s() = %d\n", __func__, ret); return ret; } @@ -441,7 +441,7 @@ int public_key_verify_signature(const struct public_key *pkey, sig->digest, sig->digest_size); error_free_key: - kfree(key); + kfree_sensitive(key); error_free_tfm: crypto_free_sig(tfm); pr_devel("<==%s() = %d\n", __func__, ret); From 80e40fea8e2a7528b079ac1853da528c5cabf625 Mon Sep 17 00:00:00 2001 From: Martin Kaiser Date: Wed, 19 Jul 2023 09:18:03 +0200 Subject: [PATCH 207/656] hwrng: cctrng - don't open code init and exit functions Do not open code the init and exit functions of the cctrng driver. If we move the BUILD_BUG_ON checks into the probe function, we can use module_platform_driver and make the code shorter. Signed-off-by: Martin Kaiser Signed-off-by: Herbert Xu --- drivers/char/hw_random/cctrng.c | 20 +++++--------------- 1 file changed, 5 insertions(+), 15 deletions(-) diff --git a/drivers/char/hw_random/cctrng.c b/drivers/char/hw_random/cctrng.c index 302ffa354c2f..241da7e44675 100644 --- a/drivers/char/hw_random/cctrng.c +++ b/drivers/char/hw_random/cctrng.c @@ -492,6 +492,10 @@ static int cctrng_probe(struct platform_device *pdev) u32 val; int irq; + /* Compile time assertion checks */ + BUILD_BUG_ON(CCTRNG_DATA_BUF_WORDS < 6); + BUILD_BUG_ON((CCTRNG_DATA_BUF_WORDS & (CCTRNG_DATA_BUF_WORDS-1)) != 0); + drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); if (!drvdata) return -ENOMEM; @@ -698,21 +702,7 @@ static struct platform_driver cctrng_driver = { .remove = cctrng_remove, }; -static int __init cctrng_mod_init(void) -{ - /* Compile time assertion checks */ - BUILD_BUG_ON(CCTRNG_DATA_BUF_WORDS < 6); - BUILD_BUG_ON((CCTRNG_DATA_BUF_WORDS & (CCTRNG_DATA_BUF_WORDS-1)) != 0); - - return platform_driver_register(&cctrng_driver); -} -module_init(cctrng_mod_init); - -static void __exit cctrng_mod_exit(void) -{ - platform_driver_unregister(&cctrng_driver); -} -module_exit(cctrng_mod_exit); +module_platform_driver(cctrng_driver); /* Module description */ MODULE_DESCRIPTION("ARM CryptoCell TRNG Driver"); From 8bcd9689384810bd1c610419563c827e23118e34 Mon Sep 17 00:00:00 2001 From: Martin Kaiser Date: Wed, 19 Jul 2023 09:18:04 +0200 Subject: [PATCH 208/656] hwrng: cctrng - let devres enable the clock Call devm_clk_get_optional_enabled in the cctrng driver. We don't have to disable and unprepare the clock any more in error paths or in the remove function. Signed-off-by: Martin Kaiser Signed-off-by: Herbert Xu --- drivers/char/hw_random/cctrng.c | 29 +++++------------------------ 1 file changed, 5 insertions(+), 24 deletions(-) diff --git a/drivers/char/hw_random/cctrng.c b/drivers/char/hw_random/cctrng.c index 241da7e44675..ac4a2fbc6a0f 100644 --- a/drivers/char/hw_random/cctrng.c +++ b/drivers/char/hw_random/cctrng.c @@ -460,30 +460,16 @@ static int cc_trng_clk_init(struct cctrng_drvdata *drvdata) { struct clk *clk; struct device *dev = &(drvdata->pdev->dev); - int rc = 0; - clk = devm_clk_get_optional(dev, NULL); + clk = devm_clk_get_optional_enabled(dev, NULL); if (IS_ERR(clk)) return dev_err_probe(dev, PTR_ERR(clk), - "Error getting clock\n"); + "Failed to get or enable the clock\n"); drvdata->clk = clk; - - rc = clk_prepare_enable(drvdata->clk); - if (rc) { - dev_err(dev, "Failed to enable clock\n"); - return rc; - } - return 0; } -static void cc_trng_clk_fini(struct cctrng_drvdata *drvdata) -{ - clk_disable_unprepare(drvdata->clk); -} - - static int cctrng_probe(struct platform_device *pdev) { struct cctrng_drvdata *drvdata; @@ -545,7 +531,7 @@ static int cctrng_probe(struct platform_device *pdev) rc = devm_request_irq(dev, irq, cc_isr, IRQF_SHARED, "cctrng", drvdata); if (rc) { dev_err(dev, "Could not register to interrupt %d\n", irq); - goto post_clk_err; + return rc; } dev_dbg(dev, "Registered to IRQ: %d\n", irq); @@ -563,14 +549,14 @@ static int cctrng_probe(struct platform_device *pdev) rc = cc_trng_pm_init(drvdata); if (rc) { dev_err(dev, "cc_trng_pm_init failed\n"); - goto post_clk_err; + return rc; } /* increment device's usage counter */ rc = cc_trng_pm_get(dev); if (rc) { dev_err(dev, "cc_trng_pm_get returned %x\n", rc); - goto post_pm_err; + return rc; } /* set pending_hw to verify that HW won't be triggered from read */ @@ -597,9 +583,6 @@ static int cctrng_probe(struct platform_device *pdev) post_pm_err: cc_trng_pm_fini(drvdata); -post_clk_err: - cc_trng_clk_fini(drvdata); - return rc; } @@ -612,8 +595,6 @@ static int cctrng_remove(struct platform_device *pdev) cc_trng_pm_fini(drvdata); - cc_trng_clk_fini(drvdata); - dev_info(dev, "ARM cctrng device terminated\n"); return 0; From 80a34c037713b183032fad578cf5cb88b94298a8 Mon Sep 17 00:00:00 2001 From: Martin Kaiser Date: Wed, 19 Jul 2023 09:18:05 +0200 Subject: [PATCH 209/656] hwrng: cctrng - merge cc_trng_clk_init into its only caller cc_trng_clk_init is called only from the probe function. Merge the two functions, this saves some lines of code. Signed-off-by: Martin Kaiser Signed-off-by: Herbert Xu --- drivers/char/hw_random/cctrng.c | 24 ++++-------------------- 1 file changed, 4 insertions(+), 20 deletions(-) diff --git a/drivers/char/hw_random/cctrng.c b/drivers/char/hw_random/cctrng.c index ac4a2fbc6a0f..2a1887f6483f 100644 --- a/drivers/char/hw_random/cctrng.c +++ b/drivers/char/hw_random/cctrng.c @@ -455,21 +455,6 @@ static void cc_trng_startwork_handler(struct work_struct *w) cc_trng_hw_trigger(drvdata); } - -static int cc_trng_clk_init(struct cctrng_drvdata *drvdata) -{ - struct clk *clk; - struct device *dev = &(drvdata->pdev->dev); - - clk = devm_clk_get_optional_enabled(dev, NULL); - if (IS_ERR(clk)) - return dev_err_probe(dev, PTR_ERR(clk), - "Failed to get or enable the clock\n"); - - drvdata->clk = clk; - return 0; -} - static int cctrng_probe(struct platform_device *pdev) { struct cctrng_drvdata *drvdata; @@ -517,11 +502,10 @@ static int cctrng_probe(struct platform_device *pdev) return rc; } - rc = cc_trng_clk_init(drvdata); - if (rc) { - dev_err(dev, "cc_trng_clk_init failed\n"); - return rc; - } + drvdata->clk = devm_clk_get_optional_enabled(dev, NULL); + if (IS_ERR(drvdata->clk)) + return dev_err_probe(dev, PTR_ERR(drvdata->clk), + "Failed to get or enable the clock\n"); INIT_WORK(&drvdata->compwork, cc_trng_compwork_handler); INIT_WORK(&drvdata->startwork, cc_trng_startwork_handler); From 9553ae3497f0753b79efa54b1719a7117e10bdf4 Mon Sep 17 00:00:00 2001 From: Martin Kaiser Date: Wed, 19 Jul 2023 09:18:06 +0200 Subject: [PATCH 210/656] hwrng: cctrng - use dev_err_probe in error paths Use dev_err_probe in error paths to make the code a bit shorter. Signed-off-by: Martin Kaiser Signed-off-by: Herbert Xu --- drivers/char/hw_random/cctrng.c | 30 ++++++++++-------------------- 1 file changed, 10 insertions(+), 20 deletions(-) diff --git a/drivers/char/hw_random/cctrng.c b/drivers/char/hw_random/cctrng.c index 2a1887f6483f..1abbff04a015 100644 --- a/drivers/char/hw_random/cctrng.c +++ b/drivers/char/hw_random/cctrng.c @@ -485,10 +485,8 @@ static int cctrng_probe(struct platform_device *pdev) drvdata->circ.buf = (char *)drvdata->data_buf; drvdata->cc_base = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(drvdata->cc_base)) { - dev_err(dev, "Failed to ioremap registers"); - return PTR_ERR(drvdata->cc_base); - } + if (IS_ERR(drvdata->cc_base)) + return dev_err_probe(dev, PTR_ERR(drvdata->cc_base), "Failed to ioremap registers"); /* Then IRQ */ irq = platform_get_irq(pdev, 0); @@ -497,10 +495,8 @@ static int cctrng_probe(struct platform_device *pdev) /* parse sampling rate from device tree */ rc = cc_trng_parse_sampling_ratio(drvdata); - if (rc) { - dev_err(dev, "Failed to get legal sampling ratio for rosc\n"); - return rc; - } + if (rc) + return dev_err_probe(dev, rc, "Failed to get legal sampling ratio for rosc\n"); drvdata->clk = devm_clk_get_optional_enabled(dev, NULL); if (IS_ERR(drvdata->clk)) @@ -513,10 +509,8 @@ static int cctrng_probe(struct platform_device *pdev) /* register the driver isr function */ rc = devm_request_irq(dev, irq, cc_isr, IRQF_SHARED, "cctrng", drvdata); - if (rc) { - dev_err(dev, "Could not register to interrupt %d\n", irq); - return rc; - } + if (rc) + return dev_err_probe(dev, rc, "Could not register to interrupt %d\n", irq); dev_dbg(dev, "Registered to IRQ: %d\n", irq); /* Clear all pending interrupts */ @@ -531,17 +525,13 @@ static int cctrng_probe(struct platform_device *pdev) /* init PM */ rc = cc_trng_pm_init(drvdata); - if (rc) { - dev_err(dev, "cc_trng_pm_init failed\n"); - return rc; - } + if (rc) + return dev_err_probe(dev, rc, "cc_trng_pm_init failed\n"); /* increment device's usage counter */ rc = cc_trng_pm_get(dev); - if (rc) { - dev_err(dev, "cc_trng_pm_get returned %x\n", rc); - return rc; - } + if (rc) + return dev_err_probe(dev, rc, "cc_trng_pm_get returned %x\n", rc); /* set pending_hw to verify that HW won't be triggered from read */ atomic_set(&drvdata->pending_hw, 1); From 5a3d66acf072ae78dfa06af712a42b24bef32c0f Mon Sep 17 00:00:00 2001 From: Martin Kaiser Date: Fri, 21 Jul 2023 10:54:43 +0200 Subject: [PATCH 211/656] hwrng: cn10k - delete empty remove function The remove function is empty, we can delete it. It's ok for a PCI driver to have no remove function. Signed-off-by: Martin Kaiser Signed-off-by: Herbert Xu --- drivers/char/hw_random/cn10k-rng.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/drivers/char/hw_random/cn10k-rng.c b/drivers/char/hw_random/cn10k-rng.c index 0cd7e1a8e499..794ec77feb2c 100644 --- a/drivers/char/hw_random/cn10k-rng.c +++ b/drivers/char/hw_random/cn10k-rng.c @@ -213,11 +213,6 @@ static int cn10k_rng_probe(struct pci_dev *pdev, const struct pci_device_id *id) return 0; } -static void cn10k_rng_remove(struct pci_dev *pdev) -{ - /* Nothing to do */ -} - static const struct pci_device_id cn10k_rng_id_table[] = { { PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, 0xA098) }, /* RNG PF */ {0,}, @@ -229,7 +224,6 @@ static struct pci_driver cn10k_rng_driver = { .name = "cn10k_rng", .id_table = cn10k_rng_id_table, .probe = cn10k_rng_probe, - .remove = cn10k_rng_remove, }; module_pci_driver(cn10k_rng_driver); From 81511798bdfb1a61f97569436789721aace942fb Mon Sep 17 00:00:00 2001 From: Martin Kaiser Date: Fri, 21 Jul 2023 10:54:44 +0200 Subject: [PATCH 212/656] hwrng: cn10k - use dev_err_probe Use dev_err_probe in error paths of the probe function, making the code a tiny bit simpler. Signed-off-by: Martin Kaiser Signed-off-by: Herbert Xu --- drivers/char/hw_random/cn10k-rng.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/drivers/char/hw_random/cn10k-rng.c b/drivers/char/hw_random/cn10k-rng.c index 794ec77feb2c..31935316a160 100644 --- a/drivers/char/hw_random/cn10k-rng.c +++ b/drivers/char/hw_random/cn10k-rng.c @@ -187,10 +187,8 @@ static int cn10k_rng_probe(struct pci_dev *pdev, const struct pci_device_id *id) pci_set_drvdata(pdev, rng); rng->reg_base = pcim_iomap(pdev, 0, 0); - if (!rng->reg_base) { - dev_err(&pdev->dev, "Error while mapping CSRs, exiting\n"); - return -ENOMEM; - } + if (!rng->reg_base) + return dev_err_probe(&pdev->dev, -ENOMEM, "Error while mapping CSRs, exiting\n"); rng->ops.name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "cn10k-rng-%s", dev_name(&pdev->dev)); @@ -205,10 +203,8 @@ static int cn10k_rng_probe(struct pci_dev *pdev, const struct pci_device_id *id) reset_rng_health_state(rng); err = devm_hwrng_register(&pdev->dev, &rng->ops); - if (err) { - dev_err(&pdev->dev, "Could not register hwrng device.\n"); - return err; - } + if (err) + return dev_err_probe(&pdev->dev, err, "Could not register hwrng device.\n"); return 0; } From 6df04505f3b285f3bcfe81cf0461339b0f4ed41d Mon Sep 17 00:00:00 2001 From: Christophe JAILLET Date: Sat, 22 Jul 2023 16:53:58 +0200 Subject: [PATCH 213/656] crypto: caam - Use struct_size() Use struct_size() instead of hand-writing it, when allocating a structure with a flex array. This is less verbose, more robust and more informative. Signed-off-by: Christophe JAILLET Reviewed-by: Gaurav Jain Signed-off-by: Herbert Xu --- drivers/crypto/caam/caamhash.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/crypto/caam/caamhash.c b/drivers/crypto/caam/caamhash.c index 80deb003f0a5..9e5924e24f2e 100644 --- a/drivers/crypto/caam/caamhash.c +++ b/drivers/crypto/caam/caamhash.c @@ -708,9 +708,8 @@ static struct ahash_edesc *ahash_edesc_alloc(struct ahash_request *req, gfp_t flags = (req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP) ? GFP_KERNEL : GFP_ATOMIC; struct ahash_edesc *edesc; - unsigned int sg_size = sg_num * sizeof(struct sec4_sg_entry); - edesc = kzalloc(sizeof(*edesc) + sg_size, flags); + edesc = kzalloc(struct_size(edesc, sec4_sg, sg_num), flags); if (!edesc) { dev_err(ctx->jrdev, "could not allocate extended descriptor\n"); return NULL; From 3de0152bf26ff0c5083ef831ba7676fc4c92e63a Mon Sep 17 00:00:00 2001 From: Christophe JAILLET Date: Sat, 22 Jul 2023 16:53:59 +0200 Subject: [PATCH 214/656] crypto: caam - Remove messages related to memory allocation failure On memory allocation failure, the function calling stack is already logged. So there is no need to explicitly log an extra message. Remove them, ans simplify some code accordingly. Signed-off-by: Christophe JAILLET Reviewed-by: Gaurav Jain Signed-off-by: Herbert Xu --- drivers/crypto/caam/caamhash.c | 14 +++----------- 1 file changed, 3 insertions(+), 11 deletions(-) diff --git a/drivers/crypto/caam/caamhash.c b/drivers/crypto/caam/caamhash.c index 9e5924e24f2e..641c3afd59ca 100644 --- a/drivers/crypto/caam/caamhash.c +++ b/drivers/crypto/caam/caamhash.c @@ -368,10 +368,8 @@ static int hash_digest_key(struct caam_hash_ctx *ctx, u32 *keylen, u8 *key, int ret; desc = kmalloc(CAAM_CMD_SZ * 8 + CAAM_PTR_SZ * 2, GFP_KERNEL); - if (!desc) { - dev_err(jrdev, "unable to allocate key input memory\n"); + if (!desc) return -ENOMEM; - } init_job_desc(desc, 0); @@ -702,18 +700,14 @@ static struct ahash_edesc *ahash_edesc_alloc(struct ahash_request *req, int sg_num, u32 *sh_desc, dma_addr_t sh_desc_dma) { - struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); - struct caam_hash_ctx *ctx = crypto_ahash_ctx_dma(ahash); struct caam_hash_state *state = ahash_request_ctx_dma(req); gfp_t flags = (req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP) ? GFP_KERNEL : GFP_ATOMIC; struct ahash_edesc *edesc; edesc = kzalloc(struct_size(edesc, sec4_sg, sg_num), flags); - if (!edesc) { - dev_err(ctx->jrdev, "could not allocate extended descriptor\n"); + if (!edesc) return NULL; - } state->edesc = edesc; @@ -1908,10 +1902,8 @@ caam_hash_alloc(struct caam_hash_template *template, struct crypto_alg *alg; t_alg = kzalloc(sizeof(*t_alg), GFP_KERNEL); - if (!t_alg) { - pr_err("failed to allocate t_alg\n"); + if (!t_alg) return ERR_PTR(-ENOMEM); - } t_alg->ahash_alg = template->template_ahash; halg = &t_alg->ahash_alg; From 026badeb7055e41000e4b139833ca5bafe360eb6 Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Fri, 28 Jul 2023 08:08:04 +0200 Subject: [PATCH 215/656] spi: fspi: Add power-domains to the DT bindings i.MX8(X) based SoC use a power domain. Allow supplying this domain in bindings. Signed-off-by: Alexander Stein Acked-by: Han Xu Link: https://lore.kernel.org/r/20230728060804.22796-1-alexander.stein@ew.tq-group.com Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml b/Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml index a813c971ecf6..7fd591145480 100644 --- a/Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml +++ b/Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml @@ -45,6 +45,9 @@ properties: - const: fspi_en - const: fspi + power-domains: + maxItems: 1 + required: - compatible - reg From 71ee2a4f95e205bd33e79c7bd4bece3885e0e366 Mon Sep 17 00:00:00 2001 From: Chen Jiahao Date: Fri, 28 Jul 2023 15:57:29 +0800 Subject: [PATCH 216/656] spi: microchip-core: Clean up redundant dev_err_probe() Refering to platform_get_irq()'s definition, the return value has already been checked if ret < 0, and printed via dev_err_probe(). Calling dev_err_probe() one more time outside platform_get_irq() is obviously redundant. Furthermore, platform_get_irq() will never return irq equals 0, removing spi->irq == 0 checking to clean it up. Signed-off-by: Chen Jiahao Reviewed-by: Conor Dooley Link: https://lore.kernel.org/r/20230728075729.3451867-1-chenjiahao16@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-microchip-core.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-microchip-core.c b/drivers/spi/spi-microchip-core.c index b59e8a0c5b97..b451cd4860ec 100644 --- a/drivers/spi/spi-microchip-core.c +++ b/drivers/spi/spi-microchip-core.c @@ -530,10 +530,8 @@ static int mchp_corespi_probe(struct platform_device *pdev) return PTR_ERR(spi->regs); spi->irq = platform_get_irq(pdev, 0); - if (spi->irq <= 0) - return dev_err_probe(&pdev->dev, -ENXIO, - "invalid IRQ %d for SPI controller\n", - spi->irq); + if (spi->irq < 0) + return spi->irq; ret = devm_request_irq(&pdev->dev, spi->irq, mchp_corespi_interrupt, IRQF_SHARED, dev_name(&pdev->dev), master); From 291bc793a0083ce69acc7ceb77c9ec7af4401093 Mon Sep 17 00:00:00 2001 From: Ruan Jinjie Date: Thu, 27 Jul 2023 20:40:43 +0800 Subject: [PATCH 217/656] gpio: omap: Remove redundant dev_err_probe() and zero value handle code There is no need to call the dev_err_probe() function directly to print a custom message when handling an error from platform_get_irq() function as it is going to display an appropriate error message in case of a failure. And the code to handle bank->irq = 0 is redundant because platform_get_irq() do not return 0. Signed-off-by: Ruan Jinjie Reviewed-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-omap.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index 2b78fde74e30..a927680c66f8 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -1412,11 +1412,8 @@ static int omap_gpio_probe(struct platform_device *pdev) bank->dev = dev; bank->irq = platform_get_irq(pdev, 0); - if (bank->irq <= 0) { - if (!bank->irq) - bank->irq = -ENXIO; - return dev_err_probe(dev, bank->irq, "can't get irq resource\n"); - } + if (bank->irq < 0) + return bank->irq; bank->chip.parent = dev; bank->chip.owner = THIS_MODULE; From 451c923d4c638a2f8215fea35e10f2dcd921a577 Mon Sep 17 00:00:00 2001 From: Okan Sahin Date: Thu, 27 Jul 2023 12:54:29 +0300 Subject: [PATCH 218/656] dt-bindings: gpio: ds4520: Add ADI DS4520 Add ADI DS4520 devicetree document. Signed-off-by: Okan Sahin Reviewed-by: Krzysztof Kozlowski Reviewed-by: Linus Walleij Signed-off-by: Bartosz Golaszewski --- .../bindings/gpio/adi,ds4520-gpio.yaml | 51 +++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/adi,ds4520-gpio.yaml diff --git a/Documentation/devicetree/bindings/gpio/adi,ds4520-gpio.yaml b/Documentation/devicetree/bindings/gpio/adi,ds4520-gpio.yaml new file mode 100644 index 000000000000..25b3198c4d3e --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/adi,ds4520-gpio.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/adi,ds4520-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: DS4520 I2C GPIO expander + +maintainers: + - Okan Sahin + +properties: + compatible: + enum: + - adi,ds4520-gpio + + reg: + maxItems: 1 + + gpio-controller: true + + "#gpio-cells": + const: 2 + + ngpios: + minimum: 1 + maximum: 9 + +required: + - compatible + - reg + - gpio-controller + - "#gpio-cells" + - ngpios + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + gpio@50 { + compatible = "adi,ds4520-gpio"; + reg = <0x50>; + ngpios = <9>; + gpio-controller; + #gpio-cells = <2>; + }; + }; From 659ad5f7efece8f92213ca069c494a37507c8c67 Mon Sep 17 00:00:00 2001 From: Okan Sahin Date: Sat, 29 Jul 2023 15:56:33 +0200 Subject: [PATCH 219/656] gpio: ds4520: Add ADI DS4520 GPIO Expander Support The DS4520 is a 9-bit nonvolatile (NV) I/O expander. It offers users a digitally programmable alternative to hardware jumpers and mechanical switches that are being used to control digital logic node. Signed-off-by: Okan Sahin Signed-off-by: Bartosz Golaszewski --- drivers/gpio/Kconfig | 11 ++++++ drivers/gpio/Makefile | 1 + drivers/gpio/gpio-ds4520.c | 80 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 92 insertions(+) create mode 100644 drivers/gpio/gpio-ds4520.c diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 61a8d07e5a1c..c5324e44b74e 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -1029,6 +1029,17 @@ config GPIO_FXL6408 To compile this driver as a module, choose M here: the module will be called gpio-fxl6408. +config GPIO_DS4520 + tristate "DS4520 I2C GPIO expander" + select REGMAP_I2C + select GPIO_REGMAP + help + GPIO driver for ADI DS4520 I2C-based GPIO expander. + Say yes here to enable the GPIO driver for the ADI DS4520 chip. + + To compile this driver as a module, choose M here: the module will + be called gpio-ds4520. + config GPIO_GW_PLD tristate "Gateworks PLD GPIO Expander" depends on OF_GPIO diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index c3ac51d47aa9..eb73b5d633eb 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -52,6 +52,7 @@ obj-$(CONFIG_GPIO_DA9052) += gpio-da9052.o obj-$(CONFIG_GPIO_DA9055) += gpio-da9055.o obj-$(CONFIG_GPIO_DAVINCI) += gpio-davinci.o obj-$(CONFIG_GPIO_DLN2) += gpio-dln2.o +obj-$(CONFIG_GPIO_DS4520) += gpio-ds4520.o obj-$(CONFIG_GPIO_DWAPB) += gpio-dwapb.o obj-$(CONFIG_GPIO_EIC_SPRD) += gpio-eic-sprd.o obj-$(CONFIG_GPIO_ELKHARTLAKE) += gpio-elkhartlake.o diff --git a/drivers/gpio/gpio-ds4520.c b/drivers/gpio/gpio-ds4520.c new file mode 100644 index 000000000000..1903deaef3e9 --- /dev/null +++ b/drivers/gpio/gpio-ds4520.c @@ -0,0 +1,80 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (c) 2023 Analog Devices, Inc. + * Driver for the DS4520 I/O Expander + */ + +#include +#include +#include +#include +#include +#include + +#define DS4520_PULLUP0 0xF0 +#define DS4520_IO_CONTROL0 0xF2 +#define DS4520_IO_STATUS0 0xF8 + +static const struct regmap_config ds4520_regmap_config = { + .reg_bits = 8, + .val_bits = 8, +}; + +static int ds4520_gpio_probe(struct i2c_client *client) +{ + struct gpio_regmap_config config = { }; + struct device *dev = &client->dev; + struct regmap *regmap; + u32 ngpio; + u32 base; + int ret; + + ret = device_property_read_u32(dev, "reg", &base); + if (ret) + return dev_err_probe(dev, ret, "Missing 'reg' property.\n"); + + ret = device_property_read_u32(dev, "ngpios", &ngpio); + if (ret) + return dev_err_probe(dev, ret, "Missing 'ngpios' property.\n"); + + regmap = devm_regmap_init_i2c(client, &ds4520_regmap_config); + if (IS_ERR(regmap)) + return dev_err_probe(dev, PTR_ERR(regmap), + "Failed to allocate register map\n"); + + config.regmap = regmap; + config.parent = dev; + config.ngpio = ngpio; + + config.reg_dat_base = base + DS4520_IO_STATUS0; + config.reg_set_base = base + DS4520_PULLUP0; + config.reg_dir_out_base = base + DS4520_IO_CONTROL0; + + return PTR_ERR_OR_ZERO(devm_gpio_regmap_register(dev, &config)); +} + +static const struct of_device_id ds4520_gpio_of_match_table[] = { + { .compatible = "adi,ds4520-gpio" }, + { } +}; +MODULE_DEVICE_TABLE(of, ds4520_gpio_of_match_table); + +static const struct i2c_device_id ds4520_gpio_id_table[] = { + { "ds4520-gpio" }, + { } +}; +MODULE_DEVICE_TABLE(i2c, ds4520_gpio_id_table); + +static struct i2c_driver ds4520_gpio_driver = { + .driver = { + .name = "ds4520-gpio", + .of_match_table = ds4520_gpio_of_match_table, + }, + .probe = ds4520_gpio_probe, + .id_table = ds4520_gpio_id_table, +}; +module_i2c_driver(ds4520_gpio_driver); + +MODULE_DESCRIPTION("DS4520 I/O Expander"); +MODULE_AUTHOR("Okan Sahin "); +MODULE_LICENSE("GPL"); From 73561d281631630748fd94bca120a79076b52266 Mon Sep 17 00:00:00 2001 From: Ruan Jinjie Date: Thu, 27 Jul 2023 19:57:26 +0800 Subject: [PATCH 220/656] gpio: davinci: Remove redundant dev_err_probe() There is no need to call the dev_err_probe() function directly to print a custom message when handling an error from platform_get_irq() function as it is going to display an appropriate error message in case of a failure. Signed-off-by: Ruan Jinjie Reviewed-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-davinci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-davinci.c b/drivers/gpio/gpio-davinci.c index fff510d86e31..8db5717bdabe 100644 --- a/drivers/gpio/gpio-davinci.c +++ b/drivers/gpio/gpio-davinci.c @@ -236,7 +236,7 @@ static int davinci_gpio_probe(struct platform_device *pdev) for (i = 0; i < nirq; i++) { chips->irqs[i] = platform_get_irq(pdev, i); if (chips->irqs[i] < 0) - return dev_err_probe(dev, chips->irqs[i], "IRQ not populated\n"); + return chips->irqs[i]; } chips->chip.label = dev_name(dev); From e5780d80ce1d86298e5ad5a91264276bff8c9179 Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Mon, 24 Jul 2023 08:35:19 +0200 Subject: [PATCH 221/656] dt-bindings: gpio: Add gpio-line-names to STMPE GPIO This is a gpio-controller, so gpio-line-names should be allowed as well. stmpe2403 supports up to 24 GPIOs. Signed-off-by: Alexander Stein Reviewed-by: Krzysztof Kozlowski Signed-off-by: Bartosz Golaszewski --- Documentation/devicetree/bindings/gpio/st,stmpe-gpio.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/gpio/st,stmpe-gpio.yaml b/Documentation/devicetree/bindings/gpio/st,stmpe-gpio.yaml index 22c0cae73425..4555f1644a4d 100644 --- a/Documentation/devicetree/bindings/gpio/st,stmpe-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/st,stmpe-gpio.yaml @@ -28,6 +28,10 @@ properties: gpio-controller: true + gpio-line-names: + minItems: 1 + maxItems: 24 + interrupt-controller: true st,norequest-mask: From 28e6c5b86ac3756235b9a0ae6b1409f6ac33cd09 Mon Sep 17 00:00:00 2001 From: Alexandru Ardelean Date: Wed, 12 Jul 2023 12:48:57 +0300 Subject: [PATCH 222/656] gpio: 74xx-mmio: remove unneeded platform_set_drvdata() call The platform_set_drvdata() was needed when the driver had an explicit remove function. That function got removed a while back, so we don't need to keep a pointer (on 'dev->driver_data') for the private data of the driver anymore. Signed-off-by: Alexandru Ardelean Reviewed-by: Andy Shevchenko Reviewed-by: Linus Walleij Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-74xx-mmio.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpio/gpio-74xx-mmio.c b/drivers/gpio/gpio-74xx-mmio.c index 0464f1ecd20d..c7ac5a9ffb1f 100644 --- a/drivers/gpio/gpio-74xx-mmio.c +++ b/drivers/gpio/gpio-74xx-mmio.c @@ -135,8 +135,6 @@ static int mmio_74xx_gpio_probe(struct platform_device *pdev) priv->gc.ngpio = MMIO_74XX_BIT_CNT(priv->flags); priv->gc.owner = THIS_MODULE; - platform_set_drvdata(pdev, priv); - return devm_gpiochip_add_data(&pdev->dev, &priv->gc, priv); } From ba8a90e8cb8ca4db4e57be6b53aa8c364137b38c Mon Sep 17 00:00:00 2001 From: Andrei Coardos Date: Wed, 19 Jul 2023 12:39:23 +0300 Subject: [PATCH 223/656] gpio: exar: remove unneeded platform_set_drvdata() call The platform_set_drvdata() was needed when the driver had an explicit remove function. That function got removed a while back, so we don't need to keep a pointer (on 'dev->driver_data') for the private data of the driver anymore. Reviewed-by: Alexandru Ardelean Signed-off-by: Andrei Coardos Reviewed-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-exar.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpio/gpio-exar.c b/drivers/gpio/gpio-exar.c index df1bdaae441c..5170fe7599cd 100644 --- a/drivers/gpio/gpio-exar.c +++ b/drivers/gpio/gpio-exar.c @@ -217,8 +217,6 @@ static int gpio_exar_probe(struct platform_device *pdev) if (ret) return ret; - platform_set_drvdata(pdev, exar_gpio); - return 0; } From 8020619ad785c87e807ca9f782238294c2a602e0 Mon Sep 17 00:00:00 2001 From: Andrei Coardos Date: Wed, 19 Jul 2023 12:48:03 +0300 Subject: [PATCH 224/656] gpio: logicvc: remove unneeded platform_set_drvdata() call The platform_set_drvdata() isn't needed for anything. The function is a simple setter that doesn't change anything in the code. That is because there isn't a get function and since it has no dependencies it can be removed. Reviewed-by: Alexandru Ardelean Signed-off-by: Andrei Coardos Reviewed-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-logicvc.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpio/gpio-logicvc.c b/drivers/gpio/gpio-logicvc.c index 2b9876bc1383..05d62011f335 100644 --- a/drivers/gpio/gpio-logicvc.c +++ b/drivers/gpio/gpio-logicvc.c @@ -138,8 +138,6 @@ static int logicvc_gpio_probe(struct platform_device *pdev) logicvc->chip.set = logicvc_gpio_set; logicvc->chip.direction_output = logicvc_gpio_direction_output; - platform_set_drvdata(pdev, logicvc); - return devm_gpiochip_add_data(dev, &logicvc->chip, logicvc); } From c456c4d9707a0bd484a1af30188f5c416fc394f0 Mon Sep 17 00:00:00 2001 From: Andrei Coardos Date: Mon, 17 Jul 2023 15:10:04 +0300 Subject: [PATCH 225/656] gpio: eic-sprd: remove unneeded platform_set_drvdata() call The platform_set_drvdata() call was never used, ever since the driver was originally added. It looks like this copy+paste left-over. Possibly the author copied from a driver that had this line, but also had a remove hook. Reviewed-by: Alexandru Ardelean Signed-off-by: Andrei Coardos Reviewed-by: Andy Shevchenko Reviewed-by: Baolin Wang Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-eic-sprd.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpio/gpio-eic-sprd.c b/drivers/gpio/gpio-eic-sprd.c index 67b1e09e8985..5320cf1de89c 100644 --- a/drivers/gpio/gpio-eic-sprd.c +++ b/drivers/gpio/gpio-eic-sprd.c @@ -653,7 +653,6 @@ static int sprd_eic_probe(struct platform_device *pdev) return ret; } - platform_set_drvdata(pdev, sprd_eic); return 0; } From 893aa09ee5959533d8e51e06b1bde35286edaf70 Mon Sep 17 00:00:00 2001 From: Wang Ming Date: Wed, 26 Jul 2023 18:54:47 +0800 Subject: [PATCH 226/656] spi: Use dev_err_probe instead of dev_err It is possible that dma_request_chan will return EPROBE_DEFER, which means that dev is not ready yet. In this case, dev_err(dev), there will be no output. This patch fixes the bug. Signed-off-by: Wang Ming Link: https://lore.kernel.org/r/20230726105457.3743-1-machel@vivo.com Signed-off-by: Mark Brown --- drivers/spi/spi-bcm2835.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-bcm2835.c b/drivers/spi/spi-bcm2835.c index 83fd062fc491..c16abc2a9e9b 100644 --- a/drivers/spi/spi-bcm2835.c +++ b/drivers/spi/spi-bcm2835.c @@ -903,15 +903,15 @@ static int bcm2835_dma_init(struct spi_controller *ctlr, struct device *dev, /* get tx/rx dma */ ctlr->dma_tx = dma_request_chan(dev, "tx"); if (IS_ERR(ctlr->dma_tx)) { - dev_err(dev, "no tx-dma configuration found - not using dma mode\n"); - ret = PTR_ERR(ctlr->dma_tx); + ret = dev_err_probe(dev, PTR_ERR(ctlr->dma_tx), + "no tx-dma configuration found - not using dma mode\n"); ctlr->dma_tx = NULL; goto err; } ctlr->dma_rx = dma_request_chan(dev, "rx"); if (IS_ERR(ctlr->dma_rx)) { - dev_err(dev, "no rx-dma configuration found - not using dma mode\n"); - ret = PTR_ERR(ctlr->dma_rx); + ret = dev_err_probe(dev, PTR_ERR(ctlr->dma_rx), + "no rx-dma configuration found - not using dma mode\n"); ctlr->dma_rx = NULL; goto err_release; } From 59bbe86bb212b618ec2b50434f54bb4cfc704f44 Mon Sep 17 00:00:00 2001 From: Praveen Talari Date: Fri, 14 Jul 2023 09:52:02 +0530 Subject: [PATCH 227/656] soc: qcom: geni-se: Add SPI Device mode support for GENI based QuPv3 Add device mode supported registers and masks. Signed-off-by: Praveen Talari Reviewed-by: Vijaya Krishna Nivarthi Link: https://lore.kernel.org/r/20230714042203.14251-2-quic_ptalari@quicinc.com Signed-off-by: Mark Brown --- include/linux/soc/qcom/geni-se.h | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/include/linux/soc/qcom/geni-se.h b/include/linux/soc/qcom/geni-se.h index 821a19135bb6..29e06905bc1f 100644 --- a/include/linux/soc/qcom/geni-se.h +++ b/include/linux/soc/qcom/geni-se.h @@ -35,6 +35,7 @@ enum geni_se_protocol_type { GENI_SE_UART, GENI_SE_I2C, GENI_SE_I3C, + GENI_SE_SPI_SLAVE, }; struct geni_wrapper; @@ -73,12 +74,14 @@ struct geni_se { /* Common SE registers */ #define GENI_FORCE_DEFAULT_REG 0x20 +#define GENI_OUTPUT_CTRL 0x24 #define SE_GENI_STATUS 0x40 #define GENI_SER_M_CLK_CFG 0x48 #define GENI_SER_S_CLK_CFG 0x4c #define GENI_IF_DISABLE_RO 0x64 #define GENI_FW_REVISION_RO 0x68 #define SE_GENI_CLK_SEL 0x7c +#define SE_GENI_CFG_SEQ_START 0x84 #define SE_GENI_DMA_MODE_EN 0x258 #define SE_GENI_M_CMD0 0x600 #define SE_GENI_M_CMD_CTRL_REG 0x604 @@ -111,6 +114,9 @@ struct geni_se { /* GENI_FORCE_DEFAULT_REG fields */ #define FORCE_DEFAULT BIT(0) +/* GENI_OUTPUT_CTRL fields */ +#define GENI_IO_MUX_0_EN BIT(0) + /* GENI_STATUS fields */ #define M_GENI_CMD_ACTIVE BIT(0) #define S_GENI_CMD_ACTIVE BIT(12) @@ -130,6 +136,9 @@ struct geni_se { /* GENI_CLK_SEL fields */ #define CLK_SEL_MSK GENMASK(2, 0) +/* SE_GENI_CFG_SEQ_START fields */ +#define START_TRIGGER BIT(0) + /* SE_GENI_DMA_MODE_EN */ #define GENI_DMA_MODE_EN BIT(0) From d7f74cc31a89a45d4c7deaa5f759661a07a183d6 Mon Sep 17 00:00:00 2001 From: Praveen Talari Date: Fri, 14 Jul 2023 09:52:03 +0530 Subject: [PATCH 228/656] spi: spi-geni-qcom: Add SPI Device mode support for GENI based QuPv3 Currently spi geni driver supports only master mode operation. Add spi device mode support to GENI based QuPv3. Signed-off-by: Praveen Talari Reviewed-by: Vijaya Krishna Nivarthi Link: https://lore.kernel.org/r/20230714042203.14251-3-quic_ptalari@quicinc.com Signed-off-by: Mark Brown --- drivers/spi/spi-geni-qcom.c | 53 ++++++++++++++++++++++++++++++++----- 1 file changed, 47 insertions(+), 6 deletions(-) diff --git a/drivers/spi/spi-geni-qcom.c b/drivers/spi/spi-geni-qcom.c index 1df9d4844a68..f4f376a8351b 100644 --- a/drivers/spi/spi-geni-qcom.c +++ b/drivers/spi/spi-geni-qcom.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -52,6 +53,9 @@ #define SPI_CS_CLK_DELAY_MSK GENMASK(19, 10) #define SPI_CS_CLK_DELAY_SHFT 10 +#define SE_SPI_SLAVE_EN (0x2BC) +#define SPI_SLAVE_EN BIT(0) + /* M_CMD OP codes for SPI */ #define SPI_TX_ONLY 1 #define SPI_RX_ONLY 2 @@ -99,6 +103,16 @@ struct spi_geni_master { int cur_xfer_mode; }; +static void spi_slv_setup(struct spi_geni_master *mas) +{ + struct geni_se *se = &mas->se; + + writel(SPI_SLAVE_EN, se->base + SE_SPI_SLAVE_EN); + writel(GENI_IO_MUX_0_EN, se->base + GENI_OUTPUT_CTRL); + writel(START_TRIGGER, se->base + SE_GENI_CFG_SEQ_START); + dev_dbg(mas->dev, "spi slave setup done\n"); +} + static int get_spi_clk_cfg(unsigned int speed_hz, struct spi_geni_master *mas, unsigned int *clk_idx, @@ -140,12 +154,22 @@ static void handle_se_timeout(struct spi_master *spi, const struct spi_transfer *xfer; spin_lock_irq(&mas->lock); - reinit_completion(&mas->cancel_done); if (mas->cur_xfer_mode == GENI_SE_FIFO) writel(0, se->base + SE_GENI_TX_WATERMARK_REG); xfer = mas->cur_xfer; mas->cur_xfer = NULL; + + if (spi->slave) { + /* + * skip CMD Cancel sequnece since spi slave + * doesn`t support CMD Cancel sequnece + */ + spin_unlock_irq(&mas->lock); + goto unmap_if_dma; + } + + reinit_completion(&mas->cancel_done); geni_se_cancel_m_cmd(se); spin_unlock_irq(&mas->lock); @@ -542,6 +566,10 @@ static bool geni_can_dma(struct spi_controller *ctlr, if (mas->cur_xfer_mode == GENI_GPI_DMA) return true; + /* Set SE DMA mode for SPI slave. */ + if (ctlr->slave) + return true; + len = get_xfer_len_in_words(xfer, mas); fifo_size = mas->tx_fifo_depth * mas->fifo_width_bits / mas->cur_bits_per_word; @@ -619,6 +647,7 @@ static void spi_geni_release_dma_chan(struct spi_geni_master *mas) static int spi_geni_init(struct spi_geni_master *mas) { + struct spi_master *spi = dev_get_drvdata(mas->dev); struct geni_se *se = &mas->se; unsigned int proto, major, minor, ver; u32 spi_tx_cfg, fifo_disable; @@ -627,7 +656,14 @@ static int spi_geni_init(struct spi_geni_master *mas) pm_runtime_get_sync(mas->dev); proto = geni_se_read_proto(se); - if (proto != GENI_SE_SPI) { + + if (spi->slave) { + if (proto != GENI_SE_SPI_SLAVE) { + dev_err(mas->dev, "Invalid proto %d\n", proto); + goto out_pm; + } + spi_slv_setup(mas); + } else if (proto != GENI_SE_SPI) { dev_err(mas->dev, "Invalid proto %d\n", proto); goto out_pm; } @@ -679,9 +715,11 @@ static int spi_geni_init(struct spi_geni_master *mas) } /* We always control CS manually */ - spi_tx_cfg = readl(se->base + SE_SPI_TRANS_CFG); - spi_tx_cfg &= ~CS_TOGGLE; - writel(spi_tx_cfg, se->base + SE_SPI_TRANS_CFG); + if (!spi->slave) { + spi_tx_cfg = readl(se->base + SE_SPI_TRANS_CFG); + spi_tx_cfg &= ~CS_TOGGLE; + writel(spi_tx_cfg, se->base + SE_SPI_TRANS_CFG); + } out_pm: pm_runtime_put(mas->dev); @@ -1074,6 +1112,9 @@ static int spi_geni_probe(struct platform_device *pdev) pm_runtime_set_autosuspend_delay(&pdev->dev, 250); pm_runtime_enable(dev); + if (device_property_read_bool(&pdev->dev, "spi-slave")) + spi->slave = true; + ret = geni_icc_get(&mas->se, NULL); if (ret) goto spi_geni_probe_runtime_disable; @@ -1094,7 +1135,7 @@ static int spi_geni_probe(struct platform_device *pdev) * for dma (gsi) mode, the gsi will set cs based on params passed in * TRE */ - if (mas->cur_xfer_mode == GENI_SE_FIFO) + if (!spi->slave && mas->cur_xfer_mode == GENI_SE_FIFO) spi->set_cs = spi_geni_set_cs; /* From b350e6c6297aaa2533da23a21398751eeeecc101 Mon Sep 17 00:00:00 2001 From: Yinbo Zhu Date: Tue, 13 Jun 2023 15:58:33 +0800 Subject: [PATCH 229/656] spi: dt-bindings: add loongson spi Add the Loongson platform spi binding with DT schema format using json-schema. Signed-off-by: Yinbo Zhu Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230613075834.5219-2-zhuyinbo@loongson.cn Signed-off-by: Mark Brown --- .../bindings/spi/loongson,ls2k-spi.yaml | 46 +++++++++++++++++++ MAINTAINERS | 6 +++ 2 files changed, 52 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/loongson,ls2k-spi.yaml diff --git a/Documentation/devicetree/bindings/spi/loongson,ls2k-spi.yaml b/Documentation/devicetree/bindings/spi/loongson,ls2k-spi.yaml new file mode 100644 index 000000000000..de9d32feadf5 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/loongson,ls2k-spi.yaml @@ -0,0 +1,46 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/loongson,ls2k-spi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Loongson SPI controller + +maintainers: + - Yinbo Zhu + +allOf: + - $ref: /schemas/spi/spi-controller.yaml# + +properties: + compatible: + oneOf: + - enum: + - loongson,ls2k1000-spi + - items: + - enum: + - loongson,ls2k0500-spi + - const: loongson,ls2k1000-spi + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - clocks + +unevaluatedProperties: false + +examples: + - | + spi0: spi@1fff0220{ + compatible = "loongson,ls2k1000-spi"; + reg = <0x1fff0220 0x10>; + clocks = <&clk 17>; + #address-cells = <1>; + #size-cells = <0>; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 53b7ca804465..60c87a7bf709 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -12271,6 +12271,12 @@ F: Documentation/devicetree/bindings/clock/loongson,ls2k-clk.yaml F: drivers/clk/clk-loongson2.c F: include/dt-bindings/clock/loongson,ls2k-clk.h +LOONGSON SPI DRIVER +M: Yinbo Zhu +L: linux-spi@vger.kernel.org +S: Maintained +F: Documentation/devicetree/bindings/spi/loongson,ls2k-spi.yaml + LOONGSON-2 SOC SERIES GUTS DRIVER M: Yinbo Zhu L: loongarch@lists.linux.dev From 6c7a864007b66e60a3f64858a9555efed408b048 Mon Sep 17 00:00:00 2001 From: Yinbo Zhu Date: Tue, 13 Jun 2023 15:58:34 +0800 Subject: [PATCH 230/656] spi: loongson: add bus driver for the loongson spi controller This bus driver supports the Loongson SPI hardware controller in the Loongson platforms and supports the use DTS and PCI framework to register SPI device resources. Signed-off-by: Yinbo Zhu Cc: Andy Shevchenko Cc: Mark Brown Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230613075834.5219-3-zhuyinbo@loongson.cn Signed-off-by: Mark Brown --- MAINTAINERS | 4 + drivers/spi/Kconfig | 26 +++ drivers/spi/Makefile | 3 + drivers/spi/spi-loongson-core.c | 279 ++++++++++++++++++++++++++++++++ drivers/spi/spi-loongson-pci.c | 55 +++++++ drivers/spi/spi-loongson-plat.c | 47 ++++++ drivers/spi/spi-loongson.h | 49 ++++++ 7 files changed, 463 insertions(+) create mode 100644 drivers/spi/spi-loongson-core.c create mode 100644 drivers/spi/spi-loongson-pci.c create mode 100644 drivers/spi/spi-loongson-plat.c create mode 100644 drivers/spi/spi-loongson.h diff --git a/MAINTAINERS b/MAINTAINERS index 60c87a7bf709..6578fabb936f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -12276,6 +12276,10 @@ M: Yinbo Zhu L: linux-spi@vger.kernel.org S: Maintained F: Documentation/devicetree/bindings/spi/loongson,ls2k-spi.yaml +F: drivers/spi/spi-loongson-core.c +F: drivers/spi/spi-loongson-pci.c +F: drivers/spi/spi-loongson-plat.c +F: drivers/spi/spi-loongson.h LOONGSON-2 SOC SERIES GUTS DRIVER M: Yinbo Zhu diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 8962b2557615..a364fb8f1778 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -516,6 +516,32 @@ config SPI_LM70_LLP which interfaces to an LM70 temperature sensor using a parallel port. +config SPI_LOONGSON_CORE + tristate + depends on LOONGARCH || COMPILE_TEST + +config SPI_LOONGSON_PCI + tristate "Loongson SPI Controller PCI Driver Support" + select SPI_LOONGSON_CORE + depends on PCI && (LOONGARCH || COMPILE_TEST) + help + This bus driver supports the Loongson SPI hardware controller in + the Loongson platforms and supports to use PCI framework to + register SPI device resources. + Say Y or M here if you want to use the SPI controller on + Loongson platform. + +config SPI_LOONGSON_PLATFORM + tristate "Loongson SPI Controller Platform Driver Support" + select SPI_LOONGSON_CORE + depends on OF && (LOONGARCH || COMPILE_TEST) + help + This bus driver supports the Loongson SPI hardware controller in + the Loongson platforms and supports to use DTS framework to + register SPI device resources. + Say Y or M here if you want to use the SPI controller on + Loongson platform. + config SPI_LP8841_RTC tristate "ICP DAS LP-8841 SPI Controller for RTC" depends on MACH_PXA27X_DT || COMPILE_TEST diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 080c2c1b3ec1..b0a6669dd318 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -71,6 +71,9 @@ obj-$(CONFIG_SPI_INTEL_PLATFORM) += spi-intel-platform.o obj-$(CONFIG_SPI_LANTIQ_SSC) += spi-lantiq-ssc.o obj-$(CONFIG_SPI_JCORE) += spi-jcore.o obj-$(CONFIG_SPI_LM70_LLP) += spi-lm70llp.o +obj-$(CONFIG_SPI_LOONGSON_CORE) += spi-loongson-core.o +obj-$(CONFIG_SPI_LOONGSON_PCI) += spi-loongson-pci.o +obj-$(CONFIG_SPI_LOONGSON_PLATFORM) += spi-loongson-plat.o obj-$(CONFIG_SPI_LP8841_RTC) += spi-lp8841-rtc.o obj-$(CONFIG_SPI_MESON_SPICC) += spi-meson-spicc.o obj-$(CONFIG_SPI_MESON_SPIFC) += spi-meson-spifc.o diff --git a/drivers/spi/spi-loongson-core.c b/drivers/spi/spi-loongson-core.c new file mode 100644 index 000000000000..f97800b6fd65 --- /dev/null +++ b/drivers/spi/spi-loongson-core.c @@ -0,0 +1,279 @@ +// SPDX-License-Identifier: GPL-2.0+ +// Loongson SPI Support +// Copyright (C) 2023 Loongson Technology Corporation Limited + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "spi-loongson.h" + +static inline void loongson_spi_write_reg(struct loongson_spi *spi, unsigned char reg, + unsigned char data) +{ + writeb(data, spi->base + reg); +} + +static inline char loongson_spi_read_reg(struct loongson_spi *spi, unsigned char reg) +{ + return readb(spi->base + reg); +} + +static void loongson_spi_set_cs(struct spi_device *spi, bool en) +{ + int cs; + unsigned char mask = (BIT(4) | BIT(0)) << spi_get_chipselect(spi, 0); + unsigned char val = en ? mask : (BIT(0) << spi_get_chipselect(spi, 0)); + struct loongson_spi *loongson_spi = spi_controller_get_devdata(spi->controller); + + cs = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_SFCS_REG) & ~mask; + loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_SFCS_REG, val | cs); +} + +static void loongson_spi_set_clk(struct loongson_spi *loongson_spi, unsigned int hz) +{ + unsigned char val; + unsigned int div, div_tmp; + static const char rdiv[12] = {0, 1, 4, 2, 3, 5, 6, 7, 8, 9, 10, 11}; + + div = clamp_val(DIV_ROUND_UP_ULL(loongson_spi->clk_rate, hz), 2, 4096); + div_tmp = rdiv[fls(div - 1)]; + loongson_spi->spcr = (div_tmp & GENMASK(1, 0)) >> 0; + loongson_spi->sper = (div_tmp & GENMASK(3, 2)) >> 2; + val = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_SPCR_REG); + val &= ~GENMASK(1, 0); + loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_SPCR_REG, val | + loongson_spi->spcr); + val = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_SPER_REG); + val &= ~GENMASK(1, 0); + loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_SPER_REG, val | + loongson_spi->sper); + loongson_spi->hz = hz; +} + +static void loongson_spi_set_mode(struct loongson_spi *loongson_spi, + struct spi_device *spi) +{ + unsigned char val; + + val = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_SPCR_REG); + val &= ~(LOONGSON_SPI_SPCR_CPOL | LOONGSON_SPI_SPCR_CPHA); + if (spi->mode & SPI_CPOL) + val |= LOONGSON_SPI_SPCR_CPOL; + if (spi->mode & SPI_CPHA) + val |= LOONGSON_SPI_SPCR_CPHA; + + loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_SPCR_REG, val); + loongson_spi->mode |= spi->mode; +} + +static int loongson_spi_update_state(struct loongson_spi *loongson_spi, + struct spi_device *spi, struct spi_transfer *t) +{ + if (t && loongson_spi->hz != t->speed_hz) + loongson_spi_set_clk(loongson_spi, t->speed_hz); + + if ((spi->mode ^ loongson_spi->mode) & SPI_MODE_X_MASK) + loongson_spi_set_mode(loongson_spi, spi); + + return 0; +} + +static int loongson_spi_setup(struct spi_device *spi) +{ + struct loongson_spi *loongson_spi; + + loongson_spi = spi_controller_get_devdata(spi->controller); + if (spi->bits_per_word % 8) + return -EINVAL; + + if (spi_get_chipselect(spi, 0) >= spi->controller->num_chipselect) + return -EINVAL; + + loongson_spi->hz = 0; + loongson_spi_set_cs(spi, true); + + return 0; +} + +static int loongson_spi_write_read_8bit(struct spi_device *spi, const u8 **tx_buf, + u8 **rx_buf, unsigned int num) +{ + int ret; + struct loongson_spi *loongson_spi = spi_controller_get_devdata(spi->controller); + + if (tx_buf && *tx_buf) + loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_FIFO_REG, *((*tx_buf)++)); + else + loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_FIFO_REG, 0); + + ret = readb_poll_timeout(loongson_spi->base + LOONGSON_SPI_SPSR_REG, + loongson_spi->spsr, (loongson_spi->spsr & + LOONGSON_SPI_SPSR_RFEMPTY) != LOONGSON_SPI_SPSR_RFEMPTY, + 1, USEC_PER_MSEC); + + if (rx_buf && *rx_buf) + *(*rx_buf)++ = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_FIFO_REG); + else + loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_FIFO_REG); + + return ret; +} + +static int loongson_spi_write_read(struct spi_device *spi, struct spi_transfer *xfer) +{ + int ret; + unsigned int count; + const u8 *tx = xfer->tx_buf; + u8 *rx = xfer->rx_buf; + + count = xfer->len; + do { + ret = loongson_spi_write_read_8bit(spi, &tx, &rx, count); + if (ret) + break; + } while (--count); + + return ret; +} + +static int loongson_spi_prepare_message(struct spi_controller *ctlr, struct spi_message *m) +{ + struct loongson_spi *loongson_spi = spi_controller_get_devdata(ctlr); + + loongson_spi->para = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_PARA_REG); + loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_PARA_REG, loongson_spi->para & + ~LOONGSON_SPI_PARA_MEM_EN); + + return 0; +} + +static int loongson_spi_transfer_one(struct spi_controller *ctrl, struct spi_device *spi, + struct spi_transfer *xfer) +{ + struct loongson_spi *loongson_spi = spi_controller_get_devdata(spi->controller); + + loongson_spi_update_state(loongson_spi, spi, xfer); + if (xfer->len) + return loongson_spi_write_read(spi, xfer); + + return 0; +} + +static int loongson_spi_unprepare_message(struct spi_controller *ctrl, struct spi_message *m) +{ + struct loongson_spi *loongson_spi = spi_controller_get_devdata(ctrl); + + loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_PARA_REG, loongson_spi->para); + + return 0; +} + +static void loongson_spi_reginit(struct loongson_spi *loongson_spi_dev) +{ + unsigned char val; + + val = loongson_spi_read_reg(loongson_spi_dev, LOONGSON_SPI_SPCR_REG); + val &= ~LOONGSON_SPI_SPCR_SPE; + loongson_spi_write_reg(loongson_spi_dev, LOONGSON_SPI_SPCR_REG, val); + + loongson_spi_write_reg(loongson_spi_dev, LOONGSON_SPI_SPSR_REG, + (LOONGSON_SPI_SPSR_SPIF | LOONGSON_SPI_SPSR_WCOL)); + + val = loongson_spi_read_reg(loongson_spi_dev, LOONGSON_SPI_SPCR_REG); + val |= LOONGSON_SPI_SPCR_SPE; + loongson_spi_write_reg(loongson_spi_dev, LOONGSON_SPI_SPCR_REG, val); +} + +int loongson_spi_init_controller(struct device *dev, void __iomem *regs) +{ + struct spi_controller *controller; + struct loongson_spi *spi; + struct clk *clk; + + controller = devm_spi_alloc_host(dev, sizeof(struct loongson_spi)); + if (controller == NULL) + return -ENOMEM; + + controller->mode_bits = SPI_MODE_X_MASK | SPI_CS_HIGH; + controller->setup = loongson_spi_setup; + controller->prepare_message = loongson_spi_prepare_message; + controller->transfer_one = loongson_spi_transfer_one; + controller->unprepare_message = loongson_spi_unprepare_message; + controller->set_cs = loongson_spi_set_cs; + controller->num_chipselect = 4; + device_set_node(&controller->dev, dev_fwnode(dev)); + dev_set_drvdata(dev, controller); + + spi = spi_controller_get_devdata(controller); + spi->base = regs; + spi->controller = controller; + + clk = devm_clk_get_optional(dev, NULL); + if (IS_ERR(clk)) + return dev_err_probe(dev, PTR_ERR(clk), "unable to get clock\n"); + + spi->clk_rate = clk_get_rate(clk); + loongson_spi_reginit(spi); + + spi->mode = 0; + + return devm_spi_register_controller(dev, controller); +} +EXPORT_SYMBOL_NS_GPL(loongson_spi_init_controller, SPI_LOONGSON_CORE); + +static int __maybe_unused loongson_spi_suspend(struct device *dev) +{ + struct loongson_spi *loongson_spi; + struct spi_controller *controller; + + controller = dev_get_drvdata(dev); + spi_controller_suspend(controller); + + loongson_spi = spi_controller_get_devdata(controller); + + loongson_spi->spcr = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_SPCR_REG); + loongson_spi->sper = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_SPER_REG); + loongson_spi->spsr = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_SPSR_REG); + loongson_spi->para = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_PARA_REG); + loongson_spi->sfcs = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_SFCS_REG); + loongson_spi->timi = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_TIMI_REG); + + return 0; +} + +static int __maybe_unused loongson_spi_resume(struct device *dev) +{ + struct loongson_spi *loongson_spi; + struct spi_controller *controller; + + controller = dev_get_drvdata(dev); + loongson_spi = spi_controller_get_devdata(controller); + + loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_SPCR_REG, loongson_spi->spcr); + loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_SPER_REG, loongson_spi->sper); + loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_SPSR_REG, loongson_spi->spsr); + loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_PARA_REG, loongson_spi->para); + loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_SFCS_REG, loongson_spi->sfcs); + loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_TIMI_REG, loongson_spi->timi); + + spi_controller_resume(controller); + + return 0; +} + +const struct dev_pm_ops loongson_spi_dev_pm_ops = { + .suspend = loongson_spi_suspend, + .resume = loongson_spi_resume, +}; +EXPORT_SYMBOL_NS_GPL(loongson_spi_dev_pm_ops, SPI_LOONGSON_CORE); + +MODULE_DESCRIPTION("Loongson SPI core driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/spi/spi-loongson-pci.c b/drivers/spi/spi-loongson-pci.c new file mode 100644 index 000000000000..134cda0c13a5 --- /dev/null +++ b/drivers/spi/spi-loongson-pci.c @@ -0,0 +1,55 @@ +// SPDX-License-Identifier: GPL-2.0+ +// PCI interface driver for Loongson SPI Support +// Copyright (C) 2023 Loongson Technology Corporation Limited + +#include +#include + +#include "spi-loongson.h" + +static int loongson_spi_pci_register(struct pci_dev *pdev, + const struct pci_device_id *ent) +{ + int ret; + void __iomem *reg_base; + struct device *dev = &pdev->dev; + int pci_bar = 0; + + ret = pcim_enable_device(pdev); + if (ret < 0) + return dev_err_probe(dev, ret, "cannot enable pci device\n"); + + ret = pcim_iomap_regions(pdev, BIT(pci_bar), pci_name(pdev)); + if (ret) + return dev_err_probe(dev, ret, "failed to request and remap memory\n"); + + reg_base = pcim_iomap_table(pdev)[pci_bar]; + + ret = loongson_spi_init_controller(dev, reg_base); + if (ret) + return dev_err_probe(dev, ret, "failed to initialize controller\n"); + + return 0; +} + +static struct pci_device_id loongson_spi_devices[] = { + { PCI_DEVICE(PCI_VENDOR_ID_LOONGSON, 0x7a0b) }, + { PCI_DEVICE(PCI_VENDOR_ID_LOONGSON, 0x7a1b) }, + { } +}; +MODULE_DEVICE_TABLE(pci, loongson_spi_devices); + +static struct pci_driver loongson_spi_pci_driver = { + .name = "loongson-spi-pci", + .id_table = loongson_spi_devices, + .probe = loongson_spi_pci_register, + .driver = { + .bus = &pci_bus_type, + .pm = &loongson_spi_dev_pm_ops, + }, +}; +module_pci_driver(loongson_spi_pci_driver); + +MODULE_DESCRIPTION("Loongson spi pci driver"); +MODULE_LICENSE("GPL"); +MODULE_IMPORT_NS(SPI_LOONGSON_CORE); diff --git a/drivers/spi/spi-loongson-plat.c b/drivers/spi/spi-loongson-plat.c new file mode 100644 index 000000000000..c066e5f5891e --- /dev/null +++ b/drivers/spi/spi-loongson-plat.c @@ -0,0 +1,47 @@ +// SPDX-License-Identifier: GPL-2.0+ +// Platform driver for Loongson SPI Support +// Copyright (C) 2023 Loongson Technology Corporation Limited + +#include +#include +#include + +#include "spi-loongson.h" + +static int loongson_spi_platform_probe(struct platform_device *pdev) +{ + int ret; + void __iomem *reg_base; + struct device *dev = &pdev->dev; + + reg_base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(reg_base)) + return PTR_ERR(reg_base); + + ret = loongson_spi_init_controller(dev, reg_base); + if (ret) + return dev_err_probe(dev, ret, "failed to initialize controller\n"); + + return 0; +} + +static const struct of_device_id loongson_spi_id_table[] = { + { .compatible = "loongson,ls2k1000-spi" }, + { } +}; +MODULE_DEVICE_TABLE(of, loongson_spi_id_table); + +static struct platform_driver loongson_spi_plat_driver = { + .probe = loongson_spi_platform_probe, + .driver = { + .name = "loongson-spi", + .bus = &platform_bus_type, + .pm = &loongson_spi_dev_pm_ops, + .of_match_table = loongson_spi_id_table, + }, +}; +module_platform_driver(loongson_spi_plat_driver); + +MODULE_DESCRIPTION("Loongson spi platform driver"); +MODULE_LICENSE("GPL"); +MODULE_IMPORT_NS(SPI_LOONGSON_CORE); diff --git a/drivers/spi/spi-loongson.h b/drivers/spi/spi-loongson.h new file mode 100644 index 000000000000..35f95b161842 --- /dev/null +++ b/drivers/spi/spi-loongson.h @@ -0,0 +1,49 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* Header File for Loongson SPI Driver. */ +/* Copyright (C) 2023 Loongson Technology Corporation Limited */ + +#ifndef __LINUX_SPI_LOONGSON_H +#define __LINUX_SPI_LOONGSON_H + +#include +#include +#include + +#define LOONGSON_SPI_SPCR_REG 0x00 +#define LOONGSON_SPI_SPSR_REG 0x01 +#define LOONGSON_SPI_FIFO_REG 0x02 +#define LOONGSON_SPI_SPER_REG 0x03 +#define LOONGSON_SPI_PARA_REG 0x04 +#define LOONGSON_SPI_SFCS_REG 0x05 +#define LOONGSON_SPI_TIMI_REG 0x06 + +/* Bits definition for Loongson SPI register */ +#define LOONGSON_SPI_PARA_MEM_EN BIT(0) +#define LOONGSON_SPI_SPCR_CPHA BIT(2) +#define LOONGSON_SPI_SPCR_CPOL BIT(3) +#define LOONGSON_SPI_SPCR_SPE BIT(6) +#define LOONGSON_SPI_SPSR_RFEMPTY BIT(0) +#define LOONGSON_SPI_SPSR_WCOL BIT(6) +#define LOONGSON_SPI_SPSR_SPIF BIT(7) + +struct device; +struct spi_controller; + +struct loongson_spi { + struct spi_controller *controller; + void __iomem *base; + int cs_active; + unsigned int hz; + unsigned char spcr; + unsigned char sper; + unsigned char spsr; + unsigned char para; + unsigned char sfcs; + unsigned char timi; + unsigned int mode; + u64 clk_rate; +}; + +int loongson_spi_init_controller(struct device *dev, void __iomem *reg); +extern const struct dev_pm_ops loongson_spi_dev_pm_ops; +#endif /* __LINUX_SPI_LOONGSON_H */ From 7ebf243a201856adcac240e490596bb908ee5fcc Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Fri, 14 Jul 2023 11:45:54 -0600 Subject: [PATCH 231/656] hsi: omap_ssi: Explicitly include correct DT includes The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring Link: https://lore.kernel.org/r/20230714174554.4056851-1-robh@kernel.org Signed-off-by: Sebastian Reichel --- drivers/hsi/controllers/omap_ssi_core.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/hsi/controllers/omap_ssi_core.c b/drivers/hsi/controllers/omap_ssi_core.c index 84ba8b875199..4c1a00f9929e 100644 --- a/drivers/hsi/controllers/omap_ssi_core.c +++ b/drivers/hsi/controllers/omap_ssi_core.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include #include From 39b5ba6cb56962d2ac83e4dd89f68538f7861efe Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Tue, 1 Aug 2023 21:03:54 +0800 Subject: [PATCH 232/656] regulator: max77857: change some variables to static max77857_regmap_config and max77857_driver are only used in max77857-regulator.c now, change them to static. Fixes: af71cccadeced ("regulator: max77857: Add ADI MAX77857/59/MAX77831 Regulator Support") Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230801130354.552243-1-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/regulator/max77857-regulator.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/regulator/max77857-regulator.c b/drivers/regulator/max77857-regulator.c index 58f825d8d2b0..f2141b5be780 100644 --- a/drivers/regulator/max77857-regulator.c +++ b/drivers/regulator/max77857-regulator.c @@ -67,7 +67,7 @@ static bool max77857_volatile_reg(struct device *dev, unsigned int reg) } } -struct regmap_config max77857_regmap_config = { +static struct regmap_config max77857_regmap_config = { .reg_bits = 8, .val_bits = 8, .cache_type = REGCACHE_MAPLE, @@ -443,7 +443,7 @@ static const struct of_device_id max77857_of_id[] = { }; MODULE_DEVICE_TABLE(of, max77857_of_id); -struct i2c_driver max77857_driver = { +static struct i2c_driver max77857_driver = { .driver = { .name = "max77857", .of_match_table = max77857_of_id, From c518e7dc64573e3e3a196e8b79caa4f77c612366 Mon Sep 17 00:00:00 2001 From: Andrei Coardos Date: Tue, 25 Jul 2023 13:25:32 +0300 Subject: [PATCH 233/656] gpio: lp3943: remove unneeded platform_set_drvdata() call This function call was found to be unnecessary as there is no equivalent platform_get_drvdata() call, to access the private data of the driver. Also, the private data is defined in this driver, so there is no risk of it being accessed outside of this driver file. Reviewed-by: Alexandru Ardelean Signed-off-by: Andrei Coardos Reviewed-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-lp3943.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpio/gpio-lp3943.c b/drivers/gpio/gpio-lp3943.c index 79edd5db49d2..8e58242f5123 100644 --- a/drivers/gpio/gpio-lp3943.c +++ b/drivers/gpio/gpio-lp3943.c @@ -199,8 +199,6 @@ static int lp3943_gpio_probe(struct platform_device *pdev) lp3943_gpio->chip = lp3943_gpio_chip; lp3943_gpio->chip.parent = &pdev->dev; - platform_set_drvdata(pdev, lp3943_gpio); - return devm_gpiochip_add_data(&pdev->dev, &lp3943_gpio->chip, lp3943_gpio); } From ceac51b1ee43532d35d0182117b326306bcfe7f4 Mon Sep 17 00:00:00 2001 From: Andrei Coardos Date: Tue, 25 Jul 2023 15:36:23 +0300 Subject: [PATCH 234/656] gpio: max77620: remove unneeded platform_set_drvdata() call This function call is not required because no counterpart platform_get_drvdata() call is present to leverage the private data of the driver. Since the private data is confined to this driver file, external access is not feasible. The use of this function appears redundant in the current context of the driver's implementation. Reviewed-by: Alexandru Ardelean Signed-off-by: Andrei Coardos Reviewed-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-max77620.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpio/gpio-max77620.c b/drivers/gpio/gpio-max77620.c index c18b60e39a94..8c2a5609161f 100644 --- a/drivers/gpio/gpio-max77620.c +++ b/drivers/gpio/gpio-max77620.c @@ -331,8 +331,6 @@ static int max77620_gpio_probe(struct platform_device *pdev) girq->init_hw = max77620_gpio_irq_init_hw; girq->threaded = true; - platform_set_drvdata(pdev, mgpio); - ret = devm_gpiochip_add_data(&pdev->dev, &mgpio->gpio_chip, mgpio); if (ret < 0) { dev_err(&pdev->dev, "gpio_init: Failed to add max77620_gpio\n"); From 5f57665a217e82ca5e5362829f64b526d2f245c5 Mon Sep 17 00:00:00 2001 From: Andrei Coardos Date: Fri, 28 Jul 2023 20:59:14 +0300 Subject: [PATCH 235/656] gpio: palmas: remove unnecessary call to platform_set_drvdata() This function call was found to be unnecessary as there is no equivalent platform_get_drvdata() call to access the private data of the driver. Also, the private data is defined in this driver, so there is no risk of it being accessed outside of this driver file. Reviewed-by: Alexandru Ardelean Signed-off-by: Andrei Coardos Reviewed-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-palmas.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpio/gpio-palmas.c b/drivers/gpio/gpio-palmas.c index 6140e87c6754..28dba7048509 100644 --- a/drivers/gpio/gpio-palmas.c +++ b/drivers/gpio/gpio-palmas.c @@ -183,7 +183,6 @@ static int palmas_gpio_probe(struct platform_device *pdev) return ret; } - platform_set_drvdata(pdev, palmas_gpio); return ret; } From b0c488615eb147d3f680ad3c2e2200a1502da1fc Mon Sep 17 00:00:00 2001 From: Stanislav Jakubek Date: Sun, 30 Jul 2023 17:23:32 +0200 Subject: [PATCH 236/656] dt-bindings: gpio: brcm,kona-gpio: convert to YAML Convert Broadcom Kona family GPIO controller bindings to DT schema. Changes during conversion: - add used, but previously undocumented SoC-specific compatibles Signed-off-by: Stanislav Jakubek Reviewed-by: Krzysztof Kozlowski Signed-off-by: Bartosz Golaszewski --- .../bindings/gpio/brcm,kona-gpio.txt | 52 --------- .../bindings/gpio/brcm,kona-gpio.yaml | 100 ++++++++++++++++++ MAINTAINERS | 2 +- 3 files changed, 101 insertions(+), 53 deletions(-) delete mode 100644 Documentation/devicetree/bindings/gpio/brcm,kona-gpio.txt create mode 100644 Documentation/devicetree/bindings/gpio/brcm,kona-gpio.yaml diff --git a/Documentation/devicetree/bindings/gpio/brcm,kona-gpio.txt b/Documentation/devicetree/bindings/gpio/brcm,kona-gpio.txt deleted file mode 100644 index 4a63bc96b687..000000000000 --- a/Documentation/devicetree/bindings/gpio/brcm,kona-gpio.txt +++ /dev/null @@ -1,52 +0,0 @@ -Broadcom Kona Family GPIO -========================= - -This GPIO driver is used in the following Broadcom SoCs: - BCM11130, BCM11140, BCM11351, BCM28145, BCM28155 - -The Broadcom GPIO Controller IP can be configured prior to synthesis to -support up to 8 banks of 32 GPIOs where each bank has its own IRQ. The -GPIO controller only supports edge, not level, triggering of interrupts. - -Required properties -------------------- - -- compatible: "brcm,bcm11351-gpio", "brcm,kona-gpio" -- reg: Physical base address and length of the controller's registers. -- interrupts: The interrupt outputs from the controller. There is one GPIO - interrupt per GPIO bank. The number of interrupts listed depends on the - number of GPIO banks on the SoC. The interrupts must be ordered by bank, - starting with bank 0. There is always a 1:1 mapping between banks and - IRQs. -- #gpio-cells: Should be <2>. The first cell is the pin number, the second - cell is used to specify optional parameters: - - bit 0 specifies polarity (0 for normal, 1 for inverted) - See also "gpio-specifier" in .../devicetree/bindings/gpio/gpio.txt. -- #interrupt-cells: Should be <2>. The first cell is the GPIO number. The - second cell is used to specify flags. The following subset of flags is - supported: - - trigger type (bits[1:0]): - 1 = low-to-high edge triggered. - 2 = high-to-low edge triggered. - 3 = low-to-high or high-to-low edge triggered - Valid values are 1, 2, 3 - See also .../devicetree/bindings/interrupt-controller/interrupts.txt. -- gpio-controller: Marks the device node as a GPIO controller. -- interrupt-controller: Marks the device node as an interrupt controller. - -Example: - gpio: gpio@35003000 { - compatible = "brcm,bcm11351-gpio", "brcm,kona-gpio"; - reg = <0x35003000 0x800>; - interrupts = - ; - #gpio-cells = <2>; - #interrupt-cells = <2>; - gpio-controller; - interrupt-controller; - }; diff --git a/Documentation/devicetree/bindings/gpio/brcm,kona-gpio.yaml b/Documentation/devicetree/bindings/gpio/brcm,kona-gpio.yaml new file mode 100644 index 000000000000..296fdd6b8f38 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/brcm,kona-gpio.yaml @@ -0,0 +1,100 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/brcm,kona-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom Kona family GPIO controller + +description: + The Broadcom GPIO Controller IP can be configured prior to synthesis to + support up to 8 banks of 32 GPIOs where each bank has its own IRQ. The + GPIO controller only supports edge, not level, triggering of interrupts. + +maintainers: + - Ray Jui + +properties: + compatible: + items: + - enum: + - brcm,bcm11351-gpio + - brcm,bcm21664-gpio + - brcm,bcm23550-gpio + - const: brcm,kona-gpio + + reg: + maxItems: 1 + + interrupts: + minItems: 4 + maxItems: 6 + description: + The interrupt outputs from the controller. There is one GPIO interrupt + per GPIO bank. The number of interrupts listed depends on the number of + GPIO banks on the SoC. The interrupts must be ordered by bank, starting + with bank 0. There is always a 1:1 mapping between banks and IRQs. + + '#gpio-cells': + const: 2 + + '#interrupt-cells': + const: 2 + + gpio-controller: true + + interrupt-controller: true + +required: + - compatible + - reg + - interrupts + - '#gpio-cells' + - '#interrupt-cells' + - gpio-controller + - interrupt-controller + +allOf: + - if: + properties: + compatible: + contains: + const: brcm,bcm11351-gpio + then: + properties: + interrupts: + minItems: 6 + - if: + properties: + compatible: + contains: + enum: + - brcm,bcm21664-gpio + - brcm,bcm23550-gpio + then: + properties: + interrupts: + maxItems: 4 + +additionalProperties: false + +examples: + - | + #include + #include + + gpio@35003000 { + compatible = "brcm,bcm11351-gpio", "brcm,kona-gpio"; + reg = <0x35003000 0x800>; + interrupts = , + , + , + , + , + ; + #gpio-cells = <2>; + #interrupt-cells = <2>; + gpio-controller; + interrupt-controller; + }; +... diff --git a/MAINTAINERS b/MAINTAINERS index 3be1bdfe8ecc..e423e15f48f1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -4187,7 +4187,7 @@ BROADCOM KONA GPIO DRIVER M: Ray Jui R: Broadcom internal kernel review list S: Supported -F: Documentation/devicetree/bindings/gpio/brcm,kona-gpio.txt +F: Documentation/devicetree/bindings/gpio/brcm,kona-gpio.yaml F: drivers/gpio/gpio-bcm-kona.c BROADCOM MPI3 STORAGE CONTROLLER DRIVER From e91e8b537a6fa3ed5bbd53e0504b326edfaafb49 Mon Sep 17 00:00:00 2001 From: Andrei Coardos Date: Fri, 28 Jul 2023 21:08:33 +0300 Subject: [PATCH 237/656] gpio: pmic-eic-sprd: remove unnecessary call to platform_set_drvdata() This function call was found to be unnecessary as there is no equivalent platform_get_drvdata() call to access the private data of the driver. Also, the private data is defined in this driver, so there is no risk of it being accessed outside of this driver file. Reviewed-by: Alexandru Ardelean Signed-off-by: Andrei Coardos Reviewed-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-pmic-eic-sprd.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpio/gpio-pmic-eic-sprd.c b/drivers/gpio/gpio-pmic-eic-sprd.c index dabb0da3bd33..2b9b7be9b8fd 100644 --- a/drivers/gpio/gpio-pmic-eic-sprd.c +++ b/drivers/gpio/gpio-pmic-eic-sprd.c @@ -363,7 +363,6 @@ static int sprd_pmic_eic_probe(struct platform_device *pdev) return ret; } - platform_set_drvdata(pdev, pmic_eic); return 0; } From 8e85d6af1b3ceb619098c6b8a9f38e9e006e9c09 Mon Sep 17 00:00:00 2001 From: Andrei Coardos Date: Fri, 28 Jul 2023 21:20:09 +0300 Subject: [PATCH 238/656] gpio: rc5t583: remove unneeded call to platform_set_drvdata() This function call was found to be unnecessary as there is no equivalent platform_get_drvdata() call to access the private data of the driver. Also, the private data is defined in this driver, so there is no risk of it being accessed outside of this driver file. Reviewed-by: Alexandru Ardelean Signed-off-by: Andrei Coardos Reviewed-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-rc5t583.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpio/gpio-rc5t583.c b/drivers/gpio/gpio-rc5t583.c index 4fae3ebea790..c34dcadaee36 100644 --- a/drivers/gpio/gpio-rc5t583.c +++ b/drivers/gpio/gpio-rc5t583.c @@ -121,8 +121,6 @@ static int rc5t583_gpio_probe(struct platform_device *pdev) if (pdata && pdata->gpio_base) rc5t583_gpio->gpio_chip.base = pdata->gpio_base; - platform_set_drvdata(pdev, rc5t583_gpio); - return devm_gpiochip_add_data(&pdev->dev, &rc5t583_gpio->gpio_chip, rc5t583_gpio); } From c975cc599eb7336e0fad3cd81bbebcbe40e24c4e Mon Sep 17 00:00:00 2001 From: Andrei Coardos Date: Fri, 28 Jul 2023 21:25:22 +0300 Subject: [PATCH 239/656] gpio: sama5d2-piobu: remove unneeded call to platform_set_drvdata() This function call was found to be unnecessary as there is no equivalent platform_get_drvdata() call to access the private data of the driver. Also, the private data is defined in this driver, so there is no risk of it being accessed outside of this driver file. Reviewed-by: Alexandru Ardelean Signed-off-by: Andrei Coardos Reviewed-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-sama5d2-piobu.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpio/gpio-sama5d2-piobu.c b/drivers/gpio/gpio-sama5d2-piobu.c index 767c33ae3213..d89da7300ddd 100644 --- a/drivers/gpio/gpio-sama5d2-piobu.c +++ b/drivers/gpio/gpio-sama5d2-piobu.c @@ -189,7 +189,6 @@ static int sama5d2_piobu_probe(struct platform_device *pdev) if (!piobu) return -ENOMEM; - platform_set_drvdata(pdev, piobu); piobu->chip.label = pdev->name; piobu->chip.parent = &pdev->dev; piobu->chip.owner = THIS_MODULE, From 13a0d1088c8fea1565e30a169188b59bdd77759e Mon Sep 17 00:00:00 2001 From: Yu Liao Date: Wed, 2 Aug 2023 10:31:30 +0800 Subject: [PATCH 240/656] power: supply: qcom_pmi8998_charger: fix uninitialized variable smatch warnings: drivers/power/supply/qcom_pmi8998_charger.c:565 smb2_status_change_work() error: uninitialized symbol 'usb_online'. usb_online is used uninitialized whenever smb2_get_prop_usb_online() returns a negative value. Thus, fix the issue by initializing usb_online to 0. Fixes: 8648aeb5d7b7 ("power: supply: add Qualcomm PMI8998 SMB2 Charger driver") Reported-by: kernel test robot Closes: https://lore.kernel.org/r/202307280638.556PrzIS-lkp@intel.com/ Signed-off-by: Yu Liao Reviewed-by: Caleb Connolly --- drivers/power/supply/qcom_pmi8998_charger.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/power/supply/qcom_pmi8998_charger.c b/drivers/power/supply/qcom_pmi8998_charger.c index d16c5ee17249..cac89d233c38 100644 --- a/drivers/power/supply/qcom_pmi8998_charger.c +++ b/drivers/power/supply/qcom_pmi8998_charger.c @@ -556,7 +556,8 @@ static int smb2_set_current_limit(struct smb2_chip *chip, unsigned int val) static void smb2_status_change_work(struct work_struct *work) { unsigned int charger_type, current_ua; - int usb_online, count, rc; + int usb_online = 0; + int count, rc; struct smb2_chip *chip; chip = container_of(work, struct smb2_chip, status_change_work.work); From f57f5838c044d1554b71186d3d277619eab58d31 Mon Sep 17 00:00:00 2001 From: Caleb Connolly Date: Wed, 2 Aug 2023 15:49:28 +0100 Subject: [PATCH 241/656] power: supply: qcom_pmi8998_charger: remove CHARGE_CONTROL_LIMIT_* props These property were intended to allow the power supply to be treated as a cooling device, however the cooling device interface has been dropped from the psy core code. They now just duplicate the CURRENT_NOW and CURRENT_MAX properties and are generally confusing, drop them. Signed-off-by: Caleb Connolly Link: https://lore.kernel.org/r/20230802-pmi8998-charger-fixes-v1-1-a8f1e8b84c1e@linaro.org Signed-off-by: Sebastian Reichel --- drivers/power/supply/qcom_pmi8998_charger.c | 8 -------- 1 file changed, 8 deletions(-) diff --git a/drivers/power/supply/qcom_pmi8998_charger.c b/drivers/power/supply/qcom_pmi8998_charger.c index cac89d233c38..c7ec9aeb7a64 100644 --- a/drivers/power/supply/qcom_pmi8998_charger.c +++ b/drivers/power/supply/qcom_pmi8998_charger.c @@ -409,8 +409,6 @@ static enum power_supply_property smb2_properties[] = { POWER_SUPPLY_PROP_HEALTH, POWER_SUPPLY_PROP_ONLINE, POWER_SUPPLY_PROP_USB_TYPE, - POWER_SUPPLY_PROP_CHARGE_CONTROL_LIMIT, - POWER_SUPPLY_PROP_CHARGE_CONTROL_LIMIT_MAX, }; static enum power_supply_usb_type smb2_usb_types[] = { @@ -674,11 +672,7 @@ static int smb2_get_property(struct power_supply *psy, val->strval = chip->name; return 0; case POWER_SUPPLY_PROP_CURRENT_MAX: - case POWER_SUPPLY_PROP_CHARGE_CONTROL_LIMIT: return smb2_get_current_limit(chip, &val->intval); - case POWER_SUPPLY_PROP_CHARGE_CONTROL_LIMIT_MAX: - val->intval = DCP_CURRENT_UA; - return 0; case POWER_SUPPLY_PROP_CURRENT_NOW: return smb2_get_iio_chan(chip, chip->usb_in_i_chan, &val->intval); @@ -707,7 +701,6 @@ static int smb2_set_property(struct power_supply *psy, switch (psp) { case POWER_SUPPLY_PROP_CURRENT_MAX: - case POWER_SUPPLY_PROP_CHARGE_CONTROL_LIMIT: return smb2_set_current_limit(chip, val->intval); default: dev_err(chip->dev, "No setter for property: %d\n", psp); @@ -720,7 +713,6 @@ static int smb2_property_is_writable(struct power_supply *psy, { switch (psp) { case POWER_SUPPLY_PROP_CURRENT_MAX: - case POWER_SUPPLY_PROP_CHARGE_CONTROL_LIMIT: return 1; default: return 0; From 7e6311f04b41174ccc738d37dcb4b93cd4de98b0 Mon Sep 17 00:00:00 2001 From: Caleb Connolly Date: Wed, 2 Aug 2023 15:49:29 +0100 Subject: [PATCH 242/656] power: supply: qcom_pmi8998_charger: fix charger status The INHIBIT_CHARGE status bit means the battery has reached a pre-programmed charge limit which is some voltage offset below the target float voltage. This should be reported as a STATUS_FULL rather than UNKNOWN, fix it. Signed-off-by: Caleb Connolly Link: https://lore.kernel.org/r/20230802-pmi8998-charger-fixes-v1-2-a8f1e8b84c1e@linaro.org Signed-off-by: Sebastian Reichel --- drivers/power/supply/qcom_pmi8998_charger.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/power/supply/qcom_pmi8998_charger.c b/drivers/power/supply/qcom_pmi8998_charger.c index c7ec9aeb7a64..10f4dd0caca1 100644 --- a/drivers/power/supply/qcom_pmi8998_charger.c +++ b/drivers/power/supply/qcom_pmi8998_charger.c @@ -517,9 +517,9 @@ static int smb2_get_prop_status(struct smb2_chip *chip, int *val) *val = POWER_SUPPLY_STATUS_NOT_CHARGING; return rc; case TERMINATE_CHARGE: + case INHIBIT_CHARGE: *val = POWER_SUPPLY_STATUS_FULL; return rc; - case INHIBIT_CHARGE: default: *val = POWER_SUPPLY_STATUS_UNKNOWN; return rc; From 22475bcc2083196544fa55b861d76e0e7ee9da11 Mon Sep 17 00:00:00 2001 From: Naresh Solanki Date: Thu, 3 Aug 2023 13:12:25 +0200 Subject: [PATCH 243/656] regulator: userspace-consumer: Add regulator event support Add sysfs attribute to track regulator events received from regulator notifier block handler. Signed-off-by: Naresh Solanki Link: https://lore.kernel.org/r/20230803111225.107572-1-Naresh.Solanki@9elements.com Signed-off-by: Mark Brown --- drivers/regulator/userspace-consumer.c | 52 +++++++++++++++++++++++++- 1 file changed, 51 insertions(+), 1 deletion(-) diff --git a/drivers/regulator/userspace-consumer.c b/drivers/regulator/userspace-consumer.c index 97f075ed68c9..a0b980022993 100644 --- a/drivers/regulator/userspace-consumer.c +++ b/drivers/regulator/userspace-consumer.c @@ -29,6 +29,10 @@ struct userspace_consumer_data { int num_supplies; struct regulator_bulk_data *supplies; + + struct kobject *kobj; + struct notifier_block nb; + unsigned long events; }; static ssize_t name_show(struct device *dev, @@ -89,12 +93,30 @@ static ssize_t state_store(struct device *dev, struct device_attribute *attr, return count; } +static DEFINE_MUTEX(events_lock); + +static ssize_t events_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct userspace_consumer_data *data = dev_get_drvdata(dev); + unsigned long e; + + mutex_lock(&events_lock); + e = data->events; + data->events = 0; + mutex_unlock(&events_lock); + + return sprintf(buf, "0x%lx\n", e); +} + static DEVICE_ATTR_RO(name); static DEVICE_ATTR_RW(state); +static DEVICE_ATTR_RO(events); static struct attribute *attributes[] = { &dev_attr_name.attr, &dev_attr_state.attr, + &dev_attr_events.attr, NULL, }; @@ -115,12 +137,28 @@ static const struct attribute_group attr_group = { .is_visible = attr_visible, }; +static int regulator_userspace_notify(struct notifier_block *nb, + unsigned long event, + void *ignored) +{ + struct userspace_consumer_data *data = + container_of(nb, struct userspace_consumer_data, nb); + + mutex_lock(&events_lock); + data->events |= event; + mutex_unlock(&events_lock); + + sysfs_notify(data->kobj, NULL, dev_attr_events.attr.name); + + return NOTIFY_OK; +} + static int regulator_userspace_consumer_probe(struct platform_device *pdev) { struct regulator_userspace_consumer_data tmpdata; struct regulator_userspace_consumer_data *pdata; struct userspace_consumer_data *drvdata; - int ret; + int i, ret; pdata = dev_get_platdata(&pdev->dev); if (!pdata) { @@ -153,6 +191,7 @@ static int regulator_userspace_consumer_probe(struct platform_device *pdev) drvdata->num_supplies = pdata->num_supplies; drvdata->supplies = pdata->supplies; drvdata->no_autoswitch = pdata->no_autoswitch; + drvdata->kobj = &pdev->dev.kobj; mutex_init(&drvdata->lock); @@ -186,6 +225,13 @@ static int regulator_userspace_consumer_probe(struct platform_device *pdev) } drvdata->enabled = !!ret; + drvdata->nb.notifier_call = regulator_userspace_notify; + for (i = 0; i < drvdata->num_supplies; i++) { + ret = devm_regulator_register_notifier(drvdata->supplies[i].consumer, &drvdata->nb); + if (ret) + goto err_enable; + } + return 0; err_enable: @@ -197,6 +243,10 @@ err_enable: static int regulator_userspace_consumer_remove(struct platform_device *pdev) { struct userspace_consumer_data *data = platform_get_drvdata(pdev); + int i; + + for (i = 0; i < data->num_supplies; i++) + devm_regulator_unregister_notifier(data->supplies[i].consumer, &data->nb); sysfs_remove_group(&pdev->dev.kobj, &attr_group); From d8736266ae960504110e812994f555bf7cb8740c Mon Sep 17 00:00:00 2001 From: Zhu Wang Date: Thu, 3 Aug 2023 16:39:44 +0800 Subject: [PATCH 244/656] spi: fsl-spi: Do not check 0 for platform_get_irq() Since platform_get_irq() never returned zero, so it need not to check whether it returned zero, and we use the return error code of platform_get_irq() to replace the current return error code, for that platform_get_irq() may return -EINVAL or -ENXIO. Signed-off-by: Zhu Wang Link: https://lore.kernel.org/r/20230803083944.21501-1-wangzhu9@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-fsl-spi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-fsl-spi.c b/drivers/spi/spi-fsl-spi.c index 106fe60a0a50..9933842ab727 100644 --- a/drivers/spi/spi-fsl-spi.c +++ b/drivers/spi/spi-fsl-spi.c @@ -740,8 +740,8 @@ static int plat_mpc8xxx_spi_probe(struct platform_device *pdev) return -EINVAL; irq = platform_get_irq(pdev, 0); - if (irq <= 0) - return -EINVAL; + if (irq < 0) + return irq; master = fsl_spi_probe(&pdev->dev, mem, irq); return PTR_ERR_OR_ZERO(master); From b11eba8b02e592b69b41af01ab7325a853441908 Mon Sep 17 00:00:00 2001 From: Andrei Coardos Date: Tue, 1 Aug 2023 10:28:00 +0300 Subject: [PATCH 245/656] gpio: sch: remove unneeded call to platform_set_drvdata() This function call was found to be unnecessary as there is no equivalent platform_get_drvdata() call to access the private data of the driver. Also, the private data is defined in this driver, so there is no risk of it being accessed outside of this driver file. Reviewed-by: Alexandru Ardelean Signed-off-by: Andrei Coardos Reviewed-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-sch.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpio/gpio-sch.c b/drivers/gpio/gpio-sch.c index 8a83f7bf4382..e48392074e4b 100644 --- a/drivers/gpio/gpio-sch.c +++ b/drivers/gpio/gpio-sch.c @@ -380,8 +380,6 @@ static int sch_gpio_probe(struct platform_device *pdev) return -ENODEV; } - platform_set_drvdata(pdev, sch); - girq = &sch->chip.irq; gpio_irq_chip_set_chip(girq, &sch_irqchip); girq->num_parents = 0; From 41eb8510f18250ced8bef44f0dead759f502fb9e Mon Sep 17 00:00:00 2001 From: Andrei Coardos Date: Tue, 1 Aug 2023 10:30:44 +0300 Subject: [PATCH 246/656] gpio: syscon: remove unneeded call to platform_set_drvdata() This function call was found to be unnecessary as there is no equivalent platform_get_drvdata() call to access the private data of the driver. Also, the private data is defined in this driver, so there is no risk of it being accessed outside of this driver file. Reviewed-by: Alexandru Ardelean Signed-off-by: Andrei Coardos Reviewed-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-syscon.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpio/gpio-syscon.c b/drivers/gpio/gpio-syscon.c index 41bf47c8c983..6e1a2581e6ae 100644 --- a/drivers/gpio/gpio-syscon.c +++ b/drivers/gpio/gpio-syscon.c @@ -248,8 +248,6 @@ static int syscon_gpio_probe(struct platform_device *pdev) priv->chip.direction_output = syscon_gpio_dir_out; } - platform_set_drvdata(pdev, priv); - return devm_gpiochip_add_data(&pdev->dev, &priv->chip, priv); } From 02840579a94da4fb73292464c34c47222050923d Mon Sep 17 00:00:00 2001 From: Andrei Coardos Date: Tue, 1 Aug 2023 10:32:11 +0300 Subject: [PATCH 247/656] gpio: timberdale: remove unneeded call to platform_set_drvdata() This function call was found to be unnecessary as there is no equivalent platform_get_drvdata() call to access the private data of the driver. Also, the private data is defined in this driver, so there is no risk of it being accessed outside of this driver file. Reviewed-by: Alexandru Ardelean Signed-off-by: Andrei Coardos Reviewed-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-timberdale.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpio/gpio-timberdale.c b/drivers/gpio/gpio-timberdale.c index de14949a3fe5..bbd9e9191199 100644 --- a/drivers/gpio/gpio-timberdale.c +++ b/drivers/gpio/gpio-timberdale.c @@ -256,8 +256,6 @@ static int timbgpio_probe(struct platform_device *pdev) if (err) return err; - platform_set_drvdata(pdev, tgpio); - /* make sure to disable interrupts */ iowrite32(0x0, tgpio->membase + TGPIO_IER); From 0a5e9306b812fe3517548fab92b3d3d6ce7576e5 Mon Sep 17 00:00:00 2001 From: Andrei Coardos Date: Tue, 1 Aug 2023 23:38:39 +0300 Subject: [PATCH 248/656] gpio: tqmx86: remove unneeded call to platform_set_drvdata() This function call was found to be unnecessary as there is no equivalent platform_get_drvdata() call to access the private data of the driver. Also, the private data is defined in this driver, so there is no risk of it being accessed outside of this driver file. Reviewed-by: Alexandru Ardelean Signed-off-by: Andrei Coardos Reviewed-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-tqmx86.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpio/gpio-tqmx86.c b/drivers/gpio/gpio-tqmx86.c index 6f8bd1155db7..3a28c1f273c3 100644 --- a/drivers/gpio/gpio-tqmx86.c +++ b/drivers/gpio/gpio-tqmx86.c @@ -277,8 +277,6 @@ static int tqmx86_gpio_probe(struct platform_device *pdev) tqmx86_gpio_write(gpio, (u8)~TQMX86_DIR_INPUT_MASK, TQMX86_GPIODD); - platform_set_drvdata(pdev, gpio); - chip = &gpio->chip; chip->label = "gpio-tqmx86"; chip->owner = THIS_MODULE; From 872982cecd2f1f1dc67502732f5126267a22da3f Mon Sep 17 00:00:00 2001 From: Andrei Coardos Date: Tue, 1 Aug 2023 23:44:45 +0300 Subject: [PATCH 249/656] gpio: vx855: remove unneeded call to platform_set_drvdata() This function call was found to be unnecessary as there is no equivalent platform_get_drvdata() call to access the private data of the driver. Also, the private data is defined in this driver, so there is no risk of it being accessed outside of this driver file. Reviewed-by: Alexandru Ardelean Signed-off-by: Andrei Coardos Reviewed-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-vx855.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpio/gpio-vx855.c b/drivers/gpio/gpio-vx855.c index 69713fd5485b..8fd6c3913d69 100644 --- a/drivers/gpio/gpio-vx855.c +++ b/drivers/gpio/gpio-vx855.c @@ -240,8 +240,6 @@ static int vx855gpio_probe(struct platform_device *pdev) if (!vg) return -ENOMEM; - platform_set_drvdata(pdev, vg); - dev_info(&pdev->dev, "found VX855 GPIO controller\n"); vg->io_gpi = res_gpi->start; vg->io_gpo = res_gpo->start; From 146bf98e00886420199d8892d3684c9736789b0c Mon Sep 17 00:00:00 2001 From: Andrei Coardos Date: Tue, 1 Aug 2023 23:46:06 +0300 Subject: [PATCH 250/656] gpio: zevio: remove unneeded call to platform_set_drvdata() This function call was found to be unnecessary as there is no equivalent platform_get_drvdata() call to access the private data of the driver. Also, the private data is defined in this driver, so there is no risk of it being accessed outside of this driver file. Reviewed-by: Alexandru Ardelean Signed-off-by: Andrei Coardos Reviewed-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-zevio.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpio/gpio-zevio.c b/drivers/gpio/gpio-zevio.c index f0f571b323f2..2de61337ad3b 100644 --- a/drivers/gpio/gpio-zevio.c +++ b/drivers/gpio/gpio-zevio.c @@ -176,8 +176,6 @@ static int zevio_gpio_probe(struct platform_device *pdev) if (!controller) return -ENOMEM; - platform_set_drvdata(pdev, controller); - /* Copy our reference */ controller->chip = zevio_gpio_chip; controller->chip.parent = &pdev->dev; From 455d39ec96f0d8020adf465ab1f864a722d96eb3 Mon Sep 17 00:00:00 2001 From: Ruan Jinjie Date: Thu, 3 Aug 2023 11:39:37 +0800 Subject: [PATCH 251/656] gpio: ftgpio010: Do not check for 0 return after calling platform_get_irq() Since commit a85a6c86c25b ("driver core: platform: Clarify that IRQ 0 is invalid"), there is no possible for platform_get_irq() to return 0. And the return value of platform_get_irq() is more sensible to show the error reason. Signed-off-by: Ruan Jinjie Reviewed-by: Linus Walleij Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-ftgpio010.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/gpio-ftgpio010.c b/drivers/gpio/gpio-ftgpio010.c index 31e26072f6ae..5ce59dcf02e3 100644 --- a/drivers/gpio/gpio-ftgpio010.c +++ b/drivers/gpio/gpio-ftgpio010.c @@ -250,8 +250,8 @@ static int ftgpio_gpio_probe(struct platform_device *pdev) return PTR_ERR(g->base); irq = platform_get_irq(pdev, 0); - if (irq <= 0) - return irq ? irq : -EINVAL; + if (irq < 0) + return irq; g->clk = devm_clk_get(dev, NULL); if (!IS_ERR(g->clk)) { From c4dc167c684b8d9e58d3e4bde5b7eaef5d4e8cf5 Mon Sep 17 00:00:00 2001 From: Zhu Wang Date: Thu, 3 Aug 2023 10:28:44 +0800 Subject: [PATCH 252/656] gpio: tps65218: remove redundant of_match_ptr() The driver depends on CONFIG_OF, so it is not necessary to use of_match_ptr() here. Even for drivers that do not depend on CONFIG_OF, it's almost always better to leave out the of_match_ptr(), since the only thing it can possibly do is to save a few bytes of .text if a driver can be used both with and without it. Hence we remove of_match_ptr(). Signed-off-by: Zhu Wang Reviewed-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-tps65218.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-tps65218.c b/drivers/gpio/gpio-tps65218.c index e1d425a18854..d7d9d50dcddf 100644 --- a/drivers/gpio/gpio-tps65218.c +++ b/drivers/gpio/gpio-tps65218.c @@ -216,7 +216,7 @@ MODULE_DEVICE_TABLE(platform, tps65218_gpio_id_table); static struct platform_driver tps65218_gpio_driver = { .driver = { .name = "tps65218-gpio", - .of_match_table = of_match_ptr(tps65218_dt_match) + .of_match_table = tps65218_dt_match, }, .probe = tps65218_gpio_probe, .id_table = tps65218_gpio_id_table, From 9c573074895f9e2da3cbe92605dce5d765b311b7 Mon Sep 17 00:00:00 2001 From: Zhu Wang Date: Thu, 3 Aug 2023 10:20:56 +0800 Subject: [PATCH 253/656] gpio: max732x: remove redundant CONFIG_OF and of_match_ptr() The driver depends on CONFIG_OF, so it is not necessary to use of_match_ptr() here. We remove both CONFIG_OF and of_match_ptr() here. Even for drivers that do not depend on CONFIG_OF, it's almost always better to leave out the of_match_ptr(), since the only thing it can possibly do is to save a few bytes of .text if a driver can be used both with and without it. Signed-off-by: Zhu Wang Reviewed-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-max732x.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/drivers/gpio/gpio-max732x.c b/drivers/gpio/gpio-max732x.c index fca9ca68e387..49d362907bc7 100644 --- a/drivers/gpio/gpio-max732x.c +++ b/drivers/gpio/gpio-max732x.c @@ -18,8 +18,6 @@ #include #include #include -#include - /* * Each port of MAX732x (including MAX7319) falls into one of the @@ -114,7 +112,6 @@ static const struct i2c_device_id max732x_id[] = { }; MODULE_DEVICE_TABLE(i2c, max732x_id); -#ifdef CONFIG_OF static const struct of_device_id max732x_of_table[] = { { .compatible = "maxim,max7319" }, { .compatible = "maxim,max7320" }, @@ -128,7 +125,6 @@ static const struct of_device_id max732x_of_table[] = { { } }; MODULE_DEVICE_TABLE(of, max732x_of_table); -#endif struct max732x_chip { struct gpio_chip gpio_chip; @@ -709,7 +705,7 @@ static int max732x_probe(struct i2c_client *client) static struct i2c_driver max732x_driver = { .driver = { .name = "max732x", - .of_match_table = of_match_ptr(max732x_of_table), + .of_match_table = max732x_of_table, }, .probe = max732x_probe, .id_table = max732x_id, From a374467ae68c23d4c9e9d5009207c1414469c5b0 Mon Sep 17 00:00:00 2001 From: Zhu Wang Date: Wed, 2 Aug 2023 10:24:03 +0800 Subject: [PATCH 254/656] gpio: altera-a10sr: remove redundant of_match_ptr The driver depends on CONFIG_OF, so it is not necessary to use of_match_ptr() here. Even for drivers that do not depend on CONFIG_OF, it's almost always better to leave out the of_match_ptr(), since the only thing it can possibly do is to save a few bytes of .text if a driver can be used both with and without it. Hence we remove of_match_ptr(). Signed-off-by: Zhu Wang Reviewed-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-altera-a10sr.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-altera-a10sr.c b/drivers/gpio/gpio-altera-a10sr.c index be1ed7ee5225..11edf1fe6c90 100644 --- a/drivers/gpio/gpio-altera-a10sr.c +++ b/drivers/gpio/gpio-altera-a10sr.c @@ -9,6 +9,7 @@ #include #include +#include #include #include @@ -104,7 +105,7 @@ static struct platform_driver altr_a10sr_gpio_driver = { .probe = altr_a10sr_gpio_probe, .driver = { .name = "altr_a10sr_gpio", - .of_match_table = of_match_ptr(altr_a10sr_gpio_of_match), + .of_match_table = altr_a10sr_gpio_of_match, }, }; module_platform_driver(altr_a10sr_gpio_driver); From a0d22277ba13b609a6f792b61aa1798c3c653676 Mon Sep 17 00:00:00 2001 From: Zhu Wang Date: Wed, 2 Aug 2023 10:54:31 +0800 Subject: [PATCH 255/656] gpio: clps711x: remove redundant of_match_ptr() The driver depends on CONFIG_OF, so it is not necessary to use of_match_ptr() here. Even for drivers that do not depend on CONFIG_OF, it's almost always better to leave out the of_match_ptr(), since the only thing it can possibly do is to save a few bytes of .text if a driver can be used both with and without it. Hence we remove of_match_ptr(). Signed-off-by: Zhu Wang Reviewed-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-clps711x.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/gpio-clps711x.c b/drivers/gpio/gpio-clps711x.c index 75f6f8d4323e..d69a24dd4828 100644 --- a/drivers/gpio/gpio-clps711x.c +++ b/drivers/gpio/gpio-clps711x.c @@ -67,7 +67,7 @@ static int clps711x_gpio_probe(struct platform_device *pdev) return devm_gpiochip_add_data(&pdev->dev, gc, NULL); } -static const struct of_device_id __maybe_unused clps711x_gpio_ids[] = { +static const struct of_device_id clps711x_gpio_ids[] = { { .compatible = "cirrus,ep7209-gpio" }, { } }; @@ -76,7 +76,7 @@ MODULE_DEVICE_TABLE(of, clps711x_gpio_ids); static struct platform_driver clps711x_gpio_driver = { .driver = { .name = "clps711x-gpio", - .of_match_table = of_match_ptr(clps711x_gpio_ids), + .of_match_table = clps711x_gpio_ids, }, .probe = clps711x_gpio_probe, }; From 07d93cbb3dc01e8cf2c39e996f60cbff3a77ebb2 Mon Sep 17 00:00:00 2001 From: Zhu Wang Date: Wed, 2 Aug 2023 10:44:55 +0800 Subject: [PATCH 256/656] gpio: ixp4xx: remove redundant of_match_ptr() The driver depends on CONFIG_OF, so it is not necessary to use of_match_ptr() here. Even for drivers that do not depend on CONFIG_OF, it's almost always better to leave out the of_match_ptr(), since the only thing it can possibly do is to save a few bytes of .text if a driver can be used both with and without it. Hence we remove of_match_ptr(). Signed-off-by: Zhu Wang Reviewed-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-ixp4xx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-ixp4xx.c b/drivers/gpio/gpio-ixp4xx.c index 1e29de1671d4..dde6cf3a5779 100644 --- a/drivers/gpio/gpio-ixp4xx.c +++ b/drivers/gpio/gpio-ixp4xx.c @@ -302,7 +302,7 @@ static const struct of_device_id ixp4xx_gpio_of_match[] = { static struct platform_driver ixp4xx_gpio_driver = { .driver = { .name = "ixp4xx-gpio", - .of_match_table = of_match_ptr(ixp4xx_gpio_of_match), + .of_match_table = ixp4xx_gpio_of_match, }, .probe = ixp4xx_gpio_probe, }; From bcb6b9e50df8367696ab0704b3858790e5589983 Mon Sep 17 00:00:00 2001 From: Zhu Wang Date: Wed, 2 Aug 2023 11:17:49 +0800 Subject: [PATCH 257/656] gpio: lpc32xx: remove redundant CONFIG_OF and of_match_ptr() The driver depends on CONFIG_OF, so it is not necessary to use CONFIG_OF and of_match_ptr() here, so we remove them all. Even for drivers that do not depend on CONFIG_OF, it's almost always better to leave out the of_match_ptr(), since the only thing it can possibly do is to save a few bytes of .text if a driver can be used both with and without it. Signed-off-by: Zhu Wang Reviewed-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-lpc32xx.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/gpio/gpio-lpc32xx.c b/drivers/gpio/gpio-lpc32xx.c index d2b65cfb336e..5ef8af824980 100644 --- a/drivers/gpio/gpio-lpc32xx.c +++ b/drivers/gpio/gpio-lpc32xx.c @@ -525,17 +525,15 @@ static int lpc32xx_gpio_probe(struct platform_device *pdev) return 0; } -#ifdef CONFIG_OF static const struct of_device_id lpc32xx_gpio_of_match[] = { { .compatible = "nxp,lpc3220-gpio", }, { }, }; -#endif static struct platform_driver lpc32xx_gpio_driver = { .driver = { .name = "lpc32xx-gpio", - .of_match_table = of_match_ptr(lpc32xx_gpio_of_match), + .of_match_table = lpc32xx_gpio_of_match, }, .probe = lpc32xx_gpio_probe, }; From 5878753886c30c041110368982f34a494997501d Mon Sep 17 00:00:00 2001 From: Zhu Wang Date: Wed, 2 Aug 2023 11:29:57 +0800 Subject: [PATCH 258/656] gpio: max3191x: remove redundant of_match_ptr() The driver depends on CONFIG_OF, so it is not necessary to use CONFIG_OF and of_match_ptr() here, we remove them all. Even for drivers that do not depend on CONFIG_OF, it's almost always better to leave out the of_match_ptr(), since the only thing it can possibly do is to save a few bytes of .text if a driver can be used both with and without it. Signed-off-by: Zhu Wang Reviewed-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-max3191x.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/gpio/gpio-max3191x.c b/drivers/gpio/gpio-max3191x.c index 161c4751c5f7..bbacc714632b 100644 --- a/drivers/gpio/gpio-max3191x.c +++ b/drivers/gpio/gpio-max3191x.c @@ -457,7 +457,6 @@ static int __init max3191x_register_driver(struct spi_driver *sdrv) return spi_register_driver(sdrv); } -#ifdef CONFIG_OF static const struct of_device_id max3191x_of_id[] = { { .compatible = "maxim,max31910" }, { .compatible = "maxim,max31911" }, @@ -468,7 +467,6 @@ static const struct of_device_id max3191x_of_id[] = { { } }; MODULE_DEVICE_TABLE(of, max3191x_of_id); -#endif static const struct spi_device_id max3191x_spi_id[] = { { "max31910" }, @@ -484,7 +482,7 @@ MODULE_DEVICE_TABLE(spi, max3191x_spi_id); static struct spi_driver max3191x_driver = { .driver = { .name = "max3191x", - .of_match_table = of_match_ptr(max3191x_of_id), + .of_match_table = max3191x_of_id, }, .probe = max3191x_probe, .remove = max3191x_remove, From 30531e14c9490f08392001f91d6a6baeae1cbacf Mon Sep 17 00:00:00 2001 From: Zhu Wang Date: Wed, 2 Aug 2023 11:48:55 +0800 Subject: [PATCH 259/656] gpio: raspberrypi-exp: remove redundant of_match_ptr() The driver depends on CONFIG_OF, so it is not necessary to use of_match_ptr() here, and __maybe_unused can also be removed. Even for drivers that do not depend on CONFIG_OF, it's almost always better to leave out the of_match_ptr(), since the only thing it can possibly do is to save a few bytes of .text if a driver can be used both with and without it. Signed-off-by: Zhu Wang Reviewed-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-raspberrypi-exp.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/gpio-raspberrypi-exp.c b/drivers/gpio/gpio-raspberrypi-exp.c index ecb0d3800dfe..9d1b95e429f1 100644 --- a/drivers/gpio/gpio-raspberrypi-exp.c +++ b/drivers/gpio/gpio-raspberrypi-exp.c @@ -234,7 +234,7 @@ static int rpi_exp_gpio_probe(struct platform_device *pdev) return devm_gpiochip_add_data(dev, &rpi_gpio->gc, rpi_gpio); } -static const struct of_device_id rpi_exp_gpio_ids[] __maybe_unused = { +static const struct of_device_id rpi_exp_gpio_ids[] = { { .compatible = "raspberrypi,firmware-gpio" }, { } }; @@ -243,7 +243,7 @@ MODULE_DEVICE_TABLE(of, rpi_exp_gpio_ids); static struct platform_driver rpi_exp_gpio_driver = { .driver = { .name = MODULE_NAME, - .of_match_table = of_match_ptr(rpi_exp_gpio_ids), + .of_match_table = rpi_exp_gpio_ids, }, .probe = rpi_exp_gpio_probe, }; From 87d0688483f56c748b37a5298bdc382df5cf8f74 Mon Sep 17 00:00:00 2001 From: Zhu Wang Date: Thu, 3 Aug 2023 10:13:17 +0800 Subject: [PATCH 260/656] gpio: xra1403: remove redundant of_match_ptr() The driver depends on CONFIG_OF, so it is not necessary to use of_match_ptr() here, and __maybe_unused can also be removed. Even for drivers that do not depend on CONFIG_OF, it's almost always better to leave out the of_match_ptr(), since the only thing it can possibly do is to save a few bytes of .text if a driver can be used both with and without it. Signed-off-by: Zhu Wang Reviewed-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-xra1403.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/gpio-xra1403.c b/drivers/gpio/gpio-xra1403.c index eed8a1684830..dc2710c21c50 100644 --- a/drivers/gpio/gpio-xra1403.c +++ b/drivers/gpio/gpio-xra1403.c @@ -194,7 +194,7 @@ static const struct spi_device_id xra1403_ids[] = { }; MODULE_DEVICE_TABLE(spi, xra1403_ids); -static const struct of_device_id xra1403_spi_of_match[] __maybe_unused = { +static const struct of_device_id xra1403_spi_of_match[] = { { .compatible = "exar,xra1403" }, {}, }; @@ -205,7 +205,7 @@ static struct spi_driver xra1403_driver = { .id_table = xra1403_ids, .driver = { .name = "xra1403", - .of_match_table = of_match_ptr(xra1403_spi_of_match), + .of_match_table = xra1403_spi_of_match, }, }; From 93083725e1ed86c07ea9846bb573b9340985853f Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Thu, 3 Aug 2023 19:36:54 +0800 Subject: [PATCH 261/656] regulator: max77857: fix build error in max77857-regulator.c When using low verion gcc(7.5) to build the max77857-regulator driver, got the following error: drivers/regulator/max77857-regulator.c:312:16: error: initializer element is not constant .ramp_delay = max77857_ramp_table[0][0], To fix this by introducing a macro RAMAP_DELAY_INIT_VAL to define the value of max77857_ramp_table[0[0]. Fixes: af71cccadece ("regulator: max77857: Add ADI MAX77857/59/MAX77831 Regulator Support") Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230803113654.818640-1-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/regulator/max77857-regulator.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/regulator/max77857-regulator.c b/drivers/regulator/max77857-regulator.c index f2141b5be780..44a510547318 100644 --- a/drivers/regulator/max77857-regulator.c +++ b/drivers/regulator/max77857-regulator.c @@ -293,8 +293,10 @@ static const unsigned int max77857_switch_freq[] = { 1200000, 1500000, 1800000, 2100000 }; +#define RAMAP_DELAY_INIT_VAL 1333 + static const unsigned int max77857_ramp_table[2][4] = { - { 1333, 667, 333, 227 }, /* when switch freq is 1.8MHz or 2.1MHz */ + { RAMAP_DELAY_INIT_VAL, 667, 333, 227 }, /* when switch freq is 1.8MHz or 2.1MHz */ { 1166, 667, 333, 167 }, /* when switch freq is 1.2MHz or 1.5MHz */ }; @@ -309,7 +311,7 @@ static struct regulator_desc max77857_regulator_desc = { .n_ramp_values = ARRAY_SIZE(max77857_ramp_table[0]), .ramp_reg = MAX77857_REG_CONT3, .ramp_mask = GENMASK(1, 0), - .ramp_delay = max77857_ramp_table[0][0], + .ramp_delay = RAMAP_DELAY_INIT_VAL, .owner = THIS_MODULE, }; From de5e92cb5cefd2968b96075995a36e28298edf71 Mon Sep 17 00:00:00 2001 From: Li Zetao Date: Thu, 3 Aug 2023 21:48:05 +0800 Subject: [PATCH 262/656] spi: mpc5xxx-psc: Fix unsigned expression compared with zero There is two warnings reported by coccinelle: ./drivers/spi/spi-mpc512x-psc.c:493:5-13: WARNING: Unsigned expression compared with zero: mps -> irq < 0 ./drivers/spi/spi-mpc52xx-psc.c:332:5-13: WARNING: Unsigned expression compared with zero: mps -> irq < 0 The commit "208ee586f862" ("spi: mpc5xxx-psc: Return immediately if IRQ resource is unavailable") was to check whether the IRQ resource is unavailable. When the IRQ resource is unavailable, an error code is returned, however, the type of "mps->irq" is "unsigned int", causing the error code to flip. Modify the type of "mps->irq" to solve this problem. Fixes: 208ee586f862 ("spi: mpc5xxx-psc: Return immediately if IRQ resource is unavailable") Signed-off-by: Li Zetao Link: https://lore.kernel.org/r/20230803134805.1037251-1-lizetao1@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-mpc512x-psc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/spi-mpc512x-psc.c b/drivers/spi/spi-mpc512x-psc.c index 99aeef28a477..5cecca1bef02 100644 --- a/drivers/spi/spi-mpc512x-psc.c +++ b/drivers/spi/spi-mpc512x-psc.c @@ -53,7 +53,7 @@ struct mpc512x_psc_spi { int type; void __iomem *psc; struct mpc512x_psc_fifo __iomem *fifo; - unsigned int irq; + int irq; u8 bits_per_word; u32 mclk_rate; From 88362275240303455bbec05c249daa84aff07059 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 3 Aug 2023 09:24:24 +0200 Subject: [PATCH 263/656] dt-bindings: spi: spi-cadence: Describe power-domains property ZynqMP Cadence SPI IP core has own power domain that's why describe it as optional property. Signed-off-by: Michal Simek Acked-by: Conor Dooley Link: https://lore.kernel.org/r/987430ee905fd299fe962663d94f848b341c87df.1691047461.git.michal.simek@amd.com Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/spi/spi-cadence.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/spi/spi-cadence.yaml b/Documentation/devicetree/bindings/spi/spi-cadence.yaml index b7552739b554..9eda7f0d2869 100644 --- a/Documentation/devicetree/bindings/spi/spi-cadence.yaml +++ b/Documentation/devicetree/bindings/spi/spi-cadence.yaml @@ -49,6 +49,9 @@ properties: enum: [ 0, 1 ] default: 0 + power-domains: + maxItems: 1 + required: - compatible - reg From ffae65fb1ae4738151158b4435fad822cb1ca29c Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 3 Aug 2023 09:24:25 +0200 Subject: [PATCH 264/656] dt-bindings: spi: spi-cadence: Add label property Add a label property to allow a custom name to be used for identifying the controller on a board. This is useful when there is more than one controller present. Similar change was done by commit 412b7a521c30 ("dt-bindings: eeprom: at24: Add label property for AT24"). Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/82cd1a57397867b5a1039cd15244344c02a3ece1.1691047461.git.michal.simek@amd.com Signed-off-by: Mark Brown --- Documentation/devicetree/bindings/spi/spi-cadence.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/spi/spi-cadence.yaml b/Documentation/devicetree/bindings/spi/spi-cadence.yaml index 9eda7f0d2869..d4b61b0e8301 100644 --- a/Documentation/devicetree/bindings/spi/spi-cadence.yaml +++ b/Documentation/devicetree/bindings/spi/spi-cadence.yaml @@ -52,6 +52,9 @@ properties: power-domains: maxItems: 1 + label: + description: Descriptive name of the SPI controller. + required: - compatible - reg From 9a6913feb46c601e0895fc9f89b715b90a4cbb87 Mon Sep 17 00:00:00 2001 From: Franck LENORMAND Date: Mon, 24 Jul 2023 08:52:29 +0200 Subject: [PATCH 265/656] crypto: caam - Change structure type representing DECO MID MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The structure partid is not suitable to represent the DECO MID register. This patch replace partid by masterid which is more appropriate. Signed-off-by: Franck LENORMAND Signed-off-by: Horia Geantă Signed-off-by: Meenakshi Aggarwal Reviewed-by: Gaurav Jain Signed-off-by: Herbert Xu --- drivers/crypto/caam/regs.h | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/drivers/crypto/caam/regs.h b/drivers/crypto/caam/regs.h index 189e74c21f0c..0f87bd365582 100644 --- a/drivers/crypto/caam/regs.h +++ b/drivers/crypto/caam/regs.h @@ -459,12 +459,6 @@ struct masterid { u32 liodn_ls; /* LIODN for non-sequence and seq access */ }; -/* Partition ID for DMA configuration */ -struct partid { - u32 rsvd1; - u32 pidr; /* partition ID, DECO */ -}; - /* RNGB test mode (replicated twice in some configurations) */ /* Padded out to 0x100 */ struct rngtst { @@ -590,7 +584,7 @@ struct caam_ctrl { u32 deco_rsr; /* DECORSR - Deco Request Source */ u32 rsvd11; u32 deco_rq; /* DECORR - DECO Request */ - struct partid deco_mid[5]; /* DECOxLIODNR - 1 per DECO */ + struct masterid deco_mid[5]; /* DECOxLIODNR - 1 per DECO */ u32 rsvd5[22]; /* DECO Availability/Reset Section 120-3ff */ From 322d74752c28a71fbca3650b98c21c58d25414a8 Mon Sep 17 00:00:00 2001 From: Horia Geanta Date: Mon, 24 Jul 2023 08:52:30 +0200 Subject: [PATCH 266/656] crypto: caam - add power management support Add support for suspend and resume operation for PM in CAAM driver. When the CAAM goes in suspend, the hardware is considered to do nothing. On some platforms, the power of the CAAM is not turned off so it keeps its configuration. On other platforms, it doesn't so it is necessary to save the state of the CAAM: - JRs MID - Address of input and output rings Signed-off-by: Horia Geanta Signed-off-by: Victoria Milhoan Signed-off-by: Dan Douglass Signed-off-by: Vipul Kumar Signed-off-by: Franck LENORMAND Signed-off-by: Meenakshi Aggarwal Reviewed-by: Gaurav Jain Signed-off-by: Herbert Xu --- drivers/crypto/caam/ctrl.c | 106 +++++++++++++++++++ drivers/crypto/caam/intern.h | 25 ++++- drivers/crypto/caam/jr.c | 193 +++++++++++++++++++++++++++++++---- drivers/crypto/caam/regs.h | 3 +- 4 files changed, 306 insertions(+), 21 deletions(-) diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c index ff9ddbbca377..a7a4583107f4 100644 --- a/drivers/crypto/caam/ctrl.c +++ b/drivers/crypto/caam/ctrl.c @@ -740,6 +740,109 @@ static int caam_ctrl_rng_init(struct device *dev) return 0; } +/* Indicate if the internal state of the CAAM is lost during PM */ +static int caam_off_during_pm(void) +{ + bool not_off_during_pm = of_machine_is_compatible("fsl,imx6q") || + of_machine_is_compatible("fsl,imx6qp") || + of_machine_is_compatible("fsl,imx6dl"); + + return not_off_during_pm ? 0 : 1; +} + +static void caam_state_save(struct device *dev) +{ + struct caam_drv_private *ctrlpriv = dev_get_drvdata(dev); + struct caam_ctl_state *state = &ctrlpriv->state; + struct caam_ctrl __iomem *ctrl = ctrlpriv->ctrl; + u32 deco_inst, jr_inst; + int i; + + state->mcr = rd_reg32(&ctrl->mcr); + state->scfgr = rd_reg32(&ctrl->scfgr); + + deco_inst = (rd_reg32(&ctrl->perfmon.cha_num_ms) & + CHA_ID_MS_DECO_MASK) >> CHA_ID_MS_DECO_SHIFT; + for (i = 0; i < deco_inst; i++) { + state->deco_mid[i].liodn_ms = + rd_reg32(&ctrl->deco_mid[i].liodn_ms); + state->deco_mid[i].liodn_ls = + rd_reg32(&ctrl->deco_mid[i].liodn_ls); + } + + jr_inst = (rd_reg32(&ctrl->perfmon.cha_num_ms) & + CHA_ID_MS_JR_MASK) >> CHA_ID_MS_JR_SHIFT; + for (i = 0; i < jr_inst; i++) { + state->jr_mid[i].liodn_ms = + rd_reg32(&ctrl->jr_mid[i].liodn_ms); + state->jr_mid[i].liodn_ls = + rd_reg32(&ctrl->jr_mid[i].liodn_ls); + } +} + +static void caam_state_restore(const struct device *dev) +{ + const struct caam_drv_private *ctrlpriv = dev_get_drvdata(dev); + const struct caam_ctl_state *state = &ctrlpriv->state; + struct caam_ctrl __iomem *ctrl = ctrlpriv->ctrl; + u32 deco_inst, jr_inst; + int i; + + wr_reg32(&ctrl->mcr, state->mcr); + wr_reg32(&ctrl->scfgr, state->scfgr); + + deco_inst = (rd_reg32(&ctrl->perfmon.cha_num_ms) & + CHA_ID_MS_DECO_MASK) >> CHA_ID_MS_DECO_SHIFT; + for (i = 0; i < deco_inst; i++) { + wr_reg32(&ctrl->deco_mid[i].liodn_ms, + state->deco_mid[i].liodn_ms); + wr_reg32(&ctrl->deco_mid[i].liodn_ls, + state->deco_mid[i].liodn_ls); + } + + jr_inst = (rd_reg32(&ctrl->perfmon.cha_num_ms) & + CHA_ID_MS_JR_MASK) >> CHA_ID_MS_JR_SHIFT; + for (i = 0; i < jr_inst; i++) { + wr_reg32(&ctrl->jr_mid[i].liodn_ms, + state->jr_mid[i].liodn_ms); + wr_reg32(&ctrl->jr_mid[i].liodn_ls, + state->jr_mid[i].liodn_ls); + } + + if (ctrlpriv->virt_en == 1) + clrsetbits_32(&ctrl->jrstart, 0, JRSTART_JR0_START | + JRSTART_JR1_START | JRSTART_JR2_START | + JRSTART_JR3_START); +} + +static int caam_ctrl_suspend(struct device *dev) +{ + const struct caam_drv_private *ctrlpriv = dev_get_drvdata(dev); + + if (ctrlpriv->caam_off_during_pm && !ctrlpriv->optee_en) + caam_state_save(dev); + + return 0; +} + +static int caam_ctrl_resume(struct device *dev) +{ + struct caam_drv_private *ctrlpriv = dev_get_drvdata(dev); + int ret = 0; + + if (ctrlpriv->caam_off_during_pm && !ctrlpriv->optee_en) { + caam_state_restore(dev); + + /* HW and rng will be reset so deinstantiation can be removed */ + devm_remove_action(dev, devm_deinstantiate_rng, dev); + ret = caam_ctrl_rng_init(dev); + } + + return ret; +} + +static SIMPLE_DEV_PM_OPS(caam_ctrl_pm_ops, caam_ctrl_suspend, caam_ctrl_resume); + /* Probe routine for CAAM top (controller) level */ static int caam_probe(struct platform_device *pdev) { @@ -771,6 +874,8 @@ static int caam_probe(struct platform_device *pdev) caam_imx = (bool)imx_soc_match; + ctrlpriv->caam_off_during_pm = caam_imx && caam_off_during_pm(); + if (imx_soc_match) { /* * Until Layerscape and i.MX OP-TEE get in sync, @@ -1033,6 +1138,7 @@ static struct platform_driver caam_driver = { .driver = { .name = "caam", .of_match_table = caam_match, + .pm = &caam_ctrl_pm_ops, }, .probe = caam_probe, }; diff --git a/drivers/crypto/caam/intern.h b/drivers/crypto/caam/intern.h index b4f7bf77f487..e51320150872 100644 --- a/drivers/crypto/caam/intern.h +++ b/drivers/crypto/caam/intern.h @@ -4,7 +4,7 @@ * Private/internal definitions between modules * * Copyright 2008-2011 Freescale Semiconductor, Inc. - * Copyright 2019 NXP + * Copyright 2019, 2023 NXP */ #ifndef INTERN_H @@ -47,6 +47,16 @@ struct caam_jrentry_info { u32 desc_size; /* Stored size for postprocessing, header derived */ }; +struct caam_jr_state { + dma_addr_t inpbusaddr; + dma_addr_t outbusaddr; +}; + +struct caam_jr_dequeue_params { + struct device *dev; + int enable_itr; +}; + /* Private sub-storage for a single JobR */ struct caam_drv_private_jr { struct list_head list_node; /* Job Ring device list */ @@ -54,6 +64,7 @@ struct caam_drv_private_jr { int ridx; struct caam_job_ring __iomem *rregs; /* JobR's register space */ struct tasklet_struct irqtask; + struct caam_jr_dequeue_params tasklet_params; int irq; /* One per queue */ bool hwrng; @@ -71,6 +82,15 @@ struct caam_drv_private_jr { int tail; /* entinfo (s/w ring) tail index */ void *outring; /* Base of output ring, DMA-safe */ struct crypto_engine *engine; + + struct caam_jr_state state; /* State of the JR during PM */ +}; + +struct caam_ctl_state { + struct masterid deco_mid[16]; + struct masterid jr_mid[4]; + u32 mcr; + u32 scfgr; }; /* @@ -116,6 +136,9 @@ struct caam_drv_private { struct dentry *ctl; /* controller dir */ struct debugfs_blob_wrapper ctl_kek_wrap, ctl_tkek_wrap, ctl_tdsk_wrap; #endif + + int caam_off_during_pm; /* If the CAAM is reset after suspend */ + struct caam_ctl_state state; /* State of the CTL during PM */ }; #ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API diff --git a/drivers/crypto/caam/jr.c b/drivers/crypto/caam/jr.c index 96dea5304d22..316180d26f8a 100644 --- a/drivers/crypto/caam/jr.c +++ b/drivers/crypto/caam/jr.c @@ -117,6 +117,23 @@ static int caam_jr_flush(struct device *dev) return caam_jr_stop_processing(dev, JRCR_RESET); } +/* The resume can be used after a park or a flush if CAAM has not been reset */ +static int caam_jr_restart_processing(struct device *dev) +{ + struct caam_drv_private_jr *jrp = dev_get_drvdata(dev); + u32 halt_status = rd_reg32(&jrp->rregs->jrintstatus) & + JRINT_ERR_HALT_MASK; + + /* Check that the flush/park is completed */ + if (halt_status != JRINT_ERR_HALT_COMPLETE) + return -1; + + /* Resume processing of jobs */ + clrsetbits_32(&jrp->rregs->jrintstatus, 0, JRINT_ERR_HALT_COMPLETE); + + return 0; +} + static int caam_reset_hw_jr(struct device *dev) { struct caam_drv_private_jr *jrp = dev_get_drvdata(dev); @@ -245,7 +262,8 @@ static irqreturn_t caam_jr_interrupt(int irq, void *st_dev) static void caam_jr_dequeue(unsigned long devarg) { int hw_idx, sw_idx, i, head, tail; - struct device *dev = (struct device *)devarg; + struct caam_jr_dequeue_params *params = (void *)devarg; + struct device *dev = params->dev; struct caam_drv_private_jr *jrp = dev_get_drvdata(dev); void (*usercall)(struct device *dev, u32 *desc, u32 status, void *arg); u32 *userdesc, userstatus; @@ -319,8 +337,9 @@ static void caam_jr_dequeue(unsigned long devarg) outring_used--; } - /* reenable / unmask IRQs */ - clrsetbits_32(&jrp->rregs->rconfig_lo, JRCFG_IMSK, 0); + if (params->enable_itr) + /* reenable / unmask IRQs */ + clrsetbits_32(&jrp->rregs->rconfig_lo, JRCFG_IMSK, 0); } /** @@ -470,6 +489,29 @@ int caam_jr_enqueue(struct device *dev, u32 *desc, } EXPORT_SYMBOL(caam_jr_enqueue); +static void caam_jr_init_hw(struct device *dev, dma_addr_t inpbusaddr, + dma_addr_t outbusaddr) +{ + struct caam_drv_private_jr *jrp = dev_get_drvdata(dev); + + wr_reg64(&jrp->rregs->inpring_base, inpbusaddr); + wr_reg64(&jrp->rregs->outring_base, outbusaddr); + wr_reg32(&jrp->rregs->inpring_size, JOBR_DEPTH); + wr_reg32(&jrp->rregs->outring_size, JOBR_DEPTH); + + /* Select interrupt coalescing parameters */ + clrsetbits_32(&jrp->rregs->rconfig_lo, 0, JOBR_INTC | + (JOBR_INTC_COUNT_THLD << JRCFG_ICDCT_SHIFT) | + (JOBR_INTC_TIME_THLD << JRCFG_ICTT_SHIFT)); +} + +static void caam_jr_reset_index(struct caam_drv_private_jr *jrp) +{ + jrp->out_ring_read_index = 0; + jrp->head = 0; + jrp->tail = 0; +} + /* * Init JobR independent of platform property detection */ @@ -506,25 +548,16 @@ static int caam_jr_init(struct device *dev) jrp->entinfo[i].desc_addr_dma = !0; /* Setup rings */ - jrp->out_ring_read_index = 0; - jrp->head = 0; - jrp->tail = 0; - - wr_reg64(&jrp->rregs->inpring_base, inpbusaddr); - wr_reg64(&jrp->rregs->outring_base, outbusaddr); - wr_reg32(&jrp->rregs->inpring_size, JOBR_DEPTH); - wr_reg32(&jrp->rregs->outring_size, JOBR_DEPTH); - + caam_jr_reset_index(jrp); jrp->inpring_avail = JOBR_DEPTH; + caam_jr_init_hw(dev, inpbusaddr, outbusaddr); spin_lock_init(&jrp->inplock); - /* Select interrupt coalescing parameters */ - clrsetbits_32(&jrp->rregs->rconfig_lo, 0, JOBR_INTC | - (JOBR_INTC_COUNT_THLD << JRCFG_ICDCT_SHIFT) | - (JOBR_INTC_TIME_THLD << JRCFG_ICTT_SHIFT)); - - tasklet_init(&jrp->irqtask, caam_jr_dequeue, (unsigned long)dev); + jrp->tasklet_params.dev = dev; + jrp->tasklet_params.enable_itr = 1; + tasklet_init(&jrp->irqtask, caam_jr_dequeue, + (unsigned long)&jrp->tasklet_params); /* Connect job ring interrupt handler. */ error = devm_request_irq(dev, jrp->irq, caam_jr_interrupt, IRQF_SHARED, @@ -635,11 +668,134 @@ static int caam_jr_probe(struct platform_device *pdev) atomic_set(&jrpriv->tfm_count, 0); + device_init_wakeup(&pdev->dev, 1); + device_set_wakeup_enable(&pdev->dev, false); + register_algs(jrpriv, jrdev->parent); return 0; } +static void caam_jr_get_hw_state(struct device *dev) +{ + struct caam_drv_private_jr *jrp = dev_get_drvdata(dev); + + jrp->state.inpbusaddr = rd_reg64(&jrp->rregs->inpring_base); + jrp->state.outbusaddr = rd_reg64(&jrp->rregs->outring_base); +} + +static int caam_jr_suspend(struct device *dev) +{ + struct platform_device *pdev = to_platform_device(dev); + struct caam_drv_private_jr *jrpriv = platform_get_drvdata(pdev); + struct caam_drv_private *ctrlpriv = dev_get_drvdata(dev->parent); + struct caam_jr_dequeue_params suspend_params = { + .dev = dev, + .enable_itr = 0, + }; + + /* Remove the node from Physical JobR list maintained by driver */ + spin_lock(&driver_data.jr_alloc_lock); + list_del(&jrpriv->list_node); + spin_unlock(&driver_data.jr_alloc_lock); + + if (jrpriv->hwrng) + caam_rng_exit(dev->parent); + + if (ctrlpriv->caam_off_during_pm) { + int err; + + tasklet_disable(&jrpriv->irqtask); + + /* mask itr to call flush */ + clrsetbits_32(&jrpriv->rregs->rconfig_lo, 0, JRCFG_IMSK); + + /* Invalid job in process */ + err = caam_jr_flush(dev); + if (err) { + dev_err(dev, "Failed to flush\n"); + return err; + } + + /* Dequeing jobs flushed */ + caam_jr_dequeue((unsigned long)&suspend_params); + + /* Save state */ + caam_jr_get_hw_state(dev); + } else if (device_may_wakeup(&pdev->dev)) { + enable_irq_wake(jrpriv->irq); + } + + return 0; +} + +static int caam_jr_resume(struct device *dev) +{ + struct platform_device *pdev = to_platform_device(dev); + struct caam_drv_private_jr *jrpriv = platform_get_drvdata(pdev); + struct caam_drv_private *ctrlpriv = dev_get_drvdata(dev->parent); + + if (ctrlpriv->caam_off_during_pm) { + u64 inp_addr; + int err; + + /* + * Check if the CAAM has been resetted checking the address of + * the input ring + */ + inp_addr = rd_reg64(&jrpriv->rregs->inpring_base); + if (inp_addr != 0) { + /* JR still has some configuration */ + if (inp_addr == jrpriv->state.inpbusaddr) { + /* JR has not been resetted */ + err = caam_jr_restart_processing(dev); + if (err) { + dev_err(dev, + "Restart processing failed\n"); + return err; + } + + tasklet_enable(&jrpriv->irqtask); + + clrsetbits_32(&jrpriv->rregs->rconfig_lo, + JRCFG_IMSK, 0); + + goto add_jr; + } else if (ctrlpriv->optee_en) { + /* JR has been used by OPTEE, reset it */ + err = caam_reset_hw_jr(dev); + if (err) { + dev_err(dev, "Failed to reset JR\n"); + return err; + } + } else { + /* No explanation, return error */ + return -EIO; + } + } + + caam_jr_reset_index(jrpriv); + caam_jr_init_hw(dev, jrpriv->state.inpbusaddr, + jrpriv->state.outbusaddr); + + tasklet_enable(&jrpriv->irqtask); + } else if (device_may_wakeup(&pdev->dev)) { + disable_irq_wake(jrpriv->irq); + } + +add_jr: + spin_lock(&driver_data.jr_alloc_lock); + list_add_tail(&jrpriv->list_node, &driver_data.jr_list); + spin_unlock(&driver_data.jr_alloc_lock); + + if (jrpriv->hwrng) + jrpriv->hwrng = !caam_rng_init(dev->parent); + + return 0; +} + +static SIMPLE_DEV_PM_OPS(caam_jr_pm_ops, caam_jr_suspend, caam_jr_resume); + static const struct of_device_id caam_jr_match[] = { { .compatible = "fsl,sec-v4.0-job-ring", @@ -655,6 +811,7 @@ static struct platform_driver caam_jr_driver = { .driver = { .name = "caam_jr", .of_match_table = caam_jr_match, + .pm = &caam_jr_pm_ops, }, .probe = caam_jr_probe, .remove = caam_jr_remove, diff --git a/drivers/crypto/caam/regs.h b/drivers/crypto/caam/regs.h index 0f87bd365582..873df9de9890 100644 --- a/drivers/crypto/caam/regs.h +++ b/drivers/crypto/caam/regs.h @@ -584,8 +584,7 @@ struct caam_ctrl { u32 deco_rsr; /* DECORSR - Deco Request Source */ u32 rsvd11; u32 deco_rq; /* DECORR - DECO Request */ - struct masterid deco_mid[5]; /* DECOxLIODNR - 1 per DECO */ - u32 rsvd5[22]; + struct masterid deco_mid[16]; /* DECOxLIODNR - 1 per DECO */ /* DECO Availability/Reset Section 120-3ff */ u32 deco_avail; /* DAR - DECO availability */ From 355bf65080399b0c1aba34368331802ce1998aef Mon Sep 17 00:00:00 2001 From: Wang Ming Date: Wed, 26 Jul 2023 20:04:41 +0800 Subject: [PATCH 267/656] crypto: atmel - Use dev_err_probe instead of dev_err It is possible that dma_request_chan will return EPROBE_DEFER, which means that dd->dev is not ready yet. In this case, dev_err(dd->dev), there will be no output. This patch fixes the bug. Signed-off-by: Wang Ming Reviewed-by: Ryan Wanner Signed-off-by: Herbert Xu --- drivers/crypto/atmel-sha.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/crypto/atmel-sha.c b/drivers/crypto/atmel-sha.c index f2031f934be9..54fec72dfba2 100644 --- a/drivers/crypto/atmel-sha.c +++ b/drivers/crypto/atmel-sha.c @@ -2499,8 +2499,8 @@ static int atmel_sha_dma_init(struct atmel_sha_dev *dd) { dd->dma_lch_in.chan = dma_request_chan(dd->dev, "tx"); if (IS_ERR(dd->dma_lch_in.chan)) { - dev_err(dd->dev, "DMA channel is not available\n"); - return PTR_ERR(dd->dma_lch_in.chan); + return dev_err_probe(dd->dev, PTR_ERR(dd->dma_lch_in.chan), + "DMA channel is not available\n"); } dd->dma_lch_in.dma_conf.dst_addr = dd->phys_base + From 6a4b8aa0a916b39a39175584c07222434fa6c6ef Mon Sep 17 00:00:00 2001 From: David Howells Date: Wed, 26 Jul 2023 22:53:19 +0100 Subject: [PATCH 268/656] crypto: af_alg - Fix missing initialisation affecting gcm-aes-s390 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fix af_alg_alloc_areq() to initialise areq->first_rsgl.sgl.sgt.sgl to point to the scatterlist array in areq->first_rsgl.sgl.sgl. Without this, the gcm-aes-s390 driver will oops when it tries to do gcm_walk_start() on req->dst because req->dst is set to the value of areq->first_rsgl.sgl.sgl by _aead_recvmsg() calling aead_request_set_crypt(). The problem comes if an empty ciphertext is passed: the loop in af_alg_get_rsgl() just passes straight out and doesn't set areq->first_rsgl up. This isn't a problem on x86_64 using gcmaes_crypt_by_sg() because, as far as I can tell, that ignores req->dst and only uses req->src[*]. [*] Is this a bug in aesni-intel_glue.c? The s390x oops looks something like: Unable to handle kernel pointer dereference in virtual kernel address space Failing address: 0000000a00000000 TEID: 0000000a00000803 Fault in home space mode while using kernel ASCE. AS:00000000a43a0007 R3:0000000000000024 Oops: 003b ilc:2 [#1] SMP ... Call Trace: [<000003ff7fc3d47e>] gcm_walk_start+0x16/0x28 [aes_s390] [<00000000a2a342f2>] crypto_aead_decrypt+0x9a/0xb8 [<00000000a2a60888>] aead_recvmsg+0x478/0x698 [<00000000a2e519a0>] sock_recvmsg+0x70/0xb0 [<00000000a2e51a56>] sock_read_iter+0x76/0xa0 [<00000000a273e066>] vfs_read+0x26e/0x2a8 [<00000000a273e8c4>] ksys_read+0xbc/0x100 [<00000000a311d808>] __do_syscall+0x1d0/0x1f8 [<00000000a312ff30>] system_call+0x70/0x98 Last Breaking-Event-Address: [<000003ff7fc3e6b4>] gcm_aes_crypt+0x104/0xa68 [aes_s390] Fixes: c1abe6f570af ("crypto: af_alg: Use extract_iter_to_sg() to create scatterlists") Reported-by: Ondrej Mosnáček Link: https://lore.kernel.org/r/CAAUqJDuRkHE8fPgZJGaKjUjd3QfGwzfumuJBmStPqBhubxyk_A@mail.gmail.com/ Signed-off-by: David Howells cc: Herbert Xu cc: Sven Schnelle cc: Harald Freudenberger cc: "David S. Miller" cc: Paolo Abeni cc: linux-crypto@vger.kernel.org cc: linux-s390@vger.kernel.org cc: regressions@lists.linux.dev Tested-by: Sven Schnelle Tested-by: Ondrej Mosnáček Signed-off-by: Herbert Xu --- crypto/af_alg.c | 1 + 1 file changed, 1 insertion(+) diff --git a/crypto/af_alg.c b/crypto/af_alg.c index 06b15b9f661c..9ee8575d3b1a 100644 --- a/crypto/af_alg.c +++ b/crypto/af_alg.c @@ -1192,6 +1192,7 @@ struct af_alg_async_req *af_alg_alloc_areq(struct sock *sk, areq->areqlen = areqlen; areq->sk = sk; + areq->first_rsgl.sgl.sgt.sgl = areq->first_rsgl.sgl.sgl; areq->last_rsgl = NULL; INIT_LIST_HEAD(&areq->rsgl_list); areq->tsgl = NULL; From 0788257aeebee9b8413c1c29e7d2029329b1a82e Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Fri, 28 Jul 2023 07:48:27 -0600 Subject: [PATCH 269/656] hwrng: Explicitly include correct DT includes The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it was merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring Signed-off-by: Herbert Xu --- drivers/char/hw_random/atmel-rng.c | 2 +- drivers/char/hw_random/bcm2835-rng.c | 3 +-- drivers/char/hw_random/ingenic-trng.c | 2 +- drivers/char/hw_random/iproc-rng200.c | 3 +-- drivers/char/hw_random/npcm-rng.c | 3 +-- drivers/char/hw_random/omap-rng.c | 2 -- drivers/char/hw_random/omap3-rom-rng.c | 1 - drivers/char/hw_random/pasemi-rng.c | 3 +-- drivers/char/hw_random/pic32-rng.c | 5 ++--- drivers/char/hw_random/stm32-rng.c | 3 ++- drivers/char/hw_random/xgene-rng.c | 5 ++--- drivers/char/hw_random/xiphera-trng.c | 1 - 12 files changed, 12 insertions(+), 21 deletions(-) diff --git a/drivers/char/hw_random/atmel-rng.c b/drivers/char/hw_random/atmel-rng.c index b8effe77d80f..a37367ebcbac 100644 --- a/drivers/char/hw_random/atmel-rng.c +++ b/drivers/char/hw_random/atmel-rng.c @@ -15,7 +15,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/char/hw_random/bcm2835-rng.c b/drivers/char/hw_random/bcm2835-rng.c index e98fcac578d6..e19b0f9f48b9 100644 --- a/drivers/char/hw_random/bcm2835-rng.c +++ b/drivers/char/hw_random/bcm2835-rng.c @@ -8,8 +8,7 @@ #include #include #include -#include -#include +#include #include #include #include diff --git a/drivers/char/hw_random/ingenic-trng.c b/drivers/char/hw_random/ingenic-trng.c index 3967a8dbe967..1672320e7d3d 100644 --- a/drivers/char/hw_random/ingenic-trng.c +++ b/drivers/char/hw_random/ingenic-trng.c @@ -11,8 +11,8 @@ #include #include #include +#include #include -#include #include #include diff --git a/drivers/char/hw_random/iproc-rng200.c b/drivers/char/hw_random/iproc-rng200.c index 06bc060534d8..34df3f0d3e45 100644 --- a/drivers/char/hw_random/iproc-rng200.c +++ b/drivers/char/hw_random/iproc-rng200.c @@ -12,8 +12,7 @@ #include #include #include -#include -#include +#include #include #include diff --git a/drivers/char/hw_random/npcm-rng.c b/drivers/char/hw_random/npcm-rng.c index 9903d0357e06..8a304b754217 100644 --- a/drivers/char/hw_random/npcm-rng.c +++ b/drivers/char/hw_random/npcm-rng.c @@ -8,12 +8,11 @@ #include #include #include +#include #include #include #include -#include #include -#include #define NPCM_RNGCS_REG 0x00 /* Control and status register */ #define NPCM_RNGD_REG 0x04 /* Data register */ diff --git a/drivers/char/hw_random/omap-rng.c b/drivers/char/hw_random/omap-rng.c index 00ff96703dd2..be03f76a2a80 100644 --- a/drivers/char/hw_random/omap-rng.c +++ b/drivers/char/hw_random/omap-rng.c @@ -26,8 +26,6 @@ #include #include #include -#include -#include #include #include #include diff --git a/drivers/char/hw_random/omap3-rom-rng.c b/drivers/char/hw_random/omap3-rom-rng.c index f06e4f95114f..18dc46b1b58e 100644 --- a/drivers/char/hw_random/omap3-rom-rng.c +++ b/drivers/char/hw_random/omap3-rom-rng.c @@ -20,7 +20,6 @@ #include #include #include -#include #include #include diff --git a/drivers/char/hw_random/pasemi-rng.c b/drivers/char/hw_random/pasemi-rng.c index 2498d4ef9fe2..6959d6edd44c 100644 --- a/drivers/char/hw_random/pasemi-rng.c +++ b/drivers/char/hw_random/pasemi-rng.c @@ -9,11 +9,10 @@ #include #include +#include #include #include #include -#include -#include #include #define SDCRNG_CTL_REG 0x00 diff --git a/drivers/char/hw_random/pic32-rng.c b/drivers/char/hw_random/pic32-rng.c index 1902f4389a3f..888e6f5cec1f 100644 --- a/drivers/char/hw_random/pic32-rng.c +++ b/drivers/char/hw_random/pic32-rng.c @@ -12,9 +12,8 @@ #include #include #include +#include #include -#include -#include #include #include @@ -110,7 +109,7 @@ static struct platform_driver pic32_rng_driver = { .probe = pic32_rng_probe, .driver = { .name = "pic32-rng", - .of_match_table = of_match_ptr(pic32_rng_of_match), + .of_match_table = pic32_rng_of_match, }, }; diff --git a/drivers/char/hw_random/stm32-rng.c b/drivers/char/hw_random/stm32-rng.c index a6731cf0627a..efb6a9f9a11b 100644 --- a/drivers/char/hw_random/stm32-rng.c +++ b/drivers/char/hw_random/stm32-rng.c @@ -10,8 +10,9 @@ #include #include #include +#include #include -#include +#include #include #include #include diff --git a/drivers/char/hw_random/xgene-rng.c b/drivers/char/hw_random/xgene-rng.c index 7c8f3cb7c6af..c25bb169563d 100644 --- a/drivers/char/hw_random/xgene-rng.c +++ b/drivers/char/hw_random/xgene-rng.c @@ -15,9 +15,8 @@ #include #include #include -#include -#include -#include +#include +#include #include #define RNG_MAX_DATUM 4 diff --git a/drivers/char/hw_random/xiphera-trng.c b/drivers/char/hw_random/xiphera-trng.c index 2a9fea72b2e0..2c586d1fe8a9 100644 --- a/drivers/char/hw_random/xiphera-trng.c +++ b/drivers/char/hw_random/xiphera-trng.c @@ -7,7 +7,6 @@ #include #include #include -#include #include #include From 1ce1cd8208ad6060e4fcf6e09068c8954687c127 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Fri, 28 Jul 2023 13:50:15 -0600 Subject: [PATCH 270/656] hwrng: Enable COMPILE_TEST for more drivers There's quite a few hwrng drivers which are easily enabled for COMPILE_TEST, so let's enable them. The dependency on HW_RANDOM is redundant, so drop that while we're here. Signed-off-by: Rob Herring Signed-off-by: Herbert Xu --- drivers/char/hw_random/Kconfig | 32 +++++++++++++++------------- drivers/char/hw_random/amd-rng.c | 1 + drivers/char/hw_random/ingenic-rng.c | 2 +- 3 files changed, 19 insertions(+), 16 deletions(-) diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig index 5d72b8da3c36..8de74dcfa18c 100644 --- a/drivers/char/hw_random/Kconfig +++ b/drivers/char/hw_random/Kconfig @@ -37,7 +37,7 @@ config HW_RANDOM_TIMERIOMEM config HW_RANDOM_INTEL tristate "Intel HW Random Number Generator support" - depends on (X86 || IA64) && PCI + depends on (X86 || IA64 || COMPILE_TEST) && PCI default HW_RANDOM help This driver provides kernel-side support for the Random Number @@ -50,7 +50,8 @@ config HW_RANDOM_INTEL config HW_RANDOM_AMD tristate "AMD HW Random Number Generator support" - depends on (X86 || PPC_MAPLE) && PCI + depends on (X86 || PPC_MAPLE || COMPILE_TEST) + depends on PCI && HAS_IOPORT_MAP default HW_RANDOM help This driver provides kernel-side support for the Random Number @@ -63,7 +64,7 @@ config HW_RANDOM_AMD config HW_RANDOM_ATMEL tristate "Atmel Random Number Generator support" - depends on (ARCH_AT91 || COMPILE_TEST) && HAVE_CLK && OF + depends on (ARCH_AT91 || COMPILE_TEST) default HW_RANDOM help This driver provides kernel-side support for the Random Number @@ -113,7 +114,8 @@ config HW_RANDOM_IPROC_RNG200 config HW_RANDOM_GEODE tristate "AMD Geode HW Random Number Generator support" - depends on X86_32 && PCI + depends on (X86_32 || COMPILE_TEST) + depends on PCI default HW_RANDOM help This driver provides kernel-side support for the Random Number @@ -205,7 +207,7 @@ config HW_RANDOM_OCTEON config HW_RANDOM_PASEMI tristate "PA Semi HW Random Number Generator support" - depends on PPC_PASEMI + depends on PPC_PASEMI || (PPC && COMPILE_TEST) default HW_RANDOM help This driver provides kernel-side support for the Random Number @@ -228,7 +230,7 @@ config HW_RANDOM_VIRTIO config HW_RANDOM_MXC_RNGA tristate "Freescale i.MX RNGA Random Number Generator" - depends on SOC_IMX31 + depends on SOC_IMX31 || COMPILE_TEST default HW_RANDOM help This driver provides kernel-side support for the Random Number @@ -241,7 +243,7 @@ config HW_RANDOM_MXC_RNGA config HW_RANDOM_IMX_RNGC tristate "Freescale i.MX RNGC Random Number Generator" - depends on HAS_IOMEM && HAVE_CLK + depends on HAS_IOMEM depends on SOC_IMX25 || SOC_IMX6SL || SOC_IMX6SLL || SOC_IMX6UL || COMPILE_TEST default HW_RANDOM help @@ -256,8 +258,7 @@ config HW_RANDOM_IMX_RNGC config HW_RANDOM_INGENIC_RNG tristate "Ingenic Random Number Generator support" - depends on HW_RANDOM - depends on MACH_JZ4780 || MACH_X1000 + depends on MACH_JZ4780 || MACH_X1000 || COMPILE_TEST default HW_RANDOM help This driver provides kernel-side support for the Random Number Generator @@ -323,7 +324,7 @@ config HW_RANDOM_POWERNV config HW_RANDOM_HISI tristate "Hisilicon Random Number Generator support" - depends on HW_RANDOM && ARCH_HISI + depends on ARCH_HISI || COMPILE_TEST default HW_RANDOM help This driver provides kernel-side support for the Random Number @@ -347,7 +348,7 @@ config HW_RANDOM_HISTB config HW_RANDOM_ST tristate "ST Microelectronics HW Random Number Generator support" - depends on HW_RANDOM && (ARCH_STI || COMPILE_TEST) + depends on ARCH_STI || COMPILE_TEST help This driver provides kernel-side support for the Random Number Generator hardware found on STi series of SoCs. @@ -357,7 +358,7 @@ config HW_RANDOM_ST config HW_RANDOM_XGENE tristate "APM X-Gene True Random Number Generator (TRNG) support" - depends on HW_RANDOM && ARCH_XGENE + depends on ARCH_XGENE || COMPILE_TEST default HW_RANDOM help This driver provides kernel-side support for the Random Number @@ -370,7 +371,7 @@ config HW_RANDOM_XGENE config HW_RANDOM_STM32 tristate "STMicroelectronics STM32 random number generator" - depends on HW_RANDOM && (ARCH_STM32 || COMPILE_TEST) + depends on ARCH_STM32 || COMPILE_TEST depends on HAS_IOMEM default HW_RANDOM help @@ -385,7 +386,7 @@ config HW_RANDOM_STM32 config HW_RANDOM_PIC32 tristate "Microchip PIC32 Random Number Generator support" depends on MACH_PIC32 || COMPILE_TEST - default y + default HW_RANDOM if MACH_PIC32 help This driver provides kernel-side support for the Random Number Generator hardware found on a PIC32. @@ -424,7 +425,8 @@ config HW_RANDOM_MESON config HW_RANDOM_CAVIUM tristate "Cavium ThunderX Random Number Generator support" - depends on HW_RANDOM && PCI && ARCH_THUNDER + depends on PCI + depends on ARCH_THUNDER || (ARM64 && COMPILE_TEST) default HW_RANDOM help This driver provides kernel-side support for the Random Number diff --git a/drivers/char/hw_random/amd-rng.c b/drivers/char/hw_random/amd-rng.c index 0555e3838bce..86162a13681e 100644 --- a/drivers/char/hw_random/amd-rng.c +++ b/drivers/char/hw_random/amd-rng.c @@ -26,6 +26,7 @@ #include #include +#include #include #include #include diff --git a/drivers/char/hw_random/ingenic-rng.c b/drivers/char/hw_random/ingenic-rng.c index 055cfe59f519..4f18c3fa5427 100644 --- a/drivers/char/hw_random/ingenic-rng.c +++ b/drivers/char/hw_random/ingenic-rng.c @@ -95,7 +95,7 @@ static int ingenic_rng_probe(struct platform_device *pdev) return PTR_ERR(priv->base); } - priv->version = (enum ingenic_rng_version)of_device_get_match_data(&pdev->dev); + priv->version = (enum ingenic_rng_version)(uintptr_t)of_device_get_match_data(&pdev->dev); priv->rng.name = pdev->name; priv->rng.init = ingenic_rng_init; From 0d2b6a1b8515204924b9174ae0135e1f4ff29b21 Mon Sep 17 00:00:00 2001 From: William Qiu Date: Fri, 4 Aug 2023 10:02:52 +0800 Subject: [PATCH 271/656] dt-bindings: qspi: cdns,qspi-nor: Add clocks for StarFive JH7110 SoC The QSPI controller needs three clock items to work properly on StarFive JH7110 SoC, so there is need to change the maxItems's value to 3. Signed-off-by: William Qiu Reviewed-by: Hal Feng Reviewed-by: Conor Dooley Link: https://lore.kernel.org/r/20230804020254.291239-2-william.qiu@starfivetech.com Signed-off-by: Mark Brown --- .../devicetree/bindings/spi/cdns,qspi-nor.yaml | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml index 4f15f9a0cc34..cca81f89e252 100644 --- a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml +++ b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml @@ -86,7 +86,17 @@ properties: maxItems: 1 clocks: - maxItems: 1 + minItems: 1 + maxItems: 3 + + clock-names: + oneOf: + - items: + - const: ref + - items: + - const: ref + - const: ahb + - const: apb cdns,fifo-depth: description: From 33f1ef6d4eb6bca726608ed939c9fd94d96ceefd Mon Sep 17 00:00:00 2001 From: William Qiu Date: Fri, 4 Aug 2023 10:02:53 +0800 Subject: [PATCH 272/656] spi: cadence-quadspi: Add clock configuration for StarFive JH7110 QSPI Add JH7110's clock initialization code to the driver. Signed-off-by: William Qiu Reviewed-by: Hal Feng Link: https://lore.kernel.org/r/20230804020254.291239-3-william.qiu@starfivetech.com Signed-off-by: Mark Brown --- drivers/spi/spi-cadence-quadspi.c | 67 +++++++++++++++++++++++++++++++ 1 file changed, 67 insertions(+) diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c index e1a8cf08ef66..6064b8e0319e 100644 --- a/drivers/spi/spi-cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -46,6 +46,12 @@ #define CQSPI_OP_WIDTH(part) ((part).nbytes ? ilog2((part).buswidth) : 0) +enum { + CLK_QSPI_APB = 0, + CLK_QSPI_AHB, + CLK_QSPI_NUM, +}; + struct cqspi_st; struct cqspi_flash_pdata { @@ -63,6 +69,7 @@ struct cqspi_st { struct platform_device *pdev; struct spi_master *master; struct clk *clk; + struct clk *clks[CLK_QSPI_NUM]; unsigned int sclk; void __iomem *iobase; @@ -91,6 +98,8 @@ struct cqspi_st { bool wr_completion; bool slow_sram; bool apb_ahb_hazard; + + bool is_jh7110; /* Flag for StarFive JH7110 SoC */ }; struct cqspi_driver_platdata { @@ -99,6 +108,8 @@ struct cqspi_driver_platdata { int (*indirect_read_dma)(struct cqspi_flash_pdata *f_pdata, u_char *rxbuf, loff_t from_addr, size_t n_rx); u32 (*get_dma_status)(struct cqspi_st *cqspi); + int (*jh7110_clk_init)(struct platform_device *pdev, + struct cqspi_st *cqspi); }; /* Operation timeout value */ @@ -1629,6 +1640,51 @@ static int cqspi_setup_flash(struct cqspi_st *cqspi) return 0; } +static int cqspi_jh7110_clk_init(struct platform_device *pdev, struct cqspi_st *cqspi) +{ + static struct clk_bulk_data qspiclk[] = { + { .id = "apb" }, + { .id = "ahb" }, + }; + + int ret = 0; + + ret = devm_clk_bulk_get(&pdev->dev, ARRAY_SIZE(qspiclk), qspiclk); + if (ret) { + dev_err(&pdev->dev, "%s: failed to get qspi clocks\n", __func__); + return ret; + } + + cqspi->clks[CLK_QSPI_APB] = qspiclk[0].clk; + cqspi->clks[CLK_QSPI_AHB] = qspiclk[1].clk; + + ret = clk_prepare_enable(cqspi->clks[CLK_QSPI_APB]); + if (ret) { + dev_err(&pdev->dev, "%s: failed to enable CLK_QSPI_APB\n", __func__); + return ret; + } + + ret = clk_prepare_enable(cqspi->clks[CLK_QSPI_AHB]); + if (ret) { + dev_err(&pdev->dev, "%s: failed to enable CLK_QSPI_AHB\n", __func__); + goto disable_apb_clk; + } + + cqspi->is_jh7110 = true; + + return 0; + +disable_apb_clk: + clk_disable_unprepare(cqspi->clks[CLK_QSPI_APB]); + + return ret; +} + +static void cqspi_jh7110_disable_clk(struct platform_device *pdev, struct cqspi_st *cqspi) +{ + clk_disable_unprepare(cqspi->clks[CLK_QSPI_AHB]); + clk_disable_unprepare(cqspi->clks[CLK_QSPI_APB]); +} static int cqspi_probe(struct platform_device *pdev) { const struct cqspi_driver_platdata *ddata; @@ -1654,6 +1710,7 @@ static int cqspi_probe(struct platform_device *pdev) cqspi->pdev = pdev; cqspi->master = master; + cqspi->is_jh7110 = false; platform_set_drvdata(pdev, cqspi); /* Obtain configuration from OF. */ @@ -1765,6 +1822,12 @@ static int cqspi_probe(struct platform_device *pdev) if (ddata->quirks & CQSPI_NEEDS_APB_AHB_HAZARD_WAR) cqspi->apb_ahb_hazard = true; + if (ddata->jh7110_clk_init) { + ret = cqspi_jh7110_clk_init(pdev, cqspi); + if (ret) + goto probe_clk_failed; + } + if (of_device_is_compatible(pdev->dev.of_node, "xlnx,versal-ospi-1.0")) { ret = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)); @@ -1829,6 +1892,9 @@ static void cqspi_remove(struct platform_device *pdev) clk_disable_unprepare(cqspi->clk); + if (cqspi->is_jh7110) + cqspi_jh7110_disable_clk(pdev, cqspi); + pm_runtime_put_sync(&pdev->dev); pm_runtime_disable(&pdev->dev); } @@ -1896,6 +1962,7 @@ static const struct cqspi_driver_platdata versal_ospi = { static const struct cqspi_driver_platdata jh7110_qspi = { .quirks = CQSPI_DISABLE_DAC_MODE, + .jh7110_clk_init = cqspi_jh7110_clk_init, }; static const struct cqspi_driver_platdata pensando_cdns_qspi = { From b9a281f1f72b9786a4cb04b4105c121f3333aabf Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Fri, 4 Aug 2023 08:48:44 -0600 Subject: [PATCH 273/656] hwrng: xgene: Add explicit io.h include Commit 0788257aeebe ("hwrng: Explicitly include correct DT includes") removed an implicit include of io.h. On most architectures, there's still an implicit include of it, but not on s390. Enabling COMPILE_TEST in commit 1ce1cd8208ad ("hwrng: Enable COMPILE_TEST for more drivers") exposed this. Fixes: 0788257aeebe ("hwrng: Explicitly include correct DT includes") Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202308042049.8R2tNRoo-lkp@intel.com/ Signed-off-by: Rob Herring Signed-off-by: Herbert Xu --- drivers/char/hw_random/xgene-rng.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/char/hw_random/xgene-rng.c b/drivers/char/hw_random/xgene-rng.c index c25bb169563d..99f4e86ac3e9 100644 --- a/drivers/char/hw_random/xgene-rng.c +++ b/drivers/char/hw_random/xgene-rng.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include From 4b591ed6971191134e331f02300b4ec4dee188ea Mon Sep 17 00:00:00 2001 From: Alina Yu Date: Mon, 7 Aug 2023 14:28:06 +0800 Subject: [PATCH 274/656] regulator: dt-bindings: rtq2208: Add Richtek RTQ2208 SubPMIC Add bindings for Richtek RTQ2208 IC controlled SubPMIC Signed-off-by: Alina Yu Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/1691389687-31211-2-git-send-email-alina_yu@richtek.com Signed-off-by: Mark Brown --- .../bindings/regulator/richtek,rtq2208.yaml | 197 ++++++++++++++++++ 1 file changed, 197 insertions(+) create mode 100644 Documentation/devicetree/bindings/regulator/richtek,rtq2208.yaml diff --git a/Documentation/devicetree/bindings/regulator/richtek,rtq2208.yaml b/Documentation/devicetree/bindings/regulator/richtek,rtq2208.yaml new file mode 100644 index 000000000000..609c06615bdc --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/richtek,rtq2208.yaml @@ -0,0 +1,197 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/richtek,rtq2208.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Richtek RTQ2208 SubPMIC Regulator + +maintainers: + - Alina Yu + +description: | + RTQ2208 is a highly integrated power converter that offers functional safety dual + multi-configurable synchronous buck converters and two LDOs. + + Bucks support "regulator-allowed-modes" and "regulator-mode". The former defines the permitted + switching operation in normal mode; the latter defines the operation in suspend to RAM mode. + + No matter the RTQ2208 is configured to normal or suspend to RAM mode, there are two switching + operation modes for all buck rails, automatic power saving mode (Auto mode) and forced continuous + conduction mode (FCCM). + + The definition of modes is in the datasheet which is available in below link + and their meaning is:: + 0 - Auto mode for power saving, which reducing the switching frequency at light load condition + to maintain high frequency. + 1 - FCCM to meet the strict voltage regulation accuracy, which keeping constant switching frequency. + + Datasheet will be available soon at + https://www.richtek.com/assets/Products + +properties: + compatible: + enum: + - richtek,rtq2208 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + richtek,mtp-sel-high: + type: boolean + description: + vout register selection based on this boolean value. + false - Using DVS0 register setting to adjust vout + true - Using DVS1 register setting to adjust vout + + regulators: + type: object + additionalProperties: false + + patternProperties: + "^buck-[a-h]$": + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + description: + description for buck-[a-h] regulator. + + properties: + regulator-allowed-modes: + description: + two buck modes in different switching accuracy. + 0 - Auto mode + 1 - FCCM + items: + enum: [0, 1] + + "^ldo[1-2]$": + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + description: + regulator description for ldo[1-2]. + +required: + - compatible + - reg + - regulators + +additionalProperties: false + +examples: + - | + #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + + pmic@10 { + compatible = "richtek,rtq2208"; + reg = <0x10>; + interrupts-extended = <&gpio26 0 IRQ_TYPE_LEVEL_LOW>; + richtek,mtp-sel-high; + + regulators { + buck-a { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <2050000>; + regulator-allowed-modes = <0 1>; + regulator-always-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-mode = <1>; + }; + }; + buck-b { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <2050000>; + regulator-allowed-modes = <0 1>; + regulator-always-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-mode = <1>; + }; + }; + buck-c { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <2050000>; + regulator-allowed-modes = <0 1>; + regulator-always-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-mode = <1>; + }; + }; + buck-d { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <2050000>; + regulator-allowed-modes = <0 1>; + regulator-always-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-mode = <1>; + }; + }; + buck-e { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <2050000>; + regulator-allowed-modes = <0 1>; + regulator-always-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-mode = <1>; + }; + }; + buck-f { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <2050000>; + regulator-allowed-modes = <0 1>; + regulator-always-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-mode = <1>; + }; + }; + buck-g { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <2050000>; + regulator-allowed-modes = <0 1>; + regulator-always-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-mode = <1>; + }; + }; + buck-h { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <2050000>; + regulator-allowed-modes = <0 1>; + regulator-always-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-mode = <1>; + }; + }; + ldo1 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + ldo2 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + }; + }; + }; From 85a11f55621a0c18b22b43ab4219450ac1d19386 Mon Sep 17 00:00:00 2001 From: Alina Yu Date: Mon, 7 Aug 2023 14:28:07 +0800 Subject: [PATCH 275/656] regulator: rtq2208: Add Richtek RTQ2208 SubPMIC driver Add support for the RTQ2208 SubPMIC This ic integrates with configurable, synchrnous buck converters and two ldos. Signed-off-by: Alina Yu Link: https://lore.kernel.org/r/1691389687-31211-3-git-send-email-alina_yu@richtek.com Signed-off-by: Mark Brown --- drivers/regulator/Kconfig | 11 + drivers/regulator/Makefile | 1 + drivers/regulator/rtq2208-regulator.c | 583 ++++++++++++++++++++++++++ 3 files changed, 595 insertions(+) create mode 100644 drivers/regulator/rtq2208-regulator.c diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig index 94f44736473e..bf4b5b07e09e 100644 --- a/drivers/regulator/Kconfig +++ b/drivers/regulator/Kconfig @@ -1254,6 +1254,17 @@ config REGULATOR_RTQ6752 synchronous boost converters for PAVDD, and one synchronous NAVDD buck-boost. This device is suitable for automotive TFT-LCD panel. +config REGULATOR_RTQ2208 + tristate "Richtek RTQ2208 SubPMIC Regulator" + depends on I2C + select REGMAP_I2C + help + This driver adds support for RTQ2208 SubPMIC regulators. + The RTQ2208 is a multi-phase, programmable power management IC that + integrate with dual multi-configurable, synchronous buck converters + and two ldos. It features wide output voltage range from 0.4V to 2.05V + and the capability to configure the corresponding power stages. + config REGULATOR_S2MPA01 tristate "Samsung S2MPA01 voltage regulator" depends on MFD_SEC_CORE || COMPILE_TEST diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile index 77b22bdd2791..67468cfcc4f3 100644 --- a/drivers/regulator/Makefile +++ b/drivers/regulator/Makefile @@ -147,6 +147,7 @@ obj-$(CONFIG_REGULATOR_RT6245) += rt6245-regulator.o obj-$(CONFIG_REGULATOR_RTMV20) += rtmv20-regulator.o obj-$(CONFIG_REGULATOR_RTQ2134) += rtq2134-regulator.o obj-$(CONFIG_REGULATOR_RTQ6752) += rtq6752-regulator.o +obj-$(CONFIG_REGULATOR_RTQ2208) += rtq2208-regulator.o obj-$(CONFIG_REGULATOR_S2MPA01) += s2mpa01.o obj-$(CONFIG_REGULATOR_S2MPS11) += s2mps11.o obj-$(CONFIG_REGULATOR_S5M8767) += s5m8767.o diff --git a/drivers/regulator/rtq2208-regulator.c b/drivers/regulator/rtq2208-regulator.c new file mode 100644 index 000000000000..2463aea4192c --- /dev/null +++ b/drivers/regulator/rtq2208-regulator.c @@ -0,0 +1,583 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Register */ +#define RTQ2208_REG_GLOBAL_INT1 0x12 +#define RTQ2208_REG_FLT_RECORDBUCK_CB 0x18 +#define RTQ2208_REG_GLOBAL_INT1_MASK 0x1D +#define RTQ2208_REG_FLT_MASKBUCK_CB 0x1F +#define RTQ2208_REG_BUCK_C_CFG0 0x32 +#define RTQ2208_REG_BUCK_B_CFG0 0x42 +#define RTQ2208_REG_BUCK_A_CFG0 0x52 +#define RTQ2208_REG_BUCK_D_CFG0 0x62 +#define RTQ2208_REG_BUCK_G_CFG0 0x72 +#define RTQ2208_REG_BUCK_F_CFG0 0x82 +#define RTQ2208_REG_BUCK_E_CFG0 0x92 +#define RTQ2208_REG_BUCK_H_CFG0 0xA2 +#define RTQ2208_REG_LDO1_CFG 0xB1 +#define RTQ2208_REG_LDO2_CFG 0xC1 + +/* Mask */ +#define RTQ2208_BUCK_NR_MTP_SEL_MASK GENMASK(7, 0) +#define RTQ2208_BUCK_EN_NR_MTP_SEL0_MASK BIT(0) +#define RTQ2208_BUCK_EN_NR_MTP_SEL1_MASK BIT(1) +#define RTQ2208_BUCK_RSPUP_MASK GENMASK(6, 4) +#define RTQ2208_BUCK_RSPDN_MASK GENMASK(2, 0) +#define RTQ2208_BUCK_NRMODE_MASK BIT(5) +#define RTQ2208_BUCK_STRMODE_MASK BIT(5) +#define RTQ2208_BUCK_EN_STR_MASK BIT(0) +#define RTQ2208_LDO_EN_STR_MASK BIT(7) +#define RTQ2208_EN_DIS_MASK BIT(0) +#define RTQ2208_BUCK_RAMP_SEL_MASK GENMASK(2, 0) +#define RTQ2208_HD_INT_MASK BIT(0) + +/* Size */ +#define RTQ2208_VOUT_MAXNUM 256 +#define RTQ2208_BUCK_NUM_IRQ_REGS 5 +#define RTQ2208_STS_NUM_IRQ_REGS 2 + +/* Value */ +#define RTQ2208_RAMP_VALUE_MIN_uV 500 +#define RTQ2208_RAMP_VALUE_MAX_uV 64000 + +#define RTQ2208_BUCK_MASK(uv_irq, ov_irq) (1 << ((uv_irq) % 8) | 1 << ((ov_irq) % 8)) + +enum { + RTQ2208_BUCK_B = 0, + RTQ2208_BUCK_C, + RTQ2208_BUCK_D, + RTQ2208_BUCK_A, + RTQ2208_BUCK_F, + RTQ2208_BUCK_G, + RTQ2208_BUCK_H, + RTQ2208_BUCK_E, + RTQ2208_LDO2, + RTQ2208_LDO1, + RTQ2208_LDO_MAX, +}; + +enum { + RTQ2208_AUTO_MODE = 0, + RTQ2208_FCCM, +}; + +struct rtq2208_regulator_desc { + struct regulator_desc desc; + unsigned int mtp_sel_reg; + unsigned int mtp_sel_mask; + unsigned int mode_reg; + unsigned int mode_mask; + unsigned int suspend_config_reg; + unsigned int suspend_enable_mask; + unsigned int suspend_mode_mask; +}; + +struct rtq2208_rdev_map { + struct regulator_dev *rdev[RTQ2208_LDO_MAX]; + struct regmap *regmap; + struct device *dev; +}; + +/* set Normal Auto/FCCM mode */ +static int rtq2208_set_mode(struct regulator_dev *rdev, unsigned int mode) +{ + const struct rtq2208_regulator_desc *rdesc = + (const struct rtq2208_regulator_desc *)rdev->desc; + unsigned int val, shift; + + switch (mode) { + case REGULATOR_MODE_NORMAL: + val = RTQ2208_AUTO_MODE; + break; + case REGULATOR_MODE_FAST: + val = RTQ2208_FCCM; + break; + default: + return -EINVAL; + } + + shift = ffs(rdesc->mode_mask) - 1; + return regmap_update_bits(rdev->regmap, rdesc->mode_reg, + rdesc->mode_mask, val << shift); +} + +static unsigned int rtq2208_get_mode(struct regulator_dev *rdev) +{ + const struct rtq2208_regulator_desc *rdesc = + (const struct rtq2208_regulator_desc *)rdev->desc; + unsigned int mode_val; + int ret; + + ret = regmap_read(rdev->regmap, rdesc->mode_reg, &mode_val); + if (ret) + return REGULATOR_MODE_INVALID; + + return (mode_val & rdesc->mode_mask) ? REGULATOR_MODE_FAST : REGULATOR_MODE_NORMAL; +} + +static int rtq2208_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay) +{ + const struct regulator_desc *desc = rdev->desc; + unsigned int sel = 0, val; + + ramp_delay = max(ramp_delay, RTQ2208_RAMP_VALUE_MIN_uV); + ramp_delay = min(ramp_delay, RTQ2208_RAMP_VALUE_MAX_uV); + + ramp_delay /= RTQ2208_RAMP_VALUE_MIN_uV; + + /* + * fls(ramp_delay) - 1: doing LSB shift, let it starts from 0 + * + * RTQ2208_BUCK_RAMP_SEL_MASK - sel: doing descending order shifting. + * Because the relation of seleltion and value is like that + * + * seletion: value + * 000: 64mv + * 001: 32mv + * ... + * 111: 0.5mv + * + * For example, if I would like to select 64mv, the fls(ramp_delay) - 1 will be 0b111, + * and I need to use 0b111 - sel to do the shifting + */ + + sel = fls(ramp_delay) - 1; + sel = RTQ2208_BUCK_RAMP_SEL_MASK - sel; + + val = FIELD_PREP(RTQ2208_BUCK_RSPUP_MASK, sel) | FIELD_PREP(RTQ2208_BUCK_RSPDN_MASK, sel); + + return regmap_update_bits(rdev->regmap, desc->ramp_reg, + RTQ2208_BUCK_RSPUP_MASK | RTQ2208_BUCK_RSPDN_MASK, val); +} + +static int rtq2208_set_suspend_enable(struct regulator_dev *rdev) +{ + const struct rtq2208_regulator_desc *rdesc = + (const struct rtq2208_regulator_desc *)rdev->desc; + + return regmap_set_bits(rdev->regmap, rdesc->suspend_config_reg, rdesc->suspend_enable_mask); +} + +static int rtq2208_set_suspend_disable(struct regulator_dev *rdev) +{ + const struct rtq2208_regulator_desc *rdesc = + (const struct rtq2208_regulator_desc *)rdev->desc; + + return regmap_update_bits(rdev->regmap, rdesc->suspend_config_reg, rdesc->suspend_enable_mask, 0); +} + +static int rtq2208_set_suspend_mode(struct regulator_dev *rdev, unsigned int mode) +{ + const struct rtq2208_regulator_desc *rdesc = + (const struct rtq2208_regulator_desc *)rdev->desc; + unsigned int val, shift; + + switch (mode) { + case REGULATOR_MODE_NORMAL: + val = RTQ2208_AUTO_MODE; + break; + case REGULATOR_MODE_FAST: + val = RTQ2208_FCCM; + break; + default: + return -EINVAL; + } + + shift = ffs(rdesc->suspend_mode_mask) - 1; + + return regmap_update_bits(rdev->regmap, rdesc->suspend_config_reg, + rdesc->suspend_mode_mask, val << shift); +} + +static const struct regulator_ops rtq2208_regulator_buck_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_mode = rtq2208_set_mode, + .get_mode = rtq2208_get_mode, + .set_ramp_delay = rtq2208_set_ramp_delay, + .set_active_discharge = regulator_set_active_discharge_regmap, + .set_suspend_enable = rtq2208_set_suspend_enable, + .set_suspend_disable = rtq2208_set_suspend_disable, + .set_suspend_mode = rtq2208_set_suspend_mode, +}; + +static const struct regulator_ops rtq2208_regulator_ldo_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_active_discharge = regulator_set_active_discharge_regmap, + .set_suspend_enable = rtq2208_set_suspend_enable, + .set_suspend_disable = rtq2208_set_suspend_disable, +}; + +static unsigned int rtq2208_of_map_mode(unsigned int mode) +{ + switch (mode) { + case RTQ2208_AUTO_MODE: + return REGULATOR_MODE_NORMAL; + case RTQ2208_FCCM: + return REGULATOR_MODE_FAST; + default: + return REGULATOR_MODE_INVALID; + } +} + +static int rtq2208_init_irq_mask(struct rtq2208_rdev_map *rdev_map, unsigned int *buck_masks) +{ + unsigned char buck_clr_masks[5] = {0x33, 0x33, 0x33, 0x33, 0x33}, + sts_clr_masks[2] = {0xE7, 0xF7}, sts_masks[2] = {0xE6, 0xF6}; + int ret; + + /* write clear all buck irq once */ + ret = regmap_bulk_write(rdev_map->regmap, RTQ2208_REG_FLT_RECORDBUCK_CB, buck_clr_masks, 5); + if (ret) + return dev_err_probe(rdev_map->dev, ret, "Failed to clr buck irqs\n"); + + /* write clear general irq once */ + ret = regmap_bulk_write(rdev_map->regmap, RTQ2208_REG_GLOBAL_INT1, sts_clr_masks, 2); + if (ret) + return dev_err_probe(rdev_map->dev, ret, "Failed to clr general irqs\n"); + + /* unmask buck ov/uv irq */ + ret = regmap_bulk_write(rdev_map->regmap, RTQ2208_REG_FLT_MASKBUCK_CB, buck_masks, 5); + if (ret) + return dev_err_probe(rdev_map->dev, ret, "Failed to unmask buck irqs\n"); + + /* unmask needed general irq */ + return regmap_bulk_write(rdev_map->regmap, RTQ2208_REG_GLOBAL_INT1_MASK, sts_masks, 2); +} + +static irqreturn_t rtq2208_irq_handler(int irqno, void *devid) +{ + unsigned char buck_flags[RTQ2208_BUCK_NUM_IRQ_REGS], sts_flags[RTQ2208_STS_NUM_IRQ_REGS]; + int ret = 0, i, uv_bit, ov_bit; + struct rtq2208_rdev_map *rdev_map = devid; + struct regulator_dev *rdev; + + if (!rdev_map) + return IRQ_NONE; + + /* read irq event */ + ret = regmap_bulk_read(rdev_map->regmap, RTQ2208_REG_FLT_RECORDBUCK_CB, + buck_flags, ARRAY_SIZE(buck_flags)); + if (ret) + return IRQ_NONE; + + ret = regmap_bulk_read(rdev_map->regmap, RTQ2208_REG_GLOBAL_INT1, + sts_flags, ARRAY_SIZE(sts_flags)); + if (ret) + return IRQ_NONE; + + /* clear irq event */ + ret = regmap_bulk_write(rdev_map->regmap, RTQ2208_REG_FLT_RECORDBUCK_CB, + buck_flags, ARRAY_SIZE(buck_flags)); + if (ret) + return IRQ_NONE; + + ret = regmap_bulk_write(rdev_map->regmap, RTQ2208_REG_GLOBAL_INT1, + sts_flags, ARRAY_SIZE(sts_flags)); + if (ret) + return IRQ_NONE; + + for (i = 0; i < RTQ2208_LDO_MAX; i++) { + if (!rdev_map->rdev[i]) + continue; + + rdev = rdev_map->rdev[i]; + /* uv irq */ + uv_bit = (i & 1) ? 4 : 0; + if (buck_flags[i >> 1] & (1 << uv_bit)) + regulator_notifier_call_chain(rdev, + REGULATOR_EVENT_UNDER_VOLTAGE, NULL); + /* ov irq */ + ov_bit = uv_bit + 1; + if (buck_flags[i >> 1] & (1 << ov_bit)) + regulator_notifier_call_chain(rdev, + REGULATOR_EVENT_REGULATION_OUT, NULL); + + /* hd irq */ + if (sts_flags[1] & RTQ2208_HD_INT_MASK) + regulator_notifier_call_chain(rdev, + REGULATOR_EVENT_OVER_TEMP, NULL); + } + + return IRQ_HANDLED; +} + +#define RTQ2208_REGULATOR_INFO(_name, _base) \ +{ \ + .name = #_name, \ + .base = _base, \ +} +#define BUCK_RG_BASE(_id) RTQ2208_REG_BUCK_##_id##_CFG0 +#define BUCK_RG_SHIFT(_base, _shift) (_base + _shift) +#define LDO_RG_BASE(_id) RTQ2208_REG_LDO##_id##_CFG +#define LDO_RG_SHIFT(_base, _shift) (_base + _shift) +#define VSEL_SHIFT(_sel) (_sel ? 3 : 1) +#define MTP_SEL_MASK(_sel) RTQ2208_BUCK_EN_NR_MTP_SEL##_sel##_MASK + +static const struct linear_range rtq2208_vout_range[] = { + REGULATOR_LINEAR_RANGE(400000, 0, 180, 5000), + REGULATOR_LINEAR_RANGE(1310000, 181, 255, 10000), +}; + +static int rtq2208_of_get_fixed_voltage(struct device *dev, + struct of_regulator_match *rtq2208_ldo_match, int n_fixed) +{ + struct device_node *np; + struct of_regulator_match *match; + struct rtq2208_regulator_desc *rdesc; + struct regulator_init_data *init_data; + int ret, i; + + if (!dev->of_node) + return -ENODEV; + + np = of_get_child_by_name(dev->of_node, "regulators"); + if (!np) + np = dev->of_node; + + ret = of_regulator_match(dev, np, rtq2208_ldo_match, n_fixed); + + of_node_put(np); + + if (ret < 0) + return ret; + + for (i = 0; i < n_fixed; i++) { + match = rtq2208_ldo_match + i; + init_data = match->init_data; + rdesc = (struct rtq2208_regulator_desc *)match->driver_data; + + if (!init_data || !rdesc) + continue; + + if (init_data->constraints.min_uV == init_data->constraints.max_uV) + rdesc->desc.fixed_uV = init_data->constraints.min_uV; + } + + return 0; +} + +static void rtq2208_init_regulator_desc(struct rtq2208_regulator_desc *rdesc, int mtp_sel, + int idx, struct of_regulator_match *rtq2208_ldo_match, int *ldo_idx) +{ + struct regulator_desc *desc; + static const struct { + char *name; + int base; + } regulator_info[] = { + RTQ2208_REGULATOR_INFO(buck-b, BUCK_RG_BASE(B)), + RTQ2208_REGULATOR_INFO(buck-c, BUCK_RG_BASE(C)), + RTQ2208_REGULATOR_INFO(buck-d, BUCK_RG_BASE(D)), + RTQ2208_REGULATOR_INFO(buck-a, BUCK_RG_BASE(A)), + RTQ2208_REGULATOR_INFO(buck-f, BUCK_RG_BASE(F)), + RTQ2208_REGULATOR_INFO(buck-g, BUCK_RG_BASE(G)), + RTQ2208_REGULATOR_INFO(buck-h, BUCK_RG_BASE(H)), + RTQ2208_REGULATOR_INFO(buck-e, BUCK_RG_BASE(E)), + RTQ2208_REGULATOR_INFO(ldo2, LDO_RG_BASE(2)), + RTQ2208_REGULATOR_INFO(ldo1, LDO_RG_BASE(1)), + }, *curr_info; + + curr_info = regulator_info + idx; + desc = &rdesc->desc; + desc->name = curr_info->name; + desc->of_match = of_match_ptr(curr_info->name); + desc->regulators_node = of_match_ptr("regulators"); + desc->id = idx; + desc->owner = THIS_MODULE; + desc->type = REGULATOR_VOLTAGE; + desc->enable_mask = mtp_sel ? MTP_SEL_MASK(1) : MTP_SEL_MASK(0); + desc->active_discharge_on = RTQ2208_EN_DIS_MASK; + desc->active_discharge_off = 0; + desc->active_discharge_mask = RTQ2208_EN_DIS_MASK; + + rdesc->mode_mask = RTQ2208_BUCK_NRMODE_MASK; + + if (idx >= RTQ2208_BUCK_B && idx <= RTQ2208_BUCK_E) { + /* init buck desc */ + desc->enable_reg = BUCK_RG_SHIFT(curr_info->base, 2); + desc->ops = &rtq2208_regulator_buck_ops; + desc->vsel_reg = curr_info->base + VSEL_SHIFT(mtp_sel); + desc->vsel_mask = RTQ2208_BUCK_NR_MTP_SEL_MASK; + desc->n_voltages = RTQ2208_VOUT_MAXNUM; + desc->linear_ranges = rtq2208_vout_range; + desc->n_linear_ranges = ARRAY_SIZE(rtq2208_vout_range); + desc->ramp_reg = BUCK_RG_SHIFT(curr_info->base, 5); + desc->active_discharge_reg = curr_info->base; + desc->of_map_mode = rtq2208_of_map_mode; + + rdesc->mode_reg = BUCK_RG_SHIFT(curr_info->base, 2); + rdesc->suspend_config_reg = BUCK_RG_SHIFT(curr_info->base, 4); + rdesc->suspend_enable_mask = RTQ2208_BUCK_EN_STR_MASK; + rdesc->suspend_mode_mask = RTQ2208_BUCK_STRMODE_MASK; + } else { + /* init ldo desc */ + desc->enable_reg = curr_info->base; + desc->ops = &rtq2208_regulator_ldo_ops; + desc->n_voltages = 1; + desc->active_discharge_reg = LDO_RG_SHIFT(curr_info->base, 2); + + rtq2208_ldo_match[*ldo_idx].name = desc->name; + rtq2208_ldo_match[*ldo_idx].driver_data = rdesc; + rtq2208_ldo_match[(*ldo_idx)++].desc = desc; + + rdesc->suspend_config_reg = curr_info->base; + rdesc->suspend_enable_mask = RTQ2208_LDO_EN_STR_MASK; + } +} + +static int rtq2208_parse_regulator_dt_data(int n_regulator, const unsigned int *regulator_idx_table, + struct rtq2208_regulator_desc *rdesc[RTQ2208_LDO_MAX], struct device *dev) +{ + struct of_regulator_match rtq2208_ldo_match[2]; + int mtp_sel, ret, i, idx, ldo_idx = 0; + + /* get mtp_sel0 or mtp_sel1 */ + mtp_sel = device_property_read_bool(dev, "richtek,mtp-sel-high"); + + for (i = 0; i < n_regulator; i++) { + idx = regulator_idx_table[i]; + + rdesc[i] = devm_kcalloc(dev, 1, sizeof(*rdesc[0]), GFP_KERNEL); + if (!rdesc[i]) + return -ENOMEM; + + rtq2208_init_regulator_desc(rdesc[i], mtp_sel, idx, rtq2208_ldo_match, &ldo_idx); + } + + /* init ldo fixed_uV */ + ret = rtq2208_of_get_fixed_voltage(dev, rtq2208_ldo_match, ldo_idx); + if (ret) + return dev_err_probe(dev, ret, "Failed to get ldo fixed_uV\n"); + + return 0; + +} + +/** different slave address corresponds different used bucks + * slave address 0x10: BUCK[BCA FGE] + * slave address 0x20: BUCK[BC FGHE] + * slave address 0x40: BUCK[C G] + */ +static int rtq2208_regulator_check(int slave_addr, int *num, + int *regulator_idx_table, unsigned int *buck_masks) +{ + static bool rtq2208_used_table[3][RTQ2208_LDO_MAX] = { + /* BUCK[BCA FGE], LDO[12] */ + {1, 1, 0, 1, 1, 1, 0, 1, 1, 1}, + /* BUCK[BC FGHE], LDO[12]*/ + {1, 1, 0, 0, 1, 1, 1, 1, 1, 1}, + /* BUCK[C G], LDO[12] */ + {0, 1, 0, 0, 0, 1, 0, 0, 1, 1}, + }; + int i, idx = ffs(slave_addr >> 4) - 1; + u8 mask; + + for (i = 0; i < RTQ2208_LDO_MAX; i++) { + if (!rtq2208_used_table[idx][i]) + continue; + + regulator_idx_table[(*num)++] = i; + + mask = RTQ2208_BUCK_MASK(4 * i, 4 * i + 1); + buck_masks[i >> 1] &= ~mask; + } + + return 0; +} + +static const struct regmap_config rtq2208_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = 0xEF, +}; + +static int rtq2208_probe(struct i2c_client *i2c) +{ + struct device *dev = &i2c->dev; + struct regmap *regmap; + struct rtq2208_regulator_desc *rdesc[RTQ2208_LDO_MAX]; + struct regulator_dev *rdev; + struct regulator_config cfg; + struct rtq2208_rdev_map *rdev_map; + int i, ret = 0, idx, n_regulator = 0; + unsigned int regulator_idx_table[RTQ2208_LDO_MAX], + buck_masks[RTQ2208_BUCK_NUM_IRQ_REGS] = {0x33, 0x33, 0x33, 0x33, 0x33}; + + rdev_map = devm_kzalloc(dev, sizeof(struct rtq2208_rdev_map), GFP_KERNEL); + if (!rdev_map) + return -ENOMEM; + + regmap = devm_regmap_init_i2c(i2c, &rtq2208_regmap_config); + if (IS_ERR(regmap)) + return dev_err_probe(dev, PTR_ERR(regmap), "Failed to allocate regmap\n"); + + /* get needed regulator */ + ret = rtq2208_regulator_check(i2c->addr, &n_regulator, regulator_idx_table, buck_masks); + if (ret) + return dev_err_probe(dev, ret, "Failed to check used regulators\n"); + + rdev_map->regmap = regmap; + rdev_map->dev = dev; + + cfg.dev = dev; + + /* init regulator desc */ + ret = rtq2208_parse_regulator_dt_data(n_regulator, regulator_idx_table, rdesc, dev); + if (ret) + return ret; + + for (i = 0; i < n_regulator; i++) { + idx = regulator_idx_table[i]; + + /* register regulator */ + rdev = devm_regulator_register(dev, &rdesc[i]->desc, &cfg); + if (IS_ERR(rdev)) + return PTR_ERR(rdev); + + rdev_map->rdev[idx] = rdev; + } + + /* init interrupt mask */ + ret = rtq2208_init_irq_mask(rdev_map, buck_masks); + if (ret) + return ret; + + /* register interrupt */ + return devm_request_threaded_irq(dev, i2c->irq, NULL, rtq2208_irq_handler, + IRQF_ONESHOT, dev_name(dev), rdev_map); +} + +static const struct of_device_id rtq2208_device_tables[] = { + { .compatible = "richtek,rtq2208" }, + {} +}; +MODULE_DEVICE_TABLE(of, rtq2208_device_tables); + +static struct i2c_driver rtq2208_driver = { + .driver = { + .name = "rtq2208", + .of_match_table = rtq2208_device_tables, + }, + .probe_new = rtq2208_probe, +}; +module_i2c_driver(rtq2208_driver); + +MODULE_AUTHOR("Alina Yu "); +MODULE_DESCRIPTION("Richtek RTQ2208 Regulator Driver"); +MODULE_LICENSE("GPL"); From ed2f4c745fb2bc51bb1b402ff2294587cb0b207a Mon Sep 17 00:00:00 2001 From: Naresh Solanki Date: Tue, 1 Aug 2023 12:24:52 +0200 Subject: [PATCH 276/656] regulator: max5970: Rename driver and remove wildcard The previous version of this driver included wildcards in file names and descriptions. This patch renames the driver to only support MAX5970 and MAX5978, which are the only chips that the driver actually supports. Signed-off-by: Naresh Solanki Link: https://lore.kernel.org/r/20230801102453.1798292-1-Naresh.Solanki@9elements.com Signed-off-by: Mark Brown --- drivers/regulator/Kconfig | 6 ++-- drivers/regulator/Makefile | 2 +- ...ax597x-regulator.c => max5970-regulator.c} | 28 +++++++++---------- 3 files changed, 18 insertions(+), 18 deletions(-) rename drivers/regulator/{max597x-regulator.c => max5970-regulator.c} (94%) diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig index 94f44736473e..a5c9de1cab2b 100644 --- a/drivers/regulator/Kconfig +++ b/drivers/regulator/Kconfig @@ -546,11 +546,11 @@ config REGULATOR_MAX1586 regulator via I2C bus. The provided regulator is suitable for PXA27x chips to control VCC_CORE and VCC_USIM voltages. -config REGULATOR_MAX597X - tristate "Maxim 597x power switch and monitor" +config REGULATOR_MAX5970 + tristate "Maxim 5970/5978 power switch and monitor" depends on I2C depends on OF - depends on MFD_MAX597X + depends on MFD_MAX5970 help This driver controls a Maxim 5970/5978 switch via I2C bus. The MAX5970/5978 is a smart switch with no output regulation, but diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile index 77b22bdd2791..453289cdd444 100644 --- a/drivers/regulator/Makefile +++ b/drivers/regulator/Makefile @@ -67,7 +67,7 @@ obj-$(CONFIG_REGULATOR_LTC3589) += ltc3589.o obj-$(CONFIG_REGULATOR_LTC3676) += ltc3676.o obj-$(CONFIG_REGULATOR_MAX14577) += max14577-regulator.o obj-$(CONFIG_REGULATOR_MAX1586) += max1586.o -obj-$(CONFIG_REGULATOR_MAX597X) += max597x-regulator.o +obj-$(CONFIG_REGULATOR_MAX5970) += max5970-regulator.o obj-$(CONFIG_REGULATOR_MAX77541) += max77541-regulator.o obj-$(CONFIG_REGULATOR_MAX77620) += max77620-regulator.o obj-$(CONFIG_REGULATOR_MAX77650) += max77650-regulator.o diff --git a/drivers/regulator/max597x-regulator.c b/drivers/regulator/max5970-regulator.c similarity index 94% rename from drivers/regulator/max597x-regulator.c rename to drivers/regulator/max5970-regulator.c index 7873a5267555..b56a174cde3d 100644 --- a/drivers/regulator/max597x-regulator.c +++ b/drivers/regulator/max5970-regulator.c @@ -20,9 +20,9 @@ #include #include -#include +#include -struct max597x_regulator { +struct max5970_regulator { int num_switches, mon_rng, irng, shunt_micro_ohms, lim_uA; struct regmap *regmap; }; @@ -58,7 +58,7 @@ static int max597x_set_vp(struct regulator_dev *rdev, int lim_uV, int severity, bool enable, bool overvoltage) { int off_h, off_l, reg, ret; - struct max597x_regulator *data = rdev_get_drvdata(rdev); + struct max5970_regulator *data = rdev_get_drvdata(rdev); int channel = rdev_get_id(rdev); if (overvoltage) { @@ -140,7 +140,7 @@ static int max597x_set_ocp(struct regulator_dev *rdev, int lim_uA, int val, reg; unsigned int vthst, vthfst; - struct max597x_regulator *data = rdev_get_drvdata(rdev); + struct max5970_regulator *data = rdev_get_drvdata(rdev); int rdev_id = rdev_get_id(rdev); /* * MAX5970 doesn't has enable control for ocp. @@ -222,7 +222,7 @@ static int max597x_dt_parse(struct device_node *np, const struct regulator_desc *desc, struct regulator_config *cfg) { - struct max597x_regulator *data = cfg->driver_data; + struct max5970_regulator *data = cfg->driver_data; int ret = 0; ret = @@ -274,7 +274,7 @@ static int max597x_irq_handler(int irq, struct regulator_irq_data *rid, unsigned long *dev_mask) { struct regulator_err_state *stat; - struct max597x_regulator *d = (struct max597x_regulator *)rid->data; + struct max5970_regulator *d = (struct max5970_regulator *)rid->data; int val, ret, i; ret = max597x_regmap_read_clear(d->regmap, MAX5970_REG_FAULT0, &val); @@ -394,7 +394,7 @@ static int max597x_adc_range(struct regmap *regmap, const int ch, static int max597x_setup_irq(struct device *dev, int irq, struct regulator_dev *rdevs[MAX5970_NUM_SWITCHES], - int num_switches, struct max597x_regulator *data) + int num_switches, struct max5970_regulator *data) { struct regulator_irq_desc max597x_notif = { .name = "max597x-irq", @@ -425,9 +425,9 @@ static int max597x_setup_irq(struct device *dev, static int max597x_regulator_probe(struct platform_device *pdev) { - struct max597x_data *max597x; + struct max5970_data *max597x; struct regmap *regmap = dev_get_regmap(pdev->dev.parent, NULL); - struct max597x_regulator *data; + struct max5970_regulator *data; struct i2c_client *i2c = to_i2c_client(pdev->dev.parent); struct regulator_config config = { }; struct regulator_dev *rdev; @@ -438,16 +438,16 @@ static int max597x_regulator_probe(struct platform_device *pdev) if (!regmap) return -EPROBE_DEFER; - max597x = devm_kzalloc(&i2c->dev, sizeof(struct max597x_data), GFP_KERNEL); + max597x = devm_kzalloc(&i2c->dev, sizeof(struct max5970_data), GFP_KERNEL); if (!max597x) return -ENOMEM; i2c_set_clientdata(i2c, max597x); if (of_device_is_compatible(i2c->dev.of_node, "maxim,max5978")) - max597x->num_switches = MAX597x_TYPE_MAX5978; + max597x->num_switches = MAX5978_NUM_SWITCHES; else if (of_device_is_compatible(i2c->dev.of_node, "maxim,max5970")) - max597x->num_switches = MAX597x_TYPE_MAX5970; + max597x->num_switches = MAX5970_NUM_SWITCHES; else return -ENODEV; @@ -456,7 +456,7 @@ static int max597x_regulator_probe(struct platform_device *pdev) for (i = 0; i < num_switches; i++) { data = - devm_kzalloc(&i2c->dev, sizeof(struct max597x_regulator), + devm_kzalloc(&i2c->dev, sizeof(struct max5970_regulator), GFP_KERNEL); if (!data) return -ENOMEM; @@ -500,7 +500,7 @@ static int max597x_regulator_probe(struct platform_device *pdev) static struct platform_driver max597x_regulator_driver = { .driver = { - .name = "max597x-regulator", + .name = "max5970-regulator", .probe_type = PROBE_PREFER_ASYNCHRONOUS, }, .probe = max597x_regulator_probe, From e9759d403baaeda9ea4d61d64c3151e214561217 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 28 Jul 2023 17:32:01 +0800 Subject: [PATCH 277/656] spi: amd: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230728093221.3312026-2-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-amd.c | 50 +++++++++++++++++++++---------------------- 1 file changed, 25 insertions(+), 25 deletions(-) diff --git a/drivers/spi/spi-amd.c b/drivers/spi/spi-amd.c index b19766571f28..e4345ad5cd36 100644 --- a/drivers/spi/spi-amd.c +++ b/drivers/spi/spi-amd.c @@ -215,9 +215,9 @@ static int amd_spi_execute_opcode(struct amd_spi *amd_spi) } } -static int amd_spi_master_setup(struct spi_device *spi) +static int amd_spi_host_setup(struct spi_device *spi) { - struct amd_spi *amd_spi = spi_master_get_devdata(spi->master); + struct amd_spi *amd_spi = spi_controller_get_devdata(spi->controller); amd_spi_clear_fifo_ptr(amd_spi); @@ -272,7 +272,7 @@ static int amd_set_spi_freq(struct amd_spi *amd_spi, u32 speed_hz) } static inline int amd_spi_fifo_xfer(struct amd_spi *amd_spi, - struct spi_master *master, + struct spi_controller *host, struct spi_message *message) { struct spi_transfer *xfer = NULL; @@ -353,15 +353,15 @@ fin_msg: return -ENODEV; } - spi_finalize_current_message(master); + spi_finalize_current_message(host); return message->status; } -static int amd_spi_master_transfer(struct spi_master *master, +static int amd_spi_host_transfer(struct spi_controller *host, struct spi_message *msg) { - struct amd_spi *amd_spi = spi_master_get_devdata(master); + struct amd_spi *amd_spi = spi_controller_get_devdata(host); struct spi_device *spi = msg->spi; amd_spi_select_chip(amd_spi, spi_get_chipselect(spi, 0)); @@ -370,7 +370,7 @@ static int amd_spi_master_transfer(struct spi_master *master, * Extract spi_transfers from the spi message and * program the controller. */ - return amd_spi_fifo_xfer(amd_spi, master, msg); + return amd_spi_fifo_xfer(amd_spi, host, msg); } static size_t amd_spi_max_transfer_size(struct spi_device *spi) @@ -381,16 +381,16 @@ static size_t amd_spi_max_transfer_size(struct spi_device *spi) static int amd_spi_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; - struct spi_master *master; + struct spi_controller *host; struct amd_spi *amd_spi; int err; - /* Allocate storage for spi_master and driver private data */ - master = devm_spi_alloc_master(dev, sizeof(struct amd_spi)); - if (!master) - return dev_err_probe(dev, -ENOMEM, "Error allocating SPI master\n"); + /* Allocate storage for host and driver private data */ + host = devm_spi_alloc_host(dev, sizeof(struct amd_spi)); + if (!host) + return dev_err_probe(dev, -ENOMEM, "Error allocating SPI host\n"); - amd_spi = spi_master_get_devdata(master); + amd_spi = spi_controller_get_devdata(host); amd_spi->io_remap_addr = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(amd_spi->io_remap_addr)) return dev_err_probe(dev, PTR_ERR(amd_spi->io_remap_addr), @@ -400,20 +400,20 @@ static int amd_spi_probe(struct platform_device *pdev) amd_spi->version = (enum amd_spi_versions) device_get_match_data(dev); - /* Initialize the spi_master fields */ - master->bus_num = 0; - master->num_chipselect = 4; - master->mode_bits = 0; - master->flags = SPI_CONTROLLER_HALF_DUPLEX; - master->max_speed_hz = AMD_SPI_MAX_HZ; - master->min_speed_hz = AMD_SPI_MIN_HZ; - master->setup = amd_spi_master_setup; - master->transfer_one_message = amd_spi_master_transfer; - master->max_transfer_size = amd_spi_max_transfer_size; - master->max_message_size = amd_spi_max_transfer_size; + /* Initialize the spi_controller fields */ + host->bus_num = 0; + host->num_chipselect = 4; + host->mode_bits = 0; + host->flags = SPI_CONTROLLER_HALF_DUPLEX; + host->max_speed_hz = AMD_SPI_MAX_HZ; + host->min_speed_hz = AMD_SPI_MIN_HZ; + host->setup = amd_spi_host_setup; + host->transfer_one_message = amd_spi_host_transfer; + host->max_transfer_size = amd_spi_max_transfer_size; + host->max_message_size = amd_spi_max_transfer_size; /* Register the controller with SPI framework */ - err = devm_spi_register_master(dev, master); + err = devm_spi_register_controller(dev, host); if (err) return dev_err_probe(dev, err, "error registering SPI controller\n"); From 21ac58f59125f1c45fdd3791cbc5cc3683514564 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 28 Jul 2023 17:32:02 +0800 Subject: [PATCH 278/656] spi: aspeed: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230728093221.3312026-3-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-aspeed-smc.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/spi/spi-aspeed-smc.c b/drivers/spi/spi-aspeed-smc.c index e75b0d51f06a..21b0fa646c7d 100644 --- a/drivers/spi/spi-aspeed-smc.c +++ b/drivers/spi/spi-aspeed-smc.c @@ -295,7 +295,7 @@ static const struct aspeed_spi_data ast2400_spi_data; static int do_aspeed_spi_exec_op(struct spi_mem *mem, const struct spi_mem_op *op) { - struct aspeed_spi *aspi = spi_controller_get_devdata(mem->spi->master); + struct aspeed_spi *aspi = spi_controller_get_devdata(mem->spi->controller); struct aspeed_spi_chip *chip = &aspi->chips[spi_get_chipselect(mem->spi, 0)]; u32 addr_mode, addr_mode_backup; u32 ctl_val; @@ -374,7 +374,7 @@ static int aspeed_spi_exec_op(struct spi_mem *mem, const struct spi_mem_op *op) static const char *aspeed_spi_get_name(struct spi_mem *mem) { - struct aspeed_spi *aspi = spi_controller_get_devdata(mem->spi->master); + struct aspeed_spi *aspi = spi_controller_get_devdata(mem->spi->controller); struct device *dev = aspi->dev; return devm_kasprintf(dev, GFP_KERNEL, "%s.%d", dev_name(dev), @@ -553,7 +553,7 @@ static int aspeed_spi_do_calibration(struct aspeed_spi_chip *chip); static int aspeed_spi_dirmap_create(struct spi_mem_dirmap_desc *desc) { - struct aspeed_spi *aspi = spi_controller_get_devdata(desc->mem->spi->master); + struct aspeed_spi *aspi = spi_controller_get_devdata(desc->mem->spi->controller); struct aspeed_spi_chip *chip = &aspi->chips[spi_get_chipselect(desc->mem->spi, 0)]; struct spi_mem_op *op = &desc->info.op_tmpl; u32 ctl_val; @@ -620,7 +620,7 @@ static int aspeed_spi_dirmap_create(struct spi_mem_dirmap_desc *desc) static ssize_t aspeed_spi_dirmap_read(struct spi_mem_dirmap_desc *desc, u64 offset, size_t len, void *buf) { - struct aspeed_spi *aspi = spi_controller_get_devdata(desc->mem->spi->master); + struct aspeed_spi *aspi = spi_controller_get_devdata(desc->mem->spi->controller); struct aspeed_spi_chip *chip = &aspi->chips[spi_get_chipselect(desc->mem->spi, 0)]; /* Switch to USER command mode if mapping window is too small */ @@ -669,7 +669,7 @@ static void aspeed_spi_chip_enable(struct aspeed_spi *aspi, unsigned int cs, boo static int aspeed_spi_setup(struct spi_device *spi) { - struct aspeed_spi *aspi = spi_controller_get_devdata(spi->master); + struct aspeed_spi *aspi = spi_controller_get_devdata(spi->controller); const struct aspeed_spi_data *data = aspi->data; unsigned int cs = spi_get_chipselect(spi, 0); struct aspeed_spi_chip *chip = &aspi->chips[cs]; @@ -697,7 +697,7 @@ static int aspeed_spi_setup(struct spi_device *spi) static void aspeed_spi_cleanup(struct spi_device *spi) { - struct aspeed_spi *aspi = spi_controller_get_devdata(spi->master); + struct aspeed_spi *aspi = spi_controller_get_devdata(spi->controller); unsigned int cs = spi_get_chipselect(spi, 0); aspeed_spi_chip_enable(aspi, cs, false); @@ -726,7 +726,7 @@ static int aspeed_spi_probe(struct platform_device *pdev) if (!data) return -ENODEV; - ctlr = devm_spi_alloc_master(dev, sizeof(*aspi)); + ctlr = devm_spi_alloc_host(dev, sizeof(*aspi)); if (!ctlr) return -ENOMEM; From 9d5920b37ab4a970f658a6a30b54cc6d6a7d2d3d Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 28 Jul 2023 17:32:03 +0800 Subject: [PATCH 279/656] spi: spi-axi-spi-engine: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230728093221.3312026-4-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-axi-spi-engine.c | 58 ++++++++++++++++---------------- 1 file changed, 29 insertions(+), 29 deletions(-) diff --git a/drivers/spi/spi-axi-spi-engine.c b/drivers/spi/spi-axi-spi-engine.c index 89661f3b0d44..c5b568543149 100644 --- a/drivers/spi/spi-axi-spi-engine.c +++ b/drivers/spi/spi-axi-spi-engine.c @@ -356,8 +356,8 @@ static bool spi_engine_read_rx_fifo(struct spi_engine *spi_engine) static irqreturn_t spi_engine_irq(int irq, void *devid) { - struct spi_master *master = devid; - struct spi_engine *spi_engine = spi_master_get_devdata(master); + struct spi_controller *host = devid; + struct spi_engine *spi_engine = spi_controller_get_devdata(host); unsigned int disable_int = 0; unsigned int pending; @@ -396,7 +396,7 @@ static irqreturn_t spi_engine_irq(int irq, void *devid) msg->status = 0; msg->actual_length = msg->frame_length; spi_engine->msg = NULL; - spi_finalize_current_message(master); + spi_finalize_current_message(host); disable_int |= SPI_ENGINE_INT_SYNC; } } @@ -412,11 +412,11 @@ static irqreturn_t spi_engine_irq(int irq, void *devid) return IRQ_HANDLED; } -static int spi_engine_transfer_one_message(struct spi_master *master, +static int spi_engine_transfer_one_message(struct spi_controller *host, struct spi_message *msg) { struct spi_engine_program p_dry, *p; - struct spi_engine *spi_engine = spi_master_get_devdata(master); + struct spi_engine *spi_engine = spi_controller_get_devdata(host); unsigned int int_enable = 0; unsigned long flags; size_t size; @@ -464,7 +464,7 @@ static int spi_engine_transfer_one_message(struct spi_master *master, static int spi_engine_probe(struct platform_device *pdev) { struct spi_engine *spi_engine; - struct spi_master *master; + struct spi_controller *host; unsigned int version; int irq; int ret; @@ -477,29 +477,29 @@ static int spi_engine_probe(struct platform_device *pdev) if (!spi_engine) return -ENOMEM; - master = spi_alloc_master(&pdev->dev, 0); - if (!master) + host = spi_alloc_host(&pdev->dev, 0); + if (!host) return -ENOMEM; - spi_master_set_devdata(master, spi_engine); + spi_controller_set_devdata(host, spi_engine); spin_lock_init(&spi_engine->lock); spi_engine->clk = devm_clk_get(&pdev->dev, "s_axi_aclk"); if (IS_ERR(spi_engine->clk)) { ret = PTR_ERR(spi_engine->clk); - goto err_put_master; + goto err_put_host; } spi_engine->ref_clk = devm_clk_get(&pdev->dev, "spi_clk"); if (IS_ERR(spi_engine->ref_clk)) { ret = PTR_ERR(spi_engine->ref_clk); - goto err_put_master; + goto err_put_host; } ret = clk_prepare_enable(spi_engine->clk); if (ret) - goto err_put_master; + goto err_put_host; ret = clk_prepare_enable(spi_engine->ref_clk); if (ret) @@ -525,46 +525,46 @@ static int spi_engine_probe(struct platform_device *pdev) writel_relaxed(0xff, spi_engine->base + SPI_ENGINE_REG_INT_PENDING); writel_relaxed(0x00, spi_engine->base + SPI_ENGINE_REG_INT_ENABLE); - ret = request_irq(irq, spi_engine_irq, 0, pdev->name, master); + ret = request_irq(irq, spi_engine_irq, 0, pdev->name, host); if (ret) goto err_ref_clk_disable; - master->dev.of_node = pdev->dev.of_node; - master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_3WIRE; - master->bits_per_word_mask = SPI_BPW_MASK(8); - master->max_speed_hz = clk_get_rate(spi_engine->ref_clk) / 2; - master->transfer_one_message = spi_engine_transfer_one_message; - master->num_chipselect = 8; + host->dev.of_node = pdev->dev.of_node; + host->mode_bits = SPI_CPOL | SPI_CPHA | SPI_3WIRE; + host->bits_per_word_mask = SPI_BPW_MASK(8); + host->max_speed_hz = clk_get_rate(spi_engine->ref_clk) / 2; + host->transfer_one_message = spi_engine_transfer_one_message; + host->num_chipselect = 8; - ret = spi_register_master(master); + ret = spi_register_controller(host); if (ret) goto err_free_irq; - platform_set_drvdata(pdev, master); + platform_set_drvdata(pdev, host); return 0; err_free_irq: - free_irq(irq, master); + free_irq(irq, host); err_ref_clk_disable: clk_disable_unprepare(spi_engine->ref_clk); err_clk_disable: clk_disable_unprepare(spi_engine->clk); -err_put_master: - spi_master_put(master); +err_put_host: + spi_controller_put(host); return ret; } static void spi_engine_remove(struct platform_device *pdev) { - struct spi_master *master = spi_master_get(platform_get_drvdata(pdev)); - struct spi_engine *spi_engine = spi_master_get_devdata(master); + struct spi_controller *host = spi_controller_get(platform_get_drvdata(pdev)); + struct spi_engine *spi_engine = spi_controller_get_devdata(host); int irq = platform_get_irq(pdev, 0); - spi_unregister_master(master); + spi_unregister_controller(host); - free_irq(irq, master); + free_irq(irq, host); - spi_master_put(master); + spi_controller_put(host); writel_relaxed(0xff, spi_engine->base + SPI_ENGINE_REG_INT_PENDING); writel_relaxed(0x00, spi_engine->base + SPI_ENGINE_REG_INT_ENABLE); From ec271c04ae93b8b5ec392f9aa1cb062714157a7b Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 28 Jul 2023 17:32:04 +0800 Subject: [PATCH 280/656] spi: bcm-qspi: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230728093221.3312026-5-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-bcm-qspi.c | 64 +++++++++++++++++++------------------- 1 file changed, 32 insertions(+), 32 deletions(-) diff --git a/drivers/spi/spi-bcm-qspi.c b/drivers/spi/spi-bcm-qspi.c index d91dfbe47aa5..ef08fcac2f6d 100644 --- a/drivers/spi/spi-bcm-qspi.c +++ b/drivers/spi/spi-bcm-qspi.c @@ -220,7 +220,7 @@ struct qspi_trans { struct bcm_qspi { struct platform_device *pdev; - struct spi_master *master; + struct spi_controller *host; struct clk *clk; u32 base_clk; u32 max_speed_hz; @@ -732,7 +732,7 @@ static bool bcm_qspi_mspi_transfer_is_last(struct bcm_qspi *qspi, struct qspi_trans *qt) { if (qt->mspi_last_trans && - spi_transfer_is_last(qspi->master, qt->trans)) + spi_transfer_is_last(qspi->host, qt->trans)) return true; else return false; @@ -979,7 +979,7 @@ static int write_to_hw(struct bcm_qspi *qspi, struct spi_device *spi) mspi_cdram |= ((tp.trans->bits_per_word <= 8) ? 0 : MSPI_CDRAM_BITSE_BIT); - /* set 3wrire halfduplex mode data from master to slave */ + /* set 3wrire halfduplex mode data from host to target */ if ((spi->mode & SPI_3WIRE) && tp.trans->tx_buf) mspi_cdram |= MSPI_CDRAM_OUTP; @@ -1035,7 +1035,7 @@ done: static int bcm_qspi_bspi_exec_mem_op(struct spi_device *spi, const struct spi_mem_op *op) { - struct bcm_qspi *qspi = spi_master_get_devdata(spi->master); + struct bcm_qspi *qspi = spi_controller_get_devdata(spi->controller); u32 addr = 0, len, rdlen, len_words, from = 0; int ret = 0; unsigned long timeo = msecs_to_jiffies(100); @@ -1118,11 +1118,11 @@ static int bcm_qspi_bspi_exec_mem_op(struct spi_device *spi, return ret; } -static int bcm_qspi_transfer_one(struct spi_master *master, +static int bcm_qspi_transfer_one(struct spi_controller *host, struct spi_device *spi, struct spi_transfer *trans) { - struct bcm_qspi *qspi = spi_master_get_devdata(master); + struct bcm_qspi *qspi = spi_controller_get_devdata(host); int slots; unsigned long timeo = msecs_to_jiffies(100); @@ -1150,8 +1150,8 @@ static int bcm_qspi_transfer_one(struct spi_master *master, static int bcm_qspi_mspi_exec_mem_op(struct spi_device *spi, const struct spi_mem_op *op) { - struct spi_master *master = spi->master; - struct bcm_qspi *qspi = spi_master_get_devdata(master); + struct spi_controller *host = spi->controller; + struct bcm_qspi *qspi = spi_controller_get_devdata(host); struct spi_transfer t[2]; u8 cmd[6] = { }; int ret, i; @@ -1171,7 +1171,7 @@ static int bcm_qspi_mspi_exec_mem_op(struct spi_device *spi, t[0].tx_nbits = op->cmd.buswidth; /* lets mspi know that this is not last transfer */ qspi->trans_pos.mspi_last_trans = false; - ret = bcm_qspi_transfer_one(master, spi, &t[0]); + ret = bcm_qspi_transfer_one(host, spi, &t[0]); /* rx */ qspi->trans_pos.mspi_last_trans = true; @@ -1181,7 +1181,7 @@ static int bcm_qspi_mspi_exec_mem_op(struct spi_device *spi, t[1].len = op->data.nbytes; t[1].rx_nbits = op->data.buswidth; t[1].bits_per_word = spi->bits_per_word; - ret = bcm_qspi_transfer_one(master, spi, &t[1]); + ret = bcm_qspi_transfer_one(host, spi, &t[1]); } return ret; @@ -1191,7 +1191,7 @@ static int bcm_qspi_exec_mem_op(struct spi_mem *mem, const struct spi_mem_op *op) { struct spi_device *spi = mem->spi; - struct bcm_qspi *qspi = spi_master_get_devdata(spi->master); + struct bcm_qspi *qspi = spi_controller_get_devdata(spi->controller); int ret = 0; bool mspi_read = false; u32 addr = 0, len; @@ -1486,7 +1486,7 @@ int bcm_qspi_probe(struct platform_device *pdev, const struct bcm_qspi_data *data; struct device *dev = &pdev->dev; struct bcm_qspi *qspi; - struct spi_master *master; + struct spi_controller *host; struct resource *res; int irq, ret = 0, num_ints = 0; u32 val; @@ -1504,13 +1504,13 @@ int bcm_qspi_probe(struct platform_device *pdev, data = of_id->data; - master = devm_spi_alloc_master(dev, sizeof(struct bcm_qspi)); - if (!master) { - dev_err(dev, "error allocating spi_master\n"); + host = devm_spi_alloc_host(dev, sizeof(struct bcm_qspi)); + if (!host) { + dev_err(dev, "error allocating spi_controller\n"); return -ENOMEM; } - qspi = spi_master_get_devdata(master); + qspi = spi_controller_get_devdata(host); qspi->clk = devm_clk_get_optional(&pdev->dev, NULL); if (IS_ERR(qspi->clk)) @@ -1520,23 +1520,23 @@ int bcm_qspi_probe(struct platform_device *pdev, qspi->trans_pos.trans = NULL; qspi->trans_pos.byte = 0; qspi->trans_pos.mspi_last_trans = true; - qspi->master = master; + qspi->host = host; - master->bus_num = -1; - master->mode_bits = SPI_CPHA | SPI_CPOL | SPI_RX_DUAL | SPI_RX_QUAD | + host->bus_num = -1; + host->mode_bits = SPI_CPHA | SPI_CPOL | SPI_RX_DUAL | SPI_RX_QUAD | SPI_3WIRE; - master->setup = bcm_qspi_setup; - master->transfer_one = bcm_qspi_transfer_one; - master->mem_ops = &bcm_qspi_mem_ops; - master->cleanup = bcm_qspi_cleanup; - master->dev.of_node = dev->of_node; - master->num_chipselect = NUM_CHIPSELECT; - master->use_gpio_descriptors = true; + host->setup = bcm_qspi_setup; + host->transfer_one = bcm_qspi_transfer_one; + host->mem_ops = &bcm_qspi_mem_ops; + host->cleanup = bcm_qspi_cleanup; + host->dev.of_node = dev->of_node; + host->num_chipselect = NUM_CHIPSELECT; + host->use_gpio_descriptors = true; qspi->big_endian = of_device_is_big_endian(dev->of_node); if (!of_property_read_u32(dev->of_node, "num-cs", &val)) - master->num_chipselect = val; + host->num_chipselect = val; res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hif_mspi"); if (!res) @@ -1659,9 +1659,9 @@ int bcm_qspi_probe(struct platform_device *pdev, qspi->xfer_mode.addrlen = -1; qspi->xfer_mode.hp = -1; - ret = spi_register_master(master); + ret = spi_register_controller(host); if (ret < 0) { - dev_err(dev, "can't register master\n"); + dev_err(dev, "can't register host\n"); goto qspi_reg_err; } @@ -1682,7 +1682,7 @@ void bcm_qspi_remove(struct platform_device *pdev) { struct bcm_qspi *qspi = platform_get_drvdata(pdev); - spi_unregister_master(qspi->master); + spi_unregister_controller(qspi->host); bcm_qspi_hw_uninit(qspi); clk_disable_unprepare(qspi->clk); kfree(qspi->dev_ids); @@ -1700,7 +1700,7 @@ static int __maybe_unused bcm_qspi_suspend(struct device *dev) qspi->s3_strap_override_ctrl = bcm_qspi_read(qspi, BSPI, BSPI_STRAP_OVERRIDE_CTRL); - spi_master_suspend(qspi->master); + spi_controller_suspend(qspi->host); clk_disable_unprepare(qspi->clk); bcm_qspi_hw_uninit(qspi); @@ -1721,7 +1721,7 @@ static int __maybe_unused bcm_qspi_resume(struct device *dev) ret = clk_prepare_enable(qspi->clk); if (!ret) - spi_master_resume(qspi->master); + spi_controller_resume(qspi->host); return ret; } From 00be843bc1c3c77574f566ef78b1b7ec1ef92be5 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 28 Jul 2023 17:32:05 +0800 Subject: [PATCH 281/656] spi: bcm2835: switch to use modern name Change legacy name master/slave to modern name host/target. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230728093221.3312026-6-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-bcm2835.c | 112 +++++++++++++++++++------------------- 1 file changed, 56 insertions(+), 56 deletions(-) diff --git a/drivers/spi/spi-bcm2835.c b/drivers/spi/spi-bcm2835.c index c16abc2a9e9b..1116e7d20034 100644 --- a/drivers/spi/spi-bcm2835.c +++ b/drivers/spi/spi-bcm2835.c @@ -105,7 +105,7 @@ MODULE_PARM_DESC(polling_limit_us, * These are counted as well in @count_transfer_polling and * @count_transfer_irq * @count_transfer_dma: count how often dma mode is used - * @slv: SPI slave currently selected + * @target: SPI target currently selected * (used by bcm2835_spi_dma_tx_done() to write @clear_rx_cs) * @tx_dma_active: whether a TX DMA descriptor is in progress * @rx_dma_active: whether a RX DMA descriptor is in progress @@ -135,7 +135,7 @@ struct bcm2835_spi { u64 count_transfer_irq_after_polling; u64 count_transfer_dma; - struct bcm2835_spidev *slv; + struct bcm2835_spidev *target; unsigned int tx_dma_active; unsigned int rx_dma_active; struct dma_async_tx_descriptor *fill_tx_desc; @@ -143,14 +143,14 @@ struct bcm2835_spi { }; /** - * struct bcm2835_spidev - BCM2835 SPI slave + * struct bcm2835_spidev - BCM2835 SPI target * @prepare_cs: precalculated CS register value for ->prepare_message() - * (uses slave-specific clock polarity and phase settings) + * (uses target-specific clock polarity and phase settings) * @clear_rx_desc: preallocated RX DMA descriptor used for TX-only transfers * (cyclically clears RX FIFO by writing @clear_rx_cs to CS register) * @clear_rx_addr: bus address of @clear_rx_cs * @clear_rx_cs: precalculated CS register value to clear RX FIFO - * (uses slave-specific clock polarity and phase settings) + * (uses target-specific clock polarity and phase settings) */ struct bcm2835_spidev { u32 prepare_cs; @@ -434,7 +434,7 @@ static int bcm2835_spi_transfer_one_irq(struct spi_controller *ctlr, /** * bcm2835_spi_transfer_prologue() - transfer first few bytes without DMA - * @ctlr: SPI master controller + * @ctlr: SPI host controller * @tfr: SPI transfer * @bs: BCM2835 SPI controller * @cs: CS register @@ -596,7 +596,7 @@ out: /** * bcm2835_spi_dma_rx_done() - callback for DMA RX channel - * @data: SPI master controller + * @data: SPI host controller * * Used for bidirectional and RX-only transfers. */ @@ -624,7 +624,7 @@ static void bcm2835_spi_dma_rx_done(void *data) /** * bcm2835_spi_dma_tx_done() - callback for DMA TX channel - * @data: SPI master controller + * @data: SPI host controller * * Used for TX-only transfers. */ @@ -635,7 +635,7 @@ static void bcm2835_spi_dma_tx_done(void *data) /* busy-wait for TX FIFO to empty */ while (!(bcm2835_rd(bs, BCM2835_SPI_CS) & BCM2835_SPI_CS_DONE)) - bcm2835_wr(bs, BCM2835_SPI_CS, bs->slv->clear_rx_cs); + bcm2835_wr(bs, BCM2835_SPI_CS, bs->target->clear_rx_cs); bs->tx_dma_active = false; smp_wmb(); @@ -655,10 +655,10 @@ static void bcm2835_spi_dma_tx_done(void *data) /** * bcm2835_spi_prepare_sg() - prepare and submit DMA descriptor for sglist - * @ctlr: SPI master controller + * @ctlr: SPI host controller * @tfr: SPI transfer * @bs: BCM2835 SPI controller - * @slv: BCM2835 SPI slave + * @target: BCM2835 SPI target * @is_tx: whether to submit DMA descriptor for TX or RX sglist * * Prepare and submit a DMA descriptor for the TX or RX sglist of @tfr. @@ -667,7 +667,7 @@ static void bcm2835_spi_dma_tx_done(void *data) static int bcm2835_spi_prepare_sg(struct spi_controller *ctlr, struct spi_transfer *tfr, struct bcm2835_spi *bs, - struct bcm2835_spidev *slv, + struct bcm2835_spidev *target, bool is_tx) { struct dma_chan *chan; @@ -707,7 +707,7 @@ static int bcm2835_spi_prepare_sg(struct spi_controller *ctlr, } else if (!tfr->rx_buf) { desc->callback = bcm2835_spi_dma_tx_done; desc->callback_param = ctlr; - bs->slv = slv; + bs->target = target; } /* submit it to DMA-engine */ @@ -718,9 +718,9 @@ static int bcm2835_spi_prepare_sg(struct spi_controller *ctlr, /** * bcm2835_spi_transfer_one_dma() - perform SPI transfer using DMA engine - * @ctlr: SPI master controller + * @ctlr: SPI host controller * @tfr: SPI transfer - * @slv: BCM2835 SPI slave + * @target: BCM2835 SPI target * @cs: CS register * * For *bidirectional* transfers (both tx_buf and rx_buf are non-%NULL), set up @@ -732,7 +732,7 @@ static int bcm2835_spi_prepare_sg(struct spi_controller *ctlr, * clear the RX FIFO by setting the CLEAR_RX bit in the CS register. * * The CS register value is precalculated in bcm2835_spi_setup(). Normally - * this is called only once, on slave registration. A DMA descriptor to write + * this is called only once, on target registration. A DMA descriptor to write * this value is preallocated in bcm2835_dma_init(). All that's left to do * when performing a TX-only transfer is to submit this descriptor to the RX * DMA channel. Latency is thereby minimized. The descriptor does not @@ -765,7 +765,7 @@ static int bcm2835_spi_prepare_sg(struct spi_controller *ctlr, */ static int bcm2835_spi_transfer_one_dma(struct spi_controller *ctlr, struct spi_transfer *tfr, - struct bcm2835_spidev *slv, + struct bcm2835_spidev *target, u32 cs) { struct bcm2835_spi *bs = spi_controller_get_devdata(ctlr); @@ -783,7 +783,7 @@ static int bcm2835_spi_transfer_one_dma(struct spi_controller *ctlr, /* setup tx-DMA */ if (bs->tx_buf) { - ret = bcm2835_spi_prepare_sg(ctlr, tfr, bs, slv, true); + ret = bcm2835_spi_prepare_sg(ctlr, tfr, bs, target, true); } else { cookie = dmaengine_submit(bs->fill_tx_desc); ret = dma_submit_error(cookie); @@ -809,9 +809,9 @@ static int bcm2835_spi_transfer_one_dma(struct spi_controller *ctlr, * this saves 10us or more. */ if (bs->rx_buf) { - ret = bcm2835_spi_prepare_sg(ctlr, tfr, bs, slv, false); + ret = bcm2835_spi_prepare_sg(ctlr, tfr, bs, target, false); } else { - cookie = dmaengine_submit(slv->clear_rx_desc); + cookie = dmaengine_submit(target->clear_rx_desc); ret = dma_submit_error(cookie); } if (ret) { @@ -1050,10 +1050,10 @@ static int bcm2835_spi_transfer_one(struct spi_controller *ctlr, struct spi_transfer *tfr) { struct bcm2835_spi *bs = spi_controller_get_devdata(ctlr); - struct bcm2835_spidev *slv = spi_get_ctldata(spi); + struct bcm2835_spidev *target = spi_get_ctldata(spi); unsigned long spi_hz, cdiv; unsigned long hz_per_byte, byte_limit; - u32 cs = slv->prepare_cs; + u32 cs = target->prepare_cs; /* set clock */ spi_hz = tfr->speed_hz; @@ -1101,7 +1101,7 @@ static int bcm2835_spi_transfer_one(struct spi_controller *ctlr, * this 1 idle clock cycle pattern but runs the spi clock without gaps */ if (ctlr->can_dma && bcm2835_spi_can_dma(ctlr, spi, tfr)) - return bcm2835_spi_transfer_one_dma(ctlr, tfr, slv, cs); + return bcm2835_spi_transfer_one_dma(ctlr, tfr, target, cs); /* run in interrupt-mode */ return bcm2835_spi_transfer_one_irq(ctlr, spi, tfr, cs, true); @@ -1112,7 +1112,7 @@ static int bcm2835_spi_prepare_message(struct spi_controller *ctlr, { struct spi_device *spi = msg->spi; struct bcm2835_spi *bs = spi_controller_get_devdata(ctlr); - struct bcm2835_spidev *slv = spi_get_ctldata(spi); + struct bcm2835_spidev *target = spi_get_ctldata(spi); int ret; if (ctlr->can_dma) { @@ -1131,7 +1131,7 @@ static int bcm2835_spi_prepare_message(struct spi_controller *ctlr, * Set up clock polarity before spi_transfer_one_message() asserts * chip select to avoid a gratuitous clock signal edge. */ - bcm2835_wr(bs, BCM2835_SPI_CS, slv->prepare_cs); + bcm2835_wr(bs, BCM2835_SPI_CS, target->prepare_cs); return 0; } @@ -1163,51 +1163,51 @@ static int chip_match_name(struct gpio_chip *chip, void *data) static void bcm2835_spi_cleanup(struct spi_device *spi) { - struct bcm2835_spidev *slv = spi_get_ctldata(spi); + struct bcm2835_spidev *target = spi_get_ctldata(spi); struct spi_controller *ctlr = spi->controller; - if (slv->clear_rx_desc) - dmaengine_desc_free(slv->clear_rx_desc); + if (target->clear_rx_desc) + dmaengine_desc_free(target->clear_rx_desc); - if (slv->clear_rx_addr) + if (target->clear_rx_addr) dma_unmap_single(ctlr->dma_rx->device->dev, - slv->clear_rx_addr, + target->clear_rx_addr, sizeof(u32), DMA_TO_DEVICE); - kfree(slv); + kfree(target); } static int bcm2835_spi_setup_dma(struct spi_controller *ctlr, struct spi_device *spi, struct bcm2835_spi *bs, - struct bcm2835_spidev *slv) + struct bcm2835_spidev *target) { int ret; if (!ctlr->dma_rx) return 0; - slv->clear_rx_addr = dma_map_single(ctlr->dma_rx->device->dev, - &slv->clear_rx_cs, - sizeof(u32), - DMA_TO_DEVICE); - if (dma_mapping_error(ctlr->dma_rx->device->dev, slv->clear_rx_addr)) { + target->clear_rx_addr = dma_map_single(ctlr->dma_rx->device->dev, + &target->clear_rx_cs, + sizeof(u32), + DMA_TO_DEVICE); + if (dma_mapping_error(ctlr->dma_rx->device->dev, target->clear_rx_addr)) { dev_err(&spi->dev, "cannot map clear_rx_cs\n"); - slv->clear_rx_addr = 0; + target->clear_rx_addr = 0; return -ENOMEM; } - slv->clear_rx_desc = dmaengine_prep_dma_cyclic(ctlr->dma_rx, - slv->clear_rx_addr, - sizeof(u32), 0, - DMA_MEM_TO_DEV, 0); - if (!slv->clear_rx_desc) { + target->clear_rx_desc = dmaengine_prep_dma_cyclic(ctlr->dma_rx, + target->clear_rx_addr, + sizeof(u32), 0, + DMA_MEM_TO_DEV, 0); + if (!target->clear_rx_desc) { dev_err(&spi->dev, "cannot prepare clear_rx_desc\n"); return -ENOMEM; } - ret = dmaengine_desc_set_reuse(slv->clear_rx_desc); + ret = dmaengine_desc_set_reuse(target->clear_rx_desc); if (ret) { dev_err(&spi->dev, "cannot reuse clear_rx_desc\n"); return ret; @@ -1220,26 +1220,26 @@ static int bcm2835_spi_setup(struct spi_device *spi) { struct spi_controller *ctlr = spi->controller; struct bcm2835_spi *bs = spi_controller_get_devdata(ctlr); - struct bcm2835_spidev *slv = spi_get_ctldata(spi); + struct bcm2835_spidev *target = spi_get_ctldata(spi); struct gpio_chip *chip; int ret; u32 cs; - if (!slv) { - slv = kzalloc(ALIGN(sizeof(*slv), dma_get_cache_alignment()), + if (!target) { + target = kzalloc(ALIGN(sizeof(*target), dma_get_cache_alignment()), GFP_KERNEL); - if (!slv) + if (!target) return -ENOMEM; - spi_set_ctldata(spi, slv); + spi_set_ctldata(spi, target); - ret = bcm2835_spi_setup_dma(ctlr, spi, bs, slv); + ret = bcm2835_spi_setup_dma(ctlr, spi, bs, target); if (ret) goto err_cleanup; } /* - * Precalculate SPI slave's CS register value for ->prepare_message(): + * Precalculate SPI target's CS register value for ->prepare_message(): * The driver always uses software-controlled GPIO chip select, hence * set the hardware-controlled native chip select to an invalid value * to prevent it from interfering. @@ -1249,18 +1249,18 @@ static int bcm2835_spi_setup(struct spi_device *spi) cs |= BCM2835_SPI_CS_CPOL; if (spi->mode & SPI_CPHA) cs |= BCM2835_SPI_CS_CPHA; - slv->prepare_cs = cs; + target->prepare_cs = cs; /* - * Precalculate SPI slave's CS register value to clear RX FIFO + * Precalculate SPI target's CS register value to clear RX FIFO * in case of a TX-only DMA transfer. */ if (ctlr->dma_rx) { - slv->clear_rx_cs = cs | BCM2835_SPI_CS_TA | + target->clear_rx_cs = cs | BCM2835_SPI_CS_TA | BCM2835_SPI_CS_DMAEN | BCM2835_SPI_CS_CLEAR_RX; dma_sync_single_for_device(ctlr->dma_rx->device->dev, - slv->clear_rx_addr, + target->clear_rx_addr, sizeof(u32), DMA_TO_DEVICE); } @@ -1328,7 +1328,7 @@ static int bcm2835_spi_probe(struct platform_device *pdev) struct bcm2835_spi *bs; int err; - ctlr = devm_spi_alloc_master(&pdev->dev, sizeof(*bs)); + ctlr = devm_spi_alloc_host(&pdev->dev, sizeof(*bs)); if (!ctlr) return -ENOMEM; From 901fcd0740df2f907d56709e208325088265c662 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 28 Jul 2023 17:32:06 +0800 Subject: [PATCH 282/656] spi: bcm2835aux: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230728093221.3312026-7-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-bcm2835aux.c | 84 ++++++++++++++++++------------------ 1 file changed, 42 insertions(+), 42 deletions(-) diff --git a/drivers/spi/spi-bcm2835aux.c b/drivers/spi/spi-bcm2835aux.c index 8ace417c0a29..172b534390b2 100644 --- a/drivers/spi/spi-bcm2835aux.c +++ b/drivers/spi/spi-bcm2835aux.c @@ -231,8 +231,8 @@ static void bcm2835aux_spi_transfer_helper(struct bcm2835aux_spi *bs) static irqreturn_t bcm2835aux_spi_interrupt(int irq, void *dev_id) { - struct spi_master *master = dev_id; - struct bcm2835aux_spi *bs = spi_master_get_devdata(master); + struct spi_controller *host = dev_id; + struct bcm2835aux_spi *bs = spi_controller_get_devdata(host); /* IRQ may be shared, so return if our interrupts are disabled */ if (!(bcm2835aux_rd(bs, BCM2835_AUX_SPI_CNTL1) & @@ -251,17 +251,17 @@ static irqreturn_t bcm2835aux_spi_interrupt(int irq, void *dev_id) /* and if rx_len is 0 then disable interrupts and wake up completion */ if (!bs->rx_len) { bcm2835aux_wr(bs, BCM2835_AUX_SPI_CNTL1, bs->cntl[1]); - spi_finalize_current_transfer(master); + spi_finalize_current_transfer(host); } return IRQ_HANDLED; } -static int __bcm2835aux_spi_transfer_one_irq(struct spi_master *master, +static int __bcm2835aux_spi_transfer_one_irq(struct spi_controller *host, struct spi_device *spi, struct spi_transfer *tfr) { - struct bcm2835aux_spi *bs = spi_master_get_devdata(master); + struct bcm2835aux_spi *bs = spi_controller_get_devdata(host); /* enable interrupts */ bcm2835aux_wr(bs, BCM2835_AUX_SPI_CNTL1, bs->cntl[1] | @@ -272,11 +272,11 @@ static int __bcm2835aux_spi_transfer_one_irq(struct spi_master *master, return 1; } -static int bcm2835aux_spi_transfer_one_irq(struct spi_master *master, +static int bcm2835aux_spi_transfer_one_irq(struct spi_controller *host, struct spi_device *spi, struct spi_transfer *tfr) { - struct bcm2835aux_spi *bs = spi_master_get_devdata(master); + struct bcm2835aux_spi *bs = spi_controller_get_devdata(host); /* update statistics */ bs->count_transfer_irq++; @@ -294,14 +294,14 @@ static int bcm2835aux_spi_transfer_one_irq(struct spi_master *master, } /* now run the interrupt mode */ - return __bcm2835aux_spi_transfer_one_irq(master, spi, tfr); + return __bcm2835aux_spi_transfer_one_irq(host, spi, tfr); } -static int bcm2835aux_spi_transfer_one_poll(struct spi_master *master, +static int bcm2835aux_spi_transfer_one_poll(struct spi_controller *host, struct spi_device *spi, struct spi_transfer *tfr) { - struct bcm2835aux_spi *bs = spi_master_get_devdata(master); + struct bcm2835aux_spi *bs = spi_controller_get_devdata(host); unsigned long timeout; /* update statistics */ @@ -328,7 +328,7 @@ static int bcm2835aux_spi_transfer_one_poll(struct spi_master *master, bs->tx_len, bs->rx_len); /* forward to interrupt handler */ bs->count_transfer_irq_after_poll++; - return __bcm2835aux_spi_transfer_one_irq(master, + return __bcm2835aux_spi_transfer_one_irq(host, spi, tfr); } } @@ -337,11 +337,11 @@ static int bcm2835aux_spi_transfer_one_poll(struct spi_master *master, return 0; } -static int bcm2835aux_spi_transfer_one(struct spi_master *master, +static int bcm2835aux_spi_transfer_one(struct spi_controller *host, struct spi_device *spi, struct spi_transfer *tfr) { - struct bcm2835aux_spi *bs = spi_master_get_devdata(master); + struct bcm2835aux_spi *bs = spi_controller_get_devdata(host); unsigned long spi_hz, clk_hz, speed; unsigned long hz_per_byte, byte_limit; @@ -392,17 +392,17 @@ static int bcm2835aux_spi_transfer_one(struct spi_master *master, /* run in polling mode for short transfers */ if (tfr->len < byte_limit) - return bcm2835aux_spi_transfer_one_poll(master, spi, tfr); + return bcm2835aux_spi_transfer_one_poll(host, spi, tfr); /* run in interrupt mode for all others */ - return bcm2835aux_spi_transfer_one_irq(master, spi, tfr); + return bcm2835aux_spi_transfer_one_irq(host, spi, tfr); } -static int bcm2835aux_spi_prepare_message(struct spi_master *master, +static int bcm2835aux_spi_prepare_message(struct spi_controller *host, struct spi_message *msg) { struct spi_device *spi = msg->spi; - struct bcm2835aux_spi *bs = spi_master_get_devdata(master); + struct bcm2835aux_spi *bs = spi_controller_get_devdata(host); bs->cntl[0] = BCM2835_AUX_SPI_CNTL0_ENABLE | BCM2835_AUX_SPI_CNTL0_VAR_WIDTH | @@ -422,20 +422,20 @@ static int bcm2835aux_spi_prepare_message(struct spi_master *master, return 0; } -static int bcm2835aux_spi_unprepare_message(struct spi_master *master, +static int bcm2835aux_spi_unprepare_message(struct spi_controller *host, struct spi_message *msg) { - struct bcm2835aux_spi *bs = spi_master_get_devdata(master); + struct bcm2835aux_spi *bs = spi_controller_get_devdata(host); bcm2835aux_spi_reset_hw(bs); return 0; } -static void bcm2835aux_spi_handle_err(struct spi_master *master, +static void bcm2835aux_spi_handle_err(struct spi_controller *host, struct spi_message *msg) { - struct bcm2835aux_spi *bs = spi_master_get_devdata(master); + struct bcm2835aux_spi *bs = spi_controller_get_devdata(host); bcm2835aux_spi_reset_hw(bs); } @@ -473,18 +473,18 @@ static int bcm2835aux_spi_setup(struct spi_device *spi) static int bcm2835aux_spi_probe(struct platform_device *pdev) { - struct spi_master *master; + struct spi_controller *host; struct bcm2835aux_spi *bs; unsigned long clk_hz; int err; - master = devm_spi_alloc_master(&pdev->dev, sizeof(*bs)); - if (!master) + host = devm_spi_alloc_host(&pdev->dev, sizeof(*bs)); + if (!host) return -ENOMEM; - platform_set_drvdata(pdev, master); - master->mode_bits = (SPI_CPOL | SPI_CS_HIGH | SPI_NO_CS); - master->bits_per_word_mask = SPI_BPW_MASK(8); + platform_set_drvdata(pdev, host); + host->mode_bits = (SPI_CPOL | SPI_CS_HIGH | SPI_NO_CS); + host->bits_per_word_mask = SPI_BPW_MASK(8); /* even though the driver never officially supported native CS * allow a single native CS for legacy DT support purposes when * no cs-gpio is configured. @@ -496,16 +496,16 @@ static int bcm2835aux_spi_probe(struct platform_device *pdev) * * cs_delay_usec: cs is always deasserted one SCK cycle after * a spi_transfer */ - master->num_chipselect = 1; - master->setup = bcm2835aux_spi_setup; - master->transfer_one = bcm2835aux_spi_transfer_one; - master->handle_err = bcm2835aux_spi_handle_err; - master->prepare_message = bcm2835aux_spi_prepare_message; - master->unprepare_message = bcm2835aux_spi_unprepare_message; - master->dev.of_node = pdev->dev.of_node; - master->use_gpio_descriptors = true; + host->num_chipselect = 1; + host->setup = bcm2835aux_spi_setup; + host->transfer_one = bcm2835aux_spi_transfer_one; + host->handle_err = bcm2835aux_spi_handle_err; + host->prepare_message = bcm2835aux_spi_prepare_message; + host->unprepare_message = bcm2835aux_spi_unprepare_message; + host->dev.of_node = pdev->dev.of_node; + host->use_gpio_descriptors = true; - bs = spi_master_get_devdata(master); + bs = spi_controller_get_devdata(host); /* the main area */ bs->regs = devm_platform_ioremap_resource(pdev, 0); @@ -544,15 +544,15 @@ static int bcm2835aux_spi_probe(struct platform_device *pdev) err = devm_request_irq(&pdev->dev, bs->irq, bcm2835aux_spi_interrupt, IRQF_SHARED, - dev_name(&pdev->dev), master); + dev_name(&pdev->dev), host); if (err) { dev_err(&pdev->dev, "could not request IRQ: %d\n", err); goto out_clk_disable; } - err = spi_register_master(master); + err = spi_register_controller(host); if (err) { - dev_err(&pdev->dev, "could not register SPI master: %d\n", err); + dev_err(&pdev->dev, "could not register SPI host: %d\n", err); goto out_clk_disable; } @@ -567,12 +567,12 @@ out_clk_disable: static void bcm2835aux_spi_remove(struct platform_device *pdev) { - struct spi_master *master = platform_get_drvdata(pdev); - struct bcm2835aux_spi *bs = spi_master_get_devdata(master); + struct spi_controller *host = platform_get_drvdata(pdev); + struct bcm2835aux_spi *bs = spi_controller_get_devdata(host); bcm2835aux_debugfs_remove(bs); - spi_unregister_master(master); + spi_unregister_controller(host); bcm2835aux_spi_reset_hw(bs); From 2c40be6bc95bd2b9681b4acc434feda05b16eb00 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 28 Jul 2023 17:32:07 +0800 Subject: [PATCH 283/656] spi: bcm63xx-hsspi: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230728093221.3312026-8-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-bcm63xx-hsspi.c | 86 ++++++++++++++++----------------- 1 file changed, 43 insertions(+), 43 deletions(-) diff --git a/drivers/spi/spi-bcm63xx-hsspi.c b/drivers/spi/spi-bcm63xx-hsspi.c index 9e218e143263..1ca857c2a4aa 100644 --- a/drivers/spi/spi-bcm63xx-hsspi.c +++ b/drivers/spi/spi-bcm63xx-hsspi.c @@ -149,7 +149,7 @@ static ssize_t wait_mode_show(struct device *dev, struct device_attribute *attr, char *buf) { struct spi_controller *ctrl = dev_get_drvdata(dev); - struct bcm63xx_hsspi *bs = spi_master_get_devdata(ctrl); + struct bcm63xx_hsspi *bs = spi_controller_get_devdata(ctrl); return sprintf(buf, "%d\n", bs->wait_mode); } @@ -158,7 +158,7 @@ static ssize_t wait_mode_store(struct device *dev, struct device_attribute *attr const char *buf, size_t count) { struct spi_controller *ctrl = dev_get_drvdata(dev); - struct bcm63xx_hsspi *bs = spi_master_get_devdata(ctrl); + struct bcm63xx_hsspi *bs = spi_controller_get_devdata(ctrl); u32 val; if (kstrtou32(buf, 10, &val)) @@ -185,7 +185,7 @@ static ssize_t xfer_mode_show(struct device *dev, struct device_attribute *attr, char *buf) { struct spi_controller *ctrl = dev_get_drvdata(dev); - struct bcm63xx_hsspi *bs = spi_master_get_devdata(ctrl); + struct bcm63xx_hsspi *bs = spi_controller_get_devdata(ctrl); return sprintf(buf, "%d\n", bs->xfer_mode); } @@ -194,7 +194,7 @@ static ssize_t xfer_mode_store(struct device *dev, struct device_attribute *attr const char *buf, size_t count) { struct spi_controller *ctrl = dev_get_drvdata(dev); - struct bcm63xx_hsspi *bs = spi_master_get_devdata(ctrl); + struct bcm63xx_hsspi *bs = spi_controller_get_devdata(ctrl); u32 val; if (kstrtou32(buf, 10, &val)) @@ -262,12 +262,12 @@ static int bcm63xx_hsspi_wait_cmd(struct bcm63xx_hsspi *bs) return rc; } -static bool bcm63xx_prepare_prepend_transfer(struct spi_master *master, +static bool bcm63xx_prepare_prepend_transfer(struct spi_controller *host, struct spi_message *msg, struct spi_transfer *t_prepend) { - struct bcm63xx_hsspi *bs = spi_master_get_devdata(master); + struct bcm63xx_hsspi *bs = spi_controller_get_devdata(host); bool tx_only = false; struct spi_transfer *t; @@ -348,7 +348,7 @@ static bool bcm63xx_prepare_prepend_transfer(struct spi_master *master, static int bcm63xx_hsspi_do_prepend_txrx(struct spi_device *spi, struct spi_transfer *t) { - struct bcm63xx_hsspi *bs = spi_master_get_devdata(spi->master); + struct bcm63xx_hsspi *bs = spi_controller_get_devdata(spi->controller); unsigned int chip_select = spi_get_chipselect(spi, 0); u16 opcode = 0, val; const u8 *tx = t->tx_buf; @@ -467,7 +467,7 @@ static void bcm63xx_hsspi_set_clk(struct bcm63xx_hsspi *bs, static int bcm63xx_hsspi_do_txrx(struct spi_device *spi, struct spi_transfer *t) { - struct bcm63xx_hsspi *bs = spi_master_get_devdata(spi->master); + struct bcm63xx_hsspi *bs = spi_controller_get_devdata(spi->controller); unsigned int chip_select = spi_get_chipselect(spi, 0); u16 opcode = 0, val; int pending = t->len; @@ -541,7 +541,7 @@ static int bcm63xx_hsspi_do_txrx(struct spi_device *spi, struct spi_transfer *t) static int bcm63xx_hsspi_setup(struct spi_device *spi) { - struct bcm63xx_hsspi *bs = spi_master_get_devdata(spi->master); + struct bcm63xx_hsspi *bs = spi_controller_get_devdata(spi->controller); u32 reg; reg = __raw_readl(bs->regs + @@ -579,7 +579,7 @@ static int bcm63xx_hsspi_setup(struct spi_device *spi) static int bcm63xx_hsspi_do_dummy_cs_txrx(struct spi_device *spi, struct spi_message *msg) { - struct bcm63xx_hsspi *bs = spi_master_get_devdata(spi->master); + struct bcm63xx_hsspi *bs = spi_controller_get_devdata(spi->controller); int status = -EINVAL; int dummy_cs; bool keep_cs = false; @@ -653,10 +653,10 @@ static int bcm63xx_hsspi_do_dummy_cs_txrx(struct spi_device *spi, return status; } -static int bcm63xx_hsspi_transfer_one(struct spi_master *master, +static int bcm63xx_hsspi_transfer_one(struct spi_controller *host, struct spi_message *msg) { - struct bcm63xx_hsspi *bs = spi_master_get_devdata(master); + struct bcm63xx_hsspi *bs = spi_controller_get_devdata(host); struct spi_device *spi = msg->spi; int status = -EINVAL; bool prependable = false; @@ -665,7 +665,7 @@ static int bcm63xx_hsspi_transfer_one(struct spi_master *master, mutex_lock(&bs->msg_mutex); if (bs->xfer_mode != HSSPI_XFER_MODE_DUMMYCS) - prependable = bcm63xx_prepare_prepend_transfer(master, msg, &t_prepend); + prependable = bcm63xx_prepare_prepend_transfer(host, msg, &t_prepend); if (prependable) { status = bcm63xx_hsspi_do_prepend_txrx(spi, &t_prepend); @@ -681,7 +681,7 @@ static int bcm63xx_hsspi_transfer_one(struct spi_master *master, mutex_unlock(&bs->msg_mutex); msg->status = status; - spi_finalize_current_message(master); + spi_finalize_current_message(host); return 0; } @@ -723,7 +723,7 @@ static irqreturn_t bcm63xx_hsspi_interrupt(int irq, void *dev_id) static int bcm63xx_hsspi_probe(struct platform_device *pdev) { - struct spi_master *master; + struct spi_controller *host; struct bcm63xx_hsspi *bs; void __iomem *regs; struct device *dev = &pdev->dev; @@ -779,13 +779,13 @@ static int bcm63xx_hsspi_probe(struct platform_device *pdev) } } - master = spi_alloc_master(&pdev->dev, sizeof(*bs)); - if (!master) { + host = spi_alloc_host(&pdev->dev, sizeof(*bs)); + if (!host) { ret = -ENOMEM; goto out_disable_pll_clk; } - bs = spi_master_get_devdata(master); + bs = spi_controller_get_devdata(host); bs->pdev = pdev; bs->clk = clk; bs->pll_clk = pll_clk; @@ -796,17 +796,17 @@ static int bcm63xx_hsspi_probe(struct platform_device *pdev) bs->prepend_buf = devm_kzalloc(dev, HSSPI_BUFFER_LEN, GFP_KERNEL); if (!bs->prepend_buf) { ret = -ENOMEM; - goto out_put_master; + goto out_put_host; } mutex_init(&bs->bus_mutex); mutex_init(&bs->msg_mutex); init_completion(&bs->done); - master->mem_ops = &bcm63xx_hsspi_mem_ops; - master->dev.of_node = dev->of_node; + host->mem_ops = &bcm63xx_hsspi_mem_ops; + host->dev.of_node = dev->of_node; if (!dev->of_node) - master->bus_num = HSSPI_BUS_NUM; + host->bus_num = HSSPI_BUS_NUM; of_property_read_u32(dev->of_node, "num-cs", &num_cs); if (num_cs > 8) { @@ -814,18 +814,18 @@ static int bcm63xx_hsspi_probe(struct platform_device *pdev) num_cs); num_cs = HSSPI_SPI_MAX_CS; } - master->num_chipselect = num_cs; - master->setup = bcm63xx_hsspi_setup; - master->transfer_one_message = bcm63xx_hsspi_transfer_one; - master->max_transfer_size = bcm63xx_hsspi_max_message_size; - master->max_message_size = bcm63xx_hsspi_max_message_size; + host->num_chipselect = num_cs; + host->setup = bcm63xx_hsspi_setup; + host->transfer_one_message = bcm63xx_hsspi_transfer_one; + host->max_transfer_size = bcm63xx_hsspi_max_message_size; + host->max_message_size = bcm63xx_hsspi_max_message_size; - master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | + host->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_RX_DUAL | SPI_TX_DUAL; - master->bits_per_word_mask = SPI_BPW_MASK(8); - master->auto_runtime_pm = true; + host->bits_per_word_mask = SPI_BPW_MASK(8); + host->auto_runtime_pm = true; - platform_set_drvdata(pdev, master); + platform_set_drvdata(pdev, host); /* Initialize the hardware */ __raw_writel(0, bs->regs + HSSPI_INT_MASK_REG); @@ -844,7 +844,7 @@ static int bcm63xx_hsspi_probe(struct platform_device *pdev) pdev->name, bs); if (ret) - goto out_put_master; + goto out_put_host; } pm_runtime_enable(&pdev->dev); @@ -856,7 +856,7 @@ static int bcm63xx_hsspi_probe(struct platform_device *pdev) } /* register and we are done */ - ret = devm_spi_register_master(dev, master); + ret = devm_spi_register_controller(dev, host); if (ret) goto out_sysgroup_disable; @@ -868,8 +868,8 @@ out_sysgroup_disable: sysfs_remove_group(&pdev->dev.kobj, &bcm63xx_hsspi_group); out_pm_disable: pm_runtime_disable(&pdev->dev); -out_put_master: - spi_master_put(master); +out_put_host: + spi_controller_put(host); out_disable_pll_clk: clk_disable_unprepare(pll_clk); out_disable_clk: @@ -880,8 +880,8 @@ out_disable_clk: static void bcm63xx_hsspi_remove(struct platform_device *pdev) { - struct spi_master *master = platform_get_drvdata(pdev); - struct bcm63xx_hsspi *bs = spi_master_get_devdata(master); + struct spi_controller *host = platform_get_drvdata(pdev); + struct bcm63xx_hsspi *bs = spi_controller_get_devdata(host); /* reset the hardware and block queue progress */ __raw_writel(0, bs->regs + HSSPI_INT_MASK_REG); @@ -893,10 +893,10 @@ static void bcm63xx_hsspi_remove(struct platform_device *pdev) #ifdef CONFIG_PM_SLEEP static int bcm63xx_hsspi_suspend(struct device *dev) { - struct spi_master *master = dev_get_drvdata(dev); - struct bcm63xx_hsspi *bs = spi_master_get_devdata(master); + struct spi_controller *host = dev_get_drvdata(dev); + struct bcm63xx_hsspi *bs = spi_controller_get_devdata(host); - spi_master_suspend(master); + spi_controller_suspend(host); clk_disable_unprepare(bs->pll_clk); clk_disable_unprepare(bs->clk); @@ -905,8 +905,8 @@ static int bcm63xx_hsspi_suspend(struct device *dev) static int bcm63xx_hsspi_resume(struct device *dev) { - struct spi_master *master = dev_get_drvdata(dev); - struct bcm63xx_hsspi *bs = spi_master_get_devdata(master); + struct spi_controller *host = dev_get_drvdata(dev); + struct bcm63xx_hsspi *bs = spi_controller_get_devdata(host); int ret; ret = clk_prepare_enable(bs->clk); @@ -921,7 +921,7 @@ static int bcm63xx_hsspi_resume(struct device *dev) } } - spi_master_resume(master); + spi_controller_resume(host); return 0; } From 1a9e76190f72e4e3aaf7eb89da22876846ff9b3d Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 28 Jul 2023 17:32:08 +0800 Subject: [PATCH 284/656] spi: bcm63xx: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230728093221.3312026-9-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-bcm63xx.c | 68 +++++++++++++++++++-------------------- 1 file changed, 34 insertions(+), 34 deletions(-) diff --git a/drivers/spi/spi-bcm63xx.c b/drivers/spi/spi-bcm63xx.c index 07b5b71b2352..aac41bd05f98 100644 --- a/drivers/spi/spi-bcm63xx.c +++ b/drivers/spi/spi-bcm63xx.c @@ -186,7 +186,7 @@ static const unsigned int bcm63xx_spi_freq_table[SPI_CLK_MASK][2] = { static void bcm63xx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t) { - struct bcm63xx_spi *bs = spi_master_get_devdata(spi->master); + struct bcm63xx_spi *bs = spi_controller_get_devdata(spi->controller); u8 clk_cfg, reg; int i; @@ -217,7 +217,7 @@ static void bcm63xx_spi_setup_transfer(struct spi_device *spi, static int bcm63xx_txrx_bufs(struct spi_device *spi, struct spi_transfer *first, unsigned int num_transfers) { - struct bcm63xx_spi *bs = spi_master_get_devdata(spi->master); + struct bcm63xx_spi *bs = spi_controller_get_devdata(spi->controller); u16 msg_ctl; u16 cmd; unsigned int i, timeout = 0, prepend_len = 0, len = 0; @@ -312,10 +312,10 @@ static int bcm63xx_txrx_bufs(struct spi_device *spi, struct spi_transfer *first, return 0; } -static int bcm63xx_spi_transfer_one(struct spi_master *master, +static int bcm63xx_spi_transfer_one(struct spi_controller *host, struct spi_message *m) { - struct bcm63xx_spi *bs = spi_master_get_devdata(master); + struct bcm63xx_spi *bs = spi_controller_get_devdata(host); struct spi_transfer *t, *first = NULL; struct spi_device *spi = m->spi; int status = 0; @@ -385,18 +385,18 @@ static int bcm63xx_spi_transfer_one(struct spi_master *master, } exit: m->status = status; - spi_finalize_current_message(master); + spi_finalize_current_message(host); return 0; } -/* This driver supports single master mode only. Hence +/* This driver supports single host mode only. Hence * CMD_DONE is the only interrupt we care about */ static irqreturn_t bcm63xx_spi_interrupt(int irq, void *dev_id) { - struct spi_master *master = (struct spi_master *)dev_id; - struct bcm63xx_spi *bs = spi_master_get_devdata(master); + struct spi_controller *host = (struct spi_controller *)dev_id; + struct bcm63xx_spi *bs = spi_controller_get_devdata(host); u8 intr; /* Read interupts and clear them immediately */ @@ -413,7 +413,7 @@ static irqreturn_t bcm63xx_spi_interrupt(int irq, void *dev_id) static size_t bcm63xx_spi_max_length(struct spi_device *spi) { - struct bcm63xx_spi *bs = spi_master_get_devdata(spi->master); + struct bcm63xx_spi *bs = spi_controller_get_devdata(spi->controller); return bs->fifo_size; } @@ -479,7 +479,7 @@ static int bcm63xx_spi_probe(struct platform_device *pdev) const unsigned long *bcm63xx_spireg; struct device *dev = &pdev->dev; int irq, bus_num; - struct spi_master *master; + struct spi_controller *host; struct clk *clk; struct bcm63xx_spi *bs; int ret; @@ -525,16 +525,16 @@ static int bcm63xx_spi_probe(struct platform_device *pdev) if (IS_ERR(reset)) return PTR_ERR(reset); - master = spi_alloc_master(dev, sizeof(*bs)); - if (!master) { + host = spi_alloc_host(dev, sizeof(*bs)); + if (!host) { dev_err(dev, "out of memory\n"); return -ENOMEM; } - bs = spi_master_get_devdata(master); + bs = spi_controller_get_devdata(host); init_completion(&bs->done); - platform_set_drvdata(pdev, master); + platform_set_drvdata(pdev, host); bs->pdev = pdev; bs->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &r); @@ -549,21 +549,21 @@ static int bcm63xx_spi_probe(struct platform_device *pdev) bs->fifo_size = bs->reg_offsets[SPI_MSG_DATA_SIZE]; ret = devm_request_irq(&pdev->dev, irq, bcm63xx_spi_interrupt, 0, - pdev->name, master); + pdev->name, host); if (ret) { dev_err(dev, "unable to request irq\n"); goto out_err; } - master->dev.of_node = dev->of_node; - master->bus_num = bus_num; - master->num_chipselect = num_cs; - master->transfer_one_message = bcm63xx_spi_transfer_one; - master->mode_bits = MODEBITS; - master->bits_per_word_mask = SPI_BPW_MASK(8); - master->max_transfer_size = bcm63xx_spi_max_length; - master->max_message_size = bcm63xx_spi_max_length; - master->auto_runtime_pm = true; + host->dev.of_node = dev->of_node; + host->bus_num = bus_num; + host->num_chipselect = num_cs; + host->transfer_one_message = bcm63xx_spi_transfer_one; + host->mode_bits = MODEBITS; + host->bits_per_word_mask = SPI_BPW_MASK(8); + host->max_transfer_size = bcm63xx_spi_max_length; + host->max_message_size = bcm63xx_spi_max_length; + host->auto_runtime_pm = true; bs->msg_type_shift = bs->reg_offsets[SPI_MSG_TYPE_SHIFT]; bs->msg_ctl_width = bs->reg_offsets[SPI_MSG_CTL_WIDTH]; bs->tx_io = (u8 *)(bs->regs + bs->reg_offsets[SPI_MSG_DATA]); @@ -585,7 +585,7 @@ static int bcm63xx_spi_probe(struct platform_device *pdev) pm_runtime_enable(&pdev->dev); /* register and we are done */ - ret = devm_spi_register_master(dev, master); + ret = devm_spi_register_controller(dev, host); if (ret) { dev_err(dev, "spi register failed\n"); goto out_pm_disable; @@ -601,14 +601,14 @@ out_pm_disable: out_clk_disable: clk_disable_unprepare(clk); out_err: - spi_master_put(master); + spi_controller_put(host); return ret; } static void bcm63xx_spi_remove(struct platform_device *pdev) { - struct spi_master *master = platform_get_drvdata(pdev); - struct bcm63xx_spi *bs = spi_master_get_devdata(master); + struct spi_controller *host = platform_get_drvdata(pdev); + struct bcm63xx_spi *bs = spi_controller_get_devdata(host); /* reset spi block */ bcm_spi_writeb(bs, 0, SPI_INT_MASK); @@ -619,10 +619,10 @@ static void bcm63xx_spi_remove(struct platform_device *pdev) static int bcm63xx_spi_suspend(struct device *dev) { - struct spi_master *master = dev_get_drvdata(dev); - struct bcm63xx_spi *bs = spi_master_get_devdata(master); + struct spi_controller *host = dev_get_drvdata(dev); + struct bcm63xx_spi *bs = spi_controller_get_devdata(host); - spi_master_suspend(master); + spi_controller_suspend(host); clk_disable_unprepare(bs->clk); @@ -631,15 +631,15 @@ static int bcm63xx_spi_suspend(struct device *dev) static int bcm63xx_spi_resume(struct device *dev) { - struct spi_master *master = dev_get_drvdata(dev); - struct bcm63xx_spi *bs = spi_master_get_devdata(master); + struct spi_controller *host = dev_get_drvdata(dev); + struct bcm63xx_spi *bs = spi_controller_get_devdata(host); int ret; ret = clk_prepare_enable(bs->clk); if (ret) return ret; - spi_master_resume(master); + spi_controller_resume(host); return 0; } From 5a59b9a1070da555f44e81d09e3d096694deb1c0 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 28 Jul 2023 17:32:09 +0800 Subject: [PATCH 285/656] spi: butterfly: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230728093221.3312026-10-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-butterfly.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/spi/spi-butterfly.c b/drivers/spi/spi-butterfly.c index cceae816cebc..289b4454242a 100644 --- a/drivers/spi/spi-butterfly.c +++ b/drivers/spi/spi-butterfly.c @@ -178,7 +178,7 @@ static void butterfly_attach(struct parport *p) struct pardevice *pd; int status; struct butterfly *pp; - struct spi_master *master; + struct spi_controller *host; struct device *dev = p->physport->dev; struct pardev_cb butterfly_cb; @@ -189,12 +189,12 @@ static void butterfly_attach(struct parport *p) * and no way to be selective about what it binds to. */ - master = spi_alloc_master(dev, sizeof(*pp)); - if (!master) { + host = spi_alloc_host(dev, sizeof(*pp)); + if (!host) { status = -ENOMEM; goto done; } - pp = spi_master_get_devdata(master); + pp = spi_controller_get_devdata(host); /* * SPI and bitbang hookup @@ -202,10 +202,10 @@ static void butterfly_attach(struct parport *p) * use default setup(), cleanup(), and transfer() methods; and * only bother implementing mode 0. Start it later. */ - master->bus_num = 42; - master->num_chipselect = 2; + host->bus_num = 42; + host->num_chipselect = 2; - pp->bitbang.master = master; + pp->bitbang.master = host; pp->bitbang.chipselect = butterfly_chipselect; pp->bitbang.txrx_word[SPI_MODE_0] = butterfly_txrx_word_mode0; @@ -280,7 +280,7 @@ clean2: clean1: parport_unregister_device(pd); clean0: - spi_master_put(pp->bitbang.master); + spi_controller_put(host); done: pr_debug("%s: butterfly probe, fail %d\n", p->name, status); } @@ -308,7 +308,7 @@ static void butterfly_detach(struct parport *p) parport_release(pp->pd); parport_unregister_device(pp->pd); - spi_master_put(pp->bitbang.master); + spi_controller_put(pp->bitbang.master); } static struct parport_driver butterfly_driver = { From ec7cfadff25c1177dadeb1b2fef29f14d530f0df Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 28 Jul 2023 17:32:11 +0800 Subject: [PATCH 286/656] spi: cadence-xspi: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230728093221.3312026-12-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-cadence-xspi.c | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/drivers/spi/spi-cadence-xspi.c b/drivers/spi/spi-cadence-xspi.c index 11d623cbba2e..b7e04b03be58 100644 --- a/drivers/spi/spi-cadence-xspi.c +++ b/drivers/spi/spi-cadence-xspi.c @@ -419,7 +419,7 @@ static int cdns_xspi_mem_op_execute(struct spi_mem *mem, const struct spi_mem_op *op) { struct cdns_xspi_dev *cdns_xspi = - spi_master_get_devdata(mem->spi->master); + spi_controller_get_devdata(mem->spi->controller); int ret = 0; ret = cdns_xspi_mem_op(cdns_xspi, mem, op); @@ -430,7 +430,7 @@ static int cdns_xspi_mem_op_execute(struct spi_mem *mem, static int cdns_xspi_adjust_mem_op_size(struct spi_mem *mem, struct spi_mem_op *op) { struct cdns_xspi_dev *cdns_xspi = - spi_master_get_devdata(mem->spi->master); + spi_controller_get_devdata(mem->spi->controller); op->data.nbytes = clamp_val(op->data.nbytes, 0, cdns_xspi->sdmasize); @@ -527,26 +527,26 @@ static void cdns_xspi_print_phy_config(struct cdns_xspi_dev *cdns_xspi) static int cdns_xspi_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; - struct spi_master *master = NULL; + struct spi_controller *host = NULL; struct cdns_xspi_dev *cdns_xspi = NULL; struct resource *res; int ret; - master = devm_spi_alloc_master(dev, sizeof(*cdns_xspi)); - if (!master) + host = devm_spi_alloc_host(dev, sizeof(*cdns_xspi)); + if (!host) return -ENOMEM; - master->mode_bits = SPI_3WIRE | SPI_TX_DUAL | SPI_TX_QUAD | + host->mode_bits = SPI_3WIRE | SPI_TX_DUAL | SPI_TX_QUAD | SPI_RX_DUAL | SPI_RX_QUAD | SPI_TX_OCTAL | SPI_RX_OCTAL | SPI_MODE_0 | SPI_MODE_3; - master->mem_ops = &cadence_xspi_mem_ops; - master->dev.of_node = pdev->dev.of_node; - master->bus_num = -1; + host->mem_ops = &cadence_xspi_mem_ops; + host->dev.of_node = pdev->dev.of_node; + host->bus_num = -1; - platform_set_drvdata(pdev, master); + platform_set_drvdata(pdev, host); - cdns_xspi = spi_master_get_devdata(master); + cdns_xspi = spi_controller_get_devdata(host); cdns_xspi->pdev = pdev; cdns_xspi->dev = &pdev->dev; cdns_xspi->cur_cs = 0; @@ -596,15 +596,15 @@ static int cdns_xspi_probe(struct platform_device *pdev) return ret; } - master->num_chipselect = 1 << cdns_xspi->hw_num_banks; + host->num_chipselect = 1 << cdns_xspi->hw_num_banks; - ret = devm_spi_register_master(dev, master); + ret = devm_spi_register_controller(dev, host); if (ret) { - dev_err(dev, "Failed to register SPI master\n"); + dev_err(dev, "Failed to register SPI host\n"); return ret; } - dev_info(dev, "Successfully registered SPI master\n"); + dev_info(dev, "Successfully registered SPI host\n"); return 0; } From f75c04a99100b27749bf0d13b96e4fe0cbda6e87 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 28 Jul 2023 17:32:12 +0800 Subject: [PATCH 287/656] spi: cadence: switch to use modern name Change legacy name master/slave to modern name host/target or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230728093221.3312026-13-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-cadence.c | 70 +++++++++++++++++++-------------------- 1 file changed, 35 insertions(+), 35 deletions(-) diff --git a/drivers/spi/spi-cadence.c b/drivers/spi/spi-cadence.c index 42f101d357c3..2554d06a650c 100644 --- a/drivers/spi/spi-cadence.c +++ b/drivers/spi/spi-cadence.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-or-later /* - * Cadence SPI controller driver (master and slave mode) + * Cadence SPI controller driver (host and target mode) * * Copyright (C) 2008 - 2014 Xilinx, Inc. * @@ -59,10 +59,10 @@ CDNS_SPI_CR_BAUD_DIV_4) /* - * SPI Configuration Register - Baud rate and slave select + * SPI Configuration Register - Baud rate and target select * * These are the values used in the calculation of baud rate divisor and - * setting the slave select. + * setting the target select. */ #define CDNS_SPI_BAUD_DIV_MAX 7 /* Baud rate divisor maximum */ @@ -141,20 +141,20 @@ static inline void cdns_spi_write(struct cdns_spi *xspi, u32 offset, u32 val) /** * cdns_spi_init_hw - Initialize the hardware and configure the SPI controller * @xspi: Pointer to the cdns_spi structure - * @is_slave: Flag to indicate slave or master mode - * * On reset the SPI controller is configured to slave or master mode. - * In master mode baud rate divisor is set to 4, threshold value for TX FIFO + * @is_target: Flag to indicate target or host mode + * * On reset the SPI controller is configured to target or host mode. + * In host mode baud rate divisor is set to 4, threshold value for TX FIFO * not full interrupt is set to 1 and size of the word to be transferred as 8 bit. * * This function initializes the SPI controller to disable and clear all the - * interrupts, enable manual slave select and manual start, deselect all the + * interrupts, enable manual target select and manual start, deselect all the * chip select lines, and enable the SPI controller. */ -static void cdns_spi_init_hw(struct cdns_spi *xspi, bool is_slave) +static void cdns_spi_init_hw(struct cdns_spi *xspi, bool is_target) { u32 ctrl_reg = 0; - if (!is_slave) + if (!is_target) ctrl_reg |= CDNS_SPI_CR_DEFAULT; if (xspi->is_decoded_cs) @@ -185,10 +185,10 @@ static void cdns_spi_chipselect(struct spi_device *spi, bool is_high) ctrl_reg = cdns_spi_read(xspi, CDNS_SPI_CR); if (is_high) { - /* Deselect the slave */ + /* Deselect the target */ ctrl_reg |= CDNS_SPI_CR_SSCTRL; } else { - /* Select the slave */ + /* Select the target */ ctrl_reg &= ~CDNS_SPI_CR_SSCTRL; if (!(xspi->is_decoded_cs)) ctrl_reg |= ((~(CDNS_SPI_SS0 << spi_get_chipselect(spi, 0))) << @@ -227,7 +227,7 @@ static void cdns_spi_config_clock_mode(struct spi_device *spi) /* * Just writing the CR register does not seem to apply the clock * setting changes. This is problematic when changing the clock - * polarity as it will cause the SPI slave to see spurious clock + * polarity as it will cause the SPI target to see spurious clock * transitions. To workaround the issue toggle the ER register. */ cdns_spi_write(xspi, CDNS_SPI_ER, CDNS_SPI_ER_DISABLE); @@ -406,7 +406,7 @@ static irqreturn_t cdns_spi_irq(int irq, void *dev_id) static int cdns_prepare_message(struct spi_controller *ctlr, struct spi_message *msg) { - if (!spi_controller_is_slave(ctlr)) + if (!spi_controller_is_target(ctlr)) cdns_spi_config_clock_mode(msg->spi); return 0; } @@ -418,9 +418,9 @@ static int cdns_prepare_message(struct spi_controller *ctlr, * @transfer: Pointer to the spi_transfer structure which provides * information about next transfer parameters * - * This function in master mode fills the TX FIFO, starts the SPI transfer and + * This function in host mode fills the TX FIFO, starts the SPI transfer and * returns a positive transfer count so that core will wait for completion. - * This function in slave mode fills the TX FIFO and wait for transfer trigger. + * This function in target mode fills the TX FIFO and wait for transfer trigger. * * Return: Number of bytes transferred in the last transfer */ @@ -435,7 +435,7 @@ static int cdns_transfer_one(struct spi_controller *ctlr, xspi->tx_bytes = transfer->len; xspi->rx_bytes = transfer->len; - if (!spi_controller_is_slave(ctlr)) { + if (!spi_controller_is_target(ctlr)) { cdns_spi_setup_transfer(spi, transfer); } else { /* Set TX empty threshold to half of FIFO depth @@ -457,7 +457,7 @@ static int cdns_transfer_one(struct spi_controller *ctlr, * @ctlr: Pointer to the spi_controller structure which provides * information about the controller. * - * This function enables SPI master controller. + * This function enables SPI host controller. * * Return: 0 always */ @@ -475,7 +475,7 @@ static int cdns_prepare_transfer_hardware(struct spi_controller *ctlr) * @ctlr: Pointer to the spi_controller structure which provides * information about the controller. * - * This function disables the SPI master controller when no slave selected. + * This function disables the SPI host controller when no target selected. * This function flush out if any pending data in FIFO. * * Return: 0 always @@ -486,15 +486,15 @@ static int cdns_unprepare_transfer_hardware(struct spi_controller *ctlr) u32 ctrl_reg; unsigned int cnt = xspi->tx_fifo_depth; - if (spi_controller_is_slave(ctlr)) { + if (spi_controller_is_target(ctlr)) { while (cnt--) cdns_spi_read(xspi, CDNS_SPI_RXD); } - /* Disable the SPI if slave is deselected */ + /* Disable the SPI if target is deselected */ ctrl_reg = cdns_spi_read(xspi, CDNS_SPI_CR); ctrl_reg = (ctrl_reg & CDNS_SPI_CR_SSCTRL) >> CDNS_SPI_SS_SHIFT; - if (ctrl_reg == CDNS_SPI_NOSS || spi_controller_is_slave(ctlr)) + if (ctrl_reg == CDNS_SPI_NOSS || spi_controller_is_target(ctlr)) cdns_spi_write(xspi, CDNS_SPI_ER, CDNS_SPI_ER_DISABLE); /* Reset to default */ @@ -521,14 +521,14 @@ static void cdns_spi_detect_fifo_depth(struct cdns_spi *xspi) } /** - * cdns_slave_abort - Abort slave transfer + * cdns_target_abort - Abort target transfer * @ctlr: Pointer to the spi_controller structure * - * This function abort slave transfer if there any transfer timeout. + * This function abort target transfer if there any transfer timeout. * * Return: 0 always */ -static int cdns_slave_abort(struct spi_controller *ctlr) +static int cdns_target_abort(struct spi_controller *ctlr) { struct cdns_spi *xspi = spi_controller_get_devdata(ctlr); u32 intr_status; @@ -555,13 +555,13 @@ static int cdns_spi_probe(struct platform_device *pdev) struct spi_controller *ctlr; struct cdns_spi *xspi; u32 num_cs; - bool slave; + bool target; - slave = of_property_read_bool(pdev->dev.of_node, "spi-slave"); - if (slave) - ctlr = spi_alloc_slave(&pdev->dev, sizeof(*xspi)); + target = of_property_read_bool(pdev->dev.of_node, "spi-slave"); + if (target) + ctlr = spi_alloc_target(&pdev->dev, sizeof(*xspi)); else - ctlr = spi_alloc_master(&pdev->dev, sizeof(*xspi)); + ctlr = spi_alloc_host(&pdev->dev, sizeof(*xspi)); if (!ctlr) return -ENOMEM; @@ -589,7 +589,7 @@ static int cdns_spi_probe(struct platform_device *pdev) goto remove_ctlr; } - if (!spi_controller_is_slave(ctlr)) { + if (!spi_controller_is_target(ctlr)) { xspi->ref_clk = devm_clk_get(&pdev->dev, "ref_clk"); if (IS_ERR(xspi->ref_clk)) { dev_err(&pdev->dev, "ref_clk clock not found.\n"); @@ -624,7 +624,7 @@ static int cdns_spi_probe(struct platform_device *pdev) cdns_spi_detect_fifo_depth(xspi); /* SPI controller initializations */ - cdns_spi_init_hw(xspi, spi_controller_is_slave(ctlr)); + cdns_spi_init_hw(xspi, spi_controller_is_target(ctlr)); irq = platform_get_irq(pdev, 0); if (irq <= 0) { @@ -648,7 +648,7 @@ static int cdns_spi_probe(struct platform_device *pdev) ctlr->mode_bits = SPI_CPOL | SPI_CPHA; ctlr->bits_per_word_mask = SPI_BPW_MASK(8); - if (!spi_controller_is_slave(ctlr)) { + if (!spi_controller_is_target(ctlr)) { ctlr->mode_bits |= SPI_CS_HIGH; ctlr->set_cs = cdns_spi_chipselect; ctlr->auto_runtime_pm = true; @@ -660,7 +660,7 @@ static int cdns_spi_probe(struct platform_device *pdev) pm_runtime_put_autosuspend(&pdev->dev); } else { ctlr->mode_bits |= SPI_NO_CS; - ctlr->slave_abort = cdns_slave_abort; + ctlr->target_abort = cdns_target_abort; } ret = spi_register_controller(ctlr); if (ret) { @@ -671,7 +671,7 @@ static int cdns_spi_probe(struct platform_device *pdev) return ret; clk_dis_all: - if (!spi_controller_is_slave(ctlr)) { + if (!spi_controller_is_target(ctlr)) { pm_runtime_set_suspended(&pdev->dev); pm_runtime_disable(&pdev->dev); clk_disable_unprepare(xspi->ref_clk); @@ -735,7 +735,7 @@ static int __maybe_unused cdns_spi_resume(struct device *dev) struct spi_controller *ctlr = dev_get_drvdata(dev); struct cdns_spi *xspi = spi_controller_get_devdata(ctlr); - cdns_spi_init_hw(xspi, spi_controller_is_slave(ctlr)); + cdns_spi_init_hw(xspi, spi_controller_is_target(ctlr)); return spi_controller_resume(ctlr); } From 1baba77b1f2c6143866463e11749d8dd4c544181 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 28 Jul 2023 17:32:13 +0800 Subject: [PATCH 288/656] spi: clps711x: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230728093221.3312026-14-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-clps711x.c | 42 +++++++++++++++++++------------------- 1 file changed, 21 insertions(+), 21 deletions(-) diff --git a/drivers/spi/spi-clps711x.c b/drivers/spi/spi-clps711x.c index c005ed26a3e1..5552ccd716fc 100644 --- a/drivers/spi/spi-clps711x.c +++ b/drivers/spi/spi-clps711x.c @@ -33,10 +33,10 @@ struct spi_clps711x_data { int len; }; -static int spi_clps711x_prepare_message(struct spi_master *master, +static int spi_clps711x_prepare_message(struct spi_controller *host, struct spi_message *msg) { - struct spi_clps711x_data *hw = spi_master_get_devdata(master); + struct spi_clps711x_data *hw = spi_controller_get_devdata(host); struct spi_device *spi = msg->spi; /* Setup mode for transfer */ @@ -45,11 +45,11 @@ static int spi_clps711x_prepare_message(struct spi_master *master, SYSCON3_ADCCKNSEN : 0); } -static int spi_clps711x_transfer_one(struct spi_master *master, +static int spi_clps711x_transfer_one(struct spi_controller *host, struct spi_device *spi, struct spi_transfer *xfer) { - struct spi_clps711x_data *hw = spi_master_get_devdata(master); + struct spi_clps711x_data *hw = spi_controller_get_devdata(host); u8 data; clk_set_rate(hw->spi_clk, xfer->speed_hz ? : spi->max_speed_hz); @@ -68,8 +68,8 @@ static int spi_clps711x_transfer_one(struct spi_master *master, static irqreturn_t spi_clps711x_isr(int irq, void *dev_id) { - struct spi_master *master = dev_id; - struct spi_clps711x_data *hw = spi_master_get_devdata(master); + struct spi_controller *host = dev_id; + struct spi_clps711x_data *hw = spi_controller_get_devdata(host); u8 data; /* Handle RX */ @@ -83,7 +83,7 @@ static irqreturn_t spi_clps711x_isr(int irq, void *dev_id) writel(data | SYNCIO_FRMLEN(hw->bpw) | SYNCIO_TXFRMEN, hw->syncio); } else - spi_finalize_current_transfer(master); + spi_finalize_current_transfer(host); return IRQ_HANDLED; } @@ -92,26 +92,26 @@ static int spi_clps711x_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; struct spi_clps711x_data *hw; - struct spi_master *master; + struct spi_controller *host; int irq, ret; irq = platform_get_irq(pdev, 0); if (irq < 0) return irq; - master = spi_alloc_master(&pdev->dev, sizeof(*hw)); - if (!master) + host = spi_alloc_host(&pdev->dev, sizeof(*hw)); + if (!host) return -ENOMEM; - master->use_gpio_descriptors = true; - master->bus_num = -1; - master->mode_bits = SPI_CPHA | SPI_CS_HIGH; - master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 8); - master->dev.of_node = pdev->dev.of_node; - master->prepare_message = spi_clps711x_prepare_message; - master->transfer_one = spi_clps711x_transfer_one; + host->use_gpio_descriptors = true; + host->bus_num = -1; + host->mode_bits = SPI_CPHA | SPI_CS_HIGH; + host->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 8); + host->dev.of_node = pdev->dev.of_node; + host->prepare_message = spi_clps711x_prepare_message; + host->transfer_one = spi_clps711x_transfer_one; - hw = spi_master_get_devdata(master); + hw = spi_controller_get_devdata(host); hw->spi_clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(hw->spi_clk)) { @@ -138,16 +138,16 @@ static int spi_clps711x_probe(struct platform_device *pdev) readl(hw->syncio); ret = devm_request_irq(&pdev->dev, irq, spi_clps711x_isr, 0, - dev_name(&pdev->dev), master); + dev_name(&pdev->dev), host); if (ret) goto err_out; - ret = devm_spi_register_master(&pdev->dev, master); + ret = devm_spi_register_controller(&pdev->dev, host); if (!ret) return 0; err_out: - spi_master_put(master); + spi_controller_put(host); return ret; } From d2a44ae8d2cf9142f5555a2007cb370dc0a2efa5 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 28 Jul 2023 17:32:14 +0800 Subject: [PATCH 289/656] spi: octeon: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230728093221.3312026-15-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-cavium-octeon.c | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/drivers/spi/spi-cavium-octeon.c b/drivers/spi/spi-cavium-octeon.c index 58060be33106..4511c3b31223 100644 --- a/drivers/spi/spi-cavium-octeon.c +++ b/drivers/spi/spi-cavium-octeon.c @@ -19,15 +19,15 @@ static int octeon_spi_probe(struct platform_device *pdev) { void __iomem *reg_base; - struct spi_master *master; + struct spi_controller *host; struct octeon_spi *p; int err = -ENOENT; - master = spi_alloc_master(&pdev->dev, sizeof(struct octeon_spi)); - if (!master) + host = spi_alloc_host(&pdev->dev, sizeof(struct octeon_spi)); + if (!host) return -ENOMEM; - p = spi_master_get_devdata(master); - platform_set_drvdata(pdev, master); + p = spi_controller_get_devdata(host); + platform_set_drvdata(pdev, host); reg_base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(reg_base)) { @@ -43,21 +43,21 @@ static int octeon_spi_probe(struct platform_device *pdev) p->regs.tx = 0x10; p->regs.data = 0x80; - master->num_chipselect = 4; - master->mode_bits = SPI_CPHA | + host->num_chipselect = 4; + host->mode_bits = SPI_CPHA | SPI_CPOL | SPI_CS_HIGH | SPI_LSB_FIRST | SPI_3WIRE; - master->transfer_one_message = octeon_spi_transfer_one_message; - master->bits_per_word_mask = SPI_BPW_MASK(8); - master->max_speed_hz = OCTEON_SPI_MAX_CLOCK_HZ; + host->transfer_one_message = octeon_spi_transfer_one_message; + host->bits_per_word_mask = SPI_BPW_MASK(8); + host->max_speed_hz = OCTEON_SPI_MAX_CLOCK_HZ; - master->dev.of_node = pdev->dev.of_node; - err = devm_spi_register_master(&pdev->dev, master); + host->dev.of_node = pdev->dev.of_node; + err = devm_spi_register_controller(&pdev->dev, host); if (err) { - dev_err(&pdev->dev, "register master failed: %d\n", err); + dev_err(&pdev->dev, "register host failed: %d\n", err); goto fail; } @@ -65,14 +65,14 @@ static int octeon_spi_probe(struct platform_device *pdev) return 0; fail: - spi_master_put(master); + spi_controller_put(host); return err; } static void octeon_spi_remove(struct platform_device *pdev) { - struct spi_master *master = platform_get_drvdata(pdev); - struct octeon_spi *p = spi_master_get_devdata(master); + struct spi_controller *host = platform_get_drvdata(pdev); + struct octeon_spi *p = spi_controller_get_devdata(host); /* Clear the CSENA* and put everything in a known state. */ writeq(0, p->register_base + OCTEON_SPI_CFG(p)); From 556aca5be04c83c25ff4e96f53cb82b44cd7f8ff Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 28 Jul 2023 17:32:15 +0800 Subject: [PATCH 290/656] spi: spi-cavium-thunderx: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230728093221.3312026-16-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-cavium-thunderx.c | 32 +++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/drivers/spi/spi-cavium-thunderx.c b/drivers/spi/spi-cavium-thunderx.c index 535f7eb9fa69..f7c378a5f1bc 100644 --- a/drivers/spi/spi-cavium-thunderx.c +++ b/drivers/spi/spi-cavium-thunderx.c @@ -20,15 +20,15 @@ static int thunderx_spi_probe(struct pci_dev *pdev, const struct pci_device_id *ent) { struct device *dev = &pdev->dev; - struct spi_master *master; + struct spi_controller *host; struct octeon_spi *p; int ret; - master = spi_alloc_master(dev, sizeof(struct octeon_spi)); - if (!master) + host = spi_alloc_host(dev, sizeof(struct octeon_spi)); + if (!host) return -ENOMEM; - p = spi_master_get_devdata(master); + p = spi_controller_get_devdata(host); ret = pcim_enable_device(pdev); if (ret) @@ -64,18 +64,18 @@ static int thunderx_spi_probe(struct pci_dev *pdev, p->sys_freq = SYS_FREQ_DEFAULT; dev_info(dev, "Set system clock to %u\n", p->sys_freq); - master->flags = SPI_CONTROLLER_HALF_DUPLEX; - master->num_chipselect = 4; - master->mode_bits = SPI_CPHA | SPI_CPOL | SPI_CS_HIGH | + host->flags = SPI_CONTROLLER_HALF_DUPLEX; + host->num_chipselect = 4; + host->mode_bits = SPI_CPHA | SPI_CPOL | SPI_CS_HIGH | SPI_LSB_FIRST | SPI_3WIRE; - master->transfer_one_message = octeon_spi_transfer_one_message; - master->bits_per_word_mask = SPI_BPW_MASK(8); - master->max_speed_hz = OCTEON_SPI_MAX_CLOCK_HZ; - master->dev.of_node = pdev->dev.of_node; + host->transfer_one_message = octeon_spi_transfer_one_message; + host->bits_per_word_mask = SPI_BPW_MASK(8); + host->max_speed_hz = OCTEON_SPI_MAX_CLOCK_HZ; + host->dev.of_node = pdev->dev.of_node; - pci_set_drvdata(pdev, master); + pci_set_drvdata(pdev, host); - ret = devm_spi_register_master(dev, master); + ret = devm_spi_register_controller(dev, host); if (ret) goto error; @@ -84,16 +84,16 @@ static int thunderx_spi_probe(struct pci_dev *pdev, error: clk_disable_unprepare(p->clk); pci_release_regions(pdev); - spi_master_put(master); + spi_controller_put(host); return ret; } static void thunderx_spi_remove(struct pci_dev *pdev) { - struct spi_master *master = pci_get_drvdata(pdev); + struct spi_controller *host = pci_get_drvdata(pdev); struct octeon_spi *p; - p = spi_master_get_devdata(master); + p = spi_controller_get_devdata(host); if (!p) return; From cd9fdf5ae81c01d7d927bb090e25419e9f5165f1 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 28 Jul 2023 17:32:16 +0800 Subject: [PATCH 291/656] spi: coldfire-qspi: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230728093221.3312026-17-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-coldfire-qspi.c | 66 ++++++++++++++++----------------- 1 file changed, 33 insertions(+), 33 deletions(-) diff --git a/drivers/spi/spi-coldfire-qspi.c b/drivers/spi/spi-coldfire-qspi.c index 31174e7ca7a6..f0b630fe16c3 100644 --- a/drivers/spi/spi-coldfire-qspi.c +++ b/drivers/spi/spi-coldfire-qspi.c @@ -286,7 +286,7 @@ static void mcfqspi_transfer_msg16(struct mcfqspi *mcfqspi, unsigned count, static void mcfqspi_set_cs(struct spi_device *spi, bool enable) { - struct mcfqspi *mcfqspi = spi_master_get_devdata(spi->master); + struct mcfqspi *mcfqspi = spi_controller_get_devdata(spi->controller); bool cs_high = spi->mode & SPI_CS_HIGH; if (enable) @@ -295,11 +295,11 @@ static void mcfqspi_set_cs(struct spi_device *spi, bool enable) mcfqspi_cs_deselect(mcfqspi, spi_get_chipselect(spi, 0), cs_high); } -static int mcfqspi_transfer_one(struct spi_master *master, +static int mcfqspi_transfer_one(struct spi_controller *host, struct spi_device *spi, struct spi_transfer *t) { - struct mcfqspi *mcfqspi = spi_master_get_devdata(master); + struct mcfqspi *mcfqspi = spi_controller_get_devdata(host); u16 qmr = MCFQSPI_QMR_MSTR; qmr |= t->bits_per_word << 10; @@ -323,7 +323,7 @@ static int mcfqspi_transfer_one(struct spi_master *master, static int mcfqspi_setup(struct spi_device *spi) { - mcfqspi_cs_deselect(spi_master_get_devdata(spi->master), + mcfqspi_cs_deselect(spi_controller_get_devdata(spi->controller), spi_get_chipselect(spi, 0), spi->mode & SPI_CS_HIGH); dev_dbg(&spi->dev, @@ -337,7 +337,7 @@ static int mcfqspi_setup(struct spi_device *spi) static int mcfqspi_probe(struct platform_device *pdev) { - struct spi_master *master; + struct spi_controller *host; struct mcfqspi *mcfqspi; struct mcfqspi_platform_data *pdata; int status; @@ -353,13 +353,13 @@ static int mcfqspi_probe(struct platform_device *pdev) return -EINVAL; } - master = spi_alloc_master(&pdev->dev, sizeof(*mcfqspi)); - if (master == NULL) { - dev_dbg(&pdev->dev, "spi_alloc_master failed\n"); + host = spi_alloc_host(&pdev->dev, sizeof(*mcfqspi)); + if (host == NULL) { + dev_dbg(&pdev->dev, "spi_alloc_host failed\n"); return -ENOMEM; } - mcfqspi = spi_master_get_devdata(master); + mcfqspi = spi_controller_get_devdata(host); mcfqspi->iobase = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(mcfqspi->iobase)) { @@ -388,8 +388,8 @@ static int mcfqspi_probe(struct platform_device *pdev) goto fail0; } - master->bus_num = pdata->bus_num; - master->num_chipselect = pdata->num_chipselect; + host->bus_num = pdata->bus_num; + host->num_chipselect = pdata->num_chipselect; mcfqspi->cs_control = pdata->cs_control; status = mcfqspi_cs_setup(mcfqspi); @@ -400,19 +400,19 @@ static int mcfqspi_probe(struct platform_device *pdev) init_waitqueue_head(&mcfqspi->waitq); - master->mode_bits = SPI_CS_HIGH | SPI_CPOL | SPI_CPHA; - master->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 16); - master->setup = mcfqspi_setup; - master->set_cs = mcfqspi_set_cs; - master->transfer_one = mcfqspi_transfer_one; - master->auto_runtime_pm = true; + host->mode_bits = SPI_CS_HIGH | SPI_CPOL | SPI_CPHA; + host->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 16); + host->setup = mcfqspi_setup; + host->set_cs = mcfqspi_set_cs; + host->transfer_one = mcfqspi_transfer_one; + host->auto_runtime_pm = true; - platform_set_drvdata(pdev, master); + platform_set_drvdata(pdev, host); pm_runtime_enable(&pdev->dev); - status = devm_spi_register_master(&pdev->dev, master); + status = devm_spi_register_controller(&pdev->dev, host); if (status) { - dev_dbg(&pdev->dev, "spi_register_master failed\n"); + dev_dbg(&pdev->dev, "devm_spi_register_controller failed\n"); goto fail1; } @@ -424,7 +424,7 @@ fail1: pm_runtime_disable(&pdev->dev); mcfqspi_cs_teardown(mcfqspi); fail0: - spi_master_put(master); + spi_controller_put(host); dev_dbg(&pdev->dev, "Coldfire QSPI probe failed\n"); @@ -433,8 +433,8 @@ fail0: static void mcfqspi_remove(struct platform_device *pdev) { - struct spi_master *master = platform_get_drvdata(pdev); - struct mcfqspi *mcfqspi = spi_master_get_devdata(master); + struct spi_controller *host = platform_get_drvdata(pdev); + struct mcfqspi *mcfqspi = spi_controller_get_devdata(host); pm_runtime_disable(&pdev->dev); /* disable the hardware (set the baud rate to 0) */ @@ -447,11 +447,11 @@ static void mcfqspi_remove(struct platform_device *pdev) #ifdef CONFIG_PM_SLEEP static int mcfqspi_suspend(struct device *dev) { - struct spi_master *master = dev_get_drvdata(dev); - struct mcfqspi *mcfqspi = spi_master_get_devdata(master); + struct spi_controller *host = dev_get_drvdata(dev); + struct mcfqspi *mcfqspi = spi_controller_get_devdata(host); int ret; - ret = spi_master_suspend(master); + ret = spi_controller_suspend(host); if (ret) return ret; @@ -462,20 +462,20 @@ static int mcfqspi_suspend(struct device *dev) static int mcfqspi_resume(struct device *dev) { - struct spi_master *master = dev_get_drvdata(dev); - struct mcfqspi *mcfqspi = spi_master_get_devdata(master); + struct spi_controller *host = dev_get_drvdata(dev); + struct mcfqspi *mcfqspi = spi_controller_get_devdata(host); clk_enable(mcfqspi->clk); - return spi_master_resume(master); + return spi_controller_resume(host); } #endif #ifdef CONFIG_PM static int mcfqspi_runtime_suspend(struct device *dev) { - struct spi_master *master = dev_get_drvdata(dev); - struct mcfqspi *mcfqspi = spi_master_get_devdata(master); + struct spi_controller *host = dev_get_drvdata(dev); + struct mcfqspi *mcfqspi = spi_controller_get_devdata(host); clk_disable(mcfqspi->clk); @@ -484,8 +484,8 @@ static int mcfqspi_runtime_suspend(struct device *dev) static int mcfqspi_runtime_resume(struct device *dev) { - struct spi_master *master = dev_get_drvdata(dev); - struct mcfqspi *mcfqspi = spi_master_get_devdata(master); + struct spi_controller *host = dev_get_drvdata(dev); + struct mcfqspi *mcfqspi = spi_controller_get_devdata(host); clk_enable(mcfqspi->clk); From ad5602ba3113b99318a726d6452228b0ce137804 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 28 Jul 2023 17:32:17 +0800 Subject: [PATCH 292/656] spi: davinci: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230728093221.3312026-18-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-davinci.c | 74 +++++++++++++++++++-------------------- 1 file changed, 37 insertions(+), 37 deletions(-) diff --git a/drivers/spi/spi-davinci.c b/drivers/spi/spi-davinci.c index 9a9f3bc0e2d5..c457b550d3ad 100644 --- a/drivers/spi/spi-davinci.c +++ b/drivers/spi/spi-davinci.c @@ -201,7 +201,7 @@ static void davinci_spi_chipselect(struct spi_device *spi, int value) u8 chip_sel = spi_get_chipselect(spi, 0); u16 spidat1 = CS_DEFAULT; - dspi = spi_master_get_devdata(spi->master); + dspi = spi_controller_get_devdata(spi->controller); /* program delay transfers if tx_delay is non zero */ if (spicfg && spicfg->wdelay) @@ -271,7 +271,7 @@ static int davinci_spi_setup_transfer(struct spi_device *spi, u32 hz = 0, spifmt = 0; int prescale; - dspi = spi_master_get_devdata(spi->master); + dspi = spi_controller_get_devdata(spi->controller); spicfg = spi->controller_data; if (!spicfg) spicfg = &davinci_spi_default_cfg; @@ -379,7 +379,7 @@ static int davinci_spi_of_setup(struct spi_device *spi) { struct davinci_spi_config *spicfg = spi->controller_data; struct device_node *np = spi->dev.of_node; - struct davinci_spi *dspi = spi_master_get_devdata(spi->master); + struct davinci_spi *dspi = spi_controller_get_devdata(spi->controller); u32 prop; if (spicfg == NULL && np) { @@ -411,7 +411,7 @@ static int davinci_spi_setup(struct spi_device *spi) struct device_node *np = spi->dev.of_node; bool internal_cs = true; - dspi = spi_master_get_devdata(spi->master); + dspi = spi_controller_get_devdata(spi->controller); if (!(spi->mode & SPI_NO_CS)) { if (np && spi_get_csgpiod(spi, 0)) @@ -441,7 +441,7 @@ static void davinci_spi_cleanup(struct spi_device *spi) kfree(spicfg); } -static bool davinci_spi_can_dma(struct spi_master *master, +static bool davinci_spi_can_dma(struct spi_controller *host, struct spi_device *spi, struct spi_transfer *xfer) { @@ -571,7 +571,7 @@ static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t) struct davinci_spi_config *spicfg; struct davinci_spi_platform_data *pdata; - dspi = spi_master_get_devdata(spi->master); + dspi = spi_controller_get_devdata(spi->controller); pdata = &dspi->pdata; spicfg = (struct davinci_spi_config *)spi->controller_data; if (!spicfg) @@ -592,7 +592,7 @@ static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t) reinit_completion(&dspi->done); - if (!davinci_spi_can_dma(spi->master, spi, t)) { + if (!davinci_spi_can_dma(spi->controller, spi, t)) { if (spicfg->io_type != SPI_IO_TYPE_POLL) set_io_bits(dspi->base + SPIINT, SPIINT_MASKINT); /* start the transfer */ @@ -673,7 +673,7 @@ static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t) } clear_io_bits(dspi->base + SPIINT, SPIINT_MASKALL); - if (davinci_spi_can_dma(spi->master, spi, t)) + if (davinci_spi_can_dma(spi->controller, spi, t)) clear_io_bits(dspi->base + SPIINT, SPIINT_DMA_REQ_EN); clear_io_bits(dspi->base + SPIGCR1, SPIGCR1_SPIENA_MASK); @@ -855,22 +855,22 @@ static int spi_davinci_get_pdata(struct platform_device *pdev, */ static int davinci_spi_probe(struct platform_device *pdev) { - struct spi_master *master; + struct spi_controller *host; struct davinci_spi *dspi; struct davinci_spi_platform_data *pdata; struct resource *r; int ret = 0; u32 spipc0; - master = spi_alloc_master(&pdev->dev, sizeof(struct davinci_spi)); - if (master == NULL) { + host = spi_alloc_host(&pdev->dev, sizeof(struct davinci_spi)); + if (host == NULL) { ret = -ENOMEM; goto err; } - platform_set_drvdata(pdev, master); + platform_set_drvdata(pdev, host); - dspi = spi_master_get_devdata(master); + dspi = spi_controller_get_devdata(host); if (dev_get_platdata(&pdev->dev)) { pdata = dev_get_platdata(&pdev->dev); @@ -879,7 +879,7 @@ static int davinci_spi_probe(struct platform_device *pdev) /* update dspi pdata with that from the DT */ ret = spi_davinci_get_pdata(pdev, dspi); if (ret < 0) - goto free_master; + goto free_host; } /* pdata in dspi is now updated and point pdata to that */ @@ -891,13 +891,13 @@ static int davinci_spi_probe(struct platform_device *pdev) GFP_KERNEL); if (dspi->bytes_per_word == NULL) { ret = -ENOMEM; - goto free_master; + goto free_host; } dspi->base = devm_platform_get_and_ioremap_resource(pdev, 0, &r); if (IS_ERR(dspi->base)) { ret = PTR_ERR(dspi->base); - goto free_master; + goto free_host; } dspi->pbase = r->start; @@ -905,34 +905,34 @@ static int davinci_spi_probe(struct platform_device *pdev) ret = platform_get_irq(pdev, 0); if (ret < 0) - goto free_master; + goto free_host; dspi->irq = ret; ret = devm_request_threaded_irq(&pdev->dev, dspi->irq, davinci_spi_irq, dummy_thread_fn, 0, dev_name(&pdev->dev), dspi); if (ret) - goto free_master; + goto free_host; - dspi->bitbang.master = master; + dspi->bitbang.master = host; dspi->clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(dspi->clk)) { ret = -ENODEV; - goto free_master; + goto free_host; } ret = clk_prepare_enable(dspi->clk); if (ret) - goto free_master; + goto free_host; - master->use_gpio_descriptors = true; - master->dev.of_node = pdev->dev.of_node; - master->bus_num = pdev->id; - master->num_chipselect = pdata->num_chipselect; - master->bits_per_word_mask = SPI_BPW_RANGE_MASK(2, 16); - master->flags = SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_GPIO_SS; - master->setup = davinci_spi_setup; - master->cleanup = davinci_spi_cleanup; - master->can_dma = davinci_spi_can_dma; + host->use_gpio_descriptors = true; + host->dev.of_node = pdev->dev.of_node; + host->bus_num = pdev->id; + host->num_chipselect = pdata->num_chipselect; + host->bits_per_word_mask = SPI_BPW_RANGE_MASK(2, 16); + host->flags = SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_GPIO_SS; + host->setup = davinci_spi_setup; + host->cleanup = davinci_spi_cleanup; + host->can_dma = davinci_spi_can_dma; dspi->bitbang.chipselect = davinci_spi_chipselect; dspi->bitbang.setup_transfer = davinci_spi_setup_transfer; @@ -973,7 +973,7 @@ static int davinci_spi_probe(struct platform_device *pdev) iowrite32(CS_DEFAULT, dspi->base + SPIDEF); - /* master mode default */ + /* host mode default */ set_io_bits(dspi->base + SPIGCR1, SPIGCR1_CLKMOD_MASK); set_io_bits(dspi->base + SPIGCR1, SPIGCR1_MASTER_MASK); set_io_bits(dspi->base + SPIGCR1, SPIGCR1_POWERDOWN_MASK); @@ -993,8 +993,8 @@ free_dma: } free_clk: clk_disable_unprepare(dspi->clk); -free_master: - spi_master_put(master); +free_host: + spi_controller_put(host); err: return ret; } @@ -1011,10 +1011,10 @@ err: static void davinci_spi_remove(struct platform_device *pdev) { struct davinci_spi *dspi; - struct spi_master *master; + struct spi_controller *host; - master = platform_get_drvdata(pdev); - dspi = spi_master_get_devdata(master); + host = platform_get_drvdata(pdev); + dspi = spi_controller_get_devdata(host); spi_bitbang_stop(&dspi->bitbang); @@ -1025,7 +1025,7 @@ static void davinci_spi_remove(struct platform_device *pdev) dma_release_channel(dspi->dma_tx); } - spi_master_put(master); + spi_controller_put(host); } static struct platform_driver davinci_spi_driver = { From 5ab7a7e37d2fe73465f521155672ccd3b138c35a Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 28 Jul 2023 17:32:18 +0800 Subject: [PATCH 293/656] spi: dln2: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230728093221.3312026-19-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-dln2.c | 94 +++++++++++++++++++++--------------------- 1 file changed, 47 insertions(+), 47 deletions(-) diff --git a/drivers/spi/spi-dln2.c b/drivers/spi/spi-dln2.c index 6bd93c47853c..d319dc357fef 100644 --- a/drivers/spi/spi-dln2.c +++ b/drivers/spi/spi-dln2.c @@ -79,7 +79,7 @@ struct dln2_spi { struct platform_device *pdev; - struct spi_master *master; + struct spi_controller *host; u8 port; /* @@ -176,7 +176,7 @@ static int dln2_spi_cs_enable(struct dln2_spi *dln2, u8 cs_mask, bool enable) static int dln2_spi_cs_enable_all(struct dln2_spi *dln2, bool enable) { - u8 cs_mask = GENMASK(dln2->master->num_chipselect - 1, 0); + u8 cs_mask = GENMASK(dln2->host->num_chipselect - 1, 0); return dln2_spi_cs_enable(dln2, cs_mask, enable); } @@ -589,11 +589,11 @@ static int dln2_spi_rdwr(struct dln2_spi *dln2, const u8 *tx_data, return 0; } -static int dln2_spi_prepare_message(struct spi_master *master, +static int dln2_spi_prepare_message(struct spi_controller *host, struct spi_message *message) { int ret; - struct dln2_spi *dln2 = spi_master_get_devdata(master); + struct dln2_spi *dln2 = spi_controller_get_devdata(host); struct spi_device *spi = message->spi; if (dln2->cs != spi_get_chipselect(spi, 0)) { @@ -650,11 +650,11 @@ static int dln2_spi_transfer_setup(struct dln2_spi *dln2, u32 speed, return dln2_spi_enable(dln2, true); } -static int dln2_spi_transfer_one(struct spi_master *master, +static int dln2_spi_transfer_one(struct spi_controller *host, struct spi_device *spi, struct spi_transfer *xfer) { - struct dln2_spi *dln2 = spi_master_get_devdata(master); + struct dln2_spi *dln2 = spi_controller_get_devdata(host); int status; u8 attr = 0; @@ -666,7 +666,7 @@ static int dln2_spi_transfer_one(struct spi_master *master, return status; } - if (!xfer->cs_change && !spi_transfer_is_last(master, xfer)) + if (!xfer->cs_change && !spi_transfer_is_last(host, xfer)) attr = DLN2_SPI_ATTR_LEAVE_SS_LOW; status = dln2_spi_rdwr(dln2, xfer->tx_buf, xfer->rx_buf, @@ -679,29 +679,29 @@ static int dln2_spi_transfer_one(struct spi_master *master, static int dln2_spi_probe(struct platform_device *pdev) { - struct spi_master *master; + struct spi_controller *host; struct dln2_spi *dln2; struct dln2_platform_data *pdata = dev_get_platdata(&pdev->dev); struct device *dev = &pdev->dev; int ret; - master = spi_alloc_master(&pdev->dev, sizeof(*dln2)); - if (!master) + host = spi_alloc_host(&pdev->dev, sizeof(*dln2)); + if (!host) return -ENOMEM; - device_set_node(&master->dev, dev_fwnode(dev)); + device_set_node(&host->dev, dev_fwnode(dev)); - platform_set_drvdata(pdev, master); + platform_set_drvdata(pdev, host); - dln2 = spi_master_get_devdata(master); + dln2 = spi_controller_get_devdata(host); dln2->buf = devm_kmalloc(&pdev->dev, DLN2_SPI_BUF_SIZE, GFP_KERNEL); if (!dln2->buf) { ret = -ENOMEM; - goto exit_free_master; + goto exit_free_host; } - dln2->master = master; + dln2->host = host; dln2->pdev = pdev; dln2->port = pdata->port; /* cs/mode can never be 0xff, so the first transfer will set them */ @@ -712,47 +712,47 @@ static int dln2_spi_probe(struct platform_device *pdev) ret = dln2_spi_enable(dln2, false); if (ret < 0) { dev_err(&pdev->dev, "Failed to disable SPI module\n"); - goto exit_free_master; + goto exit_free_host; } - ret = dln2_spi_get_cs_num(dln2, &master->num_chipselect); + ret = dln2_spi_get_cs_num(dln2, &host->num_chipselect); if (ret < 0) { dev_err(&pdev->dev, "Failed to get number of CS pins\n"); - goto exit_free_master; + goto exit_free_host; } ret = dln2_spi_get_speed_range(dln2, - &master->min_speed_hz, - &master->max_speed_hz); + &host->min_speed_hz, + &host->max_speed_hz); if (ret < 0) { dev_err(&pdev->dev, "Failed to read bus min/max freqs\n"); - goto exit_free_master; + goto exit_free_host; } ret = dln2_spi_get_supported_frame_sizes(dln2, - &master->bits_per_word_mask); + &host->bits_per_word_mask); if (ret < 0) { dev_err(&pdev->dev, "Failed to read supported frame sizes\n"); - goto exit_free_master; + goto exit_free_host; } ret = dln2_spi_cs_enable_all(dln2, true); if (ret < 0) { dev_err(&pdev->dev, "Failed to enable CS pins\n"); - goto exit_free_master; + goto exit_free_host; } - master->bus_num = -1; - master->mode_bits = SPI_CPOL | SPI_CPHA; - master->prepare_message = dln2_spi_prepare_message; - master->transfer_one = dln2_spi_transfer_one; - master->auto_runtime_pm = true; + host->bus_num = -1; + host->mode_bits = SPI_CPOL | SPI_CPHA; + host->prepare_message = dln2_spi_prepare_message; + host->transfer_one = dln2_spi_transfer_one; + host->auto_runtime_pm = true; /* enable SPI module, we're good to go */ ret = dln2_spi_enable(dln2, true); if (ret < 0) { dev_err(&pdev->dev, "Failed to enable SPI module\n"); - goto exit_free_master; + goto exit_free_host; } pm_runtime_set_autosuspend_delay(&pdev->dev, @@ -761,9 +761,9 @@ static int dln2_spi_probe(struct platform_device *pdev) pm_runtime_set_active(&pdev->dev); pm_runtime_enable(&pdev->dev); - ret = devm_spi_register_master(&pdev->dev, master); + ret = devm_spi_register_controller(&pdev->dev, host); if (ret < 0) { - dev_err(&pdev->dev, "Failed to register master\n"); + dev_err(&pdev->dev, "Failed to register host\n"); goto exit_register; } @@ -775,16 +775,16 @@ exit_register: if (dln2_spi_enable(dln2, false) < 0) dev_err(&pdev->dev, "Failed to disable SPI module\n"); -exit_free_master: - spi_master_put(master); +exit_free_host: + spi_controller_put(host); return ret; } static void dln2_spi_remove(struct platform_device *pdev) { - struct spi_master *master = platform_get_drvdata(pdev); - struct dln2_spi *dln2 = spi_master_get_devdata(master); + struct spi_controller *host = platform_get_drvdata(pdev); + struct dln2_spi *dln2 = spi_controller_get_devdata(host); pm_runtime_disable(&pdev->dev); @@ -796,10 +796,10 @@ static void dln2_spi_remove(struct platform_device *pdev) static int dln2_spi_suspend(struct device *dev) { int ret; - struct spi_master *master = dev_get_drvdata(dev); - struct dln2_spi *dln2 = spi_master_get_devdata(master); + struct spi_controller *host = dev_get_drvdata(dev); + struct dln2_spi *dln2 = spi_controller_get_devdata(host); - ret = spi_master_suspend(master); + ret = spi_controller_suspend(host); if (ret < 0) return ret; @@ -824,8 +824,8 @@ static int dln2_spi_suspend(struct device *dev) static int dln2_spi_resume(struct device *dev) { int ret; - struct spi_master *master = dev_get_drvdata(dev); - struct dln2_spi *dln2 = spi_master_get_devdata(master); + struct spi_controller *host = dev_get_drvdata(dev); + struct dln2_spi *dln2 = spi_controller_get_devdata(host); if (!pm_runtime_suspended(dev)) { ret = dln2_spi_cs_enable_all(dln2, true); @@ -837,23 +837,23 @@ static int dln2_spi_resume(struct device *dev) return ret; } - return spi_master_resume(master); + return spi_controller_resume(host); } #endif /* CONFIG_PM_SLEEP */ #ifdef CONFIG_PM static int dln2_spi_runtime_suspend(struct device *dev) { - struct spi_master *master = dev_get_drvdata(dev); - struct dln2_spi *dln2 = spi_master_get_devdata(master); + struct spi_controller *host = dev_get_drvdata(dev); + struct dln2_spi *dln2 = spi_controller_get_devdata(host); return dln2_spi_enable(dln2, false); } static int dln2_spi_runtime_resume(struct device *dev) { - struct spi_master *master = dev_get_drvdata(dev); - struct dln2_spi *dln2 = spi_master_get_devdata(master); + struct spi_controller *host = dev_get_drvdata(dev); + struct dln2_spi *dln2 = spi_controller_get_devdata(host); return dln2_spi_enable(dln2, true); } @@ -875,7 +875,7 @@ static struct platform_driver spi_dln2_driver = { }; module_platform_driver(spi_dln2_driver); -MODULE_DESCRIPTION("Driver for the Diolan DLN2 SPI master interface"); +MODULE_DESCRIPTION("Driver for the Diolan DLN2 SPI host interface"); MODULE_AUTHOR("Laurentiu Palcu "); MODULE_LICENSE("GPL v2"); MODULE_ALIAS("platform:dln2-spi"); From eefc6c5c2451126c27f4098536d659d07635a1b1 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 28 Jul 2023 17:32:19 +0800 Subject: [PATCH 294/656] spi: dw: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230728093221.3312026-20-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-dw-core.c | 112 +++++++++++++++++++------------------- drivers/spi/spi-dw-dma.c | 22 ++++---- drivers/spi/spi-dw-mmio.c | 10 ++-- drivers/spi/spi-dw.h | 4 +- 4 files changed, 74 insertions(+), 74 deletions(-) diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c index 45f5acc26b1d..0274c9295514 100644 --- a/drivers/spi/spi-dw-core.c +++ b/drivers/spi/spi-dw-core.c @@ -61,7 +61,7 @@ static void dw_spi_debugfs_init(struct dw_spi *dws) { char name[32]; - snprintf(name, 32, "dw_spi%d", dws->master->bus_num); + snprintf(name, 32, "dw_spi%d", dws->host->bus_num); dws->debugfs = debugfs_create_dir(name, NULL); dws->regset.regs = dw_spi_dbgfs_regs; @@ -183,25 +183,25 @@ int dw_spi_check_status(struct dw_spi *dws, bool raw) irq_status = dw_readl(dws, DW_SPI_ISR); if (irq_status & DW_SPI_INT_RXOI) { - dev_err(&dws->master->dev, "RX FIFO overflow detected\n"); + dev_err(&dws->host->dev, "RX FIFO overflow detected\n"); ret = -EIO; } if (irq_status & DW_SPI_INT_RXUI) { - dev_err(&dws->master->dev, "RX FIFO underflow detected\n"); + dev_err(&dws->host->dev, "RX FIFO underflow detected\n"); ret = -EIO; } if (irq_status & DW_SPI_INT_TXOI) { - dev_err(&dws->master->dev, "TX FIFO overflow detected\n"); + dev_err(&dws->host->dev, "TX FIFO overflow detected\n"); ret = -EIO; } /* Generically handle the erroneous situation */ if (ret) { dw_spi_reset_chip(dws); - if (dws->master->cur_msg) - dws->master->cur_msg->status = ret; + if (dws->host->cur_msg) + dws->host->cur_msg->status = ret; } return ret; @@ -213,7 +213,7 @@ static irqreturn_t dw_spi_transfer_handler(struct dw_spi *dws) u16 irq_status = dw_readl(dws, DW_SPI_ISR); if (dw_spi_check_status(dws, false)) { - spi_finalize_current_transfer(dws->master); + spi_finalize_current_transfer(dws->host); return IRQ_HANDLED; } @@ -227,7 +227,7 @@ static irqreturn_t dw_spi_transfer_handler(struct dw_spi *dws) dw_reader(dws); if (!dws->rx_len) { dw_spi_mask_intr(dws, 0xff); - spi_finalize_current_transfer(dws->master); + spi_finalize_current_transfer(dws->host); } else if (dws->rx_len <= dw_readl(dws, DW_SPI_RXFTLR)) { dw_writel(dws, DW_SPI_RXFTLR, dws->rx_len - 1); } @@ -248,14 +248,14 @@ static irqreturn_t dw_spi_transfer_handler(struct dw_spi *dws) static irqreturn_t dw_spi_irq(int irq, void *dev_id) { - struct spi_controller *master = dev_id; - struct dw_spi *dws = spi_controller_get_devdata(master); + struct spi_controller *host = dev_id; + struct dw_spi *dws = spi_controller_get_devdata(host); u16 irq_status = dw_readl(dws, DW_SPI_ISR) & DW_SPI_INT_MASK; if (!irq_status) return IRQ_NONE; - if (!master->cur_msg) { + if (!host->cur_msg) { dw_spi_mask_intr(dws, 0xff); return IRQ_HANDLED; } @@ -408,11 +408,11 @@ static int dw_spi_poll_transfer(struct dw_spi *dws, return 0; } -static int dw_spi_transfer_one(struct spi_controller *master, +static int dw_spi_transfer_one(struct spi_controller *host, struct spi_device *spi, struct spi_transfer *transfer) { - struct dw_spi *dws = spi_controller_get_devdata(master); + struct dw_spi *dws = spi_controller_get_devdata(host); struct dw_spi_cfg cfg = { .tmode = DW_SPI_CTRLR0_TMOD_TR, .dfs = transfer->bits_per_word, @@ -440,8 +440,8 @@ static int dw_spi_transfer_one(struct spi_controller *master, transfer->effective_speed_hz = dws->current_freq; /* Check if current transfer is a DMA transaction */ - if (master->can_dma && master->can_dma(master, spi, transfer)) - dws->dma_mapped = master->cur_msg_mapped; + if (host->can_dma && host->can_dma(host, spi, transfer)) + dws->dma_mapped = host->cur_msg_mapped; /* For poll mode just disable all interrupts */ dw_spi_mask_intr(dws, 0xff); @@ -464,10 +464,10 @@ static int dw_spi_transfer_one(struct spi_controller *master, return 1; } -static void dw_spi_handle_err(struct spi_controller *master, +static void dw_spi_handle_err(struct spi_controller *host, struct spi_message *msg) { - struct dw_spi *dws = spi_controller_get_devdata(master); + struct dw_spi *dws = spi_controller_get_devdata(host); if (dws->dma_mapped) dws->dma_ops->dma_stop(dws); @@ -576,7 +576,7 @@ static int dw_spi_write_then_read(struct dw_spi *dws, struct spi_device *spi) while (len) { entries = readl_relaxed(dws->regs + DW_SPI_TXFLR); if (!entries) { - dev_err(&dws->master->dev, "CS de-assertion on Tx\n"); + dev_err(&dws->host->dev, "CS de-assertion on Tx\n"); return -EIO; } room = min(dws->fifo_len - entries, len); @@ -596,7 +596,7 @@ static int dw_spi_write_then_read(struct dw_spi *dws, struct spi_device *spi) if (!entries) { sts = readl_relaxed(dws->regs + DW_SPI_RISR); if (sts & DW_SPI_INT_RXOI) { - dev_err(&dws->master->dev, "FIFO overflow on Rx\n"); + dev_err(&dws->host->dev, "FIFO overflow on Rx\n"); return -EIO; } continue; @@ -637,7 +637,7 @@ static int dw_spi_wait_mem_op_done(struct dw_spi *dws) spi_delay_exec(&delay, NULL); if (retry < 0) { - dev_err(&dws->master->dev, "Mem op hanged up\n"); + dev_err(&dws->host->dev, "Mem op hanged up\n"); return -EIO; } @@ -884,56 +884,56 @@ static void dw_spi_hw_init(struct device *dev, struct dw_spi *dws) int dw_spi_add_host(struct device *dev, struct dw_spi *dws) { - struct spi_controller *master; + struct spi_controller *host; int ret; if (!dws) return -EINVAL; - master = spi_alloc_master(dev, 0); - if (!master) + host = spi_alloc_host(dev, 0); + if (!host) return -ENOMEM; - device_set_node(&master->dev, dev_fwnode(dev)); + device_set_node(&host->dev, dev_fwnode(dev)); - dws->master = master; + dws->host = host; dws->dma_addr = (dma_addr_t)(dws->paddr + DW_SPI_DR); - spi_controller_set_devdata(master, dws); + spi_controller_set_devdata(host, dws); /* Basic HW init */ dw_spi_hw_init(dev, dws); ret = request_irq(dws->irq, dw_spi_irq, IRQF_SHARED, dev_name(dev), - master); + host); if (ret < 0 && ret != -ENOTCONN) { dev_err(dev, "can not get IRQ\n"); - goto err_free_master; + goto err_free_host; } dw_spi_init_mem_ops(dws); - master->use_gpio_descriptors = true; - master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LOOP; + host->use_gpio_descriptors = true; + host->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LOOP; if (dws->caps & DW_SPI_CAP_DFS32) - master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32); + host->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32); else - master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 16); - master->bus_num = dws->bus_num; - master->num_chipselect = dws->num_cs; - master->setup = dw_spi_setup; - master->cleanup = dw_spi_cleanup; + host->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 16); + host->bus_num = dws->bus_num; + host->num_chipselect = dws->num_cs; + host->setup = dw_spi_setup; + host->cleanup = dw_spi_cleanup; if (dws->set_cs) - master->set_cs = dws->set_cs; + host->set_cs = dws->set_cs; else - master->set_cs = dw_spi_set_cs; - master->transfer_one = dw_spi_transfer_one; - master->handle_err = dw_spi_handle_err; + host->set_cs = dw_spi_set_cs; + host->transfer_one = dw_spi_transfer_one; + host->handle_err = dw_spi_handle_err; if (dws->mem_ops.exec_op) - master->mem_ops = &dws->mem_ops; - master->max_speed_hz = dws->max_freq; - master->flags = SPI_CONTROLLER_GPIO_SS; - master->auto_runtime_pm = true; + host->mem_ops = &dws->mem_ops; + host->max_speed_hz = dws->max_freq; + host->flags = SPI_CONTROLLER_GPIO_SS; + host->auto_runtime_pm = true; /* Get default rx sample delay */ device_property_read_u32(dev, "rx-sample-delay-ns", @@ -946,14 +946,14 @@ int dw_spi_add_host(struct device *dev, struct dw_spi *dws) } else if (ret) { dev_warn(dev, "DMA init failed\n"); } else { - master->can_dma = dws->dma_ops->can_dma; - master->flags |= SPI_CONTROLLER_MUST_TX; + host->can_dma = dws->dma_ops->can_dma; + host->flags |= SPI_CONTROLLER_MUST_TX; } } - ret = spi_register_controller(master); + ret = spi_register_controller(host); if (ret) { - dev_err_probe(dev, ret, "problem registering spi master\n"); + dev_err_probe(dev, ret, "problem registering spi host\n"); goto err_dma_exit; } @@ -965,9 +965,9 @@ err_dma_exit: dws->dma_ops->dma_exit(dws); dw_spi_enable_chip(dws, 0); err_free_irq: - free_irq(dws->irq, master); -err_free_master: - spi_controller_put(master); + free_irq(dws->irq, host); +err_free_host: + spi_controller_put(host); return ret; } EXPORT_SYMBOL_NS_GPL(dw_spi_add_host, SPI_DW_CORE); @@ -976,14 +976,14 @@ void dw_spi_remove_host(struct dw_spi *dws) { dw_spi_debugfs_remove(dws); - spi_unregister_controller(dws->master); + spi_unregister_controller(dws->host); if (dws->dma_ops && dws->dma_ops->dma_exit) dws->dma_ops->dma_exit(dws); dw_spi_shutdown_chip(dws); - free_irq(dws->irq, dws->master); + free_irq(dws->irq, dws->host); } EXPORT_SYMBOL_NS_GPL(dw_spi_remove_host, SPI_DW_CORE); @@ -991,7 +991,7 @@ int dw_spi_suspend_host(struct dw_spi *dws) { int ret; - ret = spi_controller_suspend(dws->master); + ret = spi_controller_suspend(dws->host); if (ret) return ret; @@ -1002,8 +1002,8 @@ EXPORT_SYMBOL_NS_GPL(dw_spi_suspend_host, SPI_DW_CORE); int dw_spi_resume_host(struct dw_spi *dws) { - dw_spi_hw_init(&dws->master->dev, dws); - return spi_controller_resume(dws->master); + dw_spi_hw_init(&dws->host->dev, dws); + return spi_controller_resume(dws->host); } EXPORT_SYMBOL_NS_GPL(dw_spi_resume_host, SPI_DW_CORE); diff --git a/drivers/spi/spi-dw-dma.c b/drivers/spi/spi-dw-dma.c index df819652901a..0ecbb6c36e23 100644 --- a/drivers/spi/spi-dw-dma.c +++ b/drivers/spi/spi-dw-dma.c @@ -139,8 +139,8 @@ static int dw_spi_dma_init_mfld(struct device *dev, struct dw_spi *dws) if (!dws->txchan) goto free_rxchan; - dws->master->dma_rx = dws->rxchan; - dws->master->dma_tx = dws->txchan; + dws->host->dma_rx = dws->rxchan; + dws->host->dma_tx = dws->txchan; init_completion(&dws->dma_completion); @@ -183,8 +183,8 @@ static int dw_spi_dma_init_generic(struct device *dev, struct dw_spi *dws) goto free_rxchan; } - dws->master->dma_rx = dws->rxchan; - dws->master->dma_tx = dws->txchan; + dws->host->dma_rx = dws->rxchan; + dws->host->dma_tx = dws->txchan; init_completion(&dws->dma_completion); @@ -242,10 +242,10 @@ static enum dma_slave_buswidth dw_spi_dma_convert_width(u8 n_bytes) } } -static bool dw_spi_can_dma(struct spi_controller *master, +static bool dw_spi_can_dma(struct spi_controller *host, struct spi_device *spi, struct spi_transfer *xfer) { - struct dw_spi *dws = spi_controller_get_devdata(master); + struct dw_spi *dws = spi_controller_get_devdata(host); enum dma_slave_buswidth dma_bus_width; if (xfer->len <= dws->fifo_len) @@ -271,7 +271,7 @@ static int dw_spi_dma_wait(struct dw_spi *dws, unsigned int len, u32 speed) msecs_to_jiffies(ms)); if (ms == 0) { - dev_err(&dws->master->cur_msg->spi->dev, + dev_err(&dws->host->cur_msg->spi->dev, "DMA transaction timed out\n"); return -ETIMEDOUT; } @@ -299,7 +299,7 @@ static int dw_spi_dma_wait_tx_done(struct dw_spi *dws, spi_delay_exec(&delay, xfer); if (retry < 0) { - dev_err(&dws->master->dev, "Tx hanged up\n"); + dev_err(&dws->host->dev, "Tx hanged up\n"); return -EIO; } @@ -400,7 +400,7 @@ static int dw_spi_dma_wait_rx_done(struct dw_spi *dws) spi_delay_exec(&delay, NULL); if (retry < 0) { - dev_err(&dws->master->dev, "Rx hanged up\n"); + dev_err(&dws->host->dev, "Rx hanged up\n"); return -EIO; } @@ -656,13 +656,13 @@ static int dw_spi_dma_transfer(struct dw_spi *dws, struct spi_transfer *xfer) if (ret) return ret; - if (dws->master->cur_msg->status == -EINPROGRESS) { + if (dws->host->cur_msg->status == -EINPROGRESS) { ret = dw_spi_dma_wait_tx_done(dws, xfer); if (ret) return ret; } - if (xfer->rx_buf && dws->master->cur_msg->status == -EINPROGRESS) + if (xfer->rx_buf && dws->host->cur_msg->status == -EINPROGRESS) ret = dw_spi_dma_wait_rx_done(dws); return ret; diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c index a963bc96c223..3a31ad74a538 100644 --- a/drivers/spi/spi-dw-mmio.c +++ b/drivers/spi/spi-dw-mmio.c @@ -68,7 +68,7 @@ struct dw_spi_mscc { ((((val) << 1) | BIT(0)) << ELBA_SPICS_OFFSET(cs)) /* - * The Designware SPI controller (referred to as master in the documentation) + * The Designware SPI controller (referred to as host in the documentation) * automatically deasserts chip select when the tx fifo is empty. The chip * selects then needs to be either driven as GPIOs or, for the first 4 using * the SPI boot controller registers. the final chip select is an OR gate @@ -76,7 +76,7 @@ struct dw_spi_mscc { */ static void dw_spi_mscc_set_cs(struct spi_device *spi, bool enable) { - struct dw_spi *dws = spi_master_get_devdata(spi->master); + struct dw_spi *dws = spi_controller_get_devdata(spi->controller); struct dw_spi_mmio *dwsmmio = container_of(dws, struct dw_spi_mmio, dws); struct dw_spi_mscc *dwsmscc = dwsmmio->priv; u32 cs = spi_get_chipselect(spi, 0); @@ -142,14 +142,14 @@ static int dw_spi_mscc_jaguar2_init(struct platform_device *pdev, } /* - * The Designware SPI controller (referred to as master in the + * The Designware SPI controller (referred to as host in the * documentation) automatically deasserts chip select when the tx fifo * is empty. The chip selects then needs to be driven by a CS override * register. enable is an active low signal. */ static void dw_spi_sparx5_set_cs(struct spi_device *spi, bool enable) { - struct dw_spi *dws = spi_master_get_devdata(spi->master); + struct dw_spi *dws = spi_controller_get_devdata(spi->controller); struct dw_spi_mmio *dwsmmio = container_of(dws, struct dw_spi_mmio, dws); struct dw_spi_mscc *dwsmscc = dwsmmio->priv; u8 cs = spi_get_chipselect(spi, 0); @@ -277,7 +277,7 @@ static void dw_spi_elba_override_cs(struct regmap *syscon, int cs, int enable) static void dw_spi_elba_set_cs(struct spi_device *spi, bool enable) { - struct dw_spi *dws = spi_master_get_devdata(spi->master); + struct dw_spi *dws = spi_controller_get_devdata(spi->controller); struct dw_spi_mmio *dwsmmio = container_of(dws, struct dw_spi_mmio, dws); struct regmap *syscon = dwsmmio->priv; u8 cs; diff --git a/drivers/spi/spi-dw.h b/drivers/spi/spi-dw.h index 3962e6dcf880..6cafeee8ee2a 100644 --- a/drivers/spi/spi-dw.h +++ b/drivers/spi/spi-dw.h @@ -142,14 +142,14 @@ struct dw_spi_dma_ops { int (*dma_init)(struct device *dev, struct dw_spi *dws); void (*dma_exit)(struct dw_spi *dws); int (*dma_setup)(struct dw_spi *dws, struct spi_transfer *xfer); - bool (*can_dma)(struct spi_controller *master, struct spi_device *spi, + bool (*can_dma)(struct spi_controller *host, struct spi_device *spi, struct spi_transfer *xfer); int (*dma_transfer)(struct dw_spi *dws, struct spi_transfer *xfer); void (*dma_stop)(struct dw_spi *dws); }; struct dw_spi { - struct spi_controller *master; + struct spi_controller *host; u32 ip; /* Synopsys DW SSI IP-core ID */ u32 ver; /* Synopsys component version */ From 9f5890466e93a7392c618e50de53cdd3a0dd1fd5 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 28 Jul 2023 17:32:20 +0800 Subject: [PATCH 295/656] spi: hisi-kunpeng: switch to use modern name Change legacy name master to modern name host. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230728093221.3312026-21-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-hisi-kunpeng.c | 82 +++++++++++++++++----------------- 1 file changed, 41 insertions(+), 41 deletions(-) diff --git a/drivers/spi/spi-hisi-kunpeng.c b/drivers/spi/spi-hisi-kunpeng.c index 2b4b3d2a22b8..35ef5e8e2ffd 100644 --- a/drivers/spi/spi-hisi-kunpeng.c +++ b/drivers/spi/spi-hisi-kunpeng.c @@ -164,10 +164,10 @@ static int hisi_spi_debugfs_init(struct hisi_spi *hs) { char name[32]; - struct spi_controller *master; + struct spi_controller *host; - master = container_of(hs->dev, struct spi_controller, dev); - snprintf(name, 32, "hisi_spi%d", master->bus_num); + host = container_of(hs->dev, struct spi_controller, dev); + snprintf(name, 32, "hisi_spi%d", host->bus_num); hs->debugfs = debugfs_create_dir(name, NULL); if (IS_ERR(hs->debugfs)) return -ENOMEM; @@ -291,18 +291,18 @@ static void __hisi_calc_div_reg(struct hisi_chip_data *chip) chip->div_post = (chip->clk_div / chip->div_pre) - 1; } -static u32 hisi_calc_effective_speed(struct spi_controller *master, +static u32 hisi_calc_effective_speed(struct spi_controller *host, struct hisi_chip_data *chip, u32 speed_hz) { u32 effective_speed; /* Note clock divider doesn't support odd numbers */ - chip->clk_div = DIV_ROUND_UP(master->max_speed_hz, speed_hz) + 1; + chip->clk_div = DIV_ROUND_UP(host->max_speed_hz, speed_hz) + 1; chip->clk_div &= 0xfffe; if (chip->clk_div > CLK_DIV_MAX) chip->clk_div = CLK_DIV_MAX; - effective_speed = master->max_speed_hz / chip->clk_div; + effective_speed = host->max_speed_hz / chip->clk_div; if (chip->speed_hz != effective_speed) { __hisi_calc_div_reg(chip); chip->speed_hz = effective_speed; @@ -336,20 +336,20 @@ static void hisi_spi_hw_init(struct hisi_spi *hs) static irqreturn_t hisi_spi_irq(int irq, void *dev_id) { - struct spi_controller *master = dev_id; - struct hisi_spi *hs = spi_controller_get_devdata(master); + struct spi_controller *host = dev_id; + struct hisi_spi *hs = spi_controller_get_devdata(host); u32 irq_status = readl(hs->regs + HISI_SPI_ISR) & ISR_MASK; if (!irq_status) return IRQ_NONE; - if (!master->cur_msg) + if (!host->cur_msg) return IRQ_HANDLED; /* Error handling */ if (irq_status & ISR_RXOF) { dev_err(hs->dev, "interrupt_transfer: fifo overflow\n"); - master->cur_msg->status = -EIO; + host->cur_msg->status = -EIO; goto finalize_transfer; } @@ -369,20 +369,20 @@ static irqreturn_t hisi_spi_irq(int irq, void *dev_id) finalize_transfer: hisi_spi_disable(hs); - spi_finalize_current_transfer(master); + spi_finalize_current_transfer(host); return IRQ_HANDLED; } -static int hisi_spi_transfer_one(struct spi_controller *master, +static int hisi_spi_transfer_one(struct spi_controller *host, struct spi_device *spi, struct spi_transfer *transfer) { - struct hisi_spi *hs = spi_controller_get_devdata(master); + struct hisi_spi *hs = spi_controller_get_devdata(host); struct hisi_chip_data *chip = spi_get_ctldata(spi); u32 cr = chip->cr; /* Update per transfer options for speed and bpw */ transfer->effective_speed_hz = - hisi_calc_effective_speed(master, chip, transfer->speed_hz); + hisi_calc_effective_speed(host, chip, transfer->speed_hz); cr |= FIELD_PREP(CR_DIV_PRE_MASK, chip->div_pre); cr |= FIELD_PREP(CR_DIV_POST_MASK, chip->div_post); cr |= FIELD_PREP(CR_BPW_MASK, transfer->bits_per_word - 1); @@ -409,10 +409,10 @@ static int hisi_spi_transfer_one(struct spi_controller *master, return 1; } -static void hisi_spi_handle_err(struct spi_controller *master, +static void hisi_spi_handle_err(struct spi_controller *host, struct spi_message *msg) { - struct hisi_spi *hs = spi_controller_get_devdata(master); + struct hisi_spi *hs = spi_controller_get_devdata(host); hisi_spi_disable(hs); @@ -452,7 +452,7 @@ static void hisi_spi_cleanup(struct spi_device *spi) static int hisi_spi_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; - struct spi_controller *master; + struct spi_controller *host; struct hisi_spi *hs; int ret, irq; @@ -460,13 +460,13 @@ static int hisi_spi_probe(struct platform_device *pdev) if (irq < 0) return irq; - master = devm_spi_alloc_master(dev, sizeof(*hs)); - if (!master) + host = devm_spi_alloc_host(dev, sizeof(*hs)); + if (!host) return -ENOMEM; - platform_set_drvdata(pdev, master); + platform_set_drvdata(pdev, host); - hs = spi_controller_get_devdata(master); + hs = spi_controller_get_devdata(host); hs->dev = dev; hs->irq = irq; @@ -474,9 +474,9 @@ static int hisi_spi_probe(struct platform_device *pdev) if (IS_ERR(hs->regs)) return PTR_ERR(hs->regs); - /* Specify maximum SPI clocking speed (master only) by firmware */ + /* Specify maximum SPI clocking speed (host only) by firmware */ ret = device_property_read_u32(dev, "spi-max-frequency", - &master->max_speed_hz); + &host->max_speed_hz); if (ret) { dev_err(dev, "failed to get max SPI clocking speed, ret=%d\n", ret); @@ -484,32 +484,32 @@ static int hisi_spi_probe(struct platform_device *pdev) } ret = device_property_read_u16(dev, "num-cs", - &master->num_chipselect); + &host->num_chipselect); if (ret) - master->num_chipselect = DEFAULT_NUM_CS; + host->num_chipselect = DEFAULT_NUM_CS; - master->use_gpio_descriptors = true; - master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LOOP; - master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32); - master->bus_num = pdev->id; - master->setup = hisi_spi_setup; - master->cleanup = hisi_spi_cleanup; - master->transfer_one = hisi_spi_transfer_one; - master->handle_err = hisi_spi_handle_err; - master->dev.fwnode = dev->fwnode; + host->use_gpio_descriptors = true; + host->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LOOP; + host->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32); + host->bus_num = pdev->id; + host->setup = hisi_spi_setup; + host->cleanup = hisi_spi_cleanup; + host->transfer_one = hisi_spi_transfer_one; + host->handle_err = hisi_spi_handle_err; + host->dev.fwnode = dev->fwnode; hisi_spi_hw_init(hs); ret = devm_request_irq(dev, hs->irq, hisi_spi_irq, 0, dev_name(dev), - master); + host); if (ret < 0) { dev_err(dev, "failed to get IRQ=%d, ret=%d\n", hs->irq, ret); return ret; } - ret = spi_register_controller(master); + ret = spi_register_controller(host); if (ret) { - dev_err(dev, "failed to register spi master, ret=%d\n", ret); + dev_err(dev, "failed to register spi host, ret=%d\n", ret); return ret; } @@ -518,18 +518,18 @@ static int hisi_spi_probe(struct platform_device *pdev) dev_info(dev, "hw version:0x%x max-freq:%u kHz\n", readl(hs->regs + HISI_SPI_VERSION), - master->max_speed_hz / 1000); + host->max_speed_hz / 1000); return 0; } static void hisi_spi_remove(struct platform_device *pdev) { - struct spi_controller *master = platform_get_drvdata(pdev); - struct hisi_spi *hs = spi_controller_get_devdata(master); + struct spi_controller *host = platform_get_drvdata(pdev); + struct hisi_spi *hs = spi_controller_get_devdata(host); debugfs_remove_recursive(hs->debugfs); - spi_unregister_controller(master); + spi_unregister_controller(host); } static const struct acpi_device_id hisi_spi_acpi_match[] = { From 1f6c80a74cd4686b5b0b9aed55d7195009c96330 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 28 Jul 2023 17:32:21 +0800 Subject: [PATCH 296/656] spi: npcm-fiu: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230728093221.3312026-22-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-npcm-fiu.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/spi/spi-npcm-fiu.c b/drivers/spi/spi-npcm-fiu.c index 9e8c914ff26c..0ca21ff0e9cc 100644 --- a/drivers/spi/spi-npcm-fiu.c +++ b/drivers/spi/spi-npcm-fiu.c @@ -287,7 +287,7 @@ static ssize_t npcm_fiu_direct_read(struct spi_mem_dirmap_desc *desc, u64 offs, size_t len, void *buf) { struct npcm_fiu_spi *fiu = - spi_controller_get_devdata(desc->mem->spi->master); + spi_controller_get_devdata(desc->mem->spi->controller); struct npcm_fiu_chip *chip = &fiu->chip[spi_get_chipselect(desc->mem->spi, 0)]; void __iomem *src = (void __iomem *)(chip->flash_region_mapped_ptr + offs); @@ -314,7 +314,7 @@ static ssize_t npcm_fiu_direct_write(struct spi_mem_dirmap_desc *desc, u64 offs, size_t len, const void *buf) { struct npcm_fiu_spi *fiu = - spi_controller_get_devdata(desc->mem->spi->master); + spi_controller_get_devdata(desc->mem->spi->controller); struct npcm_fiu_chip *chip = &fiu->chip[spi_get_chipselect(desc->mem->spi, 0)]; void __iomem *dst = (void __iomem *)(chip->flash_region_mapped_ptr + offs); @@ -335,7 +335,7 @@ static int npcm_fiu_uma_read(struct spi_mem *mem, bool is_address_size, u8 *data, u32 data_size) { struct npcm_fiu_spi *fiu = - spi_controller_get_devdata(mem->spi->master); + spi_controller_get_devdata(mem->spi->controller); u32 uma_cfg = BIT(10); u32 data_reg[4]; int ret; @@ -390,7 +390,7 @@ static int npcm_fiu_uma_write(struct spi_mem *mem, bool is_address_size, u8 *data, u32 data_size) { struct npcm_fiu_spi *fiu = - spi_controller_get_devdata(mem->spi->master); + spi_controller_get_devdata(mem->spi->controller); u32 uma_cfg = BIT(10); u32 data_reg[4] = {0}; u32 val; @@ -439,7 +439,7 @@ static int npcm_fiu_manualwrite(struct spi_mem *mem, const struct spi_mem_op *op) { struct npcm_fiu_spi *fiu = - spi_controller_get_devdata(mem->spi->master); + spi_controller_get_devdata(mem->spi->controller); u8 *data = (u8 *)op->data.buf.out; u32 num_data_chunks; u32 remain_data; @@ -544,7 +544,7 @@ static void npcm_fiux_set_direct_rd(struct npcm_fiu_spi *fiu) static int npcm_fiu_exec_op(struct spi_mem *mem, const struct spi_mem_op *op) { struct npcm_fiu_spi *fiu = - spi_controller_get_devdata(mem->spi->master); + spi_controller_get_devdata(mem->spi->controller); struct npcm_fiu_chip *chip = &fiu->chip[spi_get_chipselect(mem->spi, 0)]; int ret = 0; u8 *buf; @@ -604,7 +604,7 @@ static int npcm_fiu_exec_op(struct spi_mem *mem, const struct spi_mem_op *op) static int npcm_fiu_dirmap_create(struct spi_mem_dirmap_desc *desc) { struct npcm_fiu_spi *fiu = - spi_controller_get_devdata(desc->mem->spi->master); + spi_controller_get_devdata(desc->mem->spi->controller); struct npcm_fiu_chip *chip = &fiu->chip[spi_get_chipselect(desc->mem->spi, 0)]; struct regmap *gcr_regmap; @@ -665,7 +665,7 @@ static int npcm_fiu_dirmap_create(struct spi_mem_dirmap_desc *desc) static int npcm_fiu_setup(struct spi_device *spi) { - struct spi_controller *ctrl = spi->master; + struct spi_controller *ctrl = spi->controller; struct npcm_fiu_spi *fiu = spi_controller_get_devdata(ctrl); struct npcm_fiu_chip *chip; @@ -701,7 +701,7 @@ static int npcm_fiu_probe(struct platform_device *pdev) void __iomem *regbase; int id, ret; - ctrl = devm_spi_alloc_master(dev, sizeof(*fiu)); + ctrl = devm_spi_alloc_host(dev, sizeof(*fiu)); if (!ctrl) return -ENOMEM; @@ -755,7 +755,7 @@ static int npcm_fiu_probe(struct platform_device *pdev) ctrl->num_chipselect = fiu->info->max_cs; ctrl->dev.of_node = dev->of_node; - ret = devm_spi_register_master(dev, ctrl); + ret = devm_spi_register_controller(dev, ctrl); if (ret) clk_disable_unprepare(fiu->clk); From 3182d49aad5f1cd8acdcf7de0c5b651772edd32e Mon Sep 17 00:00:00 2001 From: Ruan Jinjie Date: Wed, 2 Aug 2023 17:43:57 +0800 Subject: [PATCH 297/656] spi: spi-zynq: Do not check for 0 return after calling platform_get_irq() It is not possible for platform_get_irq() to return 0. Use the return value from platform_get_irq(). Signed-off-by: Ruan Jinjie Link: https://lore.kernel.org/r/20230802094357.981100-1-ruanjinjie@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-zynq-qspi.c | 4 ++-- drivers/spi/spi-zynqmp-gqspi.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-zynq-qspi.c b/drivers/spi/spi-zynq-qspi.c index ee1995b91287..0db69a2a72ff 100644 --- a/drivers/spi/spi-zynq-qspi.c +++ b/drivers/spi/spi-zynq-qspi.c @@ -679,8 +679,8 @@ static int zynq_qspi_probe(struct platform_device *pdev) } xqspi->irq = platform_get_irq(pdev, 0); - if (xqspi->irq <= 0) { - ret = -ENXIO; + if (xqspi->irq < 0) { + ret = xqspi->irq; goto clk_dis_all; } ret = devm_request_irq(&pdev->dev, xqspi->irq, zynq_qspi_irq, diff --git a/drivers/spi/spi-zynqmp-gqspi.c b/drivers/spi/spi-zynqmp-gqspi.c index a6b892d01038..94d9a33d9af5 100644 --- a/drivers/spi/spi-zynqmp-gqspi.c +++ b/drivers/spi/spi-zynqmp-gqspi.c @@ -1293,8 +1293,8 @@ static int zynqmp_qspi_probe(struct platform_device *pdev) zynqmp_qspi_init_hw(xqspi); xqspi->irq = platform_get_irq(pdev, 0); - if (xqspi->irq <= 0) { - ret = -ENXIO; + if (xqspi->irq < 0) { + ret = xqspi->irq; goto clk_dis_all; } ret = devm_request_irq(&pdev->dev, xqspi->irq, zynqmp_qspi_irq, From 8102d64c04e8ead02c30bb07ff7dd5c41ed61bce Mon Sep 17 00:00:00 2001 From: Ruan Jinjie Date: Wed, 2 Aug 2023 17:32:38 +0800 Subject: [PATCH 298/656] spi: Do not check for 0 return after calling platform_get_irq() It is not possible for platform_get_irq() to return 0. Use the return value from platform_get_irq(). Signed-off-by: Ruan Jinjie Reviewed-by: Florian Fainelli # Link: https://lore.kernel.org/r/20230802093238.975906-1-ruanjinjie@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-axi-spi-engine.c | 4 ++-- drivers/spi/spi-bcm2835.c | 4 ++-- drivers/spi/spi-bcm2835aux.c | 4 ++-- drivers/spi/spi-cadence.c | 4 ++-- 4 files changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/spi/spi-axi-spi-engine.c b/drivers/spi/spi-axi-spi-engine.c index 89661f3b0d44..c3224b85bc79 100644 --- a/drivers/spi/spi-axi-spi-engine.c +++ b/drivers/spi/spi-axi-spi-engine.c @@ -470,8 +470,8 @@ static int spi_engine_probe(struct platform_device *pdev) int ret; irq = platform_get_irq(pdev, 0); - if (irq <= 0) - return -ENXIO; + if (irq < 0) + return irq; spi_engine = devm_kzalloc(&pdev->dev, sizeof(*spi_engine), GFP_KERNEL); if (!spi_engine) diff --git a/drivers/spi/spi-bcm2835.c b/drivers/spi/spi-bcm2835.c index c16abc2a9e9b..3f7f61ba66d5 100644 --- a/drivers/spi/spi-bcm2835.c +++ b/drivers/spi/spi-bcm2835.c @@ -1360,8 +1360,8 @@ static int bcm2835_spi_probe(struct platform_device *pdev) ctlr->max_speed_hz = clk_get_rate(bs->clk) / 2; bs->irq = platform_get_irq(pdev, 0); - if (bs->irq <= 0) - return bs->irq ? bs->irq : -ENODEV; + if (bs->irq < 0) + return bs->irq; err = clk_prepare_enable(bs->clk); if (err) diff --git a/drivers/spi/spi-bcm2835aux.c b/drivers/spi/spi-bcm2835aux.c index 8ace417c0a29..843dac847584 100644 --- a/drivers/spi/spi-bcm2835aux.c +++ b/drivers/spi/spi-bcm2835aux.c @@ -520,8 +520,8 @@ static int bcm2835aux_spi_probe(struct platform_device *pdev) } bs->irq = platform_get_irq(pdev, 0); - if (bs->irq <= 0) - return bs->irq ? bs->irq : -ENODEV; + if (bs->irq < 0) + return bs->irq; /* this also enables the HW block */ err = clk_prepare_enable(bs->clk); diff --git a/drivers/spi/spi-cadence.c b/drivers/spi/spi-cadence.c index 42f101d357c3..7b0136536cfb 100644 --- a/drivers/spi/spi-cadence.c +++ b/drivers/spi/spi-cadence.c @@ -627,8 +627,8 @@ static int cdns_spi_probe(struct platform_device *pdev) cdns_spi_init_hw(xspi, spi_controller_is_slave(ctlr)); irq = platform_get_irq(pdev, 0); - if (irq <= 0) { - ret = -ENXIO; + if (irq < 0) { + ret = irq; goto clk_dis_all; } From 1c75d749b5ebd2352cc72ed33d4fb522c624d974 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Mon, 7 Aug 2023 22:07:06 +0800 Subject: [PATCH 299/656] spi: cadence-quadspi: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230807140717.3484180-11-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-cadence-quadspi.c | 44 +++++++++++++++---------------- 1 file changed, 22 insertions(+), 22 deletions(-) diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c index 6064b8e0319e..b50db71ac4cc 100644 --- a/drivers/spi/spi-cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -67,7 +67,7 @@ struct cqspi_flash_pdata { struct cqspi_st { struct platform_device *pdev; - struct spi_master *master; + struct spi_controller *host; struct clk *clk; struct clk *clks[CLK_QSPI_NUM]; unsigned int sclk; @@ -1379,7 +1379,7 @@ static ssize_t cqspi_read(struct cqspi_flash_pdata *f_pdata, static int cqspi_mem_process(struct spi_mem *mem, const struct spi_mem_op *op) { - struct cqspi_st *cqspi = spi_master_get_devdata(mem->spi->master); + struct cqspi_st *cqspi = spi_controller_get_devdata(mem->spi->controller); struct cqspi_flash_pdata *f_pdata; f_pdata = &cqspi->f_pdata[spi_get_chipselect(mem->spi, 0)]; @@ -1585,7 +1585,7 @@ static int cqspi_request_mmap_dma(struct cqspi_st *cqspi) static const char *cqspi_get_name(struct spi_mem *mem) { - struct cqspi_st *cqspi = spi_master_get_devdata(mem->spi->master); + struct cqspi_st *cqspi = spi_controller_get_devdata(mem->spi->controller); struct device *dev = &cqspi->pdev->dev; return devm_kasprintf(dev, GFP_KERNEL, "%s.%d", dev_name(dev), @@ -1690,26 +1690,26 @@ static int cqspi_probe(struct platform_device *pdev) const struct cqspi_driver_platdata *ddata; struct reset_control *rstc, *rstc_ocp, *rstc_ref; struct device *dev = &pdev->dev; - struct spi_master *master; + struct spi_controller *host; struct resource *res_ahb; struct cqspi_st *cqspi; int ret; int irq; - master = devm_spi_alloc_master(&pdev->dev, sizeof(*cqspi)); - if (!master) { - dev_err(&pdev->dev, "spi_alloc_master failed\n"); + host = devm_spi_alloc_host(&pdev->dev, sizeof(*cqspi)); + if (!host) { + dev_err(&pdev->dev, "devm_spi_alloc_host failed\n"); return -ENOMEM; } - master->mode_bits = SPI_RX_QUAD | SPI_RX_DUAL; - master->mem_ops = &cqspi_mem_ops; - master->mem_caps = &cqspi_mem_caps; - master->dev.of_node = pdev->dev.of_node; + host->mode_bits = SPI_RX_QUAD | SPI_RX_DUAL; + host->mem_ops = &cqspi_mem_ops; + host->mem_caps = &cqspi_mem_caps; + host->dev.of_node = pdev->dev.of_node; - cqspi = spi_master_get_devdata(master); + cqspi = spi_controller_get_devdata(host); cqspi->pdev = pdev; - cqspi->master = master; + cqspi->host = host; cqspi->is_jh7110 = false; platform_set_drvdata(pdev, cqspi); @@ -1797,7 +1797,7 @@ static int cqspi_probe(struct platform_device *pdev) reset_control_deassert(rstc_ocp); cqspi->master_ref_clk_hz = clk_get_rate(cqspi->clk); - master->max_speed_hz = cqspi->master_ref_clk_hz; + host->max_speed_hz = cqspi->master_ref_clk_hz; /* write completion is supported by default */ cqspi->wr_completion = true; @@ -1808,7 +1808,7 @@ static int cqspi_probe(struct platform_device *pdev) cqspi->wr_delay = 50 * DIV_ROUND_UP(NSEC_PER_SEC, cqspi->master_ref_clk_hz); if (ddata->hwcaps_mask & CQSPI_SUPPORTS_OCTAL) - master->mode_bits |= SPI_RX_OCTAL | SPI_TX_OCTAL; + host->mode_bits |= SPI_RX_OCTAL | SPI_TX_OCTAL; if (!(ddata->quirks & CQSPI_DISABLE_DAC_MODE)) { cqspi->use_direct_mode = true; cqspi->use_direct_mode_wr = true; @@ -1848,7 +1848,7 @@ static int cqspi_probe(struct platform_device *pdev) cqspi->current_cs = -1; cqspi->sclk = 0; - master->num_chipselect = cqspi->num_chipselect; + host->num_chipselect = cqspi->num_chipselect; ret = cqspi_setup_flash(cqspi); if (ret) { @@ -1862,7 +1862,7 @@ static int cqspi_probe(struct platform_device *pdev) goto probe_setup_failed; } - ret = spi_register_master(master); + ret = spi_register_controller(host); if (ret) { dev_err(&pdev->dev, "failed to register SPI ctlr %d\n", ret); goto probe_setup_failed; @@ -1884,7 +1884,7 @@ static void cqspi_remove(struct platform_device *pdev) { struct cqspi_st *cqspi = platform_get_drvdata(pdev); - spi_unregister_master(cqspi->master); + spi_unregister_controller(cqspi->host); cqspi_controller_enable(cqspi, 0); if (cqspi->rx_chan) @@ -1902,10 +1902,10 @@ static void cqspi_remove(struct platform_device *pdev) static int cqspi_suspend(struct device *dev) { struct cqspi_st *cqspi = dev_get_drvdata(dev); - struct spi_master *master = dev_get_drvdata(dev); + struct spi_controller *host = dev_get_drvdata(dev); int ret; - ret = spi_master_suspend(master); + ret = spi_controller_suspend(host); cqspi_controller_enable(cqspi, 0); clk_disable_unprepare(cqspi->clk); @@ -1916,7 +1916,7 @@ static int cqspi_suspend(struct device *dev) static int cqspi_resume(struct device *dev) { struct cqspi_st *cqspi = dev_get_drvdata(dev); - struct spi_master *master = dev_get_drvdata(dev); + struct spi_controller *host = dev_get_drvdata(dev); clk_prepare_enable(cqspi->clk); cqspi_wait_idle(cqspi); @@ -1925,7 +1925,7 @@ static int cqspi_resume(struct device *dev) cqspi->current_cs = -1; cqspi->sclk = 0; - return spi_master_resume(master); + return spi_controller_resume(host); } static DEFINE_SIMPLE_DEV_PM_OPS(cqspi_dev_pm_ops, cqspi_suspend, cqspi_resume); From 4f5177458ba97734149897c5d4d44f85b8fe0348 Mon Sep 17 00:00:00 2001 From: Rajeshwar R Shinde Date: Mon, 7 Aug 2023 20:19:42 +0530 Subject: [PATCH 300/656] spi: spi-mpc52xx-psc: Fix an unsigned comparison that can never be negative In struct mpc52xx_psc_spi, the variable 'irq' is declared as an unsigned int. The comparison of variable 'irq' with signed int operand is incorrect. Also, the return value from the call to platform_get_irq(pdev,0) is int and it is assigned to an unsigned int variable 'irq', thus redeclaring the type of variable 'irq' to signed int. This fixes warning such as: drivers/spi/spi-mpc52xx-psc.c:332:5-13: WARNING: Unsigned expression compared with zero: mps -> irq < 0 Signed-off-by: Rajeshwar R Shinde Link: https://lore.kernel.org/r/20230807144942.30317-2-coolrrsh@gmail.com Signed-off-by: Mark Brown --- drivers/spi/spi-mpc52xx-psc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/spi-mpc52xx-psc.c b/drivers/spi/spi-mpc52xx-psc.c index 9a1a080fb688..795c08594a4d 100644 --- a/drivers/spi/spi-mpc52xx-psc.c +++ b/drivers/spi/spi-mpc52xx-psc.c @@ -29,7 +29,7 @@ struct mpc52xx_psc_spi { /* driver internal data */ struct mpc52xx_psc __iomem *psc; struct mpc52xx_psc_fifo __iomem *fifo; - unsigned int irq; + int irq; u8 bits_per_word; struct completion done; From 142c61a5fddeb755c420cb2e23b4bc0c0901308f Mon Sep 17 00:00:00 2001 From: Zhu Wang Date: Tue, 1 Aug 2023 21:54:42 +0800 Subject: [PATCH 301/656] spi: omap2-mcspi: remove redundant dev_err_probe() When platform_get_irq() is called, the error message has been printed, so it need not to call dev_err_probe() to print error, we remove the redundant platform_get_irq(). Signed-off-by: Zhu Wang Link: https://lore.kernel.org/r/20230801135442.255604-1-wangzhu9@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-omap2-mcspi.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c index 8331e247bf5c..e5cd82eb9e54 100644 --- a/drivers/spi/spi-omap2-mcspi.c +++ b/drivers/spi/spi-omap2-mcspi.c @@ -1508,10 +1508,8 @@ static int omap2_mcspi_probe(struct platform_device *pdev) } status = platform_get_irq(pdev, 0); - if (status < 0) { - dev_err_probe(&pdev->dev, status, "no irq resource found\n"); + if (status < 0) goto free_master; - } init_completion(&mcspi->txdone); status = devm_request_irq(&pdev->dev, status, omap2_mcspi_irq_handler, 0, pdev->name, From 0e19118ab24beea86dac16ce3c550c47d31f777d Mon Sep 17 00:00:00 2001 From: Jonas Gorski Date: Thu, 27 Jul 2023 09:08:06 +0200 Subject: [PATCH 302/656] dt-bindings: spi: convert spi-brcm63xx.txt to YAML Changes done during conversion: * added a description, lifting and adapting the limitation sentence from brcm,bcm63xx-hsspi.yml * added appropriate compatibles for all SoCs that are supported by bcm63xx/bmips Reviewed-by: Krzysztof Kozlowski Signed-off-by: Jonas Gorski Link: https://lore.kernel.org/r/20230727070806.12205-1-jonas.gorski@gmail.com Signed-off-by: Mark Brown --- .../bindings/spi/brcm,bcm63xx-spi.yaml | 71 +++++++++++++++++++ .../devicetree/bindings/spi/spi-bcm63xx.txt | 33 --------- MAINTAINERS | 2 +- 3 files changed, 72 insertions(+), 34 deletions(-) create mode 100644 Documentation/devicetree/bindings/spi/brcm,bcm63xx-spi.yaml delete mode 100644 Documentation/devicetree/bindings/spi/spi-bcm63xx.txt diff --git a/Documentation/devicetree/bindings/spi/brcm,bcm63xx-spi.yaml b/Documentation/devicetree/bindings/spi/brcm,bcm63xx-spi.yaml new file mode 100644 index 000000000000..fa03cdd68e70 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/brcm,bcm63xx-spi.yaml @@ -0,0 +1,71 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/brcm,bcm63xx-spi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom BCM6348/BCM6358 SPI controller + +maintainers: + - Jonas Gorski + +description: | + Broadcom "Low Speed" SPI controller found in many older MIPS based Broadband + SoCs. + + This controller has a limitation that can not keep the chip select line active + between the SPI transfers within the same SPI message. This can terminate the + transaction to some SPI devices prematurely. The issue can be worked around by + the controller's prepend mode. + +allOf: + - $ref: spi-controller.yaml# + +properties: + compatible: + oneOf: + - items: + - enum: + - brcm,bcm6368-spi + - brcm,bcm6362-spi + - brcm,bcm63268-spi + - const: brcm,bcm6358-spi + - enum: + - brcm,bcm6348-spi + - brcm,bcm6358-spi + + reg: + maxItems: 1 + + clocks: + items: + - description: SPI master reference clock + + clock-names: + items: + - const: spi + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + +unevaluatedProperties: false + +examples: + - | + spi@10000800 { + compatible = "brcm,bcm6368-spi", "brcm,bcm6358-spi"; + reg = <0x10000800 0x70c>; + interrupts = <1>; + clocks = <&clkctl 9>; + clock-names = "spi"; + num-cs = <5>; + #address-cells = <1>; + #size-cells = <0>; + }; diff --git a/Documentation/devicetree/bindings/spi/spi-bcm63xx.txt b/Documentation/devicetree/bindings/spi/spi-bcm63xx.txt deleted file mode 100644 index 1c16f6692613..000000000000 --- a/Documentation/devicetree/bindings/spi/spi-bcm63xx.txt +++ /dev/null @@ -1,33 +0,0 @@ -Binding for Broadcom BCM6348/BCM6358 SPI controller - -Required properties: -- compatible: must contain one of "brcm,bcm6348-spi", "brcm,bcm6358-spi". -- reg: Base address and size of the controllers memory area. -- interrupts: Interrupt for the SPI block. -- clocks: phandle of the SPI clock. -- clock-names: has to be "spi". -- #address-cells: <1>, as required by generic SPI binding. -- #size-cells: <0>, also as required by generic SPI binding. - -Optional properties: -- num-cs: some controllers have less than 8 cs signals. Defaults to 8 - if absent. - -Child nodes as per the generic SPI binding. - -Example: - - spi@10000800 { - compatible = "brcm,bcm6368-spi", "brcm,bcm6358-spi"; - reg = <0x10000800 0x70c>; - - interrupts = <1>; - - clocks = <&clkctl 9>; - clock-names = "spi"; - - num-cs = <5>; - - #address-cells = <1>; - #size-cells = <0>; - }; diff --git a/MAINTAINERS b/MAINTAINERS index 6578fabb936f..172b53e37080 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -4127,7 +4127,7 @@ BROADCOM BCM6348/BCM6358 SPI controller DRIVER M: Jonas Gorski L: linux-spi@vger.kernel.org S: Odd Fixes -F: Documentation/devicetree/bindings/spi/spi-bcm63xx.txt +F: Documentation/devicetree/bindings/spi/brcm,bcm63xx-spi.yaml F: drivers/spi/spi-bcm63xx.c BROADCOM ETHERNET PHY DRIVERS From 200ee464f7a9a4e8d7a51a2083b28cf240e7cb91 Mon Sep 17 00:00:00 2001 From: Ruan Jinjie Date: Mon, 7 Aug 2023 21:41:27 +0800 Subject: [PATCH 303/656] regulator: rpi-panel-attiny-regulator: Remove redundant of_match_ptr() The driver depends on CONFIG_OF, so it is not necessary to use of_match_ptr() here, and __maybe_unused can also be removed. Even for drivers that do not depend on CONFIG_OF, it's almost always better to leave out the of_match_ptr(), since the only thing it can possibly do is to save a few bytes of .text if a driver can be used both with and without it. Signed-off-by: Ruan Jinjie Link: https://lore.kernel.org/r/20230807134127.2380390-1-ruanjinjie@huawei.com Signed-off-by: Mark Brown --- drivers/regulator/rpi-panel-attiny-regulator.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/regulator/rpi-panel-attiny-regulator.c b/drivers/regulator/rpi-panel-attiny-regulator.c index e9719a378a0b..ed046cc998c6 100644 --- a/drivers/regulator/rpi-panel-attiny-regulator.c +++ b/drivers/regulator/rpi-panel-attiny-regulator.c @@ -397,7 +397,7 @@ static struct i2c_driver attiny_regulator_driver = { .driver = { .name = "rpi_touchscreen_attiny", .probe_type = PROBE_PREFER_ASYNCHRONOUS, - .of_match_table = of_match_ptr(attiny_dt_ids), + .of_match_table = attiny_dt_ids, }, .probe = attiny_i2c_probe, .remove = attiny_i2c_remove, From 2ca03ecc9c8556e913aef6f381154721dec4e44b Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Mon, 7 Aug 2023 09:16:21 +0900 Subject: [PATCH 304/656] spi: dw: Set default value if reg-io-width isn't specified According to the dt-bindings, the default value of reg-io-width is 4. However, the value becomes zero when reg-io-width isn't specified. Should set the actual value to dws->reg_io_width, considering it referenced. Signed-off-by: Kunihiko Hayashi Link: https://lore.kernel.org/r/20230807001621.196776-1-hayashi.kunihiko@socionext.com Signed-off-by: Mark Brown --- drivers/spi/spi-dw-mmio.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c index 3a31ad74a538..9e041a28ed47 100644 --- a/drivers/spi/spi-dw-mmio.c +++ b/drivers/spi/spi-dw-mmio.c @@ -369,7 +369,9 @@ static int dw_spi_mmio_probe(struct platform_device *pdev) dws->max_freq = clk_get_rate(dwsmmio->clk); - device_property_read_u32(&pdev->dev, "reg-io-width", &dws->reg_io_width); + if (device_property_read_u32(&pdev->dev, "reg-io-width", + &dws->reg_io_width)) + dws->reg_io_width = 4; num_cs = 4; From 9b966639b0cc742a9c4b6329a8e27128e4424cf1 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Tue, 8 Aug 2023 15:46:28 +0200 Subject: [PATCH 305/656] regulator: tps65910: Drop useless header The TPS65910 includes the legacy header for no reason, drop the include. Signed-off-by: Linus Walleij Link: https://lore.kernel.org/r/20230808-descriptors-regulator-v1-1-939b5e84dd18@linaro.org Signed-off-by: Mark Brown --- drivers/regulator/tps65910-regulator.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/regulator/tps65910-regulator.c b/drivers/regulator/tps65910-regulator.c index 2a0965ba1570..3a3027e0b94e 100644 --- a/drivers/regulator/tps65910-regulator.c +++ b/drivers/regulator/tps65910-regulator.c @@ -17,7 +17,6 @@ #include #include #include -#include #include #include From d0d58fe27b344fb6d0edb5fd2038372b5e5ed95b Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Tue, 8 Aug 2023 15:46:29 +0200 Subject: [PATCH 306/656] regulator: s2mpa01: Drop useless header The TPS65910 includes the legacy header for no reason, drop the include. Signed-off-by: Linus Walleij Link: https://lore.kernel.org/r/20230808-descriptors-regulator-v1-2-939b5e84dd18@linaro.org Signed-off-by: Mark Brown --- drivers/regulator/s2mpa01.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/regulator/s2mpa01.c b/drivers/regulator/s2mpa01.c index b147ff6a16b1..c22fdde67f9c 100644 --- a/drivers/regulator/s2mpa01.c +++ b/drivers/regulator/s2mpa01.c @@ -5,7 +5,6 @@ #include #include -#include #include #include #include From 052eff402fb754f3472833cb679ceef954ebf2a0 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Tue, 8 Aug 2023 15:46:30 +0200 Subject: [PATCH 307/656] regulator: rpi-panel-attiny: Drop useless header The RPI panel regulator driver includes the legacy header for no reason, this is a driver and is already included. Drop the include. Signed-off-by: Linus Walleij Link: https://lore.kernel.org/r/20230808-descriptors-regulator-v1-3-939b5e84dd18@linaro.org Signed-off-by: Mark Brown --- drivers/regulator/rpi-panel-attiny-regulator.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/regulator/rpi-panel-attiny-regulator.c b/drivers/regulator/rpi-panel-attiny-regulator.c index ed046cc998c6..f52c3d47ecea 100644 --- a/drivers/regulator/rpi-panel-attiny-regulator.c +++ b/drivers/regulator/rpi-panel-attiny-regulator.c @@ -7,7 +7,6 @@ #include #include -#include #include #include #include From 2f26d97863f05b83b8f7872aff81ecb9d6b76b50 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Tue, 8 Aug 2023 15:46:32 +0200 Subject: [PATCH 308/656] regulator: rc5t583: Drop useless header The RC5T583 includes the legacy header for no reason, drop the include. Signed-off-by: Linus Walleij Link: https://lore.kernel.org/r/20230808-descriptors-regulator-v1-5-939b5e84dd18@linaro.org Signed-off-by: Mark Brown --- drivers/regulator/rc5t583-regulator.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/regulator/rc5t583-regulator.c b/drivers/regulator/rc5t583-regulator.c index a5afca73715d..a25a141e86c4 100644 --- a/drivers/regulator/rc5t583-regulator.c +++ b/drivers/regulator/rc5t583-regulator.c @@ -16,7 +16,6 @@ #include #include #include -#include #include struct rc5t583_regulator_info { From 4eb351fb89d68efeaca3625dccbbf492f5450801 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Tue, 8 Aug 2023 15:46:33 +0200 Subject: [PATCH 309/656] regulator: mt6311: Drop useless header The mt6311 includes the legacy header for no reason, drop the include. Signed-off-by: Linus Walleij Link: https://lore.kernel.org/r/20230808-descriptors-regulator-v1-6-939b5e84dd18@linaro.org Signed-off-by: Mark Brown --- drivers/regulator/mt6311-regulator.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/regulator/mt6311-regulator.c b/drivers/regulator/mt6311-regulator.c index b0771770cc26..63a51485f2cc 100644 --- a/drivers/regulator/mt6311-regulator.c +++ b/drivers/regulator/mt6311-regulator.c @@ -4,7 +4,6 @@ // Author: Henry Chen #include -#include #include #include #include From 2e903eac35ec0ea1f44af5a53d87d98309295fc3 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Tue, 8 Aug 2023 15:46:34 +0200 Subject: [PATCH 310/656] regulator: mcp16502: Drop useless header The mcp16502 regulator driver includes the legacy header for no reason, it is already using the proper include. Drop the include. Signed-off-by: Linus Walleij Link: https://lore.kernel.org/r/20230808-descriptors-regulator-v1-7-939b5e84dd18@linaro.org Signed-off-by: Mark Brown --- drivers/regulator/mcp16502.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/regulator/mcp16502.c b/drivers/regulator/mcp16502.c index 6c6f5a21362b..7a472a2ef48a 100644 --- a/drivers/regulator/mcp16502.c +++ b/drivers/regulator/mcp16502.c @@ -8,7 +8,6 @@ // // Inspired from tps65086-regulator.c -#include #include #include #include From d150c73aa233d6469392282ef648dba5fd4b4821 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Tue, 8 Aug 2023 15:46:35 +0200 Subject: [PATCH 311/656] regulator: max20086: Drop useless header The max20086 regulator driver includes the legacy header for no reason, it is already using the proper include. Drop the include. Signed-off-by: Linus Walleij Link: https://lore.kernel.org/r/20230808-descriptors-regulator-v1-8-939b5e84dd18@linaro.org Signed-off-by: Mark Brown --- drivers/regulator/max20086-regulator.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/regulator/max20086-regulator.c b/drivers/regulator/max20086-regulator.c index fad31f5f435e..32f47b896fd1 100644 --- a/drivers/regulator/max20086-regulator.c +++ b/drivers/regulator/max20086-regulator.c @@ -6,7 +6,6 @@ // Copyright (C) 2018 Avnet, Inc. #include -#include #include #include #include From e4d48f64fcd469feeb09fc452f8cd1dfc00b43f6 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Tue, 8 Aug 2023 15:46:36 +0200 Subject: [PATCH 312/656] regulator: lp8755: Drop useless header The lp8755 includes the legacy header for no reason, drop the include. Signed-off-by: Linus Walleij Link: https://lore.kernel.org/r/20230808-descriptors-regulator-v1-9-939b5e84dd18@linaro.org Signed-off-by: Mark Brown --- drivers/regulator/lp8755.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/regulator/lp8755.c b/drivers/regulator/lp8755.c index 4bc310f972ed..8d01e18046f3 100644 --- a/drivers/regulator/lp8755.c +++ b/drivers/regulator/lp8755.c @@ -13,7 +13,6 @@ #include #include #include -#include #include #include #include From a5c9a1444088099c6d52939ed2f34049d5d00b5f Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Tue, 8 Aug 2023 15:46:37 +0200 Subject: [PATCH 313/656] regulator: bd71828: Drop useless header The bd71828 includes the legacy header for no reason, drop the include. The documentation mentions GPIO but there is no usage of the GPIO namespace. Signed-off-by: Linus Walleij Link: https://lore.kernel.org/r/20230808-descriptors-regulator-v1-10-939b5e84dd18@linaro.org Signed-off-by: Mark Brown --- drivers/regulator/bd71828-regulator.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/regulator/bd71828-regulator.c b/drivers/regulator/bd71828-regulator.c index f3205dc9d4fc..08d4ee369287 100644 --- a/drivers/regulator/bd71828-regulator.c +++ b/drivers/regulator/bd71828-regulator.c @@ -5,7 +5,6 @@ #include #include -#include #include #include #include From f321708da4db6b15a8691dc64b2d5169234937bc Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Tue, 8 Aug 2023 15:46:38 +0200 Subject: [PATCH 314/656] regulator: bd71815: Drop useless header The bd71815 regulator driver includes the legacy header for no reason, it is already using the proper include. Drop the include. Signed-off-by: Linus Walleij Link: https://lore.kernel.org/r/20230808-descriptors-regulator-v1-11-939b5e84dd18@linaro.org Signed-off-by: Mark Brown --- drivers/regulator/bd71815-regulator.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/regulator/bd71815-regulator.c b/drivers/regulator/bd71815-regulator.c index 475b1e0110e7..26192d55a685 100644 --- a/drivers/regulator/bd71815-regulator.c +++ b/drivers/regulator/bd71815-regulator.c @@ -18,7 +18,6 @@ #include #include #include -#include #include #include #include From e9ffb042c57705ea1b40276ab180d63fb6b52881 Mon Sep 17 00:00:00 2001 From: Ulf Hansson Date: Thu, 22 Jun 2023 12:53:27 +0200 Subject: [PATCH 315/656] mmc: meson-gx: Drop redundant WARN_ON() in the irq handler The host pointer is already being dereferenced earlier, so let's just drop the redundant WARN_ON. Signed-off-by: Ulf Hansson Acked-by: Martin Blumenstingl Link: https://lore.kernel.org/r/20230622105327.77296-1-ulf.hansson@linaro.org --- drivers/mmc/host/meson-gx-mmc.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/mmc/host/meson-gx-mmc.c b/drivers/mmc/host/meson-gx-mmc.c index ee9a25b900ae..d652374f37b2 100644 --- a/drivers/mmc/host/meson-gx-mmc.c +++ b/drivers/mmc/host/meson-gx-mmc.c @@ -948,9 +948,6 @@ static irqreturn_t meson_mmc_irq(int irq, void *dev_id) return IRQ_NONE; } - if (WARN_ON(!host)) - return IRQ_NONE; - /* ack all raised interrupts */ writel(status, host->regs + SD_EMMC_STATUS); From 2eb277c2f6b7cbbbeeffc89ae8b546a8b21f1b1f Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Wed, 28 Jun 2023 21:12:43 +0200 Subject: [PATCH 316/656] mmc: mmci: Improve ux500 debug prints To conclude the ux500 busy timeout fixes, this improves the debug and error prints so we can see a bit what is going on. Here is a typical dmesg with these new debug messages enabled: [ 2.648864] mmci-pl18x 80005000.mmc: mmc2: PL180 manf 80 rev4 at 0x80005000 irq 81,0 (pio) [ 2.662750] mmci-pl18x 80005000.mmc: DMA channels RX dma0chan4, TX dma0chan5 [ 3.480407] mmci-pl18x 80005000.mmc: no busy signalling in time CMD06 [ 3.487457] mmci-pl18x 80005000.mmc: no busy signalling in time CMD06 [ 3.998321] mmci-pl18x 80005000.mmc: timeout in state waiting for end IRQ waiting for busy CMD06 [ 3.998535] mmc2: new DDR MMC card at address 0001 [ 4.000030] mmcblk2: mmc2:0001 M4G1YC 3.69 GiB [ 4.008361] mmcblk2: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12 p13 p14 p15 p16 p17 p18 p19 p20 p21 p22 p23 p24 p25 [ 4.017700] mmcblk2boot0: mmc2:0001 M4G1YC 2.00 MiB [ 4.020477] mmcblk2boot1: mmc2:0001 M4G1YC 2.00 MiB [ 4.022125] mmcblk2rpmb: mmc2:0001 M4G1YC 128 KiB, chardev (246:0) [ 5.791381] mmci-pl18x 80005000.mmc: no busy signalling in time CMD06 [ 10.938568] mmci-pl18x 80005000.mmc: timeout in state waiting for end IRQ waiting for busy CMD06 [ 17.982849] mmci-pl18x 80005000.mmc: lost busy status when waiting for busy start IRQ CMD06 [ 18.683563] mmci-pl18x 80005000.mmc: no busy signalling in time CMD06 [ 19.385437] mmci-pl18x 80005000.mmc: no busy signalling in time CMD06 [ 20.493652] mmci-pl18x 80005000.mmc: no busy signalling in time CMD06 We see a lot of lost IRQs and the timeout always occur while waiting for the end IRQ, and then the busy status is *low* meaning the busy indication is already de-asserted. So busy signalling is missed in various ways for various reasons, sometimes it appears that IRQs are simply lost. One hypothesis is that this happens because the events happen so fast that they are transient, and since the MMCI state machine in effect is handling an edge trigger (rising or falling signal on DAT0) the internal logic will miss the event, because the state machine in the hardware is sampling the line, and will at times detect only the first event but miss the second, fireing only one IRQ. We print the second timeout error with dev_err() since it is pretty serious, the other events are so common and simple to handle that we can keep them at dev_dbg() level. Signed-off-by: Linus Walleij Link: https://lore.kernel.org/r/20230628191243.3632401-1-linus.walleij@linaro.org [Ulf: Fixup conflict in ux500_busy_timeout_work()] Signed-off-by: Ulf Hansson --- drivers/mmc/host/mmci.c | 39 +++++++++++++++++++++++++++++++-------- 1 file changed, 31 insertions(+), 8 deletions(-) diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index 769b34afa835..dda756a56379 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -764,7 +764,8 @@ static bool ux500_busy_complete(struct mmci_host *host, struct mmc_command *cmd, } retries--; } - dev_dbg(mmc_dev(host->mmc), "no busy signalling in time\n"); + dev_dbg(mmc_dev(host->mmc), + "no busy signalling in time CMD%02x\n", cmd->opcode); ux500_busy_clear_mask_done(host); break; @@ -786,7 +787,8 @@ static bool ux500_busy_complete(struct mmci_host *host, struct mmc_command *cmd, host->busy_state = MMCI_BUSY_WAITING_FOR_END_IRQ; } else { dev_dbg(mmc_dev(host->mmc), - "lost busy status when waiting for busy start IRQ\n"); + "lost busy status when waiting for busy start IRQ CMD%02x\n", + cmd->opcode); cancel_delayed_work(&host->ux500_busy_timeout_work); ux500_busy_clear_mask_done(host); } @@ -800,13 +802,14 @@ static bool ux500_busy_complete(struct mmci_host *host, struct mmc_command *cmd, ux500_busy_clear_mask_done(host); } else { dev_dbg(mmc_dev(host->mmc), - "busy status still asserted when handling busy end IRQ - will keep waiting\n"); + "busy status still asserted when handling busy end IRQ - will keep waiting CMD%02x\n", + cmd->opcode); } break; default: - dev_dbg(mmc_dev(host->mmc), "fell through on state %d\n", - host->busy_state); + dev_dbg(mmc_dev(host->mmc), "fell through on state %d, CMD%02x\n", + host->busy_state, cmd->opcode); break; } @@ -1533,6 +1536,20 @@ mmci_cmd_irq(struct mmci_host *host, struct mmc_command *cmd, } } +static char *ux500_state_str(struct mmci_host *host) +{ + switch (host->busy_state) { + case MMCI_BUSY_WAITING_FOR_START_IRQ: + return "waiting for start IRQ"; + case MMCI_BUSY_WAITING_FOR_END_IRQ: + return "waiting for end IRQ"; + case MMCI_BUSY_DONE: + return "not waiting for IRQs"; + default: + return "unknown"; + } +} + /* * This busy timeout worker is used to "kick" the command IRQ if a * busy detect IRQ fails to appear in reasonable time. Only used on @@ -1548,12 +1565,18 @@ static void ux500_busy_timeout_work(struct work_struct *work) spin_lock_irqsave(&host->lock, flags); if (host->cmd) { - dev_dbg(mmc_dev(host->mmc), "timeout waiting for busy IRQ\n"); - /* If we are still busy let's tag on a cmd-timeout error. */ status = readl(host->base + MMCISTATUS); - if (status & host->variant->busy_detect_flag) + if (status & host->variant->busy_detect_flag) { status |= MCI_CMDTIMEOUT; + dev_err(mmc_dev(host->mmc), + "timeout in state %s still busy with CMD%02x\n", + ux500_state_str(host), host->cmd->opcode); + } else { + dev_err(mmc_dev(host->mmc), + "timeout in state %s waiting for busy CMD%02x\n", + ux500_state_str(host), host->cmd->opcode); + } mmci_cmd_irq(host, host->cmd, status); } From c4a226e617e78f1d62644379303e764b23d2faf2 Mon Sep 17 00:00:00 2001 From: Frank Wunderlich Date: Thu, 29 Jun 2023 20:43:17 +0200 Subject: [PATCH 317/656] dt-bindings: mmc: mtk-sd: drop assigned-clocks/clock-parents MT7986 has 2 clock-parents and these properties are not needed in driver binding. So drop them completely. Signed-off-by: Frank Wunderlich Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20230629184318.551317-2-linux@fw-web.de Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/mtk-sd.yaml | 10 ---------- 1 file changed, 10 deletions(-) diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml index 46eefdd19a2c..3fffa467e4e1 100644 --- a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml @@ -91,16 +91,6 @@ properties: should switch dat1 pin to GPIO mode. maxItems: 1 - assigned-clocks: - description: - PLL of the source clock. - maxItems: 1 - - assigned-clock-parents: - description: - parent of source clock, used for HS400 mode to get 400Mhz source clock. - maxItems: 1 - hs400-ds-delay: $ref: /schemas/types.yaml#/definitions/uint32 description: From 74f45de394d979cc7770271f92fafa53e1ed3119 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Wed, 12 Jul 2023 16:00:11 +0200 Subject: [PATCH 318/656] mmc: renesas_sdhi: register irqs before registering controller IRQs should be ready to serve when we call mmc_add_host() via tmio_mmc_host_probe(). To achieve that, ensure that all irqs are masked before registering the handlers. Signed-off-by: Wolfram Sang Tested-by: Biju Das Reviewed-by: Geert Uytterhoeven Tested-by: Geert Uytterhoeven Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20230712140011.18602-1-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/renesas_sdhi_core.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c index 345934e4f59e..2d5ef9c37d76 100644 --- a/drivers/mmc/host/renesas_sdhi_core.c +++ b/drivers/mmc/host/renesas_sdhi_core.c @@ -1006,6 +1006,8 @@ int renesas_sdhi_probe(struct platform_device *pdev, host->sdcard_irq_setbit_mask = TMIO_STAT_ALWAYS_SET_27; host->sdcard_irq_mask_all = TMIO_MASK_ALL_RCAR2; host->reset = renesas_sdhi_reset; + } else { + host->sdcard_irq_mask_all = TMIO_MASK_ALL; } /* Orginally registers were 16 bit apart, could be 32 or 64 nowadays */ @@ -1100,9 +1102,7 @@ int renesas_sdhi_probe(struct platform_device *pdev, host->ops.hs400_complete = renesas_sdhi_hs400_complete; } - ret = tmio_mmc_host_probe(host); - if (ret < 0) - goto edisclk; + sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask_all); num_irqs = platform_irq_count(pdev); if (num_irqs < 0) { @@ -1129,6 +1129,10 @@ int renesas_sdhi_probe(struct platform_device *pdev, goto eirq; } + ret = tmio_mmc_host_probe(host); + if (ret < 0) + goto edisclk; + dev_info(&pdev->dev, "%s base at %pa, max clock rate %u MHz\n", mmc_hostname(host->mmc), &res->start, host->mmc->f_max / 1000000); From aed8530500f7b4bc2696482b0e9000902aa5b07a Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Wed, 12 Jul 2023 16:01:15 +0200 Subject: [PATCH 319/656] mmc: renesas_sdhi: remove outdated indentation Using tabs to make a structure initialization more readable is not considered helpful. Remove the final appearance from this driver. Signed-off-by: Wolfram Sang Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20230712140116.18718-1-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/renesas_sdhi_core.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c index 2d5ef9c37d76..10dbdb4abc93 100644 --- a/drivers/mmc/host/renesas_sdhi_core.c +++ b/drivers/mmc/host/renesas_sdhi_core.c @@ -983,12 +983,12 @@ int renesas_sdhi_probe(struct platform_device *pdev, } - host->write16_hook = renesas_sdhi_write16_hook; - host->clk_enable = renesas_sdhi_clk_enable; - host->clk_disable = renesas_sdhi_clk_disable; - host->set_clock = renesas_sdhi_set_clock; - host->multi_io_quirk = renesas_sdhi_multi_io_quirk; - host->dma_ops = dma_ops; + host->write16_hook = renesas_sdhi_write16_hook; + host->clk_enable = renesas_sdhi_clk_enable; + host->clk_disable = renesas_sdhi_clk_disable; + host->set_clock = renesas_sdhi_set_clock; + host->multi_io_quirk = renesas_sdhi_multi_io_quirk; + host->dma_ops = dma_ops; if (sdhi_has_quirk(priv, hs400_disabled)) host->mmc->caps2 &= ~(MMC_CAP2_HS400 | MMC_CAP2_HS400_ES); From a1a28ac1c095d3c084e24fcae3e0920b85dc47a0 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Tue, 4 Jul 2023 21:19:36 +0800 Subject: [PATCH 320/656] mmc: mxcmmc: Use devm_platform_get_and_ioremap_resource() Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Yangtao Li Link: https://lore.kernel.org/r/20230704131939.22562-1-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/mxcmmc.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/mmc/host/mxcmmc.c b/drivers/mmc/host/mxcmmc.c index 668f865f3efb..f3a72569dd1a 100644 --- a/drivers/mmc/host/mxcmmc.c +++ b/drivers/mmc/host/mxcmmc.c @@ -989,7 +989,6 @@ static int mxcmci_probe(struct platform_device *pdev) pr_info("i.MX/MPC512x SDHC driver\n"); - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); irq = platform_get_irq(pdev, 0); if (irq < 0) return irq; @@ -1000,7 +999,7 @@ static int mxcmci_probe(struct platform_device *pdev) host = mmc_priv(mmc); - host->base = devm_ioremap_resource(&pdev->dev, res); + host->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(host->base)) { ret = PTR_ERR(host->base); goto out_free; From 9a2fdd2e7d756e7c9ed7c4dca02221fed3e194f8 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Tue, 4 Jul 2023 21:19:37 +0800 Subject: [PATCH 321/656] mmc: omap_hsmmc: Use devm_platform_get_and_ioremap_resource() Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Yangtao Li Link: https://lore.kernel.org/r/20230704131939.22562-2-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/omap_hsmmc.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c index 1e0f2d7774bd..93de00a06aba 100644 --- a/drivers/mmc/host/omap_hsmmc.c +++ b/drivers/mmc/host/omap_hsmmc.c @@ -1790,14 +1790,11 @@ static int omap_hsmmc_probe(struct platform_device *pdev) return -ENXIO; } - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) - return -ENXIO; irq = platform_get_irq(pdev, 0); if (irq < 0) return irq; - base = devm_ioremap_resource(&pdev->dev, res); + base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(base)) return PTR_ERR(base); From c89a869b67dc6c22e1d967df7bd6826fc81413a5 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Tue, 4 Jul 2023 21:19:38 +0800 Subject: [PATCH 322/656] mmc: pxamci: Use devm_platform_get_and_ioremap_resource() Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Yangtao Li Link: https://lore.kernel.org/r/20230704131939.22562-3-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/pxamci.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/host/pxamci.c b/drivers/mmc/host/pxamci.c index 2a988f942b6c..1142cd2368f6 100644 --- a/drivers/mmc/host/pxamci.c +++ b/drivers/mmc/host/pxamci.c @@ -612,7 +612,6 @@ static int pxamci_probe(struct platform_device *pdev) struct resource *r; int ret, irq; - r = platform_get_resource(pdev, IORESOURCE_MEM, 0); irq = platform_get_irq(pdev, 0); if (irq < 0) return irq; @@ -685,14 +684,14 @@ static int pxamci_probe(struct platform_device *pdev) } spin_lock_init(&host->lock); - host->res = r; host->imask = MMC_I_MASK_ALL; - host->base = devm_ioremap_resource(dev, r); + host->base = devm_platform_get_and_ioremap_resource(pdev, 0, &r); if (IS_ERR(host->base)) { ret = PTR_ERR(host->base); goto out; } + host->res = r; /* * Ensure that the host controller is shut down, and setup From de2067448d0ece6b774026cc05dcb6d4ebfd1e1a Mon Sep 17 00:00:00 2001 From: Julien Delbergue Date: Thu, 13 Jul 2023 11:31:08 +0200 Subject: [PATCH 323/656] mmc: davinci: Make SDIO irq truly optional The following error is printed on Logic PD's DA850 EVM: davinci_mmc 1c40000.mmc: error -ENXIO: IRQ index 1 not found Depending on the board, the SDIO interrupt may not be present, so use the correct function to reflect that and prevent logging an error. Signed-off-by: Julien Delbergue Acked-by: Bartosz Golaszewski Link: https://lore.kernel.org/r/8b57db8d-1d3a-883e-eb8f-ddf15f19d823@gmail.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/davinci_mmc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/host/davinci_mmc.c b/drivers/mmc/host/davinci_mmc.c index 7138dfa065bf..fb686c0d171c 100644 --- a/drivers/mmc/host/davinci_mmc.c +++ b/drivers/mmc/host/davinci_mmc.c @@ -1257,7 +1257,7 @@ static int davinci_mmcsd_probe(struct platform_device *pdev) host->use_dma = use_dma; host->mmc_irq = irq; - host->sdio_irq = platform_get_irq(pdev, 1); + host->sdio_irq = platform_get_irq_optional(pdev, 1); if (host->use_dma) { ret = davinci_acquire_dma_channels(host); From a5d8de1cb7e1d1404b3009937186a82834cedd1f Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Wed, 12 Jul 2023 16:13:27 +0200 Subject: [PATCH 324/656] mmc: uniphier-sd: register irqs before registering controller IRQs should be ready to serve when we call mmc_add_host() via tmio_mmc_host_probe(). To achieve that, ensure that all irqs are masked before registering the handlers. Signed-off-by: Wolfram Sang Link: https://lore.kernel.org/r/20230712141327.20827-1-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/uniphier-sd.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/mmc/host/uniphier-sd.c b/drivers/mmc/host/uniphier-sd.c index 61acd69fac0e..4dc079f74c1b 100644 --- a/drivers/mmc/host/uniphier-sd.c +++ b/drivers/mmc/host/uniphier-sd.c @@ -706,19 +706,19 @@ static int uniphier_sd_probe(struct platform_device *pdev) tmio_data->max_segs = 1; tmio_data->max_blk_count = U16_MAX; - ret = tmio_mmc_host_probe(host); - if (ret) - goto disable_clk; + sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, TMIO_MASK_ALL); ret = devm_request_irq(dev, irq, tmio_mmc_irq, IRQF_SHARED, dev_name(dev), host); if (ret) - goto remove_host; + goto disable_clk; + + ret = tmio_mmc_host_probe(host); + if (ret) + goto disable_clk; return 0; -remove_host: - tmio_mmc_host_remove(host); disable_clk: uniphier_sd_clk_disable(host); free_host: From c62da8a8a9872039ff3751d65a7f7b101a81cdcd Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Tue, 18 Jul 2023 08:30:52 -0600 Subject: [PATCH 325/656] mmc: Explicitly include correct DT includes The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring Acked-by: Adrian Hunter Link: https://lore.kernel.org/r/20230718143054.1065288-1-robh@kernel.org Signed-off-by: Ulf Hansson --- drivers/mmc/host/atmel-mci.c | 1 - drivers/mmc/host/cavium-octeon.c | 2 ++ drivers/mmc/host/cavium-thunderx.c | 1 + drivers/mmc/host/davinci_mmc.c | 1 - drivers/mmc/host/meson-gx-mmc.c | 2 +- drivers/mmc/host/mtk-sd.c | 4 +--- drivers/mmc/host/mxcmmc.c | 1 - drivers/mmc/host/mxs-mmc.c | 1 - drivers/mmc/host/owl-mmc.c | 3 ++- drivers/mmc/host/pxamci.c | 1 - drivers/mmc/host/renesas_sdhi_internal_dmac.c | 3 ++- drivers/mmc/host/renesas_sdhi_sys_dmac.c | 3 ++- drivers/mmc/host/sdhci-bcm-kona.c | 1 - drivers/mmc/host/sdhci-cadence.c | 2 +- drivers/mmc/host/sdhci-esdhc-imx.c | 2 +- drivers/mmc/host/sdhci-iproc.c | 2 +- drivers/mmc/host/sdhci-msm.c | 2 +- drivers/mmc/host/sdhci-of-arasan.c | 4 ++-- drivers/mmc/host/sdhci-of-at91.c | 2 +- drivers/mmc/host/sdhci-of-dwcmshc.c | 2 +- drivers/mmc/host/sdhci-of-sparx5.c | 2 +- drivers/mmc/host/sdhci-omap.c | 1 - drivers/mmc/host/sdhci-pxav2.c | 1 - drivers/mmc/host/sdhci-s3c.c | 1 - drivers/mmc/host/sdhci-sprd.c | 1 - drivers/mmc/host/sdhci-tegra.c | 1 - drivers/mmc/host/sh_mmcif.c | 1 - drivers/mmc/host/uniphier-sd.c | 1 - drivers/mmc/host/wmt-sdmmc.c | 1 - 29 files changed, 20 insertions(+), 30 deletions(-) diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c index dd18440a90c5..2fdf352b3d86 100644 --- a/drivers/mmc/host/atmel-mci.c +++ b/drivers/mmc/host/atmel-mci.c @@ -18,7 +18,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/mmc/host/cavium-octeon.c b/drivers/mmc/host/cavium-octeon.c index 12dca91a8ef6..02429f7afb42 100644 --- a/drivers/mmc/host/cavium-octeon.c +++ b/drivers/mmc/host/cavium-octeon.c @@ -13,7 +13,9 @@ #include #include #include +#include #include +#include #include #include "cavium.h" diff --git a/drivers/mmc/host/cavium-thunderx.c b/drivers/mmc/host/cavium-thunderx.c index 202b1d6da678..2e2ff984f0b3 100644 --- a/drivers/mmc/host/cavium-thunderx.c +++ b/drivers/mmc/host/cavium-thunderx.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include "cavium.h" diff --git a/drivers/mmc/host/davinci_mmc.c b/drivers/mmc/host/davinci_mmc.c index fb686c0d171c..9e99de1206ef 100644 --- a/drivers/mmc/host/davinci_mmc.c +++ b/drivers/mmc/host/davinci_mmc.c @@ -21,7 +21,6 @@ #include #include #include -#include #include #include diff --git a/drivers/mmc/host/meson-gx-mmc.c b/drivers/mmc/host/meson-gx-mmc.c index d652374f37b2..49e3d1418902 100644 --- a/drivers/mmc/host/meson-gx-mmc.c +++ b/drivers/mmc/host/meson-gx-mmc.c @@ -11,7 +11,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c index 02403ff99e0d..6c68c642ef61 100644 --- a/drivers/mmc/host/mtk-sd.c +++ b/drivers/mmc/host/mtk-sd.c @@ -12,9 +12,7 @@ #include #include #include -#include -#include -#include +#include #include #include #include diff --git a/drivers/mmc/host/mxcmmc.c b/drivers/mmc/host/mxcmmc.c index f3a72569dd1a..9b6bdc1b0758 100644 --- a/drivers/mmc/host/mxcmmc.c +++ b/drivers/mmc/host/mxcmmc.c @@ -31,7 +31,6 @@ #include #include #include -#include #include #include diff --git a/drivers/mmc/host/mxs-mmc.c b/drivers/mmc/host/mxs-mmc.c index 8c3655d3be96..951c6c48b4f7 100644 --- a/drivers/mmc/host/mxs-mmc.c +++ b/drivers/mmc/host/mxs-mmc.c @@ -11,7 +11,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/mmc/host/owl-mmc.c b/drivers/mmc/host/owl-mmc.c index 1bf22b08b373..62d2993573d0 100644 --- a/drivers/mmc/host/owl-mmc.c +++ b/drivers/mmc/host/owl-mmc.c @@ -16,8 +16,9 @@ #include #include #include +#include #include -#include +#include #include #include diff --git a/drivers/mmc/host/pxamci.c b/drivers/mmc/host/pxamci.c index 1142cd2368f6..bd53b17efe12 100644 --- a/drivers/mmc/host/pxamci.c +++ b/drivers/mmc/host/pxamci.c @@ -30,7 +30,6 @@ #include #include #include -#include #include #include diff --git a/drivers/mmc/host/renesas_sdhi_internal_dmac.c b/drivers/mmc/host/renesas_sdhi_internal_dmac.c index 9ab813903b2c..4cc5bcb3213a 100644 --- a/drivers/mmc/host/renesas_sdhi_internal_dmac.c +++ b/drivers/mmc/host/renesas_sdhi_internal_dmac.c @@ -15,7 +15,8 @@ #include #include #include -#include +#include +#include #include #include #include diff --git a/drivers/mmc/host/renesas_sdhi_sys_dmac.c b/drivers/mmc/host/renesas_sdhi_sys_dmac.c index b559ad38b667..452982e670d2 100644 --- a/drivers/mmc/host/renesas_sdhi_sys_dmac.c +++ b/drivers/mmc/host/renesas_sdhi_sys_dmac.c @@ -15,7 +15,8 @@ #include #include #include -#include +#include +#include #include #include #include diff --git a/drivers/mmc/host/sdhci-bcm-kona.c b/drivers/mmc/host/sdhci-bcm-kona.c index 6a93a54fe067..ef1fb383e1e7 100644 --- a/drivers/mmc/host/sdhci-bcm-kona.c +++ b/drivers/mmc/host/sdhci-bcm-kona.c @@ -11,7 +11,6 @@ #include #include #include -#include #include #include "sdhci-pltfm.h" diff --git a/drivers/mmc/host/sdhci-cadence.c b/drivers/mmc/host/sdhci-cadence.c index d2f625054689..25d9849ef0d1 100644 --- a/drivers/mmc/host/sdhci-cadence.c +++ b/drivers/mmc/host/sdhci-cadence.c @@ -11,7 +11,7 @@ #include #include #include -#include +#include #include #include "sdhci-pltfm.h" diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index eebf94604a7f..e767fe058023 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -22,7 +22,7 @@ #include #include #include -#include +#include #include #include #include "sdhci-cqhci.h" diff --git a/drivers/mmc/host/sdhci-iproc.c b/drivers/mmc/host/sdhci-iproc.c index 86eb0045515e..6a93b1ee0b30 100644 --- a/drivers/mmc/host/sdhci-iproc.c +++ b/drivers/mmc/host/sdhci-iproc.c @@ -10,7 +10,7 @@ #include #include #include -#include +#include #include "sdhci-pltfm.h" struct sdhci_iproc_data { diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c index 1c935b5bafe1..c0ce187e740a 100644 --- a/drivers/mmc/host/sdhci-msm.c +++ b/drivers/mmc/host/sdhci-msm.c @@ -6,7 +6,6 @@ */ #include -#include #include #include #include @@ -15,6 +14,7 @@ #include #include #include +#include #include #include diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c index 294dd605fd2b..2f9de2518942 100644 --- a/drivers/mmc/host/sdhci-of-arasan.c +++ b/drivers/mmc/host/sdhci-of-arasan.c @@ -18,11 +18,11 @@ #include #include #include -#include +#include +#include #include #include #include -#include #include #include "cqhci.h" diff --git a/drivers/mmc/host/sdhci-of-at91.c b/drivers/mmc/host/sdhci-of-at91.c index cd0134580a90..808307a211f2 100644 --- a/drivers/mmc/host/sdhci-of-at91.c +++ b/drivers/mmc/host/sdhci-of-at91.c @@ -17,7 +17,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c index e68cd87998c8..55e1e2d0494d 100644 --- a/drivers/mmc/host/sdhci-of-dwcmshc.c +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c @@ -14,7 +14,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/mmc/host/sdhci-of-sparx5.c b/drivers/mmc/host/sdhci-of-sparx5.c index 28e4ee69e100..2e983cf49bc6 100644 --- a/drivers/mmc/host/sdhci-of-sparx5.c +++ b/drivers/mmc/host/sdhci-of-sparx5.c @@ -13,9 +13,9 @@ #include #include #include -#include #include #include +#include #include "sdhci-pltfm.h" diff --git a/drivers/mmc/host/sdhci-omap.c b/drivers/mmc/host/sdhci-omap.c index 8ed9256b83da..2593e3fbd0d9 100644 --- a/drivers/mmc/host/sdhci-omap.c +++ b/drivers/mmc/host/sdhci-omap.c @@ -11,7 +11,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/mmc/host/sdhci-pxav2.c b/drivers/mmc/host/sdhci-pxav2.c index 91aca8f8d6ef..86b60b0447b3 100644 --- a/drivers/mmc/host/sdhci-pxav2.c +++ b/drivers/mmc/host/sdhci-pxav2.c @@ -19,7 +19,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c index 504015e84308..6245fb4584fe 100644 --- a/drivers/mmc/host/sdhci-s3c.c +++ b/drivers/mmc/host/sdhci-s3c.c @@ -20,7 +20,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/mmc/host/sdhci-sprd.c b/drivers/mmc/host/sdhci-sprd.c index 7f4ee2e12735..a21d6524d7ca 100644 --- a/drivers/mmc/host/sdhci-sprd.c +++ b/drivers/mmc/host/sdhci-sprd.c @@ -11,7 +11,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c index bff084f178c9..1e1eac953691 100644 --- a/drivers/mmc/host/sdhci-tegra.c +++ b/drivers/mmc/host/sdhci-tegra.c @@ -19,7 +19,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/mmc/host/sh_mmcif.c b/drivers/mmc/host/sh_mmcif.c index 5cf53348372a..838dab179724 100644 --- a/drivers/mmc/host/sh_mmcif.c +++ b/drivers/mmc/host/sh_mmcif.c @@ -46,7 +46,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/mmc/host/uniphier-sd.c b/drivers/mmc/host/uniphier-sd.c index 4dc079f74c1b..b50cda4a9635 100644 --- a/drivers/mmc/host/uniphier-sd.c +++ b/drivers/mmc/host/uniphier-sd.c @@ -13,7 +13,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/mmc/host/wmt-sdmmc.c b/drivers/mmc/host/wmt-sdmmc.c index 68525d900046..f860f363be56 100644 --- a/drivers/mmc/host/wmt-sdmmc.c +++ b/drivers/mmc/host/wmt-sdmmc.c @@ -21,7 +21,6 @@ #include #include #include -#include #include #include From 9e4f4fe5ec1a7d6df5eceae0da33c24b753e34d0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Thomas=20Wei=C3=9Fschuh?= Date: Tue, 25 Jul 2023 16:17:25 +0200 Subject: [PATCH 326/656] mmc: core: propagate removable attribute to driver core MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Userspace can use this to distinguish hotpluggable mmc devices such as sdcards from non-hotpluggable ones such as eMMC. One example is the lsblk tool from util-linux. Note that dev_set_removable() is not related to GENHD_FL_REMOVABLE which is not applicable as per the comment in drivers/mmc/core/block.c Link: https://github.com/util-linux/util-linux/issues/2379 Signed-off-by: Thomas Weißschuh Reviewed-by: Avri Altman Link: https://lore.kernel.org/r/20230725-mmc-removable-v1-1-b2e0c4f18e6d@weissschuh.net Signed-off-by: Ulf Hansson --- drivers/mmc/core/bus.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/mmc/core/bus.c b/drivers/mmc/core/bus.c index 2c3074a605fc..0af96548e7da 100644 --- a/drivers/mmc/core/bus.c +++ b/drivers/mmc/core/bus.c @@ -310,6 +310,9 @@ int mmc_add_card(struct mmc_card *card) dev_set_name(&card->dev, "%s:%04x", mmc_hostname(card->host), card->rca); + dev_set_removable(&card->dev, + mmc_card_is_removable(card->host) ? + DEVICE_REMOVABLE : DEVICE_FIXED); switch (card->type) { case MMC_TYPE_MMC: From 90ecc29a09d5113a54d09053a019d4236ca685ca Mon Sep 17 00:00:00 2001 From: Varshini Rajendran Date: Fri, 28 Jul 2023 15:56:16 +0530 Subject: [PATCH 327/656] dt-bindings: sdhci-of-at91: add microchip,sam9x7-sdhci Add microchip,sam9x7-sdhci to DT bindings documentation. Signed-off-by: Varshini Rajendran Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230728102616.266235-1-varshini.rajendran@microchip.com Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/sdhci-atmel.txt | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mmc/sdhci-atmel.txt b/Documentation/devicetree/bindings/mmc/sdhci-atmel.txt index 69edfd4d3922..a9fb0a91245f 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-atmel.txt +++ b/Documentation/devicetree/bindings/mmc/sdhci-atmel.txt @@ -5,11 +5,13 @@ Documentation/devicetree/bindings/mmc/mmc.txt and the properties used by the sdhci-of-at91 driver. Required properties: -- compatible: Must be "atmel,sama5d2-sdhci" or "microchip,sam9x60-sdhci". +- compatible: Must be "atmel,sama5d2-sdhci" or "microchip,sam9x60-sdhci" + or "microchip,sam9x7-sdhci", "microchip,sam9x60-sdhci". - clocks: Phandlers to the clocks. - clock-names: Must be "hclock", "multclk", "baseclk" for "atmel,sama5d2-sdhci". Must be "hclock", "multclk" for "microchip,sam9x60-sdhci". + Must be "hclock", "multclk" for "microchip,sam9x7-sdhci". Optional properties: - assigned-clocks: The same with "multclk". From aa857326a454814478b8e7c52caeee1743d92e0d Mon Sep 17 00:00:00 2001 From: Li Zetao Date: Wed, 2 Aug 2023 17:40:28 +0800 Subject: [PATCH 328/656] mmc: sdhci-st: Use devm_platform_ioremap_resource_byname() Convert platform_get_resource_byname() + devm_ioremap_resource() to a single call to devm_platform_ioremap_resource_byname(), as this is exactly what this function does. Signed-off-by: Li Zetao Acked-by: Adrian Hunter Link: https://lore.kernel.org/r/20230802094028.976612-1-lizetao1@huawei.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-st.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/mmc/host/sdhci-st.c b/drivers/mmc/host/sdhci-st.c index 6415916fbd91..97f350953c4b 100644 --- a/drivers/mmc/host/sdhci-st.c +++ b/drivers/mmc/host/sdhci-st.c @@ -348,7 +348,6 @@ static int sdhci_st_probe(struct platform_device *pdev) struct clk *clk, *icnclk; int ret = 0; u16 host_version; - struct resource *res; struct reset_control *rstc; clk = devm_clk_get(&pdev->dev, "mmc"); @@ -397,9 +396,7 @@ static int sdhci_st_probe(struct platform_device *pdev) } /* Configure the FlashSS Top registers for setting eMMC TX/RX delay */ - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, - "top-mmc-delay"); - pdata->top_ioaddr = devm_ioremap_resource(&pdev->dev, res); + pdata->top_ioaddr = devm_platform_ioremap_resource_byname(pdev, "top-mmc-delay"); if (IS_ERR(pdata->top_ioaddr)) pdata->top_ioaddr = NULL; From 92b5b53380955e6ca3c5786c72dbc99dcdfa8e4f Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 3 Aug 2023 09:22:56 +0200 Subject: [PATCH 329/656] dt-bindings: mmc: arasan,sdci: Add power-domains and iommus properties ZynqMP SDHCI Arasan IP core has own power domain and also iommu ID that's why describe optional power-domains and iommus properties. Signed-off-by: Michal Simek Acked-by: Conor Dooley Link: https://lore.kernel.org/r/bf912d5f5e74b43903a84262565f564bfe0fed7e.1691047370.git.michal.simek@amd.com Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml b/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml index a6c19a6cc99e..3e99801f77d2 100644 --- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml @@ -160,6 +160,12 @@ properties: description: The MIO bank number in which the command and data lines are configured. + iommus: + maxItems: 1 + + power-domains: + maxItems: 1 + dependencies: '#clock-cells': [ clock-output-names ] From 921700b5ed5587c354a6bf2d23da325a49490253 Mon Sep 17 00:00:00 2001 From: Zhu Wang Date: Tue, 8 Aug 2023 21:37:13 +0800 Subject: [PATCH 330/656] mmc: sdhci-spear: remove redundant of_match_ptr() The driver depends on CONFIG_OF, so it is not necessary to use of_match_ptr() here. We remove both CONFIG_OF and of_match_ptr() here. Signed-off-by: Zhu Wang Link: https://lore.kernel.org/r/20230808133714.214914-2-wangzhu9@huawei.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-spear.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/mmc/host/sdhci-spear.c b/drivers/mmc/host/sdhci-spear.c index c79035727b20..73ca07cdfaa9 100644 --- a/drivers/mmc/host/sdhci-spear.c +++ b/drivers/mmc/host/sdhci-spear.c @@ -170,20 +170,18 @@ static int sdhci_resume(struct device *dev) static SIMPLE_DEV_PM_OPS(sdhci_pm_ops, sdhci_suspend, sdhci_resume); -#ifdef CONFIG_OF static const struct of_device_id sdhci_spear_id_table[] = { { .compatible = "st,spear300-sdhci" }, {} }; MODULE_DEVICE_TABLE(of, sdhci_spear_id_table); -#endif static struct platform_driver sdhci_driver = { .driver = { .name = "sdhci", .probe_type = PROBE_PREFER_ASYNCHRONOUS, .pm = &sdhci_pm_ops, - .of_match_table = of_match_ptr(sdhci_spear_id_table), + .of_match_table = sdhci_spear_id_table, }, .probe = sdhci_probe, .remove = sdhci_remove, From 8069a60a0575bf287b9326541bbdbd59d41e49ec Mon Sep 17 00:00:00 2001 From: Zhu Wang Date: Tue, 8 Aug 2023 21:37:14 +0800 Subject: [PATCH 331/656] mmc: sdhci: milbeaut: remove redundant of_match_ptr() The driver depends on CONFIG_OF, so it is not necessary to use of_match_ptr() here. We remove of_match_ptr() here. Signed-off-by: Zhu Wang Link: https://lore.kernel.org/r/20230808133714.214914-3-wangzhu9@huawei.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-milbeaut.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-milbeaut.c b/drivers/mmc/host/sdhci-milbeaut.c index 148b37ac6564..701b11a14c6f 100644 --- a/drivers/mmc/host/sdhci-milbeaut.c +++ b/drivers/mmc/host/sdhci-milbeaut.c @@ -334,7 +334,7 @@ static struct platform_driver sdhci_milbeaut_driver = { .driver = { .name = "sdhci-milbeaut", .probe_type = PROBE_PREFER_ASYNCHRONOUS, - .of_match_table = of_match_ptr(mlb_dt_ids), + .of_match_table = mlb_dt_ids, }, .probe = sdhci_milbeaut_probe, .remove = sdhci_milbeaut_remove, From 3a6d93eb5f27f313ce0f3fa3fb171cd0732c4878 Mon Sep 17 00:00:00 2001 From: Chen Jiahao Date: Wed, 9 Aug 2023 10:04:22 +0000 Subject: [PATCH 332/656] regulator: da9121-regulator: Remove redundant of_match_ptr() macros Since the driver da9121-regulator depends on CONFIG_OF, it makes no difference to wrap of_match_ptr() here. Remove of_match_ptr() macros to clean it up. Signed-off-by: Chen Jiahao Link: https://lore.kernel.org/r/20230809100428.2669817-2-chenjiahao16@huawei.com Signed-off-by: Mark Brown --- drivers/regulator/da9121-regulator.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/regulator/da9121-regulator.c b/drivers/regulator/da9121-regulator.c index 122124944749..80098035bb13 100644 --- a/drivers/regulator/da9121-regulator.c +++ b/drivers/regulator/da9121-regulator.c @@ -440,7 +440,7 @@ static const struct regulator_desc da9121_reg = { .of_match = "buck1", .of_parse_cb = da9121_of_parse_cb, .owner = THIS_MODULE, - .regulators_node = of_match_ptr("regulators"), + .regulators_node = "regulators", .of_map_mode = da9121_map_mode, .ops = &da9121_buck_ops, .type = REGULATOR_VOLTAGE, @@ -465,7 +465,7 @@ static const struct regulator_desc da9220_reg[2] = { .of_match = "buck1", .of_parse_cb = da9121_of_parse_cb, .owner = THIS_MODULE, - .regulators_node = of_match_ptr("regulators"), + .regulators_node = "regulators", .of_map_mode = da9121_map_mode, .ops = &da9121_buck_ops, .type = REGULATOR_VOLTAGE, @@ -484,7 +484,7 @@ static const struct regulator_desc da9220_reg[2] = { .of_match = "buck2", .of_parse_cb = da9121_of_parse_cb, .owner = THIS_MODULE, - .regulators_node = of_match_ptr("regulators"), + .regulators_node = "regulators", .of_map_mode = da9121_map_mode, .ops = &da9121_buck_ops, .type = REGULATOR_VOLTAGE, @@ -506,7 +506,7 @@ static const struct regulator_desc da9122_reg[2] = { .of_match = "buck1", .of_parse_cb = da9121_of_parse_cb, .owner = THIS_MODULE, - .regulators_node = of_match_ptr("regulators"), + .regulators_node = "regulators", .of_map_mode = da9121_map_mode, .ops = &da9121_buck_ops, .type = REGULATOR_VOLTAGE, @@ -525,7 +525,7 @@ static const struct regulator_desc da9122_reg[2] = { .of_match = "buck2", .of_parse_cb = da9121_of_parse_cb, .owner = THIS_MODULE, - .regulators_node = of_match_ptr("regulators"), + .regulators_node = "regulators", .of_map_mode = da9121_map_mode, .ops = &da9121_buck_ops, .type = REGULATOR_VOLTAGE, @@ -546,7 +546,7 @@ static const struct regulator_desc da9217_reg = { .of_match = "buck1", .of_parse_cb = da9121_of_parse_cb, .owner = THIS_MODULE, - .regulators_node = of_match_ptr("regulators"), + .regulators_node = "regulators", .of_map_mode = da9121_map_mode, .ops = &da9121_buck_ops, .type = REGULATOR_VOLTAGE, @@ -573,7 +573,7 @@ static const struct regulator_desc da9141_reg = { .of_match = "buck1", .of_parse_cb = da9121_of_parse_cb, .owner = THIS_MODULE, - .regulators_node = of_match_ptr("regulators"), + .regulators_node = "regulators", .of_map_mode = da9121_map_mode, .ops = &da9121_buck_ops, .type = REGULATOR_VOLTAGE, @@ -593,7 +593,7 @@ static const struct regulator_desc da9142_reg = { .of_match = "buck1", .of_parse_cb = da9121_of_parse_cb, .owner = THIS_MODULE, - .regulators_node = of_match_ptr("regulators"), + .regulators_node = "regulators", .of_map_mode = da9121_map_mode, .ops = &da9121_buck_ops, .type = REGULATOR_VOLTAGE, @@ -1195,7 +1195,7 @@ static struct i2c_driver da9121_regulator_driver = { .driver = { .name = "da9121", .probe_type = PROBE_PREFER_ASYNCHRONOUS, - .of_match_table = of_match_ptr(da9121_dt_ids), + .of_match_table = da9121_dt_ids, }, .probe = da9121_i2c_probe, .remove = da9121_i2c_remove, From f410cfe8be5788cf09a3f32ce39946c339297821 Mon Sep 17 00:00:00 2001 From: Chen Jiahao Date: Wed, 9 Aug 2023 10:04:23 +0000 Subject: [PATCH 333/656] regulator: lp87565: Remove redundant of_match_ptr() macros Since the driver lp87565-regulator depends on CONFIG_OF, it makes no difference to wrap of_match_ptr() here. Remove of_match_ptr() macros to clean it up. Signed-off-by: Chen Jiahao Link: https://lore.kernel.org/r/20230809100428.2669817-3-chenjiahao16@huawei.com Signed-off-by: Mark Brown --- drivers/regulator/lp87565-regulator.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/regulator/lp87565-regulator.c b/drivers/regulator/lp87565-regulator.c index bdb60d8a7f3d..61ee5cf3f241 100644 --- a/drivers/regulator/lp87565-regulator.c +++ b/drivers/regulator/lp87565-regulator.c @@ -29,8 +29,8 @@ enum LP87565_regulator_id { .name = _name, \ .supply_name = _of "-in", \ .id = _id, \ - .of_match = of_match_ptr(_of), \ - .regulators_node = of_match_ptr("regulators"),\ + .of_match = _of, \ + .regulators_node = "regulators", \ .ops = &_ops, \ .n_voltages = _n, \ .type = REGULATOR_VOLTAGE, \ From 656ed7467623674e6cc794a5b2ef79e8b8b81c3f Mon Sep 17 00:00:00 2001 From: Chen Jiahao Date: Wed, 9 Aug 2023 10:04:24 +0000 Subject: [PATCH 334/656] regulator: hi6421: Remove redundant of_match_ptr() macros Since the driver hi6421-regulator depends on CONFIG_OF, it makes no difference to wrap of_match_ptr() here. Remove of_match_ptr() macros to clean it up. Signed-off-by: Chen Jiahao Link: https://lore.kernel.org/r/20230809100428.2669817-4-chenjiahao16@huawei.com Signed-off-by: Mark Brown --- drivers/regulator/hi6421-regulator.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/regulator/hi6421-regulator.c b/drivers/regulator/hi6421-regulator.c index 1b52423598d3..82e9e364d4d4 100644 --- a/drivers/regulator/hi6421-regulator.c +++ b/drivers/regulator/hi6421-regulator.c @@ -131,8 +131,8 @@ static const struct regulator_ops hi6421_buck345_ops; [HI6421_##_id] = { \ .desc = { \ .name = #_id, \ - .of_match = of_match_ptr(#_match), \ - .regulators_node = of_match_ptr("regulators"), \ + .of_match = #_match, \ + .regulators_node = "regulators", \ .ops = &hi6421_ldo_ops, \ .type = REGULATOR_VOLTAGE, \ .id = HI6421_##_id, \ @@ -170,8 +170,8 @@ static const struct regulator_ops hi6421_buck345_ops; [HI6421_##_id] = { \ .desc = { \ .name = #_id, \ - .of_match = of_match_ptr(#_match), \ - .regulators_node = of_match_ptr("regulators"), \ + .of_match = #_match, \ + .regulators_node = "regulators", \ .ops = &hi6421_ldo_linear_ops, \ .type = REGULATOR_VOLTAGE, \ .id = HI6421_##_id, \ @@ -210,8 +210,8 @@ static const struct regulator_ops hi6421_buck345_ops; [HI6421_##_id] = { \ .desc = { \ .name = #_id, \ - .of_match = of_match_ptr(#_match), \ - .regulators_node = of_match_ptr("regulators"), \ + .of_match = #_match, \ + .regulators_node = "regulators", \ .ops = &hi6421_ldo_linear_range_ops, \ .type = REGULATOR_VOLTAGE, \ .id = HI6421_##_id, \ @@ -247,8 +247,8 @@ static const struct regulator_ops hi6421_buck345_ops; [HI6421_##_id] = { \ .desc = { \ .name = #_id, \ - .of_match = of_match_ptr(#_match), \ - .regulators_node = of_match_ptr("regulators"), \ + .of_match = #_match, \ + .regulators_node = "regulators", \ .ops = &hi6421_buck012_ops, \ .type = REGULATOR_VOLTAGE, \ .id = HI6421_##_id, \ @@ -284,8 +284,8 @@ static const struct regulator_ops hi6421_buck345_ops; [HI6421_##_id] = { \ .desc = { \ .name = #_id, \ - .of_match = of_match_ptr(#_match), \ - .regulators_node = of_match_ptr("regulators"), \ + .of_match = #_match, \ + .regulators_node = "regulators", \ .ops = &hi6421_buck345_ops, \ .type = REGULATOR_VOLTAGE, \ .id = HI6421_##_id, \ From 3988795eb08c4239e865c4c21a3d5fd6fb2bd055 Mon Sep 17 00:00:00 2001 From: Chen Jiahao Date: Wed, 9 Aug 2023 10:04:25 +0000 Subject: [PATCH 335/656] regulator: mcp16502: Remove redundant of_match_ptr() macros Since the driver mcp16502 depends on CONFIG_OF, it makes no difference to wrap of_match_ptr() here. Remove of_match_ptr() macros to clean it up. Signed-off-by: Chen Jiahao Link: https://lore.kernel.org/r/20230809100428.2669817-5-chenjiahao16@huawei.com Signed-off-by: Mark Brown --- drivers/regulator/mcp16502.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/regulator/mcp16502.c b/drivers/regulator/mcp16502.c index 7a472a2ef48a..0c15a19fe83a 100644 --- a/drivers/regulator/mcp16502.c +++ b/drivers/regulator/mcp16502.c @@ -110,7 +110,7 @@ static unsigned int mcp16502_of_map_mode(unsigned int mode) #define MCP16502_REGULATOR(_name, _id, _ranges, _ops, _ramp_table) \ [_id] = { \ .name = _name, \ - .regulators_node = of_match_ptr("regulators"), \ + .regulators_node = "regulators", \ .id = _id, \ .ops = &(_ops), \ .type = REGULATOR_VOLTAGE, \ @@ -119,7 +119,7 @@ static unsigned int mcp16502_of_map_mode(unsigned int mode) .linear_ranges = _ranges, \ .linear_min_sel = VDD_LOW_SEL, \ .n_linear_ranges = ARRAY_SIZE(_ranges), \ - .of_match = of_match_ptr(_name), \ + .of_match = _name, \ .of_map_mode = mcp16502_of_map_mode, \ .vsel_reg = (((_id) + 1) << 4), \ .vsel_mask = MCP16502_VSEL, \ @@ -587,7 +587,7 @@ static struct i2c_driver mcp16502_drv = { .driver = { .name = "mcp16502-regulator", .probe_type = PROBE_PREFER_ASYNCHRONOUS, - .of_match_table = of_match_ptr(mcp16502_ids), + .of_match_table = mcp16502_ids, #ifdef CONFIG_PM .pm = &mcp16502_pm_ops, #endif From c329adf3026034c84ddd61c0b19db53d40510ae7 Mon Sep 17 00:00:00 2001 From: Chen Jiahao Date: Wed, 9 Aug 2023 10:04:26 +0000 Subject: [PATCH 336/656] regulator: mpq7920: Remove redundant of_match_ptr() macro Since the driver mpq7920 depends on CONFIG_OF, it makes no difference to wrap of_match_ptr() here. Remove the of_match_ptr() macro to clean it up. Signed-off-by: Chen Jiahao Link: https://lore.kernel.org/r/20230809100428.2669817-6-chenjiahao16@huawei.com Signed-off-by: Mark Brown --- drivers/regulator/mpq7920.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/regulator/mpq7920.c b/drivers/regulator/mpq7920.c index 4926c229109b..a670e09891e7 100644 --- a/drivers/regulator/mpq7920.c +++ b/drivers/regulator/mpq7920.c @@ -318,7 +318,7 @@ static struct i2c_driver mpq7920_regulator_driver = { .driver = { .name = "mpq7920", .probe_type = PROBE_PREFER_ASYNCHRONOUS, - .of_match_table = of_match_ptr(mpq7920_of_match), + .of_match_table = mpq7920_of_match, }, .probe = mpq7920_i2c_probe, .id_table = mpq7920_id, From 9e8925eb7fd6e5d93d9dfa9ca4628e897f0db8f1 Mon Sep 17 00:00:00 2001 From: Chen Jiahao Date: Wed, 9 Aug 2023 10:04:27 +0000 Subject: [PATCH 337/656] regulator: pfuze100-regulator: Remove redundant of_match_ptr() macro Since the driver pfuze100-regulator depends on CONFIG_OF, it makes no difference to wrap of_match_ptr() here. Remove the of_match_ptr() macro to clean it up. Signed-off-by: Chen Jiahao Link: https://lore.kernel.org/r/20230809100428.2669817-7-chenjiahao16@huawei.com Signed-off-by: Mark Brown --- drivers/regulator/pfuze100-regulator.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/regulator/pfuze100-regulator.c b/drivers/regulator/pfuze100-regulator.c index 8d7e6c323324..46854602b3ea 100644 --- a/drivers/regulator/pfuze100-regulator.c +++ b/drivers/regulator/pfuze100-regulator.c @@ -699,8 +699,7 @@ static int pfuze100_regulator_probe(struct i2c_client *client) return -ENOMEM; if (client->dev.of_node) { - match = of_match_device(of_match_ptr(pfuze_dt_ids), - &client->dev); + match = of_match_device(pfuze_dt_ids, &client->dev); if (!match) { dev_err(&client->dev, "Error: No device match found\n"); return -ENODEV; From 252b9116aff4d04176adc931cd11f02169df54f1 Mon Sep 17 00:00:00 2001 From: Chen Jiahao Date: Wed, 9 Aug 2023 10:04:28 +0000 Subject: [PATCH 338/656] regulator: tps6286x-regulator: Remove redundant of_match_ptr() macros Since the driver tps6286x-regulator depends on CONFIG_OF, it makes no difference to wrap of_match_ptr() here. Remove of_match_ptr() macros to clean it up. Signed-off-by: Chen Jiahao Link: https://lore.kernel.org/r/20230809100428.2669817-8-chenjiahao16@huawei.com Signed-off-by: Mark Brown --- drivers/regulator/tps6286x-regulator.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/regulator/tps6286x-regulator.c b/drivers/regulator/tps6286x-regulator.c index c06f6d1dc737..758c70269653 100644 --- a/drivers/regulator/tps6286x-regulator.c +++ b/drivers/regulator/tps6286x-regulator.c @@ -84,11 +84,11 @@ static unsigned int tps6286x_of_map_mode(unsigned int mode) static const struct regulator_desc tps6286x_reg = { .name = "tps6286x", - .of_match = of_match_ptr("SW"), + .of_match = "SW", .owner = THIS_MODULE, .ops = &tps6286x_regulator_ops, .of_map_mode = tps6286x_of_map_mode, - .regulators_node = of_match_ptr("regulators"), + .regulators_node = "regulators", .type = REGULATOR_VOLTAGE, .n_voltages = ((TPS6286X_MAX_MV - TPS6286X_MIN_MV) / TPS6286X_STEP_MV) + 1, .min_uV = TPS6286X_MIN_MV * 1000, @@ -148,7 +148,7 @@ static struct i2c_driver tps6286x_regulator_driver = { .driver = { .name = "tps6286x", .probe_type = PROBE_PREFER_ASYNCHRONOUS, - .of_match_table = of_match_ptr(tps6286x_dt_ids), + .of_match_table = tps6286x_dt_ids, }, .probe = tps6286x_i2c_probe, .id_table = tps6286x_i2c_id, From ddaec4e44d4e2a556b51159d48788a85ff67179d Mon Sep 17 00:00:00 2001 From: Christophe Leroy Date: Wed, 9 Aug 2023 10:54:27 +0200 Subject: [PATCH 339/656] spi: fsl-cpm: Properly define and use IO pointers Sparse reports several issues with IO pointers. Fix it by adding missing __iomem flags and using iowriteXXbe() generic helpers instead of the powerpc specific out_beXX() ones. Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202307252052.7RqHxFZj-lkp@intel.com/ Signed-off-by: Christophe Leroy Link: https://lore.kernel.org/r/18a65dca9134f6fc35932408066d4a8284cbfa65.1691571190.git.christophe.leroy@csgroup.eu Signed-off-by: Mark Brown --- drivers/spi/spi-fsl-cpm.c | 74 +++++++++++++++++++-------------------- 1 file changed, 37 insertions(+), 37 deletions(-) diff --git a/drivers/spi/spi-fsl-cpm.c b/drivers/spi/spi-fsl-cpm.c index 38452089e8f3..47c7a5c6257f 100644 --- a/drivers/spi/spi-fsl-cpm.c +++ b/drivers/spi/spi-fsl-cpm.c @@ -56,12 +56,12 @@ void fsl_spi_cpm_reinit_txrx(struct mpc8xxx_spi *mspi) QE_CR_PROTOCOL_UNSPECIFIED, 0); } else { if (mspi->flags & SPI_CPM1) { - out_be32(&mspi->pram->rstate, 0); - out_be16(&mspi->pram->rbptr, - in_be16(&mspi->pram->rbase)); - out_be32(&mspi->pram->tstate, 0); - out_be16(&mspi->pram->tbptr, - in_be16(&mspi->pram->tbase)); + iowrite32be(0, &mspi->pram->rstate); + iowrite16be(ioread16be(&mspi->pram->rbase), + &mspi->pram->rbptr); + iowrite32be(0, &mspi->pram->tstate); + iowrite16be(ioread16be(&mspi->pram->tbase), + &mspi->pram->tbptr); } else { cpm_command(CPM_SPI_CMD, CPM_CR_INIT_TRX); } @@ -75,24 +75,24 @@ static void fsl_spi_cpm_bufs_start(struct mpc8xxx_spi *mspi) struct cpm_buf_desc __iomem *rx_bd = mspi->rx_bd; unsigned int xfer_len = min(mspi->count, SPI_MRBLR); unsigned int xfer_ofs; - struct fsl_spi_reg *reg_base = mspi->reg_base; + struct fsl_spi_reg __iomem *reg_base = mspi->reg_base; xfer_ofs = mspi->xfer_in_progress->len - mspi->count; if (mspi->rx_dma == mspi->dma_dummy_rx) - out_be32(&rx_bd->cbd_bufaddr, mspi->rx_dma); + iowrite32be(mspi->rx_dma, &rx_bd->cbd_bufaddr); else - out_be32(&rx_bd->cbd_bufaddr, mspi->rx_dma + xfer_ofs); - out_be16(&rx_bd->cbd_datlen, 0); - out_be16(&rx_bd->cbd_sc, BD_SC_EMPTY | BD_SC_INTRPT | BD_SC_WRAP); + iowrite32be(mspi->rx_dma + xfer_ofs, &rx_bd->cbd_bufaddr); + iowrite16be(0, &rx_bd->cbd_datlen); + iowrite16be(BD_SC_EMPTY | BD_SC_INTRPT | BD_SC_WRAP, &rx_bd->cbd_sc); if (mspi->tx_dma == mspi->dma_dummy_tx) - out_be32(&tx_bd->cbd_bufaddr, mspi->tx_dma); + iowrite32be(mspi->tx_dma, &tx_bd->cbd_bufaddr); else - out_be32(&tx_bd->cbd_bufaddr, mspi->tx_dma + xfer_ofs); - out_be16(&tx_bd->cbd_datlen, xfer_len); - out_be16(&tx_bd->cbd_sc, BD_SC_READY | BD_SC_INTRPT | BD_SC_WRAP | - BD_SC_LAST); + iowrite32be(mspi->tx_dma + xfer_ofs, &tx_bd->cbd_bufaddr); + iowrite16be(xfer_len, &tx_bd->cbd_datlen); + iowrite16be(BD_SC_READY | BD_SC_INTRPT | BD_SC_WRAP | BD_SC_LAST, + &tx_bd->cbd_sc); /* start transfer */ mpc8xxx_spi_write_reg(®_base->command, SPCOM_STR); @@ -102,7 +102,7 @@ int fsl_spi_cpm_bufs(struct mpc8xxx_spi *mspi, struct spi_transfer *t, bool is_dma_mapped) { struct device *dev = mspi->dev; - struct fsl_spi_reg *reg_base = mspi->reg_base; + struct fsl_spi_reg __iomem *reg_base = mspi->reg_base; if (is_dma_mapped) { mspi->map_tx_dma = 0; @@ -123,7 +123,7 @@ int fsl_spi_cpm_bufs(struct mpc8xxx_spi *mspi, } if (t->bits_per_word == 16 && t->tx_buf) { const u16 *src = t->tx_buf; - u16 *dst; + __le16 *dst; int i; dst = kmalloc(t->len, GFP_KERNEL); @@ -202,12 +202,12 @@ EXPORT_SYMBOL_GPL(fsl_spi_cpm_bufs_complete); void fsl_spi_cpm_irq(struct mpc8xxx_spi *mspi, u32 events) { u16 len; - struct fsl_spi_reg *reg_base = mspi->reg_base; + struct fsl_spi_reg __iomem *reg_base = mspi->reg_base; dev_dbg(mspi->dev, "%s: bd datlen %d, count %d\n", __func__, - in_be16(&mspi->rx_bd->cbd_datlen), mspi->count); + ioread16be(&mspi->rx_bd->cbd_datlen), mspi->count); - len = in_be16(&mspi->rx_bd->cbd_datlen); + len = ioread16be(&mspi->rx_bd->cbd_datlen); if (len > mspi->count) { WARN_ON(1); len = mspi->count; @@ -328,7 +328,7 @@ int fsl_spi_cpm_init(struct mpc8xxx_spi *mspi) } if (mspi->flags & SPI_CPM1) { - void *pram; + void __iomem *pram; pram = devm_platform_ioremap_resource(to_platform_device(dev), 1); @@ -374,21 +374,21 @@ int fsl_spi_cpm_init(struct mpc8xxx_spi *mspi) mspi->rx_bd = cpm_muram_addr(bds_ofs + sizeof(*mspi->tx_bd)); /* Initialize parameter ram. */ - out_be16(&mspi->pram->tbase, cpm_muram_offset(mspi->tx_bd)); - out_be16(&mspi->pram->rbase, cpm_muram_offset(mspi->rx_bd)); - out_8(&mspi->pram->tfcr, CPMFCR_EB | CPMFCR_GBL); - out_8(&mspi->pram->rfcr, CPMFCR_EB | CPMFCR_GBL); - out_be16(&mspi->pram->mrblr, SPI_MRBLR); - out_be32(&mspi->pram->rstate, 0); - out_be32(&mspi->pram->rdp, 0); - out_be16(&mspi->pram->rbptr, 0); - out_be16(&mspi->pram->rbc, 0); - out_be32(&mspi->pram->rxtmp, 0); - out_be32(&mspi->pram->tstate, 0); - out_be32(&mspi->pram->tdp, 0); - out_be16(&mspi->pram->tbptr, 0); - out_be16(&mspi->pram->tbc, 0); - out_be32(&mspi->pram->txtmp, 0); + iowrite16be(cpm_muram_offset(mspi->tx_bd), &mspi->pram->tbase); + iowrite16be(cpm_muram_offset(mspi->rx_bd), &mspi->pram->rbase); + iowrite8(CPMFCR_EB | CPMFCR_GBL, &mspi->pram->tfcr); + iowrite8(CPMFCR_EB | CPMFCR_GBL, &mspi->pram->rfcr); + iowrite16be(SPI_MRBLR, &mspi->pram->mrblr); + iowrite32be(0, &mspi->pram->rstate); + iowrite32be(0, &mspi->pram->rdp); + iowrite16be(0, &mspi->pram->rbptr); + iowrite16be(0, &mspi->pram->rbc); + iowrite32be(0, &mspi->pram->rxtmp); + iowrite32be(0, &mspi->pram->tstate); + iowrite32be(0, &mspi->pram->tdp); + iowrite16be(0, &mspi->pram->tbptr); + iowrite16be(0, &mspi->pram->tbc); + iowrite32be(0, &mspi->pram->txtmp); return 0; From 117d73b18441638b85b3963256c846509c6138f1 Mon Sep 17 00:00:00 2001 From: Harshit Mogalapalli Date: Wed, 9 Aug 2023 00:18:12 -0700 Subject: [PATCH 340/656] mmc: sunplus: Fix platform_get_irq() error checking The platform_get_irq() function returns negative error codes on failure. Signed-off-by: Harshit Mogalapalli Reviewed-by: Dan Carpenter Link: https://lore.kernel.org/r/20230809071812.547229-2-harshit.m.mogalapalli@oracle.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sunplus-mmc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/host/sunplus-mmc.c b/drivers/mmc/host/sunplus-mmc.c index 2bdebeb1f8e4..e9cb1a57cb75 100644 --- a/drivers/mmc/host/sunplus-mmc.c +++ b/drivers/mmc/host/sunplus-mmc.c @@ -885,7 +885,7 @@ static int spmmc_drv_probe(struct platform_device *pdev) return dev_err_probe(&pdev->dev, PTR_ERR(host->rstc), "rst get fail\n"); host->irq = platform_get_irq(pdev, 0); - if (host->irq <= 0) + if (host->irq < 0) return host->irq; ret = devm_request_threaded_irq(&pdev->dev, host->irq, From 283cf357b02848a48eb544e3cde993254fc2c19e Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Tue, 8 Aug 2023 20:15:13 +0800 Subject: [PATCH 341/656] mmc: remove unnecessary set_drvdata() function The driver data will be cleared in device_unbind_cleanup() in driver core code. So the set_drvdata(..., NULL) called in remove and error path in probe can be removed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230808121513.553143-1-yangyingliang@huawei.com Signed-off-by: Ulf Hansson --- drivers/mmc/core/block.c | 1 - drivers/mmc/host/moxart-mmc.c | 2 -- drivers/mmc/host/sunplus-mmc.c | 1 - drivers/mmc/host/via-sdmmc.c | 2 -- drivers/mmc/host/wbsd.c | 2 -- 5 files changed, 8 deletions(-) diff --git a/drivers/mmc/core/block.c b/drivers/mmc/core/block.c index b6f4be25b31b..266298a04f78 100644 --- a/drivers/mmc/core/block.c +++ b/drivers/mmc/core/block.c @@ -3026,7 +3026,6 @@ static void mmc_blk_remove(struct mmc_card *card) pm_runtime_disable(&card->dev); pm_runtime_put_noidle(&card->dev); mmc_blk_remove_req(md); - dev_set_drvdata(&card->dev, NULL); destroy_workqueue(card->complete_wq); } diff --git a/drivers/mmc/host/moxart-mmc.c b/drivers/mmc/host/moxart-mmc.c index d0d6ffcf78d4..43c2a95bc29a 100644 --- a/drivers/mmc/host/moxart-mmc.c +++ b/drivers/mmc/host/moxart-mmc.c @@ -692,8 +692,6 @@ static int moxart_remove(struct platform_device *pdev) struct mmc_host *mmc = dev_get_drvdata(&pdev->dev); struct moxart_host *host = mmc_priv(mmc); - dev_set_drvdata(&pdev->dev, NULL); - if (!IS_ERR_OR_NULL(host->dma_chan_tx)) dma_release_channel(host->dma_chan_tx); if (!IS_ERR_OR_NULL(host->dma_chan_rx)) diff --git a/drivers/mmc/host/sunplus-mmc.c b/drivers/mmc/host/sunplus-mmc.c index e9cb1a57cb75..37ebed040807 100644 --- a/drivers/mmc/host/sunplus-mmc.c +++ b/drivers/mmc/host/sunplus-mmc.c @@ -948,7 +948,6 @@ static int spmmc_drv_remove(struct platform_device *dev) clk_disable_unprepare(host->clk); pm_runtime_put_noidle(&dev->dev); pm_runtime_disable(&dev->dev); - platform_set_drvdata(dev, NULL); return 0; } diff --git a/drivers/mmc/host/via-sdmmc.c b/drivers/mmc/host/via-sdmmc.c index a2b0d9461665..ba6044b16e07 100644 --- a/drivers/mmc/host/via-sdmmc.c +++ b/drivers/mmc/host/via-sdmmc.c @@ -1160,7 +1160,6 @@ static int via_sd_probe(struct pci_dev *pcidev, unmap: iounmap(sdhost->mmiobase); free_mmc_host: - dev_set_drvdata(&pcidev->dev, NULL); mmc_free_host(mmc); release: pci_release_regions(pcidev); @@ -1212,7 +1211,6 @@ static void via_sd_remove(struct pci_dev *pcidev) writeb(gatt, sdhost->pcictrl_mmiobase + VIA_CRDR_PCICLKGATT); iounmap(sdhost->mmiobase); - dev_set_drvdata(&pcidev->dev, NULL); mmc_free_host(sdhost->mmc); pci_release_regions(pcidev); pci_disable_device(pcidev); diff --git a/drivers/mmc/host/wbsd.c b/drivers/mmc/host/wbsd.c index bf2a92fba0ed..0589d169e8fb 100644 --- a/drivers/mmc/host/wbsd.c +++ b/drivers/mmc/host/wbsd.c @@ -1264,8 +1264,6 @@ static void wbsd_free_mmc(struct device *dev) del_timer_sync(&host->ignore_timer); mmc_free_host(mmc); - - dev_set_drvdata(dev, NULL); } /* From b4120b69244470f6d572281993b2e39657ac31cd Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Guido=20G=C3=BCnther?= Date: Wed, 9 Aug 2023 20:50:11 +0200 Subject: [PATCH 342/656] dt-bindings: mmc: Fix reference to pwr-seq-simple MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit It's a YAML file nowadays. Signed-off-by: Guido Günther Link: https://lore.kernel.org/r/d7a0be6a2688a9829077cc21ca4a5bf9528f9eb1.1691606520.git.agx@sigxcpu.org Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/mmc-controller.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mmc/mmc-controller.yaml b/Documentation/devicetree/bindings/mmc/mmc-controller.yaml index 86c73fd825fd..58ae298cd2fc 100644 --- a/Documentation/devicetree/bindings/mmc/mmc-controller.yaml +++ b/Documentation/devicetree/bindings/mmc/mmc-controller.yaml @@ -269,7 +269,7 @@ properties: post-power-on-delay-ms: description: It was invented for MMC pwrseq-simple which could be referred to - mmc-pwrseq-simple.txt. But now it\'s reused as a tunable delay + mmc-pwrseq-simple.yaml. But now it\'s reused as a tunable delay waiting for I/O signalling and card power supply to be stable, regardless of whether pwrseq-simple is used. Default to 10ms if no available. From 55975401fdf86ffe4736a557ae9d6f3d81ee5ba6 Mon Sep 17 00:00:00 2001 From: Li Zetao Date: Thu, 10 Aug 2023 19:48:58 +0800 Subject: [PATCH 343/656] regulator: qcom_rpm-regulator: Use devm_kmemdup to replace devm_kmalloc + memcpy Use the helper function devm_kmemdup() rather than duplicating its implementation, which helps to enhance code readability. Signed-off-by: Li Zetao Link: https://lore.kernel.org/r/20230810114858.2103928-1-lizetao1@huawei.com Signed-off-by: Mark Brown --- drivers/regulator/qcom_rpm-regulator.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/regulator/qcom_rpm-regulator.c b/drivers/regulator/qcom_rpm-regulator.c index f95bc9208c13..9366488f0383 100644 --- a/drivers/regulator/qcom_rpm-regulator.c +++ b/drivers/regulator/qcom_rpm-regulator.c @@ -956,11 +956,10 @@ static int rpm_reg_probe(struct platform_device *pdev) } for (reg = match->data; reg->name; reg++) { - vreg = devm_kmalloc(&pdev->dev, sizeof(*vreg), GFP_KERNEL); + vreg = devm_kmemdup(&pdev->dev, reg->template, sizeof(*vreg), GFP_KERNEL); if (!vreg) return -ENOMEM; - memcpy(vreg, reg->template, sizeof(*vreg)); mutex_init(&vreg->lock); vreg->dev = &pdev->dev; From fddc9bb6e277b99b0410410794d156e963aa8f0b Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 10 Aug 2023 13:19:12 +0200 Subject: [PATCH 344/656] regulator: ltc3589: Fix Wvoid-pointer-to-enum-cast warning 'variant' is an enum, thus cast of pointer on 64-bit compile test with W=1 causes: ltc3589.c:394:22: error: cast to smaller integer type 'enum ltc3589_variant' from 'const void *' [-Werror,-Wvoid-pointer-to-enum-cast] Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230810111914.204847-1-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown --- drivers/regulator/ltc3589.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/regulator/ltc3589.c b/drivers/regulator/ltc3589.c index cf931b8c36dc..d892c2a5df7b 100644 --- a/drivers/regulator/ltc3589.c +++ b/drivers/regulator/ltc3589.c @@ -391,8 +391,7 @@ static int ltc3589_probe(struct i2c_client *client) i2c_set_clientdata(client, ltc3589); if (client->dev.of_node) - ltc3589->variant = (enum ltc3589_variant) - of_device_get_match_data(&client->dev); + ltc3589->variant = (uintptr_t)of_device_get_match_data(&client->dev); else ltc3589->variant = id->driver_data; ltc3589->dev = dev; From b29f42c6629bb3bd3d479592d40a7e4c73461a01 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 10 Aug 2023 13:19:13 +0200 Subject: [PATCH 345/656] regulator: max77857: Fix Wvoid-pointer-to-enum-cast warning 'id' is an enum, thus cast of pointer on 64-bit compile test with W=1 causes: max77857-regulator.c:56:24: error: cast to smaller integer type 'enum max77857_id' from 'void *' [-Werror,-Wvoid-pointer-to-enum-cast] Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230810111914.204847-2-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown --- drivers/regulator/max77857-regulator.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/regulator/max77857-regulator.c b/drivers/regulator/max77857-regulator.c index 44a510547318..145ad0281857 100644 --- a/drivers/regulator/max77857-regulator.c +++ b/drivers/regulator/max77857-regulator.c @@ -53,7 +53,7 @@ enum max77857_id { static bool max77857_volatile_reg(struct device *dev, unsigned int reg) { - enum max77857_id id = (enum max77857_id)dev_get_drvdata(dev); + enum max77857_id id = (uintptr_t)dev_get_drvdata(dev); switch (id) { case ID_MAX77831: @@ -91,7 +91,7 @@ static int max77857_get_status(struct regulator_dev *rdev) static unsigned int max77857_get_mode(struct regulator_dev *rdev) { - enum max77857_id id = (enum max77857_id)rdev_get_drvdata(rdev); + enum max77857_id id = (uintptr_t)rdev_get_drvdata(rdev); unsigned int regval; int ret; @@ -125,7 +125,7 @@ static unsigned int max77857_get_mode(struct regulator_dev *rdev) static int max77857_set_mode(struct regulator_dev *rdev, unsigned int mode) { - enum max77857_id id = (enum max77857_id)rdev_get_drvdata(rdev); + enum max77857_id id = (uintptr_t)rdev_get_drvdata(rdev); unsigned int reg, val; switch (id) { From c418920567ae6101826cc05cda042f71435830d0 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 10 Aug 2023 13:19:14 +0200 Subject: [PATCH 346/656] regulator: lp872x: Fix Wvoid-pointer-to-enum-cast warning 'id' is an enum, thus cast of pointer on 64-bit compile test with W=1 causes: lp872x.c:867:5: error: cast to smaller integer type 'enum lp872x_regulator_id' from 'void *' [-Werror,-Wvoid-pointer-to-enum-cast] Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230810111914.204847-3-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown --- drivers/regulator/lp872x.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/regulator/lp872x.c b/drivers/regulator/lp872x.c index 63aa227b1813..942f37082cb1 100644 --- a/drivers/regulator/lp872x.c +++ b/drivers/regulator/lp872x.c @@ -864,7 +864,7 @@ static struct lp872x_platform_data for (i = 0; i < num_matches; i++) { pdata->regulator_data[i].id = - (enum lp872x_regulator_id)match[i].driver_data; + (uintptr_t)match[i].driver_data; pdata->regulator_data[i].init_data = match[i].init_data; } out: From 3d757ddbd68ce8d464cc7a45521abc33e6249af1 Mon Sep 17 00:00:00 2001 From: Chevron Li Date: Fri, 11 Aug 2023 11:35:16 +0800 Subject: [PATCH 347/656] mmc: sdhci-pci-o2micro: add Bayhub new chip GG8 support for UHS-I Add Bayhub new chip GG8 support for UHS-I function Signed-off-by: Chevron Li Acked-by: Adrian Hunter Link: https://lore.kernel.org/r/20230811033517.11532-1-chevron_li@126.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-pci-core.c | 4 + drivers/mmc/host/sdhci-pci-o2micro.c | 144 ++++++++++++++++++++------- drivers/mmc/host/sdhci-pci.h | 4 + 3 files changed, 118 insertions(+), 34 deletions(-) diff --git a/drivers/mmc/host/sdhci-pci-core.c b/drivers/mmc/host/sdhci-pci-core.c index 1c2572c0f012..7c14feb5db77 100644 --- a/drivers/mmc/host/sdhci-pci-core.c +++ b/drivers/mmc/host/sdhci-pci-core.c @@ -1898,6 +1898,10 @@ static const struct pci_device_id pci_ids[] = { SDHCI_PCI_DEVICE(O2, SDS1, o2), SDHCI_PCI_DEVICE(O2, SEABIRD0, o2), SDHCI_PCI_DEVICE(O2, SEABIRD1, o2), + SDHCI_PCI_DEVICE(O2, GG8_9860, o2), + SDHCI_PCI_DEVICE(O2, GG8_9861, o2), + SDHCI_PCI_DEVICE(O2, GG8_9862, o2), + SDHCI_PCI_DEVICE(O2, GG8_9863, o2), SDHCI_PCI_DEVICE(ARASAN, PHY_EMMC, arasan), SDHCI_PCI_DEVICE(SYNOPSYS, DWC_MSHC, snps), SDHCI_PCI_DEVICE(GLI, 9750, gl9750), diff --git a/drivers/mmc/host/sdhci-pci-o2micro.c b/drivers/mmc/host/sdhci-pci-o2micro.c index 620f52ad9667..ae2707fbd119 100644 --- a/drivers/mmc/host/sdhci-pci-o2micro.c +++ b/drivers/mmc/host/sdhci-pci-o2micro.c @@ -36,6 +36,7 @@ #define O2_SD_INF_MOD 0xF1 #define O2_SD_MISC_CTRL4 0xFC #define O2_SD_MISC_CTRL 0x1C0 +#define O2_SD_EXP_INT_REG 0x1E0 #define O2_SD_PWR_FORCE_L0 0x0002 #define O2_SD_TUNING_CTRL 0x300 #define O2_SD_PLL_SETTING 0x304 @@ -49,6 +50,9 @@ #define O2_SD_UHS2_L1_CTRL 0x35C #define O2_SD_FUNC_REG3 0x3E0 #define O2_SD_FUNC_REG4 0x3E4 +#define O2_SD_PARA_SET_REG1 0x444 +#define O2_SD_VDDX_CTRL_REG 0x508 +#define O2_SD_GPIO_CTRL_REG1 0x510 #define O2_SD_LED_ENABLE BIT(6) #define O2_SD_FREG0_LEDOFF BIT(13) #define O2_SD_SEL_DLL BIT(16) @@ -334,33 +338,45 @@ static int sdhci_o2_execute_tuning(struct mmc_host *mmc, u32 opcode) scratch |= O2_SD_PWR_FORCE_L0; sdhci_writew(host, scratch, O2_SD_MISC_CTRL); - /* Stop clk */ - reg_val = sdhci_readw(host, SDHCI_CLOCK_CONTROL); - reg_val &= ~SDHCI_CLOCK_CARD_EN; - sdhci_writew(host, reg_val, SDHCI_CLOCK_CONTROL); + /* Update output phase */ + switch (chip->pdev->device) { + case PCI_DEVICE_ID_O2_SDS0: + case PCI_DEVICE_ID_O2_SEABIRD0: + case PCI_DEVICE_ID_O2_SEABIRD1: + case PCI_DEVICE_ID_O2_SDS1: + case PCI_DEVICE_ID_O2_FUJIN2: + /* Stop clk */ + reg_val = sdhci_readw(host, SDHCI_CLOCK_CONTROL); + reg_val &= ~SDHCI_CLOCK_CARD_EN; + sdhci_writew(host, reg_val, SDHCI_CLOCK_CONTROL); - if ((host->timing == MMC_TIMING_MMC_HS200) || - (host->timing == MMC_TIMING_UHS_SDR104)) { - /* UnLock WP */ - pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch_8); - scratch_8 &= 0x7f; - pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch_8); + if (host->timing == MMC_TIMING_MMC_HS200 || + host->timing == MMC_TIMING_UHS_SDR104) { + /* UnLock WP */ + pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch_8); + scratch_8 &= 0x7f; + pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch_8); - /* Set pcr 0x354[16] to choose dll clock, and set the default phase */ - pci_read_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, ®_val); - reg_val &= ~(O2_SD_SEL_DLL | O2_SD_PHASE_MASK); - reg_val |= (O2_SD_SEL_DLL | O2_SD_FIX_PHASE); - pci_write_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, reg_val); + /* Set pcr 0x354[16] to choose dll clock, and set the default phase */ + pci_read_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, ®_val); + reg_val &= ~(O2_SD_SEL_DLL | O2_SD_PHASE_MASK); + reg_val |= (O2_SD_SEL_DLL | O2_SD_FIX_PHASE); + pci_write_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, reg_val); - /* Lock WP */ - pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch_8); - scratch_8 |= 0x80; - pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch_8); + /* Lock WP */ + pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch_8); + scratch_8 |= 0x80; + pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch_8); + } + + /* Start clk */ + reg_val = sdhci_readw(host, SDHCI_CLOCK_CONTROL); + reg_val |= SDHCI_CLOCK_CARD_EN; + sdhci_writew(host, reg_val, SDHCI_CLOCK_CONTROL); + break; + default: + break; } - /* Start clk */ - reg_val = sdhci_readw(host, SDHCI_CLOCK_CONTROL); - reg_val |= SDHCI_CLOCK_CARD_EN; - sdhci_writew(host, reg_val, SDHCI_CLOCK_CONTROL); /* wait DLL lock, timeout value 5ms */ if (readx_poll_timeout(sdhci_o2_pll_dll_wdt_control, host, @@ -563,6 +579,7 @@ static void sdhci_pci_o2_set_clock(struct sdhci_host *host, unsigned int clock) u16 clk; u8 scratch; u32 scratch_32; + u32 dmdn_208m, dmdn_200m; struct sdhci_pci_slot *slot = sdhci_priv(host); struct sdhci_pci_chip *chip = slot->chip; @@ -578,16 +595,27 @@ static void sdhci_pci_o2_set_clock(struct sdhci_host *host, unsigned int clock) scratch &= 0x7f; pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch); + if (chip->pdev->device == PCI_DEVICE_ID_O2_GG8_9860 || + chip->pdev->device == PCI_DEVICE_ID_O2_GG8_9861 || + chip->pdev->device == PCI_DEVICE_ID_O2_GG8_9862 || + chip->pdev->device == PCI_DEVICE_ID_O2_GG8_9863) { + dmdn_208m = 0x2c500000; + dmdn_200m = 0x25200000; + } else { + dmdn_208m = 0x2c280000; + dmdn_200m = 0x25100000; + } + if ((host->timing == MMC_TIMING_UHS_SDR104) && (clock == 200000000)) { pci_read_config_dword(chip->pdev, O2_SD_PLL_SETTING, &scratch_32); - if ((scratch_32 & 0xFFFF0000) != 0x2c280000) - o2_pci_set_baseclk(chip, 0x2c280000); + if ((scratch_32 & 0xFFFF0000) != dmdn_208m) + o2_pci_set_baseclk(chip, dmdn_208m); } else { pci_read_config_dword(chip->pdev, O2_SD_PLL_SETTING, &scratch_32); - if ((scratch_32 & 0xFFFF0000) != 0x25100000) - o2_pci_set_baseclk(chip, 0x25100000); + if ((scratch_32 & 0xFFFF0000) != dmdn_200m) + o2_pci_set_baseclk(chip, dmdn_200m); } pci_read_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, &scratch_32); @@ -624,6 +652,11 @@ static int sdhci_pci_o2_probe_slot(struct sdhci_pci_slot *slot) if (caps & SDHCI_CAN_DO_8BIT) host->mmc->caps |= MMC_CAP_8_BIT_DATA; + host->quirks2 |= SDHCI_QUIRK2_BROKEN_DDR50; + + sdhci_pci_o2_enable_msi(chip, host); + + host->mmc_host_ops.execute_tuning = sdhci_o2_execute_tuning; switch (chip->pdev->device) { case PCI_DEVICE_ID_O2_SDS0: case PCI_DEVICE_ID_O2_SEABIRD0: @@ -634,10 +667,6 @@ static int sdhci_pci_o2_probe_slot(struct sdhci_pci_slot *slot) if (reg & 0x1) host->quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12; - host->quirks2 |= SDHCI_QUIRK2_BROKEN_DDR50; - - sdhci_pci_o2_enable_msi(chip, host); - if (chip->pdev->device == PCI_DEVICE_ID_O2_SEABIRD0) { ret = pci_read_config_dword(chip->pdev, O2_SD_MISC_SETTING, ®); @@ -663,15 +692,21 @@ static int sdhci_pci_o2_probe_slot(struct sdhci_pci_slot *slot) host->quirks2 |= SDHCI_QUIRK2_PRESET_VALUE_BROKEN; } - host->mmc_host_ops.execute_tuning = sdhci_o2_execute_tuning; - if (chip->pdev->device != PCI_DEVICE_ID_O2_FUJIN2) break; /* set dll watch dog timer */ reg = sdhci_readl(host, O2_SD_VENDOR_SETTING2); reg |= (1 << 12); sdhci_writel(host, reg, O2_SD_VENDOR_SETTING2); - + break; + case PCI_DEVICE_ID_O2_GG8_9860: + case PCI_DEVICE_ID_O2_GG8_9861: + case PCI_DEVICE_ID_O2_GG8_9862: + case PCI_DEVICE_ID_O2_GG8_9863: + host->mmc->caps2 |= MMC_CAP2_NO_SDIO; + host->mmc->caps |= MMC_CAP_HW_RESET; + host->quirks2 |= SDHCI_QUIRK2_PRESET_VALUE_BROKEN; + slot->host->mmc_host_ops.get_cd = sdhci_o2_get_cd; break; default: break; @@ -684,6 +719,7 @@ static int sdhci_pci_o2_probe(struct sdhci_pci_chip *chip) { int ret; u8 scratch; + u16 scratch16; u32 scratch_32; switch (chip->pdev->device) { @@ -893,6 +929,46 @@ static int sdhci_pci_o2_probe(struct sdhci_pci_chip *chip) scratch |= 0x80; pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch); break; + case PCI_DEVICE_ID_O2_GG8_9860: + case PCI_DEVICE_ID_O2_GG8_9861: + case PCI_DEVICE_ID_O2_GG8_9862: + case PCI_DEVICE_ID_O2_GG8_9863: + /* UnLock WP */ + ret = pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch); + if (ret) + return ret; + scratch &= 0x7f; + pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch); + + /* Select mode switch source as software control */ + pci_read_config_word(chip->pdev, O2_SD_PARA_SET_REG1, &scratch16); + scratch16 &= 0xF8FF; + scratch16 |= BIT(9); + pci_write_config_word(chip->pdev, O2_SD_PARA_SET_REG1, scratch16); + + /* set VDD1 supply source */ + pci_read_config_word(chip->pdev, O2_SD_VDDX_CTRL_REG, &scratch16); + scratch16 &= 0xFFE3; + scratch16 |= BIT(3); + pci_write_config_word(chip->pdev, O2_SD_VDDX_CTRL_REG, scratch16); + + /* Set host drive strength*/ + scratch16 = 0x0025; + pci_write_config_word(chip->pdev, O2_SD_PLL_SETTING, scratch16); + + /* Set output delay*/ + pci_read_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, &scratch_32); + scratch_32 &= 0xFF0FFF00; + scratch_32 |= 0x00B0003B; + pci_write_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, scratch_32); + + /* Lock WP */ + ret = pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch); + if (ret) + return ret; + scratch |= 0x80; + pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch); + break; } return 0; diff --git a/drivers/mmc/host/sdhci-pci.h b/drivers/mmc/host/sdhci-pci.h index 9c8863956381..153704f812ed 100644 --- a/drivers/mmc/host/sdhci-pci.h +++ b/drivers/mmc/host/sdhci-pci.h @@ -11,6 +11,10 @@ #define PCI_DEVICE_ID_O2_FUJIN2 0x8520 #define PCI_DEVICE_ID_O2_SEABIRD0 0x8620 #define PCI_DEVICE_ID_O2_SEABIRD1 0x8621 +#define PCI_DEVICE_ID_O2_GG8_9860 0x9860 +#define PCI_DEVICE_ID_O2_GG8_9861 0x9861 +#define PCI_DEVICE_ID_O2_GG8_9862 0x9862 +#define PCI_DEVICE_ID_O2_GG8_9863 0x9863 #define PCI_DEVICE_ID_INTEL_PCH_SDIO0 0x8809 #define PCI_DEVICE_ID_INTEL_PCH_SDIO1 0x880a From da2a69cf278729dae1ad95811111457c8aac306b Mon Sep 17 00:00:00 2001 From: Chevron Li Date: Fri, 11 Aug 2023 11:35:17 +0800 Subject: [PATCH 348/656] mmc: sdhci-pci-o2micro: add Bayhub new chip GG8 support for express card Add Bayhub new chip GG8 support for SD express card. This patch depends on patch 1/2. Signed-off-by: Chevron Li Acked-by: Adrian Hunter Link: https://lore.kernel.org/r/20230811033517.11532-2-chevron_li@126.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-pci-o2micro.c | 65 +++++++++++++++++++++++++++- 1 file changed, 64 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-pci-o2micro.c b/drivers/mmc/host/sdhci-pci-o2micro.c index ae2707fbd119..7bfee28116af 100644 --- a/drivers/mmc/host/sdhci-pci-o2micro.c +++ b/drivers/mmc/host/sdhci-pci-o2micro.c @@ -21,6 +21,7 @@ * O2Micro device registers */ +#define O2_SD_PCIE_SWITCH 0x54 #define O2_SD_MISC_REG5 0x64 #define O2_SD_LD0_CTRL 0x68 #define O2_SD_DEV_CTRL 0x88 @@ -631,6 +632,67 @@ static void sdhci_pci_o2_set_clock(struct sdhci_host *host, unsigned int clock) sdhci_o2_enable_clk(host, clk); } +static int sdhci_pci_o2_init_sd_express(struct mmc_host *mmc, struct mmc_ios *ios) +{ + struct sdhci_host *host = mmc_priv(mmc); + struct sdhci_pci_slot *slot = sdhci_priv(host); + struct sdhci_pci_chip *chip = slot->chip; + u8 scratch8; + u16 scratch16; + int ret; + + /* Disable clock */ + sdhci_writeb(host, 0, SDHCI_CLOCK_CONTROL); + + /* Set VDD2 voltage*/ + scratch8 = sdhci_readb(host, SDHCI_POWER_CONTROL); + scratch8 &= 0x0F; + if (host->mmc->ios.timing == MMC_TIMING_SD_EXP_1_2V && + host->mmc->caps2 & MMC_CAP2_SD_EXP_1_2V) { + scratch8 |= SDHCI_VDD2_POWER_ON | SDHCI_VDD2_POWER_120; + } else { + scratch8 |= SDHCI_VDD2_POWER_ON | SDHCI_VDD2_POWER_180; + } + + sdhci_writeb(host, scratch8, SDHCI_POWER_CONTROL); + + /* UnLock WP */ + pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch8); + scratch8 &= 0x7f; + pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch8); + + /* Wait for express card clkreqn assert */ + ret = read_poll_timeout(sdhci_readb, scratch8, !(scratch8 & BIT(0)), + 1, 30000, false, host, O2_SD_EXP_INT_REG); + + if (!ret) { + /* Switch to PCIe mode */ + scratch16 = sdhci_readw(host, O2_SD_PCIE_SWITCH); + scratch16 |= BIT(8); + sdhci_writew(host, scratch16, O2_SD_PCIE_SWITCH); + } else { + /* Power off VDD2 voltage*/ + scratch8 = sdhci_readb(host, SDHCI_POWER_CONTROL); + scratch8 &= 0x0F; + sdhci_writeb(host, scratch8, SDHCI_POWER_CONTROL); + + /* Keep mode as UHSI */ + pci_read_config_word(chip->pdev, O2_SD_PARA_SET_REG1, &scratch16); + scratch16 &= ~BIT(11); + pci_write_config_word(chip->pdev, O2_SD_PARA_SET_REG1, scratch16); + + host->mmc->ios.timing = MMC_TIMING_LEGACY; + pr_info("%s: Express card initialization failed, falling back to Legacy\n", + mmc_hostname(host->mmc)); + } + /* Lock WP */ + pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch8); + scratch8 |= 0x80; + pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch8); + + return 0; +} + static int sdhci_pci_o2_probe_slot(struct sdhci_pci_slot *slot) { struct sdhci_pci_chip *chip; @@ -703,10 +765,11 @@ static int sdhci_pci_o2_probe_slot(struct sdhci_pci_slot *slot) case PCI_DEVICE_ID_O2_GG8_9861: case PCI_DEVICE_ID_O2_GG8_9862: case PCI_DEVICE_ID_O2_GG8_9863: - host->mmc->caps2 |= MMC_CAP2_NO_SDIO; + host->mmc->caps2 |= MMC_CAP2_NO_SDIO | MMC_CAP2_SD_EXP | MMC_CAP2_SD_EXP_1_2V; host->mmc->caps |= MMC_CAP_HW_RESET; host->quirks2 |= SDHCI_QUIRK2_PRESET_VALUE_BROKEN; slot->host->mmc_host_ops.get_cd = sdhci_o2_get_cd; + host->mmc_host_ops.init_sd_express = sdhci_pci_o2_init_sd_express; break; default: break; From 13433b9e2723947d636fb09fda68948b77833077 Mon Sep 17 00:00:00 2001 From: Victor Shih Date: Fri, 11 Aug 2023 18:14:04 +0800 Subject: [PATCH 349/656] mmc: core: Cleanup mmc_sd_num_wr_blocks() function Use mmc_app_cmd() to avoid open-coding in mmc_sd_num_wr_blocks(). Signed-off-by: Victor Shih Link: https://lore.kernel.org/r/20230811101404.4463-1-victorshihgli@gmail.com Signed-off-by: Ulf Hansson --- drivers/mmc/core/block.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) diff --git a/drivers/mmc/core/block.c b/drivers/mmc/core/block.c index 266298a04f78..b5b414a71e0b 100644 --- a/drivers/mmc/core/block.c +++ b/drivers/mmc/core/block.c @@ -918,17 +918,9 @@ static int mmc_sd_num_wr_blocks(struct mmc_card *card, u32 *written_blocks) struct scatterlist sg; - cmd.opcode = MMC_APP_CMD; - cmd.arg = card->rca << 16; - cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_AC; - - err = mmc_wait_for_cmd(card->host, &cmd, 0); + err = mmc_app_cmd(card->host, card); if (err) return err; - if (!mmc_host_is_spi(card->host) && !(cmd.resp[0] & R1_APP_CMD)) - return -EIO; - - memset(&cmd, 0, sizeof(struct mmc_command)); cmd.opcode = SD_APP_SEND_NUM_WR_BLKS; cmd.arg = 0; From 33b53749aa1f9fb0f5aa0ac37269944a080b982f Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Mon, 31 Jul 2023 22:02:49 +0800 Subject: [PATCH 350/656] crypto: starfive - fix return value check in starfive_aes_prepare_req() kzalloc() returns NULL pointer not PTR_ERR() when it fails, so replace the IS_ERR() check with NULL pointer check. Fixes: e22471c2331c ("crypto: starfive - Add AES skcipher and aead support") Signed-off-by: Yang Yingliang Signed-off-by: Herbert Xu --- drivers/crypto/starfive/jh7110-aes.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/crypto/starfive/jh7110-aes.c b/drivers/crypto/starfive/jh7110-aes.c index 04dd7958054f..278dfa4aa743 100644 --- a/drivers/crypto/starfive/jh7110-aes.c +++ b/drivers/crypto/starfive/jh7110-aes.c @@ -496,8 +496,8 @@ static int starfive_aes_prepare_req(struct skcipher_request *req, if (cryp->assoclen) { rctx->adata = kzalloc(ALIGN(cryp->assoclen, AES_BLOCK_SIZE), GFP_KERNEL); - if (IS_ERR(rctx->adata)) - return dev_err_probe(cryp->dev, PTR_ERR(rctx->adata), + if (!rctx->adata) + return dev_err_probe(cryp->dev, -ENOMEM, "Failed to alloc memory for adata"); scatterwalk_copychunks(rctx->adata, &cryp->in_walk, cryp->assoclen, 0); From aec48805163338f8413118796c1dd035661b9140 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Mon, 31 Jul 2023 18:54:54 +0200 Subject: [PATCH 351/656] crypto: stm32 - Properly handle pm_runtime_get failing MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit If pm_runtime_get() (disguised as pm_runtime_resume_and_get()) fails, this means the clk wasn't prepared and enabled. Returning early in this case however is wrong as then the following resource frees are skipped and this is never catched up. So do all the cleanups but clk_disable_unprepare(). Also don't emit a warning, as stm32_hash_runtime_resume() already emitted one. Note that the return value of stm32_hash_remove() is mostly ignored by the device core. The only effect of returning zero instead of an error value is to suppress another warning in platform_remove(). So return 0 even if pm_runtime_resume_and_get() failed. Fixes: 8b4d566de6a5 ("crypto: stm32/hash - Add power management support") Signed-off-by: Uwe Kleine-König Signed-off-by: Herbert Xu --- drivers/crypto/stm32/stm32-hash.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/crypto/stm32/stm32-hash.c b/drivers/crypto/stm32/stm32-hash.c index 88a186c3dd78..75d281edae2a 100644 --- a/drivers/crypto/stm32/stm32-hash.c +++ b/drivers/crypto/stm32/stm32-hash.c @@ -2121,9 +2121,7 @@ static int stm32_hash_remove(struct platform_device *pdev) if (!hdev) return -ENODEV; - ret = pm_runtime_resume_and_get(hdev->dev); - if (ret < 0) - return ret; + ret = pm_runtime_get_sync(hdev->dev); stm32_hash_unregister_algs(hdev); @@ -2139,7 +2137,8 @@ static int stm32_hash_remove(struct platform_device *pdev) pm_runtime_disable(hdev->dev); pm_runtime_put_noidle(hdev->dev); - clk_disable_unprepare(hdev->clk); + if (ret >= 0) + clk_disable_unprepare(hdev->clk); return 0; } From 3feec4ef9f99e2ca3c4614bc0c46e9c0ad337357 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Mon, 31 Jul 2023 18:54:55 +0200 Subject: [PATCH 352/656] crypto: stm32 - Drop if block with always false condition MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit stm32_hash_remove() is only called after stm32_hash_probe() succeeded. In this case platform_set_drvdata() was called with a non-NULL data patameter. The check for hdev being non-NULL can be dropped because hdev is never NULL (or something bad like memory corruption happened and then the check doesn't help any more either). Signed-off-by: Uwe Kleine-König Signed-off-by: Herbert Xu --- drivers/crypto/stm32/stm32-hash.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/drivers/crypto/stm32/stm32-hash.c b/drivers/crypto/stm32/stm32-hash.c index 75d281edae2a..b10243035584 100644 --- a/drivers/crypto/stm32/stm32-hash.c +++ b/drivers/crypto/stm32/stm32-hash.c @@ -2114,13 +2114,9 @@ err_reset: static int stm32_hash_remove(struct platform_device *pdev) { - struct stm32_hash_dev *hdev; + struct stm32_hash_dev *hdev = platform_get_drvdata(pdev); int ret; - hdev = platform_get_drvdata(pdev); - if (!hdev) - return -ENODEV; - ret = pm_runtime_get_sync(hdev->dev); stm32_hash_unregister_algs(hdev); From 7f1045c61876addde13b9aeff2d504aa9dabc3a7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Mon, 31 Jul 2023 18:54:56 +0200 Subject: [PATCH 353/656] crypto: stm32 - Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is ignored (apart from emitting a warning) and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Eventually after all drivers are converted, .remove_new() is renamed to .remove(). Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Signed-off-by: Uwe Kleine-König Signed-off-by: Herbert Xu --- drivers/crypto/stm32/stm32-hash.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/crypto/stm32/stm32-hash.c b/drivers/crypto/stm32/stm32-hash.c index b10243035584..68c52eeaa6b1 100644 --- a/drivers/crypto/stm32/stm32-hash.c +++ b/drivers/crypto/stm32/stm32-hash.c @@ -2112,7 +2112,7 @@ err_reset: return ret; } -static int stm32_hash_remove(struct platform_device *pdev) +static void stm32_hash_remove(struct platform_device *pdev) { struct stm32_hash_dev *hdev = platform_get_drvdata(pdev); int ret; @@ -2135,8 +2135,6 @@ static int stm32_hash_remove(struct platform_device *pdev) if (ret >= 0) clk_disable_unprepare(hdev->clk); - - return 0; } #ifdef CONFIG_PM @@ -2173,7 +2171,7 @@ static const struct dev_pm_ops stm32_hash_pm_ops = { static struct platform_driver stm32_hash_driver = { .probe = stm32_hash_probe, - .remove = stm32_hash_remove, + .remove_new = stm32_hash_remove, .driver = { .name = "stm32-hash", .pm = &stm32_hash_pm_ops, From ac2d838fb7c479434513c8d4565a111fb805edaa Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 1 Aug 2023 19:11:46 +0900 Subject: [PATCH 354/656] crypto: arm64/aes - remove Makefile hack Do it more simiply. This also fixes single target builds. [before] $ make ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- arch/arm64/crypto/aes-glue-ce.i [snip] make[4]: *** No rule to make target 'arch/arm64/crypto/aes-glue-ce.i'. Stop. [after] $ make ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- arch/arm64/crypto/aes-glue-ce.i [snip] CPP arch/arm64/crypto/aes-glue-ce.i Signed-off-by: Masahiro Yamada Acked-by: Will Deacon Signed-off-by: Herbert Xu --- arch/arm64/crypto/Makefile | 5 ----- arch/arm64/crypto/aes-glue-ce.c | 2 ++ arch/arm64/crypto/aes-glue-neon.c | 1 + 3 files changed, 3 insertions(+), 5 deletions(-) create mode 100644 arch/arm64/crypto/aes-glue-ce.c create mode 100644 arch/arm64/crypto/aes-glue-neon.c diff --git a/arch/arm64/crypto/Makefile b/arch/arm64/crypto/Makefile index 4818e204c2ac..fbe64dce66e0 100644 --- a/arch/arm64/crypto/Makefile +++ b/arch/arm64/crypto/Makefile @@ -81,11 +81,6 @@ aes-arm64-y := aes-cipher-core.o aes-cipher-glue.o obj-$(CONFIG_CRYPTO_AES_ARM64_BS) += aes-neon-bs.o aes-neon-bs-y := aes-neonbs-core.o aes-neonbs-glue.o -CFLAGS_aes-glue-ce.o := -DUSE_V8_CRYPTO_EXTENSIONS - -$(obj)/aes-glue-%.o: $(src)/aes-glue.c FORCE - $(call if_changed_rule,cc_o_c) - quiet_cmd_perlasm = PERLASM $@ cmd_perlasm = $(PERL) $(<) void $(@) diff --git a/arch/arm64/crypto/aes-glue-ce.c b/arch/arm64/crypto/aes-glue-ce.c new file mode 100644 index 000000000000..7d309ceeddf3 --- /dev/null +++ b/arch/arm64/crypto/aes-glue-ce.c @@ -0,0 +1,2 @@ +#define USE_V8_CRYPTO_EXTENSIONS +#include "aes-glue.c" diff --git a/arch/arm64/crypto/aes-glue-neon.c b/arch/arm64/crypto/aes-glue-neon.c new file mode 100644 index 000000000000..8ba046321064 --- /dev/null +++ b/arch/arm64/crypto/aes-glue-neon.c @@ -0,0 +1 @@ +#include "aes-glue.c" From 6b4b53ca0b7300ba2af98a49dbce22054bf034fe Mon Sep 17 00:00:00 2001 From: Frederick Lawler Date: Tue, 1 Aug 2023 08:57:09 -0500 Subject: [PATCH 355/656] crypto: af_alg - Decrement struct key.usage in alg_set_by_key_serial() Calls to lookup_user_key() require a corresponding key_put() to decrement the usage counter. Once it reaches zero, we schedule key GC. Therefore decrement struct key.usage in alg_set_by_key_serial(). Fixes: 7984ceb134bf ("crypto: af_alg - Support symmetric encryption via keyring keys") Cc: Signed-off-by: Frederick Lawler Signed-off-by: Herbert Xu --- crypto/af_alg.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/crypto/af_alg.c b/crypto/af_alg.c index 9ee8575d3b1a..e9969dc0e83c 100644 --- a/crypto/af_alg.c +++ b/crypto/af_alg.c @@ -320,18 +320,21 @@ static int alg_setkey_by_key_serial(struct alg_sock *ask, sockptr_t optval, if (IS_ERR(ret)) { up_read(&key->sem); + key_put(key); return PTR_ERR(ret); } key_data = sock_kmalloc(&ask->sk, key_datalen, GFP_KERNEL); if (!key_data) { up_read(&key->sem); + key_put(key); return -ENOMEM; } memcpy(key_data, ret, key_datalen); up_read(&key->sem); + key_put(key); err = type->setkey(ask->private, key_data, key_datalen); From dd8e82f4fa9f0ef18e4409a817609f794ea2d468 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Wed, 2 Aug 2023 17:14:27 +0800 Subject: [PATCH 356/656] crypto: qat - use kfree_sensitive instead of memset/kfree() Use kfree_sensitive() instead of memset() and kfree(). Signed-off-by: Yang Yingliang Acked-by: Giovanni Cabiddu Signed-off-by: Herbert Xu --- drivers/crypto/intel/qat/qat_common/qat_compression.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/crypto/intel/qat/qat_common/qat_compression.c b/drivers/crypto/intel/qat/qat_common/qat_compression.c index 3f1f35283266..7842a9f22178 100644 --- a/drivers/crypto/intel/qat/qat_common/qat_compression.c +++ b/drivers/crypto/intel/qat/qat_common/qat_compression.c @@ -234,8 +234,7 @@ static void qat_free_dc_data(struct adf_accel_dev *accel_dev) dma_unmap_single(dev, dc_data->ovf_buff_p, dc_data->ovf_buff_sz, DMA_FROM_DEVICE); - memset(dc_data->ovf_buff, 0, dc_data->ovf_buff_sz); - kfree(dc_data->ovf_buff); + kfree_sensitive(dc_data->ovf_buff); devm_kfree(dev, dc_data); accel_dev->dc_data = NULL; } From 7999b615fd18e2c2d1aa540b930341c494c0c3e7 Mon Sep 17 00:00:00 2001 From: Ruan Jinjie Date: Thu, 3 Aug 2023 17:29:33 +0800 Subject: [PATCH 357/656] crypto: hisilicon/sec - Do not check for 0 return after calling platform_get_irq() Since commit ce753ad1549c ("platform: finally disallow IRQ0 in platform_get_irq() and its ilk"), there is no possible for platform_get_irq() to return 0. Use the return value from platform_get_irq(). Signed-off-by: Ruan Jinjie Signed-off-by: Herbert Xu --- drivers/crypto/hisilicon/sec/sec_drv.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/crypto/hisilicon/sec/sec_drv.c b/drivers/crypto/hisilicon/sec/sec_drv.c index e75851326c1e..e1e08993de12 100644 --- a/drivers/crypto/hisilicon/sec/sec_drv.c +++ b/drivers/crypto/hisilicon/sec/sec_drv.c @@ -1107,8 +1107,8 @@ static int sec_queue_res_cfg(struct sec_queue *queue) } queue->task_irq = platform_get_irq(to_platform_device(dev), queue->queue_id * 2 + 1); - if (queue->task_irq <= 0) { - ret = -EINVAL; + if (queue->task_irq < 0) { + ret = queue->task_irq; goto err_free_ring_db; } From 9ae4577bc077a7e32c3c7d442c95bc76865c0f17 Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Thu, 3 Aug 2023 17:59:28 +0800 Subject: [PATCH 358/656] crypto: api - Use work queue in crypto_destroy_instance The function crypto_drop_spawn expects to be called in process context. However, when an instance is unregistered while it still has active users, the last user may cause the instance to be freed in atomic context. Fix this by delaying the freeing to a work queue. Fixes: 6bfd48096ff8 ("[CRYPTO] api: Added spawns") Reported-by: Florent Revest Reported-by: syzbot+d769eed29cc42d75e2a3@syzkaller.appspotmail.com Reported-by: syzbot+610ec0671f51e838436e@syzkaller.appspotmail.com Signed-off-by: Herbert Xu Tested-by: Florent Revest Acked-by: Florent Revest Signed-off-by: Herbert Xu --- crypto/algapi.c | 16 ++++++++++++++-- include/crypto/algapi.h | 3 +++ 2 files changed, 17 insertions(+), 2 deletions(-) diff --git a/crypto/algapi.c b/crypto/algapi.c index 5e7cd603d489..4fe95c448047 100644 --- a/crypto/algapi.c +++ b/crypto/algapi.c @@ -17,6 +17,7 @@ #include #include #include +#include #include "internal.h" @@ -74,15 +75,26 @@ static void crypto_free_instance(struct crypto_instance *inst) inst->alg.cra_type->free(inst); } -static void crypto_destroy_instance(struct crypto_alg *alg) +static void crypto_destroy_instance_workfn(struct work_struct *w) { - struct crypto_instance *inst = (void *)alg; + struct crypto_instance *inst = container_of(w, struct crypto_instance, + free_work); struct crypto_template *tmpl = inst->tmpl; crypto_free_instance(inst); crypto_tmpl_put(tmpl); } +static void crypto_destroy_instance(struct crypto_alg *alg) +{ + struct crypto_instance *inst = container_of(alg, + struct crypto_instance, + alg); + + INIT_WORK(&inst->free_work, crypto_destroy_instance_workfn); + schedule_work(&inst->free_work); +} + /* * This function adds a spawn to the list secondary_spawns which * will be used at the end of crypto_remove_spawns to unregister diff --git a/include/crypto/algapi.h b/include/crypto/algapi.h index 6156161b181f..ca86f4c6ba43 100644 --- a/include/crypto/algapi.h +++ b/include/crypto/algapi.h @@ -12,6 +12,7 @@ #include #include #include +#include /* * Maximum values for blocksize and alignmask, used to allocate @@ -82,6 +83,8 @@ struct crypto_instance { struct crypto_spawn *spawns; }; + struct work_struct free_work; + void *__ctx[] CRYPTO_MINALIGN_ATTR; }; From 2a598d0b2800aa23ba51adcf060cec524aaa63b2 Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Fri, 4 Aug 2023 17:24:34 +0800 Subject: [PATCH 359/656] crypto: lib - Move mpi into lib/crypto As lib/mpi is mostly used by crypto code, move it under lib/crypto so that patches touching it get directed to the right mailing list. Signed-off-by: Herbert Xu Reviewed-by: Mimi Zohar Signed-off-by: Herbert Xu --- lib/Makefile | 1 - lib/crypto/Makefile | 2 ++ lib/{ => crypto}/mpi/Makefile | 0 lib/{ => crypto}/mpi/ec.c | 0 lib/{ => crypto}/mpi/generic_mpih-add1.c | 0 lib/{ => crypto}/mpi/generic_mpih-lshift.c | 0 lib/{ => crypto}/mpi/generic_mpih-mul1.c | 0 lib/{ => crypto}/mpi/generic_mpih-mul2.c | 0 lib/{ => crypto}/mpi/generic_mpih-mul3.c | 0 lib/{ => crypto}/mpi/generic_mpih-rshift.c | 0 lib/{ => crypto}/mpi/generic_mpih-sub1.c | 0 lib/{ => crypto}/mpi/longlong.h | 0 lib/{ => crypto}/mpi/mpi-add.c | 0 lib/{ => crypto}/mpi/mpi-bit.c | 0 lib/{ => crypto}/mpi/mpi-cmp.c | 0 lib/{ => crypto}/mpi/mpi-div.c | 0 lib/{ => crypto}/mpi/mpi-inline.h | 0 lib/{ => crypto}/mpi/mpi-internal.h | 0 lib/{ => crypto}/mpi/mpi-inv.c | 0 lib/{ => crypto}/mpi/mpi-mod.c | 0 lib/{ => crypto}/mpi/mpi-mul.c | 0 lib/{ => crypto}/mpi/mpi-pow.c | 0 lib/{ => crypto}/mpi/mpi-sub-ui.c | 0 lib/{ => crypto}/mpi/mpicoder.c | 0 lib/{ => crypto}/mpi/mpih-cmp.c | 0 lib/{ => crypto}/mpi/mpih-div.c | 0 lib/{ => crypto}/mpi/mpih-mul.c | 0 lib/{ => crypto}/mpi/mpiutil.c | 0 28 files changed, 2 insertions(+), 1 deletion(-) rename lib/{ => crypto}/mpi/Makefile (100%) rename lib/{ => crypto}/mpi/ec.c (100%) rename lib/{ => crypto}/mpi/generic_mpih-add1.c (100%) rename lib/{ => crypto}/mpi/generic_mpih-lshift.c (100%) rename lib/{ => crypto}/mpi/generic_mpih-mul1.c (100%) rename lib/{ => crypto}/mpi/generic_mpih-mul2.c (100%) rename lib/{ => crypto}/mpi/generic_mpih-mul3.c (100%) rename lib/{ => crypto}/mpi/generic_mpih-rshift.c (100%) rename lib/{ => crypto}/mpi/generic_mpih-sub1.c (100%) rename lib/{ => crypto}/mpi/longlong.h (100%) rename lib/{ => crypto}/mpi/mpi-add.c (100%) rename lib/{ => crypto}/mpi/mpi-bit.c (100%) rename lib/{ => crypto}/mpi/mpi-cmp.c (100%) rename lib/{ => crypto}/mpi/mpi-div.c (100%) rename lib/{ => crypto}/mpi/mpi-inline.h (100%) rename lib/{ => crypto}/mpi/mpi-internal.h (100%) rename lib/{ => crypto}/mpi/mpi-inv.c (100%) rename lib/{ => crypto}/mpi/mpi-mod.c (100%) rename lib/{ => crypto}/mpi/mpi-mul.c (100%) rename lib/{ => crypto}/mpi/mpi-pow.c (100%) rename lib/{ => crypto}/mpi/mpi-sub-ui.c (100%) rename lib/{ => crypto}/mpi/mpicoder.c (100%) rename lib/{ => crypto}/mpi/mpih-cmp.c (100%) rename lib/{ => crypto}/mpi/mpih-div.c (100%) rename lib/{ => crypto}/mpi/mpih-mul.c (100%) rename lib/{ => crypto}/mpi/mpiutil.c (100%) diff --git a/lib/Makefile b/lib/Makefile index 42d307ade225..1f5235478259 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -253,7 +253,6 @@ obj-$(CONFIG_DQL) += dynamic_queue_limits.o obj-$(CONFIG_GLOB) += glob.o obj-$(CONFIG_GLOB_SELFTEST) += globtest.o -obj-$(CONFIG_MPILIB) += mpi/ obj-$(CONFIG_DIMLIB) += dim/ obj-$(CONFIG_SIGNATURE) += digsig.o diff --git a/lib/crypto/Makefile b/lib/crypto/Makefile index 6ec2d4543d9c..8d1446c2be71 100644 --- a/lib/crypto/Makefile +++ b/lib/crypto/Makefile @@ -53,3 +53,5 @@ libblake2s-y += blake2s-selftest.o libchacha20poly1305-y += chacha20poly1305-selftest.o libcurve25519-y += curve25519-selftest.o endif + +obj-$(CONFIG_MPILIB) += mpi/ diff --git a/lib/mpi/Makefile b/lib/crypto/mpi/Makefile similarity index 100% rename from lib/mpi/Makefile rename to lib/crypto/mpi/Makefile diff --git a/lib/mpi/ec.c b/lib/crypto/mpi/ec.c similarity index 100% rename from lib/mpi/ec.c rename to lib/crypto/mpi/ec.c diff --git a/lib/mpi/generic_mpih-add1.c b/lib/crypto/mpi/generic_mpih-add1.c similarity index 100% rename from lib/mpi/generic_mpih-add1.c rename to lib/crypto/mpi/generic_mpih-add1.c diff --git a/lib/mpi/generic_mpih-lshift.c b/lib/crypto/mpi/generic_mpih-lshift.c similarity index 100% rename from lib/mpi/generic_mpih-lshift.c rename to lib/crypto/mpi/generic_mpih-lshift.c diff --git a/lib/mpi/generic_mpih-mul1.c b/lib/crypto/mpi/generic_mpih-mul1.c similarity index 100% rename from lib/mpi/generic_mpih-mul1.c rename to lib/crypto/mpi/generic_mpih-mul1.c diff --git a/lib/mpi/generic_mpih-mul2.c b/lib/crypto/mpi/generic_mpih-mul2.c similarity index 100% rename from lib/mpi/generic_mpih-mul2.c rename to lib/crypto/mpi/generic_mpih-mul2.c diff --git a/lib/mpi/generic_mpih-mul3.c b/lib/crypto/mpi/generic_mpih-mul3.c similarity index 100% rename from lib/mpi/generic_mpih-mul3.c rename to lib/crypto/mpi/generic_mpih-mul3.c diff --git a/lib/mpi/generic_mpih-rshift.c b/lib/crypto/mpi/generic_mpih-rshift.c similarity index 100% rename from lib/mpi/generic_mpih-rshift.c rename to lib/crypto/mpi/generic_mpih-rshift.c diff --git a/lib/mpi/generic_mpih-sub1.c b/lib/crypto/mpi/generic_mpih-sub1.c similarity index 100% rename from lib/mpi/generic_mpih-sub1.c rename to lib/crypto/mpi/generic_mpih-sub1.c diff --git a/lib/mpi/longlong.h b/lib/crypto/mpi/longlong.h similarity index 100% rename from lib/mpi/longlong.h rename to lib/crypto/mpi/longlong.h diff --git a/lib/mpi/mpi-add.c b/lib/crypto/mpi/mpi-add.c similarity index 100% rename from lib/mpi/mpi-add.c rename to lib/crypto/mpi/mpi-add.c diff --git a/lib/mpi/mpi-bit.c b/lib/crypto/mpi/mpi-bit.c similarity index 100% rename from lib/mpi/mpi-bit.c rename to lib/crypto/mpi/mpi-bit.c diff --git a/lib/mpi/mpi-cmp.c b/lib/crypto/mpi/mpi-cmp.c similarity index 100% rename from lib/mpi/mpi-cmp.c rename to lib/crypto/mpi/mpi-cmp.c diff --git a/lib/mpi/mpi-div.c b/lib/crypto/mpi/mpi-div.c similarity index 100% rename from lib/mpi/mpi-div.c rename to lib/crypto/mpi/mpi-div.c diff --git a/lib/mpi/mpi-inline.h b/lib/crypto/mpi/mpi-inline.h similarity index 100% rename from lib/mpi/mpi-inline.h rename to lib/crypto/mpi/mpi-inline.h diff --git a/lib/mpi/mpi-internal.h b/lib/crypto/mpi/mpi-internal.h similarity index 100% rename from lib/mpi/mpi-internal.h rename to lib/crypto/mpi/mpi-internal.h diff --git a/lib/mpi/mpi-inv.c b/lib/crypto/mpi/mpi-inv.c similarity index 100% rename from lib/mpi/mpi-inv.c rename to lib/crypto/mpi/mpi-inv.c diff --git a/lib/mpi/mpi-mod.c b/lib/crypto/mpi/mpi-mod.c similarity index 100% rename from lib/mpi/mpi-mod.c rename to lib/crypto/mpi/mpi-mod.c diff --git a/lib/mpi/mpi-mul.c b/lib/crypto/mpi/mpi-mul.c similarity index 100% rename from lib/mpi/mpi-mul.c rename to lib/crypto/mpi/mpi-mul.c diff --git a/lib/mpi/mpi-pow.c b/lib/crypto/mpi/mpi-pow.c similarity index 100% rename from lib/mpi/mpi-pow.c rename to lib/crypto/mpi/mpi-pow.c diff --git a/lib/mpi/mpi-sub-ui.c b/lib/crypto/mpi/mpi-sub-ui.c similarity index 100% rename from lib/mpi/mpi-sub-ui.c rename to lib/crypto/mpi/mpi-sub-ui.c diff --git a/lib/mpi/mpicoder.c b/lib/crypto/mpi/mpicoder.c similarity index 100% rename from lib/mpi/mpicoder.c rename to lib/crypto/mpi/mpicoder.c diff --git a/lib/mpi/mpih-cmp.c b/lib/crypto/mpi/mpih-cmp.c similarity index 100% rename from lib/mpi/mpih-cmp.c rename to lib/crypto/mpi/mpih-cmp.c diff --git a/lib/mpi/mpih-div.c b/lib/crypto/mpi/mpih-div.c similarity index 100% rename from lib/mpi/mpih-div.c rename to lib/crypto/mpi/mpih-div.c diff --git a/lib/mpi/mpih-mul.c b/lib/crypto/mpi/mpih-mul.c similarity index 100% rename from lib/mpi/mpih-mul.c rename to lib/crypto/mpi/mpih-mul.c diff --git a/lib/mpi/mpiutil.c b/lib/crypto/mpi/mpiutil.c similarity index 100% rename from lib/mpi/mpiutil.c rename to lib/crypto/mpi/mpiutil.c From 9e47a758b70167c9301d2b44d2569f86c7796f2d Mon Sep 17 00:00:00 2001 From: Mark O'Donovan Date: Fri, 4 Aug 2023 09:32:18 +0000 Subject: [PATCH 360/656] crypto: lib/mpi - avoid null pointer deref in mpi_cmp_ui() During NVMeTCP Authentication a controller can trigger a kernel oops by specifying the 8192 bit Diffie Hellman group and passing a correctly sized, but zeroed Diffie Hellamn value. mpi_cmp_ui() was detecting this if the second parameter was 0, but 1 is passed from dh_is_pubkey_valid(). This causes the null pointer u->d to be dereferenced towards the end of mpi_cmp_ui() Signed-off-by: Mark O'Donovan Signed-off-by: Herbert Xu --- lib/crypto/mpi/mpi-cmp.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/lib/crypto/mpi/mpi-cmp.c b/lib/crypto/mpi/mpi-cmp.c index c4cfa3ff0581..0835b6213235 100644 --- a/lib/crypto/mpi/mpi-cmp.c +++ b/lib/crypto/mpi/mpi-cmp.c @@ -25,8 +25,12 @@ int mpi_cmp_ui(MPI u, unsigned long v) mpi_limb_t limb = v; mpi_normalize(u); - if (!u->nlimbs && !limb) - return 0; + if (u->nlimbs == 0) { + if (v == 0) + return 0; + else + return -1; + } if (u->sign) return -1; if (u->nlimbs > 1) From 91cb1e1432b3d873a0c8831d0dd8022db98ac8b8 Mon Sep 17 00:00:00 2001 From: Joachim Vandersmissen Date: Sun, 6 Aug 2023 14:19:03 -0500 Subject: [PATCH 361/656] crypto: jitter - Add clarifying comments to Jitter Entropy RCT cutoff values The RCT cutoff values are correct, but they don't exactly match the ones one would expect when computing them using the formula in SP800-90B. This discrepancy is due to the fact that the Jitter Entropy RCT starts at 1. To avoid any confusion by future reviewers, add some comments and explicitly subtract 1 from the "correct" cutoff values in the definitions. Signed-off-by: Joachim Vandersmissen Reviewed-by: Stephan Mueller Signed-off-by: Herbert Xu --- crypto/jitterentropy.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/crypto/jitterentropy.c b/crypto/jitterentropy.c index c7d7f2caa779..fe9c233ec769 100644 --- a/crypto/jitterentropy.c +++ b/crypto/jitterentropy.c @@ -89,10 +89,14 @@ struct rand_data { unsigned int rct_count; /* Number of stuck values */ /* Intermittent health test failure threshold of 2^-30 */ -#define JENT_RCT_CUTOFF 30 /* Taken from SP800-90B sec 4.4.1 */ -#define JENT_APT_CUTOFF 325 /* Taken from SP800-90B sec 4.4.2 */ + /* From an SP800-90B perspective, this RCT cutoff value is equal to 31. */ + /* However, our RCT implementation starts at 1, so we subtract 1 here. */ +#define JENT_RCT_CUTOFF (31 - 1) /* Taken from SP800-90B sec 4.4.1 */ +#define JENT_APT_CUTOFF 325 /* Taken from SP800-90B sec 4.4.2 */ /* Permanent health test failure threshold of 2^-60 */ -#define JENT_RCT_CUTOFF_PERMANENT 60 + /* From an SP800-90B perspective, this RCT cutoff value is equal to 61. */ + /* However, our RCT implementation starts at 1, so we subtract 1 here. */ +#define JENT_RCT_CUTOFF_PERMANENT (61 - 1) #define JENT_APT_CUTOFF_PERMANENT 355 #define JENT_APT_WINDOW_SIZE 512 /* Data window size */ /* LSB of time stamp to process */ From 39df52ddd932244f2cc08ce520ad064b7dc8c278 Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Wed, 9 Aug 2023 15:14:41 +0200 Subject: [PATCH 362/656] gpio: sim: use sysfs_streq() and avoid an strdup() When comparing strings passed to us from configfs, we can pass the page argument directly to sysfs_streq() and avoid manual string trimming. Signed-off-by: Bartosz Golaszewski Reviewed-by: Andy Shevchenko --- drivers/gpio/gpio-sim.c | 15 +++------------ 1 file changed, 3 insertions(+), 12 deletions(-) diff --git a/drivers/gpio/gpio-sim.c b/drivers/gpio/gpio-sim.c index cfbdade841e8..1a3729eb44eb 100644 --- a/drivers/gpio/gpio-sim.c +++ b/drivers/gpio/gpio-sim.c @@ -1272,7 +1272,6 @@ gpio_sim_hog_config_direction_store(struct config_item *item, { struct gpio_sim_hog *hog = to_gpio_sim_hog(item); struct gpio_sim_device *dev = gpio_sim_hog_get_device(hog); - char *trimmed; int dir; mutex_lock(&dev->lock); @@ -1282,23 +1281,15 @@ gpio_sim_hog_config_direction_store(struct config_item *item, return -EBUSY; } - trimmed = gpio_sim_strdup_trimmed(page, count); - if (!trimmed) { - mutex_unlock(&dev->lock); - return -ENOMEM; - } - - if (strcmp(trimmed, "input") == 0) + if (sysfs_streq(page, "input")) dir = GPIOD_IN; - else if (strcmp(trimmed, "output-high") == 0) + else if (sysfs_streq(page, "output-high")) dir = GPIOD_OUT_HIGH; - else if (strcmp(trimmed, "output-low") == 0) + else if (sysfs_streq(page, "output-low")) dir = GPIOD_OUT_LOW; else dir = -EINVAL; - kfree(trimmed); - if (dir < 0) { mutex_unlock(&dev->lock); return dir; From db02247827ef2adc1617839b4bdcc5e1cef3e1ed Mon Sep 17 00:00:00 2001 From: William Breathitt Gray Date: Thu, 10 Aug 2023 18:00:38 -0400 Subject: [PATCH 363/656] gpio: idio-16: Migrate to the regmap API The regmap API supports IO port accessors so we can take advantage of regmap abstractions rather than handling access to the device registers directly in the driver. By leveraging the regmap API, the idio-16 library is reduced to simply a devm_idio_16_regmap_register() function and a configuration structure struct idio_16_regmap_config. Legacy functions and code will be removed once all consumers have migrated to the new idio-16 library interface. For IDIO-16 devices we have the following IRQ registers: Base Address +1 (Write): Clear Interrupt Base Address +2 (Read): Enable Interrupt Base Address +2 (Write): Disable Interrupt An interrupt is asserted whenever a change-of-state is detected on any of the inputs. Any write to 0x2 will disable interrupts, while any read will enable interrupts. Interrupts are cleared by a write to 0x1. For 104-IDIO-16 devices, there is no IRQ status register, so software has to assume that if an interrupt is raised then it was for the 104-IDIO-16 device. For PCI-IDIO-16 devices, there is an additional IRQ register: Base Address +6 (Read): Interrupt Status Interrupt status can be read from 0x6 where bit 2 set indicates that an IRQ has been generated. Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/b45081958ab53dfa697f4a8b15f1bfba46718068.1680618405.git.william.gray@linaro.org/ Signed-off-by: William Breathitt Gray Reviewed-by: Linus Walleij Signed-off-by: Bartosz Golaszewski --- drivers/gpio/Kconfig | 3 + drivers/gpio/gpio-idio-16.c | 155 ++++++++++++++++++++++++++++++++++++ drivers/gpio/gpio-idio-16.h | 26 ++++++ 3 files changed, 184 insertions(+) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index c5324e44b74e..7f5cc69fff23 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -111,6 +111,9 @@ config GPIO_MAX730X config GPIO_IDIO_16 tristate + select REGMAP_IRQ + select GPIOLIB_IRQCHIP + select GPIO_REGMAP help Enables support for the idio-16 library functions. The idio-16 library provides functions to facilitate communication with devices within the diff --git a/drivers/gpio/gpio-idio-16.c b/drivers/gpio/gpio-idio-16.c index 13315242d220..f9349e8d7fdc 100644 --- a/drivers/gpio/gpio-idio-16.c +++ b/drivers/gpio/gpio-idio-16.c @@ -4,9 +4,13 @@ * Copyright (C) 2022 William Breathitt Gray */ #include +#include +#include #include +#include #include #include +#include #include #include @@ -14,6 +18,157 @@ #define DEFAULT_SYMBOL_NAMESPACE GPIO_IDIO_16 +#define IDIO_16_DAT_BASE 0x0 +#define IDIO_16_OUT_BASE IDIO_16_DAT_BASE +#define IDIO_16_IN_BASE (IDIO_16_DAT_BASE + 1) +#define IDIO_16_CLEAR_INTERRUPT 0x1 +#define IDIO_16_ENABLE_IRQ 0x2 +#define IDIO_16_DEACTIVATE_INPUT_FILTERS 0x3 +#define IDIO_16_DISABLE_IRQ IDIO_16_ENABLE_IRQ +#define IDIO_16_INTERRUPT_STATUS 0x6 + +#define IDIO_16_NGPIO 32 +#define IDIO_16_NGPIO_PER_REG 8 +#define IDIO_16_REG_STRIDE 4 + +struct idio_16_data { + struct regmap *map; + unsigned int irq_mask; +}; + +static int idio_16_handle_mask_sync(const int index, const unsigned int mask_buf_def, + const unsigned int mask_buf, void *const irq_drv_data) +{ + struct idio_16_data *const data = irq_drv_data; + const unsigned int prev_mask = data->irq_mask; + int err; + unsigned int val; + + /* exit early if no change since the previous mask */ + if (mask_buf == prev_mask) + return 0; + + /* remember the current mask for the next mask sync */ + data->irq_mask = mask_buf; + + /* if all previously masked, enable interrupts when unmasking */ + if (prev_mask == mask_buf_def) { + err = regmap_write(data->map, IDIO_16_CLEAR_INTERRUPT, 0x00); + if (err) + return err; + return regmap_read(data->map, IDIO_16_ENABLE_IRQ, &val); + } + + /* if all are currently masked, disable interrupts */ + if (mask_buf == mask_buf_def) + return regmap_write(data->map, IDIO_16_DISABLE_IRQ, 0x00); + + return 0; +} + +static int idio_16_reg_mask_xlate(struct gpio_regmap *const gpio, const unsigned int base, + const unsigned int offset, unsigned int *const reg, + unsigned int *const mask) +{ + unsigned int stride; + + /* Input lines start at GPIO 16 */ + if (offset < 16) { + stride = offset / IDIO_16_NGPIO_PER_REG; + *reg = IDIO_16_OUT_BASE + stride * IDIO_16_REG_STRIDE; + } else { + stride = (offset - 16) / IDIO_16_NGPIO_PER_REG; + *reg = IDIO_16_IN_BASE + stride * IDIO_16_REG_STRIDE; + } + + *mask = BIT(offset % IDIO_16_NGPIO_PER_REG); + + return 0; +} + +static const char *idio_16_names[IDIO_16_NGPIO] = { + "OUT0", "OUT1", "OUT2", "OUT3", "OUT4", "OUT5", "OUT6", "OUT7", + "OUT8", "OUT9", "OUT10", "OUT11", "OUT12", "OUT13", "OUT14", "OUT15", + "IIN0", "IIN1", "IIN2", "IIN3", "IIN4", "IIN5", "IIN6", "IIN7", + "IIN8", "IIN9", "IIN10", "IIN11", "IIN12", "IIN13", "IIN14", "IIN15", +}; + +/** + * devm_idio_16_regmap_register - Register an IDIO-16 GPIO device + * @dev: device that is registering this IDIO-16 GPIO device + * @config: configuration for idio_16_regmap_config + * + * Registers an IDIO-16 GPIO device. Returns 0 on success and negative error number on failure. + */ +int devm_idio_16_regmap_register(struct device *const dev, + const struct idio_16_regmap_config *const config) +{ + struct gpio_regmap_config gpio_config = {}; + int err; + struct idio_16_data *data; + struct regmap_irq_chip *chip; + struct regmap_irq_chip_data *chip_data; + + if (!config->parent) + return -EINVAL; + + if (!config->map) + return -EINVAL; + + if (!config->regmap_irqs) + return -EINVAL; + + data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + data->map = config->map; + + chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL); + if (!chip) + return -ENOMEM; + + chip->name = dev_name(dev); + chip->status_base = IDIO_16_INTERRUPT_STATUS; + chip->mask_base = IDIO_16_ENABLE_IRQ; + chip->ack_base = IDIO_16_CLEAR_INTERRUPT; + chip->no_status = config->no_status; + chip->num_regs = 1; + chip->irqs = config->regmap_irqs; + chip->num_irqs = config->num_regmap_irqs; + chip->handle_mask_sync = idio_16_handle_mask_sync; + chip->irq_drv_data = data; + + /* Disable IRQ to prevent spurious interrupts before we're ready */ + err = regmap_write(data->map, IDIO_16_DISABLE_IRQ, 0x00); + if (err) + return err; + + err = devm_regmap_add_irq_chip(dev, data->map, config->irq, 0, 0, chip, &chip_data); + if (err) + return dev_err_probe(dev, err, "IRQ registration failed\n"); + + if (config->filters) { + /* Deactivate input filters */ + err = regmap_write(data->map, IDIO_16_DEACTIVATE_INPUT_FILTERS, 0x00); + if (err) + return err; + } + + gpio_config.parent = config->parent; + gpio_config.regmap = data->map; + gpio_config.ngpio = IDIO_16_NGPIO; + gpio_config.names = idio_16_names; + gpio_config.reg_dat_base = GPIO_REGMAP_ADDR(IDIO_16_DAT_BASE); + gpio_config.reg_set_base = GPIO_REGMAP_ADDR(IDIO_16_DAT_BASE); + gpio_config.ngpio_per_reg = IDIO_16_NGPIO_PER_REG; + gpio_config.reg_stride = IDIO_16_REG_STRIDE; + gpio_config.irq_domain = regmap_irq_get_domain(chip_data); + gpio_config.reg_mask_xlate = idio_16_reg_mask_xlate; + + return PTR_ERR_OR_ZERO(devm_gpio_regmap_register(dev, &gpio_config)); +} +EXPORT_SYMBOL_GPL(devm_idio_16_regmap_register); + /** * idio_16_get - get signal value at signal offset * @reg: ACCES IDIO-16 device registers diff --git a/drivers/gpio/gpio-idio-16.h b/drivers/gpio/gpio-idio-16.h index 928f8251a2bd..255bd8504ed7 100644 --- a/drivers/gpio/gpio-idio-16.h +++ b/drivers/gpio/gpio-idio-16.h @@ -6,6 +6,30 @@ #include #include +struct device; +struct regmap; +struct regmap_irq; + +/** + * struct idio_16_regmap_config - Configuration for the IDIO-16 register map + * @parent: parent device + * @map: regmap for the IDIO-16 device + * @regmap_irqs: descriptors for individual IRQs + * @num_regmap_irqs: number of IRQ descriptors + * @irq: IRQ number for the IDIO-16 device + * @no_status: device has no status register + * @filters: device has input filters + */ +struct idio_16_regmap_config { + struct device *parent; + struct regmap *map; + const struct regmap_irq *regmap_irqs; + int num_regmap_irqs; + unsigned int irq; + bool no_status; + bool filters; +}; + /** * struct idio_16 - IDIO-16 registers structure * @out0_7: Read: FET Drive Outputs 0-7 @@ -68,4 +92,6 @@ void idio_16_set_multiple(struct idio_16 __iomem *reg, const unsigned long *mask, const unsigned long *bits); void idio_16_state_init(struct idio_16_state *state); +int devm_idio_16_regmap_register(struct device *dev, const struct idio_16_regmap_config *config); + #endif /* _IDIO_16_H_ */ From 2c210c9a34a31076e03afee3eae7a748e56a75e9 Mon Sep 17 00:00:00 2001 From: William Breathitt Gray Date: Thu, 10 Aug 2023 18:00:39 -0400 Subject: [PATCH 364/656] gpio: 104-idio-16: Migrate to the regmap API The regmap API supports IO port accessors so we can take advantage of regmap abstractions rather than handling access to the device registers directly in the driver. Migrate the 104-idio-16 module to the new idio-16 library interface leveraging the gpio-regmap API. Suggested-by: Andy Shevchenko Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/1f24a1f18c9a9daa4983713e0a5b53e838d624a8.1680618405.git.william.gray@linaro.org/ Signed-off-by: William Breathitt Gray Reviewed-by: Linus Walleij Signed-off-by: Bartosz Golaszewski --- drivers/gpio/Kconfig | 2 +- drivers/gpio/gpio-104-idio-16.c | 286 +++++++------------------------- 2 files changed, 64 insertions(+), 224 deletions(-) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 7f5cc69fff23..8bc60a6ce3a9 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -872,7 +872,7 @@ config GPIO_104_IDIO_16 tristate "ACCES 104-IDIO-16 GPIO support" depends on PC104 select ISA_BUS_API - select GPIOLIB_IRQCHIP + select REGMAP_MMIO select GPIO_IDIO_16 help Enables GPIO support for the ACCES 104-IDIO-16 family (104-IDIO-16, diff --git a/drivers/gpio/gpio-104-idio-16.c b/drivers/gpio/gpio-104-idio-16.c index 098fbefdbe22..f03ccd0f534c 100644 --- a/drivers/gpio/gpio-104-idio-16.c +++ b/drivers/gpio/gpio-104-idio-16.c @@ -6,19 +6,16 @@ * This driver supports the following ACCES devices: 104-IDIO-16, * 104-IDIO-16E, 104-IDO-16, 104-IDIO-8, 104-IDIO-8E, and 104-IDO-8. */ -#include +#include #include -#include -#include -#include +#include #include -#include -#include +#include #include #include #include #include -#include +#include #include #include "gpio-idio-16.h" @@ -36,187 +33,62 @@ static unsigned int num_irq; module_param_hw_array(irq, uint, irq, &num_irq, 0); MODULE_PARM_DESC(irq, "ACCES 104-IDIO-16 interrupt line numbers"); -/** - * struct idio_16_gpio - GPIO device private data structure - * @chip: instance of the gpio_chip - * @lock: synchronization lock to prevent I/O race conditions - * @irq_mask: I/O bits affected by interrupts - * @reg: I/O address offset for the device registers - * @state: ACCES IDIO-16 device state - */ -struct idio_16_gpio { - struct gpio_chip chip; - raw_spinlock_t lock; - unsigned long irq_mask; - struct idio_16 __iomem *reg; - struct idio_16_state state; +static const struct regmap_range idio_16_wr_ranges[] = { + regmap_reg_range(0x0, 0x2), regmap_reg_range(0x4, 0x4), +}; +static const struct regmap_range idio_16_rd_ranges[] = { + regmap_reg_range(0x1, 0x2), regmap_reg_range(0x5, 0x5), +}; +static const struct regmap_range idio_16_precious_ranges[] = { + regmap_reg_range(0x2, 0x2), +}; +static const struct regmap_access_table idio_16_wr_table = { + .yes_ranges = idio_16_wr_ranges, + .n_yes_ranges = ARRAY_SIZE(idio_16_wr_ranges), +}; +static const struct regmap_access_table idio_16_rd_table = { + .yes_ranges = idio_16_rd_ranges, + .n_yes_ranges = ARRAY_SIZE(idio_16_rd_ranges), +}; +static const struct regmap_access_table idio_16_precious_table = { + .yes_ranges = idio_16_precious_ranges, + .n_yes_ranges = ARRAY_SIZE(idio_16_precious_ranges), +}; +static const struct regmap_config idio_16_regmap_config = { + .reg_bits = 8, + .reg_stride = 1, + .val_bits = 8, + .io_port = true, + .wr_table = &idio_16_wr_table, + .rd_table = &idio_16_rd_table, + .volatile_table = &idio_16_rd_table, + .precious_table = &idio_16_precious_table, + .cache_type = REGCACHE_FLAT, + .use_raw_spinlock = true, }; -static int idio_16_gpio_get_direction(struct gpio_chip *chip, - unsigned int offset) -{ - if (idio_16_get_direction(offset)) - return GPIO_LINE_DIRECTION_IN; - - return GPIO_LINE_DIRECTION_OUT; -} - -static int idio_16_gpio_direction_input(struct gpio_chip *chip, - unsigned int offset) -{ - return 0; -} - -static int idio_16_gpio_direction_output(struct gpio_chip *chip, - unsigned int offset, int value) -{ - chip->set(chip, offset, value); - return 0; -} - -static int idio_16_gpio_get(struct gpio_chip *chip, unsigned int offset) -{ - struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip); - - return idio_16_get(idio16gpio->reg, &idio16gpio->state, offset); -} - -static int idio_16_gpio_get_multiple(struct gpio_chip *chip, - unsigned long *mask, unsigned long *bits) -{ - struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip); - - idio_16_get_multiple(idio16gpio->reg, &idio16gpio->state, mask, bits); - - return 0; -} - -static void idio_16_gpio_set(struct gpio_chip *chip, unsigned int offset, - int value) -{ - struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip); - - idio_16_set(idio16gpio->reg, &idio16gpio->state, offset, value); -} - -static void idio_16_gpio_set_multiple(struct gpio_chip *chip, - unsigned long *mask, unsigned long *bits) -{ - struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip); - - idio_16_set_multiple(idio16gpio->reg, &idio16gpio->state, mask, bits); -} - -static void idio_16_irq_ack(struct irq_data *data) -{ -} - -static void idio_16_irq_mask(struct irq_data *data) -{ - struct gpio_chip *chip = irq_data_get_irq_chip_data(data); - struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip); - const unsigned long offset = irqd_to_hwirq(data); - unsigned long flags; - - idio16gpio->irq_mask &= ~BIT(offset); - gpiochip_disable_irq(chip, offset); - - if (!idio16gpio->irq_mask) { - raw_spin_lock_irqsave(&idio16gpio->lock, flags); - - iowrite8(0, &idio16gpio->reg->irq_ctl); - - raw_spin_unlock_irqrestore(&idio16gpio->lock, flags); +/* Only input lines (GPIO 16-31) support interrupts */ +#define IDIO_16_REGMAP_IRQ(_id) \ + [16 + _id] = { \ + .mask = BIT(_id), \ + .type = { .types_supported = IRQ_TYPE_EDGE_BOTH }, \ } -} -static void idio_16_irq_unmask(struct irq_data *data) -{ - struct gpio_chip *chip = irq_data_get_irq_chip_data(data); - struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip); - const unsigned long offset = irqd_to_hwirq(data); - const unsigned long prev_irq_mask = idio16gpio->irq_mask; - unsigned long flags; - - gpiochip_enable_irq(chip, offset); - idio16gpio->irq_mask |= BIT(offset); - - if (!prev_irq_mask) { - raw_spin_lock_irqsave(&idio16gpio->lock, flags); - - ioread8(&idio16gpio->reg->irq_ctl); - - raw_spin_unlock_irqrestore(&idio16gpio->lock, flags); - } -} - -static int idio_16_irq_set_type(struct irq_data *data, unsigned int flow_type) -{ - /* The only valid irq types are none and both-edges */ - if (flow_type != IRQ_TYPE_NONE && - (flow_type & IRQ_TYPE_EDGE_BOTH) != IRQ_TYPE_EDGE_BOTH) - return -EINVAL; - - return 0; -} - -static const struct irq_chip idio_16_irqchip = { - .name = "104-idio-16", - .irq_ack = idio_16_irq_ack, - .irq_mask = idio_16_irq_mask, - .irq_unmask = idio_16_irq_unmask, - .irq_set_type = idio_16_irq_set_type, - .flags = IRQCHIP_IMMUTABLE, - GPIOCHIP_IRQ_RESOURCE_HELPERS, +static const struct regmap_irq idio_16_regmap_irqs[] = { + IDIO_16_REGMAP_IRQ(0), IDIO_16_REGMAP_IRQ(1), IDIO_16_REGMAP_IRQ(2), /* 0-2 */ + IDIO_16_REGMAP_IRQ(3), IDIO_16_REGMAP_IRQ(4), IDIO_16_REGMAP_IRQ(5), /* 3-5 */ + IDIO_16_REGMAP_IRQ(6), IDIO_16_REGMAP_IRQ(7), IDIO_16_REGMAP_IRQ(8), /* 6-8 */ + IDIO_16_REGMAP_IRQ(9), IDIO_16_REGMAP_IRQ(10), IDIO_16_REGMAP_IRQ(11), /* 9-11 */ + IDIO_16_REGMAP_IRQ(12), IDIO_16_REGMAP_IRQ(13), IDIO_16_REGMAP_IRQ(14), /* 12-14 */ + IDIO_16_REGMAP_IRQ(15), /* 15 */ }; -static irqreturn_t idio_16_irq_handler(int irq, void *dev_id) -{ - struct idio_16_gpio *const idio16gpio = dev_id; - struct gpio_chip *const chip = &idio16gpio->chip; - int gpio; - - for_each_set_bit(gpio, &idio16gpio->irq_mask, chip->ngpio) - generic_handle_domain_irq(chip->irq.domain, gpio); - - raw_spin_lock(&idio16gpio->lock); - - iowrite8(0, &idio16gpio->reg->in0_7); - - raw_spin_unlock(&idio16gpio->lock); - - return IRQ_HANDLED; -} - -#define IDIO_16_NGPIO 32 -static const char *idio_16_names[IDIO_16_NGPIO] = { - "OUT0", "OUT1", "OUT2", "OUT3", "OUT4", "OUT5", "OUT6", "OUT7", - "OUT8", "OUT9", "OUT10", "OUT11", "OUT12", "OUT13", "OUT14", "OUT15", - "IIN0", "IIN1", "IIN2", "IIN3", "IIN4", "IIN5", "IIN6", "IIN7", - "IIN8", "IIN9", "IIN10", "IIN11", "IIN12", "IIN13", "IIN14", "IIN15" -}; - -static int idio_16_irq_init_hw(struct gpio_chip *gc) -{ - struct idio_16_gpio *const idio16gpio = gpiochip_get_data(gc); - - /* Disable IRQ by default */ - iowrite8(0, &idio16gpio->reg->irq_ctl); - iowrite8(0, &idio16gpio->reg->in0_7); - - return 0; -} - static int idio_16_probe(struct device *dev, unsigned int id) { - struct idio_16_gpio *idio16gpio; const char *const name = dev_name(dev); - struct gpio_irq_chip *girq; - int err; - - idio16gpio = devm_kzalloc(dev, sizeof(*idio16gpio), GFP_KERNEL); - if (!idio16gpio) - return -ENOMEM; + struct idio_16_regmap_config config = {}; + void __iomem *regs; + struct regmap *map; if (!devm_request_region(dev, base[id], IDIO_16_EXTENT, name)) { dev_err(dev, "Unable to lock port addresses (0x%X-0x%X)\n", @@ -224,54 +96,22 @@ static int idio_16_probe(struct device *dev, unsigned int id) return -EBUSY; } - idio16gpio->reg = devm_ioport_map(dev, base[id], IDIO_16_EXTENT); - if (!idio16gpio->reg) + regs = devm_ioport_map(dev, base[id], IDIO_16_EXTENT); + if (!regs) return -ENOMEM; - idio16gpio->chip.label = name; - idio16gpio->chip.parent = dev; - idio16gpio->chip.owner = THIS_MODULE; - idio16gpio->chip.base = -1; - idio16gpio->chip.ngpio = IDIO_16_NGPIO; - idio16gpio->chip.names = idio_16_names; - idio16gpio->chip.get_direction = idio_16_gpio_get_direction; - idio16gpio->chip.direction_input = idio_16_gpio_direction_input; - idio16gpio->chip.direction_output = idio_16_gpio_direction_output; - idio16gpio->chip.get = idio_16_gpio_get; - idio16gpio->chip.get_multiple = idio_16_gpio_get_multiple; - idio16gpio->chip.set = idio_16_gpio_set; - idio16gpio->chip.set_multiple = idio_16_gpio_set_multiple; + map = devm_regmap_init_mmio(dev, regs, &idio_16_regmap_config); + if (IS_ERR(map)) + return dev_err_probe(dev, PTR_ERR(map), "Unable to initialize register map\n"); - idio_16_state_init(&idio16gpio->state); - /* FET off states are represented by bit values of "1" */ - bitmap_fill(idio16gpio->state.out_state, IDIO_16_NOUT); + config.parent = dev; + config.map = map; + config.regmap_irqs = idio_16_regmap_irqs; + config.num_regmap_irqs = ARRAY_SIZE(idio_16_regmap_irqs); + config.irq = irq[id]; + config.no_status = true; - girq = &idio16gpio->chip.irq; - gpio_irq_chip_set_chip(girq, &idio_16_irqchip); - /* This will let us handle the parent IRQ in the driver */ - girq->parent_handler = NULL; - girq->num_parents = 0; - girq->parents = NULL; - girq->default_type = IRQ_TYPE_NONE; - girq->handler = handle_edge_irq; - girq->init_hw = idio_16_irq_init_hw; - - raw_spin_lock_init(&idio16gpio->lock); - - err = devm_gpiochip_add_data(dev, &idio16gpio->chip, idio16gpio); - if (err) { - dev_err(dev, "GPIO registering failed (%d)\n", err); - return err; - } - - err = devm_request_irq(dev, irq[id], idio_16_irq_handler, 0, name, - idio16gpio); - if (err) { - dev_err(dev, "IRQ handler registering failed (%d)\n", err); - return err; - } - - return 0; + return devm_idio_16_regmap_register(dev, &config); } static struct isa_driver idio_16_driver = { From 73d8f3efc5c2b757ab06685741df01eaed8090c4 Mon Sep 17 00:00:00 2001 From: William Breathitt Gray Date: Thu, 10 Aug 2023 18:00:40 -0400 Subject: [PATCH 365/656] gpio: pci-idio-16: Migrate to the regmap API The regmap API supports IO port accessors so we can take advantage of regmap abstractions rather than handling access to the device registers directly in the driver. Migrate the pci-idio-16 module to the new idio-16 library interface leveraging the gpio-regmap API. Suggested-by: Andy Shevchenko Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/5ba5405c64aca984d5cf3bdbdffa04c325e5a147.1680618405.git.william.gray@linaro.org/ Signed-off-by: William Breathitt Gray Reviewed-by: Linus Walleij Signed-off-by: Bartosz Golaszewski --- drivers/gpio/Kconfig | 2 +- drivers/gpio/gpio-pci-idio-16.c | 294 +++++++------------------------- 2 files changed, 62 insertions(+), 234 deletions(-) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 8bc60a6ce3a9..864b221252b2 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -1655,7 +1655,7 @@ config GPIO_PCH config GPIO_PCI_IDIO_16 tristate "ACCES PCI-IDIO-16 GPIO support" - select GPIOLIB_IRQCHIP + select REGMAP_MMIO select GPIO_IDIO_16 help Enables GPIO support for the ACCES PCI-IDIO-16. An interrupt is diff --git a/drivers/gpio/gpio-pci-idio-16.c b/drivers/gpio/gpio-pci-idio-16.c index 6726c32e31e6..44c0a21b1d1d 100644 --- a/drivers/gpio/gpio-pci-idio-16.c +++ b/drivers/gpio/gpio-pci-idio-16.c @@ -5,214 +5,75 @@ */ #include #include -#include -#include -#include -#include +#include +#include #include #include #include -#include +#include #include #include "gpio-idio-16.h" -/** - * struct idio_16_gpio - GPIO device private data structure - * @chip: instance of the gpio_chip - * @lock: synchronization lock to prevent I/O race conditions - * @reg: I/O address offset for the GPIO device registers - * @state: ACCES IDIO-16 device state - * @irq_mask: I/O bits affected by interrupts - */ -struct idio_16_gpio { - struct gpio_chip chip; - raw_spinlock_t lock; - struct idio_16 __iomem *reg; - struct idio_16_state state; - unsigned long irq_mask; +static const struct regmap_range idio_16_wr_ranges[] = { + regmap_reg_range(0x0, 0x2), regmap_reg_range(0x3, 0x4), +}; +static const struct regmap_range idio_16_rd_ranges[] = { + regmap_reg_range(0x1, 0x2), regmap_reg_range(0x5, 0x6), +}; +static const struct regmap_range idio_16_precious_ranges[] = { + regmap_reg_range(0x2, 0x2), +}; +static const struct regmap_access_table idio_16_wr_table = { + .yes_ranges = idio_16_wr_ranges, + .n_yes_ranges = ARRAY_SIZE(idio_16_wr_ranges), +}; +static const struct regmap_access_table idio_16_rd_table = { + .yes_ranges = idio_16_rd_ranges, + .n_yes_ranges = ARRAY_SIZE(idio_16_rd_ranges), +}; +static const struct regmap_access_table idio_16_precious_table = { + .yes_ranges = idio_16_precious_ranges, + .n_yes_ranges = ARRAY_SIZE(idio_16_precious_ranges), +}; +static const struct regmap_config idio_16_regmap_config = { + .reg_bits = 8, + .reg_stride = 1, + .val_bits = 8, + .io_port = true, + .wr_table = &idio_16_wr_table, + .rd_table = &idio_16_rd_table, + .volatile_table = &idio_16_rd_table, + .precious_table = &idio_16_precious_table, + .cache_type = REGCACHE_FLAT, + .use_raw_spinlock = true, }; -static int idio_16_gpio_get_direction(struct gpio_chip *chip, - unsigned int offset) -{ - if (idio_16_get_direction(offset)) - return GPIO_LINE_DIRECTION_IN; - - return GPIO_LINE_DIRECTION_OUT; -} - -static int idio_16_gpio_direction_input(struct gpio_chip *chip, - unsigned int offset) -{ - return 0; -} - -static int idio_16_gpio_direction_output(struct gpio_chip *chip, - unsigned int offset, int value) -{ - chip->set(chip, offset, value); - return 0; -} - -static int idio_16_gpio_get(struct gpio_chip *chip, unsigned int offset) -{ - struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip); - - return idio_16_get(idio16gpio->reg, &idio16gpio->state, offset); -} - -static int idio_16_gpio_get_multiple(struct gpio_chip *chip, - unsigned long *mask, unsigned long *bits) -{ - struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip); - - idio_16_get_multiple(idio16gpio->reg, &idio16gpio->state, mask, bits); - return 0; -} - -static void idio_16_gpio_set(struct gpio_chip *chip, unsigned int offset, - int value) -{ - struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip); - - idio_16_set(idio16gpio->reg, &idio16gpio->state, offset, value); -} - -static void idio_16_gpio_set_multiple(struct gpio_chip *chip, - unsigned long *mask, unsigned long *bits) -{ - struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip); - - idio_16_set_multiple(idio16gpio->reg, &idio16gpio->state, mask, bits); -} - -static void idio_16_irq_ack(struct irq_data *data) -{ -} - -static void idio_16_irq_mask(struct irq_data *data) -{ - struct gpio_chip *chip = irq_data_get_irq_chip_data(data); - struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip); - const unsigned long mask = BIT(irqd_to_hwirq(data)); - unsigned long flags; - - idio16gpio->irq_mask &= ~mask; - - if (!idio16gpio->irq_mask) { - raw_spin_lock_irqsave(&idio16gpio->lock, flags); - - iowrite8(0, &idio16gpio->reg->irq_ctl); - - raw_spin_unlock_irqrestore(&idio16gpio->lock, flags); +/* Only input lines (GPIO 16-31) support interrupts */ +#define IDIO_16_REGMAP_IRQ(_id) \ + [16 + _id] = { \ + .mask = BIT(2), \ + .type = { .types_supported = IRQ_TYPE_EDGE_BOTH }, \ } - gpiochip_disable_irq(chip, irqd_to_hwirq(data)); -} - -static void idio_16_irq_unmask(struct irq_data *data) -{ - struct gpio_chip *chip = irq_data_get_irq_chip_data(data); - struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip); - const unsigned long mask = BIT(irqd_to_hwirq(data)); - const unsigned long prev_irq_mask = idio16gpio->irq_mask; - unsigned long flags; - - gpiochip_enable_irq(chip, irqd_to_hwirq(data)); - - idio16gpio->irq_mask |= mask; - - if (!prev_irq_mask) { - raw_spin_lock_irqsave(&idio16gpio->lock, flags); - - ioread8(&idio16gpio->reg->irq_ctl); - - raw_spin_unlock_irqrestore(&idio16gpio->lock, flags); - } -} - -static int idio_16_irq_set_type(struct irq_data *data, unsigned int flow_type) -{ - /* The only valid irq types are none and both-edges */ - if (flow_type != IRQ_TYPE_NONE && - (flow_type & IRQ_TYPE_EDGE_BOTH) != IRQ_TYPE_EDGE_BOTH) - return -EINVAL; - - return 0; -} - -static const struct irq_chip idio_16_irqchip = { - .name = "pci-idio-16", - .irq_ack = idio_16_irq_ack, - .irq_mask = idio_16_irq_mask, - .irq_unmask = idio_16_irq_unmask, - .irq_set_type = idio_16_irq_set_type, - .flags = IRQCHIP_IMMUTABLE, - GPIOCHIP_IRQ_RESOURCE_HELPERS, +static const struct regmap_irq idio_16_regmap_irqs[] = { + IDIO_16_REGMAP_IRQ(0), IDIO_16_REGMAP_IRQ(1), IDIO_16_REGMAP_IRQ(2), /* 0-2 */ + IDIO_16_REGMAP_IRQ(3), IDIO_16_REGMAP_IRQ(4), IDIO_16_REGMAP_IRQ(5), /* 3-5 */ + IDIO_16_REGMAP_IRQ(6), IDIO_16_REGMAP_IRQ(7), IDIO_16_REGMAP_IRQ(8), /* 6-8 */ + IDIO_16_REGMAP_IRQ(9), IDIO_16_REGMAP_IRQ(10), IDIO_16_REGMAP_IRQ(11), /* 9-11 */ + IDIO_16_REGMAP_IRQ(12), IDIO_16_REGMAP_IRQ(13), IDIO_16_REGMAP_IRQ(14), /* 12-14 */ + IDIO_16_REGMAP_IRQ(15), /* 15 */ }; -static irqreturn_t idio_16_irq_handler(int irq, void *dev_id) -{ - struct idio_16_gpio *const idio16gpio = dev_id; - unsigned int irq_status; - struct gpio_chip *const chip = &idio16gpio->chip; - int gpio; - - raw_spin_lock(&idio16gpio->lock); - - irq_status = ioread8(&idio16gpio->reg->irq_status); - - raw_spin_unlock(&idio16gpio->lock); - - /* Make sure our device generated IRQ */ - if (!(irq_status & 0x3) || !(irq_status & 0x4)) - return IRQ_NONE; - - for_each_set_bit(gpio, &idio16gpio->irq_mask, chip->ngpio) - generic_handle_domain_irq(chip->irq.domain, gpio); - - raw_spin_lock(&idio16gpio->lock); - - /* Clear interrupt */ - iowrite8(0, &idio16gpio->reg->in0_7); - - raw_spin_unlock(&idio16gpio->lock); - - return IRQ_HANDLED; -} - -#define IDIO_16_NGPIO 32 -static const char *idio_16_names[IDIO_16_NGPIO] = { - "OUT0", "OUT1", "OUT2", "OUT3", "OUT4", "OUT5", "OUT6", "OUT7", - "OUT8", "OUT9", "OUT10", "OUT11", "OUT12", "OUT13", "OUT14", "OUT15", - "IIN0", "IIN1", "IIN2", "IIN3", "IIN4", "IIN5", "IIN6", "IIN7", - "IIN8", "IIN9", "IIN10", "IIN11", "IIN12", "IIN13", "IIN14", "IIN15" -}; - -static int idio_16_irq_init_hw(struct gpio_chip *gc) -{ - struct idio_16_gpio *const idio16gpio = gpiochip_get_data(gc); - - /* Disable IRQ by default and clear any pending interrupt */ - iowrite8(0, &idio16gpio->reg->irq_ctl); - iowrite8(0, &idio16gpio->reg->in0_7); - - return 0; -} - static int idio_16_probe(struct pci_dev *pdev, const struct pci_device_id *id) { struct device *const dev = &pdev->dev; - struct idio_16_gpio *idio16gpio; int err; const size_t pci_bar_index = 2; const char *const name = pci_name(pdev); - struct gpio_irq_chip *girq; - - idio16gpio = devm_kzalloc(dev, sizeof(*idio16gpio), GFP_KERNEL); - if (!idio16gpio) - return -ENOMEM; + struct idio_16_regmap_config config = {}; + void __iomem *regs; + struct regmap *map; err = pcim_enable_device(pdev); if (err) { @@ -226,53 +87,20 @@ static int idio_16_probe(struct pci_dev *pdev, const struct pci_device_id *id) return err; } - idio16gpio->reg = pcim_iomap_table(pdev)[pci_bar_index]; + regs = pcim_iomap_table(pdev)[pci_bar_index]; - /* Deactivate input filters */ - iowrite8(0, &idio16gpio->reg->filter_ctl); + map = devm_regmap_init_mmio(dev, regs, &idio_16_regmap_config); + if (IS_ERR(map)) + return dev_err_probe(dev, PTR_ERR(map), "Unable to initialize register map\n"); - idio16gpio->chip.label = name; - idio16gpio->chip.parent = dev; - idio16gpio->chip.owner = THIS_MODULE; - idio16gpio->chip.base = -1; - idio16gpio->chip.ngpio = IDIO_16_NGPIO; - idio16gpio->chip.names = idio_16_names; - idio16gpio->chip.get_direction = idio_16_gpio_get_direction; - idio16gpio->chip.direction_input = idio_16_gpio_direction_input; - idio16gpio->chip.direction_output = idio_16_gpio_direction_output; - idio16gpio->chip.get = idio_16_gpio_get; - idio16gpio->chip.get_multiple = idio_16_gpio_get_multiple; - idio16gpio->chip.set = idio_16_gpio_set; - idio16gpio->chip.set_multiple = idio_16_gpio_set_multiple; + config.parent = dev; + config.map = map; + config.regmap_irqs = idio_16_regmap_irqs; + config.num_regmap_irqs = ARRAY_SIZE(idio_16_regmap_irqs); + config.irq = pdev->irq; + config.filters = true; - idio_16_state_init(&idio16gpio->state); - - girq = &idio16gpio->chip.irq; - gpio_irq_chip_set_chip(girq, &idio_16_irqchip); - /* This will let us handle the parent IRQ in the driver */ - girq->parent_handler = NULL; - girq->num_parents = 0; - girq->parents = NULL; - girq->default_type = IRQ_TYPE_NONE; - girq->handler = handle_edge_irq; - girq->init_hw = idio_16_irq_init_hw; - - raw_spin_lock_init(&idio16gpio->lock); - - err = devm_gpiochip_add_data(dev, &idio16gpio->chip, idio16gpio); - if (err) { - dev_err(dev, "GPIO registering failed (%d)\n", err); - return err; - } - - err = devm_request_irq(dev, pdev->irq, idio_16_irq_handler, IRQF_SHARED, - name, idio16gpio); - if (err) { - dev_err(dev, "IRQ handler registering failed (%d)\n", err); - return err; - } - - return 0; + return devm_idio_16_regmap_register(dev, &config); } static const struct pci_device_id idio_16_pci_dev_id[] = { From 98aaff7c4e65a448545cd46d93e06cb8042f4409 Mon Sep 17 00:00:00 2001 From: William Breathitt Gray Date: Thu, 10 Aug 2023 18:00:41 -0400 Subject: [PATCH 366/656] gpio: idio-16: Remove unused legacy interface All idio-16 library consumers have migrated to the new interface leveraging the gpio-regmap API. Legacy interface functions and code are removed as no longer needed. Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/651cff1cc3eb57b455a8048121cf6a4d4367f018.1680618405.git.william.gray@linaro.org/ Signed-off-by: William Breathitt Gray Reviewed-by: Linus Walleij Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-idio-16.c | 131 +----------------------------------- drivers/gpio/gpio-idio-16.h | 65 ------------------ 2 files changed, 1 insertion(+), 195 deletions(-) diff --git a/drivers/gpio/gpio-idio-16.c b/drivers/gpio/gpio-idio-16.c index f9349e8d7fdc..53b1eb876a12 100644 --- a/drivers/gpio/gpio-idio-16.c +++ b/drivers/gpio/gpio-idio-16.c @@ -3,15 +3,13 @@ * GPIO library for the ACCES IDIO-16 family * Copyright (C) 2022 William Breathitt Gray */ -#include +#include #include #include #include #include -#include #include #include -#include #include #include "gpio-idio-16.h" @@ -169,133 +167,6 @@ int devm_idio_16_regmap_register(struct device *const dev, } EXPORT_SYMBOL_GPL(devm_idio_16_regmap_register); -/** - * idio_16_get - get signal value at signal offset - * @reg: ACCES IDIO-16 device registers - * @state: ACCES IDIO-16 device state - * @offset: offset of signal to get - * - * Returns the signal value (0=low, 1=high) for the signal at @offset. - */ -int idio_16_get(struct idio_16 __iomem *const reg, - struct idio_16_state *const state, const unsigned long offset) -{ - const unsigned long mask = BIT(offset); - - if (offset < IDIO_16_NOUT) - return test_bit(offset, state->out_state); - - if (offset < 24) - return !!(ioread8(®->in0_7) & (mask >> IDIO_16_NOUT)); - - if (offset < 32) - return !!(ioread8(®->in8_15) & (mask >> 24)); - - return -EINVAL; -} -EXPORT_SYMBOL_GPL(idio_16_get); - -/** - * idio_16_get_multiple - get multiple signal values at multiple signal offsets - * @reg: ACCES IDIO-16 device registers - * @state: ACCES IDIO-16 device state - * @mask: mask of signals to get - * @bits: bitmap to store signal values - * - * Stores in @bits the values (0=low, 1=high) for the signals defined by @mask. - */ -void idio_16_get_multiple(struct idio_16 __iomem *const reg, - struct idio_16_state *const state, - const unsigned long *const mask, - unsigned long *const bits) -{ - unsigned long flags; - const unsigned long out_mask = GENMASK(IDIO_16_NOUT - 1, 0); - - spin_lock_irqsave(&state->lock, flags); - - bitmap_replace(bits, bits, state->out_state, &out_mask, IDIO_16_NOUT); - if (*mask & GENMASK(23, 16)) - bitmap_set_value8(bits, ioread8(®->in0_7), 16); - if (*mask & GENMASK(31, 24)) - bitmap_set_value8(bits, ioread8(®->in8_15), 24); - - spin_unlock_irqrestore(&state->lock, flags); -} -EXPORT_SYMBOL_GPL(idio_16_get_multiple); - -/** - * idio_16_set - set signal value at signal offset - * @reg: ACCES IDIO-16 device registers - * @state: ACCES IDIO-16 device state - * @offset: offset of signal to set - * @value: value of signal to set - * - * Assigns output @value for the signal at @offset. - */ -void idio_16_set(struct idio_16 __iomem *const reg, - struct idio_16_state *const state, const unsigned long offset, - const unsigned long value) -{ - unsigned long flags; - - if (offset >= IDIO_16_NOUT) - return; - - spin_lock_irqsave(&state->lock, flags); - - __assign_bit(offset, state->out_state, value); - if (offset < 8) - iowrite8(bitmap_get_value8(state->out_state, 0), ®->out0_7); - else - iowrite8(bitmap_get_value8(state->out_state, 8), ®->out8_15); - - spin_unlock_irqrestore(&state->lock, flags); -} -EXPORT_SYMBOL_GPL(idio_16_set); - -/** - * idio_16_set_multiple - set signal values at multiple signal offsets - * @reg: ACCES IDIO-16 device registers - * @state: ACCES IDIO-16 device state - * @mask: mask of signals to set - * @bits: bitmap of signal output values - * - * Assigns output values defined by @bits for the signals defined by @mask. - */ -void idio_16_set_multiple(struct idio_16 __iomem *const reg, - struct idio_16_state *const state, - const unsigned long *const mask, - const unsigned long *const bits) -{ - unsigned long flags; - - spin_lock_irqsave(&state->lock, flags); - - bitmap_replace(state->out_state, state->out_state, bits, mask, - IDIO_16_NOUT); - if (*mask & GENMASK(7, 0)) - iowrite8(bitmap_get_value8(state->out_state, 0), ®->out0_7); - if (*mask & GENMASK(15, 8)) - iowrite8(bitmap_get_value8(state->out_state, 8), ®->out8_15); - - spin_unlock_irqrestore(&state->lock, flags); -} -EXPORT_SYMBOL_GPL(idio_16_set_multiple); - -/** - * idio_16_state_init - initialize idio_16_state structure - * @state: ACCES IDIO-16 device state - * - * Initializes the ACCES IDIO-16 device @state for use in idio-16 library - * functions. - */ -void idio_16_state_init(struct idio_16_state *const state) -{ - spin_lock_init(&state->lock); -} -EXPORT_SYMBOL_GPL(idio_16_state_init); - MODULE_AUTHOR("William Breathitt Gray"); MODULE_DESCRIPTION("ACCES IDIO-16 GPIO Library"); MODULE_LICENSE("GPL"); diff --git a/drivers/gpio/gpio-idio-16.h b/drivers/gpio/gpio-idio-16.h index 255bd8504ed7..93b08ad73065 100644 --- a/drivers/gpio/gpio-idio-16.h +++ b/drivers/gpio/gpio-idio-16.h @@ -3,9 +3,6 @@ #ifndef _IDIO_16_H_ #define _IDIO_16_H_ -#include -#include - struct device; struct regmap; struct regmap_irq; @@ -30,68 +27,6 @@ struct idio_16_regmap_config { bool filters; }; -/** - * struct idio_16 - IDIO-16 registers structure - * @out0_7: Read: FET Drive Outputs 0-7 - * Write: FET Drive Outputs 0-7 - * @in0_7: Read: Isolated Inputs 0-7 - * Write: Clear Interrupt - * @irq_ctl: Read: Enable IRQ - * Write: Disable IRQ - * @filter_ctl: Read: Activate Input Filters 0-15 - * Write: Deactivate Input Filters 0-15 - * @out8_15: Read: FET Drive Outputs 8-15 - * Write: FET Drive Outputs 8-15 - * @in8_15: Read: Isolated Inputs 8-15 - * Write: Unused - * @irq_status: Read: Interrupt status - * Write: Unused - */ -struct idio_16 { - u8 out0_7; - u8 in0_7; - u8 irq_ctl; - u8 filter_ctl; - u8 out8_15; - u8 in8_15; - u8 irq_status; -}; - -#define IDIO_16_NOUT 16 - -/** - * struct idio_16_state - IDIO-16 state structure - * @lock: synchronization lock for accessing device state - * @out_state: output signals state - */ -struct idio_16_state { - spinlock_t lock; - DECLARE_BITMAP(out_state, IDIO_16_NOUT); -}; - -/** - * idio_16_get_direction - get the I/O direction for a signal offset - * @offset: offset of signal to get direction - * - * Returns the signal direction (0=output, 1=input) for the signal at @offset. - */ -static inline int idio_16_get_direction(const unsigned long offset) -{ - return (offset >= IDIO_16_NOUT) ? 1 : 0; -} - -int idio_16_get(struct idio_16 __iomem *reg, struct idio_16_state *state, - unsigned long offset); -void idio_16_get_multiple(struct idio_16 __iomem *reg, - struct idio_16_state *state, - const unsigned long *mask, unsigned long *bits); -void idio_16_set(struct idio_16 __iomem *reg, struct idio_16_state *state, - unsigned long offset, unsigned long value); -void idio_16_set_multiple(struct idio_16 __iomem *reg, - struct idio_16_state *state, - const unsigned long *mask, const unsigned long *bits); -void idio_16_state_init(struct idio_16_state *state); - int devm_idio_16_regmap_register(struct device *dev, const struct idio_16_regmap_config *config); #endif /* _IDIO_16_H_ */ From 1a200a3966176b89aa038713a00367c9f57f1dff Mon Sep 17 00:00:00 2001 From: William Breathitt Gray Date: Thu, 10 Aug 2023 18:00:42 -0400 Subject: [PATCH 367/656] gpio: pcie-idio-24: Migrate to the regmap API The regmap API supports IO port accessors so we can take advantage of regmap abstractions rather than handling access to the device registers directly in the driver. For the PCIe-IDIO-24 series of devices, the following BARs are available: BAR[0]: memory mapped PEX8311 BAR[1]: I/O mapped PEX8311 BAR[2]: I/O mapped card registers There are 24 FET Output lines, 24 Isolated Input lines, and 8 TTL/CMOS lines (which may be configured for either output or input). The GPIO lines are exposed by the following card registers: Base +0x0-0x2 (Read/Write): FET Outputs Base +0xB (Read/Write): TTL/CMOS Base +0x4-0x6 (Read): Isolated Inputs Base +0x7 (Read): TTL/CMOS In order for the device to support interrupts, the PLX PEX8311 internal PCI wire interrupt and local interrupt input must first be enabled. The following card registers for Change-Of-State may be used: Base +0x8-0xA (Read): COS Status Inputs Base +0x8-0xA (Write): COS Clear Inputs Base +0xB (Read): COS Status TTL/CMOS Base +0xB (Write): COS Clear TTL/CMOS Base +0xE (Read/Write): COS Enable The COS Enable register is used to enable/disable interrupts and configure the interrupt levels; each bit maps to a group of eight inputs as described below: Bit 0: IRQ EN Rising Edge IN0-7 Bit 1: IRQ EN Rising Edge IN8-15 Bit 2: IRQ EN Rising Edge IN16-23 Bit 3: IRQ EN Rising Edge TTL0-7 Bit 4: IRQ EN Falling Edge IN0-7 Bit 5: IRQ EN Falling Edge IN8-15 Bit 6: IRQ EN Falling Edge IN16-23 Bit 7: IRQ EN Falling Edge TTL0-7 An interrupt is asserted when a change-of-state matching the interrupt level configuration respective for a particular group of eight inputs with enabled COS is detected. The COS Status registers may be read to determine which inputs have changed; if interrupts were enabled, an IRQ will be generated for the set bits in these registers. Writing the value read from the COS Status register back to the respective COS Clear register will clear just those interrupts. Reviewed-by: Michael Walle Reviewed-by: Linus Walleij Link: https://lore.kernel.org/r/3091e387b1d2eac011a1d84e493663aa2acf982e.1680708357.git.william.gray@linaro.org/ Signed-off-by: William Breathitt Gray Reviewed-by: Linus Walleij Signed-off-by: Bartosz Golaszewski --- drivers/gpio/Kconfig | 3 + drivers/gpio/gpio-pcie-idio-24.c | 669 +++++++++++-------------------- 2 files changed, 246 insertions(+), 426 deletions(-) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 864b221252b2..3cccc6cc315f 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -1665,7 +1665,10 @@ config GPIO_PCI_IDIO_16 config GPIO_PCIE_IDIO_24 tristate "ACCES PCIe-IDIO-24 GPIO support" + select REGMAP_IRQ + select REGMAP_MMIO select GPIOLIB_IRQCHIP + select GPIO_REGMAP help Enables GPIO support for the ACCES PCIe-IDIO-24 family (PCIe-IDIO-24, PCIe-IDI-24, PCIe-IDO-24, PCIe-IDIO-12). An interrupt is generated diff --git a/drivers/gpio/gpio-pcie-idio-24.c b/drivers/gpio/gpio-pcie-idio-24.c index 463c0613abb9..2efd1b1a0805 100644 --- a/drivers/gpio/gpio-pcie-idio-24.c +++ b/drivers/gpio/gpio-pcie-idio-24.c @@ -6,16 +6,15 @@ * This driver supports the following ACCES devices: PCIe-IDIO-24, * PCIe-IDI-24, PCIe-IDO-24, and PCIe-IDIO-12. */ -#include -#include +#include #include -#include -#include -#include -#include +#include +#include +#include #include #include #include +#include #include #include @@ -59,422 +58,224 @@ #define PLX_PEX8311_PCI_LCS_INTCSR 0x68 #define INTCSR_INTERNAL_PCI_WIRE BIT(8) #define INTCSR_LOCAL_INPUT BIT(11) +#define IDIO_24_ENABLE_IRQ (INTCSR_INTERNAL_PCI_WIRE | INTCSR_LOCAL_INPUT) -/** - * struct idio_24_gpio_reg - GPIO device registers structure - * @out0_7: Read: FET Outputs 0-7 - * Write: FET Outputs 0-7 - * @out8_15: Read: FET Outputs 8-15 - * Write: FET Outputs 8-15 - * @out16_23: Read: FET Outputs 16-23 - * Write: FET Outputs 16-23 - * @ttl_out0_7: Read: TTL/CMOS Outputs 0-7 - * Write: TTL/CMOS Outputs 0-7 - * @in0_7: Read: Isolated Inputs 0-7 - * Write: Reserved - * @in8_15: Read: Isolated Inputs 8-15 - * Write: Reserved - * @in16_23: Read: Isolated Inputs 16-23 - * Write: Reserved - * @ttl_in0_7: Read: TTL/CMOS Inputs 0-7 - * Write: Reserved - * @cos0_7: Read: COS Status Inputs 0-7 - * Write: COS Clear Inputs 0-7 - * @cos8_15: Read: COS Status Inputs 8-15 - * Write: COS Clear Inputs 8-15 - * @cos16_23: Read: COS Status Inputs 16-23 - * Write: COS Clear Inputs 16-23 - * @cos_ttl0_7: Read: COS Status TTL/CMOS 0-7 - * Write: COS Clear TTL/CMOS 0-7 - * @ctl: Read: Control Register - * Write: Control Register - * @reserved: Read: Reserved - * Write: Reserved - * @cos_enable: Read: COS Enable - * Write: COS Enable - * @soft_reset: Read: IRQ Output Pin Status - * Write: Software Board Reset - */ -struct idio_24_gpio_reg { - u8 out0_7; - u8 out8_15; - u8 out16_23; - u8 ttl_out0_7; - u8 in0_7; - u8 in8_15; - u8 in16_23; - u8 ttl_in0_7; - u8 cos0_7; - u8 cos8_15; - u8 cos16_23; - u8 cos_ttl0_7; - u8 ctl; - u8 reserved; - u8 cos_enable; - u8 soft_reset; +#define IDIO_24_OUT_BASE 0x0 +#define IDIO_24_TTLCMOS_OUT_REG 0x3 +#define IDIO_24_IN_BASE 0x4 +#define IDIO_24_TTLCMOS_IN_REG 0x7 +#define IDIO_24_COS_STATUS_BASE 0x8 +#define IDIO_24_CONTROL_REG 0xC +#define IDIO_24_COS_ENABLE 0xE +#define IDIO_24_SOFT_RESET 0xF + +#define CONTROL_REG_OUT_MODE BIT(1) + +#define COS_ENABLE_RISING BIT(1) +#define COS_ENABLE_FALLING BIT(4) +#define COS_ENABLE_BOTH (COS_ENABLE_RISING | COS_ENABLE_FALLING) + +static const struct regmap_config pex8311_intcsr_regmap_config = { + .name = "pex8311_intcsr", + .reg_bits = 32, + .reg_stride = 1, + .reg_base = PLX_PEX8311_PCI_LCS_INTCSR, + .val_bits = 32, + .io_port = true, +}; + +static const struct regmap_range idio_24_wr_ranges[] = { + regmap_reg_range(0x0, 0x3), regmap_reg_range(0x8, 0xC), + regmap_reg_range(0xE, 0xF), +}; +static const struct regmap_range idio_24_rd_ranges[] = { + regmap_reg_range(0x0, 0xC), regmap_reg_range(0xE, 0xF), +}; +static const struct regmap_range idio_24_volatile_ranges[] = { + regmap_reg_range(0x4, 0xB), regmap_reg_range(0xF, 0xF), +}; +static const struct regmap_access_table idio_24_wr_table = { + .yes_ranges = idio_24_wr_ranges, + .n_yes_ranges = ARRAY_SIZE(idio_24_wr_ranges), +}; +static const struct regmap_access_table idio_24_rd_table = { + .yes_ranges = idio_24_rd_ranges, + .n_yes_ranges = ARRAY_SIZE(idio_24_rd_ranges), +}; +static const struct regmap_access_table idio_24_volatile_table = { + .yes_ranges = idio_24_volatile_ranges, + .n_yes_ranges = ARRAY_SIZE(idio_24_volatile_ranges), +}; + +static const struct regmap_config idio_24_regmap_config = { + .reg_bits = 8, + .reg_stride = 1, + .val_bits = 8, + .io_port = true, + .wr_table = &idio_24_wr_table, + .rd_table = &idio_24_rd_table, + .volatile_table = &idio_24_volatile_table, + .cache_type = REGCACHE_FLAT, + .use_raw_spinlock = true, +}; + +#define IDIO_24_NGPIO_PER_REG 8 +#define IDIO_24_REGMAP_IRQ(_id) \ + [24 + _id] = { \ + .reg_offset = (_id) / IDIO_24_NGPIO_PER_REG, \ + .mask = BIT((_id) % IDIO_24_NGPIO_PER_REG), \ + .type = { .types_supported = IRQ_TYPE_EDGE_BOTH }, \ + } +#define IDIO_24_IIN_IRQ(_id) IDIO_24_REGMAP_IRQ(_id) +#define IDIO_24_TTL_IRQ(_id) IDIO_24_REGMAP_IRQ(24 + _id) + +static const struct regmap_irq idio_24_regmap_irqs[] = { + IDIO_24_IIN_IRQ(0), IDIO_24_IIN_IRQ(1), IDIO_24_IIN_IRQ(2), /* IIN 0-2 */ + IDIO_24_IIN_IRQ(3), IDIO_24_IIN_IRQ(4), IDIO_24_IIN_IRQ(5), /* IIN 3-5 */ + IDIO_24_IIN_IRQ(6), IDIO_24_IIN_IRQ(7), IDIO_24_IIN_IRQ(8), /* IIN 6-8 */ + IDIO_24_IIN_IRQ(9), IDIO_24_IIN_IRQ(10), IDIO_24_IIN_IRQ(11), /* IIN 9-11 */ + IDIO_24_IIN_IRQ(12), IDIO_24_IIN_IRQ(13), IDIO_24_IIN_IRQ(14), /* IIN 12-14 */ + IDIO_24_IIN_IRQ(15), IDIO_24_IIN_IRQ(16), IDIO_24_IIN_IRQ(17), /* IIN 15-17 */ + IDIO_24_IIN_IRQ(18), IDIO_24_IIN_IRQ(19), IDIO_24_IIN_IRQ(20), /* IIN 18-20 */ + IDIO_24_IIN_IRQ(21), IDIO_24_IIN_IRQ(22), IDIO_24_IIN_IRQ(23), /* IIN 21-23 */ + IDIO_24_TTL_IRQ(0), IDIO_24_TTL_IRQ(1), IDIO_24_TTL_IRQ(2), /* TTL 0-2 */ + IDIO_24_TTL_IRQ(3), IDIO_24_TTL_IRQ(4), IDIO_24_TTL_IRQ(5), /* TTL 3-5 */ + IDIO_24_TTL_IRQ(6), IDIO_24_TTL_IRQ(7), /* TTL 6-7 */ }; /** * struct idio_24_gpio - GPIO device private data structure - * @chip: instance of the gpio_chip + * @map: regmap for the device * @lock: synchronization lock to prevent I/O race conditions - * @reg: I/O address offset for the GPIO device registers - * @irq_mask: I/O bits affected by interrupts + * @irq_type: type configuration for IRQs */ struct idio_24_gpio { - struct gpio_chip chip; + struct regmap *map; raw_spinlock_t lock; - __u8 __iomem *plx; - struct idio_24_gpio_reg __iomem *reg; - unsigned long irq_mask; + u8 irq_type; }; -static int idio_24_gpio_get_direction(struct gpio_chip *chip, - unsigned int offset) +static int idio_24_handle_mask_sync(const int index, const unsigned int mask_buf_def, + const unsigned int mask_buf, void *const irq_drv_data) { - struct idio_24_gpio *const idio24gpio = gpiochip_get_data(chip); - const unsigned long out_mode_mask = BIT(1); + const unsigned int type_mask = COS_ENABLE_BOTH << index; + struct idio_24_gpio *const idio24gpio = irq_drv_data; + u8 type; + int ret; - /* FET Outputs */ - if (offset < 24) - return GPIO_LINE_DIRECTION_OUT; + raw_spin_lock(&idio24gpio->lock); - /* Isolated Inputs */ - if (offset < 48) - return GPIO_LINE_DIRECTION_IN; + /* if all are masked, then disable interrupts, else set to type */ + type = (mask_buf == mask_buf_def) ? ~type_mask : idio24gpio->irq_type; - /* TTL/CMOS I/O */ - /* OUT MODE = 1 when TTL/CMOS Output Mode is set */ - if (ioread8(&idio24gpio->reg->ctl) & out_mode_mask) - return GPIO_LINE_DIRECTION_OUT; + ret = regmap_update_bits(idio24gpio->map, IDIO_24_COS_ENABLE, type_mask, type); - return GPIO_LINE_DIRECTION_IN; + raw_spin_unlock(&idio24gpio->lock); + + return ret; } -static int idio_24_gpio_direction_input(struct gpio_chip *chip, - unsigned int offset) +static int idio_24_set_type_config(unsigned int **const buf, const unsigned int type, + const struct regmap_irq *const irq_data, const int idx, + void *const irq_drv_data) { - struct idio_24_gpio *const idio24gpio = gpiochip_get_data(chip); - unsigned long flags; - unsigned int ctl_state; - const unsigned long out_mode_mask = BIT(1); + const unsigned int offset = irq_data->reg_offset; + const unsigned int rising = COS_ENABLE_RISING << offset; + const unsigned int falling = COS_ENABLE_FALLING << offset; + const unsigned int mask = COS_ENABLE_BOTH << offset; + struct idio_24_gpio *const idio24gpio = irq_drv_data; + unsigned int new; + unsigned int cos_enable; + int ret; - /* TTL/CMOS I/O */ - if (offset > 47) { - raw_spin_lock_irqsave(&idio24gpio->lock, flags); - - /* Clear TTL/CMOS Output Mode */ - ctl_state = ioread8(&idio24gpio->reg->ctl) & ~out_mode_mask; - iowrite8(ctl_state, &idio24gpio->reg->ctl); - - raw_spin_unlock_irqrestore(&idio24gpio->lock, flags); + switch (type) { + case IRQ_TYPE_EDGE_RISING: + new = rising; + break; + case IRQ_TYPE_EDGE_FALLING: + new = falling; + break; + case IRQ_TYPE_EDGE_BOTH: + new = mask; + break; + default: + return -EINVAL; } - return 0; -} + raw_spin_lock(&idio24gpio->lock); -static int idio_24_gpio_direction_output(struct gpio_chip *chip, - unsigned int offset, int value) -{ - struct idio_24_gpio *const idio24gpio = gpiochip_get_data(chip); - unsigned long flags; - unsigned int ctl_state; - const unsigned long out_mode_mask = BIT(1); + /* replace old bitmap with new bitmap */ + idio24gpio->irq_type = (idio24gpio->irq_type & ~mask) | (new & mask); - /* TTL/CMOS I/O */ - if (offset > 47) { - raw_spin_lock_irqsave(&idio24gpio->lock, flags); + ret = regmap_read(idio24gpio->map, IDIO_24_COS_ENABLE, &cos_enable); + if (ret) + goto exit_unlock; - /* Set TTL/CMOS Output Mode */ - ctl_state = ioread8(&idio24gpio->reg->ctl) | out_mode_mask; - iowrite8(ctl_state, &idio24gpio->reg->ctl); - - raw_spin_unlock_irqrestore(&idio24gpio->lock, flags); + /* if COS is currently enabled then update the edge type */ + if (cos_enable & mask) { + ret = regmap_update_bits(idio24gpio->map, IDIO_24_COS_ENABLE, mask, + idio24gpio->irq_type); + if (ret) + goto exit_unlock; } - chip->set(chip, offset, value); - return 0; +exit_unlock: + raw_spin_unlock(&idio24gpio->lock); + + return ret; } -static int idio_24_gpio_get(struct gpio_chip *chip, unsigned int offset) +static int idio_24_reg_mask_xlate(struct gpio_regmap *const gpio, const unsigned int base, + const unsigned int offset, unsigned int *const reg, + unsigned int *const mask) { - struct idio_24_gpio *const idio24gpio = gpiochip_get_data(chip); - const unsigned long offset_mask = BIT(offset % 8); - const unsigned long out_mode_mask = BIT(1); + const unsigned int out_stride = offset / IDIO_24_NGPIO_PER_REG; + const unsigned int in_stride = (offset - 24) / IDIO_24_NGPIO_PER_REG; + struct regmap *const map = gpio_regmap_get_drvdata(gpio); + int err; + unsigned int ctrl_reg; - /* FET Outputs */ - if (offset < 8) - return !!(ioread8(&idio24gpio->reg->out0_7) & offset_mask); + switch (base) { + case IDIO_24_OUT_BASE: + *mask = BIT(offset % IDIO_24_NGPIO_PER_REG); - if (offset < 16) - return !!(ioread8(&idio24gpio->reg->out8_15) & offset_mask); - - if (offset < 24) - return !!(ioread8(&idio24gpio->reg->out16_23) & offset_mask); - - /* Isolated Inputs */ - if (offset < 32) - return !!(ioread8(&idio24gpio->reg->in0_7) & offset_mask); - - if (offset < 40) - return !!(ioread8(&idio24gpio->reg->in8_15) & offset_mask); - - if (offset < 48) - return !!(ioread8(&idio24gpio->reg->in16_23) & offset_mask); - - /* TTL/CMOS Outputs */ - if (ioread8(&idio24gpio->reg->ctl) & out_mode_mask) - return !!(ioread8(&idio24gpio->reg->ttl_out0_7) & offset_mask); - - /* TTL/CMOS Inputs */ - return !!(ioread8(&idio24gpio->reg->ttl_in0_7) & offset_mask); -} - -static int idio_24_gpio_get_multiple(struct gpio_chip *chip, - unsigned long *mask, unsigned long *bits) -{ - struct idio_24_gpio *const idio24gpio = gpiochip_get_data(chip); - unsigned long offset; - unsigned long gpio_mask; - void __iomem *ports[] = { - &idio24gpio->reg->out0_7, &idio24gpio->reg->out8_15, - &idio24gpio->reg->out16_23, &idio24gpio->reg->in0_7, - &idio24gpio->reg->in8_15, &idio24gpio->reg->in16_23, - }; - size_t index; - unsigned long port_state; - const unsigned long out_mode_mask = BIT(1); - - /* clear bits array to a clean slate */ - bitmap_zero(bits, chip->ngpio); - - for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) { - index = offset / 8; - - /* read bits from current gpio port (port 6 is TTL GPIO) */ - if (index < 6) - port_state = ioread8(ports[index]); - else if (ioread8(&idio24gpio->reg->ctl) & out_mode_mask) - port_state = ioread8(&idio24gpio->reg->ttl_out0_7); - else - port_state = ioread8(&idio24gpio->reg->ttl_in0_7); - - port_state &= gpio_mask; - - bitmap_set_value8(bits, port_state, offset); - } - - return 0; -} - -static void idio_24_gpio_set(struct gpio_chip *chip, unsigned int offset, - int value) -{ - struct idio_24_gpio *const idio24gpio = gpiochip_get_data(chip); - const unsigned long out_mode_mask = BIT(1); - void __iomem *base; - const unsigned int mask = BIT(offset % 8); - unsigned long flags; - unsigned int out_state; - - /* Isolated Inputs */ - if (offset > 23 && offset < 48) - return; - - /* TTL/CMOS Inputs */ - if (offset > 47 && !(ioread8(&idio24gpio->reg->ctl) & out_mode_mask)) - return; - - /* TTL/CMOS Outputs */ - if (offset > 47) - base = &idio24gpio->reg->ttl_out0_7; - /* FET Outputs */ - else if (offset > 15) - base = &idio24gpio->reg->out16_23; - else if (offset > 7) - base = &idio24gpio->reg->out8_15; - else - base = &idio24gpio->reg->out0_7; - - raw_spin_lock_irqsave(&idio24gpio->lock, flags); - - if (value) - out_state = ioread8(base) | mask; - else - out_state = ioread8(base) & ~mask; - - iowrite8(out_state, base); - - raw_spin_unlock_irqrestore(&idio24gpio->lock, flags); -} - -static void idio_24_gpio_set_multiple(struct gpio_chip *chip, - unsigned long *mask, unsigned long *bits) -{ - struct idio_24_gpio *const idio24gpio = gpiochip_get_data(chip); - unsigned long offset; - unsigned long gpio_mask; - void __iomem *ports[] = { - &idio24gpio->reg->out0_7, &idio24gpio->reg->out8_15, - &idio24gpio->reg->out16_23 - }; - size_t index; - unsigned long bitmask; - unsigned long flags; - unsigned long out_state; - const unsigned long out_mode_mask = BIT(1); - - for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) { - index = offset / 8; - - bitmask = bitmap_get_value8(bits, offset) & gpio_mask; - - raw_spin_lock_irqsave(&idio24gpio->lock, flags); - - /* read bits from current gpio port (port 6 is TTL GPIO) */ - if (index < 6) { - out_state = ioread8(ports[index]); - } else if (ioread8(&idio24gpio->reg->ctl) & out_mode_mask) { - out_state = ioread8(&idio24gpio->reg->ttl_out0_7); - } else { - /* skip TTL GPIO if set for input */ - raw_spin_unlock_irqrestore(&idio24gpio->lock, flags); - continue; + /* FET Outputs */ + if (offset < 24) { + *reg = IDIO_24_OUT_BASE + out_stride; + return 0; } - /* set requested bit states */ - out_state &= ~gpio_mask; - out_state |= bitmask; + /* Isolated Inputs */ + if (offset < 48) { + *reg = IDIO_24_IN_BASE + in_stride; + return 0; + } - /* write bits for current gpio port (port 6 is TTL GPIO) */ - if (index < 6) - iowrite8(out_state, ports[index]); - else - iowrite8(out_state, &idio24gpio->reg->ttl_out0_7); + err = regmap_read(map, IDIO_24_CONTROL_REG, &ctrl_reg); + if (err) + return err; - raw_spin_unlock_irqrestore(&idio24gpio->lock, flags); - } -} + /* TTL/CMOS Outputs */ + if (ctrl_reg & CONTROL_REG_OUT_MODE) { + *reg = IDIO_24_TTLCMOS_OUT_REG; + return 0; + } -static void idio_24_irq_ack(struct irq_data *data) -{ -} + /* TTL/CMOS Inputs */ + *reg = IDIO_24_TTLCMOS_IN_REG; + return 0; + case IDIO_24_CONTROL_REG: + /* We can only set direction for TTL/CMOS lines */ + if (offset < 48) + return -EOPNOTSUPP; -static void idio_24_irq_mask(struct irq_data *data) -{ - struct gpio_chip *const chip = irq_data_get_irq_chip_data(data); - struct idio_24_gpio *const idio24gpio = gpiochip_get_data(chip); - unsigned long flags; - const unsigned long bit_offset = irqd_to_hwirq(data) - 24; - unsigned char new_irq_mask; - const unsigned long bank_offset = bit_offset / 8; - unsigned char cos_enable_state; - - raw_spin_lock_irqsave(&idio24gpio->lock, flags); - - idio24gpio->irq_mask &= ~BIT(bit_offset); - new_irq_mask = idio24gpio->irq_mask >> bank_offset * 8; - - if (!new_irq_mask) { - cos_enable_state = ioread8(&idio24gpio->reg->cos_enable); - - /* Disable Rising Edge detection */ - cos_enable_state &= ~BIT(bank_offset); - /* Disable Falling Edge detection */ - cos_enable_state &= ~BIT(bank_offset + 4); - - iowrite8(cos_enable_state, &idio24gpio->reg->cos_enable); - } - - raw_spin_unlock_irqrestore(&idio24gpio->lock, flags); - - gpiochip_disable_irq(chip, irqd_to_hwirq(data)); -} - -static void idio_24_irq_unmask(struct irq_data *data) -{ - struct gpio_chip *const chip = irq_data_get_irq_chip_data(data); - struct idio_24_gpio *const idio24gpio = gpiochip_get_data(chip); - unsigned long flags; - unsigned char prev_irq_mask; - const unsigned long bit_offset = irqd_to_hwirq(data) - 24; - const unsigned long bank_offset = bit_offset / 8; - unsigned char cos_enable_state; - - gpiochip_enable_irq(chip, irqd_to_hwirq(data)); - - raw_spin_lock_irqsave(&idio24gpio->lock, flags); - - prev_irq_mask = idio24gpio->irq_mask >> bank_offset * 8; - idio24gpio->irq_mask |= BIT(bit_offset); - - if (!prev_irq_mask) { - cos_enable_state = ioread8(&idio24gpio->reg->cos_enable); - - /* Enable Rising Edge detection */ - cos_enable_state |= BIT(bank_offset); - /* Enable Falling Edge detection */ - cos_enable_state |= BIT(bank_offset + 4); - - iowrite8(cos_enable_state, &idio24gpio->reg->cos_enable); - } - - raw_spin_unlock_irqrestore(&idio24gpio->lock, flags); -} - -static int idio_24_irq_set_type(struct irq_data *data, unsigned int flow_type) -{ - /* The only valid irq types are none and both-edges */ - if (flow_type != IRQ_TYPE_NONE && - (flow_type & IRQ_TYPE_EDGE_BOTH) != IRQ_TYPE_EDGE_BOTH) + *reg = IDIO_24_CONTROL_REG; + *mask = CONTROL_REG_OUT_MODE; + return 0; + default: + /* Should never reach this path */ return -EINVAL; - - return 0; -} - -static const struct irq_chip idio_24_irqchip = { - .name = "pcie-idio-24", - .irq_ack = idio_24_irq_ack, - .irq_mask = idio_24_irq_mask, - .irq_unmask = idio_24_irq_unmask, - .irq_set_type = idio_24_irq_set_type, - .flags = IRQCHIP_IMMUTABLE, - GPIOCHIP_IRQ_RESOURCE_HELPERS, -}; - -static irqreturn_t idio_24_irq_handler(int irq, void *dev_id) -{ - struct idio_24_gpio *const idio24gpio = dev_id; - unsigned long irq_status; - struct gpio_chip *const chip = &idio24gpio->chip; - unsigned long irq_mask; - int gpio; - - raw_spin_lock(&idio24gpio->lock); - - /* Read Change-Of-State status */ - irq_status = ioread32(&idio24gpio->reg->cos0_7); - - raw_spin_unlock(&idio24gpio->lock); - - /* Make sure our device generated IRQ */ - if (!irq_status) - return IRQ_NONE; - - /* Handle only unmasked IRQ */ - irq_mask = idio24gpio->irq_mask & irq_status; - - for_each_set_bit(gpio, &irq_mask, chip->ngpio - 24) - generic_handle_domain_irq(chip->irq.domain, gpio + 24); - - raw_spin_lock(&idio24gpio->lock); - - /* Clear Change-Of-State status */ - iowrite32(irq_status, &idio24gpio->reg->cos0_7); - - raw_spin_unlock(&idio24gpio->lock); - - return IRQ_HANDLED; + } } #define IDIO_24_NGPIO 56 @@ -496,11 +297,12 @@ static int idio_24_probe(struct pci_dev *pdev, const struct pci_device_id *id) const size_t pci_plx_bar_index = 1; const size_t pci_bar_index = 2; const char *const name = pci_name(pdev); - struct gpio_irq_chip *girq; - - idio24gpio = devm_kzalloc(dev, sizeof(*idio24gpio), GFP_KERNEL); - if (!idio24gpio) - return -ENOMEM; + struct gpio_regmap_config gpio_config = {}; + void __iomem *pex8311_regs; + void __iomem *idio_24_regs; + struct regmap *intcsr_map; + struct regmap_irq_chip *chip; + struct regmap_irq_chip_data *chip_data; err = pcim_enable_device(pdev); if (err) { @@ -514,57 +316,72 @@ static int idio_24_probe(struct pci_dev *pdev, const struct pci_device_id *id) return err; } - idio24gpio->plx = pcim_iomap_table(pdev)[pci_plx_bar_index]; - idio24gpio->reg = pcim_iomap_table(pdev)[pci_bar_index]; + pex8311_regs = pcim_iomap_table(pdev)[pci_plx_bar_index]; + idio_24_regs = pcim_iomap_table(pdev)[pci_bar_index]; - idio24gpio->chip.label = name; - idio24gpio->chip.parent = dev; - idio24gpio->chip.owner = THIS_MODULE; - idio24gpio->chip.base = -1; - idio24gpio->chip.ngpio = IDIO_24_NGPIO; - idio24gpio->chip.names = idio_24_names; - idio24gpio->chip.get_direction = idio_24_gpio_get_direction; - idio24gpio->chip.direction_input = idio_24_gpio_direction_input; - idio24gpio->chip.direction_output = idio_24_gpio_direction_output; - idio24gpio->chip.get = idio_24_gpio_get; - idio24gpio->chip.get_multiple = idio_24_gpio_get_multiple; - idio24gpio->chip.set = idio_24_gpio_set; - idio24gpio->chip.set_multiple = idio_24_gpio_set_multiple; + intcsr_map = devm_regmap_init_mmio(dev, pex8311_regs, &pex8311_intcsr_regmap_config); + if (IS_ERR(intcsr_map)) + return dev_err_probe(dev, PTR_ERR(intcsr_map), + "Unable to initialize PEX8311 register map\n"); - girq = &idio24gpio->chip.irq; - gpio_irq_chip_set_chip(girq, &idio_24_irqchip); - /* This will let us handle the parent IRQ in the driver */ - girq->parent_handler = NULL; - girq->num_parents = 0; - girq->parents = NULL; - girq->default_type = IRQ_TYPE_NONE; - girq->handler = handle_edge_irq; + idio24gpio = devm_kzalloc(dev, sizeof(*idio24gpio), GFP_KERNEL); + if (!idio24gpio) + return -ENOMEM; + + idio24gpio->map = devm_regmap_init_mmio(dev, idio_24_regs, &idio_24_regmap_config); + if (IS_ERR(idio24gpio->map)) + return dev_err_probe(dev, PTR_ERR(idio24gpio->map), + "Unable to initialize register map\n"); raw_spin_lock_init(&idio24gpio->lock); + /* Initialize all IRQ type configuration to IRQ_TYPE_EDGE_BOTH */ + idio24gpio->irq_type = GENMASK(7, 0); + + chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL); + if (!chip) + return -ENOMEM; + + chip->name = name; + chip->status_base = IDIO_24_COS_STATUS_BASE; + chip->mask_base = IDIO_24_COS_ENABLE; + chip->ack_base = IDIO_24_COS_STATUS_BASE; + chip->num_regs = 4; + chip->irqs = idio_24_regmap_irqs; + chip->num_irqs = ARRAY_SIZE(idio_24_regmap_irqs); + chip->handle_mask_sync = idio_24_handle_mask_sync; + chip->set_type_config = idio_24_set_type_config; + chip->irq_drv_data = idio24gpio; + /* Software board reset */ - iowrite8(0, &idio24gpio->reg->soft_reset); + err = regmap_write(idio24gpio->map, IDIO_24_SOFT_RESET, 0); + if (err) + return err; /* * enable PLX PEX8311 internal PCI wire interrupt and local interrupt * input */ - iowrite8((INTCSR_INTERNAL_PCI_WIRE | INTCSR_LOCAL_INPUT) >> 8, - idio24gpio->plx + PLX_PEX8311_PCI_LCS_INTCSR + 1); - - err = devm_gpiochip_add_data(dev, &idio24gpio->chip, idio24gpio); - if (err) { - dev_err(dev, "GPIO registering failed (%d)\n", err); + err = regmap_update_bits(intcsr_map, 0x0, IDIO_24_ENABLE_IRQ, IDIO_24_ENABLE_IRQ); + if (err) return err; - } - err = devm_request_irq(dev, pdev->irq, idio_24_irq_handler, IRQF_SHARED, - name, idio24gpio); - if (err) { - dev_err(dev, "IRQ handler registering failed (%d)\n", err); - return err; - } + err = devm_regmap_add_irq_chip(dev, idio24gpio->map, pdev->irq, 0, 0, chip, &chip_data); + if (err) + return dev_err_probe(dev, err, "IRQ registration failed\n"); - return 0; + gpio_config.parent = dev; + gpio_config.regmap = idio24gpio->map; + gpio_config.ngpio = IDIO_24_NGPIO; + gpio_config.names = idio_24_names; + gpio_config.reg_dat_base = GPIO_REGMAP_ADDR(IDIO_24_OUT_BASE); + gpio_config.reg_set_base = GPIO_REGMAP_ADDR(IDIO_24_OUT_BASE); + gpio_config.reg_dir_out_base = GPIO_REGMAP_ADDR(IDIO_24_CONTROL_REG); + gpio_config.ngpio_per_reg = IDIO_24_NGPIO_PER_REG; + gpio_config.irq_domain = regmap_irq_get_domain(chip_data); + gpio_config.reg_mask_xlate = idio_24_reg_mask_xlate; + gpio_config.drvdata = idio24gpio->map; + + return PTR_ERR_OR_ZERO(devm_gpio_regmap_register(dev, &gpio_config)); } static const struct pci_device_id idio_24_pci_dev_id[] = { From 0988ffa09630d4f2f66e345d1a44ffd3f1edb8e0 Mon Sep 17 00:00:00 2001 From: William Breathitt Gray Date: Thu, 10 Aug 2023 18:00:43 -0400 Subject: [PATCH 368/656] gpio: ws16c48: Migrate to the regmap API The regmap API supports IO port accessors so we can take advantage of regmap abstractions rather than handling access to the device registers directly in the driver. The WinSystems WS16C48 provides the following registers: Offset 0x0-0x5: Port 0-5 I/O Offset 0x6: Int_Pending Offset 0x7: Page/Lock Offset 0x8-0xA (Page 1): Pol_0-Pol_2 Offset 0x8-0xA (Page 2): Enab_0-Enab_2 Offset 0x8-0xA (Page 3): Int_ID0-Int_ID2 Port 0-5 I/O provides access to 48 lines of digital I/O across six registers, each bit position corresponding to the respective line. Writing a 1 to a respective bit position causes that output pin to sink current, while writing a 0 to the same bit position causes that output pin to go to a high-impedance state and allows it to be used an input. Reads on a port report the inverted state (0 = high, 1 = low) of an I/O pin when used in input mode. Interrupts are supported on Port 0-2. Int_Pending is a read-only register that reports the combined state of the INT_ID0 through INT_ID2 registers; an interrupt pending is indicated when any of the low three bits are set. The Page/Lock register provides the following bits: Bit 0-5: Port 0-5 I/O Lock Bit 6-7: Page 0-3 Selection For Bits 0-5, writing a 1 to a respective bit position locks the output state of the corresponding I/O port. Writing the page number to Bits 6-7 selects that respective register page for use. Pol_0-Pol_2 are accessible when Page 1 is selected. Writing a 1 to a respective bit position selects the rising edge detection interrupts for that input line, while writing a 0 to the same bit position selects the falling edge detection interrupts. Enab_0-Enab_2 are accessible when Page 2 is selected. Writing a 1 to a respective bit position enables interrupts for that input line, while writing a 0 to that same bit position clears and disables interrupts for that input line. Int_ID0-Int_ID2 are accessible when Page 3 is selected. A respective bit when read as a 1 indicates that an edge of the polarity set in the corresponding polarity register was detected for the corresponding input line. Writing any value to this register clears all pending interrupts for the register. Suggested-by: Andy Shevchenko Reviewed-by: Michael Walle Reviewed-by: Linus Walleij Link: https://lore.kernel.org/r/f59de81e80f7198bcfa9a15615c459c38b5d0e08.1680708357.git.william.gray@linaro.org/ Signed-off-by: William Breathitt Gray Reviewed-by: Linus Walleij Signed-off-by: Bartosz Golaszewski --- drivers/gpio/Kconfig | 3 + drivers/gpio/gpio-ws16c48.c | 552 ++++++++++++------------------------ 2 files changed, 188 insertions(+), 367 deletions(-) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 3cccc6cc315f..673bafb8be58 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -998,7 +998,10 @@ config GPIO_WINBOND config GPIO_WS16C48 tristate "WinSystems WS16C48 GPIO support" select ISA_BUS_API + select REGMAP_IRQ + select REGMAP_MMIO select GPIOLIB_IRQCHIP + select GPIO_REGMAP help Enables GPIO support for the WinSystems WS16C48. The base port addresses for the devices may be configured via the base module diff --git a/drivers/gpio/gpio-ws16c48.c b/drivers/gpio/gpio-ws16c48.c index e73885a4dc32..701847508e94 100644 --- a/drivers/gpio/gpio-ws16c48.c +++ b/drivers/gpio/gpio-ws16c48.c @@ -3,19 +3,18 @@ * GPIO driver for the WinSystems WS16C48 * Copyright (C) 2016 William Breathitt Gray */ -#include +#include +#include #include -#include -#include -#include -#include -#include -#include +#include +#include +#include #include #include #include #include #include +#include #include #define WS16C48_EXTENT 10 @@ -31,371 +30,178 @@ static unsigned int num_irq; module_param_hw_array(irq, uint, irq, &num_irq, 0); MODULE_PARM_DESC(irq, "WinSystems WS16C48 interrupt line numbers"); -/** - * struct ws16c48_reg - device register structure - * @port: Port 0 through 5 I/O - * @int_pending: Interrupt Pending - * @page_lock: Register page (Bits 7-6) and I/O port lock (Bits 5-0) - * @pol_enab_int_id: Interrupt polarity, enable, and ID - */ -struct ws16c48_reg { - u8 port[6]; - u8 int_pending; - u8 page_lock; - u8 pol_enab_int_id[3]; +#define WS16C48_DAT_BASE 0x0 +#define WS16C48_PAGE_LOCK 0x7 +#define WS16C48_PAGE_BASE 0x8 +#define WS16C48_POL WS16C48_PAGE_BASE +#define WS16C48_ENAB WS16C48_PAGE_BASE +#define WS16C48_INT_ID WS16C48_PAGE_BASE + +#define PAGE_LOCK_PAGE_FIELD GENMASK(7, 6) +#define POL_PAGE u8_encode_bits(1, PAGE_LOCK_PAGE_FIELD) +#define ENAB_PAGE u8_encode_bits(2, PAGE_LOCK_PAGE_FIELD) +#define INT_ID_PAGE u8_encode_bits(3, PAGE_LOCK_PAGE_FIELD) + +static const struct regmap_range ws16c48_wr_ranges[] = { + regmap_reg_range(0x0, 0x5), regmap_reg_range(0x7, 0xA), +}; +static const struct regmap_range ws16c48_rd_ranges[] = { + regmap_reg_range(0x0, 0xA), +}; +static const struct regmap_range ws16c48_volatile_ranges[] = { + regmap_reg_range(0x0, 0x6), regmap_reg_range(0x8, 0xA), +}; +static const struct regmap_access_table ws16c48_wr_table = { + .yes_ranges = ws16c48_wr_ranges, + .n_yes_ranges = ARRAY_SIZE(ws16c48_wr_ranges), +}; +static const struct regmap_access_table ws16c48_rd_table = { + .yes_ranges = ws16c48_rd_ranges, + .n_yes_ranges = ARRAY_SIZE(ws16c48_rd_ranges), +}; +static const struct regmap_access_table ws16c48_volatile_table = { + .yes_ranges = ws16c48_volatile_ranges, + .n_yes_ranges = ARRAY_SIZE(ws16c48_volatile_ranges), +}; +static const struct regmap_config ws16c48_regmap_config = { + .reg_bits = 8, + .reg_stride = 1, + .val_bits = 8, + .io_port = true, + .wr_table = &ws16c48_wr_table, + .rd_table = &ws16c48_rd_table, + .volatile_table = &ws16c48_volatile_table, + .cache_type = REGCACHE_FLAT, + .use_raw_spinlock = true, +}; + +#define WS16C48_NGPIO_PER_REG 8 +#define WS16C48_REGMAP_IRQ(_id) \ + [_id] = { \ + .reg_offset = (_id) / WS16C48_NGPIO_PER_REG, \ + .mask = BIT((_id) % WS16C48_NGPIO_PER_REG), \ + .type = { \ + .type_reg_offset = (_id) / WS16C48_NGPIO_PER_REG, \ + .types_supported = IRQ_TYPE_EDGE_BOTH, \ + }, \ + } + +/* Only the first 24 lines (Port 0-2) support interrupts */ +#define WS16C48_NUM_IRQS 24 +static const struct regmap_irq ws16c48_regmap_irqs[WS16C48_NUM_IRQS] = { + WS16C48_REGMAP_IRQ(0), WS16C48_REGMAP_IRQ(1), WS16C48_REGMAP_IRQ(2), /* 0-2 */ + WS16C48_REGMAP_IRQ(3), WS16C48_REGMAP_IRQ(4), WS16C48_REGMAP_IRQ(5), /* 3-5 */ + WS16C48_REGMAP_IRQ(6), WS16C48_REGMAP_IRQ(7), WS16C48_REGMAP_IRQ(8), /* 6-8 */ + WS16C48_REGMAP_IRQ(9), WS16C48_REGMAP_IRQ(10), WS16C48_REGMAP_IRQ(11), /* 9-11 */ + WS16C48_REGMAP_IRQ(12), WS16C48_REGMAP_IRQ(13), WS16C48_REGMAP_IRQ(14), /* 12-14 */ + WS16C48_REGMAP_IRQ(15), WS16C48_REGMAP_IRQ(16), WS16C48_REGMAP_IRQ(17), /* 15-17 */ + WS16C48_REGMAP_IRQ(18), WS16C48_REGMAP_IRQ(19), WS16C48_REGMAP_IRQ(20), /* 18-20 */ + WS16C48_REGMAP_IRQ(21), WS16C48_REGMAP_IRQ(22), WS16C48_REGMAP_IRQ(23), /* 21-23 */ }; /** * struct ws16c48_gpio - GPIO device private data structure - * @chip: instance of the gpio_chip - * @io_state: bit I/O state (whether bit is set to input or output) - * @out_state: output bits state + * @map: regmap for the device * @lock: synchronization lock to prevent I/O race conditions * @irq_mask: I/O bits affected by interrupts - * @flow_mask: IRQ flow type mask for the respective I/O bits - * @reg: I/O address offset for the device registers */ struct ws16c48_gpio { - struct gpio_chip chip; - unsigned char io_state[6]; - unsigned char out_state[6]; + struct regmap *map; raw_spinlock_t lock; - unsigned long irq_mask; - unsigned long flow_mask; - struct ws16c48_reg __iomem *reg; + u8 irq_mask[WS16C48_NUM_IRQS / WS16C48_NGPIO_PER_REG]; }; -static int ws16c48_gpio_get_direction(struct gpio_chip *chip, unsigned offset) +static int ws16c48_handle_pre_irq(void *const irq_drv_data) __acquires(&ws16c48gpio->lock) { - struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip); - const unsigned port = offset / 8; - const unsigned mask = BIT(offset % 8); + struct ws16c48_gpio *const ws16c48gpio = irq_drv_data; - if (ws16c48gpio->io_state[port] & mask) - return GPIO_LINE_DIRECTION_IN; - - return GPIO_LINE_DIRECTION_OUT; -} - -static int ws16c48_gpio_direction_input(struct gpio_chip *chip, unsigned offset) -{ - struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip); - const unsigned port = offset / 8; - const unsigned mask = BIT(offset % 8); - unsigned long flags; - - raw_spin_lock_irqsave(&ws16c48gpio->lock, flags); - - ws16c48gpio->io_state[port] |= mask; - ws16c48gpio->out_state[port] &= ~mask; - iowrite8(ws16c48gpio->out_state[port], ws16c48gpio->reg->port + port); - - raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags); + /* Lock to prevent Page/Lock register change while we handle IRQ */ + raw_spin_lock(&ws16c48gpio->lock); return 0; } -static int ws16c48_gpio_direction_output(struct gpio_chip *chip, - unsigned offset, int value) +static int ws16c48_handle_post_irq(void *const irq_drv_data) __releases(&ws16c48gpio->lock) { - struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip); - const unsigned port = offset / 8; - const unsigned mask = BIT(offset % 8); - unsigned long flags; + struct ws16c48_gpio *const ws16c48gpio = irq_drv_data; - raw_spin_lock_irqsave(&ws16c48gpio->lock, flags); - - ws16c48gpio->io_state[port] &= ~mask; - if (value) - ws16c48gpio->out_state[port] |= mask; - else - ws16c48gpio->out_state[port] &= ~mask; - iowrite8(ws16c48gpio->out_state[port], ws16c48gpio->reg->port + port); - - raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags); + raw_spin_unlock(&ws16c48gpio->lock); return 0; } -static int ws16c48_gpio_get(struct gpio_chip *chip, unsigned offset) +static int ws16c48_handle_mask_sync(const int index, const unsigned int mask_buf_def, + const unsigned int mask_buf, void *const irq_drv_data) { - struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip); - const unsigned port = offset / 8; - const unsigned mask = BIT(offset % 8); + struct ws16c48_gpio *const ws16c48gpio = irq_drv_data; unsigned long flags; - unsigned port_state; + int ret = 0; raw_spin_lock_irqsave(&ws16c48gpio->lock, flags); - /* ensure that GPIO is set for input */ - if (!(ws16c48gpio->io_state[port] & mask)) { - raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags); - return -EINVAL; - } + /* exit early if no change since the last mask sync */ + if (mask_buf == ws16c48gpio->irq_mask[index]) + goto exit_unlock; + ws16c48gpio->irq_mask[index] = mask_buf; - port_state = ioread8(ws16c48gpio->reg->port + port); + ret = regmap_write(ws16c48gpio->map, WS16C48_PAGE_LOCK, ENAB_PAGE); + if (ret) + goto exit_unlock; + /* Update ENAB register (inverted mask) */ + ret = regmap_write(ws16c48gpio->map, WS16C48_ENAB + index, ~mask_buf); + if (ret) + goto exit_unlock; + + ret = regmap_write(ws16c48gpio->map, WS16C48_PAGE_LOCK, INT_ID_PAGE); + if (ret) + goto exit_unlock; + +exit_unlock: raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags); - return !!(port_state & mask); + return ret; } -static int ws16c48_gpio_get_multiple(struct gpio_chip *chip, - unsigned long *mask, unsigned long *bits) +static int ws16c48_set_type_config(unsigned int **const buf, const unsigned int type, + const struct regmap_irq *const irq_data, const int idx, + void *const irq_drv_data) { - struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip); - unsigned long offset; - unsigned long gpio_mask; - size_t index; - u8 __iomem *port_addr; - unsigned long port_state; - - /* clear bits array to a clean slate */ - bitmap_zero(bits, chip->ngpio); - - for_each_set_clump8(offset, gpio_mask, mask, chip->ngpio) { - index = offset / 8; - port_addr = ws16c48gpio->reg->port + index; - port_state = ioread8(port_addr) & gpio_mask; - - bitmap_set_value8(bits, port_state, offset); - } - - return 0; -} - -static void ws16c48_gpio_set(struct gpio_chip *chip, unsigned offset, int value) -{ - struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip); - const unsigned port = offset / 8; - const unsigned mask = BIT(offset % 8); + struct ws16c48_gpio *const ws16c48gpio = irq_drv_data; + unsigned int polarity; unsigned long flags; + int ret; - raw_spin_lock_irqsave(&ws16c48gpio->lock, flags); - - /* ensure that GPIO is set for output */ - if (ws16c48gpio->io_state[port] & mask) { - raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags); - return; - } - - if (value) - ws16c48gpio->out_state[port] |= mask; - else - ws16c48gpio->out_state[port] &= ~mask; - iowrite8(ws16c48gpio->out_state[port], ws16c48gpio->reg->port + port); - - raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags); -} - -static void ws16c48_gpio_set_multiple(struct gpio_chip *chip, - unsigned long *mask, unsigned long *bits) -{ - struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip); - unsigned long offset; - unsigned long gpio_mask; - size_t index; - u8 __iomem *port_addr; - unsigned long bitmask; - unsigned long flags; - - for_each_set_clump8(offset, gpio_mask, mask, chip->ngpio) { - index = offset / 8; - port_addr = ws16c48gpio->reg->port + index; - - /* mask out GPIO configured for input */ - gpio_mask &= ~ws16c48gpio->io_state[index]; - bitmask = bitmap_get_value8(bits, offset) & gpio_mask; - - raw_spin_lock_irqsave(&ws16c48gpio->lock, flags); - - /* update output state data and set device gpio register */ - ws16c48gpio->out_state[index] &= ~gpio_mask; - ws16c48gpio->out_state[index] |= bitmask; - iowrite8(ws16c48gpio->out_state[index], port_addr); - - raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags); - } -} - -static void ws16c48_irq_ack(struct irq_data *data) -{ - struct gpio_chip *chip = irq_data_get_irq_chip_data(data); - struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip); - const unsigned long offset = irqd_to_hwirq(data); - const unsigned port = offset / 8; - const unsigned mask = BIT(offset % 8); - unsigned long flags; - unsigned port_state; - - /* only the first 3 ports support interrupts */ - if (port > 2) - return; - - raw_spin_lock_irqsave(&ws16c48gpio->lock, flags); - - port_state = ws16c48gpio->irq_mask >> (8*port); - - /* Select Register Page 2; Unlock all I/O ports */ - iowrite8(0x80, &ws16c48gpio->reg->page_lock); - - /* Clear pending interrupt */ - iowrite8(port_state & ~mask, ws16c48gpio->reg->pol_enab_int_id + port); - iowrite8(port_state | mask, ws16c48gpio->reg->pol_enab_int_id + port); - - /* Select Register Page 3; Unlock all I/O ports */ - iowrite8(0xC0, &ws16c48gpio->reg->page_lock); - - raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags); -} - -static void ws16c48_irq_mask(struct irq_data *data) -{ - struct gpio_chip *chip = irq_data_get_irq_chip_data(data); - struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip); - const unsigned long offset = irqd_to_hwirq(data); - const unsigned long mask = BIT(offset); - const unsigned port = offset / 8; - unsigned long flags; - unsigned long port_state; - - /* only the first 3 ports support interrupts */ - if (port > 2) - return; - - raw_spin_lock_irqsave(&ws16c48gpio->lock, flags); - - ws16c48gpio->irq_mask &= ~mask; - gpiochip_disable_irq(chip, offset); - port_state = ws16c48gpio->irq_mask >> (8 * port); - - /* Select Register Page 2; Unlock all I/O ports */ - iowrite8(0x80, &ws16c48gpio->reg->page_lock); - - /* Disable interrupt */ - iowrite8(port_state, ws16c48gpio->reg->pol_enab_int_id + port); - - /* Select Register Page 3; Unlock all I/O ports */ - iowrite8(0xC0, &ws16c48gpio->reg->page_lock); - - raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags); -} - -static void ws16c48_irq_unmask(struct irq_data *data) -{ - struct gpio_chip *chip = irq_data_get_irq_chip_data(data); - struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip); - const unsigned long offset = irqd_to_hwirq(data); - const unsigned long mask = BIT(offset); - const unsigned port = offset / 8; - unsigned long flags; - unsigned long port_state; - - /* only the first 3 ports support interrupts */ - if (port > 2) - return; - - raw_spin_lock_irqsave(&ws16c48gpio->lock, flags); - - gpiochip_enable_irq(chip, offset); - ws16c48gpio->irq_mask |= mask; - port_state = ws16c48gpio->irq_mask >> (8 * port); - - /* Select Register Page 2; Unlock all I/O ports */ - iowrite8(0x80, &ws16c48gpio->reg->page_lock); - - /* Enable interrupt */ - iowrite8(port_state, ws16c48gpio->reg->pol_enab_int_id + port); - - /* Select Register Page 3; Unlock all I/O ports */ - iowrite8(0xC0, &ws16c48gpio->reg->page_lock); - - raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags); -} - -static int ws16c48_irq_set_type(struct irq_data *data, unsigned flow_type) -{ - struct gpio_chip *chip = irq_data_get_irq_chip_data(data); - struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip); - const unsigned long offset = irqd_to_hwirq(data); - const unsigned long mask = BIT(offset); - const unsigned port = offset / 8; - unsigned long flags; - unsigned long port_state; - - /* only the first 3 ports support interrupts */ - if (port > 2) - return -EINVAL; - - raw_spin_lock_irqsave(&ws16c48gpio->lock, flags); - - switch (flow_type) { - case IRQ_TYPE_NONE: - break; + switch (type) { case IRQ_TYPE_EDGE_RISING: - ws16c48gpio->flow_mask |= mask; + polarity = irq_data->mask; break; case IRQ_TYPE_EDGE_FALLING: - ws16c48gpio->flow_mask &= ~mask; + polarity = 0; break; default: - raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags); return -EINVAL; } - port_state = ws16c48gpio->flow_mask >> (8 * port); + raw_spin_lock_irqsave(&ws16c48gpio->lock, flags); - /* Select Register Page 1; Unlock all I/O ports */ - iowrite8(0x40, &ws16c48gpio->reg->page_lock); + ret = regmap_write(ws16c48gpio->map, WS16C48_PAGE_LOCK, POL_PAGE); + if (ret) + goto exit_unlock; /* Set interrupt polarity */ - iowrite8(port_state, ws16c48gpio->reg->pol_enab_int_id + port); + ret = regmap_update_bits(ws16c48gpio->map, WS16C48_POL + idx, irq_data->mask, polarity); + if (ret) + goto exit_unlock; - /* Select Register Page 3; Unlock all I/O ports */ - iowrite8(0xC0, &ws16c48gpio->reg->page_lock); + ret = regmap_write(ws16c48gpio->map, WS16C48_PAGE_LOCK, INT_ID_PAGE); + if (ret) + goto exit_unlock; +exit_unlock: raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags); - return 0; -} - -static const struct irq_chip ws16c48_irqchip = { - .name = "ws16c48", - .irq_ack = ws16c48_irq_ack, - .irq_mask = ws16c48_irq_mask, - .irq_unmask = ws16c48_irq_unmask, - .irq_set_type = ws16c48_irq_set_type, - .flags = IRQCHIP_IMMUTABLE, - GPIOCHIP_IRQ_RESOURCE_HELPERS, -}; - -static irqreturn_t ws16c48_irq_handler(int irq, void *dev_id) -{ - struct ws16c48_gpio *const ws16c48gpio = dev_id; - struct gpio_chip *const chip = &ws16c48gpio->chip; - struct ws16c48_reg __iomem *const reg = ws16c48gpio->reg; - unsigned long int_pending; - unsigned long port; - unsigned long int_id; - unsigned long gpio; - - int_pending = ioread8(®->int_pending) & 0x7; - if (!int_pending) - return IRQ_NONE; - - /* loop until all pending interrupts are handled */ - do { - for_each_set_bit(port, &int_pending, 3) { - int_id = ioread8(reg->pol_enab_int_id + port); - for_each_set_bit(gpio, &int_id, 8) - generic_handle_domain_irq(chip->irq.domain, - gpio + 8*port); - } - - int_pending = ioread8(®->int_pending) & 0x7; - } while (int_pending); - - return IRQ_HANDLED; + return ret; } #define WS16C48_NGPIO 48 @@ -414,30 +220,37 @@ static const char *ws16c48_names[WS16C48_NGPIO] = { "Port 5 Bit 4", "Port 5 Bit 5", "Port 5 Bit 6", "Port 5 Bit 7" }; -static int ws16c48_irq_init_hw(struct gpio_chip *gc) +static int ws16c48_irq_init_hw(struct regmap *const map) { - struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(gc); + int err; - /* Select Register Page 2; Unlock all I/O ports */ - iowrite8(0x80, &ws16c48gpio->reg->page_lock); + err = regmap_write(map, WS16C48_PAGE_LOCK, ENAB_PAGE); + if (err) + return err; /* Disable interrupts for all lines */ - iowrite8(0, &ws16c48gpio->reg->pol_enab_int_id[0]); - iowrite8(0, &ws16c48gpio->reg->pol_enab_int_id[1]); - iowrite8(0, &ws16c48gpio->reg->pol_enab_int_id[2]); + err = regmap_write(map, WS16C48_ENAB + 0, 0x00); + if (err) + return err; + err = regmap_write(map, WS16C48_ENAB + 1, 0x00); + if (err) + return err; + err = regmap_write(map, WS16C48_ENAB + 2, 0x00); + if (err) + return err; - /* Select Register Page 3; Unlock all I/O ports */ - iowrite8(0xC0, &ws16c48gpio->reg->page_lock); - - return 0; + return regmap_write(map, WS16C48_PAGE_LOCK, INT_ID_PAGE); } static int ws16c48_probe(struct device *dev, unsigned int id) { struct ws16c48_gpio *ws16c48gpio; const char *const name = dev_name(dev); - struct gpio_irq_chip *girq; int err; + struct gpio_regmap_config gpio_config = {}; + void __iomem *regs; + struct regmap_irq_chip *chip; + struct regmap_irq_chip_data *chip_data; ws16c48gpio = devm_kzalloc(dev, sizeof(*ws16c48gpio), GFP_KERNEL); if (!ws16c48gpio) @@ -449,50 +262,55 @@ static int ws16c48_probe(struct device *dev, unsigned int id) return -EBUSY; } - ws16c48gpio->reg = devm_ioport_map(dev, base[id], WS16C48_EXTENT); - if (!ws16c48gpio->reg) + regs = devm_ioport_map(dev, base[id], WS16C48_EXTENT); + if (!regs) return -ENOMEM; - ws16c48gpio->chip.label = name; - ws16c48gpio->chip.parent = dev; - ws16c48gpio->chip.owner = THIS_MODULE; - ws16c48gpio->chip.base = -1; - ws16c48gpio->chip.ngpio = WS16C48_NGPIO; - ws16c48gpio->chip.names = ws16c48_names; - ws16c48gpio->chip.get_direction = ws16c48_gpio_get_direction; - ws16c48gpio->chip.direction_input = ws16c48_gpio_direction_input; - ws16c48gpio->chip.direction_output = ws16c48_gpio_direction_output; - ws16c48gpio->chip.get = ws16c48_gpio_get; - ws16c48gpio->chip.get_multiple = ws16c48_gpio_get_multiple; - ws16c48gpio->chip.set = ws16c48_gpio_set; - ws16c48gpio->chip.set_multiple = ws16c48_gpio_set_multiple; + ws16c48gpio->map = devm_regmap_init_mmio(dev, regs, &ws16c48_regmap_config); + if (IS_ERR(ws16c48gpio->map)) + return dev_err_probe(dev, PTR_ERR(ws16c48gpio->map), + "Unable to initialize register map\n"); - girq = &ws16c48gpio->chip.irq; - gpio_irq_chip_set_chip(girq, &ws16c48_irqchip); - /* This will let us handle the parent IRQ in the driver */ - girq->parent_handler = NULL; - girq->num_parents = 0; - girq->parents = NULL; - girq->default_type = IRQ_TYPE_NONE; - girq->handler = handle_edge_irq; - girq->init_hw = ws16c48_irq_init_hw; + chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL); + if (!chip) + return -ENOMEM; + + chip->name = name; + chip->status_base = WS16C48_INT_ID; + chip->mask_base = WS16C48_ENAB; + chip->ack_base = WS16C48_INT_ID; + chip->num_regs = 3; + chip->irqs = ws16c48_regmap_irqs; + chip->num_irqs = ARRAY_SIZE(ws16c48_regmap_irqs); + chip->handle_pre_irq = ws16c48_handle_pre_irq; + chip->handle_post_irq = ws16c48_handle_post_irq; + chip->handle_mask_sync = ws16c48_handle_mask_sync; + chip->set_type_config = ws16c48_set_type_config; + chip->irq_drv_data = ws16c48gpio; raw_spin_lock_init(&ws16c48gpio->lock); - err = devm_gpiochip_add_data(dev, &ws16c48gpio->chip, ws16c48gpio); - if (err) { - dev_err(dev, "GPIO registering failed (%d)\n", err); + /* Initialize to prevent spurious interrupts before we're ready */ + err = ws16c48_irq_init_hw(ws16c48gpio->map); + if (err) return err; - } - err = devm_request_irq(dev, irq[id], ws16c48_irq_handler, IRQF_SHARED, - name, ws16c48gpio); - if (err) { - dev_err(dev, "IRQ handler registering failed (%d)\n", err); - return err; - } + err = devm_regmap_add_irq_chip(dev, ws16c48gpio->map, irq[id], 0, 0, chip, &chip_data); + if (err) + return dev_err_probe(dev, err, "IRQ registration failed\n"); - return 0; + gpio_config.parent = dev; + gpio_config.regmap = ws16c48gpio->map; + gpio_config.ngpio = WS16C48_NGPIO; + gpio_config.names = ws16c48_names; + gpio_config.reg_dat_base = GPIO_REGMAP_ADDR(WS16C48_DAT_BASE); + gpio_config.reg_set_base = GPIO_REGMAP_ADDR(WS16C48_DAT_BASE); + /* Setting a GPIO to 0 allows it to be used as an input */ + gpio_config.reg_dir_out_base = GPIO_REGMAP_ADDR(WS16C48_DAT_BASE); + gpio_config.ngpio_per_reg = WS16C48_NGPIO_PER_REG; + gpio_config.irq_domain = regmap_irq_get_domain(chip_data); + + return PTR_ERR_OR_ZERO(devm_gpio_regmap_register(dev, &gpio_config)); } static struct isa_driver ws16c48_driver = { From a0e3b8e2acd0f6e30fe68dd74116596bcf59aa63 Mon Sep 17 00:00:00 2001 From: Rajeshwar R Shinde Date: Thu, 10 Aug 2023 18:36:00 +0530 Subject: [PATCH 369/656] gpio: imx-scu: Use ARRAY_SIZE for array length Use of macro ARRAY_SIZE to calculate array size minimizes the redundant code and improves code reusability. This fixes warnings reported by Coccinelle: drivers/gpio/gpio-imx-scu.c:106:32-33: WARNING: Use ARRAY_SIZE Signed-off-by: Rajeshwar R Shinde Reviewed-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-imx-scu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-imx-scu.c b/drivers/gpio/gpio-imx-scu.c index e190bde5397d..13baf465aedf 100644 --- a/drivers/gpio/gpio-imx-scu.c +++ b/drivers/gpio/gpio-imx-scu.c @@ -6,6 +6,7 @@ * to control the PIN resources on SCU domain. */ +#include #include #include #include @@ -103,7 +104,7 @@ static int imx_scu_gpio_probe(struct platform_device *pdev) gc = &priv->chip; gc->base = -1; gc->parent = dev; - gc->ngpio = sizeof(scu_rsrc_arr)/sizeof(unsigned int); + gc->ngpio = ARRAY_SIZE(scu_rsrc_arr); gc->label = dev_name(dev); gc->get = imx_scu_gpio_get; gc->set = imx_scu_gpio_set; From b7df0f340b64c543bb84c42698347f08b6e18fe2 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 10 Aug 2023 11:59:49 +0200 Subject: [PATCH 370/656] gpio: mxs: fix Wvoid-pointer-to-enum-cast warning 'devid' is an enum, thus cast of pointer on 64-bit compile test with W=1 causes: gpio-mxs.c:274:16: error: cast to smaller integer type 'enum mxs_gpio_id' from 'const void *' [-Werror,-Wvoid-pointer-to-enum-cast] Signed-off-by: Krzysztof Kozlowski Reviewed-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-mxs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-mxs.c b/drivers/gpio/gpio-mxs.c index 8e04c9c4b5a2..024ad077e98d 100644 --- a/drivers/gpio/gpio-mxs.c +++ b/drivers/gpio/gpio-mxs.c @@ -271,7 +271,7 @@ static int mxs_gpio_probe(struct platform_device *pdev) port->id = of_alias_get_id(np, "gpio"); if (port->id < 0) return port->id; - port->devid = (enum mxs_gpio_id)of_device_get_match_data(&pdev->dev); + port->devid = (uintptr_t)of_device_get_match_data(&pdev->dev); port->dev = &pdev->dev; port->irq = platform_get_irq(pdev, 0); if (port->irq < 0) From 5f6d1998adeb5374ef248b5ba2e2a0c30ab0f60b Mon Sep 17 00:00:00 2001 From: Shenwei Wang Date: Wed, 9 Aug 2023 09:13:24 -0500 Subject: [PATCH 371/656] gpio: mxc: release the parent IRQ in runtime suspend Release the parent interrupt request during runtime suspend, allowing the parent interrupt controller to enter runtime suspend if there are no active users. This change may not have a visible impact if the parent controller is the GIC, but it can enable significant power savings for parent IRQ controllers like IRQSteer inside a subsystem on i.MX8 SoCs. Releasing the parent IRQ provides an opportunity for the subsystem to enter suspend states if there are no active users. Signed-off-by: Shenwei Wang Reviewed-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-mxc.c | 41 +++++++++++++++++++++++++++++------------ 1 file changed, 29 insertions(+), 12 deletions(-) diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c index 377d3ab8d626..004c6ad7ce52 100644 --- a/drivers/gpio/gpio-mxc.c +++ b/drivers/gpio/gpio-mxc.c @@ -62,6 +62,7 @@ struct mxc_gpio_port { struct clk *clk; int irq; int irq_high; + void (*mx_irq_handler)(struct irq_desc *desc); struct irq_domain *domain; struct gpio_chip gc; struct device *dev; @@ -399,6 +400,24 @@ static void mxc_gpio_free(struct gpio_chip *chip, unsigned int offset) pm_runtime_put(chip->parent); } +static void mxc_update_irq_chained_handler(struct mxc_gpio_port *port, bool enable) +{ + if (enable) + irq_set_chained_handler_and_data(port->irq, port->mx_irq_handler, port); + else + irq_set_chained_handler_and_data(port->irq, NULL, NULL); + + /* setup handler for GPIO 16 to 31 */ + if (port->irq_high > 0) { + if (enable) + irq_set_chained_handler_and_data(port->irq_high, + port->mx_irq_handler, + port); + else + irq_set_chained_handler_and_data(port->irq_high, NULL, NULL); + } +} + static int mxc_gpio_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; @@ -460,18 +479,12 @@ static int mxc_gpio_probe(struct platform_device *pdev) * the handler is needed only once, but doing it for every port * is more robust and easier. */ - irq_set_chained_handler(port->irq, mx2_gpio_irq_handler); - } else { - /* setup one handler for each entry */ - irq_set_chained_handler_and_data(port->irq, - mx3_gpio_irq_handler, port); - if (port->irq_high > 0) - /* setup handler for GPIO 16 to 31 */ - irq_set_chained_handler_and_data(port->irq_high, - mx3_gpio_irq_handler, - port); - } + port->irq_high = -1; + port->mx_irq_handler = mx2_gpio_irq_handler; + } else + port->mx_irq_handler = mx3_gpio_irq_handler; + mxc_update_irq_chained_handler(port, true); err = bgpio_init(&port->gc, &pdev->dev, 4, port->base + GPIO_PSR, port->base + GPIO_DR, NULL, @@ -604,6 +617,7 @@ static int mxc_gpio_runtime_suspend(struct device *dev) mxc_gpio_save_regs(port); clk_disable_unprepare(port->clk); + mxc_update_irq_chained_handler(port, false); return 0; } @@ -613,9 +627,12 @@ static int mxc_gpio_runtime_resume(struct device *dev) struct mxc_gpio_port *port = dev_get_drvdata(dev); int ret; + mxc_update_irq_chained_handler(port, true); ret = clk_prepare_enable(port->clk); - if (ret) + if (ret) { + mxc_update_irq_chained_handler(port, false); return ret; + } mxc_gpio_restore_regs(port); From a40fe1ffb69b709835a0623959f95d6c81ff38c1 Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Fri, 11 Aug 2023 15:14:26 +0200 Subject: [PATCH 372/656] gpio: sim: simplify gpio_sim_device_config_live_store() Simplify the logic when checking the current live value against the user input. Signed-off-by: Bartosz Golaszewski Reviewed-by: Andy Shevchenko --- drivers/gpio/gpio-sim.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpio/gpio-sim.c b/drivers/gpio/gpio-sim.c index 1a3729eb44eb..1fbbb49985f6 100644 --- a/drivers/gpio/gpio-sim.c +++ b/drivers/gpio/gpio-sim.c @@ -986,8 +986,7 @@ gpio_sim_device_config_live_store(struct config_item *item, mutex_lock(&dev->lock); - if ((!live && !gpio_sim_device_is_live_unlocked(dev)) || - (live && gpio_sim_device_is_live_unlocked(dev))) + if (live == gpio_sim_device_is_live_unlocked(dev)) ret = -EPERM; else if (live) ret = gpio_sim_device_activate_unlocked(dev); From 40f78b74b6d425115d1df78516d14c35384172e7 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Mon, 7 Aug 2023 20:40:46 +0800 Subject: [PATCH 373/656] spi: amlogic-spifc-a1: switch to use devm_spi_alloc_host() Switch to use modern name function devm_spi_alloc_host(). No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230807124105.3429709-2-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-amlogic-spifc-a1.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/spi-amlogic-spifc-a1.c b/drivers/spi/spi-amlogic-spifc-a1.c index 605e9e40455c..fadf6667cd51 100644 --- a/drivers/spi/spi-amlogic-spifc-a1.c +++ b/drivers/spi/spi-amlogic-spifc-a1.c @@ -326,7 +326,7 @@ static int amlogic_spifc_a1_probe(struct platform_device *pdev) struct amlogic_spifc_a1 *spifc; int ret; - ctrl = devm_spi_alloc_master(&pdev->dev, sizeof(*spifc)); + ctrl = devm_spi_alloc_host(&pdev->dev, sizeof(*spifc)); if (!ctrl) return -ENOMEM; From 0c35cc597b211eea2f26eae35904204cbd8e0e94 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Mon, 7 Aug 2023 20:40:47 +0800 Subject: [PATCH 374/656] spi: au1550: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230807124105.3429709-3-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-au1550.c | 74 ++++++++++++++++++++-------------------- 1 file changed, 37 insertions(+), 37 deletions(-) diff --git a/drivers/spi/spi-au1550.c b/drivers/spi/spi-au1550.c index 0b57e6afce0f..1011b1a8f241 100644 --- a/drivers/spi/spi-au1550.c +++ b/drivers/spi/spi-au1550.c @@ -54,7 +54,7 @@ struct au1550_spi { int (*txrx_bufs)(struct spi_device *spi, struct spi_transfer *t); irqreturn_t (*irq_callback)(struct au1550_spi *hw); - struct completion master_done; + struct completion host_done; unsigned int usedma; u32 dma_tx_id; @@ -66,7 +66,7 @@ struct au1550_spi { unsigned int dma_rx_tmpbuf_size; u32 dma_rx_tmpbuf_addr; - struct spi_master *master; + struct spi_controller *host; struct device *dev; struct au1550_spi_info *pdata; struct resource *ioarea; @@ -159,7 +159,7 @@ static void au1550_spi_reset_fifos(struct au1550_spi *hw) */ static void au1550_spi_chipsel(struct spi_device *spi, int value) { - struct au1550_spi *hw = spi_master_get_devdata(spi->master); + struct au1550_spi *hw = spi_controller_get_devdata(spi->controller); unsigned int cspol = spi->mode & SPI_CS_HIGH ? 1 : 0; u32 cfg, stat; @@ -219,7 +219,7 @@ static void au1550_spi_chipsel(struct spi_device *spi, int value) static int au1550_spi_setupxfer(struct spi_device *spi, struct spi_transfer *t) { - struct au1550_spi *hw = spi_master_get_devdata(spi->master); + struct au1550_spi *hw = spi_controller_get_devdata(spi->controller); unsigned int bpw, hz; u32 cfg, stat; @@ -272,7 +272,7 @@ static int au1550_spi_setupxfer(struct spi_device *spi, struct spi_transfer *t) * no reliable way how to recognize that spi transfer is done * dma complete callbacks are called before real spi transfer is finished * and if only tx dma channel is set up (and rx fifo overflow event masked) - * spi master done event irq is not generated unless rx fifo is empty (emptied) + * spi host done event irq is not generated unless rx fifo is empty (emptied) * so we need rx tmp buffer to use for rx dma if user does not provide one */ static int au1550_spi_dma_rxtmp_alloc(struct au1550_spi *hw, unsigned int size) @@ -303,7 +303,7 @@ static void au1550_spi_dma_rxtmp_free(struct au1550_spi *hw) static int au1550_spi_dma_txrxb(struct spi_device *spi, struct spi_transfer *t) { - struct au1550_spi *hw = spi_master_get_devdata(spi->master); + struct au1550_spi *hw = spi_controller_get_devdata(spi->controller); dma_addr_t dma_tx_addr; dma_addr_t dma_rx_addr; u32 res; @@ -387,7 +387,7 @@ static int au1550_spi_dma_txrxb(struct spi_device *spi, struct spi_transfer *t) hw->regs->psc_spipcr = PSC_SPIPCR_MS; wmb(); /* drain writebuffer */ - wait_for_completion(&hw->master_done); + wait_for_completion(&hw->host_done); au1xxx_dbdma_stop(hw->dma_tx_ch); au1xxx_dbdma_stop(hw->dma_rx_ch); @@ -449,7 +449,7 @@ static irqreturn_t au1550_spi_dma_irq_callback(struct au1550_spi *hw) "dma transfer: unexpected SPI error (event=0x%x stat=0x%x)!\n", evnt, stat); - complete(&hw->master_done); + complete(&hw->host_done); return IRQ_HANDLED; } @@ -458,7 +458,7 @@ static irqreturn_t au1550_spi_dma_irq_callback(struct au1550_spi *hw) au1550_spi_mask_ack_all(hw); hw->rx_count = hw->len; hw->tx_count = hw->len; - complete(&hw->master_done); + complete(&hw->host_done); } return IRQ_HANDLED; } @@ -502,7 +502,7 @@ AU1550_SPI_TX_WORD(32, 0xffffff) static int au1550_spi_pio_txrxb(struct spi_device *spi, struct spi_transfer *t) { u32 stat, mask; - struct au1550_spi *hw = spi_master_get_devdata(spi->master); + struct au1550_spi *hw = spi_controller_get_devdata(spi->controller); hw->tx = t->tx_buf; hw->rx = t->rx_buf; @@ -537,7 +537,7 @@ static int au1550_spi_pio_txrxb(struct spi_device *spi, struct spi_transfer *t) hw->regs->psc_spipcr = PSC_SPIPCR_MS; wmb(); /* drain writebuffer */ - wait_for_completion(&hw->master_done); + wait_for_completion(&hw->host_done); return min(hw->rx_count, hw->tx_count); } @@ -568,7 +568,7 @@ static irqreturn_t au1550_spi_pio_irq_callback(struct au1550_spi *hw) dev_err(hw->dev, "pio transfer: unexpected SPI error (event=0x%x stat=0x%x)!\n", evnt, stat); - complete(&hw->master_done); + complete(&hw->host_done); return IRQ_HANDLED; } @@ -605,11 +605,11 @@ static irqreturn_t au1550_spi_pio_irq_callback(struct au1550_spi *hw) /* * Restart the SPI transmission in case of a transmit underflow. * This seems to work despite the notes in the Au1550 data book - * of Figure 8-4 with flowchart for SPI master operation: + * of Figure 8-4 with flowchart for SPI host operation: * * """Note 1: An XFR Error Interrupt occurs, unless masked, * for any of the following events: Tx FIFO Underflow, - * Rx FIFO Overflow, or Multiple-master Error + * Rx FIFO Overflow, or Multiple-host Error * Note 2: In case of a Tx Underflow Error, all zeroes are * transmitted.""" * @@ -627,14 +627,14 @@ static irqreturn_t au1550_spi_pio_irq_callback(struct au1550_spi *hw) if (hw->rx_count >= hw->len) { /* transfer completed successfully */ au1550_spi_mask_ack_all(hw); - complete(&hw->master_done); + complete(&hw->host_done); } return IRQ_HANDLED; } static int au1550_spi_txrx_bufs(struct spi_device *spi, struct spi_transfer *t) { - struct au1550_spi *hw = spi_master_get_devdata(spi->master); + struct au1550_spi *hw = spi_controller_get_devdata(spi->controller); return hw->txrx_bufs(spi, t); } @@ -723,24 +723,24 @@ static void au1550_spi_setup_psc_as_spi(struct au1550_spi *hw) static int au1550_spi_probe(struct platform_device *pdev) { struct au1550_spi *hw; - struct spi_master *master; + struct spi_controller *host; struct resource *r; int err = 0; - master = spi_alloc_master(&pdev->dev, sizeof(struct au1550_spi)); - if (master == NULL) { - dev_err(&pdev->dev, "No memory for spi_master\n"); + host = spi_alloc_host(&pdev->dev, sizeof(struct au1550_spi)); + if (host == NULL) { + dev_err(&pdev->dev, "No memory for spi_controller\n"); err = -ENOMEM; goto err_nomem; } /* the spi->mode bits understood by this driver: */ - master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST; - master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 24); + host->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST; + host->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 24); - hw = spi_master_get_devdata(master); + hw = spi_controller_get_devdata(host); - hw->master = master; + hw->host = host; hw->pdata = dev_get_platdata(&pdev->dev); hw->dev = &pdev->dev; @@ -798,9 +798,9 @@ static int au1550_spi_probe(struct platform_device *pdev) platform_set_drvdata(pdev, hw); - init_completion(&hw->master_done); + init_completion(&hw->host_done); - hw->bitbang.master = hw->master; + hw->bitbang.master = hw->host; hw->bitbang.setup_transfer = au1550_spi_setupxfer; hw->bitbang.chipselect = au1550_spi_chipsel; hw->bitbang.txrx_bufs = au1550_spi_txrx_bufs; @@ -858,8 +858,8 @@ static int au1550_spi_probe(struct platform_device *pdev) goto err_no_irq; } - master->bus_num = pdev->id; - master->num_chipselect = hw->pdata->num_chipselect; + host->bus_num = pdev->id; + host->num_chipselect = hw->pdata->num_chipselect; /* * precompute valid range for spi freq - from au1550 datasheet: @@ -874,8 +874,8 @@ static int au1550_spi_probe(struct platform_device *pdev) int min_div = (2 << 0) * (2 * (4 + 1)); int max_div = (2 << 3) * (2 * (63 + 1)); - master->max_speed_hz = hw->pdata->mainclk_hz / min_div; - master->min_speed_hz = + host->max_speed_hz = hw->pdata->mainclk_hz / min_div; + host->min_speed_hz = hw->pdata->mainclk_hz / (max_div + 1) + 1; } @@ -883,13 +883,13 @@ static int au1550_spi_probe(struct platform_device *pdev) err = spi_bitbang_start(&hw->bitbang); if (err) { - dev_err(&pdev->dev, "Failed to register SPI master\n"); + dev_err(&pdev->dev, "Failed to register SPI host\n"); goto err_register; } dev_info(&pdev->dev, - "spi master registered: bus_num=%d num_chipselect=%d\n", - master->bus_num, master->num_chipselect); + "spi host registered: bus_num=%d num_chipselect=%d\n", + host->bus_num, host->num_chipselect); return 0; @@ -917,7 +917,7 @@ err_ioremap: err_no_iores: err_no_pdata: - spi_master_put(hw->master); + spi_controller_put(hw->host); err_nomem: return err; @@ -927,8 +927,8 @@ static void au1550_spi_remove(struct platform_device *pdev) { struct au1550_spi *hw = platform_get_drvdata(pdev); - dev_info(&pdev->dev, "spi master remove: bus_num=%d\n", - hw->master->bus_num); + dev_info(&pdev->dev, "spi host remove: bus_num=%d\n", + hw->host->bus_num); spi_bitbang_stop(&hw->bitbang); free_irq(hw->irq, hw); @@ -941,7 +941,7 @@ static void au1550_spi_remove(struct platform_device *pdev) au1xxx_dbdma_chan_free(hw->dma_tx_ch); } - spi_master_put(hw->master); + spi_controller_put(hw->host); } /* work with hotplug and coldplug */ From 24e9b75c0cc3b465cb8f355b2e1b239a54625ae3 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Mon, 7 Aug 2023 20:40:48 +0800 Subject: [PATCH 375/656] spi: ep93xx: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230807124105.3429709-4-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-ep93xx.c | 174 +++++++++++++++++++-------------------- 1 file changed, 87 insertions(+), 87 deletions(-) diff --git a/drivers/spi/spi-ep93xx.c b/drivers/spi/spi-ep93xx.c index 3693b3d425c7..a1d60e51c053 100644 --- a/drivers/spi/spi-ep93xx.c +++ b/drivers/spi/spi-ep93xx.c @@ -104,15 +104,15 @@ struct ep93xx_spi { /** * ep93xx_spi_calc_divisors() - calculates SPI clock divisors - * @master: SPI master + * @host: SPI host * @rate: desired SPI output clock rate * @div_cpsr: pointer to return the cpsr (pre-scaler) divider * @div_scr: pointer to return the scr divider */ -static int ep93xx_spi_calc_divisors(struct spi_master *master, +static int ep93xx_spi_calc_divisors(struct spi_controller *host, u32 rate, u8 *div_cpsr, u8 *div_scr) { - struct ep93xx_spi *espi = spi_master_get_devdata(master); + struct ep93xx_spi *espi = spi_controller_get_devdata(host); unsigned long spi_clk_rate = clk_get_rate(espi->clk); int cpsr, scr; @@ -120,7 +120,7 @@ static int ep93xx_spi_calc_divisors(struct spi_master *master, * Make sure that max value is between values supported by the * controller. */ - rate = clamp(rate, master->min_speed_hz, master->max_speed_hz); + rate = clamp(rate, host->min_speed_hz, host->max_speed_hz); /* * Calculate divisors so that we can get speed according the @@ -143,18 +143,18 @@ static int ep93xx_spi_calc_divisors(struct spi_master *master, return -EINVAL; } -static int ep93xx_spi_chip_setup(struct spi_master *master, +static int ep93xx_spi_chip_setup(struct spi_controller *host, struct spi_device *spi, struct spi_transfer *xfer) { - struct ep93xx_spi *espi = spi_master_get_devdata(master); + struct ep93xx_spi *espi = spi_controller_get_devdata(host); u8 dss = bits_per_word_to_dss(xfer->bits_per_word); u8 div_cpsr = 0; u8 div_scr = 0; u16 cr0; int err; - err = ep93xx_spi_calc_divisors(master, xfer->speed_hz, + err = ep93xx_spi_calc_divisors(host, xfer->speed_hz, &div_cpsr, &div_scr); if (err) return err; @@ -166,9 +166,9 @@ static int ep93xx_spi_chip_setup(struct spi_master *master, cr0 |= SSPCR0_SPH; cr0 |= dss; - dev_dbg(&master->dev, "setup: mode %d, cpsr %d, scr %d, dss %d\n", + dev_dbg(&host->dev, "setup: mode %d, cpsr %d, scr %d, dss %d\n", spi->mode, div_cpsr, div_scr, dss); - dev_dbg(&master->dev, "setup: cr0 %#x\n", cr0); + dev_dbg(&host->dev, "setup: cr0 %#x\n", cr0); writel(div_cpsr, espi->mmio + SSPCPSR); writel(cr0, espi->mmio + SSPCR0); @@ -176,10 +176,10 @@ static int ep93xx_spi_chip_setup(struct spi_master *master, return 0; } -static void ep93xx_do_write(struct spi_master *master) +static void ep93xx_do_write(struct spi_controller *host) { - struct ep93xx_spi *espi = spi_master_get_devdata(master); - struct spi_transfer *xfer = master->cur_msg->state; + struct ep93xx_spi *espi = spi_controller_get_devdata(host); + struct spi_transfer *xfer = host->cur_msg->state; u32 val = 0; if (xfer->bits_per_word > 8) { @@ -194,10 +194,10 @@ static void ep93xx_do_write(struct spi_master *master) writel(val, espi->mmio + SSPDR); } -static void ep93xx_do_read(struct spi_master *master) +static void ep93xx_do_read(struct spi_controller *host) { - struct ep93xx_spi *espi = spi_master_get_devdata(master); - struct spi_transfer *xfer = master->cur_msg->state; + struct ep93xx_spi *espi = spi_controller_get_devdata(host); + struct spi_transfer *xfer = host->cur_msg->state; u32 val; val = readl(espi->mmio + SSPDR); @@ -214,7 +214,7 @@ static void ep93xx_do_read(struct spi_master *master) /** * ep93xx_spi_read_write() - perform next RX/TX transfer - * @master: SPI master + * @host: SPI host * * This function transfers next bytes (or half-words) to/from RX/TX FIFOs. If * called several times, the whole transfer will be completed. Returns @@ -223,20 +223,20 @@ static void ep93xx_do_read(struct spi_master *master) * When this function is finished, RX FIFO should be empty and TX FIFO should be * full. */ -static int ep93xx_spi_read_write(struct spi_master *master) +static int ep93xx_spi_read_write(struct spi_controller *host) { - struct ep93xx_spi *espi = spi_master_get_devdata(master); - struct spi_transfer *xfer = master->cur_msg->state; + struct ep93xx_spi *espi = spi_controller_get_devdata(host); + struct spi_transfer *xfer = host->cur_msg->state; /* read as long as RX FIFO has frames in it */ while ((readl(espi->mmio + SSPSR) & SSPSR_RNE)) { - ep93xx_do_read(master); + ep93xx_do_read(host); espi->fifo_level--; } /* write as long as TX FIFO has room */ while (espi->fifo_level < SPI_FIFO_SIZE && espi->tx < xfer->len) { - ep93xx_do_write(master); + ep93xx_do_write(host); espi->fifo_level++; } @@ -261,7 +261,7 @@ ep93xx_dma_data_to_trans_dir(enum dma_data_direction dir) /** * ep93xx_spi_dma_prepare() - prepares a DMA transfer - * @master: SPI master + * @host: SPI host * @dir: DMA transfer direction * * Function configures the DMA, maps the buffer and prepares the DMA @@ -269,11 +269,11 @@ ep93xx_dma_data_to_trans_dir(enum dma_data_direction dir) * in case of failure. */ static struct dma_async_tx_descriptor * -ep93xx_spi_dma_prepare(struct spi_master *master, +ep93xx_spi_dma_prepare(struct spi_controller *host, enum dma_data_direction dir) { - struct ep93xx_spi *espi = spi_master_get_devdata(master); - struct spi_transfer *xfer = master->cur_msg->state; + struct ep93xx_spi *espi = spi_controller_get_devdata(host); + struct spi_transfer *xfer = host->cur_msg->state; struct dma_async_tx_descriptor *txd; enum dma_slave_buswidth buswidth; struct dma_slave_config conf; @@ -348,7 +348,7 @@ ep93xx_spi_dma_prepare(struct spi_master *master, } if (WARN_ON(len)) { - dev_warn(&master->dev, "len = %zu expected 0!\n", len); + dev_warn(&host->dev, "len = %zu expected 0!\n", len); return ERR_PTR(-EINVAL); } @@ -367,16 +367,16 @@ ep93xx_spi_dma_prepare(struct spi_master *master, /** * ep93xx_spi_dma_finish() - finishes with a DMA transfer - * @master: SPI master + * @host: SPI host * @dir: DMA transfer direction * * Function finishes with the DMA transfer. After this, the DMA buffer is * unmapped. */ -static void ep93xx_spi_dma_finish(struct spi_master *master, +static void ep93xx_spi_dma_finish(struct spi_controller *host, enum dma_data_direction dir) { - struct ep93xx_spi *espi = spi_master_get_devdata(master); + struct ep93xx_spi *espi = spi_controller_get_devdata(host); struct dma_chan *chan; struct sg_table *sgt; @@ -393,35 +393,35 @@ static void ep93xx_spi_dma_finish(struct spi_master *master, static void ep93xx_spi_dma_callback(void *callback_param) { - struct spi_master *master = callback_param; + struct spi_controller *host = callback_param; - ep93xx_spi_dma_finish(master, DMA_TO_DEVICE); - ep93xx_spi_dma_finish(master, DMA_FROM_DEVICE); + ep93xx_spi_dma_finish(host, DMA_TO_DEVICE); + ep93xx_spi_dma_finish(host, DMA_FROM_DEVICE); - spi_finalize_current_transfer(master); + spi_finalize_current_transfer(host); } -static int ep93xx_spi_dma_transfer(struct spi_master *master) +static int ep93xx_spi_dma_transfer(struct spi_controller *host) { - struct ep93xx_spi *espi = spi_master_get_devdata(master); + struct ep93xx_spi *espi = spi_controller_get_devdata(host); struct dma_async_tx_descriptor *rxd, *txd; - rxd = ep93xx_spi_dma_prepare(master, DMA_FROM_DEVICE); + rxd = ep93xx_spi_dma_prepare(host, DMA_FROM_DEVICE); if (IS_ERR(rxd)) { - dev_err(&master->dev, "DMA RX failed: %ld\n", PTR_ERR(rxd)); + dev_err(&host->dev, "DMA RX failed: %ld\n", PTR_ERR(rxd)); return PTR_ERR(rxd); } - txd = ep93xx_spi_dma_prepare(master, DMA_TO_DEVICE); + txd = ep93xx_spi_dma_prepare(host, DMA_TO_DEVICE); if (IS_ERR(txd)) { - ep93xx_spi_dma_finish(master, DMA_FROM_DEVICE); - dev_err(&master->dev, "DMA TX failed: %ld\n", PTR_ERR(txd)); + ep93xx_spi_dma_finish(host, DMA_FROM_DEVICE); + dev_err(&host->dev, "DMA TX failed: %ld\n", PTR_ERR(txd)); return PTR_ERR(txd); } /* We are ready when RX is done */ rxd->callback = ep93xx_spi_dma_callback; - rxd->callback_param = master; + rxd->callback_param = host; /* Now submit both descriptors and start DMA */ dmaengine_submit(rxd); @@ -436,8 +436,8 @@ static int ep93xx_spi_dma_transfer(struct spi_master *master) static irqreturn_t ep93xx_spi_interrupt(int irq, void *dev_id) { - struct spi_master *master = dev_id; - struct ep93xx_spi *espi = spi_master_get_devdata(master); + struct spi_controller *host = dev_id; + struct ep93xx_spi *espi = spi_controller_get_devdata(host); u32 val; /* @@ -447,15 +447,15 @@ static irqreturn_t ep93xx_spi_interrupt(int irq, void *dev_id) if (readl(espi->mmio + SSPIIR) & SSPIIR_RORIS) { /* clear the overrun interrupt */ writel(0, espi->mmio + SSPICR); - dev_warn(&master->dev, + dev_warn(&host->dev, "receive overrun, aborting the message\n"); - master->cur_msg->status = -EIO; + host->cur_msg->status = -EIO; } else { /* * Interrupt is either RX (RIS) or TX (TIS). For both cases we * simply execute next data transfer. */ - if (ep93xx_spi_read_write(master)) { + if (ep93xx_spi_read_write(host)) { /* * In normal case, there still is some processing left * for current transfer. Let's wait for the next @@ -474,26 +474,26 @@ static irqreturn_t ep93xx_spi_interrupt(int irq, void *dev_id) val &= ~(SSPCR1_RORIE | SSPCR1_TIE | SSPCR1_RIE); writel(val, espi->mmio + SSPCR1); - spi_finalize_current_transfer(master); + spi_finalize_current_transfer(host); return IRQ_HANDLED; } -static int ep93xx_spi_transfer_one(struct spi_master *master, +static int ep93xx_spi_transfer_one(struct spi_controller *host, struct spi_device *spi, struct spi_transfer *xfer) { - struct ep93xx_spi *espi = spi_master_get_devdata(master); + struct ep93xx_spi *espi = spi_controller_get_devdata(host); u32 val; int ret; - ret = ep93xx_spi_chip_setup(master, spi, xfer); + ret = ep93xx_spi_chip_setup(host, spi, xfer); if (ret) { - dev_err(&master->dev, "failed to setup chip for transfer\n"); + dev_err(&host->dev, "failed to setup chip for transfer\n"); return ret; } - master->cur_msg->state = xfer; + host->cur_msg->state = xfer; espi->rx = 0; espi->tx = 0; @@ -503,10 +503,10 @@ static int ep93xx_spi_transfer_one(struct spi_master *master, * So in these cases we will be using PIO and don't bother for DMA. */ if (espi->dma_rx && xfer->len > SPI_FIFO_SIZE) - return ep93xx_spi_dma_transfer(master); + return ep93xx_spi_dma_transfer(host); /* Using PIO so prime the TX FIFO and enable interrupts */ - ep93xx_spi_read_write(master); + ep93xx_spi_read_write(host); val = readl(espi->mmio + SSPCR1); val |= (SSPCR1_RORIE | SSPCR1_TIE | SSPCR1_RIE); @@ -516,10 +516,10 @@ static int ep93xx_spi_transfer_one(struct spi_master *master, return 1; } -static int ep93xx_spi_prepare_message(struct spi_master *master, +static int ep93xx_spi_prepare_message(struct spi_controller *host, struct spi_message *msg) { - struct ep93xx_spi *espi = spi_master_get_devdata(master); + struct ep93xx_spi *espi = spi_controller_get_devdata(host); unsigned long timeout; /* @@ -528,7 +528,7 @@ static int ep93xx_spi_prepare_message(struct spi_master *master, timeout = jiffies + msecs_to_jiffies(SPI_TIMEOUT); while (readl(espi->mmio + SSPSR) & SSPSR_RNE) { if (time_after(jiffies, timeout)) { - dev_warn(&master->dev, + dev_warn(&host->dev, "timeout while flushing RX FIFO\n"); return -ETIMEDOUT; } @@ -544,9 +544,9 @@ static int ep93xx_spi_prepare_message(struct spi_master *master, return 0; } -static int ep93xx_spi_prepare_hardware(struct spi_master *master) +static int ep93xx_spi_prepare_hardware(struct spi_controller *host) { - struct ep93xx_spi *espi = spi_master_get_devdata(master); + struct ep93xx_spi *espi = spi_controller_get_devdata(host); u32 val; int ret; @@ -561,9 +561,9 @@ static int ep93xx_spi_prepare_hardware(struct spi_master *master) return 0; } -static int ep93xx_spi_unprepare_hardware(struct spi_master *master) +static int ep93xx_spi_unprepare_hardware(struct spi_controller *host) { - struct ep93xx_spi *espi = spi_master_get_devdata(master); + struct ep93xx_spi *espi = spi_controller_get_devdata(host); u32 val; val = readl(espi->mmio + SSPCR1); @@ -646,7 +646,7 @@ static void ep93xx_spi_release_dma(struct ep93xx_spi *espi) static int ep93xx_spi_probe(struct platform_device *pdev) { - struct spi_master *master; + struct spi_controller *host; struct ep93xx_spi_info *info; struct ep93xx_spi *espi; struct resource *res; @@ -663,54 +663,54 @@ static int ep93xx_spi_probe(struct platform_device *pdev) if (irq < 0) return irq; - master = spi_alloc_master(&pdev->dev, sizeof(*espi)); - if (!master) + host = spi_alloc_host(&pdev->dev, sizeof(*espi)); + if (!host) return -ENOMEM; - master->use_gpio_descriptors = true; - master->prepare_transfer_hardware = ep93xx_spi_prepare_hardware; - master->unprepare_transfer_hardware = ep93xx_spi_unprepare_hardware; - master->prepare_message = ep93xx_spi_prepare_message; - master->transfer_one = ep93xx_spi_transfer_one; - master->bus_num = pdev->id; - master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; - master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 16); + host->use_gpio_descriptors = true; + host->prepare_transfer_hardware = ep93xx_spi_prepare_hardware; + host->unprepare_transfer_hardware = ep93xx_spi_unprepare_hardware; + host->prepare_message = ep93xx_spi_prepare_message; + host->transfer_one = ep93xx_spi_transfer_one; + host->bus_num = pdev->id; + host->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; + host->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 16); /* * The SPI core will count the number of GPIO descriptors to figure * out the number of chip selects available on the platform. */ - master->num_chipselect = 0; + host->num_chipselect = 0; - platform_set_drvdata(pdev, master); + platform_set_drvdata(pdev, host); - espi = spi_master_get_devdata(master); + espi = spi_controller_get_devdata(host); espi->clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(espi->clk)) { dev_err(&pdev->dev, "unable to get spi clock\n"); error = PTR_ERR(espi->clk); - goto fail_release_master; + goto fail_release_host; } /* * Calculate maximum and minimum supported clock rates * for the controller. */ - master->max_speed_hz = clk_get_rate(espi->clk) / 2; - master->min_speed_hz = clk_get_rate(espi->clk) / (254 * 256); + host->max_speed_hz = clk_get_rate(espi->clk) / 2; + host->min_speed_hz = clk_get_rate(espi->clk) / (254 * 256); espi->mmio = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(espi->mmio)) { error = PTR_ERR(espi->mmio); - goto fail_release_master; + goto fail_release_host; } espi->sspdr_phys = res->start + SSPDR; error = devm_request_irq(&pdev->dev, irq, ep93xx_spi_interrupt, - 0, "ep93xx-spi", master); + 0, "ep93xx-spi", host); if (error) { dev_err(&pdev->dev, "failed to request irq\n"); - goto fail_release_master; + goto fail_release_host; } if (info->use_dma && ep93xx_spi_setup_dma(espi)) @@ -719,9 +719,9 @@ static int ep93xx_spi_probe(struct platform_device *pdev) /* make sure that the hardware is disabled */ writel(0, espi->mmio + SSPCR1); - error = devm_spi_register_master(&pdev->dev, master); + error = devm_spi_register_controller(&pdev->dev, host); if (error) { - dev_err(&pdev->dev, "failed to register SPI master\n"); + dev_err(&pdev->dev, "failed to register SPI host\n"); goto fail_free_dma; } @@ -732,16 +732,16 @@ static int ep93xx_spi_probe(struct platform_device *pdev) fail_free_dma: ep93xx_spi_release_dma(espi); -fail_release_master: - spi_master_put(master); +fail_release_host: + spi_controller_put(host); return error; } static void ep93xx_spi_remove(struct platform_device *pdev) { - struct spi_master *master = platform_get_drvdata(pdev); - struct ep93xx_spi *espi = spi_master_get_devdata(master); + struct spi_controller *host = platform_get_drvdata(pdev); + struct ep93xx_spi *espi = spi_controller_get_devdata(host); ep93xx_spi_release_dma(espi); } From 45d9591105a63fa80d69552ebbd5073c3b16d6bd Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Mon, 7 Aug 2023 20:40:49 +0800 Subject: [PATCH 376/656] spi: falcon: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230807124105.3429709-5-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-falcon.c | 34 +++++++++++++++++----------------- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/drivers/spi/spi-falcon.c b/drivers/spi/spi-falcon.c index 8a8414cbb400..84279058f0f1 100644 --- a/drivers/spi/spi-falcon.c +++ b/drivers/spi/spi-falcon.c @@ -91,14 +91,14 @@ struct falcon_sflash { u32 sfcmd; /* for caching of opcode, direction, ... */ - struct spi_master *master; + struct spi_controller *host; }; int falcon_sflash_xfer(struct spi_device *spi, struct spi_transfer *t, unsigned long flags) { struct device *dev = &spi->dev; - struct falcon_sflash *priv = spi_master_get_devdata(spi->master); + struct falcon_sflash *priv = spi_controller_get_devdata(spi->controller); const u8 *txp = t->tx_buf; u8 *rxp = t->rx_buf; unsigned int bytelen = ((8 * t->len + 7) / 8); @@ -351,10 +351,10 @@ static int falcon_sflash_setup(struct spi_device *spi) return 0; } -static int falcon_sflash_xfer_one(struct spi_master *master, +static int falcon_sflash_xfer_one(struct spi_controller *host, struct spi_message *m) { - struct falcon_sflash *priv = spi_master_get_devdata(master); + struct falcon_sflash *priv = spi_controller_get_devdata(host); struct spi_transfer *t; unsigned long spi_flags; unsigned long flags; @@ -382,7 +382,7 @@ static int falcon_sflash_xfer_one(struct spi_master *master, } m->status = ret; - spi_finalize_current_message(master); + spi_finalize_current_message(host); return 0; } @@ -390,25 +390,25 @@ static int falcon_sflash_xfer_one(struct spi_master *master, static int falcon_sflash_probe(struct platform_device *pdev) { struct falcon_sflash *priv; - struct spi_master *master; + struct spi_controller *host; int ret; - master = spi_alloc_master(&pdev->dev, sizeof(*priv)); - if (!master) + host = spi_alloc_host(&pdev->dev, sizeof(*priv)); + if (!host) return -ENOMEM; - priv = spi_master_get_devdata(master); - priv->master = master; + priv = spi_controller_get_devdata(host); + priv->host = host; - master->mode_bits = SPI_MODE_3; - master->flags = SPI_CONTROLLER_HALF_DUPLEX; - master->setup = falcon_sflash_setup; - master->transfer_one_message = falcon_sflash_xfer_one; - master->dev.of_node = pdev->dev.of_node; + host->mode_bits = SPI_MODE_3; + host->flags = SPI_CONTROLLER_HALF_DUPLEX; + host->setup = falcon_sflash_setup; + host->transfer_one_message = falcon_sflash_xfer_one; + host->dev.of_node = pdev->dev.of_node; - ret = devm_spi_register_master(&pdev->dev, master); + ret = devm_spi_register_controller(&pdev->dev, host); if (ret) - spi_master_put(master); + spi_controller_put(host); return ret; } From d40f10d009d405a82b533633c126be7fcc88b4ce Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Mon, 7 Aug 2023 20:40:50 +0800 Subject: [PATCH 377/656] spi: fsi: switch to use spi_alloc_host() Switch to use modern name function spi_alloc_host(). No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230807124105.3429709-6-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-fsi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/spi-fsi.c b/drivers/spi/spi-fsi.c index ba3b17d7c9ec..fc9e33be1e0e 100644 --- a/drivers/spi/spi-fsi.c +++ b/drivers/spi/spi-fsi.c @@ -542,7 +542,7 @@ static int fsi_spi_probe(struct device *dev) if (of_property_read_u32(np, "reg", &base)) continue; - ctlr = spi_alloc_master(dev, sizeof(*ctx)); + ctlr = spi_alloc_host(dev, sizeof(*ctx)); if (!ctlr) { of_node_put(np); break; From 6230d6cad1a70d78f3fe3a0cda2beb1e478c4a40 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Mon, 7 Aug 2023 20:40:51 +0800 Subject: [PATCH 378/656] spi: fsl-dspi: switch to use modern name Change legacy name master/target to modern name host/target or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230807124105.3429709-7-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-fsl-dspi.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c index 150d2ebf234b..8318249f8a1f 100644 --- a/drivers/spi/spi-fsl-dspi.c +++ b/drivers/spi/spi-fsl-dspi.c @@ -23,7 +23,7 @@ #define DRIVER_NAME "fsl-dspi" #define SPI_MCR 0x00 -#define SPI_MCR_MASTER BIT(31) +#define SPI_MCR_HOST BIT(31) #define SPI_MCR_PCSIS(x) ((x) << 16) #define SPI_MCR_CLR_TXF BIT(11) #define SPI_MCR_CLR_RXF BIT(10) @@ -340,7 +340,7 @@ static u32 dspi_pop_tx_pushr(struct fsl_dspi *dspi) { u16 cmd = dspi->tx_cmd, data = dspi_pop_tx(dspi); - if (spi_controller_is_slave(dspi->ctlr)) + if (spi_controller_is_target(dspi->ctlr)) return data; if (dspi->len > 0) @@ -430,7 +430,7 @@ static int dspi_next_xfer_dma_submit(struct fsl_dspi *dspi) dma_async_issue_pending(dma->chan_rx); dma_async_issue_pending(dma->chan_tx); - if (spi_controller_is_slave(dspi->ctlr)) { + if (spi_controller_is_target(dspi->ctlr)) { wait_for_completion_interruptible(&dspi->dma->cmd_rx_complete); return 0; } @@ -1061,7 +1061,7 @@ static int dspi_setup(struct spi_device *spi) if (spi->mode & SPI_CPHA) chip->ctar_val |= SPI_CTAR_CPHA; - if (!spi_controller_is_slave(dspi->ctlr)) { + if (!spi_controller_is_target(dspi->ctlr)) { chip->ctar_val |= SPI_CTAR_PCSSCK(pcssck) | SPI_CTAR_CSSCK(cssck) | SPI_CTAR_PASC(pasc) | @@ -1216,8 +1216,8 @@ static int dspi_init(struct fsl_dspi *dspi) if (dspi->devtype_data->trans_mode == DSPI_XSPI_MODE) mcr |= SPI_MCR_XSPI; - if (!spi_controller_is_slave(dspi->ctlr)) - mcr |= SPI_MCR_MASTER; + if (!spi_controller_is_target(dspi->ctlr)) + mcr |= SPI_MCR_HOST; regmap_write(dspi->regmap, SPI_MCR, mcr); regmap_write(dspi->regmap, SPI_SR, SPI_SR_CLEAR); @@ -1240,13 +1240,13 @@ static int dspi_init(struct fsl_dspi *dspi) return 0; } -static int dspi_slave_abort(struct spi_master *master) +static int dspi_target_abort(struct spi_controller *host) { - struct fsl_dspi *dspi = spi_master_get_devdata(master); + struct fsl_dspi *dspi = spi_controller_get_devdata(host); /* * Terminate all pending DMA transactions for the SPI working - * in SLAVE mode. + * in TARGET mode. */ if (dspi->devtype_data->trans_mode == DSPI_DMA_MODE) { dmaengine_terminate_sync(dspi->dma->chan_rx); @@ -1277,7 +1277,7 @@ static int dspi_probe(struct platform_device *pdev) if (!dspi) return -ENOMEM; - ctlr = spi_alloc_master(&pdev->dev, 0); + ctlr = spi_alloc_host(&pdev->dev, 0); if (!ctlr) return -ENOMEM; @@ -1292,7 +1292,7 @@ static int dspi_probe(struct platform_device *pdev) ctlr->dev.of_node = pdev->dev.of_node; ctlr->cleanup = dspi_cleanup; - ctlr->slave_abort = dspi_slave_abort; + ctlr->target_abort = dspi_target_abort; ctlr->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST; ctlr->use_gpio_descriptors = true; @@ -1317,7 +1317,7 @@ static int dspi_probe(struct platform_device *pdev) ctlr->bus_num = bus_num; if (of_property_read_bool(np, "spi-slave")) - ctlr->slave = true; + ctlr->target = true; dspi->devtype_data = of_device_get_match_data(&pdev->dev); if (!dspi->devtype_data) { From a87935899f9c51fc6272c13339fbfd2ccec37d21 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Mon, 7 Aug 2023 20:40:52 +0800 Subject: [PATCH 379/656] spi: fsl-espi: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230807124105.3429709-8-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-fsl-espi.c | 76 +++++++++++++++++++------------------- 1 file changed, 38 insertions(+), 38 deletions(-) diff --git a/drivers/spi/spi-fsl-espi.c b/drivers/spi/spi-fsl-espi.c index b3d2d3db5850..ea647ee94da8 100644 --- a/drivers/spi/spi-fsl-espi.c +++ b/drivers/spi/spi-fsl-espi.c @@ -148,7 +148,7 @@ static inline void fsl_espi_write_reg8(struct fsl_espi *espi, int offset, static int fsl_espi_check_message(struct spi_message *m) { - struct fsl_espi *espi = spi_master_get_devdata(m->spi->master); + struct fsl_espi *espi = spi_controller_get_devdata(m->spi->controller); struct spi_transfer *t, *first; if (m->frame_length > SPCOM_TRANLEN_MAX) { @@ -323,7 +323,7 @@ start: static void fsl_espi_setup_transfer(struct spi_device *spi, struct spi_transfer *t) { - struct fsl_espi *espi = spi_master_get_devdata(spi->master); + struct fsl_espi *espi = spi_controller_get_devdata(spi->controller); int bits_per_word = t ? t->bits_per_word : spi->bits_per_word; u32 pm, hz = t ? t->speed_hz : spi->max_speed_hz; struct fsl_espi_cs *cs = spi_get_ctldata(spi); @@ -351,7 +351,7 @@ static void fsl_espi_setup_transfer(struct spi_device *spi, static int fsl_espi_bufs(struct spi_device *spi, struct spi_transfer *t) { - struct fsl_espi *espi = spi_master_get_devdata(spi->master); + struct fsl_espi *espi = spi_controller_get_devdata(spi->controller); unsigned int rx_len = t->len; u32 mask, spcom; int ret; @@ -396,7 +396,7 @@ static int fsl_espi_bufs(struct spi_device *spi, struct spi_transfer *t) static int fsl_espi_trans(struct spi_message *m, struct spi_transfer *trans) { - struct fsl_espi *espi = spi_master_get_devdata(m->spi->master); + struct fsl_espi *espi = spi_controller_get_devdata(m->spi->controller); struct spi_device *spi = m->spi; int ret; @@ -432,7 +432,7 @@ static int fsl_espi_trans(struct spi_message *m, struct spi_transfer *trans) return ret; } -static int fsl_espi_do_one_msg(struct spi_master *master, +static int fsl_espi_do_one_msg(struct spi_controller *host, struct spi_message *m) { unsigned int rx_nbits = 0, delay_nsecs = 0; @@ -470,7 +470,7 @@ out: if (m->status == -EINPROGRESS) m->status = ret; - spi_finalize_current_message(master); + spi_finalize_current_message(host); return ret; } @@ -488,7 +488,7 @@ static int fsl_espi_setup(struct spi_device *spi) spi_set_ctldata(spi, cs); } - espi = spi_master_get_devdata(spi->master); + espi = spi_controller_get_devdata(spi->controller); pm_runtime_get_sync(espi->dev); @@ -584,8 +584,8 @@ static irqreturn_t fsl_espi_irq(s32 irq, void *context_data) #ifdef CONFIG_PM static int fsl_espi_runtime_suspend(struct device *dev) { - struct spi_master *master = dev_get_drvdata(dev); - struct fsl_espi *espi = spi_master_get_devdata(master); + struct spi_controller *host = dev_get_drvdata(dev); + struct fsl_espi *espi = spi_controller_get_devdata(host); u32 regval; regval = fsl_espi_read_reg(espi, ESPI_SPMODE); @@ -597,8 +597,8 @@ static int fsl_espi_runtime_suspend(struct device *dev) static int fsl_espi_runtime_resume(struct device *dev) { - struct spi_master *master = dev_get_drvdata(dev); - struct fsl_espi *espi = spi_master_get_devdata(master); + struct spi_controller *host = dev_get_drvdata(dev); + struct fsl_espi *espi = spi_controller_get_devdata(host); u32 regval; regval = fsl_espi_read_reg(espi, ESPI_SPMODE); @@ -616,8 +616,8 @@ static size_t fsl_espi_max_message_size(struct spi_device *spi) static void fsl_espi_init_regs(struct device *dev, bool initial) { - struct spi_master *master = dev_get_drvdata(dev); - struct fsl_espi *espi = spi_master_get_devdata(master); + struct spi_controller *host = dev_get_drvdata(dev); + struct fsl_espi *espi = spi_controller_get_devdata(host); struct device_node *nc; u32 csmode, cs, prop; int ret; @@ -629,10 +629,10 @@ static void fsl_espi_init_regs(struct device *dev, bool initial) fsl_espi_write_reg(espi, ESPI_SPIE, 0xffffffff); /* Init eSPI CS mode register */ - for_each_available_child_of_node(master->dev.of_node, nc) { + for_each_available_child_of_node(host->dev.of_node, nc) { /* get chip select */ ret = of_property_read_u32(nc, "reg", &cs); - if (ret || cs >= master->num_chipselect) + if (ret || cs >= host->num_chipselect) continue; csmode = CSMODE_INIT_VAL; @@ -664,28 +664,28 @@ static void fsl_espi_init_regs(struct device *dev, bool initial) static int fsl_espi_probe(struct device *dev, struct resource *mem, unsigned int irq, unsigned int num_cs) { - struct spi_master *master; + struct spi_controller *host; struct fsl_espi *espi; int ret; - master = spi_alloc_master(dev, sizeof(struct fsl_espi)); - if (!master) + host = spi_alloc_host(dev, sizeof(struct fsl_espi)); + if (!host) return -ENOMEM; - dev_set_drvdata(dev, master); + dev_set_drvdata(dev, host); - master->mode_bits = SPI_RX_DUAL | SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | - SPI_LSB_FIRST | SPI_LOOP; - master->dev.of_node = dev->of_node; - master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 16); - master->setup = fsl_espi_setup; - master->cleanup = fsl_espi_cleanup; - master->transfer_one_message = fsl_espi_do_one_msg; - master->auto_runtime_pm = true; - master->max_message_size = fsl_espi_max_message_size; - master->num_chipselect = num_cs; + host->mode_bits = SPI_RX_DUAL | SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | + SPI_LSB_FIRST | SPI_LOOP; + host->dev.of_node = dev->of_node; + host->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 16); + host->setup = fsl_espi_setup; + host->cleanup = fsl_espi_cleanup; + host->transfer_one_message = fsl_espi_do_one_msg; + host->auto_runtime_pm = true; + host->max_message_size = fsl_espi_max_message_size; + host->num_chipselect = num_cs; - espi = spi_master_get_devdata(master); + espi = spi_controller_get_devdata(host); spin_lock_init(&espi->lock); espi->dev = dev; @@ -696,8 +696,8 @@ static int fsl_espi_probe(struct device *dev, struct resource *mem, goto err_probe; } /* determined by clock divider fields DIV16/PM in register SPMODEx */ - master->min_speed_hz = DIV_ROUND_UP(espi->spibrg, 4 * 16 * 16); - master->max_speed_hz = DIV_ROUND_UP(espi->spibrg, 4); + host->min_speed_hz = DIV_ROUND_UP(espi->spibrg, 4 * 16 * 16); + host->max_speed_hz = DIV_ROUND_UP(espi->spibrg, 4); init_completion(&espi->done); @@ -720,7 +720,7 @@ static int fsl_espi_probe(struct device *dev, struct resource *mem, pm_runtime_enable(dev); pm_runtime_get_sync(dev); - ret = devm_spi_register_master(dev, master); + ret = devm_spi_register_controller(dev, host); if (ret < 0) goto err_pm; @@ -736,7 +736,7 @@ err_pm: pm_runtime_disable(dev); pm_runtime_set_suspended(dev); err_probe: - spi_master_put(master); + spi_controller_put(host); return ret; } @@ -791,10 +791,10 @@ static void of_fsl_espi_remove(struct platform_device *dev) #ifdef CONFIG_PM_SLEEP static int of_fsl_espi_suspend(struct device *dev) { - struct spi_master *master = dev_get_drvdata(dev); + struct spi_controller *host = dev_get_drvdata(dev); int ret; - ret = spi_master_suspend(master); + ret = spi_controller_suspend(host); if (ret) return ret; @@ -803,7 +803,7 @@ static int of_fsl_espi_suspend(struct device *dev) static int of_fsl_espi_resume(struct device *dev) { - struct spi_master *master = dev_get_drvdata(dev); + struct spi_controller *host = dev_get_drvdata(dev); int ret; fsl_espi_init_regs(dev, false); @@ -812,7 +812,7 @@ static int of_fsl_espi_resume(struct device *dev) if (ret < 0) return ret; - return spi_master_resume(master); + return spi_controller_resume(host); } #endif /* CONFIG_PM_SLEEP */ From 2e2af40b57ad4464eb6c3bffa1fd500551a32c4a Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Mon, 7 Aug 2023 20:40:53 +0800 Subject: [PATCH 380/656] spi: fsl-lpspi: switch to use modern name Change legacy name master/target to modern name host/target No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230807124105.3429709-9-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-fsl-lpspi.c | 54 ++++++++++++++++++------------------- 1 file changed, 27 insertions(+), 27 deletions(-) diff --git a/drivers/spi/spi-fsl-lpspi.c b/drivers/spi/spi-fsl-lpspi.c index e32e8cab5aa8..11991eb12636 100644 --- a/drivers/spi/spi-fsl-lpspi.c +++ b/drivers/spi/spi-fsl-lpspi.c @@ -72,7 +72,7 @@ #define CFGR1_PINCFG (BIT(24)|BIT(25)) #define CFGR1_PCSPOL BIT(8) #define CFGR1_NOSTALL BIT(3) -#define CFGR1_MASTER BIT(0) +#define CFGR1_HOST BIT(0) #define FSR_TXCOUNT (0xFF) #define RSR_RXEMPTY BIT(1) #define TCR_CPOL BIT(31) @@ -96,7 +96,7 @@ struct fsl_lpspi_data { unsigned long base_phys; struct clk *clk_ipg; struct clk *clk_per; - bool is_slave; + bool is_target; bool is_only_cs1; bool is_first_byte; @@ -113,7 +113,7 @@ struct fsl_lpspi_data { struct lpspi_config config; struct completion xfer_done; - bool slave_aborted; + bool target_aborted; /* DMA */ bool usedma; @@ -234,7 +234,7 @@ static void fsl_lpspi_write_tx_fifo(struct fsl_lpspi_data *fsl_lpspi) } if (txfifo_cnt < fsl_lpspi->txfifosize) { - if (!fsl_lpspi->is_slave) { + if (!fsl_lpspi->is_target) { temp = readl(fsl_lpspi->base + IMX7ULP_TCR); temp &= ~TCR_CONTC; writel(temp, fsl_lpspi->base + IMX7ULP_TCR); @@ -258,7 +258,7 @@ static void fsl_lpspi_set_cmd(struct fsl_lpspi_data *fsl_lpspi) temp |= fsl_lpspi->config.bpw - 1; temp |= (fsl_lpspi->config.mode & 0x3) << 30; temp |= (fsl_lpspi->config.chip_select & 0x3) << 24; - if (!fsl_lpspi->is_slave) { + if (!fsl_lpspi->is_target) { temp |= fsl_lpspi->config.prescale << 27; /* * Set TCR_CONT will keep SS asserted after current transfer. @@ -385,7 +385,7 @@ static int fsl_lpspi_config(struct fsl_lpspi_data *fsl_lpspi) u32 temp; int ret; - if (!fsl_lpspi->is_slave) { + if (!fsl_lpspi->is_target) { ret = fsl_lpspi_set_bitrate(fsl_lpspi); if (ret) return ret; @@ -393,8 +393,8 @@ static int fsl_lpspi_config(struct fsl_lpspi_data *fsl_lpspi) fsl_lpspi_set_watermark(fsl_lpspi); - if (!fsl_lpspi->is_slave) - temp = CFGR1_MASTER; + if (!fsl_lpspi->is_target) + temp = CFGR1_HOST; else temp = CFGR1_PINCFG; if (fsl_lpspi->config.mode & SPI_CS_HIGH) @@ -461,12 +461,12 @@ static int fsl_lpspi_setup_transfer(struct spi_controller *controller, return fsl_lpspi_config(fsl_lpspi); } -static int fsl_lpspi_slave_abort(struct spi_controller *controller) +static int fsl_lpspi_target_abort(struct spi_controller *controller) { struct fsl_lpspi_data *fsl_lpspi = spi_controller_get_devdata(controller); - fsl_lpspi->slave_aborted = true; + fsl_lpspi->target_aborted = true; if (!fsl_lpspi->usedma) complete(&fsl_lpspi->xfer_done); else { @@ -482,9 +482,9 @@ static int fsl_lpspi_wait_for_completion(struct spi_controller *controller) struct fsl_lpspi_data *fsl_lpspi = spi_controller_get_devdata(controller); - if (fsl_lpspi->is_slave) { + if (fsl_lpspi->is_target) { if (wait_for_completion_interruptible(&fsl_lpspi->xfer_done) || - fsl_lpspi->slave_aborted) { + fsl_lpspi->target_aborted) { dev_dbg(fsl_lpspi->dev, "interrupted\n"); return -EINTR; } @@ -587,9 +587,9 @@ static int fsl_lpspi_dma_transfer(struct spi_controller *controller, reinit_completion(&fsl_lpspi->dma_tx_completion); dma_async_issue_pending(controller->dma_tx); - fsl_lpspi->slave_aborted = false; + fsl_lpspi->target_aborted = false; - if (!fsl_lpspi->is_slave) { + if (!fsl_lpspi->is_target) { transfer_timeout = fsl_lpspi_calculate_timeout(fsl_lpspi, transfer->len); @@ -615,7 +615,7 @@ static int fsl_lpspi_dma_transfer(struct spi_controller *controller, } } else { if (wait_for_completion_interruptible(&fsl_lpspi->dma_tx_completion) || - fsl_lpspi->slave_aborted) { + fsl_lpspi->target_aborted) { dev_dbg(fsl_lpspi->dev, "I/O Error in DMA TX interrupted\n"); dmaengine_terminate_all(controller->dma_tx); @@ -625,7 +625,7 @@ static int fsl_lpspi_dma_transfer(struct spi_controller *controller, } if (wait_for_completion_interruptible(&fsl_lpspi->dma_rx_completion) || - fsl_lpspi->slave_aborted) { + fsl_lpspi->target_aborted) { dev_dbg(fsl_lpspi->dev, "I/O Error in DMA RX interrupted\n"); dmaengine_terminate_all(controller->dma_tx); @@ -700,7 +700,7 @@ static int fsl_lpspi_pio_transfer(struct spi_controller *controller, fsl_lpspi->remain = t->len; reinit_completion(&fsl_lpspi->xfer_done); - fsl_lpspi->slave_aborted = false; + fsl_lpspi->target_aborted = false; fsl_lpspi_write_tx_fifo(fsl_lpspi); @@ -826,15 +826,15 @@ static int fsl_lpspi_probe(struct platform_device *pdev) int ret, irq; u32 num_cs; u32 temp; - bool is_slave; + bool is_target; - is_slave = of_property_read_bool((&pdev->dev)->of_node, "spi-slave"); - if (is_slave) - controller = spi_alloc_slave(&pdev->dev, - sizeof(struct fsl_lpspi_data)); + is_target = of_property_read_bool((&pdev->dev)->of_node, "spi-slave"); + if (is_target) + controller = spi_alloc_target(&pdev->dev, + sizeof(struct fsl_lpspi_data)); else - controller = spi_alloc_master(&pdev->dev, - sizeof(struct fsl_lpspi_data)); + controller = spi_alloc_host(&pdev->dev, + sizeof(struct fsl_lpspi_data)); if (!controller) return -ENOMEM; @@ -843,7 +843,7 @@ static int fsl_lpspi_probe(struct platform_device *pdev) fsl_lpspi = spi_controller_get_devdata(controller); fsl_lpspi->dev = &pdev->dev; - fsl_lpspi->is_slave = is_slave; + fsl_lpspi->is_target = is_target; fsl_lpspi->is_only_cs1 = of_property_read_bool((&pdev->dev)->of_node, "fsl,spi-only-use-cs1-sel"); @@ -912,8 +912,8 @@ static int fsl_lpspi_probe(struct platform_device *pdev) controller->dev.of_node = pdev->dev.of_node; controller->bus_num = pdev->id; controller->num_chipselect = num_cs; - controller->slave_abort = fsl_lpspi_slave_abort; - if (!fsl_lpspi->is_slave) + controller->target_abort = fsl_lpspi_target_abort; + if (!fsl_lpspi->is_target) controller->use_gpio_descriptors = true; ret = fsl_lpspi_dma_init(&pdev->dev, fsl_lpspi, controller); From ec6a79529670bf6bea02ff134d881e165cd085ab Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Mon, 7 Aug 2023 20:40:54 +0800 Subject: [PATCH 381/656] spi: fsl-qspi: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230807124105.3429709-10-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-fsl-qspi.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/spi/spi-fsl-qspi.c b/drivers/spi/spi-fsl-qspi.c index e3de81248893..79bac30e79af 100644 --- a/drivers/spi/spi-fsl-qspi.c +++ b/drivers/spi/spi-fsl-qspi.c @@ -367,7 +367,7 @@ static int fsl_qspi_check_buswidth(struct fsl_qspi *q, u8 width) static bool fsl_qspi_supports_op(struct spi_mem *mem, const struct spi_mem_op *op) { - struct fsl_qspi *q = spi_controller_get_devdata(mem->spi->master); + struct fsl_qspi *q = spi_controller_get_devdata(mem->spi->controller); int ret; ret = fsl_qspi_check_buswidth(q, op->cmd.buswidth); @@ -640,7 +640,7 @@ static int fsl_qspi_readl_poll_tout(struct fsl_qspi *q, void __iomem *base, static int fsl_qspi_exec_op(struct spi_mem *mem, const struct spi_mem_op *op) { - struct fsl_qspi *q = spi_controller_get_devdata(mem->spi->master); + struct fsl_qspi *q = spi_controller_get_devdata(mem->spi->controller); void __iomem *base = q->iobase; u32 addr_offset = 0; int err = 0; @@ -702,7 +702,7 @@ static int fsl_qspi_exec_op(struct spi_mem *mem, const struct spi_mem_op *op) static int fsl_qspi_adjust_op_size(struct spi_mem *mem, struct spi_mem_op *op) { - struct fsl_qspi *q = spi_controller_get_devdata(mem->spi->master); + struct fsl_qspi *q = spi_controller_get_devdata(mem->spi->controller); if (op->data.dir == SPI_MEM_DATA_OUT) { if (op->data.nbytes > q->devtype_data->txfifo) @@ -808,7 +808,7 @@ static int fsl_qspi_default_setup(struct fsl_qspi *q) static const char *fsl_qspi_get_name(struct spi_mem *mem) { - struct fsl_qspi *q = spi_controller_get_devdata(mem->spi->master); + struct fsl_qspi *q = spi_controller_get_devdata(mem->spi->controller); struct device *dev = &mem->spi->dev; const char *name; @@ -848,7 +848,7 @@ static int fsl_qspi_probe(struct platform_device *pdev) struct fsl_qspi *q; int ret; - ctlr = spi_alloc_master(&pdev->dev, sizeof(*q)); + ctlr = spi_alloc_host(&pdev->dev, sizeof(*q)); if (!ctlr) return -ENOMEM; From d32382ca5614614df0cbb91a1b7fab9c47bfef9b Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Mon, 7 Aug 2023 20:40:55 +0800 Subject: [PATCH 382/656] spi: fsl-spi: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230807124105.3429709-11-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-fsl-spi.c | 76 +++++++++++++++++++-------------------- 1 file changed, 38 insertions(+), 38 deletions(-) diff --git a/drivers/spi/spi-fsl-spi.c b/drivers/spi/spi-fsl-spi.c index 9933842ab727..97faf984801f 100644 --- a/drivers/spi/spi-fsl-spi.c +++ b/drivers/spi/spi-fsl-spi.c @@ -88,7 +88,7 @@ static int fsl_spi_get_type(struct device *dev) static void fsl_spi_change_mode(struct spi_device *spi) { - struct mpc8xxx_spi *mspi = spi_master_get_devdata(spi->master); + struct mpc8xxx_spi *mspi = spi_controller_get_devdata(spi->controller); struct spi_mpc8xxx_cs *cs = spi->controller_state; struct fsl_spi_reg __iomem *reg_base = mspi->reg_base; __be32 __iomem *mode = ®_base->mode; @@ -183,7 +183,7 @@ static int fsl_spi_setup_transfer(struct spi_device *spi, u32 hz = 0; struct spi_mpc8xxx_cs *cs = spi->controller_state; - mpc8xxx_spi = spi_master_get_devdata(spi->master); + mpc8xxx_spi = spi_controller_get_devdata(spi->controller); if (t) { bits_per_word = t->bits_per_word; @@ -252,7 +252,7 @@ static int fsl_spi_cpu_bufs(struct mpc8xxx_spi *mspi, static int fsl_spi_bufs(struct spi_device *spi, struct spi_transfer *t, bool is_dma_mapped) { - struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi->master); + struct mpc8xxx_spi *mpc8xxx_spi = spi_controller_get_devdata(spi->controller); struct fsl_spi_reg __iomem *reg_base; unsigned int len = t->len; u8 bits_per_word; @@ -385,7 +385,7 @@ static int fsl_spi_setup(struct spi_device *spi) spi_set_ctldata(spi, cs); initial_setup = true; } - mpc8xxx_spi = spi_master_get_devdata(spi->master); + mpc8xxx_spi = spi_controller_get_devdata(spi->controller); reg_base = mpc8xxx_spi->reg_base; @@ -479,7 +479,7 @@ static irqreturn_t fsl_spi_irq(s32 irq, void *context_data) static void fsl_spi_grlib_cs_control(struct spi_device *spi, bool on) { - struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi->master); + struct mpc8xxx_spi *mpc8xxx_spi = spi_controller_get_devdata(spi->controller); struct fsl_spi_reg __iomem *reg_base = mpc8xxx_spi->reg_base; u32 slvsel; u16 cs = spi_get_chipselect(spi, 0); @@ -493,8 +493,8 @@ static void fsl_spi_grlib_cs_control(struct spi_device *spi, bool on) static void fsl_spi_grlib_probe(struct device *dev) { - struct spi_master *master = dev_get_drvdata(dev); - struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(master); + struct spi_controller *host = dev_get_drvdata(dev); + struct mpc8xxx_spi *mpc8xxx_spi = spi_controller_get_devdata(host); struct fsl_spi_reg __iomem *reg_base = mpc8xxx_spi->reg_base; int mbits; u32 capabilities; @@ -511,8 +511,8 @@ static void fsl_spi_grlib_probe(struct device *dev) mpc8xxx_spi->native_chipselects = SPCAP_SSSZ(capabilities); mpc8xxx_spi_write_reg(®_base->slvsel, 0xffffffff); } - master->num_chipselect = mpc8xxx_spi->native_chipselects; - master->set_cs = fsl_spi_grlib_cs_control; + host->num_chipselect = mpc8xxx_spi->native_chipselects; + host->set_cs = fsl_spi_grlib_cs_control; } static void fsl_spi_cs_control(struct spi_device *spi, bool on) @@ -526,35 +526,35 @@ static void fsl_spi_cs_control(struct spi_device *spi, bool on) iowrite32be(on ? 0 : SPI_BOOT_SEL_BIT, pinfo->immr_spi_cs); } -static struct spi_master *fsl_spi_probe(struct device *dev, +static struct spi_controller *fsl_spi_probe(struct device *dev, struct resource *mem, unsigned int irq) { struct fsl_spi_platform_data *pdata = dev_get_platdata(dev); - struct spi_master *master; + struct spi_controller *host; struct mpc8xxx_spi *mpc8xxx_spi; struct fsl_spi_reg __iomem *reg_base; u32 regval; int ret = 0; - master = spi_alloc_master(dev, sizeof(struct mpc8xxx_spi)); - if (master == NULL) { + host = spi_alloc_host(dev, sizeof(struct mpc8xxx_spi)); + if (host == NULL) { ret = -ENOMEM; goto err; } - dev_set_drvdata(dev, master); + dev_set_drvdata(dev, host); mpc8xxx_spi_probe(dev, mem, irq); - master->setup = fsl_spi_setup; - master->cleanup = fsl_spi_cleanup; - master->prepare_message = fsl_spi_prepare_message; - master->transfer_one = fsl_spi_transfer_one; - master->unprepare_message = fsl_spi_unprepare_message; - master->use_gpio_descriptors = true; - master->set_cs = fsl_spi_cs_control; + host->setup = fsl_spi_setup; + host->cleanup = fsl_spi_cleanup; + host->prepare_message = fsl_spi_prepare_message; + host->transfer_one = fsl_spi_transfer_one; + host->unprepare_message = fsl_spi_unprepare_message; + host->use_gpio_descriptors = true; + host->set_cs = fsl_spi_cs_control; - mpc8xxx_spi = spi_master_get_devdata(master); + mpc8xxx_spi = spi_controller_get_devdata(host); mpc8xxx_spi->max_bits_per_word = 32; mpc8xxx_spi->type = fsl_spi_get_type(dev); @@ -572,13 +572,13 @@ static struct spi_master *fsl_spi_probe(struct device *dev, fsl_spi_grlib_probe(dev); if (mpc8xxx_spi->flags & SPI_CPM_MODE) - master->bits_per_word_mask = + host->bits_per_word_mask = (SPI_BPW_RANGE_MASK(4, 8) | SPI_BPW_MASK(16) | SPI_BPW_MASK(32)); else - master->bits_per_word_mask = + host->bits_per_word_mask = (SPI_BPW_RANGE_MASK(4, 16) | SPI_BPW_MASK(32)); - master->bits_per_word_mask &= + host->bits_per_word_mask &= SPI_BPW_RANGE_MASK(1, mpc8xxx_spi->max_bits_per_word); if (mpc8xxx_spi->flags & SPI_QE_CPU_MODE) @@ -615,19 +615,19 @@ static struct spi_master *fsl_spi_probe(struct device *dev, mpc8xxx_spi_write_reg(®_base->mode, regval); - ret = devm_spi_register_master(dev, master); + ret = devm_spi_register_controller(dev, host); if (ret < 0) goto err_probe; dev_info(dev, "at 0x%p (irq = %d), %s mode\n", reg_base, mpc8xxx_spi->irq, mpc8xxx_spi_strmode(mpc8xxx_spi->flags)); - return master; + return host; err_probe: fsl_spi_cpm_free(mpc8xxx_spi); err_cpm_init: - spi_master_put(master); + spi_controller_put(host); err: return ERR_PTR(ret); } @@ -636,7 +636,7 @@ static int of_fsl_spi_probe(struct platform_device *ofdev) { struct device *dev = &ofdev->dev; struct device_node *np = ofdev->dev.of_node; - struct spi_master *master; + struct spi_controller *host; struct resource mem; int irq, type; int ret; @@ -689,9 +689,9 @@ static int of_fsl_spi_probe(struct platform_device *ofdev) goto unmap_out; } - master = fsl_spi_probe(dev, &mem, irq); + host = fsl_spi_probe(dev, &mem, irq); - return PTR_ERR_OR_ZERO(master); + return PTR_ERR_OR_ZERO(host); unmap_out: #if IS_ENABLED(CONFIG_FSL_SOC) @@ -703,8 +703,8 @@ unmap_out: static void of_fsl_spi_remove(struct platform_device *ofdev) { - struct spi_master *master = platform_get_drvdata(ofdev); - struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(master); + struct spi_controller *host = platform_get_drvdata(ofdev); + struct mpc8xxx_spi *mpc8xxx_spi = spi_controller_get_devdata(host); fsl_spi_cpm_free(mpc8xxx_spi); } @@ -730,7 +730,7 @@ static int plat_mpc8xxx_spi_probe(struct platform_device *pdev) { struct resource *mem; int irq; - struct spi_master *master; + struct spi_controller *host; if (!dev_get_platdata(&pdev->dev)) return -EINVAL; @@ -743,14 +743,14 @@ static int plat_mpc8xxx_spi_probe(struct platform_device *pdev) if (irq < 0) return irq; - master = fsl_spi_probe(&pdev->dev, mem, irq); - return PTR_ERR_OR_ZERO(master); + host = fsl_spi_probe(&pdev->dev, mem, irq); + return PTR_ERR_OR_ZERO(host); } static void plat_mpc8xxx_spi_remove(struct platform_device *pdev) { - struct spi_master *master = platform_get_drvdata(pdev); - struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(master); + struct spi_controller *host = platform_get_drvdata(pdev); + struct mpc8xxx_spi *mpc8xxx_spi = spi_controller_get_devdata(host); fsl_spi_cpm_free(mpc8xxx_spi); } From 20becf43e8ca3a9ff00ed24e19695347e0a2f0e7 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Mon, 7 Aug 2023 20:40:56 +0800 Subject: [PATCH 383/656] spi: gpio: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230807124105.3429709-12-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-gpio.c | 72 +++++++++++++++++++++--------------------- 1 file changed, 36 insertions(+), 36 deletions(-) diff --git a/drivers/spi/spi-gpio.c b/drivers/spi/spi-gpio.c index 8aa905e407a8..d8db4564b406 100644 --- a/drivers/spi/spi-gpio.c +++ b/drivers/spi/spi-gpio.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-or-later /* - * SPI master driver using generic bitbanged GPIO + * SPI host driver using generic bitbanged GPIO * * Copyright (C) 2006,2008 David Brownell * Copyright (C) 2017 Linus Walleij @@ -17,7 +17,7 @@ /* - * This bitbanging SPI master driver should help make systems usable + * This bitbanging SPI host driver should help make systems usable * when a native hardware SPI engine is not available, perhaps because * its driver isn't yet working or because the I/O pins it requires * are used for other purposes. @@ -26,7 +26,7 @@ * * spi->controller_state ... reserved for bitbang framework code * - * spi->master->dev.driver_data ... points to spi_gpio->bitbang + * spi->controller->dev.driver_data ... points to spi_gpio->bitbang */ struct spi_gpio { @@ -77,7 +77,7 @@ spi_to_spi_gpio(const struct spi_device *spi) const struct spi_bitbang *bang; struct spi_gpio *spi_gpio; - bang = spi_master_get_devdata(spi->master); + bang = spi_controller_get_devdata(spi->controller); spi_gpio = container_of(bang, struct spi_gpio, bitbang); return spi_gpio; } @@ -180,7 +180,7 @@ static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi, static u32 spi_gpio_spec_txrx_word_mode0(struct spi_device *spi, unsigned nsecs, u32 word, u8 bits, unsigned flags) { - flags = spi->master->flags; + flags = spi->controller->flags; if (unlikely(spi->mode & SPI_LSB_FIRST)) return bitbang_txrx_le_cpha0(spi, nsecs, 0, flags, word, bits); else @@ -190,7 +190,7 @@ static u32 spi_gpio_spec_txrx_word_mode0(struct spi_device *spi, static u32 spi_gpio_spec_txrx_word_mode1(struct spi_device *spi, unsigned nsecs, u32 word, u8 bits, unsigned flags) { - flags = spi->master->flags; + flags = spi->controller->flags; if (unlikely(spi->mode & SPI_LSB_FIRST)) return bitbang_txrx_le_cpha1(spi, nsecs, 0, flags, word, bits); else @@ -200,7 +200,7 @@ static u32 spi_gpio_spec_txrx_word_mode1(struct spi_device *spi, static u32 spi_gpio_spec_txrx_word_mode2(struct spi_device *spi, unsigned nsecs, u32 word, u8 bits, unsigned flags) { - flags = spi->master->flags; + flags = spi->controller->flags; if (unlikely(spi->mode & SPI_LSB_FIRST)) return bitbang_txrx_le_cpha0(spi, nsecs, 1, flags, word, bits); else @@ -210,7 +210,7 @@ static u32 spi_gpio_spec_txrx_word_mode2(struct spi_device *spi, static u32 spi_gpio_spec_txrx_word_mode3(struct spi_device *spi, unsigned nsecs, u32 word, u8 bits, unsigned flags) { - flags = spi->master->flags; + flags = spi->controller->flags; if (unlikely(spi->mode & SPI_LSB_FIRST)) return bitbang_txrx_le_cpha1(spi, nsecs, 1, flags, word, bits); else @@ -310,7 +310,7 @@ static void spi_gpio_cleanup(struct spi_device *spi) * On platforms which can do so, configure MISO with a weak pullup unless * there's an external pullup on that signal. That saves power by avoiding * floating signals. (A weak pulldown would save power too, but many - * drivers expect to see all-ones data as the no slave "response".) + * drivers expect to see all-ones data as the no target "response".) */ static int spi_gpio_request(struct device *dev, struct spi_gpio *spi_gpio) { @@ -334,27 +334,27 @@ static const struct of_device_id spi_gpio_dt_ids[] = { MODULE_DEVICE_TABLE(of, spi_gpio_dt_ids); static int spi_gpio_probe_dt(struct platform_device *pdev, - struct spi_master *master) + struct spi_controller *host) { - master->dev.of_node = pdev->dev.of_node; - master->use_gpio_descriptors = true; + host->dev.of_node = pdev->dev.of_node; + host->use_gpio_descriptors = true; return 0; } #else static inline int spi_gpio_probe_dt(struct platform_device *pdev, - struct spi_master *master) + struct spi_controller *host) { return 0; } #endif static int spi_gpio_probe_pdata(struct platform_device *pdev, - struct spi_master *master) + struct spi_controller *host) { struct device *dev = &pdev->dev; struct spi_gpio_platform_data *pdata = dev_get_platdata(dev); - struct spi_gpio *spi_gpio = spi_master_get_devdata(master); + struct spi_gpio *spi_gpio = spi_controller_get_devdata(host); int i; #ifdef GENERIC_BITBANG @@ -362,18 +362,18 @@ static int spi_gpio_probe_pdata(struct platform_device *pdev, return -ENODEV; #endif /* - * The master needs to think there is a chipselect even if not + * The host needs to think there is a chipselect even if not * connected */ - master->num_chipselect = pdata->num_chipselect ?: 1; + host->num_chipselect = pdata->num_chipselect ?: 1; - spi_gpio->cs_gpios = devm_kcalloc(dev, master->num_chipselect, + spi_gpio->cs_gpios = devm_kcalloc(dev, host->num_chipselect, sizeof(*spi_gpio->cs_gpios), GFP_KERNEL); if (!spi_gpio->cs_gpios) return -ENOMEM; - for (i = 0; i < master->num_chipselect; i++) { + for (i = 0; i < host->num_chipselect; i++) { spi_gpio->cs_gpios[i] = devm_gpiod_get_index(dev, "cs", i, GPIOD_OUT_HIGH); if (IS_ERR(spi_gpio->cs_gpios[i])) @@ -386,31 +386,31 @@ static int spi_gpio_probe_pdata(struct platform_device *pdev, static int spi_gpio_probe(struct platform_device *pdev) { int status; - struct spi_master *master; + struct spi_controller *host; struct spi_gpio *spi_gpio; struct device *dev = &pdev->dev; struct spi_bitbang *bb; - master = devm_spi_alloc_master(dev, sizeof(*spi_gpio)); - if (!master) + host = devm_spi_alloc_host(dev, sizeof(*spi_gpio)); + if (!host) return -ENOMEM; if (pdev->dev.of_node) - status = spi_gpio_probe_dt(pdev, master); + status = spi_gpio_probe_dt(pdev, host); else - status = spi_gpio_probe_pdata(pdev, master); + status = spi_gpio_probe_pdata(pdev, host); if (status) return status; - spi_gpio = spi_master_get_devdata(master); + spi_gpio = spi_controller_get_devdata(host); status = spi_gpio_request(dev, spi_gpio); if (status) return status; - master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); - master->mode_bits = SPI_3WIRE | SPI_3WIRE_HIZ | SPI_CPHA | SPI_CPOL | + host->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); + host->mode_bits = SPI_3WIRE | SPI_3WIRE_HIZ | SPI_CPHA | SPI_CPOL | SPI_CS_HIGH | SPI_LSB_FIRST; if (!spi_gpio->mosi) { /* HW configuration without MOSI pin @@ -419,25 +419,25 @@ static int spi_gpio_probe(struct platform_device *pdev) * a MOSI pin connected the host can still do RX by * changing the direction of the line. */ - master->flags = SPI_CONTROLLER_NO_TX; + host->flags = SPI_CONTROLLER_NO_TX; } - master->bus_num = pdev->id; - master->setup = spi_gpio_setup; - master->cleanup = spi_gpio_cleanup; + host->bus_num = pdev->id; + host->setup = spi_gpio_setup; + host->cleanup = spi_gpio_cleanup; bb = &spi_gpio->bitbang; - bb->master = master; + bb->master = host; /* * There is some additional business, apart from driving the CS GPIO * line, that we need to do on selection. This makes the local * callback for chipselect always get called. */ - master->flags |= SPI_CONTROLLER_GPIO_SS; + host->flags |= SPI_CONTROLLER_GPIO_SS; bb->chipselect = spi_gpio_chipselect; bb->set_line_direction = spi_gpio_set_direction; - if (master->flags & SPI_CONTROLLER_NO_TX) { + if (host->flags & SPI_CONTROLLER_NO_TX) { bb->txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0; bb->txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1; bb->txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2; @@ -454,7 +454,7 @@ static int spi_gpio_probe(struct platform_device *pdev) if (status) return status; - return devm_spi_register_master(&pdev->dev, master); + return devm_spi_register_controller(&pdev->dev, host); } MODULE_ALIAS("platform:" DRIVER_NAME); @@ -468,6 +468,6 @@ static struct platform_driver spi_gpio_driver = { }; module_platform_driver(spi_gpio_driver); -MODULE_DESCRIPTION("SPI master driver using generic bitbanged GPIO "); +MODULE_DESCRIPTION("SPI host driver using generic bitbanged GPIO "); MODULE_AUTHOR("David Brownell"); MODULE_LICENSE("GPL"); From 6588d43ae8e3046996b315cc6dcb2a7e0c2bb547 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Mon, 7 Aug 2023 20:40:57 +0800 Subject: [PATCH 384/656] spi: gxp: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230807124105.3429709-13-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-gxp.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/spi/spi-gxp.c b/drivers/spi/spi-gxp.c index 88ab3032736b..fd2fac236bbd 100644 --- a/drivers/spi/spi-gxp.c +++ b/drivers/spi/spi-gxp.c @@ -199,7 +199,7 @@ static ssize_t gxp_spi_write(struct gxp_spi_chip *chip, const struct spi_mem_op static int do_gxp_exec_mem_op(struct spi_mem *mem, const struct spi_mem_op *op) { - struct gxp_spi *spifi = spi_controller_get_devdata(mem->spi->master); + struct gxp_spi *spifi = spi_controller_get_devdata(mem->spi->controller); struct gxp_spi_chip *chip = &spifi->chips[spi_get_chipselect(mem->spi, 0)]; int ret; @@ -235,7 +235,7 @@ static const struct spi_controller_mem_ops gxp_spi_mem_ops = { static int gxp_spi_setup(struct spi_device *spi) { - struct gxp_spi *spifi = spi_controller_get_devdata(spi->master); + struct gxp_spi *spifi = spi_controller_get_devdata(spi->controller); unsigned int cs = spi_get_chipselect(spi, 0); struct gxp_spi_chip *chip = &spifi->chips[cs]; @@ -257,7 +257,7 @@ static int gxp_spifi_probe(struct platform_device *pdev) data = of_device_get_match_data(&pdev->dev); - ctlr = devm_spi_alloc_master(dev, sizeof(*spifi)); + ctlr = devm_spi_alloc_host(dev, sizeof(*spifi)); if (!ctlr) return -ENOMEM; From 3dc6e684b4f3854a867b5745db868d6f60466f7b Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Mon, 7 Aug 2023 20:40:58 +0800 Subject: [PATCH 385/656] spi: bcmbca-hsspi: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230807124105.3429709-14-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-bcmbca-hsspi.c | 66 +++++++++++++++++----------------- 1 file changed, 33 insertions(+), 33 deletions(-) diff --git a/drivers/spi/spi-bcmbca-hsspi.c b/drivers/spi/spi-bcmbca-hsspi.c index ca1b4741e9f4..9f64afd8164e 100644 --- a/drivers/spi/spi-bcmbca-hsspi.c +++ b/drivers/spi/spi-bcmbca-hsspi.c @@ -127,7 +127,7 @@ static ssize_t wait_mode_show(struct device *dev, struct device_attribute *attr, char *buf) { struct spi_controller *ctrl = dev_get_drvdata(dev); - struct bcmbca_hsspi *bs = spi_master_get_devdata(ctrl); + struct bcmbca_hsspi *bs = spi_controller_get_devdata(ctrl); return sprintf(buf, "%d\n", bs->wait_mode); } @@ -136,7 +136,7 @@ static ssize_t wait_mode_store(struct device *dev, struct device_attribute *attr const char *buf, size_t count) { struct spi_controller *ctrl = dev_get_drvdata(dev); - struct bcmbca_hsspi *bs = spi_master_get_devdata(ctrl); + struct bcmbca_hsspi *bs = spi_controller_get_devdata(ctrl); u32 val; if (kstrtou32(buf, 10, &val)) @@ -250,7 +250,7 @@ static int bcmbca_hsspi_wait_cmd(struct bcmbca_hsspi *bs, unsigned int cs) static int bcmbca_hsspi_do_txrx(struct spi_device *spi, struct spi_transfer *t, struct spi_message *msg) { - struct bcmbca_hsspi *bs = spi_master_get_devdata(spi->master); + struct bcmbca_hsspi *bs = spi_controller_get_devdata(spi->controller); unsigned int chip_select = spi_get_chipselect(spi, 0); u16 opcode = 0, val; int pending = t->len; @@ -328,7 +328,7 @@ static int bcmbca_hsspi_do_txrx(struct spi_device *spi, struct spi_transfer *t, static int bcmbca_hsspi_setup(struct spi_device *spi) { - struct bcmbca_hsspi *bs = spi_master_get_devdata(spi->master); + struct bcmbca_hsspi *bs = spi_controller_get_devdata(spi->controller); u32 reg; reg = __raw_readl(bs->regs + @@ -366,10 +366,10 @@ static int bcmbca_hsspi_setup(struct spi_device *spi) return 0; } -static int bcmbca_hsspi_transfer_one(struct spi_master *master, +static int bcmbca_hsspi_transfer_one(struct spi_controller *host, struct spi_message *msg) { - struct bcmbca_hsspi *bs = spi_master_get_devdata(master); + struct bcmbca_hsspi *bs = spi_controller_get_devdata(host); struct spi_transfer *t; struct spi_device *spi = msg->spi; int status = -EINVAL; @@ -409,7 +409,7 @@ static int bcmbca_hsspi_transfer_one(struct spi_master *master, bcmbca_hsspi_set_cs(bs, spi_get_chipselect(spi, 0), false); msg->status = status; - spi_finalize_current_message(master); + spi_finalize_current_message(host); return 0; } @@ -431,7 +431,7 @@ static irqreturn_t bcmbca_hsspi_interrupt(int irq, void *dev_id) static int bcmbca_hsspi_probe(struct platform_device *pdev) { - struct spi_master *master; + struct spi_controller *host; struct bcmbca_hsspi *bs; struct resource *res_mem; void __iomem *spim_ctrl; @@ -487,13 +487,13 @@ static int bcmbca_hsspi_probe(struct platform_device *pdev) } } - master = spi_alloc_master(&pdev->dev, sizeof(*bs)); - if (!master) { + host = spi_alloc_host(&pdev->dev, sizeof(*bs)); + if (!host) { ret = -ENOMEM; goto out_disable_pll_clk; } - bs = spi_master_get_devdata(master); + bs = spi_controller_get_devdata(host); bs->pdev = pdev; bs->clk = clk; bs->pll_clk = pll_clk; @@ -507,9 +507,9 @@ static int bcmbca_hsspi_probe(struct platform_device *pdev) mutex_init(&bs->msg_mutex); init_completion(&bs->done); - master->dev.of_node = dev->of_node; + host->dev.of_node = dev->of_node; if (!dev->of_node) - master->bus_num = HSSPI_BUS_NUM; + host->bus_num = HSSPI_BUS_NUM; of_property_read_u32(dev->of_node, "num-cs", &num_cs); if (num_cs > 8) { @@ -517,15 +517,15 @@ static int bcmbca_hsspi_probe(struct platform_device *pdev) num_cs); num_cs = HSSPI_SPI_MAX_CS; } - master->num_chipselect = num_cs; - master->setup = bcmbca_hsspi_setup; - master->transfer_one_message = bcmbca_hsspi_transfer_one; - master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | - SPI_RX_DUAL | SPI_TX_DUAL; - master->bits_per_word_mask = SPI_BPW_MASK(8); - master->auto_runtime_pm = true; + host->num_chipselect = num_cs; + host->setup = bcmbca_hsspi_setup; + host->transfer_one_message = bcmbca_hsspi_transfer_one; + host->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | + SPI_RX_DUAL | SPI_TX_DUAL; + host->bits_per_word_mask = SPI_BPW_MASK(8); + host->auto_runtime_pm = true; - platform_set_drvdata(pdev, master); + platform_set_drvdata(pdev, host); /* Initialize the hardware */ __raw_writel(0, bs->regs + HSSPI_INT_MASK_REG); @@ -543,7 +543,7 @@ static int bcmbca_hsspi_probe(struct platform_device *pdev) ret = devm_request_irq(dev, irq, bcmbca_hsspi_interrupt, IRQF_SHARED, pdev->name, bs); if (ret) - goto out_put_master; + goto out_put_host; } pm_runtime_enable(&pdev->dev); @@ -555,7 +555,7 @@ static int bcmbca_hsspi_probe(struct platform_device *pdev) } /* register and we are done */ - ret = devm_spi_register_master(dev, master); + ret = devm_spi_register_controller(dev, host); if (ret) goto out_sysgroup_disable; @@ -567,8 +567,8 @@ out_sysgroup_disable: sysfs_remove_group(&pdev->dev.kobj, &bcmbca_hsspi_group); out_pm_disable: pm_runtime_disable(&pdev->dev); -out_put_master: - spi_master_put(master); +out_put_host: + spi_controller_put(host); out_disable_pll_clk: clk_disable_unprepare(pll_clk); out_disable_clk: @@ -578,8 +578,8 @@ out_disable_clk: static void bcmbca_hsspi_remove(struct platform_device *pdev) { - struct spi_master *master = platform_get_drvdata(pdev); - struct bcmbca_hsspi *bs = spi_master_get_devdata(master); + struct spi_controller *host = platform_get_drvdata(pdev); + struct bcmbca_hsspi *bs = spi_controller_get_devdata(host); /* reset the hardware and block queue progress */ __raw_writel(0, bs->regs + HSSPI_INT_MASK_REG); @@ -591,10 +591,10 @@ static void bcmbca_hsspi_remove(struct platform_device *pdev) #ifdef CONFIG_PM_SLEEP static int bcmbca_hsspi_suspend(struct device *dev) { - struct spi_master *master = dev_get_drvdata(dev); - struct bcmbca_hsspi *bs = spi_master_get_devdata(master); + struct spi_controller *host = dev_get_drvdata(dev); + struct bcmbca_hsspi *bs = spi_controller_get_devdata(host); - spi_master_suspend(master); + spi_controller_suspend(host); clk_disable_unprepare(bs->pll_clk); clk_disable_unprepare(bs->clk); @@ -603,8 +603,8 @@ static int bcmbca_hsspi_suspend(struct device *dev) static int bcmbca_hsspi_resume(struct device *dev) { - struct spi_master *master = dev_get_drvdata(dev); - struct bcmbca_hsspi *bs = spi_master_get_devdata(master); + struct spi_controller *host = dev_get_drvdata(dev); + struct bcmbca_hsspi *bs = spi_controller_get_devdata(host); int ret; ret = clk_prepare_enable(bs->clk); @@ -619,7 +619,7 @@ static int bcmbca_hsspi_resume(struct device *dev) } } - spi_master_resume(master); + spi_controller_resume(host); return 0; } From f64e6ee3725ec41049a2c724b624e19f87192c7d Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Mon, 7 Aug 2023 20:40:59 +0800 Subject: [PATCH 386/656] spi: hisi-sfc-v3xx: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230807124105.3429709-15-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-hisi-sfc-v3xx.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/spi/spi-hisi-sfc-v3xx.c b/drivers/spi/spi-hisi-sfc-v3xx.c index 7cbcb065bb44..9d22018f7985 100644 --- a/drivers/spi/spi-hisi-sfc-v3xx.c +++ b/drivers/spi/spi-hisi-sfc-v3xx.c @@ -152,7 +152,7 @@ static int hisi_sfc_v3xx_adjust_op_size(struct spi_mem *mem, uintptr_t addr = (uintptr_t)op->data.buf.in; int max_byte_count; - host = spi_controller_get_devdata(spi->master); + host = spi_controller_get_devdata(spi->controller); max_byte_count = host->max_cmd_dword * 4; @@ -174,7 +174,7 @@ static bool hisi_sfc_v3xx_supports_op(struct spi_mem *mem, struct spi_device *spi = mem->spi; struct hisi_sfc_v3xx_host *host; - host = spi_controller_get_devdata(spi->master); + host = spi_controller_get_devdata(spi->controller); if (op->data.buswidth > 4 || op->dummy.buswidth > 4 || op->addr.buswidth > 4 || op->cmd.buswidth > 4) @@ -363,7 +363,7 @@ static int hisi_sfc_v3xx_exec_op(struct spi_mem *mem, struct spi_device *spi = mem->spi; u8 chip_select = spi_get_chipselect(spi, 0); - host = spi_controller_get_devdata(spi->master); + host = spi_controller_get_devdata(spi->controller); return hisi_sfc_v3xx_generic_exec_op(host, op, chip_select); } @@ -431,7 +431,7 @@ static int hisi_sfc_v3xx_probe(struct platform_device *pdev) u32 version, glb_config; int ret; - ctlr = spi_alloc_master(&pdev->dev, sizeof(*host)); + ctlr = spi_alloc_host(&pdev->dev, sizeof(*host)); if (!ctlr) return -ENOMEM; @@ -448,13 +448,13 @@ static int hisi_sfc_v3xx_probe(struct platform_device *pdev) host->regbase = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(host->regbase)) { ret = PTR_ERR(host->regbase); - goto err_put_master; + goto err_put_host; } host->irq = platform_get_irq_optional(pdev, 0); if (host->irq == -EPROBE_DEFER) { ret = -EPROBE_DEFER; - goto err_put_master; + goto err_put_host; } hisi_sfc_v3xx_disable_int(host); @@ -496,15 +496,15 @@ static int hisi_sfc_v3xx_probe(struct platform_device *pdev) ret = devm_spi_register_controller(dev, ctlr); if (ret) - goto err_put_master; + goto err_put_host; dev_info(&pdev->dev, "hw version 0x%x, %s mode.\n", version, host->irq ? "irq" : "polling"); return 0; -err_put_master: - spi_master_put(ctlr); +err_put_host: + spi_controller_put(ctlr); return ret; } From d6e19216e8167adbd6c44f5e0f8aa127267a8b24 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Mon, 7 Aug 2023 20:41:00 +0800 Subject: [PATCH 387/656] spi: img-spfi: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230807124105.3429709-16-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-img-spfi.c | 118 ++++++++++++++++++------------------- 1 file changed, 59 insertions(+), 59 deletions(-) diff --git a/drivers/spi/spi-img-spfi.c b/drivers/spi/spi-img-spfi.c index d775f87770e3..d8360f94d3b7 100644 --- a/drivers/spi/spi-img-spfi.c +++ b/drivers/spi/spi-img-spfi.c @@ -86,7 +86,7 @@ struct img_spfi { struct device *dev; - struct spi_master *master; + struct spi_controller *host; spinlock_t lock; void __iomem *regs; @@ -221,11 +221,11 @@ static unsigned int spfi_pio_read8(struct img_spfi *spfi, u8 *buf, return count; } -static int img_spfi_start_pio(struct spi_master *master, +static int img_spfi_start_pio(struct spi_controller *host, struct spi_device *spi, struct spi_transfer *xfer) { - struct img_spfi *spfi = spi_master_get_devdata(spi->master); + struct img_spfi *spfi = spi_controller_get_devdata(spi->controller); unsigned int tx_bytes = 0, rx_bytes = 0; const void *tx_buf = xfer->tx_buf; void *rx_buf = xfer->rx_buf; @@ -285,7 +285,7 @@ static void img_spfi_dma_rx_cb(void *data) spin_lock_irqsave(&spfi->lock, flags); spfi->rx_dma_busy = false; if (!spfi->tx_dma_busy) - spi_finalize_current_transfer(spfi->master); + spi_finalize_current_transfer(spfi->host); spin_unlock_irqrestore(&spfi->lock, flags); } @@ -299,15 +299,15 @@ static void img_spfi_dma_tx_cb(void *data) spin_lock_irqsave(&spfi->lock, flags); spfi->tx_dma_busy = false; if (!spfi->rx_dma_busy) - spi_finalize_current_transfer(spfi->master); + spi_finalize_current_transfer(spfi->host); spin_unlock_irqrestore(&spfi->lock, flags); } -static int img_spfi_start_dma(struct spi_master *master, +static int img_spfi_start_dma(struct spi_controller *host, struct spi_device *spi, struct spi_transfer *xfer) { - struct img_spfi *spfi = spi_master_get_devdata(spi->master); + struct img_spfi *spfi = spi_controller_get_devdata(spi->controller); struct dma_async_tx_descriptor *rxdesc = NULL, *txdesc = NULL; struct dma_slave_config rxconf, txconf; @@ -384,10 +384,10 @@ stop_dma: return -EIO; } -static void img_spfi_handle_err(struct spi_master *master, +static void img_spfi_handle_err(struct spi_controller *host, struct spi_message *msg) { - struct img_spfi *spfi = spi_master_get_devdata(master); + struct img_spfi *spfi = spi_controller_get_devdata(host); unsigned long flags; /* @@ -405,9 +405,9 @@ static void img_spfi_handle_err(struct spi_master *master, spin_unlock_irqrestore(&spfi->lock, flags); } -static int img_spfi_prepare(struct spi_master *master, struct spi_message *msg) +static int img_spfi_prepare(struct spi_controller *host, struct spi_message *msg) { - struct img_spfi *spfi = spi_master_get_devdata(master); + struct img_spfi *spfi = spi_controller_get_devdata(host); u32 val; val = spfi_readl(spfi, SPFI_PORT_STATE); @@ -427,20 +427,20 @@ static int img_spfi_prepare(struct spi_master *master, struct spi_message *msg) return 0; } -static int img_spfi_unprepare(struct spi_master *master, +static int img_spfi_unprepare(struct spi_controller *host, struct spi_message *msg) { - struct img_spfi *spfi = spi_master_get_devdata(master); + struct img_spfi *spfi = spi_controller_get_devdata(host); spfi_reset(spfi); return 0; } -static void img_spfi_config(struct spi_master *master, struct spi_device *spi, +static void img_spfi_config(struct spi_controller *host, struct spi_device *spi, struct spi_transfer *xfer) { - struct img_spfi *spfi = spi_master_get_devdata(spi->master); + struct img_spfi *spfi = spi_controller_get_devdata(spi->controller); u32 val, div; /* @@ -476,11 +476,11 @@ static void img_spfi_config(struct spi_master *master, struct spi_device *spi, spfi_writel(spfi, val, SPFI_CONTROL); } -static int img_spfi_transfer_one(struct spi_master *master, +static int img_spfi_transfer_one(struct spi_controller *host, struct spi_device *spi, struct spi_transfer *xfer) { - struct img_spfi *spfi = spi_master_get_devdata(spi->master); + struct img_spfi *spfi = spi_controller_get_devdata(spi->controller); int ret; if (xfer->len > SPFI_TRANSACTION_TSIZE_MASK) { @@ -490,16 +490,16 @@ static int img_spfi_transfer_one(struct spi_master *master, return -EINVAL; } - img_spfi_config(master, spi, xfer); - if (master->can_dma && master->can_dma(master, spi, xfer)) - ret = img_spfi_start_dma(master, spi, xfer); + img_spfi_config(host, spi, xfer); + if (host->can_dma && host->can_dma(host, spi, xfer)) + ret = img_spfi_start_dma(host, spi, xfer); else - ret = img_spfi_start_pio(master, spi, xfer); + ret = img_spfi_start_pio(host, spi, xfer); return ret; } -static bool img_spfi_can_dma(struct spi_master *master, struct spi_device *spi, +static bool img_spfi_can_dma(struct spi_controller *host, struct spi_device *spi, struct spi_transfer *xfer) { if (xfer->len > SPFI_32BIT_FIFO_SIZE) @@ -524,20 +524,20 @@ static irqreturn_t img_spfi_irq(int irq, void *dev_id) static int img_spfi_probe(struct platform_device *pdev) { - struct spi_master *master; + struct spi_controller *host; struct img_spfi *spfi; struct resource *res; int ret; u32 max_speed_hz; - master = spi_alloc_master(&pdev->dev, sizeof(*spfi)); - if (!master) + host = spi_alloc_host(&pdev->dev, sizeof(*spfi)); + if (!host) return -ENOMEM; - platform_set_drvdata(pdev, master); + platform_set_drvdata(pdev, host); - spfi = spi_master_get_devdata(master); + spfi = spi_controller_get_devdata(host); spfi->dev = &pdev->dev; - spfi->master = master; + spfi->host = host; spin_lock_init(&spfi->lock); spfi->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res); @@ -582,15 +582,15 @@ static int img_spfi_probe(struct platform_device *pdev) */ spfi_writel(spfi, SPFI_INTERRUPT_IACCESS, SPFI_INTERRUPT_ENABLE); - master->auto_runtime_pm = true; - master->bus_num = pdev->id; - master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_TX_DUAL | SPI_RX_DUAL; + host->auto_runtime_pm = true; + host->bus_num = pdev->id; + host->mode_bits = SPI_CPOL | SPI_CPHA | SPI_TX_DUAL | SPI_RX_DUAL; if (of_property_read_bool(spfi->dev->of_node, "img,supports-quad-mode")) - master->mode_bits |= SPI_TX_QUAD | SPI_RX_QUAD; - master->dev.of_node = pdev->dev.of_node; - master->bits_per_word_mask = SPI_BPW_MASK(32) | SPI_BPW_MASK(8); - master->max_speed_hz = clk_get_rate(spfi->spfi_clk) / 4; - master->min_speed_hz = clk_get_rate(spfi->spfi_clk) / 512; + host->mode_bits |= SPI_TX_QUAD | SPI_RX_QUAD; + host->dev.of_node = pdev->dev.of_node; + host->bits_per_word_mask = SPI_BPW_MASK(32) | SPI_BPW_MASK(8); + host->max_speed_hz = clk_get_rate(spfi->spfi_clk) / 4; + host->min_speed_hz = clk_get_rate(spfi->spfi_clk) / 512; /* * Maximum speed supported by spfi is limited to the lower value @@ -601,15 +601,15 @@ static int img_spfi_probe(struct platform_device *pdev) */ if (!of_property_read_u32(spfi->dev->of_node, "spfi-max-frequency", &max_speed_hz)) { - if (master->max_speed_hz > max_speed_hz) - master->max_speed_hz = max_speed_hz; + if (host->max_speed_hz > max_speed_hz) + host->max_speed_hz = max_speed_hz; } - master->transfer_one = img_spfi_transfer_one; - master->prepare_message = img_spfi_prepare; - master->unprepare_message = img_spfi_unprepare; - master->handle_err = img_spfi_handle_err; - master->use_gpio_descriptors = true; + host->transfer_one = img_spfi_transfer_one; + host->prepare_message = img_spfi_prepare; + host->unprepare_message = img_spfi_unprepare; + host->handle_err = img_spfi_handle_err; + host->use_gpio_descriptors = true; spfi->tx_ch = dma_request_chan(spfi->dev, "tx"); if (IS_ERR(spfi->tx_ch)) { @@ -636,15 +636,15 @@ static int img_spfi_probe(struct platform_device *pdev) spfi->rx_ch = NULL; dev_warn(spfi->dev, "Failed to get DMA channels, falling back to PIO mode\n"); } else { - master->dma_tx = spfi->tx_ch; - master->dma_rx = spfi->rx_ch; - master->can_dma = img_spfi_can_dma; + host->dma_tx = spfi->tx_ch; + host->dma_rx = spfi->rx_ch; + host->can_dma = img_spfi_can_dma; } pm_runtime_set_active(spfi->dev); pm_runtime_enable(spfi->dev); - ret = devm_spi_register_master(spfi->dev, master); + ret = devm_spi_register_controller(spfi->dev, host); if (ret) goto disable_pm; @@ -660,15 +660,15 @@ disable_pm: disable_pclk: clk_disable_unprepare(spfi->sys_clk); put_spi: - spi_master_put(master); + spi_controller_put(host); return ret; } static void img_spfi_remove(struct platform_device *pdev) { - struct spi_master *master = platform_get_drvdata(pdev); - struct img_spfi *spfi = spi_master_get_devdata(master); + struct spi_controller *host = platform_get_drvdata(pdev); + struct img_spfi *spfi = spi_controller_get_devdata(host); if (spfi->tx_ch) dma_release_channel(spfi->tx_ch); @@ -685,8 +685,8 @@ static void img_spfi_remove(struct platform_device *pdev) #ifdef CONFIG_PM static int img_spfi_runtime_suspend(struct device *dev) { - struct spi_master *master = dev_get_drvdata(dev); - struct img_spfi *spfi = spi_master_get_devdata(master); + struct spi_controller *host = dev_get_drvdata(dev); + struct img_spfi *spfi = spi_controller_get_devdata(host); clk_disable_unprepare(spfi->spfi_clk); clk_disable_unprepare(spfi->sys_clk); @@ -696,8 +696,8 @@ static int img_spfi_runtime_suspend(struct device *dev) static int img_spfi_runtime_resume(struct device *dev) { - struct spi_master *master = dev_get_drvdata(dev); - struct img_spfi *spfi = spi_master_get_devdata(master); + struct spi_controller *host = dev_get_drvdata(dev); + struct img_spfi *spfi = spi_controller_get_devdata(host); int ret; ret = clk_prepare_enable(spfi->sys_clk); @@ -716,15 +716,15 @@ static int img_spfi_runtime_resume(struct device *dev) #ifdef CONFIG_PM_SLEEP static int img_spfi_suspend(struct device *dev) { - struct spi_master *master = dev_get_drvdata(dev); + struct spi_controller *host = dev_get_drvdata(dev); - return spi_master_suspend(master); + return spi_controller_suspend(host); } static int img_spfi_resume(struct device *dev) { - struct spi_master *master = dev_get_drvdata(dev); - struct img_spfi *spfi = spi_master_get_devdata(master); + struct spi_controller *host = dev_get_drvdata(dev); + struct img_spfi *spfi = spi_controller_get_devdata(host); int ret; ret = pm_runtime_resume_and_get(dev); @@ -733,7 +733,7 @@ static int img_spfi_resume(struct device *dev) spfi_reset(spfi); pm_runtime_put(dev); - return spi_master_resume(master); + return spi_controller_resume(host); } #endif /* CONFIG_PM_SLEEP */ From 756d5bf0770662ebf14f0eb274d862be5cf3e044 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Mon, 7 Aug 2023 20:41:01 +0800 Subject: [PATCH 388/656] spi: imx: switch to use modern name Change legacy name master/slave to modern name host/target. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230807124105.3429709-17-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-imx.c | 114 +++++++++++++++++++++--------------------- 1 file changed, 57 insertions(+), 57 deletions(-) diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c index 3634fe8f6d68..a8a74c7cb79f 100644 --- a/drivers/spi/spi-imx.c +++ b/drivers/spi/spi-imx.c @@ -52,7 +52,7 @@ MODULE_PARM_DESC(polling_limit_us, /* The maximum bytes that a sdma BD can transfer. */ #define MAX_SDMA_BD_BYTES (1 << 15) #define MX51_ECSPI_CTRL_MAX_BURST 512 -/* The maximum bytes that IMX53_ECSPI can transfer in slave mode.*/ +/* The maximum bytes that IMX53_ECSPI can transfer in target mode.*/ #define MX53_MAX_TRANSFER_BYTES 512 enum spi_imx_devtype { @@ -77,7 +77,7 @@ struct spi_imx_devtype_data { void (*setup_wml)(struct spi_imx_data *spi_imx); void (*disable)(struct spi_imx_data *spi_imx); bool has_dmamode; - bool has_slavemode; + bool has_targetmode; unsigned int fifo_size; bool dynamic_burst; /* @@ -113,10 +113,10 @@ struct spi_imx_data { unsigned int dynamic_burst; bool rx_only; - /* Slave mode */ - bool slave_mode; - bool slave_aborted; - unsigned int slave_burst; + /* Target mode */ + bool target_mode; + bool target_aborted; + unsigned int target_burst; /* DMA */ bool usedma; @@ -240,7 +240,7 @@ static bool spi_imx_can_dma(struct spi_controller *controller, struct spi_device if (!controller->dma_rx) return false; - if (spi_imx->slave_mode) + if (spi_imx->target_mode) return false; if (transfer->len < spi_imx->devtype_data->fifo_size) @@ -404,12 +404,12 @@ static void spi_imx_buf_tx_swap(struct spi_imx_data *spi_imx) writel(val, spi_imx->base + MXC_CSPITXDATA); } -static void mx53_ecspi_rx_slave(struct spi_imx_data *spi_imx) +static void mx53_ecspi_rx_target(struct spi_imx_data *spi_imx) { u32 val = be32_to_cpu(readl(spi_imx->base + MXC_CSPIRXDATA)); if (spi_imx->rx_buf) { - int n_bytes = spi_imx->slave_burst % sizeof(val); + int n_bytes = spi_imx->target_burst % sizeof(val); if (!n_bytes) n_bytes = sizeof(val); @@ -418,13 +418,13 @@ static void mx53_ecspi_rx_slave(struct spi_imx_data *spi_imx) ((u8 *)&val) + sizeof(val) - n_bytes, n_bytes); spi_imx->rx_buf += n_bytes; - spi_imx->slave_burst -= n_bytes; + spi_imx->target_burst -= n_bytes; } spi_imx->remainder -= sizeof(u32); } -static void mx53_ecspi_tx_slave(struct spi_imx_data *spi_imx) +static void mx53_ecspi_tx_target(struct spi_imx_data *spi_imx) { u32 val = 0; int n_bytes = spi_imx->count % sizeof(val); @@ -535,8 +535,8 @@ static int mx51_ecspi_prepare_message(struct spi_imx_data *spi_imx, u32 current_cfg = cfg; int channel = mx51_ecspi_channel(spi); - /* set Master or Slave mode */ - if (spi_imx->slave_mode) + /* set Host or Target mode */ + if (spi_imx->target_mode) ctrl &= ~MX51_ECSPI_CTRL_MODE_MASK; else ctrl |= MX51_ECSPI_CTRL_MODE_MASK; @@ -564,11 +564,11 @@ static int mx51_ecspi_prepare_message(struct spi_imx_data *spi_imx, writel(testreg, spi_imx->base + MX51_ECSPI_TESTREG); /* - * eCSPI burst completion by Chip Select signal in Slave mode + * eCSPI burst completion by Chip Select signal in Target mode * is not functional for imx53 Soc, config SPI burst completed when * BURST_LENGTH + 1 bits are received */ - if (spi_imx->slave_mode && is_imx53_ecspi(spi_imx)) + if (spi_imx->target_mode && is_imx53_ecspi(spi_imx)) cfg &= ~MX51_ECSPI_CONFIG_SBBCTRL(channel); else cfg |= MX51_ECSPI_CONFIG_SBBCTRL(channel); @@ -655,8 +655,8 @@ static int mx51_ecspi_prepare_transfer(struct spi_imx_data *spi_imx, /* Clear BL field and set the right value */ ctrl &= ~MX51_ECSPI_CTRL_BL_MASK; - if (spi_imx->slave_mode && is_imx53_ecspi(spi_imx)) - ctrl |= (spi_imx->slave_burst * 8 - 1) + if (spi_imx->target_mode && is_imx53_ecspi(spi_imx)) + ctrl |= (spi_imx->target_burst * 8 - 1) << MX51_ECSPI_CTRL_BL_OFFSET; else { if (spi_imx->count >= 512) @@ -721,7 +721,7 @@ static void mx51_ecspi_reset(struct spi_imx_data *spi_imx) #define MX31_INTREG_RREN (1 << 3) #define MX31_CSPICTRL_ENABLE (1 << 0) -#define MX31_CSPICTRL_MASTER (1 << 1) +#define MX31_CSPICTRL_HOST (1 << 1) #define MX31_CSPICTRL_XCH (1 << 2) #define MX31_CSPICTRL_SMC (1 << 3) #define MX31_CSPICTRL_POL (1 << 4) @@ -778,7 +778,7 @@ static int mx31_prepare_message(struct spi_imx_data *spi_imx, static int mx31_prepare_transfer(struct spi_imx_data *spi_imx, struct spi_device *spi) { - unsigned int reg = MX31_CSPICTRL_ENABLE | MX31_CSPICTRL_MASTER; + unsigned int reg = MX31_CSPICTRL_ENABLE | MX31_CSPICTRL_HOST; unsigned int clk; reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, spi_imx->spi_bus_clk, &clk) << @@ -848,7 +848,7 @@ static void mx31_reset(struct spi_imx_data *spi_imx) #define MX21_CSPICTRL_SSPOL (1 << 8) #define MX21_CSPICTRL_XCH (1 << 9) #define MX21_CSPICTRL_ENABLE (1 << 10) -#define MX21_CSPICTRL_MASTER (1 << 11) +#define MX21_CSPICTRL_HOST (1 << 11) #define MX21_CSPICTRL_DR_SHIFT 14 #define MX21_CSPICTRL_CS_SHIFT 19 @@ -882,7 +882,7 @@ static int mx21_prepare_message(struct spi_imx_data *spi_imx, static int mx21_prepare_transfer(struct spi_imx_data *spi_imx, struct spi_device *spi) { - unsigned int reg = MX21_CSPICTRL_ENABLE | MX21_CSPICTRL_MASTER; + unsigned int reg = MX21_CSPICTRL_ENABLE | MX21_CSPICTRL_HOST; unsigned int max = is_imx27_cspi(spi_imx) ? 16 : 18; unsigned int clk; @@ -924,7 +924,7 @@ static void mx21_reset(struct spi_imx_data *spi_imx) #define MX1_CSPICTRL_PHA (1 << 5) #define MX1_CSPICTRL_XCH (1 << 8) #define MX1_CSPICTRL_ENABLE (1 << 9) -#define MX1_CSPICTRL_MASTER (1 << 10) +#define MX1_CSPICTRL_HOST (1 << 10) #define MX1_CSPICTRL_DR_SHIFT 13 static void mx1_intctrl(struct spi_imx_data *spi_imx, int enable) @@ -957,7 +957,7 @@ static int mx1_prepare_message(struct spi_imx_data *spi_imx, static int mx1_prepare_transfer(struct spi_imx_data *spi_imx, struct spi_device *spi) { - unsigned int reg = MX1_CSPICTRL_ENABLE | MX1_CSPICTRL_MASTER; + unsigned int reg = MX1_CSPICTRL_ENABLE | MX1_CSPICTRL_HOST; unsigned int clk; reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, spi_imx->spi_bus_clk, &clk) << @@ -996,7 +996,7 @@ static struct spi_imx_devtype_data imx1_cspi_devtype_data = { .fifo_size = 8, .has_dmamode = false, .dynamic_burst = false, - .has_slavemode = false, + .has_targetmode = false, .devtype = IMX1_CSPI, }; @@ -1010,7 +1010,7 @@ static struct spi_imx_devtype_data imx21_cspi_devtype_data = { .fifo_size = 8, .has_dmamode = false, .dynamic_burst = false, - .has_slavemode = false, + .has_targetmode = false, .devtype = IMX21_CSPI, }; @@ -1025,7 +1025,7 @@ static struct spi_imx_devtype_data imx27_cspi_devtype_data = { .fifo_size = 8, .has_dmamode = false, .dynamic_burst = false, - .has_slavemode = false, + .has_targetmode = false, .devtype = IMX27_CSPI, }; @@ -1039,7 +1039,7 @@ static struct spi_imx_devtype_data imx31_cspi_devtype_data = { .fifo_size = 8, .has_dmamode = false, .dynamic_burst = false, - .has_slavemode = false, + .has_targetmode = false, .devtype = IMX31_CSPI, }; @@ -1054,7 +1054,7 @@ static struct spi_imx_devtype_data imx35_cspi_devtype_data = { .fifo_size = 8, .has_dmamode = true, .dynamic_burst = false, - .has_slavemode = false, + .has_targetmode = false, .devtype = IMX35_CSPI, }; @@ -1069,7 +1069,7 @@ static struct spi_imx_devtype_data imx51_ecspi_devtype_data = { .fifo_size = 64, .has_dmamode = true, .dynamic_burst = true, - .has_slavemode = true, + .has_targetmode = true, .disable = mx51_ecspi_disable, .devtype = IMX51_ECSPI, }; @@ -1083,7 +1083,7 @@ static struct spi_imx_devtype_data imx53_ecspi_devtype_data = { .reset = mx51_ecspi_reset, .fifo_size = 64, .has_dmamode = true, - .has_slavemode = true, + .has_targetmode = true, .disable = mx51_ecspi_disable, .devtype = IMX53_ECSPI, }; @@ -1099,7 +1099,7 @@ static struct spi_imx_devtype_data imx6ul_ecspi_devtype_data = { .fifo_size = 64, .has_dmamode = true, .dynamic_burst = true, - .has_slavemode = true, + .has_targetmode = true, .tx_glitch_fixed = true, .disable = mx51_ecspi_disable, .devtype = IMX51_ECSPI, @@ -1164,7 +1164,7 @@ static void spi_imx_push(struct spi_imx_data *spi_imx) spi_imx->txfifo++; } - if (!spi_imx->slave_mode) + if (!spi_imx->target_mode) spi_imx->devtype_data->trigger(spi_imx); } @@ -1268,7 +1268,7 @@ static int spi_imx_setupxfer(struct spi_device *spi, * words, we have to use multiple word-size bursts, we can't use * dynamic_burst in that case. */ - if (spi_imx->devtype_data->dynamic_burst && !spi_imx->slave_mode && + if (spi_imx->devtype_data->dynamic_burst && !spi_imx->target_mode && !(spi->mode & SPI_CS_WORD) && (spi_imx->bits_per_word == 8 || spi_imx->bits_per_word == 16 || @@ -1300,10 +1300,10 @@ static int spi_imx_setupxfer(struct spi_device *spi, spi_imx->rx_only = ((t->tx_buf == NULL) || (t->tx_buf == spi->controller->dummy_tx)); - if (is_imx53_ecspi(spi_imx) && spi_imx->slave_mode) { - spi_imx->rx = mx53_ecspi_rx_slave; - spi_imx->tx = mx53_ecspi_tx_slave; - spi_imx->slave_burst = t->len; + if (is_imx53_ecspi(spi_imx) && spi_imx->target_mode) { + spi_imx->rx = mx53_ecspi_rx_target; + spi_imx->tx = mx53_ecspi_tx_target; + spi_imx->target_burst = t->len; } spi_imx->devtype_data->prepare_transfer(spi_imx, spi); @@ -1568,8 +1568,8 @@ static int spi_imx_poll_transfer(struct spi_device *spi, return 0; } -static int spi_imx_pio_transfer_slave(struct spi_device *spi, - struct spi_transfer *transfer) +static int spi_imx_pio_transfer_target(struct spi_device *spi, + struct spi_transfer *transfer) { struct spi_imx_data *spi_imx = spi_controller_get_devdata(spi->controller); int ret = 0; @@ -1588,22 +1588,22 @@ static int spi_imx_pio_transfer_slave(struct spi_device *spi, spi_imx->remainder = 0; reinit_completion(&spi_imx->xfer_done); - spi_imx->slave_aborted = false; + spi_imx->target_aborted = false; spi_imx_push(spi_imx); spi_imx->devtype_data->intctrl(spi_imx, MXC_INT_TE | MXC_INT_RDR); if (wait_for_completion_interruptible(&spi_imx->xfer_done) || - spi_imx->slave_aborted) { + spi_imx->target_aborted) { dev_dbg(&spi->dev, "interrupted\n"); ret = -EINTR; } - /* ecspi has a HW issue when works in Slave mode, + /* ecspi has a HW issue when works in Target mode, * after 64 words writtern to TXFIFO, even TXFIFO becomes empty, * ECSPI_TXDATA keeps shift out the last word data, - * so we have to disable ECSPI when in slave mode after the + * so we have to disable ECSPI when in target mode after the * transfer completes */ if (spi_imx->devtype_data->disable) @@ -1626,8 +1626,8 @@ static int spi_imx_transfer_one(struct spi_controller *controller, while (spi_imx->devtype_data->rx_available(spi_imx)) readl(spi_imx->base + MXC_CSPIRXDATA); - if (spi_imx->slave_mode) - return spi_imx_pio_transfer_slave(spi, transfer); + if (spi_imx->target_mode) + return spi_imx_pio_transfer_target(spi, transfer); /* * If we decided in spi_imx_can_dma() that we want to do a DMA @@ -1693,11 +1693,11 @@ spi_imx_unprepare_message(struct spi_controller *controller, struct spi_message return 0; } -static int spi_imx_slave_abort(struct spi_controller *controller) +static int spi_imx_target_abort(struct spi_controller *controller) { struct spi_imx_data *spi_imx = spi_controller_get_devdata(controller); - spi_imx->slave_aborted = true; + spi_imx->target_aborted = true; complete(&spi_imx->xfer_done); return 0; @@ -1712,17 +1712,17 @@ static int spi_imx_probe(struct platform_device *pdev) int ret, irq, spi_drctl; const struct spi_imx_devtype_data *devtype_data = of_device_get_match_data(&pdev->dev); - bool slave_mode; + bool target_mode; u32 val; - slave_mode = devtype_data->has_slavemode && - of_property_read_bool(np, "spi-slave"); - if (slave_mode) - controller = spi_alloc_slave(&pdev->dev, - sizeof(struct spi_imx_data)); - else - controller = spi_alloc_master(&pdev->dev, + target_mode = devtype_data->has_targetmode && + of_property_read_bool(np, "spi-slave"); + if (target_mode) + controller = spi_alloc_target(&pdev->dev, sizeof(struct spi_imx_data)); + else + controller = spi_alloc_host(&pdev->dev, + sizeof(struct spi_imx_data)); if (!controller) return -ENOMEM; @@ -1741,7 +1741,7 @@ static int spi_imx_probe(struct platform_device *pdev) spi_imx = spi_controller_get_devdata(controller); spi_imx->controller = controller; spi_imx->dev = &pdev->dev; - spi_imx->slave_mode = slave_mode; + spi_imx->target_mode = target_mode; spi_imx->devtype_data = devtype_data; @@ -1761,7 +1761,7 @@ static int spi_imx_probe(struct platform_device *pdev) controller->cleanup = spi_imx_cleanup; controller->prepare_message = spi_imx_prepare_message; controller->unprepare_message = spi_imx_unprepare_message; - controller->slave_abort = spi_imx_slave_abort; + controller->target_abort = spi_imx_target_abort; controller->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_NO_CS | SPI_MOSI_IDLE_LOW; From 452edead18d7ba14b018f85f9eda0922a23e7412 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Mon, 7 Aug 2023 20:41:02 +0800 Subject: [PATCH 389/656] spi: ingenic: switch to use devm_spi_alloc_host() Switch to use modern name function devm_spi_alloc_host(). No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230807124105.3429709-18-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-ingenic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/spi-ingenic.c b/drivers/spi/spi-ingenic.c index cfa665a80bc6..cc366936d72b 100644 --- a/drivers/spi/spi-ingenic.c +++ b/drivers/spi/spi-ingenic.c @@ -392,7 +392,7 @@ static int spi_ingenic_probe(struct platform_device *pdev) return -EINVAL; } - ctlr = devm_spi_alloc_master(dev, sizeof(*priv)); + ctlr = devm_spi_alloc_host(dev, sizeof(*priv)); if (!ctlr) { dev_err(dev, "Unable to allocate SPI controller.\n"); return -ENOMEM; From 5fa0ade1851f7766e75ebb453ef8d6de089318d4 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Mon, 7 Aug 2023 20:41:03 +0800 Subject: [PATCH 390/656] spi: intel: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230807124105.3429709-19-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-intel.c | 42 ++++++++++++++++++++--------------------- 1 file changed, 21 insertions(+), 21 deletions(-) diff --git a/drivers/spi/spi-intel.c b/drivers/spi/spi-intel.c index bc6d22149e7e..98ec4dc22b81 100644 --- a/drivers/spi/spi-intel.c +++ b/drivers/spi/spi-intel.c @@ -143,7 +143,7 @@ * @base: Beginning of MMIO space * @pregs: Start of protection registers * @sregs: Start of software sequencer registers - * @master: Pointer to the SPI controller structure + * @host: Pointer to the SPI controller structure * @nregions: Maximum number of regions * @pr_num: Maximum number of protected range registers * @chip0_size: Size of the first flash chip in bytes @@ -161,7 +161,7 @@ struct intel_spi { void __iomem *base; void __iomem *pregs; void __iomem *sregs; - struct spi_controller *master; + struct spi_controller *host; size_t nregions; size_t pr_num; size_t chip0_size; @@ -747,7 +747,7 @@ intel_spi_match_mem_op(struct intel_spi *ispi, const struct spi_mem_op *op) static bool intel_spi_supports_mem_op(struct spi_mem *mem, const struct spi_mem_op *op) { - struct intel_spi *ispi = spi_master_get_devdata(mem->spi->master); + struct intel_spi *ispi = spi_controller_get_devdata(mem->spi->controller); const struct intel_spi_mem_op *iop; iop = intel_spi_match_mem_op(ispi, op); @@ -778,7 +778,7 @@ static bool intel_spi_supports_mem_op(struct spi_mem *mem, static int intel_spi_exec_mem_op(struct spi_mem *mem, const struct spi_mem_op *op) { - struct intel_spi *ispi = spi_master_get_devdata(mem->spi->master); + struct intel_spi *ispi = spi_controller_get_devdata(mem->spi->controller); const struct intel_spi_mem_op *iop; iop = intel_spi_match_mem_op(ispi, op); @@ -790,7 +790,7 @@ static int intel_spi_exec_mem_op(struct spi_mem *mem, const struct spi_mem_op *o static const char *intel_spi_get_name(struct spi_mem *mem) { - const struct intel_spi *ispi = spi_master_get_devdata(mem->spi->master); + const struct intel_spi *ispi = spi_controller_get_devdata(mem->spi->controller); /* * Return name of the flash controller device to be compatible @@ -801,7 +801,7 @@ static const char *intel_spi_get_name(struct spi_mem *mem) static int intel_spi_dirmap_create(struct spi_mem_dirmap_desc *desc) { - struct intel_spi *ispi = spi_master_get_devdata(desc->mem->spi->master); + struct intel_spi *ispi = spi_controller_get_devdata(desc->mem->spi->controller); const struct intel_spi_mem_op *iop; iop = intel_spi_match_mem_op(ispi, &desc->info.op_tmpl); @@ -815,7 +815,7 @@ static int intel_spi_dirmap_create(struct spi_mem_dirmap_desc *desc) static ssize_t intel_spi_dirmap_read(struct spi_mem_dirmap_desc *desc, u64 offs, size_t len, void *buf) { - struct intel_spi *ispi = spi_master_get_devdata(desc->mem->spi->master); + struct intel_spi *ispi = spi_controller_get_devdata(desc->mem->spi->controller); const struct intel_spi_mem_op *iop = desc->priv; struct spi_mem_op op = desc->info.op_tmpl; int ret; @@ -832,7 +832,7 @@ static ssize_t intel_spi_dirmap_read(struct spi_mem_dirmap_desc *desc, u64 offs, static ssize_t intel_spi_dirmap_write(struct spi_mem_dirmap_desc *desc, u64 offs, size_t len, const void *buf) { - struct intel_spi *ispi = spi_master_get_devdata(desc->mem->spi->master); + struct intel_spi *ispi = spi_controller_get_devdata(desc->mem->spi->controller); const struct intel_spi_mem_op *iop = desc->priv; struct spi_mem_op op = desc->info.op_tmpl; int ret; @@ -1332,14 +1332,14 @@ static int intel_spi_read_desc(struct intel_spi *ispi) nc = (buf[1] & FLMAP0_NC_MASK) >> FLMAP0_NC_SHIFT; if (!nc) - ispi->master->num_chipselect = 1; + ispi->host->num_chipselect = 1; else if (nc == 1) - ispi->master->num_chipselect = 2; + ispi->host->num_chipselect = 2; else return -EINVAL; dev_dbg(ispi->dev, "%u flash components found\n", - ispi->master->num_chipselect); + ispi->host->num_chipselect); return 0; } @@ -1365,7 +1365,7 @@ static int intel_spi_populate_chip(struct intel_spi *ispi) snprintf(chip.modalias, 8, "spi-nor"); chip.platform_data = pdata; - if (!spi_new_device(ispi->master, &chip)) + if (!spi_new_device(ispi->host, &chip)) return -ENODEV; ret = intel_spi_read_desc(ispi); @@ -1373,13 +1373,13 @@ static int intel_spi_populate_chip(struct intel_spi *ispi) return ret; /* Add the second chip if present */ - if (ispi->master->num_chipselect < 2) + if (ispi->host->num_chipselect < 2) return 0; chip.platform_data = NULL; chip.chip_select = 1; - if (!spi_new_device(ispi->master, &chip)) + if (!spi_new_device(ispi->host, &chip)) return -ENODEV; return 0; } @@ -1396,31 +1396,31 @@ static int intel_spi_populate_chip(struct intel_spi *ispi) int intel_spi_probe(struct device *dev, struct resource *mem, const struct intel_spi_boardinfo *info) { - struct spi_controller *master; + struct spi_controller *host; struct intel_spi *ispi; int ret; - master = devm_spi_alloc_master(dev, sizeof(*ispi)); - if (!master) + host = devm_spi_alloc_host(dev, sizeof(*ispi)); + if (!host) return -ENOMEM; - master->mem_ops = &intel_spi_mem_ops; + host->mem_ops = &intel_spi_mem_ops; - ispi = spi_master_get_devdata(master); + ispi = spi_controller_get_devdata(host); ispi->base = devm_ioremap_resource(dev, mem); if (IS_ERR(ispi->base)) return PTR_ERR(ispi->base); ispi->dev = dev; - ispi->master = master; + ispi->host = host; ispi->info = info; ret = intel_spi_init(ispi); if (ret) return ret; - ret = devm_spi_register_master(dev, master); + ret = devm_spi_register_controller(dev, host); if (ret) return ret; From 810ee62dd81d05c2305132804c021c2ac406b2b5 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Mon, 7 Aug 2023 20:41:04 +0800 Subject: [PATCH 391/656] spi: jcore: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230807124105.3429709-20-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-jcore.c | 44 ++++++++++++++++++++--------------------- 1 file changed, 22 insertions(+), 22 deletions(-) diff --git a/drivers/spi/spi-jcore.c b/drivers/spi/spi-jcore.c index c42a3358e8c9..e37ca22e04ba 100644 --- a/drivers/spi/spi-jcore.c +++ b/drivers/spi/spi-jcore.c @@ -33,7 +33,7 @@ #define JCORE_SPI_WAIT_RDY_MAX_LOOP 2000000 struct jcore_spi { - struct spi_master *master; + struct spi_controller *host; void __iomem *base; unsigned int cs_reg; unsigned int speed_reg; @@ -59,7 +59,7 @@ static void jcore_spi_program(struct jcore_spi *hw) void __iomem *ctrl_reg = hw->base + CTRL_REG; if (jcore_spi_wait(ctrl_reg)) - dev_err(hw->master->dev.parent, + dev_err(hw->host->dev.parent, "timeout waiting to program ctrl reg.\n"); writel(hw->cs_reg | hw->speed_reg, ctrl_reg); @@ -67,10 +67,10 @@ static void jcore_spi_program(struct jcore_spi *hw) static void jcore_spi_chipsel(struct spi_device *spi, bool value) { - struct jcore_spi *hw = spi_master_get_devdata(spi->master); + struct jcore_spi *hw = spi_controller_get_devdata(spi->controller); u32 csbit = 1U << (2 * spi_get_chipselect(spi, 0)); - dev_dbg(hw->master->dev.parent, "chipselect %d\n", spi_get_chipselect(spi, 0)); + dev_dbg(hw->host->dev.parent, "chipselect %d\n", spi_get_chipselect(spi, 0)); if (value) hw->cs_reg |= csbit; @@ -90,14 +90,14 @@ static void jcore_spi_baudrate(struct jcore_spi *hw, int speed) else hw->speed_reg = ((hw->clock_freq / 2 / speed) - 1) << 27; jcore_spi_program(hw); - dev_dbg(hw->master->dev.parent, "speed=%d reg=0x%x\n", + dev_dbg(hw->host->dev.parent, "speed=%d reg=0x%x\n", speed, hw->speed_reg); } -static int jcore_spi_txrx(struct spi_master *master, struct spi_device *spi, +static int jcore_spi_txrx(struct spi_controller *host, struct spi_device *spi, struct spi_transfer *t) { - struct jcore_spi *hw = spi_master_get_devdata(master); + struct jcore_spi *hw = spi_controller_get_devdata(host); void __iomem *ctrl_reg = hw->base + CTRL_REG; void __iomem *data_reg = hw->base + DATA_REG; @@ -130,7 +130,7 @@ static int jcore_spi_txrx(struct spi_master *master, struct spi_device *spi, *rx++ = readl(data_reg); } - spi_finalize_current_transfer(master); + spi_finalize_current_transfer(host); if (count < len) return -EREMOTEIO; @@ -142,26 +142,26 @@ static int jcore_spi_probe(struct platform_device *pdev) { struct device_node *node = pdev->dev.of_node; struct jcore_spi *hw; - struct spi_master *master; + struct spi_controller *host; struct resource *res; u32 clock_freq; struct clk *clk; int err = -ENODEV; - master = spi_alloc_master(&pdev->dev, sizeof(struct jcore_spi)); - if (!master) + host = spi_alloc_host(&pdev->dev, sizeof(struct jcore_spi)); + if (!host) return err; - /* Setup the master state. */ - master->num_chipselect = 3; - master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; - master->transfer_one = jcore_spi_txrx; - master->set_cs = jcore_spi_chipsel; - master->dev.of_node = node; - master->bus_num = pdev->id; + /* Setup the host state. */ + host->num_chipselect = 3; + host->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; + host->transfer_one = jcore_spi_txrx; + host->set_cs = jcore_spi_chipsel; + host->dev.of_node = node; + host->bus_num = pdev->id; - hw = spi_master_get_devdata(master); - hw->master = master; + hw = spi_controller_get_devdata(host); + hw->host = host; platform_set_drvdata(pdev, hw); /* Find and map our resources */ @@ -200,7 +200,7 @@ static int jcore_spi_probe(struct platform_device *pdev) jcore_spi_baudrate(hw, 400000); /* Register our spi controller */ - err = devm_spi_register_master(&pdev->dev, master); + err = devm_spi_register_controller(&pdev->dev, host); if (err) goto exit; @@ -209,7 +209,7 @@ static int jcore_spi_probe(struct platform_device *pdev) exit_busy: err = -EBUSY; exit: - spi_master_put(master); + spi_controller_put(host); return err; } From ea11a8bb79d6c2655d145ec003deb77ab03dcb71 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Mon, 7 Aug 2023 20:41:05 +0800 Subject: [PATCH 392/656] spi: lantiq: switch to use modern name Change legacy name master/slave to modern name host/target or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230807124105.3429709-21-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-lantiq-ssc.c | 96 ++++++++++++++++++------------------ 1 file changed, 48 insertions(+), 48 deletions(-) diff --git a/drivers/spi/spi-lantiq-ssc.c b/drivers/spi/spi-lantiq-ssc.c index 65568272cfd9..938e9e577e4f 100644 --- a/drivers/spi/spi-lantiq-ssc.c +++ b/drivers/spi/spi-lantiq-ssc.c @@ -92,7 +92,7 @@ #define LTQ_SPI_STAT_RE BIT(9) /* Receive error flag */ #define LTQ_SPI_STAT_TE BIT(8) /* Transmit error flag */ #define LTQ_SPI_STAT_ME BIT(7) /* Mode error flag */ -#define LTQ_SPI_STAT_MS BIT(1) /* Master/slave select bit */ +#define LTQ_SPI_STAT_MS BIT(1) /* Host/target select bit */ #define LTQ_SPI_STAT_EN BIT(0) /* Enable bit */ #define LTQ_SPI_STAT_ERRORS (LTQ_SPI_STAT_ME | LTQ_SPI_STAT_TE | \ LTQ_SPI_STAT_RE | LTQ_SPI_STAT_AE | \ @@ -110,8 +110,8 @@ #define LTQ_SPI_WHBSTATE_CLRME BIT(6) /* Clear mode error flag */ #define LTQ_SPI_WHBSTATE_SETRUE BIT(5) /* Set receive underflow error flag */ #define LTQ_SPI_WHBSTATE_CLRRUE BIT(4) /* Clear receive underflow error flag */ -#define LTQ_SPI_WHBSTATE_SETMS BIT(3) /* Set master select bit */ -#define LTQ_SPI_WHBSTATE_CLRMS BIT(2) /* Clear master select bit */ +#define LTQ_SPI_WHBSTATE_SETMS BIT(3) /* Set host select bit */ +#define LTQ_SPI_WHBSTATE_CLRMS BIT(2) /* Clear host select bit */ #define LTQ_SPI_WHBSTATE_SETEN BIT(1) /* Set enable bit (operational mode) */ #define LTQ_SPI_WHBSTATE_CLREN BIT(0) /* Clear enable bit (config mode */ #define LTQ_SPI_WHBSTATE_CLR_ERRORS (LTQ_SPI_WHBSTATE_CLRRUE | \ @@ -163,7 +163,7 @@ struct lantiq_ssc_hwcfg { }; struct lantiq_ssc_spi { - struct spi_master *master; + struct spi_controller *host; struct device *dev; void __iomem *regbase; struct clk *spi_clk; @@ -367,7 +367,7 @@ static void lantiq_ssc_hw_init(const struct lantiq_ssc_spi *spi) hw_setup_bits_per_word(spi, spi->bits_per_word); hw_setup_clock_mode(spi, SPI_MODE_0); - /* Enable master mode and clear error flags */ + /* Enable host mode and clear error flags */ lantiq_ssc_writel(spi, LTQ_SPI_WHBSTATE_SETMS | LTQ_SPI_WHBSTATE_CLR_ERRORS, LTQ_SPI_WHBSTATE); @@ -387,8 +387,8 @@ static void lantiq_ssc_hw_init(const struct lantiq_ssc_spi *spi) static int lantiq_ssc_setup(struct spi_device *spidev) { - struct spi_master *master = spidev->master; - struct lantiq_ssc_spi *spi = spi_master_get_devdata(master); + struct spi_controller *host = spidev->controller; + struct lantiq_ssc_spi *spi = spi_controller_get_devdata(host); unsigned int cs = spi_get_chipselect(spidev, 0); u32 gpocon; @@ -416,10 +416,10 @@ static int lantiq_ssc_setup(struct spi_device *spidev) return 0; } -static int lantiq_ssc_prepare_message(struct spi_master *master, +static int lantiq_ssc_prepare_message(struct spi_controller *host, struct spi_message *message) { - struct lantiq_ssc_spi *spi = spi_master_get_devdata(master); + struct lantiq_ssc_spi *spi = spi_controller_get_devdata(host); hw_enter_config_mode(spi); hw_setup_clock_mode(spi, message->spi->mode); @@ -461,10 +461,10 @@ static void hw_setup_transfer(struct lantiq_ssc_spi *spi, lantiq_ssc_writel(spi, con, LTQ_SPI_CON); } -static int lantiq_ssc_unprepare_message(struct spi_master *master, +static int lantiq_ssc_unprepare_message(struct spi_controller *host, struct spi_message *message) { - struct lantiq_ssc_spi *spi = spi_master_get_devdata(master); + struct lantiq_ssc_spi *spi = spi_controller_get_devdata(host); flush_workqueue(spi->wq); @@ -693,8 +693,8 @@ static irqreturn_t lantiq_ssc_err_interrupt(int irq, void *data) lantiq_ssc_maskl(spi, 0, LTQ_SPI_WHBSTATE_CLR_ERRORS, LTQ_SPI_WHBSTATE); /* set bad status so it can be retried */ - if (spi->master->cur_msg) - spi->master->cur_msg->status = -EIO; + if (spi->host->cur_msg) + spi->host->cur_msg->status = -EIO; queue_work(spi->wq, &spi->work); spin_unlock(&spi->lock); @@ -772,22 +772,22 @@ static void lantiq_ssc_bussy_work(struct work_struct *work) u32 stat = lantiq_ssc_readl(spi, LTQ_SPI_STAT); if (!(stat & LTQ_SPI_STAT_BSY)) { - spi_finalize_current_transfer(spi->master); + spi_finalize_current_transfer(spi->host); return; } cond_resched(); } while (!time_after_eq(jiffies, end)); - if (spi->master->cur_msg) - spi->master->cur_msg->status = -EIO; - spi_finalize_current_transfer(spi->master); + if (spi->host->cur_msg) + spi->host->cur_msg->status = -EIO; + spi_finalize_current_transfer(spi->host); } -static void lantiq_ssc_handle_err(struct spi_master *master, +static void lantiq_ssc_handle_err(struct spi_controller *host, struct spi_message *message) { - struct lantiq_ssc_spi *spi = spi_master_get_devdata(master); + struct lantiq_ssc_spi *spi = spi_controller_get_devdata(host); /* flush FIFOs on timeout */ rx_fifo_flush(spi); @@ -796,7 +796,7 @@ static void lantiq_ssc_handle_err(struct spi_master *master, static void lantiq_ssc_set_cs(struct spi_device *spidev, bool enable) { - struct lantiq_ssc_spi *spi = spi_master_get_devdata(spidev->master); + struct lantiq_ssc_spi *spi = spi_controller_get_devdata(spidev->controller); unsigned int cs = spi_get_chipselect(spidev, 0); u32 fgpo; @@ -808,11 +808,11 @@ static void lantiq_ssc_set_cs(struct spi_device *spidev, bool enable) lantiq_ssc_writel(spi, fgpo, LTQ_SPI_FPGO); } -static int lantiq_ssc_transfer_one(struct spi_master *master, +static int lantiq_ssc_transfer_one(struct spi_controller *host, struct spi_device *spidev, struct spi_transfer *t) { - struct lantiq_ssc_spi *spi = spi_master_get_devdata(master); + struct lantiq_ssc_spi *spi = spi_controller_get_devdata(host); hw_setup_transfer(spi, spidev, t); @@ -904,7 +904,7 @@ MODULE_DEVICE_TABLE(of, lantiq_ssc_match); static int lantiq_ssc_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; - struct spi_master *master; + struct spi_controller *host; struct lantiq_ssc_spi *spi; const struct lantiq_ssc_hwcfg *hwcfg; u32 id, supports_dma, revision; @@ -913,33 +913,33 @@ static int lantiq_ssc_probe(struct platform_device *pdev) hwcfg = of_device_get_match_data(dev); - master = spi_alloc_master(dev, sizeof(struct lantiq_ssc_spi)); - if (!master) + host = spi_alloc_host(dev, sizeof(struct lantiq_ssc_spi)); + if (!host) return -ENOMEM; - spi = spi_master_get_devdata(master); - spi->master = master; + spi = spi_controller_get_devdata(host); + spi->host = host; spi->dev = dev; spi->hwcfg = hwcfg; platform_set_drvdata(pdev, spi); spi->regbase = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(spi->regbase)) { err = PTR_ERR(spi->regbase); - goto err_master_put; + goto err_host_put; } err = hwcfg->cfg_irq(pdev, spi); if (err) - goto err_master_put; + goto err_host_put; spi->spi_clk = devm_clk_get(dev, "gate"); if (IS_ERR(spi->spi_clk)) { err = PTR_ERR(spi->spi_clk); - goto err_master_put; + goto err_host_put; } err = clk_prepare_enable(spi->spi_clk); if (err) - goto err_master_put; + goto err_host_put; /* * Use the old clk_get_fpi() function on Lantiq platform, till it @@ -965,19 +965,19 @@ static int lantiq_ssc_probe(struct platform_device *pdev) spi->bits_per_word = 8; spi->speed_hz = 0; - master->dev.of_node = pdev->dev.of_node; - master->num_chipselect = num_cs; - master->use_gpio_descriptors = true; - master->setup = lantiq_ssc_setup; - master->set_cs = lantiq_ssc_set_cs; - master->handle_err = lantiq_ssc_handle_err; - master->prepare_message = lantiq_ssc_prepare_message; - master->unprepare_message = lantiq_ssc_unprepare_message; - master->transfer_one = lantiq_ssc_transfer_one; - master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST | SPI_CS_HIGH | - SPI_LOOP; - master->bits_per_word_mask = SPI_BPW_RANGE_MASK(2, 8) | - SPI_BPW_MASK(16) | SPI_BPW_MASK(32); + host->dev.of_node = pdev->dev.of_node; + host->num_chipselect = num_cs; + host->use_gpio_descriptors = true; + host->setup = lantiq_ssc_setup; + host->set_cs = lantiq_ssc_set_cs; + host->handle_err = lantiq_ssc_handle_err; + host->prepare_message = lantiq_ssc_prepare_message; + host->unprepare_message = lantiq_ssc_unprepare_message; + host->transfer_one = lantiq_ssc_transfer_one; + host->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST | SPI_CS_HIGH | + SPI_LOOP; + host->bits_per_word_mask = SPI_BPW_RANGE_MASK(2, 8) | + SPI_BPW_MASK(16) | SPI_BPW_MASK(32); spi->wq = alloc_ordered_workqueue(dev_name(dev), WQ_MEM_RECLAIM); if (!spi->wq) { @@ -998,9 +998,9 @@ static int lantiq_ssc_probe(struct platform_device *pdev) "Lantiq SSC SPI controller (Rev %i, TXFS %u, RXFS %u, DMA %u)\n", revision, spi->tx_fifo_size, spi->rx_fifo_size, supports_dma); - err = devm_spi_register_master(dev, master); + err = devm_spi_register_controller(dev, host); if (err) { - dev_err(dev, "failed to register spi_master\n"); + dev_err(dev, "failed to register spi host\n"); goto err_wq_destroy; } @@ -1012,8 +1012,8 @@ err_clk_put: clk_put(spi->fpi_clk); err_clk_disable: clk_disable_unprepare(spi->spi_clk); -err_master_put: - spi_master_put(master); +err_host_put: + spi_controller_put(host); return err; } From 0f9440a646fd1245a9206f171a4de25e6b092d42 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 10 Aug 2023 11:12:45 +0200 Subject: [PATCH 393/656] spi: sc18is602: fix Wvoid-pointer-to-enum-cast warning 'id' is an enum, thus cast of pointer on 64-bit compile test with W=1 causes: spi-sc18is602.c:269:12: error: cast to smaller integer type 'enum chips' from 'const void *' [-Werror,-Wvoid-pointer-to-enum-cast] Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230810091247.70149-1-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown --- drivers/spi/spi-sc18is602.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/spi-sc18is602.c b/drivers/spi/spi-sc18is602.c index c67a24daaaf9..9f98bf350697 100644 --- a/drivers/spi/spi-sc18is602.c +++ b/drivers/spi/spi-sc18is602.c @@ -266,7 +266,7 @@ static int sc18is602_probe(struct i2c_client *client) hw->ctrl = 0xff; if (client->dev.of_node) - hw->id = (enum chips)of_device_get_match_data(&client->dev); + hw->id = (uintptr_t)of_device_get_match_data(&client->dev); else hw->id = id->driver_data; From 94d6cf7e72a3ef90d7e16d770c3dc1b9cd40d8dd Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 10 Aug 2023 11:12:46 +0200 Subject: [PATCH 394/656] spi: pxa2xx: fix Wvoid-pointer-to-enum-cast warning 'type' is an enum, thus cast of pointer on 64-bit compile test with W=1 causes: spi-pxa2xx.c:1347:10: error: cast to smaller integer type 'enum pxa_ssp_type' from 'const void *' [-Werror,-Wvoid-pointer-to-enum-cast] Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230810091247.70149-2-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown --- drivers/spi/spi-pxa2xx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c index 1bab18a0f262..21f156587669 100644 --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c @@ -1344,7 +1344,7 @@ pxa2xx_spi_init_pdata(struct platform_device *pdev) match = device_get_match_data(dev); if (match) - type = (enum pxa_ssp_type)match; + type = (uintptr_t)match; else if (is_lpss_priv) { u32 value; From 675b8e35b5cbf4aaa1339079f44b88b9f1bb2f1b Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 10 Aug 2023 11:12:47 +0200 Subject: [PATCH 395/656] spi: amd: fix Wvoid-pointer-to-enum-cast warning 'version' is an enum, thus cast of pointer on 64-bit compile test with W=1 causes: spi-amd.c:401:21: error: cast to smaller integer type 'enum amd_spi_versions' from 'const void *' [-Werror,-Wvoid-pointer-to-enum-cast] Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230810091247.70149-3-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown --- drivers/spi/spi-amd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/spi-amd.c b/drivers/spi/spi-amd.c index e4345ad5cd36..5d9b246b6963 100644 --- a/drivers/spi/spi-amd.c +++ b/drivers/spi/spi-amd.c @@ -398,7 +398,7 @@ static int amd_spi_probe(struct platform_device *pdev) dev_dbg(dev, "io_remap_address: %p\n", amd_spi->io_remap_addr); - amd_spi->version = (enum amd_spi_versions) device_get_match_data(dev); + amd_spi->version = (uintptr_t) device_get_match_data(dev); /* Initialize the spi_controller fields */ host->bus_num = 0; From edff54ac96eb25f01d26cc68923a6dbbb5b2f440 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Mon, 14 Aug 2023 23:07:59 +0200 Subject: [PATCH 396/656] regulator: rtq2208: Switch back to use struct i2c_driver's .probe() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit struct i2c_driver::probe_new is about to go away. Switch the driver to use the probe callback with the same prototype. Signed-off-by: Uwe Kleine-König Link: https://lore.kernel.org/r/20230814210759.26395-1-u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown --- drivers/regulator/rtq2208-regulator.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/regulator/rtq2208-regulator.c b/drivers/regulator/rtq2208-regulator.c index 2463aea4192c..2d54844c4226 100644 --- a/drivers/regulator/rtq2208-regulator.c +++ b/drivers/regulator/rtq2208-regulator.c @@ -574,7 +574,7 @@ static struct i2c_driver rtq2208_driver = { .name = "rtq2208", .of_match_table = rtq2208_device_tables, }, - .probe_new = rtq2208_probe, + .probe = rtq2208_probe, }; module_i2c_driver(rtq2208_driver); From 805946a2ce31241299a725adef8debce56069495 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 14:59:50 +0800 Subject: [PATCH 397/656] mmc: sunxi: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Acked-by: Jernej Skrabec Link: https://lore.kernel.org/r/20230727070051.17778-1-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sunxi-mmc.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c index 69dcb8805e05..d3bd0ac99ec4 100644 --- a/drivers/mmc/host/sunxi-mmc.c +++ b/drivers/mmc/host/sunxi-mmc.c @@ -1486,7 +1486,7 @@ error_free_host: return ret; } -static int sunxi_mmc_remove(struct platform_device *pdev) +static void sunxi_mmc_remove(struct platform_device *pdev) { struct mmc_host *mmc = platform_get_drvdata(pdev); struct sunxi_mmc_host *host = mmc_priv(mmc); @@ -1499,8 +1499,6 @@ static int sunxi_mmc_remove(struct platform_device *pdev) } dma_free_coherent(&pdev->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma); mmc_free_host(mmc); - - return 0; } #ifdef CONFIG_PM @@ -1556,7 +1554,7 @@ static struct platform_driver sunxi_mmc_driver = { .pm = &sunxi_mmc_pm_ops, }, .probe = sunxi_mmc_probe, - .remove = sunxi_mmc_remove, + .remove_new = sunxi_mmc_remove, }; module_platform_driver(sunxi_mmc_driver); From cac6d238834d82ea50b977b918962e558de74420 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 14:59:51 +0800 Subject: [PATCH 398/656] mmc: bcm2835: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Reviewed-by: Florian Fainelli Link: https://lore.kernel.org/r/20230727070051.17778-2-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/bcm2835.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/bcm2835.c b/drivers/mmc/host/bcm2835.c index eea208856ce0..35d8fdea668b 100644 --- a/drivers/mmc/host/bcm2835.c +++ b/drivers/mmc/host/bcm2835.c @@ -1431,7 +1431,7 @@ err: return ret; } -static int bcm2835_remove(struct platform_device *pdev) +static void bcm2835_remove(struct platform_device *pdev) { struct bcm2835_host *host = platform_get_drvdata(pdev); struct mmc_host *mmc = mmc_from_priv(host); @@ -1449,8 +1449,6 @@ static int bcm2835_remove(struct platform_device *pdev) dma_release_channel(host->dma_chan_rxtx); mmc_free_host(mmc); - - return 0; } static const struct of_device_id bcm2835_match[] = { @@ -1461,7 +1459,7 @@ MODULE_DEVICE_TABLE(of, bcm2835_match); static struct platform_driver bcm2835_driver = { .probe = bcm2835_probe, - .remove = bcm2835_remove, + .remove_new = bcm2835_remove, .driver = { .name = "sdhost-bcm2835", .probe_type = PROBE_PREFER_ASYNCHRONOUS, From 67ad8238d016027ffaffbbe1edab3fbc7e641edc Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 14:59:52 +0800 Subject: [PATCH 399/656] mmc: jz4740: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Reviewed-by: Paul Cercueil Link: https://lore.kernel.org/r/20230727070051.17778-3-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/jz4740_mmc.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/jz4740_mmc.c b/drivers/mmc/host/jz4740_mmc.c index 1846a05210e3..f379ce5b582d 100644 --- a/drivers/mmc/host/jz4740_mmc.c +++ b/drivers/mmc/host/jz4740_mmc.c @@ -1163,7 +1163,7 @@ err_free_host: return ret; } -static int jz4740_mmc_remove(struct platform_device *pdev) +static void jz4740_mmc_remove(struct platform_device *pdev) { struct jz4740_mmc_host *host = platform_get_drvdata(pdev); @@ -1179,8 +1179,6 @@ static int jz4740_mmc_remove(struct platform_device *pdev) jz4740_mmc_release_dma_channels(host); mmc_free_host(host->mmc); - - return 0; } static int jz4740_mmc_suspend(struct device *dev) @@ -1198,7 +1196,7 @@ static DEFINE_SIMPLE_DEV_PM_OPS(jz4740_mmc_pm_ops, jz4740_mmc_suspend, static struct platform_driver jz4740_mmc_driver = { .probe = jz4740_mmc_probe, - .remove = jz4740_mmc_remove, + .remove_new = jz4740_mmc_remove, .driver = { .name = "jz4740-mmc", .probe_type = PROBE_PREFER_ASYNCHRONOUS, From ab02d58f242185f765f2264811600db6a7963eb4 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 14:59:53 +0800 Subject: [PATCH 400/656] mmc: litex_mmc: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Acked-by: Gabriel Somlo Link: https://lore.kernel.org/r/20230727070051.17778-4-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/litex_mmc.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/host/litex_mmc.c b/drivers/mmc/host/litex_mmc.c index 9af6b0902efe..4ec8072dc60b 100644 --- a/drivers/mmc/host/litex_mmc.c +++ b/drivers/mmc/host/litex_mmc.c @@ -629,12 +629,11 @@ static int litex_mmc_probe(struct platform_device *pdev) return 0; } -static int litex_mmc_remove(struct platform_device *pdev) +static void litex_mmc_remove(struct platform_device *pdev) { struct litex_mmc_host *host = platform_get_drvdata(pdev); mmc_remove_host(host->mmc); - return 0; } static const struct of_device_id litex_match[] = { @@ -645,7 +644,7 @@ MODULE_DEVICE_TABLE(of, litex_match); static struct platform_driver litex_mmc_driver = { .probe = litex_mmc_probe, - .remove = litex_mmc_remove, + .remove_new = litex_mmc_remove, .driver = { .name = "litex-mmc", .of_match_table = litex_match, From 19334c5369cd60907fae3983d88a08986994514b Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 14:59:54 +0800 Subject: [PATCH 401/656] mmc: mtk-sd: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Reviewed-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20230727070051.17778-5-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/mtk-sd.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c index 6c68c642ef61..5392200cfdf7 100644 --- a/drivers/mmc/host/mtk-sd.c +++ b/drivers/mmc/host/mtk-sd.c @@ -2885,7 +2885,7 @@ host_free: return ret; } -static int msdc_drv_remove(struct platform_device *pdev) +static void msdc_drv_remove(struct platform_device *pdev) { struct mmc_host *mmc; struct msdc_host *host; @@ -2909,8 +2909,6 @@ static int msdc_drv_remove(struct platform_device *pdev) host->dma.bd, host->dma.bd_addr); mmc_free_host(mmc); - - return 0; } static void msdc_save_reg(struct msdc_host *host) @@ -3052,7 +3050,7 @@ static const struct dev_pm_ops msdc_dev_pm_ops = { static struct platform_driver mt_msdc_driver = { .probe = msdc_drv_probe, - .remove = msdc_drv_remove, + .remove_new = msdc_drv_remove, .driver = { .name = "mtk-msdc", .probe_type = PROBE_PREFER_ASYNCHRONOUS, From 49f96e466d419516d75e93d58c79b90a9cf4f57b Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 14:59:55 +0800 Subject: [PATCH 402/656] mmc: cb710: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Acked-by: Michał Mirosław Link: https://lore.kernel.org/r/20230727070051.17778-6-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/cb710-mmc.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/host/cb710-mmc.c b/drivers/mmc/host/cb710-mmc.c index 6d623b2681c3..0aec33b88bef 100644 --- a/drivers/mmc/host/cb710-mmc.c +++ b/drivers/mmc/host/cb710-mmc.c @@ -745,7 +745,7 @@ err_free_mmc: return err; } -static int cb710_mmc_exit(struct platform_device *pdev) +static void cb710_mmc_exit(struct platform_device *pdev) { struct cb710_slot *slot = cb710_pdev_to_slot(pdev); struct mmc_host *mmc = cb710_slot_to_mmc(slot); @@ -766,13 +766,12 @@ static int cb710_mmc_exit(struct platform_device *pdev) tasklet_kill(&reader->finish_req_tasklet); mmc_free_host(mmc); - return 0; } static struct platform_driver cb710_mmc_driver = { .driver.name = "cb710-mmc", .probe = cb710_mmc_init, - .remove = cb710_mmc_exit, + .remove_new = cb710_mmc_exit, #ifdef CONFIG_PM .suspend = cb710_mmc_suspend, .resume = cb710_mmc_resume, From bc1711e8332da03648d8fe1950189237e66313af Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 14:59:56 +0800 Subject: [PATCH 403/656] mmc: davinci_mmc: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Link: https://lore.kernel.org/r/20230727070051.17778-7-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/davinci_mmc.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/davinci_mmc.c b/drivers/mmc/host/davinci_mmc.c index 9e99de1206ef..ee3b1a4e0848 100644 --- a/drivers/mmc/host/davinci_mmc.c +++ b/drivers/mmc/host/davinci_mmc.c @@ -1344,7 +1344,7 @@ ioremap_fail: return ret; } -static int __exit davinci_mmcsd_remove(struct platform_device *pdev) +static void __exit davinci_mmcsd_remove(struct platform_device *pdev) { struct mmc_davinci_host *host = platform_get_drvdata(pdev); @@ -1353,8 +1353,6 @@ static int __exit davinci_mmcsd_remove(struct platform_device *pdev) davinci_release_dma_channels(host); clk_disable_unprepare(host->clk); mmc_free_host(host->mmc); - - return 0; } #ifdef CONFIG_PM @@ -1401,7 +1399,7 @@ static struct platform_driver davinci_mmcsd_driver = { .of_match_table = davinci_mmc_dt_ids, }, .probe = davinci_mmcsd_probe, - .remove = __exit_p(davinci_mmcsd_remove), + .remove_new = __exit_p(davinci_mmcsd_remove), .id_table = davinci_mmc_devtype, }; From c4a7b258ddadbd1c44b4bf064835d5a52edb5429 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 14:59:57 +0800 Subject: [PATCH 404/656] mmc: dw_mmc: hi3798cv200: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Link: https://lore.kernel.org/r/20230727070051.17778-8-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/dw_mmc-hi3798cv200.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/dw_mmc-hi3798cv200.c b/drivers/mmc/host/dw_mmc-hi3798cv200.c index 6f22fe054087..e9470c50a348 100644 --- a/drivers/mmc/host/dw_mmc-hi3798cv200.c +++ b/drivers/mmc/host/dw_mmc-hi3798cv200.c @@ -171,7 +171,7 @@ static int dw_mci_hi3798cv200_probe(struct platform_device *pdev) return dw_mci_pltfm_register(pdev, &hi3798cv200_data); } -static int dw_mci_hi3798cv200_remove(struct platform_device *pdev) +static void dw_mci_hi3798cv200_remove(struct platform_device *pdev) { struct dw_mci *host = platform_get_drvdata(pdev); struct hi3798cv200_priv *priv = host->priv; @@ -180,8 +180,6 @@ static int dw_mci_hi3798cv200_remove(struct platform_device *pdev) clk_disable_unprepare(priv->sample_clk); dw_mci_pltfm_remove(pdev); - - return 0; } static const struct of_device_id dw_mci_hi3798cv200_match[] = { @@ -192,7 +190,7 @@ static const struct of_device_id dw_mci_hi3798cv200_match[] = { MODULE_DEVICE_TABLE(of, dw_mci_hi3798cv200_match); static struct platform_driver dw_mci_hi3798cv200_driver = { .probe = dw_mci_hi3798cv200_probe, - .remove = dw_mci_hi3798cv200_remove, + .remove_new = dw_mci_hi3798cv200_remove, .driver = { .name = "dwmmc_hi3798cv200", .probe_type = PROBE_PREFER_ASYNCHRONOUS, From 603b72754f49694f7297fc40c8a43c23efb14e3c Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 14:59:58 +0800 Subject: [PATCH 405/656] mmc: sdhci-pic32: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Acked-by: Adrian Hunter Link: https://lore.kernel.org/r/20230727070051.17778-9-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-pic32.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/sdhci-pic32.c b/drivers/mmc/host/sdhci-pic32.c index 6696b6bdd88e..7a0351a9c74e 100644 --- a/drivers/mmc/host/sdhci-pic32.c +++ b/drivers/mmc/host/sdhci-pic32.c @@ -210,7 +210,7 @@ err: return ret; } -static int pic32_sdhci_remove(struct platform_device *pdev) +static void pic32_sdhci_remove(struct platform_device *pdev) { struct sdhci_host *host = platform_get_drvdata(pdev); struct pic32_sdhci_priv *sdhci_pdata = sdhci_priv(host); @@ -221,8 +221,6 @@ static int pic32_sdhci_remove(struct platform_device *pdev) clk_disable_unprepare(sdhci_pdata->base_clk); clk_disable_unprepare(sdhci_pdata->sys_clk); sdhci_pltfm_free(pdev); - - return 0; } static const struct of_device_id pic32_sdhci_id_table[] = { @@ -238,7 +236,7 @@ static struct platform_driver pic32_sdhci_driver = { .of_match_table = of_match_ptr(pic32_sdhci_id_table), }, .probe = pic32_sdhci_probe, - .remove = pic32_sdhci_remove, + .remove_new = pic32_sdhci_remove, }; module_platform_driver(pic32_sdhci_driver); From 9479a6313108aa3c9ec0433056debf65733c346b Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 14:59:59 +0800 Subject: [PATCH 406/656] mmc: sdhci: milbeaut: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Acked-by: Adrian Hunter Link: https://lore.kernel.org/r/20230727070051.17778-10-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-milbeaut.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/sdhci-milbeaut.c b/drivers/mmc/host/sdhci-milbeaut.c index 701b11a14c6f..83706edc9796 100644 --- a/drivers/mmc/host/sdhci-milbeaut.c +++ b/drivers/mmc/host/sdhci-milbeaut.c @@ -313,7 +313,7 @@ err: return ret; } -static int sdhci_milbeaut_remove(struct platform_device *pdev) +static void sdhci_milbeaut_remove(struct platform_device *pdev) { struct sdhci_host *host = platform_get_drvdata(pdev); struct f_sdhost_priv *priv = sdhci_priv(host); @@ -326,8 +326,6 @@ static int sdhci_milbeaut_remove(struct platform_device *pdev) sdhci_free_host(host); platform_set_drvdata(pdev, NULL); - - return 0; } static struct platform_driver sdhci_milbeaut_driver = { @@ -337,7 +335,7 @@ static struct platform_driver sdhci_milbeaut_driver = { .of_match_table = mlb_dt_ids, }, .probe = sdhci_milbeaut_probe, - .remove = sdhci_milbeaut_remove, + .remove_new = sdhci_milbeaut_remove, }; module_platform_driver(sdhci_milbeaut_driver); From b76028c767511d74911c0f53f3b48fa0378f3213 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:00 +0800 Subject: [PATCH 407/656] mmc: omap_hsmmc: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Link: https://lore.kernel.org/r/20230727070051.17778-11-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/omap_hsmmc.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c index 93de00a06aba..e120aeb869b8 100644 --- a/drivers/mmc/host/omap_hsmmc.c +++ b/drivers/mmc/host/omap_hsmmc.c @@ -1979,7 +1979,7 @@ err: return ret; } -static int omap_hsmmc_remove(struct platform_device *pdev) +static void omap_hsmmc_remove(struct platform_device *pdev) { struct omap_hsmmc_host *host = platform_get_drvdata(pdev); @@ -1997,8 +1997,6 @@ static int omap_hsmmc_remove(struct platform_device *pdev) clk_disable_unprepare(host->dbclk); mmc_free_host(host->mmc); - - return 0; } #ifdef CONFIG_PM_SLEEP @@ -2123,7 +2121,7 @@ static const struct dev_pm_ops omap_hsmmc_dev_pm_ops = { static struct platform_driver omap_hsmmc_driver = { .probe = omap_hsmmc_probe, - .remove = omap_hsmmc_remove, + .remove_new = omap_hsmmc_remove, .driver = { .name = DRIVER_NAME, .probe_type = PROBE_PREFER_ASYNCHRONOUS, From 738eeb967e53ab929669f07aa82e6c43caf36b59 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:01 +0800 Subject: [PATCH 408/656] mmc: sdhci-of-at91: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Acked-by: Adrian Hunter Reviewed-by: Claudiu Beznea Link: https://lore.kernel.org/r/20230727070051.17778-12-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-of-at91.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/sdhci-of-at91.c b/drivers/mmc/host/sdhci-of-at91.c index 808307a211f2..db01ea9fa203 100644 --- a/drivers/mmc/host/sdhci-of-at91.c +++ b/drivers/mmc/host/sdhci-of-at91.c @@ -443,7 +443,7 @@ sdhci_pltfm_free: return ret; } -static int sdhci_at91_remove(struct platform_device *pdev) +static void sdhci_at91_remove(struct platform_device *pdev) { struct sdhci_host *host = platform_get_drvdata(pdev); struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); @@ -461,8 +461,6 @@ static int sdhci_at91_remove(struct platform_device *pdev) clk_disable_unprepare(gck); clk_disable_unprepare(hclock); clk_disable_unprepare(mainck); - - return 0; } static struct platform_driver sdhci_at91_driver = { @@ -473,7 +471,7 @@ static struct platform_driver sdhci_at91_driver = { .pm = &sdhci_at91_dev_pm_ops, }, .probe = sdhci_at91_probe, - .remove = sdhci_at91_remove, + .remove_new = sdhci_at91_remove, }; module_platform_driver(sdhci_at91_driver); From e5ae9c1e5bcfe1745fc0207731c445514b96de79 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:02 +0800 Subject: [PATCH 409/656] mmc: omap: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Link: https://lore.kernel.org/r/20230727070051.17778-13-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/omap.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/omap.c b/drivers/mmc/host/omap.c index 6a259563690d..9fb8995b43a1 100644 --- a/drivers/mmc/host/omap.c +++ b/drivers/mmc/host/omap.c @@ -1506,7 +1506,7 @@ err_free_iclk: return ret; } -static int mmc_omap_remove(struct platform_device *pdev) +static void mmc_omap_remove(struct platform_device *pdev) { struct mmc_omap_host *host = platform_get_drvdata(pdev); int i; @@ -1532,8 +1532,6 @@ static int mmc_omap_remove(struct platform_device *pdev) dma_release_channel(host->dma_rx); destroy_workqueue(host->mmc_omap_wq); - - return 0; } #if IS_BUILTIN(CONFIG_OF) @@ -1546,7 +1544,7 @@ MODULE_DEVICE_TABLE(of, mmc_omap_match); static struct platform_driver mmc_omap_driver = { .probe = mmc_omap_probe, - .remove = mmc_omap_remove, + .remove_new = mmc_omap_remove, .driver = { .name = DRIVER_NAME, .probe_type = PROBE_PREFER_ASYNCHRONOUS, From 41a734a7c64827dc3fff65b55f31052724dbd19c Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:03 +0800 Subject: [PATCH 410/656] mmc: dw_mmc: exynos: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Link: https://lore.kernel.org/r/20230727070051.17778-14-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/dw_mmc-exynos.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/dw_mmc-exynos.c b/drivers/mmc/host/dw_mmc-exynos.c index 9f20ac524c8b..698408e8bad0 100644 --- a/drivers/mmc/host/dw_mmc-exynos.c +++ b/drivers/mmc/host/dw_mmc-exynos.c @@ -664,15 +664,13 @@ static int dw_mci_exynos_probe(struct platform_device *pdev) return 0; } -static int dw_mci_exynos_remove(struct platform_device *pdev) +static void dw_mci_exynos_remove(struct platform_device *pdev) { pm_runtime_disable(&pdev->dev); pm_runtime_set_suspended(&pdev->dev); pm_runtime_put_noidle(&pdev->dev); dw_mci_pltfm_remove(pdev); - - return 0; } static const struct dev_pm_ops dw_mci_exynos_pmops = { @@ -685,7 +683,7 @@ static const struct dev_pm_ops dw_mci_exynos_pmops = { static struct platform_driver dw_mci_exynos_pltfm_driver = { .probe = dw_mci_exynos_probe, - .remove = dw_mci_exynos_remove, + .remove_new = dw_mci_exynos_remove, .driver = { .name = "dwmmc_exynos", .probe_type = PROBE_PREFER_ASYNCHRONOUS, From c61394aa928180f0296c64907c8fff5a6bdd01aa Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:04 +0800 Subject: [PATCH 411/656] mmc: sdhci-pxav3: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Acked-by: Adrian Hunter Link: https://lore.kernel.org/r/20230727070051.17778-15-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-pxav3.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/sdhci-pxav3.c b/drivers/mmc/host/sdhci-pxav3.c index e39dcc998772..3af43ac05825 100644 --- a/drivers/mmc/host/sdhci-pxav3.c +++ b/drivers/mmc/host/sdhci-pxav3.c @@ -470,7 +470,7 @@ err_clk_get: return ret; } -static int sdhci_pxav3_remove(struct platform_device *pdev) +static void sdhci_pxav3_remove(struct platform_device *pdev) { struct sdhci_host *host = platform_get_drvdata(pdev); struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); @@ -486,8 +486,6 @@ static int sdhci_pxav3_remove(struct platform_device *pdev) clk_disable_unprepare(pxa->clk_core); sdhci_pltfm_free(pdev); - - return 0; } #ifdef CONFIG_PM_SLEEP @@ -570,7 +568,7 @@ static struct platform_driver sdhci_pxav3_driver = { .pm = &sdhci_pxav3_pmops, }, .probe = sdhci_pxav3_probe, - .remove = sdhci_pxav3_remove, + .remove_new = sdhci_pxav3_remove, }; module_platform_driver(sdhci_pxav3_driver); From aeaa4cb3097212462031ca5e1f073c759d5fad52 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:05 +0800 Subject: [PATCH 412/656] mmc: rtsx_pci: Drop if block with always false condition MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit rtsx_pci_sdmmc_drv_remove() is only called for a device after rtsx_pci_sdmmc_drv_probe() returned 0. In that case platform_set_drvdata() was called with a non-NULL value and so platform_get_drvdata() won't return NULL. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Reviewed-by: Uwe Kleine-König Link: https://lore.kernel.org/r/20230727070051.17778-16-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/rtsx_pci_sdmmc.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/mmc/host/rtsx_pci_sdmmc.c b/drivers/mmc/host/rtsx_pci_sdmmc.c index 8098726dcc0b..062d07c2ae5e 100644 --- a/drivers/mmc/host/rtsx_pci_sdmmc.c +++ b/drivers/mmc/host/rtsx_pci_sdmmc.c @@ -1529,9 +1529,6 @@ static int rtsx_pci_sdmmc_drv_remove(struct platform_device *pdev) struct rtsx_pcr *pcr; struct mmc_host *mmc; - if (!host) - return 0; - pcr = host->pcr; pcr->slots[RTSX_SD_CARD].p_dev = NULL; pcr->slots[RTSX_SD_CARD].card_event = NULL; From dda6da1b851847f71996954b6d26a37593962b94 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:06 +0800 Subject: [PATCH 413/656] mmc: rtsx_pci: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Link: https://lore.kernel.org/r/20230727070051.17778-17-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/rtsx_pci_sdmmc.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/rtsx_pci_sdmmc.c b/drivers/mmc/host/rtsx_pci_sdmmc.c index 062d07c2ae5e..87d78432a1e0 100644 --- a/drivers/mmc/host/rtsx_pci_sdmmc.c +++ b/drivers/mmc/host/rtsx_pci_sdmmc.c @@ -1523,7 +1523,7 @@ static int rtsx_pci_sdmmc_drv_probe(struct platform_device *pdev) return 0; } -static int rtsx_pci_sdmmc_drv_remove(struct platform_device *pdev) +static void rtsx_pci_sdmmc_drv_remove(struct platform_device *pdev) { struct realtek_pci_sdmmc *host = platform_get_drvdata(pdev); struct rtsx_pcr *pcr; @@ -1563,8 +1563,6 @@ static int rtsx_pci_sdmmc_drv_remove(struct platform_device *pdev) dev_dbg(&(pdev->dev), ": Realtek PCI-E SDMMC controller has been removed\n"); - - return 0; } static const struct platform_device_id rtsx_pci_sdmmc_ids[] = { @@ -1578,7 +1576,7 @@ MODULE_DEVICE_TABLE(platform, rtsx_pci_sdmmc_ids); static struct platform_driver rtsx_pci_sdmmc_driver = { .probe = rtsx_pci_sdmmc_drv_probe, - .remove = rtsx_pci_sdmmc_drv_remove, + .remove_new = rtsx_pci_sdmmc_drv_remove, .id_table = rtsx_pci_sdmmc_ids, .driver = { .name = DRV_NAME_RTSX_PCI_SDMMC, From 8fc8c82dfa92485c5f8c6a6b12c65191c62c02da Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:07 +0800 Subject: [PATCH 414/656] mmc: sh_mmcif: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Link: https://lore.kernel.org/r/20230727070051.17778-18-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sh_mmcif.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/sh_mmcif.c b/drivers/mmc/host/sh_mmcif.c index 838dab179724..077d711e964e 100644 --- a/drivers/mmc/host/sh_mmcif.c +++ b/drivers/mmc/host/sh_mmcif.c @@ -1508,7 +1508,7 @@ err_host: return ret; } -static int sh_mmcif_remove(struct platform_device *pdev) +static void sh_mmcif_remove(struct platform_device *pdev) { struct sh_mmcif_host *host = platform_get_drvdata(pdev); @@ -1532,8 +1532,6 @@ static int sh_mmcif_remove(struct platform_device *pdev) mmc_free_host(host->mmc); pm_runtime_put_sync(&pdev->dev); pm_runtime_disable(&pdev->dev); - - return 0; } #ifdef CONFIG_PM_SLEEP @@ -1560,7 +1558,7 @@ static const struct dev_pm_ops sh_mmcif_dev_pm_ops = { static struct platform_driver sh_mmcif_driver = { .probe = sh_mmcif_probe, - .remove = sh_mmcif_remove, + .remove_new = sh_mmcif_remove, .driver = { .name = DRIVER_NAME, .probe_type = PROBE_PREFER_ASYNCHRONOUS, From e50aed55be4befe9c4dcae6f39b5e6de5fb4587f Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:08 +0800 Subject: [PATCH 415/656] mmc: meson-gx: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Acked-by: Martin Blumenstingl Link: https://lore.kernel.org/r/20230727070051.17778-19-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/meson-gx-mmc.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/meson-gx-mmc.c b/drivers/mmc/host/meson-gx-mmc.c index 49e3d1418902..9837dab096e6 100644 --- a/drivers/mmc/host/meson-gx-mmc.c +++ b/drivers/mmc/host/meson-gx-mmc.c @@ -1294,7 +1294,7 @@ err_init_clk: return ret; } -static int meson_mmc_remove(struct platform_device *pdev) +static void meson_mmc_remove(struct platform_device *pdev) { struct meson_host *host = dev_get_drvdata(&pdev->dev); @@ -1305,8 +1305,6 @@ static int meson_mmc_remove(struct platform_device *pdev) free_irq(host->irq, host); clk_disable_unprepare(host->mmc_clk); - - return 0; } static const struct meson_mmc_data meson_gx_data = { @@ -1337,7 +1335,7 @@ MODULE_DEVICE_TABLE(of, meson_mmc_of_match); static struct platform_driver meson_mmc_driver = { .probe = meson_mmc_probe, - .remove = meson_mmc_remove, + .remove_new = meson_mmc_remove, .driver = { .name = DRIVER_NAME, .probe_type = PROBE_PREFER_ASYNCHRONOUS, From f0cdeb7cc2e9513a109458f99cbad0a2e9af5a72 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:09 +0800 Subject: [PATCH 416/656] mmc: xenon: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Acked-by: Adrian Hunter Link: https://lore.kernel.org/r/20230727070051.17778-20-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-xenon.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/sdhci-xenon.c b/drivers/mmc/host/sdhci-xenon.c index 08e838400b52..25ba7aecc3be 100644 --- a/drivers/mmc/host/sdhci-xenon.c +++ b/drivers/mmc/host/sdhci-xenon.c @@ -578,7 +578,7 @@ free_pltfm: return err; } -static int xenon_remove(struct platform_device *pdev) +static void xenon_remove(struct platform_device *pdev) { struct sdhci_host *host = platform_get_drvdata(pdev); struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); @@ -595,8 +595,6 @@ static int xenon_remove(struct platform_device *pdev) clk_disable_unprepare(pltfm_host->clk); sdhci_pltfm_free(pdev); - - return 0; } #ifdef CONFIG_PM_SLEEP @@ -705,7 +703,7 @@ static struct platform_driver sdhci_xenon_driver = { .pm = &sdhci_xenon_dev_pm_ops, }, .probe = xenon_probe, - .remove = xenon_remove, + .remove_new = xenon_remove, }; module_platform_driver(sdhci_xenon_driver); From 444176665f37856ab0df4996b089abb7ab1664b2 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:10 +0800 Subject: [PATCH 417/656] mmc: sdhci-s3c: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Acked-by: Adrian Hunter Reviewed-by: Andi Shyti Link: https://lore.kernel.org/r/20230727070051.17778-21-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-s3c.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c index 6245fb4584fe..0e8a8ac14e56 100644 --- a/drivers/mmc/host/sdhci-s3c.c +++ b/drivers/mmc/host/sdhci-s3c.c @@ -667,7 +667,7 @@ static int sdhci_s3c_probe(struct platform_device *pdev) return ret; } -static int sdhci_s3c_remove(struct platform_device *pdev) +static void sdhci_s3c_remove(struct platform_device *pdev) { struct sdhci_host *host = platform_get_drvdata(pdev); struct sdhci_s3c *sc = sdhci_priv(host); @@ -687,8 +687,6 @@ static int sdhci_s3c_remove(struct platform_device *pdev) clk_disable_unprepare(sc->clk_io); sdhci_free_host(host); - - return 0; } #ifdef CONFIG_PM_SLEEP @@ -775,7 +773,7 @@ MODULE_DEVICE_TABLE(of, sdhci_s3c_dt_match); static struct platform_driver sdhci_s3c_driver = { .probe = sdhci_s3c_probe, - .remove = sdhci_s3c_remove, + .remove_new = sdhci_s3c_remove, .id_table = sdhci_s3c_driver_ids, .driver = { .name = "s3c-sdhci", From 3372487a4c298843f257c9c30f7281092d1757bc Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:11 +0800 Subject: [PATCH 418/656] mmc: meson-mx-sdhc: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Reviewed-by: Martin Blumenstingl Link: https://lore.kernel.org/r/20230727070051.17778-22-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/meson-mx-sdhc-mmc.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/meson-mx-sdhc-mmc.c b/drivers/mmc/host/meson-mx-sdhc-mmc.c index 97168cdfa8e9..528ec8166e7c 100644 --- a/drivers/mmc/host/meson-mx-sdhc-mmc.c +++ b/drivers/mmc/host/meson-mx-sdhc-mmc.c @@ -880,7 +880,7 @@ err_disable_pclk: return ret; } -static int meson_mx_sdhc_remove(struct platform_device *pdev) +static void meson_mx_sdhc_remove(struct platform_device *pdev) { struct meson_mx_sdhc_host *host = platform_get_drvdata(pdev); @@ -889,8 +889,6 @@ static int meson_mx_sdhc_remove(struct platform_device *pdev) meson_mx_sdhc_disable_clks(host->mmc); clk_disable_unprepare(host->pclk); - - return 0; } static const struct meson_mx_sdhc_data meson_mx_sdhc_data_meson8 = { @@ -925,7 +923,7 @@ MODULE_DEVICE_TABLE(of, meson_mx_sdhc_of_match); static struct platform_driver meson_mx_sdhc_driver = { .probe = meson_mx_sdhc_probe, - .remove = meson_mx_sdhc_remove, + .remove_new = meson_mx_sdhc_remove, .driver = { .name = "meson-mx-sdhc", .probe_type = PROBE_PREFER_ASYNCHRONOUS, From f8c9b4158e7c37d12f30f33dd97ad3ab067ac28c Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:12 +0800 Subject: [PATCH 419/656] mmc: rtsx_usb_sdmmc: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Link: https://lore.kernel.org/r/20230727070051.17778-23-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/rtsx_usb_sdmmc.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/mmc/host/rtsx_usb_sdmmc.c b/drivers/mmc/host/rtsx_usb_sdmmc.c index 2c650cd58693..ded9b6849e35 100644 --- a/drivers/mmc/host/rtsx_usb_sdmmc.c +++ b/drivers/mmc/host/rtsx_usb_sdmmc.c @@ -1379,13 +1379,13 @@ static int rtsx_usb_sdmmc_drv_probe(struct platform_device *pdev) return 0; } -static int rtsx_usb_sdmmc_drv_remove(struct platform_device *pdev) +static void rtsx_usb_sdmmc_drv_remove(struct platform_device *pdev) { struct rtsx_usb_sdmmc *host = platform_get_drvdata(pdev); struct mmc_host *mmc; if (!host) - return 0; + return; mmc = host->mmc; host->host_removal = true; @@ -1415,8 +1415,6 @@ static int rtsx_usb_sdmmc_drv_remove(struct platform_device *pdev) dev_dbg(&(pdev->dev), ": Realtek USB SD/MMC module has been removed\n"); - - return 0; } #ifdef CONFIG_PM @@ -1455,7 +1453,7 @@ MODULE_DEVICE_TABLE(platform, rtsx_usb_sdmmc_ids); static struct platform_driver rtsx_usb_sdmmc_driver = { .probe = rtsx_usb_sdmmc_drv_probe, - .remove = rtsx_usb_sdmmc_drv_remove, + .remove_new = rtsx_usb_sdmmc_drv_remove, .id_table = rtsx_usb_sdmmc_ids, .driver = { .name = "rtsx_usb_sdmmc", From 3f347f2c92fc386e0849aa20b045353e25b6996a Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:13 +0800 Subject: [PATCH 420/656] mmc: mxs-mmc: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Link: https://lore.kernel.org/r/20230727070051.17778-24-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/mxs-mmc.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/mxs-mmc.c b/drivers/mmc/host/mxs-mmc.c index 951c6c48b4f7..6751da9b60f9 100644 --- a/drivers/mmc/host/mxs-mmc.c +++ b/drivers/mmc/host/mxs-mmc.c @@ -673,7 +673,7 @@ out_mmc_free: return ret; } -static int mxs_mmc_remove(struct platform_device *pdev) +static void mxs_mmc_remove(struct platform_device *pdev) { struct mmc_host *mmc = platform_get_drvdata(pdev); struct mxs_mmc_host *host = mmc_priv(mmc); @@ -687,8 +687,6 @@ static int mxs_mmc_remove(struct platform_device *pdev) clk_disable_unprepare(ssp->clk); mmc_free_host(mmc); - - return 0; } #ifdef CONFIG_PM_SLEEP @@ -716,7 +714,7 @@ static SIMPLE_DEV_PM_OPS(mxs_mmc_pm_ops, mxs_mmc_suspend, mxs_mmc_resume); static struct platform_driver mxs_mmc_driver = { .probe = mxs_mmc_probe, - .remove = mxs_mmc_remove, + .remove_new = mxs_mmc_remove, .driver = { .name = DRIVER_NAME, .probe_type = PROBE_PREFER_ASYNCHRONOUS, From 3de205a07a70cb0a025adbb9797c1102e6f3f376 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:14 +0800 Subject: [PATCH 421/656] mmc: sdhci-of-arasan: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Acked-by: Adrian Hunter Acked-by: Michal Simek Link: https://lore.kernel.org/r/20230727070051.17778-25-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-of-arasan.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c index 2f9de2518942..15025af326a2 100644 --- a/drivers/mmc/host/sdhci-of-arasan.c +++ b/drivers/mmc/host/sdhci-of-arasan.c @@ -2016,7 +2016,7 @@ err_pltfm_free: return ret; } -static int sdhci_arasan_remove(struct platform_device *pdev) +static void sdhci_arasan_remove(struct platform_device *pdev) { struct sdhci_host *host = platform_get_drvdata(pdev); struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); @@ -2034,8 +2034,6 @@ static int sdhci_arasan_remove(struct platform_device *pdev) sdhci_pltfm_unregister(pdev); clk_disable_unprepare(clk_ahb); - - return 0; } static struct platform_driver sdhci_arasan_driver = { @@ -2046,7 +2044,7 @@ static struct platform_driver sdhci_arasan_driver = { .pm = &sdhci_arasan_dev_pm_ops, }, .probe = sdhci_arasan_probe, - .remove = sdhci_arasan_remove, + .remove_new = sdhci_arasan_remove, }; module_platform_driver(sdhci_arasan_driver); From 5905a1f1f21cc6c9f4ac976920723da667fb18cc Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:15 +0800 Subject: [PATCH 422/656] mmc: sdhci-of-dwcmshc: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Acked-by: Adrian Hunter Link: https://lore.kernel.org/r/20230727070051.17778-26-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-of-dwcmshc.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c index 55e1e2d0494d..31c1892f4ecd 100644 --- a/drivers/mmc/host/sdhci-of-dwcmshc.c +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c @@ -574,7 +574,7 @@ free_pltfm: return err; } -static int dwcmshc_remove(struct platform_device *pdev) +static void dwcmshc_remove(struct platform_device *pdev) { struct sdhci_host *host = platform_get_drvdata(pdev); struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); @@ -589,8 +589,6 @@ static int dwcmshc_remove(struct platform_device *pdev) clk_bulk_disable_unprepare(RK35xx_MAX_CLKS, rk_priv->rockchip_clks); sdhci_pltfm_free(pdev); - - return 0; } #ifdef CONFIG_PM_SLEEP @@ -657,7 +655,7 @@ static struct platform_driver sdhci_dwcmshc_driver = { .pm = &dwcmshc_pmops, }, .probe = dwcmshc_probe, - .remove = dwcmshc_remove, + .remove_new = dwcmshc_remove, }; module_platform_driver(sdhci_dwcmshc_driver); From c7d255148d2ac4f24adb91418ce824b785e13811 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:16 +0800 Subject: [PATCH 423/656] mmc: au1xmmc: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Link: https://lore.kernel.org/r/20230727070051.17778-27-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/au1xmmc.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/host/au1xmmc.c b/drivers/mmc/host/au1xmmc.c index 82dd0ae40305..b5a5c6a2fe8b 100644 --- a/drivers/mmc/host/au1xmmc.c +++ b/drivers/mmc/host/au1xmmc.c @@ -1114,7 +1114,7 @@ out0: return ret; } -static int au1xmmc_remove(struct platform_device *pdev) +static void au1xmmc_remove(struct platform_device *pdev) { struct au1xmmc_host *host = platform_get_drvdata(pdev); @@ -1153,7 +1153,6 @@ static int au1xmmc_remove(struct platform_device *pdev) mmc_free_host(host->mmc); } - return 0; } #ifdef CONFIG_PM @@ -1185,7 +1184,7 @@ static int au1xmmc_resume(struct platform_device *pdev) static struct platform_driver au1xmmc_driver = { .probe = au1xmmc_probe, - .remove = au1xmmc_remove, + .remove_new = au1xmmc_remove, .suspend = au1xmmc_suspend, .resume = au1xmmc_resume, .driver = { From fcbeadbec96df15339ee29e9fdc5a826e0621b15 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:17 +0800 Subject: [PATCH 424/656] mmc: cavium-octeon: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Link: https://lore.kernel.org/r/20230727070051.17778-28-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/cavium-octeon.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/host/cavium-octeon.c b/drivers/mmc/host/cavium-octeon.c index 02429f7afb42..060ec4f4800f 100644 --- a/drivers/mmc/host/cavium-octeon.c +++ b/drivers/mmc/host/cavium-octeon.c @@ -296,7 +296,7 @@ error: return ret; } -static int octeon_mmc_remove(struct platform_device *pdev) +static void octeon_mmc_remove(struct platform_device *pdev) { struct cvm_mmc_host *host = platform_get_drvdata(pdev); u64 dma_cfg; @@ -311,7 +311,6 @@ static int octeon_mmc_remove(struct platform_device *pdev) writeq(dma_cfg, host->dma_base + MIO_EMM_DMA_CFG(host)); octeon_mmc_set_shared_power(host, 0); - return 0; } static const struct of_device_id octeon_mmc_match[] = { @@ -327,7 +326,7 @@ MODULE_DEVICE_TABLE(of, octeon_mmc_match); static struct platform_driver octeon_mmc_driver = { .probe = octeon_mmc_probe, - .remove = octeon_mmc_remove, + .remove_new = octeon_mmc_remove, .driver = { .name = KBUILD_MODNAME, .probe_type = PROBE_PREFER_ASYNCHRONOUS, From fac44eb82692a236819947e02ed37c84815e15c5 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:18 +0800 Subject: [PATCH 425/656] mmc: pxamci: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Link: https://lore.kernel.org/r/20230727070051.17778-29-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/pxamci.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/pxamci.c b/drivers/mmc/host/pxamci.c index bd53b17efe12..fae3192c3a14 100644 --- a/drivers/mmc/host/pxamci.c +++ b/drivers/mmc/host/pxamci.c @@ -782,7 +782,7 @@ out: return ret; } -static int pxamci_remove(struct platform_device *pdev) +static void pxamci_remove(struct platform_device *pdev) { struct mmc_host *mmc = platform_get_drvdata(pdev); @@ -806,13 +806,11 @@ static int pxamci_remove(struct platform_device *pdev) mmc_free_host(mmc); } - - return 0; } static struct platform_driver pxamci_driver = { .probe = pxamci_probe, - .remove = pxamci_remove, + .remove_new = pxamci_remove, .driver = { .name = DRIVER_NAME, .probe_type = PROBE_PREFER_ASYNCHRONOUS, From 19d38f77216568947bf9c5d51514b39e53c230b5 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:19 +0800 Subject: [PATCH 426/656] mmc: moxart: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Link: https://lore.kernel.org/r/20230727070051.17778-30-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/moxart-mmc.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/moxart-mmc.c b/drivers/mmc/host/moxart-mmc.c index 43c2a95bc29a..5cfdd3a86e54 100644 --- a/drivers/mmc/host/moxart-mmc.c +++ b/drivers/mmc/host/moxart-mmc.c @@ -687,7 +687,7 @@ out_mmc: return ret; } -static int moxart_remove(struct platform_device *pdev) +static void moxart_remove(struct platform_device *pdev) { struct mmc_host *mmc = dev_get_drvdata(&pdev->dev); struct moxart_host *host = mmc_priv(mmc); @@ -703,8 +703,6 @@ static int moxart_remove(struct platform_device *pdev) writel(readl(host->base + REG_CLOCK_CONTROL) | CLK_OFF, host->base + REG_CLOCK_CONTROL); mmc_free_host(mmc); - - return 0; } static const struct of_device_id moxart_mmc_match[] = { @@ -716,7 +714,7 @@ MODULE_DEVICE_TABLE(of, moxart_mmc_match); static struct platform_driver moxart_mmc_driver = { .probe = moxart_probe, - .remove = moxart_remove, + .remove_new = moxart_remove, .driver = { .name = "mmc-moxart", .probe_type = PROBE_PREFER_ASYNCHRONOUS, From b9c3ea46595094eed23f9768b634e4e6f017e0d9 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:20 +0800 Subject: [PATCH 427/656] mmc: sdhci-omap: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Acked-by: Adrian Hunter Link: https://lore.kernel.org/r/20230727070051.17778-31-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-omap.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/sdhci-omap.c b/drivers/mmc/host/sdhci-omap.c index 2593e3fbd0d9..1e0bc7bace1b 100644 --- a/drivers/mmc/host/sdhci-omap.c +++ b/drivers/mmc/host/sdhci-omap.c @@ -1393,7 +1393,7 @@ err_pltfm_free: return ret; } -static int sdhci_omap_remove(struct platform_device *pdev) +static void sdhci_omap_remove(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct sdhci_host *host = platform_get_drvdata(pdev); @@ -1407,8 +1407,6 @@ static int sdhci_omap_remove(struct platform_device *pdev) /* Ensure device gets disabled despite userspace sysfs config */ pm_runtime_force_suspend(dev); sdhci_pltfm_free(pdev); - - return 0; } #ifdef CONFIG_PM @@ -1477,7 +1475,7 @@ static const struct dev_pm_ops sdhci_omap_dev_pm_ops = { static struct platform_driver sdhci_omap_driver = { .probe = sdhci_omap_probe, - .remove = sdhci_omap_remove, + .remove_new = sdhci_omap_remove, .driver = { .name = "sdhci-omap", .probe_type = PROBE_PREFER_ASYNCHRONOUS, From f67cd7f6d3678dbe8a370655f41d4a9d85c73bbc Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:21 +0800 Subject: [PATCH 428/656] mmc: sdhci-of-aspeed: remove unneeded variables MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The variable 'dead' is redundant, let's remove it. Signed-off-by: Yangtao Li Acked-by: Adrian Hunter Acked-by: Uwe Kleine-König Link: https://lore.kernel.org/r/20230727070051.17778-32-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-of-aspeed.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/mmc/host/sdhci-of-aspeed.c b/drivers/mmc/host/sdhci-of-aspeed.c index 25b4073f698b..b4867bb4a564 100644 --- a/drivers/mmc/host/sdhci-of-aspeed.c +++ b/drivers/mmc/host/sdhci-of-aspeed.c @@ -454,12 +454,11 @@ static int aspeed_sdhci_remove(struct platform_device *pdev) { struct sdhci_pltfm_host *pltfm_host; struct sdhci_host *host; - int dead = 0; host = platform_get_drvdata(pdev); pltfm_host = sdhci_priv(host); - sdhci_remove_host(host, dead); + sdhci_remove_host(host, 0); clk_disable_unprepare(pltfm_host->clk); From a29e8b51a07e1785bb2a0cf334c801f2af7d69c5 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:22 +0800 Subject: [PATCH 429/656] mmc: sdhci-of-aspeed: Convert to platform remove MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Acked-by: Adrian Hunter Link: https://lore.kernel.org/r/20230727070051.17778-33-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-of-aspeed.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/drivers/mmc/host/sdhci-of-aspeed.c b/drivers/mmc/host/sdhci-of-aspeed.c index b4867bb4a564..42d54532cabe 100644 --- a/drivers/mmc/host/sdhci-of-aspeed.c +++ b/drivers/mmc/host/sdhci-of-aspeed.c @@ -450,7 +450,7 @@ err_pltfm_free: return ret; } -static int aspeed_sdhci_remove(struct platform_device *pdev) +static void aspeed_sdhci_remove(struct platform_device *pdev) { struct sdhci_pltfm_host *pltfm_host; struct sdhci_host *host; @@ -463,8 +463,6 @@ static int aspeed_sdhci_remove(struct platform_device *pdev) clk_disable_unprepare(pltfm_host->clk); sdhci_pltfm_free(pdev); - - return 0; } static const struct aspeed_sdhci_pdata ast2400_sdhci_pdata = { @@ -520,7 +518,7 @@ static struct platform_driver aspeed_sdhci_driver = { .of_match_table = aspeed_sdhci_of_match, }, .probe = aspeed_sdhci_probe, - .remove = aspeed_sdhci_remove, + .remove_new = aspeed_sdhci_remove, }; static int aspeed_sdc_probe(struct platform_device *pdev) @@ -573,13 +571,11 @@ err_clk: return ret; } -static int aspeed_sdc_remove(struct platform_device *pdev) +static void aspeed_sdc_remove(struct platform_device *pdev) { struct aspeed_sdc *sdc = dev_get_drvdata(&pdev->dev); clk_disable_unprepare(sdc->clk); - - return 0; } static const struct of_device_id aspeed_sdc_of_match[] = { @@ -599,7 +595,7 @@ static struct platform_driver aspeed_sdc_driver = { .of_match_table = aspeed_sdc_of_match, }, .probe = aspeed_sdc_probe, - .remove = aspeed_sdc_remove, + .remove_new = aspeed_sdc_remove, }; #if defined(CONFIG_MMC_SDHCI_OF_ASPEED_TEST) From 20c57c3c0f1c5982c33edc6d5ad9f920a97a9e08 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:23 +0800 Subject: [PATCH 430/656] mmc: meson-mx-sdio: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Reviewed-by: Martin Blumenstingl Link: https://lore.kernel.org/r/20230727070051.17778-34-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/meson-mx-sdio.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/meson-mx-sdio.c b/drivers/mmc/host/meson-mx-sdio.c index 3a19a05ef55a..a11577f2ee69 100644 --- a/drivers/mmc/host/meson-mx-sdio.c +++ b/drivers/mmc/host/meson-mx-sdio.c @@ -728,7 +728,7 @@ error_unregister_slot_pdev: return ret; } -static int meson_mx_mmc_remove(struct platform_device *pdev) +static void meson_mx_mmc_remove(struct platform_device *pdev) { struct meson_mx_mmc_host *host = platform_get_drvdata(pdev); struct device *slot_dev = mmc_dev(host->mmc); @@ -743,8 +743,6 @@ static int meson_mx_mmc_remove(struct platform_device *pdev) clk_disable_unprepare(host->core_clk); mmc_free_host(host->mmc); - - return 0; } static const struct of_device_id meson_mx_mmc_of_match[] = { @@ -756,7 +754,7 @@ MODULE_DEVICE_TABLE(of, meson_mx_mmc_of_match); static struct platform_driver meson_mx_mmc_driver = { .probe = meson_mx_mmc_probe, - .remove = meson_mx_mmc_remove, + .remove_new = meson_mx_mmc_remove, .driver = { .name = "meson-mx-sdio", .probe_type = PROBE_PREFER_ASYNCHRONOUS, From c618ba0f419d8231c23868893af6fdb42c128567 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:24 +0800 Subject: [PATCH 431/656] mmc: sdhci-sprd: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Acked-by: Adrian Hunter Acked-by: Chunyan Zhang Link: https://lore.kernel.org/r/20230727070051.17778-35-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-sprd.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/sdhci-sprd.c b/drivers/mmc/host/sdhci-sprd.c index a21d6524d7ca..28639d6621fd 100644 --- a/drivers/mmc/host/sdhci-sprd.c +++ b/drivers/mmc/host/sdhci-sprd.c @@ -719,7 +719,7 @@ pltfm_free: return ret; } -static int sdhci_sprd_remove(struct platform_device *pdev) +static void sdhci_sprd_remove(struct platform_device *pdev) { struct sdhci_host *host = platform_get_drvdata(pdev); struct sdhci_sprd_host *sprd_host = TO_SPRD_HOST(host); @@ -731,8 +731,6 @@ static int sdhci_sprd_remove(struct platform_device *pdev) clk_disable_unprepare(sprd_host->clk_2x_enable); sdhci_pltfm_free(pdev); - - return 0; } static const struct of_device_id sdhci_sprd_of_match[] = { @@ -799,7 +797,7 @@ static const struct dev_pm_ops sdhci_sprd_pm_ops = { static struct platform_driver sdhci_sprd_driver = { .probe = sdhci_sprd_probe, - .remove = sdhci_sprd_remove, + .remove_new = sdhci_sprd_remove, .driver = { .name = "sdhci_sprd_r11", .probe_type = PROBE_PREFER_ASYNCHRONOUS, From 8d9b1788ea4232d4f6dbd7fdbf9a983d6b630810 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:25 +0800 Subject: [PATCH 432/656] mmc: sdhci-tegra: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Acked-by: Adrian Hunter Link: https://lore.kernel.org/r/20230727070051.17778-36-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-tegra.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c index 1e1eac953691..1ad0a6b3a2eb 100644 --- a/drivers/mmc/host/sdhci-tegra.c +++ b/drivers/mmc/host/sdhci-tegra.c @@ -1817,7 +1817,7 @@ err_parse_dt: return rc; } -static int sdhci_tegra_remove(struct platform_device *pdev) +static void sdhci_tegra_remove(struct platform_device *pdev) { struct sdhci_host *host = platform_get_drvdata(pdev); struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); @@ -1833,8 +1833,6 @@ static int sdhci_tegra_remove(struct platform_device *pdev) clk_disable_unprepare(tegra_host->tmclk); sdhci_pltfm_free(pdev); - - return 0; } static int __maybe_unused sdhci_tegra_runtime_suspend(struct device *dev) @@ -1932,7 +1930,7 @@ static struct platform_driver sdhci_tegra_driver = { .pm = &sdhci_tegra_dev_pm_ops, }, .probe = sdhci_tegra_probe, - .remove = sdhci_tegra_remove, + .remove_new = sdhci_tegra_remove, }; module_platform_driver(sdhci_tegra_driver); From a2b6de8072c3012d50f9851ee80ba129cac246b3 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:26 +0800 Subject: [PATCH 433/656] mmc: sdhci-acpi: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Acked-by: Adrian Hunter Link: https://lore.kernel.org/r/20230727070051.17778-37-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-acpi.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/sdhci-acpi.c b/drivers/mmc/host/sdhci-acpi.c index edf2e6c14dc6..acf5fc3ad7e4 100644 --- a/drivers/mmc/host/sdhci-acpi.c +++ b/drivers/mmc/host/sdhci-acpi.c @@ -917,7 +917,7 @@ err_free: return err; } -static int sdhci_acpi_remove(struct platform_device *pdev) +static void sdhci_acpi_remove(struct platform_device *pdev) { struct sdhci_acpi_host *c = platform_get_drvdata(pdev); struct device *dev = &pdev->dev; @@ -939,8 +939,6 @@ static int sdhci_acpi_remove(struct platform_device *pdev) c->slot->free_slot(pdev); sdhci_free_host(c->host); - - return 0; } static void __maybe_unused sdhci_acpi_reset_signal_voltage_if_needed( @@ -1033,7 +1031,7 @@ static struct platform_driver sdhci_acpi_driver = { .pm = &sdhci_acpi_pm_ops, }, .probe = sdhci_acpi_probe, - .remove = sdhci_acpi_remove, + .remove_new = sdhci_acpi_remove, }; module_platform_driver(sdhci_acpi_driver); From 53b9222e3d74bf5f0f851741f0e42efe463bf0d6 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:27 +0800 Subject: [PATCH 434/656] mmc: sdhci-esdhc-imx: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Acked-by: Adrian Hunter Link: https://lore.kernel.org/r/20230727070051.17778-38-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-esdhc-imx.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index e767fe058023..a8bdb3c5ecd5 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -1802,7 +1802,7 @@ free_sdhci: return err; } -static int sdhci_esdhc_imx_remove(struct platform_device *pdev) +static void sdhci_esdhc_imx_remove(struct platform_device *pdev) { struct sdhci_host *host = platform_get_drvdata(pdev); struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); @@ -1824,8 +1824,6 @@ static int sdhci_esdhc_imx_remove(struct platform_device *pdev) cpu_latency_qos_remove_request(&imx_data->pm_qos_req); sdhci_pltfm_free(pdev); - - return 0; } #ifdef CONFIG_PM_SLEEP @@ -1986,7 +1984,7 @@ static struct platform_driver sdhci_esdhc_imx_driver = { .pm = &sdhci_esdhc_pmops, }, .probe = sdhci_esdhc_imx_probe, - .remove = sdhci_esdhc_imx_remove, + .remove_new = sdhci_esdhc_imx_remove, }; module_platform_driver(sdhci_esdhc_imx_driver); From a7dde463c701e89d51989582ee101a848d8c12ad Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:28 +0800 Subject: [PATCH 435/656] mmc: sdhci-msm: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Acked-by: Konrad Dybcio Acked-by: Adrian Hunter Link: https://lore.kernel.org/r/20230727070051.17778-39-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-msm.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c index c0ce187e740a..668e0aceeeba 100644 --- a/drivers/mmc/host/sdhci-msm.c +++ b/drivers/mmc/host/sdhci-msm.c @@ -2668,7 +2668,7 @@ pltfm_free: return ret; } -static int sdhci_msm_remove(struct platform_device *pdev) +static void sdhci_msm_remove(struct platform_device *pdev) { struct sdhci_host *host = platform_get_drvdata(pdev); struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); @@ -2687,7 +2687,6 @@ static int sdhci_msm_remove(struct platform_device *pdev) if (!IS_ERR(msm_host->bus_clk)) clk_disable_unprepare(msm_host->bus_clk); sdhci_pltfm_free(pdev); - return 0; } static __maybe_unused int sdhci_msm_runtime_suspend(struct device *dev) @@ -2740,7 +2739,7 @@ static const struct dev_pm_ops sdhci_msm_pm_ops = { static struct platform_driver sdhci_msm_driver = { .probe = sdhci_msm_probe, - .remove = sdhci_msm_remove, + .remove_new = sdhci_msm_remove, .driver = { .name = "sdhci_msm", .of_match_table = sdhci_msm_dt_match, From 9f13caa4cb4aec8268af53a732873b5d833a18a5 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:29 +0800 Subject: [PATCH 436/656] mmc: alcor: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Link: https://lore.kernel.org/r/20230727070051.17778-40-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/alcor.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/alcor.c b/drivers/mmc/host/alcor.c index d01df01d4b4d..42aa43740ba8 100644 --- a/drivers/mmc/host/alcor.c +++ b/drivers/mmc/host/alcor.c @@ -1125,7 +1125,7 @@ free_host: return ret; } -static int alcor_pci_sdmmc_drv_remove(struct platform_device *pdev) +static void alcor_pci_sdmmc_drv_remove(struct platform_device *pdev) { struct alcor_sdmmc_host *host = dev_get_drvdata(&pdev->dev); struct mmc_host *mmc = mmc_from_priv(host); @@ -1136,8 +1136,6 @@ static int alcor_pci_sdmmc_drv_remove(struct platform_device *pdev) alcor_hw_uninit(host); mmc_remove_host(mmc); mmc_free_host(mmc); - - return 0; } #ifdef CONFIG_PM_SLEEP @@ -1177,7 +1175,7 @@ MODULE_DEVICE_TABLE(platform, alcor_pci_sdmmc_ids); static struct platform_driver alcor_pci_sdmmc_driver = { .probe = alcor_pci_sdmmc_drv_probe, - .remove = alcor_pci_sdmmc_drv_remove, + .remove_new = alcor_pci_sdmmc_drv_remove, .id_table = alcor_pci_sdmmc_ids, .driver = { .name = DRV_NAME_ALCOR_PCI_SDMMC, From 3a1d0a8d1cd6c3a7b7c7bbc35dae7443752a2344 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:30 +0800 Subject: [PATCH 437/656] mmc: dw_mmc: rockchip: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Acked-by: Heiko Stuebner Link: https://lore.kernel.org/r/20230727070051.17778-41-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/dw_mmc-rockchip.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c index 2a99f15f527f..b07190ba4b7a 100644 --- a/drivers/mmc/host/dw_mmc-rockchip.c +++ b/drivers/mmc/host/dw_mmc-rockchip.c @@ -371,15 +371,13 @@ static int dw_mci_rockchip_probe(struct platform_device *pdev) return 0; } -static int dw_mci_rockchip_remove(struct platform_device *pdev) +static void dw_mci_rockchip_remove(struct platform_device *pdev) { pm_runtime_get_sync(&pdev->dev); pm_runtime_disable(&pdev->dev); pm_runtime_put_noidle(&pdev->dev); dw_mci_pltfm_remove(pdev); - - return 0; } static const struct dev_pm_ops dw_mci_rockchip_dev_pm_ops = { @@ -392,7 +390,7 @@ static const struct dev_pm_ops dw_mci_rockchip_dev_pm_ops = { static struct platform_driver dw_mci_rockchip_pltfm_driver = { .probe = dw_mci_rockchip_probe, - .remove = dw_mci_rockchip_remove, + .remove_new = dw_mci_rockchip_remove, .driver = { .name = "dwmmc_rockchip", .probe_type = PROBE_PREFER_ASYNCHRONOUS, From 65c86da4b1b7775e8c293b20c004b127913e66f6 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:31 +0800 Subject: [PATCH 438/656] mmc: owl: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Link: https://lore.kernel.org/r/20230727070051.17778-42-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/owl-mmc.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/owl-mmc.c b/drivers/mmc/host/owl-mmc.c index 62d2993573d0..fc08f25c34eb 100644 --- a/drivers/mmc/host/owl-mmc.c +++ b/drivers/mmc/host/owl-mmc.c @@ -668,7 +668,7 @@ err_free_host: return ret; } -static int owl_mmc_remove(struct platform_device *pdev) +static void owl_mmc_remove(struct platform_device *pdev) { struct mmc_host *mmc = platform_get_drvdata(pdev); struct owl_mmc_host *owl_host = mmc_priv(mmc); @@ -677,8 +677,6 @@ static int owl_mmc_remove(struct platform_device *pdev) disable_irq(owl_host->irq); dma_release_channel(owl_host->dma); mmc_free_host(mmc); - - return 0; } static const struct of_device_id owl_mmc_of_match[] = { @@ -694,7 +692,7 @@ static struct platform_driver owl_mmc_driver = { .of_match_table = owl_mmc_of_match, }, .probe = owl_mmc_probe, - .remove = owl_mmc_remove, + .remove_new = owl_mmc_remove, }; module_platform_driver(owl_mmc_driver); From f9b85b78656b5c132066d24690de2ff5c72e5b90 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:32 +0800 Subject: [PATCH 439/656] mmc: wbsd: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Link: https://lore.kernel.org/r/20230727070051.17778-43-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/wbsd.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/drivers/mmc/host/wbsd.c b/drivers/mmc/host/wbsd.c index 0589d169e8fb..001a468bc149 100644 --- a/drivers/mmc/host/wbsd.c +++ b/drivers/mmc/host/wbsd.c @@ -1754,11 +1754,9 @@ static int wbsd_probe(struct platform_device *dev) return wbsd_init(&dev->dev, param_io, param_irq, param_dma, 0); } -static int wbsd_remove(struct platform_device *dev) +static void wbsd_remove(struct platform_device *dev) { wbsd_shutdown(&dev->dev, 0); - - return 0; } /* @@ -1900,8 +1898,7 @@ static struct platform_device *wbsd_device; static struct platform_driver wbsd_driver = { .probe = wbsd_probe, - .remove = wbsd_remove, - + .remove_new = wbsd_remove, .suspend = wbsd_platform_suspend, .resume = wbsd_platform_resume, .driver = { From 7a0b007f00a3d69ad08d47cfc52fabf97eca092d Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:33 +0800 Subject: [PATCH 440/656] mmc: usdhi60rol0: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Acked-by: Jesper Nilsson Link: https://lore.kernel.org/r/20230727070051.17778-44-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/usdhi6rol0.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/usdhi6rol0.c b/drivers/mmc/host/usdhi6rol0.c index 2e17903658fc..6e421445d56c 100644 --- a/drivers/mmc/host/usdhi6rol0.c +++ b/drivers/mmc/host/usdhi6rol0.c @@ -1884,7 +1884,7 @@ e_free_mmc: return ret; } -static int usdhi6_remove(struct platform_device *pdev) +static void usdhi6_remove(struct platform_device *pdev) { struct usdhi6_host *host = platform_get_drvdata(pdev); @@ -1895,13 +1895,11 @@ static int usdhi6_remove(struct platform_device *pdev) usdhi6_dma_release(host); clk_disable_unprepare(host->clk); mmc_free_host(host->mmc); - - return 0; } static struct platform_driver usdhi6_driver = { .probe = usdhi6_probe, - .remove = usdhi6_remove, + .remove_new = usdhi6_remove, .driver = { .name = "usdhi6rol0", .probe_type = PROBE_PREFER_ASYNCHRONOUS, From ee65ea2b8302f0dc189356f7d130fa0509b1c252 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:34 +0800 Subject: [PATCH 441/656] mmc: atmel-mci: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Reviewed-by: Claudiu Beznea Link: https://lore.kernel.org/r/20230727070051.17778-45-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/atmel-mci.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c index 2fdf352b3d86..1f89d02c4685 100644 --- a/drivers/mmc/host/atmel-mci.c +++ b/drivers/mmc/host/atmel-mci.c @@ -2599,7 +2599,7 @@ err_dma_probe_defer: return ret; } -static int atmci_remove(struct platform_device *pdev) +static void atmci_remove(struct platform_device *pdev) { struct atmel_mci *host = platform_get_drvdata(pdev); unsigned int i; @@ -2629,8 +2629,6 @@ static int atmci_remove(struct platform_device *pdev) pm_runtime_disable(&pdev->dev); pm_runtime_put_noidle(&pdev->dev); - - return 0; } #ifdef CONFIG_PM @@ -2663,7 +2661,7 @@ static const struct dev_pm_ops atmci_dev_pm_ops = { static struct platform_driver atmci_driver = { .probe = atmci_probe, - .remove = atmci_remove, + .remove_new = atmci_remove, .driver = { .name = "atmel_mci", .probe_type = PROBE_PREFER_ASYNCHRONOUS, From 887c1331ef2570a7ae58f41a33d3aaddfe2e5587 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:35 +0800 Subject: [PATCH 442/656] mmc: sdhci-st: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Acked-by: Adrian Hunter Link: https://lore.kernel.org/r/20230727070051.17778-46-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-st.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/sdhci-st.c b/drivers/mmc/host/sdhci-st.c index 97f350953c4b..14fc2c386bd3 100644 --- a/drivers/mmc/host/sdhci-st.c +++ b/drivers/mmc/host/sdhci-st.c @@ -431,7 +431,7 @@ err_pltfm_init: return ret; } -static int sdhci_st_remove(struct platform_device *pdev) +static void sdhci_st_remove(struct platform_device *pdev) { struct sdhci_host *host = platform_get_drvdata(pdev); struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); @@ -443,8 +443,6 @@ static int sdhci_st_remove(struct platform_device *pdev) clk_disable_unprepare(pdata->icnclk); reset_control_assert(rstc); - - return 0; } #ifdef CONFIG_PM_SLEEP @@ -507,7 +505,7 @@ MODULE_DEVICE_TABLE(of, st_sdhci_match); static struct platform_driver sdhci_st_driver = { .probe = sdhci_st_probe, - .remove = sdhci_st_remove, + .remove_new = sdhci_st_remove, .driver = { .name = "sdhci-st", .probe_type = PROBE_PREFER_ASYNCHRONOUS, From 2ababbdc933836937359e0ec7ed0bdfda96000a0 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:36 +0800 Subject: [PATCH 443/656] mmc: wmt-sdmmc: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Link: https://lore.kernel.org/r/20230727070051.17778-47-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/wmt-sdmmc.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/wmt-sdmmc.c b/drivers/mmc/host/wmt-sdmmc.c index f860f363be56..77d5f1d24489 100644 --- a/drivers/mmc/host/wmt-sdmmc.c +++ b/drivers/mmc/host/wmt-sdmmc.c @@ -879,7 +879,7 @@ fail1: return ret; } -static int wmt_mci_remove(struct platform_device *pdev) +static void wmt_mci_remove(struct platform_device *pdev) { struct mmc_host *mmc; struct wmt_mci_priv *priv; @@ -917,8 +917,6 @@ static int wmt_mci_remove(struct platform_device *pdev) mmc_free_host(mmc); dev_info(&pdev->dev, "WMT MCI device removed\n"); - - return 0; } #ifdef CONFIG_PM @@ -988,7 +986,7 @@ static const struct dev_pm_ops wmt_mci_pm = { static struct platform_driver wmt_mci_driver = { .probe = wmt_mci_probe, - .remove = wmt_mci_remove, + .remove_new = wmt_mci_remove, .driver = { .name = DRIVER_NAME, .probe_type = PROBE_PREFER_ASYNCHRONOUS, From bd0e512bff1a264d924c80dd10c2f53770849f2f Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:37 +0800 Subject: [PATCH 444/656] mmc: sdhci-esdhc-mcf: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Acked-by: Angelo Dureghello Acked-by: Adrian Hunter Link: https://lore.kernel.org/r/20230727070051.17778-48-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-esdhc-mcf.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/sdhci-esdhc-mcf.c b/drivers/mmc/host/sdhci-esdhc-mcf.c index 05926bf5ecf9..a07f8333cd6b 100644 --- a/drivers/mmc/host/sdhci-esdhc-mcf.c +++ b/drivers/mmc/host/sdhci-esdhc-mcf.c @@ -489,7 +489,7 @@ err_exit: return err; } -static int sdhci_esdhc_mcf_remove(struct platform_device *pdev) +static void sdhci_esdhc_mcf_remove(struct platform_device *pdev) { struct sdhci_host *host = platform_get_drvdata(pdev); struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); @@ -502,8 +502,6 @@ static int sdhci_esdhc_mcf_remove(struct platform_device *pdev) clk_disable_unprepare(mcf_data->clk_per); sdhci_pltfm_free(pdev); - - return 0; } static struct platform_driver sdhci_esdhc_mcf_driver = { @@ -512,7 +510,7 @@ static struct platform_driver sdhci_esdhc_mcf_driver = { .probe_type = PROBE_PREFER_ASYNCHRONOUS, }, .probe = sdhci_esdhc_mcf_probe, - .remove = sdhci_esdhc_mcf_remove, + .remove_new = sdhci_esdhc_mcf_remove, }; module_platform_driver(sdhci_esdhc_mcf_driver); From 3ed9c648eacdaff791c429b75d121a20f15e6967 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:38 +0800 Subject: [PATCH 445/656] mmc: sunplus-mmc: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Link: https://lore.kernel.org/r/20230727070051.17778-49-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sunplus-mmc.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/sunplus-mmc.c b/drivers/mmc/host/sunplus-mmc.c index 37ebed040807..13c7cc0b6180 100644 --- a/drivers/mmc/host/sunplus-mmc.c +++ b/drivers/mmc/host/sunplus-mmc.c @@ -939,7 +939,7 @@ clk_disable: return ret; } -static int spmmc_drv_remove(struct platform_device *dev) +static void spmmc_drv_remove(struct platform_device *dev) { struct spmmc_host *host = platform_get_drvdata(dev); @@ -948,8 +948,6 @@ static int spmmc_drv_remove(struct platform_device *dev) clk_disable_unprepare(host->clk); pm_runtime_put_noidle(&dev->dev); pm_runtime_disable(&dev->dev); - - return 0; } static int spmmc_pm_runtime_suspend(struct device *dev) @@ -984,7 +982,7 @@ MODULE_DEVICE_TABLE(of, spmmc_of_table); static struct platform_driver spmmc_driver = { .probe = spmmc_drv_probe, - .remove = spmmc_drv_remove, + .remove_new = spmmc_drv_remove, .driver = { .name = "spmmc", .pm = pm_ptr(&spmmc_pm_ops), From ba082d6ed5d0857d57644f61acb20e4cf508c1a3 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:39 +0800 Subject: [PATCH 446/656] mmc: sdhci-spear: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Acked-by: Viresh Kumar Acked-by: Adrian Hunter Link: https://lore.kernel.org/r/20230727070051.17778-50-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-spear.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/sdhci-spear.c b/drivers/mmc/host/sdhci-spear.c index 73ca07cdfaa9..c81bdfa97b89 100644 --- a/drivers/mmc/host/sdhci-spear.c +++ b/drivers/mmc/host/sdhci-spear.c @@ -117,7 +117,7 @@ err: return ret; } -static int sdhci_remove(struct platform_device *pdev) +static void sdhci_remove(struct platform_device *pdev) { struct sdhci_host *host = platform_get_drvdata(pdev); struct spear_sdhci *sdhci = sdhci_priv(host); @@ -131,8 +131,6 @@ static int sdhci_remove(struct platform_device *pdev) sdhci_remove_host(host, dead); clk_disable_unprepare(sdhci->clk); sdhci_free_host(host); - - return 0; } #ifdef CONFIG_PM_SLEEP @@ -184,7 +182,7 @@ static struct platform_driver sdhci_driver = { .of_match_table = sdhci_spear_id_table, }, .probe = sdhci_probe, - .remove = sdhci_remove, + .remove_new = sdhci_remove, }; module_platform_driver(sdhci_driver); From 0484ed31748e293e4c4897faa8c3e3e2a4f398e5 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:40 +0800 Subject: [PATCH 447/656] mmc: mxcmmc: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Link: https://lore.kernel.org/r/20230727070051.17778-51-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/mxcmmc.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/mxcmmc.c b/drivers/mmc/host/mxcmmc.c index 9b6bdc1b0758..5b3ab0e20505 100644 --- a/drivers/mmc/host/mxcmmc.c +++ b/drivers/mmc/host/mxcmmc.c @@ -1162,7 +1162,7 @@ out_free: return ret; } -static int mxcmci_remove(struct platform_device *pdev) +static void mxcmci_remove(struct platform_device *pdev) { struct mmc_host *mmc = platform_get_drvdata(pdev); struct mxcmci_host *host = mmc_priv(mmc); @@ -1179,8 +1179,6 @@ static int mxcmci_remove(struct platform_device *pdev) clk_disable_unprepare(host->clk_ipg); mmc_free_host(mmc); - - return 0; } static int mxcmci_suspend(struct device *dev) @@ -1214,7 +1212,7 @@ static DEFINE_SIMPLE_DEV_PM_OPS(mxcmci_pm_ops, mxcmci_suspend, mxcmci_resume); static struct platform_driver mxcmci_driver = { .probe = mxcmci_probe, - .remove = mxcmci_remove, + .remove_new = mxcmci_remove, .driver = { .name = DRIVER_NAME, .probe_type = PROBE_PREFER_ASYNCHRONOUS, From 0fbfbfbaafb45fd9919568fb86e6c0f0bbc5668a Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:41 +0800 Subject: [PATCH 448/656] mmc: mvsdio: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Link: https://lore.kernel.org/r/20230727070051.17778-52-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/mvsdio.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/mvsdio.c b/drivers/mmc/host/mvsdio.c index b4f6a0a2fcb5..ca01b7d204ba 100644 --- a/drivers/mmc/host/mvsdio.c +++ b/drivers/mmc/host/mvsdio.c @@ -796,7 +796,7 @@ out: return ret; } -static int mvsd_remove(struct platform_device *pdev) +static void mvsd_remove(struct platform_device *pdev) { struct mmc_host *mmc = platform_get_drvdata(pdev); @@ -809,8 +809,6 @@ static int mvsd_remove(struct platform_device *pdev) if (!IS_ERR(host->clk)) clk_disable_unprepare(host->clk); mmc_free_host(mmc); - - return 0; } static const struct of_device_id mvsdio_dt_ids[] = { @@ -821,7 +819,7 @@ MODULE_DEVICE_TABLE(of, mvsdio_dt_ids); static struct platform_driver mvsd_driver = { .probe = mvsd_probe, - .remove = mvsd_remove, + .remove_new = mvsd_remove, .driver = { .name = DRIVER_NAME, .probe_type = PROBE_PREFER_ASYNCHRONOUS, From 7f6b0361bdbc6438400d4610d6eb63f6f3fb4a38 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:42 +0800 Subject: [PATCH 449/656] mmc: pwrseq_simple: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Link: https://lore.kernel.org/r/20230727070051.17778-53-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/core/pwrseq_simple.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/core/pwrseq_simple.c b/drivers/mmc/core/pwrseq_simple.c index 3bac1e71411b..df9588503ad0 100644 --- a/drivers/mmc/core/pwrseq_simple.c +++ b/drivers/mmc/core/pwrseq_simple.c @@ -142,18 +142,16 @@ static int mmc_pwrseq_simple_probe(struct platform_device *pdev) return mmc_pwrseq_register(&pwrseq->pwrseq); } -static int mmc_pwrseq_simple_remove(struct platform_device *pdev) +static void mmc_pwrseq_simple_remove(struct platform_device *pdev) { struct mmc_pwrseq_simple *pwrseq = platform_get_drvdata(pdev); mmc_pwrseq_unregister(&pwrseq->pwrseq); - - return 0; } static struct platform_driver mmc_pwrseq_simple_driver = { .probe = mmc_pwrseq_simple_probe, - .remove = mmc_pwrseq_simple_remove, + .remove_new = mmc_pwrseq_simple_remove, .driver = { .name = "pwrseq_simple", .of_match_table = mmc_pwrseq_simple_of_match, From 884e869602e37c9cfd9bc5183c0b8e9f5b7435a9 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:43 +0800 Subject: [PATCH 450/656] mmc: pwrseq: sd8787: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Link: https://lore.kernel.org/r/20230727070051.17778-54-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/core/pwrseq_sd8787.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/core/pwrseq_sd8787.c b/drivers/mmc/core/pwrseq_sd8787.c index 0c5f5e371e1f..0c5808fc3206 100644 --- a/drivers/mmc/core/pwrseq_sd8787.c +++ b/drivers/mmc/core/pwrseq_sd8787.c @@ -113,18 +113,16 @@ static int mmc_pwrseq_sd8787_probe(struct platform_device *pdev) return mmc_pwrseq_register(&pwrseq->pwrseq); } -static int mmc_pwrseq_sd8787_remove(struct platform_device *pdev) +static void mmc_pwrseq_sd8787_remove(struct platform_device *pdev) { struct mmc_pwrseq_sd8787 *pwrseq = platform_get_drvdata(pdev); mmc_pwrseq_unregister(&pwrseq->pwrseq); - - return 0; } static struct platform_driver mmc_pwrseq_sd8787_driver = { .probe = mmc_pwrseq_sd8787_probe, - .remove = mmc_pwrseq_sd8787_remove, + .remove_new = mmc_pwrseq_sd8787_remove, .driver = { .name = "pwrseq_sd8787", .of_match_table = mmc_pwrseq_sd8787_of_match, From 5c57f6c47da2f228854cd9547f005efad8a0e07b Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:44 +0800 Subject: [PATCH 451/656] mmc: pwrseq: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Link: https://lore.kernel.org/r/20230727070051.17778-55-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/core/pwrseq_emmc.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/core/pwrseq_emmc.c b/drivers/mmc/core/pwrseq_emmc.c index f6dde9edd7a3..3b6d69cefb4e 100644 --- a/drivers/mmc/core/pwrseq_emmc.c +++ b/drivers/mmc/core/pwrseq_emmc.c @@ -90,14 +90,12 @@ static int mmc_pwrseq_emmc_probe(struct platform_device *pdev) return mmc_pwrseq_register(&pwrseq->pwrseq); } -static int mmc_pwrseq_emmc_remove(struct platform_device *pdev) +static void mmc_pwrseq_emmc_remove(struct platform_device *pdev) { struct mmc_pwrseq_emmc *pwrseq = platform_get_drvdata(pdev); unregister_restart_handler(&pwrseq->reset_nb); mmc_pwrseq_unregister(&pwrseq->pwrseq); - - return 0; } static const struct of_device_id mmc_pwrseq_emmc_of_match[] = { @@ -109,7 +107,7 @@ MODULE_DEVICE_TABLE(of, mmc_pwrseq_emmc_of_match); static struct platform_driver mmc_pwrseq_emmc_driver = { .probe = mmc_pwrseq_emmc_probe, - .remove = mmc_pwrseq_emmc_remove, + .remove_new = mmc_pwrseq_emmc_remove, .driver = { .name = "pwrseq_emmc", .of_match_table = mmc_pwrseq_emmc_of_match, From 80c602b1144f926839d5a74e16fc0fb3c1284649 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:45 +0800 Subject: [PATCH 452/656] mmc: renesas_sdhi: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20230727070051.17778-56-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/renesas_sdhi.h | 2 +- drivers/mmc/host/renesas_sdhi_core.c | 4 +--- drivers/mmc/host/renesas_sdhi_internal_dmac.c | 2 +- drivers/mmc/host/renesas_sdhi_sys_dmac.c | 2 +- 4 files changed, 4 insertions(+), 6 deletions(-) diff --git a/drivers/mmc/host/renesas_sdhi.h b/drivers/mmc/host/renesas_sdhi.h index 68da3da9e2e5..c1fb9740eab0 100644 --- a/drivers/mmc/host/renesas_sdhi.h +++ b/drivers/mmc/host/renesas_sdhi.h @@ -101,5 +101,5 @@ int renesas_sdhi_probe(struct platform_device *pdev, const struct tmio_mmc_dma_ops *dma_ops, const struct renesas_sdhi_of_data *of_data, const struct renesas_sdhi_quirks *quirks); -int renesas_sdhi_remove(struct platform_device *pdev); +void renesas_sdhi_remove(struct platform_device *pdev); #endif diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c index 10dbdb4abc93..c675dec587ef 100644 --- a/drivers/mmc/host/renesas_sdhi_core.c +++ b/drivers/mmc/host/renesas_sdhi_core.c @@ -1149,15 +1149,13 @@ efree: } EXPORT_SYMBOL_GPL(renesas_sdhi_probe); -int renesas_sdhi_remove(struct platform_device *pdev) +void renesas_sdhi_remove(struct platform_device *pdev) { struct tmio_mmc_host *host = platform_get_drvdata(pdev); tmio_mmc_host_remove(host); renesas_sdhi_clk_disable(host); tmio_mmc_host_free(host); - - return 0; } EXPORT_SYMBOL_GPL(renesas_sdhi_remove); diff --git a/drivers/mmc/host/renesas_sdhi_internal_dmac.c b/drivers/mmc/host/renesas_sdhi_internal_dmac.c index 4cc5bcb3213a..53d34c3eddce 100644 --- a/drivers/mmc/host/renesas_sdhi_internal_dmac.c +++ b/drivers/mmc/host/renesas_sdhi_internal_dmac.c @@ -610,7 +610,7 @@ static struct platform_driver renesas_internal_dmac_sdhi_driver = { .of_match_table = renesas_sdhi_internal_dmac_of_match, }, .probe = renesas_sdhi_internal_dmac_probe, - .remove = renesas_sdhi_remove, + .remove_new = renesas_sdhi_remove, }; module_platform_driver(renesas_internal_dmac_sdhi_driver); diff --git a/drivers/mmc/host/renesas_sdhi_sys_dmac.c b/drivers/mmc/host/renesas_sdhi_sys_dmac.c index 452982e670d2..9cf7f9feab72 100644 --- a/drivers/mmc/host/renesas_sdhi_sys_dmac.c +++ b/drivers/mmc/host/renesas_sdhi_sys_dmac.c @@ -471,7 +471,7 @@ static struct platform_driver renesas_sys_dmac_sdhi_driver = { .of_match_table = renesas_sdhi_sys_dmac_of_match, }, .probe = renesas_sdhi_sys_dmac_probe, - .remove = renesas_sdhi_remove, + .remove_new = renesas_sdhi_remove, }; module_platform_driver(renesas_sys_dmac_sdhi_driver); From 1691c261aec44f5262dbcf8846100dc4f256f3dd Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:46 +0800 Subject: [PATCH 453/656] mmc: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Acked-by: Florian Fainelli # Broadcom Acked-by: Adrian Hunter Link: https://lore.kernel.org/r/20230727070051.17778-57-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-bcm-kona.c | 2 +- drivers/mmc/host/sdhci-brcmstb.c | 2 +- drivers/mmc/host/sdhci-cadence.c | 2 +- drivers/mmc/host/sdhci-dove.c | 2 +- drivers/mmc/host/sdhci-iproc.c | 2 +- drivers/mmc/host/sdhci-of-esdhc.c | 2 +- drivers/mmc/host/sdhci-of-hlwd.c | 2 +- drivers/mmc/host/sdhci-of-sparx5.c | 2 +- drivers/mmc/host/sdhci-pltfm.c | 4 +--- drivers/mmc/host/sdhci-pltfm.h | 2 +- drivers/mmc/host/sdhci-pxav2.c | 2 +- 11 files changed, 11 insertions(+), 13 deletions(-) diff --git a/drivers/mmc/host/sdhci-bcm-kona.c b/drivers/mmc/host/sdhci-bcm-kona.c index ef1fb383e1e7..02bb871e838f 100644 --- a/drivers/mmc/host/sdhci-bcm-kona.c +++ b/drivers/mmc/host/sdhci-bcm-kona.c @@ -318,7 +318,7 @@ static struct platform_driver sdhci_bcm_kona_driver = { .of_match_table = sdhci_bcm_kona_of_match, }, .probe = sdhci_bcm_kona_probe, - .remove = sdhci_pltfm_unregister, + .remove_new = sdhci_pltfm_unregister, }; module_platform_driver(sdhci_bcm_kona_driver); diff --git a/drivers/mmc/host/sdhci-brcmstb.c b/drivers/mmc/host/sdhci-brcmstb.c index 4c22337199cf..a2b6d8f2eeb6 100644 --- a/drivers/mmc/host/sdhci-brcmstb.c +++ b/drivers/mmc/host/sdhci-brcmstb.c @@ -430,7 +430,7 @@ static struct platform_driver sdhci_brcmstb_driver = { .of_match_table = of_match_ptr(sdhci_brcm_of_match), }, .probe = sdhci_brcmstb_probe, - .remove = sdhci_pltfm_unregister, + .remove_new = sdhci_pltfm_unregister, .shutdown = sdhci_brcmstb_shutdown, }; diff --git a/drivers/mmc/host/sdhci-cadence.c b/drivers/mmc/host/sdhci-cadence.c index 25d9849ef0d1..8cdc178ec1ba 100644 --- a/drivers/mmc/host/sdhci-cadence.c +++ b/drivers/mmc/host/sdhci-cadence.c @@ -617,7 +617,7 @@ static struct platform_driver sdhci_cdns_driver = { .of_match_table = sdhci_cdns_match, }, .probe = sdhci_cdns_probe, - .remove = sdhci_pltfm_unregister, + .remove_new = sdhci_pltfm_unregister, }; module_platform_driver(sdhci_cdns_driver); diff --git a/drivers/mmc/host/sdhci-dove.c b/drivers/mmc/host/sdhci-dove.c index 5e5bf82e5976..75335dbf223c 100644 --- a/drivers/mmc/host/sdhci-dove.c +++ b/drivers/mmc/host/sdhci-dove.c @@ -110,7 +110,7 @@ static struct platform_driver sdhci_dove_driver = { .of_match_table = sdhci_dove_of_match_table, }, .probe = sdhci_dove_probe, - .remove = sdhci_pltfm_unregister, + .remove_new = sdhci_pltfm_unregister, }; module_platform_driver(sdhci_dove_driver); diff --git a/drivers/mmc/host/sdhci-iproc.c b/drivers/mmc/host/sdhci-iproc.c index 6a93b1ee0b30..b1547bcbec32 100644 --- a/drivers/mmc/host/sdhci-iproc.c +++ b/drivers/mmc/host/sdhci-iproc.c @@ -432,7 +432,7 @@ static struct platform_driver sdhci_iproc_driver = { .pm = &sdhci_pltfm_pmops, }, .probe = sdhci_iproc_probe, - .remove = sdhci_pltfm_unregister, + .remove_new = sdhci_pltfm_unregister, .shutdown = sdhci_iproc_shutdown, }; module_platform_driver(sdhci_iproc_driver); diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c index 48ca1cf15b19..5072b59f6165 100644 --- a/drivers/mmc/host/sdhci-of-esdhc.c +++ b/drivers/mmc/host/sdhci-of-esdhc.c @@ -1521,7 +1521,7 @@ static struct platform_driver sdhci_esdhc_driver = { .pm = &esdhc_of_dev_pm_ops, }, .probe = sdhci_esdhc_probe, - .remove = sdhci_pltfm_unregister, + .remove_new = sdhci_pltfm_unregister, }; module_platform_driver(sdhci_esdhc_driver); diff --git a/drivers/mmc/host/sdhci-of-hlwd.c b/drivers/mmc/host/sdhci-of-hlwd.c index 12675797b296..cba3ba48e9dc 100644 --- a/drivers/mmc/host/sdhci-of-hlwd.c +++ b/drivers/mmc/host/sdhci-of-hlwd.c @@ -85,7 +85,7 @@ static struct platform_driver sdhci_hlwd_driver = { .pm = &sdhci_pltfm_pmops, }, .probe = sdhci_hlwd_probe, - .remove = sdhci_pltfm_unregister, + .remove_new = sdhci_pltfm_unregister, }; module_platform_driver(sdhci_hlwd_driver); diff --git a/drivers/mmc/host/sdhci-of-sparx5.c b/drivers/mmc/host/sdhci-of-sparx5.c index 2e983cf49bc6..653480dbe6bb 100644 --- a/drivers/mmc/host/sdhci-of-sparx5.c +++ b/drivers/mmc/host/sdhci-of-sparx5.c @@ -260,7 +260,7 @@ static struct platform_driver sdhci_sparx5_driver = { .pm = &sdhci_pltfm_pmops, }, .probe = sdhci_sparx5_probe, - .remove = sdhci_pltfm_unregister, + .remove_new = sdhci_pltfm_unregister, }; module_platform_driver(sdhci_sparx5_driver); diff --git a/drivers/mmc/host/sdhci-pltfm.c b/drivers/mmc/host/sdhci-pltfm.c index 673e750a8490..72d07b49b0a3 100644 --- a/drivers/mmc/host/sdhci-pltfm.c +++ b/drivers/mmc/host/sdhci-pltfm.c @@ -187,7 +187,7 @@ int sdhci_pltfm_register(struct platform_device *pdev, } EXPORT_SYMBOL_GPL(sdhci_pltfm_register); -int sdhci_pltfm_unregister(struct platform_device *pdev) +void sdhci_pltfm_unregister(struct platform_device *pdev) { struct sdhci_host *host = platform_get_drvdata(pdev); struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); @@ -196,8 +196,6 @@ int sdhci_pltfm_unregister(struct platform_device *pdev) sdhci_remove_host(host, dead); clk_disable_unprepare(pltfm_host->clk); sdhci_pltfm_free(pdev); - - return 0; } EXPORT_SYMBOL_GPL(sdhci_pltfm_unregister); diff --git a/drivers/mmc/host/sdhci-pltfm.h b/drivers/mmc/host/sdhci-pltfm.h index 9bd717ff784b..6e6a443dafd9 100644 --- a/drivers/mmc/host/sdhci-pltfm.h +++ b/drivers/mmc/host/sdhci-pltfm.h @@ -102,7 +102,7 @@ extern void sdhci_pltfm_free(struct platform_device *pdev); extern int sdhci_pltfm_register(struct platform_device *pdev, const struct sdhci_pltfm_data *pdata, size_t priv_size); -extern int sdhci_pltfm_unregister(struct platform_device *pdev); +extern void sdhci_pltfm_unregister(struct platform_device *pdev); extern unsigned int sdhci_pltfm_clk_get_max_clock(struct sdhci_host *host); diff --git a/drivers/mmc/host/sdhci-pxav2.c b/drivers/mmc/host/sdhci-pxav2.c index 86b60b0447b3..a0c8470e9214 100644 --- a/drivers/mmc/host/sdhci-pxav2.c +++ b/drivers/mmc/host/sdhci-pxav2.c @@ -358,7 +358,7 @@ static struct platform_driver sdhci_pxav2_driver = { .pm = &sdhci_pltfm_pmops, }, .probe = sdhci_pxav2_probe, - .remove = sdhci_pltfm_unregister, + .remove_new = sdhci_pltfm_unregister, }; module_platform_driver(sdhci_pxav2_driver); From 8d7770345db715660dd751e195d934960434c876 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:47 +0800 Subject: [PATCH 454/656] mmc: uniphier-sd: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Link: https://lore.kernel.org/r/20230727070051.17778-58-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/uniphier-sd.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/uniphier-sd.c b/drivers/mmc/host/uniphier-sd.c index b50cda4a9635..1404989e6151 100644 --- a/drivers/mmc/host/uniphier-sd.c +++ b/drivers/mmc/host/uniphier-sd.c @@ -726,15 +726,13 @@ free_host: return ret; } -static int uniphier_sd_remove(struct platform_device *pdev) +static void uniphier_sd_remove(struct platform_device *pdev) { struct tmio_mmc_host *host = platform_get_drvdata(pdev); tmio_mmc_host_remove(host); uniphier_sd_clk_disable(host); tmio_mmc_host_free(host); - - return 0; } static const struct of_device_id uniphier_sd_match[] = { @@ -756,7 +754,7 @@ MODULE_DEVICE_TABLE(of, uniphier_sd_match); static struct platform_driver uniphier_sd_driver = { .probe = uniphier_sd_probe, - .remove = uniphier_sd_remove, + .remove_new = uniphier_sd_remove, .driver = { .name = "uniphier-sd", .probe_type = PROBE_PREFER_ASYNCHRONOUS, From 854034e2bcccf932d0a0d3f9cf3149d6ebcf145c Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:48 +0800 Subject: [PATCH 455/656] mmc: sdhci_am654: Properly handle failures in .remove() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Returning an error code in a platform driver's remove function is wrong most of the time and there is an effort to make the callback return void. To prepare this rework the function not to exit early. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Acked-by: Adrian Hunter Link: https://lore.kernel.org/r/20230727070051.17778-59-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci_am654.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/sdhci_am654.c b/drivers/mmc/host/sdhci_am654.c index 7cdf0f54e3a5..1cc84739ef2f 100644 --- a/drivers/mmc/host/sdhci_am654.c +++ b/drivers/mmc/host/sdhci_am654.c @@ -870,16 +870,17 @@ static int sdhci_am654_remove(struct platform_device *pdev) { struct sdhci_host *host = platform_get_drvdata(pdev); struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + struct device *dev = &pdev->dev; int ret; - ret = pm_runtime_resume_and_get(&pdev->dev); + ret = pm_runtime_get_sync(dev); if (ret < 0) - return ret; + dev_err(dev, "pm_runtime_get_sync() Failed\n"); sdhci_remove_host(host, true); clk_disable_unprepare(pltfm_host->clk); - pm_runtime_disable(&pdev->dev); - pm_runtime_put_noidle(&pdev->dev); + pm_runtime_disable(dev); + pm_runtime_put_noidle(dev); sdhci_pltfm_free(pdev); return 0; } From de29ade4fc35d27e22d4060f241c3dcae480d6c4 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:49 +0800 Subject: [PATCH 456/656] mmc: sdhci_am654: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Acked-by: Adrian Hunter Link: https://lore.kernel.org/r/20230727070051.17778-60-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci_am654.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/host/sdhci_am654.c b/drivers/mmc/host/sdhci_am654.c index 1cc84739ef2f..c125485ba80e 100644 --- a/drivers/mmc/host/sdhci_am654.c +++ b/drivers/mmc/host/sdhci_am654.c @@ -866,7 +866,7 @@ err_pltfm_free: return ret; } -static int sdhci_am654_remove(struct platform_device *pdev) +static void sdhci_am654_remove(struct platform_device *pdev) { struct sdhci_host *host = platform_get_drvdata(pdev); struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); @@ -882,7 +882,6 @@ static int sdhci_am654_remove(struct platform_device *pdev) pm_runtime_disable(dev); pm_runtime_put_noidle(dev); sdhci_pltfm_free(pdev); - return 0; } #ifdef CONFIG_PM @@ -994,7 +993,7 @@ static struct platform_driver sdhci_am654_driver = { .of_match_table = sdhci_am654_of_match, }, .probe = sdhci_am654_probe, - .remove = sdhci_am654_remove, + .remove_new = sdhci_am654_remove, }; module_platform_driver(sdhci_am654_driver); From 1930c059b2cb6e0696dc2fc0924a99854bdfc2e5 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Thu, 27 Jul 2023 15:00:50 +0800 Subject: [PATCH 457/656] mmc: f-sdh30: Convert to platform remove callback returning void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König Signed-off-by: Yangtao Li Acked-by: Uwe Kleine-König Acked-by: Adrian Hunter Link: https://lore.kernel.org/r/20230727070051.17778-61-frank.li@vivo.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci_f_sdh30.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/mmc/host/sdhci_f_sdh30.c b/drivers/mmc/host/sdhci_f_sdh30.c index 3215063bcf86..47ae853f51aa 100644 --- a/drivers/mmc/host/sdhci_f_sdh30.c +++ b/drivers/mmc/host/sdhci_f_sdh30.c @@ -206,7 +206,7 @@ err: return ret; } -static int sdhci_f_sdh30_remove(struct platform_device *pdev) +static void sdhci_f_sdh30_remove(struct platform_device *pdev) { struct sdhci_host *host = platform_get_drvdata(pdev); struct f_sdhost_priv *priv = sdhci_f_sdhost_priv(host); @@ -219,8 +219,6 @@ static int sdhci_f_sdh30_remove(struct platform_device *pdev) reset_control_assert(rst); clk_disable_unprepare(clk); clk_disable_unprepare(clk_iface); - - return 0; } #ifdef CONFIG_OF @@ -248,8 +246,8 @@ static struct platform_driver sdhci_f_sdh30_driver = { .acpi_match_table = ACPI_PTR(f_sdh30_acpi_ids), .pm = &sdhci_pltfm_pmops, }, - .probe = sdhci_f_sdh30_probe, - .remove = sdhci_f_sdh30_remove, + .probe = sdhci_f_sdh30_probe, + .remove_new = sdhci_f_sdh30_remove, }; module_platform_driver(sdhci_f_sdh30_driver); From 32261f9b728277f88a0affa022df64e6238c24a6 Mon Sep 17 00:00:00 2001 From: Adrian Hunter Date: Fri, 11 Aug 2023 16:03:36 +0300 Subject: [PATCH 458/656] mmc: sdhci-pltfm: Add sdhci_pltfm_remove() Add sdhci_pltfm_remove() to replace sdhci_pltfm_unregister(). The difference is that sdhci_pltfm_remove() does not do: clk_disable_unprepare(pltfm_host->clk); which allows drivers to choose to use devm_clk_get_enabled() or similar, for pltfm_host->clk. Once all drivers using sdhci_pltfm_unregister() have been amended to use sdhci_pltfm_remove() instead, sdhci_pltfm_unregister() will be removed. Signed-off-by: Adrian Hunter Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230811130351.7038-2-adrian.hunter@intel.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-pltfm.c | 10 ++++++++++ drivers/mmc/host/sdhci-pltfm.h | 1 + 2 files changed, 11 insertions(+) diff --git a/drivers/mmc/host/sdhci-pltfm.c b/drivers/mmc/host/sdhci-pltfm.c index 72d07b49b0a3..5a63c8818987 100644 --- a/drivers/mmc/host/sdhci-pltfm.c +++ b/drivers/mmc/host/sdhci-pltfm.c @@ -199,6 +199,16 @@ void sdhci_pltfm_unregister(struct platform_device *pdev) } EXPORT_SYMBOL_GPL(sdhci_pltfm_unregister); +void sdhci_pltfm_remove(struct platform_device *pdev) +{ + struct sdhci_host *host = platform_get_drvdata(pdev); + int dead = (readl(host->ioaddr + SDHCI_INT_STATUS) == 0xffffffff); + + sdhci_remove_host(host, dead); + sdhci_pltfm_free(pdev); +} +EXPORT_SYMBOL_GPL(sdhci_pltfm_remove); + #ifdef CONFIG_PM_SLEEP int sdhci_pltfm_suspend(struct device *dev) { diff --git a/drivers/mmc/host/sdhci-pltfm.h b/drivers/mmc/host/sdhci-pltfm.h index 6e6a443dafd9..402f4edc6ca5 100644 --- a/drivers/mmc/host/sdhci-pltfm.h +++ b/drivers/mmc/host/sdhci-pltfm.h @@ -103,6 +103,7 @@ extern int sdhci_pltfm_register(struct platform_device *pdev, const struct sdhci_pltfm_data *pdata, size_t priv_size); extern void sdhci_pltfm_unregister(struct platform_device *pdev); +extern void sdhci_pltfm_remove(struct platform_device *pdev); extern unsigned int sdhci_pltfm_clk_get_max_clock(struct sdhci_host *host); From 8ebb607a747f25c81adf372c46c2a0745d4ef692 Mon Sep 17 00:00:00 2001 From: Adrian Hunter Date: Fri, 11 Aug 2023 16:03:37 +0300 Subject: [PATCH 459/656] mmc: sdhci-bcm-kona: Use sdhci_pltfm_remove() Use sdhci_pltfm_remove() instead of sdhci_pltfm_unregister() because sdhci_pltfm_unregister() is going to be removed. Signed-off-by: Adrian Hunter Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230811130351.7038-3-adrian.hunter@intel.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-bcm-kona.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-bcm-kona.c b/drivers/mmc/host/sdhci-bcm-kona.c index 02bb871e838f..cb9152c6a65d 100644 --- a/drivers/mmc/host/sdhci-bcm-kona.c +++ b/drivers/mmc/host/sdhci-bcm-kona.c @@ -310,6 +310,16 @@ err_pltfm_free: return ret; } +static void sdhci_bcm_kona_remove(struct platform_device *pdev) +{ + struct sdhci_host *host = platform_get_drvdata(pdev); + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + struct clk *clk = pltfm_host->clk; + + sdhci_pltfm_remove(pdev); + clk_disable_unprepare(clk); +} + static struct platform_driver sdhci_bcm_kona_driver = { .driver = { .name = "sdhci-kona", @@ -318,7 +328,7 @@ static struct platform_driver sdhci_bcm_kona_driver = { .of_match_table = sdhci_bcm_kona_of_match, }, .probe = sdhci_bcm_kona_probe, - .remove_new = sdhci_pltfm_unregister, + .remove_new = sdhci_bcm_kona_remove, }; module_platform_driver(sdhci_bcm_kona_driver); From b6c90da3b0e1a8444cad92d496d409941195e2e4 Mon Sep 17 00:00:00 2001 From: Adrian Hunter Date: Fri, 11 Aug 2023 16:03:38 +0300 Subject: [PATCH 460/656] mmc: sdhci-brcmstb: Use sdhci_pltfm_remove() Use sdhci_pltfm_remove() instead of sdhci_pltfm_unregister() so that devm_clk_get_optional_enabled() can be used for pltfm_host->clk. This has the side effect that the order of operations on the error path and remove path is not the same as it was before, but should be safe nevertheless. Signed-off-by: Adrian Hunter Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230811130351.7038-4-adrian.hunter@intel.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-brcmstb.c | 18 +++++------------- 1 file changed, 5 insertions(+), 13 deletions(-) diff --git a/drivers/mmc/host/sdhci-brcmstb.c b/drivers/mmc/host/sdhci-brcmstb.c index a2b6d8f2eeb6..c23251bb95f3 100644 --- a/drivers/mmc/host/sdhci-brcmstb.c +++ b/drivers/mmc/host/sdhci-brcmstb.c @@ -264,23 +264,17 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev) dev_dbg(&pdev->dev, "Probe found match for %s\n", match->compatible); - clk = devm_clk_get_optional(&pdev->dev, NULL); + clk = devm_clk_get_optional_enabled(&pdev->dev, NULL); if (IS_ERR(clk)) return dev_err_probe(&pdev->dev, PTR_ERR(clk), - "Failed to get clock from Device Tree\n"); - - res = clk_prepare_enable(clk); - if (res) - return res; + "Failed to get and enable clock from Device Tree\n"); memset(&brcmstb_pdata, 0, sizeof(brcmstb_pdata)); brcmstb_pdata.ops = match_priv->ops; host = sdhci_pltfm_init(pdev, &brcmstb_pdata, sizeof(struct sdhci_brcmstb_priv)); - if (IS_ERR(host)) { - res = PTR_ERR(host); - goto err_clk; - } + if (IS_ERR(host)) + return PTR_ERR(host); pltfm_host = sdhci_priv(host); priv = sdhci_pltfm_priv(pltfm_host); @@ -369,9 +363,7 @@ add_host: err: sdhci_pltfm_free(pdev); -err_clk: clk_disable_unprepare(base_clk); - clk_disable_unprepare(clk); return res; } @@ -430,7 +422,7 @@ static struct platform_driver sdhci_brcmstb_driver = { .of_match_table = of_match_ptr(sdhci_brcm_of_match), }, .probe = sdhci_brcmstb_probe, - .remove_new = sdhci_pltfm_unregister, + .remove_new = sdhci_pltfm_remove, .shutdown = sdhci_brcmstb_shutdown, }; From 6996beab7120d4bc004ca663408b7bd66dbacfad Mon Sep 17 00:00:00 2001 From: Adrian Hunter Date: Fri, 11 Aug 2023 16:03:39 +0300 Subject: [PATCH 461/656] mmc: sdhci-cadence: Use sdhci_pltfm_remove() Use sdhci_pltfm_remove() instead of sdhci_pltfm_unregister() so that devm_clk_get_enabled() can be used for pltfm_host->clk. This has the side effect that the order of operations on the error path and remove path is not the same as it was before, but should be safe nevertheless. Signed-off-by: Adrian Hunter Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230811130351.7038-5-adrian.hunter@intel.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-cadence.c | 17 ++++------------- 1 file changed, 4 insertions(+), 13 deletions(-) diff --git a/drivers/mmc/host/sdhci-cadence.c b/drivers/mmc/host/sdhci-cadence.c index 8cdc178ec1ba..be1505e8c536 100644 --- a/drivers/mmc/host/sdhci-cadence.c +++ b/drivers/mmc/host/sdhci-cadence.c @@ -487,14 +487,10 @@ static int sdhci_cdns_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; static const u16 version = SDHCI_SPEC_400 << SDHCI_SPEC_VER_SHIFT; - clk = devm_clk_get(dev, NULL); + clk = devm_clk_get_enabled(dev, NULL); if (IS_ERR(clk)) return PTR_ERR(clk); - ret = clk_prepare_enable(clk); - if (ret) - return ret; - data = of_device_get_match_data(dev); if (!data) data = &sdhci_cdns_drv_data; @@ -502,10 +498,8 @@ static int sdhci_cdns_probe(struct platform_device *pdev) nr_phy_params = sdhci_cdns_phy_param_count(dev->of_node); host = sdhci_pltfm_init(pdev, &data->pltfm_data, struct_size(priv, phy_params, nr_phy_params)); - if (IS_ERR(host)) { - ret = PTR_ERR(host); - goto disable_clk; - } + if (IS_ERR(host)) + return PTR_ERR(host); pltfm_host = sdhci_priv(host); pltfm_host->clk = clk; @@ -556,9 +550,6 @@ static int sdhci_cdns_probe(struct platform_device *pdev) return 0; free: sdhci_pltfm_free(pdev); -disable_clk: - clk_disable_unprepare(clk); - return ret; } @@ -617,7 +608,7 @@ static struct platform_driver sdhci_cdns_driver = { .of_match_table = sdhci_cdns_match, }, .probe = sdhci_cdns_probe, - .remove_new = sdhci_pltfm_unregister, + .remove_new = sdhci_pltfm_remove, }; module_platform_driver(sdhci_cdns_driver); From 584259d42434b067ef74b650d47ed651dd350325 Mon Sep 17 00:00:00 2001 From: Adrian Hunter Date: Fri, 11 Aug 2023 16:03:40 +0300 Subject: [PATCH 462/656] mmc: sdhci-dove: Use sdhci_pltfm_remove() Use sdhci_pltfm_remove() instead of sdhci_pltfm_unregister() so that devm_clk_get_enabled() can be used for pltfm_host->clk. This has the side effect that the order of operations on the error path and remove path is not the same as it was before, but should be safe nevertheless. Signed-off-by: Adrian Hunter Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230811130351.7038-6-adrian.hunter@intel.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-dove.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/drivers/mmc/host/sdhci-dove.c b/drivers/mmc/host/sdhci-dove.c index 75335dbf223c..88ec23417808 100644 --- a/drivers/mmc/host/sdhci-dove.c +++ b/drivers/mmc/host/sdhci-dove.c @@ -75,10 +75,7 @@ static int sdhci_dove_probe(struct platform_device *pdev) return PTR_ERR(host); pltfm_host = sdhci_priv(host); - pltfm_host->clk = devm_clk_get(&pdev->dev, NULL); - - if (!IS_ERR(pltfm_host->clk)) - clk_prepare_enable(pltfm_host->clk); + pltfm_host->clk = devm_clk_get_enabled(&pdev->dev, NULL); ret = mmc_of_parse(host->mmc); if (ret) @@ -91,7 +88,6 @@ static int sdhci_dove_probe(struct platform_device *pdev) return 0; err_sdhci_add: - clk_disable_unprepare(pltfm_host->clk); sdhci_pltfm_free(pdev); return ret; } @@ -110,7 +106,7 @@ static struct platform_driver sdhci_dove_driver = { .of_match_table = sdhci_dove_of_match_table, }, .probe = sdhci_dove_probe, - .remove_new = sdhci_pltfm_unregister, + .remove_new = sdhci_pltfm_remove, }; module_platform_driver(sdhci_dove_driver); From 080b5adf986de6bf95e2401ab5ed18a777cc19da Mon Sep 17 00:00:00 2001 From: Adrian Hunter Date: Fri, 11 Aug 2023 16:03:41 +0300 Subject: [PATCH 463/656] mmc: sdhci_f_sdh30: Use sdhci_pltfm_remove() Use sdhci_pltfm_remove() instead of sdhci_pltfm_unregister() because sdhci_pltfm_unregister() is going to be removed. Signed-off-by: Adrian Hunter Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230811130351.7038-7-adrian.hunter@intel.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci_f_sdh30.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci_f_sdh30.c b/drivers/mmc/host/sdhci_f_sdh30.c index 47ae853f51aa..c58e7cb1e2a7 100644 --- a/drivers/mmc/host/sdhci_f_sdh30.c +++ b/drivers/mmc/host/sdhci_f_sdh30.c @@ -214,7 +214,7 @@ static void sdhci_f_sdh30_remove(struct platform_device *pdev) struct reset_control *rst = priv->rst; struct clk *clk = priv->clk; - sdhci_pltfm_unregister(pdev); + sdhci_pltfm_remove(pdev); reset_control_assert(rst); clk_disable_unprepare(clk); From 3f3771341e4e2396232025e3f39875f3c0cdb039 Mon Sep 17 00:00:00 2001 From: Adrian Hunter Date: Fri, 11 Aug 2023 16:03:42 +0300 Subject: [PATCH 464/656] mmc: sdhci-iproc: Use sdhci_pltfm_remove() Use sdhci_pltfm_remove() instead of sdhci_pltfm_unregister() so that devm_clk_get_enabled() can be used for pltfm_host->clk. This has the side effect that the order of operations on the error path and remove path is not the same as it was before, but should be safe nevertheless. Signed-off-by: Adrian Hunter Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230811130351.7038-8-adrian.hunter@intel.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-iproc.c | 14 +++----------- 1 file changed, 3 insertions(+), 11 deletions(-) diff --git a/drivers/mmc/host/sdhci-iproc.c b/drivers/mmc/host/sdhci-iproc.c index b1547bcbec32..10235fdff246 100644 --- a/drivers/mmc/host/sdhci-iproc.c +++ b/drivers/mmc/host/sdhci-iproc.c @@ -386,16 +386,11 @@ static int sdhci_iproc_probe(struct platform_device *pdev) host->mmc->caps |= iproc_host->data->mmc_caps; if (dev->of_node) { - pltfm_host->clk = devm_clk_get(dev, NULL); + pltfm_host->clk = devm_clk_get_enabled(dev, NULL); if (IS_ERR(pltfm_host->clk)) { ret = PTR_ERR(pltfm_host->clk); goto err; } - ret = clk_prepare_enable(pltfm_host->clk); - if (ret) { - dev_err(dev, "failed to enable host clk\n"); - goto err; - } } if (iproc_host->data->missing_caps) { @@ -406,13 +401,10 @@ static int sdhci_iproc_probe(struct platform_device *pdev) ret = sdhci_add_host(host); if (ret) - goto err_clk; + goto err; return 0; -err_clk: - if (dev->of_node) - clk_disable_unprepare(pltfm_host->clk); err: sdhci_pltfm_free(pdev); return ret; @@ -432,7 +424,7 @@ static struct platform_driver sdhci_iproc_driver = { .pm = &sdhci_pltfm_pmops, }, .probe = sdhci_iproc_probe, - .remove_new = sdhci_pltfm_unregister, + .remove_new = sdhci_pltfm_remove, .shutdown = sdhci_iproc_shutdown, }; module_platform_driver(sdhci_iproc_driver); From ef1c3a7ec03b57e407bf3003095a5d9acdf14358 Mon Sep 17 00:00:00 2001 From: Adrian Hunter Date: Fri, 11 Aug 2023 16:03:43 +0300 Subject: [PATCH 465/656] mmc: sdhci-of-arasan: Use sdhci_pltfm_remove() Use sdhci_pltfm_remove() instead of sdhci_pltfm_unregister() because sdhci_pltfm_unregister() is going to be removed. Signed-off-by: Adrian Hunter Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230811130351.7038-9-adrian.hunter@intel.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-of-arasan.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c index 15025af326a2..5edd024347bd 100644 --- a/drivers/mmc/host/sdhci-of-arasan.c +++ b/drivers/mmc/host/sdhci-of-arasan.c @@ -2022,6 +2022,7 @@ static void sdhci_arasan_remove(struct platform_device *pdev) struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); struct sdhci_arasan_data *sdhci_arasan = sdhci_pltfm_priv(pltfm_host); struct clk *clk_ahb = sdhci_arasan->clk_ahb; + struct clk *clk_xin = pltfm_host->clk; if (!IS_ERR(sdhci_arasan->phy)) { if (sdhci_arasan->is_phy_on) @@ -2031,8 +2032,9 @@ static void sdhci_arasan_remove(struct platform_device *pdev) sdhci_arasan_unregister_sdclk(&pdev->dev); - sdhci_pltfm_unregister(pdev); + sdhci_pltfm_remove(pdev); + clk_disable_unprepare(clk_xin); clk_disable_unprepare(clk_ahb); } From 774caef5dffdfb7f8cb4c27c3da91b9903ea6a6e Mon Sep 17 00:00:00 2001 From: Adrian Hunter Date: Fri, 11 Aug 2023 16:03:44 +0300 Subject: [PATCH 466/656] mmc: sdhci-of-at91: Use sdhci_pltfm_remove() Use sdhci_pltfm_remove() instead of sdhci_pltfm_unregister() because sdhci_pltfm_unregister() is going to be removed. Signed-off-by: Adrian Hunter Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230811130351.7038-10-adrian.hunter@intel.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-of-at91.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-of-at91.c b/drivers/mmc/host/sdhci-of-at91.c index db01ea9fa203..23a9faad2ff8 100644 --- a/drivers/mmc/host/sdhci-of-at91.c +++ b/drivers/mmc/host/sdhci-of-at91.c @@ -456,7 +456,7 @@ static void sdhci_at91_remove(struct platform_device *pdev) pm_runtime_disable(&pdev->dev); pm_runtime_put_noidle(&pdev->dev); - sdhci_pltfm_unregister(pdev); + sdhci_pltfm_remove(pdev); clk_disable_unprepare(gck); clk_disable_unprepare(hclock); From 4a035a41dff076fc56f8bd693145d55a338e9fc8 Mon Sep 17 00:00:00 2001 From: Adrian Hunter Date: Fri, 11 Aug 2023 16:03:45 +0300 Subject: [PATCH 467/656] mmc: sdhci-of-esdhc: Use sdhci_pltfm_remove() Use sdhci_pltfm_remove() instead of sdhci_pltfm_unregister() because sdhci_pltfm_unregister() is going to be removed. Signed-off-by: Adrian Hunter Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230811130351.7038-11-adrian.hunter@intel.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-of-esdhc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c index 5072b59f6165..3ae9aa25745a 100644 --- a/drivers/mmc/host/sdhci-of-esdhc.c +++ b/drivers/mmc/host/sdhci-of-esdhc.c @@ -1521,7 +1521,7 @@ static struct platform_driver sdhci_esdhc_driver = { .pm = &esdhc_of_dev_pm_ops, }, .probe = sdhci_esdhc_probe, - .remove_new = sdhci_pltfm_unregister, + .remove_new = sdhci_pltfm_remove, }; module_platform_driver(sdhci_esdhc_driver); From ed581f291d6a9ec28d5950c1bc76cda3046ede0c Mon Sep 17 00:00:00 2001 From: Adrian Hunter Date: Fri, 11 Aug 2023 16:03:46 +0300 Subject: [PATCH 468/656] mmc: sdhci-of-hlwd: Use sdhci_pltfm_remove() Use sdhci_pltfm_remove() instead of sdhci_pltfm_unregister() because sdhci_pltfm_unregister() is going to be removed. Signed-off-by: Adrian Hunter Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230811130351.7038-12-adrian.hunter@intel.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-of-hlwd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-of-hlwd.c b/drivers/mmc/host/sdhci-of-hlwd.c index cba3ba48e9dc..06e88bb22ea5 100644 --- a/drivers/mmc/host/sdhci-of-hlwd.c +++ b/drivers/mmc/host/sdhci-of-hlwd.c @@ -85,7 +85,7 @@ static struct platform_driver sdhci_hlwd_driver = { .pm = &sdhci_pltfm_pmops, }, .probe = sdhci_hlwd_probe, - .remove_new = sdhci_pltfm_unregister, + .remove_new = sdhci_pltfm_remove, }; module_platform_driver(sdhci_hlwd_driver); From 18ba91ac6d726556026febb7a04dcb248ac3571c Mon Sep 17 00:00:00 2001 From: Adrian Hunter Date: Fri, 11 Aug 2023 16:03:47 +0300 Subject: [PATCH 469/656] mmc: sdhci-of-sparx5: Use sdhci_pltfm_remove() Use sdhci_pltfm_remove() instead of sdhci_pltfm_unregister() so that devm_clk_get_enabled() can be used for pltfm_host->clk. This has the side effect that the order of operations on the error path and remove path is not the same as it was before, but should be safe nevertheless. Signed-off-by: Adrian Hunter Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230811130351.7038-13-adrian.hunter@intel.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-of-sparx5.c | 17 ++++++----------- 1 file changed, 6 insertions(+), 11 deletions(-) diff --git a/drivers/mmc/host/sdhci-of-sparx5.c b/drivers/mmc/host/sdhci-of-sparx5.c index 653480dbe6bb..64b77e7d14cd 100644 --- a/drivers/mmc/host/sdhci-of-sparx5.c +++ b/drivers/mmc/host/sdhci-of-sparx5.c @@ -184,15 +184,12 @@ static int sdhci_sparx5_probe(struct platform_device *pdev) sdhci_sparx5 = sdhci_pltfm_priv(pltfm_host); sdhci_sparx5->host = host; - pltfm_host->clk = devm_clk_get(&pdev->dev, "core"); + pltfm_host->clk = devm_clk_get_enabled(&pdev->dev, "core"); if (IS_ERR(pltfm_host->clk)) { ret = PTR_ERR(pltfm_host->clk); - dev_err(&pdev->dev, "failed to get core clk: %d\n", ret); + dev_err(&pdev->dev, "failed to get and enable core clk: %d\n", ret); goto free_pltfm; } - ret = clk_prepare_enable(pltfm_host->clk); - if (ret) - goto free_pltfm; if (!of_property_read_u32(np, "microchip,clock-delay", &value) && (value > 0 && value <= MSHC_DLY_CC_MAX)) @@ -202,13 +199,13 @@ static int sdhci_sparx5_probe(struct platform_device *pdev) ret = mmc_of_parse(host->mmc); if (ret) - goto err_clk; + goto free_pltfm; sdhci_sparx5->cpu_ctrl = syscon_regmap_lookup_by_compatible(syscon); if (IS_ERR(sdhci_sparx5->cpu_ctrl)) { dev_err(&pdev->dev, "No CPU syscon regmap !\n"); ret = PTR_ERR(sdhci_sparx5->cpu_ctrl); - goto err_clk; + goto free_pltfm; } if (sdhci_sparx5->delay_clock >= 0) @@ -225,7 +222,7 @@ static int sdhci_sparx5_probe(struct platform_device *pdev) ret = sdhci_add_host(host); if (ret) - goto err_clk; + goto free_pltfm; /* Set AXI bus master to use un-cached access (for DMA) */ if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA) && @@ -239,8 +236,6 @@ static int sdhci_sparx5_probe(struct platform_device *pdev) return ret; -err_clk: - clk_disable_unprepare(pltfm_host->clk); free_pltfm: sdhci_pltfm_free(pdev); return ret; @@ -260,7 +255,7 @@ static struct platform_driver sdhci_sparx5_driver = { .pm = &sdhci_pltfm_pmops, }, .probe = sdhci_sparx5_probe, - .remove_new = sdhci_pltfm_unregister, + .remove_new = sdhci_pltfm_remove, }; module_platform_driver(sdhci_sparx5_driver); From c21f1b0dc6418e029b52fad1c243ed46fea37328 Mon Sep 17 00:00:00 2001 From: Adrian Hunter Date: Fri, 11 Aug 2023 16:03:48 +0300 Subject: [PATCH 470/656] mmc: sdhci-pxav2: Use sdhci_pltfm_remove() Use sdhci_pltfm_remove() instead of sdhci_pltfm_unregister() so that devm_clk_get_enabled() can be used for pltfm_host->clk. This has the side effect that the order of operations on the error path and remove path is not the same as it was before, but should be safe nevertheless. Signed-off-by: Adrian Hunter Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230811130351.7038-14-adrian.hunter@intel.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-pxav2.c | 19 ++++++------------- 1 file changed, 6 insertions(+), 13 deletions(-) diff --git a/drivers/mmc/host/sdhci-pxav2.c b/drivers/mmc/host/sdhci-pxav2.c index a0c8470e9214..b75cbea88b40 100644 --- a/drivers/mmc/host/sdhci-pxav2.c +++ b/drivers/mmc/host/sdhci-pxav2.c @@ -268,26 +268,21 @@ static int sdhci_pxav2_probe(struct platform_device *pdev) pltfm_host = sdhci_priv(host); pxav2_host = sdhci_pltfm_priv(pltfm_host); - clk = devm_clk_get(dev, "io"); - if (IS_ERR(clk) && PTR_ERR(clk) != -EPROBE_DEFER) - clk = devm_clk_get(dev, NULL); + clk = devm_clk_get_optional_enabled(dev, "io"); + if (!clk) + clk = devm_clk_get_enabled(dev, NULL); if (IS_ERR(clk)) { ret = PTR_ERR(clk); dev_err_probe(dev, ret, "failed to get io clock\n"); goto free; } pltfm_host->clk = clk; - ret = clk_prepare_enable(clk); - if (ret) { - dev_err(dev, "failed to enable io clock\n"); - goto free; - } clk_core = devm_clk_get_optional_enabled(dev, "core"); if (IS_ERR(clk_core)) { ret = PTR_ERR(clk_core); dev_err_probe(dev, ret, "failed to enable core clock\n"); - goto disable_clk; + goto free; } host->quirks = SDHCI_QUIRK_BROKEN_ADMA @@ -339,12 +334,10 @@ static int sdhci_pxav2_probe(struct platform_device *pdev) ret = sdhci_add_host(host); if (ret) - goto disable_clk; + goto free; return 0; -disable_clk: - clk_disable_unprepare(clk); free: sdhci_pltfm_free(pdev); return ret; @@ -358,7 +351,7 @@ static struct platform_driver sdhci_pxav2_driver = { .pm = &sdhci_pltfm_pmops, }, .probe = sdhci_pxav2_probe, - .remove_new = sdhci_pltfm_unregister, + .remove_new = sdhci_pltfm_remove, }; module_platform_driver(sdhci_pxav2_driver); From b1284d7c62f0b9ded4532717f29b16f2f199738e Mon Sep 17 00:00:00 2001 From: Adrian Hunter Date: Fri, 11 Aug 2023 16:03:49 +0300 Subject: [PATCH 471/656] mmc: sdhci-st: Use sdhci_pltfm_remove() Use sdhci_pltfm_remove() instead of sdhci_pltfm_unregister() because sdhci_pltfm_unregister() is going to be removed. Signed-off-by: Adrian Hunter Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230811130351.7038-15-adrian.hunter@intel.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-st.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-st.c b/drivers/mmc/host/sdhci-st.c index 14fc2c386bd3..d12532b96b51 100644 --- a/drivers/mmc/host/sdhci-st.c +++ b/drivers/mmc/host/sdhci-st.c @@ -437,10 +437,12 @@ static void sdhci_st_remove(struct platform_device *pdev) struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); struct st_mmc_platform_data *pdata = sdhci_pltfm_priv(pltfm_host); struct reset_control *rstc = pdata->rstc; + struct clk *clk = pltfm_host->clk; - sdhci_pltfm_unregister(pdev); + sdhci_pltfm_remove(pdev); clk_disable_unprepare(pdata->icnclk); + clk_disable_unprepare(clk); reset_control_assert(rstc); } From f0255cdca3972f01ac0bb9cfee83ed9548d19dd2 Mon Sep 17 00:00:00 2001 From: Adrian Hunter Date: Fri, 11 Aug 2023 16:03:50 +0300 Subject: [PATCH 472/656] mmc: sdhci-pltfm: Remove sdhci_pltfm_unregister() Now that sdhci_pltfm_unregister() is unused, remove it. Signed-off-by: Adrian Hunter Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230811130351.7038-16-adrian.hunter@intel.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-pltfm.c | 12 ------------ drivers/mmc/host/sdhci-pltfm.h | 1 - 2 files changed, 13 deletions(-) diff --git a/drivers/mmc/host/sdhci-pltfm.c b/drivers/mmc/host/sdhci-pltfm.c index 5a63c8818987..894f3bbe2b0f 100644 --- a/drivers/mmc/host/sdhci-pltfm.c +++ b/drivers/mmc/host/sdhci-pltfm.c @@ -187,18 +187,6 @@ int sdhci_pltfm_register(struct platform_device *pdev, } EXPORT_SYMBOL_GPL(sdhci_pltfm_register); -void sdhci_pltfm_unregister(struct platform_device *pdev) -{ - struct sdhci_host *host = platform_get_drvdata(pdev); - struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); - int dead = (readl(host->ioaddr + SDHCI_INT_STATUS) == 0xffffffff); - - sdhci_remove_host(host, dead); - clk_disable_unprepare(pltfm_host->clk); - sdhci_pltfm_free(pdev); -} -EXPORT_SYMBOL_GPL(sdhci_pltfm_unregister); - void sdhci_pltfm_remove(struct platform_device *pdev) { struct sdhci_host *host = platform_get_drvdata(pdev); diff --git a/drivers/mmc/host/sdhci-pltfm.h b/drivers/mmc/host/sdhci-pltfm.h index 402f4edc6ca5..bebc450d5098 100644 --- a/drivers/mmc/host/sdhci-pltfm.h +++ b/drivers/mmc/host/sdhci-pltfm.h @@ -102,7 +102,6 @@ extern void sdhci_pltfm_free(struct platform_device *pdev); extern int sdhci_pltfm_register(struct platform_device *pdev, const struct sdhci_pltfm_data *pdata, size_t priv_size); -extern void sdhci_pltfm_unregister(struct platform_device *pdev); extern void sdhci_pltfm_remove(struct platform_device *pdev); extern unsigned int sdhci_pltfm_clk_get_max_clock(struct sdhci_host *host); From 899171dc4e7ce9ac90b27610d79ea511402e60c0 Mon Sep 17 00:00:00 2001 From: Adrian Hunter Date: Fri, 11 Aug 2023 16:03:51 +0300 Subject: [PATCH 473/656] mmc: sdhci-pltfm: Rename sdhci_pltfm_register() Now that sdhci_pltfm_unregister() has been removed, rename sdhci_pltfm_register() to sdhci_pltfm_init_and_add_host() to better reflect what it does. Signed-off-by: Adrian Hunter Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/20230811130351.7038-17-adrian.hunter@intel.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-of-hlwd.c | 2 +- drivers/mmc/host/sdhci-pltfm.c | 8 ++++---- drivers/mmc/host/sdhci-pltfm.h | 6 +++--- 3 files changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/mmc/host/sdhci-of-hlwd.c b/drivers/mmc/host/sdhci-of-hlwd.c index 06e88bb22ea5..9c1c0ce610ef 100644 --- a/drivers/mmc/host/sdhci-of-hlwd.c +++ b/drivers/mmc/host/sdhci-of-hlwd.c @@ -68,7 +68,7 @@ static const struct sdhci_pltfm_data sdhci_hlwd_pdata = { static int sdhci_hlwd_probe(struct platform_device *pdev) { - return sdhci_pltfm_register(pdev, &sdhci_hlwd_pdata, 0); + return sdhci_pltfm_init_and_add_host(pdev, &sdhci_hlwd_pdata, 0); } static const struct of_device_id sdhci_hlwd_of_match[] = { diff --git a/drivers/mmc/host/sdhci-pltfm.c b/drivers/mmc/host/sdhci-pltfm.c index 894f3bbe2b0f..a72e123a585d 100644 --- a/drivers/mmc/host/sdhci-pltfm.c +++ b/drivers/mmc/host/sdhci-pltfm.c @@ -166,9 +166,9 @@ void sdhci_pltfm_free(struct platform_device *pdev) } EXPORT_SYMBOL_GPL(sdhci_pltfm_free); -int sdhci_pltfm_register(struct platform_device *pdev, - const struct sdhci_pltfm_data *pdata, - size_t priv_size) +int sdhci_pltfm_init_and_add_host(struct platform_device *pdev, + const struct sdhci_pltfm_data *pdata, + size_t priv_size) { struct sdhci_host *host; int ret = 0; @@ -185,7 +185,7 @@ int sdhci_pltfm_register(struct platform_device *pdev, return ret; } -EXPORT_SYMBOL_GPL(sdhci_pltfm_register); +EXPORT_SYMBOL_GPL(sdhci_pltfm_init_and_add_host); void sdhci_pltfm_remove(struct platform_device *pdev) { diff --git a/drivers/mmc/host/sdhci-pltfm.h b/drivers/mmc/host/sdhci-pltfm.h index bebc450d5098..b81d5b0fd616 100644 --- a/drivers/mmc/host/sdhci-pltfm.h +++ b/drivers/mmc/host/sdhci-pltfm.h @@ -99,9 +99,9 @@ extern struct sdhci_host *sdhci_pltfm_init(struct platform_device *pdev, size_t priv_size); extern void sdhci_pltfm_free(struct platform_device *pdev); -extern int sdhci_pltfm_register(struct platform_device *pdev, - const struct sdhci_pltfm_data *pdata, - size_t priv_size); +extern int sdhci_pltfm_init_and_add_host(struct platform_device *pdev, + const struct sdhci_pltfm_data *pdata, + size_t priv_size); extern void sdhci_pltfm_remove(struct platform_device *pdev); extern unsigned int sdhci_pltfm_clk_get_max_clock(struct sdhci_host *host); From ba0294df2dbdc006ffbf037da28bba64e9f6d709 Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Sat, 12 Aug 2023 20:57:48 +0200 Subject: [PATCH 474/656] gpio: sim: replace memmove() + strstrip() with skip_spaces() + strim() Turns out we can avoid the memmove() by using skip_spaces() and strim(). We did that in gpio-consumer, let's do it in gpio-sim. Suggested-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski Reviewed-by: Andy Shevchenko --- drivers/gpio/gpio-sim.c | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/drivers/gpio/gpio-sim.c b/drivers/gpio/gpio-sim.c index 1fbbb49985f6..b7161c83c104 100644 --- a/drivers/gpio/gpio-sim.c +++ b/drivers/gpio/gpio-sim.c @@ -642,16 +642,13 @@ static bool gpio_sim_device_is_live_unlocked(struct gpio_sim_device *dev) static char *gpio_sim_strdup_trimmed(const char *str, size_t count) { - char *dup, *trimmed; + char *trimmed; - dup = kstrndup(str, count, GFP_KERNEL); - if (!dup) + trimmed = kstrndup(skip_spaces(str), count, GFP_KERNEL); + if (!trimmed) return NULL; - trimmed = strstrip(dup); - memmove(dup, trimmed, strlen(trimmed) + 1); - - return dup; + return strim(trimmed); } static ssize_t gpio_sim_device_config_dev_name_show(struct config_item *item, From 373c36bf7914e3198ac2654dede499f340c52950 Mon Sep 17 00:00:00 2001 From: Alexander Danilenko Date: Tue, 15 Aug 2023 12:20:58 +0300 Subject: [PATCH 475/656] spi: tegra114: Remove unnecessary NULL-pointer checks cs_setup, cs_hold and cs_inactive points to fields of spi_device struct, so there is no sense in checking them for NULL. Found by Linux Verification Center (linuxtesting.org) with SVACE. Fixes: 04e6bb0d6bb1 ("spi: modify set_cs_timing parameter") Signed-off-by: Alexander Danilenko Link: https://lore.kernel.org/r/20230815092058.4083-1-al.b.danilenko@gmail.com Signed-off-by: Mark Brown --- drivers/spi/spi-tegra114.c | 18 +++++++----------- 1 file changed, 7 insertions(+), 11 deletions(-) diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c index ca4bdd45f56e..460f232dad50 100644 --- a/drivers/spi/spi-tegra114.c +++ b/drivers/spi/spi-tegra114.c @@ -722,27 +722,23 @@ static int tegra_spi_set_hw_cs_timing(struct spi_device *spi) struct spi_delay *setup = &spi->cs_setup; struct spi_delay *hold = &spi->cs_hold; struct spi_delay *inactive = &spi->cs_inactive; - u8 setup_dly, hold_dly, inactive_dly; + u8 setup_dly, hold_dly; u32 setup_hold; u32 spi_cs_timing; u32 inactive_cycles; u8 cs_state; - if ((setup && setup->unit != SPI_DELAY_UNIT_SCK) || - (hold && hold->unit != SPI_DELAY_UNIT_SCK) || - (inactive && inactive->unit != SPI_DELAY_UNIT_SCK)) { + if (setup->unit != SPI_DELAY_UNIT_SCK || + hold->unit != SPI_DELAY_UNIT_SCK || + inactive->unit != SPI_DELAY_UNIT_SCK) { dev_err(&spi->dev, "Invalid delay unit %d, should be SPI_DELAY_UNIT_SCK\n", SPI_DELAY_UNIT_SCK); return -EINVAL; } - setup_dly = setup ? setup->value : 0; - hold_dly = hold ? hold->value : 0; - inactive_dly = inactive ? inactive->value : 0; - - setup_dly = min_t(u8, setup_dly, MAX_SETUP_HOLD_CYCLES); - hold_dly = min_t(u8, hold_dly, MAX_SETUP_HOLD_CYCLES); + setup_dly = min_t(u8, setup->value, MAX_SETUP_HOLD_CYCLES); + hold_dly = min_t(u8, hold->value, MAX_SETUP_HOLD_CYCLES); if (setup_dly && hold_dly) { setup_hold = SPI_SETUP_HOLD(setup_dly - 1, hold_dly - 1); spi_cs_timing = SPI_CS_SETUP_HOLD(tspi->spi_cs_timing1, @@ -754,7 +750,7 @@ static int tegra_spi_set_hw_cs_timing(struct spi_device *spi) } } - inactive_cycles = min_t(u8, inactive_dly, MAX_INACTIVE_CYCLES); + inactive_cycles = min_t(u8, inactive->value, MAX_INACTIVE_CYCLES); if (inactive_cycles) inactive_cycles--; cs_state = inactive_cycles ? 0 : 1; From ecd02b6dee29b3d3a180cfda39d989752d0e913a Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Wed, 16 Aug 2023 17:39:38 +0800 Subject: [PATCH 476/656] spi: dw-mmio: keep old name same as documentation The documentation has not use the new name(host/target), so keep the comment words same as documentation used. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230816093938.1274806-1-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-dw-mmio.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c index 9e041a28ed47..805264c9c65c 100644 --- a/drivers/spi/spi-dw-mmio.c +++ b/drivers/spi/spi-dw-mmio.c @@ -68,7 +68,7 @@ struct dw_spi_mscc { ((((val) << 1) | BIT(0)) << ELBA_SPICS_OFFSET(cs)) /* - * The Designware SPI controller (referred to as host in the documentation) + * The Designware SPI controller (referred to as master in the documentation) * automatically deasserts chip select when the tx fifo is empty. The chip * selects then needs to be either driven as GPIOs or, for the first 4 using * the SPI boot controller registers. the final chip select is an OR gate @@ -142,7 +142,7 @@ static int dw_spi_mscc_jaguar2_init(struct platform_device *pdev, } /* - * The Designware SPI controller (referred to as host in the + * The Designware SPI controller (referred to as master in the * documentation) automatically deasserts chip select when the tx fifo * is empty. The chip selects then needs to be driven by a CS override * register. enable is an active low signal. From 46f53bde6e69edf8a2e0943babb3f160b30ee436 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Wed, 16 Aug 2023 17:40:03 +0800 Subject: [PATCH 477/656] spi: rpc-if: switch to use devm_spi_alloc_host() Switch to use modern name function devm_spi_alloc_host(). No functional changed. Signed-off-by: Yang Yingliang Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20230816094013.1275068-15-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-rpc-if.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/spi-rpc-if.c b/drivers/spi/spi-rpc-if.c index 2f78124a1b59..e11146932828 100644 --- a/drivers/spi/spi-rpc-if.c +++ b/drivers/spi/spi-rpc-if.c @@ -134,7 +134,7 @@ static int rpcif_spi_probe(struct platform_device *pdev) struct rpcif *rpc; int error; - ctlr = devm_spi_alloc_master(&pdev->dev, sizeof(*rpc)); + ctlr = devm_spi_alloc_host(&pdev->dev, sizeof(*rpc)); if (!ctlr) return -ENOMEM; From e21ac64e669e960688e79bf5babeed63132dac8a Mon Sep 17 00:00:00 2001 From: Biju Das Date: Wed, 16 Aug 2023 14:55:49 +0100 Subject: [PATCH 478/656] regulator: raa215300: Fix resource leak in case of error MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The clk_register_clkdev() allocates memory by calling vclkdev_alloc() and this memory is not freed in the error path. Similarly, resources allocated by clk_register_fixed_rate() are not freed in the error path. Fix these issues by using devm_clk_hw_register_fixed_rate() and devm_clk_hw_register_clkdev(). After this, the static variable clk is not needed. Replace it with  local variable hw in probe() and drop calling clk_unregister_fixed_rate() from raa215300_rtc_unregister_device(). Fixes: 7bce16630837 ("regulator: Add Renesas PMIC RAA215300 driver") Cc: stable@kernel.org Signed-off-by: Biju Das Link: https://lore.kernel.org/r/20230816135550.146657-2-biju.das.jz@bp.renesas.com Signed-off-by: Mark Brown --- drivers/regulator/raa215300.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/regulator/raa215300.c b/drivers/regulator/raa215300.c index 848a03a2fbd4..898f53cac02c 100644 --- a/drivers/regulator/raa215300.c +++ b/drivers/regulator/raa215300.c @@ -38,8 +38,6 @@ #define RAA215300_REG_BLOCK_EN_RTC_EN BIT(6) #define RAA215300_RTC_DEFAULT_ADDR 0x6f -static struct clk *clk; - static const struct regmap_config raa215300_regmap_config = { .reg_bits = 8, .val_bits = 8, @@ -49,10 +47,6 @@ static const struct regmap_config raa215300_regmap_config = { static void raa215300_rtc_unregister_device(void *data) { i2c_unregister_device(data); - if (!clk) { - clk_unregister_fixed_rate(clk); - clk = NULL; - } } static int raa215300_clk_present(struct i2c_client *client, const char *name) @@ -130,10 +124,16 @@ static int raa215300_i2c_probe(struct i2c_client *client) u32 addr = RAA215300_RTC_DEFAULT_ADDR; struct i2c_board_info info = {}; struct i2c_client *rtc_client; + struct clk_hw *hw; ssize_t size; - clk = clk_register_fixed_rate(NULL, clk_name, NULL, 0, 32000); - clk_register_clkdev(clk, clk_name, NULL); + hw = devm_clk_hw_register_fixed_rate(dev, clk_name, NULL, 0, 32000); + if (IS_ERR(hw)) + return PTR_ERR(hw); + + ret = devm_clk_hw_register_clkdev(dev, hw, clk_name, NULL); + if (ret) + return dev_err_probe(dev, ret, "Failed to initialize clkdev\n"); if (np) { int i; From 727d7c1c3695657873d62030b968ba97c8698c54 Mon Sep 17 00:00:00 2001 From: Biju Das Date: Wed, 16 Aug 2023 14:55:50 +0100 Subject: [PATCH 479/656] regulator: raa215300: Add const definition Add const definition to the initialized local variable name to avoid overriding. Also the second parameter in strscpy is const char * instead of char *. Signed-off-by: Biju Das Link: https://lore.kernel.org/r/20230816135550.146657-3-biju.das.jz@bp.renesas.com Signed-off-by: Mark Brown --- drivers/regulator/raa215300.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/regulator/raa215300.c b/drivers/regulator/raa215300.c index 898f53cac02c..bdbf1e4ce468 100644 --- a/drivers/regulator/raa215300.c +++ b/drivers/regulator/raa215300.c @@ -119,7 +119,7 @@ static int raa215300_i2c_probe(struct i2c_client *client) } if (clk_name) { - char *name = pmic_version >= 0x12 ? "isl1208" : "raa215300_a0"; + const char *name = pmic_version >= 0x12 ? "isl1208" : "raa215300_a0"; struct device_node *np = client->dev.of_node; u32 addr = RAA215300_RTC_DEFAULT_ADDR; struct i2c_board_info info = {}; From 12a95123bfe1dd1a6020a35f5e67a560591bb02a Mon Sep 17 00:00:00 2001 From: Lucas Tanure Date: Fri, 4 Aug 2023 11:45:57 +0100 Subject: [PATCH 480/656] soundwire: bus: Allow SoundWire peripherals to register IRQ handlers Currently the in-band alerts for SoundWire peripherals can only be communicated to the driver through the interrupt_callback function. This however is slightly inconvenient for devices that wish to share IRQ handling code between SoundWire and I2C/SPI, the later would normally register an IRQ handler with the IRQ subsystem. However there is no reason the SoundWire in-band IRQs can not also be communicated as an actual IRQ to the driver. Add support for SoundWire peripherals to register a normal IRQ handler to receive SoundWire in-band alerts, allowing code to be shared across control buses. Note that we allow users to use both the interrupt_callback and the IRQ handler, this is useful for devices which must clear additional chip specific SoundWire registers that are not a part of the normal IRQ flow, or the SoundWire specification. Signed-off-by: Lucas Tanure Reviewed-by: Pierre-Louis Bossart Acked-by: Bard Liao Acked-by: Vinod Koul Signed-off-by: Charles Keepax Link: https://lore.kernel.org/r/20230804104602.395892-2-ckeepax@opensource.cirrus.com Signed-off-by: Lee Jones --- drivers/soundwire/bus.c | 32 ++++++++++++++++++++++++++++++++ drivers/soundwire/bus_type.c | 12 ++++++++++++ include/linux/soundwire/sdw.h | 9 +++++++++ 3 files changed, 53 insertions(+) diff --git a/drivers/soundwire/bus.c b/drivers/soundwire/bus.c index dba920ec88f6..cf55386256f3 100644 --- a/drivers/soundwire/bus.c +++ b/drivers/soundwire/bus.c @@ -3,6 +3,7 @@ #include #include +#include #include #include #include @@ -25,6 +26,23 @@ static int sdw_get_id(struct sdw_bus *bus) return 0; } +static int sdw_irq_map(struct irq_domain *h, unsigned int virq, + irq_hw_number_t hw) +{ + struct sdw_bus *bus = h->host_data; + + irq_set_chip_data(virq, bus); + irq_set_chip(virq, &bus->irq_chip); + irq_set_nested_thread(virq, 1); + irq_set_noprobe(virq); + + return 0; +} + +static const struct irq_domain_ops sdw_domain_ops = { + .map = sdw_irq_map, +}; + /** * sdw_bus_master_add() - add a bus Master instance * @bus: bus instance @@ -151,6 +169,14 @@ int sdw_bus_master_add(struct sdw_bus *bus, struct device *parent, bus->params.curr_bank = SDW_BANK0; bus->params.next_bank = SDW_BANK1; + bus->irq_chip.name = dev_name(bus->dev); + bus->domain = irq_domain_create_linear(fwnode, SDW_MAX_DEVICES, + &sdw_domain_ops, bus); + if (!bus->domain) { + dev_err(bus->dev, "Failed to add IRQ domain\n"); + return -EINVAL; + } + return 0; } EXPORT_SYMBOL(sdw_bus_master_add); @@ -187,6 +213,9 @@ static int sdw_delete_slave(struct device *dev, void *data) void sdw_bus_master_delete(struct sdw_bus *bus) { device_for_each_child(bus->dev, NULL, sdw_delete_slave); + + irq_domain_remove(bus->domain); + sdw_master_device_del(bus); sdw_bus_debugfs_exit(bus); @@ -1725,6 +1754,9 @@ static int sdw_handle_slave_alerts(struct sdw_slave *slave) struct device *dev = &slave->dev; struct sdw_driver *drv = drv_to_sdw_driver(dev->driver); + if (slave->prop.use_domain_irq && slave->irq) + handle_nested_irq(slave->irq); + if (drv->ops && drv->ops->interrupt_callback) { slave_intr.sdca_cascade = sdca_cascade; slave_intr.control_port = clear; diff --git a/drivers/soundwire/bus_type.c b/drivers/soundwire/bus_type.c index 1f43ee848eac..fafbc284e82d 100644 --- a/drivers/soundwire/bus_type.c +++ b/drivers/soundwire/bus_type.c @@ -122,6 +122,12 @@ static int sdw_drv_probe(struct device *dev) if (drv->ops && drv->ops->read_prop) drv->ops->read_prop(slave); + if (slave->prop.use_domain_irq) { + slave->irq = irq_create_mapping(slave->bus->domain, slave->dev_num); + if (!slave->irq) + dev_warn(dev, "Failed to map IRQ\n"); + } + /* init the sysfs as we have properties now */ ret = sdw_slave_sysfs_init(slave); if (ret < 0) @@ -166,7 +172,13 @@ static int sdw_drv_remove(struct device *dev) int ret = 0; mutex_lock(&slave->sdw_dev_lock); + slave->probed = false; + + if (slave->prop.use_domain_irq) + irq_dispose_mapping(irq_find_mapping(slave->bus->domain, + slave->dev_num)); + mutex_unlock(&slave->sdw_dev_lock); if (drv->remove) diff --git a/include/linux/soundwire/sdw.h b/include/linux/soundwire/sdw.h index f523ceabd059..8923387a7405 100644 --- a/include/linux/soundwire/sdw.h +++ b/include/linux/soundwire/sdw.h @@ -6,6 +6,8 @@ #include #include +#include +#include #include #include @@ -370,6 +372,7 @@ struct sdw_dpn_prop { * @clock_reg_supported: the Peripheral implements the clock base and scale * registers introduced with the SoundWire 1.2 specification. SDCA devices * do not need to set this boolean property as the registers are required. + * @use_domain_irq: call actual IRQ handler on slave, as well as callback */ struct sdw_slave_prop { u32 mipi_revision; @@ -394,6 +397,7 @@ struct sdw_slave_prop { u8 scp_int1_mask; u32 quirks; bool clock_reg_supported; + bool use_domain_irq; }; #define SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY BIT(0) @@ -641,6 +645,7 @@ struct sdw_slave_ops { * struct sdw_slave - SoundWire Slave * @id: MIPI device ID * @dev: Linux device + * @irq: IRQ number * @status: Status reported by the Slave * @bus: Bus handle * @prop: Slave properties @@ -670,6 +675,7 @@ struct sdw_slave_ops { struct sdw_slave { struct sdw_slave_id id; struct device dev; + int irq; enum sdw_slave_status status; struct sdw_bus *bus; struct sdw_slave_prop prop; @@ -885,6 +891,7 @@ struct sdw_master_ops { * is used to compute and program bus bandwidth, clock, frame shape, * transport and port parameters * @debugfs: Bus debugfs + * @domain: IRQ domain * @defer_msg: Defer message * @clk_stop_timeout: Clock stop timeout computed * @bank_switch_timeout: Bank switch timeout computed @@ -920,6 +927,8 @@ struct sdw_bus { #ifdef CONFIG_DEBUG_FS struct dentry *debugfs; #endif + struct irq_chip irq_chip; + struct irq_domain *domain; struct sdw_defer defer_msg; unsigned int clk_stop_timeout; u32 bank_switch_timeout; From ec77cad8d55c0fb39c0b17a682f78df4b92373a5 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 4 Aug 2023 11:45:58 +0100 Subject: [PATCH 481/656] dt-bindings: mfd: cirrus,cs42l43: Add initial DT binding The CS42L43 is an audio CODEC with integrated MIPI SoundWire interface (Version 1.2.1 compliant), I2C, SPI, and I2S/TDM interfaces designed for portable applications. It provides a high dynamic range, stereo DAC for headphone output, two integrated Class D amplifiers for loudspeakers, and two ADCs for wired headset microphone input or stereo line input. PDM inputs are provided for digital microphones. Add a YAML DT binding document for this device. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Charles Keepax Link: https://lore.kernel.org/r/20230804104602.395892-3-ckeepax@opensource.cirrus.com Signed-off-by: Lee Jones --- .../bindings/sound/cirrus,cs42l43.yaml | 313 ++++++++++++++++++ 1 file changed, 313 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/cirrus,cs42l43.yaml diff --git a/Documentation/devicetree/bindings/sound/cirrus,cs42l43.yaml b/Documentation/devicetree/bindings/sound/cirrus,cs42l43.yaml new file mode 100644 index 000000000000..7a6de938b11d --- /dev/null +++ b/Documentation/devicetree/bindings/sound/cirrus,cs42l43.yaml @@ -0,0 +1,313 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/cirrus,cs42l43.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Cirrus Logic CS42L43 Audio CODEC + +maintainers: + - patches@opensource.cirrus.com + +description: | + The CS42L43 is an audio CODEC with integrated MIPI SoundWire interface + (Version 1.2.1 compliant), I2C, SPI, and I2S/TDM interfaces designed + for portable applications. It provides a high dynamic range, stereo + DAC for headphone output, two integrated Class D amplifiers for + loudspeakers, and two ADCs for wired headset microphone input or + stereo line input. PDM inputs are provided for digital microphones. + +allOf: + - $ref: dai-common.yaml# + +properties: + compatible: + enum: + - cirrus,cs42l43 + + reg: + maxItems: 1 + + vdd-p-supply: + description: + Power supply for the high voltage interface. + + vdd-a-supply: + description: + Power supply for internal analog circuits. + + vdd-d-supply: + description: + Power supply for internal digital circuits. Can be internally supplied. + + vdd-io-supply: + description: + Power supply for external interface and internal digital logic. + + vdd-cp-supply: + description: + Power supply for the amplifier 3 and 4 charge pump. + + vdd-amp-supply: + description: + Power supply for amplifier 1 and 2. + + reset-gpios: + maxItems: 1 + + interrupt-controller: true + + "#interrupt-cells": + const: 2 + + interrupts: + maxItems: 1 + + "#sound-dai-cells": + const: 1 + + clocks: + items: + - description: Synchronous audio clock provided on mclk_in. + + clock-names: + const: mclk + + cirrus,bias-low: + type: boolean + description: + Select a 1.8V headset micbias rather than 2.8V. + + cirrus,bias-sense-microamp: + description: + Current at which the headset micbias sense clamp will engage, 0 to + disable. + enum: [ 0, 14, 23, 41, 50, 60, 68, 86, 95 ] + default: 0 + + cirrus,bias-ramp-ms: + description: + Time in milliseconds the hardware allows for the headset micbias to + ramp up. + enum: [ 10, 40, 90, 170 ] + default: 170 + + cirrus,detect-us: + description: + Time in microseconds the type detection will run for. Long values will + cause more audible effects, but give more accurate detection. + enum: [ 20, 100, 1000, 10000, 50000, 75000, 100000, 200000 ] + default: 10000 + + cirrus,button-automute: + type: boolean + description: + Enable the hardware automuting of decimator 1 when a headset button is + pressed. + + cirrus,buttons-ohms: + description: + Impedance in Ohms for each headset button, these should be listed in + ascending order. + minItems: 1 + maxItems: 6 + + cirrus,tip-debounce-ms: + description: + Software debounce on tip sense triggering in milliseconds. + default: 0 + + cirrus,tip-invert: + type: boolean + description: + Indicates tip detect polarity, inverted implies open-circuit whilst the + jack is inserted. + + cirrus,tip-disable-pullup: + type: boolean + description: + Indicates if the internal pullup on the tip detect should be disabled. + + cirrus,tip-fall-db-ms: + description: + Time in milliseconds a falling edge on the tip detect should be hardware + debounced for. Note the falling edge is considered after the invert. + enum: [ 0, 125, 250, 500, 750, 1000, 1250, 1500 ] + default: 500 + + cirrus,tip-rise-db-ms: + description: + Time in milliseconds a rising edge on the tip detect should be hardware + debounced for. Note the rising edge is considered after the invert. + enum: [ 0, 125, 250, 500, 750, 1000, 1250, 1500 ] + default: 500 + + cirrus,use-ring-sense: + type: boolean + description: + Indicates if the ring sense should be used. + + cirrus,ring-invert: + type: boolean + description: + Indicates ring detect polarity, inverted implies open-circuit whilst the + jack is inserted. + + cirrus,ring-disable-pullup: + type: boolean + description: + Indicates if the internal pullup on the ring detect should be disabled. + + cirrus,ring-fall-db-ms: + description: + Time in milliseconds a falling edge on the ring detect should be hardware + debounced for. Note the falling edge is considered after the invert. + enum: [ 0, 125, 250, 500, 750, 1000, 1250, 1500 ] + default: 500 + + cirrus,ring-rise-db-ms: + description: + Time in milliseconds a rising edge on the ring detect should be hardware + debounced for. Note the rising edge is considered after the invert. + enum: [ 0, 125, 250, 500, 750, 1000, 1250, 1500 ] + default: 500 + + pinctrl: + type: object + $ref: /schemas/pinctrl/pinctrl.yaml# + additionalProperties: false + + properties: + gpio-controller: true + + "#gpio-cells": + const: 2 + + gpio-ranges: + items: + - description: A phandle to the CODEC pinctrl node + minimum: 0 + - const: 0 + - const: 0 + - const: 3 + + patternProperties: + "-state$": + oneOf: + - $ref: "#/$defs/cirrus-cs42l43-state" + - patternProperties: + "-pins$": + $ref: "#/$defs/cirrus-cs42l43-state" + additionalProperties: false + + spi: + type: object + $ref: /schemas/spi/spi-controller.yaml# + unevaluatedProperties: false + +$defs: + cirrus-cs42l43-state: + type: object + + allOf: + - $ref: /schemas/pinctrl/pincfg-node.yaml# + - $ref: /schemas/pinctrl/pinmux-node.yaml# + + oneOf: + - required: [ groups ] + - required: [ pins ] + + additionalProperties: false + + properties: + groups: + enum: [ gpio1, gpio2, gpio3, asp, pdmout2, pdmout1, i2c, spi ] + + pins: + enum: [ gpio1, gpio2, gpio3, + asp_dout, asp_fsync, asp_bclk, + pdmout2_clk, pdmout2_data, pdmout1_clk, pdmout1_data, + i2c_sda, i2c_scl, + spi_miso, spi_sck, spi_ssb ] + + function: + enum: [ gpio, spdif, irq, mic-shutter, spk-shutter ] + + drive-strength: + description: Set drive strength in mA + enum: [ 1, 2, 4, 8, 9, 10, 12, 16 ] + + input-debounce: + description: Set input debounce in uS + enum: [ 0, 85 ] + +required: + - compatible + - reg + - vdd-p-supply + - vdd-a-supply + - vdd-io-supply + - vdd-cp-supply + +additionalProperties: false + +examples: + - | + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + cs42l43: codec@1a { + compatible = "cirrus,cs42l43"; + reg = <0x1a>; + + vdd-p-supply = <&vdd5v0>; + vdd-a-supply = <&vdd1v8>; + vdd-io-supply = <&vdd1v8>; + vdd-cp-supply = <&vdd1v8>; + vdd-amp-supply = <&vdd5v0>; + + reset-gpios = <&gpio 0>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&gpio>; + interrupts = <56 IRQ_TYPE_LEVEL_LOW>; + + #sound-dai-cells = <1>; + + clocks = <&clks 0>; + clock-names = "mclk"; + + cs42l43_pins: pinctrl { + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&cs42l43_pins 0 0 3>; + + pinctrl-names = "default"; + pinctrl-0 = <&pinsettings>; + + pinsettings: default-state { + shutter-pins { + groups = "gpio3"; + function = "mic-shutter"; + }; + }; + }; + + spi { + #address-cells = <1>; + #size-cells = <0>; + + cs-gpios = <&cs42l43_pins 1 0>; + + sensor@0 { + compatible = "bosch,bme680"; + reg = <0>; + spi-max-frequency = <1400000>; + }; + }; + }; + }; From ace6d14481386ec6c1b63cc2b24c71433a583dc2 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 4 Aug 2023 11:45:59 +0100 Subject: [PATCH 482/656] mfd: cs42l43: Add support for cs42l43 core driver The CS42L43 is an audio CODEC with integrated MIPI SoundWire interface (Version 1.2.1 compliant), I2C, SPI, and I2S/TDM interfaces designed for portable applications. It provides a high dynamic range, stereo DAC for headphone output, two integrated Class D amplifiers for loudspeakers, and two ADCs for wired headset microphone input or stereo line input. PDM inputs are provided for digital microphones. The MFD component registers and initialises the device and provides PM/system power management. Signed-off-by: Charles Keepax Link: https://lore.kernel.org/r/20230804104602.395892-4-ckeepax@opensource.cirrus.com Signed-off-by: Lee Jones --- MAINTAINERS | 2 + drivers/mfd/Kconfig | 23 + drivers/mfd/Makefile | 3 + drivers/mfd/cs42l43-i2c.c | 98 +++ drivers/mfd/cs42l43-sdw.c | 239 ++++++ drivers/mfd/cs42l43.c | 1188 ++++++++++++++++++++++++++++++ drivers/mfd/cs42l43.h | 28 + include/linux/mfd/cs42l43-regs.h | 1184 +++++++++++++++++++++++++++++ include/linux/mfd/cs42l43.h | 102 +++ 9 files changed, 2867 insertions(+) create mode 100644 drivers/mfd/cs42l43-i2c.c create mode 100644 drivers/mfd/cs42l43-sdw.c create mode 100644 drivers/mfd/cs42l43.c create mode 100644 drivers/mfd/cs42l43.h create mode 100644 include/linux/mfd/cs42l43-regs.h create mode 100644 include/linux/mfd/cs42l43.h diff --git a/MAINTAINERS b/MAINTAINERS index 3be1bdfe8ecc..45aa18c45d20 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -4879,7 +4879,9 @@ L: alsa-devel@alsa-project.org (moderated for non-subscribers) L: patches@opensource.cirrus.com S: Maintained F: Documentation/devicetree/bindings/sound/cirrus,cs* +F: drivers/mfd/cs42l43* F: include/dt-bindings/sound/cs* +F: include/linux/mfd/cs42l43* F: include/sound/cs* F: sound/pci/hda/cs* F: sound/pci/hda/hda_cs_dsp_ctl.* diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 6f5b259a6d6a..85be64579fc9 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -237,6 +237,29 @@ config MFD_CROS_EC_DEV To compile this driver as a module, choose M here: the module will be called cros-ec-dev. +config MFD_CS42L43 + tristate + select MFD_CORE + select REGMAP + +config MFD_CS42L43_I2C + tristate "Cirrus Logic CS42L43 (I2C)" + depends on I2C + select REGMAP_I2C + select MFD_CS42L43 + help + Select this to support the Cirrus Logic CS42L43 PC CODEC with + headphone and class D speaker drivers over I2C. + +config MFD_CS42L43_SDW + tristate "Cirrus Logic CS42L43 (SoundWire)" + depends on SOUNDWIRE + select REGMAP_SOUNDWIRE + select MFD_CS42L43 + help + Select this to support the Cirrus Logic CS42L43 PC CODEC with + headphone and class D speaker drivers over SoundWire. + config MFD_MADERA tristate "Cirrus Logic Madera codecs" select MFD_CORE diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index f3d1f1dc73b5..c66f07edcd0e 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -13,6 +13,9 @@ obj-$(CONFIG_ARCH_BCM2835) += bcm2835-pm.o obj-$(CONFIG_MFD_BCM590XX) += bcm590xx.o obj-$(CONFIG_MFD_BD9571MWV) += bd9571mwv.o obj-$(CONFIG_MFD_CROS_EC_DEV) += cros_ec_dev.o +obj-$(CONFIG_MFD_CS42L43) += cs42l43.o +obj-$(CONFIG_MFD_CS42L43_I2C) += cs42l43-i2c.o +obj-$(CONFIG_MFD_CS42L43_SDW) += cs42l43-sdw.o obj-$(CONFIG_MFD_ENE_KB3930) += ene-kb3930.o obj-$(CONFIG_MFD_EXYNOS_LPASS) += exynos-lpass.o obj-$(CONFIG_MFD_GATEWORKS_GSC) += gateworks-gsc.o diff --git a/drivers/mfd/cs42l43-i2c.c b/drivers/mfd/cs42l43-i2c.c new file mode 100644 index 000000000000..4922211680c9 --- /dev/null +++ b/drivers/mfd/cs42l43-i2c.c @@ -0,0 +1,98 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * CS42L43 I2C driver + * + * Copyright (C) 2022-2023 Cirrus Logic, Inc. and + * Cirrus Logic International Semiconductor Ltd. + */ + +#include +#include +#include +#include +#include + +#include "cs42l43.h" + +static const struct regmap_config cs42l43_i2c_regmap = { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, + .reg_format_endian = REGMAP_ENDIAN_BIG, + .val_format_endian = REGMAP_ENDIAN_BIG, + + .max_register = CS42L43_MCU_RAM_MAX, + .readable_reg = cs42l43_readable_register, + .volatile_reg = cs42l43_volatile_register, + .precious_reg = cs42l43_precious_register, + + .cache_type = REGCACHE_MAPLE, + .reg_defaults = cs42l43_reg_default, + .num_reg_defaults = ARRAY_SIZE(cs42l43_reg_default), +}; + +static int cs42l43_i2c_probe(struct i2c_client *i2c) +{ + struct cs42l43 *cs42l43; + int ret; + + cs42l43 = devm_kzalloc(&i2c->dev, sizeof(*cs42l43), GFP_KERNEL); + if (!cs42l43) + return -ENOMEM; + + cs42l43->dev = &i2c->dev; + cs42l43->irq = i2c->irq; + /* A device on an I2C is always attached by definition. */ + cs42l43->attached = true; + + cs42l43->regmap = devm_regmap_init_i2c(i2c, &cs42l43_i2c_regmap); + if (IS_ERR(cs42l43->regmap)) { + ret = PTR_ERR(cs42l43->regmap); + dev_err(cs42l43->dev, "Failed to allocate regmap: %d\n", ret); + return ret; + } + + return cs42l43_dev_probe(cs42l43); +} + +static void cs42l43_i2c_remove(struct i2c_client *i2c) +{ + struct cs42l43 *cs42l43 = dev_get_drvdata(&i2c->dev); + + cs42l43_dev_remove(cs42l43); +} + +#if IS_ENABLED(CONFIG_OF) +static const struct of_device_id cs42l43_of_match[] = { + { .compatible = "cirrus,cs42l43", }, + {} +}; +MODULE_DEVICE_TABLE(of, cs42l43_of_match); +#endif + +#if IS_ENABLED(CONFIG_ACPI) +static const struct acpi_device_id cs42l43_acpi_match[] = { + { "CSC4243", 0 }, + {} +}; +MODULE_DEVICE_TABLE(acpi, cs42l43_acpi_match); +#endif + +static struct i2c_driver cs42l43_i2c_driver = { + .driver = { + .name = "cs42l43", + .pm = pm_ptr(&cs42l43_pm_ops), + .of_match_table = of_match_ptr(cs42l43_of_match), + .acpi_match_table = ACPI_PTR(cs42l43_acpi_match), + }, + + .probe = cs42l43_i2c_probe, + .remove = cs42l43_i2c_remove, +}; +module_i2c_driver(cs42l43_i2c_driver); + +MODULE_IMPORT_NS(MFD_CS42L43); + +MODULE_DESCRIPTION("CS42L43 I2C Driver"); +MODULE_AUTHOR("Charles Keepax "); +MODULE_LICENSE("GPL"); diff --git a/drivers/mfd/cs42l43-sdw.c b/drivers/mfd/cs42l43-sdw.c new file mode 100644 index 000000000000..7392b3d2e6b9 --- /dev/null +++ b/drivers/mfd/cs42l43-sdw.c @@ -0,0 +1,239 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * CS42L43 SoundWire driver + * + * Copyright (C) 2022-2023 Cirrus Logic, Inc. and + * Cirrus Logic International Semiconductor Ltd. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "cs42l43.h" + +enum cs42l43_sdw_ports { + CS42L43_DMIC_DEC_ASP_PORT = 1, + CS42L43_SPK_TX_PORT, + CS42L43_SPDIF_HP_PORT, + CS42L43_SPK_RX_PORT, + CS42L43_ASP_PORT, +}; + +static const struct regmap_config cs42l43_sdw_regmap = { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, + .reg_format_endian = REGMAP_ENDIAN_LITTLE, + .val_format_endian = REGMAP_ENDIAN_LITTLE, + + .max_register = CS42L43_MCU_RAM_MAX, + .readable_reg = cs42l43_readable_register, + .volatile_reg = cs42l43_volatile_register, + .precious_reg = cs42l43_precious_register, + + .cache_type = REGCACHE_MAPLE, + .reg_defaults = cs42l43_reg_default, + .num_reg_defaults = ARRAY_SIZE(cs42l43_reg_default), +}; + +static int cs42l43_read_prop(struct sdw_slave *sdw) +{ + struct sdw_slave_prop *prop = &sdw->prop; + struct device *dev = &sdw->dev; + struct sdw_dpn_prop *dpn; + unsigned long addr; + int nval; + int i; + u32 bit; + + prop->use_domain_irq = true; + prop->paging_support = true; + prop->wake_capable = true; + prop->source_ports = BIT(CS42L43_DMIC_DEC_ASP_PORT) | BIT(CS42L43_SPK_TX_PORT); + prop->sink_ports = BIT(CS42L43_SPDIF_HP_PORT) | + BIT(CS42L43_SPK_RX_PORT) | BIT(CS42L43_ASP_PORT); + prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY; + prop->scp_int1_mask = SDW_SCP_INT1_BUS_CLASH | SDW_SCP_INT1_PARITY | + SDW_SCP_INT1_IMPL_DEF; + + nval = hweight32(prop->source_ports); + prop->src_dpn_prop = devm_kcalloc(dev, nval, sizeof(*prop->src_dpn_prop), + GFP_KERNEL); + if (!prop->src_dpn_prop) + return -ENOMEM; + + i = 0; + dpn = prop->src_dpn_prop; + addr = prop->source_ports; + for_each_set_bit(bit, &addr, 32) { + dpn[i].num = bit; + dpn[i].max_ch = 2; + dpn[i].type = SDW_DPN_FULL; + dpn[i].max_word = 24; + i++; + } + /* + * All ports are 2 channels max, except the first one, + * CS42L43_DMIC_DEC_ASP_PORT. + */ + dpn[CS42L43_DMIC_DEC_ASP_PORT].max_ch = 4; + + nval = hweight32(prop->sink_ports); + prop->sink_dpn_prop = devm_kcalloc(dev, nval, sizeof(*prop->sink_dpn_prop), + GFP_KERNEL); + if (!prop->sink_dpn_prop) + return -ENOMEM; + + i = 0; + dpn = prop->sink_dpn_prop; + addr = prop->sink_ports; + for_each_set_bit(bit, &addr, 32) { + dpn[i].num = bit; + dpn[i].max_ch = 2; + dpn[i].type = SDW_DPN_FULL; + dpn[i].max_word = 24; + i++; + } + + return 0; +} + +static int cs42l43_sdw_update_status(struct sdw_slave *sdw, enum sdw_slave_status status) +{ + struct cs42l43 *cs42l43 = dev_get_drvdata(&sdw->dev); + + switch (status) { + case SDW_SLAVE_ATTACHED: + dev_dbg(cs42l43->dev, "Device attach\n"); + + sdw_write_no_pm(sdw, CS42L43_GEN_INT_MASK_1, + CS42L43_INT_STAT_GEN1_MASK); + + cs42l43->attached = true; + + complete(&cs42l43->device_attach); + break; + case SDW_SLAVE_UNATTACHED: + dev_dbg(cs42l43->dev, "Device detach\n"); + + cs42l43->attached = false; + + reinit_completion(&cs42l43->device_attach); + complete(&cs42l43->device_detach); + break; + default: + break; + } + + return 0; +} + +static int cs42l43_sdw_interrupt(struct sdw_slave *sdw, + struct sdw_slave_intr_status *status) +{ + /* + * The IRQ itself was handled through the regmap_irq handler, this is + * just clearing up the additional Cirrus SoundWire registers that are + * not covered by the SoundWire framework or the IRQ handler itself. + * There is only a single bit in GEN_INT_STAT_1 and it doesn't clear if + * IRQs are still pending so doing a read/write here after handling the + * IRQ is fine. + */ + sdw_read_no_pm(sdw, CS42L43_GEN_INT_STAT_1); + sdw_write_no_pm(sdw, CS42L43_GEN_INT_STAT_1, CS42L43_INT_STAT_GEN1_MASK); + + return 0; +} + +static int cs42l43_sdw_bus_config(struct sdw_slave *sdw, + struct sdw_bus_params *params) +{ + struct cs42l43 *cs42l43 = dev_get_drvdata(&sdw->dev); + int ret = 0; + + mutex_lock(&cs42l43->pll_lock); + + if (cs42l43->sdw_freq != params->curr_dr_freq / 2) { + if (cs42l43->sdw_pll_active) { + dev_err(cs42l43->dev, + "PLL active can't change SoundWire bus clock\n"); + ret = -EBUSY; + } else { + cs42l43->sdw_freq = params->curr_dr_freq / 2; + } + } + + mutex_unlock(&cs42l43->pll_lock); + + return ret; +} + +static const struct sdw_slave_ops cs42l43_sdw_ops = { + .read_prop = cs42l43_read_prop, + .update_status = cs42l43_sdw_update_status, + .interrupt_callback = cs42l43_sdw_interrupt, + .bus_config = cs42l43_sdw_bus_config, +}; + +static int cs42l43_sdw_probe(struct sdw_slave *sdw, const struct sdw_device_id *id) +{ + struct cs42l43 *cs42l43; + struct device *dev = &sdw->dev; + int ret; + + cs42l43 = devm_kzalloc(dev, sizeof(*cs42l43), GFP_KERNEL); + if (!cs42l43) + return -ENOMEM; + + cs42l43->dev = dev; + cs42l43->sdw = sdw; + + cs42l43->regmap = devm_regmap_init_sdw(sdw, &cs42l43_sdw_regmap); + if (IS_ERR(cs42l43->regmap)) { + ret = PTR_ERR(cs42l43->regmap); + dev_err(cs42l43->dev, "Failed to allocate regmap: %d\n", ret); + return ret; + } + + return cs42l43_dev_probe(cs42l43); +} + +static int cs42l43_sdw_remove(struct sdw_slave *sdw) +{ + struct cs42l43 *cs42l43 = dev_get_drvdata(&sdw->dev); + + cs42l43_dev_remove(cs42l43); + + return 0; +} + +static const struct sdw_device_id cs42l43_sdw_id[] = { + SDW_SLAVE_ENTRY(0x01FA, 0x4243, 0), + {} +}; +MODULE_DEVICE_TABLE(sdw, cs42l43_sdw_id); + +static struct sdw_driver cs42l43_sdw_driver = { + .driver = { + .name = "cs42l43", + .pm = pm_ptr(&cs42l43_pm_ops), + }, + + .probe = cs42l43_sdw_probe, + .remove = cs42l43_sdw_remove, + .id_table = cs42l43_sdw_id, + .ops = &cs42l43_sdw_ops, +}; +module_sdw_driver(cs42l43_sdw_driver); + +MODULE_IMPORT_NS(MFD_CS42L43); + +MODULE_DESCRIPTION("CS42L43 SoundWire Driver"); +MODULE_AUTHOR("Lucas Tanure "); +MODULE_LICENSE("GPL"); diff --git a/drivers/mfd/cs42l43.c b/drivers/mfd/cs42l43.c new file mode 100644 index 000000000000..37b23e9bae82 --- /dev/null +++ b/drivers/mfd/cs42l43.c @@ -0,0 +1,1188 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * CS42L43 core driver + * + * Copyright (C) 2022-2023 Cirrus Logic, Inc. and + * Cirrus Logic International Semiconductor Ltd. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "cs42l43.h" + +#define CS42L43_RESET_DELAY 20 + +#define CS42L43_SDW_ATTACH_TIMEOUT 500 +#define CS42L43_SDW_DETACH_TIMEOUT 100 + +#define CS42L43_MCU_BOOT_STAGE1 1 +#define CS42L43_MCU_BOOT_STAGE2 2 +#define CS42L43_MCU_BOOT_STAGE3 3 +#define CS42L43_MCU_BOOT_STAGE4 4 +#define CS42L43_MCU_POLL 5000 +#define CS42L43_MCU_CMD_TIMEOUT 20000 +#define CS42L43_MCU_UPDATE_FORMAT 3 +#define CS42L43_MCU_UPDATE_OFFSET 0x100000 +#define CS42L43_MCU_UPDATE_TIMEOUT 500000 +#define CS42L43_MCU_UPDATE_RETRIES 5 + +#define CS42L43_MCU_SUPPORTED_REV 0x2105 +#define CS42L43_MCU_SHADOW_REGS_REQUIRED_REV 0x2200 +#define CS42L43_MCU_SUPPORTED_BIOS_REV 0x0001 + +#define CS42L43_VDDP_DELAY 50 +#define CS42L43_VDDD_DELAY 1000 + +#define CS42L43_AUTOSUSPEND_TIME 250 + +struct cs42l43_patch_header { + __le16 version; + __le16 size; + u8 reserved; + u8 secure; + __le16 bss_size; + __le32 apply_addr; + __le32 checksum; + __le32 sha; + __le16 swrev; + __le16 patchid; + __le16 ipxid; + __le16 romver; + __le32 load_addr; +} __packed; + +static const struct reg_sequence cs42l43_reva_patch[] = { + { 0x4000, 0x00000055 }, + { 0x4000, 0x000000AA }, + { 0x10084, 0x00000000 }, + { 0x1741C, 0x00CD2000 }, + { 0x1718C, 0x00000003 }, + { 0x4000, 0x00000000 }, + { CS42L43_CCM_BLK_CLK_CONTROL, 0x00000002 }, + { CS42L43_HPPATHVOL, 0x011B011B }, + { CS42L43_OSC_DIV_SEL, 0x00000001 }, + { CS42L43_DACCNFG2, 0x00000005 }, + { CS42L43_MIC_DETECT_CONTROL_ANDROID, 0x80790079 }, + { CS42L43_RELID, 0x0000000F }, +}; + +const struct reg_default cs42l43_reg_default[CS42L43_N_DEFAULTS] = { + { CS42L43_DRV_CTRL1, 0x000186C0 }, + { CS42L43_DRV_CTRL3, 0x286DB018 }, + { CS42L43_DRV_CTRL4, 0x000006D8 }, + { CS42L43_DRV_CTRL_5, 0x136C00C0 }, + { CS42L43_GPIO_CTRL1, 0x00000707 }, + { CS42L43_GPIO_CTRL2, 0x00000000 }, + { CS42L43_GPIO_FN_SEL, 0x00000000 }, + { CS42L43_MCLK_SRC_SEL, 0x00000000 }, + { CS42L43_SAMPLE_RATE1, 0x00000003 }, + { CS42L43_SAMPLE_RATE2, 0x00000003 }, + { CS42L43_SAMPLE_RATE3, 0x00000003 }, + { CS42L43_SAMPLE_RATE4, 0x00000003 }, + { CS42L43_PLL_CONTROL, 0x00000000 }, + { CS42L43_FS_SELECT1, 0x00000000 }, + { CS42L43_FS_SELECT2, 0x00000000 }, + { CS42L43_FS_SELECT3, 0x00000000 }, + { CS42L43_FS_SELECT4, 0x00000000 }, + { CS42L43_PDM_CONTROL, 0x00000000 }, + { CS42L43_ASP_CLK_CONFIG1, 0x00010001 }, + { CS42L43_ASP_CLK_CONFIG2, 0x00000000 }, + { CS42L43_OSC_DIV_SEL, 0x00000001 }, + { CS42L43_ADC_B_CTRL1, 0x00000000 }, + { CS42L43_ADC_B_CTRL2, 0x00000000 }, + { CS42L43_DECIM_HPF_WNF_CTRL1, 0x00000001 }, + { CS42L43_DECIM_HPF_WNF_CTRL2, 0x00000001 }, + { CS42L43_DECIM_HPF_WNF_CTRL3, 0x00000001 }, + { CS42L43_DECIM_HPF_WNF_CTRL4, 0x00000001 }, + { CS42L43_DMIC_PDM_CTRL, 0x00000000 }, + { CS42L43_DECIM_VOL_CTRL_CH1_CH2, 0x20122012 }, + { CS42L43_DECIM_VOL_CTRL_CH3_CH4, 0x20122012 }, + { CS42L43_INTP_VOLUME_CTRL1, 0x00000180 }, + { CS42L43_INTP_VOLUME_CTRL2, 0x00000180 }, + { CS42L43_AMP1_2_VOL_RAMP, 0x00000022 }, + { CS42L43_ASP_CTRL, 0x00000004 }, + { CS42L43_ASP_FSYNC_CTRL1, 0x000000FA }, + { CS42L43_ASP_FSYNC_CTRL2, 0x00000001 }, + { CS42L43_ASP_FSYNC_CTRL3, 0x00000000 }, + { CS42L43_ASP_FSYNC_CTRL4, 0x000001F4 }, + { CS42L43_ASP_DATA_CTRL, 0x0000003A }, + { CS42L43_ASP_RX_EN, 0x00000000 }, + { CS42L43_ASP_TX_EN, 0x00000000 }, + { CS42L43_ASP_RX_CH1_CTRL, 0x00170001 }, + { CS42L43_ASP_RX_CH2_CTRL, 0x00170031 }, + { CS42L43_ASP_RX_CH3_CTRL, 0x00170061 }, + { CS42L43_ASP_RX_CH4_CTRL, 0x00170091 }, + { CS42L43_ASP_RX_CH5_CTRL, 0x001700C1 }, + { CS42L43_ASP_RX_CH6_CTRL, 0x001700F1 }, + { CS42L43_ASP_TX_CH1_CTRL, 0x00170001 }, + { CS42L43_ASP_TX_CH2_CTRL, 0x00170031 }, + { CS42L43_ASP_TX_CH3_CTRL, 0x00170061 }, + { CS42L43_ASP_TX_CH4_CTRL, 0x00170091 }, + { CS42L43_ASP_TX_CH5_CTRL, 0x001700C1 }, + { CS42L43_ASP_TX_CH6_CTRL, 0x001700F1 }, + { CS42L43_ASPTX1_INPUT, 0x00800000 }, + { CS42L43_ASPTX2_INPUT, 0x00800000 }, + { CS42L43_ASPTX3_INPUT, 0x00800000 }, + { CS42L43_ASPTX4_INPUT, 0x00800000 }, + { CS42L43_ASPTX5_INPUT, 0x00800000 }, + { CS42L43_ASPTX6_INPUT, 0x00800000 }, + { CS42L43_SWIRE_DP1_CH1_INPUT, 0x00800000 }, + { CS42L43_SWIRE_DP1_CH2_INPUT, 0x00800000 }, + { CS42L43_SWIRE_DP1_CH3_INPUT, 0x00800000 }, + { CS42L43_SWIRE_DP1_CH4_INPUT, 0x00800000 }, + { CS42L43_SWIRE_DP2_CH1_INPUT, 0x00800000 }, + { CS42L43_SWIRE_DP2_CH2_INPUT, 0x00800000 }, + { CS42L43_SWIRE_DP3_CH1_INPUT, 0x00800000 }, + { CS42L43_SWIRE_DP3_CH2_INPUT, 0x00800000 }, + { CS42L43_SWIRE_DP4_CH1_INPUT, 0x00800000 }, + { CS42L43_SWIRE_DP4_CH2_INPUT, 0x00800000 }, + { CS42L43_ASRC_INT1_INPUT1, 0x00800000 }, + { CS42L43_ASRC_INT2_INPUT1, 0x00800000 }, + { CS42L43_ASRC_INT3_INPUT1, 0x00800000 }, + { CS42L43_ASRC_INT4_INPUT1, 0x00800000 }, + { CS42L43_ASRC_DEC1_INPUT1, 0x00800000 }, + { CS42L43_ASRC_DEC2_INPUT1, 0x00800000 }, + { CS42L43_ASRC_DEC3_INPUT1, 0x00800000 }, + { CS42L43_ASRC_DEC4_INPUT1, 0x00800000 }, + { CS42L43_ISRC1INT1_INPUT1, 0x00800000 }, + { CS42L43_ISRC1INT2_INPUT1, 0x00800000 }, + { CS42L43_ISRC1DEC1_INPUT1, 0x00800000 }, + { CS42L43_ISRC1DEC2_INPUT1, 0x00800000 }, + { CS42L43_ISRC2INT1_INPUT1, 0x00800000 }, + { CS42L43_ISRC2INT2_INPUT1, 0x00800000 }, + { CS42L43_ISRC2DEC1_INPUT1, 0x00800000 }, + { CS42L43_ISRC2DEC2_INPUT1, 0x00800000 }, + { CS42L43_EQ1MIX_INPUT1, 0x00800000 }, + { CS42L43_EQ1MIX_INPUT2, 0x00800000 }, + { CS42L43_EQ1MIX_INPUT3, 0x00800000 }, + { CS42L43_EQ1MIX_INPUT4, 0x00800000 }, + { CS42L43_EQ2MIX_INPUT1, 0x00800000 }, + { CS42L43_EQ2MIX_INPUT2, 0x00800000 }, + { CS42L43_EQ2MIX_INPUT3, 0x00800000 }, + { CS42L43_EQ2MIX_INPUT4, 0x00800000 }, + { CS42L43_SPDIF1_INPUT1, 0x00800000 }, + { CS42L43_SPDIF2_INPUT1, 0x00800000 }, + { CS42L43_AMP1MIX_INPUT1, 0x00800000 }, + { CS42L43_AMP1MIX_INPUT2, 0x00800000 }, + { CS42L43_AMP1MIX_INPUT3, 0x00800000 }, + { CS42L43_AMP1MIX_INPUT4, 0x00800000 }, + { CS42L43_AMP2MIX_INPUT1, 0x00800000 }, + { CS42L43_AMP2MIX_INPUT2, 0x00800000 }, + { CS42L43_AMP2MIX_INPUT3, 0x00800000 }, + { CS42L43_AMP2MIX_INPUT4, 0x00800000 }, + { CS42L43_AMP3MIX_INPUT1, 0x00800000 }, + { CS42L43_AMP3MIX_INPUT2, 0x00800000 }, + { CS42L43_AMP3MIX_INPUT3, 0x00800000 }, + { CS42L43_AMP3MIX_INPUT4, 0x00800000 }, + { CS42L43_AMP4MIX_INPUT1, 0x00800000 }, + { CS42L43_AMP4MIX_INPUT2, 0x00800000 }, + { CS42L43_AMP4MIX_INPUT3, 0x00800000 }, + { CS42L43_AMP4MIX_INPUT4, 0x00800000 }, + { CS42L43_ASRC_INT_ENABLES, 0x00000100 }, + { CS42L43_ASRC_DEC_ENABLES, 0x00000100 }, + { CS42L43_PDNCNTL, 0x00000000 }, + { CS42L43_RINGSENSE_DEB_CTRL, 0x0000001B }, + { CS42L43_TIPSENSE_DEB_CTRL, 0x0000001B }, + { CS42L43_HS2, 0x050106F3 }, + { CS42L43_STEREO_MIC_CTRL, 0x00000000 }, + { CS42L43_STEREO_MIC_CLAMP_CTRL, 0x00000001 }, + { CS42L43_BLOCK_EN2, 0x00000000 }, + { CS42L43_BLOCK_EN3, 0x00000000 }, + { CS42L43_BLOCK_EN4, 0x00000000 }, + { CS42L43_BLOCK_EN5, 0x00000000 }, + { CS42L43_BLOCK_EN6, 0x00000000 }, + { CS42L43_BLOCK_EN7, 0x00000000 }, + { CS42L43_BLOCK_EN8, 0x00000000 }, + { CS42L43_BLOCK_EN9, 0x00000000 }, + { CS42L43_BLOCK_EN10, 0x00000000 }, + { CS42L43_BLOCK_EN11, 0x00000000 }, + { CS42L43_TONE_CH1_CTRL, 0x00000000 }, + { CS42L43_TONE_CH2_CTRL, 0x00000000 }, + { CS42L43_MIC_DETECT_CONTROL_1, 0x00000003 }, + { CS42L43_HS_BIAS_SENSE_AND_CLAMP_AUTOCONTROL, 0x02000003 }, + { CS42L43_MIC_DETECT_CONTROL_ANDROID, 0x80790079 }, + { CS42L43_ISRC1_CTRL, 0x00000000 }, + { CS42L43_ISRC2_CTRL, 0x00000000 }, + { CS42L43_CTRL_REG, 0x00000006 }, + { CS42L43_FDIV_FRAC, 0x40000000 }, + { CS42L43_CAL_RATIO, 0x00000080 }, + { CS42L43_SPI_CLK_CONFIG1, 0x00000000 }, + { CS42L43_SPI_CONFIG1, 0x00000000 }, + { CS42L43_SPI_CONFIG2, 0x00000000 }, + { CS42L43_SPI_CONFIG3, 0x00000001 }, + { CS42L43_SPI_CONFIG4, 0x00000000 }, + { CS42L43_TRAN_CONFIG3, 0x00000000 }, + { CS42L43_TRAN_CONFIG4, 0x00000000 }, + { CS42L43_TRAN_CONFIG5, 0x00000000 }, + { CS42L43_TRAN_CONFIG6, 0x00000000 }, + { CS42L43_TRAN_CONFIG7, 0x00000000 }, + { CS42L43_TRAN_CONFIG8, 0x00000000 }, + { CS42L43_DACCNFG1, 0x00000008 }, + { CS42L43_DACCNFG2, 0x00000005 }, + { CS42L43_HPPATHVOL, 0x011B011B }, + { CS42L43_PGAVOL, 0x00003470 }, + { CS42L43_LOADDETENA, 0x00000000 }, + { CS42L43_CTRL, 0x00000037 }, + { CS42L43_COEFF_DATA_IN0, 0x00000000 }, + { CS42L43_COEFF_RD_WR0, 0x00000000 }, + { CS42L43_START_EQZ0, 0x00000000 }, + { CS42L43_MUTE_EQ_IN0, 0x00000000 }, + { CS42L43_DECIM_MASK, 0x0000000F }, + { CS42L43_EQ_MIX_MASK, 0x0000000F }, + { CS42L43_ASP_MASK, 0x000000FF }, + { CS42L43_PLL_MASK, 0x00000003 }, + { CS42L43_SOFT_MASK, 0x0000FFFF }, + { CS42L43_SWIRE_MASK, 0x00007FFF }, + { CS42L43_MSM_MASK, 0x00000FFF }, + { CS42L43_ACC_DET_MASK, 0x00000FFF }, + { CS42L43_I2C_TGT_MASK, 0x00000003 }, + { CS42L43_SPI_MSTR_MASK, 0x00000007 }, + { CS42L43_SW_TO_SPI_BRIDGE_MASK, 0x00000001 }, + { CS42L43_OTP_MASK, 0x00000007 }, + { CS42L43_CLASS_D_AMP_MASK, 0x00003FFF }, + { CS42L43_GPIO_INT_MASK, 0x0000003F }, + { CS42L43_ASRC_MASK, 0x0000000F }, + { CS42L43_HPOUT_MASK, 0x00000003 }, +}; +EXPORT_SYMBOL_NS_GPL(cs42l43_reg_default, MFD_CS42L43); + +bool cs42l43_readable_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case CS42L43_DEVID: + case CS42L43_REVID: + case CS42L43_RELID: + case CS42L43_SFT_RESET: + case CS42L43_DRV_CTRL1: + case CS42L43_DRV_CTRL3: + case CS42L43_DRV_CTRL4: + case CS42L43_DRV_CTRL_5: + case CS42L43_GPIO_CTRL1: + case CS42L43_GPIO_CTRL2: + case CS42L43_GPIO_STS: + case CS42L43_GPIO_FN_SEL: + case CS42L43_MCLK_SRC_SEL: + case CS42L43_SAMPLE_RATE1 ... CS42L43_SAMPLE_RATE4: + case CS42L43_PLL_CONTROL: + case CS42L43_FS_SELECT1 ... CS42L43_FS_SELECT4: + case CS42L43_PDM_CONTROL: + case CS42L43_ASP_CLK_CONFIG1 ... CS42L43_ASP_CLK_CONFIG2: + case CS42L43_OSC_DIV_SEL: + case CS42L43_ADC_B_CTRL1 ... CS42L43_ADC_B_CTRL2: + case CS42L43_DECIM_HPF_WNF_CTRL1 ... CS42L43_DECIM_HPF_WNF_CTRL4: + case CS42L43_DMIC_PDM_CTRL: + case CS42L43_DECIM_VOL_CTRL_CH1_CH2 ... CS42L43_DECIM_VOL_CTRL_CH3_CH4: + case CS42L43_INTP_VOLUME_CTRL1 ... CS42L43_INTP_VOLUME_CTRL2: + case CS42L43_AMP1_2_VOL_RAMP: + case CS42L43_ASP_CTRL: + case CS42L43_ASP_FSYNC_CTRL1 ... CS42L43_ASP_FSYNC_CTRL4: + case CS42L43_ASP_DATA_CTRL: + case CS42L43_ASP_RX_EN ... CS42L43_ASP_TX_EN: + case CS42L43_ASP_RX_CH1_CTRL ... CS42L43_ASP_RX_CH6_CTRL: + case CS42L43_ASP_TX_CH1_CTRL ... CS42L43_ASP_TX_CH6_CTRL: + case CS42L43_OTP_REVISION_ID: + case CS42L43_ASPTX1_INPUT: + case CS42L43_ASPTX2_INPUT: + case CS42L43_ASPTX3_INPUT: + case CS42L43_ASPTX4_INPUT: + case CS42L43_ASPTX5_INPUT: + case CS42L43_ASPTX6_INPUT: + case CS42L43_SWIRE_DP1_CH1_INPUT: + case CS42L43_SWIRE_DP1_CH2_INPUT: + case CS42L43_SWIRE_DP1_CH3_INPUT: + case CS42L43_SWIRE_DP1_CH4_INPUT: + case CS42L43_SWIRE_DP2_CH1_INPUT: + case CS42L43_SWIRE_DP2_CH2_INPUT: + case CS42L43_SWIRE_DP3_CH1_INPUT: + case CS42L43_SWIRE_DP3_CH2_INPUT: + case CS42L43_SWIRE_DP4_CH1_INPUT: + case CS42L43_SWIRE_DP4_CH2_INPUT: + case CS42L43_ASRC_INT1_INPUT1: + case CS42L43_ASRC_INT2_INPUT1: + case CS42L43_ASRC_INT3_INPUT1: + case CS42L43_ASRC_INT4_INPUT1: + case CS42L43_ASRC_DEC1_INPUT1: + case CS42L43_ASRC_DEC2_INPUT1: + case CS42L43_ASRC_DEC3_INPUT1: + case CS42L43_ASRC_DEC4_INPUT1: + case CS42L43_ISRC1INT1_INPUT1: + case CS42L43_ISRC1INT2_INPUT1: + case CS42L43_ISRC1DEC1_INPUT1: + case CS42L43_ISRC1DEC2_INPUT1: + case CS42L43_ISRC2INT1_INPUT1: + case CS42L43_ISRC2INT2_INPUT1: + case CS42L43_ISRC2DEC1_INPUT1: + case CS42L43_ISRC2DEC2_INPUT1: + case CS42L43_EQ1MIX_INPUT1 ... CS42L43_EQ1MIX_INPUT4: + case CS42L43_EQ2MIX_INPUT1 ... CS42L43_EQ2MIX_INPUT4: + case CS42L43_SPDIF1_INPUT1: + case CS42L43_SPDIF2_INPUT1: + case CS42L43_AMP1MIX_INPUT1 ... CS42L43_AMP1MIX_INPUT4: + case CS42L43_AMP2MIX_INPUT1 ... CS42L43_AMP2MIX_INPUT4: + case CS42L43_AMP3MIX_INPUT1 ... CS42L43_AMP3MIX_INPUT4: + case CS42L43_AMP4MIX_INPUT1 ... CS42L43_AMP4MIX_INPUT4: + case CS42L43_ASRC_INT_ENABLES ... CS42L43_ASRC_DEC_ENABLES: + case CS42L43_PDNCNTL: + case CS42L43_RINGSENSE_DEB_CTRL: + case CS42L43_TIPSENSE_DEB_CTRL: + case CS42L43_TIP_RING_SENSE_INTERRUPT_STATUS: + case CS42L43_HS2: + case CS42L43_HS_STAT: + case CS42L43_MCU_SW_INTERRUPT: + case CS42L43_STEREO_MIC_CTRL: + case CS42L43_STEREO_MIC_CLAMP_CTRL: + case CS42L43_BLOCK_EN2 ... CS42L43_BLOCK_EN11: + case CS42L43_TONE_CH1_CTRL ... CS42L43_TONE_CH2_CTRL: + case CS42L43_MIC_DETECT_CONTROL_1: + case CS42L43_DETECT_STATUS_1: + case CS42L43_HS_BIAS_SENSE_AND_CLAMP_AUTOCONTROL: + case CS42L43_MIC_DETECT_CONTROL_ANDROID: + case CS42L43_ISRC1_CTRL: + case CS42L43_ISRC2_CTRL: + case CS42L43_CTRL_REG: + case CS42L43_FDIV_FRAC: + case CS42L43_CAL_RATIO: + case CS42L43_SPI_CLK_CONFIG1: + case CS42L43_SPI_CONFIG1 ... CS42L43_SPI_CONFIG4: + case CS42L43_SPI_STATUS1 ... CS42L43_SPI_STATUS2: + case CS42L43_TRAN_CONFIG1 ... CS42L43_TRAN_CONFIG8: + case CS42L43_TRAN_STATUS1 ... CS42L43_TRAN_STATUS3: + case CS42L43_TX_DATA: + case CS42L43_RX_DATA: + case CS42L43_DACCNFG1 ... CS42L43_DACCNFG2: + case CS42L43_HPPATHVOL: + case CS42L43_PGAVOL: + case CS42L43_LOADDETRESULTS: + case CS42L43_LOADDETENA: + case CS42L43_CTRL: + case CS42L43_COEFF_DATA_IN0: + case CS42L43_COEFF_RD_WR0: + case CS42L43_INIT_DONE0: + case CS42L43_START_EQZ0: + case CS42L43_MUTE_EQ_IN0: + case CS42L43_DECIM_INT ... CS42L43_HPOUT_INT: + case CS42L43_DECIM_MASK ... CS42L43_HPOUT_MASK: + case CS42L43_DECIM_INT_SHADOW ... CS42L43_HP_OUT_SHADOW: + case CS42L43_BOOT_CONTROL: + case CS42L43_BLOCK_EN: + case CS42L43_SHUTTER_CONTROL: + case CS42L43_MCU_SW_REV ... CS42L43_MCU_RAM_MAX: + return true; + default: + return false; + } +} +EXPORT_SYMBOL_NS_GPL(cs42l43_readable_register, MFD_CS42L43); + +bool cs42l43_precious_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case CS42L43_SFT_RESET: + case CS42L43_TX_DATA: + case CS42L43_RX_DATA: + case CS42L43_DECIM_INT ... CS42L43_HPOUT_INT: + case CS42L43_MCU_SW_REV ... CS42L43_MCU_RAM_MAX: + return true; + default: + return false; + } +} +EXPORT_SYMBOL_NS_GPL(cs42l43_precious_register, MFD_CS42L43); + +bool cs42l43_volatile_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case CS42L43_DEVID: + case CS42L43_REVID: + case CS42L43_RELID: + case CS42L43_GPIO_STS: + case CS42L43_OTP_REVISION_ID: + case CS42L43_TIP_RING_SENSE_INTERRUPT_STATUS: + case CS42L43_HS_STAT: + case CS42L43_MCU_SW_INTERRUPT: + case CS42L43_DETECT_STATUS_1: + case CS42L43_SPI_STATUS1 ... CS42L43_SPI_STATUS2: + case CS42L43_TRAN_CONFIG1 ... CS42L43_TRAN_CONFIG2: + case CS42L43_TRAN_CONFIG8: + case CS42L43_TRAN_STATUS1 ... CS42L43_TRAN_STATUS3: + case CS42L43_LOADDETRESULTS: + case CS42L43_INIT_DONE0: + case CS42L43_DECIM_INT_SHADOW ... CS42L43_HP_OUT_SHADOW: + case CS42L43_BOOT_CONTROL: + case CS42L43_BLOCK_EN: + return true; + default: + return cs42l43_precious_register(dev, reg); + } +} +EXPORT_SYMBOL_NS_GPL(cs42l43_volatile_register, MFD_CS42L43); + +#define CS42L43_IRQ_OFFSET(reg) ((CS42L43_##reg##_INT) - CS42L43_DECIM_INT) + +#define CS42L43_IRQ_REG(name, reg) REGMAP_IRQ_REG(CS42L43_##name, \ + CS42L43_IRQ_OFFSET(reg), \ + CS42L43_##name##_INT_MASK) + +static const struct regmap_irq cs42l43_regmap_irqs[] = { + CS42L43_IRQ_REG(PLL_LOST_LOCK, PLL), + CS42L43_IRQ_REG(PLL_READY, PLL), + + CS42L43_IRQ_REG(HP_STARTUP_DONE, MSM), + CS42L43_IRQ_REG(HP_SHUTDOWN_DONE, MSM), + CS42L43_IRQ_REG(HSDET_DONE, MSM), + CS42L43_IRQ_REG(TIPSENSE_UNPLUG_DB, MSM), + CS42L43_IRQ_REG(TIPSENSE_PLUG_DB, MSM), + CS42L43_IRQ_REG(RINGSENSE_UNPLUG_DB, MSM), + CS42L43_IRQ_REG(RINGSENSE_PLUG_DB, MSM), + CS42L43_IRQ_REG(TIPSENSE_UNPLUG_PDET, MSM), + CS42L43_IRQ_REG(TIPSENSE_PLUG_PDET, MSM), + CS42L43_IRQ_REG(RINGSENSE_UNPLUG_PDET, MSM), + CS42L43_IRQ_REG(RINGSENSE_PLUG_PDET, MSM), + + CS42L43_IRQ_REG(HS2_BIAS_SENSE, ACC_DET), + CS42L43_IRQ_REG(HS1_BIAS_SENSE, ACC_DET), + CS42L43_IRQ_REG(DC_DETECT1_FALSE, ACC_DET), + CS42L43_IRQ_REG(DC_DETECT1_TRUE, ACC_DET), + CS42L43_IRQ_REG(HSBIAS_CLAMPED, ACC_DET), + CS42L43_IRQ_REG(HS3_4_BIAS_SENSE, ACC_DET), + + CS42L43_IRQ_REG(AMP2_CLK_STOP_FAULT, CLASS_D_AMP), + CS42L43_IRQ_REG(AMP1_CLK_STOP_FAULT, CLASS_D_AMP), + CS42L43_IRQ_REG(AMP2_VDDSPK_FAULT, CLASS_D_AMP), + CS42L43_IRQ_REG(AMP1_VDDSPK_FAULT, CLASS_D_AMP), + CS42L43_IRQ_REG(AMP2_SHUTDOWN_DONE, CLASS_D_AMP), + CS42L43_IRQ_REG(AMP1_SHUTDOWN_DONE, CLASS_D_AMP), + CS42L43_IRQ_REG(AMP2_STARTUP_DONE, CLASS_D_AMP), + CS42L43_IRQ_REG(AMP1_STARTUP_DONE, CLASS_D_AMP), + CS42L43_IRQ_REG(AMP2_THERM_SHDN, CLASS_D_AMP), + CS42L43_IRQ_REG(AMP1_THERM_SHDN, CLASS_D_AMP), + CS42L43_IRQ_REG(AMP2_THERM_WARN, CLASS_D_AMP), + CS42L43_IRQ_REG(AMP1_THERM_WARN, CLASS_D_AMP), + CS42L43_IRQ_REG(AMP2_SCDET, CLASS_D_AMP), + CS42L43_IRQ_REG(AMP1_SCDET, CLASS_D_AMP), + + CS42L43_IRQ_REG(GPIO3_FALL, GPIO), + CS42L43_IRQ_REG(GPIO3_RISE, GPIO), + CS42L43_IRQ_REG(GPIO2_FALL, GPIO), + CS42L43_IRQ_REG(GPIO2_RISE, GPIO), + CS42L43_IRQ_REG(GPIO1_FALL, GPIO), + CS42L43_IRQ_REG(GPIO1_RISE, GPIO), + + CS42L43_IRQ_REG(HP_ILIMIT, HPOUT), + CS42L43_IRQ_REG(HP_LOADDET_DONE, HPOUT), +}; + +static const struct regmap_irq_chip cs42l43_irq_chip = { + .name = "cs42l43", + + .status_base = CS42L43_DECIM_INT, + .mask_base = CS42L43_DECIM_MASK, + .num_regs = 16, + + .irqs = cs42l43_regmap_irqs, + .num_irqs = ARRAY_SIZE(cs42l43_regmap_irqs), + + .runtime_pm = true, +}; + +static const char * const cs42l43_core_supplies[] = { + "vdd-a", "vdd-io", "vdd-cp", +}; + +static const char * const cs42l43_parent_supplies[] = { "vdd-amp" }; + +static const struct mfd_cell cs42l43_devs[] = { + { .name = "cs42l43-pinctrl", }, + { .name = "cs42l43-spi", }, + { + .name = "cs42l43-codec", + .parent_supplies = cs42l43_parent_supplies, + .num_parent_supplies = ARRAY_SIZE(cs42l43_parent_supplies), + }, +}; + +/* + * If the device is connected over Soundwire, as well as soft resetting the + * device, this function will also way for the device to detach from the bus + * before returning. + */ +static int cs42l43_soft_reset(struct cs42l43 *cs42l43) +{ + static const struct reg_sequence reset[] = { + { CS42L43_SFT_RESET, CS42L43_SFT_RESET_VAL }, + }; + + reinit_completion(&cs42l43->device_detach); + + /* + * Apply cache only because the soft reset will cause the device to + * detach from the soundwire bus. + */ + regcache_cache_only(cs42l43->regmap, true); + regmap_multi_reg_write_bypassed(cs42l43->regmap, reset, ARRAY_SIZE(reset)); + + msleep(CS42L43_RESET_DELAY); + + if (cs42l43->sdw) { + unsigned long timeout = msecs_to_jiffies(CS42L43_SDW_DETACH_TIMEOUT); + unsigned long time; + + time = wait_for_completion_timeout(&cs42l43->device_detach, timeout); + if (!time) { + dev_err(cs42l43->dev, "Timed out waiting for device detach\n"); + return -ETIMEDOUT; + } + } + + return -EAGAIN; +} + +/* + * This function is essentially a no-op on I2C, but will wait for the device to + * attach when the device is used on a SoundWire bus. + */ +static int cs42l43_wait_for_attach(struct cs42l43 *cs42l43) +{ + if (!cs42l43->attached) { + unsigned long timeout = msecs_to_jiffies(CS42L43_SDW_ATTACH_TIMEOUT); + unsigned long time; + + time = wait_for_completion_timeout(&cs42l43->device_attach, timeout); + if (!time) { + dev_err(cs42l43->dev, "Timed out waiting for device re-attach\n"); + return -ETIMEDOUT; + } + } + + regcache_cache_only(cs42l43->regmap, false); + + /* The hardware requires enabling OSC_DIV before doing any SoundWire reads. */ + if (cs42l43->sdw) + regmap_write(cs42l43->regmap, CS42L43_OSC_DIV_SEL, + CS42L43_OSC_DIV2_EN_MASK); + + return 0; +} + +/* + * This function will advance the firmware into boot stage 3 from boot stage 2. + * Boot stage 3 is required to send commands to the firmware. This is achieved + * by setting the firmware NEED configuration register to zero, this indicates + * no configuration is required forcing the firmware to advance to boot stage 3. + * + * Later revisions of the firmware require the use of an alternative register + * for this purpose, which is indicated through the shadow flag. + */ +static int cs42l43_mcu_stage_2_3(struct cs42l43 *cs42l43, bool shadow) +{ + unsigned int need_reg = CS42L43_NEED_CONFIGS; + unsigned int val; + int ret; + + if (shadow) + need_reg = CS42L43_FW_SH_BOOT_CFG_NEED_CONFIGS; + + regmap_write(cs42l43->regmap, need_reg, 0); + + ret = regmap_read_poll_timeout(cs42l43->regmap, CS42L43_BOOT_STATUS, + val, (val == CS42L43_MCU_BOOT_STAGE3), + CS42L43_MCU_POLL, CS42L43_MCU_CMD_TIMEOUT); + if (ret) { + dev_err(cs42l43->dev, "Failed to move to stage 3: %d, 0x%x\n", ret, val); + return ret; + } + + return -EAGAIN; +} + +/* + * This function will return the firmware to boot stage 2 from boot stage 3. + * Boot stage 2 is required to apply updates to the firmware. This is achieved + * by setting the firmware NEED configuration register to FW_PATCH_NEED_CFG, + * setting the HAVE configuration register to 0, and soft resetting. The + * firmware will see it is missing a patch configuration and will pause in boot + * stage 2. + * + * Note: Unlike cs42l43_mcu_stage_2_3 there is no need to consider the shadow + * register here as the driver will only return to boot stage 2 if the firmware + * requires update which means the revision does not include shadow register + * support. + */ +static int cs42l43_mcu_stage_3_2(struct cs42l43 *cs42l43) +{ + regmap_write(cs42l43->regmap, CS42L43_FW_MISSION_CTRL_NEED_CONFIGS, + CS42L43_FW_PATCH_NEED_CFG_MASK); + regmap_write(cs42l43->regmap, CS42L43_FW_MISSION_CTRL_HAVE_CONFIGS, 0); + + return cs42l43_soft_reset(cs42l43); +} + +/* + * Disable the firmware running on the device such that the driver can access + * the registers without fear of the MCU changing them under it. + */ +static int cs42l43_mcu_disable(struct cs42l43 *cs42l43) +{ + unsigned int val; + int ret; + + regmap_write(cs42l43->regmap, CS42L43_FW_MISSION_CTRL_MM_MCU_CFG_REG, + CS42L43_FW_MISSION_CTRL_MM_MCU_CFG_DISABLE_VAL); + regmap_write(cs42l43->regmap, CS42L43_FW_MISSION_CTRL_MM_CTRL_SELECTION, + CS42L43_FW_MM_CTRL_MCU_SEL_MASK); + regmap_write(cs42l43->regmap, CS42L43_MCU_SW_INTERRUPT, CS42L43_CONTROL_IND_MASK); + regmap_write(cs42l43->regmap, CS42L43_MCU_SW_INTERRUPT, 0); + + ret = regmap_read_poll_timeout(cs42l43->regmap, CS42L43_SOFT_INT_SHADOW, val, + (val & CS42L43_CONTROL_APPLIED_INT_MASK), + CS42L43_MCU_POLL, CS42L43_MCU_CMD_TIMEOUT); + if (ret) { + dev_err(cs42l43->dev, "Failed to disable firmware: %d, 0x%x\n", ret, val); + return ret; + } + + /* Soft reset to clear any register state the firmware left behind. */ + return cs42l43_soft_reset(cs42l43); +} + +/* + * Callback to load firmware updates. + */ +static void cs42l43_mcu_load_firmware(const struct firmware *firmware, void *context) +{ + struct cs42l43 *cs42l43 = context; + const struct cs42l43_patch_header *hdr; + unsigned int loadaddr, val; + int ret; + + if (!firmware) { + dev_err(cs42l43->dev, "Failed to load firmware\n"); + cs42l43->firmware_error = -ENODEV; + goto err; + } + + hdr = (const struct cs42l43_patch_header *)&firmware->data[0]; + loadaddr = le32_to_cpu(hdr->load_addr); + + if (le16_to_cpu(hdr->version) != CS42L43_MCU_UPDATE_FORMAT) { + dev_err(cs42l43->dev, "Bad firmware file format: %d\n", hdr->version); + cs42l43->firmware_error = -EINVAL; + goto err_release; + } + + regmap_write(cs42l43->regmap, CS42L43_PATCH_START_ADDR, loadaddr); + regmap_bulk_write(cs42l43->regmap, loadaddr + CS42L43_MCU_UPDATE_OFFSET, + &firmware->data[0], firmware->size / sizeof(u32)); + + regmap_write(cs42l43->regmap, CS42L43_MCU_SW_INTERRUPT, CS42L43_PATCH_IND_MASK); + regmap_write(cs42l43->regmap, CS42L43_MCU_SW_INTERRUPT, 0); + + ret = regmap_read_poll_timeout(cs42l43->regmap, CS42L43_SOFT_INT_SHADOW, val, + (val & CS42L43_PATCH_APPLIED_INT_MASK), + CS42L43_MCU_POLL, CS42L43_MCU_UPDATE_TIMEOUT); + if (ret) { + dev_err(cs42l43->dev, "Failed to update firmware: %d, 0x%x\n", ret, val); + cs42l43->firmware_error = ret; + goto err_release; + } + +err_release: + release_firmware(firmware); +err: + complete(&cs42l43->firmware_download); +} + +/* + * The process of updating the firmware is split into a series of steps, at the + * end of each step a soft reset of the device might be required which will + * require the driver to wait for the device to re-attach on the SoundWire bus, + * if that control bus is being used. + */ +static int cs42l43_mcu_update_step(struct cs42l43 *cs42l43) +{ + unsigned int mcu_rev, bios_rev, boot_status, secure_cfg; + bool patched, shadow; + int ret; + + /* Clear any stale software interrupt bits. */ + regmap_read(cs42l43->regmap, CS42L43_SOFT_INT, &mcu_rev); + + ret = regmap_read(cs42l43->regmap, CS42L43_BOOT_STATUS, &boot_status); + if (ret) { + dev_err(cs42l43->dev, "Failed to read boot status: %d\n", ret); + return ret; + } + + ret = regmap_read(cs42l43->regmap, CS42L43_MCU_SW_REV, &mcu_rev); + if (ret) { + dev_err(cs42l43->dev, "Failed to read firmware revision: %d\n", ret); + return ret; + } + + bios_rev = (((mcu_rev & CS42L43_BIOS_MAJOR_REV_MASK) << 12) | + ((mcu_rev & CS42L43_BIOS_MINOR_REV_MASK) << 4) | + ((mcu_rev & CS42L43_BIOS_SUBMINOR_REV_MASK) >> 8)) >> + CS42L43_BIOS_MAJOR_REV_SHIFT; + mcu_rev = ((mcu_rev & CS42L43_FW_MAJOR_REV_MASK) << 12) | + ((mcu_rev & CS42L43_FW_MINOR_REV_MASK) << 4) | + ((mcu_rev & CS42L43_FW_SUBMINOR_REV_MASK) >> 8); + + /* + * The firmware has two revision numbers bringing either of them up to a + * supported version will provide the features the driver requires. + */ + patched = mcu_rev >= CS42L43_MCU_SUPPORTED_REV || + bios_rev >= CS42L43_MCU_SUPPORTED_BIOS_REV; + /* + * Later versions of the firmwware require the driver to access some + * features through a set of shadow registers. + */ + shadow = mcu_rev >= CS42L43_MCU_SHADOW_REGS_REQUIRED_REV; + + ret = regmap_read(cs42l43->regmap, CS42L43_BOOT_CONTROL, &secure_cfg); + if (ret) { + dev_err(cs42l43->dev, "Failed to read security settings: %d\n", ret); + return ret; + } + + cs42l43->hw_lock = secure_cfg & CS42L43_LOCK_HW_STS_MASK; + + if (!patched && cs42l43->hw_lock) { + dev_err(cs42l43->dev, "Unpatched secure device\n"); + return -EPERM; + } + + dev_dbg(cs42l43->dev, "Firmware(0x%x, 0x%x) in boot stage %d\n", + mcu_rev, bios_rev, boot_status); + + switch (boot_status) { + case CS42L43_MCU_BOOT_STAGE2: + if (!patched) { + ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_UEVENT, + "cs42l43.bin", cs42l43->dev, + GFP_KERNEL, cs42l43, + cs42l43_mcu_load_firmware); + if (ret) { + dev_err(cs42l43->dev, "Failed to request firmware: %d\n", ret); + return ret; + } + + wait_for_completion(&cs42l43->firmware_download); + + if (cs42l43->firmware_error) + return cs42l43->firmware_error; + + return -EAGAIN; + } else { + return cs42l43_mcu_stage_2_3(cs42l43, shadow); + } + case CS42L43_MCU_BOOT_STAGE3: + if (patched) + return cs42l43_mcu_disable(cs42l43); + else + return cs42l43_mcu_stage_3_2(cs42l43); + case CS42L43_MCU_BOOT_STAGE4: + return 0; + default: + dev_err(cs42l43->dev, "Invalid boot status: %d\n", boot_status); + return -EINVAL; + } +} + +/* + * Update the firmware running on the device. + */ +static int cs42l43_mcu_update(struct cs42l43 *cs42l43) +{ + int i, ret; + + for (i = 0; i < CS42L43_MCU_UPDATE_RETRIES; i++) { + ret = cs42l43_mcu_update_step(cs42l43); + if (ret != -EAGAIN) + return ret; + + ret = cs42l43_wait_for_attach(cs42l43); + if (ret) + return ret; + } + + dev_err(cs42l43->dev, "Failed retrying update\n"); + return -ETIMEDOUT; +} + +static int cs42l43_irq_config(struct cs42l43 *cs42l43) +{ + struct irq_data *irq_data; + unsigned long irq_flags; + int ret; + + if (cs42l43->sdw) + cs42l43->irq = cs42l43->sdw->irq; + + cs42l43->irq_chip = cs42l43_irq_chip; + cs42l43->irq_chip.irq_drv_data = cs42l43; + + irq_data = irq_get_irq_data(cs42l43->irq); + if (!irq_data) { + dev_err(cs42l43->dev, "Invalid IRQ: %d\n", cs42l43->irq); + return -EINVAL; + } + + irq_flags = irqd_get_trigger_type(irq_data); + switch (irq_flags) { + case IRQF_TRIGGER_LOW: + case IRQF_TRIGGER_HIGH: + case IRQF_TRIGGER_RISING: + case IRQF_TRIGGER_FALLING: + break; + case IRQ_TYPE_NONE: + default: + irq_flags = IRQF_TRIGGER_LOW; + break; + } + + irq_flags |= IRQF_ONESHOT; + + ret = devm_regmap_add_irq_chip(cs42l43->dev, cs42l43->regmap, + cs42l43->irq, irq_flags, 0, + &cs42l43->irq_chip, &cs42l43->irq_data); + if (ret) { + dev_err(cs42l43->dev, "Failed to add IRQ chip: %d\n", ret); + return ret; + } + + dev_dbg(cs42l43->dev, "Configured IRQ %d with flags 0x%lx\n", + cs42l43->irq, irq_flags); + + return 0; +} + +static void cs42l43_boot_work(struct work_struct *work) +{ + struct cs42l43 *cs42l43 = container_of(work, struct cs42l43, boot_work); + unsigned int devid, revid, otp; + int ret; + + ret = cs42l43_wait_for_attach(cs42l43); + if (ret) + goto err; + + ret = regmap_read(cs42l43->regmap, CS42L43_DEVID, &devid); + if (ret) { + dev_err(cs42l43->dev, "Failed to read devid: %d\n", ret); + goto err; + } + + switch (devid) { + case CS42L43_DEVID_VAL: + break; + default: + dev_err(cs42l43->dev, "Unrecognised devid: 0x%06x\n", devid); + goto err; + } + + ret = regmap_read(cs42l43->regmap, CS42L43_REVID, &revid); + if (ret) { + dev_err(cs42l43->dev, "Failed to read rev: %d\n", ret); + goto err; + } + + ret = regmap_read(cs42l43->regmap, CS42L43_OTP_REVISION_ID, &otp); + if (ret) { + dev_err(cs42l43->dev, "Failed to read otp rev: %d\n", ret); + goto err; + } + + dev_info(cs42l43->dev, + "devid: 0x%06x, rev: 0x%02x, otp: 0x%02x\n", devid, revid, otp); + + ret = cs42l43_mcu_update(cs42l43); + if (ret) + goto err; + + ret = regmap_register_patch(cs42l43->regmap, cs42l43_reva_patch, + ARRAY_SIZE(cs42l43_reva_patch)); + if (ret) { + dev_err(cs42l43->dev, "Failed to apply register patch: %d\n", ret); + goto err; + } + + ret = cs42l43_irq_config(cs42l43); + if (ret) + goto err; + + ret = devm_mfd_add_devices(cs42l43->dev, PLATFORM_DEVID_NONE, + cs42l43_devs, ARRAY_SIZE(cs42l43_devs), + NULL, 0, NULL); + if (ret) { + dev_err(cs42l43->dev, "Failed to add subdevices: %d\n", ret); + goto err; + } + + pm_runtime_mark_last_busy(cs42l43->dev); + pm_runtime_put_autosuspend(cs42l43->dev); + + return; + +err: + pm_runtime_put_sync(cs42l43->dev); + cs42l43_dev_remove(cs42l43); +} + +static int cs42l43_power_up(struct cs42l43 *cs42l43) +{ + int ret; + + ret = regulator_enable(cs42l43->vdd_p); + if (ret) { + dev_err(cs42l43->dev, "Failed to enable vdd-p: %d\n", ret); + return ret; + } + + /* vdd-p must be on for 50uS before any other supply */ + usleep_range(CS42L43_VDDP_DELAY, 2 * CS42L43_VDDP_DELAY); + + gpiod_set_value_cansleep(cs42l43->reset, 1); + + ret = regulator_bulk_enable(CS42L43_N_SUPPLIES, cs42l43->core_supplies); + if (ret) { + dev_err(cs42l43->dev, "Failed to enable core supplies: %d\n", ret); + goto err_reset; + } + + ret = regulator_enable(cs42l43->vdd_d); + if (ret) { + dev_err(cs42l43->dev, "Failed to enable vdd-d: %d\n", ret); + goto err_core_supplies; + } + + usleep_range(CS42L43_VDDD_DELAY, 2 * CS42L43_VDDD_DELAY); + + return 0; + +err_core_supplies: + regulator_bulk_disable(CS42L43_N_SUPPLIES, cs42l43->core_supplies); +err_reset: + gpiod_set_value_cansleep(cs42l43->reset, 0); + regulator_disable(cs42l43->vdd_p); + + return ret; +} + +static int cs42l43_power_down(struct cs42l43 *cs42l43) +{ + int ret; + + ret = regulator_disable(cs42l43->vdd_d); + if (ret) { + dev_err(cs42l43->dev, "Failed to disable vdd-d: %d\n", ret); + return ret; + } + + ret = regulator_bulk_disable(CS42L43_N_SUPPLIES, cs42l43->core_supplies); + if (ret) { + dev_err(cs42l43->dev, "Failed to disable core supplies: %d\n", ret); + return ret; + } + + gpiod_set_value_cansleep(cs42l43->reset, 0); + + ret = regulator_disable(cs42l43->vdd_p); + if (ret) { + dev_err(cs42l43->dev, "Failed to disable vdd-p: %d\n", ret); + return ret; + } + + return 0; +} + +int cs42l43_dev_probe(struct cs42l43 *cs42l43) +{ + int i, ret; + + dev_set_drvdata(cs42l43->dev, cs42l43); + + mutex_init(&cs42l43->pll_lock); + init_completion(&cs42l43->device_attach); + init_completion(&cs42l43->device_detach); + init_completion(&cs42l43->firmware_download); + INIT_WORK(&cs42l43->boot_work, cs42l43_boot_work); + + regcache_cache_only(cs42l43->regmap, true); + + cs42l43->reset = devm_gpiod_get_optional(cs42l43->dev, "reset", GPIOD_OUT_LOW); + if (IS_ERR(cs42l43->reset)) + return dev_err_probe(cs42l43->dev, PTR_ERR(cs42l43->reset), + "Failed to get reset\n"); + + cs42l43->vdd_p = devm_regulator_get(cs42l43->dev, "vdd-p"); + if (IS_ERR(cs42l43->vdd_p)) + return dev_err_probe(cs42l43->dev, PTR_ERR(cs42l43->vdd_p), + "Failed to get vdd-p\n"); + + cs42l43->vdd_d = devm_regulator_get(cs42l43->dev, "vdd-d"); + if (IS_ERR(cs42l43->vdd_d)) + return dev_err_probe(cs42l43->dev, PTR_ERR(cs42l43->vdd_d), + "Failed to get vdd-d\n"); + + BUILD_BUG_ON(ARRAY_SIZE(cs42l43_core_supplies) != CS42L43_N_SUPPLIES); + + for (i = 0; i < CS42L43_N_SUPPLIES; i++) + cs42l43->core_supplies[i].supply = cs42l43_core_supplies[i]; + + ret = devm_regulator_bulk_get(cs42l43->dev, CS42L43_N_SUPPLIES, + cs42l43->core_supplies); + if (ret) + return dev_err_probe(cs42l43->dev, ret, + "Failed to get core supplies\n"); + + ret = cs42l43_power_up(cs42l43); + if (ret) + return ret; + + pm_runtime_set_autosuspend_delay(cs42l43->dev, CS42L43_AUTOSUSPEND_TIME); + pm_runtime_use_autosuspend(cs42l43->dev); + pm_runtime_set_active(cs42l43->dev); + /* + * The device is already powered up, but keep it from suspending until + * the boot work runs. + */ + pm_runtime_get_noresume(cs42l43->dev); + devm_pm_runtime_enable(cs42l43->dev); + + queue_work(system_long_wq, &cs42l43->boot_work); + + return 0; +} +EXPORT_SYMBOL_NS_GPL(cs42l43_dev_probe, MFD_CS42L43); + +void cs42l43_dev_remove(struct cs42l43 *cs42l43) +{ + cs42l43_power_down(cs42l43); +} +EXPORT_SYMBOL_NS_GPL(cs42l43_dev_remove, MFD_CS42L43); + +static int cs42l43_suspend(struct device *dev) +{ + struct cs42l43 *cs42l43 = dev_get_drvdata(dev); + int ret; + + /* + * Don't care about being resumed here, but the driver does want + * force_resume to always trigger an actual resume, so that register + * state for the MCU/GPIOs is returned as soon as possible after system + * resume. force_resume will resume if the reference count is resumed on + * suspend hence the get_noresume. + */ + pm_runtime_get_noresume(dev); + + ret = pm_runtime_force_suspend(dev); + if (ret) { + dev_err(cs42l43->dev, "Failed to force suspend: %d\n", ret); + pm_runtime_put_noidle(dev); + return ret; + } + + pm_runtime_put_noidle(dev); + + ret = cs42l43_power_down(cs42l43); + if (ret) + return ret; + + return 0; +} + +static int cs42l43_resume(struct device *dev) +{ + struct cs42l43 *cs42l43 = dev_get_drvdata(dev); + int ret; + + ret = cs42l43_power_up(cs42l43); + if (ret) + return ret; + + ret = pm_runtime_force_resume(dev); + if (ret) { + dev_err(cs42l43->dev, "Failed to force resume: %d\n", ret); + return ret; + } + + return 0; +} + +static int cs42l43_runtime_suspend(struct device *dev) +{ + struct cs42l43 *cs42l43 = dev_get_drvdata(dev); + + /* + * Whilst the driver doesn't power the chip down here, going into runtime + * suspend lets the SoundWire bus power down, which means the driver + * can't communicate with the device any more. + */ + regcache_cache_only(cs42l43->regmap, true); + + return 0; +} + +static int cs42l43_runtime_resume(struct device *dev) +{ + struct cs42l43 *cs42l43 = dev_get_drvdata(dev); + unsigned int reset_canary; + int ret; + + ret = cs42l43_wait_for_attach(cs42l43); + if (ret) + return ret; + + ret = regmap_read(cs42l43->regmap, CS42L43_RELID, &reset_canary); + if (ret) { + dev_err(cs42l43->dev, "Failed to check reset canary: %d\n", ret); + goto err; + } + + if (!reset_canary) { + /* + * If the canary has cleared the chip has reset, re-handle the + * MCU and mark the cache as dirty to indicate the chip reset. + */ + ret = cs42l43_mcu_update(cs42l43); + if (ret) + goto err; + + regcache_mark_dirty(cs42l43->regmap); + } + + ret = regcache_sync(cs42l43->regmap); + if (ret) { + dev_err(cs42l43->dev, "Failed to restore register cache: %d\n", ret); + goto err; + } + + return 0; + +err: + regcache_cache_only(cs42l43->regmap, true); + + return ret; +} + +EXPORT_NS_GPL_DEV_PM_OPS(cs42l43_pm_ops, MFD_CS42L43) = { + SET_SYSTEM_SLEEP_PM_OPS(cs42l43_suspend, cs42l43_resume) + SET_RUNTIME_PM_OPS(cs42l43_runtime_suspend, cs42l43_runtime_resume, NULL) +}; + +MODULE_DESCRIPTION("CS42L43 Core Driver"); +MODULE_AUTHOR("Charles Keepax "); +MODULE_LICENSE("GPL"); +MODULE_FIRMWARE("cs42l43.bin"); diff --git a/drivers/mfd/cs42l43.h b/drivers/mfd/cs42l43.h new file mode 100644 index 000000000000..eb4caf393833 --- /dev/null +++ b/drivers/mfd/cs42l43.h @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * CS42L43 core driver internal data + * + * Copyright (C) 2022-2023 Cirrus Logic, Inc. and + * Cirrus Logic International Semiconductor Ltd. + */ + +#include +#include +#include + +#ifndef CS42L43_CORE_INT_H +#define CS42L43_CORE_INT_H + +#define CS42L43_N_DEFAULTS 176 + +extern const struct dev_pm_ops cs42l43_pm_ops; +extern const struct reg_default cs42l43_reg_default[CS42L43_N_DEFAULTS]; + +bool cs42l43_readable_register(struct device *dev, unsigned int reg); +bool cs42l43_precious_register(struct device *dev, unsigned int reg); +bool cs42l43_volatile_register(struct device *dev, unsigned int reg); + +int cs42l43_dev_probe(struct cs42l43 *cs42l43); +void cs42l43_dev_remove(struct cs42l43 *cs42l43); + +#endif /* CS42L43_CORE_INT_H */ diff --git a/include/linux/mfd/cs42l43-regs.h b/include/linux/mfd/cs42l43-regs.h new file mode 100644 index 000000000000..c39a49269cb7 --- /dev/null +++ b/include/linux/mfd/cs42l43-regs.h @@ -0,0 +1,1184 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * cs42l43 register definitions + * + * Copyright (c) 2022-2023 Cirrus Logic, Inc. and + * Cirrus Logic International Semiconductor Ltd. + */ + +#ifndef CS42L43_CORE_REGS_H +#define CS42L43_CORE_REGS_H + +/* Registers */ +#define CS42L43_GEN_INT_STAT_1 0x000000C0 +#define CS42L43_GEN_INT_MASK_1 0x000000C1 +#define CS42L43_DEVID 0x00003000 +#define CS42L43_REVID 0x00003004 +#define CS42L43_RELID 0x0000300C +#define CS42L43_SFT_RESET 0x00003020 +#define CS42L43_DRV_CTRL1 0x00006004 +#define CS42L43_DRV_CTRL3 0x0000600C +#define CS42L43_DRV_CTRL4 0x00006010 +#define CS42L43_DRV_CTRL_5 0x00006014 +#define CS42L43_GPIO_CTRL1 0x00006034 +#define CS42L43_GPIO_CTRL2 0x00006038 +#define CS42L43_GPIO_STS 0x0000603C +#define CS42L43_GPIO_FN_SEL 0x00006040 +#define CS42L43_MCLK_SRC_SEL 0x00007004 +#define CS42L43_CCM_BLK_CLK_CONTROL 0x00007010 +#define CS42L43_SAMPLE_RATE1 0x00007014 +#define CS42L43_SAMPLE_RATE2 0x00007018 +#define CS42L43_SAMPLE_RATE3 0x0000701C +#define CS42L43_SAMPLE_RATE4 0x00007020 +#define CS42L43_PLL_CONTROL 0x00007034 +#define CS42L43_FS_SELECT1 0x00007038 +#define CS42L43_FS_SELECT2 0x0000703C +#define CS42L43_FS_SELECT3 0x00007040 +#define CS42L43_FS_SELECT4 0x00007044 +#define CS42L43_PDM_CONTROL 0x0000704C +#define CS42L43_ASP_CLK_CONFIG1 0x00007058 +#define CS42L43_ASP_CLK_CONFIG2 0x0000705C +#define CS42L43_OSC_DIV_SEL 0x00007068 +#define CS42L43_ADC_B_CTRL1 0x00008000 +#define CS42L43_ADC_B_CTRL2 0x00008004 +#define CS42L43_DECIM_HPF_WNF_CTRL1 0x0000803C +#define CS42L43_DECIM_HPF_WNF_CTRL2 0x00008040 +#define CS42L43_DECIM_HPF_WNF_CTRL3 0x00008044 +#define CS42L43_DECIM_HPF_WNF_CTRL4 0x00008048 +#define CS42L43_DMIC_PDM_CTRL 0x0000804C +#define CS42L43_DECIM_VOL_CTRL_CH1_CH2 0x00008050 +#define CS42L43_DECIM_VOL_CTRL_CH3_CH4 0x00008054 +#define CS42L43_DECIM_VOL_CTRL_UPDATE 0x00008058 +#define CS42L43_INTP_VOLUME_CTRL1 0x00009008 +#define CS42L43_INTP_VOLUME_CTRL2 0x0000900C +#define CS42L43_AMP1_2_VOL_RAMP 0x00009010 +#define CS42L43_ASP_CTRL 0x0000A000 +#define CS42L43_ASP_FSYNC_CTRL1 0x0000A004 +#define CS42L43_ASP_FSYNC_CTRL2 0x0000A008 +#define CS42L43_ASP_FSYNC_CTRL3 0x0000A00C +#define CS42L43_ASP_FSYNC_CTRL4 0x0000A010 +#define CS42L43_ASP_DATA_CTRL 0x0000A018 +#define CS42L43_ASP_RX_EN 0x0000A020 +#define CS42L43_ASP_TX_EN 0x0000A024 +#define CS42L43_ASP_RX_CH1_CTRL 0x0000A028 +#define CS42L43_ASP_RX_CH2_CTRL 0x0000A02C +#define CS42L43_ASP_RX_CH3_CTRL 0x0000A030 +#define CS42L43_ASP_RX_CH4_CTRL 0x0000A034 +#define CS42L43_ASP_RX_CH5_CTRL 0x0000A038 +#define CS42L43_ASP_RX_CH6_CTRL 0x0000A03C +#define CS42L43_ASP_TX_CH1_CTRL 0x0000A068 +#define CS42L43_ASP_TX_CH2_CTRL 0x0000A06C +#define CS42L43_ASP_TX_CH3_CTRL 0x0000A070 +#define CS42L43_ASP_TX_CH4_CTRL 0x0000A074 +#define CS42L43_ASP_TX_CH5_CTRL 0x0000A078 +#define CS42L43_ASP_TX_CH6_CTRL 0x0000A07C +#define CS42L43_OTP_REVISION_ID 0x0000B02C +#define CS42L43_ASPTX1_INPUT 0x0000C200 +#define CS42L43_ASPTX2_INPUT 0x0000C210 +#define CS42L43_ASPTX3_INPUT 0x0000C220 +#define CS42L43_ASPTX4_INPUT 0x0000C230 +#define CS42L43_ASPTX5_INPUT 0x0000C240 +#define CS42L43_ASPTX6_INPUT 0x0000C250 +#define CS42L43_SWIRE_DP1_CH1_INPUT 0x0000C280 +#define CS42L43_SWIRE_DP1_CH2_INPUT 0x0000C290 +#define CS42L43_SWIRE_DP1_CH3_INPUT 0x0000C2A0 +#define CS42L43_SWIRE_DP1_CH4_INPUT 0x0000C2B0 +#define CS42L43_SWIRE_DP2_CH1_INPUT 0x0000C2C0 +#define CS42L43_SWIRE_DP2_CH2_INPUT 0x0000C2D0 +#define CS42L43_SWIRE_DP3_CH1_INPUT 0x0000C2E0 +#define CS42L43_SWIRE_DP3_CH2_INPUT 0x0000C2F0 +#define CS42L43_SWIRE_DP4_CH1_INPUT 0x0000C300 +#define CS42L43_SWIRE_DP4_CH2_INPUT 0x0000C310 +#define CS42L43_ASRC_INT1_INPUT1 0x0000C400 +#define CS42L43_ASRC_INT2_INPUT1 0x0000C410 +#define CS42L43_ASRC_INT3_INPUT1 0x0000C420 +#define CS42L43_ASRC_INT4_INPUT1 0x0000C430 +#define CS42L43_ASRC_DEC1_INPUT1 0x0000C440 +#define CS42L43_ASRC_DEC2_INPUT1 0x0000C450 +#define CS42L43_ASRC_DEC3_INPUT1 0x0000C460 +#define CS42L43_ASRC_DEC4_INPUT1 0x0000C470 +#define CS42L43_ISRC1INT1_INPUT1 0x0000C500 +#define CS42L43_ISRC1INT2_INPUT1 0x0000C510 +#define CS42L43_ISRC1DEC1_INPUT1 0x0000C520 +#define CS42L43_ISRC1DEC2_INPUT1 0x0000C530 +#define CS42L43_ISRC2INT1_INPUT1 0x0000C540 +#define CS42L43_ISRC2INT2_INPUT1 0x0000C550 +#define CS42L43_ISRC2DEC1_INPUT1 0x0000C560 +#define CS42L43_ISRC2DEC2_INPUT1 0x0000C570 +#define CS42L43_EQ1MIX_INPUT1 0x0000C580 +#define CS42L43_EQ1MIX_INPUT2 0x0000C584 +#define CS42L43_EQ1MIX_INPUT3 0x0000C588 +#define CS42L43_EQ1MIX_INPUT4 0x0000C58C +#define CS42L43_EQ2MIX_INPUT1 0x0000C590 +#define CS42L43_EQ2MIX_INPUT2 0x0000C594 +#define CS42L43_EQ2MIX_INPUT3 0x0000C598 +#define CS42L43_EQ2MIX_INPUT4 0x0000C59C +#define CS42L43_SPDIF1_INPUT1 0x0000C600 +#define CS42L43_SPDIF2_INPUT1 0x0000C610 +#define CS42L43_AMP1MIX_INPUT1 0x0000C620 +#define CS42L43_AMP1MIX_INPUT2 0x0000C624 +#define CS42L43_AMP1MIX_INPUT3 0x0000C628 +#define CS42L43_AMP1MIX_INPUT4 0x0000C62C +#define CS42L43_AMP2MIX_INPUT1 0x0000C630 +#define CS42L43_AMP2MIX_INPUT2 0x0000C634 +#define CS42L43_AMP2MIX_INPUT3 0x0000C638 +#define CS42L43_AMP2MIX_INPUT4 0x0000C63C +#define CS42L43_AMP3MIX_INPUT1 0x0000C640 +#define CS42L43_AMP3MIX_INPUT2 0x0000C644 +#define CS42L43_AMP3MIX_INPUT3 0x0000C648 +#define CS42L43_AMP3MIX_INPUT4 0x0000C64C +#define CS42L43_AMP4MIX_INPUT1 0x0000C650 +#define CS42L43_AMP4MIX_INPUT2 0x0000C654 +#define CS42L43_AMP4MIX_INPUT3 0x0000C658 +#define CS42L43_AMP4MIX_INPUT4 0x0000C65C +#define CS42L43_ASRC_INT_ENABLES 0x0000E000 +#define CS42L43_ASRC_DEC_ENABLES 0x0000E004 +#define CS42L43_PDNCNTL 0x00010000 +#define CS42L43_RINGSENSE_DEB_CTRL 0x0001001C +#define CS42L43_TIPSENSE_DEB_CTRL 0x00010020 +#define CS42L43_TIP_RING_SENSE_INTERRUPT_STATUS 0x00010028 +#define CS42L43_HS2 0x00010040 +#define CS42L43_HS_STAT 0x00010048 +#define CS42L43_MCU_SW_INTERRUPT 0x00010094 +#define CS42L43_STEREO_MIC_CTRL 0x000100A4 +#define CS42L43_STEREO_MIC_CLAMP_CTRL 0x000100C4 +#define CS42L43_BLOCK_EN2 0x00010104 +#define CS42L43_BLOCK_EN3 0x00010108 +#define CS42L43_BLOCK_EN4 0x0001010C +#define CS42L43_BLOCK_EN5 0x00010110 +#define CS42L43_BLOCK_EN6 0x00010114 +#define CS42L43_BLOCK_EN7 0x00010118 +#define CS42L43_BLOCK_EN8 0x0001011C +#define CS42L43_BLOCK_EN9 0x00010120 +#define CS42L43_BLOCK_EN10 0x00010124 +#define CS42L43_BLOCK_EN11 0x00010128 +#define CS42L43_TONE_CH1_CTRL 0x00010134 +#define CS42L43_TONE_CH2_CTRL 0x00010138 +#define CS42L43_MIC_DETECT_CONTROL_1 0x00011074 +#define CS42L43_DETECT_STATUS_1 0x0001107C +#define CS42L43_HS_BIAS_SENSE_AND_CLAMP_AUTOCONTROL 0x00011090 +#define CS42L43_MIC_DETECT_CONTROL_ANDROID 0x000110B0 +#define CS42L43_ISRC1_CTRL 0x00012004 +#define CS42L43_ISRC2_CTRL 0x00013004 +#define CS42L43_CTRL_REG 0x00014000 +#define CS42L43_FDIV_FRAC 0x00014004 +#define CS42L43_CAL_RATIO 0x00014008 +#define CS42L43_SPI_CLK_CONFIG1 0x00016004 +#define CS42L43_SPI_CONFIG1 0x00016010 +#define CS42L43_SPI_CONFIG2 0x00016014 +#define CS42L43_SPI_CONFIG3 0x00016018 +#define CS42L43_SPI_CONFIG4 0x00016024 +#define CS42L43_SPI_STATUS1 0x00016100 +#define CS42L43_SPI_STATUS2 0x00016104 +#define CS42L43_TRAN_CONFIG1 0x00016200 +#define CS42L43_TRAN_CONFIG2 0x00016204 +#define CS42L43_TRAN_CONFIG3 0x00016208 +#define CS42L43_TRAN_CONFIG4 0x0001620C +#define CS42L43_TRAN_CONFIG5 0x00016220 +#define CS42L43_TRAN_CONFIG6 0x00016224 +#define CS42L43_TRAN_CONFIG7 0x00016228 +#define CS42L43_TRAN_CONFIG8 0x0001622C +#define CS42L43_TRAN_STATUS1 0x00016300 +#define CS42L43_TRAN_STATUS2 0x00016304 +#define CS42L43_TRAN_STATUS3 0x00016308 +#define CS42L43_TX_DATA 0x00016400 +#define CS42L43_RX_DATA 0x00016600 +#define CS42L43_DACCNFG1 0x00017000 +#define CS42L43_DACCNFG2 0x00017004 +#define CS42L43_HPPATHVOL 0x0001700C +#define CS42L43_PGAVOL 0x00017014 +#define CS42L43_LOADDETRESULTS 0x00017018 +#define CS42L43_LOADDETENA 0x00017024 +#define CS42L43_CTRL 0x00017028 +#define CS42L43_COEFF_DATA_IN0 0x00018000 +#define CS42L43_COEFF_RD_WR0 0x00018008 +#define CS42L43_INIT_DONE0 0x00018010 +#define CS42L43_START_EQZ0 0x00018014 +#define CS42L43_MUTE_EQ_IN0 0x0001801C +#define CS42L43_DECIM_INT 0x0001B000 +#define CS42L43_EQ_INT 0x0001B004 +#define CS42L43_ASP_INT 0x0001B008 +#define CS42L43_PLL_INT 0x0001B00C +#define CS42L43_SOFT_INT 0x0001B010 +#define CS42L43_SWIRE_INT 0x0001B014 +#define CS42L43_MSM_INT 0x0001B018 +#define CS42L43_ACC_DET_INT 0x0001B01C +#define CS42L43_I2C_TGT_INT 0x0001B020 +#define CS42L43_SPI_MSTR_INT 0x0001B024 +#define CS42L43_SW_TO_SPI_BRIDGE_INT 0x0001B028 +#define CS42L43_OTP_INT 0x0001B02C +#define CS42L43_CLASS_D_AMP_INT 0x0001B030 +#define CS42L43_GPIO_INT 0x0001B034 +#define CS42L43_ASRC_INT 0x0001B038 +#define CS42L43_HPOUT_INT 0x0001B03C +#define CS42L43_DECIM_MASK 0x0001B0A0 +#define CS42L43_EQ_MIX_MASK 0x0001B0A4 +#define CS42L43_ASP_MASK 0x0001B0A8 +#define CS42L43_PLL_MASK 0x0001B0AC +#define CS42L43_SOFT_MASK 0x0001B0B0 +#define CS42L43_SWIRE_MASK 0x0001B0B4 +#define CS42L43_MSM_MASK 0x0001B0B8 +#define CS42L43_ACC_DET_MASK 0x0001B0BC +#define CS42L43_I2C_TGT_MASK 0x0001B0C0 +#define CS42L43_SPI_MSTR_MASK 0x0001B0C4 +#define CS42L43_SW_TO_SPI_BRIDGE_MASK 0x0001B0C8 +#define CS42L43_OTP_MASK 0x0001B0CC +#define CS42L43_CLASS_D_AMP_MASK 0x0001B0D0 +#define CS42L43_GPIO_INT_MASK 0x0001B0D4 +#define CS42L43_ASRC_MASK 0x0001B0D8 +#define CS42L43_HPOUT_MASK 0x0001B0DC +#define CS42L43_DECIM_INT_SHADOW 0x0001B300 +#define CS42L43_EQ_MIX_INT_SHADOW 0x0001B304 +#define CS42L43_ASP_INT_SHADOW 0x0001B308 +#define CS42L43_PLL_INT_SHADOW 0x0001B30C +#define CS42L43_SOFT_INT_SHADOW 0x0001B310 +#define CS42L43_SWIRE_INT_SHADOW 0x0001B314 +#define CS42L43_MSM_INT_SHADOW 0x0001B318 +#define CS42L43_ACC_DET_INT_SHADOW 0x0001B31C +#define CS42L43_I2C_TGT_INT_SHADOW 0x0001B320 +#define CS42L43_SPI_MSTR_INT_SHADOW 0x0001B324 +#define CS42L43_SW_TO_SPI_BRIDGE_SHADOW 0x0001B328 +#define CS42L43_OTP_INT_SHADOW 0x0001B32C +#define CS42L43_CLASS_D_AMP_INT_SHADOW 0x0001B330 +#define CS42L43_GPIO_SHADOW 0x0001B334 +#define CS42L43_ASRC_SHADOW 0x0001B338 +#define CS42L43_HP_OUT_SHADOW 0x0001B33C +#define CS42L43_BOOT_CONTROL 0x00101000 +#define CS42L43_BLOCK_EN 0x00101008 +#define CS42L43_SHUTTER_CONTROL 0x0010100C +#define CS42L43_MCU_SW_REV 0x00114000 +#define CS42L43_PATCH_START_ADDR 0x00114004 +#define CS42L43_NEED_CONFIGS 0x0011400C +#define CS42L43_BOOT_STATUS 0x0011401C +#define CS42L43_FW_SH_BOOT_CFG_NEED_CONFIGS 0x0011F8F8 +#define CS42L43_FW_MISSION_CTRL_NEED_CONFIGS 0x0011FE00 +#define CS42L43_FW_MISSION_CTRL_HAVE_CONFIGS 0x0011FE04 +#define CS42L43_FW_MISSION_CTRL_MM_CTRL_SELECTION 0x0011FE0C +#define CS42L43_FW_MISSION_CTRL_MM_MCU_CFG_REG 0x0011FE10 +#define CS42L43_MCU_RAM_MAX 0x0011FFFF + +/* CS42L43_DEVID */ +#define CS42L43_DEVID_VAL 0x00042A43 + +/* CS42L43_GEN_INT_STAT_1 */ +#define CS42L43_INT_STAT_GEN1_MASK 0x00000001 +#define CS42L43_INT_STAT_GEN1_SHIFT 0 + +/* CS42L43_SFT_RESET */ +#define CS42L43_SFT_RESET_MASK 0xFF000000 +#define CS42L43_SFT_RESET_SHIFT 24 + +#define CS42L43_SFT_RESET_VAL 0x5A000000 + +/* CS42L43_DRV_CTRL1 */ +#define CS42L43_ASP_DOUT_DRV_MASK 0x00038000 +#define CS42L43_ASP_DOUT_DRV_SHIFT 15 +#define CS42L43_ASP_FSYNC_DRV_MASK 0x00000E00 +#define CS42L43_ASP_FSYNC_DRV_SHIFT 9 +#define CS42L43_ASP_BCLK_DRV_MASK 0x000001C0 +#define CS42L43_ASP_BCLK_DRV_SHIFT 6 + +/* CS42L43_DRV_CTRL3 */ +#define CS42L43_I2C_ADDR_DRV_MASK 0x30000000 +#define CS42L43_I2C_ADDR_DRV_SHIFT 28 +#define CS42L43_I2C_SDA_DRV_MASK 0x0C000000 +#define CS42L43_I2C_SDA_DRV_SHIFT 26 +#define CS42L43_PDMOUT2_CLK_DRV_MASK 0x00E00000 +#define CS42L43_PDMOUT2_CLK_DRV_SHIFT 21 +#define CS42L43_PDMOUT2_DATA_DRV_MASK 0x001C0000 +#define CS42L43_PDMOUT2_DATA_DRV_SHIFT 18 +#define CS42L43_PDMOUT1_CLK_DRV_MASK 0x00038000 +#define CS42L43_PDMOUT1_CLK_DRV_SHIFT 15 +#define CS42L43_PDMOUT1_DATA_DRV_MASK 0x00007000 +#define CS42L43_PDMOUT1_DATA_DRV_SHIFT 12 +#define CS42L43_SPI_MISO_DRV_MASK 0x00000038 +#define CS42L43_SPI_MISO_DRV_SHIFT 3 + +/* CS42L43_DRV_CTRL4 */ +#define CS42L43_GPIO3_DRV_MASK 0x00000E00 +#define CS42L43_GPIO3_DRV_SHIFT 9 +#define CS42L43_GPIO2_DRV_MASK 0x000001C0 +#define CS42L43_GPIO2_DRV_SHIFT 6 +#define CS42L43_GPIO1_DRV_MASK 0x00000038 +#define CS42L43_GPIO1_DRV_SHIFT 3 + +/* CS42L43_DRV_CTRL_5 */ +#define CS42L43_I2C_SCL_DRV_MASK 0x18000000 +#define CS42L43_I2C_SCL_DRV_SHIFT 27 +#define CS42L43_SPI_SCK_DRV_MASK 0x07000000 +#define CS42L43_SPI_SCK_DRV_SHIFT 24 +#define CS42L43_SPI_MOSI_DRV_MASK 0x00E00000 +#define CS42L43_SPI_MOSI_DRV_SHIFT 21 +#define CS42L43_SPI_SSB_DRV_MASK 0x001C0000 +#define CS42L43_SPI_SSB_DRV_SHIFT 18 +#define CS42L43_ASP_DIN_DRV_MASK 0x000001C0 +#define CS42L43_ASP_DIN_DRV_SHIFT 6 + +/* CS42L43_GPIO_CTRL1 */ +#define CS42L43_GPIO3_POL_MASK 0x00040000 +#define CS42L43_GPIO3_POL_SHIFT 18 +#define CS42L43_GPIO2_POL_MASK 0x00020000 +#define CS42L43_GPIO2_POL_SHIFT 17 +#define CS42L43_GPIO1_POL_MASK 0x00010000 +#define CS42L43_GPIO1_POL_SHIFT 16 +#define CS42L43_GPIO3_LVL_MASK 0x00000400 +#define CS42L43_GPIO3_LVL_SHIFT 10 +#define CS42L43_GPIO2_LVL_MASK 0x00000200 +#define CS42L43_GPIO2_LVL_SHIFT 9 +#define CS42L43_GPIO1_LVL_MASK 0x00000100 +#define CS42L43_GPIO1_LVL_SHIFT 8 +#define CS42L43_GPIO3_DIR_MASK 0x00000004 +#define CS42L43_GPIO3_DIR_SHIFT 2 +#define CS42L43_GPIO2_DIR_MASK 0x00000002 +#define CS42L43_GPIO2_DIR_SHIFT 1 +#define CS42L43_GPIO1_DIR_MASK 0x00000001 +#define CS42L43_GPIO1_DIR_SHIFT 0 + +/* CS42L43_GPIO_CTRL2 */ +#define CS42L43_GPIO3_DEGLITCH_BYP_MASK 0x00000004 +#define CS42L43_GPIO3_DEGLITCH_BYP_SHIFT 2 +#define CS42L43_GPIO2_DEGLITCH_BYP_MASK 0x00000002 +#define CS42L43_GPIO2_DEGLITCH_BYP_SHIFT 1 +#define CS42L43_GPIO1_DEGLITCH_BYP_MASK 0x00000001 +#define CS42L43_GPIO1_DEGLITCH_BYP_SHIFT 0 + +/* CS42L43_GPIO_STS */ +#define CS42L43_GPIO3_STS_MASK 0x00000004 +#define CS42L43_GPIO3_STS_SHIFT 2 +#define CS42L43_GPIO2_STS_MASK 0x00000002 +#define CS42L43_GPIO2_STS_SHIFT 1 +#define CS42L43_GPIO1_STS_MASK 0x00000001 +#define CS42L43_GPIO1_STS_SHIFT 0 + +/* CS42L43_GPIO_FN_SEL */ +#define CS42L43_GPIO3_FN_SEL_MASK 0x00000004 +#define CS42L43_GPIO3_FN_SEL_SHIFT 2 +#define CS42L43_GPIO1_FN_SEL_MASK 0x00000001 +#define CS42L43_GPIO1_FN_SEL_SHIFT 0 + +/* CS42L43_MCLK_SRC_SEL */ +#define CS42L43_OSC_PLL_MCLK_SEL_MASK 0x00000001 +#define CS42L43_OSC_PLL_MCLK_SEL_SHIFT 0 + +/* CS42L43_SAMPLE_RATE1..CS42L43_SAMPLE_RATE4 */ +#define CS42L43_SAMPLE_RATE_MASK 0x0000001F +#define CS42L43_SAMPLE_RATE_SHIFT 0 + +/* CS42L43_PLL_CONTROL */ +#define CS42L43_PLL_REFCLK_EN_MASK 0x00000008 +#define CS42L43_PLL_REFCLK_EN_SHIFT 3 +#define CS42L43_PLL_REFCLK_DIV_MASK 0x00000006 +#define CS42L43_PLL_REFCLK_DIV_SHIFT 1 +#define CS42L43_PLL_REFCLK_SRC_MASK 0x00000001 +#define CS42L43_PLL_REFCLK_SRC_SHIFT 0 + +/* CS42L43_FS_SELECT1 */ +#define CS42L43_ASP_RATE_MASK 0x00000003 +#define CS42L43_ASP_RATE_SHIFT 0 + +/* CS42L43_FS_SELECT2 */ +#define CS42L43_ASRC_DEC_OUT_RATE_MASK 0x000000C0 +#define CS42L43_ASRC_DEC_OUT_RATE_SHIFT 6 +#define CS42L43_ASRC_INT_OUT_RATE_MASK 0x00000030 +#define CS42L43_ASRC_INT_OUT_RATE_SHIFT 4 +#define CS42L43_ASRC_DEC_IN_RATE_MASK 0x0000000C +#define CS42L43_ASRC_DEC_IN_RATE_SHIFT 2 +#define CS42L43_ASRC_INT_IN_RATE_MASK 0x00000003 +#define CS42L43_ASRC_INT_IN_RATE_SHIFT 0 + +/* CS42L43_FS_SELECT3 */ +#define CS42L43_HPOUT_RATE_MASK 0x0000C000 +#define CS42L43_HPOUT_RATE_SHIFT 14 +#define CS42L43_EQZ_RATE_MASK 0x00003000 +#define CS42L43_EQZ_RATE_SHIFT 12 +#define CS42L43_DIAGGEN_RATE_MASK 0x00000C00 +#define CS42L43_DIAGGEN_RATE_SHIFT 10 +#define CS42L43_DECIM_CH4_RATE_MASK 0x00000300 +#define CS42L43_DECIM_CH4_RATE_SHIFT 8 +#define CS42L43_DECIM_CH3_RATE_MASK 0x000000C0 +#define CS42L43_DECIM_CH3_RATE_SHIFT 6 +#define CS42L43_DECIM_CH2_RATE_MASK 0x00000030 +#define CS42L43_DECIM_CH2_RATE_SHIFT 4 +#define CS42L43_DECIM_CH1_RATE_MASK 0x0000000C +#define CS42L43_DECIM_CH1_RATE_SHIFT 2 +#define CS42L43_AMP1_2_RATE_MASK 0x00000003 +#define CS42L43_AMP1_2_RATE_SHIFT 0 + +/* CS42L43_FS_SELECT4 */ +#define CS42L43_SW_DP7_RATE_MASK 0x00C00000 +#define CS42L43_SW_DP7_RATE_SHIFT 22 +#define CS42L43_SW_DP6_RATE_MASK 0x00300000 +#define CS42L43_SW_DP6_RATE_SHIFT 20 +#define CS42L43_SPDIF_RATE_MASK 0x000C0000 +#define CS42L43_SPDIF_RATE_SHIFT 18 +#define CS42L43_SW_DP5_RATE_MASK 0x00030000 +#define CS42L43_SW_DP5_RATE_SHIFT 16 +#define CS42L43_SW_DP4_RATE_MASK 0x0000C000 +#define CS42L43_SW_DP4_RATE_SHIFT 14 +#define CS42L43_SW_DP3_RATE_MASK 0x00003000 +#define CS42L43_SW_DP3_RATE_SHIFT 12 +#define CS42L43_SW_DP2_RATE_MASK 0x00000C00 +#define CS42L43_SW_DP2_RATE_SHIFT 10 +#define CS42L43_SW_DP1_RATE_MASK 0x00000300 +#define CS42L43_SW_DP1_RATE_SHIFT 8 +#define CS42L43_ISRC2_LOW_RATE_MASK 0x000000C0 +#define CS42L43_ISRC2_LOW_RATE_SHIFT 6 +#define CS42L43_ISRC2_HIGH_RATE_MASK 0x00000030 +#define CS42L43_ISRC2_HIGH_RATE_SHIFT 4 +#define CS42L43_ISRC1_LOW_RATE_MASK 0x0000000C +#define CS42L43_ISRC1_LOW_RATE_SHIFT 2 +#define CS42L43_ISRC1_HIGH_RATE_MASK 0x00000003 +#define CS42L43_ISRC1_HIGH_RATE_SHIFT 0 + +/* CS42L43_PDM_CONTROL */ +#define CS42L43_PDM2_CLK_DIV_MASK 0x0000000C +#define CS42L43_PDM2_CLK_DIV_SHIFT 2 +#define CS42L43_PDM1_CLK_DIV_MASK 0x00000003 +#define CS42L43_PDM1_CLK_DIV_SHIFT 0 + +/* CS42L43_ASP_CLK_CONFIG1 */ +#define CS42L43_ASP_BCLK_N_MASK 0x03FF0000 +#define CS42L43_ASP_BCLK_N_SHIFT 16 +#define CS42L43_ASP_BCLK_M_MASK 0x000003FF +#define CS42L43_ASP_BCLK_M_SHIFT 0 + +/* CS42L43_ASP_CLK_CONFIG2 */ +#define CS42L43_ASP_MASTER_MODE_MASK 0x00000002 +#define CS42L43_ASP_MASTER_MODE_SHIFT 1 +#define CS42L43_ASP_BCLK_INV_MASK 0x00000001 +#define CS42L43_ASP_BCLK_INV_SHIFT 0 + +/* CS42L43_OSC_DIV_SEL */ +#define CS42L43_OSC_DIV2_EN_MASK 0x00000001 +#define CS42L43_OSC_DIV2_EN_SHIFT 0 + +/* CS42L43_ADC_B_CTRL1..CS42L43_ADC_B_CTRL1 */ +#define CS42L43_PGA_WIDESWING_MODE_EN_MASK 0x00000080 +#define CS42L43_PGA_WIDESWING_MODE_EN_SHIFT 7 +#define CS42L43_ADC_AIN_SEL_MASK 0x00000010 +#define CS42L43_ADC_AIN_SEL_SHIFT 4 +#define CS42L43_ADC_PGA_GAIN_MASK 0x0000000F +#define CS42L43_ADC_PGA_GAIN_SHIFT 0 + +/* CS42L43_DECIM_HPF_WNF_CTRL1..CS42L43_DECIM_HPF_WNF_CTRL4 */ +#define CS42L43_DECIM_WNF_CF_MASK 0x00000070 +#define CS42L43_DECIM_WNF_CF_SHIFT 4 +#define CS42L43_DECIM_WNF_EN_MASK 0x00000008 +#define CS42L43_DECIM_WNF_EN_SHIFT 3 +#define CS42L43_DECIM_HPF_CF_MASK 0x00000006 +#define CS42L43_DECIM_HPF_CF_SHIFT 1 +#define CS42L43_DECIM_HPF_EN_MASK 0x00000001 +#define CS42L43_DECIM_HPF_EN_SHIFT 0 + +/* CS42L43_DMIC_PDM_CTRL */ +#define CS42L43_PDM2R_INV_MASK 0x00000020 +#define CS42L43_PDM2R_INV_SHIFT 5 +#define CS42L43_PDM2L_INV_MASK 0x00000010 +#define CS42L43_PDM2L_INV_SHIFT 4 +#define CS42L43_PDM1R_INV_MASK 0x00000008 +#define CS42L43_PDM1R_INV_SHIFT 3 +#define CS42L43_PDM1L_INV_MASK 0x00000004 +#define CS42L43_PDM1L_INV_SHIFT 2 + +/* CS42L43_DECIM_VOL_CTRL_CH1_CH2 */ +#define CS42L43_DECIM2_MUTE_MASK 0x80000000 +#define CS42L43_DECIM2_MUTE_SHIFT 31 +#define CS42L43_DECIM2_VOL_MASK 0x3FC00000 +#define CS42L43_DECIM2_VOL_SHIFT 22 +#define CS42L43_DECIM2_VD_RAMP_MASK 0x00380000 +#define CS42L43_DECIM2_VD_RAMP_SHIFT 19 +#define CS42L43_DECIM2_VI_RAMP_MASK 0x00070000 +#define CS42L43_DECIM2_VI_RAMP_SHIFT 16 +#define CS42L43_DECIM1_MUTE_MASK 0x00008000 +#define CS42L43_DECIM1_MUTE_SHIFT 15 +#define CS42L43_DECIM1_VOL_MASK 0x00003FC0 +#define CS42L43_DECIM1_VOL_SHIFT 6 +#define CS42L43_DECIM1_VD_RAMP_MASK 0x00000038 +#define CS42L43_DECIM1_VD_RAMP_SHIFT 3 +#define CS42L43_DECIM1_VI_RAMP_MASK 0x00000007 +#define CS42L43_DECIM1_VI_RAMP_SHIFT 0 + +/* CS42L43_DECIM_VOL_CTRL_CH3_CH4 */ +#define CS42L43_DECIM4_MUTE_MASK 0x80000000 +#define CS42L43_DECIM4_MUTE_SHIFT 31 +#define CS42L43_DECIM4_VOL_MASK 0x3FC00000 +#define CS42L43_DECIM4_VOL_SHIFT 22 +#define CS42L43_DECIM4_VD_RAMP_MASK 0x00380000 +#define CS42L43_DECIM4_VD_RAMP_SHIFT 19 +#define CS42L43_DECIM4_VI_RAMP_MASK 0x00070000 +#define CS42L43_DECIM4_VI_RAMP_SHIFT 16 +#define CS42L43_DECIM3_MUTE_MASK 0x00008000 +#define CS42L43_DECIM3_MUTE_SHIFT 15 +#define CS42L43_DECIM3_VOL_MASK 0x00003FC0 +#define CS42L43_DECIM3_VOL_SHIFT 6 +#define CS42L43_DECIM3_VD_RAMP_MASK 0x00000038 +#define CS42L43_DECIM3_VD_RAMP_SHIFT 3 +#define CS42L43_DECIM3_VI_RAMP_MASK 0x00000007 +#define CS42L43_DECIM3_VI_RAMP_SHIFT 0 + +/* CS42L43_DECIM_VOL_CTRL_UPDATE */ +#define CS42L43_DECIM4_VOL_UPDATE_MASK 0x00000008 +#define CS42L43_DECIM4_VOL_UPDATE_SHIFT 3 +#define CS42L43_DECIM3_VOL_UPDATE_MASK 0x00000004 +#define CS42L43_DECIM3_VOL_UPDATE_SHIFT 2 +#define CS42L43_DECIM2_VOL_UPDATE_MASK 0x00000002 +#define CS42L43_DECIM2_VOL_UPDATE_SHIFT 1 +#define CS42L43_DECIM1_VOL_UPDATE_MASK 0x00000001 +#define CS42L43_DECIM1_VOL_UPDATE_SHIFT 0 + +/* CS42L43_INTP_VOLUME_CTRL1..CS42L43_INTP_VOLUME_CTRL2 */ +#define CS42L43_AMP1_2_VU_MASK 0x00000200 +#define CS42L43_AMP1_2_VU_SHIFT 9 +#define CS42L43_AMP_MUTE_MASK 0x00000100 +#define CS42L43_AMP_MUTE_SHIFT 8 +#define CS42L43_AMP_VOL_MASK 0x000000FF +#define CS42L43_AMP_VOL_SHIFT 0 + +/* CS42L43_AMP1_2_VOL_RAMP */ +#define CS42L43_AMP1_2_VD_RAMP_MASK 0x00000070 +#define CS42L43_AMP1_2_VD_RAMP_SHIFT 4 +#define CS42L43_AMP1_2_VI_RAMP_MASK 0x00000007 +#define CS42L43_AMP1_2_VI_RAMP_SHIFT 0 + +/* CS42L43_ASP_CTRL */ +#define CS42L43_ASP_FSYNC_MODE_MASK 0x00000004 +#define CS42L43_ASP_FSYNC_MODE_SHIFT 2 +#define CS42L43_ASP_BCLK_EN_MASK 0x00000002 +#define CS42L43_ASP_BCLK_EN_SHIFT 1 +#define CS42L43_ASP_FSYNC_EN_MASK 0x00000001 +#define CS42L43_ASP_FSYNC_EN_SHIFT 0 + +/* CS42L43_ASP_FSYNC_CTRL1 */ +#define CS42L43_ASP_FSYNC_M_MASK 0x0007FFFF +#define CS42L43_ASP_FSYNC_M_SHIFT 0 + +/* CS42L43_ASP_FSYNC_CTRL3 */ +#define CS42L43_ASP_FSYNC_IN_INV_MASK 0x00000002 +#define CS42L43_ASP_FSYNC_IN_INV_SHIFT 1 +#define CS42L43_ASP_FSYNC_OUT_INV_MASK 0x00000001 +#define CS42L43_ASP_FSYNC_OUT_INV_SHIFT 0 + +/* CS42L43_ASP_FSYNC_CTRL4 */ +#define CS42L43_ASP_NUM_BCLKS_PER_FSYNC_MASK 0x00001FFE +#define CS42L43_ASP_NUM_BCLKS_PER_FSYNC_SHIFT 1 + +/* CS42L43_ASP_DATA_CTRL */ +#define CS42L43_ASP_FSYNC_FRAME_START_PHASE_MASK 0x00000008 +#define CS42L43_ASP_FSYNC_FRAME_START_PHASE_SHIFT 3 +#define CS42L43_ASP_FSYNC_FRAME_START_DLY_MASK 0x00000007 +#define CS42L43_ASP_FSYNC_FRAME_START_DLY_SHIFT 0 + +/* CS42L43_ASP_RX_EN */ +#define CS42L43_ASP_RX_CH6_EN_MASK 0x00000020 +#define CS42L43_ASP_RX_CH6_EN_SHIFT 5 +#define CS42L43_ASP_RX_CH5_EN_MASK 0x00000010 +#define CS42L43_ASP_RX_CH5_EN_SHIFT 4 +#define CS42L43_ASP_RX_CH4_EN_MASK 0x00000008 +#define CS42L43_ASP_RX_CH4_EN_SHIFT 3 +#define CS42L43_ASP_RX_CH3_EN_MASK 0x00000004 +#define CS42L43_ASP_RX_CH3_EN_SHIFT 2 +#define CS42L43_ASP_RX_CH2_EN_MASK 0x00000002 +#define CS42L43_ASP_RX_CH2_EN_SHIFT 1 +#define CS42L43_ASP_RX_CH1_EN_MASK 0x00000001 +#define CS42L43_ASP_RX_CH1_EN_SHIFT 0 + +/* CS42L43_ASP_TX_EN */ +#define CS42L43_ASP_TX_CH6_EN_MASK 0x00000020 +#define CS42L43_ASP_TX_CH6_EN_SHIFT 5 +#define CS42L43_ASP_TX_CH5_EN_MASK 0x00000010 +#define CS42L43_ASP_TX_CH5_EN_SHIFT 4 +#define CS42L43_ASP_TX_CH4_EN_MASK 0x00000008 +#define CS42L43_ASP_TX_CH4_EN_SHIFT 3 +#define CS42L43_ASP_TX_CH3_EN_MASK 0x00000004 +#define CS42L43_ASP_TX_CH3_EN_SHIFT 2 +#define CS42L43_ASP_TX_CH2_EN_MASK 0x00000002 +#define CS42L43_ASP_TX_CH2_EN_SHIFT 1 +#define CS42L43_ASP_TX_CH1_EN_MASK 0x00000001 +#define CS42L43_ASP_TX_CH1_EN_SHIFT 0 + +/* CS42L43_ASP_RX_CH1_CTRL..CS42L43_ASP_TX_CH6_CTRL */ +#define CS42L43_ASP_CH_WIDTH_MASK 0x001F0000 +#define CS42L43_ASP_CH_WIDTH_SHIFT 16 +#define CS42L43_ASP_CH_SLOT_MASK 0x00001FFE +#define CS42L43_ASP_CH_SLOT_SHIFT 1 +#define CS42L43_ASP_CH_SLOT_PHASE_MASK 0x00000001 +#define CS42L43_ASP_CH_SLOT_PHASE_SHIFT 0 + +/* CS42L43_ASPTX1_INPUT..CS42L43_AMP4MIX_INPUT4 */ +#define CS42L43_MIXER_VOL_MASK 0x00FE0000 +#define CS42L43_MIXER_VOL_SHIFT 17 +#define CS42L43_MIXER_SRC_MASK 0x000001FF +#define CS42L43_MIXER_SRC_SHIFT 0 + +/* CS42L43_ASRC_INT_ENABLES */ +#define CS42L43_ASRC_INT4_EN_MASK 0x00000008 +#define CS42L43_ASRC_INT4_EN_SHIFT 3 +#define CS42L43_ASRC_INT3_EN_MASK 0x00000004 +#define CS42L43_ASRC_INT3_EN_SHIFT 2 +#define CS42L43_ASRC_INT2_EN_MASK 0x00000002 +#define CS42L43_ASRC_INT2_EN_SHIFT 1 +#define CS42L43_ASRC_INT1_EN_MASK 0x00000001 +#define CS42L43_ASRC_INT1_EN_SHIFT 0 + +/* CS42L43_ASRC_DEC_ENABLES */ +#define CS42L43_ASRC_DEC4_EN_MASK 0x00000008 +#define CS42L43_ASRC_DEC4_EN_SHIFT 3 +#define CS42L43_ASRC_DEC3_EN_MASK 0x00000004 +#define CS42L43_ASRC_DEC3_EN_SHIFT 2 +#define CS42L43_ASRC_DEC2_EN_MASK 0x00000002 +#define CS42L43_ASRC_DEC2_EN_SHIFT 1 +#define CS42L43_ASRC_DEC1_EN_MASK 0x00000001 +#define CS42L43_ASRC_DEC1_EN_SHIFT 0 + +/* CS42L43_PDNCNTL */ +#define CS42L43_RING_SENSE_EN_MASK 0x00000002 +#define CS42L43_RING_SENSE_EN_SHIFT 1 + +/* CS42L43_RINGSENSE_DEB_CTRL */ +#define CS42L43_RINGSENSE_INV_MASK 0x00000080 +#define CS42L43_RINGSENSE_INV_SHIFT 7 +#define CS42L43_RINGSENSE_PULLUP_PDNB_MASK 0x00000040 +#define CS42L43_RINGSENSE_PULLUP_PDNB_SHIFT 6 +#define CS42L43_RINGSENSE_FALLING_DB_TIME_MASK 0x00000038 +#define CS42L43_RINGSENSE_FALLING_DB_TIME_SHIFT 3 +#define CS42L43_RINGSENSE_RISING_DB_TIME_MASK 0x00000007 +#define CS42L43_RINGSENSE_RISING_DB_TIME_SHIFT 0 + +/* CS42L43_TIPSENSE_DEB_CTRL */ +#define CS42L43_TIPSENSE_INV_MASK 0x00000080 +#define CS42L43_TIPSENSE_INV_SHIFT 7 +#define CS42L43_TIPSENSE_FALLING_DB_TIME_MASK 0x00000038 +#define CS42L43_TIPSENSE_FALLING_DB_TIME_SHIFT 3 +#define CS42L43_TIPSENSE_RISING_DB_TIME_MASK 0x00000007 +#define CS42L43_TIPSENSE_RISING_DB_TIME_SHIFT 0 + +/* CS42L43_TIP_RING_SENSE_INTERRUPT_STATUS */ +#define CS42L43_TIPSENSE_UNPLUG_DB_STS_MASK 0x00000008 +#define CS42L43_TIPSENSE_UNPLUG_DB_STS_SHIFT 3 +#define CS42L43_TIPSENSE_PLUG_DB_STS_MASK 0x00000004 +#define CS42L43_TIPSENSE_PLUG_DB_STS_SHIFT 2 +#define CS42L43_RINGSENSE_UNPLUG_DB_STS_MASK 0x00000002 +#define CS42L43_RINGSENSE_UNPLUG_DB_STS_SHIFT 1 +#define CS42L43_RINGSENSE_PLUG_DB_STS_MASK 0x00000001 +#define CS42L43_RINGSENSE_PLUG_DB_STS_SHIFT 0 + +/* CS42L43_HS2 */ +#define CS42L43_HS_CLAMP_DISABLE_MASK 0x10000000 +#define CS42L43_HS_CLAMP_DISABLE_SHIFT 28 +#define CS42L43_HSBIAS_RAMP_MASK 0x0C000000 +#define CS42L43_HSBIAS_RAMP_SHIFT 26 +#define CS42L43_HSDET_MODE_MASK 0x00018000 +#define CS42L43_HSDET_MODE_SHIFT 15 +#define CS42L43_HSDET_MANUAL_MODE_MASK 0x00006000 +#define CS42L43_HSDET_MANUAL_MODE_SHIFT 13 +#define CS42L43_AUTO_HSDET_TIME_MASK 0x00000700 +#define CS42L43_AUTO_HSDET_TIME_SHIFT 8 +#define CS42L43_AMP3_4_GNDREF_HS3_SEL_MASK 0x00000080 +#define CS42L43_AMP3_4_GNDREF_HS3_SEL_SHIFT 7 +#define CS42L43_AMP3_4_GNDREF_HS4_SEL_MASK 0x00000040 +#define CS42L43_AMP3_4_GNDREF_HS4_SEL_SHIFT 6 +#define CS42L43_HSBIAS_GNDREF_HS3_SEL_MASK 0x00000020 +#define CS42L43_HSBIAS_GNDREF_HS3_SEL_SHIFT 5 +#define CS42L43_HSBIAS_GNDREF_HS4_SEL_MASK 0x00000010 +#define CS42L43_HSBIAS_GNDREF_HS4_SEL_SHIFT 4 +#define CS42L43_HSBIAS_OUT_HS3_SEL_MASK 0x00000008 +#define CS42L43_HSBIAS_OUT_HS3_SEL_SHIFT 3 +#define CS42L43_HSBIAS_OUT_HS4_SEL_MASK 0x00000004 +#define CS42L43_HSBIAS_OUT_HS4_SEL_SHIFT 2 +#define CS42L43_HSGND_HS3_SEL_MASK 0x00000002 +#define CS42L43_HSGND_HS3_SEL_SHIFT 1 +#define CS42L43_HSGND_HS4_SEL_MASK 0x00000001 +#define CS42L43_HSGND_HS4_SEL_SHIFT 0 + +/* CS42L43_HS_STAT */ +#define CS42L43_HSDET_TYPE_STS_MASK 0x00000007 +#define CS42L43_HSDET_TYPE_STS_SHIFT 0 + +/* CS42L43_MCU_SW_INTERRUPT */ +#define CS42L43_CONTROL_IND_MASK 0x00000004 +#define CS42L43_CONTROL_IND_SHIFT 2 +#define CS42L43_CONFIGS_IND_MASK 0x00000002 +#define CS42L43_CONFIGS_IND_SHIFT 1 +#define CS42L43_PATCH_IND_MASK 0x00000001 +#define CS42L43_PATCH_IND_SHIFT 0 + +/* CS42L43_STEREO_MIC_CTRL */ +#define CS42L43_HS2_BIAS_SENSE_EN_MASK 0x00000020 +#define CS42L43_HS2_BIAS_SENSE_EN_SHIFT 5 +#define CS42L43_HS1_BIAS_SENSE_EN_MASK 0x00000010 +#define CS42L43_HS1_BIAS_SENSE_EN_SHIFT 4 +#define CS42L43_HS2_BIAS_EN_MASK 0x00000008 +#define CS42L43_HS2_BIAS_EN_SHIFT 3 +#define CS42L43_HS1_BIAS_EN_MASK 0x00000004 +#define CS42L43_HS1_BIAS_EN_SHIFT 2 +#define CS42L43_JACK_STEREO_CONFIG_MASK 0x00000003 +#define CS42L43_JACK_STEREO_CONFIG_SHIFT 0 + +/* CS42L43_STEREO_MIC_CLAMP_CTRL */ +#define CS42L43_SMIC_HPAMP_CLAMP_DIS_FRC_VAL_MASK 0x00000002 +#define CS42L43_SMIC_HPAMP_CLAMP_DIS_FRC_VAL_SHIFT 1 +#define CS42L43_SMIC_HPAMP_CLAMP_DIS_FRC_MASK 0x00000001 +#define CS42L43_SMIC_HPAMP_CLAMP_DIS_FRC_SHIFT 0 + +/* CS42L43_BLOCK_EN2 */ +#define CS42L43_SPI_MSTR_EN_MASK 0x00000001 +#define CS42L43_SPI_MSTR_EN_SHIFT 0 + +/* CS42L43_BLOCK_EN3 */ +#define CS42L43_PDM2_DIN_R_EN_MASK 0x00000020 +#define CS42L43_PDM2_DIN_R_EN_SHIFT 5 +#define CS42L43_PDM2_DIN_L_EN_MASK 0x00000010 +#define CS42L43_PDM2_DIN_L_EN_SHIFT 4 +#define CS42L43_PDM1_DIN_R_EN_MASK 0x00000008 +#define CS42L43_PDM1_DIN_R_EN_SHIFT 3 +#define CS42L43_PDM1_DIN_L_EN_MASK 0x00000004 +#define CS42L43_PDM1_DIN_L_EN_SHIFT 2 +#define CS42L43_ADC2_EN_MASK 0x00000002 +#define CS42L43_ADC2_EN_SHIFT 1 +#define CS42L43_ADC1_EN_MASK 0x00000001 +#define CS42L43_ADC1_EN_SHIFT 0 + +/* CS42L43_BLOCK_EN4 */ +#define CS42L43_ASRC_DEC_BANK_EN_MASK 0x00000002 +#define CS42L43_ASRC_DEC_BANK_EN_SHIFT 1 +#define CS42L43_ASRC_INT_BANK_EN_MASK 0x00000001 +#define CS42L43_ASRC_INT_BANK_EN_SHIFT 0 + +/* CS42L43_BLOCK_EN5 */ +#define CS42L43_ISRC2_BANK_EN_MASK 0x00000002 +#define CS42L43_ISRC2_BANK_EN_SHIFT 1 +#define CS42L43_ISRC1_BANK_EN_MASK 0x00000001 +#define CS42L43_ISRC1_BANK_EN_SHIFT 0 + +/* CS42L43_BLOCK_EN6 */ +#define CS42L43_MIXER_EN_MASK 0x00000001 +#define CS42L43_MIXER_EN_SHIFT 0 + +/* CS42L43_BLOCK_EN7 */ +#define CS42L43_EQ_EN_MASK 0x00000001 +#define CS42L43_EQ_EN_SHIFT 0 + +/* CS42L43_BLOCK_EN8 */ +#define CS42L43_HP_EN_MASK 0x00000001 +#define CS42L43_HP_EN_SHIFT 0 + +/* CS42L43_BLOCK_EN9 */ +#define CS42L43_TONE_EN_MASK 0x00000001 +#define CS42L43_TONE_EN_SHIFT 0 + +/* CS42L43_BLOCK_EN10 */ +#define CS42L43_AMP2_EN_MASK 0x00000002 +#define CS42L43_AMP2_EN_SHIFT 1 +#define CS42L43_AMP1_EN_MASK 0x00000001 +#define CS42L43_AMP1_EN_SHIFT 0 + +/* CS42L43_BLOCK_EN11 */ +#define CS42L43_SPDIF_EN_MASK 0x00000001 +#define CS42L43_SPDIF_EN_SHIFT 0 + +/* CS42L43_TONE_CH1_CTRL..CS42L43_TONE_CH2_CTRL */ +#define CS42L43_TONE_FREQ_MASK 0x00000070 +#define CS42L43_TONE_FREQ_SHIFT 4 +#define CS42L43_TONE_SEL_MASK 0x0000000F +#define CS42L43_TONE_SEL_SHIFT 0 + +/* CS42L43_MIC_DETECT_CONTROL_1 */ +#define CS42L43_BUTTON_DETECT_MODE_MASK 0x00000018 +#define CS42L43_BUTTON_DETECT_MODE_SHIFT 3 +#define CS42L43_HSBIAS_MODE_MASK 0x00000006 +#define CS42L43_HSBIAS_MODE_SHIFT 1 +#define CS42L43_MIC_LVL_DET_DISABLE_MASK 0x00000001 +#define CS42L43_MIC_LVL_DET_DISABLE_SHIFT 0 + +/* CS42L43_DETECT_STATUS_1 */ +#define CS42L43_HSDET_DC_STS_MASK 0x01FF0000 +#define CS42L43_HSDET_DC_STS_SHIFT 16 +#define CS42L43_JACKDET_STS_MASK 0x00000080 +#define CS42L43_JACKDET_STS_SHIFT 7 +#define CS42L43_HSBIAS_CLAMP_STS_MASK 0x00000040 +#define CS42L43_HSBIAS_CLAMP_STS_SHIFT 6 + +/* CS42L43_HS_BIAS_SENSE_AND_CLAMP_AUTOCONTROL */ +#define CS42L43_JACKDET_MODE_MASK 0xC0000000 +#define CS42L43_JACKDET_MODE_SHIFT 30 +#define CS42L43_JACKDET_INV_MASK 0x20000000 +#define CS42L43_JACKDET_INV_SHIFT 29 +#define CS42L43_JACKDET_DB_TIME_MASK 0x03000000 +#define CS42L43_JACKDET_DB_TIME_SHIFT 24 +#define CS42L43_S0_AUTO_ADCMUTE_DISABLE_MASK 0x00800000 +#define CS42L43_S0_AUTO_ADCMUTE_DISABLE_SHIFT 23 +#define CS42L43_HSBIAS_SENSE_EN_MASK 0x00000080 +#define CS42L43_HSBIAS_SENSE_EN_SHIFT 7 +#define CS42L43_AUTO_HSBIAS_CLAMP_EN_MASK 0x00000040 +#define CS42L43_AUTO_HSBIAS_CLAMP_EN_SHIFT 6 +#define CS42L43_JACKDET_SENSE_EN_MASK 0x00000020 +#define CS42L43_JACKDET_SENSE_EN_SHIFT 5 +#define CS42L43_HSBIAS_SENSE_TRIP_MASK 0x00000007 +#define CS42L43_HSBIAS_SENSE_TRIP_SHIFT 0 + +/* CS42L43_MIC_DETECT_CONTROL_ANDROID */ +#define CS42L43_HSDET_LVL_COMBWIDTH_MASK 0xC0000000 +#define CS42L43_HSDET_LVL_COMBWIDTH_SHIFT 30 +#define CS42L43_HSDET_LVL2_THRESH_MASK 0x01FF0000 +#define CS42L43_HSDET_LVL2_THRESH_SHIFT 16 +#define CS42L43_HSDET_LVL1_THRESH_MASK 0x000001FF +#define CS42L43_HSDET_LVL1_THRESH_SHIFT 0 + +/* CS42L43_ISRC1_CTRL..CS42L43_ISRC2_CTRL */ +#define CS42L43_ISRC_INT2_EN_MASK 0x00000200 +#define CS42L43_ISRC_INT2_EN_SHIFT 9 +#define CS42L43_ISRC_INT1_EN_MASK 0x00000100 +#define CS42L43_ISRC_INT1_EN_SHIFT 8 +#define CS42L43_ISRC_DEC2_EN_MASK 0x00000002 +#define CS42L43_ISRC_DEC2_EN_SHIFT 1 +#define CS42L43_ISRC_DEC1_EN_MASK 0x00000001 +#define CS42L43_ISRC_DEC1_EN_SHIFT 0 + +/* CS42L43_CTRL_REG */ +#define CS42L43_PLL_MODE_BYPASS_500_MASK 0x00000004 +#define CS42L43_PLL_MODE_BYPASS_500_SHIFT 2 +#define CS42L43_PLL_MODE_BYPASS_1029_MASK 0x00000002 +#define CS42L43_PLL_MODE_BYPASS_1029_SHIFT 1 +#define CS42L43_PLL_EN_MASK 0x00000001 +#define CS42L43_PLL_EN_SHIFT 0 + +/* CS42L43_FDIV_FRAC */ +#define CS42L43_PLL_DIV_INT_MASK 0xFF000000 +#define CS42L43_PLL_DIV_INT_SHIFT 24 +#define CS42L43_PLL_DIV_FRAC_BYTE2_MASK 0x00FF0000 +#define CS42L43_PLL_DIV_FRAC_BYTE2_SHIFT 16 +#define CS42L43_PLL_DIV_FRAC_BYTE1_MASK 0x0000FF00 +#define CS42L43_PLL_DIV_FRAC_BYTE1_SHIFT 8 +#define CS42L43_PLL_DIV_FRAC_BYTE0_MASK 0x000000FF +#define CS42L43_PLL_DIV_FRAC_BYTE0_SHIFT 0 + +/* CS42L43_CAL_RATIO */ +#define CS42L43_PLL_CAL_RATIO_MASK 0x000000FF +#define CS42L43_PLL_CAL_RATIO_SHIFT 0 + +/* CS42L43_SPI_CLK_CONFIG1 */ +#define CS42L43_SCLK_DIV_MASK 0x0000000F +#define CS42L43_SCLK_DIV_SHIFT 0 + +/* CS42L43_SPI_CONFIG1 */ +#define CS42L43_SPI_SS_IDLE_DUR_MASK 0x0F000000 +#define CS42L43_SPI_SS_IDLE_DUR_SHIFT 24 +#define CS42L43_SPI_SS_DELAY_DUR_MASK 0x000F0000 +#define CS42L43_SPI_SS_DELAY_DUR_SHIFT 16 +#define CS42L43_SPI_THREE_WIRE_MASK 0x00000100 +#define CS42L43_SPI_THREE_WIRE_SHIFT 8 +#define CS42L43_SPI_DPHA_MASK 0x00000040 +#define CS42L43_SPI_DPHA_SHIFT 6 +#define CS42L43_SPI_CPHA_MASK 0x00000020 +#define CS42L43_SPI_CPHA_SHIFT 5 +#define CS42L43_SPI_CPOL_MASK 0x00000010 +#define CS42L43_SPI_CPOL_SHIFT 4 +#define CS42L43_SPI_SS_SEL_MASK 0x00000007 +#define CS42L43_SPI_SS_SEL_SHIFT 0 + +/* CS42L43_SPI_CONFIG2 */ +#define CS42L43_SPI_SS_FRC_MASK 0x00000001 +#define CS42L43_SPI_SS_FRC_SHIFT 0 + +/* CS42L43_SPI_CONFIG3 */ +#define CS42L43_SPI_WDT_ENA_MASK 0x00000001 +#define CS42L43_SPI_WDT_ENA_SHIFT 0 + +/* CS42L43_SPI_CONFIG4 */ +#define CS42L43_SPI_STALL_ENA_MASK 0x00010000 +#define CS42L43_SPI_STALL_ENA_SHIFT 16 + +/* CS42L43_SPI_STATUS1 */ +#define CS42L43_SPI_ABORT_STS_MASK 0x00000002 +#define CS42L43_SPI_ABORT_STS_SHIFT 1 +#define CS42L43_SPI_DONE_STS_MASK 0x00000001 +#define CS42L43_SPI_DONE_STS_SHIFT 0 + +/* CS42L43_SPI_STATUS2 */ +#define CS42L43_SPI_RX_DONE_STS_MASK 0x00000010 +#define CS42L43_SPI_RX_DONE_STS_SHIFT 4 +#define CS42L43_SPI_TX_DONE_STS_MASK 0x00000001 +#define CS42L43_SPI_TX_DONE_STS_SHIFT 0 + +/* CS42L43_TRAN_CONFIG1 */ +#define CS42L43_SPI_START_MASK 0x00000001 +#define CS42L43_SPI_START_SHIFT 0 + +/* CS42L43_TRAN_CONFIG2 */ +#define CS42L43_SPI_ABORT_MASK 0x00000001 +#define CS42L43_SPI_ABORT_SHIFT 0 + +/* CS42L43_TRAN_CONFIG3 */ +#define CS42L43_SPI_WORD_SIZE_MASK 0x00070000 +#define CS42L43_SPI_WORD_SIZE_SHIFT 16 +#define CS42L43_SPI_CMD_MASK 0x00000003 +#define CS42L43_SPI_CMD_SHIFT 0 + +/* CS42L43_TRAN_CONFIG4 */ +#define CS42L43_SPI_TX_LENGTH_MASK 0x0000FFFF +#define CS42L43_SPI_TX_LENGTH_SHIFT 0 + +/* CS42L43_TRAN_CONFIG5 */ +#define CS42L43_SPI_RX_LENGTH_MASK 0x0000FFFF +#define CS42L43_SPI_RX_LENGTH_SHIFT 0 + +/* CS42L43_TRAN_CONFIG6 */ +#define CS42L43_SPI_TX_BLOCK_LENGTH_MASK 0x0000000F +#define CS42L43_SPI_TX_BLOCK_LENGTH_SHIFT 0 + +/* CS42L43_TRAN_CONFIG7 */ +#define CS42L43_SPI_RX_BLOCK_LENGTH_MASK 0x0000000F +#define CS42L43_SPI_RX_BLOCK_LENGTH_SHIFT 0 + +/* CS42L43_TRAN_CONFIG8 */ +#define CS42L43_SPI_RX_DONE_MASK 0x00000010 +#define CS42L43_SPI_RX_DONE_SHIFT 4 +#define CS42L43_SPI_TX_DONE_MASK 0x00000001 +#define CS42L43_SPI_TX_DONE_SHIFT 0 + +/* CS42L43_TRAN_STATUS1 */ +#define CS42L43_SPI_BUSY_STS_MASK 0x00000100 +#define CS42L43_SPI_BUSY_STS_SHIFT 8 +#define CS42L43_SPI_RX_REQUEST_MASK 0x00000010 +#define CS42L43_SPI_RX_REQUEST_SHIFT 4 +#define CS42L43_SPI_TX_REQUEST_MASK 0x00000001 +#define CS42L43_SPI_TX_REQUEST_SHIFT 0 + +/* CS42L43_TRAN_STATUS2 */ +#define CS42L43_SPI_TX_BYTE_COUNT_MASK 0x0000FFFF +#define CS42L43_SPI_TX_BYTE_COUNT_SHIFT 0 + +/* CS42L43_TRAN_STATUS3 */ +#define CS42L43_SPI_RX_BYTE_COUNT_MASK 0x0000FFFF +#define CS42L43_SPI_RX_BYTE_COUNT_SHIFT 0 + +/* CS42L43_TX_DATA */ +#define CS42L43_SPI_TX_DATA_MASK 0xFFFFFFFF +#define CS42L43_SPI_TX_DATA_SHIFT 0 + +/* CS42L43_RX_DATA */ +#define CS42L43_SPI_RX_DATA_MASK 0xFFFFFFFF +#define CS42L43_SPI_RX_DATA_SHIFT 0 + +/* CS42L43_DACCNFG1 */ +#define CS42L43_HP_MSTR_VOL_CTRL_EN_MASK 0x00000008 +#define CS42L43_HP_MSTR_VOL_CTRL_EN_SHIFT 3 +#define CS42L43_AMP4_INV_MASK 0x00000002 +#define CS42L43_AMP4_INV_SHIFT 1 +#define CS42L43_AMP3_INV_MASK 0x00000001 +#define CS42L43_AMP3_INV_SHIFT 0 + +/* CS42L43_DACCNFG2 */ +#define CS42L43_HP_AUTO_CLAMP_DISABLE_MASK 0x00000002 +#define CS42L43_HP_AUTO_CLAMP_DISABLE_SHIFT 1 +#define CS42L43_HP_HPF_EN_MASK 0x00000001 +#define CS42L43_HP_HPF_EN_SHIFT 0 + +/* CS42L43_HPPATHVOL */ +#define CS42L43_AMP4_PATH_VOL_MASK 0x01FF0000 +#define CS42L43_AMP4_PATH_VOL_SHIFT 16 +#define CS42L43_AMP3_PATH_VOL_MASK 0x000001FF +#define CS42L43_AMP3_PATH_VOL_SHIFT 0 + +/* CS42L43_PGAVOL */ +#define CS42L43_HP_PATH_VOL_RAMP_MASK 0x0003C000 +#define CS42L43_HP_PATH_VOL_RAMP_SHIFT 14 +#define CS42L43_HP_PATH_VOL_ZC_MASK 0x00002000 +#define CS42L43_HP_PATH_VOL_ZC_SHIFT 13 +#define CS42L43_HP_PATH_VOL_SFT_MASK 0x00001000 +#define CS42L43_HP_PATH_VOL_SFT_SHIFT 12 +#define CS42L43_HP_DIG_VOL_RAMP_MASK 0x00000F00 +#define CS42L43_HP_DIG_VOL_RAMP_SHIFT 8 +#define CS42L43_HP_ANA_VOL_RAMP_MASK 0x0000000F +#define CS42L43_HP_ANA_VOL_RAMP_SHIFT 0 + +/* CS42L43_LOADDETRESULTS */ +#define CS42L43_AMP3_RES_DET_MASK 0x00000003 +#define CS42L43_AMP3_RES_DET_SHIFT 0 + +/* CS42L43_LOADDETENA */ +#define CS42L43_HPLOAD_DET_EN_MASK 0x00000001 +#define CS42L43_HPLOAD_DET_EN_SHIFT 0 + +/* CS42L43_CTRL */ +#define CS42L43_ADPTPWR_MODE_MASK 0x00000007 +#define CS42L43_ADPTPWR_MODE_SHIFT 0 + +/* CS42L43_COEFF_RD_WR0 */ +#define CS42L43_WRITE_MODE_MASK 0x00000002 +#define CS42L43_WRITE_MODE_SHIFT 1 + +/* CS42L43_INIT_DONE0 */ +#define CS42L43_INITIALIZE_DONE_MASK 0x00000001 +#define CS42L43_INITIALIZE_DONE_SHIFT 0 + +/* CS42L43_START_EQZ0 */ +#define CS42L43_START_FILTER_MASK 0x00000001 +#define CS42L43_START_FILTER_SHIFT 0 + +/* CS42L43_MUTE_EQ_IN0 */ +#define CS42L43_MUTE_EQ_CH2_MASK 0x00000002 +#define CS42L43_MUTE_EQ_CH2_SHIFT 1 +#define CS42L43_MUTE_EQ_CH1_MASK 0x00000001 +#define CS42L43_MUTE_EQ_CH1_SHIFT 0 + +/* CS42L43_PLL_INT */ +#define CS42L43_PLL_LOST_LOCK_INT_MASK 0x00000002 +#define CS42L43_PLL_LOST_LOCK_INT_SHIFT 1 +#define CS42L43_PLL_READY_INT_MASK 0x00000001 +#define CS42L43_PLL_READY_INT_SHIFT 0 + +/* CS42L43_SOFT_INT */ +#define CS42L43_CONTROL_APPLIED_INT_MASK 0x00000010 +#define CS42L43_CONTROL_APPLIED_INT_SHIFT 4 +#define CS42L43_CONTROL_WARN_INT_MASK 0x00000008 +#define CS42L43_CONTROL_WARN_INT_SHIFT 3 +#define CS42L43_PATCH_WARN_INT_MASK 0x00000002 +#define CS42L43_PATCH_WARN_INT_SHIFT 1 +#define CS42L43_PATCH_APPLIED_INT_MASK 0x00000001 +#define CS42L43_PATCH_APPLIED_INT_SHIFT 0 + +/* CS42L43_MSM_INT */ +#define CS42L43_HP_STARTUP_DONE_INT_MASK 0x00000800 +#define CS42L43_HP_STARTUP_DONE_INT_SHIFT 11 +#define CS42L43_HP_SHUTDOWN_DONE_INT_MASK 0x00000400 +#define CS42L43_HP_SHUTDOWN_DONE_INT_SHIFT 10 +#define CS42L43_HSDET_DONE_INT_MASK 0x00000200 +#define CS42L43_HSDET_DONE_INT_SHIFT 9 +#define CS42L43_TIPSENSE_UNPLUG_DB_INT_MASK 0x00000080 +#define CS42L43_TIPSENSE_UNPLUG_DB_INT_SHIFT 7 +#define CS42L43_TIPSENSE_PLUG_DB_INT_MASK 0x00000040 +#define CS42L43_TIPSENSE_PLUG_DB_INT_SHIFT 6 +#define CS42L43_RINGSENSE_UNPLUG_DB_INT_MASK 0x00000020 +#define CS42L43_RINGSENSE_UNPLUG_DB_INT_SHIFT 5 +#define CS42L43_RINGSENSE_PLUG_DB_INT_MASK 0x00000010 +#define CS42L43_RINGSENSE_PLUG_DB_INT_SHIFT 4 +#define CS42L43_TIPSENSE_UNPLUG_PDET_INT_MASK 0x00000008 +#define CS42L43_TIPSENSE_UNPLUG_PDET_INT_SHIFT 3 +#define CS42L43_TIPSENSE_PLUG_PDET_INT_MASK 0x00000004 +#define CS42L43_TIPSENSE_PLUG_PDET_INT_SHIFT 2 +#define CS42L43_RINGSENSE_UNPLUG_PDET_INT_MASK 0x00000002 +#define CS42L43_RINGSENSE_UNPLUG_PDET_INT_SHIFT 1 +#define CS42L43_RINGSENSE_PLUG_PDET_INT_MASK 0x00000001 +#define CS42L43_RINGSENSE_PLUG_PDET_INT_SHIFT 0 + +/* CS42L43_ACC_DET_INT */ +#define CS42L43_HS2_BIAS_SENSE_INT_MASK 0x00000800 +#define CS42L43_HS2_BIAS_SENSE_INT_SHIFT 11 +#define CS42L43_HS1_BIAS_SENSE_INT_MASK 0x00000400 +#define CS42L43_HS1_BIAS_SENSE_INT_SHIFT 10 +#define CS42L43_DC_DETECT1_FALSE_INT_MASK 0x00000080 +#define CS42L43_DC_DETECT1_FALSE_INT_SHIFT 7 +#define CS42L43_DC_DETECT1_TRUE_INT_MASK 0x00000040 +#define CS42L43_DC_DETECT1_TRUE_INT_SHIFT 6 +#define CS42L43_HSBIAS_CLAMPED_INT_MASK 0x00000008 +#define CS42L43_HSBIAS_CLAMPED_INT_SHIFT 3 +#define CS42L43_HS3_4_BIAS_SENSE_INT_MASK 0x00000001 +#define CS42L43_HS3_4_BIAS_SENSE_INT_SHIFT 0 + +/* CS42L43_SPI_MSTR_INT */ +#define CS42L43_IRQ_SPI_STALLING_INT_MASK 0x00000004 +#define CS42L43_IRQ_SPI_STALLING_INT_SHIFT 2 +#define CS42L43_IRQ_SPI_STS_INT_MASK 0x00000002 +#define CS42L43_IRQ_SPI_STS_INT_SHIFT 1 +#define CS42L43_IRQ_SPI_BLOCK_INT_MASK 0x00000001 +#define CS42L43_IRQ_SPI_BLOCK_INT_SHIFT 0 + +/* CS42L43_SW_TO_SPI_BRIDGE_INT */ +#define CS42L43_SW2SPI_BUF_OVF_UDF_INT_MASK 0x00000001 +#define CS42L43_SW2SPI_BUF_OVF_UDF_INT_SHIFT 0 + +/* CS42L43_CLASS_D_AMP_INT */ +#define CS42L43_AMP2_CLK_STOP_FAULT_INT_MASK 0x00002000 +#define CS42L43_AMP2_CLK_STOP_FAULT_INT_SHIFT 13 +#define CS42L43_AMP1_CLK_STOP_FAULT_INT_MASK 0x00001000 +#define CS42L43_AMP1_CLK_STOP_FAULT_INT_SHIFT 12 +#define CS42L43_AMP2_VDDSPK_FAULT_INT_MASK 0x00000800 +#define CS42L43_AMP2_VDDSPK_FAULT_INT_SHIFT 11 +#define CS42L43_AMP1_VDDSPK_FAULT_INT_MASK 0x00000400 +#define CS42L43_AMP1_VDDSPK_FAULT_INT_SHIFT 10 +#define CS42L43_AMP2_SHUTDOWN_DONE_INT_MASK 0x00000200 +#define CS42L43_AMP2_SHUTDOWN_DONE_INT_SHIFT 9 +#define CS42L43_AMP1_SHUTDOWN_DONE_INT_MASK 0x00000100 +#define CS42L43_AMP1_SHUTDOWN_DONE_INT_SHIFT 8 +#define CS42L43_AMP2_STARTUP_DONE_INT_MASK 0x00000080 +#define CS42L43_AMP2_STARTUP_DONE_INT_SHIFT 7 +#define CS42L43_AMP1_STARTUP_DONE_INT_MASK 0x00000040 +#define CS42L43_AMP1_STARTUP_DONE_INT_SHIFT 6 +#define CS42L43_AMP2_THERM_SHDN_INT_MASK 0x00000020 +#define CS42L43_AMP2_THERM_SHDN_INT_SHIFT 5 +#define CS42L43_AMP1_THERM_SHDN_INT_MASK 0x00000010 +#define CS42L43_AMP1_THERM_SHDN_INT_SHIFT 4 +#define CS42L43_AMP2_THERM_WARN_INT_MASK 0x00000008 +#define CS42L43_AMP2_THERM_WARN_INT_SHIFT 3 +#define CS42L43_AMP1_THERM_WARN_INT_MASK 0x00000004 +#define CS42L43_AMP1_THERM_WARN_INT_SHIFT 2 +#define CS42L43_AMP2_SCDET_INT_MASK 0x00000002 +#define CS42L43_AMP2_SCDET_INT_SHIFT 1 +#define CS42L43_AMP1_SCDET_INT_MASK 0x00000001 +#define CS42L43_AMP1_SCDET_INT_SHIFT 0 + +/* CS42L43_GPIO_INT */ +#define CS42L43_GPIO3_FALL_INT_MASK 0x00000020 +#define CS42L43_GPIO3_FALL_INT_SHIFT 5 +#define CS42L43_GPIO3_RISE_INT_MASK 0x00000010 +#define CS42L43_GPIO3_RISE_INT_SHIFT 4 +#define CS42L43_GPIO2_FALL_INT_MASK 0x00000008 +#define CS42L43_GPIO2_FALL_INT_SHIFT 3 +#define CS42L43_GPIO2_RISE_INT_MASK 0x00000004 +#define CS42L43_GPIO2_RISE_INT_SHIFT 2 +#define CS42L43_GPIO1_FALL_INT_MASK 0x00000002 +#define CS42L43_GPIO1_FALL_INT_SHIFT 1 +#define CS42L43_GPIO1_RISE_INT_MASK 0x00000001 +#define CS42L43_GPIO1_RISE_INT_SHIFT 0 + +/* CS42L43_HPOUT_INT */ +#define CS42L43_HP_ILIMIT_INT_MASK 0x00000002 +#define CS42L43_HP_ILIMIT_INT_SHIFT 1 +#define CS42L43_HP_LOADDET_DONE_INT_MASK 0x00000001 +#define CS42L43_HP_LOADDET_DONE_INT_SHIFT 0 + +/* CS42L43_BOOT_CONTROL */ +#define CS42L43_LOCK_HW_STS_MASK 0x00000002 +#define CS42L43_LOCK_HW_STS_SHIFT 1 + +/* CS42L43_BLOCK_EN */ +#define CS42L43_MCU_EN_MASK 0x00000001 +#define CS42L43_MCU_EN_SHIFT 0 + +/* CS42L43_SHUTTER_CONTROL */ +#define CS42L43_STATUS_SPK_SHUTTER_MUTE_MASK 0x00008000 +#define CS42L43_STATUS_SPK_SHUTTER_MUTE_SHIFT 15 +#define CS42L43_SPK_SHUTTER_CFG_MASK 0x00000F00 +#define CS42L43_SPK_SHUTTER_CFG_SHIFT 8 +#define CS42L43_STATUS_MIC_SHUTTER_MUTE_MASK 0x00000080 +#define CS42L43_STATUS_MIC_SHUTTER_MUTE_SHIFT 7 +#define CS42L43_MIC_SHUTTER_CFG_MASK 0x0000000F +#define CS42L43_MIC_SHUTTER_CFG_SHIFT 0 + +/* CS42L43_MCU_SW_REV */ +#define CS42L43_BIOS_SUBMINOR_REV_MASK 0xFF000000 +#define CS42L43_BIOS_SUBMINOR_REV_SHIFT 24 +#define CS42L43_BIOS_MINOR_REV_MASK 0x00F00000 +#define CS42L43_BIOS_MINOR_REV_SHIFT 20 +#define CS42L43_BIOS_MAJOR_REV_MASK 0x000F0000 +#define CS42L43_BIOS_MAJOR_REV_SHIFT 16 +#define CS42L43_FW_SUBMINOR_REV_MASK 0x0000FF00 +#define CS42L43_FW_SUBMINOR_REV_SHIFT 8 +#define CS42L43_FW_MINOR_REV_MASK 0x000000F0 +#define CS42L43_FW_MINOR_REV_SHIFT 4 +#define CS42L43_FW_MAJOR_REV_MASK 0x0000000F +#define CS42L43_FW_MAJOR_REV_SHIFT 0 + +/* CS42L43_NEED_CONFIGS */ +#define CS42L43_FW_PATCH_NEED_CFG_MASK 0x80000000 +#define CS42L43_FW_PATCH_NEED_CFG_SHIFT 31 + +/* CS42L43_FW_MISSION_CTRL_MM_CTRL_SELECTION */ +#define CS42L43_FW_MM_CTRL_MCU_SEL_MASK 0x00000001 +#define CS42L43_FW_MM_CTRL_MCU_SEL_SHIFT 0 + +/* CS42L43_FW_MISSION_CTRL_MM_MCU_CFG_REG */ +#define CS42L43_FW_MISSION_CTRL_MM_MCU_CFG_DISABLE_VAL 0xF05AA50F + +#endif /* CS42L43_CORE_REGS_H */ diff --git a/include/linux/mfd/cs42l43.h b/include/linux/mfd/cs42l43.h new file mode 100644 index 000000000000..cf8263aab41b --- /dev/null +++ b/include/linux/mfd/cs42l43.h @@ -0,0 +1,102 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * CS42L43 core driver external data + * + * Copyright (C) 2022-2023 Cirrus Logic, Inc. and + * Cirrus Logic International Semiconductor Ltd. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#ifndef CS42L43_CORE_EXT_H +#define CS42L43_CORE_EXT_H + +#define CS42L43_N_SUPPLIES 3 + +enum cs42l43_irq_numbers { + CS42L43_PLL_LOST_LOCK, + CS42L43_PLL_READY, + + CS42L43_HP_STARTUP_DONE, + CS42L43_HP_SHUTDOWN_DONE, + CS42L43_HSDET_DONE, + CS42L43_TIPSENSE_UNPLUG_DB, + CS42L43_TIPSENSE_PLUG_DB, + CS42L43_RINGSENSE_UNPLUG_DB, + CS42L43_RINGSENSE_PLUG_DB, + CS42L43_TIPSENSE_UNPLUG_PDET, + CS42L43_TIPSENSE_PLUG_PDET, + CS42L43_RINGSENSE_UNPLUG_PDET, + CS42L43_RINGSENSE_PLUG_PDET, + + CS42L43_HS2_BIAS_SENSE, + CS42L43_HS1_BIAS_SENSE, + CS42L43_DC_DETECT1_FALSE, + CS42L43_DC_DETECT1_TRUE, + CS42L43_HSBIAS_CLAMPED, + CS42L43_HS3_4_BIAS_SENSE, + + CS42L43_AMP2_CLK_STOP_FAULT, + CS42L43_AMP1_CLK_STOP_FAULT, + CS42L43_AMP2_VDDSPK_FAULT, + CS42L43_AMP1_VDDSPK_FAULT, + CS42L43_AMP2_SHUTDOWN_DONE, + CS42L43_AMP1_SHUTDOWN_DONE, + CS42L43_AMP2_STARTUP_DONE, + CS42L43_AMP1_STARTUP_DONE, + CS42L43_AMP2_THERM_SHDN, + CS42L43_AMP1_THERM_SHDN, + CS42L43_AMP2_THERM_WARN, + CS42L43_AMP1_THERM_WARN, + CS42L43_AMP2_SCDET, + CS42L43_AMP1_SCDET, + + CS42L43_GPIO3_FALL, + CS42L43_GPIO3_RISE, + CS42L43_GPIO2_FALL, + CS42L43_GPIO2_RISE, + CS42L43_GPIO1_FALL, + CS42L43_GPIO1_RISE, + + CS42L43_HP_ILIMIT, + CS42L43_HP_LOADDET_DONE, +}; + +struct cs42l43 { + struct device *dev; + struct regmap *regmap; + struct sdw_slave *sdw; + + struct regulator *vdd_p; + struct regulator *vdd_d; + struct regulator_bulk_data core_supplies[CS42L43_N_SUPPLIES]; + + struct gpio_desc *reset; + + int irq; + struct regmap_irq_chip irq_chip; + struct regmap_irq_chip_data *irq_data; + + struct work_struct boot_work; + struct completion device_attach; + struct completion device_detach; + struct completion firmware_download; + int firmware_error; + + unsigned int sdw_freq; + /* Lock to gate control of the PLL and its sources. */ + struct mutex pll_lock; + + bool sdw_pll_active; + bool attached; + bool hw_lock; +}; + +#endif /* CS42L43_CORE_EXT_H */ From d5282a53929791071b17dde3eed52e40f76b101c Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Fri, 4 Aug 2023 11:46:00 +0100 Subject: [PATCH 483/656] pinctrl: cs42l43: Add support for the cs42l43 The CS42L43 is an audio CODEC with integrated MIPI SoundWire interface (Version 1.2.1 compliant), I2C, SPI, and I2S/TDM interfaces designed for portable applications. It provides a high dynamic range, stereo DAC for headphone output, two integrated Class D amplifiers for loudspeakers, and two ADCs for wired headset microphone input or stereo line input. PDM inputs are provided for digital microphones. Add a basic pinctrl driver which supports driver strength for the various pins, gpios, and pinmux for the 2 multi-function pins. Reviewed-by: Linus Walleij Signed-off-by: Charles Keepax Link: https://lore.kernel.org/r/20230804104602.395892-5-ckeepax@opensource.cirrus.com Signed-off-by: Lee Jones --- MAINTAINERS | 1 + drivers/pinctrl/cirrus/Kconfig | 11 + drivers/pinctrl/cirrus/Makefile | 2 + drivers/pinctrl/cirrus/pinctrl-cs42l43.c | 609 +++++++++++++++++++++++ 4 files changed, 623 insertions(+) create mode 100644 drivers/pinctrl/cirrus/pinctrl-cs42l43.c diff --git a/MAINTAINERS b/MAINTAINERS index 45aa18c45d20..4e35a4880cf8 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -4880,6 +4880,7 @@ L: patches@opensource.cirrus.com S: Maintained F: Documentation/devicetree/bindings/sound/cirrus,cs* F: drivers/mfd/cs42l43* +F: drivers/pinctrl/cirrus/pinctrl-cs42l43* F: include/dt-bindings/sound/cs* F: include/linux/mfd/cs42l43* F: include/sound/cs* diff --git a/drivers/pinctrl/cirrus/Kconfig b/drivers/pinctrl/cirrus/Kconfig index 530426a74f75..d6318cb57aff 100644 --- a/drivers/pinctrl/cirrus/Kconfig +++ b/drivers/pinctrl/cirrus/Kconfig @@ -1,4 +1,15 @@ # SPDX-License-Identifier: GPL-2.0-only +config PINCTRL_CS42L43 + tristate "Cirrus Logic CS42L43 Pinctrl Driver" + depends on MFD_CS42L43 + select GPIOLIB + select PINMUX + select PINCONF + select GENERIC_PINCONF + help + Select this to support the GPIO/Pinctrl functions of the Cirrus + Logic CS42L43 PC CODEC. + config PINCTRL_LOCHNAGAR tristate "Cirrus Logic Lochnagar pinctrl driver" depends on MFD_LOCHNAGAR diff --git a/drivers/pinctrl/cirrus/Makefile b/drivers/pinctrl/cirrus/Makefile index a484518c840e..9b618d766907 100644 --- a/drivers/pinctrl/cirrus/Makefile +++ b/drivers/pinctrl/cirrus/Makefile @@ -1,5 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only # Cirrus Logic pinctrl drivers +obj-$(CONFIG_PINCTRL_CS42L43) += pinctrl-cs42l43.o + obj-$(CONFIG_PINCTRL_LOCHNAGAR) += pinctrl-lochnagar.o pinctrl-madera-objs := pinctrl-madera-core.o diff --git a/drivers/pinctrl/cirrus/pinctrl-cs42l43.c b/drivers/pinctrl/cirrus/pinctrl-cs42l43.c new file mode 100644 index 000000000000..c09646318419 --- /dev/null +++ b/drivers/pinctrl/cirrus/pinctrl-cs42l43.c @@ -0,0 +1,609 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// CS42L43 Pinctrl and GPIO driver +// +// Copyright (c) 2023 Cirrus Logic, Inc. and +// Cirrus Logic International Semiconductor Ltd. + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "../pinctrl-utils.h" + +#define CS42L43_NUM_GPIOS 3 + +struct cs42l43_pin { + struct gpio_chip gpio_chip; + + struct device *dev; + struct regmap *regmap; + bool shutters_locked; +}; + +struct cs42l43_pin_data { + unsigned int reg; + unsigned int shift; + unsigned int mask; +}; + +#define CS42L43_PIN(_number, _name, _reg, _field) { \ + .number = _number, .name = _name, \ + .drv_data = &((struct cs42l43_pin_data){ \ + .reg = CS42L43_##_reg, \ + .shift = CS42L43_##_field##_DRV_SHIFT, \ + .mask = CS42L43_##_field##_DRV_MASK, \ + }), \ +} + +static const struct pinctrl_pin_desc cs42l43_pin_pins[] = { + CS42L43_PIN(0, "gpio1", DRV_CTRL4, GPIO1), + CS42L43_PIN(1, "gpio2", DRV_CTRL4, GPIO2), + CS42L43_PIN(2, "gpio3", DRV_CTRL4, GPIO3), + CS42L43_PIN(3, "asp_dout", DRV_CTRL1, ASP_DOUT), + CS42L43_PIN(4, "asp_fsync", DRV_CTRL1, ASP_FSYNC), + CS42L43_PIN(5, "asp_bclk", DRV_CTRL1, ASP_BCLK), + CS42L43_PIN(6, "pdmout2_clk", DRV_CTRL3, PDMOUT2_CLK), + CS42L43_PIN(7, "pdmout2_data", DRV_CTRL3, PDMOUT2_DATA), + CS42L43_PIN(8, "pdmout1_clk", DRV_CTRL3, PDMOUT1_CLK), + CS42L43_PIN(9, "pdmout1_data", DRV_CTRL3, PDMOUT1_DATA), + CS42L43_PIN(10, "i2c_sda", DRV_CTRL3, I2C_SDA), + CS42L43_PIN(11, "i2c_scl", DRV_CTRL_5, I2C_SCL), + CS42L43_PIN(12, "spi_miso", DRV_CTRL3, SPI_MISO), + CS42L43_PIN(13, "spi_sck", DRV_CTRL_5, SPI_SCK), + CS42L43_PIN(14, "spi_ssb", DRV_CTRL_5, SPI_SSB), +}; + +static const unsigned int cs42l43_pin_gpio1_pins[] = { 0 }; +static const unsigned int cs42l43_pin_gpio2_pins[] = { 1 }; +static const unsigned int cs42l43_pin_gpio3_pins[] = { 2 }; +static const unsigned int cs42l43_pin_asp_pins[] = { 3, 4, 5 }; +static const unsigned int cs42l43_pin_pdmout2_pins[] = { 6, 7 }; +static const unsigned int cs42l43_pin_pdmout1_pins[] = { 8, 9 }; +static const unsigned int cs42l43_pin_i2c_pins[] = { 10, 11 }; +static const unsigned int cs42l43_pin_spi_pins[] = { 12, 13, 14 }; + +#define CS42L43_PINGROUP(_name) \ + PINCTRL_PINGROUP(#_name, cs42l43_pin_##_name##_pins, \ + ARRAY_SIZE(cs42l43_pin_##_name##_pins)) + +static const struct pingroup cs42l43_pin_groups[] = { + CS42L43_PINGROUP(gpio1), + CS42L43_PINGROUP(gpio2), + CS42L43_PINGROUP(gpio3), + CS42L43_PINGROUP(asp), + CS42L43_PINGROUP(pdmout2), + CS42L43_PINGROUP(pdmout1), + CS42L43_PINGROUP(i2c), + CS42L43_PINGROUP(spi), +}; + +static int cs42l43_pin_get_groups_count(struct pinctrl_dev *pctldev) +{ + return ARRAY_SIZE(cs42l43_pin_groups); +} + +static const char *cs42l43_pin_get_group_name(struct pinctrl_dev *pctldev, + unsigned int group_idx) +{ + return cs42l43_pin_groups[group_idx].name; +} + +static int cs42l43_pin_get_group_pins(struct pinctrl_dev *pctldev, + unsigned int group_idx, + const unsigned int **pins, + unsigned int *num_pins) +{ + *pins = cs42l43_pin_groups[group_idx].pins; + *num_pins = cs42l43_pin_groups[group_idx].npins; + + return 0; +} + +static const struct pinctrl_ops cs42l43_pin_group_ops = { + .get_groups_count = cs42l43_pin_get_groups_count, + .get_group_name = cs42l43_pin_get_group_name, + .get_group_pins = cs42l43_pin_get_group_pins, +#if IS_ENABLED(CONFIG_OF) + .dt_node_to_map = pinconf_generic_dt_node_to_map_all, + .dt_free_map = pinconf_generic_dt_free_map, +#endif +}; + +enum cs42l43_pin_funcs { + CS42L43_FUNC_GPIO, + CS42L43_FUNC_SPDIF, + CS42L43_FUNC_IRQ, + CS42L43_FUNC_MIC_SHT, + CS42L43_FUNC_SPK_SHT, + CS42L43_FUNC_MAX +}; + +static const char * const cs42l43_pin_funcs[] = { + "gpio", "spdif", "irq", "mic-shutter", "spk-shutter", +}; + +static const char * const cs42l43_pin_gpio_groups[] = { "gpio1", "gpio3" }; +static const char * const cs42l43_pin_spdif_groups[] = { "gpio3" }; +static const char * const cs42l43_pin_irq_groups[] = { "gpio1" }; +static const char * const cs42l43_pin_shutter_groups[] = { "gpio1", "gpio2", "gpio3" }; + +static const struct pinfunction cs42l43_pin_func_groups[] = { + PINCTRL_PINFUNCTION("gpio", cs42l43_pin_gpio_groups, + ARRAY_SIZE(cs42l43_pin_gpio_groups)), + PINCTRL_PINFUNCTION("spdif", cs42l43_pin_spdif_groups, + ARRAY_SIZE(cs42l43_pin_spdif_groups)), + PINCTRL_PINFUNCTION("irq", cs42l43_pin_irq_groups, + ARRAY_SIZE(cs42l43_pin_irq_groups)), + PINCTRL_PINFUNCTION("mic-shutter", cs42l43_pin_shutter_groups, + ARRAY_SIZE(cs42l43_pin_shutter_groups)), + PINCTRL_PINFUNCTION("spk-shutter", cs42l43_pin_shutter_groups, + ARRAY_SIZE(cs42l43_pin_shutter_groups)), +}; + +static_assert(ARRAY_SIZE(cs42l43_pin_funcs) == CS42L43_FUNC_MAX); +static_assert(ARRAY_SIZE(cs42l43_pin_func_groups) == CS42L43_FUNC_MAX); + +static int cs42l43_pin_get_func_count(struct pinctrl_dev *pctldev) +{ + return ARRAY_SIZE(cs42l43_pin_funcs); +} + +static const char *cs42l43_pin_get_func_name(struct pinctrl_dev *pctldev, + unsigned int func_idx) +{ + return cs42l43_pin_funcs[func_idx]; +} + +static int cs42l43_pin_get_func_groups(struct pinctrl_dev *pctldev, + unsigned int func_idx, + const char * const **groups, + unsigned int * const num_groups) +{ + *groups = cs42l43_pin_func_groups[func_idx].groups; + *num_groups = cs42l43_pin_func_groups[func_idx].ngroups; + + return 0; +} + +static int cs42l43_pin_set_mux(struct pinctrl_dev *pctldev, + unsigned int func_idx, unsigned int group_idx) +{ + struct cs42l43_pin *priv = pinctrl_dev_get_drvdata(pctldev); + unsigned int reg, mask, val; + + dev_dbg(priv->dev, "Setting %s to %s\n", + cs42l43_pin_groups[group_idx].name, cs42l43_pin_funcs[func_idx]); + + switch (func_idx) { + case CS42L43_FUNC_MIC_SHT: + reg = CS42L43_SHUTTER_CONTROL; + mask = CS42L43_MIC_SHUTTER_CFG_MASK; + val = 0x2 << (group_idx + CS42L43_MIC_SHUTTER_CFG_SHIFT); + break; + case CS42L43_FUNC_SPK_SHT: + reg = CS42L43_SHUTTER_CONTROL; + mask = CS42L43_SPK_SHUTTER_CFG_MASK; + val = 0x2 << (group_idx + CS42L43_SPK_SHUTTER_CFG_SHIFT); + break; + default: + reg = CS42L43_GPIO_FN_SEL; + mask = BIT(group_idx + CS42L43_GPIO1_FN_SEL_SHIFT); + val = (func_idx == CS42L43_FUNC_GPIO) ? + (0x1 << (group_idx + CS42L43_GPIO1_FN_SEL_SHIFT)) : 0; + break; + } + + if (priv->shutters_locked && reg == CS42L43_SHUTTER_CONTROL) { + dev_err(priv->dev, "Shutter configuration not available\n"); + return -EPERM; + } + + return regmap_update_bits(priv->regmap, reg, mask, val); +} + +static int cs42l43_gpio_set_direction(struct pinctrl_dev *pctldev, + struct pinctrl_gpio_range *range, + unsigned int offset, bool input) +{ + struct cs42l43_pin *priv = pinctrl_dev_get_drvdata(pctldev); + unsigned int shift = offset + CS42L43_GPIO1_DIR_SHIFT; + int ret; + + dev_dbg(priv->dev, "Setting gpio%d to %s\n", + offset + 1, input ? "input" : "output"); + + ret = pm_runtime_resume_and_get(priv->dev); + if (ret) { + dev_err(priv->dev, "Failed to resume for direction: %d\n", ret); + return ret; + } + + ret = regmap_update_bits(priv->regmap, CS42L43_GPIO_CTRL1, + BIT(shift), !!input << shift); + if (ret) + dev_err(priv->dev, "Failed to set gpio%d direction: %d\n", + offset + 1, ret); + + pm_runtime_put(priv->dev); + + return ret; +} + +static int cs42l43_gpio_request_enable(struct pinctrl_dev *pctldev, + struct pinctrl_gpio_range *range, + unsigned int offset) +{ + return cs42l43_pin_set_mux(pctldev, 0, offset); +} + +static void cs42l43_gpio_disable_free(struct pinctrl_dev *pctldev, + struct pinctrl_gpio_range *range, + unsigned int offset) +{ + cs42l43_gpio_set_direction(pctldev, range, offset, true); +} + +static const struct pinmux_ops cs42l43_pin_mux_ops = { + .get_functions_count = cs42l43_pin_get_func_count, + .get_function_name = cs42l43_pin_get_func_name, + .get_function_groups = cs42l43_pin_get_func_groups, + + .set_mux = cs42l43_pin_set_mux, + + .gpio_request_enable = cs42l43_gpio_request_enable, + .gpio_disable_free = cs42l43_gpio_disable_free, + .gpio_set_direction = cs42l43_gpio_set_direction, + + .strict = true, +}; + +static const unsigned int cs42l43_pin_drv_str_ma[] = { 1, 2, 4, 8, 9, 10, 12, 16 }; + +static inline int cs42l43_pin_get_drv_str(struct cs42l43_pin *priv, unsigned int pin) +{ + const struct cs42l43_pin_data *pdat = cs42l43_pin_pins[pin].drv_data; + unsigned int val; + int ret; + + ret = regmap_read(priv->regmap, pdat->reg, &val); + if (ret) + return ret; + + return cs42l43_pin_drv_str_ma[(val & pdat->mask) >> pdat->shift]; +} + +static inline int cs42l43_pin_set_drv_str(struct cs42l43_pin *priv, unsigned int pin, + unsigned int ma) +{ + const struct cs42l43_pin_data *pdat = cs42l43_pin_pins[pin].drv_data; + int i; + + for (i = 0; i < ARRAY_SIZE(cs42l43_pin_drv_str_ma); i++) { + if (ma == cs42l43_pin_drv_str_ma[i]) { + if ((i << pdat->shift) > pdat->mask) + goto err; + + dev_dbg(priv->dev, "Set drive strength for %s to %d mA\n", + cs42l43_pin_pins[pin].name, ma); + + return regmap_update_bits(priv->regmap, pdat->reg, + pdat->mask, i << pdat->shift); + } + } + +err: + dev_err(priv->dev, "Invalid drive strength for %s: %d mA\n", + cs42l43_pin_pins[pin].name, ma); + return -EINVAL; +} + +static inline int cs42l43_pin_get_db(struct cs42l43_pin *priv, unsigned int pin) +{ + unsigned int val; + int ret; + + if (pin >= CS42L43_NUM_GPIOS) + return -ENOTSUPP; + + ret = regmap_read(priv->regmap, CS42L43_GPIO_CTRL2, &val); + if (ret) + return ret; + + if (val & (CS42L43_GPIO1_DEGLITCH_BYP_MASK << pin)) + return 0; + + return 85; // Debounce is roughly 85uS +} + +static inline int cs42l43_pin_set_db(struct cs42l43_pin *priv, unsigned int pin, + unsigned int us) +{ + if (pin >= CS42L43_NUM_GPIOS) + return -ENOTSUPP; + + dev_dbg(priv->dev, "Set debounce %s for %s\n", + str_on_off(us), cs42l43_pin_pins[pin].name); + + return regmap_update_bits(priv->regmap, CS42L43_GPIO_CTRL2, + CS42L43_GPIO1_DEGLITCH_BYP_MASK << pin, + !!us << pin); +} + +static int cs42l43_pin_config_get(struct pinctrl_dev *pctldev, + unsigned int pin, unsigned long *config) +{ + struct cs42l43_pin *priv = pinctrl_dev_get_drvdata(pctldev); + unsigned int param = pinconf_to_config_param(*config); + int ret; + + switch (param) { + case PIN_CONFIG_DRIVE_STRENGTH: + ret = cs42l43_pin_get_drv_str(priv, pin); + if (ret < 0) + return ret; + break; + case PIN_CONFIG_INPUT_DEBOUNCE: + ret = cs42l43_pin_get_db(priv, pin); + if (ret < 0) + return ret; + break; + default: + return -ENOTSUPP; + } + + *config = pinconf_to_config_packed(param, ret); + + return 0; +} + +static int cs42l43_pin_config_set(struct pinctrl_dev *pctldev, unsigned int pin, + unsigned long *configs, unsigned int num_configs) +{ + struct cs42l43_pin *priv = pinctrl_dev_get_drvdata(pctldev); + unsigned int val; + int ret; + + while (num_configs) { + val = pinconf_to_config_argument(*configs); + + switch (pinconf_to_config_param(*configs)) { + case PIN_CONFIG_DRIVE_STRENGTH: + ret = cs42l43_pin_set_drv_str(priv, pin, val); + if (ret) + return ret; + break; + case PIN_CONFIG_INPUT_DEBOUNCE: + ret = cs42l43_pin_set_db(priv, pin, val); + if (ret) + return ret; + break; + default: + return -ENOTSUPP; + } + + configs++; + num_configs--; + } + + return 0; +} + +static int cs42l43_pin_config_group_get(struct pinctrl_dev *pctldev, + unsigned int selector, unsigned long *config) +{ + int i, ret; + + for (i = 0; i < cs42l43_pin_groups[selector].npins; ++i) { + ret = cs42l43_pin_config_get(pctldev, + cs42l43_pin_groups[selector].pins[i], + config); + if (ret) + return ret; + } + + return 0; +} + +static int cs42l43_pin_config_group_set(struct pinctrl_dev *pctldev, + unsigned int selector, + unsigned long *configs, + unsigned int num_configs) +{ + int i, ret; + + for (i = 0; i < cs42l43_pin_groups[selector].npins; ++i) { + ret = cs42l43_pin_config_set(pctldev, + cs42l43_pin_groups[selector].pins[i], + configs, num_configs); + if (ret) + return ret; + } + + return 0; +} + +static const struct pinconf_ops cs42l43_pin_conf_ops = { + .is_generic = true, + + .pin_config_get = cs42l43_pin_config_get, + .pin_config_set = cs42l43_pin_config_set, + .pin_config_group_get = cs42l43_pin_config_group_get, + .pin_config_group_set = cs42l43_pin_config_group_set, +}; + +static struct pinctrl_desc cs42l43_pin_desc = { + .name = "cs42l43-pinctrl", + .owner = THIS_MODULE, + + .pins = cs42l43_pin_pins, + .npins = ARRAY_SIZE(cs42l43_pin_pins), + + .pctlops = &cs42l43_pin_group_ops, + .pmxops = &cs42l43_pin_mux_ops, + .confops = &cs42l43_pin_conf_ops, +}; + +static int cs42l43_gpio_get(struct gpio_chip *chip, unsigned int offset) +{ + struct cs42l43_pin *priv = gpiochip_get_data(chip); + unsigned int val; + int ret; + + ret = pm_runtime_resume_and_get(priv->dev); + if (ret) { + dev_err(priv->dev, "Failed to resume for get: %d\n", ret); + return ret; + } + + ret = regmap_read(priv->regmap, CS42L43_GPIO_STS, &val); + if (ret) + dev_err(priv->dev, "Failed to get gpio%d: %d\n", offset + 1, ret); + else + ret = !!(val & BIT(offset + CS42L43_GPIO1_STS_SHIFT)); + + pm_runtime_put(priv->dev); + + return ret; +} + +static void cs42l43_gpio_set(struct gpio_chip *chip, unsigned int offset, int value) +{ + struct cs42l43_pin *priv = gpiochip_get_data(chip); + unsigned int shift = offset + CS42L43_GPIO1_LVL_SHIFT; + int ret; + + dev_dbg(priv->dev, "Setting gpio%d to %s\n", + offset + 1, value ? "high" : "low"); + + ret = pm_runtime_resume_and_get(priv->dev); + if (ret) { + dev_err(priv->dev, "Failed to resume for set: %d\n", ret); + return; + } + + ret = regmap_update_bits(priv->regmap, CS42L43_GPIO_CTRL1, + BIT(shift), value << shift); + if (ret) + dev_err(priv->dev, "Failed to set gpio%d: %d\n", offset + 1, ret); + + pm_runtime_put(priv->dev); +} + +static int cs42l43_gpio_direction_in(struct gpio_chip *chip, unsigned int offset) +{ + return pinctrl_gpio_direction_input(chip->base + offset); +} + +static int cs42l43_gpio_direction_out(struct gpio_chip *chip, + unsigned int offset, int value) +{ + cs42l43_gpio_set(chip, offset, value); + + return pinctrl_gpio_direction_output(chip->base + offset); +} + +static int cs42l43_gpio_add_pin_ranges(struct gpio_chip *chip) +{ + struct cs42l43_pin *priv = gpiochip_get_data(chip); + int ret; + + ret = gpiochip_add_pin_range(&priv->gpio_chip, priv->gpio_chip.label, + 0, 0, CS42L43_NUM_GPIOS); + if (ret) + dev_err(priv->dev, "Failed to add GPIO pin range: %d\n", ret); + + return ret; +} + +static int cs42l43_pin_probe(struct platform_device *pdev) +{ + struct cs42l43 *cs42l43 = dev_get_drvdata(pdev->dev.parent); + struct cs42l43_pin *priv; + struct pinctrl_dev *pctldev; + struct fwnode_handle *fwnode = dev_fwnode(cs42l43->dev); + int ret; + + priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->dev = &pdev->dev; + priv->regmap = cs42l43->regmap; + + priv->shutters_locked = cs42l43->hw_lock; + + priv->gpio_chip.request = gpiochip_generic_request; + priv->gpio_chip.free = gpiochip_generic_free; + priv->gpio_chip.direction_input = cs42l43_gpio_direction_in; + priv->gpio_chip.direction_output = cs42l43_gpio_direction_out; + priv->gpio_chip.add_pin_ranges = cs42l43_gpio_add_pin_ranges; + priv->gpio_chip.get = cs42l43_gpio_get; + priv->gpio_chip.set = cs42l43_gpio_set; + priv->gpio_chip.label = dev_name(priv->dev); + priv->gpio_chip.parent = priv->dev; + priv->gpio_chip.can_sleep = true; + priv->gpio_chip.base = -1; + priv->gpio_chip.ngpio = CS42L43_NUM_GPIOS; + + if (is_of_node(fwnode)) { + fwnode = fwnode_get_named_child_node(fwnode, "pinctrl"); + + if (fwnode && !fwnode->dev) + fwnode->dev = priv->dev; + } + + priv->gpio_chip.fwnode = fwnode; + + device_set_node(priv->dev, fwnode); + + devm_pm_runtime_enable(priv->dev); + pm_runtime_idle(priv->dev); + + pctldev = devm_pinctrl_register(priv->dev, &cs42l43_pin_desc, priv); + if (IS_ERR(pctldev)) + return dev_err_probe(priv->dev, PTR_ERR(pctldev), + "Failed to register pinctrl\n"); + + ret = devm_gpiochip_add_data(priv->dev, &priv->gpio_chip, priv); + if (ret) + return dev_err_probe(priv->dev, ret, + "Failed to register gpiochip\n"); + + return 0; +} + +static const struct platform_device_id cs42l43_pin_id_table[] = { + { "cs42l43-pinctrl", }, + {} +}; +MODULE_DEVICE_TABLE(platform, cs42l43_pin_id_table); + +static struct platform_driver cs42l43_pin_driver = { + .driver = { + .name = "cs42l43-pinctrl", + }, + .probe = cs42l43_pin_probe, + .id_table = cs42l43_pin_id_table, +}; +module_platform_driver(cs42l43_pin_driver); + +MODULE_DESCRIPTION("CS42L43 Pinctrl Driver"); +MODULE_AUTHOR("Charles Keepax "); +MODULE_LICENSE("GPL"); From 3faf89f27aab1ef484e088c3b126126a3199615c Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Sat, 12 Aug 2023 20:36:35 +0200 Subject: [PATCH 484/656] gpio: sim: simplify code with cleanup helpers Use macros defined in linux/cleanup.h to automate resource lifetime control in gpio-sim. Signed-off-by: Bartosz Golaszewski Acked-by: Linus Walleij --- drivers/gpio/gpio-sim.c | 254 ++++++++++++++-------------------------- 1 file changed, 85 insertions(+), 169 deletions(-) diff --git a/drivers/gpio/gpio-sim.c b/drivers/gpio/gpio-sim.c index b7161c83c104..141249f2bf40 100644 --- a/drivers/gpio/gpio-sim.c +++ b/drivers/gpio/gpio-sim.c @@ -8,6 +8,7 @@ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt #include +#include #include #include #include @@ -68,7 +69,7 @@ static int gpio_sim_apply_pull(struct gpio_sim_chip *chip, gc = &chip->gc; desc = &gc->gpiodev->descs[offset]; - mutex_lock(&chip->lock); + guard(mutex)(&chip->lock); if (test_bit(FLAG_REQUESTED, &desc->flags) && !test_bit(FLAG_IS_OUT, &desc->flags)) { @@ -104,29 +105,24 @@ set_value: set_pull: __assign_bit(offset, chip->pull_map, value); - mutex_unlock(&chip->lock); return 0; } static int gpio_sim_get(struct gpio_chip *gc, unsigned int offset) { struct gpio_sim_chip *chip = gpiochip_get_data(gc); - int ret; - mutex_lock(&chip->lock); - ret = !!test_bit(offset, chip->value_map); - mutex_unlock(&chip->lock); + guard(mutex)(&chip->lock); - return ret; + return !!test_bit(offset, chip->value_map); } static void gpio_sim_set(struct gpio_chip *gc, unsigned int offset, int value) { struct gpio_sim_chip *chip = gpiochip_get_data(gc); - mutex_lock(&chip->lock); - __assign_bit(offset, chip->value_map, value); - mutex_unlock(&chip->lock); + scoped_guard(mutex, &chip->lock) + __assign_bit(offset, chip->value_map, value); } static int gpio_sim_get_multiple(struct gpio_chip *gc, @@ -134,9 +130,8 @@ static int gpio_sim_get_multiple(struct gpio_chip *gc, { struct gpio_sim_chip *chip = gpiochip_get_data(gc); - mutex_lock(&chip->lock); - bitmap_replace(bits, bits, chip->value_map, mask, gc->ngpio); - mutex_unlock(&chip->lock); + scoped_guard(mutex, &chip->lock) + bitmap_replace(bits, bits, chip->value_map, mask, gc->ngpio); return 0; } @@ -146,9 +141,9 @@ static void gpio_sim_set_multiple(struct gpio_chip *gc, { struct gpio_sim_chip *chip = gpiochip_get_data(gc); - mutex_lock(&chip->lock); - bitmap_replace(chip->value_map, chip->value_map, bits, mask, gc->ngpio); - mutex_unlock(&chip->lock); + scoped_guard(mutex, &chip->lock) + bitmap_replace(chip->value_map, chip->value_map, bits, mask, + gc->ngpio); } static int gpio_sim_direction_output(struct gpio_chip *gc, @@ -156,10 +151,10 @@ static int gpio_sim_direction_output(struct gpio_chip *gc, { struct gpio_sim_chip *chip = gpiochip_get_data(gc); - mutex_lock(&chip->lock); - __clear_bit(offset, chip->direction_map); - __assign_bit(offset, chip->value_map, value); - mutex_unlock(&chip->lock); + scoped_guard(mutex, &chip->lock) { + __clear_bit(offset, chip->direction_map); + __assign_bit(offset, chip->value_map, value); + } return 0; } @@ -168,9 +163,8 @@ static int gpio_sim_direction_input(struct gpio_chip *gc, unsigned int offset) { struct gpio_sim_chip *chip = gpiochip_get_data(gc); - mutex_lock(&chip->lock); - __set_bit(offset, chip->direction_map); - mutex_unlock(&chip->lock); + scoped_guard(mutex, &chip->lock) + __set_bit(offset, chip->direction_map); return 0; } @@ -180,9 +174,8 @@ static int gpio_sim_get_direction(struct gpio_chip *gc, unsigned int offset) struct gpio_sim_chip *chip = gpiochip_get_data(gc); int direction; - mutex_lock(&chip->lock); - direction = !!test_bit(offset, chip->direction_map); - mutex_unlock(&chip->lock); + scoped_guard(mutex, &chip->lock) + direction = !!test_bit(offset, chip->direction_map); return direction ? GPIO_LINE_DIRECTION_IN : GPIO_LINE_DIRECTION_OUT; } @@ -215,9 +208,9 @@ static void gpio_sim_free(struct gpio_chip *gc, unsigned int offset) { struct gpio_sim_chip *chip = gpiochip_get_data(gc); - mutex_lock(&chip->lock); - __assign_bit(offset, chip->value_map, !!test_bit(offset, chip->pull_map)); - mutex_unlock(&chip->lock); + scoped_guard(mutex, &chip->lock) + __assign_bit(offset, chip->value_map, + !!test_bit(offset, chip->pull_map)); } static ssize_t gpio_sim_sysfs_val_show(struct device *dev, @@ -227,9 +220,8 @@ static ssize_t gpio_sim_sysfs_val_show(struct device *dev, struct gpio_sim_chip *chip = dev_get_drvdata(dev); int val; - mutex_lock(&chip->lock); - val = !!test_bit(line_attr->offset, chip->value_map); - mutex_unlock(&chip->lock); + scoped_guard(mutex, &chip->lock) + val = !!test_bit(line_attr->offset, chip->value_map); return sysfs_emit(buf, "%d\n", val); } @@ -258,9 +250,8 @@ static ssize_t gpio_sim_sysfs_pull_show(struct device *dev, struct gpio_sim_chip *chip = dev_get_drvdata(dev); int pull; - mutex_lock(&chip->lock); - pull = !!test_bit(line_attr->offset, chip->pull_map); - mutex_unlock(&chip->lock); + scoped_guard(mutex, &chip->lock) + pull = !!test_bit(line_attr->offset, chip->pull_map); return sysfs_emit(buf, "%s\n", gpio_sim_sysfs_pull_strings[pull]); } @@ -656,17 +647,14 @@ static ssize_t gpio_sim_device_config_dev_name_show(struct config_item *item, { struct gpio_sim_device *dev = to_gpio_sim_device(item); struct platform_device *pdev; - int ret; - mutex_lock(&dev->lock); + guard(mutex)(&dev->lock); + pdev = dev->pdev; if (pdev) - ret = sprintf(page, "%s\n", dev_name(&pdev->dev)); - else - ret = sprintf(page, "gpio-sim.%d\n", dev->id); - mutex_unlock(&dev->lock); + return sprintf(page, "%s\n", dev_name(&pdev->dev)); - return ret; + return sprintf(page, "gpio-sim.%d\n", dev->id); } CONFIGFS_ATTR_RO(gpio_sim_device_config_, dev_name); @@ -677,9 +665,8 @@ gpio_sim_device_config_live_show(struct config_item *item, char *page) struct gpio_sim_device *dev = to_gpio_sim_device(item); bool live; - mutex_lock(&dev->lock); - live = gpio_sim_device_is_live_unlocked(dev); - mutex_unlock(&dev->lock); + scoped_guard(mutex, &dev->lock) + live = gpio_sim_device_is_live_unlocked(dev); return sprintf(page, "%c\n", live ? '1' : '0'); } @@ -834,8 +821,7 @@ gpio_sim_make_bank_swnode(struct gpio_sim_bank *bank, { struct property_entry properties[GPIO_SIM_PROP_MAX]; unsigned int prop_idx = 0, line_names_size = 0; - struct fwnode_handle *swnode; - char **line_names; + char **line_names __free(kfree) = NULL; memset(properties, 0, sizeof(properties)); @@ -854,9 +840,7 @@ gpio_sim_make_bank_swnode(struct gpio_sim_bank *bank, "gpio-line-names", line_names, line_names_size); - swnode = fwnode_create_software_node(properties, parent); - kfree(line_names); - return swnode; + return fwnode_create_software_node(properties, parent); } static void gpio_sim_remove_swnode_recursive(struct fwnode_handle *swnode) @@ -981,7 +965,7 @@ gpio_sim_device_config_live_store(struct config_item *item, if (ret) return ret; - mutex_lock(&dev->lock); + guard(mutex)(&dev->lock); if (live == gpio_sim_device_is_live_unlocked(dev)) ret = -EPERM; @@ -990,8 +974,6 @@ gpio_sim_device_config_live_store(struct config_item *item, else gpio_sim_device_deactivate_unlocked(dev); - mutex_unlock(&dev->lock); - return ret ?: count; } @@ -1028,17 +1010,14 @@ static ssize_t gpio_sim_bank_config_chip_name_show(struct config_item *item, struct gpio_sim_bank *bank = to_gpio_sim_bank(item); struct gpio_sim_device *dev = gpio_sim_bank_get_device(bank); struct gpio_sim_chip_name_ctx ctx = { bank->swnode, page }; - int ret; - mutex_lock(&dev->lock); + guard(mutex)(&dev->lock); + if (gpio_sim_device_is_live_unlocked(dev)) - ret = device_for_each_child(&dev->pdev->dev, &ctx, - gpio_sim_emit_chip_name); - else - ret = sprintf(page, "none\n"); - mutex_unlock(&dev->lock); + return device_for_each_child(&dev->pdev->dev, &ctx, + gpio_sim_emit_chip_name); - return ret; + return sprintf(page, "none\n"); } CONFIGFS_ATTR_RO(gpio_sim_bank_config_, chip_name); @@ -1048,13 +1027,10 @@ gpio_sim_bank_config_label_show(struct config_item *item, char *page) { struct gpio_sim_bank *bank = to_gpio_sim_bank(item); struct gpio_sim_device *dev = gpio_sim_bank_get_device(bank); - int ret; - mutex_lock(&dev->lock); - ret = sprintf(page, "%s\n", bank->label ?: ""); - mutex_unlock(&dev->lock); + guard(mutex)(&dev->lock); - return ret; + return sprintf(page, "%s\n", bank->label ?: ""); } static ssize_t gpio_sim_bank_config_label_store(struct config_item *item, @@ -1064,23 +1040,18 @@ static ssize_t gpio_sim_bank_config_label_store(struct config_item *item, struct gpio_sim_device *dev = gpio_sim_bank_get_device(bank); char *trimmed; - mutex_lock(&dev->lock); + guard(mutex)(&dev->lock); - if (gpio_sim_device_is_live_unlocked(dev)) { - mutex_unlock(&dev->lock); + if (gpio_sim_device_is_live_unlocked(dev)) return -EBUSY; - } trimmed = gpio_sim_strdup_trimmed(page, count); - if (!trimmed) { - mutex_unlock(&dev->lock); + if (!trimmed) return -ENOMEM; - } kfree(bank->label); bank->label = trimmed; - mutex_unlock(&dev->lock); return count; } @@ -1091,13 +1062,10 @@ gpio_sim_bank_config_num_lines_show(struct config_item *item, char *page) { struct gpio_sim_bank *bank = to_gpio_sim_bank(item); struct gpio_sim_device *dev = gpio_sim_bank_get_device(bank); - int ret; - mutex_lock(&dev->lock); - ret = sprintf(page, "%u\n", bank->num_lines); - mutex_unlock(&dev->lock); + guard(mutex)(&dev->lock); - return ret; + return sprintf(page, "%u\n", bank->num_lines); } static ssize_t @@ -1116,16 +1084,13 @@ gpio_sim_bank_config_num_lines_store(struct config_item *item, if (num_lines == 0) return -EINVAL; - mutex_lock(&dev->lock); + guard(mutex)(&dev->lock); - if (gpio_sim_device_is_live_unlocked(dev)) { - mutex_unlock(&dev->lock); + if (gpio_sim_device_is_live_unlocked(dev)) return -EBUSY; - } bank->num_lines = num_lines; - mutex_unlock(&dev->lock); return count; } @@ -1143,13 +1108,10 @@ gpio_sim_line_config_name_show(struct config_item *item, char *page) { struct gpio_sim_line *line = to_gpio_sim_line(item); struct gpio_sim_device *dev = gpio_sim_line_get_device(line); - int ret; - mutex_lock(&dev->lock); - ret = sprintf(page, "%s\n", line->name ?: ""); - mutex_unlock(&dev->lock); + guard(mutex)(&dev->lock); - return ret; + return sprintf(page, "%s\n", line->name ?: ""); } static ssize_t gpio_sim_line_config_name_store(struct config_item *item, @@ -1159,24 +1121,18 @@ static ssize_t gpio_sim_line_config_name_store(struct config_item *item, struct gpio_sim_device *dev = gpio_sim_line_get_device(line); char *trimmed; - mutex_lock(&dev->lock); + guard(mutex)(&dev->lock); - if (gpio_sim_device_is_live_unlocked(dev)) { - mutex_unlock(&dev->lock); + if (gpio_sim_device_is_live_unlocked(dev)) return -EBUSY; - } trimmed = gpio_sim_strdup_trimmed(page, count); - if (!trimmed) { - mutex_unlock(&dev->lock); + if (!trimmed) return -ENOMEM; - } kfree(line->name); line->name = trimmed; - mutex_unlock(&dev->lock); - return count; } @@ -1192,13 +1148,10 @@ static ssize_t gpio_sim_hog_config_name_show(struct config_item *item, { struct gpio_sim_hog *hog = to_gpio_sim_hog(item); struct gpio_sim_device *dev = gpio_sim_hog_get_device(hog); - int ret; - mutex_lock(&dev->lock); - ret = sprintf(page, "%s\n", hog->name ?: ""); - mutex_unlock(&dev->lock); + guard(mutex)(&dev->lock); - return ret; + return sprintf(page, "%s\n", hog->name ?: ""); } static ssize_t gpio_sim_hog_config_name_store(struct config_item *item, @@ -1208,24 +1161,18 @@ static ssize_t gpio_sim_hog_config_name_store(struct config_item *item, struct gpio_sim_device *dev = gpio_sim_hog_get_device(hog); char *trimmed; - mutex_lock(&dev->lock); + guard(mutex)(&dev->lock); - if (gpio_sim_device_is_live_unlocked(dev)) { - mutex_unlock(&dev->lock); + if (gpio_sim_device_is_live_unlocked(dev)) return -EBUSY; - } trimmed = gpio_sim_strdup_trimmed(page, count); - if (!trimmed) { - mutex_unlock(&dev->lock); + if (!trimmed) return -ENOMEM; - } kfree(hog->name); hog->name = trimmed; - mutex_unlock(&dev->lock); - return count; } @@ -1239,9 +1186,8 @@ static ssize_t gpio_sim_hog_config_direction_show(struct config_item *item, char *repr; int dir; - mutex_lock(&dev->lock); - dir = hog->dir; - mutex_unlock(&dev->lock); + scoped_guard(mutex, &dev->lock) + dir = hog->dir; switch (dir) { case GPIOD_IN: @@ -1270,12 +1216,10 @@ gpio_sim_hog_config_direction_store(struct config_item *item, struct gpio_sim_device *dev = gpio_sim_hog_get_device(hog); int dir; - mutex_lock(&dev->lock); + guard(mutex)(&dev->lock); - if (gpio_sim_device_is_live_unlocked(dev)) { - mutex_unlock(&dev->lock); + if (gpio_sim_device_is_live_unlocked(dev)) return -EBUSY; - } if (sysfs_streq(page, "input")) dir = GPIOD_IN; @@ -1284,17 +1228,10 @@ gpio_sim_hog_config_direction_store(struct config_item *item, else if (sysfs_streq(page, "output-low")) dir = GPIOD_OUT_LOW; else - dir = -EINVAL; - - if (dir < 0) { - mutex_unlock(&dev->lock); - return dir; - } + return -EINVAL; hog->dir = dir; - mutex_unlock(&dev->lock); - return count; } @@ -1312,9 +1249,8 @@ static void gpio_sim_hog_config_item_release(struct config_item *item) struct gpio_sim_line *line = hog->parent; struct gpio_sim_device *dev = gpio_sim_hog_get_device(hog); - mutex_lock(&dev->lock); - line->hog = NULL; - mutex_unlock(&dev->lock); + scoped_guard(mutex, &dev->lock) + line->hog = NULL; kfree(hog->name); kfree(hog); @@ -1340,13 +1276,11 @@ gpio_sim_line_config_make_hog_item(struct config_group *group, const char *name) if (strcmp(name, "hog") != 0) return ERR_PTR(-EINVAL); - mutex_lock(&dev->lock); + guard(mutex)(&dev->lock); hog = kzalloc(sizeof(*hog), GFP_KERNEL); - if (!hog) { - mutex_unlock(&dev->lock); + if (!hog) return ERR_PTR(-ENOMEM); - } config_item_init_type_name(&hog->item, name, &gpio_sim_hog_config_type); @@ -1356,8 +1290,6 @@ gpio_sim_line_config_make_hog_item(struct config_group *group, const char *name) hog->parent = line; line->hog = hog; - mutex_unlock(&dev->lock); - return &hog->item; } @@ -1366,9 +1298,8 @@ static void gpio_sim_line_config_group_release(struct config_item *item) struct gpio_sim_line *line = to_gpio_sim_line(item); struct gpio_sim_device *dev = gpio_sim_line_get_device(line); - mutex_lock(&dev->lock); - list_del(&line->siblings); - mutex_unlock(&dev->lock); + scoped_guard(mutex, &dev->lock) + list_del(&line->siblings); kfree(line->name); kfree(line); @@ -1403,18 +1334,14 @@ gpio_sim_bank_config_make_line_group(struct config_group *group, if (ret != 1 || nchar != strlen(name)) return ERR_PTR(-EINVAL); - mutex_lock(&dev->lock); + guard(mutex)(&dev->lock); - if (gpio_sim_device_is_live_unlocked(dev)) { - mutex_unlock(&dev->lock); + if (gpio_sim_device_is_live_unlocked(dev)) return ERR_PTR(-EBUSY); - } line = kzalloc(sizeof(*line), GFP_KERNEL); - if (!line) { - mutex_unlock(&dev->lock); + if (!line) return ERR_PTR(-ENOMEM); - } config_group_init_type_name(&line->group, name, &gpio_sim_line_config_type); @@ -1423,8 +1350,6 @@ gpio_sim_bank_config_make_line_group(struct config_group *group, line->offset = offset; list_add_tail(&line->siblings, &bank->line_list); - mutex_unlock(&dev->lock); - return &line->group; } @@ -1433,9 +1358,8 @@ static void gpio_sim_bank_config_group_release(struct config_item *item) struct gpio_sim_bank *bank = to_gpio_sim_bank(item); struct gpio_sim_device *dev = gpio_sim_bank_get_device(bank); - mutex_lock(&dev->lock); - list_del(&bank->siblings); - mutex_unlock(&dev->lock); + scoped_guard(mutex, &dev->lock) + list_del(&bank->siblings); kfree(bank->label); kfree(bank); @@ -1463,18 +1387,14 @@ gpio_sim_device_config_make_bank_group(struct config_group *group, struct gpio_sim_device *dev = to_gpio_sim_device(&group->cg_item); struct gpio_sim_bank *bank; - mutex_lock(&dev->lock); + guard(mutex)(&dev->lock); - if (gpio_sim_device_is_live_unlocked(dev)) { - mutex_unlock(&dev->lock); + if (gpio_sim_device_is_live_unlocked(dev)) return ERR_PTR(-EBUSY); - } bank = kzalloc(sizeof(*bank), GFP_KERNEL); - if (!bank) { - mutex_unlock(&dev->lock); + if (!bank) return ERR_PTR(-ENOMEM); - } config_group_init_type_name(&bank->group, name, &gpio_sim_bank_config_group_type); @@ -1483,8 +1403,6 @@ gpio_sim_device_config_make_bank_group(struct config_group *group, INIT_LIST_HEAD(&bank->line_list); list_add_tail(&bank->siblings, &dev->bank_list); - mutex_unlock(&dev->lock); - return &bank->group; } @@ -1492,10 +1410,10 @@ static void gpio_sim_device_config_group_release(struct config_item *item) { struct gpio_sim_device *dev = to_gpio_sim_device(item); - mutex_lock(&dev->lock); - if (gpio_sim_device_is_live_unlocked(dev)) - gpio_sim_device_deactivate_unlocked(dev); - mutex_unlock(&dev->lock); + scoped_guard(mutex, &dev->lock) { + if (gpio_sim_device_is_live_unlocked(dev)) + gpio_sim_device_deactivate_unlocked(dev); + } mutex_destroy(&dev->lock); ida_free(&gpio_sim_ida, dev->id); @@ -1520,7 +1438,7 @@ static const struct config_item_type gpio_sim_device_config_group_type = { static struct config_group * gpio_sim_config_make_device_group(struct config_group *group, const char *name) { - struct gpio_sim_device *dev; + struct gpio_sim_device *dev __free(kfree) = NULL; int id; dev = kzalloc(sizeof(*dev), GFP_KERNEL); @@ -1528,10 +1446,8 @@ gpio_sim_config_make_device_group(struct config_group *group, const char *name) return ERR_PTR(-ENOMEM); id = ida_alloc(&gpio_sim_ida, GFP_KERNEL); - if (id < 0) { - kfree(dev); + if (id < 0) return ERR_PTR(id); - } config_group_init_type_name(&dev->group, name, &gpio_sim_device_config_group_type); @@ -1542,7 +1458,7 @@ gpio_sim_config_make_device_group(struct config_group *group, const char *name) dev->bus_notifier.notifier_call = gpio_sim_bus_notifier_call; init_completion(&dev->probe_completion); - return &dev->group; + return &no_free_ptr(dev)->group; } static struct configfs_group_operations gpio_sim_config_group_ops = { From b52c8c72dd7c2c5695bc86a31d48dd8da4127d94 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Mon, 7 Aug 2023 13:16:43 +0200 Subject: [PATCH 485/656] crypto: caam - fix PM operations definition The newly added PM operations use the deprecated SIMPLE_DEV_PM_OPS() macro, causing a warning in some configurations: drivers/crypto/caam/ctrl.c:828:12: error: 'caam_ctrl_resume' defined but not used [-Werror=unused-function] 828 | static int caam_ctrl_resume(struct device *dev) | ^~~~~~~~~~~~~~~~ drivers/crypto/caam/ctrl.c:818:12: error: 'caam_ctrl_suspend' defined but not used [-Werror=unused-function] 818 | static int caam_ctrl_suspend(struct device *dev) | ^~~~~~~~~~~~~~~~~ drivers/crypto/caam/jr.c:732:12: error: 'caam_jr_resume' defined but not used [-Werror=unused-function] 732 | static int caam_jr_resume(struct device *dev) | ^~~~~~~~~~~~~~ drivers/crypto/caam/jr.c:687:12: error: 'caam_jr_suspend' defined but not used [-Werror=unused-function] 687 | static int caam_jr_suspend(struct device *dev) | ^~~~~~~~~~~~~~~ Use the normal DEFINE_SIMPLE_DEV_PM_OPS() variant now, and use pm_ptr() to completely eliminate the structure in configs without CONFIG_PM. Fixes: 322d74752c28a ("crypto: caam - add power management support") Signed-off-by: Arnd Bergmann Reviewed-by: Meenakshi Aggarwal Signed-off-by: Herbert Xu --- drivers/crypto/caam/ctrl.c | 4 ++-- drivers/crypto/caam/jr.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c index a7a4583107f4..2a228a36fa15 100644 --- a/drivers/crypto/caam/ctrl.c +++ b/drivers/crypto/caam/ctrl.c @@ -841,7 +841,7 @@ static int caam_ctrl_resume(struct device *dev) return ret; } -static SIMPLE_DEV_PM_OPS(caam_ctrl_pm_ops, caam_ctrl_suspend, caam_ctrl_resume); +static DEFINE_SIMPLE_DEV_PM_OPS(caam_ctrl_pm_ops, caam_ctrl_suspend, caam_ctrl_resume); /* Probe routine for CAAM top (controller) level */ static int caam_probe(struct platform_device *pdev) @@ -1138,7 +1138,7 @@ static struct platform_driver caam_driver = { .driver = { .name = "caam", .of_match_table = caam_match, - .pm = &caam_ctrl_pm_ops, + .pm = pm_ptr(&caam_ctrl_pm_ops), }, .probe = caam_probe, }; diff --git a/drivers/crypto/caam/jr.c b/drivers/crypto/caam/jr.c index 316180d26f8a..767fbf052536 100644 --- a/drivers/crypto/caam/jr.c +++ b/drivers/crypto/caam/jr.c @@ -794,7 +794,7 @@ add_jr: return 0; } -static SIMPLE_DEV_PM_OPS(caam_jr_pm_ops, caam_jr_suspend, caam_jr_resume); +static DEFINE_SIMPLE_DEV_PM_OPS(caam_jr_pm_ops, caam_jr_suspend, caam_jr_resume); static const struct of_device_id caam_jr_match[] = { { @@ -811,7 +811,7 @@ static struct platform_driver caam_jr_driver = { .driver = { .name = "caam_jr", .of_match_table = caam_jr_match, - .pm = &caam_jr_pm_ops, + .pm = pm_ptr(&caam_jr_pm_ops), }, .probe = caam_jr_probe, .remove = caam_jr_remove, From e30685204711a6be40dec2622606950ccd37dafe Mon Sep 17 00:00:00 2001 From: Gaurav Jain Date: Tue, 8 Aug 2023 12:55:25 +0200 Subject: [PATCH 486/656] crypto: caam - fix unchecked return value error error: Unchecked return value (CHECKED_RETURN) check_return: Calling sg_miter_next without checking return value fix: added check if(!sg_miter_next) Fixes: 8a2a0dd35f2e ("crypto: caam - strip input zeros from RSA input buffer") Signed-off-by: Gaurav Jain Signed-off-by: Meenakshi Aggarwal Reviewed-by: Gaurav Jain Signed-off-by: Herbert Xu --- drivers/crypto/caam/caampkc.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/crypto/caam/caampkc.c b/drivers/crypto/caam/caampkc.c index 72afc249d42f..7e08af751e4e 100644 --- a/drivers/crypto/caam/caampkc.c +++ b/drivers/crypto/caam/caampkc.c @@ -225,7 +225,9 @@ static int caam_rsa_count_leading_zeros(struct scatterlist *sgl, if (len && *buff) break; - sg_miter_next(&miter); + if (!sg_miter_next(&miter)) + break; + buff = miter.addr; len = miter.length; From e47e6d2aaacd30e93b97f20d4a20556cefd18406 Mon Sep 17 00:00:00 2001 From: Iuliana Prodan Date: Tue, 8 Aug 2023 12:55:26 +0200 Subject: [PATCH 487/656] crypto: caam - increase the domain of write memory barrier to full system In caam_jr_enqueue, under heavy DDR load, smp_wmb() or dma_wmb() fail to make the input ring be updated before the CAAM starts reading it. So, CAAM will process, again, an old descriptor address and will put it in the output ring. This will make caam_jr_dequeue() to fail, since this old descriptor is not in the software ring. To fix this, use wmb() which works on the full system instead of inner/outer shareable domains. Signed-off-by: Iuliana Prodan Signed-off-by: Meenakshi Aggarwal Reviewed-by: Gaurav Jain Signed-off-by: Herbert Xu --- drivers/crypto/caam/jr.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/crypto/caam/jr.c b/drivers/crypto/caam/jr.c index 767fbf052536..5507d5d34a4c 100644 --- a/drivers/crypto/caam/jr.c +++ b/drivers/crypto/caam/jr.c @@ -464,8 +464,16 @@ int caam_jr_enqueue(struct device *dev, u32 *desc, * Guarantee that the descriptor's DMA address has been written to * the next slot in the ring before the write index is updated, since * other cores may update this index independently. + * + * Under heavy DDR load, smp_wmb() or dma_wmb() fail to make the input + * ring be updated before the CAAM starts reading it. So, CAAM will + * process, again, an old descriptor address and will put it in the + * output ring. This will make caam_jr_dequeue() to fail, since this + * old descriptor is not in the software ring. + * To fix this, use wmb() which works on the full system instead of + * inner/outer shareable domains. */ - smp_wmb(); + wmb(); jrp->head = (head + 1) & (JOBR_DEPTH - 1); From 23d422a4f127901b2e58d925f130d4ce534a662a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Horia=20Geant=C4=83?= Date: Tue, 8 Aug 2023 12:55:27 +0200 Subject: [PATCH 488/656] crypto: caam/jr - fix shared IRQ line handling MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit There are cases when the interrupt status register (JRINTR) is non-zero, even though: 1. An interrupt was generated, but it was masked OR 2. There was no interrupt generated at all for the corresponding job ring. 1. The case when interrupt is masked (JRCFGR_LS[IMSK]=1b'1) while other events have happened and are being accounted for, e.g. -JRINTR[HALT]=2b'10 - input job ring underwent a flush of all on-going jobs and processing of still-existing jobs (sitting in the ring) has been halted -JRINTR[HALT]=2b'01 - input job ring is currently undergoing a flush -JRINTR[ENTER_FAIL]=1b'1 - SecMon / SNVS transitioned to FAIL MODE It doesn't matter whether these events would assert the interrupt signal or not, interrupt is anyhow masked. 2. The case when interrupt is not masked (JRCFGR_LS[IMSK]=1b'0), however the events accounted for in JRINTR do not generate interrupts, e.g.: -JRINTR[HALT]=2b'01 -JRINTR[ENTER_FAIL]=1b'1 and JRCFGR_MS[FAIL_MODE]=1b'0 Currently in these cases, when the JR interrupt handler is invoked (as a consequence of JR sharing the interrupt line with other devices - e.g. the two JRs on i.MX7ULP) it continues execution instead of returning IRQ_NONE. This could lead to situations like interrupt handler clearing JRINTR (and thus also the JRINTR[HALT] field) while corresponding job ring is suspended and then that job ring failing on resume path, due to expecting JRINTR[HALT]=b'10 and reading instead JRINTR[HALT]=b'00. Fix this by checking status of JRINTR[JRI] in the JR interrupt handler. If JRINTR[JRI]=1b'0, there was no interrupt generated for this JR and handler must return IRQ_NONE. Signed-off-by: Horia Geantă Signed-off-by: Meenakshi Aggarwal Reviewed-by: Gaurav Jain Signed-off-by: Herbert Xu --- drivers/crypto/caam/jr.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/crypto/caam/jr.c b/drivers/crypto/caam/jr.c index 5507d5d34a4c..07ec2f27cc68 100644 --- a/drivers/crypto/caam/jr.c +++ b/drivers/crypto/caam/jr.c @@ -232,7 +232,7 @@ static irqreturn_t caam_jr_interrupt(int irq, void *st_dev) * tasklet if jobs done. */ irqstate = rd_reg32(&jrp->rregs->jrintstatus); - if (!irqstate) + if (!(irqstate & JRINT_JR_INT)) return IRQ_NONE; /* From 64dd341e66f45cdde95f81788d0b13636847fcc3 Mon Sep 17 00:00:00 2001 From: Yue Haibing Date: Wed, 9 Aug 2023 11:14:43 +0800 Subject: [PATCH 489/656] crypto: allwinner - Remove unused function declarations Commit 06f751b61329 ("crypto: allwinner - Add sun8i-ce Crypto Engine") declared but never implemented sun8i_ce_enqueue(). Commit 56f6d5aee88d ("crypto: sun8i-ce - support hash algorithms") declared but never implemented sun8i_ce_hash(). Commit f08fcced6d00 ("crypto: allwinner - Add sun8i-ss cryptographic offloader") declared but never implemented sun8i_ss_enqueue(). Signed-off-by: Yue Haibing Signed-off-by: Herbert Xu --- drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h | 3 --- drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h | 2 -- 2 files changed, 5 deletions(-) diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h index 27029fb77e29..4742b48ef52e 100644 --- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h +++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h @@ -347,8 +347,6 @@ struct sun8i_ce_alg_template { char fbname[CRYPTO_MAX_ALG_NAME]; }; -int sun8i_ce_enqueue(struct crypto_async_request *areq, u32 type); - int sun8i_ce_aes_setkey(struct crypto_skcipher *tfm, const u8 *key, unsigned int keylen); int sun8i_ce_des3_setkey(struct crypto_skcipher *tfm, const u8 *key, @@ -367,7 +365,6 @@ void sun8i_ce_hash_craexit(struct crypto_tfm *tfm); int sun8i_ce_hash_init(struct ahash_request *areq); int sun8i_ce_hash_export(struct ahash_request *areq, void *out); int sun8i_ce_hash_import(struct ahash_request *areq, const void *in); -int sun8i_ce_hash(struct ahash_request *areq); int sun8i_ce_hash_final(struct ahash_request *areq); int sun8i_ce_hash_update(struct ahash_request *areq); int sun8i_ce_hash_finup(struct ahash_request *areq); diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h index df6f08f6092f..bfe305261e9a 100644 --- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h +++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h @@ -293,8 +293,6 @@ struct sun8i_ss_alg_template { char fbname[CRYPTO_MAX_ALG_NAME]; }; -int sun8i_ss_enqueue(struct crypto_async_request *areq, u32 type); - int sun8i_ss_aes_setkey(struct crypto_skcipher *tfm, const u8 *key, unsigned int keylen); int sun8i_ss_des3_setkey(struct crypto_skcipher *tfm, const u8 *key, From d94e0f25deefda953ac348a244189cf358b8bd3e Mon Sep 17 00:00:00 2001 From: Yue Haibing Date: Wed, 9 Aug 2023 11:16:14 +0800 Subject: [PATCH 490/656] crypto: qat - Remove unused function declarations Commit d8cba25d2c68 ("crypto: qat - Intel(R) QAT driver framework") declared but never implemented these functions. Signed-off-by: Yue Haibing Acked-by: Giovanni Cabiddu Signed-off-by: Herbert Xu --- drivers/crypto/intel/qat/qat_common/adf_common_drv.h | 8 -------- 1 file changed, 8 deletions(-) diff --git a/drivers/crypto/intel/qat/qat_common/adf_common_drv.h b/drivers/crypto/intel/qat/qat_common/adf_common_drv.h index 799a2193d3e5..673b5044c62a 100644 --- a/drivers/crypto/intel/qat/qat_common/adf_common_drv.h +++ b/drivers/crypto/intel/qat/qat_common/adf_common_drv.h @@ -58,12 +58,6 @@ int adf_dev_restart(struct adf_accel_dev *accel_dev); void adf_devmgr_update_class_index(struct adf_hw_device_data *hw_data); void adf_clean_vf_map(bool); - -int adf_ctl_dev_register(void); -void adf_ctl_dev_unregister(void); -int adf_processes_dev_register(void); -void adf_processes_dev_unregister(void); - int adf_devmgr_add_dev(struct adf_accel_dev *accel_dev, struct adf_accel_dev *pf); void adf_devmgr_rm_dev(struct adf_accel_dev *accel_dev, @@ -182,8 +176,6 @@ int qat_hal_init_rd_xfer(struct icp_qat_fw_loader_handle *handle, int qat_hal_init_nn(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned long ctx_mask, unsigned short reg_num, unsigned int regdata); -int qat_hal_wr_lm(struct icp_qat_fw_loader_handle *handle, - unsigned char ae, unsigned short lm_addr, unsigned int value); void qat_hal_set_ae_tindex_mode(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned char mode); int qat_uclo_wr_all_uimage(struct icp_qat_fw_loader_handle *handle); From d1c02e876f2e63520fd4fe393ed6b68882c9f848 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 10 Aug 2023 12:00:23 +0200 Subject: [PATCH 491/656] crypto: exynos - fix Wvoid-pointer-to-enum-cast warning 'type' is an enum, thus cast of pointer on 64-bit compile test with W=1 causes: exynos-rng.c:280:14: error: cast to smaller integer type 'enum exynos_prng_type' from 'const void *' [-Werror,-Wvoid-pointer-to-enum-cast] Signed-off-by: Krzysztof Kozlowski Signed-off-by: Herbert Xu --- drivers/crypto/exynos-rng.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/crypto/exynos-rng.c b/drivers/crypto/exynos-rng.c index cbd8ca6e52ee..b1df66be9adc 100644 --- a/drivers/crypto/exynos-rng.c +++ b/drivers/crypto/exynos-rng.c @@ -277,7 +277,7 @@ static int exynos_rng_probe(struct platform_device *pdev) if (!rng) return -ENOMEM; - rng->type = (enum exynos_prng_type)of_device_get_match_data(&pdev->dev); + rng->type = (uintptr_t)of_device_get_match_data(&pdev->dev); mutex_init(&rng->lock); From d88bdbd96d258ab7973e67b94701c55324e9885f Mon Sep 17 00:00:00 2001 From: GUO Zihua Date: Thu, 10 Aug 2023 21:00:43 +0800 Subject: [PATCH 492/656] hwrng: core - Remove duplicated include Remove duplicated include of linux/random.h. Resolves checkincludes message. And adjust includes in alphabetical order. Signed-off-by: GUO Zihua Signed-off-by: Herbert Xu --- drivers/char/hw_random/core.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/char/hw_random/core.c b/drivers/char/hw_random/core.c index f34d356fe2c0..e3598ec9cfca 100644 --- a/drivers/char/hw_random/core.c +++ b/drivers/char/hw_random/core.c @@ -15,14 +15,13 @@ #include #include #include -#include #include #include -#include #include #include #include #include +#include #include #include From 8e03dd62e5be811efbf0cbeba47e79e793519105 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Thu, 10 Aug 2023 12:22:08 -0700 Subject: [PATCH 493/656] hwrng: iproc-rng200 - Implement suspend and resume calls Chips such as BCM7278 support system wide suspend/resume which will cause the HWRNG block to lose its state and reset to its power on reset register values. We need to cleanup and re-initialize the HWRNG for it to be functional coming out of a system suspend cycle. Fixes: c3577f6100ca ("hwrng: iproc-rng200 - Add support for BCM7278") Signed-off-by: Florian Fainelli Signed-off-by: Herbert Xu --- drivers/char/hw_random/iproc-rng200.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/drivers/char/hw_random/iproc-rng200.c b/drivers/char/hw_random/iproc-rng200.c index 34df3f0d3e45..440fe28bddc0 100644 --- a/drivers/char/hw_random/iproc-rng200.c +++ b/drivers/char/hw_random/iproc-rng200.c @@ -181,6 +181,8 @@ static int iproc_rng200_probe(struct platform_device *pdev) return PTR_ERR(priv->base); } + dev_set_drvdata(dev, priv); + priv->rng.name = "iproc-rng200"; priv->rng.read = iproc_rng200_read; priv->rng.init = iproc_rng200_init; @@ -198,6 +200,28 @@ static int iproc_rng200_probe(struct platform_device *pdev) return 0; } +static int __maybe_unused iproc_rng200_suspend(struct device *dev) +{ + struct iproc_rng200_dev *priv = dev_get_drvdata(dev); + + iproc_rng200_cleanup(&priv->rng); + + return 0; +} + +static int __maybe_unused iproc_rng200_resume(struct device *dev) +{ + struct iproc_rng200_dev *priv = dev_get_drvdata(dev); + + iproc_rng200_init(&priv->rng); + + return 0; +} + +static const struct dev_pm_ops iproc_rng200_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(iproc_rng200_suspend, iproc_rng200_resume) +}; + static const struct of_device_id iproc_rng200_of_match[] = { { .compatible = "brcm,bcm2711-rng200", }, { .compatible = "brcm,bcm7211-rng200", }, @@ -211,6 +235,7 @@ static struct platform_driver iproc_rng200_driver = { .driver = { .name = "iproc-rng200", .of_match_table = iproc_rng200_of_match, + .pm = &iproc_rng200_pm_ops, }, .probe = iproc_rng200_probe, }; From f9fc1ec28baeeef6259127b3cbeb34986834574f Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Fri, 11 Aug 2023 15:46:33 +0200 Subject: [PATCH 494/656] crypto: drivers - avoid memcpy size warning Some configurations with gcc-12 or gcc-13 produce a warning for the source and destination of a memcpy() in atmel_sha_hmac_compute_ipad_hash() potentially overlapping: In file included from include/linux/string.h:254, from drivers/crypto/atmel-sha.c:15: drivers/crypto/atmel-sha.c: In function 'atmel_sha_hmac_compute_ipad_hash': include/linux/fortify-string.h:57:33: error: '__builtin_memcpy' accessing 129 or more bytes at offsets 408 and 280 overlaps 1 or more bytes at offset 408 [-Werror=restrict] 57 | #define __underlying_memcpy __builtin_memcpy | ^ include/linux/fortify-string.h:648:9: note: in expansion of macro '__underlying_memcpy' 648 | __underlying_##op(p, q, __fortify_size); \ | ^~~~~~~~~~~~~ include/linux/fortify-string.h:693:26: note: in expansion of macro '__fortify_memcpy_chk' 693 | #define memcpy(p, q, s) __fortify_memcpy_chk(p, q, s, \ | ^~~~~~~~~~~~~~~~~~~~ drivers/crypto/atmel-sha.c:1773:9: note: in expansion of macro 'memcpy' 1773 | memcpy(hmac->opad, hmac->ipad, bs); | ^~~~~~ The same thing happens in two more drivers that have the same logic: drivers/crypto/chelsio/chcr_algo.c: In function 'chcr_ahash_setkey': include/linux/fortify-string.h:57:33: error: '__builtin_memcpy' accessing 129 or more bytes at offsets 260 and 132 overlaps 1 or more bytes at offset 260 [-Werror=restrict] drivers/crypto/bcm/cipher.c: In function 'ahash_hmac_setkey': include/linux/fortify-string.h:57:33: error: '__builtin_memcpy' accessing between 129 and 4294967295 bytes at offsets 840 and 712 overlaps between 1 and 4294967167 bytes at offset 840 [-Werror=restrict] I don't think it can actually happen because the size is strictly bounded to the available block sizes, at most 128 bytes, though inlining decisions could lead gcc to not see that. Use the unsafe_memcpy() helper instead of memcpy(), with the only difference being that this skips the hardening checks that produce the warning. Suggested-by: Herbert Xu Signed-off-by: Arnd Bergmann Signed-off-by: Herbert Xu --- drivers/crypto/atmel-sha.c | 3 ++- drivers/crypto/bcm/cipher.c | 3 ++- drivers/crypto/chelsio/chcr_algo.c | 3 ++- 3 files changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/crypto/atmel-sha.c b/drivers/crypto/atmel-sha.c index 54fec72dfba2..99a9ff8e743f 100644 --- a/drivers/crypto/atmel-sha.c +++ b/drivers/crypto/atmel-sha.c @@ -1770,7 +1770,8 @@ static int atmel_sha_hmac_compute_ipad_hash(struct atmel_sha_dev *dd) size_t bs = ctx->block_size; size_t i, num_words = bs / sizeof(u32); - memcpy(hmac->opad, hmac->ipad, bs); + unsafe_memcpy(hmac->opad, hmac->ipad, bs, + "fortified memcpy causes -Wrestrict warning"); for (i = 0; i < num_words; ++i) { hmac->ipad[i] ^= 0x36363636; hmac->opad[i] ^= 0x5c5c5c5c; diff --git a/drivers/crypto/bcm/cipher.c b/drivers/crypto/bcm/cipher.c index 70b911baab26..4c46357e2570 100644 --- a/drivers/crypto/bcm/cipher.c +++ b/drivers/crypto/bcm/cipher.c @@ -2397,7 +2397,8 @@ static int ahash_hmac_setkey(struct crypto_ahash *ahash, const u8 *key, memset(ctx->ipad + ctx->authkeylen, 0, blocksize - ctx->authkeylen); ctx->authkeylen = 0; - memcpy(ctx->opad, ctx->ipad, blocksize); + unsafe_memcpy(ctx->opad, ctx->ipad, blocksize, + "fortified memcpy causes -Wrestrict warning"); for (index = 0; index < blocksize; index++) { ctx->ipad[index] ^= HMAC_IPAD_VALUE; diff --git a/drivers/crypto/chelsio/chcr_algo.c b/drivers/crypto/chelsio/chcr_algo.c index 0eade4fa6695..16298ae4a00b 100644 --- a/drivers/crypto/chelsio/chcr_algo.c +++ b/drivers/crypto/chelsio/chcr_algo.c @@ -2216,7 +2216,8 @@ static int chcr_ahash_setkey(struct crypto_ahash *tfm, const u8 *key, memcpy(hmacctx->ipad, key, keylen); } memset(hmacctx->ipad + keylen, 0, bs - keylen); - memcpy(hmacctx->opad, hmacctx->ipad, bs); + unsafe_memcpy(hmacctx->opad, hmacctx->ipad, bs, + "fortified memcpy causes -Wrestrict warning"); for (i = 0; i < bs / sizeof(int); i++) { *((unsigned int *)(&hmacctx->ipad) + i) ^= IPAD_DATA; From b9296bb41275ef2173d2c8b144b808f5e6d18bbe Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Fri, 11 Aug 2023 22:50:56 +0200 Subject: [PATCH 495/656] dt-bindings: crypto: qcom,prng: Add SM8450 SM8450's PRNG does not require a core clock reference. Add a new compatible with a qcom,prng-ee fallback and handle that. Signed-off-by: Konrad Dybcio Acked-by: Conor Dooley Signed-off-by: Herbert Xu --- .../devicetree/bindings/crypto/qcom,prng.yaml | 24 +++++++++++++++---- 1 file changed, 19 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/crypto/qcom,prng.yaml b/Documentation/devicetree/bindings/crypto/qcom,prng.yaml index bb42f4588b40..36b0ebd9a44b 100644 --- a/Documentation/devicetree/bindings/crypto/qcom,prng.yaml +++ b/Documentation/devicetree/bindings/crypto/qcom,prng.yaml @@ -11,9 +11,13 @@ maintainers: properties: compatible: - enum: - - qcom,prng # 8916 etc. - - qcom,prng-ee # 8996 and later using EE + oneOf: + - enum: + - qcom,prng # 8916 etc. + - qcom,prng-ee # 8996 and later using EE + - items: + - const: qcom,sm8450-prng-ee + - const: qcom,prng-ee reg: maxItems: 1 @@ -28,8 +32,18 @@ properties: required: - compatible - reg - - clocks - - clock-names + +allOf: + - if: + not: + properties: + compatible: + contains: + const: qcom,sm8450-prng-ee + then: + required: + - clocks + - clock-names additionalProperties: false From cdb8b7e1692a81f26030050ec30aadd2e7538fef Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Fri, 11 Aug 2023 22:50:57 +0200 Subject: [PATCH 496/656] crypto: qcom-rng: Make the core clock optional regardless of ACPI presence Some newer SoCs (like SM8450) do not require a clock vote for the PRNG to function. Make it entirely optional and rely on the bindings checker to ensure platforms that need it, consume one. Signed-off-by: Konrad Dybcio Reviewed-by: Bjorn Andersson Signed-off-by: Herbert Xu --- drivers/crypto/qcom-rng.c | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/drivers/crypto/qcom-rng.c b/drivers/crypto/qcom-rng.c index 72dd1a4ebac4..825a729f205e 100644 --- a/drivers/crypto/qcom-rng.c +++ b/drivers/crypto/qcom-rng.c @@ -173,13 +173,9 @@ static int qcom_rng_probe(struct platform_device *pdev) if (IS_ERR(rng->base)) return PTR_ERR(rng->base); - /* ACPI systems have clk already on, so skip clk_get */ - if (!has_acpi_companion(&pdev->dev)) { - rng->clk = devm_clk_get(&pdev->dev, "core"); - if (IS_ERR(rng->clk)) - return PTR_ERR(rng->clk); - } - + rng->clk = devm_clk_get_optional(&pdev->dev, "core"); + if (IS_ERR(rng->clk)) + return PTR_ERR(rng->clk); rng->skip_init = (unsigned long)device_get_match_data(&pdev->dev); From 4136212ab18eb3dce6efb6e18108765c36708f71 Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Sun, 13 Aug 2023 14:54:07 +0800 Subject: [PATCH 497/656] crypto: sun8i-ce - Remove prepare/unprepare request The callbacks for prepare and unprepare request in crypto_engine is superfluous. They can be done directly from do_one_request. Move the code into do_one_request and remove the unused callbacks. Signed-off-by: Herbert Xu --- .../allwinner/sun8i-ce/sun8i-ce-cipher.c | 20 +++++++++++++------ .../crypto/allwinner/sun8i-ce/sun8i-ce-hash.c | 2 -- 2 files changed, 14 insertions(+), 8 deletions(-) diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c index c13550090785..573a08fa7afa 100644 --- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c +++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c @@ -294,7 +294,7 @@ theend: return err; } -static int sun8i_ce_cipher_run(struct crypto_engine *engine, void *areq) +static void sun8i_ce_cipher_run(struct crypto_engine *engine, void *areq) { struct skcipher_request *breq = container_of(areq, struct skcipher_request, base); struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(breq); @@ -308,10 +308,10 @@ static int sun8i_ce_cipher_run(struct crypto_engine *engine, void *areq) local_bh_disable(); crypto_finalize_skcipher_request(engine, breq, err); local_bh_enable(); - return 0; } -static int sun8i_ce_cipher_unprepare(struct crypto_engine *engine, void *async_req) +static void sun8i_ce_cipher_unprepare(struct crypto_engine *engine, + void *async_req) { struct skcipher_request *areq = container_of(async_req, struct skcipher_request, base); struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq); @@ -353,7 +353,17 @@ static int sun8i_ce_cipher_unprepare(struct crypto_engine *engine, void *async_r } dma_unmap_single(ce->dev, rctx->addr_key, op->keylen, DMA_TO_DEVICE); +} +static int sun8i_ce_cipher_do_one(struct crypto_engine *engine, void *areq) +{ + int err = sun8i_ce_cipher_prepare(engine, areq); + + if (err) + return err; + + sun8i_ce_cipher_run(engine, areq); + sun8i_ce_cipher_unprepare(engine, areq); return 0; } @@ -423,9 +433,7 @@ int sun8i_ce_cipher_init(struct crypto_tfm *tfm) crypto_tfm_alg_driver_name(crypto_skcipher_tfm(op->fallback_tfm)), CRYPTO_MAX_ALG_NAME); - op->enginectx.op.do_one_request = sun8i_ce_cipher_run; - op->enginectx.op.prepare_request = sun8i_ce_cipher_prepare; - op->enginectx.op.unprepare_request = sun8i_ce_cipher_unprepare; + op->enginectx.op.do_one_request = sun8i_ce_cipher_do_one; err = pm_runtime_get_sync(op->ce->dev); if (err < 0) diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-hash.c b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-hash.c index 930ad157004c..04d7d890de58 100644 --- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-hash.c +++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-hash.c @@ -32,8 +32,6 @@ int sun8i_ce_hash_crainit(struct crypto_tfm *tfm) op->ce = algt->ce; op->enginectx.op.do_one_request = sun8i_ce_hash_run; - op->enginectx.op.prepare_request = NULL; - op->enginectx.op.unprepare_request = NULL; /* FALLBACK */ op->fallback_tfm = crypto_alloc_ahash(crypto_tfm_alg_name(tfm), 0, From ff0800af25011c0dc0563f9cc72bb2a9158d12c2 Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Sun, 13 Aug 2023 14:54:09 +0800 Subject: [PATCH 498/656] crypto: sun8i-ss - Remove prepare/unprepare request The callbacks for prepare and unprepare request in crypto_engine is superfluous. They can be done directly from do_one_request. Move the code into do_one_request and remove the unused callbacks. Signed-off-by: Herbert Xu --- drivers/crypto/allwinner/sun8i-ss/sun8i-ss-cipher.c | 2 -- drivers/crypto/allwinner/sun8i-ss/sun8i-ss-hash.c | 2 -- 2 files changed, 4 deletions(-) diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-cipher.c b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-cipher.c index 381a90fbeaff..2758dadf74eb 100644 --- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-cipher.c +++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-cipher.c @@ -409,8 +409,6 @@ int sun8i_ss_cipher_init(struct crypto_tfm *tfm) CRYPTO_MAX_ALG_NAME); op->enginectx.op.do_one_request = sun8i_ss_handle_cipher_request; - op->enginectx.op.prepare_request = NULL; - op->enginectx.op.unprepare_request = NULL; err = pm_runtime_resume_and_get(op->ss->dev); if (err < 0) { diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-hash.c b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-hash.c index a4b67d130d11..e6865b49b1df 100644 --- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-hash.c +++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-hash.c @@ -120,8 +120,6 @@ int sun8i_ss_hash_crainit(struct crypto_tfm *tfm) op->ss = algt->ss; op->enginectx.op.do_one_request = sun8i_ss_hash_run; - op->enginectx.op.prepare_request = NULL; - op->enginectx.op.unprepare_request = NULL; /* FALLBACK */ op->fallback_tfm = crypto_alloc_ahash(crypto_tfm_alg_name(tfm), 0, From db9f49e802d9f439cceaaf66ede841b32346e10e Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Sun, 13 Aug 2023 14:54:11 +0800 Subject: [PATCH 499/656] crypto: amlogic - Remove prepare/unprepare request The callbacks for prepare and unprepare request in crypto_engine is superfluous. They can be done directly from do_one_request. Move the code into do_one_request and remove the unused callbacks. Signed-off-by: Herbert Xu --- drivers/crypto/amlogic/amlogic-gxl-cipher.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/crypto/amlogic/amlogic-gxl-cipher.c b/drivers/crypto/amlogic/amlogic-gxl-cipher.c index af017a087ebf..03b6586b71ef 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-cipher.c +++ b/drivers/crypto/amlogic/amlogic-gxl-cipher.c @@ -332,8 +332,6 @@ int meson_cipher_init(struct crypto_tfm *tfm) crypto_skcipher_reqsize(op->fallback_tfm); op->enginectx.op.do_one_request = meson_handle_cipher_request; - op->enginectx.op.prepare_request = NULL; - op->enginectx.op.unprepare_request = NULL; return 0; } From 13bba5b505695eec89fde5bd68a12b83f71adc33 Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Sun, 13 Aug 2023 14:54:13 +0800 Subject: [PATCH 500/656] crypto: aspeed - Remove prepare/unprepare request The callbacks for prepare and unprepare request in crypto_engine is superfluous. They can be done directly from do_one_request. Move the code into do_one_request and remove the unused callbacks. Signed-off-by: Herbert Xu --- drivers/crypto/aspeed/aspeed-acry.c | 2 -- drivers/crypto/aspeed/aspeed-hace-crypto.c | 2 -- drivers/crypto/aspeed/aspeed-hace-hash.c | 14 ++++++++------ 3 files changed, 8 insertions(+), 10 deletions(-) diff --git a/drivers/crypto/aspeed/aspeed-acry.c b/drivers/crypto/aspeed/aspeed-acry.c index 470122c87fea..5ae529ce6806 100644 --- a/drivers/crypto/aspeed/aspeed-acry.c +++ b/drivers/crypto/aspeed/aspeed-acry.c @@ -590,8 +590,6 @@ static int aspeed_acry_rsa_init_tfm(struct crypto_akcipher *tfm) } ctx->enginectx.op.do_one_request = aspeed_acry_do_request; - ctx->enginectx.op.prepare_request = NULL; - ctx->enginectx.op.unprepare_request = NULL; return 0; } diff --git a/drivers/crypto/aspeed/aspeed-hace-crypto.c b/drivers/crypto/aspeed/aspeed-hace-crypto.c index ef73b0028b4d..8d6d9ecb3a28 100644 --- a/drivers/crypto/aspeed/aspeed-hace-crypto.c +++ b/drivers/crypto/aspeed/aspeed-hace-crypto.c @@ -714,8 +714,6 @@ static int aspeed_crypto_cra_init(struct crypto_skcipher *tfm) crypto_skcipher_reqsize(ctx->fallback_tfm)); ctx->enginectx.op.do_one_request = aspeed_crypto_do_request; - ctx->enginectx.op.prepare_request = NULL; - ctx->enginectx.op.unprepare_request = NULL; return 0; } diff --git a/drivers/crypto/aspeed/aspeed-hace-hash.c b/drivers/crypto/aspeed/aspeed-hace-hash.c index 935135229ebd..f8c96568142e 100644 --- a/drivers/crypto/aspeed/aspeed-hace-hash.c +++ b/drivers/crypto/aspeed/aspeed-hace-hash.c @@ -565,8 +565,8 @@ static int aspeed_ahash_do_request(struct crypto_engine *engine, void *areq) return 0; } -static int aspeed_ahash_prepare_request(struct crypto_engine *engine, - void *areq) +static void aspeed_ahash_prepare_request(struct crypto_engine *engine, + void *areq) { struct ahash_request *req = ahash_request_cast(areq); struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); @@ -581,8 +581,12 @@ static int aspeed_ahash_prepare_request(struct crypto_engine *engine, hash_engine->dma_prepare = aspeed_ahash_dma_prepare_sg; else hash_engine->dma_prepare = aspeed_ahash_dma_prepare; +} - return 0; +static int aspeed_ahash_do_one(struct crypto_engine *engine, void *areq) +{ + aspeed_ahash_prepare_request(engine, areq); + return aspeed_ahash_do_request(engine, areq); } static int aspeed_sham_update(struct ahash_request *req) @@ -876,9 +880,7 @@ static int aspeed_sham_cra_init(struct crypto_tfm *tfm) } } - tctx->enginectx.op.do_one_request = aspeed_ahash_do_request; - tctx->enginectx.op.prepare_request = aspeed_ahash_prepare_request; - tctx->enginectx.op.unprepare_request = NULL; + tctx->enginectx.op.do_one_request = aspeed_ahash_do_one; return 0; } From 0a3fa126578eb69eda563ac4f95955a8bb1715ed Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Sun, 13 Aug 2023 14:54:15 +0800 Subject: [PATCH 501/656] crypto: sl3516 - Remove prepare/unprepare request The callbacks for prepare and unprepare request in crypto_engine is superfluous. They can be done directly from do_one_request. Move the code into do_one_request and remove the unused callbacks. Signed-off-by: Herbert Xu --- drivers/crypto/gemini/sl3516-ce-cipher.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/crypto/gemini/sl3516-ce-cipher.c b/drivers/crypto/gemini/sl3516-ce-cipher.c index 14d0d83d388d..0232f847785a 100644 --- a/drivers/crypto/gemini/sl3516-ce-cipher.c +++ b/drivers/crypto/gemini/sl3516-ce-cipher.c @@ -336,8 +336,6 @@ int sl3516_ce_cipher_init(struct crypto_tfm *tfm) crypto_tfm_alg_driver_name(crypto_skcipher_tfm(op->fallback_tfm))); op->enginectx.op.do_one_request = sl3516_ce_handle_cipher_request; - op->enginectx.op.prepare_request = NULL; - op->enginectx.op.unprepare_request = NULL; err = pm_runtime_get_sync(op->ce->dev); if (err < 0) From 08d81da7a848a7aedb971d5d7d1ee9e373d3ecec Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Sun, 13 Aug 2023 14:54:17 +0800 Subject: [PATCH 502/656] crypto: keembay - Remove prepare/unprepare request The callbacks for prepare and unprepare request in crypto_engine is superfluous. They can be done directly from do_one_request. Move the code into do_one_request and remove the unused callbacks. Signed-off-by: Herbert Xu --- drivers/crypto/intel/keembay/keembay-ocs-aes-core.c | 4 ---- drivers/crypto/intel/keembay/keembay-ocs-ecc.c | 2 -- 2 files changed, 6 deletions(-) diff --git a/drivers/crypto/intel/keembay/keembay-ocs-aes-core.c b/drivers/crypto/intel/keembay/keembay-ocs-aes-core.c index ae31be00357a..f94f48289683 100644 --- a/drivers/crypto/intel/keembay/keembay-ocs-aes-core.c +++ b/drivers/crypto/intel/keembay/keembay-ocs-aes-core.c @@ -1150,9 +1150,7 @@ static int kmb_ocs_sm4_ccm_decrypt(struct aead_request *req) static inline int ocs_common_init(struct ocs_aes_tctx *tctx) { - tctx->engine_ctx.op.prepare_request = NULL; tctx->engine_ctx.op.do_one_request = kmb_ocs_aes_sk_do_one_request; - tctx->engine_ctx.op.unprepare_request = NULL; return 0; } @@ -1208,9 +1206,7 @@ static void ocs_exit_tfm(struct crypto_skcipher *tfm) static inline int ocs_common_aead_init(struct ocs_aes_tctx *tctx) { - tctx->engine_ctx.op.prepare_request = NULL; tctx->engine_ctx.op.do_one_request = kmb_ocs_aes_aead_do_one_request; - tctx->engine_ctx.op.unprepare_request = NULL; return 0; } diff --git a/drivers/crypto/intel/keembay/keembay-ocs-ecc.c b/drivers/crypto/intel/keembay/keembay-ocs-ecc.c index 2269df17514c..e91e570b7ae0 100644 --- a/drivers/crypto/intel/keembay/keembay-ocs-ecc.c +++ b/drivers/crypto/intel/keembay/keembay-ocs-ecc.c @@ -794,9 +794,7 @@ static int kmb_ecc_tctx_init(struct ocs_ecc_ctx *tctx, unsigned int curve_id) if (!tctx->curve) return -EOPNOTSUPP; - tctx->engine_ctx.op.prepare_request = NULL; tctx->engine_ctx.op.do_one_request = kmb_ocs_ecc_do_one_request; - tctx->engine_ctx.op.unprepare_request = NULL; return 0; } From c752c01389673b76c479d53cdd8f37558a0e406b Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Sun, 13 Aug 2023 14:54:19 +0800 Subject: [PATCH 503/656] crypto: omap - Remove prepare/unprepare request The callbacks for prepare and unprepare request in crypto_engine is superfluous. They can be done directly from do_one_request. Move the code into do_one_request and remove the unused callbacks. Signed-off-by: Herbert Xu --- drivers/crypto/omap-aes-gcm.c | 14 +++++++------- drivers/crypto/omap-aes.c | 19 ++++--------------- drivers/crypto/omap-des.c | 19 ++++--------------- drivers/crypto/omap-sham.c | 6 ++++-- 4 files changed, 19 insertions(+), 39 deletions(-) diff --git a/drivers/crypto/omap-aes-gcm.c b/drivers/crypto/omap-aes-gcm.c index 9f937bdc53a7..d02363e976e7 100644 --- a/drivers/crypto/omap-aes-gcm.c +++ b/drivers/crypto/omap-aes-gcm.c @@ -212,12 +212,10 @@ static int omap_aes_gcm_handle_queue(struct omap_aes_dev *dd, return 0; } -static int omap_aes_gcm_prepare_req(struct crypto_engine *engine, void *areq) +static int omap_aes_gcm_prepare_req(struct aead_request *req, + struct omap_aes_dev *dd) { - struct aead_request *req = container_of(areq, struct aead_request, - base); struct omap_aes_reqctx *rctx = aead_request_ctx(req); - struct omap_aes_dev *dd = rctx->dd; struct omap_aes_gcm_ctx *ctx = crypto_aead_ctx(crypto_aead_reqtfm(req)); int err; @@ -362,11 +360,15 @@ static int omap_aes_gcm_crypt_req(struct crypto_engine *engine, void *areq) base); struct omap_aes_reqctx *rctx = aead_request_ctx(req); struct omap_aes_dev *dd = rctx->dd; - int ret = 0; + int ret; if (!dd) return -ENODEV; + ret = omap_aes_gcm_prepare_req(req, dd); + if (ret) + return ret; + if (dd->in_sg_len) ret = omap_aes_crypt_dma_start(dd); else @@ -379,8 +381,6 @@ int omap_aes_gcm_cra_init(struct crypto_aead *tfm) { struct omap_aes_ctx *ctx = crypto_aead_ctx(tfm); - ctx->enginectx.op.prepare_request = omap_aes_gcm_prepare_req; - ctx->enginectx.op.unprepare_request = NULL; ctx->enginectx.op.do_one_request = omap_aes_gcm_crypt_req; crypto_aead_set_reqsize(tfm, sizeof(struct omap_aes_reqctx)); diff --git a/drivers/crypto/omap-aes.c b/drivers/crypto/omap-aes.c index 67a99c760bc4..d6fb8676f6cc 100644 --- a/drivers/crypto/omap-aes.c +++ b/drivers/crypto/omap-aes.c @@ -426,20 +426,15 @@ static int omap_aes_handle_queue(struct omap_aes_dev *dd, return 0; } -static int omap_aes_prepare_req(struct crypto_engine *engine, - void *areq) +static int omap_aes_prepare_req(struct skcipher_request *req, + struct omap_aes_dev *dd) { - struct skcipher_request *req = container_of(areq, struct skcipher_request, base); struct omap_aes_ctx *ctx = crypto_skcipher_ctx( crypto_skcipher_reqtfm(req)); struct omap_aes_reqctx *rctx = skcipher_request_ctx(req); - struct omap_aes_dev *dd = rctx->dd; int ret; u16 flags; - if (!dd) - return -ENODEV; - /* assign new request to device */ dd->req = req; dd->total = req->cryptlen; @@ -491,7 +486,8 @@ static int omap_aes_crypt_req(struct crypto_engine *engine, if (!dd) return -ENODEV; - return omap_aes_crypt_dma_start(dd); + return omap_aes_prepare_req(req, dd) ?: + omap_aes_crypt_dma_start(dd); } static void omap_aes_copy_ivout(struct omap_aes_dev *dd, u8 *ivbuf) @@ -629,11 +625,6 @@ static int omap_aes_ctr_decrypt(struct skcipher_request *req) return omap_aes_crypt(req, FLAGS_CTR); } -static int omap_aes_prepare_req(struct crypto_engine *engine, - void *req); -static int omap_aes_crypt_req(struct crypto_engine *engine, - void *req); - static int omap_aes_init_tfm(struct crypto_skcipher *tfm) { const char *name = crypto_tfm_alg_name(&tfm->base); @@ -649,8 +640,6 @@ static int omap_aes_init_tfm(struct crypto_skcipher *tfm) crypto_skcipher_set_reqsize(tfm, sizeof(struct omap_aes_reqctx) + crypto_skcipher_reqsize(blk)); - ctx->enginectx.op.prepare_request = omap_aes_prepare_req; - ctx->enginectx.op.unprepare_request = NULL; ctx->enginectx.op.do_one_request = omap_aes_crypt_req; return 0; diff --git a/drivers/crypto/omap-des.c b/drivers/crypto/omap-des.c index 371a51094e34..29a3b4c9edaf 100644 --- a/drivers/crypto/omap-des.c +++ b/drivers/crypto/omap-des.c @@ -522,20 +522,15 @@ static int omap_des_handle_queue(struct omap_des_dev *dd, return 0; } -static int omap_des_prepare_req(struct crypto_engine *engine, - void *areq) +static int omap_des_prepare_req(struct skcipher_request *req, + struct omap_des_dev *dd) { - struct skcipher_request *req = container_of(areq, struct skcipher_request, base); struct omap_des_ctx *ctx = crypto_skcipher_ctx( crypto_skcipher_reqtfm(req)); - struct omap_des_dev *dd = omap_des_find_dev(ctx); struct omap_des_reqctx *rctx; int ret; u16 flags; - if (!dd) - return -ENODEV; - /* assign new request to device */ dd->req = req; dd->total = req->cryptlen; @@ -590,7 +585,8 @@ static int omap_des_crypt_req(struct crypto_engine *engine, if (!dd) return -ENODEV; - return omap_des_crypt_dma_start(dd); + return omap_des_prepare_req(req, dd) ?: + omap_des_crypt_dma_start(dd); } static void omap_des_done_task(unsigned long data) @@ -709,11 +705,6 @@ static int omap_des_cbc_decrypt(struct skcipher_request *req) return omap_des_crypt(req, FLAGS_CBC); } -static int omap_des_prepare_req(struct crypto_engine *engine, - void *areq); -static int omap_des_crypt_req(struct crypto_engine *engine, - void *areq); - static int omap_des_init_tfm(struct crypto_skcipher *tfm) { struct omap_des_ctx *ctx = crypto_skcipher_ctx(tfm); @@ -722,8 +713,6 @@ static int omap_des_init_tfm(struct crypto_skcipher *tfm) crypto_skcipher_set_reqsize(tfm, sizeof(struct omap_des_reqctx)); - ctx->enginectx.op.prepare_request = omap_des_prepare_req; - ctx->enginectx.op.unprepare_request = NULL; ctx->enginectx.op.do_one_request = omap_des_crypt_req; return 0; diff --git a/drivers/crypto/omap-sham.c b/drivers/crypto/omap-sham.c index cbeda59c6b19..2ef92301969f 100644 --- a/drivers/crypto/omap-sham.c +++ b/drivers/crypto/omap-sham.c @@ -1074,6 +1074,10 @@ static int omap_sham_hash_one_req(struct crypto_engine *engine, void *areq) dev_dbg(dd->dev, "hash-one: op: %u, total: %u, digcnt: %zd, final: %d", ctx->op, ctx->total, ctx->digcnt, final); + err = omap_sham_prepare_request(engine, areq); + if (err) + return err; + err = pm_runtime_resume_and_get(dd->dev); if (err < 0) { dev_err(dd->dev, "failed to get sync: %d\n", err); @@ -1350,8 +1354,6 @@ static int omap_sham_cra_init_alg(struct crypto_tfm *tfm, const char *alg_base) } tctx->enginectx.op.do_one_request = omap_sham_hash_one_req; - tctx->enginectx.op.prepare_request = omap_sham_prepare_request; - tctx->enginectx.op.unprepare_request = NULL; return 0; } From c66c17a0f69b0e017bbc01d999a28ed96ee84826 Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Sun, 13 Aug 2023 14:54:22 +0800 Subject: [PATCH 504/656] crypto: rk3288 - Remove prepare/unprepare request The callbacks for prepare and unprepare request in crypto_engine is superfluous. They can be done directly from do_one_request. Move the code into do_one_request and remove the unused callbacks. Signed-off-by: Herbert Xu --- drivers/crypto/rockchip/rk3288_crypto_ahash.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/crypto/rockchip/rk3288_crypto_ahash.c b/drivers/crypto/rockchip/rk3288_crypto_ahash.c index a78ff3dcd0b1..1519aa0a0f7c 100644 --- a/drivers/crypto/rockchip/rk3288_crypto_ahash.c +++ b/drivers/crypto/rockchip/rk3288_crypto_ahash.c @@ -240,14 +240,13 @@ static int rk_hash_prepare(struct crypto_engine *engine, void *breq) return 0; } -static int rk_hash_unprepare(struct crypto_engine *engine, void *breq) +static void rk_hash_unprepare(struct crypto_engine *engine, void *breq) { struct ahash_request *areq = container_of(breq, struct ahash_request, base); struct rk_ahash_rctx *rctx = ahash_request_ctx(areq); struct rk_crypto_info *rkc = rctx->dev; dma_unmap_sg(rkc->dev, areq->src, rctx->nrsg, DMA_TO_DEVICE); - return 0; } static int rk_hash_run(struct crypto_engine *engine, void *breq) @@ -259,7 +258,7 @@ static int rk_hash_run(struct crypto_engine *engine, void *breq) struct rk_crypto_tmp *algt = container_of(alg, struct rk_crypto_tmp, alg.hash); struct scatterlist *sg = areq->src; struct rk_crypto_info *rkc = rctx->dev; - int err = 0; + int err; int i; u32 v; @@ -267,6 +266,10 @@ static int rk_hash_run(struct crypto_engine *engine, void *breq) if (err) return err; + err = rk_hash_prepare(engine, breq); + if (err) + goto theend; + rctx->mode = 0; algt->stat_req++; @@ -327,6 +330,8 @@ theend: crypto_finalize_hash_request(engine, breq, err); local_bh_enable(); + rk_hash_unprepare(engine, breq); + return 0; } @@ -350,8 +355,6 @@ static int rk_cra_hash_init(struct crypto_tfm *tfm) crypto_ahash_reqsize(tctx->fallback_tfm)); tctx->enginectx.op.do_one_request = rk_hash_run; - tctx->enginectx.op.prepare_request = rk_hash_prepare; - tctx->enginectx.op.unprepare_request = rk_hash_unprepare; return 0; } From 50c546d70af866ea5cbeb39f5007df96ea27c41e Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Sun, 13 Aug 2023 14:54:24 +0800 Subject: [PATCH 505/656] crypto: jh1100 - Remove prepare/unprepare request The callbacks for prepare and unprepare request in crypto_engine is superfluous. They can be done directly from do_one_request. Move the code into do_one_request and remove the unused callbacks. Signed-off-by: Herbert Xu --- drivers/crypto/starfive/jh7110-aes.c | 54 ++++++--------------------- drivers/crypto/starfive/jh7110-hash.c | 7 ---- 2 files changed, 11 insertions(+), 50 deletions(-) diff --git a/drivers/crypto/starfive/jh7110-aes.c b/drivers/crypto/starfive/jh7110-aes.c index 278dfa4aa743..777656cbb7ce 100644 --- a/drivers/crypto/starfive/jh7110-aes.c +++ b/drivers/crypto/starfive/jh7110-aes.c @@ -518,8 +518,13 @@ static int starfive_aes_do_one_req(struct crypto_engine *engine, void *areq) struct starfive_cryp_dev *cryp = ctx->cryp; u32 block[AES_BLOCK_32]; u32 stat; + int err; int i; + err = starfive_aes_prepare_req(req, NULL); + if (err) + return err; + /* * Write first plain/ciphertext block to start the module * then let irq tasklet handle the rest of the data blocks. @@ -538,15 +543,6 @@ static int starfive_aes_do_one_req(struct crypto_engine *engine, void *areq) return 0; } -static int starfive_aes_skcipher_prepare_req(struct crypto_engine *engine, - void *areq) -{ - struct skcipher_request *req = - container_of(areq, struct skcipher_request, base); - - return starfive_aes_prepare_req(req, NULL); -} - static int starfive_aes_init_tfm(struct crypto_skcipher *tfm) { struct starfive_cryp_ctx *ctx = crypto_skcipher_ctx(tfm); @@ -559,21 +555,10 @@ static int starfive_aes_init_tfm(struct crypto_skcipher *tfm) sizeof(struct skcipher_request)); ctx->enginectx.op.do_one_request = starfive_aes_do_one_req; - ctx->enginectx.op.prepare_request = starfive_aes_skcipher_prepare_req; - ctx->enginectx.op.unprepare_request = NULL; return 0; } -static void starfive_aes_exit_tfm(struct crypto_skcipher *tfm) -{ - struct starfive_cryp_ctx *ctx = crypto_skcipher_ctx(tfm); - - ctx->enginectx.op.do_one_request = NULL; - ctx->enginectx.op.prepare_request = NULL; - ctx->enginectx.op.unprepare_request = NULL; -} - static int starfive_aes_aead_do_one_req(struct crypto_engine *engine, void *areq) { struct aead_request *req = @@ -584,8 +569,13 @@ static int starfive_aes_aead_do_one_req(struct crypto_engine *engine, void *areq struct starfive_cryp_request_ctx *rctx = ctx->rctx; u32 block[AES_BLOCK_32]; u32 stat; + int err; int i; + err = starfive_aes_prepare_req(NULL, req); + if (err) + return err; + if (!cryp->assoclen) goto write_text; @@ -625,14 +615,6 @@ finish_req: return 0; } -static int starfive_aes_aead_prepare_req(struct crypto_engine *engine, void *areq) -{ - struct aead_request *req = - container_of(areq, struct aead_request, base); - - return starfive_aes_prepare_req(NULL, req); -} - static int starfive_aes_aead_init_tfm(struct crypto_aead *tfm) { struct starfive_cryp_ctx *ctx = crypto_aead_ctx(tfm); @@ -657,8 +639,6 @@ static int starfive_aes_aead_init_tfm(struct crypto_aead *tfm) sizeof(struct aead_request)); ctx->enginectx.op.do_one_request = starfive_aes_aead_do_one_req; - ctx->enginectx.op.prepare_request = starfive_aes_aead_prepare_req; - ctx->enginectx.op.unprepare_request = NULL; return 0; } @@ -667,14 +647,7 @@ static void starfive_aes_aead_exit_tfm(struct crypto_aead *tfm) { struct starfive_cryp_ctx *ctx = crypto_aead_ctx(tfm); - if (ctx->aead_fbk) { - crypto_free_aead(ctx->aead_fbk); - ctx->aead_fbk = NULL; - } - - ctx->enginectx.op.do_one_request = NULL; - ctx->enginectx.op.prepare_request = NULL; - ctx->enginectx.op.unprepare_request = NULL; + crypto_free_aead(ctx->aead_fbk); } static int starfive_aes_crypt(struct skcipher_request *req, unsigned long flags) @@ -874,7 +847,6 @@ static int starfive_aes_ccm_decrypt(struct aead_request *req) static struct skcipher_alg skcipher_algs[] = { { .init = starfive_aes_init_tfm, - .exit = starfive_aes_exit_tfm, .setkey = starfive_aes_setkey, .encrypt = starfive_aes_ecb_encrypt, .decrypt = starfive_aes_ecb_decrypt, @@ -892,7 +864,6 @@ static struct skcipher_alg skcipher_algs[] = { }, }, { .init = starfive_aes_init_tfm, - .exit = starfive_aes_exit_tfm, .setkey = starfive_aes_setkey, .encrypt = starfive_aes_cbc_encrypt, .decrypt = starfive_aes_cbc_decrypt, @@ -911,7 +882,6 @@ static struct skcipher_alg skcipher_algs[] = { }, }, { .init = starfive_aes_init_tfm, - .exit = starfive_aes_exit_tfm, .setkey = starfive_aes_setkey, .encrypt = starfive_aes_ctr_encrypt, .decrypt = starfive_aes_ctr_decrypt, @@ -930,7 +900,6 @@ static struct skcipher_alg skcipher_algs[] = { }, }, { .init = starfive_aes_init_tfm, - .exit = starfive_aes_exit_tfm, .setkey = starfive_aes_setkey, .encrypt = starfive_aes_cfb_encrypt, .decrypt = starfive_aes_cfb_decrypt, @@ -949,7 +918,6 @@ static struct skcipher_alg skcipher_algs[] = { }, }, { .init = starfive_aes_init_tfm, - .exit = starfive_aes_exit_tfm, .setkey = starfive_aes_setkey, .encrypt = starfive_aes_ofb_encrypt, .decrypt = starfive_aes_ofb_decrypt, diff --git a/drivers/crypto/starfive/jh7110-hash.c b/drivers/crypto/starfive/jh7110-hash.c index 5064150b8a1c..7fe89cd13336 100644 --- a/drivers/crypto/starfive/jh7110-hash.c +++ b/drivers/crypto/starfive/jh7110-hash.c @@ -434,8 +434,6 @@ static int starfive_hash_init_tfm(struct crypto_ahash *hash, ctx->hash_mode = mode; ctx->enginectx.op.do_one_request = starfive_hash_one_request; - ctx->enginectx.op.prepare_request = NULL; - ctx->enginectx.op.unprepare_request = NULL; return 0; } @@ -445,11 +443,6 @@ static void starfive_hash_exit_tfm(struct crypto_ahash *hash) struct starfive_cryp_ctx *ctx = crypto_ahash_ctx(hash); crypto_free_ahash(ctx->ahash_fbk); - - ctx->ahash_fbk = NULL; - ctx->enginectx.op.do_one_request = NULL; - ctx->enginectx.op.prepare_request = NULL; - ctx->enginectx.op.unprepare_request = NULL; } static int starfive_hash_long_setkey(struct starfive_cryp_ctx *ctx, From 6912b79da85a445b85d4da37a9e5e49821b63e18 Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Sun, 13 Aug 2023 14:54:26 +0800 Subject: [PATCH 506/656] crypto: stm32 - Remove prepare/unprepare request The callbacks for prepare and unprepare request in crypto_engine is superfluous. They can be done directly from do_one_request. Move the code into do_one_request and remove the unused callbacks. Signed-off-by: Herbert Xu --- drivers/crypto/stm32/stm32-cryp.c | 37 ++++++------------------------- 1 file changed, 7 insertions(+), 30 deletions(-) diff --git a/drivers/crypto/stm32/stm32-cryp.c b/drivers/crypto/stm32/stm32-cryp.c index 6b8d731092a4..07e32b8dbe29 100644 --- a/drivers/crypto/stm32/stm32-cryp.c +++ b/drivers/crypto/stm32/stm32-cryp.c @@ -825,8 +825,6 @@ static int stm32_cryp_cpu_start(struct stm32_cryp *cryp) } static int stm32_cryp_cipher_one_req(struct crypto_engine *engine, void *areq); -static int stm32_cryp_prepare_cipher_req(struct crypto_engine *engine, - void *areq); static int stm32_cryp_init_tfm(struct crypto_skcipher *tfm) { @@ -835,14 +833,10 @@ static int stm32_cryp_init_tfm(struct crypto_skcipher *tfm) crypto_skcipher_set_reqsize(tfm, sizeof(struct stm32_cryp_reqctx)); ctx->enginectx.op.do_one_request = stm32_cryp_cipher_one_req; - ctx->enginectx.op.prepare_request = stm32_cryp_prepare_cipher_req; - ctx->enginectx.op.unprepare_request = NULL; return 0; } static int stm32_cryp_aead_one_req(struct crypto_engine *engine, void *areq); -static int stm32_cryp_prepare_aead_req(struct crypto_engine *engine, - void *areq); static int stm32_cryp_aes_aead_init(struct crypto_aead *tfm) { @@ -851,8 +845,6 @@ static int stm32_cryp_aes_aead_init(struct crypto_aead *tfm) tfm->reqsize = sizeof(struct stm32_cryp_reqctx); ctx->enginectx.op.do_one_request = stm32_cryp_aead_one_req; - ctx->enginectx.op.prepare_request = stm32_cryp_prepare_aead_req; - ctx->enginectx.op.unprepare_request = NULL; return 0; } @@ -1180,9 +1172,6 @@ static int stm32_cryp_prepare_req(struct skcipher_request *req, cryp = ctx->cryp; - if (!cryp) - return -ENODEV; - rctx = req ? skcipher_request_ctx(req) : aead_request_ctx(areq); rctx->mode &= FLG_MODE_MASK; @@ -1248,16 +1237,6 @@ static int stm32_cryp_prepare_req(struct skcipher_request *req, return ret; } -static int stm32_cryp_prepare_cipher_req(struct crypto_engine *engine, - void *areq) -{ - struct skcipher_request *req = container_of(areq, - struct skcipher_request, - base); - - return stm32_cryp_prepare_req(req, NULL); -} - static int stm32_cryp_cipher_one_req(struct crypto_engine *engine, void *areq) { struct skcipher_request *req = container_of(areq, @@ -1270,15 +1249,8 @@ static int stm32_cryp_cipher_one_req(struct crypto_engine *engine, void *areq) if (!cryp) return -ENODEV; - return stm32_cryp_cpu_start(cryp); -} - -static int stm32_cryp_prepare_aead_req(struct crypto_engine *engine, void *areq) -{ - struct aead_request *req = container_of(areq, struct aead_request, - base); - - return stm32_cryp_prepare_req(NULL, req); + return stm32_cryp_prepare_req(req, NULL) ?: + stm32_cryp_cpu_start(cryp); } static int stm32_cryp_aead_one_req(struct crypto_engine *engine, void *areq) @@ -1287,10 +1259,15 @@ static int stm32_cryp_aead_one_req(struct crypto_engine *engine, void *areq) base); struct stm32_cryp_ctx *ctx = crypto_aead_ctx(crypto_aead_reqtfm(req)); struct stm32_cryp *cryp = ctx->cryp; + int err; if (!cryp) return -ENODEV; + err = stm32_cryp_prepare_req(NULL, req); + if (err) + return err; + if (unlikely(!cryp->payload_in && !cryp->header_in)) { /* No input data to process: get tag and finish */ stm32_cryp_finish_req(cryp, 0); From fc0bdcb8303b70bc0c1b5fbf236a4882f254cf94 Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Sun, 13 Aug 2023 14:54:28 +0800 Subject: [PATCH 507/656] crypto: virtio - Remove prepare/unprepare request The callbacks for prepare and unprepare request in crypto_engine is superfluous. They can be done directly from do_one_request. Move the code into do_one_request and remove the unused callbacks. Signed-off-by: Herbert Xu --- drivers/crypto/virtio/virtio_crypto_akcipher_algs.c | 2 -- drivers/crypto/virtio/virtio_crypto_skcipher_algs.c | 2 -- 2 files changed, 4 deletions(-) diff --git a/drivers/crypto/virtio/virtio_crypto_akcipher_algs.c b/drivers/crypto/virtio/virtio_crypto_akcipher_algs.c index 6963344f6a3a..ff3369ca319f 100644 --- a/drivers/crypto/virtio/virtio_crypto_akcipher_algs.c +++ b/drivers/crypto/virtio/virtio_crypto_akcipher_algs.c @@ -476,8 +476,6 @@ static int virtio_crypto_rsa_init_tfm(struct crypto_akcipher *tfm) ctx->tfm = tfm; ctx->enginectx.op.do_one_request = virtio_crypto_rsa_do_req; - ctx->enginectx.op.prepare_request = NULL; - ctx->enginectx.op.unprepare_request = NULL; akcipher_set_reqsize(tfm, sizeof(struct virtio_crypto_akcipher_request)); diff --git a/drivers/crypto/virtio/virtio_crypto_skcipher_algs.c b/drivers/crypto/virtio/virtio_crypto_skcipher_algs.c index e5876286828b..71b8751ab5ab 100644 --- a/drivers/crypto/virtio/virtio_crypto_skcipher_algs.c +++ b/drivers/crypto/virtio/virtio_crypto_skcipher_algs.c @@ -524,8 +524,6 @@ static int virtio_crypto_skcipher_init(struct crypto_skcipher *tfm) ctx->tfm = tfm; ctx->enginectx.op.do_one_request = virtio_crypto_skcipher_crypt_req; - ctx->enginectx.op.prepare_request = NULL; - ctx->enginectx.op.unprepare_request = NULL; return 0; } From be8b8a950f0ae601c8ff841b9dcc899f83054025 Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Sun, 13 Aug 2023 14:54:30 +0800 Subject: [PATCH 508/656] crypto: zynqmp - Remove prepare/unprepare request The callbacks for prepare and unprepare request in crypto_engine is superfluous. They can be done directly from do_one_request. Move the code into do_one_request and remove the unused callbacks. Signed-off-by: Herbert Xu --- drivers/crypto/xilinx/zynqmp-aes-gcm.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/crypto/xilinx/zynqmp-aes-gcm.c b/drivers/crypto/xilinx/zynqmp-aes-gcm.c index bf1f421e05f2..ae7dd82abea1 100644 --- a/drivers/crypto/xilinx/zynqmp-aes-gcm.c +++ b/drivers/crypto/xilinx/zynqmp-aes-gcm.c @@ -316,8 +316,6 @@ static int zynqmp_aes_aead_init(struct crypto_aead *aead) tfm_ctx->dev = drv_ctx->dev; tfm_ctx->engine_ctx.op.do_one_request = zynqmp_handle_aes_req; - tfm_ctx->engine_ctx.op.prepare_request = NULL; - tfm_ctx->engine_ctx.op.unprepare_request = NULL; tfm_ctx->fbk_cipher = crypto_alloc_aead(drv_ctx->alg.aead.base.cra_name, 0, From bcd6e41d983621954dfc3f1f64249a55838b3e6a Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Sun, 13 Aug 2023 14:54:32 +0800 Subject: [PATCH 509/656] crypto: engine - Remove prepare/unprepare request The callbacks for prepare and unprepare request in crypto_engine is superfluous. They can be done directly from do_one_request. Move the code into do_one_request and remove the unused callbacks. Signed-off-by: Herbert Xu --- crypto/crypto_engine.c | 42 +---------------------------------------- include/crypto/engine.h | 6 ------ 2 files changed, 1 insertion(+), 47 deletions(-) diff --git a/crypto/crypto_engine.c b/crypto/crypto_engine.c index 74fcc0897041..17f7955500a0 100644 --- a/crypto/crypto_engine.c +++ b/crypto/crypto_engine.c @@ -26,9 +26,6 @@ static void crypto_finalize_request(struct crypto_engine *engine, struct crypto_async_request *req, int err) { unsigned long flags; - bool finalize_req = false; - int ret; - struct crypto_engine_ctx *enginectx; /* * If hardware cannot enqueue more requests @@ -38,21 +35,11 @@ static void crypto_finalize_request(struct crypto_engine *engine, if (!engine->retry_support) { spin_lock_irqsave(&engine->queue_lock, flags); if (engine->cur_req == req) { - finalize_req = true; engine->cur_req = NULL; } spin_unlock_irqrestore(&engine->queue_lock, flags); } - if (finalize_req || engine->retry_support) { - enginectx = crypto_tfm_ctx(req->tfm); - if (enginectx->op.prepare_request && - enginectx->op.unprepare_request) { - ret = enginectx->op.unprepare_request(engine, req); - if (ret) - dev_err(engine->dev, "failed to unprepare request\n"); - } - } lockdep_assert_in_softirq(); crypto_request_complete(req, err); @@ -141,20 +128,12 @@ start_request: ret = engine->prepare_crypt_hardware(engine); if (ret) { dev_err(engine->dev, "failed to prepare crypt hardware\n"); - goto req_err_2; + goto req_err_1; } } enginectx = crypto_tfm_ctx(async_req->tfm); - if (enginectx->op.prepare_request) { - ret = enginectx->op.prepare_request(engine, async_req); - if (ret) { - dev_err(engine->dev, "failed to prepare request: %d\n", - ret); - goto req_err_2; - } - } if (!enginectx->op.do_one_request) { dev_err(engine->dev, "failed to do request\n"); ret = -EINVAL; @@ -177,18 +156,6 @@ start_request: ret); goto req_err_1; } - /* - * If retry mechanism is supported, - * unprepare current request and - * enqueue it back into crypto-engine queue. - */ - if (enginectx->op.unprepare_request) { - ret = enginectx->op.unprepare_request(engine, - async_req); - if (ret) - dev_err(engine->dev, - "failed to unprepare request\n"); - } spin_lock_irqsave(&engine->queue_lock, flags); /* * If hardware was unable to execute request, enqueue it @@ -204,13 +171,6 @@ start_request: goto retry; req_err_1: - if (enginectx->op.unprepare_request) { - ret = enginectx->op.unprepare_request(engine, async_req); - if (ret) - dev_err(engine->dev, "failed to unprepare request\n"); - } - -req_err_2: crypto_request_complete(async_req, ret); retry: diff --git a/include/crypto/engine.h b/include/crypto/engine.h index 2038764b30c2..1b02f69e0a79 100644 --- a/include/crypto/engine.h +++ b/include/crypto/engine.h @@ -78,15 +78,9 @@ struct crypto_engine { /* * struct crypto_engine_op - crypto hardware engine operations - * @prepare_request: do some preparation if needed before handling the current request - * @unprepare_request: undo any work done by prepare_request() * @do_one_request: do encryption for current request */ struct crypto_engine_op { - int (*prepare_request)(struct crypto_engine *engine, - void *areq); - int (*unprepare_request)(struct crypto_engine *engine, - void *areq); int (*do_one_request)(struct crypto_engine *engine, void *areq); }; From 1c27c0ca220b42fb8b727d68b58693b77cbd095d Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Sun, 13 Aug 2023 14:54:34 +0800 Subject: [PATCH 510/656] crypto: jh7110 - Include crypto/hash.h in header file The header file jh7110-cryp uses ahash_request without including crypto/hash.h. Fix that by adding the inclusion. Signed-off-by: Herbert Xu --- drivers/crypto/starfive/jh7110-cryp.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/crypto/starfive/jh7110-cryp.h b/drivers/crypto/starfive/jh7110-cryp.h index b6d809e8fe45..4462d1db9544 100644 --- a/drivers/crypto/starfive/jh7110-cryp.h +++ b/drivers/crypto/starfive/jh7110-cryp.h @@ -2,16 +2,16 @@ #ifndef __STARFIVE_STR_H__ #define __STARFIVE_STR_H__ +#include +#include +#include +#include +#include #include #include #include #include -#include -#include -#include -#include - #define STARFIVE_ALG_CR_OFFSET 0x0 #define STARFIVE_ALG_FIFO_OFFSET 0x4 #define STARFIVE_IE_MASK_OFFSET 0x8 From 68021dee251e72d87ebbf052acf69b3217c11383 Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Sun, 13 Aug 2023 14:54:36 +0800 Subject: [PATCH 511/656] crypto: engine - Move crypto inclusions out of header file The engine file does not need the actual crypto type definitions so move those header inclusions to where they are actually used. Signed-off-by: Herbert Xu --- crypto/crypto_engine.c | 7 ++++++- include/crypto/engine.h | 17 +++++++---------- 2 files changed, 13 insertions(+), 11 deletions(-) diff --git a/crypto/crypto_engine.c b/crypto/crypto_engine.c index 17f7955500a0..ba43dfba2fa9 100644 --- a/crypto/crypto_engine.c +++ b/crypto/crypto_engine.c @@ -7,10 +7,15 @@ * Author: Baolin Wang */ +#include +#include +#include +#include +#include +#include #include #include #include -#include #include #include "internal.h" diff --git a/include/crypto/engine.h b/include/crypto/engine.h index 1b02f69e0a79..643639c3227c 100644 --- a/include/crypto/engine.h +++ b/include/crypto/engine.h @@ -7,20 +7,17 @@ #ifndef _CRYPTO_ENGINE_H #define _CRYPTO_ENGINE_H -#include -#include +#include #include -#include +#include #include -#include -#include -#include -#include -#include -#include - +struct aead_request; +struct ahash_request; +struct akcipher_request; struct device; +struct kpp_request; +struct skcipher_request; #define ENGINE_NAME_LEN 30 /* From 2d6a79cc2ade0b3e67e66393a6183284e87b87f6 Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Sun, 13 Aug 2023 14:54:38 +0800 Subject: [PATCH 512/656] crypto: jh7110 - Include scatterwalk.h for struct scatter_walk Include crypto/scatterwalk.h explicitly instead of getting it through random header files. Signed-off-by: Herbert Xu --- drivers/crypto/starfive/jh7110-cryp.h | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/crypto/starfive/jh7110-cryp.h b/drivers/crypto/starfive/jh7110-cryp.h index 4462d1db9544..345a8d878761 100644 --- a/drivers/crypto/starfive/jh7110-cryp.h +++ b/drivers/crypto/starfive/jh7110-cryp.h @@ -5,6 +5,7 @@ #include #include #include +#include #include #include #include From 45c461c503a7a12f4c5efaff289be17a442aeefe Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Sun, 13 Aug 2023 14:54:41 +0800 Subject: [PATCH 513/656] crypto: engine - Create internal/engine.h Create crypto/internal/engine.h to house details that should not be used by drivers. It is empty for the time being. Signed-off-by: Herbert Xu --- crypto/crypto_engine.c | 2 +- include/crypto/internal/engine.h | 13 +++++++++++++ 2 files changed, 14 insertions(+), 1 deletion(-) create mode 100644 include/crypto/internal/engine.h diff --git a/crypto/crypto_engine.c b/crypto/crypto_engine.c index ba43dfba2fa9..a75162bc1bf4 100644 --- a/crypto/crypto_engine.c +++ b/crypto/crypto_engine.c @@ -9,8 +9,8 @@ #include #include -#include #include +#include #include #include #include diff --git a/include/crypto/internal/engine.h b/include/crypto/internal/engine.h new file mode 100644 index 000000000000..ffa1bb39d5e4 --- /dev/null +++ b/include/crypto/internal/engine.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Crypto engine API + * + * Copyright (c) 2016 Baolin Wang + * Copyright (c) 2023 Herbert Xu + */ +#ifndef _CRYPTO_INTERNAL_ENGINE_H +#define _CRYPTO_INTERNAL_ENGINE_H + +#include + +#endif From b7b23ccbda5d956a8f605da35685ff5f53c0f3b9 Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Sun, 13 Aug 2023 14:54:43 +0800 Subject: [PATCH 514/656] crypto: omap - Include internal/engine.h Inlucde internal/engine.h because this driver uses directly accesses attributes inside struct crypto_engine. Signed-off-by: Herbert Xu --- drivers/crypto/omap-aes.c | 32 +++++++++++++++----------------- 1 file changed, 15 insertions(+), 17 deletions(-) diff --git a/drivers/crypto/omap-aes.c b/drivers/crypto/omap-aes.c index d6fb8676f6cc..ad0d8db086db 100644 --- a/drivers/crypto/omap-aes.c +++ b/drivers/crypto/omap-aes.c @@ -13,28 +13,26 @@ #define prn(num) pr_debug(#num "=%d\n", num) #define prx(num) pr_debug(#num "=%x\n", num) -#include -#include -#include -#include -#include -#include -#include +#include +#include +#include +#include +#include +#include #include #include -#include +#include +#include +#include +#include +#include +#include #include #include #include -#include -#include -#include -#include -#include -#include -#include -#include -#include +#include +#include +#include #include "omap-crypto.h" #include "omap-aes.h" From 4ac1a2d88d8ff2b7d6decb40f712bf9ffddcd8c9 Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Sun, 13 Aug 2023 14:54:45 +0800 Subject: [PATCH 515/656] crypto: caam - Include internal/engine.h Inlucde internal/engine.h because this driver uses directly accesses attributes inside struct crypto_engine. Signed-off-by: Herbert Xu --- drivers/crypto/caam/caamalg.c | 4 ++-- drivers/crypto/caam/caamhash.c | 2 +- drivers/crypto/caam/caampkc.c | 1 + 3 files changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/crypto/caam/caamalg.c b/drivers/crypto/caam/caamalg.c index feb86013dbf6..da8182ee86fe 100644 --- a/drivers/crypto/caam/caamalg.c +++ b/drivers/crypto/caam/caamalg.c @@ -56,9 +56,9 @@ #include "sg_sw_sec4.h" #include "key_gen.h" #include "caamalg_desc.h" -#include -#include #include +#include +#include #include #include #include diff --git a/drivers/crypto/caam/caamhash.c b/drivers/crypto/caam/caamhash.c index 641c3afd59ca..9ef25387f6b6 100644 --- a/drivers/crypto/caam/caamhash.c +++ b/drivers/crypto/caam/caamhash.c @@ -65,7 +65,7 @@ #include "sg_sw_sec4.h" #include "key_gen.h" #include "caamhash_desc.h" -#include +#include #include #include diff --git a/drivers/crypto/caam/caampkc.c b/drivers/crypto/caam/caampkc.c index 7e08af751e4e..1809c97d04be 100644 --- a/drivers/crypto/caam/caampkc.c +++ b/drivers/crypto/caam/caampkc.c @@ -16,6 +16,7 @@ #include "desc_constr.h" #include "sg_sw_sec4.h" #include "caampkc.h" +#include #include #include From c1091e2baef65b24a39db6a61de316605d3505c5 Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Sun, 13 Aug 2023 14:54:47 +0800 Subject: [PATCH 516/656] crypto: engine - Move struct crypto_engine into internal/engine.h Most drivers should not access the internal details of struct crypto_engine. Move it into the internal header file. Signed-off-by: Herbert Xu --- include/crypto/engine.h | 58 +----------------------------- include/crypto/internal/engine.h | 61 ++++++++++++++++++++++++++++++++ 2 files changed, 62 insertions(+), 57 deletions(-) diff --git a/include/crypto/engine.h b/include/crypto/engine.h index 643639c3227c..cc9c7fd1c4d9 100644 --- a/include/crypto/engine.h +++ b/include/crypto/engine.h @@ -7,72 +7,16 @@ #ifndef _CRYPTO_ENGINE_H #define _CRYPTO_ENGINE_H -#include -#include -#include #include struct aead_request; struct ahash_request; struct akcipher_request; +struct crypto_engine; struct device; struct kpp_request; struct skcipher_request; -#define ENGINE_NAME_LEN 30 -/* - * struct crypto_engine - crypto hardware engine - * @name: the engine name - * @idling: the engine is entering idle state - * @busy: request pump is busy - * @running: the engine is on working - * @retry_support: indication that the hardware allows re-execution - * of a failed backlog request - * crypto-engine, in head position to keep order - * @list: link with the global crypto engine list - * @queue_lock: spinlock to synchronise access to request queue - * @queue: the crypto queue of the engine - * @rt: whether this queue is set to run as a realtime task - * @prepare_crypt_hardware: a request will soon arrive from the queue - * so the subsystem requests the driver to prepare the hardware - * by issuing this call - * @unprepare_crypt_hardware: there are currently no more requests on the - * queue so the subsystem notifies the driver that it may relax the - * hardware by issuing this call - * @do_batch_requests: execute a batch of requests. Depends on multiple - * requests support. - * @kworker: kthread worker struct for request pump - * @pump_requests: work struct for scheduling work to the request pump - * @priv_data: the engine private data - * @cur_req: the current request which is on processing - */ -struct crypto_engine { - char name[ENGINE_NAME_LEN]; - bool idling; - bool busy; - bool running; - - bool retry_support; - - struct list_head list; - spinlock_t queue_lock; - struct crypto_queue queue; - struct device *dev; - - bool rt; - - int (*prepare_crypt_hardware)(struct crypto_engine *engine); - int (*unprepare_crypt_hardware)(struct crypto_engine *engine); - int (*do_batch_requests)(struct crypto_engine *engine); - - - struct kthread_worker *kworker; - struct kthread_work pump_requests; - - void *priv_data; - struct crypto_async_request *cur_req; -}; - /* * struct crypto_engine_op - crypto hardware engine operations * @do_one_request: do encryption for current request diff --git a/include/crypto/internal/engine.h b/include/crypto/internal/engine.h index ffa1bb39d5e4..fbf4be56cf12 100644 --- a/include/crypto/internal/engine.h +++ b/include/crypto/internal/engine.h @@ -8,6 +8,67 @@ #ifndef _CRYPTO_INTERNAL_ENGINE_H #define _CRYPTO_INTERNAL_ENGINE_H +#include #include +#include +#include +#include + +#define ENGINE_NAME_LEN 30 + +struct device; + +/* + * struct crypto_engine - crypto hardware engine + * @name: the engine name + * @idling: the engine is entering idle state + * @busy: request pump is busy + * @running: the engine is on working + * @retry_support: indication that the hardware allows re-execution + * of a failed backlog request + * crypto-engine, in head position to keep order + * @list: link with the global crypto engine list + * @queue_lock: spinlock to synchronise access to request queue + * @queue: the crypto queue of the engine + * @rt: whether this queue is set to run as a realtime task + * @prepare_crypt_hardware: a request will soon arrive from the queue + * so the subsystem requests the driver to prepare the hardware + * by issuing this call + * @unprepare_crypt_hardware: there are currently no more requests on the + * queue so the subsystem notifies the driver that it may relax the + * hardware by issuing this call + * @do_batch_requests: execute a batch of requests. Depends on multiple + * requests support. + * @kworker: kthread worker struct for request pump + * @pump_requests: work struct for scheduling work to the request pump + * @priv_data: the engine private data + * @cur_req: the current request which is on processing + */ +struct crypto_engine { + char name[ENGINE_NAME_LEN]; + bool idling; + bool busy; + bool running; + + bool retry_support; + + struct list_head list; + spinlock_t queue_lock; + struct crypto_queue queue; + struct device *dev; + + bool rt; + + int (*prepare_crypt_hardware)(struct crypto_engine *engine); + int (*unprepare_crypt_hardware)(struct crypto_engine *engine); + int (*do_batch_requests)(struct crypto_engine *engine); + + + struct kthread_worker *kworker; + struct kthread_work pump_requests; + + void *priv_data; + struct crypto_async_request *cur_req; +}; #endif From e5e7eb023f24653b07329162b6359283b3a03a20 Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Sun, 13 Aug 2023 14:54:49 +0800 Subject: [PATCH 517/656] crypto: engine - Move crypto_engine_ops from request into crypto_alg Rather than having the callback in the request, move it into the crypto_alg object. This avoids having crypto_engine look into the request context is private to the driver. Signed-off-by: Herbert Xu --- crypto/crypto_engine.c | 213 +++++++++++++++++++++++++++++++++++++--- include/crypto/engine.h | 59 ++++++++++- 2 files changed, 256 insertions(+), 16 deletions(-) diff --git a/crypto/crypto_engine.c b/crypto/crypto_engine.c index a75162bc1bf4..abfb1e6bfa48 100644 --- a/crypto/crypto_engine.c +++ b/crypto/crypto_engine.c @@ -7,20 +7,30 @@ * Author: Baolin Wang */ -#include -#include -#include +#include +#include #include -#include -#include +#include +#include +#include #include #include #include +#include +#include #include #include "internal.h" #define CRYPTO_ENGINE_MAX_QLEN 10 +/* Temporary algorithm flag used to indicate an updated driver. */ +#define CRYPTO_ALG_ENGINE 0x200 + +struct crypto_engine_alg { + struct crypto_alg base; + struct crypto_engine_op op; +}; + /** * crypto_finalize_request - finalize one request if the request is done * @engine: the hardware engine @@ -64,6 +74,8 @@ static void crypto_pump_requests(struct crypto_engine *engine, bool in_kthread) { struct crypto_async_request *async_req, *backlog; + struct crypto_engine_alg *alg; + struct crypto_engine_op *op; unsigned long flags; bool was_busy = false; int ret; @@ -137,15 +149,22 @@ start_request: } } - enginectx = crypto_tfm_ctx(async_req->tfm); + if (async_req->tfm->__crt_alg->cra_flags & CRYPTO_ALG_ENGINE) { + alg = container_of(async_req->tfm->__crt_alg, + struct crypto_engine_alg, base); + op = &alg->op; + } else { + enginectx = crypto_tfm_ctx(async_req->tfm); + op = &enginectx->op; - if (!enginectx->op.do_one_request) { - dev_err(engine->dev, "failed to do request\n"); - ret = -EINVAL; - goto req_err_1; + if (!op->do_one_request) { + dev_err(engine->dev, "failed to do request\n"); + ret = -EINVAL; + goto req_err_1; + } } - ret = enginectx->op.do_one_request(engine, async_req); + ret = op->do_one_request(engine, async_req); /* Request unsuccessfully executed by hardware */ if (ret < 0) { @@ -556,5 +575,177 @@ int crypto_engine_exit(struct crypto_engine *engine) } EXPORT_SYMBOL_GPL(crypto_engine_exit); +int crypto_engine_register_aead(struct aead_engine_alg *alg) +{ + if (!alg->op.do_one_request) + return -EINVAL; + + alg->base.base.cra_flags |= CRYPTO_ALG_ENGINE; + + return crypto_register_aead(&alg->base); +} +EXPORT_SYMBOL_GPL(crypto_engine_register_aead); + +void crypto_engine_unregister_aead(struct aead_engine_alg *alg) +{ + crypto_unregister_aead(&alg->base); +} +EXPORT_SYMBOL_GPL(crypto_engine_unregister_aead); + +int crypto_engine_register_aeads(struct aead_engine_alg *algs, int count) +{ + int i, ret; + + for (i = 0; i < count; i++) { + ret = crypto_engine_register_aead(&algs[i]); + if (ret) + goto err; + } + + return 0; + +err: + crypto_engine_unregister_aeads(algs, i); + + return ret; +} +EXPORT_SYMBOL_GPL(crypto_engine_register_aeads); + +void crypto_engine_unregister_aeads(struct aead_engine_alg *algs, int count) +{ + int i; + + for (i = count - 1; i >= 0; --i) + crypto_engine_unregister_aead(&algs[i]); +} +EXPORT_SYMBOL_GPL(crypto_engine_unregister_aeads); + +int crypto_engine_register_ahash(struct ahash_engine_alg *alg) +{ + if (!alg->op.do_one_request) + return -EINVAL; + + alg->base.halg.base.cra_flags |= CRYPTO_ALG_ENGINE; + + return crypto_register_ahash(&alg->base); +} +EXPORT_SYMBOL_GPL(crypto_engine_register_ahash); + +void crypto_engine_unregister_ahash(struct ahash_engine_alg *alg) +{ + crypto_unregister_ahash(&alg->base); +} +EXPORT_SYMBOL_GPL(crypto_engine_unregister_ahash); + +int crypto_engine_register_ahashes(struct ahash_engine_alg *algs, int count) +{ + int i, ret; + + for (i = 0; i < count; i++) { + ret = crypto_engine_register_ahash(&algs[i]); + if (ret) + goto err; + } + + return 0; + +err: + crypto_engine_unregister_ahashes(algs, i); + + return ret; +} +EXPORT_SYMBOL_GPL(crypto_engine_register_ahashes); + +void crypto_engine_unregister_ahashes(struct ahash_engine_alg *algs, + int count) +{ + int i; + + for (i = count - 1; i >= 0; --i) + crypto_engine_unregister_ahash(&algs[i]); +} +EXPORT_SYMBOL_GPL(crypto_engine_unregister_ahashes); + +int crypto_engine_register_akcipher(struct akcipher_engine_alg *alg) +{ + if (!alg->op.do_one_request) + return -EINVAL; + + alg->base.base.cra_flags |= CRYPTO_ALG_ENGINE; + + return crypto_register_akcipher(&alg->base); +} +EXPORT_SYMBOL_GPL(crypto_engine_register_akcipher); + +void crypto_engine_unregister_akcipher(struct akcipher_engine_alg *alg) +{ + crypto_unregister_akcipher(&alg->base); +} +EXPORT_SYMBOL_GPL(crypto_engine_unregister_akcipher); + +int crypto_engine_register_kpp(struct kpp_engine_alg *alg) +{ + if (!alg->op.do_one_request) + return -EINVAL; + + alg->base.base.cra_flags |= CRYPTO_ALG_ENGINE; + + return crypto_register_kpp(&alg->base); +} +EXPORT_SYMBOL_GPL(crypto_engine_register_kpp); + +void crypto_engine_unregister_kpp(struct kpp_engine_alg *alg) +{ + crypto_unregister_kpp(&alg->base); +} +EXPORT_SYMBOL_GPL(crypto_engine_unregister_kpp); + +int crypto_engine_register_skcipher(struct skcipher_engine_alg *alg) +{ + if (!alg->op.do_one_request) + return -EINVAL; + + alg->base.base.cra_flags |= CRYPTO_ALG_ENGINE; + + return crypto_register_skcipher(&alg->base); +} +EXPORT_SYMBOL_GPL(crypto_engine_register_skcipher); + +void crypto_engine_unregister_skcipher(struct skcipher_engine_alg *alg) +{ + return crypto_unregister_skcipher(&alg->base); +} +EXPORT_SYMBOL_GPL(crypto_engine_unregister_skcipher); + +int crypto_engine_register_skciphers(struct skcipher_engine_alg *algs, + int count) +{ + int i, ret; + + for (i = 0; i < count; i++) { + ret = crypto_engine_register_skcipher(&algs[i]); + if (ret) + goto err; + } + + return 0; + +err: + crypto_engine_unregister_skciphers(algs, i); + + return ret; +} +EXPORT_SYMBOL_GPL(crypto_engine_register_skciphers); + +void crypto_engine_unregister_skciphers(struct skcipher_engine_alg *algs, + int count) +{ + int i; + + for (i = count - 1; i >= 0; --i) + crypto_engine_unregister_skcipher(&algs[i]); +} +EXPORT_SYMBOL_GPL(crypto_engine_unregister_skciphers); + MODULE_LICENSE("GPL"); MODULE_DESCRIPTION("Crypto hardware engine framework"); diff --git a/include/crypto/engine.h b/include/crypto/engine.h index cc9c7fd1c4d9..cf57e732566b 100644 --- a/include/crypto/engine.h +++ b/include/crypto/engine.h @@ -7,15 +7,15 @@ #ifndef _CRYPTO_ENGINE_H #define _CRYPTO_ENGINE_H +#include +#include +#include +#include +#include #include -struct aead_request; -struct ahash_request; -struct akcipher_request; struct crypto_engine; struct device; -struct kpp_request; -struct skcipher_request; /* * struct crypto_engine_op - crypto hardware engine operations @@ -30,6 +30,31 @@ struct crypto_engine_ctx { struct crypto_engine_op op; }; +struct aead_engine_alg { + struct aead_alg base; + struct crypto_engine_op op; +}; + +struct ahash_engine_alg { + struct ahash_alg base; + struct crypto_engine_op op; +}; + +struct akcipher_engine_alg { + struct akcipher_alg base; + struct crypto_engine_op op; +}; + +struct kpp_engine_alg { + struct kpp_alg base; + struct crypto_engine_op op; +}; + +struct skcipher_engine_alg { + struct skcipher_alg base; + struct crypto_engine_op op; +}; + int crypto_transfer_aead_request_to_engine(struct crypto_engine *engine, struct aead_request *req); int crypto_transfer_akcipher_request_to_engine(struct crypto_engine *engine, @@ -59,4 +84,28 @@ struct crypto_engine *crypto_engine_alloc_init_and_set(struct device *dev, bool rt, int qlen); int crypto_engine_exit(struct crypto_engine *engine); +int crypto_engine_register_aead(struct aead_engine_alg *alg); +void crypto_engine_unregister_aead(struct aead_engine_alg *alg); +int crypto_engine_register_aeads(struct aead_engine_alg *algs, int count); +void crypto_engine_unregister_aeads(struct aead_engine_alg *algs, int count); + +int crypto_engine_register_ahash(struct ahash_engine_alg *alg); +void crypto_engine_unregister_ahash(struct ahash_engine_alg *alg); +int crypto_engine_register_ahashes(struct ahash_engine_alg *algs, int count); +void crypto_engine_unregister_ahashes(struct ahash_engine_alg *algs, + int count); + +int crypto_engine_register_akcipher(struct akcipher_engine_alg *alg); +void crypto_engine_unregister_akcipher(struct akcipher_engine_alg *alg); + +int crypto_engine_register_kpp(struct kpp_engine_alg *alg); +void crypto_engine_unregister_kpp(struct kpp_engine_alg *alg); + +int crypto_engine_register_skcipher(struct skcipher_engine_alg *alg); +void crypto_engine_unregister_skcipher(struct skcipher_engine_alg *alg); +int crypto_engine_register_skciphers(struct skcipher_engine_alg *algs, + int count); +void crypto_engine_unregister_skciphers(struct skcipher_engine_alg *algs, + int count); + #endif /* _CRYPTO_ENGINE_H */ From 07e34cd39282af37160c978abf18308d5bb287e3 Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Sun, 13 Aug 2023 14:54:51 +0800 Subject: [PATCH 518/656] crypto: sun8i-ce - Use new crypto_engine_op interface Use the new crypto_engine_op interface where the callback is stored in the algorithm object. Signed-off-by: Herbert Xu --- .../allwinner/sun8i-ce/sun8i-ce-cipher.c | 25 +-- .../crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 171 +++++++++++------- .../crypto/allwinner/sun8i-ce/sun8i-ce-hash.c | 98 +++++----- drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h | 13 +- 4 files changed, 181 insertions(+), 126 deletions(-) diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c index 573a08fa7afa..8d4c42863a62 100644 --- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c +++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c @@ -29,7 +29,7 @@ static int sun8i_ce_cipher_need_fallback(struct skcipher_request *areq) struct sun8i_ce_alg_template *algt; unsigned int todo, len; - algt = container_of(alg, struct sun8i_ce_alg_template, alg.skcipher); + algt = container_of(alg, struct sun8i_ce_alg_template, alg.skcipher.base); if (sg_nents_for_len(areq->src, areq->cryptlen) > MAX_SG || sg_nents_for_len(areq->dst, areq->cryptlen) > MAX_SG) { @@ -92,13 +92,18 @@ static int sun8i_ce_cipher_fallback(struct skcipher_request *areq) struct sun8i_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm); struct sun8i_cipher_req_ctx *rctx = skcipher_request_ctx(areq); int err; -#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG - struct skcipher_alg *alg = crypto_skcipher_alg(tfm); - struct sun8i_ce_alg_template *algt; - algt = container_of(alg, struct sun8i_ce_alg_template, alg.skcipher); - algt->stat_fb++; + if (IS_ENABLED(CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG)) { + struct skcipher_alg *alg = crypto_skcipher_alg(tfm); + struct sun8i_ce_alg_template *algt __maybe_unused; + + algt = container_of(alg, struct sun8i_ce_alg_template, + alg.skcipher.base); + +#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG + algt->stat_fb++; #endif + } skcipher_request_set_tfm(&rctx->fallback_req, op->fallback_tfm); skcipher_request_set_callback(&rctx->fallback_req, areq->base.flags, @@ -133,7 +138,7 @@ static int sun8i_ce_cipher_prepare(struct crypto_engine *engine, void *async_req int ns = sg_nents_for_len(areq->src, areq->cryptlen); int nd = sg_nents_for_len(areq->dst, areq->cryptlen); - algt = container_of(alg, struct sun8i_ce_alg_template, alg.skcipher); + algt = container_of(alg, struct sun8i_ce_alg_template, alg.skcipher.base); dev_dbg(ce->dev, "%s %s %u %x IV(%p %u) key=%u\n", __func__, crypto_tfm_alg_name(areq->base.tfm), @@ -355,7 +360,7 @@ static void sun8i_ce_cipher_unprepare(struct crypto_engine *engine, dma_unmap_single(ce->dev, rctx->addr_key, op->keylen, DMA_TO_DEVICE); } -static int sun8i_ce_cipher_do_one(struct crypto_engine *engine, void *areq) +int sun8i_ce_cipher_do_one(struct crypto_engine *engine, void *areq) { int err = sun8i_ce_cipher_prepare(engine, areq); @@ -416,7 +421,7 @@ int sun8i_ce_cipher_init(struct crypto_tfm *tfm) memset(op, 0, sizeof(struct sun8i_cipher_tfm_ctx)); - algt = container_of(alg, struct sun8i_ce_alg_template, alg.skcipher); + algt = container_of(alg, struct sun8i_ce_alg_template, alg.skcipher.base); op->ce = algt->ce; op->fallback_tfm = crypto_alloc_skcipher(name, 0, CRYPTO_ALG_NEED_FALLBACK); @@ -433,8 +438,6 @@ int sun8i_ce_cipher_init(struct crypto_tfm *tfm) crypto_tfm_alg_driver_name(crypto_skcipher_tfm(op->fallback_tfm)), CRYPTO_MAX_ALG_NAME); - op->enginectx.op.do_one_request = sun8i_ce_cipher_do_one; - err = pm_runtime_get_sync(op->ce->dev); if (err < 0) goto error_pm; diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c index 07ea0cc82b16..1c2c32d0568e 100644 --- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c +++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c @@ -9,21 +9,25 @@ * * You could find a link for the datasheet in Documentation/arch/arm/sunxi.rst */ + +#include +#include +#include +#include #include -#include #include #include +#include #include #include #include +#include #include #include #include #include #include #include -#include -#include #include "sun8i-ce.h" @@ -277,7 +281,7 @@ static struct sun8i_ce_alg_template ce_algs[] = { .type = CRYPTO_ALG_TYPE_SKCIPHER, .ce_algo_id = CE_ID_CIPHER_AES, .ce_blockmode = CE_ID_OP_CBC, - .alg.skcipher = { + .alg.skcipher.base = { .base = { .cra_name = "cbc(aes)", .cra_driver_name = "cbc-aes-sun8i-ce", @@ -298,13 +302,16 @@ static struct sun8i_ce_alg_template ce_algs[] = { .setkey = sun8i_ce_aes_setkey, .encrypt = sun8i_ce_skencrypt, .decrypt = sun8i_ce_skdecrypt, - } + }, + .alg.skcipher.op = { + .do_one_request = sun8i_ce_cipher_do_one, + }, }, { .type = CRYPTO_ALG_TYPE_SKCIPHER, .ce_algo_id = CE_ID_CIPHER_AES, .ce_blockmode = CE_ID_OP_ECB, - .alg.skcipher = { + .alg.skcipher.base = { .base = { .cra_name = "ecb(aes)", .cra_driver_name = "ecb-aes-sun8i-ce", @@ -324,13 +331,16 @@ static struct sun8i_ce_alg_template ce_algs[] = { .setkey = sun8i_ce_aes_setkey, .encrypt = sun8i_ce_skencrypt, .decrypt = sun8i_ce_skdecrypt, - } + }, + .alg.skcipher.op = { + .do_one_request = sun8i_ce_cipher_do_one, + }, }, { .type = CRYPTO_ALG_TYPE_SKCIPHER, .ce_algo_id = CE_ID_CIPHER_DES3, .ce_blockmode = CE_ID_OP_CBC, - .alg.skcipher = { + .alg.skcipher.base = { .base = { .cra_name = "cbc(des3_ede)", .cra_driver_name = "cbc-des3-sun8i-ce", @@ -351,13 +361,16 @@ static struct sun8i_ce_alg_template ce_algs[] = { .setkey = sun8i_ce_des3_setkey, .encrypt = sun8i_ce_skencrypt, .decrypt = sun8i_ce_skdecrypt, - } + }, + .alg.skcipher.op = { + .do_one_request = sun8i_ce_cipher_do_one, + }, }, { .type = CRYPTO_ALG_TYPE_SKCIPHER, .ce_algo_id = CE_ID_CIPHER_DES3, .ce_blockmode = CE_ID_OP_ECB, - .alg.skcipher = { + .alg.skcipher.base = { .base = { .cra_name = "ecb(des3_ede)", .cra_driver_name = "ecb-des3-sun8i-ce", @@ -377,12 +390,15 @@ static struct sun8i_ce_alg_template ce_algs[] = { .setkey = sun8i_ce_des3_setkey, .encrypt = sun8i_ce_skencrypt, .decrypt = sun8i_ce_skdecrypt, - } + }, + .alg.skcipher.op = { + .do_one_request = sun8i_ce_cipher_do_one, + }, }, #ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_HASH { .type = CRYPTO_ALG_TYPE_AHASH, .ce_algo_id = CE_ID_HASH_MD5, - .alg.hash = { + .alg.hash.base = { .init = sun8i_ce_hash_init, .update = sun8i_ce_hash_update, .final = sun8i_ce_hash_final, @@ -390,6 +406,8 @@ static struct sun8i_ce_alg_template ce_algs[] = { .digest = sun8i_ce_hash_digest, .export = sun8i_ce_hash_export, .import = sun8i_ce_hash_import, + .init_tfm = sun8i_ce_hash_init_tfm, + .exit_tfm = sun8i_ce_hash_exit_tfm, .halg = { .digestsize = MD5_DIGEST_SIZE, .statesize = sizeof(struct md5_state), @@ -404,15 +422,17 @@ static struct sun8i_ce_alg_template ce_algs[] = { .cra_blocksize = MD5_HMAC_BLOCK_SIZE, .cra_ctxsize = sizeof(struct sun8i_ce_hash_tfm_ctx), .cra_module = THIS_MODULE, - .cra_init = sun8i_ce_hash_crainit, - .cra_exit = sun8i_ce_hash_craexit, } } - } + }, + .alg.hash.op = { + .do_one_request = sun8i_ce_hash_run, + }, + }, { .type = CRYPTO_ALG_TYPE_AHASH, .ce_algo_id = CE_ID_HASH_SHA1, - .alg.hash = { + .alg.hash.base = { .init = sun8i_ce_hash_init, .update = sun8i_ce_hash_update, .final = sun8i_ce_hash_final, @@ -420,6 +440,8 @@ static struct sun8i_ce_alg_template ce_algs[] = { .digest = sun8i_ce_hash_digest, .export = sun8i_ce_hash_export, .import = sun8i_ce_hash_import, + .init_tfm = sun8i_ce_hash_init_tfm, + .exit_tfm = sun8i_ce_hash_exit_tfm, .halg = { .digestsize = SHA1_DIGEST_SIZE, .statesize = sizeof(struct sha1_state), @@ -434,15 +456,16 @@ static struct sun8i_ce_alg_template ce_algs[] = { .cra_blocksize = SHA1_BLOCK_SIZE, .cra_ctxsize = sizeof(struct sun8i_ce_hash_tfm_ctx), .cra_module = THIS_MODULE, - .cra_init = sun8i_ce_hash_crainit, - .cra_exit = sun8i_ce_hash_craexit, } } - } + }, + .alg.hash.op = { + .do_one_request = sun8i_ce_hash_run, + }, }, { .type = CRYPTO_ALG_TYPE_AHASH, .ce_algo_id = CE_ID_HASH_SHA224, - .alg.hash = { + .alg.hash.base = { .init = sun8i_ce_hash_init, .update = sun8i_ce_hash_update, .final = sun8i_ce_hash_final, @@ -450,6 +473,8 @@ static struct sun8i_ce_alg_template ce_algs[] = { .digest = sun8i_ce_hash_digest, .export = sun8i_ce_hash_export, .import = sun8i_ce_hash_import, + .init_tfm = sun8i_ce_hash_init_tfm, + .exit_tfm = sun8i_ce_hash_exit_tfm, .halg = { .digestsize = SHA224_DIGEST_SIZE, .statesize = sizeof(struct sha256_state), @@ -464,15 +489,16 @@ static struct sun8i_ce_alg_template ce_algs[] = { .cra_blocksize = SHA224_BLOCK_SIZE, .cra_ctxsize = sizeof(struct sun8i_ce_hash_tfm_ctx), .cra_module = THIS_MODULE, - .cra_init = sun8i_ce_hash_crainit, - .cra_exit = sun8i_ce_hash_craexit, } } - } + }, + .alg.hash.op = { + .do_one_request = sun8i_ce_hash_run, + }, }, { .type = CRYPTO_ALG_TYPE_AHASH, .ce_algo_id = CE_ID_HASH_SHA256, - .alg.hash = { + .alg.hash.base = { .init = sun8i_ce_hash_init, .update = sun8i_ce_hash_update, .final = sun8i_ce_hash_final, @@ -480,6 +506,8 @@ static struct sun8i_ce_alg_template ce_algs[] = { .digest = sun8i_ce_hash_digest, .export = sun8i_ce_hash_export, .import = sun8i_ce_hash_import, + .init_tfm = sun8i_ce_hash_init_tfm, + .exit_tfm = sun8i_ce_hash_exit_tfm, .halg = { .digestsize = SHA256_DIGEST_SIZE, .statesize = sizeof(struct sha256_state), @@ -494,15 +522,16 @@ static struct sun8i_ce_alg_template ce_algs[] = { .cra_blocksize = SHA256_BLOCK_SIZE, .cra_ctxsize = sizeof(struct sun8i_ce_hash_tfm_ctx), .cra_module = THIS_MODULE, - .cra_init = sun8i_ce_hash_crainit, - .cra_exit = sun8i_ce_hash_craexit, } } - } + }, + .alg.hash.op = { + .do_one_request = sun8i_ce_hash_run, + }, }, { .type = CRYPTO_ALG_TYPE_AHASH, .ce_algo_id = CE_ID_HASH_SHA384, - .alg.hash = { + .alg.hash.base = { .init = sun8i_ce_hash_init, .update = sun8i_ce_hash_update, .final = sun8i_ce_hash_final, @@ -510,6 +539,8 @@ static struct sun8i_ce_alg_template ce_algs[] = { .digest = sun8i_ce_hash_digest, .export = sun8i_ce_hash_export, .import = sun8i_ce_hash_import, + .init_tfm = sun8i_ce_hash_init_tfm, + .exit_tfm = sun8i_ce_hash_exit_tfm, .halg = { .digestsize = SHA384_DIGEST_SIZE, .statesize = sizeof(struct sha512_state), @@ -524,15 +555,16 @@ static struct sun8i_ce_alg_template ce_algs[] = { .cra_blocksize = SHA384_BLOCK_SIZE, .cra_ctxsize = sizeof(struct sun8i_ce_hash_tfm_ctx), .cra_module = THIS_MODULE, - .cra_init = sun8i_ce_hash_crainit, - .cra_exit = sun8i_ce_hash_craexit, } } - } + }, + .alg.hash.op = { + .do_one_request = sun8i_ce_hash_run, + }, }, { .type = CRYPTO_ALG_TYPE_AHASH, .ce_algo_id = CE_ID_HASH_SHA512, - .alg.hash = { + .alg.hash.base = { .init = sun8i_ce_hash_init, .update = sun8i_ce_hash_update, .final = sun8i_ce_hash_final, @@ -540,6 +572,8 @@ static struct sun8i_ce_alg_template ce_algs[] = { .digest = sun8i_ce_hash_digest, .export = sun8i_ce_hash_export, .import = sun8i_ce_hash_import, + .init_tfm = sun8i_ce_hash_init_tfm, + .exit_tfm = sun8i_ce_hash_exit_tfm, .halg = { .digestsize = SHA512_DIGEST_SIZE, .statesize = sizeof(struct sha512_state), @@ -554,11 +588,12 @@ static struct sun8i_ce_alg_template ce_algs[] = { .cra_blocksize = SHA512_BLOCK_SIZE, .cra_ctxsize = sizeof(struct sun8i_ce_hash_tfm_ctx), .cra_module = THIS_MODULE, - .cra_init = sun8i_ce_hash_crainit, - .cra_exit = sun8i_ce_hash_craexit, } } - } + }, + .alg.hash.op = { + .do_one_request = sun8i_ce_hash_run, + }, }, #endif #ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_PRNG @@ -582,14 +617,18 @@ static struct sun8i_ce_alg_template ce_algs[] = { #endif }; -#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG static int sun8i_ce_debugfs_show(struct seq_file *seq, void *v) { - struct sun8i_ce_dev *ce = seq->private; + struct sun8i_ce_dev *ce __maybe_unused = seq->private; unsigned int i; for (i = 0; i < MAXFLOW; i++) - seq_printf(seq, "Channel %d: nreq %lu\n", i, ce->chanlist[i].stat_req); + seq_printf(seq, "Channel %d: nreq %lu\n", i, +#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG + ce->chanlist[i].stat_req); +#else + 0ul); +#endif for (i = 0; i < ARRAY_SIZE(ce_algs); i++) { if (!ce_algs[i].ce) @@ -597,8 +636,8 @@ static int sun8i_ce_debugfs_show(struct seq_file *seq, void *v) switch (ce_algs[i].type) { case CRYPTO_ALG_TYPE_SKCIPHER: seq_printf(seq, "%s %s reqs=%lu fallback=%lu\n", - ce_algs[i].alg.skcipher.base.cra_driver_name, - ce_algs[i].alg.skcipher.base.cra_name, + ce_algs[i].alg.skcipher.base.base.cra_driver_name, + ce_algs[i].alg.skcipher.base.base.cra_name, ce_algs[i].stat_req, ce_algs[i].stat_fb); seq_printf(seq, "\tLast fallback is: %s\n", ce_algs[i].fbname); @@ -621,8 +660,8 @@ static int sun8i_ce_debugfs_show(struct seq_file *seq, void *v) break; case CRYPTO_ALG_TYPE_AHASH: seq_printf(seq, "%s %s reqs=%lu fallback=%lu\n", - ce_algs[i].alg.hash.halg.base.cra_driver_name, - ce_algs[i].alg.hash.halg.base.cra_name, + ce_algs[i].alg.hash.base.halg.base.cra_driver_name, + ce_algs[i].alg.hash.base.halg.base.cra_name, ce_algs[i].stat_req, ce_algs[i].stat_fb); seq_printf(seq, "\tLast fallback is: %s\n", ce_algs[i].fbname); @@ -643,7 +682,8 @@ static int sun8i_ce_debugfs_show(struct seq_file *seq, void *v) break; } } -#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_TRNG +#if defined(CONFIG_CRYPTO_DEV_SUN8I_CE_TRNG) && \ + defined(CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG) seq_printf(seq, "HWRNG %lu %lu\n", ce->hwrng_stat_req, ce->hwrng_stat_bytes); #endif @@ -651,7 +691,6 @@ static int sun8i_ce_debugfs_show(struct seq_file *seq, void *v) } DEFINE_SHOW_ATTRIBUTE(sun8i_ce_debugfs); -#endif static void sun8i_ce_free_chanlist(struct sun8i_ce_dev *ce, int i) { @@ -839,7 +878,7 @@ static int sun8i_ce_register_algs(struct sun8i_ce_dev *ce) if (ce_method == CE_ID_NOTSUPP) { dev_dbg(ce->dev, "DEBUG: Algo of %s not supported\n", - ce_algs[i].alg.skcipher.base.cra_name); + ce_algs[i].alg.skcipher.base.base.cra_name); ce_algs[i].ce = NULL; break; } @@ -847,16 +886,16 @@ static int sun8i_ce_register_algs(struct sun8i_ce_dev *ce) ce_method = ce->variant->op_mode[id]; if (ce_method == CE_ID_NOTSUPP) { dev_dbg(ce->dev, "DEBUG: Blockmode of %s not supported\n", - ce_algs[i].alg.skcipher.base.cra_name); + ce_algs[i].alg.skcipher.base.base.cra_name); ce_algs[i].ce = NULL; break; } dev_info(ce->dev, "Register %s\n", - ce_algs[i].alg.skcipher.base.cra_name); - err = crypto_register_skcipher(&ce_algs[i].alg.skcipher); + ce_algs[i].alg.skcipher.base.base.cra_name); + err = crypto_engine_register_skcipher(&ce_algs[i].alg.skcipher); if (err) { dev_err(ce->dev, "ERROR: Fail to register %s\n", - ce_algs[i].alg.skcipher.base.cra_name); + ce_algs[i].alg.skcipher.base.base.cra_name); ce_algs[i].ce = NULL; return err; } @@ -867,16 +906,16 @@ static int sun8i_ce_register_algs(struct sun8i_ce_dev *ce) if (ce_method == CE_ID_NOTSUPP) { dev_info(ce->dev, "DEBUG: Algo of %s not supported\n", - ce_algs[i].alg.hash.halg.base.cra_name); + ce_algs[i].alg.hash.base.halg.base.cra_name); ce_algs[i].ce = NULL; break; } dev_info(ce->dev, "Register %s\n", - ce_algs[i].alg.hash.halg.base.cra_name); - err = crypto_register_ahash(&ce_algs[i].alg.hash); + ce_algs[i].alg.hash.base.halg.base.cra_name); + err = crypto_engine_register_ahash(&ce_algs[i].alg.hash); if (err) { dev_err(ce->dev, "ERROR: Fail to register %s\n", - ce_algs[i].alg.hash.halg.base.cra_name); + ce_algs[i].alg.hash.base.halg.base.cra_name); ce_algs[i].ce = NULL; return err; } @@ -916,13 +955,13 @@ static void sun8i_ce_unregister_algs(struct sun8i_ce_dev *ce) switch (ce_algs[i].type) { case CRYPTO_ALG_TYPE_SKCIPHER: dev_info(ce->dev, "Unregister %d %s\n", i, - ce_algs[i].alg.skcipher.base.cra_name); - crypto_unregister_skcipher(&ce_algs[i].alg.skcipher); + ce_algs[i].alg.skcipher.base.base.cra_name); + crypto_engine_unregister_skcipher(&ce_algs[i].alg.skcipher); break; case CRYPTO_ALG_TYPE_AHASH: dev_info(ce->dev, "Unregister %d %s\n", i, - ce_algs[i].alg.hash.halg.base.cra_name); - crypto_unregister_ahash(&ce_algs[i].alg.hash); + ce_algs[i].alg.hash.base.halg.base.cra_name); + crypto_engine_unregister_ahash(&ce_algs[i].alg.hash); break; case CRYPTO_ALG_TYPE_RNG: dev_info(ce->dev, "Unregister %d %s\n", i, @@ -1007,13 +1046,21 @@ static int sun8i_ce_probe(struct platform_device *pdev) pm_runtime_put_sync(ce->dev); + if (IS_ENABLED(CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG)) { + struct dentry *dbgfs_dir __maybe_unused; + struct dentry *dbgfs_stats __maybe_unused; + + /* Ignore error of debugfs */ + dbgfs_dir = debugfs_create_dir("sun8i-ce", NULL); + dbgfs_stats = debugfs_create_file("stats", 0444, + dbgfs_dir, ce, + &sun8i_ce_debugfs_fops); + #ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG - /* Ignore error of debugfs */ - ce->dbgfs_dir = debugfs_create_dir("sun8i-ce", NULL); - ce->dbgfs_stats = debugfs_create_file("stats", 0444, - ce->dbgfs_dir, ce, - &sun8i_ce_debugfs_fops); + ce->dbgfs_dir = dbgfs_dir; + ce->dbgfs_stats = dbgfs_stats; #endif + } return 0; error_alg: diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-hash.c b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-hash.c index 04d7d890de58..d358334e5981 100644 --- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-hash.c +++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-hash.c @@ -9,46 +9,46 @@ * * You could find the datasheet in Documentation/arch/arm/sunxi.rst */ -#include -#include -#include -#include + #include +#include #include #include -#include +#include +#include +#include +#include +#include +#include +#include #include "sun8i-ce.h" -int sun8i_ce_hash_crainit(struct crypto_tfm *tfm) +int sun8i_ce_hash_init_tfm(struct crypto_ahash *tfm) { - struct sun8i_ce_hash_tfm_ctx *op = crypto_tfm_ctx(tfm); - struct ahash_alg *alg = __crypto_ahash_alg(tfm->__crt_alg); + struct sun8i_ce_hash_tfm_ctx *op = crypto_ahash_ctx(tfm); + struct ahash_alg *alg = crypto_ahash_alg(tfm); struct sun8i_ce_alg_template *algt; int err; - memset(op, 0, sizeof(struct sun8i_ce_hash_tfm_ctx)); - - algt = container_of(alg, struct sun8i_ce_alg_template, alg.hash); + algt = container_of(alg, struct sun8i_ce_alg_template, alg.hash.base); op->ce = algt->ce; - op->enginectx.op.do_one_request = sun8i_ce_hash_run; - /* FALLBACK */ - op->fallback_tfm = crypto_alloc_ahash(crypto_tfm_alg_name(tfm), 0, + op->fallback_tfm = crypto_alloc_ahash(crypto_ahash_alg_name(tfm), 0, CRYPTO_ALG_NEED_FALLBACK); if (IS_ERR(op->fallback_tfm)) { dev_err(algt->ce->dev, "Fallback driver could no be loaded\n"); return PTR_ERR(op->fallback_tfm); } - if (algt->alg.hash.halg.statesize < crypto_ahash_statesize(op->fallback_tfm)) - algt->alg.hash.halg.statesize = crypto_ahash_statesize(op->fallback_tfm); + crypto_ahash_set_statesize(tfm, + crypto_ahash_statesize(op->fallback_tfm)); - crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm), + crypto_ahash_set_reqsize(tfm, sizeof(struct sun8i_ce_hash_reqctx) + crypto_ahash_reqsize(op->fallback_tfm)); - memcpy(algt->fbname, crypto_tfm_alg_driver_name(&op->fallback_tfm->base), + memcpy(algt->fbname, crypto_ahash_driver_name(op->fallback_tfm), CRYPTO_MAX_ALG_NAME); err = pm_runtime_get_sync(op->ce->dev); @@ -61,9 +61,9 @@ error_pm: return err; } -void sun8i_ce_hash_craexit(struct crypto_tfm *tfm) +void sun8i_ce_hash_exit_tfm(struct crypto_ahash *tfm) { - struct sun8i_ce_hash_tfm_ctx *tfmctx = crypto_tfm_ctx(tfm); + struct sun8i_ce_hash_tfm_ctx *tfmctx = crypto_ahash_ctx(tfm); crypto_free_ahash(tfmctx->fallback_tfm); pm_runtime_put_sync_suspend(tfmctx->ce->dev); @@ -112,20 +112,22 @@ int sun8i_ce_hash_final(struct ahash_request *areq) struct sun8i_ce_hash_reqctx *rctx = ahash_request_ctx(areq); struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq); struct sun8i_ce_hash_tfm_ctx *tfmctx = crypto_ahash_ctx(tfm); -#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG - struct ahash_alg *alg = __crypto_ahash_alg(tfm->base.__crt_alg); - struct sun8i_ce_alg_template *algt; -#endif ahash_request_set_tfm(&rctx->fallback_req, tfmctx->fallback_tfm); rctx->fallback_req.base.flags = areq->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP; rctx->fallback_req.result = areq->result; + if (IS_ENABLED(CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG)) { + struct sun8i_ce_alg_template *algt __maybe_unused; + struct ahash_alg *alg = crypto_ahash_alg(tfm); + + algt = container_of(alg, struct sun8i_ce_alg_template, + alg.hash.base); #ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG - algt = container_of(alg, struct sun8i_ce_alg_template, alg.hash); - algt->stat_fb++; + algt->stat_fb++; #endif + } return crypto_ahash_final(&rctx->fallback_req); } @@ -150,10 +152,6 @@ int sun8i_ce_hash_finup(struct ahash_request *areq) struct sun8i_ce_hash_reqctx *rctx = ahash_request_ctx(areq); struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq); struct sun8i_ce_hash_tfm_ctx *tfmctx = crypto_ahash_ctx(tfm); -#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG - struct ahash_alg *alg = __crypto_ahash_alg(tfm->base.__crt_alg); - struct sun8i_ce_alg_template *algt; -#endif ahash_request_set_tfm(&rctx->fallback_req, tfmctx->fallback_tfm); rctx->fallback_req.base.flags = areq->base.flags & @@ -162,10 +160,17 @@ int sun8i_ce_hash_finup(struct ahash_request *areq) rctx->fallback_req.nbytes = areq->nbytes; rctx->fallback_req.src = areq->src; rctx->fallback_req.result = areq->result; + + if (IS_ENABLED(CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG)) { + struct sun8i_ce_alg_template *algt __maybe_unused; + struct ahash_alg *alg = crypto_ahash_alg(tfm); + + algt = container_of(alg, struct sun8i_ce_alg_template, + alg.hash.base); #ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG - algt = container_of(alg, struct sun8i_ce_alg_template, alg.hash); - algt->stat_fb++; + algt->stat_fb++; #endif + } return crypto_ahash_finup(&rctx->fallback_req); } @@ -175,10 +180,6 @@ static int sun8i_ce_hash_digest_fb(struct ahash_request *areq) struct sun8i_ce_hash_reqctx *rctx = ahash_request_ctx(areq); struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq); struct sun8i_ce_hash_tfm_ctx *tfmctx = crypto_ahash_ctx(tfm); -#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG - struct ahash_alg *alg = __crypto_ahash_alg(tfm->base.__crt_alg); - struct sun8i_ce_alg_template *algt; -#endif ahash_request_set_tfm(&rctx->fallback_req, tfmctx->fallback_tfm); rctx->fallback_req.base.flags = areq->base.flags & @@ -187,10 +188,17 @@ static int sun8i_ce_hash_digest_fb(struct ahash_request *areq) rctx->fallback_req.nbytes = areq->nbytes; rctx->fallback_req.src = areq->src; rctx->fallback_req.result = areq->result; + + if (IS_ENABLED(CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG)) { + struct sun8i_ce_alg_template *algt __maybe_unused; + struct ahash_alg *alg = crypto_ahash_alg(tfm); + + algt = container_of(alg, struct sun8i_ce_alg_template, + alg.hash.base); #ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG - algt = container_of(alg, struct sun8i_ce_alg_template, alg.hash); - algt->stat_fb++; + algt->stat_fb++; #endif + } return crypto_ahash_digest(&rctx->fallback_req); } @@ -202,7 +210,7 @@ static bool sun8i_ce_hash_need_fallback(struct ahash_request *areq) struct sun8i_ce_alg_template *algt; struct scatterlist *sg; - algt = container_of(alg, struct sun8i_ce_alg_template, alg.hash); + algt = container_of(alg, struct sun8i_ce_alg_template, alg.hash.base); if (areq->nbytes == 0) { algt->stat_fb_len0++; @@ -251,7 +259,7 @@ int sun8i_ce_hash_digest(struct ahash_request *areq) return sun8i_ce_hash_digest_fb(areq); } - algt = container_of(alg, struct sun8i_ce_alg_template, alg.hash); + algt = container_of(alg, struct sun8i_ce_alg_template, alg.hash.base); ce = algt->ce; e = sun8i_ce_get_engine_number(ce); @@ -343,11 +351,11 @@ int sun8i_ce_hash_run(struct crypto_engine *engine, void *breq) dma_addr_t addr_res, addr_pad; int ns = sg_nents_for_len(areq->src, areq->nbytes); - algt = container_of(alg, struct sun8i_ce_alg_template, alg.hash); + algt = container_of(alg, struct sun8i_ce_alg_template, alg.hash.base); ce = algt->ce; - bs = algt->alg.hash.halg.base.cra_blocksize; - digestsize = algt->alg.hash.halg.digestsize; + bs = algt->alg.hash.base.halg.base.cra_blocksize; + digestsize = algt->alg.hash.base.halg.digestsize; if (digestsize == SHA224_DIGEST_SIZE) digestsize = SHA256_DIGEST_SIZE; if (digestsize == SHA384_DIGEST_SIZE) @@ -452,14 +460,14 @@ int sun8i_ce_hash_run(struct crypto_engine *engine, void *breq) chan->timeout = areq->nbytes; - err = sun8i_ce_run_task(ce, flow, crypto_tfm_alg_name(areq->base.tfm)); + err = sun8i_ce_run_task(ce, flow, crypto_ahash_alg_name(tfm)); dma_unmap_single(ce->dev, addr_pad, j * 4, DMA_TO_DEVICE); dma_unmap_sg(ce->dev, areq->src, ns, DMA_TO_DEVICE); dma_unmap_single(ce->dev, addr_res, digestsize, DMA_FROM_DEVICE); - memcpy(areq->result, result, algt->alg.hash.halg.digestsize); + memcpy(areq->result, result, algt->alg.hash.base.halg.digestsize); theend: kfree(buf); kfree(result); diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h index 4742b48ef52e..93d4985def87 100644 --- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h +++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h @@ -265,14 +265,12 @@ struct sun8i_cipher_req_ctx { /* * struct sun8i_cipher_tfm_ctx - context for a skcipher TFM - * @enginectx: crypto_engine used by this TFM * @key: pointer to key data * @keylen: len of the key * @ce: pointer to the private data of driver handling this TFM * @fallback_tfm: pointer to the fallback TFM */ struct sun8i_cipher_tfm_ctx { - struct crypto_engine_ctx enginectx; u32 *key; u32 keylen; struct sun8i_ce_dev *ce; @@ -281,12 +279,10 @@ struct sun8i_cipher_tfm_ctx { /* * struct sun8i_ce_hash_tfm_ctx - context for an ahash TFM - * @enginectx: crypto_engine used by this TFM * @ce: pointer to the private data of driver handling this TFM * @fallback_tfm: pointer to the fallback TFM */ struct sun8i_ce_hash_tfm_ctx { - struct crypto_engine_ctx enginectx; struct sun8i_ce_dev *ce; struct crypto_ahash *fallback_tfm; }; @@ -329,8 +325,8 @@ struct sun8i_ce_alg_template { u32 ce_blockmode; struct sun8i_ce_dev *ce; union { - struct skcipher_alg skcipher; - struct ahash_alg hash; + struct skcipher_engine_alg skcipher; + struct ahash_engine_alg hash; struct rng_alg rng; } alg; unsigned long stat_req; @@ -353,6 +349,7 @@ int sun8i_ce_des3_setkey(struct crypto_skcipher *tfm, const u8 *key, unsigned int keylen); int sun8i_ce_cipher_init(struct crypto_tfm *tfm); void sun8i_ce_cipher_exit(struct crypto_tfm *tfm); +int sun8i_ce_cipher_do_one(struct crypto_engine *engine, void *areq); int sun8i_ce_skdecrypt(struct skcipher_request *areq); int sun8i_ce_skencrypt(struct skcipher_request *areq); @@ -360,8 +357,8 @@ int sun8i_ce_get_engine_number(struct sun8i_ce_dev *ce); int sun8i_ce_run_task(struct sun8i_ce_dev *ce, int flow, const char *name); -int sun8i_ce_hash_crainit(struct crypto_tfm *tfm); -void sun8i_ce_hash_craexit(struct crypto_tfm *tfm); +int sun8i_ce_hash_init_tfm(struct crypto_ahash *tfm); +void sun8i_ce_hash_exit_tfm(struct crypto_ahash *tfm); int sun8i_ce_hash_init(struct ahash_request *areq); int sun8i_ce_hash_export(struct ahash_request *areq, void *out); int sun8i_ce_hash_import(struct ahash_request *areq, const void *in); From 4c19e8fb5e9ce0b2b535274150605c78a4617bf9 Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Sun, 13 Aug 2023 14:54:53 +0800 Subject: [PATCH 519/656] crypto: sun8i-ss - Use new crypto_engine_op interface Use the new crypto_engine_op interface where the callback is stored in the algorithm object. Signed-off-by: Herbert Xu --- .../allwinner/sun8i-ss/sun8i-ss-cipher.c | 25 +-- .../crypto/allwinner/sun8i-ss/sun8i-ss-core.c | 154 +++++++++++------- .../crypto/allwinner/sun8i-ss/sun8i-ss-hash.c | 112 +++++++------ drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h | 17 +- 4 files changed, 177 insertions(+), 131 deletions(-) diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-cipher.c b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-cipher.c index 2758dadf74eb..7fa359725ec7 100644 --- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-cipher.c +++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-cipher.c @@ -24,7 +24,7 @@ static bool sun8i_ss_need_fallback(struct skcipher_request *areq) { struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq); struct skcipher_alg *alg = crypto_skcipher_alg(tfm); - struct sun8i_ss_alg_template *algt = container_of(alg, struct sun8i_ss_alg_template, alg.skcipher); + struct sun8i_ss_alg_template *algt = container_of(alg, struct sun8i_ss_alg_template, alg.skcipher.base); struct scatterlist *in_sg = areq->src; struct scatterlist *out_sg = areq->dst; struct scatterlist *sg; @@ -93,13 +93,18 @@ static int sun8i_ss_cipher_fallback(struct skcipher_request *areq) struct sun8i_cipher_req_ctx *rctx = skcipher_request_ctx(areq); int err; -#ifdef CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG - struct skcipher_alg *alg = crypto_skcipher_alg(tfm); - struct sun8i_ss_alg_template *algt; + if (IS_ENABLED(CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG)) { + struct skcipher_alg *alg = crypto_skcipher_alg(tfm); + struct sun8i_ss_alg_template *algt __maybe_unused; - algt = container_of(alg, struct sun8i_ss_alg_template, alg.skcipher); - algt->stat_fb++; + algt = container_of(alg, struct sun8i_ss_alg_template, + alg.skcipher.base); + +#ifdef CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG + algt->stat_fb++; #endif + } + skcipher_request_set_tfm(&rctx->fallback_req, op->fallback_tfm); skcipher_request_set_callback(&rctx->fallback_req, areq->base.flags, areq->base.complete, areq->base.data); @@ -193,7 +198,7 @@ static int sun8i_ss_cipher(struct skcipher_request *areq) int nsgd = sg_nents_for_len(areq->dst, areq->cryptlen); int i; - algt = container_of(alg, struct sun8i_ss_alg_template, alg.skcipher); + algt = container_of(alg, struct sun8i_ss_alg_template, alg.skcipher.base); dev_dbg(ss->dev, "%s %s %u %x IV(%p %u) key=%u\n", __func__, crypto_tfm_alg_name(areq->base.tfm), @@ -324,7 +329,7 @@ theend: return err; } -static int sun8i_ss_handle_cipher_request(struct crypto_engine *engine, void *areq) +int sun8i_ss_handle_cipher_request(struct crypto_engine *engine, void *areq) { int err; struct skcipher_request *breq = container_of(areq, struct skcipher_request, base); @@ -390,7 +395,7 @@ int sun8i_ss_cipher_init(struct crypto_tfm *tfm) memset(op, 0, sizeof(struct sun8i_cipher_tfm_ctx)); - algt = container_of(alg, struct sun8i_ss_alg_template, alg.skcipher); + algt = container_of(alg, struct sun8i_ss_alg_template, alg.skcipher.base); op->ss = algt->ss; op->fallback_tfm = crypto_alloc_skcipher(name, 0, CRYPTO_ALG_NEED_FALLBACK); @@ -408,8 +413,6 @@ int sun8i_ss_cipher_init(struct crypto_tfm *tfm) crypto_tfm_alg_driver_name(crypto_skcipher_tfm(op->fallback_tfm)), CRYPTO_MAX_ALG_NAME); - op->enginectx.op.do_one_request = sun8i_ss_handle_cipher_request; - err = pm_runtime_resume_and_get(op->ss->dev); if (err < 0) { dev_err(op->ss->dev, "pm error %d\n", err); diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c index 3dd844b40ff7..62c001c9efc2 100644 --- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c +++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c @@ -9,10 +9,14 @@ * * You could find a link for the datasheet in Documentation/arch/arm/sunxi.rst */ + +#include +#include +#include #include -#include #include #include +#include #include #include #include @@ -23,8 +27,6 @@ #include #include #include -#include -#include #include "sun8i-ss.h" @@ -168,7 +170,7 @@ static struct sun8i_ss_alg_template ss_algs[] = { .type = CRYPTO_ALG_TYPE_SKCIPHER, .ss_algo_id = SS_ID_CIPHER_AES, .ss_blockmode = SS_ID_OP_CBC, - .alg.skcipher = { + .alg.skcipher.base = { .base = { .cra_name = "cbc(aes)", .cra_driver_name = "cbc-aes-sun8i-ss", @@ -189,13 +191,16 @@ static struct sun8i_ss_alg_template ss_algs[] = { .setkey = sun8i_ss_aes_setkey, .encrypt = sun8i_ss_skencrypt, .decrypt = sun8i_ss_skdecrypt, - } + }, + .alg.skcipher.op = { + .do_one_request = sun8i_ss_handle_cipher_request, + }, }, { .type = CRYPTO_ALG_TYPE_SKCIPHER, .ss_algo_id = SS_ID_CIPHER_AES, .ss_blockmode = SS_ID_OP_ECB, - .alg.skcipher = { + .alg.skcipher.base = { .base = { .cra_name = "ecb(aes)", .cra_driver_name = "ecb-aes-sun8i-ss", @@ -215,13 +220,16 @@ static struct sun8i_ss_alg_template ss_algs[] = { .setkey = sun8i_ss_aes_setkey, .encrypt = sun8i_ss_skencrypt, .decrypt = sun8i_ss_skdecrypt, - } + }, + .alg.skcipher.op = { + .do_one_request = sun8i_ss_handle_cipher_request, + }, }, { .type = CRYPTO_ALG_TYPE_SKCIPHER, .ss_algo_id = SS_ID_CIPHER_DES3, .ss_blockmode = SS_ID_OP_CBC, - .alg.skcipher = { + .alg.skcipher.base = { .base = { .cra_name = "cbc(des3_ede)", .cra_driver_name = "cbc-des3-sun8i-ss", @@ -242,13 +250,16 @@ static struct sun8i_ss_alg_template ss_algs[] = { .setkey = sun8i_ss_des3_setkey, .encrypt = sun8i_ss_skencrypt, .decrypt = sun8i_ss_skdecrypt, - } + }, + .alg.skcipher.op = { + .do_one_request = sun8i_ss_handle_cipher_request, + }, }, { .type = CRYPTO_ALG_TYPE_SKCIPHER, .ss_algo_id = SS_ID_CIPHER_DES3, .ss_blockmode = SS_ID_OP_ECB, - .alg.skcipher = { + .alg.skcipher.base = { .base = { .cra_name = "ecb(des3_ede)", .cra_driver_name = "ecb-des3-sun8i-ss", @@ -268,7 +279,10 @@ static struct sun8i_ss_alg_template ss_algs[] = { .setkey = sun8i_ss_des3_setkey, .encrypt = sun8i_ss_skencrypt, .decrypt = sun8i_ss_skdecrypt, - } + }, + .alg.skcipher.op = { + .do_one_request = sun8i_ss_handle_cipher_request, + }, }, #ifdef CONFIG_CRYPTO_DEV_SUN8I_SS_PRNG { @@ -292,7 +306,7 @@ static struct sun8i_ss_alg_template ss_algs[] = { #ifdef CONFIG_CRYPTO_DEV_SUN8I_SS_HASH { .type = CRYPTO_ALG_TYPE_AHASH, .ss_algo_id = SS_ID_HASH_MD5, - .alg.hash = { + .alg.hash.base = { .init = sun8i_ss_hash_init, .update = sun8i_ss_hash_update, .final = sun8i_ss_hash_final, @@ -300,6 +314,8 @@ static struct sun8i_ss_alg_template ss_algs[] = { .digest = sun8i_ss_hash_digest, .export = sun8i_ss_hash_export, .import = sun8i_ss_hash_import, + .init_tfm = sun8i_ss_hash_init_tfm, + .exit_tfm = sun8i_ss_hash_exit_tfm, .halg = { .digestsize = MD5_DIGEST_SIZE, .statesize = sizeof(struct md5_state), @@ -314,15 +330,16 @@ static struct sun8i_ss_alg_template ss_algs[] = { .cra_blocksize = MD5_HMAC_BLOCK_SIZE, .cra_ctxsize = sizeof(struct sun8i_ss_hash_tfm_ctx), .cra_module = THIS_MODULE, - .cra_init = sun8i_ss_hash_crainit, - .cra_exit = sun8i_ss_hash_craexit, } } - } + }, + .alg.hash.op = { + .do_one_request = sun8i_ss_hash_run, + }, }, { .type = CRYPTO_ALG_TYPE_AHASH, .ss_algo_id = SS_ID_HASH_SHA1, - .alg.hash = { + .alg.hash.base = { .init = sun8i_ss_hash_init, .update = sun8i_ss_hash_update, .final = sun8i_ss_hash_final, @@ -330,6 +347,8 @@ static struct sun8i_ss_alg_template ss_algs[] = { .digest = sun8i_ss_hash_digest, .export = sun8i_ss_hash_export, .import = sun8i_ss_hash_import, + .init_tfm = sun8i_ss_hash_init_tfm, + .exit_tfm = sun8i_ss_hash_exit_tfm, .halg = { .digestsize = SHA1_DIGEST_SIZE, .statesize = sizeof(struct sha1_state), @@ -344,15 +363,16 @@ static struct sun8i_ss_alg_template ss_algs[] = { .cra_blocksize = SHA1_BLOCK_SIZE, .cra_ctxsize = sizeof(struct sun8i_ss_hash_tfm_ctx), .cra_module = THIS_MODULE, - .cra_init = sun8i_ss_hash_crainit, - .cra_exit = sun8i_ss_hash_craexit, } } - } + }, + .alg.hash.op = { + .do_one_request = sun8i_ss_hash_run, + }, }, { .type = CRYPTO_ALG_TYPE_AHASH, .ss_algo_id = SS_ID_HASH_SHA224, - .alg.hash = { + .alg.hash.base = { .init = sun8i_ss_hash_init, .update = sun8i_ss_hash_update, .final = sun8i_ss_hash_final, @@ -360,6 +380,8 @@ static struct sun8i_ss_alg_template ss_algs[] = { .digest = sun8i_ss_hash_digest, .export = sun8i_ss_hash_export, .import = sun8i_ss_hash_import, + .init_tfm = sun8i_ss_hash_init_tfm, + .exit_tfm = sun8i_ss_hash_exit_tfm, .halg = { .digestsize = SHA224_DIGEST_SIZE, .statesize = sizeof(struct sha256_state), @@ -374,15 +396,16 @@ static struct sun8i_ss_alg_template ss_algs[] = { .cra_blocksize = SHA224_BLOCK_SIZE, .cra_ctxsize = sizeof(struct sun8i_ss_hash_tfm_ctx), .cra_module = THIS_MODULE, - .cra_init = sun8i_ss_hash_crainit, - .cra_exit = sun8i_ss_hash_craexit, } } - } + }, + .alg.hash.op = { + .do_one_request = sun8i_ss_hash_run, + }, }, { .type = CRYPTO_ALG_TYPE_AHASH, .ss_algo_id = SS_ID_HASH_SHA256, - .alg.hash = { + .alg.hash.base = { .init = sun8i_ss_hash_init, .update = sun8i_ss_hash_update, .final = sun8i_ss_hash_final, @@ -390,6 +413,8 @@ static struct sun8i_ss_alg_template ss_algs[] = { .digest = sun8i_ss_hash_digest, .export = sun8i_ss_hash_export, .import = sun8i_ss_hash_import, + .init_tfm = sun8i_ss_hash_init_tfm, + .exit_tfm = sun8i_ss_hash_exit_tfm, .halg = { .digestsize = SHA256_DIGEST_SIZE, .statesize = sizeof(struct sha256_state), @@ -404,15 +429,16 @@ static struct sun8i_ss_alg_template ss_algs[] = { .cra_blocksize = SHA256_BLOCK_SIZE, .cra_ctxsize = sizeof(struct sun8i_ss_hash_tfm_ctx), .cra_module = THIS_MODULE, - .cra_init = sun8i_ss_hash_crainit, - .cra_exit = sun8i_ss_hash_craexit, } } - } + }, + .alg.hash.op = { + .do_one_request = sun8i_ss_hash_run, + }, }, { .type = CRYPTO_ALG_TYPE_AHASH, .ss_algo_id = SS_ID_HASH_SHA1, - .alg.hash = { + .alg.hash.base = { .init = sun8i_ss_hash_init, .update = sun8i_ss_hash_update, .final = sun8i_ss_hash_final, @@ -420,6 +446,8 @@ static struct sun8i_ss_alg_template ss_algs[] = { .digest = sun8i_ss_hash_digest, .export = sun8i_ss_hash_export, .import = sun8i_ss_hash_import, + .init_tfm = sun8i_ss_hash_init_tfm, + .exit_tfm = sun8i_ss_hash_exit_tfm, .setkey = sun8i_ss_hmac_setkey, .halg = { .digestsize = SHA1_DIGEST_SIZE, @@ -435,23 +463,28 @@ static struct sun8i_ss_alg_template ss_algs[] = { .cra_blocksize = SHA1_BLOCK_SIZE, .cra_ctxsize = sizeof(struct sun8i_ss_hash_tfm_ctx), .cra_module = THIS_MODULE, - .cra_init = sun8i_ss_hash_crainit, - .cra_exit = sun8i_ss_hash_craexit, } } - } + }, + .alg.hash.op = { + .do_one_request = sun8i_ss_hash_run, + }, }, #endif }; -#ifdef CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG static int sun8i_ss_debugfs_show(struct seq_file *seq, void *v) { - struct sun8i_ss_dev *ss = seq->private; + struct sun8i_ss_dev *ss __maybe_unused = seq->private; unsigned int i; for (i = 0; i < MAXFLOW; i++) - seq_printf(seq, "Channel %d: nreq %lu\n", i, ss->flows[i].stat_req); + seq_printf(seq, "Channel %d: nreq %lu\n", i, +#ifdef CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG + ss->flows[i].stat_req); +#else + 0ul); +#endif for (i = 0; i < ARRAY_SIZE(ss_algs); i++) { if (!ss_algs[i].ss) @@ -459,8 +492,8 @@ static int sun8i_ss_debugfs_show(struct seq_file *seq, void *v) switch (ss_algs[i].type) { case CRYPTO_ALG_TYPE_SKCIPHER: seq_printf(seq, "%s %s reqs=%lu fallback=%lu\n", - ss_algs[i].alg.skcipher.base.cra_driver_name, - ss_algs[i].alg.skcipher.base.cra_name, + ss_algs[i].alg.skcipher.base.base.cra_driver_name, + ss_algs[i].alg.skcipher.base.base.cra_name, ss_algs[i].stat_req, ss_algs[i].stat_fb); seq_printf(seq, "\tLast fallback is: %s\n", @@ -482,8 +515,8 @@ static int sun8i_ss_debugfs_show(struct seq_file *seq, void *v) break; case CRYPTO_ALG_TYPE_AHASH: seq_printf(seq, "%s %s reqs=%lu fallback=%lu\n", - ss_algs[i].alg.hash.halg.base.cra_driver_name, - ss_algs[i].alg.hash.halg.base.cra_name, + ss_algs[i].alg.hash.base.halg.base.cra_driver_name, + ss_algs[i].alg.hash.base.halg.base.cra_name, ss_algs[i].stat_req, ss_algs[i].stat_fb); seq_printf(seq, "\tLast fallback is: %s\n", ss_algs[i].fbname); @@ -502,7 +535,6 @@ static int sun8i_ss_debugfs_show(struct seq_file *seq, void *v) } DEFINE_SHOW_ATTRIBUTE(sun8i_ss_debugfs); -#endif static void sun8i_ss_free_flows(struct sun8i_ss_dev *ss, int i) { @@ -659,7 +691,7 @@ static int sun8i_ss_register_algs(struct sun8i_ss_dev *ss) if (ss_method == SS_ID_NOTSUPP) { dev_info(ss->dev, "DEBUG: Algo of %s not supported\n", - ss_algs[i].alg.skcipher.base.cra_name); + ss_algs[i].alg.skcipher.base.base.cra_name); ss_algs[i].ss = NULL; break; } @@ -667,16 +699,16 @@ static int sun8i_ss_register_algs(struct sun8i_ss_dev *ss) ss_method = ss->variant->op_mode[id]; if (ss_method == SS_ID_NOTSUPP) { dev_info(ss->dev, "DEBUG: Blockmode of %s not supported\n", - ss_algs[i].alg.skcipher.base.cra_name); + ss_algs[i].alg.skcipher.base.base.cra_name); ss_algs[i].ss = NULL; break; } dev_info(ss->dev, "DEBUG: Register %s\n", - ss_algs[i].alg.skcipher.base.cra_name); - err = crypto_register_skcipher(&ss_algs[i].alg.skcipher); + ss_algs[i].alg.skcipher.base.base.cra_name); + err = crypto_engine_register_skcipher(&ss_algs[i].alg.skcipher); if (err) { dev_err(ss->dev, "Fail to register %s\n", - ss_algs[i].alg.skcipher.base.cra_name); + ss_algs[i].alg.skcipher.base.base.cra_name); ss_algs[i].ss = NULL; return err; } @@ -695,16 +727,16 @@ static int sun8i_ss_register_algs(struct sun8i_ss_dev *ss) if (ss_method == SS_ID_NOTSUPP) { dev_info(ss->dev, "DEBUG: Algo of %s not supported\n", - ss_algs[i].alg.hash.halg.base.cra_name); + ss_algs[i].alg.hash.base.halg.base.cra_name); ss_algs[i].ss = NULL; break; } dev_info(ss->dev, "Register %s\n", - ss_algs[i].alg.hash.halg.base.cra_name); - err = crypto_register_ahash(&ss_algs[i].alg.hash); + ss_algs[i].alg.hash.base.halg.base.cra_name); + err = crypto_engine_register_ahash(&ss_algs[i].alg.hash); if (err) { dev_err(ss->dev, "ERROR: Fail to register %s\n", - ss_algs[i].alg.hash.halg.base.cra_name); + ss_algs[i].alg.hash.base.halg.base.cra_name); ss_algs[i].ss = NULL; return err; } @@ -727,8 +759,8 @@ static void sun8i_ss_unregister_algs(struct sun8i_ss_dev *ss) switch (ss_algs[i].type) { case CRYPTO_ALG_TYPE_SKCIPHER: dev_info(ss->dev, "Unregister %d %s\n", i, - ss_algs[i].alg.skcipher.base.cra_name); - crypto_unregister_skcipher(&ss_algs[i].alg.skcipher); + ss_algs[i].alg.skcipher.base.base.cra_name); + crypto_engine_unregister_skcipher(&ss_algs[i].alg.skcipher); break; case CRYPTO_ALG_TYPE_RNG: dev_info(ss->dev, "Unregister %d %s\n", i, @@ -737,8 +769,8 @@ static void sun8i_ss_unregister_algs(struct sun8i_ss_dev *ss) break; case CRYPTO_ALG_TYPE_AHASH: dev_info(ss->dev, "Unregister %d %s\n", i, - ss_algs[i].alg.hash.halg.base.cra_name); - crypto_unregister_ahash(&ss_algs[i].alg.hash); + ss_algs[i].alg.hash.base.halg.base.cra_name); + crypto_engine_unregister_ahash(&ss_algs[i].alg.hash); break; } } @@ -851,13 +883,21 @@ static int sun8i_ss_probe(struct platform_device *pdev) pm_runtime_put_sync(ss->dev); + if (IS_ENABLED(CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG)) { + struct dentry *dbgfs_dir __maybe_unused; + struct dentry *dbgfs_stats __maybe_unused; + + /* Ignore error of debugfs */ + dbgfs_dir = debugfs_create_dir("sun8i-ss", NULL); + dbgfs_stats = debugfs_create_file("stats", 0444, + dbgfs_dir, ss, + &sun8i_ss_debugfs_fops); + #ifdef CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG - /* Ignore error of debugfs */ - ss->dbgfs_dir = debugfs_create_dir("sun8i-ss", NULL); - ss->dbgfs_stats = debugfs_create_file("stats", 0444, - ss->dbgfs_dir, ss, - &sun8i_ss_debugfs_fops); + ss->dbgfs_dir = dbgfs_dir; + ss->dbgfs_stats = dbgfs_stats; #endif + } return 0; error_alg: diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-hash.c b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-hash.c index e6865b49b1df..d70b105dcfa1 100644 --- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-hash.c +++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-hash.c @@ -9,16 +9,21 @@ * * You could find the datasheet in Documentation/arch/arm/sunxi.rst */ -#include -#include -#include -#include -#include + #include +#include +#include #include #include #include -#include +#include +#include +#include +#include +#include +#include +#include +#include #include "sun8i-ss.h" static int sun8i_ss_hashkey(struct sun8i_ss_hash_tfm_ctx *tfmctx, const u8 *key, @@ -60,14 +65,11 @@ int sun8i_ss_hmac_setkey(struct crypto_ahash *ahash, const u8 *key, unsigned int keylen) { struct sun8i_ss_hash_tfm_ctx *tfmctx = crypto_ahash_ctx(ahash); - struct ahash_alg *alg = __crypto_ahash_alg(ahash->base.__crt_alg); - struct sun8i_ss_alg_template *algt; int digestsize, i; int bs = crypto_ahash_blocksize(ahash); int ret; - algt = container_of(alg, struct sun8i_ss_alg_template, alg.hash); - digestsize = algt->alg.hash.halg.digestsize; + digestsize = crypto_ahash_digestsize(ahash); if (keylen > bs) { ret = sun8i_ss_hashkey(tfmctx, key, keylen); @@ -107,36 +109,33 @@ err_opad: return ret; } -int sun8i_ss_hash_crainit(struct crypto_tfm *tfm) +int sun8i_ss_hash_init_tfm(struct crypto_ahash *tfm) { - struct sun8i_ss_hash_tfm_ctx *op = crypto_tfm_ctx(tfm); - struct ahash_alg *alg = __crypto_ahash_alg(tfm->__crt_alg); + struct sun8i_ss_hash_tfm_ctx *op = crypto_ahash_ctx(tfm); + struct ahash_alg *alg = crypto_ahash_alg(tfm); struct sun8i_ss_alg_template *algt; int err; - memset(op, 0, sizeof(struct sun8i_ss_hash_tfm_ctx)); - - algt = container_of(alg, struct sun8i_ss_alg_template, alg.hash); + algt = container_of(alg, struct sun8i_ss_alg_template, alg.hash.base); op->ss = algt->ss; - op->enginectx.op.do_one_request = sun8i_ss_hash_run; - /* FALLBACK */ - op->fallback_tfm = crypto_alloc_ahash(crypto_tfm_alg_name(tfm), 0, + op->fallback_tfm = crypto_alloc_ahash(crypto_ahash_alg_name(tfm), 0, CRYPTO_ALG_NEED_FALLBACK); if (IS_ERR(op->fallback_tfm)) { dev_err(algt->ss->dev, "Fallback driver could no be loaded\n"); return PTR_ERR(op->fallback_tfm); } - if (algt->alg.hash.halg.statesize < crypto_ahash_statesize(op->fallback_tfm)) - algt->alg.hash.halg.statesize = crypto_ahash_statesize(op->fallback_tfm); + crypto_ahash_set_statesize(tfm, + crypto_ahash_statesize(op->fallback_tfm)); - crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm), + crypto_ahash_set_reqsize(tfm, sizeof(struct sun8i_ss_hash_reqctx) + crypto_ahash_reqsize(op->fallback_tfm)); - memcpy(algt->fbname, crypto_tfm_alg_driver_name(&op->fallback_tfm->base), CRYPTO_MAX_ALG_NAME); + memcpy(algt->fbname, crypto_ahash_driver_name(op->fallback_tfm), + CRYPTO_MAX_ALG_NAME); err = pm_runtime_get_sync(op->ss->dev); if (err < 0) @@ -148,9 +147,9 @@ error_pm: return err; } -void sun8i_ss_hash_craexit(struct crypto_tfm *tfm) +void sun8i_ss_hash_exit_tfm(struct crypto_ahash *tfm) { - struct sun8i_ss_hash_tfm_ctx *tfmctx = crypto_tfm_ctx(tfm); + struct sun8i_ss_hash_tfm_ctx *tfmctx = crypto_ahash_ctx(tfm); kfree_sensitive(tfmctx->ipad); kfree_sensitive(tfmctx->opad); @@ -202,20 +201,23 @@ int sun8i_ss_hash_final(struct ahash_request *areq) struct sun8i_ss_hash_reqctx *rctx = ahash_request_ctx(areq); struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq); struct sun8i_ss_hash_tfm_ctx *tfmctx = crypto_ahash_ctx(tfm); -#ifdef CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG - struct ahash_alg *alg = __crypto_ahash_alg(tfm->base.__crt_alg); - struct sun8i_ss_alg_template *algt; -#endif ahash_request_set_tfm(&rctx->fallback_req, tfmctx->fallback_tfm); rctx->fallback_req.base.flags = areq->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP; rctx->fallback_req.result = areq->result; + if (IS_ENABLED(CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG)) { + struct ahash_alg *alg = crypto_ahash_alg(tfm); + struct sun8i_ss_alg_template *algt __maybe_unused; + + algt = container_of(alg, struct sun8i_ss_alg_template, + alg.hash.base); + #ifdef CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG - algt = container_of(alg, struct sun8i_ss_alg_template, alg.hash); - algt->stat_fb++; + algt->stat_fb++; #endif + } return crypto_ahash_final(&rctx->fallback_req); } @@ -240,10 +242,6 @@ int sun8i_ss_hash_finup(struct ahash_request *areq) struct sun8i_ss_hash_reqctx *rctx = ahash_request_ctx(areq); struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq); struct sun8i_ss_hash_tfm_ctx *tfmctx = crypto_ahash_ctx(tfm); -#ifdef CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG - struct ahash_alg *alg = __crypto_ahash_alg(tfm->base.__crt_alg); - struct sun8i_ss_alg_template *algt; -#endif ahash_request_set_tfm(&rctx->fallback_req, tfmctx->fallback_tfm); rctx->fallback_req.base.flags = areq->base.flags & @@ -252,10 +250,18 @@ int sun8i_ss_hash_finup(struct ahash_request *areq) rctx->fallback_req.nbytes = areq->nbytes; rctx->fallback_req.src = areq->src; rctx->fallback_req.result = areq->result; + + if (IS_ENABLED(CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG)) { + struct ahash_alg *alg = crypto_ahash_alg(tfm); + struct sun8i_ss_alg_template *algt __maybe_unused; + + algt = container_of(alg, struct sun8i_ss_alg_template, + alg.hash.base); + #ifdef CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG - algt = container_of(alg, struct sun8i_ss_alg_template, alg.hash); - algt->stat_fb++; + algt->stat_fb++; #endif + } return crypto_ahash_finup(&rctx->fallback_req); } @@ -265,10 +271,6 @@ static int sun8i_ss_hash_digest_fb(struct ahash_request *areq) struct sun8i_ss_hash_reqctx *rctx = ahash_request_ctx(areq); struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq); struct sun8i_ss_hash_tfm_ctx *tfmctx = crypto_ahash_ctx(tfm); -#ifdef CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG - struct ahash_alg *alg = __crypto_ahash_alg(tfm->base.__crt_alg); - struct sun8i_ss_alg_template *algt; -#endif ahash_request_set_tfm(&rctx->fallback_req, tfmctx->fallback_tfm); rctx->fallback_req.base.flags = areq->base.flags & @@ -277,10 +279,18 @@ static int sun8i_ss_hash_digest_fb(struct ahash_request *areq) rctx->fallback_req.nbytes = areq->nbytes; rctx->fallback_req.src = areq->src; rctx->fallback_req.result = areq->result; + + if (IS_ENABLED(CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG)) { + struct ahash_alg *alg = crypto_ahash_alg(tfm); + struct sun8i_ss_alg_template *algt __maybe_unused; + + algt = container_of(alg, struct sun8i_ss_alg_template, + alg.hash.base); + #ifdef CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG - algt = container_of(alg, struct sun8i_ss_alg_template, alg.hash); - algt->stat_fb++; + algt->stat_fb++; #endif + } return crypto_ahash_digest(&rctx->fallback_req); } @@ -347,11 +357,11 @@ static int sun8i_ss_run_hash_task(struct sun8i_ss_dev *ss, static bool sun8i_ss_hash_need_fallback(struct ahash_request *areq) { struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq); - struct ahash_alg *alg = __crypto_ahash_alg(tfm->base.__crt_alg); + struct ahash_alg *alg = crypto_ahash_alg(tfm); struct sun8i_ss_alg_template *algt; struct scatterlist *sg; - algt = container_of(alg, struct sun8i_ss_alg_template, alg.hash); + algt = container_of(alg, struct sun8i_ss_alg_template, alg.hash.base); if (areq->nbytes == 0) { algt->stat_fb_len++; @@ -396,8 +406,8 @@ static bool sun8i_ss_hash_need_fallback(struct ahash_request *areq) int sun8i_ss_hash_digest(struct ahash_request *areq) { struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq); - struct ahash_alg *alg = __crypto_ahash_alg(tfm->base.__crt_alg); struct sun8i_ss_hash_reqctx *rctx = ahash_request_ctx(areq); + struct ahash_alg *alg = crypto_ahash_alg(tfm); struct sun8i_ss_alg_template *algt; struct sun8i_ss_dev *ss; struct crypto_engine *engine; @@ -406,7 +416,7 @@ int sun8i_ss_hash_digest(struct ahash_request *areq) if (sun8i_ss_hash_need_fallback(areq)) return sun8i_ss_hash_digest_fb(areq); - algt = container_of(alg, struct sun8i_ss_alg_template, alg.hash); + algt = container_of(alg, struct sun8i_ss_alg_template, alg.hash.base); ss = algt->ss; e = sun8i_ss_get_engine_number(ss); @@ -482,8 +492,8 @@ int sun8i_ss_hash_run(struct crypto_engine *engine, void *breq) struct ahash_request *areq = container_of(breq, struct ahash_request, base); struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq); struct sun8i_ss_hash_tfm_ctx *tfmctx = crypto_ahash_ctx(tfm); - struct ahash_alg *alg = __crypto_ahash_alg(tfm->base.__crt_alg); struct sun8i_ss_hash_reqctx *rctx = ahash_request_ctx(areq); + struct ahash_alg *alg = crypto_ahash_alg(tfm); struct sun8i_ss_alg_template *algt; struct sun8i_ss_dev *ss; struct scatterlist *sg; @@ -502,10 +512,10 @@ int sun8i_ss_hash_run(struct crypto_engine *engine, void *breq) */ int hmac = 0; - algt = container_of(alg, struct sun8i_ss_alg_template, alg.hash); + algt = container_of(alg, struct sun8i_ss_alg_template, alg.hash.base); ss = algt->ss; - digestsize = algt->alg.hash.halg.digestsize; + digestsize = crypto_ahash_digestsize(tfm); if (digestsize == SHA224_DIGEST_SIZE) digestsize = SHA256_DIGEST_SIZE; @@ -698,7 +708,7 @@ err_dma_result: } if (!err) - memcpy(areq->result, result, algt->alg.hash.halg.digestsize); + memcpy(areq->result, result, crypto_ahash_digestsize(tfm)); theend: local_bh_disable(); crypto_finalize_hash_request(engine, breq, err); diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h index bfe305261e9a..ae66eb45fb24 100644 --- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h +++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h @@ -201,16 +201,12 @@ struct sun8i_cipher_req_ctx { /* * struct sun8i_cipher_tfm_ctx - context for a skcipher TFM - * @enginectx: crypto_engine used by this TFM * @key: pointer to key data * @keylen: len of the key * @ss: pointer to the private data of driver handling this TFM * @fallback_tfm: pointer to the fallback TFM - * - * enginectx must be the first element */ struct sun8i_cipher_tfm_ctx { - struct crypto_engine_ctx enginectx; u32 *key; u32 keylen; struct sun8i_ss_dev *ss; @@ -229,14 +225,10 @@ struct sun8i_ss_rng_tfm_ctx { /* * struct sun8i_ss_hash_tfm_ctx - context for an ahash TFM - * @enginectx: crypto_engine used by this TFM * @fallback_tfm: pointer to the fallback TFM * @ss: pointer to the private data of driver handling this TFM - * - * enginectx must be the first element */ struct sun8i_ss_hash_tfm_ctx { - struct crypto_engine_ctx enginectx; struct crypto_ahash *fallback_tfm; struct sun8i_ss_dev *ss; u8 *ipad; @@ -279,9 +271,9 @@ struct sun8i_ss_alg_template { u32 ss_blockmode; struct sun8i_ss_dev *ss; union { - struct skcipher_alg skcipher; + struct skcipher_engine_alg skcipher; struct rng_alg rng; - struct ahash_alg hash; + struct ahash_engine_alg hash; } alg; unsigned long stat_req; unsigned long stat_fb; @@ -299,6 +291,7 @@ int sun8i_ss_des3_setkey(struct crypto_skcipher *tfm, const u8 *key, unsigned int keylen); int sun8i_ss_cipher_init(struct crypto_tfm *tfm); void sun8i_ss_cipher_exit(struct crypto_tfm *tfm); +int sun8i_ss_handle_cipher_request(struct crypto_engine *engine, void *areq); int sun8i_ss_skdecrypt(struct skcipher_request *areq); int sun8i_ss_skencrypt(struct skcipher_request *areq); @@ -311,8 +304,8 @@ int sun8i_ss_prng_seed(struct crypto_rng *tfm, const u8 *seed, unsigned int slen int sun8i_ss_prng_init(struct crypto_tfm *tfm); void sun8i_ss_prng_exit(struct crypto_tfm *tfm); -int sun8i_ss_hash_crainit(struct crypto_tfm *tfm); -void sun8i_ss_hash_craexit(struct crypto_tfm *tfm); +int sun8i_ss_hash_init_tfm(struct crypto_ahash *tfm); +void sun8i_ss_hash_exit_tfm(struct crypto_ahash *tfm); int sun8i_ss_hash_init(struct ahash_request *areq); int sun8i_ss_hash_export(struct ahash_request *areq, void *out); int sun8i_ss_hash_import(struct ahash_request *areq, const void *in); From 4dd4d5e486ebdeb48dbc558237d4ba8aab8917d5 Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Sun, 13 Aug 2023 14:54:55 +0800 Subject: [PATCH 520/656] crypto: amlogic - Use new crypto_engine_op interface Use the new crypto_engine_op interface where the callback is stored in the algorithm object. Signed-off-by: Herbert Xu --- drivers/crypto/amlogic/amlogic-gxl-cipher.c | 11 ++-- drivers/crypto/amlogic/amlogic-gxl-core.c | 60 ++++++++++++++------- drivers/crypto/amlogic/amlogic-gxl.h | 5 +- 3 files changed, 47 insertions(+), 29 deletions(-) diff --git a/drivers/crypto/amlogic/amlogic-gxl-cipher.c b/drivers/crypto/amlogic/amlogic-gxl-cipher.c index 03b6586b71ef..3308406612fc 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-cipher.c +++ b/drivers/crypto/amlogic/amlogic-gxl-cipher.c @@ -65,7 +65,7 @@ static int meson_cipher_do_fallback(struct skcipher_request *areq) struct skcipher_alg *alg = crypto_skcipher_alg(tfm); struct meson_alg_template *algt; - algt = container_of(alg, struct meson_alg_template, alg.skcipher); + algt = container_of(alg, struct meson_alg_template, alg.skcipher.base); algt->stat_fb++; #endif skcipher_request_set_tfm(&rctx->fallback_req, op->fallback_tfm); @@ -101,7 +101,7 @@ static int meson_cipher(struct skcipher_request *areq) void *backup_iv = NULL, *bkeyiv; u32 v; - algt = container_of(alg, struct meson_alg_template, alg.skcipher); + algt = container_of(alg, struct meson_alg_template, alg.skcipher.base); dev_dbg(mc->dev, "%s %s %u %x IV(%u) key=%u flow=%d\n", __func__, crypto_tfm_alg_name(areq->base.tfm), @@ -258,8 +258,7 @@ theend: return err; } -static int meson_handle_cipher_request(struct crypto_engine *engine, - void *areq) +int meson_handle_cipher_request(struct crypto_engine *engine, void *areq) { int err; struct skcipher_request *breq = container_of(areq, struct skcipher_request, base); @@ -318,7 +317,7 @@ int meson_cipher_init(struct crypto_tfm *tfm) memset(op, 0, sizeof(struct meson_cipher_tfm_ctx)); - algt = container_of(alg, struct meson_alg_template, alg.skcipher); + algt = container_of(alg, struct meson_alg_template, alg.skcipher.base); op->mc = algt->mc; op->fallback_tfm = crypto_alloc_skcipher(name, 0, CRYPTO_ALG_NEED_FALLBACK); @@ -331,8 +330,6 @@ int meson_cipher_init(struct crypto_tfm *tfm) sktfm->reqsize = sizeof(struct meson_cipher_req_ctx) + crypto_skcipher_reqsize(op->fallback_tfm); - op->enginectx.op.do_one_request = meson_handle_cipher_request; - return 0; } diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c index 937187027ad5..9846d791c956 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-core.c +++ b/drivers/crypto/amlogic/amlogic-gxl-core.c @@ -6,17 +6,20 @@ * * Core file which registers crypto algorithms supported by the hardware. */ + +#include +#include #include -#include -#include +#include +#include #include +#include #include +#include #include #include #include #include -#include -#include #include "amlogic-gxl.h" @@ -47,7 +50,7 @@ static struct meson_alg_template mc_algs[] = { { .type = CRYPTO_ALG_TYPE_SKCIPHER, .blockmode = MESON_OPMODE_CBC, - .alg.skcipher = { + .alg.skcipher.base = { .base = { .cra_name = "cbc(aes)", .cra_driver_name = "cbc-aes-gxl", @@ -68,12 +71,15 @@ static struct meson_alg_template mc_algs[] = { .setkey = meson_aes_setkey, .encrypt = meson_skencrypt, .decrypt = meson_skdecrypt, - } + }, + .alg.skcipher.op = { + .do_one_request = meson_handle_cipher_request, + }, }, { .type = CRYPTO_ALG_TYPE_SKCIPHER, .blockmode = MESON_OPMODE_ECB, - .alg.skcipher = { + .alg.skcipher.base = { .base = { .cra_name = "ecb(aes)", .cra_driver_name = "ecb-aes-gxl", @@ -93,33 +99,43 @@ static struct meson_alg_template mc_algs[] = { .setkey = meson_aes_setkey, .encrypt = meson_skencrypt, .decrypt = meson_skdecrypt, - } + }, + .alg.skcipher.op = { + .do_one_request = meson_handle_cipher_request, + }, }, }; -#ifdef CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG static int meson_debugfs_show(struct seq_file *seq, void *v) { - struct meson_dev *mc = seq->private; + struct meson_dev *mc __maybe_unused = seq->private; int i; for (i = 0; i < MAXFLOW; i++) - seq_printf(seq, "Channel %d: nreq %lu\n", i, mc->chanlist[i].stat_req); + seq_printf(seq, "Channel %d: nreq %lu\n", i, +#ifdef CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG + mc->chanlist[i].stat_req); +#else + 0ul); +#endif for (i = 0; i < ARRAY_SIZE(mc_algs); i++) { switch (mc_algs[i].type) { case CRYPTO_ALG_TYPE_SKCIPHER: seq_printf(seq, "%s %s %lu %lu\n", - mc_algs[i].alg.skcipher.base.cra_driver_name, - mc_algs[i].alg.skcipher.base.cra_name, + mc_algs[i].alg.skcipher.base.base.cra_driver_name, + mc_algs[i].alg.skcipher.base.base.cra_name, +#ifdef CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG mc_algs[i].stat_req, mc_algs[i].stat_fb); +#else + 0ul, 0ul); +#endif break; } } return 0; } DEFINE_SHOW_ATTRIBUTE(meson_debugfs); -#endif static void meson_free_chanlist(struct meson_dev *mc, int i) { @@ -183,10 +199,10 @@ static int meson_register_algs(struct meson_dev *mc) mc_algs[i].mc = mc; switch (mc_algs[i].type) { case CRYPTO_ALG_TYPE_SKCIPHER: - err = crypto_register_skcipher(&mc_algs[i].alg.skcipher); + err = crypto_engine_register_skcipher(&mc_algs[i].alg.skcipher); if (err) { dev_err(mc->dev, "Fail to register %s\n", - mc_algs[i].alg.skcipher.base.cra_name); + mc_algs[i].alg.skcipher.base.base.cra_name); mc_algs[i].mc = NULL; return err; } @@ -206,7 +222,7 @@ static void meson_unregister_algs(struct meson_dev *mc) continue; switch (mc_algs[i].type) { case CRYPTO_ALG_TYPE_SKCIPHER: - crypto_unregister_skcipher(&mc_algs[i].alg.skcipher); + crypto_engine_unregister_skcipher(&mc_algs[i].alg.skcipher); break; } } @@ -264,10 +280,16 @@ static int meson_crypto_probe(struct platform_device *pdev) if (err) goto error_alg; + if (IS_ENABLED(CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG)) { + struct dentry *dbgfs_dir; + + dbgfs_dir = debugfs_create_dir("gxl-crypto", NULL); + debugfs_create_file("stats", 0444, dbgfs_dir, mc, &meson_debugfs_fops); + #ifdef CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG - mc->dbgfs_dir = debugfs_create_dir("gxl-crypto", NULL); - debugfs_create_file("stats", 0444, mc->dbgfs_dir, mc, &meson_debugfs_fops); + mc->dbgfs_dir = dbgfs_dir; #endif + } return 0; error_alg: diff --git a/drivers/crypto/amlogic/amlogic-gxl.h b/drivers/crypto/amlogic/amlogic-gxl.h index 8c0746a1d6d4..1013a666c932 100644 --- a/drivers/crypto/amlogic/amlogic-gxl.h +++ b/drivers/crypto/amlogic/amlogic-gxl.h @@ -114,7 +114,6 @@ struct meson_cipher_req_ctx { /* * struct meson_cipher_tfm_ctx - context for a skcipher TFM - * @enginectx: crypto_engine used by this TFM * @key: pointer to key data * @keylen: len of the key * @keymode: The keymode(type and size of key) associated with this TFM @@ -122,7 +121,6 @@ struct meson_cipher_req_ctx { * @fallback_tfm: pointer to the fallback TFM */ struct meson_cipher_tfm_ctx { - struct crypto_engine_ctx enginectx; u32 *key; u32 keylen; u32 keymode; @@ -143,7 +141,7 @@ struct meson_alg_template { u32 type; u32 blockmode; union { - struct skcipher_alg skcipher; + struct skcipher_engine_alg skcipher; } alg; struct meson_dev *mc; #ifdef CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG @@ -160,3 +158,4 @@ int meson_cipher_init(struct crypto_tfm *tfm); void meson_cipher_exit(struct crypto_tfm *tfm); int meson_skdecrypt(struct skcipher_request *areq); int meson_skencrypt(struct skcipher_request *areq); +int meson_handle_cipher_request(struct crypto_engine *engine, void *areq); From 304506f299b324f188b624dca2d4f29722746432 Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Sun, 13 Aug 2023 14:54:57 +0800 Subject: [PATCH 521/656] crypto: aspeed - Use new crypto_engine_op interface Use the new crypto_engine_op interface where the callback is stored in the algorithm object. Signed-off-by: Herbert Xu --- drivers/crypto/aspeed/aspeed-acry.c | 39 +++--- drivers/crypto/aspeed/aspeed-hace-crypto.c | 132 +++++++++++++++------ drivers/crypto/aspeed/aspeed-hace-hash.c | 97 +++++++++++---- drivers/crypto/aspeed/aspeed-hace.c | 9 +- drivers/crypto/aspeed/aspeed-hace.h | 30 ++--- 5 files changed, 202 insertions(+), 105 deletions(-) diff --git a/drivers/crypto/aspeed/aspeed-acry.c b/drivers/crypto/aspeed/aspeed-acry.c index 5ae529ce6806..2a970367e686 100644 --- a/drivers/crypto/aspeed/aspeed-acry.c +++ b/drivers/crypto/aspeed/aspeed-acry.c @@ -2,25 +2,26 @@ /* * Copyright 2021 Aspeed Technology Inc. */ -#include -#include #include #include #include #include #include -#include +#include +#include +#include +#include +#include +#include #include -#include -#include #include #include -#include -#include -#include -#include -#include +#include +#include +#include #include +#include +#include #ifdef CONFIG_CRYPTO_DEV_ASPEED_DEBUG #define ACRY_DBG(d, fmt, ...) \ @@ -112,7 +113,6 @@ struct aspeed_acry_dev { }; struct aspeed_acry_ctx { - struct crypto_engine_ctx enginectx; struct aspeed_acry_dev *acry_dev; struct rsa_key key; @@ -131,7 +131,7 @@ struct aspeed_acry_ctx { struct aspeed_acry_alg { struct aspeed_acry_dev *acry_dev; - struct akcipher_alg akcipher; + struct akcipher_engine_alg akcipher; }; enum aspeed_rsa_key_mode { @@ -577,7 +577,7 @@ static int aspeed_acry_rsa_init_tfm(struct crypto_akcipher *tfm) const char *name = crypto_tfm_alg_name(&tfm->base); struct aspeed_acry_alg *acry_alg; - acry_alg = container_of(alg, struct aspeed_acry_alg, akcipher); + acry_alg = container_of(alg, struct aspeed_acry_alg, akcipher.base); ctx->acry_dev = acry_alg->acry_dev; @@ -589,8 +589,6 @@ static int aspeed_acry_rsa_init_tfm(struct crypto_akcipher *tfm) return PTR_ERR(ctx->fallback_tfm); } - ctx->enginectx.op.do_one_request = aspeed_acry_do_request; - return 0; } @@ -603,7 +601,7 @@ static void aspeed_acry_rsa_exit_tfm(struct crypto_akcipher *tfm) static struct aspeed_acry_alg aspeed_acry_akcipher_algs[] = { { - .akcipher = { + .akcipher.base = { .encrypt = aspeed_acry_rsa_enc, .decrypt = aspeed_acry_rsa_dec, .sign = aspeed_acry_rsa_dec, @@ -625,6 +623,9 @@ static struct aspeed_acry_alg aspeed_acry_akcipher_algs[] = { .cra_ctxsize = sizeof(struct aspeed_acry_ctx), }, }, + .akcipher.op = { + .do_one_request = aspeed_acry_do_request, + }, }, }; @@ -634,10 +635,10 @@ static void aspeed_acry_register(struct aspeed_acry_dev *acry_dev) for (i = 0; i < ARRAY_SIZE(aspeed_acry_akcipher_algs); i++) { aspeed_acry_akcipher_algs[i].acry_dev = acry_dev; - rc = crypto_register_akcipher(&aspeed_acry_akcipher_algs[i].akcipher); + rc = crypto_engine_register_akcipher(&aspeed_acry_akcipher_algs[i].akcipher); if (rc) { ACRY_DBG(acry_dev, "Failed to register %s\n", - aspeed_acry_akcipher_algs[i].akcipher.base.cra_name); + aspeed_acry_akcipher_algs[i].akcipher.base.base.cra_name); } } } @@ -647,7 +648,7 @@ static void aspeed_acry_unregister(struct aspeed_acry_dev *acry_dev) int i; for (i = 0; i < ARRAY_SIZE(aspeed_acry_akcipher_algs); i++) - crypto_unregister_akcipher(&aspeed_acry_akcipher_algs[i].akcipher); + crypto_engine_unregister_akcipher(&aspeed_acry_akcipher_algs[i].akcipher); } /* ACRY interrupt service routine. */ diff --git a/drivers/crypto/aspeed/aspeed-hace-crypto.c b/drivers/crypto/aspeed/aspeed-hace-crypto.c index 8d6d9ecb3a28..f0eddb7854e5 100644 --- a/drivers/crypto/aspeed/aspeed-hace-crypto.c +++ b/drivers/crypto/aspeed/aspeed-hace-crypto.c @@ -4,6 +4,17 @@ */ #include "aspeed-hace.h" +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include #ifdef CONFIG_CRYPTO_DEV_ASPEED_HACE_CRYPTO_DEBUG #define CIPHER_DBG(h, fmt, ...) \ @@ -696,7 +707,7 @@ static int aspeed_crypto_cra_init(struct crypto_skcipher *tfm) struct aspeed_hace_alg *crypto_alg; - crypto_alg = container_of(alg, struct aspeed_hace_alg, alg.skcipher); + crypto_alg = container_of(alg, struct aspeed_hace_alg, alg.skcipher.base); ctx->hace_dev = crypto_alg->hace_dev; ctx->start = aspeed_hace_skcipher_trigger; @@ -713,8 +724,6 @@ static int aspeed_crypto_cra_init(struct crypto_skcipher *tfm) crypto_skcipher_set_reqsize(tfm, sizeof(struct aspeed_cipher_reqctx) + crypto_skcipher_reqsize(ctx->fallback_tfm)); - ctx->enginectx.op.do_one_request = aspeed_crypto_do_request; - return 0; } @@ -729,7 +738,7 @@ static void aspeed_crypto_cra_exit(struct crypto_skcipher *tfm) static struct aspeed_hace_alg aspeed_crypto_algs[] = { { - .alg.skcipher = { + .alg.skcipher.base = { .min_keysize = AES_MIN_KEY_SIZE, .max_keysize = AES_MAX_KEY_SIZE, .setkey = aspeed_aes_setkey, @@ -749,10 +758,13 @@ static struct aspeed_hace_alg aspeed_crypto_algs[] = { .cra_alignmask = 0x0f, .cra_module = THIS_MODULE, } - } + }, + .alg.skcipher.op = { + .do_one_request = aspeed_crypto_do_request, + }, }, { - .alg.skcipher = { + .alg.skcipher.base = { .ivsize = AES_BLOCK_SIZE, .min_keysize = AES_MIN_KEY_SIZE, .max_keysize = AES_MAX_KEY_SIZE, @@ -773,10 +785,13 @@ static struct aspeed_hace_alg aspeed_crypto_algs[] = { .cra_alignmask = 0x0f, .cra_module = THIS_MODULE, } - } + }, + .alg.skcipher.op = { + .do_one_request = aspeed_crypto_do_request, + }, }, { - .alg.skcipher = { + .alg.skcipher.base = { .ivsize = AES_BLOCK_SIZE, .min_keysize = AES_MIN_KEY_SIZE, .max_keysize = AES_MAX_KEY_SIZE, @@ -797,10 +812,13 @@ static struct aspeed_hace_alg aspeed_crypto_algs[] = { .cra_alignmask = 0x0f, .cra_module = THIS_MODULE, } - } + }, + .alg.skcipher.op = { + .do_one_request = aspeed_crypto_do_request, + }, }, { - .alg.skcipher = { + .alg.skcipher.base = { .ivsize = AES_BLOCK_SIZE, .min_keysize = AES_MIN_KEY_SIZE, .max_keysize = AES_MAX_KEY_SIZE, @@ -821,10 +839,13 @@ static struct aspeed_hace_alg aspeed_crypto_algs[] = { .cra_alignmask = 0x0f, .cra_module = THIS_MODULE, } - } + }, + .alg.skcipher.op = { + .do_one_request = aspeed_crypto_do_request, + }, }, { - .alg.skcipher = { + .alg.skcipher.base = { .min_keysize = DES_KEY_SIZE, .max_keysize = DES_KEY_SIZE, .setkey = aspeed_des_setkey, @@ -844,10 +865,13 @@ static struct aspeed_hace_alg aspeed_crypto_algs[] = { .cra_alignmask = 0x0f, .cra_module = THIS_MODULE, } - } + }, + .alg.skcipher.op = { + .do_one_request = aspeed_crypto_do_request, + }, }, { - .alg.skcipher = { + .alg.skcipher.base = { .ivsize = DES_BLOCK_SIZE, .min_keysize = DES_KEY_SIZE, .max_keysize = DES_KEY_SIZE, @@ -868,10 +892,13 @@ static struct aspeed_hace_alg aspeed_crypto_algs[] = { .cra_alignmask = 0x0f, .cra_module = THIS_MODULE, } - } + }, + .alg.skcipher.op = { + .do_one_request = aspeed_crypto_do_request, + }, }, { - .alg.skcipher = { + .alg.skcipher.base = { .ivsize = DES_BLOCK_SIZE, .min_keysize = DES_KEY_SIZE, .max_keysize = DES_KEY_SIZE, @@ -892,10 +919,13 @@ static struct aspeed_hace_alg aspeed_crypto_algs[] = { .cra_alignmask = 0x0f, .cra_module = THIS_MODULE, } - } + }, + .alg.skcipher.op = { + .do_one_request = aspeed_crypto_do_request, + }, }, { - .alg.skcipher = { + .alg.skcipher.base = { .ivsize = DES_BLOCK_SIZE, .min_keysize = DES_KEY_SIZE, .max_keysize = DES_KEY_SIZE, @@ -916,10 +946,13 @@ static struct aspeed_hace_alg aspeed_crypto_algs[] = { .cra_alignmask = 0x0f, .cra_module = THIS_MODULE, } - } + }, + .alg.skcipher.op = { + .do_one_request = aspeed_crypto_do_request, + }, }, { - .alg.skcipher = { + .alg.skcipher.base = { .min_keysize = DES3_EDE_KEY_SIZE, .max_keysize = DES3_EDE_KEY_SIZE, .setkey = aspeed_des_setkey, @@ -939,10 +972,13 @@ static struct aspeed_hace_alg aspeed_crypto_algs[] = { .cra_alignmask = 0x0f, .cra_module = THIS_MODULE, } - } + }, + .alg.skcipher.op = { + .do_one_request = aspeed_crypto_do_request, + }, }, { - .alg.skcipher = { + .alg.skcipher.base = { .ivsize = DES_BLOCK_SIZE, .min_keysize = DES3_EDE_KEY_SIZE, .max_keysize = DES3_EDE_KEY_SIZE, @@ -963,10 +999,13 @@ static struct aspeed_hace_alg aspeed_crypto_algs[] = { .cra_alignmask = 0x0f, .cra_module = THIS_MODULE, } - } + }, + .alg.skcipher.op = { + .do_one_request = aspeed_crypto_do_request, + }, }, { - .alg.skcipher = { + .alg.skcipher.base = { .ivsize = DES_BLOCK_SIZE, .min_keysize = DES3_EDE_KEY_SIZE, .max_keysize = DES3_EDE_KEY_SIZE, @@ -987,10 +1026,13 @@ static struct aspeed_hace_alg aspeed_crypto_algs[] = { .cra_alignmask = 0x0f, .cra_module = THIS_MODULE, } - } + }, + .alg.skcipher.op = { + .do_one_request = aspeed_crypto_do_request, + }, }, { - .alg.skcipher = { + .alg.skcipher.base = { .ivsize = DES_BLOCK_SIZE, .min_keysize = DES3_EDE_KEY_SIZE, .max_keysize = DES3_EDE_KEY_SIZE, @@ -1011,13 +1053,16 @@ static struct aspeed_hace_alg aspeed_crypto_algs[] = { .cra_alignmask = 0x0f, .cra_module = THIS_MODULE, } - } + }, + .alg.skcipher.op = { + .do_one_request = aspeed_crypto_do_request, + }, }, }; static struct aspeed_hace_alg aspeed_crypto_algs_g6[] = { { - .alg.skcipher = { + .alg.skcipher.base = { .ivsize = AES_BLOCK_SIZE, .min_keysize = AES_MIN_KEY_SIZE, .max_keysize = AES_MAX_KEY_SIZE, @@ -1037,10 +1082,13 @@ static struct aspeed_hace_alg aspeed_crypto_algs_g6[] = { .cra_alignmask = 0x0f, .cra_module = THIS_MODULE, } - } + }, + .alg.skcipher.op = { + .do_one_request = aspeed_crypto_do_request, + }, }, { - .alg.skcipher = { + .alg.skcipher.base = { .ivsize = DES_BLOCK_SIZE, .min_keysize = DES_KEY_SIZE, .max_keysize = DES_KEY_SIZE, @@ -1060,10 +1108,13 @@ static struct aspeed_hace_alg aspeed_crypto_algs_g6[] = { .cra_alignmask = 0x0f, .cra_module = THIS_MODULE, } - } + }, + .alg.skcipher.op = { + .do_one_request = aspeed_crypto_do_request, + }, }, { - .alg.skcipher = { + .alg.skcipher.base = { .ivsize = DES_BLOCK_SIZE, .min_keysize = DES3_EDE_KEY_SIZE, .max_keysize = DES3_EDE_KEY_SIZE, @@ -1083,7 +1134,10 @@ static struct aspeed_hace_alg aspeed_crypto_algs_g6[] = { .cra_alignmask = 0x0f, .cra_module = THIS_MODULE, } - } + }, + .alg.skcipher.op = { + .do_one_request = aspeed_crypto_do_request, + }, }, }; @@ -1093,13 +1147,13 @@ void aspeed_unregister_hace_crypto_algs(struct aspeed_hace_dev *hace_dev) int i; for (i = 0; i < ARRAY_SIZE(aspeed_crypto_algs); i++) - crypto_unregister_skcipher(&aspeed_crypto_algs[i].alg.skcipher); + crypto_engine_unregister_skcipher(&aspeed_crypto_algs[i].alg.skcipher); if (hace_dev->version != AST2600_VERSION) return; for (i = 0; i < ARRAY_SIZE(aspeed_crypto_algs_g6); i++) - crypto_unregister_skcipher(&aspeed_crypto_algs_g6[i].alg.skcipher); + crypto_engine_unregister_skcipher(&aspeed_crypto_algs_g6[i].alg.skcipher); } void aspeed_register_hace_crypto_algs(struct aspeed_hace_dev *hace_dev) @@ -1110,10 +1164,10 @@ void aspeed_register_hace_crypto_algs(struct aspeed_hace_dev *hace_dev) for (i = 0; i < ARRAY_SIZE(aspeed_crypto_algs); i++) { aspeed_crypto_algs[i].hace_dev = hace_dev; - rc = crypto_register_skcipher(&aspeed_crypto_algs[i].alg.skcipher); + rc = crypto_engine_register_skcipher(&aspeed_crypto_algs[i].alg.skcipher); if (rc) { CIPHER_DBG(hace_dev, "Failed to register %s\n", - aspeed_crypto_algs[i].alg.skcipher.base.cra_name); + aspeed_crypto_algs[i].alg.skcipher.base.base.cra_name); } } @@ -1122,10 +1176,10 @@ void aspeed_register_hace_crypto_algs(struct aspeed_hace_dev *hace_dev) for (i = 0; i < ARRAY_SIZE(aspeed_crypto_algs_g6); i++) { aspeed_crypto_algs_g6[i].hace_dev = hace_dev; - rc = crypto_register_skcipher(&aspeed_crypto_algs_g6[i].alg.skcipher); + rc = crypto_engine_register_skcipher(&aspeed_crypto_algs_g6[i].alg.skcipher); if (rc) { CIPHER_DBG(hace_dev, "Failed to register %s\n", - aspeed_crypto_algs_g6[i].alg.skcipher.base.cra_name); + aspeed_crypto_algs_g6[i].alg.skcipher.base.base.cra_name); } } } diff --git a/drivers/crypto/aspeed/aspeed-hace-hash.c b/drivers/crypto/aspeed/aspeed-hace-hash.c index f8c96568142e..abc459af2ac8 100644 --- a/drivers/crypto/aspeed/aspeed-hace-hash.c +++ b/drivers/crypto/aspeed/aspeed-hace-hash.c @@ -4,6 +4,17 @@ */ #include "aspeed-hace.h" +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include #ifdef CONFIG_CRYPTO_DEV_ASPEED_DEBUG #define AHASH_DBG(h, fmt, ...) \ @@ -858,7 +869,7 @@ static int aspeed_sham_cra_init(struct crypto_tfm *tfm) struct aspeed_sham_ctx *tctx = crypto_tfm_ctx(tfm); struct aspeed_hace_alg *ast_alg; - ast_alg = container_of(alg, struct aspeed_hace_alg, alg.ahash); + ast_alg = container_of(alg, struct aspeed_hace_alg, alg.ahash.base); tctx->hace_dev = ast_alg->hace_dev; tctx->flags = 0; @@ -880,8 +891,6 @@ static int aspeed_sham_cra_init(struct crypto_tfm *tfm) } } - tctx->enginectx.op.do_one_request = aspeed_ahash_do_one; - return 0; } @@ -919,7 +928,7 @@ static int aspeed_sham_import(struct ahash_request *req, const void *in) static struct aspeed_hace_alg aspeed_ahash_algs[] = { { - .alg.ahash = { + .alg.ahash.base = { .init = aspeed_sham_init, .update = aspeed_sham_update, .final = aspeed_sham_final, @@ -946,9 +955,12 @@ static struct aspeed_hace_alg aspeed_ahash_algs[] = { } } }, + .alg.ahash.op = { + .do_one_request = aspeed_ahash_do_one, + }, }, { - .alg.ahash = { + .alg.ahash.base = { .init = aspeed_sham_init, .update = aspeed_sham_update, .final = aspeed_sham_final, @@ -975,9 +987,12 @@ static struct aspeed_hace_alg aspeed_ahash_algs[] = { } } }, + .alg.ahash.op = { + .do_one_request = aspeed_ahash_do_one, + }, }, { - .alg.ahash = { + .alg.ahash.base = { .init = aspeed_sham_init, .update = aspeed_sham_update, .final = aspeed_sham_final, @@ -1004,10 +1019,13 @@ static struct aspeed_hace_alg aspeed_ahash_algs[] = { } } }, + .alg.ahash.op = { + .do_one_request = aspeed_ahash_do_one, + }, }, { .alg_base = "sha1", - .alg.ahash = { + .alg.ahash.base = { .init = aspeed_sham_init, .update = aspeed_sham_update, .final = aspeed_sham_final, @@ -1036,10 +1054,13 @@ static struct aspeed_hace_alg aspeed_ahash_algs[] = { } } }, + .alg.ahash.op = { + .do_one_request = aspeed_ahash_do_one, + }, }, { .alg_base = "sha224", - .alg.ahash = { + .alg.ahash.base = { .init = aspeed_sham_init, .update = aspeed_sham_update, .final = aspeed_sham_final, @@ -1068,10 +1089,13 @@ static struct aspeed_hace_alg aspeed_ahash_algs[] = { } } }, + .alg.ahash.op = { + .do_one_request = aspeed_ahash_do_one, + }, }, { .alg_base = "sha256", - .alg.ahash = { + .alg.ahash.base = { .init = aspeed_sham_init, .update = aspeed_sham_update, .final = aspeed_sham_final, @@ -1100,12 +1124,15 @@ static struct aspeed_hace_alg aspeed_ahash_algs[] = { } } }, + .alg.ahash.op = { + .do_one_request = aspeed_ahash_do_one, + }, }, }; static struct aspeed_hace_alg aspeed_ahash_algs_g6[] = { { - .alg.ahash = { + .alg.ahash.base = { .init = aspeed_sham_init, .update = aspeed_sham_update, .final = aspeed_sham_final, @@ -1132,9 +1159,12 @@ static struct aspeed_hace_alg aspeed_ahash_algs_g6[] = { } } }, + .alg.ahash.op = { + .do_one_request = aspeed_ahash_do_one, + }, }, { - .alg.ahash = { + .alg.ahash.base = { .init = aspeed_sham_init, .update = aspeed_sham_update, .final = aspeed_sham_final, @@ -1161,9 +1191,12 @@ static struct aspeed_hace_alg aspeed_ahash_algs_g6[] = { } } }, + .alg.ahash.op = { + .do_one_request = aspeed_ahash_do_one, + }, }, { - .alg.ahash = { + .alg.ahash.base = { .init = aspeed_sha512s_init, .update = aspeed_sham_update, .final = aspeed_sham_final, @@ -1190,9 +1223,12 @@ static struct aspeed_hace_alg aspeed_ahash_algs_g6[] = { } } }, + .alg.ahash.op = { + .do_one_request = aspeed_ahash_do_one, + }, }, { - .alg.ahash = { + .alg.ahash.base = { .init = aspeed_sha512s_init, .update = aspeed_sham_update, .final = aspeed_sham_final, @@ -1219,10 +1255,13 @@ static struct aspeed_hace_alg aspeed_ahash_algs_g6[] = { } } }, + .alg.ahash.op = { + .do_one_request = aspeed_ahash_do_one, + }, }, { .alg_base = "sha384", - .alg.ahash = { + .alg.ahash.base = { .init = aspeed_sham_init, .update = aspeed_sham_update, .final = aspeed_sham_final, @@ -1251,10 +1290,13 @@ static struct aspeed_hace_alg aspeed_ahash_algs_g6[] = { } } }, + .alg.ahash.op = { + .do_one_request = aspeed_ahash_do_one, + }, }, { .alg_base = "sha512", - .alg.ahash = { + .alg.ahash.base = { .init = aspeed_sham_init, .update = aspeed_sham_update, .final = aspeed_sham_final, @@ -1283,10 +1325,13 @@ static struct aspeed_hace_alg aspeed_ahash_algs_g6[] = { } } }, + .alg.ahash.op = { + .do_one_request = aspeed_ahash_do_one, + }, }, { .alg_base = "sha512_224", - .alg.ahash = { + .alg.ahash.base = { .init = aspeed_sha512s_init, .update = aspeed_sham_update, .final = aspeed_sham_final, @@ -1315,10 +1360,13 @@ static struct aspeed_hace_alg aspeed_ahash_algs_g6[] = { } } }, + .alg.ahash.op = { + .do_one_request = aspeed_ahash_do_one, + }, }, { .alg_base = "sha512_256", - .alg.ahash = { + .alg.ahash.base = { .init = aspeed_sha512s_init, .update = aspeed_sham_update, .final = aspeed_sham_final, @@ -1347,6 +1395,9 @@ static struct aspeed_hace_alg aspeed_ahash_algs_g6[] = { } } }, + .alg.ahash.op = { + .do_one_request = aspeed_ahash_do_one, + }, }, }; @@ -1355,13 +1406,13 @@ void aspeed_unregister_hace_hash_algs(struct aspeed_hace_dev *hace_dev) int i; for (i = 0; i < ARRAY_SIZE(aspeed_ahash_algs); i++) - crypto_unregister_ahash(&aspeed_ahash_algs[i].alg.ahash); + crypto_engine_unregister_ahash(&aspeed_ahash_algs[i].alg.ahash); if (hace_dev->version != AST2600_VERSION) return; for (i = 0; i < ARRAY_SIZE(aspeed_ahash_algs_g6); i++) - crypto_unregister_ahash(&aspeed_ahash_algs_g6[i].alg.ahash); + crypto_engine_unregister_ahash(&aspeed_ahash_algs_g6[i].alg.ahash); } void aspeed_register_hace_hash_algs(struct aspeed_hace_dev *hace_dev) @@ -1372,10 +1423,10 @@ void aspeed_register_hace_hash_algs(struct aspeed_hace_dev *hace_dev) for (i = 0; i < ARRAY_SIZE(aspeed_ahash_algs); i++) { aspeed_ahash_algs[i].hace_dev = hace_dev; - rc = crypto_register_ahash(&aspeed_ahash_algs[i].alg.ahash); + rc = crypto_engine_register_ahash(&aspeed_ahash_algs[i].alg.ahash); if (rc) { AHASH_DBG(hace_dev, "Failed to register %s\n", - aspeed_ahash_algs[i].alg.ahash.halg.base.cra_name); + aspeed_ahash_algs[i].alg.ahash.base.halg.base.cra_name); } } @@ -1384,10 +1435,10 @@ void aspeed_register_hace_hash_algs(struct aspeed_hace_dev *hace_dev) for (i = 0; i < ARRAY_SIZE(aspeed_ahash_algs_g6); i++) { aspeed_ahash_algs_g6[i].hace_dev = hace_dev; - rc = crypto_register_ahash(&aspeed_ahash_algs_g6[i].alg.ahash); + rc = crypto_engine_register_ahash(&aspeed_ahash_algs_g6[i].alg.ahash); if (rc) { AHASH_DBG(hace_dev, "Failed to register %s\n", - aspeed_ahash_algs_g6[i].alg.ahash.halg.base.cra_name); + aspeed_ahash_algs_g6[i].alg.ahash.base.halg.base.cra_name); } } } diff --git a/drivers/crypto/aspeed/aspeed-hace.c b/drivers/crypto/aspeed/aspeed-hace.c index d2871e1de9c2..8f7aab82e1d8 100644 --- a/drivers/crypto/aspeed/aspeed-hace.c +++ b/drivers/crypto/aspeed/aspeed-hace.c @@ -3,7 +3,14 @@ * Copyright (c) 2021 Aspeed Technology Inc. */ +#include "aspeed-hace.h" +#include #include +#include +#include +#include +#include +#include #include #include #include @@ -11,8 +18,6 @@ #include #include -#include "aspeed-hace.h" - #ifdef CONFIG_CRYPTO_DEV_ASPEED_DEBUG #define HACE_DBG(d, fmt, ...) \ dev_info((d)->dev, "%s() " fmt, __func__, ##__VA_ARGS__) diff --git a/drivers/crypto/aspeed/aspeed-hace.h b/drivers/crypto/aspeed/aspeed-hace.h index 05d0a15d546d..68f70e01fccb 100644 --- a/drivers/crypto/aspeed/aspeed-hace.h +++ b/drivers/crypto/aspeed/aspeed-hace.h @@ -2,25 +2,14 @@ #ifndef __ASPEED_HACE_H__ #define __ASPEED_HACE_H__ -#include -#include -#include -#include -#include #include -#include -#include -#include -#include -#include -#include -#include -#include -#include #include -#include -#include +#include #include +#include +#include +#include +#include /***************************** * * @@ -144,6 +133,7 @@ HACE_CMD_OFB | HACE_CMD_CTR) struct aspeed_hace_dev; +struct scatterlist; typedef int (*aspeed_hace_fn_t)(struct aspeed_hace_dev *); @@ -178,8 +168,6 @@ struct aspeed_sha_hmac_ctx { }; struct aspeed_sham_ctx { - struct crypto_engine_ctx enginectx; - struct aspeed_hace_dev *hace_dev; unsigned long flags; /* hmac flag */ @@ -235,8 +223,6 @@ struct aspeed_engine_crypto { }; struct aspeed_cipher_ctx { - struct crypto_engine_ctx enginectx; - struct aspeed_hace_dev *hace_dev; int key_len; u8 key[AES_MAX_KEYLENGTH]; @@ -275,8 +261,8 @@ struct aspeed_hace_alg { const char *alg_base; union { - struct skcipher_alg skcipher; - struct ahash_alg ahash; + struct skcipher_engine_alg skcipher; + struct ahash_engine_alg ahash; } alg; }; From d33a6a3f5a68b01acf0d79b626c9b857cc9719cc Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Sun, 13 Aug 2023 14:54:59 +0800 Subject: [PATCH 522/656] crypto: aspeed - Remove non-standard sha512 algorithms Algorithms must never be added to a driver unless there is a generic implementation. These truncated versions of sha512 slipped through. Remove them as they are useless. Signed-off-by: Herbert Xu --- drivers/crypto/aspeed/aspeed-hace-hash.c | 212 ----------------------- 1 file changed, 212 deletions(-) diff --git a/drivers/crypto/aspeed/aspeed-hace-hash.c b/drivers/crypto/aspeed/aspeed-hace-hash.c index abc459af2ac8..0b6e49c06eff 100644 --- a/drivers/crypto/aspeed/aspeed-hace-hash.c +++ b/drivers/crypto/aspeed/aspeed-hace-hash.c @@ -59,28 +59,6 @@ static const __be64 sha512_iv[8] = { cpu_to_be64(SHA512_H6), cpu_to_be64(SHA512_H7) }; -static const __be32 sha512_224_iv[16] = { - cpu_to_be32(0xC8373D8CUL), cpu_to_be32(0xA24D5419UL), - cpu_to_be32(0x6699E173UL), cpu_to_be32(0xD6D4DC89UL), - cpu_to_be32(0xAEB7FA1DUL), cpu_to_be32(0x829CFF32UL), - cpu_to_be32(0x14D59D67UL), cpu_to_be32(0xCF9F2F58UL), - cpu_to_be32(0x692B6D0FUL), cpu_to_be32(0xA84DD47BUL), - cpu_to_be32(0x736FE377UL), cpu_to_be32(0x4289C404UL), - cpu_to_be32(0xA8859D3FUL), cpu_to_be32(0xC8361D6AUL), - cpu_to_be32(0xADE61211UL), cpu_to_be32(0xA192D691UL) -}; - -static const __be32 sha512_256_iv[16] = { - cpu_to_be32(0x94213122UL), cpu_to_be32(0x2CF72BFCUL), - cpu_to_be32(0xA35F559FUL), cpu_to_be32(0xC2644CC8UL), - cpu_to_be32(0x6BB89323UL), cpu_to_be32(0x51B1536FUL), - cpu_to_be32(0x19773896UL), cpu_to_be32(0xBDEA4059UL), - cpu_to_be32(0xE23E2896UL), cpu_to_be32(0xE3FF8EA8UL), - cpu_to_be32(0x251E5EBEUL), cpu_to_be32(0x92398653UL), - cpu_to_be32(0xFC99012BUL), cpu_to_be32(0xAAB8852CUL), - cpu_to_be32(0xDC2DB70EUL), cpu_to_be32(0xA22CC581UL) -}; - /* The purpose of this padding is to ensure that the padded message is a * multiple of 512 bits (SHA1/SHA224/SHA256) or 1024 bits (SHA384/SHA512). * The bit "1" is appended at the end of the message followed by @@ -765,62 +743,6 @@ static int aspeed_sham_init(struct ahash_request *req) return 0; } -static int aspeed_sha512s_init(struct ahash_request *req) -{ - struct aspeed_sham_reqctx *rctx = ahash_request_ctx(req); - struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); - struct aspeed_sham_ctx *tctx = crypto_ahash_ctx(tfm); - struct aspeed_hace_dev *hace_dev = tctx->hace_dev; - struct aspeed_sha_hmac_ctx *bctx = tctx->base; - - AHASH_DBG(hace_dev, "digest size: %d\n", crypto_ahash_digestsize(tfm)); - - rctx->cmd = HASH_CMD_ACC_MODE; - rctx->flags = 0; - - switch (crypto_ahash_digestsize(tfm)) { - case SHA224_DIGEST_SIZE: - rctx->cmd |= HASH_CMD_SHA512_SER | HASH_CMD_SHA512_224 | - HASH_CMD_SHA_SWAP; - rctx->flags |= SHA_FLAGS_SHA512_224; - rctx->digsize = SHA224_DIGEST_SIZE; - rctx->block_size = SHA512_BLOCK_SIZE; - rctx->sha_iv = sha512_224_iv; - rctx->ivsize = 64; - memcpy(rctx->digest, sha512_224_iv, rctx->ivsize); - break; - case SHA256_DIGEST_SIZE: - rctx->cmd |= HASH_CMD_SHA512_SER | HASH_CMD_SHA512_256 | - HASH_CMD_SHA_SWAP; - rctx->flags |= SHA_FLAGS_SHA512_256; - rctx->digsize = SHA256_DIGEST_SIZE; - rctx->block_size = SHA512_BLOCK_SIZE; - rctx->sha_iv = sha512_256_iv; - rctx->ivsize = 64; - memcpy(rctx->digest, sha512_256_iv, rctx->ivsize); - break; - default: - dev_warn(tctx->hace_dev->dev, "digest size %d not support\n", - crypto_ahash_digestsize(tfm)); - return -EINVAL; - } - - rctx->bufcnt = 0; - rctx->total = 0; - rctx->digcnt[0] = 0; - rctx->digcnt[1] = 0; - - /* HMAC init */ - if (tctx->flags & SHA_FLAGS_HMAC) { - rctx->digcnt[0] = rctx->block_size; - rctx->bufcnt = rctx->block_size; - memcpy(rctx->buffer, bctx->ipad, rctx->block_size); - rctx->flags |= SHA_FLAGS_HMAC; - } - - return 0; -} - static int aspeed_sham_digest(struct ahash_request *req) { return aspeed_sham_init(req) ? : aspeed_sham_finup(req); @@ -1195,70 +1117,6 @@ static struct aspeed_hace_alg aspeed_ahash_algs_g6[] = { .do_one_request = aspeed_ahash_do_one, }, }, - { - .alg.ahash.base = { - .init = aspeed_sha512s_init, - .update = aspeed_sham_update, - .final = aspeed_sham_final, - .finup = aspeed_sham_finup, - .digest = aspeed_sham_digest, - .export = aspeed_sham_export, - .import = aspeed_sham_import, - .halg = { - .digestsize = SHA224_DIGEST_SIZE, - .statesize = sizeof(struct aspeed_sham_reqctx), - .base = { - .cra_name = "sha512_224", - .cra_driver_name = "aspeed-sha512_224", - .cra_priority = 300, - .cra_flags = CRYPTO_ALG_TYPE_AHASH | - CRYPTO_ALG_ASYNC | - CRYPTO_ALG_KERN_DRIVER_ONLY, - .cra_blocksize = SHA512_BLOCK_SIZE, - .cra_ctxsize = sizeof(struct aspeed_sham_ctx), - .cra_alignmask = 0, - .cra_module = THIS_MODULE, - .cra_init = aspeed_sham_cra_init, - .cra_exit = aspeed_sham_cra_exit, - } - } - }, - .alg.ahash.op = { - .do_one_request = aspeed_ahash_do_one, - }, - }, - { - .alg.ahash.base = { - .init = aspeed_sha512s_init, - .update = aspeed_sham_update, - .final = aspeed_sham_final, - .finup = aspeed_sham_finup, - .digest = aspeed_sham_digest, - .export = aspeed_sham_export, - .import = aspeed_sham_import, - .halg = { - .digestsize = SHA256_DIGEST_SIZE, - .statesize = sizeof(struct aspeed_sham_reqctx), - .base = { - .cra_name = "sha512_256", - .cra_driver_name = "aspeed-sha512_256", - .cra_priority = 300, - .cra_flags = CRYPTO_ALG_TYPE_AHASH | - CRYPTO_ALG_ASYNC | - CRYPTO_ALG_KERN_DRIVER_ONLY, - .cra_blocksize = SHA512_BLOCK_SIZE, - .cra_ctxsize = sizeof(struct aspeed_sham_ctx), - .cra_alignmask = 0, - .cra_module = THIS_MODULE, - .cra_init = aspeed_sham_cra_init, - .cra_exit = aspeed_sham_cra_exit, - } - } - }, - .alg.ahash.op = { - .do_one_request = aspeed_ahash_do_one, - }, - }, { .alg_base = "sha384", .alg.ahash.base = { @@ -1329,76 +1187,6 @@ static struct aspeed_hace_alg aspeed_ahash_algs_g6[] = { .do_one_request = aspeed_ahash_do_one, }, }, - { - .alg_base = "sha512_224", - .alg.ahash.base = { - .init = aspeed_sha512s_init, - .update = aspeed_sham_update, - .final = aspeed_sham_final, - .finup = aspeed_sham_finup, - .digest = aspeed_sham_digest, - .setkey = aspeed_sham_setkey, - .export = aspeed_sham_export, - .import = aspeed_sham_import, - .halg = { - .digestsize = SHA224_DIGEST_SIZE, - .statesize = sizeof(struct aspeed_sham_reqctx), - .base = { - .cra_name = "hmac(sha512_224)", - .cra_driver_name = "aspeed-hmac-sha512_224", - .cra_priority = 300, - .cra_flags = CRYPTO_ALG_TYPE_AHASH | - CRYPTO_ALG_ASYNC | - CRYPTO_ALG_KERN_DRIVER_ONLY, - .cra_blocksize = SHA512_BLOCK_SIZE, - .cra_ctxsize = sizeof(struct aspeed_sham_ctx) + - sizeof(struct aspeed_sha_hmac_ctx), - .cra_alignmask = 0, - .cra_module = THIS_MODULE, - .cra_init = aspeed_sham_cra_init, - .cra_exit = aspeed_sham_cra_exit, - } - } - }, - .alg.ahash.op = { - .do_one_request = aspeed_ahash_do_one, - }, - }, - { - .alg_base = "sha512_256", - .alg.ahash.base = { - .init = aspeed_sha512s_init, - .update = aspeed_sham_update, - .final = aspeed_sham_final, - .finup = aspeed_sham_finup, - .digest = aspeed_sham_digest, - .setkey = aspeed_sham_setkey, - .export = aspeed_sham_export, - .import = aspeed_sham_import, - .halg = { - .digestsize = SHA256_DIGEST_SIZE, - .statesize = sizeof(struct aspeed_sham_reqctx), - .base = { - .cra_name = "hmac(sha512_256)", - .cra_driver_name = "aspeed-hmac-sha512_256", - .cra_priority = 300, - .cra_flags = CRYPTO_ALG_TYPE_AHASH | - CRYPTO_ALG_ASYNC | - CRYPTO_ALG_KERN_DRIVER_ONLY, - .cra_blocksize = SHA512_BLOCK_SIZE, - .cra_ctxsize = sizeof(struct aspeed_sham_ctx) + - sizeof(struct aspeed_sha_hmac_ctx), - .cra_alignmask = 0, - .cra_module = THIS_MODULE, - .cra_init = aspeed_sham_cra_init, - .cra_exit = aspeed_sham_cra_exit, - } - } - }, - .alg.ahash.op = { - .do_one_request = aspeed_ahash_do_one, - }, - }, }; void aspeed_unregister_hace_hash_algs(struct aspeed_hace_dev *hace_dev) From 623814c0408771399c4209db73f60685f7cf1d14 Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Sun, 13 Aug 2023 14:55:01 +0800 Subject: [PATCH 523/656] crypto: caam - Use new crypto_engine_op interface Use the new crypto_engine_op interface where the callback is stored in the algorithm object. Signed-off-by: Herbert Xu --- drivers/crypto/caam/caamalg.c | 382 +++++++++++++++++++++++++-------- drivers/crypto/caam/caamhash.c | 28 +-- drivers/crypto/caam/caampkc.c | 20 +- drivers/crypto/caam/caampkc.h | 3 - 4 files changed, 320 insertions(+), 113 deletions(-) diff --git a/drivers/crypto/caam/caamalg.c b/drivers/crypto/caam/caamalg.c index da8182ee86fe..eba2d750c3b0 100644 --- a/drivers/crypto/caam/caamalg.c +++ b/drivers/crypto/caam/caamalg.c @@ -57,11 +57,14 @@ #include "key_gen.h" #include "caamalg_desc.h" #include +#include #include +#include #include #include #include #include +#include #include #include #include @@ -95,13 +98,13 @@ struct caam_alg_entry { }; struct caam_aead_alg { - struct aead_alg aead; + struct aead_engine_alg aead; struct caam_alg_entry caam; bool registered; }; struct caam_skcipher_alg { - struct skcipher_alg skcipher; + struct skcipher_engine_alg skcipher; struct caam_alg_entry caam; bool registered; }; @@ -110,7 +113,6 @@ struct caam_skcipher_alg { * per-session context */ struct caam_ctx { - struct crypto_engine_ctx enginectx; u32 sh_desc_enc[DESC_MAX_USED_LEN]; u32 sh_desc_dec[DESC_MAX_USED_LEN]; u8 key[CAAM_MAX_KEY_SIZE]; @@ -188,7 +190,8 @@ static int aead_null_set_sh_desc(struct crypto_aead *aead) static int aead_set_sh_desc(struct crypto_aead *aead) { struct caam_aead_alg *alg = container_of(crypto_aead_alg(aead), - struct caam_aead_alg, aead); + struct caam_aead_alg, + aead.base); unsigned int ivsize = crypto_aead_ivsize(aead); struct caam_ctx *ctx = crypto_aead_ctx_dma(aead); struct device *jrdev = ctx->jrdev; @@ -738,7 +741,7 @@ static int skcipher_setkey(struct crypto_skcipher *skcipher, const u8 *key, struct caam_ctx *ctx = crypto_skcipher_ctx_dma(skcipher); struct caam_skcipher_alg *alg = container_of(crypto_skcipher_alg(skcipher), typeof(*alg), - skcipher); + skcipher.base); struct device *jrdev = ctx->jrdev; unsigned int ivsize = crypto_skcipher_ivsize(skcipher); u32 *desc; @@ -1195,7 +1198,8 @@ static void init_authenc_job(struct aead_request *req, { struct crypto_aead *aead = crypto_aead_reqtfm(req); struct caam_aead_alg *alg = container_of(crypto_aead_alg(aead), - struct caam_aead_alg, aead); + struct caam_aead_alg, + aead.base); unsigned int ivsize = crypto_aead_ivsize(aead); struct caam_ctx *ctx = crypto_aead_ctx_dma(aead); struct caam_drv_private *ctrlpriv = dev_get_drvdata(ctx->jrdev->parent); @@ -1881,7 +1885,7 @@ static int skcipher_decrypt(struct skcipher_request *req) static struct caam_skcipher_alg driver_algs[] = { { - .skcipher = { + .skcipher.base = { .base = { .cra_name = "cbc(aes)", .cra_driver_name = "cbc-aes-caam", @@ -1894,10 +1898,13 @@ static struct caam_skcipher_alg driver_algs[] = { .max_keysize = AES_MAX_KEY_SIZE, .ivsize = AES_BLOCK_SIZE, }, + .skcipher.op = { + .do_one_request = skcipher_do_one_req, + }, .caam.class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CBC, }, { - .skcipher = { + .skcipher.base = { .base = { .cra_name = "cbc(des3_ede)", .cra_driver_name = "cbc-3des-caam", @@ -1910,10 +1917,13 @@ static struct caam_skcipher_alg driver_algs[] = { .max_keysize = DES3_EDE_KEY_SIZE, .ivsize = DES3_EDE_BLOCK_SIZE, }, + .skcipher.op = { + .do_one_request = skcipher_do_one_req, + }, .caam.class1_alg_type = OP_ALG_ALGSEL_3DES | OP_ALG_AAI_CBC, }, { - .skcipher = { + .skcipher.base = { .base = { .cra_name = "cbc(des)", .cra_driver_name = "cbc-des-caam", @@ -1926,10 +1936,13 @@ static struct caam_skcipher_alg driver_algs[] = { .max_keysize = DES_KEY_SIZE, .ivsize = DES_BLOCK_SIZE, }, + .skcipher.op = { + .do_one_request = skcipher_do_one_req, + }, .caam.class1_alg_type = OP_ALG_ALGSEL_DES | OP_ALG_AAI_CBC, }, { - .skcipher = { + .skcipher.base = { .base = { .cra_name = "ctr(aes)", .cra_driver_name = "ctr-aes-caam", @@ -1943,11 +1956,14 @@ static struct caam_skcipher_alg driver_algs[] = { .ivsize = AES_BLOCK_SIZE, .chunksize = AES_BLOCK_SIZE, }, + .skcipher.op = { + .do_one_request = skcipher_do_one_req, + }, .caam.class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CTR_MOD128, }, { - .skcipher = { + .skcipher.base = { .base = { .cra_name = "rfc3686(ctr(aes))", .cra_driver_name = "rfc3686-ctr-aes-caam", @@ -1963,6 +1979,9 @@ static struct caam_skcipher_alg driver_algs[] = { .ivsize = CTR_RFC3686_IV_SIZE, .chunksize = AES_BLOCK_SIZE, }, + .skcipher.op = { + .do_one_request = skcipher_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CTR_MOD128, @@ -1970,7 +1989,7 @@ static struct caam_skcipher_alg driver_algs[] = { }, }, { - .skcipher = { + .skcipher.base = { .base = { .cra_name = "xts(aes)", .cra_driver_name = "xts-aes-caam", @@ -1984,10 +2003,13 @@ static struct caam_skcipher_alg driver_algs[] = { .max_keysize = 2 * AES_MAX_KEY_SIZE, .ivsize = AES_BLOCK_SIZE, }, + .skcipher.op = { + .do_one_request = skcipher_do_one_req, + }, .caam.class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_XTS, }, { - .skcipher = { + .skcipher.base = { .base = { .cra_name = "ecb(des)", .cra_driver_name = "ecb-des-caam", @@ -1999,10 +2021,13 @@ static struct caam_skcipher_alg driver_algs[] = { .min_keysize = DES_KEY_SIZE, .max_keysize = DES_KEY_SIZE, }, + .skcipher.op = { + .do_one_request = skcipher_do_one_req, + }, .caam.class1_alg_type = OP_ALG_ALGSEL_DES | OP_ALG_AAI_ECB, }, { - .skcipher = { + .skcipher.base = { .base = { .cra_name = "ecb(aes)", .cra_driver_name = "ecb-aes-caam", @@ -2014,10 +2039,13 @@ static struct caam_skcipher_alg driver_algs[] = { .min_keysize = AES_MIN_KEY_SIZE, .max_keysize = AES_MAX_KEY_SIZE, }, + .skcipher.op = { + .do_one_request = skcipher_do_one_req, + }, .caam.class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_ECB, }, { - .skcipher = { + .skcipher.base = { .base = { .cra_name = "ecb(des3_ede)", .cra_driver_name = "ecb-des3-caam", @@ -2029,13 +2057,16 @@ static struct caam_skcipher_alg driver_algs[] = { .min_keysize = DES3_EDE_KEY_SIZE, .max_keysize = DES3_EDE_KEY_SIZE, }, + .skcipher.op = { + .do_one_request = skcipher_do_one_req, + }, .caam.class1_alg_type = OP_ALG_ALGSEL_3DES | OP_ALG_AAI_ECB, }, }; static struct caam_aead_alg driver_aeads[] = { { - .aead = { + .aead.base = { .base = { .cra_name = "rfc4106(gcm(aes))", .cra_driver_name = "rfc4106-gcm-aes-caam", @@ -2048,13 +2079,16 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = GCM_RFC4106_IV_SIZE, .maxauthsize = AES_BLOCK_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_GCM, .nodkp = true, }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "rfc4543(gcm(aes))", .cra_driver_name = "rfc4543-gcm-aes-caam", @@ -2067,6 +2101,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = GCM_RFC4543_IV_SIZE, .maxauthsize = AES_BLOCK_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_GCM, .nodkp = true, @@ -2074,7 +2111,7 @@ static struct caam_aead_alg driver_aeads[] = { }, /* Galois Counter Mode */ { - .aead = { + .aead.base = { .base = { .cra_name = "gcm(aes)", .cra_driver_name = "gcm-aes-caam", @@ -2087,6 +2124,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = GCM_AES_IV_SIZE, .maxauthsize = AES_BLOCK_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_GCM, .nodkp = true, @@ -2094,7 +2134,7 @@ static struct caam_aead_alg driver_aeads[] = { }, /* single-pass ipsec_esp descriptor */ { - .aead = { + .aead.base = { .base = { .cra_name = "authenc(hmac(md5)," "ecb(cipher_null))", @@ -2109,13 +2149,16 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = NULL_IV_SIZE, .maxauthsize = MD5_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class2_alg_type = OP_ALG_ALGSEL_MD5 | OP_ALG_AAI_HMAC_PRECOMP, }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "authenc(hmac(sha1)," "ecb(cipher_null))", @@ -2130,13 +2173,16 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = NULL_IV_SIZE, .maxauthsize = SHA1_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class2_alg_type = OP_ALG_ALGSEL_SHA1 | OP_ALG_AAI_HMAC_PRECOMP, }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "authenc(hmac(sha224)," "ecb(cipher_null))", @@ -2151,13 +2197,16 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = NULL_IV_SIZE, .maxauthsize = SHA224_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class2_alg_type = OP_ALG_ALGSEL_SHA224 | OP_ALG_AAI_HMAC_PRECOMP, }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "authenc(hmac(sha256)," "ecb(cipher_null))", @@ -2172,13 +2221,16 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = NULL_IV_SIZE, .maxauthsize = SHA256_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class2_alg_type = OP_ALG_ALGSEL_SHA256 | OP_ALG_AAI_HMAC_PRECOMP, }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "authenc(hmac(sha384)," "ecb(cipher_null))", @@ -2193,13 +2245,16 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = NULL_IV_SIZE, .maxauthsize = SHA384_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class2_alg_type = OP_ALG_ALGSEL_SHA384 | OP_ALG_AAI_HMAC_PRECOMP, }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "authenc(hmac(sha512)," "ecb(cipher_null))", @@ -2214,13 +2269,16 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = NULL_IV_SIZE, .maxauthsize = SHA512_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class2_alg_type = OP_ALG_ALGSEL_SHA512 | OP_ALG_AAI_HMAC_PRECOMP, }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "authenc(hmac(md5),cbc(aes))", .cra_driver_name = "authenc-hmac-md5-" @@ -2234,6 +2292,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = AES_BLOCK_SIZE, .maxauthsize = MD5_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_MD5 | @@ -2241,7 +2302,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "echainiv(authenc(hmac(md5)," "cbc(aes)))", @@ -2256,6 +2317,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = AES_BLOCK_SIZE, .maxauthsize = MD5_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_MD5 | @@ -2264,7 +2328,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "authenc(hmac(sha1),cbc(aes))", .cra_driver_name = "authenc-hmac-sha1-" @@ -2278,6 +2342,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = AES_BLOCK_SIZE, .maxauthsize = SHA1_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA1 | @@ -2285,7 +2352,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "echainiv(authenc(hmac(sha1)," "cbc(aes)))", @@ -2300,6 +2367,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = AES_BLOCK_SIZE, .maxauthsize = SHA1_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA1 | @@ -2308,7 +2378,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "authenc(hmac(sha224),cbc(aes))", .cra_driver_name = "authenc-hmac-sha224-" @@ -2322,6 +2392,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = AES_BLOCK_SIZE, .maxauthsize = SHA224_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA224 | @@ -2329,7 +2402,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "echainiv(authenc(hmac(sha224)," "cbc(aes)))", @@ -2344,6 +2417,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = AES_BLOCK_SIZE, .maxauthsize = SHA224_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA224 | @@ -2352,7 +2428,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "authenc(hmac(sha256),cbc(aes))", .cra_driver_name = "authenc-hmac-sha256-" @@ -2366,6 +2442,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = AES_BLOCK_SIZE, .maxauthsize = SHA256_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA256 | @@ -2373,7 +2452,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "echainiv(authenc(hmac(sha256)," "cbc(aes)))", @@ -2388,6 +2467,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = AES_BLOCK_SIZE, .maxauthsize = SHA256_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA256 | @@ -2396,7 +2478,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "authenc(hmac(sha384),cbc(aes))", .cra_driver_name = "authenc-hmac-sha384-" @@ -2410,6 +2492,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = AES_BLOCK_SIZE, .maxauthsize = SHA384_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA384 | @@ -2417,7 +2502,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "echainiv(authenc(hmac(sha384)," "cbc(aes)))", @@ -2432,6 +2517,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = AES_BLOCK_SIZE, .maxauthsize = SHA384_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA384 | @@ -2440,7 +2528,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "authenc(hmac(sha512),cbc(aes))", .cra_driver_name = "authenc-hmac-sha512-" @@ -2454,6 +2542,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = AES_BLOCK_SIZE, .maxauthsize = SHA512_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA512 | @@ -2461,7 +2552,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "echainiv(authenc(hmac(sha512)," "cbc(aes)))", @@ -2476,6 +2567,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = AES_BLOCK_SIZE, .maxauthsize = SHA512_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA512 | @@ -2484,7 +2578,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "authenc(hmac(md5),cbc(des3_ede))", .cra_driver_name = "authenc-hmac-md5-" @@ -2498,6 +2592,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = DES3_EDE_BLOCK_SIZE, .maxauthsize = MD5_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_3DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_MD5 | @@ -2505,7 +2602,7 @@ static struct caam_aead_alg driver_aeads[] = { } }, { - .aead = { + .aead.base = { .base = { .cra_name = "echainiv(authenc(hmac(md5)," "cbc(des3_ede)))", @@ -2520,6 +2617,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = DES3_EDE_BLOCK_SIZE, .maxauthsize = MD5_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_3DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_MD5 | @@ -2528,7 +2628,7 @@ static struct caam_aead_alg driver_aeads[] = { } }, { - .aead = { + .aead.base = { .base = { .cra_name = "authenc(hmac(sha1)," "cbc(des3_ede))", @@ -2543,6 +2643,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = DES3_EDE_BLOCK_SIZE, .maxauthsize = SHA1_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_3DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA1 | @@ -2550,7 +2653,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "echainiv(authenc(hmac(sha1)," "cbc(des3_ede)))", @@ -2566,6 +2669,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = DES3_EDE_BLOCK_SIZE, .maxauthsize = SHA1_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_3DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA1 | @@ -2574,7 +2680,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "authenc(hmac(sha224)," "cbc(des3_ede))", @@ -2589,6 +2695,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = DES3_EDE_BLOCK_SIZE, .maxauthsize = SHA224_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_3DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA224 | @@ -2596,7 +2705,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "echainiv(authenc(hmac(sha224)," "cbc(des3_ede)))", @@ -2612,6 +2721,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = DES3_EDE_BLOCK_SIZE, .maxauthsize = SHA224_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_3DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA224 | @@ -2620,7 +2732,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "authenc(hmac(sha256)," "cbc(des3_ede))", @@ -2635,6 +2747,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = DES3_EDE_BLOCK_SIZE, .maxauthsize = SHA256_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_3DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA256 | @@ -2642,7 +2757,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "echainiv(authenc(hmac(sha256)," "cbc(des3_ede)))", @@ -2658,6 +2773,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = DES3_EDE_BLOCK_SIZE, .maxauthsize = SHA256_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_3DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA256 | @@ -2666,7 +2784,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "authenc(hmac(sha384)," "cbc(des3_ede))", @@ -2681,6 +2799,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = DES3_EDE_BLOCK_SIZE, .maxauthsize = SHA384_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_3DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA384 | @@ -2688,7 +2809,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "echainiv(authenc(hmac(sha384)," "cbc(des3_ede)))", @@ -2704,6 +2825,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = DES3_EDE_BLOCK_SIZE, .maxauthsize = SHA384_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_3DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA384 | @@ -2712,7 +2836,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "authenc(hmac(sha512)," "cbc(des3_ede))", @@ -2727,6 +2851,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = DES3_EDE_BLOCK_SIZE, .maxauthsize = SHA512_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_3DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA512 | @@ -2734,7 +2861,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "echainiv(authenc(hmac(sha512)," "cbc(des3_ede)))", @@ -2750,6 +2877,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = DES3_EDE_BLOCK_SIZE, .maxauthsize = SHA512_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_3DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA512 | @@ -2758,7 +2888,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "authenc(hmac(md5),cbc(des))", .cra_driver_name = "authenc-hmac-md5-" @@ -2772,6 +2902,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = DES_BLOCK_SIZE, .maxauthsize = MD5_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_MD5 | @@ -2779,7 +2912,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "echainiv(authenc(hmac(md5)," "cbc(des)))", @@ -2794,6 +2927,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = DES_BLOCK_SIZE, .maxauthsize = MD5_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_MD5 | @@ -2802,7 +2938,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "authenc(hmac(sha1),cbc(des))", .cra_driver_name = "authenc-hmac-sha1-" @@ -2816,6 +2952,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = DES_BLOCK_SIZE, .maxauthsize = SHA1_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA1 | @@ -2823,7 +2962,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "echainiv(authenc(hmac(sha1)," "cbc(des)))", @@ -2838,6 +2977,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = DES_BLOCK_SIZE, .maxauthsize = SHA1_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA1 | @@ -2846,7 +2988,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "authenc(hmac(sha224),cbc(des))", .cra_driver_name = "authenc-hmac-sha224-" @@ -2860,6 +3002,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = DES_BLOCK_SIZE, .maxauthsize = SHA224_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA224 | @@ -2867,7 +3012,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "echainiv(authenc(hmac(sha224)," "cbc(des)))", @@ -2882,6 +3027,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = DES_BLOCK_SIZE, .maxauthsize = SHA224_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA224 | @@ -2890,7 +3038,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "authenc(hmac(sha256),cbc(des))", .cra_driver_name = "authenc-hmac-sha256-" @@ -2904,6 +3052,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = DES_BLOCK_SIZE, .maxauthsize = SHA256_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA256 | @@ -2911,7 +3062,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "echainiv(authenc(hmac(sha256)," "cbc(des)))", @@ -2926,6 +3077,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = DES_BLOCK_SIZE, .maxauthsize = SHA256_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA256 | @@ -2934,7 +3088,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "authenc(hmac(sha384),cbc(des))", .cra_driver_name = "authenc-hmac-sha384-" @@ -2948,6 +3102,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = DES_BLOCK_SIZE, .maxauthsize = SHA384_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA384 | @@ -2955,7 +3112,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "echainiv(authenc(hmac(sha384)," "cbc(des)))", @@ -2970,6 +3127,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = DES_BLOCK_SIZE, .maxauthsize = SHA384_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA384 | @@ -2978,7 +3138,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "authenc(hmac(sha512),cbc(des))", .cra_driver_name = "authenc-hmac-sha512-" @@ -2992,6 +3152,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = DES_BLOCK_SIZE, .maxauthsize = SHA512_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA512 | @@ -2999,7 +3162,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "echainiv(authenc(hmac(sha512)," "cbc(des)))", @@ -3014,6 +3177,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = DES_BLOCK_SIZE, .maxauthsize = SHA512_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA512 | @@ -3022,7 +3188,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "authenc(hmac(md5)," "rfc3686(ctr(aes)))", @@ -3037,6 +3203,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = CTR_RFC3686_IV_SIZE, .maxauthsize = MD5_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CTR_MOD128, @@ -3046,7 +3215,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "seqiv(authenc(" "hmac(md5),rfc3686(ctr(aes))))", @@ -3061,6 +3230,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = CTR_RFC3686_IV_SIZE, .maxauthsize = MD5_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CTR_MOD128, @@ -3071,7 +3243,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "authenc(hmac(sha1)," "rfc3686(ctr(aes)))", @@ -3086,6 +3258,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = CTR_RFC3686_IV_SIZE, .maxauthsize = SHA1_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CTR_MOD128, @@ -3095,7 +3270,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "seqiv(authenc(" "hmac(sha1),rfc3686(ctr(aes))))", @@ -3110,6 +3285,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = CTR_RFC3686_IV_SIZE, .maxauthsize = SHA1_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CTR_MOD128, @@ -3120,7 +3298,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "authenc(hmac(sha224)," "rfc3686(ctr(aes)))", @@ -3135,6 +3313,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = CTR_RFC3686_IV_SIZE, .maxauthsize = SHA224_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CTR_MOD128, @@ -3144,7 +3325,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "seqiv(authenc(" "hmac(sha224),rfc3686(ctr(aes))))", @@ -3159,6 +3340,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = CTR_RFC3686_IV_SIZE, .maxauthsize = SHA224_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CTR_MOD128, @@ -3169,7 +3353,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "authenc(hmac(sha256)," "rfc3686(ctr(aes)))", @@ -3184,6 +3368,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = CTR_RFC3686_IV_SIZE, .maxauthsize = SHA256_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CTR_MOD128, @@ -3193,7 +3380,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "seqiv(authenc(hmac(sha256)," "rfc3686(ctr(aes))))", @@ -3208,6 +3395,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = CTR_RFC3686_IV_SIZE, .maxauthsize = SHA256_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CTR_MOD128, @@ -3218,7 +3408,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "authenc(hmac(sha384)," "rfc3686(ctr(aes)))", @@ -3233,6 +3423,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = CTR_RFC3686_IV_SIZE, .maxauthsize = SHA384_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CTR_MOD128, @@ -3242,7 +3435,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "seqiv(authenc(hmac(sha384)," "rfc3686(ctr(aes))))", @@ -3257,6 +3450,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = CTR_RFC3686_IV_SIZE, .maxauthsize = SHA384_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CTR_MOD128, @@ -3267,7 +3463,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "authenc(hmac(sha512)," "rfc3686(ctr(aes)))", @@ -3282,6 +3478,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = CTR_RFC3686_IV_SIZE, .maxauthsize = SHA512_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CTR_MOD128, @@ -3291,7 +3490,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "seqiv(authenc(hmac(sha512)," "rfc3686(ctr(aes))))", @@ -3306,6 +3505,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = CTR_RFC3686_IV_SIZE, .maxauthsize = SHA512_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CTR_MOD128, @@ -3316,7 +3518,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "rfc7539(chacha20,poly1305)", .cra_driver_name = "rfc7539-chacha20-poly1305-" @@ -3330,6 +3532,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = CHACHAPOLY_IV_SIZE, .maxauthsize = POLY1305_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_CHACHA20 | OP_ALG_AAI_AEAD, @@ -3339,7 +3544,7 @@ static struct caam_aead_alg driver_aeads[] = { }, }, { - .aead = { + .aead.base = { .base = { .cra_name = "rfc7539esp(chacha20,poly1305)", .cra_driver_name = "rfc7539esp-chacha20-" @@ -3353,6 +3558,9 @@ static struct caam_aead_alg driver_aeads[] = { .ivsize = 8, .maxauthsize = POLY1305_DIGEST_SIZE, }, + .aead.op = { + .do_one_request = aead_do_one_req, + }, .caam = { .class1_alg_type = OP_ALG_ALGSEL_CHACHA20 | OP_ALG_AAI_AEAD, @@ -3412,13 +3620,11 @@ static int caam_cra_init(struct crypto_skcipher *tfm) { struct skcipher_alg *alg = crypto_skcipher_alg(tfm); struct caam_skcipher_alg *caam_alg = - container_of(alg, typeof(*caam_alg), skcipher); + container_of(alg, typeof(*caam_alg), skcipher.base); struct caam_ctx *ctx = crypto_skcipher_ctx_dma(tfm); u32 alg_aai = caam_alg->caam.class1_alg_type & OP_ALG_AAI_MASK; int ret = 0; - ctx->enginectx.op.do_one_request = skcipher_do_one_req; - if (alg_aai == OP_ALG_AAI_XTS) { const char *tfm_name = crypto_tfm_alg_name(&tfm->base); struct crypto_skcipher *fallback; @@ -3449,13 +3655,11 @@ static int caam_aead_init(struct crypto_aead *tfm) { struct aead_alg *alg = crypto_aead_alg(tfm); struct caam_aead_alg *caam_alg = - container_of(alg, struct caam_aead_alg, aead); + container_of(alg, struct caam_aead_alg, aead.base); struct caam_ctx *ctx = crypto_aead_ctx_dma(tfm); crypto_aead_set_reqsize(tfm, sizeof(struct caam_aead_req_ctx)); - ctx->enginectx.op.do_one_request = aead_do_one_req; - return caam_init_common(ctx, &caam_alg->caam, !caam_alg->caam.nodkp); } @@ -3490,20 +3694,20 @@ void caam_algapi_exit(void) struct caam_aead_alg *t_alg = driver_aeads + i; if (t_alg->registered) - crypto_unregister_aead(&t_alg->aead); + crypto_engine_unregister_aead(&t_alg->aead); } for (i = 0; i < ARRAY_SIZE(driver_algs); i++) { struct caam_skcipher_alg *t_alg = driver_algs + i; if (t_alg->registered) - crypto_unregister_skcipher(&t_alg->skcipher); + crypto_engine_unregister_skcipher(&t_alg->skcipher); } } static void caam_skcipher_alg_init(struct caam_skcipher_alg *t_alg) { - struct skcipher_alg *alg = &t_alg->skcipher; + struct skcipher_alg *alg = &t_alg->skcipher.base; alg->base.cra_module = THIS_MODULE; alg->base.cra_priority = CAAM_CRA_PRIORITY; @@ -3517,7 +3721,7 @@ static void caam_skcipher_alg_init(struct caam_skcipher_alg *t_alg) static void caam_aead_alg_init(struct caam_aead_alg *t_alg) { - struct aead_alg *alg = &t_alg->aead; + struct aead_alg *alg = &t_alg->aead.base; alg->base.cra_module = THIS_MODULE; alg->base.cra_priority = CAAM_CRA_PRIORITY; @@ -3607,10 +3811,10 @@ int caam_algapi_init(struct device *ctrldev) caam_skcipher_alg_init(t_alg); - err = crypto_register_skcipher(&t_alg->skcipher); + err = crypto_engine_register_skcipher(&t_alg->skcipher); if (err) { pr_warn("%s alg registration failed\n", - t_alg->skcipher.base.cra_driver_name); + t_alg->skcipher.base.base.cra_driver_name); continue; } @@ -3654,15 +3858,15 @@ int caam_algapi_init(struct device *ctrldev) * if MD or MD size is not supported by device. */ if (is_mdha(c2_alg_sel) && - (!md_inst || t_alg->aead.maxauthsize > md_limit)) + (!md_inst || t_alg->aead.base.maxauthsize > md_limit)) continue; caam_aead_alg_init(t_alg); - err = crypto_register_aead(&t_alg->aead); + err = crypto_engine_register_aead(&t_alg->aead); if (err) { pr_warn("%s alg registration failed\n", - t_alg->aead.base.cra_driver_name); + t_alg->aead.base.base.cra_driver_name); continue; } diff --git a/drivers/crypto/caam/caamhash.c b/drivers/crypto/caam/caamhash.c index 9ef25387f6b6..290c8500c247 100644 --- a/drivers/crypto/caam/caamhash.c +++ b/drivers/crypto/caam/caamhash.c @@ -66,8 +66,12 @@ #include "key_gen.h" #include "caamhash_desc.h" #include +#include #include +#include #include +#include +#include #define CAAM_CRA_PRIORITY 3000 @@ -89,7 +93,6 @@ static struct list_head hash_list; /* ahash per-session context */ struct caam_hash_ctx { - struct crypto_engine_ctx enginectx; u32 sh_desc_update[DESC_HASH_MAX_USED_LEN] ____cacheline_aligned; u32 sh_desc_update_first[DESC_HASH_MAX_USED_LEN] ____cacheline_aligned; u32 sh_desc_fin[DESC_HASH_MAX_USED_LEN] ____cacheline_aligned; @@ -1750,7 +1753,7 @@ static struct caam_hash_template driver_hash[] = { struct caam_hash_alg { struct list_head entry; int alg_type; - struct ahash_alg ahash_alg; + struct ahash_engine_alg ahash_alg; }; static int caam_hash_cra_init(struct crypto_tfm *tfm) @@ -1762,7 +1765,7 @@ static int caam_hash_cra_init(struct crypto_tfm *tfm) struct ahash_alg *alg = container_of(halg, struct ahash_alg, halg); struct caam_hash_alg *caam_hash = - container_of(alg, struct caam_hash_alg, ahash_alg); + container_of(alg, struct caam_hash_alg, ahash_alg.base); struct caam_hash_ctx *ctx = crypto_ahash_ctx_dma(ahash); /* Sizes for MDHA running digests: MD5, SHA1, 224, 256, 384, 512 */ static const u8 runninglen[] = { HASH_MSG_LEN + MD5_DIGEST_SIZE, @@ -1853,8 +1856,6 @@ static int caam_hash_cra_init(struct crypto_tfm *tfm) sh_desc_digest) - sh_desc_update_offset; - ctx->enginectx.op.do_one_request = ahash_do_one_req; - crypto_ahash_set_reqsize_dma(ahash, sizeof(struct caam_hash_state)); /* @@ -1887,7 +1888,7 @@ void caam_algapi_hash_exit(void) return; list_for_each_entry_safe(t_alg, n, &hash_list, entry) { - crypto_unregister_ahash(&t_alg->ahash_alg); + crypto_engine_unregister_ahash(&t_alg->ahash_alg); list_del(&t_alg->entry); kfree(t_alg); } @@ -1905,8 +1906,8 @@ caam_hash_alloc(struct caam_hash_template *template, if (!t_alg) return ERR_PTR(-ENOMEM); - t_alg->ahash_alg = template->template_ahash; - halg = &t_alg->ahash_alg; + t_alg->ahash_alg.base = template->template_ahash; + halg = &t_alg->ahash_alg.base; alg = &halg->halg.base; if (keyed) { @@ -1919,7 +1920,7 @@ caam_hash_alloc(struct caam_hash_template *template, template->name); snprintf(alg->cra_driver_name, CRYPTO_MAX_ALG_NAME, "%s", template->driver_name); - t_alg->ahash_alg.setkey = NULL; + halg->setkey = NULL; } alg->cra_module = THIS_MODULE; alg->cra_init = caam_hash_cra_init; @@ -1931,6 +1932,7 @@ caam_hash_alloc(struct caam_hash_template *template, alg->cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_ALLOCATES_MEMORY; t_alg->alg_type = template->alg_type; + t_alg->ahash_alg.op.do_one_request = ahash_do_one_req; return t_alg; } @@ -1992,10 +1994,10 @@ int caam_algapi_hash_init(struct device *ctrldev) continue; } - err = crypto_register_ahash(&t_alg->ahash_alg); + err = crypto_engine_register_ahash(&t_alg->ahash_alg); if (err) { pr_warn("%s alg registration failed: %d\n", - t_alg->ahash_alg.halg.base.cra_driver_name, + t_alg->ahash_alg.base.halg.base.cra_driver_name, err); kfree(t_alg); } else @@ -2012,10 +2014,10 @@ int caam_algapi_hash_init(struct device *ctrldev) continue; } - err = crypto_register_ahash(&t_alg->ahash_alg); + err = crypto_engine_register_ahash(&t_alg->ahash_alg); if (err) { pr_warn("%s alg registration failed: %d\n", - t_alg->ahash_alg.halg.base.cra_driver_name, + t_alg->ahash_alg.base.halg.base.cra_driver_name, err); kfree(t_alg); } else diff --git a/drivers/crypto/caam/caampkc.c b/drivers/crypto/caam/caampkc.c index 1809c97d04be..887a5f2fb927 100644 --- a/drivers/crypto/caam/caampkc.c +++ b/drivers/crypto/caam/caampkc.c @@ -18,7 +18,10 @@ #include "caampkc.h" #include #include +#include #include +#include +#include #define DESC_RSA_PUB_LEN (2 * CAAM_CMD_SZ + SIZEOF_RSA_PUB_PDB) #define DESC_RSA_PRIV_F1_LEN (2 * CAAM_CMD_SZ + \ @@ -39,7 +42,7 @@ static u8 *zero_buffer; static bool init_done; struct caam_akcipher_alg { - struct akcipher_alg akcipher; + struct akcipher_engine_alg akcipher; bool registered; }; @@ -1124,8 +1127,6 @@ static int caam_rsa_init_tfm(struct crypto_akcipher *tfm) return -ENOMEM; } - ctx->enginectx.op.do_one_request = akcipher_do_one_req; - return 0; } @@ -1142,7 +1143,7 @@ static void caam_rsa_exit_tfm(struct crypto_akcipher *tfm) } static struct caam_akcipher_alg caam_rsa = { - .akcipher = { + .akcipher.base = { .encrypt = caam_rsa_enc, .decrypt = caam_rsa_dec, .set_pub_key = caam_rsa_set_pub_key, @@ -1158,7 +1159,10 @@ static struct caam_akcipher_alg caam_rsa = { .cra_ctxsize = sizeof(struct caam_rsa_ctx) + CRYPTO_DMA_PADDING, }, - } + }, + .akcipher.op = { + .do_one_request = akcipher_do_one_req, + }, }; /* Public Key Cryptography module initialization handler */ @@ -1196,12 +1200,12 @@ int caam_pkc_init(struct device *ctrldev) if (!zero_buffer) return -ENOMEM; - err = crypto_register_akcipher(&caam_rsa.akcipher); + err = crypto_engine_register_akcipher(&caam_rsa.akcipher); if (err) { kfree(zero_buffer); dev_warn(ctrldev, "%s alg registration failed\n", - caam_rsa.akcipher.base.cra_driver_name); + caam_rsa.akcipher.base.base.cra_driver_name); } else { init_done = true; caam_rsa.registered = true; @@ -1217,7 +1221,7 @@ void caam_pkc_exit(void) return; if (caam_rsa.registered) - crypto_unregister_akcipher(&caam_rsa.akcipher); + crypto_engine_unregister_akcipher(&caam_rsa.akcipher); kfree(zero_buffer); } diff --git a/drivers/crypto/caam/caampkc.h b/drivers/crypto/caam/caampkc.h index cc889a525e2f..96d03704c9be 100644 --- a/drivers/crypto/caam/caampkc.h +++ b/drivers/crypto/caam/caampkc.h @@ -12,7 +12,6 @@ #define _PKC_DESC_H_ #include "compat.h" #include "pdb.h" -#include /** * caam_priv_key_form - CAAM RSA private key representation @@ -88,13 +87,11 @@ struct caam_rsa_key { /** * caam_rsa_ctx - per session context. - * @enginectx : crypto engine context * @key : RSA key in DMA zone * @dev : device structure * @padding_dma : dma address of padding, for adding it to the input */ struct caam_rsa_ctx { - struct crypto_engine_ctx enginectx; struct caam_rsa_key key; struct device *dev; dma_addr_t padding_dma; From 67b7702c5b03b89ca196c5bd137407509b397049 Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Sun, 13 Aug 2023 14:55:04 +0800 Subject: [PATCH 524/656] crypto: sl3516 - Use new crypto_engine_op interface Use the new crypto_engine_op interface where the callback is stored in the algorithm object. Signed-off-by: Herbert Xu --- drivers/crypto/gemini/sl3516-ce-cipher.c | 20 +++++----- drivers/crypto/gemini/sl3516-ce-core.c | 49 +++++++++++++++--------- drivers/crypto/gemini/sl3516-ce.h | 8 +--- 3 files changed, 43 insertions(+), 34 deletions(-) diff --git a/drivers/crypto/gemini/sl3516-ce-cipher.c b/drivers/crypto/gemini/sl3516-ce-cipher.c index 0232f847785a..49dce9e0a834 100644 --- a/drivers/crypto/gemini/sl3516-ce-cipher.c +++ b/drivers/crypto/gemini/sl3516-ce-cipher.c @@ -8,13 +8,17 @@ * ECB mode. */ -#include +#include +#include +#include #include #include +#include #include +#include #include -#include -#include +#include +#include #include "sl3516-ce.h" /* sl3516_ce_need_fallback - check if a request can be handled by the CE */ @@ -105,7 +109,7 @@ static int sl3516_ce_cipher_fallback(struct skcipher_request *areq) struct sl3516_ce_alg_template *algt; int err; - algt = container_of(alg, struct sl3516_ce_alg_template, alg.skcipher); + algt = container_of(alg, struct sl3516_ce_alg_template, alg.skcipher.base); algt->stat_fb++; skcipher_request_set_tfm(&rctx->fallback_req, op->fallback_tfm); @@ -136,7 +140,7 @@ static int sl3516_ce_cipher(struct skcipher_request *areq) int err = 0; int i; - algt = container_of(alg, struct sl3516_ce_alg_template, alg.skcipher); + algt = container_of(alg, struct sl3516_ce_alg_template, alg.skcipher.base); dev_dbg(ce->dev, "%s %s %u %x IV(%p %u) key=%u\n", __func__, crypto_tfm_alg_name(areq->base.tfm), @@ -258,7 +262,7 @@ theend: return err; } -static int sl3516_ce_handle_cipher_request(struct crypto_engine *engine, void *areq) +int sl3516_ce_handle_cipher_request(struct crypto_engine *engine, void *areq) { int err; struct skcipher_request *breq = container_of(areq, struct skcipher_request, base); @@ -318,7 +322,7 @@ int sl3516_ce_cipher_init(struct crypto_tfm *tfm) memset(op, 0, sizeof(struct sl3516_ce_cipher_tfm_ctx)); - algt = container_of(alg, struct sl3516_ce_alg_template, alg.skcipher); + algt = container_of(alg, struct sl3516_ce_alg_template, alg.skcipher.base); op->ce = algt->ce; op->fallback_tfm = crypto_alloc_skcipher(name, 0, CRYPTO_ALG_NEED_FALLBACK); @@ -335,8 +339,6 @@ int sl3516_ce_cipher_init(struct crypto_tfm *tfm) crypto_tfm_alg_driver_name(&sktfm->base), crypto_tfm_alg_driver_name(crypto_skcipher_tfm(op->fallback_tfm))); - op->enginectx.op.do_one_request = sl3516_ce_handle_cipher_request; - err = pm_runtime_get_sync(op->ce->dev); if (err < 0) goto error_pm; diff --git a/drivers/crypto/gemini/sl3516-ce-core.c b/drivers/crypto/gemini/sl3516-ce-core.c index b7524b649068..0fd47ab9df5c 100644 --- a/drivers/crypto/gemini/sl3516-ce-core.c +++ b/drivers/crypto/gemini/sl3516-ce-core.c @@ -6,22 +6,25 @@ * * Core file which registers crypto algorithms supported by the CryptoEngine */ + +#include +#include +#include #include -#include #include #include #include +#include #include #include #include +#include #include #include #include #include #include #include -#include -#include #include "sl3516-ce.h" @@ -217,7 +220,7 @@ static struct sl3516_ce_alg_template ce_algs[] = { { .type = CRYPTO_ALG_TYPE_SKCIPHER, .mode = ECB_AES, - .alg.skcipher = { + .alg.skcipher.base = { .base = { .cra_name = "ecb(aes)", .cra_driver_name = "ecb-aes-sl3516", @@ -236,11 +239,13 @@ static struct sl3516_ce_alg_template ce_algs[] = { .setkey = sl3516_ce_aes_setkey, .encrypt = sl3516_ce_skencrypt, .decrypt = sl3516_ce_skdecrypt, - } + }, + .alg.skcipher.op = { + .do_one_request = sl3516_ce_handle_cipher_request, + }, }, }; -#ifdef CONFIG_CRYPTO_DEV_SL3516_DEBUG static int sl3516_ce_debugfs_show(struct seq_file *seq, void *v) { struct sl3516_ce_dev *ce = seq->private; @@ -264,8 +269,8 @@ static int sl3516_ce_debugfs_show(struct seq_file *seq, void *v) switch (ce_algs[i].type) { case CRYPTO_ALG_TYPE_SKCIPHER: seq_printf(seq, "%s %s reqs=%lu fallback=%lu\n", - ce_algs[i].alg.skcipher.base.cra_driver_name, - ce_algs[i].alg.skcipher.base.cra_name, + ce_algs[i].alg.skcipher.base.base.cra_driver_name, + ce_algs[i].alg.skcipher.base.base.cra_name, ce_algs[i].stat_req, ce_algs[i].stat_fb); break; } @@ -274,7 +279,6 @@ static int sl3516_ce_debugfs_show(struct seq_file *seq, void *v) } DEFINE_SHOW_ATTRIBUTE(sl3516_ce_debugfs); -#endif static int sl3516_ce_register_algs(struct sl3516_ce_dev *ce) { @@ -286,11 +290,11 @@ static int sl3516_ce_register_algs(struct sl3516_ce_dev *ce) switch (ce_algs[i].type) { case CRYPTO_ALG_TYPE_SKCIPHER: dev_info(ce->dev, "DEBUG: Register %s\n", - ce_algs[i].alg.skcipher.base.cra_name); - err = crypto_register_skcipher(&ce_algs[i].alg.skcipher); + ce_algs[i].alg.skcipher.base.base.cra_name); + err = crypto_engine_register_skcipher(&ce_algs[i].alg.skcipher); if (err) { dev_err(ce->dev, "Fail to register %s\n", - ce_algs[i].alg.skcipher.base.cra_name); + ce_algs[i].alg.skcipher.base.base.cra_name); ce_algs[i].ce = NULL; return err; } @@ -313,8 +317,8 @@ static void sl3516_ce_unregister_algs(struct sl3516_ce_dev *ce) switch (ce_algs[i].type) { case CRYPTO_ALG_TYPE_SKCIPHER: dev_info(ce->dev, "Unregister %d %s\n", i, - ce_algs[i].alg.skcipher.base.cra_name); - crypto_unregister_skcipher(&ce_algs[i].alg.skcipher); + ce_algs[i].alg.skcipher.base.base.cra_name); + crypto_engine_unregister_skcipher(&ce_algs[i].alg.skcipher); break; } } @@ -473,13 +477,20 @@ static int sl3516_ce_probe(struct platform_device *pdev) pm_runtime_put_sync(ce->dev); + if (IS_ENABLED(CONFIG_CRYPTO_DEV_SL3516_DEBUG)) { + struct dentry *dbgfs_dir __maybe_unused; + struct dentry *dbgfs_stats __maybe_unused; + + /* Ignore error of debugfs */ + dbgfs_dir = debugfs_create_dir("sl3516", NULL); + dbgfs_stats = debugfs_create_file("stats", 0444, + dbgfs_dir, ce, + &sl3516_ce_debugfs_fops); #ifdef CONFIG_CRYPTO_DEV_SL3516_DEBUG - /* Ignore error of debugfs */ - ce->dbgfs_dir = debugfs_create_dir("sl3516", NULL); - ce->dbgfs_stats = debugfs_create_file("stats", 0444, - ce->dbgfs_dir, ce, - &sl3516_ce_debugfs_fops); + ce->dbgfs_dir = dbgfs_dir; + ce->dbgfs_stats = dbgfs_stats; #endif + } return 0; error_pmuse: diff --git a/drivers/crypto/gemini/sl3516-ce.h b/drivers/crypto/gemini/sl3516-ce.h index 4c0ec6c920d1..9e1a7e7f8961 100644 --- a/drivers/crypto/gemini/sl3516-ce.h +++ b/drivers/crypto/gemini/sl3516-ce.h @@ -17,7 +17,6 @@ #include #include #include -#include #include #include @@ -292,16 +291,12 @@ struct sl3516_ce_cipher_req_ctx { /* * struct sl3516_ce_cipher_tfm_ctx - context for a skcipher TFM - * @enginectx: crypto_engine used by this TFM * @key: pointer to key data * @keylen: len of the key * @ce: pointer to the private data of driver handling this TFM * @fallback_tfm: pointer to the fallback TFM - * - * enginectx must be the first element */ struct sl3516_ce_cipher_tfm_ctx { - struct crypto_engine_ctx enginectx; u32 *key; u32 keylen; struct sl3516_ce_dev *ce; @@ -324,7 +319,7 @@ struct sl3516_ce_alg_template { u32 mode; struct sl3516_ce_dev *ce; union { - struct skcipher_alg skcipher; + struct skcipher_engine_alg skcipher; } alg; unsigned long stat_req; unsigned long stat_fb; @@ -345,3 +340,4 @@ int sl3516_ce_run_task(struct sl3516_ce_dev *ce, int sl3516_ce_rng_register(struct sl3516_ce_dev *ce); void sl3516_ce_rng_unregister(struct sl3516_ce_dev *ce); +int sl3516_ce_handle_cipher_request(struct crypto_engine *engine, void *areq); From 530d7b009d8cd66a009f13090a7fff1764b3936c Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Sun, 13 Aug 2023 14:55:06 +0800 Subject: [PATCH 525/656] crypto: keembay - Use new crypto_engine_op interface Use the new crypto_engine_op interface where the callback is stored in the algorithm object. Signed-off-by: Herbert Xu --- .../intel/keembay/keembay-ocs-aes-core.c | 427 +++++++++--------- .../crypto/intel/keembay/keembay-ocs-ecc.c | 71 ++- .../intel/keembay/keembay-ocs-hcu-core.c | 232 +++++----- 3 files changed, 360 insertions(+), 370 deletions(-) diff --git a/drivers/crypto/intel/keembay/keembay-ocs-aes-core.c b/drivers/crypto/intel/keembay/keembay-ocs-aes-core.c index f94f48289683..1e2fd9a754ec 100644 --- a/drivers/crypto/intel/keembay/keembay-ocs-aes-core.c +++ b/drivers/crypto/intel/keembay/keembay-ocs-aes-core.c @@ -5,24 +5,23 @@ * Copyright (C) 2018-2020 Intel Corporation */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - #include #include #include -#include - #include #include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include #include "ocs-aes.h" @@ -38,7 +37,6 @@ /** * struct ocs_aes_tctx - OCS AES Transform context - * @engine_ctx: Engine context. * @aes_dev: The OCS AES device. * @key: AES/SM4 key. * @key_len: The length (in bytes) of @key. @@ -47,7 +45,6 @@ * @use_fallback: Whether or not fallback cipher should be used. */ struct ocs_aes_tctx { - struct crypto_engine_ctx engine_ctx; struct ocs_aes_dev *aes_dev; u8 key[OCS_AES_KEYSIZE_256]; unsigned int key_len; @@ -1148,13 +1145,6 @@ static int kmb_ocs_sm4_ccm_decrypt(struct aead_request *req) return kmb_ocs_aead_common(req, OCS_SM4, OCS_DECRYPT, OCS_MODE_CCM); } -static inline int ocs_common_init(struct ocs_aes_tctx *tctx) -{ - tctx->engine_ctx.op.do_one_request = kmb_ocs_aes_sk_do_one_request; - - return 0; -} - static int ocs_aes_init_tfm(struct crypto_skcipher *tfm) { const char *alg_name = crypto_tfm_alg_name(&tfm->base); @@ -1170,16 +1160,14 @@ static int ocs_aes_init_tfm(struct crypto_skcipher *tfm) crypto_skcipher_set_reqsize(tfm, sizeof(struct ocs_aes_rctx)); - return ocs_common_init(tctx); + return 0; } static int ocs_sm4_init_tfm(struct crypto_skcipher *tfm) { - struct ocs_aes_tctx *tctx = crypto_skcipher_ctx(tfm); - crypto_skcipher_set_reqsize(tfm, sizeof(struct ocs_aes_rctx)); - return ocs_common_init(tctx); + return 0; } static inline void clear_key(struct ocs_aes_tctx *tctx) @@ -1204,13 +1192,6 @@ static void ocs_exit_tfm(struct crypto_skcipher *tfm) } } -static inline int ocs_common_aead_init(struct ocs_aes_tctx *tctx) -{ - tctx->engine_ctx.op.do_one_request = kmb_ocs_aes_aead_do_one_request; - - return 0; -} - static int ocs_aes_aead_cra_init(struct crypto_aead *tfm) { const char *alg_name = crypto_tfm_alg_name(&tfm->base); @@ -1229,7 +1210,7 @@ static int ocs_aes_aead_cra_init(struct crypto_aead *tfm) (sizeof(struct aead_request) + crypto_aead_reqsize(tctx->sw_cipher.aead)))); - return ocs_common_aead_init(tctx); + return 0; } static int kmb_ocs_aead_ccm_setauthsize(struct crypto_aead *tfm, @@ -1257,11 +1238,9 @@ static int kmb_ocs_aead_gcm_setauthsize(struct crypto_aead *tfm, static int ocs_sm4_aead_cra_init(struct crypto_aead *tfm) { - struct ocs_aes_tctx *tctx = crypto_aead_ctx(tfm); - crypto_aead_set_reqsize(tfm, sizeof(struct ocs_aes_rctx)); - return ocs_common_aead_init(tctx); + return 0; } static void ocs_aead_cra_exit(struct crypto_aead *tfm) @@ -1276,182 +1255,190 @@ static void ocs_aead_cra_exit(struct crypto_aead *tfm) } } -static struct skcipher_alg algs[] = { +static struct skcipher_engine_alg algs[] = { #ifdef CONFIG_CRYPTO_DEV_KEEMBAY_OCS_AES_SM4_ECB { - .base.cra_name = "ecb(aes)", - .base.cra_driver_name = "ecb-aes-keembay-ocs", - .base.cra_priority = KMB_OCS_PRIORITY, - .base.cra_flags = CRYPTO_ALG_ASYNC | - CRYPTO_ALG_KERN_DRIVER_ONLY | - CRYPTO_ALG_NEED_FALLBACK, - .base.cra_blocksize = AES_BLOCK_SIZE, - .base.cra_ctxsize = sizeof(struct ocs_aes_tctx), - .base.cra_module = THIS_MODULE, - .base.cra_alignmask = 0, + .base.base.cra_name = "ecb(aes)", + .base.base.cra_driver_name = "ecb-aes-keembay-ocs", + .base.base.cra_priority = KMB_OCS_PRIORITY, + .base.base.cra_flags = CRYPTO_ALG_ASYNC | + CRYPTO_ALG_KERN_DRIVER_ONLY | + CRYPTO_ALG_NEED_FALLBACK, + .base.base.cra_blocksize = AES_BLOCK_SIZE, + .base.base.cra_ctxsize = sizeof(struct ocs_aes_tctx), + .base.base.cra_module = THIS_MODULE, + .base.base.cra_alignmask = 0, - .min_keysize = OCS_AES_MIN_KEY_SIZE, - .max_keysize = OCS_AES_MAX_KEY_SIZE, - .setkey = kmb_ocs_aes_set_key, - .encrypt = kmb_ocs_aes_ecb_encrypt, - .decrypt = kmb_ocs_aes_ecb_decrypt, - .init = ocs_aes_init_tfm, - .exit = ocs_exit_tfm, + .base.min_keysize = OCS_AES_MIN_KEY_SIZE, + .base.max_keysize = OCS_AES_MAX_KEY_SIZE, + .base.setkey = kmb_ocs_aes_set_key, + .base.encrypt = kmb_ocs_aes_ecb_encrypt, + .base.decrypt = kmb_ocs_aes_ecb_decrypt, + .base.init = ocs_aes_init_tfm, + .base.exit = ocs_exit_tfm, + .op.do_one_request = kmb_ocs_aes_sk_do_one_request, }, #endif /* CONFIG_CRYPTO_DEV_KEEMBAY_OCS_AES_SM4_ECB */ { - .base.cra_name = "cbc(aes)", - .base.cra_driver_name = "cbc-aes-keembay-ocs", - .base.cra_priority = KMB_OCS_PRIORITY, - .base.cra_flags = CRYPTO_ALG_ASYNC | - CRYPTO_ALG_KERN_DRIVER_ONLY | - CRYPTO_ALG_NEED_FALLBACK, - .base.cra_blocksize = AES_BLOCK_SIZE, - .base.cra_ctxsize = sizeof(struct ocs_aes_tctx), - .base.cra_module = THIS_MODULE, - .base.cra_alignmask = 0, + .base.base.cra_name = "cbc(aes)", + .base.base.cra_driver_name = "cbc-aes-keembay-ocs", + .base.base.cra_priority = KMB_OCS_PRIORITY, + .base.base.cra_flags = CRYPTO_ALG_ASYNC | + CRYPTO_ALG_KERN_DRIVER_ONLY | + CRYPTO_ALG_NEED_FALLBACK, + .base.base.cra_blocksize = AES_BLOCK_SIZE, + .base.base.cra_ctxsize = sizeof(struct ocs_aes_tctx), + .base.base.cra_module = THIS_MODULE, + .base.base.cra_alignmask = 0, - .min_keysize = OCS_AES_MIN_KEY_SIZE, - .max_keysize = OCS_AES_MAX_KEY_SIZE, - .ivsize = AES_BLOCK_SIZE, - .setkey = kmb_ocs_aes_set_key, - .encrypt = kmb_ocs_aes_cbc_encrypt, - .decrypt = kmb_ocs_aes_cbc_decrypt, - .init = ocs_aes_init_tfm, - .exit = ocs_exit_tfm, + .base.min_keysize = OCS_AES_MIN_KEY_SIZE, + .base.max_keysize = OCS_AES_MAX_KEY_SIZE, + .base.ivsize = AES_BLOCK_SIZE, + .base.setkey = kmb_ocs_aes_set_key, + .base.encrypt = kmb_ocs_aes_cbc_encrypt, + .base.decrypt = kmb_ocs_aes_cbc_decrypt, + .base.init = ocs_aes_init_tfm, + .base.exit = ocs_exit_tfm, + .op.do_one_request = kmb_ocs_aes_sk_do_one_request, }, { - .base.cra_name = "ctr(aes)", - .base.cra_driver_name = "ctr-aes-keembay-ocs", - .base.cra_priority = KMB_OCS_PRIORITY, - .base.cra_flags = CRYPTO_ALG_ASYNC | - CRYPTO_ALG_KERN_DRIVER_ONLY | - CRYPTO_ALG_NEED_FALLBACK, - .base.cra_blocksize = 1, - .base.cra_ctxsize = sizeof(struct ocs_aes_tctx), - .base.cra_module = THIS_MODULE, - .base.cra_alignmask = 0, + .base.base.cra_name = "ctr(aes)", + .base.base.cra_driver_name = "ctr-aes-keembay-ocs", + .base.base.cra_priority = KMB_OCS_PRIORITY, + .base.base.cra_flags = CRYPTO_ALG_ASYNC | + CRYPTO_ALG_KERN_DRIVER_ONLY | + CRYPTO_ALG_NEED_FALLBACK, + .base.base.cra_blocksize = 1, + .base.base.cra_ctxsize = sizeof(struct ocs_aes_tctx), + .base.base.cra_module = THIS_MODULE, + .base.base.cra_alignmask = 0, - .min_keysize = OCS_AES_MIN_KEY_SIZE, - .max_keysize = OCS_AES_MAX_KEY_SIZE, - .ivsize = AES_BLOCK_SIZE, - .setkey = kmb_ocs_aes_set_key, - .encrypt = kmb_ocs_aes_ctr_encrypt, - .decrypt = kmb_ocs_aes_ctr_decrypt, - .init = ocs_aes_init_tfm, - .exit = ocs_exit_tfm, + .base.min_keysize = OCS_AES_MIN_KEY_SIZE, + .base.max_keysize = OCS_AES_MAX_KEY_SIZE, + .base.ivsize = AES_BLOCK_SIZE, + .base.setkey = kmb_ocs_aes_set_key, + .base.encrypt = kmb_ocs_aes_ctr_encrypt, + .base.decrypt = kmb_ocs_aes_ctr_decrypt, + .base.init = ocs_aes_init_tfm, + .base.exit = ocs_exit_tfm, + .op.do_one_request = kmb_ocs_aes_sk_do_one_request, }, #ifdef CONFIG_CRYPTO_DEV_KEEMBAY_OCS_AES_SM4_CTS { - .base.cra_name = "cts(cbc(aes))", - .base.cra_driver_name = "cts-aes-keembay-ocs", - .base.cra_priority = KMB_OCS_PRIORITY, - .base.cra_flags = CRYPTO_ALG_ASYNC | - CRYPTO_ALG_KERN_DRIVER_ONLY | - CRYPTO_ALG_NEED_FALLBACK, - .base.cra_blocksize = AES_BLOCK_SIZE, - .base.cra_ctxsize = sizeof(struct ocs_aes_tctx), - .base.cra_module = THIS_MODULE, - .base.cra_alignmask = 0, + .base.base.cra_name = "cts(cbc(aes))", + .base.base.cra_driver_name = "cts-aes-keembay-ocs", + .base.base.cra_priority = KMB_OCS_PRIORITY, + .base.base.cra_flags = CRYPTO_ALG_ASYNC | + CRYPTO_ALG_KERN_DRIVER_ONLY | + CRYPTO_ALG_NEED_FALLBACK, + .base.base.cra_blocksize = AES_BLOCK_SIZE, + .base.base.cra_ctxsize = sizeof(struct ocs_aes_tctx), + .base.base.cra_module = THIS_MODULE, + .base.base.cra_alignmask = 0, - .min_keysize = OCS_AES_MIN_KEY_SIZE, - .max_keysize = OCS_AES_MAX_KEY_SIZE, - .ivsize = AES_BLOCK_SIZE, - .setkey = kmb_ocs_aes_set_key, - .encrypt = kmb_ocs_aes_cts_encrypt, - .decrypt = kmb_ocs_aes_cts_decrypt, - .init = ocs_aes_init_tfm, - .exit = ocs_exit_tfm, + .base.min_keysize = OCS_AES_MIN_KEY_SIZE, + .base.max_keysize = OCS_AES_MAX_KEY_SIZE, + .base.ivsize = AES_BLOCK_SIZE, + .base.setkey = kmb_ocs_aes_set_key, + .base.encrypt = kmb_ocs_aes_cts_encrypt, + .base.decrypt = kmb_ocs_aes_cts_decrypt, + .base.init = ocs_aes_init_tfm, + .base.exit = ocs_exit_tfm, + .op.do_one_request = kmb_ocs_aes_sk_do_one_request, }, #endif /* CONFIG_CRYPTO_DEV_KEEMBAY_OCS_AES_SM4_CTS */ #ifdef CONFIG_CRYPTO_DEV_KEEMBAY_OCS_AES_SM4_ECB { - .base.cra_name = "ecb(sm4)", - .base.cra_driver_name = "ecb-sm4-keembay-ocs", - .base.cra_priority = KMB_OCS_PRIORITY, - .base.cra_flags = CRYPTO_ALG_ASYNC | - CRYPTO_ALG_KERN_DRIVER_ONLY, - .base.cra_blocksize = AES_BLOCK_SIZE, - .base.cra_ctxsize = sizeof(struct ocs_aes_tctx), - .base.cra_module = THIS_MODULE, - .base.cra_alignmask = 0, + .base.base.cra_name = "ecb(sm4)", + .base.base.cra_driver_name = "ecb-sm4-keembay-ocs", + .base.base.cra_priority = KMB_OCS_PRIORITY, + .base.base.cra_flags = CRYPTO_ALG_ASYNC | + CRYPTO_ALG_KERN_DRIVER_ONLY, + .base.base.cra_blocksize = AES_BLOCK_SIZE, + .base.base.cra_ctxsize = sizeof(struct ocs_aes_tctx), + .base.base.cra_module = THIS_MODULE, + .base.base.cra_alignmask = 0, - .min_keysize = OCS_SM4_KEY_SIZE, - .max_keysize = OCS_SM4_KEY_SIZE, - .setkey = kmb_ocs_sm4_set_key, - .encrypt = kmb_ocs_sm4_ecb_encrypt, - .decrypt = kmb_ocs_sm4_ecb_decrypt, - .init = ocs_sm4_init_tfm, - .exit = ocs_exit_tfm, + .base.min_keysize = OCS_SM4_KEY_SIZE, + .base.max_keysize = OCS_SM4_KEY_SIZE, + .base.setkey = kmb_ocs_sm4_set_key, + .base.encrypt = kmb_ocs_sm4_ecb_encrypt, + .base.decrypt = kmb_ocs_sm4_ecb_decrypt, + .base.init = ocs_sm4_init_tfm, + .base.exit = ocs_exit_tfm, + .op.do_one_request = kmb_ocs_aes_sk_do_one_request, }, #endif /* CONFIG_CRYPTO_DEV_KEEMBAY_OCS_AES_SM4_ECB */ { - .base.cra_name = "cbc(sm4)", - .base.cra_driver_name = "cbc-sm4-keembay-ocs", - .base.cra_priority = KMB_OCS_PRIORITY, - .base.cra_flags = CRYPTO_ALG_ASYNC | - CRYPTO_ALG_KERN_DRIVER_ONLY, - .base.cra_blocksize = AES_BLOCK_SIZE, - .base.cra_ctxsize = sizeof(struct ocs_aes_tctx), - .base.cra_module = THIS_MODULE, - .base.cra_alignmask = 0, + .base.base.cra_name = "cbc(sm4)", + .base.base.cra_driver_name = "cbc-sm4-keembay-ocs", + .base.base.cra_priority = KMB_OCS_PRIORITY, + .base.base.cra_flags = CRYPTO_ALG_ASYNC | + CRYPTO_ALG_KERN_DRIVER_ONLY, + .base.base.cra_blocksize = AES_BLOCK_SIZE, + .base.base.cra_ctxsize = sizeof(struct ocs_aes_tctx), + .base.base.cra_module = THIS_MODULE, + .base.base.cra_alignmask = 0, - .min_keysize = OCS_SM4_KEY_SIZE, - .max_keysize = OCS_SM4_KEY_SIZE, - .ivsize = AES_BLOCK_SIZE, - .setkey = kmb_ocs_sm4_set_key, - .encrypt = kmb_ocs_sm4_cbc_encrypt, - .decrypt = kmb_ocs_sm4_cbc_decrypt, - .init = ocs_sm4_init_tfm, - .exit = ocs_exit_tfm, + .base.min_keysize = OCS_SM4_KEY_SIZE, + .base.max_keysize = OCS_SM4_KEY_SIZE, + .base.ivsize = AES_BLOCK_SIZE, + .base.setkey = kmb_ocs_sm4_set_key, + .base.encrypt = kmb_ocs_sm4_cbc_encrypt, + .base.decrypt = kmb_ocs_sm4_cbc_decrypt, + .base.init = ocs_sm4_init_tfm, + .base.exit = ocs_exit_tfm, + .op.do_one_request = kmb_ocs_aes_sk_do_one_request, }, { - .base.cra_name = "ctr(sm4)", - .base.cra_driver_name = "ctr-sm4-keembay-ocs", - .base.cra_priority = KMB_OCS_PRIORITY, - .base.cra_flags = CRYPTO_ALG_ASYNC | - CRYPTO_ALG_KERN_DRIVER_ONLY, - .base.cra_blocksize = 1, - .base.cra_ctxsize = sizeof(struct ocs_aes_tctx), - .base.cra_module = THIS_MODULE, - .base.cra_alignmask = 0, + .base.base.cra_name = "ctr(sm4)", + .base.base.cra_driver_name = "ctr-sm4-keembay-ocs", + .base.base.cra_priority = KMB_OCS_PRIORITY, + .base.base.cra_flags = CRYPTO_ALG_ASYNC | + CRYPTO_ALG_KERN_DRIVER_ONLY, + .base.base.cra_blocksize = 1, + .base.base.cra_ctxsize = sizeof(struct ocs_aes_tctx), + .base.base.cra_module = THIS_MODULE, + .base.base.cra_alignmask = 0, - .min_keysize = OCS_SM4_KEY_SIZE, - .max_keysize = OCS_SM4_KEY_SIZE, - .ivsize = AES_BLOCK_SIZE, - .setkey = kmb_ocs_sm4_set_key, - .encrypt = kmb_ocs_sm4_ctr_encrypt, - .decrypt = kmb_ocs_sm4_ctr_decrypt, - .init = ocs_sm4_init_tfm, - .exit = ocs_exit_tfm, + .base.min_keysize = OCS_SM4_KEY_SIZE, + .base.max_keysize = OCS_SM4_KEY_SIZE, + .base.ivsize = AES_BLOCK_SIZE, + .base.setkey = kmb_ocs_sm4_set_key, + .base.encrypt = kmb_ocs_sm4_ctr_encrypt, + .base.decrypt = kmb_ocs_sm4_ctr_decrypt, + .base.init = ocs_sm4_init_tfm, + .base.exit = ocs_exit_tfm, + .op.do_one_request = kmb_ocs_aes_sk_do_one_request, }, #ifdef CONFIG_CRYPTO_DEV_KEEMBAY_OCS_AES_SM4_CTS { - .base.cra_name = "cts(cbc(sm4))", - .base.cra_driver_name = "cts-sm4-keembay-ocs", - .base.cra_priority = KMB_OCS_PRIORITY, - .base.cra_flags = CRYPTO_ALG_ASYNC | - CRYPTO_ALG_KERN_DRIVER_ONLY, - .base.cra_blocksize = AES_BLOCK_SIZE, - .base.cra_ctxsize = sizeof(struct ocs_aes_tctx), - .base.cra_module = THIS_MODULE, - .base.cra_alignmask = 0, + .base.base.cra_name = "cts(cbc(sm4))", + .base.base.cra_driver_name = "cts-sm4-keembay-ocs", + .base.base.cra_priority = KMB_OCS_PRIORITY, + .base.base.cra_flags = CRYPTO_ALG_ASYNC | + CRYPTO_ALG_KERN_DRIVER_ONLY, + .base.base.cra_blocksize = AES_BLOCK_SIZE, + .base.base.cra_ctxsize = sizeof(struct ocs_aes_tctx), + .base.base.cra_module = THIS_MODULE, + .base.base.cra_alignmask = 0, - .min_keysize = OCS_SM4_KEY_SIZE, - .max_keysize = OCS_SM4_KEY_SIZE, - .ivsize = AES_BLOCK_SIZE, - .setkey = kmb_ocs_sm4_set_key, - .encrypt = kmb_ocs_sm4_cts_encrypt, - .decrypt = kmb_ocs_sm4_cts_decrypt, - .init = ocs_sm4_init_tfm, - .exit = ocs_exit_tfm, + .base.min_keysize = OCS_SM4_KEY_SIZE, + .base.max_keysize = OCS_SM4_KEY_SIZE, + .base.ivsize = AES_BLOCK_SIZE, + .base.setkey = kmb_ocs_sm4_set_key, + .base.encrypt = kmb_ocs_sm4_cts_encrypt, + .base.decrypt = kmb_ocs_sm4_cts_decrypt, + .base.init = ocs_sm4_init_tfm, + .base.exit = ocs_exit_tfm, + .op.do_one_request = kmb_ocs_aes_sk_do_one_request, } #endif /* CONFIG_CRYPTO_DEV_KEEMBAY_OCS_AES_SM4_CTS */ }; -static struct aead_alg algs_aead[] = { +static struct aead_engine_alg algs_aead[] = { { - .base = { + .base.base = { .cra_name = "gcm(aes)", .cra_driver_name = "gcm-aes-keembay-ocs", .cra_priority = KMB_OCS_PRIORITY, @@ -1463,17 +1450,18 @@ static struct aead_alg algs_aead[] = { .cra_alignmask = 0, .cra_module = THIS_MODULE, }, - .init = ocs_aes_aead_cra_init, - .exit = ocs_aead_cra_exit, - .ivsize = GCM_AES_IV_SIZE, - .maxauthsize = AES_BLOCK_SIZE, - .setauthsize = kmb_ocs_aead_gcm_setauthsize, - .setkey = kmb_ocs_aes_aead_set_key, - .encrypt = kmb_ocs_aes_gcm_encrypt, - .decrypt = kmb_ocs_aes_gcm_decrypt, + .base.init = ocs_aes_aead_cra_init, + .base.exit = ocs_aead_cra_exit, + .base.ivsize = GCM_AES_IV_SIZE, + .base.maxauthsize = AES_BLOCK_SIZE, + .base.setauthsize = kmb_ocs_aead_gcm_setauthsize, + .base.setkey = kmb_ocs_aes_aead_set_key, + .base.encrypt = kmb_ocs_aes_gcm_encrypt, + .base.decrypt = kmb_ocs_aes_gcm_decrypt, + .op.do_one_request = kmb_ocs_aes_aead_do_one_request, }, { - .base = { + .base.base = { .cra_name = "ccm(aes)", .cra_driver_name = "ccm-aes-keembay-ocs", .cra_priority = KMB_OCS_PRIORITY, @@ -1485,17 +1473,18 @@ static struct aead_alg algs_aead[] = { .cra_alignmask = 0, .cra_module = THIS_MODULE, }, - .init = ocs_aes_aead_cra_init, - .exit = ocs_aead_cra_exit, - .ivsize = AES_BLOCK_SIZE, - .maxauthsize = AES_BLOCK_SIZE, - .setauthsize = kmb_ocs_aead_ccm_setauthsize, - .setkey = kmb_ocs_aes_aead_set_key, - .encrypt = kmb_ocs_aes_ccm_encrypt, - .decrypt = kmb_ocs_aes_ccm_decrypt, + .base.init = ocs_aes_aead_cra_init, + .base.exit = ocs_aead_cra_exit, + .base.ivsize = AES_BLOCK_SIZE, + .base.maxauthsize = AES_BLOCK_SIZE, + .base.setauthsize = kmb_ocs_aead_ccm_setauthsize, + .base.setkey = kmb_ocs_aes_aead_set_key, + .base.encrypt = kmb_ocs_aes_ccm_encrypt, + .base.decrypt = kmb_ocs_aes_ccm_decrypt, + .op.do_one_request = kmb_ocs_aes_aead_do_one_request, }, { - .base = { + .base.base = { .cra_name = "gcm(sm4)", .cra_driver_name = "gcm-sm4-keembay-ocs", .cra_priority = KMB_OCS_PRIORITY, @@ -1506,17 +1495,18 @@ static struct aead_alg algs_aead[] = { .cra_alignmask = 0, .cra_module = THIS_MODULE, }, - .init = ocs_sm4_aead_cra_init, - .exit = ocs_aead_cra_exit, - .ivsize = GCM_AES_IV_SIZE, - .maxauthsize = AES_BLOCK_SIZE, - .setauthsize = kmb_ocs_aead_gcm_setauthsize, - .setkey = kmb_ocs_sm4_aead_set_key, - .encrypt = kmb_ocs_sm4_gcm_encrypt, - .decrypt = kmb_ocs_sm4_gcm_decrypt, + .base.init = ocs_sm4_aead_cra_init, + .base.exit = ocs_aead_cra_exit, + .base.ivsize = GCM_AES_IV_SIZE, + .base.maxauthsize = AES_BLOCK_SIZE, + .base.setauthsize = kmb_ocs_aead_gcm_setauthsize, + .base.setkey = kmb_ocs_sm4_aead_set_key, + .base.encrypt = kmb_ocs_sm4_gcm_encrypt, + .base.decrypt = kmb_ocs_sm4_gcm_decrypt, + .op.do_one_request = kmb_ocs_aes_aead_do_one_request, }, { - .base = { + .base.base = { .cra_name = "ccm(sm4)", .cra_driver_name = "ccm-sm4-keembay-ocs", .cra_priority = KMB_OCS_PRIORITY, @@ -1527,21 +1517,22 @@ static struct aead_alg algs_aead[] = { .cra_alignmask = 0, .cra_module = THIS_MODULE, }, - .init = ocs_sm4_aead_cra_init, - .exit = ocs_aead_cra_exit, - .ivsize = AES_BLOCK_SIZE, - .maxauthsize = AES_BLOCK_SIZE, - .setauthsize = kmb_ocs_aead_ccm_setauthsize, - .setkey = kmb_ocs_sm4_aead_set_key, - .encrypt = kmb_ocs_sm4_ccm_encrypt, - .decrypt = kmb_ocs_sm4_ccm_decrypt, + .base.init = ocs_sm4_aead_cra_init, + .base.exit = ocs_aead_cra_exit, + .base.ivsize = AES_BLOCK_SIZE, + .base.maxauthsize = AES_BLOCK_SIZE, + .base.setauthsize = kmb_ocs_aead_ccm_setauthsize, + .base.setkey = kmb_ocs_sm4_aead_set_key, + .base.encrypt = kmb_ocs_sm4_ccm_encrypt, + .base.decrypt = kmb_ocs_sm4_ccm_decrypt, + .op.do_one_request = kmb_ocs_aes_aead_do_one_request, } }; static void unregister_aes_algs(struct ocs_aes_dev *aes_dev) { - crypto_unregister_aeads(algs_aead, ARRAY_SIZE(algs_aead)); - crypto_unregister_skciphers(algs, ARRAY_SIZE(algs)); + crypto_engine_unregister_aeads(algs_aead, ARRAY_SIZE(algs_aead)); + crypto_engine_unregister_skciphers(algs, ARRAY_SIZE(algs)); } static int register_aes_algs(struct ocs_aes_dev *aes_dev) @@ -1552,13 +1543,13 @@ static int register_aes_algs(struct ocs_aes_dev *aes_dev) * If any algorithm fails to register, all preceding algorithms that * were successfully registered will be automatically unregistered. */ - ret = crypto_register_aeads(algs_aead, ARRAY_SIZE(algs_aead)); + ret = crypto_engine_register_aeads(algs_aead, ARRAY_SIZE(algs_aead)); if (ret) return ret; - ret = crypto_register_skciphers(algs, ARRAY_SIZE(algs)); + ret = crypto_engine_register_skciphers(algs, ARRAY_SIZE(algs)); if (ret) - crypto_unregister_aeads(algs_aead, ARRAY_SIZE(algs)); + crypto_engine_unregister_aeads(algs_aead, ARRAY_SIZE(algs)); return ret; } diff --git a/drivers/crypto/intel/keembay/keembay-ocs-ecc.c b/drivers/crypto/intel/keembay/keembay-ocs-ecc.c index e91e570b7ae0..fb95deed9057 100644 --- a/drivers/crypto/intel/keembay/keembay-ocs-ecc.c +++ b/drivers/crypto/intel/keembay/keembay-ocs-ecc.c @@ -7,30 +7,27 @@ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt +#include +#include +#include +#include +#include +#include +#include #include #include -#include -#include +#include #include #include #include #include #include +#include #include #include #include #include -#include -#include - -#include -#include -#include -#include -#include - -#include -#include +#include #define DRV_NAME "keembay-ocs-ecc" @@ -95,13 +92,11 @@ struct ocs_ecc_dev { /** * struct ocs_ecc_ctx - Transformation context. - * @engine_ctx: Crypto engine ctx. * @ecc_dev: The ECC driver associated with this context. * @curve: The elliptic curve used by this transformation. * @private_key: The private key. */ struct ocs_ecc_ctx { - struct crypto_engine_ctx engine_ctx; struct ocs_ecc_dev *ecc_dev; const struct ecc_curve *curve; u64 private_key[KMB_ECC_VLI_MAX_DIGITS]; @@ -794,8 +789,6 @@ static int kmb_ecc_tctx_init(struct ocs_ecc_ctx *tctx, unsigned int curve_id) if (!tctx->curve) return -EOPNOTSUPP; - tctx->engine_ctx.op.do_one_request = kmb_ocs_ecc_do_one_request; - return 0; } @@ -828,36 +821,38 @@ static unsigned int kmb_ocs_ecdh_max_size(struct crypto_kpp *tfm) return digits_to_bytes(tctx->curve->g.ndigits) * 2; } -static struct kpp_alg ocs_ecdh_p256 = { - .set_secret = kmb_ocs_ecdh_set_secret, - .generate_public_key = kmb_ocs_ecdh_generate_public_key, - .compute_shared_secret = kmb_ocs_ecdh_compute_shared_secret, - .init = kmb_ocs_ecdh_nist_p256_init_tfm, - .exit = kmb_ocs_ecdh_exit_tfm, - .max_size = kmb_ocs_ecdh_max_size, - .base = { +static struct kpp_engine_alg ocs_ecdh_p256 = { + .base.set_secret = kmb_ocs_ecdh_set_secret, + .base.generate_public_key = kmb_ocs_ecdh_generate_public_key, + .base.compute_shared_secret = kmb_ocs_ecdh_compute_shared_secret, + .base.init = kmb_ocs_ecdh_nist_p256_init_tfm, + .base.exit = kmb_ocs_ecdh_exit_tfm, + .base.max_size = kmb_ocs_ecdh_max_size, + .base.base = { .cra_name = "ecdh-nist-p256", .cra_driver_name = "ecdh-nist-p256-keembay-ocs", .cra_priority = KMB_OCS_ECC_PRIORITY, .cra_module = THIS_MODULE, .cra_ctxsize = sizeof(struct ocs_ecc_ctx), }, + .op.do_one_request = kmb_ocs_ecc_do_one_request, }; -static struct kpp_alg ocs_ecdh_p384 = { - .set_secret = kmb_ocs_ecdh_set_secret, - .generate_public_key = kmb_ocs_ecdh_generate_public_key, - .compute_shared_secret = kmb_ocs_ecdh_compute_shared_secret, - .init = kmb_ocs_ecdh_nist_p384_init_tfm, - .exit = kmb_ocs_ecdh_exit_tfm, - .max_size = kmb_ocs_ecdh_max_size, - .base = { +static struct kpp_engine_alg ocs_ecdh_p384 = { + .base.set_secret = kmb_ocs_ecdh_set_secret, + .base.generate_public_key = kmb_ocs_ecdh_generate_public_key, + .base.compute_shared_secret = kmb_ocs_ecdh_compute_shared_secret, + .base.init = kmb_ocs_ecdh_nist_p384_init_tfm, + .base.exit = kmb_ocs_ecdh_exit_tfm, + .base.max_size = kmb_ocs_ecdh_max_size, + .base.base = { .cra_name = "ecdh-nist-p384", .cra_driver_name = "ecdh-nist-p384-keembay-ocs", .cra_priority = KMB_OCS_ECC_PRIORITY, .cra_module = THIS_MODULE, .cra_ctxsize = sizeof(struct ocs_ecc_ctx), }, + .op.do_one_request = kmb_ocs_ecc_do_one_request, }; static irqreturn_t ocs_ecc_irq_handler(int irq, void *dev_id) @@ -939,14 +934,14 @@ static int kmb_ocs_ecc_probe(struct platform_device *pdev) } /* Register the KPP algo. */ - rc = crypto_register_kpp(&ocs_ecdh_p256); + rc = crypto_engine_register_kpp(&ocs_ecdh_p256); if (rc) { dev_err(dev, "Could not register OCS algorithms with Crypto API\n"); goto cleanup; } - rc = crypto_register_kpp(&ocs_ecdh_p384); + rc = crypto_engine_register_kpp(&ocs_ecdh_p384); if (rc) { dev_err(dev, "Could not register OCS algorithms with Crypto API\n"); @@ -956,7 +951,7 @@ static int kmb_ocs_ecc_probe(struct platform_device *pdev) return 0; ocs_ecdh_p384_error: - crypto_unregister_kpp(&ocs_ecdh_p256); + crypto_engine_unregister_kpp(&ocs_ecdh_p256); cleanup: crypto_engine_exit(ecc_dev->engine); @@ -975,8 +970,8 @@ static int kmb_ocs_ecc_remove(struct platform_device *pdev) ecc_dev = platform_get_drvdata(pdev); - crypto_unregister_kpp(&ocs_ecdh_p384); - crypto_unregister_kpp(&ocs_ecdh_p256); + crypto_engine_unregister_kpp(&ocs_ecdh_p384); + crypto_engine_unregister_kpp(&ocs_ecdh_p256); spin_lock(&ocs_ecc.lock); list_del(&ecc_dev->list); diff --git a/drivers/crypto/intel/keembay/keembay-ocs-hcu-core.c b/drivers/crypto/intel/keembay/keembay-ocs-hcu-core.c index 51a6de6294cb..57a20281ead8 100644 --- a/drivers/crypto/intel/keembay/keembay-ocs-hcu-core.c +++ b/drivers/crypto/intel/keembay/keembay-ocs-hcu-core.c @@ -5,19 +5,20 @@ * Copyright (C) 2018-2020 Intel Corporation */ -#include -#include -#include -#include -#include -#include - #include +#include +#include #include #include #include -#include -#include +#include +#include +#include +#include +#include +#include +#include +#include #include "ocs-hcu.h" @@ -34,7 +35,6 @@ /** * struct ocs_hcu_ctx: OCS HCU Transform context. - * @engine_ctx: Crypto Engine context. * @hcu_dev: The OCS HCU device used by the transformation. * @key: The key (used only for HMAC transformations). * @key_len: The length of the key. @@ -42,7 +42,6 @@ * @is_hmac_tfm: Whether or not this is a HMAC transformation. */ struct ocs_hcu_ctx { - struct crypto_engine_ctx engine_ctx; struct ocs_hcu_dev *hcu_dev; u8 key[SHA512_BLOCK_SIZE]; size_t key_len; @@ -824,11 +823,6 @@ static void __cra_init(struct crypto_tfm *tfm, struct ocs_hcu_ctx *ctx) { crypto_ahash_set_reqsize_dma(__crypto_ahash_cast(tfm), sizeof(struct ocs_hcu_rctx)); - - /* Init context to 0. */ - memzero_explicit(ctx, sizeof(*ctx)); - /* Set engine ops. */ - ctx->engine_ctx.op.do_one_request = kmb_ocs_hcu_do_one_request; } static int kmb_ocs_hcu_sha_cra_init(struct crypto_tfm *tfm) @@ -883,17 +877,17 @@ static void kmb_ocs_hcu_hmac_cra_exit(struct crypto_tfm *tfm) memzero_explicit(ctx->key, sizeof(ctx->key)); } -static struct ahash_alg ocs_hcu_algs[] = { +static struct ahash_engine_alg ocs_hcu_algs[] = { #ifdef CONFIG_CRYPTO_DEV_KEEMBAY_OCS_HCU_HMAC_SHA224 { - .init = kmb_ocs_hcu_init, - .update = kmb_ocs_hcu_update, - .final = kmb_ocs_hcu_final, - .finup = kmb_ocs_hcu_finup, - .digest = kmb_ocs_hcu_digest, - .export = kmb_ocs_hcu_export, - .import = kmb_ocs_hcu_import, - .halg = { + .base.init = kmb_ocs_hcu_init, + .base.update = kmb_ocs_hcu_update, + .base.final = kmb_ocs_hcu_final, + .base.finup = kmb_ocs_hcu_finup, + .base.digest = kmb_ocs_hcu_digest, + .base.export = kmb_ocs_hcu_export, + .base.import = kmb_ocs_hcu_import, + .base.halg = { .digestsize = SHA224_DIGEST_SIZE, .statesize = sizeof(struct ocs_hcu_rctx), .base = { @@ -907,18 +901,19 @@ static struct ahash_alg ocs_hcu_algs[] = { .cra_module = THIS_MODULE, .cra_init = kmb_ocs_hcu_sha_cra_init, } - } + }, + .op.do_one_request = kmb_ocs_hcu_do_one_request, }, { - .init = kmb_ocs_hcu_init, - .update = kmb_ocs_hcu_update, - .final = kmb_ocs_hcu_final, - .finup = kmb_ocs_hcu_finup, - .digest = kmb_ocs_hcu_digest, - .export = kmb_ocs_hcu_export, - .import = kmb_ocs_hcu_import, - .setkey = kmb_ocs_hcu_setkey, - .halg = { + .base.init = kmb_ocs_hcu_init, + .base.update = kmb_ocs_hcu_update, + .base.final = kmb_ocs_hcu_final, + .base.finup = kmb_ocs_hcu_finup, + .base.digest = kmb_ocs_hcu_digest, + .base.export = kmb_ocs_hcu_export, + .base.import = kmb_ocs_hcu_import, + .base.setkey = kmb_ocs_hcu_setkey, + .base.halg = { .digestsize = SHA224_DIGEST_SIZE, .statesize = sizeof(struct ocs_hcu_rctx), .base = { @@ -933,18 +928,19 @@ static struct ahash_alg ocs_hcu_algs[] = { .cra_init = kmb_ocs_hcu_hmac_cra_init, .cra_exit = kmb_ocs_hcu_hmac_cra_exit, } - } + }, + .op.do_one_request = kmb_ocs_hcu_do_one_request, }, #endif /* CONFIG_CRYPTO_DEV_KEEMBAY_OCS_HCU_HMAC_SHA224 */ { - .init = kmb_ocs_hcu_init, - .update = kmb_ocs_hcu_update, - .final = kmb_ocs_hcu_final, - .finup = kmb_ocs_hcu_finup, - .digest = kmb_ocs_hcu_digest, - .export = kmb_ocs_hcu_export, - .import = kmb_ocs_hcu_import, - .halg = { + .base.init = kmb_ocs_hcu_init, + .base.update = kmb_ocs_hcu_update, + .base.final = kmb_ocs_hcu_final, + .base.finup = kmb_ocs_hcu_finup, + .base.digest = kmb_ocs_hcu_digest, + .base.export = kmb_ocs_hcu_export, + .base.import = kmb_ocs_hcu_import, + .base.halg = { .digestsize = SHA256_DIGEST_SIZE, .statesize = sizeof(struct ocs_hcu_rctx), .base = { @@ -958,18 +954,19 @@ static struct ahash_alg ocs_hcu_algs[] = { .cra_module = THIS_MODULE, .cra_init = kmb_ocs_hcu_sha_cra_init, } - } + }, + .op.do_one_request = kmb_ocs_hcu_do_one_request, }, { - .init = kmb_ocs_hcu_init, - .update = kmb_ocs_hcu_update, - .final = kmb_ocs_hcu_final, - .finup = kmb_ocs_hcu_finup, - .digest = kmb_ocs_hcu_digest, - .export = kmb_ocs_hcu_export, - .import = kmb_ocs_hcu_import, - .setkey = kmb_ocs_hcu_setkey, - .halg = { + .base.init = kmb_ocs_hcu_init, + .base.update = kmb_ocs_hcu_update, + .base.final = kmb_ocs_hcu_final, + .base.finup = kmb_ocs_hcu_finup, + .base.digest = kmb_ocs_hcu_digest, + .base.export = kmb_ocs_hcu_export, + .base.import = kmb_ocs_hcu_import, + .base.setkey = kmb_ocs_hcu_setkey, + .base.halg = { .digestsize = SHA256_DIGEST_SIZE, .statesize = sizeof(struct ocs_hcu_rctx), .base = { @@ -984,17 +981,18 @@ static struct ahash_alg ocs_hcu_algs[] = { .cra_init = kmb_ocs_hcu_hmac_cra_init, .cra_exit = kmb_ocs_hcu_hmac_cra_exit, } - } + }, + .op.do_one_request = kmb_ocs_hcu_do_one_request, }, { - .init = kmb_ocs_hcu_init, - .update = kmb_ocs_hcu_update, - .final = kmb_ocs_hcu_final, - .finup = kmb_ocs_hcu_finup, - .digest = kmb_ocs_hcu_digest, - .export = kmb_ocs_hcu_export, - .import = kmb_ocs_hcu_import, - .halg = { + .base.init = kmb_ocs_hcu_init, + .base.update = kmb_ocs_hcu_update, + .base.final = kmb_ocs_hcu_final, + .base.finup = kmb_ocs_hcu_finup, + .base.digest = kmb_ocs_hcu_digest, + .base.export = kmb_ocs_hcu_export, + .base.import = kmb_ocs_hcu_import, + .base.halg = { .digestsize = SM3_DIGEST_SIZE, .statesize = sizeof(struct ocs_hcu_rctx), .base = { @@ -1008,18 +1006,19 @@ static struct ahash_alg ocs_hcu_algs[] = { .cra_module = THIS_MODULE, .cra_init = kmb_ocs_hcu_sm3_cra_init, } - } + }, + .op.do_one_request = kmb_ocs_hcu_do_one_request, }, { - .init = kmb_ocs_hcu_init, - .update = kmb_ocs_hcu_update, - .final = kmb_ocs_hcu_final, - .finup = kmb_ocs_hcu_finup, - .digest = kmb_ocs_hcu_digest, - .export = kmb_ocs_hcu_export, - .import = kmb_ocs_hcu_import, - .setkey = kmb_ocs_hcu_setkey, - .halg = { + .base.init = kmb_ocs_hcu_init, + .base.update = kmb_ocs_hcu_update, + .base.final = kmb_ocs_hcu_final, + .base.finup = kmb_ocs_hcu_finup, + .base.digest = kmb_ocs_hcu_digest, + .base.export = kmb_ocs_hcu_export, + .base.import = kmb_ocs_hcu_import, + .base.setkey = kmb_ocs_hcu_setkey, + .base.halg = { .digestsize = SM3_DIGEST_SIZE, .statesize = sizeof(struct ocs_hcu_rctx), .base = { @@ -1034,17 +1033,18 @@ static struct ahash_alg ocs_hcu_algs[] = { .cra_init = kmb_ocs_hcu_hmac_sm3_cra_init, .cra_exit = kmb_ocs_hcu_hmac_cra_exit, } - } + }, + .op.do_one_request = kmb_ocs_hcu_do_one_request, }, { - .init = kmb_ocs_hcu_init, - .update = kmb_ocs_hcu_update, - .final = kmb_ocs_hcu_final, - .finup = kmb_ocs_hcu_finup, - .digest = kmb_ocs_hcu_digest, - .export = kmb_ocs_hcu_export, - .import = kmb_ocs_hcu_import, - .halg = { + .base.init = kmb_ocs_hcu_init, + .base.update = kmb_ocs_hcu_update, + .base.final = kmb_ocs_hcu_final, + .base.finup = kmb_ocs_hcu_finup, + .base.digest = kmb_ocs_hcu_digest, + .base.export = kmb_ocs_hcu_export, + .base.import = kmb_ocs_hcu_import, + .base.halg = { .digestsize = SHA384_DIGEST_SIZE, .statesize = sizeof(struct ocs_hcu_rctx), .base = { @@ -1058,18 +1058,19 @@ static struct ahash_alg ocs_hcu_algs[] = { .cra_module = THIS_MODULE, .cra_init = kmb_ocs_hcu_sha_cra_init, } - } + }, + .op.do_one_request = kmb_ocs_hcu_do_one_request, }, { - .init = kmb_ocs_hcu_init, - .update = kmb_ocs_hcu_update, - .final = kmb_ocs_hcu_final, - .finup = kmb_ocs_hcu_finup, - .digest = kmb_ocs_hcu_digest, - .export = kmb_ocs_hcu_export, - .import = kmb_ocs_hcu_import, - .setkey = kmb_ocs_hcu_setkey, - .halg = { + .base.init = kmb_ocs_hcu_init, + .base.update = kmb_ocs_hcu_update, + .base.final = kmb_ocs_hcu_final, + .base.finup = kmb_ocs_hcu_finup, + .base.digest = kmb_ocs_hcu_digest, + .base.export = kmb_ocs_hcu_export, + .base.import = kmb_ocs_hcu_import, + .base.setkey = kmb_ocs_hcu_setkey, + .base.halg = { .digestsize = SHA384_DIGEST_SIZE, .statesize = sizeof(struct ocs_hcu_rctx), .base = { @@ -1084,17 +1085,18 @@ static struct ahash_alg ocs_hcu_algs[] = { .cra_init = kmb_ocs_hcu_hmac_cra_init, .cra_exit = kmb_ocs_hcu_hmac_cra_exit, } - } + }, + .op.do_one_request = kmb_ocs_hcu_do_one_request, }, { - .init = kmb_ocs_hcu_init, - .update = kmb_ocs_hcu_update, - .final = kmb_ocs_hcu_final, - .finup = kmb_ocs_hcu_finup, - .digest = kmb_ocs_hcu_digest, - .export = kmb_ocs_hcu_export, - .import = kmb_ocs_hcu_import, - .halg = { + .base.init = kmb_ocs_hcu_init, + .base.update = kmb_ocs_hcu_update, + .base.final = kmb_ocs_hcu_final, + .base.finup = kmb_ocs_hcu_finup, + .base.digest = kmb_ocs_hcu_digest, + .base.export = kmb_ocs_hcu_export, + .base.import = kmb_ocs_hcu_import, + .base.halg = { .digestsize = SHA512_DIGEST_SIZE, .statesize = sizeof(struct ocs_hcu_rctx), .base = { @@ -1108,18 +1110,19 @@ static struct ahash_alg ocs_hcu_algs[] = { .cra_module = THIS_MODULE, .cra_init = kmb_ocs_hcu_sha_cra_init, } - } + }, + .op.do_one_request = kmb_ocs_hcu_do_one_request, }, { - .init = kmb_ocs_hcu_init, - .update = kmb_ocs_hcu_update, - .final = kmb_ocs_hcu_final, - .finup = kmb_ocs_hcu_finup, - .digest = kmb_ocs_hcu_digest, - .export = kmb_ocs_hcu_export, - .import = kmb_ocs_hcu_import, - .setkey = kmb_ocs_hcu_setkey, - .halg = { + .base.init = kmb_ocs_hcu_init, + .base.update = kmb_ocs_hcu_update, + .base.final = kmb_ocs_hcu_final, + .base.finup = kmb_ocs_hcu_finup, + .base.digest = kmb_ocs_hcu_digest, + .base.export = kmb_ocs_hcu_export, + .base.import = kmb_ocs_hcu_import, + .base.setkey = kmb_ocs_hcu_setkey, + .base.halg = { .digestsize = SHA512_DIGEST_SIZE, .statesize = sizeof(struct ocs_hcu_rctx), .base = { @@ -1134,7 +1137,8 @@ static struct ahash_alg ocs_hcu_algs[] = { .cra_init = kmb_ocs_hcu_hmac_cra_init, .cra_exit = kmb_ocs_hcu_hmac_cra_exit, } - } + }, + .op.do_one_request = kmb_ocs_hcu_do_one_request, }, }; @@ -1155,7 +1159,7 @@ static int kmb_ocs_hcu_remove(struct platform_device *pdev) if (!hcu_dev) return -ENODEV; - crypto_unregister_ahashes(ocs_hcu_algs, ARRAY_SIZE(ocs_hcu_algs)); + crypto_engine_unregister_ahashes(ocs_hcu_algs, ARRAY_SIZE(ocs_hcu_algs)); rc = crypto_engine_exit(hcu_dev->engine); @@ -1223,7 +1227,7 @@ static int kmb_ocs_hcu_probe(struct platform_device *pdev) /* Security infrastructure guarantees OCS clock is enabled. */ - rc = crypto_register_ahashes(ocs_hcu_algs, ARRAY_SIZE(ocs_hcu_algs)); + rc = crypto_engine_register_ahashes(ocs_hcu_algs, ARRAY_SIZE(ocs_hcu_algs)); if (rc) { dev_err(dev, "Could not register algorithms.\n"); goto cleanup; From 03906fba750ed468b8ea3484afc650454ce45bcc Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Sun, 13 Aug 2023 14:55:08 +0800 Subject: [PATCH 526/656] crypto: omap - Use new crypto_engine_op interface Use the new crypto_engine_op interface where the callback is stored in the algorithm object. Signed-off-by: Herbert Xu --- drivers/crypto/omap-aes-gcm.c | 25 ++-- drivers/crypto/omap-aes.c | 210 ++++++++++++++------------ drivers/crypto/omap-aes.h | 15 +- drivers/crypto/omap-des.c | 181 +++++++++++----------- drivers/crypto/omap-sham.c | 274 +++++++++++++++++----------------- 5 files changed, 365 insertions(+), 340 deletions(-) diff --git a/drivers/crypto/omap-aes-gcm.c b/drivers/crypto/omap-aes-gcm.c index d02363e976e7..c498950402e8 100644 --- a/drivers/crypto/omap-aes-gcm.c +++ b/drivers/crypto/omap-aes-gcm.c @@ -7,18 +7,21 @@ * Copyright (c) 2016 Texas Instruments Incorporated */ -#include -#include -#include -#include -#include -#include -#include #include +#include #include +#include #include #include -#include +#include +#include +#include +#include +#include +#include +#include +#include +#include #include "omap-crypto.h" #include "omap-aes.h" @@ -354,7 +357,7 @@ int omap_aes_4106gcm_setauthsize(struct crypto_aead *parent, return crypto_rfc4106_check_authsize(authsize); } -static int omap_aes_gcm_crypt_req(struct crypto_engine *engine, void *areq) +int omap_aes_gcm_crypt_req(struct crypto_engine *engine, void *areq) { struct aead_request *req = container_of(areq, struct aead_request, base); @@ -379,10 +382,6 @@ static int omap_aes_gcm_crypt_req(struct crypto_engine *engine, void *areq) int omap_aes_gcm_cra_init(struct crypto_aead *tfm) { - struct omap_aes_ctx *ctx = crypto_aead_ctx(tfm); - - ctx->enginectx.op.do_one_request = omap_aes_gcm_crypt_req; - crypto_aead_set_reqsize(tfm, sizeof(struct omap_aes_reqctx)); return 0; diff --git a/drivers/crypto/omap-aes.c b/drivers/crypto/omap-aes.c index ad0d8db086db..ea1331218105 100644 --- a/drivers/crypto/omap-aes.c +++ b/drivers/crypto/omap-aes.c @@ -33,6 +33,7 @@ #include #include #include +#include #include "omap-crypto.h" #include "omap-aes.h" @@ -638,8 +639,6 @@ static int omap_aes_init_tfm(struct crypto_skcipher *tfm) crypto_skcipher_set_reqsize(tfm, sizeof(struct omap_aes_reqctx) + crypto_skcipher_reqsize(blk)); - ctx->enginectx.op.do_one_request = omap_aes_crypt_req; - return 0; } @@ -655,68 +654,77 @@ static void omap_aes_exit_tfm(struct crypto_skcipher *tfm) /* ********************** ALGS ************************************ */ -static struct skcipher_alg algs_ecb_cbc[] = { +static struct skcipher_engine_alg algs_ecb_cbc[] = { { - .base.cra_name = "ecb(aes)", - .base.cra_driver_name = "ecb-aes-omap", - .base.cra_priority = 300, - .base.cra_flags = CRYPTO_ALG_KERN_DRIVER_ONLY | - CRYPTO_ALG_ASYNC | - CRYPTO_ALG_NEED_FALLBACK, - .base.cra_blocksize = AES_BLOCK_SIZE, - .base.cra_ctxsize = sizeof(struct omap_aes_ctx), - .base.cra_module = THIS_MODULE, + .base = { + .base.cra_name = "ecb(aes)", + .base.cra_driver_name = "ecb-aes-omap", + .base.cra_priority = 300, + .base.cra_flags = CRYPTO_ALG_KERN_DRIVER_ONLY | + CRYPTO_ALG_ASYNC | + CRYPTO_ALG_NEED_FALLBACK, + .base.cra_blocksize = AES_BLOCK_SIZE, + .base.cra_ctxsize = sizeof(struct omap_aes_ctx), + .base.cra_module = THIS_MODULE, - .min_keysize = AES_MIN_KEY_SIZE, - .max_keysize = AES_MAX_KEY_SIZE, - .setkey = omap_aes_setkey, - .encrypt = omap_aes_ecb_encrypt, - .decrypt = omap_aes_ecb_decrypt, - .init = omap_aes_init_tfm, - .exit = omap_aes_exit_tfm, + .min_keysize = AES_MIN_KEY_SIZE, + .max_keysize = AES_MAX_KEY_SIZE, + .setkey = omap_aes_setkey, + .encrypt = omap_aes_ecb_encrypt, + .decrypt = omap_aes_ecb_decrypt, + .init = omap_aes_init_tfm, + .exit = omap_aes_exit_tfm, + }, + .op.do_one_request = omap_aes_crypt_req, }, { - .base.cra_name = "cbc(aes)", - .base.cra_driver_name = "cbc-aes-omap", - .base.cra_priority = 300, - .base.cra_flags = CRYPTO_ALG_KERN_DRIVER_ONLY | - CRYPTO_ALG_ASYNC | - CRYPTO_ALG_NEED_FALLBACK, - .base.cra_blocksize = AES_BLOCK_SIZE, - .base.cra_ctxsize = sizeof(struct omap_aes_ctx), - .base.cra_module = THIS_MODULE, + .base = { + .base.cra_name = "cbc(aes)", + .base.cra_driver_name = "cbc-aes-omap", + .base.cra_priority = 300, + .base.cra_flags = CRYPTO_ALG_KERN_DRIVER_ONLY | + CRYPTO_ALG_ASYNC | + CRYPTO_ALG_NEED_FALLBACK, + .base.cra_blocksize = AES_BLOCK_SIZE, + .base.cra_ctxsize = sizeof(struct omap_aes_ctx), + .base.cra_module = THIS_MODULE, - .min_keysize = AES_MIN_KEY_SIZE, - .max_keysize = AES_MAX_KEY_SIZE, - .ivsize = AES_BLOCK_SIZE, - .setkey = omap_aes_setkey, - .encrypt = omap_aes_cbc_encrypt, - .decrypt = omap_aes_cbc_decrypt, - .init = omap_aes_init_tfm, - .exit = omap_aes_exit_tfm, + .min_keysize = AES_MIN_KEY_SIZE, + .max_keysize = AES_MAX_KEY_SIZE, + .ivsize = AES_BLOCK_SIZE, + .setkey = omap_aes_setkey, + .encrypt = omap_aes_cbc_encrypt, + .decrypt = omap_aes_cbc_decrypt, + .init = omap_aes_init_tfm, + .exit = omap_aes_exit_tfm, + }, + .op.do_one_request = omap_aes_crypt_req, } }; -static struct skcipher_alg algs_ctr[] = { +static struct skcipher_engine_alg algs_ctr[] = { { - .base.cra_name = "ctr(aes)", - .base.cra_driver_name = "ctr-aes-omap", - .base.cra_priority = 300, - .base.cra_flags = CRYPTO_ALG_KERN_DRIVER_ONLY | - CRYPTO_ALG_ASYNC | - CRYPTO_ALG_NEED_FALLBACK, - .base.cra_blocksize = 1, - .base.cra_ctxsize = sizeof(struct omap_aes_ctx), - .base.cra_module = THIS_MODULE, + .base = { + .base.cra_name = "ctr(aes)", + .base.cra_driver_name = "ctr-aes-omap", + .base.cra_priority = 300, + .base.cra_flags = CRYPTO_ALG_KERN_DRIVER_ONLY | + CRYPTO_ALG_ASYNC | + CRYPTO_ALG_NEED_FALLBACK, + .base.cra_blocksize = 1, + .base.cra_ctxsize = sizeof(struct omap_aes_ctx), + .base.cra_module = THIS_MODULE, - .min_keysize = AES_MIN_KEY_SIZE, - .max_keysize = AES_MAX_KEY_SIZE, - .ivsize = AES_BLOCK_SIZE, - .setkey = omap_aes_setkey, - .encrypt = omap_aes_ctr_encrypt, - .decrypt = omap_aes_ctr_decrypt, - .init = omap_aes_init_tfm, - .exit = omap_aes_exit_tfm, + .min_keysize = AES_MIN_KEY_SIZE, + .max_keysize = AES_MAX_KEY_SIZE, + .ivsize = AES_BLOCK_SIZE, + .setkey = omap_aes_setkey, + .encrypt = omap_aes_ctr_encrypt, + .decrypt = omap_aes_ctr_decrypt, + .init = omap_aes_init_tfm, + .exit = omap_aes_exit_tfm, + }, + .op.do_one_request = omap_aes_crypt_req, } }; @@ -727,46 +735,52 @@ static struct omap_aes_algs_info omap_aes_algs_info_ecb_cbc[] = { }, }; -static struct aead_alg algs_aead_gcm[] = { +static struct aead_engine_alg algs_aead_gcm[] = { { .base = { - .cra_name = "gcm(aes)", - .cra_driver_name = "gcm-aes-omap", - .cra_priority = 300, - .cra_flags = CRYPTO_ALG_ASYNC | - CRYPTO_ALG_KERN_DRIVER_ONLY, - .cra_blocksize = 1, - .cra_ctxsize = sizeof(struct omap_aes_gcm_ctx), - .cra_alignmask = 0xf, - .cra_module = THIS_MODULE, + .base = { + .cra_name = "gcm(aes)", + .cra_driver_name = "gcm-aes-omap", + .cra_priority = 300, + .cra_flags = CRYPTO_ALG_ASYNC | + CRYPTO_ALG_KERN_DRIVER_ONLY, + .cra_blocksize = 1, + .cra_ctxsize = sizeof(struct omap_aes_gcm_ctx), + .cra_alignmask = 0xf, + .cra_module = THIS_MODULE, + }, + .init = omap_aes_gcm_cra_init, + .ivsize = GCM_AES_IV_SIZE, + .maxauthsize = AES_BLOCK_SIZE, + .setkey = omap_aes_gcm_setkey, + .setauthsize = omap_aes_gcm_setauthsize, + .encrypt = omap_aes_gcm_encrypt, + .decrypt = omap_aes_gcm_decrypt, }, - .init = omap_aes_gcm_cra_init, - .ivsize = GCM_AES_IV_SIZE, - .maxauthsize = AES_BLOCK_SIZE, - .setkey = omap_aes_gcm_setkey, - .setauthsize = omap_aes_gcm_setauthsize, - .encrypt = omap_aes_gcm_encrypt, - .decrypt = omap_aes_gcm_decrypt, + .op.do_one_request = omap_aes_gcm_crypt_req, }, { .base = { - .cra_name = "rfc4106(gcm(aes))", - .cra_driver_name = "rfc4106-gcm-aes-omap", - .cra_priority = 300, - .cra_flags = CRYPTO_ALG_ASYNC | - CRYPTO_ALG_KERN_DRIVER_ONLY, - .cra_blocksize = 1, - .cra_ctxsize = sizeof(struct omap_aes_gcm_ctx), - .cra_alignmask = 0xf, - .cra_module = THIS_MODULE, + .base = { + .cra_name = "rfc4106(gcm(aes))", + .cra_driver_name = "rfc4106-gcm-aes-omap", + .cra_priority = 300, + .cra_flags = CRYPTO_ALG_ASYNC | + CRYPTO_ALG_KERN_DRIVER_ONLY, + .cra_blocksize = 1, + .cra_ctxsize = sizeof(struct omap_aes_gcm_ctx), + .cra_alignmask = 0xf, + .cra_module = THIS_MODULE, + }, + .init = omap_aes_gcm_cra_init, + .maxauthsize = AES_BLOCK_SIZE, + .ivsize = GCM_RFC4106_IV_SIZE, + .setkey = omap_aes_4106gcm_setkey, + .setauthsize = omap_aes_4106gcm_setauthsize, + .encrypt = omap_aes_4106gcm_encrypt, + .decrypt = omap_aes_4106gcm_decrypt, }, - .init = omap_aes_gcm_cra_init, - .maxauthsize = AES_BLOCK_SIZE, - .ivsize = GCM_RFC4106_IV_SIZE, - .setkey = omap_aes_4106gcm_setkey, - .setauthsize = omap_aes_4106gcm_setauthsize, - .encrypt = omap_aes_4106gcm_encrypt, - .decrypt = omap_aes_4106gcm_decrypt, + .op.do_one_request = omap_aes_gcm_crypt_req, }, }; @@ -1088,8 +1102,8 @@ static int omap_aes_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct omap_aes_dev *dd; - struct skcipher_alg *algp; - struct aead_alg *aalg; + struct skcipher_engine_alg *algp; + struct aead_engine_alg *aalg; struct resource res; int err = -ENOMEM, i, j, irq = -1; u32 reg; @@ -1182,9 +1196,9 @@ static int omap_aes_probe(struct platform_device *pdev) for (j = 0; j < dd->pdata->algs_info[i].size; j++) { algp = &dd->pdata->algs_info[i].algs_list[j]; - pr_debug("reg alg: %s\n", algp->base.cra_name); + pr_debug("reg alg: %s\n", algp->base.base.cra_name); - err = crypto_register_skcipher(algp); + err = crypto_engine_register_skcipher(algp); if (err) goto err_algs; @@ -1198,9 +1212,9 @@ static int omap_aes_probe(struct platform_device *pdev) for (i = 0; i < dd->pdata->aead_algs_info->size; i++) { aalg = &dd->pdata->aead_algs_info->algs_list[i]; - pr_debug("reg alg: %s\n", aalg->base.cra_name); + pr_debug("reg alg: %s\n", aalg->base.base.cra_name); - err = crypto_register_aead(aalg); + err = crypto_engine_register_aead(aalg); if (err) goto err_aead_algs; @@ -1218,12 +1232,12 @@ static int omap_aes_probe(struct platform_device *pdev) err_aead_algs: for (i = dd->pdata->aead_algs_info->registered - 1; i >= 0; i--) { aalg = &dd->pdata->aead_algs_info->algs_list[i]; - crypto_unregister_aead(aalg); + crypto_engine_unregister_aead(aalg); } err_algs: for (i = dd->pdata->algs_info_size - 1; i >= 0; i--) for (j = dd->pdata->algs_info[i].registered - 1; j >= 0; j--) - crypto_unregister_skcipher( + crypto_engine_unregister_skcipher( &dd->pdata->algs_info[i].algs_list[j]); err_engine: @@ -1245,7 +1259,7 @@ err_data: static int omap_aes_remove(struct platform_device *pdev) { struct omap_aes_dev *dd = platform_get_drvdata(pdev); - struct aead_alg *aalg; + struct aead_engine_alg *aalg; int i, j; spin_lock_bh(&list_lock); @@ -1254,14 +1268,14 @@ static int omap_aes_remove(struct platform_device *pdev) for (i = dd->pdata->algs_info_size - 1; i >= 0; i--) for (j = dd->pdata->algs_info[i].registered - 1; j >= 0; j--) { - crypto_unregister_skcipher( + crypto_engine_unregister_skcipher( &dd->pdata->algs_info[i].algs_list[j]); dd->pdata->algs_info[i].registered--; } for (i = dd->pdata->aead_algs_info->registered - 1; i >= 0; i--) { aalg = &dd->pdata->aead_algs_info->algs_list[i]; - crypto_unregister_aead(aalg); + crypto_engine_unregister_aead(aalg); dd->pdata->aead_algs_info->registered--; } diff --git a/drivers/crypto/omap-aes.h b/drivers/crypto/omap-aes.h index 23d073e87bb8..0f35c9164764 100644 --- a/drivers/crypto/omap-aes.h +++ b/drivers/crypto/omap-aes.h @@ -10,7 +10,6 @@ #define __OMAP_AES_H__ #include -#include #define DST_MAXBURST 4 #define DMA_MIN (DST_MAXBURST * sizeof(u32)) @@ -93,7 +92,6 @@ struct omap_aes_gcm_result { }; struct omap_aes_ctx { - struct crypto_engine_ctx enginectx; int keylen; u32 key[AES_KEYSIZE_256 / sizeof(u32)]; u8 nonce[4]; @@ -117,15 +115,15 @@ struct omap_aes_reqctx { #define OMAP_AES_CACHE_SIZE 0 struct omap_aes_algs_info { - struct skcipher_alg *algs_list; - unsigned int size; - unsigned int registered; + struct skcipher_engine_alg *algs_list; + unsigned int size; + unsigned int registered; }; struct omap_aes_aead_algs { - struct aead_alg *algs_list; - unsigned int size; - unsigned int registered; + struct aead_engine_alg *algs_list; + unsigned int size; + unsigned int registered; }; struct omap_aes_pdata { @@ -218,5 +216,6 @@ int omap_aes_crypt_dma_start(struct omap_aes_dev *dd); int omap_aes_crypt_dma_stop(struct omap_aes_dev *dd); void omap_aes_gcm_dma_out_callback(void *data); void omap_aes_clear_copy_flags(struct omap_aes_dev *dd); +int omap_aes_gcm_crypt_req(struct crypto_engine *engine, void *areq); #endif diff --git a/drivers/crypto/omap-des.c b/drivers/crypto/omap-des.c index 29a3b4c9edaf..ae9e9e4eb94c 100644 --- a/drivers/crypto/omap-des.c +++ b/drivers/crypto/omap-des.c @@ -16,27 +16,25 @@ #define prx(num) do { } while (0) #endif -#include -#include -#include -#include -#include -#include -#include +#include +#include +#include +#include #include #include -#include +#include +#include +#include +#include +#include +#include #include #include #include -#include -#include -#include -#include -#include -#include -#include -#include +#include +#include +#include +#include #include "omap-crypto.h" @@ -83,7 +81,6 @@ #define FLAGS_OUT_DATA_ST_SHIFT 10 struct omap_des_ctx { - struct crypto_engine_ctx enginectx; struct omap_des_dev *dd; int keylen; @@ -99,9 +96,9 @@ struct omap_des_reqctx { #define OMAP_DES_CACHE_SIZE 0 struct omap_des_algs_info { - struct skcipher_alg *algs_list; - unsigned int size; - unsigned int registered; + struct skcipher_engine_alg *algs_list; + unsigned int size; + unsigned int registered; }; struct omap_des_pdata { @@ -707,89 +704,97 @@ static int omap_des_cbc_decrypt(struct skcipher_request *req) static int omap_des_init_tfm(struct crypto_skcipher *tfm) { - struct omap_des_ctx *ctx = crypto_skcipher_ctx(tfm); - pr_debug("enter\n"); crypto_skcipher_set_reqsize(tfm, sizeof(struct omap_des_reqctx)); - ctx->enginectx.op.do_one_request = omap_des_crypt_req; - return 0; } /* ********************** ALGS ************************************ */ -static struct skcipher_alg algs_ecb_cbc[] = { +static struct skcipher_engine_alg algs_ecb_cbc[] = { { - .base.cra_name = "ecb(des)", - .base.cra_driver_name = "ecb-des-omap", - .base.cra_priority = 300, - .base.cra_flags = CRYPTO_ALG_KERN_DRIVER_ONLY | - CRYPTO_ALG_ASYNC, - .base.cra_blocksize = DES_BLOCK_SIZE, - .base.cra_ctxsize = sizeof(struct omap_des_ctx), - .base.cra_module = THIS_MODULE, + .base = { + .base.cra_name = "ecb(des)", + .base.cra_driver_name = "ecb-des-omap", + .base.cra_priority = 300, + .base.cra_flags = CRYPTO_ALG_KERN_DRIVER_ONLY | + CRYPTO_ALG_ASYNC, + .base.cra_blocksize = DES_BLOCK_SIZE, + .base.cra_ctxsize = sizeof(struct omap_des_ctx), + .base.cra_module = THIS_MODULE, - .min_keysize = DES_KEY_SIZE, - .max_keysize = DES_KEY_SIZE, - .setkey = omap_des_setkey, - .encrypt = omap_des_ecb_encrypt, - .decrypt = omap_des_ecb_decrypt, - .init = omap_des_init_tfm, + .min_keysize = DES_KEY_SIZE, + .max_keysize = DES_KEY_SIZE, + .setkey = omap_des_setkey, + .encrypt = omap_des_ecb_encrypt, + .decrypt = omap_des_ecb_decrypt, + .init = omap_des_init_tfm, + }, + .op.do_one_request = omap_des_crypt_req, }, { - .base.cra_name = "cbc(des)", - .base.cra_driver_name = "cbc-des-omap", - .base.cra_priority = 300, - .base.cra_flags = CRYPTO_ALG_KERN_DRIVER_ONLY | - CRYPTO_ALG_ASYNC, - .base.cra_blocksize = DES_BLOCK_SIZE, - .base.cra_ctxsize = sizeof(struct omap_des_ctx), - .base.cra_module = THIS_MODULE, + .base = { + .base.cra_name = "cbc(des)", + .base.cra_driver_name = "cbc-des-omap", + .base.cra_priority = 300, + .base.cra_flags = CRYPTO_ALG_KERN_DRIVER_ONLY | + CRYPTO_ALG_ASYNC, + .base.cra_blocksize = DES_BLOCK_SIZE, + .base.cra_ctxsize = sizeof(struct omap_des_ctx), + .base.cra_module = THIS_MODULE, - .min_keysize = DES_KEY_SIZE, - .max_keysize = DES_KEY_SIZE, - .ivsize = DES_BLOCK_SIZE, - .setkey = omap_des_setkey, - .encrypt = omap_des_cbc_encrypt, - .decrypt = omap_des_cbc_decrypt, - .init = omap_des_init_tfm, + .min_keysize = DES_KEY_SIZE, + .max_keysize = DES_KEY_SIZE, + .ivsize = DES_BLOCK_SIZE, + .setkey = omap_des_setkey, + .encrypt = omap_des_cbc_encrypt, + .decrypt = omap_des_cbc_decrypt, + .init = omap_des_init_tfm, + }, + .op.do_one_request = omap_des_crypt_req, }, { - .base.cra_name = "ecb(des3_ede)", - .base.cra_driver_name = "ecb-des3-omap", - .base.cra_priority = 300, - .base.cra_flags = CRYPTO_ALG_KERN_DRIVER_ONLY | - CRYPTO_ALG_ASYNC, - .base.cra_blocksize = DES3_EDE_BLOCK_SIZE, - .base.cra_ctxsize = sizeof(struct omap_des_ctx), - .base.cra_module = THIS_MODULE, + .base = { + .base.cra_name = "ecb(des3_ede)", + .base.cra_driver_name = "ecb-des3-omap", + .base.cra_priority = 300, + .base.cra_flags = CRYPTO_ALG_KERN_DRIVER_ONLY | + CRYPTO_ALG_ASYNC, + .base.cra_blocksize = DES3_EDE_BLOCK_SIZE, + .base.cra_ctxsize = sizeof(struct omap_des_ctx), + .base.cra_module = THIS_MODULE, - .min_keysize = DES3_EDE_KEY_SIZE, - .max_keysize = DES3_EDE_KEY_SIZE, - .setkey = omap_des3_setkey, - .encrypt = omap_des_ecb_encrypt, - .decrypt = omap_des_ecb_decrypt, - .init = omap_des_init_tfm, + .min_keysize = DES3_EDE_KEY_SIZE, + .max_keysize = DES3_EDE_KEY_SIZE, + .setkey = omap_des3_setkey, + .encrypt = omap_des_ecb_encrypt, + .decrypt = omap_des_ecb_decrypt, + .init = omap_des_init_tfm, + }, + .op.do_one_request = omap_des_crypt_req, }, { - .base.cra_name = "cbc(des3_ede)", - .base.cra_driver_name = "cbc-des3-omap", - .base.cra_priority = 300, - .base.cra_flags = CRYPTO_ALG_KERN_DRIVER_ONLY | - CRYPTO_ALG_ASYNC, - .base.cra_blocksize = DES3_EDE_BLOCK_SIZE, - .base.cra_ctxsize = sizeof(struct omap_des_ctx), - .base.cra_module = THIS_MODULE, + .base = { + .base.cra_name = "cbc(des3_ede)", + .base.cra_driver_name = "cbc-des3-omap", + .base.cra_priority = 300, + .base.cra_flags = CRYPTO_ALG_KERN_DRIVER_ONLY | + CRYPTO_ALG_ASYNC, + .base.cra_blocksize = DES3_EDE_BLOCK_SIZE, + .base.cra_ctxsize = sizeof(struct omap_des_ctx), + .base.cra_module = THIS_MODULE, - .min_keysize = DES3_EDE_KEY_SIZE, - .max_keysize = DES3_EDE_KEY_SIZE, - .ivsize = DES3_EDE_BLOCK_SIZE, - .setkey = omap_des3_setkey, - .encrypt = omap_des_cbc_encrypt, - .decrypt = omap_des_cbc_decrypt, - .init = omap_des_init_tfm, + .min_keysize = DES3_EDE_KEY_SIZE, + .max_keysize = DES3_EDE_KEY_SIZE, + .ivsize = DES3_EDE_BLOCK_SIZE, + .setkey = omap_des3_setkey, + .encrypt = omap_des_cbc_encrypt, + .decrypt = omap_des_cbc_decrypt, + .init = omap_des_init_tfm, + }, + .op.do_one_request = omap_des_crypt_req, } }; @@ -947,7 +952,7 @@ static int omap_des_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct omap_des_dev *dd; - struct skcipher_alg *algp; + struct skcipher_engine_alg *algp; struct resource *res; int err = -ENOMEM, i, j, irq = -1; u32 reg; @@ -1035,9 +1040,9 @@ static int omap_des_probe(struct platform_device *pdev) for (j = 0; j < dd->pdata->algs_info[i].size; j++) { algp = &dd->pdata->algs_info[i].algs_list[j]; - pr_debug("reg alg: %s\n", algp->base.cra_name); + pr_debug("reg alg: %s\n", algp->base.base.cra_name); - err = crypto_register_skcipher(algp); + err = crypto_engine_register_skcipher(algp); if (err) goto err_algs; @@ -1050,7 +1055,7 @@ static int omap_des_probe(struct platform_device *pdev) err_algs: for (i = dd->pdata->algs_info_size - 1; i >= 0; i--) for (j = dd->pdata->algs_info[i].registered - 1; j >= 0; j--) - crypto_unregister_skcipher( + crypto_engine_unregister_skcipher( &dd->pdata->algs_info[i].algs_list[j]); err_engine: @@ -1080,7 +1085,7 @@ static int omap_des_remove(struct platform_device *pdev) for (i = dd->pdata->algs_info_size - 1; i >= 0; i--) for (j = dd->pdata->algs_info[i].registered - 1; j >= 0; j--) - crypto_unregister_skcipher( + crypto_engine_unregister_skcipher( &dd->pdata->algs_info[i].algs_list[j]); tasklet_kill(&dd->done_task); diff --git a/drivers/crypto/omap-sham.c b/drivers/crypto/omap-sham.c index 2ef92301969f..4b79d54fd671 100644 --- a/drivers/crypto/omap-sham.c +++ b/drivers/crypto/omap-sham.c @@ -13,34 +13,31 @@ #define pr_fmt(fmt) "%s: " fmt, __func__ +#include +#include +#include +#include +#include +#include #include #include -#include -#include -#include -#include -#include -#include -#include -#include -#include #include #include -#include +#include +#include +#include +#include +#include +#include #include #include #include #include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include +#include +#include +#include +#include +#include #define MD5_DIGEST_SIZE 16 @@ -168,7 +165,6 @@ struct omap_sham_hmac_ctx { }; struct omap_sham_ctx { - struct crypto_engine_ctx enginectx; unsigned long flags; /* fallback stuff */ @@ -180,7 +176,7 @@ struct omap_sham_ctx { #define OMAP_SHAM_QUEUE_LENGTH 10 struct omap_sham_algs_info { - struct ahash_alg *algs_list; + struct ahash_engine_alg *algs_list; unsigned int size; unsigned int registered; }; @@ -1353,8 +1349,6 @@ static int omap_sham_cra_init_alg(struct crypto_tfm *tfm, const char *alg_base) } - tctx->enginectx.op.do_one_request = omap_sham_hash_one_req; - return 0; } @@ -1425,15 +1419,15 @@ static int omap_sham_import(struct ahash_request *req, const void *in) return 0; } -static struct ahash_alg algs_sha1_md5[] = { +static struct ahash_engine_alg algs_sha1_md5[] = { { - .init = omap_sham_init, - .update = omap_sham_update, - .final = omap_sham_final, - .finup = omap_sham_finup, - .digest = omap_sham_digest, - .halg.digestsize = SHA1_DIGEST_SIZE, - .halg.base = { + .base.init = omap_sham_init, + .base.update = omap_sham_update, + .base.final = omap_sham_final, + .base.finup = omap_sham_finup, + .base.digest = omap_sham_digest, + .base.halg.digestsize = SHA1_DIGEST_SIZE, + .base.halg.base = { .cra_name = "sha1", .cra_driver_name = "omap-sha1", .cra_priority = 400, @@ -1446,16 +1440,17 @@ static struct ahash_alg algs_sha1_md5[] = { .cra_module = THIS_MODULE, .cra_init = omap_sham_cra_init, .cra_exit = omap_sham_cra_exit, - } + }, + .op.do_one_request = omap_sham_hash_one_req, }, { - .init = omap_sham_init, - .update = omap_sham_update, - .final = omap_sham_final, - .finup = omap_sham_finup, - .digest = omap_sham_digest, - .halg.digestsize = MD5_DIGEST_SIZE, - .halg.base = { + .base.init = omap_sham_init, + .base.update = omap_sham_update, + .base.final = omap_sham_final, + .base.finup = omap_sham_finup, + .base.digest = omap_sham_digest, + .base.halg.digestsize = MD5_DIGEST_SIZE, + .base.halg.base = { .cra_name = "md5", .cra_driver_name = "omap-md5", .cra_priority = 400, @@ -1468,17 +1463,18 @@ static struct ahash_alg algs_sha1_md5[] = { .cra_module = THIS_MODULE, .cra_init = omap_sham_cra_init, .cra_exit = omap_sham_cra_exit, - } + }, + .op.do_one_request = omap_sham_hash_one_req, }, { - .init = omap_sham_init, - .update = omap_sham_update, - .final = omap_sham_final, - .finup = omap_sham_finup, - .digest = omap_sham_digest, - .setkey = omap_sham_setkey, - .halg.digestsize = SHA1_DIGEST_SIZE, - .halg.base = { + .base.init = omap_sham_init, + .base.update = omap_sham_update, + .base.final = omap_sham_final, + .base.finup = omap_sham_finup, + .base.digest = omap_sham_digest, + .base.setkey = omap_sham_setkey, + .base.halg.digestsize = SHA1_DIGEST_SIZE, + .base.halg.base = { .cra_name = "hmac(sha1)", .cra_driver_name = "omap-hmac-sha1", .cra_priority = 400, @@ -1492,17 +1488,18 @@ static struct ahash_alg algs_sha1_md5[] = { .cra_module = THIS_MODULE, .cra_init = omap_sham_cra_sha1_init, .cra_exit = omap_sham_cra_exit, - } + }, + .op.do_one_request = omap_sham_hash_one_req, }, { - .init = omap_sham_init, - .update = omap_sham_update, - .final = omap_sham_final, - .finup = omap_sham_finup, - .digest = omap_sham_digest, - .setkey = omap_sham_setkey, - .halg.digestsize = MD5_DIGEST_SIZE, - .halg.base = { + .base.init = omap_sham_init, + .base.update = omap_sham_update, + .base.final = omap_sham_final, + .base.finup = omap_sham_finup, + .base.digest = omap_sham_digest, + .base.setkey = omap_sham_setkey, + .base.halg.digestsize = MD5_DIGEST_SIZE, + .base.halg.base = { .cra_name = "hmac(md5)", .cra_driver_name = "omap-hmac-md5", .cra_priority = 400, @@ -1516,20 +1513,21 @@ static struct ahash_alg algs_sha1_md5[] = { .cra_module = THIS_MODULE, .cra_init = omap_sham_cra_md5_init, .cra_exit = omap_sham_cra_exit, - } + }, + .op.do_one_request = omap_sham_hash_one_req, } }; /* OMAP4 has some algs in addition to what OMAP2 has */ -static struct ahash_alg algs_sha224_sha256[] = { +static struct ahash_engine_alg algs_sha224_sha256[] = { { - .init = omap_sham_init, - .update = omap_sham_update, - .final = omap_sham_final, - .finup = omap_sham_finup, - .digest = omap_sham_digest, - .halg.digestsize = SHA224_DIGEST_SIZE, - .halg.base = { + .base.init = omap_sham_init, + .base.update = omap_sham_update, + .base.final = omap_sham_final, + .base.finup = omap_sham_finup, + .base.digest = omap_sham_digest, + .base.halg.digestsize = SHA224_DIGEST_SIZE, + .base.halg.base = { .cra_name = "sha224", .cra_driver_name = "omap-sha224", .cra_priority = 400, @@ -1542,16 +1540,17 @@ static struct ahash_alg algs_sha224_sha256[] = { .cra_module = THIS_MODULE, .cra_init = omap_sham_cra_init, .cra_exit = omap_sham_cra_exit, - } + }, + .op.do_one_request = omap_sham_hash_one_req, }, { - .init = omap_sham_init, - .update = omap_sham_update, - .final = omap_sham_final, - .finup = omap_sham_finup, - .digest = omap_sham_digest, - .halg.digestsize = SHA256_DIGEST_SIZE, - .halg.base = { + .base.init = omap_sham_init, + .base.update = omap_sham_update, + .base.final = omap_sham_final, + .base.finup = omap_sham_finup, + .base.digest = omap_sham_digest, + .base.halg.digestsize = SHA256_DIGEST_SIZE, + .base.halg.base = { .cra_name = "sha256", .cra_driver_name = "omap-sha256", .cra_priority = 400, @@ -1564,17 +1563,18 @@ static struct ahash_alg algs_sha224_sha256[] = { .cra_module = THIS_MODULE, .cra_init = omap_sham_cra_init, .cra_exit = omap_sham_cra_exit, - } + }, + .op.do_one_request = omap_sham_hash_one_req, }, { - .init = omap_sham_init, - .update = omap_sham_update, - .final = omap_sham_final, - .finup = omap_sham_finup, - .digest = omap_sham_digest, - .setkey = omap_sham_setkey, - .halg.digestsize = SHA224_DIGEST_SIZE, - .halg.base = { + .base.init = omap_sham_init, + .base.update = omap_sham_update, + .base.final = omap_sham_final, + .base.finup = omap_sham_finup, + .base.digest = omap_sham_digest, + .base.setkey = omap_sham_setkey, + .base.halg.digestsize = SHA224_DIGEST_SIZE, + .base.halg.base = { .cra_name = "hmac(sha224)", .cra_driver_name = "omap-hmac-sha224", .cra_priority = 400, @@ -1588,17 +1588,18 @@ static struct ahash_alg algs_sha224_sha256[] = { .cra_module = THIS_MODULE, .cra_init = omap_sham_cra_sha224_init, .cra_exit = omap_sham_cra_exit, - } + }, + .op.do_one_request = omap_sham_hash_one_req, }, { - .init = omap_sham_init, - .update = omap_sham_update, - .final = omap_sham_final, - .finup = omap_sham_finup, - .digest = omap_sham_digest, - .setkey = omap_sham_setkey, - .halg.digestsize = SHA256_DIGEST_SIZE, - .halg.base = { + .base.init = omap_sham_init, + .base.update = omap_sham_update, + .base.final = omap_sham_final, + .base.finup = omap_sham_finup, + .base.digest = omap_sham_digest, + .base.setkey = omap_sham_setkey, + .base.halg.digestsize = SHA256_DIGEST_SIZE, + .base.halg.base = { .cra_name = "hmac(sha256)", .cra_driver_name = "omap-hmac-sha256", .cra_priority = 400, @@ -1612,19 +1613,20 @@ static struct ahash_alg algs_sha224_sha256[] = { .cra_module = THIS_MODULE, .cra_init = omap_sham_cra_sha256_init, .cra_exit = omap_sham_cra_exit, - } + }, + .op.do_one_request = omap_sham_hash_one_req, }, }; -static struct ahash_alg algs_sha384_sha512[] = { +static struct ahash_engine_alg algs_sha384_sha512[] = { { - .init = omap_sham_init, - .update = omap_sham_update, - .final = omap_sham_final, - .finup = omap_sham_finup, - .digest = omap_sham_digest, - .halg.digestsize = SHA384_DIGEST_SIZE, - .halg.base = { + .base.init = omap_sham_init, + .base.update = omap_sham_update, + .base.final = omap_sham_final, + .base.finup = omap_sham_finup, + .base.digest = omap_sham_digest, + .base.halg.digestsize = SHA384_DIGEST_SIZE, + .base.halg.base = { .cra_name = "sha384", .cra_driver_name = "omap-sha384", .cra_priority = 400, @@ -1637,16 +1639,17 @@ static struct ahash_alg algs_sha384_sha512[] = { .cra_module = THIS_MODULE, .cra_init = omap_sham_cra_init, .cra_exit = omap_sham_cra_exit, - } + }, + .op.do_one_request = omap_sham_hash_one_req, }, { - .init = omap_sham_init, - .update = omap_sham_update, - .final = omap_sham_final, - .finup = omap_sham_finup, - .digest = omap_sham_digest, - .halg.digestsize = SHA512_DIGEST_SIZE, - .halg.base = { + .base.init = omap_sham_init, + .base.update = omap_sham_update, + .base.final = omap_sham_final, + .base.finup = omap_sham_finup, + .base.digest = omap_sham_digest, + .base.halg.digestsize = SHA512_DIGEST_SIZE, + .base.halg.base = { .cra_name = "sha512", .cra_driver_name = "omap-sha512", .cra_priority = 400, @@ -1659,17 +1662,18 @@ static struct ahash_alg algs_sha384_sha512[] = { .cra_module = THIS_MODULE, .cra_init = omap_sham_cra_init, .cra_exit = omap_sham_cra_exit, - } + }, + .op.do_one_request = omap_sham_hash_one_req, }, { - .init = omap_sham_init, - .update = omap_sham_update, - .final = omap_sham_final, - .finup = omap_sham_finup, - .digest = omap_sham_digest, - .setkey = omap_sham_setkey, - .halg.digestsize = SHA384_DIGEST_SIZE, - .halg.base = { + .base.init = omap_sham_init, + .base.update = omap_sham_update, + .base.final = omap_sham_final, + .base.finup = omap_sham_finup, + .base.digest = omap_sham_digest, + .base.setkey = omap_sham_setkey, + .base.halg.digestsize = SHA384_DIGEST_SIZE, + .base.halg.base = { .cra_name = "hmac(sha384)", .cra_driver_name = "omap-hmac-sha384", .cra_priority = 400, @@ -1683,17 +1687,18 @@ static struct ahash_alg algs_sha384_sha512[] = { .cra_module = THIS_MODULE, .cra_init = omap_sham_cra_sha384_init, .cra_exit = omap_sham_cra_exit, - } + }, + .op.do_one_request = omap_sham_hash_one_req, }, { - .init = omap_sham_init, - .update = omap_sham_update, - .final = omap_sham_final, - .finup = omap_sham_finup, - .digest = omap_sham_digest, - .setkey = omap_sham_setkey, - .halg.digestsize = SHA512_DIGEST_SIZE, - .halg.base = { + .base.init = omap_sham_init, + .base.update = omap_sham_update, + .base.final = omap_sham_final, + .base.finup = omap_sham_finup, + .base.digest = omap_sham_digest, + .base.setkey = omap_sham_setkey, + .base.halg.digestsize = SHA512_DIGEST_SIZE, + .base.halg.base = { .cra_name = "hmac(sha512)", .cra_driver_name = "omap-hmac-sha512", .cra_priority = 400, @@ -1707,7 +1712,8 @@ static struct ahash_alg algs_sha384_sha512[] = { .cra_module = THIS_MODULE, .cra_init = omap_sham_cra_sha512_init, .cra_exit = omap_sham_cra_exit, - } + }, + .op.do_one_request = omap_sham_hash_one_req, }, }; @@ -2148,14 +2154,16 @@ static int omap_sham_probe(struct platform_device *pdev) break; for (j = 0; j < dd->pdata->algs_info[i].size; j++) { + struct ahash_engine_alg *ealg; struct ahash_alg *alg; - alg = &dd->pdata->algs_info[i].algs_list[j]; + ealg = &dd->pdata->algs_info[i].algs_list[j]; + alg = &ealg->base; alg->export = omap_sham_export; alg->import = omap_sham_import; alg->halg.statesize = sizeof(struct omap_sham_reqctx) + BUFLEN; - err = crypto_register_ahash(alg); + err = crypto_engine_register_ahash(ealg); if (err) goto err_algs; @@ -2174,7 +2182,7 @@ static int omap_sham_probe(struct platform_device *pdev) err_algs: for (i = dd->pdata->algs_info_size - 1; i >= 0; i--) for (j = dd->pdata->algs_info[i].registered - 1; j >= 0; j--) - crypto_unregister_ahash( + crypto_engine_unregister_ahash( &dd->pdata->algs_info[i].algs_list[j]); err_engine_start: crypto_engine_exit(dd->engine); @@ -2205,7 +2213,7 @@ static int omap_sham_remove(struct platform_device *pdev) spin_unlock_bh(&sham.lock); for (i = dd->pdata->algs_info_size - 1; i >= 0; i--) for (j = dd->pdata->algs_info[i].registered - 1; j >= 0; j--) { - crypto_unregister_ahash( + crypto_engine_unregister_ahash( &dd->pdata->algs_info[i].algs_list[j]); dd->pdata->algs_info[i].registered--; } From 1a15d26c3131b3210b7299d3864aa75b71687a16 Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Sun, 13 Aug 2023 14:55:10 +0800 Subject: [PATCH 527/656] crypto: rk3288 - Use new crypto_engine_op interface Use the new crypto_engine_op interface where the callback is stored in the algorithm object. Signed-off-by: Herbert Xu --- drivers/crypto/rockchip/rk3288_crypto.c | 58 +++++++++------- drivers/crypto/rockchip/rk3288_crypto.h | 21 +++--- drivers/crypto/rockchip/rk3288_crypto_ahash.c | 67 +++++++++++-------- .../crypto/rockchip/rk3288_crypto_skcipher.c | 60 +++++++++++------ 4 files changed, 123 insertions(+), 83 deletions(-) diff --git a/drivers/crypto/rockchip/rk3288_crypto.c b/drivers/crypto/rockchip/rk3288_crypto.c index 9f6ba770a90a..937826c50470 100644 --- a/drivers/crypto/rockchip/rk3288_crypto.c +++ b/drivers/crypto/rockchip/rk3288_crypto.c @@ -10,14 +10,22 @@ */ #include "rk3288_crypto.h" +#include +#include +#include +#include #include +#include +#include +#include +#include +#include #include #include #include #include -#include -#include #include +#include static struct rockchip_ip rocklist = { .dev_list = LIST_HEAD_INIT(rocklist.dev_list), @@ -184,7 +192,6 @@ static struct rk_crypto_tmp *rk_cipher_algs[] = { &rk_ahash_md5, }; -#ifdef CONFIG_CRYPTO_DEV_ROCKCHIP_DEBUG static int rk_crypto_debugfs_show(struct seq_file *seq, void *v) { struct rk_crypto_info *dd; @@ -204,8 +211,8 @@ static int rk_crypto_debugfs_show(struct seq_file *seq, void *v) switch (rk_cipher_algs[i]->type) { case CRYPTO_ALG_TYPE_SKCIPHER: seq_printf(seq, "%s %s reqs=%lu fallback=%lu\n", - rk_cipher_algs[i]->alg.skcipher.base.cra_driver_name, - rk_cipher_algs[i]->alg.skcipher.base.cra_name, + rk_cipher_algs[i]->alg.skcipher.base.base.cra_driver_name, + rk_cipher_algs[i]->alg.skcipher.base.base.cra_name, rk_cipher_algs[i]->stat_req, rk_cipher_algs[i]->stat_fb); seq_printf(seq, "\tfallback due to length: %lu\n", rk_cipher_algs[i]->stat_fb_len); @@ -216,8 +223,8 @@ static int rk_crypto_debugfs_show(struct seq_file *seq, void *v) break; case CRYPTO_ALG_TYPE_AHASH: seq_printf(seq, "%s %s reqs=%lu fallback=%lu\n", - rk_cipher_algs[i]->alg.hash.halg.base.cra_driver_name, - rk_cipher_algs[i]->alg.hash.halg.base.cra_name, + rk_cipher_algs[i]->alg.hash.base.halg.base.cra_driver_name, + rk_cipher_algs[i]->alg.hash.base.halg.base.cra_name, rk_cipher_algs[i]->stat_req, rk_cipher_algs[i]->stat_fb); break; } @@ -226,17 +233,20 @@ static int rk_crypto_debugfs_show(struct seq_file *seq, void *v) } DEFINE_SHOW_ATTRIBUTE(rk_crypto_debugfs); -#endif static void register_debugfs(struct rk_crypto_info *crypto_info) { -#ifdef CONFIG_CRYPTO_DEV_ROCKCHIP_DEBUG + struct dentry *dbgfs_dir __maybe_unused; + struct dentry *dbgfs_stats __maybe_unused; + /* Ignore error of debugfs */ - rocklist.dbgfs_dir = debugfs_create_dir("rk3288_crypto", NULL); - rocklist.dbgfs_stats = debugfs_create_file("stats", 0444, - rocklist.dbgfs_dir, - &rocklist, - &rk_crypto_debugfs_fops); + dbgfs_dir = debugfs_create_dir("rk3288_crypto", NULL); + dbgfs_stats = debugfs_create_file("stats", 0444, dbgfs_dir, &rocklist, + &rk_crypto_debugfs_fops); + +#ifdef CONFIG_CRYPTO_DEV_ROCKCHIP_DEBUG + rocklist.dbgfs_dir = dbgfs_dir; + rocklist.dbgfs_stats = dbgfs_stats; #endif } @@ -250,15 +260,15 @@ static int rk_crypto_register(struct rk_crypto_info *crypto_info) switch (rk_cipher_algs[i]->type) { case CRYPTO_ALG_TYPE_SKCIPHER: dev_info(crypto_info->dev, "Register %s as %s\n", - rk_cipher_algs[i]->alg.skcipher.base.cra_name, - rk_cipher_algs[i]->alg.skcipher.base.cra_driver_name); - err = crypto_register_skcipher(&rk_cipher_algs[i]->alg.skcipher); + rk_cipher_algs[i]->alg.skcipher.base.base.cra_name, + rk_cipher_algs[i]->alg.skcipher.base.base.cra_driver_name); + err = crypto_engine_register_skcipher(&rk_cipher_algs[i]->alg.skcipher); break; case CRYPTO_ALG_TYPE_AHASH: dev_info(crypto_info->dev, "Register %s as %s\n", - rk_cipher_algs[i]->alg.hash.halg.base.cra_name, - rk_cipher_algs[i]->alg.hash.halg.base.cra_driver_name); - err = crypto_register_ahash(&rk_cipher_algs[i]->alg.hash); + rk_cipher_algs[i]->alg.hash.base.halg.base.cra_name, + rk_cipher_algs[i]->alg.hash.base.halg.base.cra_driver_name); + err = crypto_engine_register_ahash(&rk_cipher_algs[i]->alg.hash); break; default: dev_err(crypto_info->dev, "unknown algorithm\n"); @@ -271,9 +281,9 @@ static int rk_crypto_register(struct rk_crypto_info *crypto_info) err_cipher_algs: for (k = 0; k < i; k++) { if (rk_cipher_algs[i]->type == CRYPTO_ALG_TYPE_SKCIPHER) - crypto_unregister_skcipher(&rk_cipher_algs[k]->alg.skcipher); + crypto_engine_unregister_skcipher(&rk_cipher_algs[k]->alg.skcipher); else - crypto_unregister_ahash(&rk_cipher_algs[i]->alg.hash); + crypto_engine_unregister_ahash(&rk_cipher_algs[i]->alg.hash); } return err; } @@ -284,9 +294,9 @@ static void rk_crypto_unregister(void) for (i = 0; i < ARRAY_SIZE(rk_cipher_algs); i++) { if (rk_cipher_algs[i]->type == CRYPTO_ALG_TYPE_SKCIPHER) - crypto_unregister_skcipher(&rk_cipher_algs[i]->alg.skcipher); + crypto_engine_unregister_skcipher(&rk_cipher_algs[i]->alg.skcipher); else - crypto_unregister_ahash(&rk_cipher_algs[i]->alg.hash); + crypto_engine_unregister_ahash(&rk_cipher_algs[i]->alg.hash); } } diff --git a/drivers/crypto/rockchip/rk3288_crypto.h b/drivers/crypto/rockchip/rk3288_crypto.h index b2695258cade..3aa03cbfb6be 100644 --- a/drivers/crypto/rockchip/rk3288_crypto.h +++ b/drivers/crypto/rockchip/rk3288_crypto.h @@ -3,21 +3,18 @@ #define __RK3288_CRYPTO_H__ #include -#include -#include -#include -#include -#include -#include -#include -#include #include +#include #include #include - #include #include #include +#include +#include +#include +#include +#include #define _SBF(v, f) ((v) << (f)) @@ -231,7 +228,6 @@ struct rk_crypto_info { /* the private variable of hash */ struct rk_ahash_ctx { - struct crypto_engine_ctx enginectx; /* for fallback */ struct crypto_ahash *fallback_tfm; }; @@ -246,7 +242,6 @@ struct rk_ahash_rctx { /* the private variable of cipher */ struct rk_cipher_ctx { - struct crypto_engine_ctx enginectx; unsigned int keylen; u8 key[AES_MAX_KEY_SIZE]; u8 iv[AES_BLOCK_SIZE]; @@ -264,8 +259,8 @@ struct rk_crypto_tmp { u32 type; struct rk_crypto_info *dev; union { - struct skcipher_alg skcipher; - struct ahash_alg hash; + struct skcipher_engine_alg skcipher; + struct ahash_engine_alg hash; } alg; unsigned long stat_req; unsigned long stat_fb; diff --git a/drivers/crypto/rockchip/rk3288_crypto_ahash.c b/drivers/crypto/rockchip/rk3288_crypto_ahash.c index 1519aa0a0f7c..8c143180645e 100644 --- a/drivers/crypto/rockchip/rk3288_crypto_ahash.c +++ b/drivers/crypto/rockchip/rk3288_crypto_ahash.c @@ -8,9 +8,15 @@ * * Some ideas are from marvell/cesa.c and s5p-sss.c driver. */ -#include + #include +#include +#include +#include #include +#include +#include +#include #include "rk3288_crypto.h" /* @@ -40,8 +46,8 @@ static int rk_ahash_digest_fb(struct ahash_request *areq) struct rk_ahash_rctx *rctx = ahash_request_ctx(areq); struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq); struct rk_ahash_ctx *tfmctx = crypto_ahash_ctx(tfm); - struct ahash_alg *alg = __crypto_ahash_alg(tfm->base.__crt_alg); - struct rk_crypto_tmp *algt = container_of(alg, struct rk_crypto_tmp, alg.hash); + struct ahash_alg *alg = crypto_ahash_alg(tfm); + struct rk_crypto_tmp *algt = container_of(alg, struct rk_crypto_tmp, alg.hash.base); algt->stat_fb++; @@ -254,8 +260,8 @@ static int rk_hash_run(struct crypto_engine *engine, void *breq) struct ahash_request *areq = container_of(breq, struct ahash_request, base); struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq); struct rk_ahash_rctx *rctx = ahash_request_ctx(areq); - struct ahash_alg *alg = __crypto_ahash_alg(tfm->base.__crt_alg); - struct rk_crypto_tmp *algt = container_of(alg, struct rk_crypto_tmp, alg.hash); + struct ahash_alg *alg = crypto_ahash_alg(tfm); + struct rk_crypto_tmp *algt = container_of(alg, struct rk_crypto_tmp, alg.hash.base); struct scatterlist *sg = areq->src; struct rk_crypto_info *rkc = rctx->dev; int err; @@ -335,12 +341,12 @@ theend: return 0; } -static int rk_cra_hash_init(struct crypto_tfm *tfm) +static int rk_hash_init_tfm(struct crypto_ahash *tfm) { - struct rk_ahash_ctx *tctx = crypto_tfm_ctx(tfm); - const char *alg_name = crypto_tfm_alg_name(tfm); - struct ahash_alg *alg = __crypto_ahash_alg(tfm->__crt_alg); - struct rk_crypto_tmp *algt = container_of(alg, struct rk_crypto_tmp, alg.hash); + struct rk_ahash_ctx *tctx = crypto_ahash_ctx(tfm); + const char *alg_name = crypto_ahash_alg_name(tfm); + struct ahash_alg *alg = crypto_ahash_alg(tfm); + struct rk_crypto_tmp *algt = container_of(alg, struct rk_crypto_tmp, alg.hash.base); /* for fallback */ tctx->fallback_tfm = crypto_alloc_ahash(alg_name, 0, @@ -350,25 +356,23 @@ static int rk_cra_hash_init(struct crypto_tfm *tfm) return PTR_ERR(tctx->fallback_tfm); } - crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm), + crypto_ahash_set_reqsize(tfm, sizeof(struct rk_ahash_rctx) + crypto_ahash_reqsize(tctx->fallback_tfm)); - tctx->enginectx.op.do_one_request = rk_hash_run; - return 0; } -static void rk_cra_hash_exit(struct crypto_tfm *tfm) +static void rk_hash_exit_tfm(struct crypto_ahash *tfm) { - struct rk_ahash_ctx *tctx = crypto_tfm_ctx(tfm); + struct rk_ahash_ctx *tctx = crypto_ahash_ctx(tfm); crypto_free_ahash(tctx->fallback_tfm); } struct rk_crypto_tmp rk_ahash_sha1 = { .type = CRYPTO_ALG_TYPE_AHASH, - .alg.hash = { + .alg.hash.base = { .init = rk_ahash_init, .update = rk_ahash_update, .final = rk_ahash_final, @@ -376,6 +380,8 @@ struct rk_crypto_tmp rk_ahash_sha1 = { .export = rk_ahash_export, .import = rk_ahash_import, .digest = rk_ahash_digest, + .init_tfm = rk_hash_init_tfm, + .exit_tfm = rk_hash_exit_tfm, .halg = { .digestsize = SHA1_DIGEST_SIZE, .statesize = sizeof(struct sha1_state), @@ -388,17 +394,18 @@ struct rk_crypto_tmp rk_ahash_sha1 = { .cra_blocksize = SHA1_BLOCK_SIZE, .cra_ctxsize = sizeof(struct rk_ahash_ctx), .cra_alignmask = 3, - .cra_init = rk_cra_hash_init, - .cra_exit = rk_cra_hash_exit, .cra_module = THIS_MODULE, } } - } + }, + .alg.hash.op = { + .do_one_request = rk_hash_run, + }, }; struct rk_crypto_tmp rk_ahash_sha256 = { .type = CRYPTO_ALG_TYPE_AHASH, - .alg.hash = { + .alg.hash.base = { .init = rk_ahash_init, .update = rk_ahash_update, .final = rk_ahash_final, @@ -406,6 +413,8 @@ struct rk_crypto_tmp rk_ahash_sha256 = { .export = rk_ahash_export, .import = rk_ahash_import, .digest = rk_ahash_digest, + .init_tfm = rk_hash_init_tfm, + .exit_tfm = rk_hash_exit_tfm, .halg = { .digestsize = SHA256_DIGEST_SIZE, .statesize = sizeof(struct sha256_state), @@ -418,17 +427,18 @@ struct rk_crypto_tmp rk_ahash_sha256 = { .cra_blocksize = SHA256_BLOCK_SIZE, .cra_ctxsize = sizeof(struct rk_ahash_ctx), .cra_alignmask = 3, - .cra_init = rk_cra_hash_init, - .cra_exit = rk_cra_hash_exit, .cra_module = THIS_MODULE, } } - } + }, + .alg.hash.op = { + .do_one_request = rk_hash_run, + }, }; struct rk_crypto_tmp rk_ahash_md5 = { .type = CRYPTO_ALG_TYPE_AHASH, - .alg.hash = { + .alg.hash.base = { .init = rk_ahash_init, .update = rk_ahash_update, .final = rk_ahash_final, @@ -436,6 +446,8 @@ struct rk_crypto_tmp rk_ahash_md5 = { .export = rk_ahash_export, .import = rk_ahash_import, .digest = rk_ahash_digest, + .init_tfm = rk_hash_init_tfm, + .exit_tfm = rk_hash_exit_tfm, .halg = { .digestsize = MD5_DIGEST_SIZE, .statesize = sizeof(struct md5_state), @@ -448,10 +460,11 @@ struct rk_crypto_tmp rk_ahash_md5 = { .cra_blocksize = SHA1_BLOCK_SIZE, .cra_ctxsize = sizeof(struct rk_ahash_ctx), .cra_alignmask = 3, - .cra_init = rk_cra_hash_init, - .cra_exit = rk_cra_hash_exit, .cra_module = THIS_MODULE, } } - } + }, + .alg.hash.op = { + .do_one_request = rk_hash_run, + }, }; diff --git a/drivers/crypto/rockchip/rk3288_crypto_skcipher.c b/drivers/crypto/rockchip/rk3288_crypto_skcipher.c index 59069457582b..da95747d973f 100644 --- a/drivers/crypto/rockchip/rk3288_crypto_skcipher.c +++ b/drivers/crypto/rockchip/rk3288_crypto_skcipher.c @@ -8,8 +8,14 @@ * * Some ideas are from marvell-cesa.c and s5p-sss.c driver. */ -#include + +#include +#include #include +#include +#include +#include +#include #include "rk3288_crypto.h" #define RK_CRYPTO_DEC BIT(0) @@ -18,7 +24,7 @@ static int rk_cipher_need_fallback(struct skcipher_request *req) { struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req); struct skcipher_alg *alg = crypto_skcipher_alg(tfm); - struct rk_crypto_tmp *algt = container_of(alg, struct rk_crypto_tmp, alg.skcipher); + struct rk_crypto_tmp *algt = container_of(alg, struct rk_crypto_tmp, alg.skcipher.base); struct scatterlist *sgs, *sgd; unsigned int stodo, dtodo, len; unsigned int bs = crypto_skcipher_blocksize(tfm); @@ -65,7 +71,7 @@ static int rk_cipher_fallback(struct skcipher_request *areq) struct rk_cipher_ctx *op = crypto_skcipher_ctx(tfm); struct rk_cipher_rctx *rctx = skcipher_request_ctx(areq); struct skcipher_alg *alg = crypto_skcipher_alg(tfm); - struct rk_crypto_tmp *algt = container_of(alg, struct rk_crypto_tmp, alg.skcipher); + struct rk_crypto_tmp *algt = container_of(alg, struct rk_crypto_tmp, alg.skcipher.base); int err; algt->stat_fb++; @@ -305,7 +311,7 @@ static int rk_cipher_run(struct crypto_engine *engine, void *async_req) unsigned int len = areq->cryptlen; unsigned int todo; struct skcipher_alg *alg = crypto_skcipher_alg(tfm); - struct rk_crypto_tmp *algt = container_of(alg, struct rk_crypto_tmp, alg.skcipher); + struct rk_crypto_tmp *algt = container_of(alg, struct rk_crypto_tmp, alg.skcipher.base); struct rk_crypto_info *rkc = rctx->dev; err = pm_runtime_resume_and_get(rkc->dev); @@ -430,7 +436,7 @@ static int rk_cipher_tfm_init(struct crypto_skcipher *tfm) struct rk_cipher_ctx *ctx = crypto_skcipher_ctx(tfm); const char *name = crypto_tfm_alg_name(&tfm->base); struct skcipher_alg *alg = crypto_skcipher_alg(tfm); - struct rk_crypto_tmp *algt = container_of(alg, struct rk_crypto_tmp, alg.skcipher); + struct rk_crypto_tmp *algt = container_of(alg, struct rk_crypto_tmp, alg.skcipher.base); ctx->fallback_tfm = crypto_alloc_skcipher(name, 0, CRYPTO_ALG_NEED_FALLBACK); if (IS_ERR(ctx->fallback_tfm)) { @@ -442,8 +448,6 @@ static int rk_cipher_tfm_init(struct crypto_skcipher *tfm) tfm->reqsize = sizeof(struct rk_cipher_rctx) + crypto_skcipher_reqsize(ctx->fallback_tfm); - ctx->enginectx.op.do_one_request = rk_cipher_run; - return 0; } @@ -457,7 +461,7 @@ static void rk_cipher_tfm_exit(struct crypto_skcipher *tfm) struct rk_crypto_tmp rk_ecb_aes_alg = { .type = CRYPTO_ALG_TYPE_SKCIPHER, - .alg.skcipher = { + .alg.skcipher.base = { .base.cra_name = "ecb(aes)", .base.cra_driver_name = "ecb-aes-rk", .base.cra_priority = 300, @@ -474,12 +478,15 @@ struct rk_crypto_tmp rk_ecb_aes_alg = { .setkey = rk_aes_setkey, .encrypt = rk_aes_ecb_encrypt, .decrypt = rk_aes_ecb_decrypt, - } + }, + .alg.skcipher.op = { + .do_one_request = rk_cipher_run, + }, }; struct rk_crypto_tmp rk_cbc_aes_alg = { .type = CRYPTO_ALG_TYPE_SKCIPHER, - .alg.skcipher = { + .alg.skcipher.base = { .base.cra_name = "cbc(aes)", .base.cra_driver_name = "cbc-aes-rk", .base.cra_priority = 300, @@ -497,12 +504,15 @@ struct rk_crypto_tmp rk_cbc_aes_alg = { .setkey = rk_aes_setkey, .encrypt = rk_aes_cbc_encrypt, .decrypt = rk_aes_cbc_decrypt, - } + }, + .alg.skcipher.op = { + .do_one_request = rk_cipher_run, + }, }; struct rk_crypto_tmp rk_ecb_des_alg = { .type = CRYPTO_ALG_TYPE_SKCIPHER, - .alg.skcipher = { + .alg.skcipher.base = { .base.cra_name = "ecb(des)", .base.cra_driver_name = "ecb-des-rk", .base.cra_priority = 300, @@ -519,12 +529,15 @@ struct rk_crypto_tmp rk_ecb_des_alg = { .setkey = rk_des_setkey, .encrypt = rk_des_ecb_encrypt, .decrypt = rk_des_ecb_decrypt, - } + }, + .alg.skcipher.op = { + .do_one_request = rk_cipher_run, + }, }; struct rk_crypto_tmp rk_cbc_des_alg = { .type = CRYPTO_ALG_TYPE_SKCIPHER, - .alg.skcipher = { + .alg.skcipher.base = { .base.cra_name = "cbc(des)", .base.cra_driver_name = "cbc-des-rk", .base.cra_priority = 300, @@ -542,12 +555,15 @@ struct rk_crypto_tmp rk_cbc_des_alg = { .setkey = rk_des_setkey, .encrypt = rk_des_cbc_encrypt, .decrypt = rk_des_cbc_decrypt, - } + }, + .alg.skcipher.op = { + .do_one_request = rk_cipher_run, + }, }; struct rk_crypto_tmp rk_ecb_des3_ede_alg = { .type = CRYPTO_ALG_TYPE_SKCIPHER, - .alg.skcipher = { + .alg.skcipher.base = { .base.cra_name = "ecb(des3_ede)", .base.cra_driver_name = "ecb-des3-ede-rk", .base.cra_priority = 300, @@ -564,12 +580,15 @@ struct rk_crypto_tmp rk_ecb_des3_ede_alg = { .setkey = rk_tdes_setkey, .encrypt = rk_des3_ede_ecb_encrypt, .decrypt = rk_des3_ede_ecb_decrypt, - } + }, + .alg.skcipher.op = { + .do_one_request = rk_cipher_run, + }, }; struct rk_crypto_tmp rk_cbc_des3_ede_alg = { .type = CRYPTO_ALG_TYPE_SKCIPHER, - .alg.skcipher = { + .alg.skcipher.base = { .base.cra_name = "cbc(des3_ede)", .base.cra_driver_name = "cbc-des3-ede-rk", .base.cra_priority = 300, @@ -587,5 +606,8 @@ struct rk_crypto_tmp rk_cbc_des3_ede_alg = { .setkey = rk_tdes_setkey, .encrypt = rk_des3_ede_cbc_encrypt, .decrypt = rk_des3_ede_cbc_decrypt, - } + }, + .alg.skcipher.op = { + .do_one_request = rk_cipher_run, + }, }; From 982213e4730484ad080070a20f4a4a8deb0fa688 Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Sun, 13 Aug 2023 14:55:12 +0800 Subject: [PATCH 528/656] crypto: jh7110 - Use new crypto_engine_op interface Use the new crypto_engine_op interface where the callback is stored in the algorithm object. Signed-off-by: Herbert Xu --- drivers/crypto/starfive/jh7110-aes.c | 162 ++++++++------- drivers/crypto/starfive/jh7110-cryp.c | 9 +- drivers/crypto/starfive/jh7110-cryp.h | 2 - drivers/crypto/starfive/jh7110-hash.c | 282 ++++++++++++++------------ 4 files changed, 251 insertions(+), 204 deletions(-) diff --git a/drivers/crypto/starfive/jh7110-aes.c b/drivers/crypto/starfive/jh7110-aes.c index 777656cbb7ce..9378e6682f0e 100644 --- a/drivers/crypto/starfive/jh7110-aes.c +++ b/drivers/crypto/starfive/jh7110-aes.c @@ -5,12 +5,17 @@ * Copyright (c) 2022 StarFive Technology */ -#include +#include #include -#include #include #include +#include #include "jh7110-cryp.h" +#include +#include +#include +#include +#include #define STARFIVE_AES_REGS_OFFSET 0x100 #define STARFIVE_AES_AESDIO0R (STARFIVE_AES_REGS_OFFSET + 0x0) @@ -554,8 +559,6 @@ static int starfive_aes_init_tfm(struct crypto_skcipher *tfm) crypto_skcipher_set_reqsize(tfm, sizeof(struct starfive_cryp_request_ctx) + sizeof(struct skcipher_request)); - ctx->enginectx.op.do_one_request = starfive_aes_do_one_req; - return 0; } @@ -638,8 +641,6 @@ static int starfive_aes_aead_init_tfm(struct crypto_aead *tfm) crypto_aead_set_reqsize(tfm, sizeof(struct starfive_cryp_ctx) + sizeof(struct aead_request)); - ctx->enginectx.op.do_one_request = starfive_aes_aead_do_one_req; - return 0; } @@ -844,15 +845,15 @@ static int starfive_aes_ccm_decrypt(struct aead_request *req) return starfive_aes_aead_crypt(req, STARFIVE_AES_MODE_CCM); } -static struct skcipher_alg skcipher_algs[] = { +static struct skcipher_engine_alg skcipher_algs[] = { { - .init = starfive_aes_init_tfm, - .setkey = starfive_aes_setkey, - .encrypt = starfive_aes_ecb_encrypt, - .decrypt = starfive_aes_ecb_decrypt, - .min_keysize = AES_MIN_KEY_SIZE, - .max_keysize = AES_MAX_KEY_SIZE, - .base = { + .base.init = starfive_aes_init_tfm, + .base.setkey = starfive_aes_setkey, + .base.encrypt = starfive_aes_ecb_encrypt, + .base.decrypt = starfive_aes_ecb_decrypt, + .base.min_keysize = AES_MIN_KEY_SIZE, + .base.max_keysize = AES_MAX_KEY_SIZE, + .base.base = { .cra_name = "ecb(aes)", .cra_driver_name = "starfive-ecb-aes", .cra_priority = 200, @@ -862,15 +863,18 @@ static struct skcipher_alg skcipher_algs[] = { .cra_alignmask = 0xf, .cra_module = THIS_MODULE, }, + .op = { + .do_one_request = starfive_aes_do_one_req, + }, }, { - .init = starfive_aes_init_tfm, - .setkey = starfive_aes_setkey, - .encrypt = starfive_aes_cbc_encrypt, - .decrypt = starfive_aes_cbc_decrypt, - .min_keysize = AES_MIN_KEY_SIZE, - .max_keysize = AES_MAX_KEY_SIZE, - .ivsize = AES_BLOCK_SIZE, - .base = { + .base.init = starfive_aes_init_tfm, + .base.setkey = starfive_aes_setkey, + .base.encrypt = starfive_aes_cbc_encrypt, + .base.decrypt = starfive_aes_cbc_decrypt, + .base.min_keysize = AES_MIN_KEY_SIZE, + .base.max_keysize = AES_MAX_KEY_SIZE, + .base.ivsize = AES_BLOCK_SIZE, + .base.base = { .cra_name = "cbc(aes)", .cra_driver_name = "starfive-cbc-aes", .cra_priority = 200, @@ -880,15 +884,18 @@ static struct skcipher_alg skcipher_algs[] = { .cra_alignmask = 0xf, .cra_module = THIS_MODULE, }, + .op = { + .do_one_request = starfive_aes_do_one_req, + }, }, { - .init = starfive_aes_init_tfm, - .setkey = starfive_aes_setkey, - .encrypt = starfive_aes_ctr_encrypt, - .decrypt = starfive_aes_ctr_decrypt, - .min_keysize = AES_MIN_KEY_SIZE, - .max_keysize = AES_MAX_KEY_SIZE, - .ivsize = AES_BLOCK_SIZE, - .base = { + .base.init = starfive_aes_init_tfm, + .base.setkey = starfive_aes_setkey, + .base.encrypt = starfive_aes_ctr_encrypt, + .base.decrypt = starfive_aes_ctr_decrypt, + .base.min_keysize = AES_MIN_KEY_SIZE, + .base.max_keysize = AES_MAX_KEY_SIZE, + .base.ivsize = AES_BLOCK_SIZE, + .base.base = { .cra_name = "ctr(aes)", .cra_driver_name = "starfive-ctr-aes", .cra_priority = 200, @@ -898,15 +905,18 @@ static struct skcipher_alg skcipher_algs[] = { .cra_alignmask = 0xf, .cra_module = THIS_MODULE, }, + .op = { + .do_one_request = starfive_aes_do_one_req, + }, }, { - .init = starfive_aes_init_tfm, - .setkey = starfive_aes_setkey, - .encrypt = starfive_aes_cfb_encrypt, - .decrypt = starfive_aes_cfb_decrypt, - .min_keysize = AES_MIN_KEY_SIZE, - .max_keysize = AES_MAX_KEY_SIZE, - .ivsize = AES_BLOCK_SIZE, - .base = { + .base.init = starfive_aes_init_tfm, + .base.setkey = starfive_aes_setkey, + .base.encrypt = starfive_aes_cfb_encrypt, + .base.decrypt = starfive_aes_cfb_decrypt, + .base.min_keysize = AES_MIN_KEY_SIZE, + .base.max_keysize = AES_MAX_KEY_SIZE, + .base.ivsize = AES_BLOCK_SIZE, + .base.base = { .cra_name = "cfb(aes)", .cra_driver_name = "starfive-cfb-aes", .cra_priority = 200, @@ -916,15 +926,18 @@ static struct skcipher_alg skcipher_algs[] = { .cra_alignmask = 0xf, .cra_module = THIS_MODULE, }, + .op = { + .do_one_request = starfive_aes_do_one_req, + }, }, { - .init = starfive_aes_init_tfm, - .setkey = starfive_aes_setkey, - .encrypt = starfive_aes_ofb_encrypt, - .decrypt = starfive_aes_ofb_decrypt, - .min_keysize = AES_MIN_KEY_SIZE, - .max_keysize = AES_MAX_KEY_SIZE, - .ivsize = AES_BLOCK_SIZE, - .base = { + .base.init = starfive_aes_init_tfm, + .base.setkey = starfive_aes_setkey, + .base.encrypt = starfive_aes_ofb_encrypt, + .base.decrypt = starfive_aes_ofb_decrypt, + .base.min_keysize = AES_MIN_KEY_SIZE, + .base.max_keysize = AES_MAX_KEY_SIZE, + .base.ivsize = AES_BLOCK_SIZE, + .base.base = { .cra_name = "ofb(aes)", .cra_driver_name = "starfive-ofb-aes", .cra_priority = 200, @@ -934,20 +947,23 @@ static struct skcipher_alg skcipher_algs[] = { .cra_alignmask = 0xf, .cra_module = THIS_MODULE, }, + .op = { + .do_one_request = starfive_aes_do_one_req, + }, }, }; -static struct aead_alg aead_algs[] = { +static struct aead_engine_alg aead_algs[] = { { - .setkey = starfive_aes_aead_setkey, - .setauthsize = starfive_aes_gcm_setauthsize, - .encrypt = starfive_aes_gcm_encrypt, - .decrypt = starfive_aes_gcm_decrypt, - .init = starfive_aes_aead_init_tfm, - .exit = starfive_aes_aead_exit_tfm, - .ivsize = GCM_AES_IV_SIZE, - .maxauthsize = AES_BLOCK_SIZE, - .base = { + .base.setkey = starfive_aes_aead_setkey, + .base.setauthsize = starfive_aes_gcm_setauthsize, + .base.encrypt = starfive_aes_gcm_encrypt, + .base.decrypt = starfive_aes_gcm_decrypt, + .base.init = starfive_aes_aead_init_tfm, + .base.exit = starfive_aes_aead_exit_tfm, + .base.ivsize = GCM_AES_IV_SIZE, + .base.maxauthsize = AES_BLOCK_SIZE, + .base.base = { .cra_name = "gcm(aes)", .cra_driver_name = "starfive-gcm-aes", .cra_priority = 200, @@ -957,16 +973,19 @@ static struct aead_alg aead_algs[] = { .cra_alignmask = 0xf, .cra_module = THIS_MODULE, }, + .op = { + .do_one_request = starfive_aes_aead_do_one_req, + }, }, { - .setkey = starfive_aes_aead_setkey, - .setauthsize = starfive_aes_ccm_setauthsize, - .encrypt = starfive_aes_ccm_encrypt, - .decrypt = starfive_aes_ccm_decrypt, - .init = starfive_aes_aead_init_tfm, - .exit = starfive_aes_aead_exit_tfm, - .ivsize = AES_BLOCK_SIZE, - .maxauthsize = AES_BLOCK_SIZE, - .base = { + .base.setkey = starfive_aes_aead_setkey, + .base.setauthsize = starfive_aes_ccm_setauthsize, + .base.encrypt = starfive_aes_ccm_encrypt, + .base.decrypt = starfive_aes_ccm_decrypt, + .base.init = starfive_aes_aead_init_tfm, + .base.exit = starfive_aes_aead_exit_tfm, + .base.ivsize = AES_BLOCK_SIZE, + .base.maxauthsize = AES_BLOCK_SIZE, + .base.base = { .cra_name = "ccm(aes)", .cra_driver_name = "starfive-ccm-aes", .cra_priority = 200, @@ -977,6 +996,9 @@ static struct aead_alg aead_algs[] = { .cra_alignmask = 0xf, .cra_module = THIS_MODULE, }, + .op = { + .do_one_request = starfive_aes_aead_do_one_req, + }, }, }; @@ -984,19 +1006,19 @@ int starfive_aes_register_algs(void) { int ret; - ret = crypto_register_skciphers(skcipher_algs, ARRAY_SIZE(skcipher_algs)); + ret = crypto_engine_register_skciphers(skcipher_algs, ARRAY_SIZE(skcipher_algs)); if (ret) return ret; - ret = crypto_register_aeads(aead_algs, ARRAY_SIZE(aead_algs)); + ret = crypto_engine_register_aeads(aead_algs, ARRAY_SIZE(aead_algs)); if (ret) - crypto_unregister_skciphers(skcipher_algs, ARRAY_SIZE(skcipher_algs)); + crypto_engine_unregister_skciphers(skcipher_algs, ARRAY_SIZE(skcipher_algs)); return ret; } void starfive_aes_unregister_algs(void) { - crypto_unregister_aeads(aead_algs, ARRAY_SIZE(aead_algs)); - crypto_unregister_skciphers(skcipher_algs, ARRAY_SIZE(skcipher_algs)); + crypto_engine_unregister_aeads(aead_algs, ARRAY_SIZE(aead_algs)); + crypto_engine_unregister_skciphers(skcipher_algs, ARRAY_SIZE(skcipher_algs)); } diff --git a/drivers/crypto/starfive/jh7110-cryp.c b/drivers/crypto/starfive/jh7110-cryp.c index ab37010ceb88..890ad5259329 100644 --- a/drivers/crypto/starfive/jh7110-cryp.c +++ b/drivers/crypto/starfive/jh7110-cryp.c @@ -7,17 +7,20 @@ * */ +#include +#include "jh7110-cryp.h" #include -#include +#include +#include #include #include +#include #include #include #include #include #include - -#include "jh7110-cryp.h" +#include #define DRIVER_NAME "jh7110-crypto" diff --git a/drivers/crypto/starfive/jh7110-cryp.h b/drivers/crypto/starfive/jh7110-cryp.h index 345a8d878761..fe011d50473d 100644 --- a/drivers/crypto/starfive/jh7110-cryp.h +++ b/drivers/crypto/starfive/jh7110-cryp.h @@ -3,7 +3,6 @@ #define __STARFIVE_STR_H__ #include -#include #include #include #include @@ -151,7 +150,6 @@ union starfive_alg_cr { }; struct starfive_cryp_ctx { - struct crypto_engine_ctx enginectx; struct starfive_cryp_dev *cryp; struct starfive_cryp_request_ctx *rctx; diff --git a/drivers/crypto/starfive/jh7110-hash.c b/drivers/crypto/starfive/jh7110-hash.c index 7fe89cd13336..739e944229af 100644 --- a/drivers/crypto/starfive/jh7110-hash.c +++ b/drivers/crypto/starfive/jh7110-hash.c @@ -6,11 +6,14 @@ * */ +#include +#include +#include +#include "jh7110-cryp.h" +#include #include -#include #include #include -#include #include #include #include @@ -18,13 +21,6 @@ #include #include #include -#include - -#include -#include -#include - -#include "jh7110-cryp.h" #define STARFIVE_HASH_REGS_OFFSET 0x300 #define STARFIVE_HASH_SHACSR (STARFIVE_HASH_REGS_OFFSET + 0x0) @@ -433,8 +429,6 @@ static int starfive_hash_init_tfm(struct crypto_ahash *hash, ctx->keylen = 0; ctx->hash_mode = mode; - ctx->enginectx.op.do_one_request = starfive_hash_one_request; - return 0; } @@ -612,18 +606,18 @@ static int starfive_hmac_sm3_init_tfm(struct crypto_ahash *hash) STARFIVE_HASH_SM3); } -static struct ahash_alg algs_sha2_sm3[] = { +static struct ahash_engine_alg algs_sha2_sm3[] = { { - .init = starfive_hash_init, - .update = starfive_hash_update, - .final = starfive_hash_final, - .finup = starfive_hash_finup, - .digest = starfive_hash_digest, - .export = starfive_hash_export, - .import = starfive_hash_import, - .init_tfm = starfive_sha224_init_tfm, - .exit_tfm = starfive_hash_exit_tfm, - .halg = { + .base.init = starfive_hash_init, + .base.update = starfive_hash_update, + .base.final = starfive_hash_final, + .base.finup = starfive_hash_finup, + .base.digest = starfive_hash_digest, + .base.export = starfive_hash_export, + .base.import = starfive_hash_import, + .base.init_tfm = starfive_sha224_init_tfm, + .base.exit_tfm = starfive_hash_exit_tfm, + .base.halg = { .digestsize = SHA224_DIGEST_SIZE, .statesize = sizeof(struct sha256_state), .base = { @@ -638,19 +632,22 @@ static struct ahash_alg algs_sha2_sm3[] = { .cra_alignmask = 3, .cra_module = THIS_MODULE, } - } + }, + .op = { + .do_one_request = starfive_hash_one_request, + }, }, { - .init = starfive_hash_init, - .update = starfive_hash_update, - .final = starfive_hash_final, - .finup = starfive_hash_finup, - .digest = starfive_hash_digest, - .export = starfive_hash_export, - .import = starfive_hash_import, - .init_tfm = starfive_hmac_sha224_init_tfm, - .exit_tfm = starfive_hash_exit_tfm, - .setkey = starfive_hash_setkey, - .halg = { + .base.init = starfive_hash_init, + .base.update = starfive_hash_update, + .base.final = starfive_hash_final, + .base.finup = starfive_hash_finup, + .base.digest = starfive_hash_digest, + .base.export = starfive_hash_export, + .base.import = starfive_hash_import, + .base.init_tfm = starfive_hmac_sha224_init_tfm, + .base.exit_tfm = starfive_hash_exit_tfm, + .base.setkey = starfive_hash_setkey, + .base.halg = { .digestsize = SHA224_DIGEST_SIZE, .statesize = sizeof(struct sha256_state), .base = { @@ -665,18 +662,21 @@ static struct ahash_alg algs_sha2_sm3[] = { .cra_alignmask = 3, .cra_module = THIS_MODULE, } - } + }, + .op = { + .do_one_request = starfive_hash_one_request, + }, }, { - .init = starfive_hash_init, - .update = starfive_hash_update, - .final = starfive_hash_final, - .finup = starfive_hash_finup, - .digest = starfive_hash_digest, - .export = starfive_hash_export, - .import = starfive_hash_import, - .init_tfm = starfive_sha256_init_tfm, - .exit_tfm = starfive_hash_exit_tfm, - .halg = { + .base.init = starfive_hash_init, + .base.update = starfive_hash_update, + .base.final = starfive_hash_final, + .base.finup = starfive_hash_finup, + .base.digest = starfive_hash_digest, + .base.export = starfive_hash_export, + .base.import = starfive_hash_import, + .base.init_tfm = starfive_sha256_init_tfm, + .base.exit_tfm = starfive_hash_exit_tfm, + .base.halg = { .digestsize = SHA256_DIGEST_SIZE, .statesize = sizeof(struct sha256_state), .base = { @@ -691,19 +691,22 @@ static struct ahash_alg algs_sha2_sm3[] = { .cra_alignmask = 3, .cra_module = THIS_MODULE, } - } + }, + .op = { + .do_one_request = starfive_hash_one_request, + }, }, { - .init = starfive_hash_init, - .update = starfive_hash_update, - .final = starfive_hash_final, - .finup = starfive_hash_finup, - .digest = starfive_hash_digest, - .export = starfive_hash_export, - .import = starfive_hash_import, - .init_tfm = starfive_hmac_sha256_init_tfm, - .exit_tfm = starfive_hash_exit_tfm, - .setkey = starfive_hash_setkey, - .halg = { + .base.init = starfive_hash_init, + .base.update = starfive_hash_update, + .base.final = starfive_hash_final, + .base.finup = starfive_hash_finup, + .base.digest = starfive_hash_digest, + .base.export = starfive_hash_export, + .base.import = starfive_hash_import, + .base.init_tfm = starfive_hmac_sha256_init_tfm, + .base.exit_tfm = starfive_hash_exit_tfm, + .base.setkey = starfive_hash_setkey, + .base.halg = { .digestsize = SHA256_DIGEST_SIZE, .statesize = sizeof(struct sha256_state), .base = { @@ -718,18 +721,21 @@ static struct ahash_alg algs_sha2_sm3[] = { .cra_alignmask = 3, .cra_module = THIS_MODULE, } - } + }, + .op = { + .do_one_request = starfive_hash_one_request, + }, }, { - .init = starfive_hash_init, - .update = starfive_hash_update, - .final = starfive_hash_final, - .finup = starfive_hash_finup, - .digest = starfive_hash_digest, - .export = starfive_hash_export, - .import = starfive_hash_import, - .init_tfm = starfive_sha384_init_tfm, - .exit_tfm = starfive_hash_exit_tfm, - .halg = { + .base.init = starfive_hash_init, + .base.update = starfive_hash_update, + .base.final = starfive_hash_final, + .base.finup = starfive_hash_finup, + .base.digest = starfive_hash_digest, + .base.export = starfive_hash_export, + .base.import = starfive_hash_import, + .base.init_tfm = starfive_sha384_init_tfm, + .base.exit_tfm = starfive_hash_exit_tfm, + .base.halg = { .digestsize = SHA384_DIGEST_SIZE, .statesize = sizeof(struct sha512_state), .base = { @@ -744,19 +750,22 @@ static struct ahash_alg algs_sha2_sm3[] = { .cra_alignmask = 3, .cra_module = THIS_MODULE, } - } + }, + .op = { + .do_one_request = starfive_hash_one_request, + }, }, { - .init = starfive_hash_init, - .update = starfive_hash_update, - .final = starfive_hash_final, - .finup = starfive_hash_finup, - .digest = starfive_hash_digest, - .export = starfive_hash_export, - .import = starfive_hash_import, - .init_tfm = starfive_hmac_sha384_init_tfm, - .exit_tfm = starfive_hash_exit_tfm, - .setkey = starfive_hash_setkey, - .halg = { + .base.init = starfive_hash_init, + .base.update = starfive_hash_update, + .base.final = starfive_hash_final, + .base.finup = starfive_hash_finup, + .base.digest = starfive_hash_digest, + .base.export = starfive_hash_export, + .base.import = starfive_hash_import, + .base.init_tfm = starfive_hmac_sha384_init_tfm, + .base.exit_tfm = starfive_hash_exit_tfm, + .base.setkey = starfive_hash_setkey, + .base.halg = { .digestsize = SHA384_DIGEST_SIZE, .statesize = sizeof(struct sha512_state), .base = { @@ -771,18 +780,21 @@ static struct ahash_alg algs_sha2_sm3[] = { .cra_alignmask = 3, .cra_module = THIS_MODULE, } - } + }, + .op = { + .do_one_request = starfive_hash_one_request, + }, }, { - .init = starfive_hash_init, - .update = starfive_hash_update, - .final = starfive_hash_final, - .finup = starfive_hash_finup, - .digest = starfive_hash_digest, - .export = starfive_hash_export, - .import = starfive_hash_import, - .init_tfm = starfive_sha512_init_tfm, - .exit_tfm = starfive_hash_exit_tfm, - .halg = { + .base.init = starfive_hash_init, + .base.update = starfive_hash_update, + .base.final = starfive_hash_final, + .base.finup = starfive_hash_finup, + .base.digest = starfive_hash_digest, + .base.export = starfive_hash_export, + .base.import = starfive_hash_import, + .base.init_tfm = starfive_sha512_init_tfm, + .base.exit_tfm = starfive_hash_exit_tfm, + .base.halg = { .digestsize = SHA512_DIGEST_SIZE, .statesize = sizeof(struct sha512_state), .base = { @@ -797,19 +809,22 @@ static struct ahash_alg algs_sha2_sm3[] = { .cra_alignmask = 3, .cra_module = THIS_MODULE, } - } + }, + .op = { + .do_one_request = starfive_hash_one_request, + }, }, { - .init = starfive_hash_init, - .update = starfive_hash_update, - .final = starfive_hash_final, - .finup = starfive_hash_finup, - .digest = starfive_hash_digest, - .export = starfive_hash_export, - .import = starfive_hash_import, - .init_tfm = starfive_hmac_sha512_init_tfm, - .exit_tfm = starfive_hash_exit_tfm, - .setkey = starfive_hash_setkey, - .halg = { + .base.init = starfive_hash_init, + .base.update = starfive_hash_update, + .base.final = starfive_hash_final, + .base.finup = starfive_hash_finup, + .base.digest = starfive_hash_digest, + .base.export = starfive_hash_export, + .base.import = starfive_hash_import, + .base.init_tfm = starfive_hmac_sha512_init_tfm, + .base.exit_tfm = starfive_hash_exit_tfm, + .base.setkey = starfive_hash_setkey, + .base.halg = { .digestsize = SHA512_DIGEST_SIZE, .statesize = sizeof(struct sha512_state), .base = { @@ -824,18 +839,21 @@ static struct ahash_alg algs_sha2_sm3[] = { .cra_alignmask = 3, .cra_module = THIS_MODULE, } - } + }, + .op = { + .do_one_request = starfive_hash_one_request, + }, }, { - .init = starfive_hash_init, - .update = starfive_hash_update, - .final = starfive_hash_final, - .finup = starfive_hash_finup, - .digest = starfive_hash_digest, - .export = starfive_hash_export, - .import = starfive_hash_import, - .init_tfm = starfive_sm3_init_tfm, - .exit_tfm = starfive_hash_exit_tfm, - .halg = { + .base.init = starfive_hash_init, + .base.update = starfive_hash_update, + .base.final = starfive_hash_final, + .base.finup = starfive_hash_finup, + .base.digest = starfive_hash_digest, + .base.export = starfive_hash_export, + .base.import = starfive_hash_import, + .base.init_tfm = starfive_sm3_init_tfm, + .base.exit_tfm = starfive_hash_exit_tfm, + .base.halg = { .digestsize = SM3_DIGEST_SIZE, .statesize = sizeof(struct sm3_state), .base = { @@ -850,19 +868,22 @@ static struct ahash_alg algs_sha2_sm3[] = { .cra_alignmask = 3, .cra_module = THIS_MODULE, } - } + }, + .op = { + .do_one_request = starfive_hash_one_request, + }, }, { - .init = starfive_hash_init, - .update = starfive_hash_update, - .final = starfive_hash_final, - .finup = starfive_hash_finup, - .digest = starfive_hash_digest, - .export = starfive_hash_export, - .import = starfive_hash_import, - .init_tfm = starfive_hmac_sm3_init_tfm, - .exit_tfm = starfive_hash_exit_tfm, - .setkey = starfive_hash_setkey, - .halg = { + .base.init = starfive_hash_init, + .base.update = starfive_hash_update, + .base.final = starfive_hash_final, + .base.finup = starfive_hash_finup, + .base.digest = starfive_hash_digest, + .base.export = starfive_hash_export, + .base.import = starfive_hash_import, + .base.init_tfm = starfive_hmac_sm3_init_tfm, + .base.exit_tfm = starfive_hash_exit_tfm, + .base.setkey = starfive_hash_setkey, + .base.halg = { .digestsize = SM3_DIGEST_SIZE, .statesize = sizeof(struct sm3_state), .base = { @@ -877,16 +898,19 @@ static struct ahash_alg algs_sha2_sm3[] = { .cra_alignmask = 3, .cra_module = THIS_MODULE, } - } + }, + .op = { + .do_one_request = starfive_hash_one_request, + }, }, }; int starfive_hash_register_algs(void) { - return crypto_register_ahashes(algs_sha2_sm3, ARRAY_SIZE(algs_sha2_sm3)); + return crypto_engine_register_ahashes(algs_sha2_sm3, ARRAY_SIZE(algs_sha2_sm3)); } void starfive_hash_unregister_algs(void) { - crypto_unregister_ahashes(algs_sha2_sm3, ARRAY_SIZE(algs_sha2_sm3)); + crypto_engine_unregister_ahashes(algs_sha2_sm3, ARRAY_SIZE(algs_sha2_sm3)); } From d5e6b48f94d66ca05ea64341b7ffbb7f981cca64 Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Sun, 13 Aug 2023 14:55:14 +0800 Subject: [PATCH 529/656] crypto: stm32 - Use new crypto_engine_op interface Use the new crypto_engine_op interface where the callback is stored in the algorithm object. Signed-off-by: Herbert Xu --- drivers/crypto/stm32/stm32-cryp.c | 317 +++++++++++--------- drivers/crypto/stm32/stm32-hash.c | 483 +++++++++++++++++------------- 2 files changed, 445 insertions(+), 355 deletions(-) diff --git a/drivers/crypto/stm32/stm32-cryp.c b/drivers/crypto/stm32/stm32-cryp.c index 07e32b8dbe29..c67239686b1e 100644 --- a/drivers/crypto/stm32/stm32-cryp.c +++ b/drivers/crypto/stm32/stm32-cryp.c @@ -5,22 +5,24 @@ * Ux500 support taken from snippets in the old Ux500 cryp driver */ +#include +#include +#include +#include +#include +#include #include #include -#include +#include #include +#include +#include #include #include #include #include #include - -#include -#include -#include -#include -#include -#include +#include #define DRIVER_NAME "stm32-cryp" @@ -156,7 +158,6 @@ struct stm32_cryp_caps { }; struct stm32_cryp_ctx { - struct crypto_engine_ctx enginectx; struct stm32_cryp *cryp; int keylen; __be32 key[AES_KEYSIZE_256 / sizeof(u32)]; @@ -828,11 +829,8 @@ static int stm32_cryp_cipher_one_req(struct crypto_engine *engine, void *areq); static int stm32_cryp_init_tfm(struct crypto_skcipher *tfm) { - struct stm32_cryp_ctx *ctx = crypto_skcipher_ctx(tfm); - crypto_skcipher_set_reqsize(tfm, sizeof(struct stm32_cryp_reqctx)); - ctx->enginectx.op.do_one_request = stm32_cryp_cipher_one_req; return 0; } @@ -840,12 +838,8 @@ static int stm32_cryp_aead_one_req(struct crypto_engine *engine, void *areq); static int stm32_cryp_aes_aead_init(struct crypto_aead *tfm) { - struct stm32_cryp_ctx *ctx = crypto_aead_ctx(tfm); - tfm->reqsize = sizeof(struct stm32_cryp_reqctx); - ctx->enginectx.op.do_one_request = stm32_cryp_aead_one_req; - return 0; } @@ -1686,143 +1680,178 @@ static irqreturn_t stm32_cryp_irq(int irq, void *arg) return IRQ_WAKE_THREAD; } -static struct skcipher_alg crypto_algs[] = { +static struct skcipher_engine_alg crypto_algs[] = { { - .base.cra_name = "ecb(aes)", - .base.cra_driver_name = "stm32-ecb-aes", - .base.cra_priority = 200, - .base.cra_flags = CRYPTO_ALG_ASYNC, - .base.cra_blocksize = AES_BLOCK_SIZE, - .base.cra_ctxsize = sizeof(struct stm32_cryp_ctx), - .base.cra_alignmask = 0, - .base.cra_module = THIS_MODULE, + .base = { + .base.cra_name = "ecb(aes)", + .base.cra_driver_name = "stm32-ecb-aes", + .base.cra_priority = 200, + .base.cra_flags = CRYPTO_ALG_ASYNC, + .base.cra_blocksize = AES_BLOCK_SIZE, + .base.cra_ctxsize = sizeof(struct stm32_cryp_ctx), + .base.cra_alignmask = 0, + .base.cra_module = THIS_MODULE, - .init = stm32_cryp_init_tfm, - .min_keysize = AES_MIN_KEY_SIZE, - .max_keysize = AES_MAX_KEY_SIZE, - .setkey = stm32_cryp_aes_setkey, - .encrypt = stm32_cryp_aes_ecb_encrypt, - .decrypt = stm32_cryp_aes_ecb_decrypt, + .init = stm32_cryp_init_tfm, + .min_keysize = AES_MIN_KEY_SIZE, + .max_keysize = AES_MAX_KEY_SIZE, + .setkey = stm32_cryp_aes_setkey, + .encrypt = stm32_cryp_aes_ecb_encrypt, + .decrypt = stm32_cryp_aes_ecb_decrypt, + }, + .op = { + .do_one_request = stm32_cryp_cipher_one_req, + }, }, { - .base.cra_name = "cbc(aes)", - .base.cra_driver_name = "stm32-cbc-aes", - .base.cra_priority = 200, - .base.cra_flags = CRYPTO_ALG_ASYNC, - .base.cra_blocksize = AES_BLOCK_SIZE, - .base.cra_ctxsize = sizeof(struct stm32_cryp_ctx), - .base.cra_alignmask = 0, - .base.cra_module = THIS_MODULE, + .base = { + .base.cra_name = "cbc(aes)", + .base.cra_driver_name = "stm32-cbc-aes", + .base.cra_priority = 200, + .base.cra_flags = CRYPTO_ALG_ASYNC, + .base.cra_blocksize = AES_BLOCK_SIZE, + .base.cra_ctxsize = sizeof(struct stm32_cryp_ctx), + .base.cra_alignmask = 0, + .base.cra_module = THIS_MODULE, - .init = stm32_cryp_init_tfm, - .min_keysize = AES_MIN_KEY_SIZE, - .max_keysize = AES_MAX_KEY_SIZE, - .ivsize = AES_BLOCK_SIZE, - .setkey = stm32_cryp_aes_setkey, - .encrypt = stm32_cryp_aes_cbc_encrypt, - .decrypt = stm32_cryp_aes_cbc_decrypt, + .init = stm32_cryp_init_tfm, + .min_keysize = AES_MIN_KEY_SIZE, + .max_keysize = AES_MAX_KEY_SIZE, + .ivsize = AES_BLOCK_SIZE, + .setkey = stm32_cryp_aes_setkey, + .encrypt = stm32_cryp_aes_cbc_encrypt, + .decrypt = stm32_cryp_aes_cbc_decrypt, + }, + .op = { + .do_one_request = stm32_cryp_cipher_one_req, + }, }, { - .base.cra_name = "ctr(aes)", - .base.cra_driver_name = "stm32-ctr-aes", - .base.cra_priority = 200, - .base.cra_flags = CRYPTO_ALG_ASYNC, - .base.cra_blocksize = 1, - .base.cra_ctxsize = sizeof(struct stm32_cryp_ctx), - .base.cra_alignmask = 0, - .base.cra_module = THIS_MODULE, + .base = { + .base.cra_name = "ctr(aes)", + .base.cra_driver_name = "stm32-ctr-aes", + .base.cra_priority = 200, + .base.cra_flags = CRYPTO_ALG_ASYNC, + .base.cra_blocksize = 1, + .base.cra_ctxsize = sizeof(struct stm32_cryp_ctx), + .base.cra_alignmask = 0, + .base.cra_module = THIS_MODULE, - .init = stm32_cryp_init_tfm, - .min_keysize = AES_MIN_KEY_SIZE, - .max_keysize = AES_MAX_KEY_SIZE, - .ivsize = AES_BLOCK_SIZE, - .setkey = stm32_cryp_aes_setkey, - .encrypt = stm32_cryp_aes_ctr_encrypt, - .decrypt = stm32_cryp_aes_ctr_decrypt, + .init = stm32_cryp_init_tfm, + .min_keysize = AES_MIN_KEY_SIZE, + .max_keysize = AES_MAX_KEY_SIZE, + .ivsize = AES_BLOCK_SIZE, + .setkey = stm32_cryp_aes_setkey, + .encrypt = stm32_cryp_aes_ctr_encrypt, + .decrypt = stm32_cryp_aes_ctr_decrypt, + }, + .op = { + .do_one_request = stm32_cryp_cipher_one_req, + }, }, { - .base.cra_name = "ecb(des)", - .base.cra_driver_name = "stm32-ecb-des", - .base.cra_priority = 200, - .base.cra_flags = CRYPTO_ALG_ASYNC, - .base.cra_blocksize = DES_BLOCK_SIZE, - .base.cra_ctxsize = sizeof(struct stm32_cryp_ctx), - .base.cra_alignmask = 0, - .base.cra_module = THIS_MODULE, + .base = { + .base.cra_name = "ecb(des)", + .base.cra_driver_name = "stm32-ecb-des", + .base.cra_priority = 200, + .base.cra_flags = CRYPTO_ALG_ASYNC, + .base.cra_blocksize = DES_BLOCK_SIZE, + .base.cra_ctxsize = sizeof(struct stm32_cryp_ctx), + .base.cra_alignmask = 0, + .base.cra_module = THIS_MODULE, - .init = stm32_cryp_init_tfm, - .min_keysize = DES_BLOCK_SIZE, - .max_keysize = DES_BLOCK_SIZE, - .setkey = stm32_cryp_des_setkey, - .encrypt = stm32_cryp_des_ecb_encrypt, - .decrypt = stm32_cryp_des_ecb_decrypt, + .init = stm32_cryp_init_tfm, + .min_keysize = DES_BLOCK_SIZE, + .max_keysize = DES_BLOCK_SIZE, + .setkey = stm32_cryp_des_setkey, + .encrypt = stm32_cryp_des_ecb_encrypt, + .decrypt = stm32_cryp_des_ecb_decrypt, + }, + .op = { + .do_one_request = stm32_cryp_cipher_one_req, + }, }, { - .base.cra_name = "cbc(des)", - .base.cra_driver_name = "stm32-cbc-des", - .base.cra_priority = 200, - .base.cra_flags = CRYPTO_ALG_ASYNC, - .base.cra_blocksize = DES_BLOCK_SIZE, - .base.cra_ctxsize = sizeof(struct stm32_cryp_ctx), - .base.cra_alignmask = 0, - .base.cra_module = THIS_MODULE, + .base = { + .base.cra_name = "cbc(des)", + .base.cra_driver_name = "stm32-cbc-des", + .base.cra_priority = 200, + .base.cra_flags = CRYPTO_ALG_ASYNC, + .base.cra_blocksize = DES_BLOCK_SIZE, + .base.cra_ctxsize = sizeof(struct stm32_cryp_ctx), + .base.cra_alignmask = 0, + .base.cra_module = THIS_MODULE, - .init = stm32_cryp_init_tfm, - .min_keysize = DES_BLOCK_SIZE, - .max_keysize = DES_BLOCK_SIZE, - .ivsize = DES_BLOCK_SIZE, - .setkey = stm32_cryp_des_setkey, - .encrypt = stm32_cryp_des_cbc_encrypt, - .decrypt = stm32_cryp_des_cbc_decrypt, + .init = stm32_cryp_init_tfm, + .min_keysize = DES_BLOCK_SIZE, + .max_keysize = DES_BLOCK_SIZE, + .ivsize = DES_BLOCK_SIZE, + .setkey = stm32_cryp_des_setkey, + .encrypt = stm32_cryp_des_cbc_encrypt, + .decrypt = stm32_cryp_des_cbc_decrypt, + }, + .op = { + .do_one_request = stm32_cryp_cipher_one_req, + }, }, { - .base.cra_name = "ecb(des3_ede)", - .base.cra_driver_name = "stm32-ecb-des3", - .base.cra_priority = 200, - .base.cra_flags = CRYPTO_ALG_ASYNC, - .base.cra_blocksize = DES_BLOCK_SIZE, - .base.cra_ctxsize = sizeof(struct stm32_cryp_ctx), - .base.cra_alignmask = 0, - .base.cra_module = THIS_MODULE, + .base = { + .base.cra_name = "ecb(des3_ede)", + .base.cra_driver_name = "stm32-ecb-des3", + .base.cra_priority = 200, + .base.cra_flags = CRYPTO_ALG_ASYNC, + .base.cra_blocksize = DES_BLOCK_SIZE, + .base.cra_ctxsize = sizeof(struct stm32_cryp_ctx), + .base.cra_alignmask = 0, + .base.cra_module = THIS_MODULE, - .init = stm32_cryp_init_tfm, - .min_keysize = 3 * DES_BLOCK_SIZE, - .max_keysize = 3 * DES_BLOCK_SIZE, - .setkey = stm32_cryp_tdes_setkey, - .encrypt = stm32_cryp_tdes_ecb_encrypt, - .decrypt = stm32_cryp_tdes_ecb_decrypt, + .init = stm32_cryp_init_tfm, + .min_keysize = 3 * DES_BLOCK_SIZE, + .max_keysize = 3 * DES_BLOCK_SIZE, + .setkey = stm32_cryp_tdes_setkey, + .encrypt = stm32_cryp_tdes_ecb_encrypt, + .decrypt = stm32_cryp_tdes_ecb_decrypt, + }, + .op = { + .do_one_request = stm32_cryp_cipher_one_req, + }, }, { - .base.cra_name = "cbc(des3_ede)", - .base.cra_driver_name = "stm32-cbc-des3", - .base.cra_priority = 200, - .base.cra_flags = CRYPTO_ALG_ASYNC, - .base.cra_blocksize = DES_BLOCK_SIZE, - .base.cra_ctxsize = sizeof(struct stm32_cryp_ctx), - .base.cra_alignmask = 0, - .base.cra_module = THIS_MODULE, + .base = { + .base.cra_name = "cbc(des3_ede)", + .base.cra_driver_name = "stm32-cbc-des3", + .base.cra_priority = 200, + .base.cra_flags = CRYPTO_ALG_ASYNC, + .base.cra_blocksize = DES_BLOCK_SIZE, + .base.cra_ctxsize = sizeof(struct stm32_cryp_ctx), + .base.cra_alignmask = 0, + .base.cra_module = THIS_MODULE, - .init = stm32_cryp_init_tfm, - .min_keysize = 3 * DES_BLOCK_SIZE, - .max_keysize = 3 * DES_BLOCK_SIZE, - .ivsize = DES_BLOCK_SIZE, - .setkey = stm32_cryp_tdes_setkey, - .encrypt = stm32_cryp_tdes_cbc_encrypt, - .decrypt = stm32_cryp_tdes_cbc_decrypt, + .init = stm32_cryp_init_tfm, + .min_keysize = 3 * DES_BLOCK_SIZE, + .max_keysize = 3 * DES_BLOCK_SIZE, + .ivsize = DES_BLOCK_SIZE, + .setkey = stm32_cryp_tdes_setkey, + .encrypt = stm32_cryp_tdes_cbc_encrypt, + .decrypt = stm32_cryp_tdes_cbc_decrypt, + }, + .op = { + .do_one_request = stm32_cryp_cipher_one_req, + }, }, }; -static struct aead_alg aead_algs[] = { +static struct aead_engine_alg aead_algs[] = { { - .setkey = stm32_cryp_aes_aead_setkey, - .setauthsize = stm32_cryp_aes_gcm_setauthsize, - .encrypt = stm32_cryp_aes_gcm_encrypt, - .decrypt = stm32_cryp_aes_gcm_decrypt, - .init = stm32_cryp_aes_aead_init, - .ivsize = 12, - .maxauthsize = AES_BLOCK_SIZE, + .base.setkey = stm32_cryp_aes_aead_setkey, + .base.setauthsize = stm32_cryp_aes_gcm_setauthsize, + .base.encrypt = stm32_cryp_aes_gcm_encrypt, + .base.decrypt = stm32_cryp_aes_gcm_decrypt, + .base.init = stm32_cryp_aes_aead_init, + .base.ivsize = 12, + .base.maxauthsize = AES_BLOCK_SIZE, - .base = { + .base.base = { .cra_name = "gcm(aes)", .cra_driver_name = "stm32-gcm-aes", .cra_priority = 200, @@ -1832,17 +1861,20 @@ static struct aead_alg aead_algs[] = { .cra_alignmask = 0, .cra_module = THIS_MODULE, }, + .op = { + .do_one_request = stm32_cryp_aead_one_req, + }, }, { - .setkey = stm32_cryp_aes_aead_setkey, - .setauthsize = stm32_cryp_aes_ccm_setauthsize, - .encrypt = stm32_cryp_aes_ccm_encrypt, - .decrypt = stm32_cryp_aes_ccm_decrypt, - .init = stm32_cryp_aes_aead_init, - .ivsize = AES_BLOCK_SIZE, - .maxauthsize = AES_BLOCK_SIZE, + .base.setkey = stm32_cryp_aes_aead_setkey, + .base.setauthsize = stm32_cryp_aes_ccm_setauthsize, + .base.encrypt = stm32_cryp_aes_ccm_encrypt, + .base.decrypt = stm32_cryp_aes_ccm_decrypt, + .base.init = stm32_cryp_aes_aead_init, + .base.ivsize = AES_BLOCK_SIZE, + .base.maxauthsize = AES_BLOCK_SIZE, - .base = { + .base.base = { .cra_name = "ccm(aes)", .cra_driver_name = "stm32-ccm-aes", .cra_priority = 200, @@ -1852,6 +1884,9 @@ static struct aead_alg aead_algs[] = { .cra_alignmask = 0, .cra_module = THIS_MODULE, }, + .op = { + .do_one_request = stm32_cryp_aead_one_req, + }, }, }; @@ -2013,14 +2048,14 @@ static int stm32_cryp_probe(struct platform_device *pdev) goto err_engine2; } - ret = crypto_register_skciphers(crypto_algs, ARRAY_SIZE(crypto_algs)); + ret = crypto_engine_register_skciphers(crypto_algs, ARRAY_SIZE(crypto_algs)); if (ret) { dev_err(dev, "Could not register algs\n"); goto err_algs; } if (cryp->caps->aeads_support) { - ret = crypto_register_aeads(aead_algs, ARRAY_SIZE(aead_algs)); + ret = crypto_engine_register_aeads(aead_algs, ARRAY_SIZE(aead_algs)); if (ret) goto err_aead_algs; } @@ -2032,7 +2067,7 @@ static int stm32_cryp_probe(struct platform_device *pdev) return 0; err_aead_algs: - crypto_unregister_skciphers(crypto_algs, ARRAY_SIZE(crypto_algs)); + crypto_engine_unregister_skciphers(crypto_algs, ARRAY_SIZE(crypto_algs)); err_algs: err_engine2: crypto_engine_exit(cryp->engine); @@ -2062,8 +2097,8 @@ static int stm32_cryp_remove(struct platform_device *pdev) return ret; if (cryp->caps->aeads_support) - crypto_unregister_aeads(aead_algs, ARRAY_SIZE(aead_algs)); - crypto_unregister_skciphers(crypto_algs, ARRAY_SIZE(crypto_algs)); + crypto_engine_unregister_aeads(aead_algs, ARRAY_SIZE(aead_algs)); + crypto_engine_unregister_skciphers(crypto_algs, ARRAY_SIZE(crypto_algs)); crypto_engine_exit(cryp->engine); diff --git a/drivers/crypto/stm32/stm32-hash.c b/drivers/crypto/stm32/stm32-hash.c index 68c52eeaa6b1..53cf922d1a38 100644 --- a/drivers/crypto/stm32/stm32-hash.c +++ b/drivers/crypto/stm32/stm32-hash.c @@ -6,12 +6,18 @@ * Author(s): Lionel DEBIEVE for STMicroelectronics. */ +#include +#include +#include +#include +#include +#include +#include #include #include #include #include #include -#include #include #include #include @@ -19,15 +25,7 @@ #include #include #include - -#include -#include -#include -#include -#include -#include -#include -#include +#include #define HASH_CR 0x00 #define HASH_DIN 0x04 @@ -133,7 +131,6 @@ enum ux500_hash_algo { #define HASH_AUTOSUSPEND_DELAY 50 struct stm32_hash_ctx { - struct crypto_engine_ctx enginectx; struct stm32_hash_dev *hdev; struct crypto_shash *xtfm; unsigned long flags; @@ -177,7 +174,7 @@ struct stm32_hash_request_ctx { }; struct stm32_hash_algs_info { - struct ahash_alg *algs_list; + struct ahash_engine_alg *algs_list; size_t size; }; @@ -1194,8 +1191,6 @@ static int stm32_hash_cra_init_algs(struct crypto_tfm *tfm, u32 algs_flags) if (algs_flags) ctx->flags |= algs_flags; - ctx->enginectx.op.do_one_request = stm32_hash_one_request; - return stm32_hash_init_fallback(tfm); } @@ -1268,16 +1263,16 @@ static irqreturn_t stm32_hash_irq_handler(int irq, void *dev_id) return IRQ_NONE; } -static struct ahash_alg algs_md5[] = { +static struct ahash_engine_alg algs_md5[] = { { - .init = stm32_hash_init, - .update = stm32_hash_update, - .final = stm32_hash_final, - .finup = stm32_hash_finup, - .digest = stm32_hash_digest, - .export = stm32_hash_export, - .import = stm32_hash_import, - .halg = { + .base.init = stm32_hash_init, + .base.update = stm32_hash_update, + .base.final = stm32_hash_final, + .base.finup = stm32_hash_finup, + .base.digest = stm32_hash_digest, + .base.export = stm32_hash_export, + .base.import = stm32_hash_import, + .base.halg = { .digestsize = MD5_DIGEST_SIZE, .statesize = sizeof(struct stm32_hash_state), .base = { @@ -1293,18 +1288,21 @@ static struct ahash_alg algs_md5[] = { .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } - } + }, + .op = { + .do_one_request = stm32_hash_one_request, + }, }, { - .init = stm32_hash_init, - .update = stm32_hash_update, - .final = stm32_hash_final, - .finup = stm32_hash_finup, - .digest = stm32_hash_digest, - .export = stm32_hash_export, - .import = stm32_hash_import, - .setkey = stm32_hash_setkey, - .halg = { + .base.init = stm32_hash_init, + .base.update = stm32_hash_update, + .base.final = stm32_hash_final, + .base.finup = stm32_hash_finup, + .base.digest = stm32_hash_digest, + .base.export = stm32_hash_export, + .base.import = stm32_hash_import, + .base.setkey = stm32_hash_setkey, + .base.halg = { .digestsize = MD5_DIGEST_SIZE, .statesize = sizeof(struct stm32_hash_state), .base = { @@ -1320,20 +1318,23 @@ static struct ahash_alg algs_md5[] = { .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } - } + }, + .op = { + .do_one_request = stm32_hash_one_request, + }, } }; -static struct ahash_alg algs_sha1[] = { +static struct ahash_engine_alg algs_sha1[] = { { - .init = stm32_hash_init, - .update = stm32_hash_update, - .final = stm32_hash_final, - .finup = stm32_hash_finup, - .digest = stm32_hash_digest, - .export = stm32_hash_export, - .import = stm32_hash_import, - .halg = { + .base.init = stm32_hash_init, + .base.update = stm32_hash_update, + .base.final = stm32_hash_final, + .base.finup = stm32_hash_finup, + .base.digest = stm32_hash_digest, + .base.export = stm32_hash_export, + .base.import = stm32_hash_import, + .base.halg = { .digestsize = SHA1_DIGEST_SIZE, .statesize = sizeof(struct stm32_hash_state), .base = { @@ -1349,18 +1350,21 @@ static struct ahash_alg algs_sha1[] = { .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } - } + }, + .op = { + .do_one_request = stm32_hash_one_request, + }, }, { - .init = stm32_hash_init, - .update = stm32_hash_update, - .final = stm32_hash_final, - .finup = stm32_hash_finup, - .digest = stm32_hash_digest, - .export = stm32_hash_export, - .import = stm32_hash_import, - .setkey = stm32_hash_setkey, - .halg = { + .base.init = stm32_hash_init, + .base.update = stm32_hash_update, + .base.final = stm32_hash_final, + .base.finup = stm32_hash_finup, + .base.digest = stm32_hash_digest, + .base.export = stm32_hash_export, + .base.import = stm32_hash_import, + .base.setkey = stm32_hash_setkey, + .base.halg = { .digestsize = SHA1_DIGEST_SIZE, .statesize = sizeof(struct stm32_hash_state), .base = { @@ -1376,20 +1380,23 @@ static struct ahash_alg algs_sha1[] = { .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } - } + }, + .op = { + .do_one_request = stm32_hash_one_request, + }, }, }; -static struct ahash_alg algs_sha224[] = { +static struct ahash_engine_alg algs_sha224[] = { { - .init = stm32_hash_init, - .update = stm32_hash_update, - .final = stm32_hash_final, - .finup = stm32_hash_finup, - .digest = stm32_hash_digest, - .export = stm32_hash_export, - .import = stm32_hash_import, - .halg = { + .base.init = stm32_hash_init, + .base.update = stm32_hash_update, + .base.final = stm32_hash_final, + .base.finup = stm32_hash_finup, + .base.digest = stm32_hash_digest, + .base.export = stm32_hash_export, + .base.import = stm32_hash_import, + .base.halg = { .digestsize = SHA224_DIGEST_SIZE, .statesize = sizeof(struct stm32_hash_state), .base = { @@ -1405,18 +1412,21 @@ static struct ahash_alg algs_sha224[] = { .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } - } + }, + .op = { + .do_one_request = stm32_hash_one_request, + }, }, { - .init = stm32_hash_init, - .update = stm32_hash_update, - .final = stm32_hash_final, - .finup = stm32_hash_finup, - .digest = stm32_hash_digest, - .setkey = stm32_hash_setkey, - .export = stm32_hash_export, - .import = stm32_hash_import, - .halg = { + .base.init = stm32_hash_init, + .base.update = stm32_hash_update, + .base.final = stm32_hash_final, + .base.finup = stm32_hash_finup, + .base.digest = stm32_hash_digest, + .base.setkey = stm32_hash_setkey, + .base.export = stm32_hash_export, + .base.import = stm32_hash_import, + .base.halg = { .digestsize = SHA224_DIGEST_SIZE, .statesize = sizeof(struct stm32_hash_state), .base = { @@ -1432,20 +1442,23 @@ static struct ahash_alg algs_sha224[] = { .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } - } + }, + .op = { + .do_one_request = stm32_hash_one_request, + }, }, }; -static struct ahash_alg algs_sha256[] = { +static struct ahash_engine_alg algs_sha256[] = { { - .init = stm32_hash_init, - .update = stm32_hash_update, - .final = stm32_hash_final, - .finup = stm32_hash_finup, - .digest = stm32_hash_digest, - .export = stm32_hash_export, - .import = stm32_hash_import, - .halg = { + .base.init = stm32_hash_init, + .base.update = stm32_hash_update, + .base.final = stm32_hash_final, + .base.finup = stm32_hash_finup, + .base.digest = stm32_hash_digest, + .base.export = stm32_hash_export, + .base.import = stm32_hash_import, + .base.halg = { .digestsize = SHA256_DIGEST_SIZE, .statesize = sizeof(struct stm32_hash_state), .base = { @@ -1461,18 +1474,21 @@ static struct ahash_alg algs_sha256[] = { .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } - } + }, + .op = { + .do_one_request = stm32_hash_one_request, + }, }, { - .init = stm32_hash_init, - .update = stm32_hash_update, - .final = stm32_hash_final, - .finup = stm32_hash_finup, - .digest = stm32_hash_digest, - .export = stm32_hash_export, - .import = stm32_hash_import, - .setkey = stm32_hash_setkey, - .halg = { + .base.init = stm32_hash_init, + .base.update = stm32_hash_update, + .base.final = stm32_hash_final, + .base.finup = stm32_hash_finup, + .base.digest = stm32_hash_digest, + .base.export = stm32_hash_export, + .base.import = stm32_hash_import, + .base.setkey = stm32_hash_setkey, + .base.halg = { .digestsize = SHA256_DIGEST_SIZE, .statesize = sizeof(struct stm32_hash_state), .base = { @@ -1488,20 +1504,23 @@ static struct ahash_alg algs_sha256[] = { .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } - } + }, + .op = { + .do_one_request = stm32_hash_one_request, + }, }, }; -static struct ahash_alg algs_sha384_sha512[] = { +static struct ahash_engine_alg algs_sha384_sha512[] = { { - .init = stm32_hash_init, - .update = stm32_hash_update, - .final = stm32_hash_final, - .finup = stm32_hash_finup, - .digest = stm32_hash_digest, - .export = stm32_hash_export, - .import = stm32_hash_import, - .halg = { + .base.init = stm32_hash_init, + .base.update = stm32_hash_update, + .base.final = stm32_hash_final, + .base.finup = stm32_hash_finup, + .base.digest = stm32_hash_digest, + .base.export = stm32_hash_export, + .base.import = stm32_hash_import, + .base.halg = { .digestsize = SHA384_DIGEST_SIZE, .statesize = sizeof(struct stm32_hash_state), .base = { @@ -1517,18 +1536,21 @@ static struct ahash_alg algs_sha384_sha512[] = { .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } - } + }, + .op = { + .do_one_request = stm32_hash_one_request, + }, }, { - .init = stm32_hash_init, - .update = stm32_hash_update, - .final = stm32_hash_final, - .finup = stm32_hash_finup, - .digest = stm32_hash_digest, - .setkey = stm32_hash_setkey, - .export = stm32_hash_export, - .import = stm32_hash_import, - .halg = { + .base.init = stm32_hash_init, + .base.update = stm32_hash_update, + .base.final = stm32_hash_final, + .base.finup = stm32_hash_finup, + .base.digest = stm32_hash_digest, + .base.setkey = stm32_hash_setkey, + .base.export = stm32_hash_export, + .base.import = stm32_hash_import, + .base.halg = { .digestsize = SHA384_DIGEST_SIZE, .statesize = sizeof(struct stm32_hash_state), .base = { @@ -1544,17 +1566,20 @@ static struct ahash_alg algs_sha384_sha512[] = { .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } - } + }, + .op = { + .do_one_request = stm32_hash_one_request, + }, }, { - .init = stm32_hash_init, - .update = stm32_hash_update, - .final = stm32_hash_final, - .finup = stm32_hash_finup, - .digest = stm32_hash_digest, - .export = stm32_hash_export, - .import = stm32_hash_import, - .halg = { + .base.init = stm32_hash_init, + .base.update = stm32_hash_update, + .base.final = stm32_hash_final, + .base.finup = stm32_hash_finup, + .base.digest = stm32_hash_digest, + .base.export = stm32_hash_export, + .base.import = stm32_hash_import, + .base.halg = { .digestsize = SHA512_DIGEST_SIZE, .statesize = sizeof(struct stm32_hash_state), .base = { @@ -1570,18 +1595,21 @@ static struct ahash_alg algs_sha384_sha512[] = { .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } - } + }, + .op = { + .do_one_request = stm32_hash_one_request, + }, }, { - .init = stm32_hash_init, - .update = stm32_hash_update, - .final = stm32_hash_final, - .finup = stm32_hash_finup, - .digest = stm32_hash_digest, - .export = stm32_hash_export, - .import = stm32_hash_import, - .setkey = stm32_hash_setkey, - .halg = { + .base.init = stm32_hash_init, + .base.update = stm32_hash_update, + .base.final = stm32_hash_final, + .base.finup = stm32_hash_finup, + .base.digest = stm32_hash_digest, + .base.export = stm32_hash_export, + .base.import = stm32_hash_import, + .base.setkey = stm32_hash_setkey, + .base.halg = { .digestsize = SHA512_DIGEST_SIZE, .statesize = sizeof(struct stm32_hash_state), .base = { @@ -1597,20 +1625,23 @@ static struct ahash_alg algs_sha384_sha512[] = { .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } - } + }, + .op = { + .do_one_request = stm32_hash_one_request, + }, }, }; -static struct ahash_alg algs_sha3[] = { +static struct ahash_engine_alg algs_sha3[] = { { - .init = stm32_hash_init, - .update = stm32_hash_update, - .final = stm32_hash_final, - .finup = stm32_hash_finup, - .digest = stm32_hash_digest, - .export = stm32_hash_export, - .import = stm32_hash_import, - .halg = { + .base.init = stm32_hash_init, + .base.update = stm32_hash_update, + .base.final = stm32_hash_final, + .base.finup = stm32_hash_finup, + .base.digest = stm32_hash_digest, + .base.export = stm32_hash_export, + .base.import = stm32_hash_import, + .base.halg = { .digestsize = SHA3_224_DIGEST_SIZE, .statesize = sizeof(struct stm32_hash_state), .base = { @@ -1626,18 +1657,21 @@ static struct ahash_alg algs_sha3[] = { .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } - } + }, + .op = { + .do_one_request = stm32_hash_one_request, + }, }, { - .init = stm32_hash_init, - .update = stm32_hash_update, - .final = stm32_hash_final, - .finup = stm32_hash_finup, - .digest = stm32_hash_digest, - .export = stm32_hash_export, - .import = stm32_hash_import, - .setkey = stm32_hash_setkey, - .halg = { + .base.init = stm32_hash_init, + .base.update = stm32_hash_update, + .base.final = stm32_hash_final, + .base.finup = stm32_hash_finup, + .base.digest = stm32_hash_digest, + .base.export = stm32_hash_export, + .base.import = stm32_hash_import, + .base.setkey = stm32_hash_setkey, + .base.halg = { .digestsize = SHA3_224_DIGEST_SIZE, .statesize = sizeof(struct stm32_hash_state), .base = { @@ -1653,17 +1687,20 @@ static struct ahash_alg algs_sha3[] = { .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } - } + }, + .op = { + .do_one_request = stm32_hash_one_request, + }, }, - { - .init = stm32_hash_init, - .update = stm32_hash_update, - .final = stm32_hash_final, - .finup = stm32_hash_finup, - .digest = stm32_hash_digest, - .export = stm32_hash_export, - .import = stm32_hash_import, - .halg = { + { + .base.init = stm32_hash_init, + .base.update = stm32_hash_update, + .base.final = stm32_hash_final, + .base.finup = stm32_hash_finup, + .base.digest = stm32_hash_digest, + .base.export = stm32_hash_export, + .base.import = stm32_hash_import, + .base.halg = { .digestsize = SHA3_256_DIGEST_SIZE, .statesize = sizeof(struct stm32_hash_state), .base = { @@ -1679,18 +1716,21 @@ static struct ahash_alg algs_sha3[] = { .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } - } + }, + .op = { + .do_one_request = stm32_hash_one_request, + }, }, { - .init = stm32_hash_init, - .update = stm32_hash_update, - .final = stm32_hash_final, - .finup = stm32_hash_finup, - .digest = stm32_hash_digest, - .export = stm32_hash_export, - .import = stm32_hash_import, - .setkey = stm32_hash_setkey, - .halg = { + .base.init = stm32_hash_init, + .base.update = stm32_hash_update, + .base.final = stm32_hash_final, + .base.finup = stm32_hash_finup, + .base.digest = stm32_hash_digest, + .base.export = stm32_hash_export, + .base.import = stm32_hash_import, + .base.setkey = stm32_hash_setkey, + .base.halg = { .digestsize = SHA3_256_DIGEST_SIZE, .statesize = sizeof(struct stm32_hash_state), .base = { @@ -1706,17 +1746,20 @@ static struct ahash_alg algs_sha3[] = { .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } - } + }, + .op = { + .do_one_request = stm32_hash_one_request, + }, }, { - .init = stm32_hash_init, - .update = stm32_hash_update, - .final = stm32_hash_final, - .finup = stm32_hash_finup, - .digest = stm32_hash_digest, - .export = stm32_hash_export, - .import = stm32_hash_import, - .halg = { + .base.init = stm32_hash_init, + .base.update = stm32_hash_update, + .base.final = stm32_hash_final, + .base.finup = stm32_hash_finup, + .base.digest = stm32_hash_digest, + .base.export = stm32_hash_export, + .base.import = stm32_hash_import, + .base.halg = { .digestsize = SHA3_384_DIGEST_SIZE, .statesize = sizeof(struct stm32_hash_state), .base = { @@ -1732,18 +1775,21 @@ static struct ahash_alg algs_sha3[] = { .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } - } + }, + .op = { + .do_one_request = stm32_hash_one_request, + }, }, { - .init = stm32_hash_init, - .update = stm32_hash_update, - .final = stm32_hash_final, - .finup = stm32_hash_finup, - .digest = stm32_hash_digest, - .export = stm32_hash_export, - .import = stm32_hash_import, - .setkey = stm32_hash_setkey, - .halg = { + .base.init = stm32_hash_init, + .base.update = stm32_hash_update, + .base.final = stm32_hash_final, + .base.finup = stm32_hash_finup, + .base.digest = stm32_hash_digest, + .base.export = stm32_hash_export, + .base.import = stm32_hash_import, + .base.setkey = stm32_hash_setkey, + .base.halg = { .digestsize = SHA3_384_DIGEST_SIZE, .statesize = sizeof(struct stm32_hash_state), .base = { @@ -1759,17 +1805,20 @@ static struct ahash_alg algs_sha3[] = { .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } - } + }, + .op = { + .do_one_request = stm32_hash_one_request, + }, }, { - .init = stm32_hash_init, - .update = stm32_hash_update, - .final = stm32_hash_final, - .finup = stm32_hash_finup, - .digest = stm32_hash_digest, - .export = stm32_hash_export, - .import = stm32_hash_import, - .halg = { + .base.init = stm32_hash_init, + .base.update = stm32_hash_update, + .base.final = stm32_hash_final, + .base.finup = stm32_hash_finup, + .base.digest = stm32_hash_digest, + .base.export = stm32_hash_export, + .base.import = stm32_hash_import, + .base.halg = { .digestsize = SHA3_512_DIGEST_SIZE, .statesize = sizeof(struct stm32_hash_state), .base = { @@ -1785,18 +1834,21 @@ static struct ahash_alg algs_sha3[] = { .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } - } + }, + .op = { + .do_one_request = stm32_hash_one_request, + }, }, { - .init = stm32_hash_init, - .update = stm32_hash_update, - .final = stm32_hash_final, - .finup = stm32_hash_finup, - .digest = stm32_hash_digest, - .export = stm32_hash_export, - .import = stm32_hash_import, - .setkey = stm32_hash_setkey, - .halg = { + .base.init = stm32_hash_init, + .base.update = stm32_hash_update, + .base.final = stm32_hash_final, + .base.finup = stm32_hash_finup, + .base.digest = stm32_hash_digest, + .base.export = stm32_hash_export, + .base.import = stm32_hash_import, + .base.setkey = stm32_hash_setkey, + .base.halg = { .digestsize = SHA3_512_DIGEST_SIZE, .statesize = sizeof(struct stm32_hash_state), .base = { @@ -1812,7 +1864,10 @@ static struct ahash_alg algs_sha3[] = { .cra_exit = stm32_hash_cra_exit, .cra_module = THIS_MODULE, } - } + }, + .op = { + .do_one_request = stm32_hash_one_request, + }, } }; @@ -1823,7 +1878,7 @@ static int stm32_hash_register_algs(struct stm32_hash_dev *hdev) for (i = 0; i < hdev->pdata->algs_info_size; i++) { for (j = 0; j < hdev->pdata->algs_info[i].size; j++) { - err = crypto_register_ahash( + err = crypto_engine_register_ahash( &hdev->pdata->algs_info[i].algs_list[j]); if (err) goto err_algs; @@ -1835,7 +1890,7 @@ err_algs: dev_err(hdev->dev, "Algo %d : %d failed\n", i, j); for (; i--; ) { for (; j--;) - crypto_unregister_ahash( + crypto_engine_unregister_ahash( &hdev->pdata->algs_info[i].algs_list[j]); } @@ -1848,7 +1903,7 @@ static int stm32_hash_unregister_algs(struct stm32_hash_dev *hdev) for (i = 0; i < hdev->pdata->algs_info_size; i++) { for (j = 0; j < hdev->pdata->algs_info[i].size; j++) - crypto_unregister_ahash( + crypto_engine_unregister_ahash( &hdev->pdata->algs_info[i].algs_list[j]); } From 7a2673d70ca69bb890dc0fec590297f5aa7da739 Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Sun, 13 Aug 2023 14:55:16 +0800 Subject: [PATCH 530/656] crypto: virtio - Use new crypto_engine_op interface Use the new crypto_engine_op interface where the callback is stored in the algorithm object. Signed-off-by: Herbert Xu --- .../virtio/virtio_crypto_akcipher_algs.c | 33 +++++++++++-------- .../virtio/virtio_crypto_skcipher_algs.c | 23 +++++++------ 2 files changed, 30 insertions(+), 26 deletions(-) diff --git a/drivers/crypto/virtio/virtio_crypto_akcipher_algs.c b/drivers/crypto/virtio/virtio_crypto_akcipher_algs.c index ff3369ca319f..2621ff8a9376 100644 --- a/drivers/crypto/virtio/virtio_crypto_akcipher_algs.c +++ b/drivers/crypto/virtio/virtio_crypto_akcipher_algs.c @@ -7,15 +7,16 @@ * Copyright 2022 Bytedance CO., LTD. */ -#include -#include -#include +#include #include #include -#include #include -#include - +#include +#include +#include +#include +#include +#include #include #include "virtio_crypto_common.h" @@ -24,7 +25,6 @@ struct virtio_crypto_rsa_ctx { }; struct virtio_crypto_akcipher_ctx { - struct crypto_engine_ctx enginectx; struct virtio_crypto *vcrypto; struct crypto_akcipher *tfm; bool session_valid; @@ -47,7 +47,7 @@ struct virtio_crypto_akcipher_algo { uint32_t algonum; uint32_t service; unsigned int active_devs; - struct akcipher_alg algo; + struct akcipher_engine_alg algo; }; static DEFINE_MUTEX(algs_lock); @@ -475,7 +475,6 @@ static int virtio_crypto_rsa_init_tfm(struct crypto_akcipher *tfm) struct virtio_crypto_akcipher_ctx *ctx = akcipher_tfm_ctx(tfm); ctx->tfm = tfm; - ctx->enginectx.op.do_one_request = virtio_crypto_rsa_do_req; akcipher_set_reqsize(tfm, sizeof(struct virtio_crypto_akcipher_request)); @@ -498,7 +497,7 @@ static struct virtio_crypto_akcipher_algo virtio_crypto_akcipher_algs[] = { { .algonum = VIRTIO_CRYPTO_AKCIPHER_RSA, .service = VIRTIO_CRYPTO_SERVICE_AKCIPHER, - .algo = { + .algo.base = { .encrypt = virtio_crypto_rsa_encrypt, .decrypt = virtio_crypto_rsa_decrypt, .set_pub_key = virtio_crypto_rsa_raw_set_pub_key, @@ -514,11 +513,14 @@ static struct virtio_crypto_akcipher_algo virtio_crypto_akcipher_algs[] = { .cra_ctxsize = sizeof(struct virtio_crypto_akcipher_ctx), }, }, + .algo.op = { + .do_one_request = virtio_crypto_rsa_do_req, + }, }, { .algonum = VIRTIO_CRYPTO_AKCIPHER_RSA, .service = VIRTIO_CRYPTO_SERVICE_AKCIPHER, - .algo = { + .algo.base = { .encrypt = virtio_crypto_rsa_encrypt, .decrypt = virtio_crypto_rsa_decrypt, .sign = virtio_crypto_rsa_sign, @@ -536,6 +538,9 @@ static struct virtio_crypto_akcipher_algo virtio_crypto_akcipher_algs[] = { .cra_ctxsize = sizeof(struct virtio_crypto_akcipher_ctx), }, }, + .algo.op = { + .do_one_request = virtio_crypto_rsa_do_req, + }, }, }; @@ -554,14 +559,14 @@ int virtio_crypto_akcipher_algs_register(struct virtio_crypto *vcrypto) continue; if (virtio_crypto_akcipher_algs[i].active_devs == 0) { - ret = crypto_register_akcipher(&virtio_crypto_akcipher_algs[i].algo); + ret = crypto_engine_register_akcipher(&virtio_crypto_akcipher_algs[i].algo); if (ret) goto unlock; } virtio_crypto_akcipher_algs[i].active_devs++; dev_info(&vcrypto->vdev->dev, "Registered akcipher algo %s\n", - virtio_crypto_akcipher_algs[i].algo.base.cra_name); + virtio_crypto_akcipher_algs[i].algo.base.base.cra_name); } unlock: @@ -584,7 +589,7 @@ void virtio_crypto_akcipher_algs_unregister(struct virtio_crypto *vcrypto) continue; if (virtio_crypto_akcipher_algs[i].active_devs == 1) - crypto_unregister_akcipher(&virtio_crypto_akcipher_algs[i].algo); + crypto_engine_unregister_akcipher(&virtio_crypto_akcipher_algs[i].algo); virtio_crypto_akcipher_algs[i].active_devs--; } diff --git a/drivers/crypto/virtio/virtio_crypto_skcipher_algs.c b/drivers/crypto/virtio/virtio_crypto_skcipher_algs.c index 71b8751ab5ab..23c41d87d835 100644 --- a/drivers/crypto/virtio/virtio_crypto_skcipher_algs.c +++ b/drivers/crypto/virtio/virtio_crypto_skcipher_algs.c @@ -6,19 +6,16 @@ * Copyright 2016 HUAWEI TECHNOLOGIES CO., LTD. */ -#include -#include +#include #include -#include #include -#include - +#include +#include #include #include "virtio_crypto_common.h" struct virtio_crypto_skcipher_ctx { - struct crypto_engine_ctx enginectx; struct virtio_crypto *vcrypto; struct crypto_skcipher *tfm; @@ -42,7 +39,7 @@ struct virtio_crypto_algo { uint32_t algonum; uint32_t service; unsigned int active_devs; - struct skcipher_alg algo; + struct skcipher_engine_alg algo; }; /* @@ -523,7 +520,6 @@ static int virtio_crypto_skcipher_init(struct crypto_skcipher *tfm) crypto_skcipher_set_reqsize(tfm, sizeof(struct virtio_crypto_sym_request)); ctx->tfm = tfm; - ctx->enginectx.op.do_one_request = virtio_crypto_skcipher_crypt_req; return 0; } @@ -578,7 +574,7 @@ static void virtio_crypto_skcipher_finalize_req( static struct virtio_crypto_algo virtio_crypto_algs[] = { { .algonum = VIRTIO_CRYPTO_CIPHER_AES_CBC, .service = VIRTIO_CRYPTO_SERVICE_CIPHER, - .algo = { + .algo.base = { .base.cra_name = "cbc(aes)", .base.cra_driver_name = "virtio_crypto_aes_cbc", .base.cra_priority = 150, @@ -596,6 +592,9 @@ static struct virtio_crypto_algo virtio_crypto_algs[] = { { .max_keysize = AES_MAX_KEY_SIZE, .ivsize = AES_BLOCK_SIZE, }, + .algo.op = { + .do_one_request = virtio_crypto_skcipher_crypt_req, + }, } }; int virtio_crypto_skcipher_algs_register(struct virtio_crypto *vcrypto) @@ -614,14 +613,14 @@ int virtio_crypto_skcipher_algs_register(struct virtio_crypto *vcrypto) continue; if (virtio_crypto_algs[i].active_devs == 0) { - ret = crypto_register_skcipher(&virtio_crypto_algs[i].algo); + ret = crypto_engine_register_skcipher(&virtio_crypto_algs[i].algo); if (ret) goto unlock; } virtio_crypto_algs[i].active_devs++; dev_info(&vcrypto->vdev->dev, "Registered algo %s\n", - virtio_crypto_algs[i].algo.base.cra_name); + virtio_crypto_algs[i].algo.base.base.cra_name); } unlock: @@ -645,7 +644,7 @@ void virtio_crypto_skcipher_algs_unregister(struct virtio_crypto *vcrypto) continue; if (virtio_crypto_algs[i].active_devs == 1) - crypto_unregister_skcipher(&virtio_crypto_algs[i].algo); + crypto_engine_unregister_skcipher(&virtio_crypto_algs[i].algo); virtio_crypto_algs[i].active_devs--; } From 28f860d377da437695a6db2330dad3f8ca672f8d Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Sun, 13 Aug 2023 14:55:18 +0800 Subject: [PATCH 531/656] crypto: zynqmp - Use new crypto_engine_op interface Use the new crypto_engine_op interface where the callback is stored in the algorithm object. Signed-off-by: Herbert Xu --- drivers/crypto/xilinx/zynqmp-aes-gcm.c | 35 +++++++++++++------------- 1 file changed, 18 insertions(+), 17 deletions(-) diff --git a/drivers/crypto/xilinx/zynqmp-aes-gcm.c b/drivers/crypto/xilinx/zynqmp-aes-gcm.c index ae7dd82abea1..42fe2b7afef2 100644 --- a/drivers/crypto/xilinx/zynqmp-aes-gcm.c +++ b/drivers/crypto/xilinx/zynqmp-aes-gcm.c @@ -9,13 +9,14 @@ #include #include #include - #include +#include +#include +#include #include #include #include - -#include +#include #define ZYNQMP_DMA_BIT_MASK 32U @@ -43,7 +44,7 @@ enum zynqmp_aead_keysrc { struct zynqmp_aead_drv_ctx { union { - struct aead_alg aead; + struct aead_engine_alg aead; } alg; struct device *dev; struct crypto_engine *engine; @@ -60,7 +61,6 @@ struct zynqmp_aead_hw_req { }; struct zynqmp_aead_tfm_ctx { - struct crypto_engine_ctx engine_ctx; struct device *dev; u8 key[ZYNQMP_AES_KEY_SIZE]; u8 *iv; @@ -286,7 +286,7 @@ static int zynqmp_aes_aead_encrypt(struct aead_request *req) struct zynqmp_aead_req_ctx *rq_ctx = aead_request_ctx(req); rq_ctx->op = ZYNQMP_AES_ENCRYPT; - drv_ctx = container_of(alg, struct zynqmp_aead_drv_ctx, alg.aead); + drv_ctx = container_of(alg, struct zynqmp_aead_drv_ctx, alg.aead.base); return crypto_transfer_aead_request_to_engine(drv_ctx->engine, req); } @@ -299,7 +299,7 @@ static int zynqmp_aes_aead_decrypt(struct aead_request *req) struct zynqmp_aead_req_ctx *rq_ctx = aead_request_ctx(req); rq_ctx->op = ZYNQMP_AES_DECRYPT; - drv_ctx = container_of(alg, struct zynqmp_aead_drv_ctx, alg.aead); + drv_ctx = container_of(alg, struct zynqmp_aead_drv_ctx, alg.aead.base); return crypto_transfer_aead_request_to_engine(drv_ctx->engine, req); } @@ -312,18 +312,16 @@ static int zynqmp_aes_aead_init(struct crypto_aead *aead) struct zynqmp_aead_drv_ctx *drv_ctx; struct aead_alg *alg = crypto_aead_alg(aead); - drv_ctx = container_of(alg, struct zynqmp_aead_drv_ctx, alg.aead); + drv_ctx = container_of(alg, struct zynqmp_aead_drv_ctx, alg.aead.base); tfm_ctx->dev = drv_ctx->dev; - tfm_ctx->engine_ctx.op.do_one_request = zynqmp_handle_aes_req; - - tfm_ctx->fbk_cipher = crypto_alloc_aead(drv_ctx->alg.aead.base.cra_name, + tfm_ctx->fbk_cipher = crypto_alloc_aead(drv_ctx->alg.aead.base.base.cra_name, 0, CRYPTO_ALG_NEED_FALLBACK); if (IS_ERR(tfm_ctx->fbk_cipher)) { pr_err("%s() Error: failed to allocate fallback for %s\n", - __func__, drv_ctx->alg.aead.base.cra_name); + __func__, drv_ctx->alg.aead.base.base.cra_name); return PTR_ERR(tfm_ctx->fbk_cipher); } @@ -348,7 +346,7 @@ static void zynqmp_aes_aead_exit(struct crypto_aead *aead) } static struct zynqmp_aead_drv_ctx aes_drv_ctx = { - .alg.aead = { + .alg.aead.base = { .setkey = zynqmp_aes_aead_setkey, .setauthsize = zynqmp_aes_aead_setauthsize, .encrypt = zynqmp_aes_aead_encrypt, @@ -370,7 +368,10 @@ static struct zynqmp_aead_drv_ctx aes_drv_ctx = { .cra_ctxsize = sizeof(struct zynqmp_aead_tfm_ctx), .cra_module = THIS_MODULE, } - } + }, + .alg.aead.op = { + .do_one_request = zynqmp_handle_aes_req, + }, }; static int zynqmp_aes_aead_probe(struct platform_device *pdev) @@ -403,7 +404,7 @@ static int zynqmp_aes_aead_probe(struct platform_device *pdev) goto err_engine; } - err = crypto_register_aead(&aes_drv_ctx.alg.aead); + err = crypto_engine_register_aead(&aes_drv_ctx.alg.aead); if (err < 0) { dev_err(dev, "Failed to register AEAD alg.\n"); goto err_aead; @@ -411,7 +412,7 @@ static int zynqmp_aes_aead_probe(struct platform_device *pdev) return 0; err_aead: - crypto_unregister_aead(&aes_drv_ctx.alg.aead); + crypto_engine_unregister_aead(&aes_drv_ctx.alg.aead); err_engine: if (aes_drv_ctx.engine) @@ -423,7 +424,7 @@ err_engine: static int zynqmp_aes_aead_remove(struct platform_device *pdev) { crypto_engine_exit(aes_drv_ctx.engine); - crypto_unregister_aead(&aes_drv_ctx.alg.aead); + crypto_engine_unregister_aead(&aes_drv_ctx.alg.aead); return 0; } From 5ce0bc68e0eeab14fe4dd3be9975c5ced7b20617 Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Sun, 13 Aug 2023 14:55:20 +0800 Subject: [PATCH 532/656] crypto: engine - Remove crypto_engine_ctx Remove the obsolete crypto_engine_ctx structure. Signed-off-by: Herbert Xu --- crypto/crypto_engine.c | 12 +++--------- include/crypto/engine.h | 4 ---- 2 files changed, 3 insertions(+), 13 deletions(-) diff --git a/crypto/crypto_engine.c b/crypto/crypto_engine.c index abfb1e6bfa48..108d9d55c509 100644 --- a/crypto/crypto_engine.c +++ b/crypto/crypto_engine.c @@ -79,7 +79,6 @@ static void crypto_pump_requests(struct crypto_engine *engine, unsigned long flags; bool was_busy = false; int ret; - struct crypto_engine_ctx *enginectx; spin_lock_irqsave(&engine->queue_lock, flags); @@ -154,14 +153,9 @@ start_request: struct crypto_engine_alg, base); op = &alg->op; } else { - enginectx = crypto_tfm_ctx(async_req->tfm); - op = &enginectx->op; - - if (!op->do_one_request) { - dev_err(engine->dev, "failed to do request\n"); - ret = -EINVAL; - goto req_err_1; - } + dev_err(engine->dev, "failed to do request\n"); + ret = -EINVAL; + goto req_err_1; } ret = op->do_one_request(engine, async_req); diff --git a/include/crypto/engine.h b/include/crypto/engine.h index cf57e732566b..2835069c5997 100644 --- a/include/crypto/engine.h +++ b/include/crypto/engine.h @@ -26,10 +26,6 @@ struct crypto_engine_op { void *areq); }; -struct crypto_engine_ctx { - struct crypto_engine_op op; -}; - struct aead_engine_alg { struct aead_alg base; struct crypto_engine_op op; From 5ae4b0d8875caa44946e579420c7fd5740d58653 Mon Sep 17 00:00:00 2001 From: Giulio Benetti Date: Fri, 11 Aug 2023 23:48:53 +0200 Subject: [PATCH 533/656] mmc: sdhci-esdhc-imx: improve ESDHC_FLAG_ERR010450 Errata ERR010450 only shows up if voltage is 1.8V, but if the device is supplied by 3v3 the errata can be ignored. So let's check for if quirk SDHCI_QUIRK2_NO_1_8_V is defined or not before limiting the frequency. Cc: Jim Reinhart Cc: James Autry Cc: Matthew Maron Signed-off-by: Giulio Benetti Acked-by: Haibo Chen Acked-by: Adrian Hunter Link: https://lore.kernel.org/r/20230811214853.8623-1-giulio.benetti@benettiengineering.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-esdhc-imx.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index a8bdb3c5ecd5..3b8030f3552a 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -171,8 +171,8 @@ #define ESDHC_FLAG_HS400 BIT(9) /* * The IP has errata ERR010450 - * uSDHC: Due to the I/O timing limit, for SDR mode, SD card clock can't - * exceed 150MHz, for DDR mode, SD card clock can't exceed 45MHz. + * uSDHC: At 1.8V due to the I/O timing limit, for SDR mode, SD card + * clock can't exceed 150MHz, for DDR mode, SD card clock can't exceed 45MHz. */ #define ESDHC_FLAG_ERR010450 BIT(10) /* The IP supports HS400ES mode */ @@ -961,7 +961,8 @@ static inline void esdhc_pltfm_set_clock(struct sdhci_host *host, | ESDHC_CLOCK_MASK); sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL); - if (imx_data->socdata->flags & ESDHC_FLAG_ERR010450) { + if ((imx_data->socdata->flags & ESDHC_FLAG_ERR010450) && + (!(host->quirks2 & SDHCI_QUIRK2_NO_1_8_V))) { unsigned int max_clock; max_clock = imx_data->is_ddr ? 45000000 : 150000000; From 35acbdfaf17c94d64ee336282f21b2981676748a Mon Sep 17 00:00:00 2001 From: Yue Haibing Date: Fri, 18 Aug 2023 20:42:27 +0800 Subject: [PATCH 534/656] regulator: db8500-prcmu: Remove unused declaration power_state_active_is_enabled() Commit 38e968380b27 ("regulators/db8500: split off shared dbx500 code") removed this but not its declaration. Signed-off-by: Yue Haibing Link: https://lore.kernel.org/r/20230818124227.15084-1-yuehaibing@huawei.com Signed-off-by: Mark Brown --- include/linux/regulator/db8500-prcmu.h | 6 ------ 1 file changed, 6 deletions(-) diff --git a/include/linux/regulator/db8500-prcmu.h b/include/linux/regulator/db8500-prcmu.h index f90df9ee703e..d58ff273157e 100644 --- a/include/linux/regulator/db8500-prcmu.h +++ b/include/linux/regulator/db8500-prcmu.h @@ -35,10 +35,4 @@ enum db8500_regulator_id { DB8500_NUM_REGULATORS }; -/* - * Exported interface for CPUIdle only. This function is called with all - * interrupts turned off. - */ -int power_state_active_is_enabled(void); - #endif From 5c1212a67e5838aca49707ef96be71612a72ab43 Mon Sep 17 00:00:00 2001 From: Biju Das Date: Fri, 18 Aug 2023 15:18:13 +0100 Subject: [PATCH 535/656] regulator: raa215300: Change rate from 32000->32768 Replace the rate 32000->32768 in devm_clk_hw_register_fixed_rate() as the 32kHz frequency mentioned in the hardware manual is actually 32.768kHz. Reported-by: Pavel Machek Closes: https://lore.kernel.org/all/ZN3%2FSjL50ls+3dnD@duo.ucw.cz/ Signed-off-by: Biju Das Link: https://lore.kernel.org/r/20230818141815.314197-2-biju.das.jz@bp.renesas.com Signed-off-by: Mark Brown --- drivers/regulator/raa215300.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/regulator/raa215300.c b/drivers/regulator/raa215300.c index bdbf1e4ce468..0628ed3d0a93 100644 --- a/drivers/regulator/raa215300.c +++ b/drivers/regulator/raa215300.c @@ -127,7 +127,7 @@ static int raa215300_i2c_probe(struct i2c_client *client) struct clk_hw *hw; ssize_t size; - hw = devm_clk_hw_register_fixed_rate(dev, clk_name, NULL, 0, 32000); + hw = devm_clk_hw_register_fixed_rate(dev, clk_name, NULL, 0, 32768); if (IS_ERR(hw)) return PTR_ERR(hw); From 6673fc98953231f5d85f780d3025ea95c7584683 Mon Sep 17 00:00:00 2001 From: Biju Das Date: Fri, 18 Aug 2023 15:18:14 +0100 Subject: [PATCH 536/656] regulator: raa215300: Add missing blank space Add the missing space in the comment block. Reported-by: Pavel Machek Closes: https://lore.kernel.org/all/ZN3%2FSjL50ls+3dnD@duo.ucw.cz/ Signed-off-by: Biju Das Link: https://lore.kernel.org/r/20230818141815.314197-3-biju.das.jz@bp.renesas.com Signed-off-by: Mark Brown --- drivers/regulator/raa215300.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/regulator/raa215300.c b/drivers/regulator/raa215300.c index 0628ed3d0a93..6982565c8aa4 100644 --- a/drivers/regulator/raa215300.c +++ b/drivers/regulator/raa215300.c @@ -86,7 +86,7 @@ static int raa215300_i2c_probe(struct i2c_client *client) val &= RAA215300_REG_BLOCK_EN_RTC_EN; regmap_write(regmap, RAA215300_REG_BLOCK_EN, val); - /*Clear the latched registers */ + /* Clear the latched registers */ regmap_read(regmap, RAA215300_FAULT_LATCHED_STATUS_1, &val); regmap_write(regmap, RAA215300_FAULT_LATCHED_STATUS_1, val); regmap_read(regmap, RAA215300_FAULT_LATCHED_STATUS_2, &val); From 8845252f6690e4fceca67f2bb7ee2920939d3ac5 Mon Sep 17 00:00:00 2001 From: Biju Das Date: Fri, 18 Aug 2023 15:18:15 +0100 Subject: [PATCH 537/656] regulator: raa215300: Update help description Add module description to the help section and update the existing help description. Reported-by: Pavel Machek Closes: https://lore.kernel.org/all/ZN3%2FSjL50ls+3dnD@duo.ucw.cz/ Signed-off-by: Biju Das Link: https://lore.kernel.org/r/20230818141815.314197-4-biju.das.jz@bp.renesas.com Signed-off-by: Mark Brown --- drivers/regulator/Kconfig | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig index 086596239356..186b97c5aa16 100644 --- a/drivers/regulator/Kconfig +++ b/drivers/regulator/Kconfig @@ -1072,7 +1072,11 @@ config REGULATOR_RAA215300 depends on COMMON_CLK depends on I2C help - Support for the Renesas RAA215300 PMIC. + If you say yes to this option, support will be included for the + Renesas RAA215300 PMIC. + + Say M here if you want to include support for Renesas RAA215300 PMIC + as a module. The module will be named "raa215300". config REGULATOR_RASPBERRYPI_TOUCHSCREEN_ATTINY tristate "Raspberry Pi 7-inch touchscreen panel ATTINY regulator" From ef75e767167a8f30c7690bc4689dba76329ee06e Mon Sep 17 00:00:00 2001 From: Lucas Tanure Date: Fri, 4 Aug 2023 11:46:01 +0100 Subject: [PATCH 538/656] spi: cs42l43: Add SPI controller support The CS42L43 is an audio CODEC with integrated MIPI SoundWire interface (Version 1.2.1 compliant), I2C, SPI, and I2S/TDM interfaces designed for portable applications. It provides a high dynamic range, stereo DAC for headphone output, two integrated Class D amplifiers for loudspeakers, and two ADCs for wired headset microphone input or stereo line input. PDM inputs are provided for digital microphones. The SPI component incorporates a SPI controller interface for communication with other peripheral components. Signed-off-by: Lucas Tanure Signed-off-by: Maciej Strozek Signed-off-by: Charles Keepax Link: https://lore.kernel.org/r/20230804104602.395892-6-ckeepax@opensource.cirrus.com Signed-off-by: Mark Brown --- MAINTAINERS | 1 + drivers/spi/Kconfig | 7 + drivers/spi/Makefile | 1 + drivers/spi/spi-cs42l43.c | 284 ++++++++++++++++++++++++++++++++++++++ 4 files changed, 293 insertions(+) create mode 100644 drivers/spi/spi-cs42l43.c diff --git a/MAINTAINERS b/MAINTAINERS index 0b5ecca0b39b..a0fb42cf4cca 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -4888,6 +4888,7 @@ S: Maintained F: Documentation/devicetree/bindings/sound/cirrus,cs* F: drivers/mfd/cs42l43* F: drivers/pinctrl/cirrus/pinctrl-cs42l43* +F: drivers/spi/spi-cs42l43* F: include/dt-bindings/sound/cs* F: include/linux/mfd/cs42l43* F: include/sound/cs* diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 8962b2557615..083f71cf4829 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -281,6 +281,13 @@ config SPI_COLDFIRE_QSPI This enables support for the Coldfire QSPI controller in master mode. +config SPI_CS42L43 + tristate "Cirrus Logic CS42L43 SPI controller" + depends on MFD_CS42L43 && PINCTRL_CS42L43 + help + This enables support for the SPI controller inside the Cirrus Logic + CS42L43 audio codec. + config SPI_DAVINCI tristate "Texas Instruments DaVinci/DA8x/OMAP-L/AM1x SoC SPI controller" depends on ARCH_DAVINCI || ARCH_KEYSTONE || COMPILE_TEST diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 080c2c1b3ec1..c537640bed70 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -40,6 +40,7 @@ obj-$(CONFIG_SPI_CADENCE_QUADSPI) += spi-cadence-quadspi.o obj-$(CONFIG_SPI_CADENCE_XSPI) += spi-cadence-xspi.o obj-$(CONFIG_SPI_CLPS711X) += spi-clps711x.o obj-$(CONFIG_SPI_COLDFIRE_QSPI) += spi-coldfire-qspi.o +obj-$(CONFIG_SPI_CS42L43) += spi-cs42l43.o obj-$(CONFIG_SPI_DAVINCI) += spi-davinci.o obj-$(CONFIG_SPI_DLN2) += spi-dln2.o obj-$(CONFIG_SPI_DESIGNWARE) += spi-dw.o diff --git a/drivers/spi/spi-cs42l43.c b/drivers/spi/spi-cs42l43.c new file mode 100644 index 000000000000..453a9b37ce78 --- /dev/null +++ b/drivers/spi/spi-cs42l43.c @@ -0,0 +1,284 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// CS42L43 SPI Controller Driver +// +// Copyright (C) 2022-2023 Cirrus Logic, Inc. and +// Cirrus Logic International Semiconductor Ltd. + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define CS42L43_FIFO_SIZE 16 +#define CS42L43_SPI_ROOT_HZ (40 * HZ_PER_MHZ) +#define CS42L43_SPI_MAX_LENGTH 65532 + +enum cs42l43_spi_cmd { + CS42L43_WRITE, + CS42L43_READ +}; + +struct cs42l43_spi { + struct device *dev; + struct regmap *regmap; + struct spi_controller *ctlr; +}; + +static const unsigned int cs42l43_clock_divs[] = { + 2, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30 +}; + +static int cs42l43_spi_tx(struct regmap *regmap, const u8 *buf, unsigned int len) +{ + const u8 *end = buf + len; + u32 val = 0; + int ret; + + while (buf < end) { + const u8 *block = min(buf + CS42L43_FIFO_SIZE, end); + + while (buf < block) { + const u8 *word = min(buf + sizeof(u32), block); + int pad = (buf + sizeof(u32)) - word; + + while (buf < word) { + val >>= BITS_PER_BYTE; + val |= FIELD_PREP(GENMASK(31, 24), *buf); + + buf++; + } + + val >>= pad * BITS_PER_BYTE; + + regmap_write(regmap, CS42L43_TX_DATA, val); + } + + regmap_write(regmap, CS42L43_TRAN_CONFIG8, CS42L43_SPI_TX_DONE_MASK); + + ret = regmap_read_poll_timeout(regmap, CS42L43_TRAN_STATUS1, + val, (val & CS42L43_SPI_TX_REQUEST_MASK), + 1000, 5000); + if (ret) + return ret; + } + + return 0; +} + +static int cs42l43_spi_rx(struct regmap *regmap, u8 *buf, unsigned int len) +{ + u8 *end = buf + len; + u32 val; + int ret; + + while (buf < end) { + u8 *block = min(buf + CS42L43_FIFO_SIZE, end); + + ret = regmap_read_poll_timeout(regmap, CS42L43_TRAN_STATUS1, + val, (val & CS42L43_SPI_RX_REQUEST_MASK), + 1000, 5000); + if (ret) + return ret; + + while (buf < block) { + u8 *word = min(buf + sizeof(u32), block); + + ret = regmap_read(regmap, CS42L43_RX_DATA, &val); + if (ret) + return ret; + + while (buf < word) { + *buf = FIELD_GET(GENMASK(7, 0), val); + + val >>= BITS_PER_BYTE; + buf++; + } + } + + regmap_write(regmap, CS42L43_TRAN_CONFIG8, CS42L43_SPI_RX_DONE_MASK); + } + + return 0; +} + +static int cs42l43_transfer_one(struct spi_controller *ctlr, struct spi_device *spi, + struct spi_transfer *tfr) +{ + struct cs42l43_spi *priv = spi_controller_get_devdata(spi->controller); + int i, ret = -EINVAL; + + for (i = 0; i < ARRAY_SIZE(cs42l43_clock_divs); i++) { + if (CS42L43_SPI_ROOT_HZ / cs42l43_clock_divs[i] <= tfr->speed_hz) + break; + } + + if (i == ARRAY_SIZE(cs42l43_clock_divs)) + return -EINVAL; + + regmap_write(priv->regmap, CS42L43_SPI_CLK_CONFIG1, i); + + if (tfr->tx_buf) { + regmap_write(priv->regmap, CS42L43_TRAN_CONFIG3, CS42L43_WRITE); + regmap_write(priv->regmap, CS42L43_TRAN_CONFIG4, tfr->len - 1); + } else if (tfr->rx_buf) { + regmap_write(priv->regmap, CS42L43_TRAN_CONFIG3, CS42L43_READ); + regmap_write(priv->regmap, CS42L43_TRAN_CONFIG5, tfr->len - 1); + } + + regmap_write(priv->regmap, CS42L43_TRAN_CONFIG1, CS42L43_SPI_START_MASK); + + if (tfr->tx_buf) + ret = cs42l43_spi_tx(priv->regmap, (const u8 *)tfr->tx_buf, tfr->len); + else if (tfr->rx_buf) + ret = cs42l43_spi_rx(priv->regmap, (u8 *)tfr->rx_buf, tfr->len); + + return ret; +} + +static void cs42l43_set_cs(struct spi_device *spi, bool is_high) +{ + struct cs42l43_spi *priv = spi_controller_get_devdata(spi->controller); + + if (spi_get_chipselect(spi, 0) == 0) + regmap_write(priv->regmap, CS42L43_SPI_CONFIG2, !is_high); +} + +static int cs42l43_prepare_message(struct spi_controller *ctlr, struct spi_message *msg) +{ + struct cs42l43_spi *priv = spi_controller_get_devdata(ctlr); + struct spi_device *spi = msg->spi; + unsigned int spi_config1 = 0; + + /* select another internal CS, which doesn't exist, so CS 0 is not used */ + if (spi_get_csgpiod(spi, 0)) + spi_config1 |= 1 << CS42L43_SPI_SS_SEL_SHIFT; + if (spi->mode & SPI_CPOL) + spi_config1 |= CS42L43_SPI_CPOL_MASK; + if (spi->mode & SPI_CPHA) + spi_config1 |= CS42L43_SPI_CPHA_MASK; + if (spi->mode & SPI_3WIRE) + spi_config1 |= CS42L43_SPI_THREE_WIRE_MASK; + + regmap_write(priv->regmap, CS42L43_SPI_CONFIG1, spi_config1); + + return 0; +} + +static int cs42l43_prepare_transfer_hardware(struct spi_controller *ctlr) +{ + struct cs42l43_spi *priv = spi_controller_get_devdata(ctlr); + int ret; + + ret = regmap_write(priv->regmap, CS42L43_BLOCK_EN2, CS42L43_SPI_MSTR_EN_MASK); + if (ret) + dev_err(priv->dev, "Failed to enable SPI controller: %d\n", ret); + + return ret; +} + +static int cs42l43_unprepare_transfer_hardware(struct spi_controller *ctlr) +{ + struct cs42l43_spi *priv = spi_controller_get_devdata(ctlr); + int ret; + + ret = regmap_write(priv->regmap, CS42L43_BLOCK_EN2, 0); + if (ret) + dev_err(priv->dev, "Failed to disable SPI controller: %d\n", ret); + + return ret; +} + +static size_t cs42l43_spi_max_length(struct spi_device *spi) +{ + return CS42L43_SPI_MAX_LENGTH; +} + +static int cs42l43_spi_probe(struct platform_device *pdev) +{ + struct cs42l43 *cs42l43 = dev_get_drvdata(pdev->dev.parent); + struct cs42l43_spi *priv; + struct fwnode_handle *fwnode = dev_fwnode(cs42l43->dev); + int ret; + + priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->ctlr = devm_spi_alloc_master(&pdev->dev, sizeof(*priv->ctlr)); + if (!priv->ctlr) + return -ENOMEM; + + spi_controller_set_devdata(priv->ctlr, priv); + + priv->dev = &pdev->dev; + priv->regmap = cs42l43->regmap; + + priv->ctlr->prepare_message = cs42l43_prepare_message; + priv->ctlr->prepare_transfer_hardware = cs42l43_prepare_transfer_hardware; + priv->ctlr->unprepare_transfer_hardware = cs42l43_unprepare_transfer_hardware; + priv->ctlr->transfer_one = cs42l43_transfer_one; + priv->ctlr->set_cs = cs42l43_set_cs; + priv->ctlr->max_transfer_size = cs42l43_spi_max_length; + + if (is_of_node(fwnode)) + fwnode = fwnode_get_named_child_node(fwnode, "spi"); + + device_set_node(&priv->ctlr->dev, fwnode); + + priv->ctlr->mode_bits = SPI_3WIRE | SPI_MODE_X_MASK; + priv->ctlr->flags = SPI_CONTROLLER_HALF_DUPLEX; + priv->ctlr->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16) | + SPI_BPW_MASK(32); + priv->ctlr->min_speed_hz = CS42L43_SPI_ROOT_HZ / + cs42l43_clock_divs[ARRAY_SIZE(cs42l43_clock_divs) - 1]; + priv->ctlr->max_speed_hz = CS42L43_SPI_ROOT_HZ / cs42l43_clock_divs[0]; + priv->ctlr->use_gpio_descriptors = true; + priv->ctlr->auto_runtime_pm = true; + + devm_pm_runtime_enable(priv->dev); + pm_runtime_idle(priv->dev); + + regmap_write(priv->regmap, CS42L43_TRAN_CONFIG6, CS42L43_FIFO_SIZE - 1); + regmap_write(priv->regmap, CS42L43_TRAN_CONFIG7, CS42L43_FIFO_SIZE - 1); + + // Disable Watchdog timer and enable stall + regmap_write(priv->regmap, CS42L43_SPI_CONFIG3, 0); + regmap_write(priv->regmap, CS42L43_SPI_CONFIG4, CS42L43_SPI_STALL_ENA_MASK); + + ret = devm_spi_register_controller(priv->dev, priv->ctlr); + if (ret) { + pm_runtime_disable(priv->dev); + dev_err(priv->dev, "Failed to register SPI controller: %d\n", ret); + } + + return ret; +} + +static const struct platform_device_id cs42l43_spi_id_table[] = { + { "cs42l43-spi", }, + {} +}; +MODULE_DEVICE_TABLE(platform, cs42l43_spi_id_table); + +static struct platform_driver cs42l43_spi_driver = { + .driver = { + .name = "cs42l43-spi", + }, + .probe = cs42l43_spi_probe, + .id_table = cs42l43_spi_id_table, +}; +module_platform_driver(cs42l43_spi_driver); + +MODULE_DESCRIPTION("CS42L43 SPI Driver"); +MODULE_AUTHOR("Lucas Tanure "); +MODULE_AUTHOR("Maciej Strozek "); +MODULE_LICENSE("GPL"); From c01467355f8eb126cab0ef28b66bb506fe6a2e21 Mon Sep 17 00:00:00 2001 From: Andre Werner Date: Fri, 18 Aug 2023 10:37:21 +0200 Subject: [PATCH 539/656] mfd: tps65086: Read DEVICE ID register 1 from device This commit prepares a following commit for the regulator part of the MFD. The driver should support different device chips that differ in their register definitions, for instance to control LDOA1 and SWB2. So it is necessary to use a dedicated regulator description for a specific device variant. Thus, the content from DEVICEID Register 1 is used to choose a dedicated configuration between the different device variants. Signed-off-by: Andre Werner Link: https://lore.kernel.org/r/20230818083721.29790-2-andre.werner@systec-electronic.com Signed-off-by: Lee Jones --- drivers/mfd/tps65086.c | 17 ++++++++++++----- include/linux/mfd/tps65086.h | 20 ++++++++++++++------ 2 files changed, 26 insertions(+), 11 deletions(-) diff --git a/drivers/mfd/tps65086.c b/drivers/mfd/tps65086.c index 6a21000aad4a..9bb7d7d8dcfc 100644 --- a/drivers/mfd/tps65086.c +++ b/drivers/mfd/tps65086.c @@ -81,16 +81,23 @@ static int tps65086_probe(struct i2c_client *client) return PTR_ERR(tps->regmap); } - ret = regmap_read(tps->regmap, TPS65086_DEVICEID, &version); + /* Store device ID to load regulator configuration that fit to IC variant */ + ret = regmap_read(tps->regmap, TPS65086_DEVICEID1, &tps->chip_id); if (ret) { - dev_err(tps->dev, "Failed to read revision register\n"); + dev_err(tps->dev, "Failed to read revision register 1\n"); + return ret; + } + + ret = regmap_read(tps->regmap, TPS65086_DEVICEID2, &version); + if (ret) { + dev_err(tps->dev, "Failed to read revision register 2\n"); return ret; } dev_info(tps->dev, "Device: TPS65086%01lX, OTP: %c, Rev: %ld\n", - (version & TPS65086_DEVICEID_PART_MASK), - (char)((version & TPS65086_DEVICEID_OTP_MASK) >> 4) + 'A', - (version & TPS65086_DEVICEID_REV_MASK) >> 6); + (version & TPS65086_DEVICEID2_PART_MASK), + (char)((version & TPS65086_DEVICEID2_OTP_MASK) >> 4) + 'A', + (version & TPS65086_DEVICEID2_REV_MASK) >> 6); if (tps->irq > 0) { ret = regmap_add_irq_chip(tps->regmap, tps->irq, IRQF_ONESHOT, 0, diff --git a/include/linux/mfd/tps65086.h b/include/linux/mfd/tps65086.h index 16f87cccc003..87e590de6ca5 100644 --- a/include/linux/mfd/tps65086.h +++ b/include/linux/mfd/tps65086.h @@ -13,8 +13,9 @@ #include /* List of registers for TPS65086 */ -#define TPS65086_DEVICEID 0x01 -#define TPS65086_IRQ 0x02 +#define TPS65086_DEVICEID1 0x00 +#define TPS65086_DEVICEID2 0x01 +#define TPS65086_IRQ 0x02 #define TPS65086_IRQ_MASK 0x03 #define TPS65086_PMICSTAT 0x04 #define TPS65086_SHUTDNSRC 0x05 @@ -75,10 +76,16 @@ #define TPS65086_IRQ_SHUTDN_MASK BIT(3) #define TPS65086_IRQ_FAULT_MASK BIT(7) -/* DEVICEID Register field definitions */ -#define TPS65086_DEVICEID_PART_MASK GENMASK(3, 0) -#define TPS65086_DEVICEID_OTP_MASK GENMASK(5, 4) -#define TPS65086_DEVICEID_REV_MASK GENMASK(7, 6) +/* DEVICEID1 Register field definitions */ +#define TPS6508640_ID 0x00 +#define TPS65086401_ID 0x01 +#define TPS6508641_ID 0x10 +#define TPS65086470_ID 0x70 + +/* DEVICEID2 Register field definitions */ +#define TPS65086_DEVICEID2_PART_MASK GENMASK(3, 0) +#define TPS65086_DEVICEID2_OTP_MASK GENMASK(5, 4) +#define TPS65086_DEVICEID2_REV_MASK GENMASK(7, 6) /* VID Masks */ #define BUCK_VID_MASK GENMASK(7, 1) @@ -100,6 +107,7 @@ enum tps65086_irqs { struct tps65086 { struct device *dev; struct regmap *regmap; + unsigned int chip_id; /* IRQ Data */ int irq; From 3a5e6e49855661ad39b8fbb1dbd041178af98e00 Mon Sep 17 00:00:00 2001 From: Andre Werner Date: Fri, 18 Aug 2023 10:37:24 +0200 Subject: [PATCH 540/656] regulator: tps65086: Select dedicated regulator config for chip variant Some configurations differ between chip variants, e,g. the register to control the on of state of LDOA1 and SWB2. Thus, it is necessary to choose the correct configuration for a dedicated device. If the wrong configuration was used, the LDOA1 output that was disabled by the bootloader was enabled in Kernel again. Each chip variant gets its dedicated configuration selected by the chip ID previously collected from MFD probe function. The VTT enum value (tps65086_regulators) is shifted because not all chip variants have a separate SWB2 switch. Sometimes they are merged. So the configuration possibilities differ, thus the regulator configuration arrays have a different length. Signed-off-by: Andre Werner Link: https://lore.kernel.org/r/20230818083721.29790-5-andre.werner@systec-electronic.com Signed-off-by: Mark Brown --- drivers/regulator/tps65086-regulator.c | 188 +++++++++++++++++++++++-- include/linux/mfd/tps65086.h | 3 + 2 files changed, 183 insertions(+), 8 deletions(-) diff --git a/drivers/regulator/tps65086-regulator.c b/drivers/regulator/tps65086-regulator.c index 663789198ba5..2d284c64eeb7 100644 --- a/drivers/regulator/tps65086-regulator.c +++ b/drivers/regulator/tps65086-regulator.c @@ -15,7 +15,15 @@ #include enum tps65086_regulators { BUCK1, BUCK2, BUCK3, BUCK4, BUCK5, BUCK6, LDOA1, - LDOA2, LDOA3, SWA1, SWB1, SWB2, VTT }; + LDOA2, LDOA3, VTT, SWA1, SWB1, SWB2 }; + +/* Selector for regulator configuration regarding PMIC chip ID. */ +enum tps65086_ids { + TPS6508640 = 0, + TPS65086401, + TPS6508641, + TPS65086470, +}; #define TPS65086_REGULATOR(_name, _of, _id, _nv, _vr, _vm, _er, _em, _lr, _dr, _dm) \ [_id] = { \ @@ -57,12 +65,24 @@ enum tps65086_regulators { BUCK1, BUCK2, BUCK3, BUCK4, BUCK5, BUCK6, LDOA1, }, \ } + +#define TPS65086_REGULATOR_CONFIG(_chip_id, _config) \ + [_chip_id] = { \ + .config = _config, \ + .num_elems = ARRAY_SIZE(_config), \ + } + struct tps65086_regulator { struct regulator_desc desc; unsigned int decay_reg; unsigned int decay_mask; }; +struct tps65086_regulator_config { + struct tps65086_regulator * const config; + const unsigned int num_elems; +}; + static const struct linear_range tps65086_10mv_ranges[] = { REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0), REGULATOR_LINEAR_RANGE(410000, 0x1, 0x7F, 10000), @@ -114,7 +134,125 @@ static int tps65086_of_parse_cb(struct device_node *dev, const struct regulator_desc *desc, struct regulator_config *config); -static struct tps65086_regulator regulators[] = { +static struct tps65086_regulator tps6508640_regulator_config[] = { + TPS65086_REGULATOR("BUCK1", "buck1", BUCK1, 0x80, TPS65086_BUCK1CTRL, + BUCK_VID_MASK, TPS65086_BUCK123CTRL, BIT(0), + tps65086_10mv_ranges, TPS65086_BUCK1CTRL, + BIT(0)), + TPS65086_REGULATOR("BUCK2", "buck2", BUCK2, 0x80, TPS65086_BUCK2CTRL, + BUCK_VID_MASK, TPS65086_BUCK123CTRL, BIT(1), + tps65086_10mv_ranges, TPS65086_BUCK2CTRL, + BIT(0)), + TPS65086_REGULATOR("BUCK3", "buck3", BUCK3, 0x80, TPS65086_BUCK3VID, + BUCK_VID_MASK, TPS65086_BUCK123CTRL, BIT(2), + tps65086_10mv_ranges, TPS65086_BUCK3DECAY, + BIT(0)), + TPS65086_REGULATOR("BUCK4", "buck4", BUCK4, 0x80, TPS65086_BUCK4VID, + BUCK_VID_MASK, TPS65086_BUCK4CTRL, BIT(0), + tps65086_10mv_ranges, TPS65086_BUCK4VID, + BIT(0)), + TPS65086_REGULATOR("BUCK5", "buck5", BUCK5, 0x80, TPS65086_BUCK5VID, + BUCK_VID_MASK, TPS65086_BUCK5CTRL, BIT(0), + tps65086_10mv_ranges, TPS65086_BUCK5CTRL, + BIT(0)), + TPS65086_REGULATOR("BUCK6", "buck6", BUCK6, 0x80, TPS65086_BUCK6VID, + BUCK_VID_MASK, TPS65086_BUCK6CTRL, BIT(0), + tps65086_10mv_ranges, TPS65086_BUCK6CTRL, + BIT(0)), + TPS65086_REGULATOR("LDOA1", "ldoa1", LDOA1, 0xF, TPS65086_LDOA1CTRL, + VDOA1_VID_MASK, TPS65086_SWVTT_EN, BIT(7), + tps65086_ldoa1_ranges, 0, 0), + TPS65086_REGULATOR("LDOA2", "ldoa2", LDOA2, 0x10, TPS65086_LDOA2VID, + VDOA23_VID_MASK, TPS65086_LDOA2CTRL, BIT(0), + tps65086_ldoa23_ranges, 0, 0), + TPS65086_REGULATOR("LDOA3", "ldoa3", LDOA3, 0x10, TPS65086_LDOA3VID, + VDOA23_VID_MASK, TPS65086_LDOA3CTRL, BIT(0), + tps65086_ldoa23_ranges, 0, 0), + TPS65086_SWITCH("VTT", "vtt", VTT, TPS65086_SWVTT_EN, BIT(4)), + TPS65086_SWITCH("SWA1", "swa1", SWA1, TPS65086_SWVTT_EN, BIT(5)), + TPS65086_SWITCH("SWB1", "swb1", SWB1, TPS65086_SWVTT_EN, BIT(6)), + TPS65086_SWITCH("SWB2", "swb2", SWB2, TPS65086_LDOA1CTRL, BIT(0)), +}; + +static struct tps65086_regulator tps65086401_regulator_config[] = { + TPS65086_REGULATOR("BUCK1", "buck1", BUCK1, 0x80, TPS65086_BUCK1CTRL, + BUCK_VID_MASK, TPS65086_BUCK123CTRL, BIT(0), + tps65086_10mv_ranges, TPS65086_BUCK1CTRL, + BIT(0)), + TPS65086_REGULATOR("BUCK2", "buck2", BUCK2, 0x80, TPS65086_BUCK2CTRL, + BUCK_VID_MASK, TPS65086_BUCK123CTRL, BIT(1), + tps65086_10mv_ranges, TPS65086_BUCK2CTRL, + BIT(0)), + TPS65086_REGULATOR("BUCK3", "buck3", BUCK3, 0x80, TPS65086_BUCK3VID, + BUCK_VID_MASK, TPS65086_BUCK123CTRL, BIT(2), + tps65086_10mv_ranges, TPS65086_BUCK3DECAY, + BIT(0)), + TPS65086_REGULATOR("BUCK4", "buck4", BUCK4, 0x80, TPS65086_BUCK4VID, + BUCK_VID_MASK, TPS65086_BUCK4CTRL, BIT(0), + tps65086_10mv_ranges, TPS65086_BUCK4VID, + BIT(0)), + TPS65086_REGULATOR("BUCK5", "buck5", BUCK5, 0x80, TPS65086_BUCK5VID, + BUCK_VID_MASK, TPS65086_BUCK5CTRL, BIT(0), + tps65086_10mv_ranges, TPS65086_BUCK5CTRL, + BIT(0)), + TPS65086_REGULATOR("BUCK6", "buck6", BUCK6, 0x80, TPS65086_BUCK6VID, + BUCK_VID_MASK, TPS65086_BUCK6CTRL, BIT(0), + tps65086_10mv_ranges, TPS65086_BUCK6CTRL, + BIT(0)), + TPS65086_REGULATOR("LDOA1", "ldoa1", LDOA1, 0xF, TPS65086_LDOA1CTRL, + VDOA1_VID_MASK, TPS65086_SWVTT_EN, BIT(7), + tps65086_ldoa1_ranges, 0, 0), + TPS65086_REGULATOR("LDOA2", "ldoa2", LDOA2, 0x10, TPS65086_LDOA2VID, + VDOA23_VID_MASK, TPS65086_LDOA2CTRL, BIT(0), + tps65086_ldoa23_ranges, 0, 0), + TPS65086_REGULATOR("LDOA3", "ldoa3", LDOA3, 0x10, TPS65086_LDOA3VID, + VDOA23_VID_MASK, TPS65086_LDOA3CTRL, BIT(0), + tps65086_ldoa23_ranges, 0, 0), + TPS65086_SWITCH("VTT", "vtt", VTT, TPS65086_SWVTT_EN, BIT(4)), + TPS65086_SWITCH("SWA1", "swa1", SWA1, TPS65086_SWVTT_EN, BIT(5)), + TPS65086_SWITCH("SWB1", "swb1", SWB1, TPS65086_SWVTT_EN, BIT(6)), +}; + +static struct tps65086_regulator tps6508641_regulator_config[] = { + TPS65086_REGULATOR("BUCK1", "buck1", BUCK1, 0x80, TPS65086_BUCK1CTRL, + BUCK_VID_MASK, TPS65086_BUCK123CTRL, BIT(0), + tps65086_10mv_ranges, TPS65086_BUCK1CTRL, + BIT(0)), + TPS65086_REGULATOR("BUCK2", "buck2", BUCK2, 0x80, TPS65086_BUCK2CTRL, + BUCK_VID_MASK, TPS65086_BUCK123CTRL, BIT(1), + tps65086_10mv_ranges, TPS65086_BUCK2CTRL, + BIT(0)), + TPS65086_REGULATOR("BUCK3", "buck3", BUCK3, 0x80, TPS65086_BUCK3VID, + BUCK_VID_MASK, TPS65086_BUCK123CTRL, BIT(2), + tps65086_10mv_ranges, TPS65086_BUCK3DECAY, + BIT(0)), + TPS65086_REGULATOR("BUCK4", "buck4", BUCK4, 0x80, TPS65086_BUCK4VID, + BUCK_VID_MASK, TPS65086_BUCK4CTRL, BIT(0), + tps65086_10mv_ranges, TPS65086_BUCK4VID, + BIT(0)), + TPS65086_REGULATOR("BUCK5", "buck5", BUCK5, 0x80, TPS65086_BUCK5VID, + BUCK_VID_MASK, TPS65086_BUCK5CTRL, BIT(0), + tps65086_10mv_ranges, TPS65086_BUCK5CTRL, + BIT(0)), + TPS65086_REGULATOR("BUCK6", "buck6", BUCK6, 0x80, TPS65086_BUCK6VID, + BUCK_VID_MASK, TPS65086_BUCK6CTRL, BIT(0), + tps65086_10mv_ranges, TPS65086_BUCK6CTRL, + BIT(0)), + TPS65086_REGULATOR("LDOA1", "ldoa1", LDOA1, 0xF, TPS65086_LDOA1CTRL, + VDOA1_VID_MASK, TPS65086_SWVTT_EN, BIT(7), + tps65086_ldoa1_ranges, 0, 0), + TPS65086_REGULATOR("LDOA2", "ldoa2", LDOA2, 0x10, TPS65086_LDOA2VID, + VDOA23_VID_MASK, TPS65086_LDOA2CTRL, BIT(0), + tps65086_ldoa23_ranges, 0, 0), + TPS65086_REGULATOR("LDOA3", "ldoa3", LDOA3, 0x10, TPS65086_LDOA3VID, + VDOA23_VID_MASK, TPS65086_LDOA3CTRL, BIT(0), + tps65086_ldoa23_ranges, 0, 0), + TPS65086_SWITCH("VTT", "vtt", VTT, TPS65086_SWVTT_EN, BIT(4)), + TPS65086_SWITCH("SWA1", "swa1", SWA1, TPS65086_SWVTT_EN, BIT(5)), + TPS65086_SWITCH("SWB1", "swb1", SWB1, TPS65086_SWVTT_EN, BIT(6)), +}; + +static struct tps65086_regulator tps65086470_regulator_config[] = { TPS65086_REGULATOR("BUCK1", "buck1", BUCK1, 0x80, TPS65086_BUCK1CTRL, BUCK_VID_MASK, TPS65086_BUCK123CTRL, BIT(0), tps65086_10mv_ranges, TPS65086_BUCK1CTRL, @@ -148,16 +286,25 @@ static struct tps65086_regulator regulators[] = { TPS65086_REGULATOR("LDOA3", "ldoa3", LDOA3, 0x10, TPS65086_LDOA3VID, VDOA23_VID_MASK, TPS65086_LDOA3CTRL, BIT(0), tps65086_ldoa23_ranges, 0, 0), + TPS65086_SWITCH("VTT", "vtt", VTT, TPS65086_SWVTT_EN, BIT(4)), TPS65086_SWITCH("SWA1", "swa1", SWA1, TPS65086_SWVTT_EN, BIT(5)), TPS65086_SWITCH("SWB1", "swb1", SWB1, TPS65086_SWVTT_EN, BIT(6)), TPS65086_SWITCH("SWB2", "swb2", SWB2, TPS65086_SWVTT_EN, BIT(7)), - TPS65086_SWITCH("VTT", "vtt", VTT, TPS65086_SWVTT_EN, BIT(4)), +}; + +static const struct tps65086_regulator_config regulator_configs[] = { + TPS65086_REGULATOR_CONFIG(TPS6508640, tps6508640_regulator_config), + TPS65086_REGULATOR_CONFIG(TPS65086401, tps65086401_regulator_config), + TPS65086_REGULATOR_CONFIG(TPS6508641, tps6508641_regulator_config), + TPS65086_REGULATOR_CONFIG(TPS65086470, tps65086470_regulator_config) }; static int tps65086_of_parse_cb(struct device_node *node, const struct regulator_desc *desc, struct regulator_config *config) { + struct tps65086 * const tps = dev_get_drvdata(config->dev); + struct tps65086_regulator *regulators = tps->reg_config->config; int ret; /* Check for 25mV step mode */ @@ -203,9 +350,30 @@ static int tps65086_regulator_probe(struct platform_device *pdev) { struct tps65086 *tps = dev_get_drvdata(pdev->dev.parent); struct regulator_config config = { }; + unsigned int selector_reg_config; struct regulator_dev *rdev; int i; + /* Select regulator configuration for used PMIC device */ + switch (tps->chip_id) { + case TPS6508640_ID: + selector_reg_config = TPS6508640; + break; + case TPS65086401_ID: + selector_reg_config = TPS65086401; + break; + case TPS6508641_ID: + selector_reg_config = TPS6508641; + break; + case TPS65086470_ID: + selector_reg_config = TPS65086470; + break; + default: + dev_err(tps->dev, "Unknown device ID. Cannot determine regulator config.\n"); + return -ENODEV; + } + tps->reg_config = ®ulator_configs[selector_reg_config]; + platform_set_drvdata(pdev, tps); config.dev = &pdev->dev; @@ -213,12 +381,16 @@ static int tps65086_regulator_probe(struct platform_device *pdev) config.driver_data = tps; config.regmap = tps->regmap; - for (i = 0; i < ARRAY_SIZE(regulators); i++) { - rdev = devm_regulator_register(&pdev->dev, ®ulators[i].desc, - &config); + for (i = 0; i < tps->reg_config->num_elems; ++i) { + struct regulator_desc * const desc_ptr = &tps->reg_config->config[i].desc; + + dev_dbg(tps->dev, "Index: %u; Regulator name: \"%s\"; Regulator ID: %d\n", + i, desc_ptr->name, desc_ptr->id); + + rdev = devm_regulator_register(&pdev->dev, desc_ptr, &config); if (IS_ERR(rdev)) { - dev_err(tps->dev, "failed to register %s regulator\n", - pdev->name); + dev_err(tps->dev, "failed to register %d \"%s\" regulator\n", + i, desc_ptr->name); return PTR_ERR(rdev); } } diff --git a/include/linux/mfd/tps65086.h b/include/linux/mfd/tps65086.h index 87e590de6ca5..9185b5cd8371 100644 --- a/include/linux/mfd/tps65086.h +++ b/include/linux/mfd/tps65086.h @@ -99,6 +99,8 @@ enum tps65086_irqs { TPS65086_IRQ_FAULT, }; +struct tps65086_regulator_config; + /** * struct tps65086 - state holder for the tps65086 driver * @@ -108,6 +110,7 @@ struct tps65086 { struct device *dev; struct regmap *regmap; unsigned int chip_id; + const struct tps65086_regulator_config *reg_config; /* IRQ Data */ int irq; From 35b464e32c8bccef435e415db955787ead4ab44c Mon Sep 17 00:00:00 2001 From: Hugo Villeneuve Date: Sat, 22 Jul 2023 14:09:25 -0400 Subject: [PATCH 541/656] auxdisplay: hd44780: move cursor home after clear display command The DISPLAY_CLEAR command on the NewHaven NHD-0220DZW-AG5 display does NOT change the DDRAM address to 00h (home position) like the standard Hitachi HD44780 controller. As a consequence, the starting position of the initial string LCD_INIT_TEXT is not guaranteed to be at 0,0 depending on where the cursor was before the DISPLAY_CLEAR command. Extract of DISPLAY_CLEAR command from datasheets of: Hitachi HD44780: ... It then sets DDRAM address 0 into the address counter... NewHaven NHD-0220DZW-AG5 datasheet: ... This instruction does not change the DDRAM Address Move the cursor home after sending DISPLAY_CLEAR command to support non-standard LCDs. Signed-off-by: Hugo Villeneuve Reviewed-by: Geert Uytterhoeven Tested-by: David Reaver Link: https://lore.kernel.org/r/20230722180925.1408885-1-hugo@hugovil.com Signed-off-by: Miguel Ojeda --- drivers/auxdisplay/hd44780_common.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/auxdisplay/hd44780_common.c b/drivers/auxdisplay/hd44780_common.c index 3934c2eebf33..7cbf375b0fa5 100644 --- a/drivers/auxdisplay/hd44780_common.c +++ b/drivers/auxdisplay/hd44780_common.c @@ -82,7 +82,15 @@ int hd44780_common_clear_display(struct charlcd *lcd) hdc->write_cmd(hdc, LCD_CMD_DISPLAY_CLEAR); /* datasheet says to wait 1,64 milliseconds */ long_sleep(2); - return 0; + + /* + * The Hitachi HD44780 controller (and compatible ones) reset the DDRAM + * address when executing the DISPLAY_CLEAR command, thus the + * following call is not required. However, other controllers do not + * (e.g. NewHaven NHD-0220DZW-AG5), thus move the cursor to home + * unconditionally to support both. + */ + return hd44780_common_home(lcd); } EXPORT_SYMBOL_GPL(hd44780_common_clear_display); From 82dbbfdf8f7ecc7381ce2adb22778418d520d84c Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Thu, 17 Aug 2023 21:44:49 +0200 Subject: [PATCH 542/656] gpio: pca9570: fix kerneldoc While renaming one of the fields in the driver data struct, the kerneldoc was not updated which apparently angers the test robot now. Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202308171538.nKKUOtbg-lkp@intel.com/ Fixes: a3f7c1d6ddcb ("gpio: pca9570: rename platform_data to chip_data") Signed-off-by: Bartosz Golaszewski Reviewed-by: Andy Shevchenko --- drivers/gpio/gpio-pca9570.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-pca9570.c b/drivers/gpio/gpio-pca9570.c index d8db80ef1293..d37ba4049368 100644 --- a/drivers/gpio/gpio-pca9570.c +++ b/drivers/gpio/gpio-pca9570.c @@ -30,7 +30,7 @@ struct pca9570_chip_data { /** * struct pca9570 - GPIO driver data * @chip: GPIO controller chip - * @p_data: GPIO controller platform data + * @chip_data: GPIO controller platform data * @lock: Protects write sequences * @out: Buffer for device register */ From 2796a01cdf2c639e605088c53a1ac36923ade93c Mon Sep 17 00:00:00 2001 From: Alec Li Date: Mon, 21 Aug 2023 03:53:54 +0000 Subject: [PATCH 543/656] regulator: aw37503: add regulator driver for Awinic AW37503 Add regulator driver for the device Awinic AW37503 which is single inductor - dual output power supply device. AW37503 device is designed to support general positive/negative driven applications like TFT display panels. AW37503 regulator driver supports to enable/disable and set voltage on its output. Signed-off-by: Alec Li Link: https://lore.kernel.org/r/20230821035355.1269976-2-like@awinic.com Signed-off-by: Mark Brown --- drivers/regulator/Kconfig | 8 + drivers/regulator/Makefile | 1 + drivers/regulator/aw37503-regulator.c | 240 ++++++++++++++++++++++++++ 3 files changed, 249 insertions(+) create mode 100644 drivers/regulator/aw37503-regulator.c diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig index 186b97c5aa16..965d4f0c18a6 100644 --- a/drivers/regulator/Kconfig +++ b/drivers/regulator/Kconfig @@ -178,6 +178,14 @@ config REGULATOR_ATC260X ATC260x PMICs. This will enable support for all the software controllable DCDC/LDO regulators. +config REGULATOR_AW37503 + tristate "Awinic AW37503 Dual Output Power regulators" + depends on I2C && GPIOLIB + select REGMAP_I2C + help + This driver supports AW37503 single inductor - dual output + power supply specifically designed for display panels. + config REGULATOR_AXP20X tristate "X-POWERS AXP20X PMIC Regulators" depends on MFD_AXP20X diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile index 08727557b402..23074714a81a 100644 --- a/drivers/regulator/Makefile +++ b/drivers/regulator/Makefile @@ -27,6 +27,7 @@ obj-$(CONFIG_REGULATOR_ARM_SCMI) += scmi-regulator.o obj-$(CONFIG_REGULATOR_AS3711) += as3711-regulator.o obj-$(CONFIG_REGULATOR_AS3722) += as3722-regulator.o obj-$(CONFIG_REGULATOR_ATC260X) += atc260x-regulator.o +obj-$(CONFIG_REGULATOR_AW37503) += aw37503-regulator.o obj-$(CONFIG_REGULATOR_AXP20X) += axp20x-regulator.o obj-$(CONFIG_REGULATOR_BCM590XX) += bcm590xx-regulator.o obj-$(CONFIG_REGULATOR_BD71815) += bd71815-regulator.o diff --git a/drivers/regulator/aw37503-regulator.c b/drivers/regulator/aw37503-regulator.c new file mode 100644 index 000000000000..e01ef6ad3eb8 --- /dev/null +++ b/drivers/regulator/aw37503-regulator.c @@ -0,0 +1,240 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// AWINIC AW37503 Regulator Driver +// +// Copyright (C) 2023 awinic. All Rights Reserved +// +// Author: + +#include +#include +#include +#include +#include +#include +#include + +#define AW37503_REG_VPOS 0x00 +#define AW37503_REG_VNEG 0x01 +#define AW37503_REG_APPS 0x03 +#define AW37503_REG_CONTROL 0x04 +#define AW37503_REG_WPRTEN 0x21 + +#define AW37503_VOUT_MASK 0x1F +#define AW37503_VOUT_N_VOLTAGE 0x15 +#define AW37503_VOUT_VMIN 4000000 +#define AW37503_VOUT_VMAX 6000000 +#define AW37503_VOUT_STEP 100000 + +#define AW37503_REG_APPS_DIS_VPOS BIT(1) +#define AW37503_REG_APPS_DIS_VNEG BIT(0) + +#define AW37503_REGULATOR_ID_VPOS 0 +#define AW37503_REGULATOR_ID_VNEG 1 +#define AW37503_MAX_REGULATORS 2 + +struct aw37503_reg_pdata { + struct gpio_desc *en_gpiod; + int ena_gpio_state; +}; + +struct aw37503_regulator { + struct device *dev; + struct aw37503_reg_pdata reg_pdata[AW37503_MAX_REGULATORS]; +}; + +static int aw37503_regulator_enable(struct regulator_dev *rdev) +{ + struct aw37503_regulator *chip = rdev_get_drvdata(rdev); + int id = rdev_get_id(rdev); + struct aw37503_reg_pdata *rpdata = &chip->reg_pdata[id]; + int ret; + + if (!IS_ERR(rpdata->en_gpiod)) { + gpiod_set_value_cansleep(rpdata->en_gpiod, 1); + rpdata->ena_gpio_state = 1; + } + + /* Hardware automatically enable discharge bit in enable */ + if (rdev->constraints->active_discharge == + REGULATOR_ACTIVE_DISCHARGE_DISABLE) { + ret = regulator_set_active_discharge_regmap(rdev, false); + if (ret < 0) { + dev_err(chip->dev, "Failed to disable active discharge: %d\n", + ret); + return ret; + } + } + + return 0; +} + +static int aw37503_regulator_disable(struct regulator_dev *rdev) +{ + struct aw37503_regulator *chip = rdev_get_drvdata(rdev); + int id = rdev_get_id(rdev); + struct aw37503_reg_pdata *rpdata = &chip->reg_pdata[id]; + + if (!IS_ERR(rpdata->en_gpiod)) { + gpiod_set_value_cansleep(rpdata->en_gpiod, 0); + rpdata->ena_gpio_state = 0; + } + + return 0; +} + +static int aw37503_regulator_is_enabled(struct regulator_dev *rdev) +{ + struct aw37503_regulator *chip = rdev_get_drvdata(rdev); + int id = rdev_get_id(rdev); + struct aw37503_reg_pdata *rpdata = &chip->reg_pdata[id]; + + if (!IS_ERR(rpdata->en_gpiod)) + return rpdata->ena_gpio_state; + + return 1; +} + +static const struct regulator_ops aw37503_regulator_ops = { + .enable = aw37503_regulator_enable, + .disable = aw37503_regulator_disable, + .is_enabled = aw37503_regulator_is_enabled, + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_active_discharge = regulator_set_active_discharge_regmap, +}; + +static int aw37503_of_parse_cb(struct device_node *np, + const struct regulator_desc *desc, + struct regulator_config *config) +{ + struct aw37503_regulator *chip = config->driver_data; + struct aw37503_reg_pdata *rpdata = &chip->reg_pdata[desc->id]; + int ret; + + rpdata->en_gpiod = devm_fwnode_gpiod_get(chip->dev, of_fwnode_handle(np), + "enable", GPIOD_OUT_LOW, + "enable"); + + if (IS_ERR(rpdata->en_gpiod)) { + ret = PTR_ERR(rpdata->en_gpiod); + + /* Ignore the error other than probe defer */ + if (ret == -EPROBE_DEFER) + return ret; + return 0; + } + + return 0; +} + +#define AW37503_REGULATOR_DESC(_id, _name) \ + [AW37503_REGULATOR_ID_##_id] = { \ + .name = "aw37503-"#_name, \ + .supply_name = "vin", \ + .id = AW37503_REGULATOR_ID_##_id, \ + .of_match = of_match_ptr(#_name), \ + .of_parse_cb = aw37503_of_parse_cb, \ + .ops = &aw37503_regulator_ops, \ + .n_voltages = AW37503_VOUT_N_VOLTAGE, \ + .min_uV = AW37503_VOUT_VMIN, \ + .uV_step = AW37503_VOUT_STEP, \ + .enable_time = 500, \ + .vsel_mask = AW37503_VOUT_MASK, \ + .vsel_reg = AW37503_REG_##_id, \ + .active_discharge_off = 0, \ + .active_discharge_on = AW37503_REG_APPS_DIS_##_id, \ + .active_discharge_mask = AW37503_REG_APPS_DIS_##_id, \ + .active_discharge_reg = AW37503_REG_APPS, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + } + +static const struct regulator_desc aw_regs_desc[AW37503_MAX_REGULATORS] = { + AW37503_REGULATOR_DESC(VPOS, outp), + AW37503_REGULATOR_DESC(VNEG, outn), +}; + +static const struct regmap_range aw37503_no_reg_ranges[] = { + regmap_reg_range(AW37503_REG_CONTROL + 1, + AW37503_REG_WPRTEN - 1), +}; + +static const struct regmap_access_table aw37503_no_reg_table = { + .no_ranges = aw37503_no_reg_ranges, + .n_no_ranges = ARRAY_SIZE(aw37503_no_reg_ranges), +}; + +static const struct regmap_config aw37503_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = AW37503_REG_WPRTEN, + .rd_table = &aw37503_no_reg_table, + .wr_table = &aw37503_no_reg_table, +}; + +static int aw37503_probe(struct i2c_client *client) +{ + struct device *dev = &client->dev; + struct aw37503_regulator *chip; + struct regulator_dev *rdev; + struct regmap *regmap; + struct regulator_config config = { }; + int id; + + chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL); + if (!chip) + return -ENOMEM; + + regmap = devm_regmap_init_i2c(client, &aw37503_regmap_config); + if (IS_ERR(regmap)) + return dev_err_probe(dev, PTR_ERR(regmap), + "Failed to init regmap\n"); + + i2c_set_clientdata(client, chip); + chip->dev = dev; + + config.regmap = regmap; + config.dev = dev; + config.driver_data = chip; + + for (id = 0; id < AW37503_MAX_REGULATORS; ++id) { + rdev = devm_regulator_register(dev, &aw_regs_desc[id], + &config); + if (IS_ERR(rdev)) + return dev_err_probe(dev, PTR_ERR(rdev), + "Failed to register regulator %s\n", + aw_regs_desc[id].name); + } + return 0; +} + +static const struct i2c_device_id aw37503_id[] = { + {.name = "aw37503",}, + {}, +}; +MODULE_DEVICE_TABLE(i2c, aw37503_id); + +static const struct of_device_id aw37503_of_match[] = { + {.compatible = "awinic,aw37503",}, + { /* Sentinel */ }, +}; + +MODULE_DEVICE_TABLE(of, aw37503_of_match); + +static struct i2c_driver aw37503_i2c_driver = { + .driver = { + .name = "aw37503", + .of_match_table = aw37503_of_match, + }, + .probe_new = aw37503_probe, + .id_table = aw37503_id, +}; + +module_i2c_driver(aw37503_i2c_driver); + +MODULE_DESCRIPTION("aw37503 regulator driver"); +MODULE_AUTHOR("Alec Li "); +MODULE_LICENSE("GPL"); From 86a1b61a0c7316febecd03d47eaf893eb5a57659 Mon Sep 17 00:00:00 2001 From: Alec Li Date: Mon, 21 Aug 2023 03:53:55 +0000 Subject: [PATCH 544/656] regulator: dt-bindings: Add Awinic AW37503 Add aw37503 regulator device-tree binding documentation. Signed-off-by: Alec Li Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230821035355.1269976-3-like@awinic.com Signed-off-by: Mark Brown --- .../bindings/regulator/awinic,aw37503.yaml | 78 +++++++++++++++++++ 1 file changed, 78 insertions(+) create mode 100644 Documentation/devicetree/bindings/regulator/awinic,aw37503.yaml diff --git a/Documentation/devicetree/bindings/regulator/awinic,aw37503.yaml b/Documentation/devicetree/bindings/regulator/awinic,aw37503.yaml new file mode 100644 index 000000000000..c92a881ed60e --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/awinic,aw37503.yaml @@ -0,0 +1,78 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/awinic,aw37503.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Awinic AW37503 Voltage Regulator + +maintainers: + - Alec Li + +description: + The AW37503 are dual voltage regulator, designed to support positive/negative + supply for driving TFT-LCD panels. It support software-configurable output + switching and monitoring. The output voltages can be programmed via an I2C + compatible interface. + +properties: + compatible: + const: awinic,aw37503 + + reg: + maxItems: 1 + +patternProperties: + "^out[pn]$": + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + description: + Properties for single regulator. + + properties: + enable-gpios: + maxItems: 1 + description: + GPIO specifier to enable the GPIO control (on/off) for regulator. + + required: + - regulator-name + +required: + - compatible + - reg + - outp + - outn + +additionalProperties: false + +examples: + - | + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + regulator@3e { + compatible = "awinic,aw37503"; + reg = <0x3e>; + + outp { + regulator-name = "outp"; + regulator-boot-on; + regulator-always-on; + enable-gpios = <&gpio 17 GPIO_ACTIVE_LOW>; + }; + + outn { + regulator-name = "outn"; + regulator-boot-on; + regulator-always-on; + enable-gpios = <&gpio 27 GPIO_ACTIVE_LOW>; + }; + }; + }; +... + From 246f74bb11e7df33946443a21c03463937867a09 Mon Sep 17 00:00:00 2001 From: Zhang Zekun Date: Thu, 10 Aug 2023 21:16:50 +0800 Subject: [PATCH 545/656] spi: bcm-qspi: Simplify logic by using devm_platform_ioremap_resource_byname() platform_get_resource_byname() and devm_ioremap_resource() can be replaced by devm_platform_ioremap_resource_byname(), which can simplify the code logic a bit, No functional change here. Signed-off-by: Zhang Zekun Link: https://lore.kernel.org/r/20230810131650.71916-1-zhangzekun11@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-iproc-qspi.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/drivers/spi/spi-iproc-qspi.c b/drivers/spi/spi-iproc-qspi.c index 5980a0dbbccb..39ee2b43a516 100644 --- a/drivers/spi/spi-iproc-qspi.c +++ b/drivers/spi/spi-iproc-qspi.c @@ -94,7 +94,6 @@ static int bcm_iproc_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct bcm_iproc_intc *priv; struct bcm_qspi_soc_intc *soc_intc; - struct resource *res; priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); if (!priv) @@ -104,14 +103,12 @@ static int bcm_iproc_probe(struct platform_device *pdev) spin_lock_init(&priv->soclock); - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "intr_regs"); - priv->int_reg = devm_ioremap_resource(dev, res); + priv->int_reg = devm_platform_ioremap_resource_byname(pdev, "intr_regs"); if (IS_ERR(priv->int_reg)) return PTR_ERR(priv->int_reg); - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, - "intr_status_reg"); - priv->int_status_reg = devm_ioremap_resource(dev, res); + priv->int_status_reg = devm_platform_ioremap_resource_byname(pdev, + "intr_status_reg"); if (IS_ERR(priv->int_status_reg)) return PTR_ERR(priv->int_status_reg); From 9e0fa5d85a4f49496e1a92889418c9d7767c1ab9 Mon Sep 17 00:00:00 2001 From: Li Zetao Date: Fri, 18 Aug 2023 17:30:14 +0800 Subject: [PATCH 546/656] gpio: mxc: Use helper function devm_clk_get_optional_enabled() Since commit 7ef9651e9792 ("clk: Provide new devm_clk helpers for prepared and enabled clocks"), devm_clk_get_optional() and clk_prepare_enable() can now be replaced by devm_clk_get_optional_enabled() when the driver enables (and possibly prepares) the clocks for the whole lifetime of the device. Moreover, it is no longer necessary to unprepare and disable the clocks explicitly. Signed-off-by: Li Zetao Reviewed-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-mxc.c | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c index 004c6ad7ce52..4cb455b2bdee 100644 --- a/drivers/gpio/gpio-mxc.c +++ b/drivers/gpio/gpio-mxc.c @@ -452,16 +452,10 @@ static int mxc_gpio_probe(struct platform_device *pdev) return port->irq; /* the controller clock is optional */ - port->clk = devm_clk_get_optional(&pdev->dev, NULL); + port->clk = devm_clk_get_optional_enabled(&pdev->dev, NULL); if (IS_ERR(port->clk)) return PTR_ERR(port->clk); - err = clk_prepare_enable(port->clk); - if (err) { - dev_err(&pdev->dev, "Unable to enable clock.\n"); - return err; - } - if (of_device_is_compatible(np, "fsl,imx7d-gpio")) port->power_off = true; @@ -535,7 +529,6 @@ out_irqdomain_remove: out_bgio: pm_runtime_disable(&pdev->dev); pm_runtime_put_noidle(&pdev->dev); - clk_disable_unprepare(port->clk); dev_info(&pdev->dev, "%s failed with errno %d\n", __func__, err); return err; } From 38a700efc51080c7184f71edbf5e49561da9754f Mon Sep 17 00:00:00 2001 From: Asmaa Mnebhi Date: Fri, 18 Aug 2023 12:43:14 -0400 Subject: [PATCH 547/656] gpio: mlxbf3: Support add_pin_ranges() Support add_pin_ranges() so that pinctrl_gpio_request() can be called. The GPIO value is not modified when the user runs the "gpioset" tool. This is because when gpiochip_generic_request is invoked by the gpio-mlxbf3 driver, "pin_ranges" is empty so it skips "pinctrl_gpio_request()". pinctrl_gpio_request() is essential in the code flow because it changes the mux value so that software has control over modifying the GPIO value. Adding add_pin_ranges() creates a dependency on the pinctrl-mlxbf3.c driver. Fixes: cd33f216d24 ("gpio: mlxbf3: Add gpio driver support") Signed-off-by: Asmaa Mnebhi Reviewed-by: Andy Shevchenko Reviewed-by: Linus Walleij Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-mlxbf3.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/drivers/gpio/gpio-mlxbf3.c b/drivers/gpio/gpio-mlxbf3.c index e30cee108986..0a5f241a8352 100644 --- a/drivers/gpio/gpio-mlxbf3.c +++ b/drivers/gpio/gpio-mlxbf3.c @@ -19,6 +19,8 @@ * gpio[1]: HOST_GPIO32->HOST_GPIO55 */ #define MLXBF3_GPIO_MAX_PINS_PER_BLOCK 32 +#define MLXBF3_GPIO_MAX_PINS_BLOCK0 32 +#define MLXBF3_GPIO_MAX_PINS_BLOCK1 24 /* * fw_gpio[x] block registers and their offset @@ -158,6 +160,26 @@ static const struct irq_chip gpio_mlxbf3_irqchip = { GPIOCHIP_IRQ_RESOURCE_HELPERS, }; +static int mlxbf3_gpio_add_pin_ranges(struct gpio_chip *chip) +{ + unsigned int id; + + switch(chip->ngpio) { + case MLXBF3_GPIO_MAX_PINS_BLOCK0: + id = 0; + break; + case MLXBF3_GPIO_MAX_PINS_BLOCK1: + id = 1; + break; + default: + return -EINVAL; + } + + return gpiochip_add_pin_range(chip, "MLNXBF34:00", + chip->base, id * MLXBF3_GPIO_MAX_PINS_PER_BLOCK, + chip->ngpio); +} + static int mlxbf3_gpio_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -197,6 +219,7 @@ static int mlxbf3_gpio_probe(struct platform_device *pdev) gc->request = gpiochip_generic_request; gc->free = gpiochip_generic_free; gc->owner = THIS_MODULE; + gc->add_pin_ranges = mlxbf3_gpio_add_pin_ranges; irq = platform_get_irq(pdev, 0); if (irq >= 0) { @@ -243,6 +266,7 @@ static struct platform_driver mlxbf3_gpio_driver = { }; module_platform_driver(mlxbf3_gpio_driver); +MODULE_SOFTDEP("pre: pinctrl-mlxbf3"); MODULE_DESCRIPTION("NVIDIA BlueField-3 GPIO Driver"); MODULE_AUTHOR("Asmaa Mnebhi "); MODULE_LICENSE("Dual BSD/GPL"); From 9c53fb0ad1acaf227718ccae16e8fb8e01c05918 Mon Sep 17 00:00:00 2001 From: Eugene Shalygin Date: Mon, 21 Aug 2023 13:52:35 +0200 Subject: [PATCH 548/656] hwmon: (asus-ec-sensosrs) fix mutex path for X670E Hero A user reported that they observe race condition warning [1] and after looking once again into the DSDT source it was found that wrong mutex was used. [1] https://github.com/zeule/asus-ec-sensors/issues/43 Fixes: 790dec13c012 ("hwmon: (asus-ec-sensors) add ROG Crosshair X670E Hero.") Signed-off-by: Eugene Shalygin Link: https://lore.kernel.org/r/20230821115418.25733-2-eugene.shalygin@gmail.com Signed-off-by: Guenter Roeck --- drivers/hwmon/asus-ec-sensors.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/hwmon/asus-ec-sensors.c b/drivers/hwmon/asus-ec-sensors.c index f52a539eb33e..51f9c2db403e 100644 --- a/drivers/hwmon/asus-ec-sensors.c +++ b/drivers/hwmon/asus-ec-sensors.c @@ -340,7 +340,7 @@ static const struct ec_board_info board_info_crosshair_x670e_hero = { .sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE | SENSOR_TEMP_MB | SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER, - .mutex_path = ASUS_HW_ACCESS_MUTEX_RMTW_ASMX, + .mutex_path = ACPI_GLOBAL_LOCK_PSEUDO_PATH, .family = family_amd_600_series, }; From 4a754aba0bd1ecc0529c7e0282a3947cff68cc5f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Tue, 27 Jun 2023 08:49:48 +0200 Subject: [PATCH 549/656] hwmon: (pmbus) Update documentation to not use .probe_new() any more MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Since commit 03c835f498b5 ("i2c: Switch .probe() to not take an id parameter") .probe() is the recommended callback to implement an i2c driver (again). Reflect this in the documentation and don't mention .probe_new() which will be dropped soon. Signed-off-by: Uwe Kleine-König Link: https://lore.kernel.org/r/20230627064948.593804-1-u.kleine-koenig@pengutronix.de Signed-off-by: Guenter Roeck --- Documentation/hwmon/pmbus.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/hwmon/pmbus.rst b/Documentation/hwmon/pmbus.rst index 7ecfec6ca2db..eb1569bfa676 100644 --- a/Documentation/hwmon/pmbus.rst +++ b/Documentation/hwmon/pmbus.rst @@ -163,7 +163,7 @@ Emerson DS1200 power modules might look as follows:: .driver = { .name = "ds1200", }, - .probe_new = ds1200_probe, + .probe = ds1200_probe, .id_table = ds1200_id, }; From c15a8edd63319788356a9fc9a7fe60468a1476d7 Mon Sep 17 00:00:00 2001 From: Eddie James Date: Wed, 28 Jun 2023 10:34:53 -0500 Subject: [PATCH 550/656] hwmon: (pmbus/acbel-fsg032) Add firmware version debugfs attribute Like the IBM CFFPS driver, export the PSU's firmware version to a debugfs attribute as reported in the manufacturer register. Signed-off-by: Eddie James Link: https://lore.kernel.org/r/20230628153453.122213-1-eajames@linux.ibm.com [groeck: Dropped unused variable; changed buffer from char to u8] Signed-off-by: Guenter Roeck --- drivers/hwmon/pmbus/acbel-fsg032.c | 38 ++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/drivers/hwmon/pmbus/acbel-fsg032.c b/drivers/hwmon/pmbus/acbel-fsg032.c index 0a0ef4ce3493..e0c55fd8f3a6 100644 --- a/drivers/hwmon/pmbus/acbel-fsg032.c +++ b/drivers/hwmon/pmbus/acbel-fsg032.c @@ -3,14 +3,51 @@ * Copyright 2023 IBM Corp. */ +#include #include #include #include +#include #include #include #include #include "pmbus.h" +#define ACBEL_MFR_FW_REVISION 0xd9 + +static ssize_t acbel_fsg032_debugfs_read(struct file *file, char __user *buf, size_t count, + loff_t *ppos) +{ + struct i2c_client *client = file->private_data; + u8 data[I2C_SMBUS_BLOCK_MAX + 2] = { 0 }; + char out[8]; + int rc; + + rc = i2c_smbus_read_block_data(client, ACBEL_MFR_FW_REVISION, data); + if (rc < 0) + return rc; + + rc = snprintf(out, sizeof(out), "%*phN\n", min(rc, 3), data); + return simple_read_from_buffer(buf, count, ppos, out, rc); +} + +static const struct file_operations acbel_debugfs_ops = { + .llseek = noop_llseek, + .read = acbel_fsg032_debugfs_read, + .write = NULL, + .open = simple_open, +}; + +static void acbel_fsg032_init_debugfs(struct i2c_client *client) +{ + struct dentry *debugfs = pmbus_get_debugfs_dir(client); + + if (!debugfs) + return; + + debugfs_create_file("fw_version", 0444, debugfs, client, &acbel_debugfs_ops); +} + static const struct i2c_device_id acbel_fsg032_id[] = { { "acbel_fsg032" }, {} @@ -59,6 +96,7 @@ static int acbel_fsg032_probe(struct i2c_client *client) if (rc) return rc; + acbel_fsg032_init_debugfs(client); return 0; } From 6698cbd624bf3ad4822453b0c3941bf0220f283f Mon Sep 17 00:00:00 2001 From: Christophe JAILLET Date: Sat, 8 Jul 2023 07:52:31 +0200 Subject: [PATCH 551/656] hwmon: (lan966x) Use the devm_clk_get_enabled() helper function Use the devm_clk_get_enabled() helper function instead of hand-writing it. It saves some line of codes. Signed-off-by: Christophe JAILLET Link: https://lore.kernel.org/r/25f2ab4c61d4fc48e8200f8754bb446f2b89ea89.1688795527.git.christophe.jaillet@wanadoo.fr Signed-off-by: Guenter Roeck --- drivers/hwmon/lan966x-hwmon.c | 24 +----------------------- 1 file changed, 1 insertion(+), 23 deletions(-) diff --git a/drivers/hwmon/lan966x-hwmon.c b/drivers/hwmon/lan966x-hwmon.c index f8658359a098..7247c03e4f44 100644 --- a/drivers/hwmon/lan966x-hwmon.c +++ b/drivers/hwmon/lan966x-hwmon.c @@ -334,24 +334,6 @@ static struct regmap *lan966x_init_regmap(struct platform_device *pdev, return devm_regmap_init_mmio(&pdev->dev, base, ®map_config); } -static void lan966x_clk_disable(void *data) -{ - struct lan966x_hwmon *hwmon = data; - - clk_disable_unprepare(hwmon->clk); -} - -static int lan966x_clk_enable(struct device *dev, struct lan966x_hwmon *hwmon) -{ - int ret; - - ret = clk_prepare_enable(hwmon->clk); - if (ret) - return ret; - - return devm_add_action_or_reset(dev, lan966x_clk_disable, hwmon); -} - static int lan966x_hwmon_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -363,15 +345,11 @@ static int lan966x_hwmon_probe(struct platform_device *pdev) if (!hwmon) return -ENOMEM; - hwmon->clk = devm_clk_get(dev, NULL); + hwmon->clk = devm_clk_get_enabled(dev, NULL); if (IS_ERR(hwmon->clk)) return dev_err_probe(dev, PTR_ERR(hwmon->clk), "failed to get clock\n"); - ret = lan966x_clk_enable(dev, hwmon); - if (ret) - return dev_err_probe(dev, ret, "failed to enable clock\n"); - hwmon->clk_rate = clk_get_rate(hwmon->clk); hwmon->regmap_pvt = lan966x_init_regmap(pdev, "pvt"); From 39f034386fc023780a505ed02ca40e57e4031e23 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Fri, 14 Jul 2023 11:46:04 -0600 Subject: [PATCH 552/656] hwmon: Explicitly include correct DT includes The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring Link: https://lore.kernel.org/r/20230714174607.4057185-1-robh@kernel.org Signed-off-by: Guenter Roeck --- drivers/hwmon/ad7418.c | 2 +- drivers/hwmon/ads7828.c | 2 +- drivers/hwmon/adt7475.c | 1 - drivers/hwmon/as370-hwmon.c | 3 ++- drivers/hwmon/aspeed-pwm-tacho.c | 3 +-- drivers/hwmon/g762.c | 1 - drivers/hwmon/gxp-fan-ctrl.c | 2 +- drivers/hwmon/ina2xx.c | 1 - drivers/hwmon/lm63.c | 2 +- drivers/hwmon/lm75.c | 1 - drivers/hwmon/lm85.c | 2 +- drivers/hwmon/lm90.c | 2 +- drivers/hwmon/lochnagar-hwmon.c | 1 - drivers/hwmon/ltq-cputemp.c | 3 ++- drivers/hwmon/max31730.c | 1 - drivers/hwmon/max6621.c | 2 +- drivers/hwmon/max6697.c | 1 - drivers/hwmon/mcp3021.c | 1 - drivers/hwmon/nsa320-hwmon.c | 2 -- drivers/hwmon/pmbus/dps920ab.c | 2 +- drivers/hwmon/pmbus/ibm-cffps.c | 2 +- drivers/hwmon/pmbus/ir38064.c | 4 ++-- drivers/hwmon/pmbus/max20730.c | 2 +- drivers/hwmon/pmbus/mp5023.c | 2 +- drivers/hwmon/pmbus/mpq7932.c | 2 +- drivers/hwmon/pmbus/q54sj108a2.c | 2 +- drivers/hwmon/pmbus/tps53679.c | 2 +- drivers/hwmon/pmbus/ucd9000.c | 2 +- drivers/hwmon/pmbus/ucd9200.c | 2 +- drivers/hwmon/sbtsi_temp.c | 1 - drivers/hwmon/scpi-hwmon.c | 2 +- drivers/hwmon/tmp421.c | 2 +- drivers/hwmon/tmp464.c | 2 +- drivers/hwmon/tps23861.c | 2 +- drivers/hwmon/ultra45_env.c | 3 ++- drivers/hwmon/vexpress-hwmon.c | 1 - drivers/hwmon/w83773g.c | 2 +- 37 files changed, 30 insertions(+), 40 deletions(-) diff --git a/drivers/hwmon/ad7418.c b/drivers/hwmon/ad7418.c index ffe81e445010..bcea66eac82b 100644 --- a/drivers/hwmon/ad7418.c +++ b/drivers/hwmon/ad7418.c @@ -16,7 +16,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/hwmon/ads7828.c b/drivers/hwmon/ads7828.c index 1932613ec095..e86894e35639 100644 --- a/drivers/hwmon/ads7828.c +++ b/drivers/hwmon/ads7828.c @@ -18,7 +18,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/hwmon/adt7475.c b/drivers/hwmon/adt7475.c index c0ce88324ea6..5363254644da 100644 --- a/drivers/hwmon/adt7475.c +++ b/drivers/hwmon/adt7475.c @@ -10,7 +10,6 @@ */ #include -#include #include #include #include diff --git a/drivers/hwmon/as370-hwmon.c b/drivers/hwmon/as370-hwmon.c index fffbf385a57f..316454bd983d 100644 --- a/drivers/hwmon/as370-hwmon.c +++ b/drivers/hwmon/as370-hwmon.c @@ -11,7 +11,8 @@ #include #include #include -#include +#include +#include #define CTRL 0x0 #define PD BIT(0) diff --git a/drivers/hwmon/aspeed-pwm-tacho.c b/drivers/hwmon/aspeed-pwm-tacho.c index d11f674e3dc3..997df4b40509 100644 --- a/drivers/hwmon/aspeed-pwm-tacho.c +++ b/drivers/hwmon/aspeed-pwm-tacho.c @@ -12,8 +12,7 @@ #include #include #include -#include -#include +#include #include #include #include diff --git a/drivers/hwmon/g762.c b/drivers/hwmon/g762.c index 1b6ff4712138..fad69ef56c75 100644 --- a/drivers/hwmon/g762.c +++ b/drivers/hwmon/g762.c @@ -39,7 +39,6 @@ #include #include #include -#include #include #define DRVNAME "g762" diff --git a/drivers/hwmon/gxp-fan-ctrl.c b/drivers/hwmon/gxp-fan-ctrl.c index 2e05bc2f627a..00e057050437 100644 --- a/drivers/hwmon/gxp-fan-ctrl.c +++ b/drivers/hwmon/gxp-fan-ctrl.c @@ -6,7 +6,7 @@ #include #include #include -#include +#include #include #define OFS_FAN_INST 0 /* Is 0 because plreg base will be set at INST */ diff --git a/drivers/hwmon/ina2xx.c b/drivers/hwmon/ina2xx.c index cfd7efef5cdf..a47973e2d606 100644 --- a/drivers/hwmon/ina2xx.c +++ b/drivers/hwmon/ina2xx.c @@ -31,7 +31,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/hwmon/lm63.c b/drivers/hwmon/lm63.c index 6972454eb4e0..562c94c7d831 100644 --- a/drivers/hwmon/lm63.c +++ b/drivers/hwmon/lm63.c @@ -33,7 +33,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/hwmon/lm75.c b/drivers/hwmon/lm75.c index 72e634d1b857..bcfa8193e5e7 100644 --- a/drivers/hwmon/lm75.c +++ b/drivers/hwmon/lm75.c @@ -13,7 +13,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/hwmon/lm85.c b/drivers/hwmon/lm85.c index 8540178f5b74..2a62ea7b25a9 100644 --- a/drivers/hwmon/lm85.c +++ b/drivers/hwmon/lm85.c @@ -12,7 +12,7 @@ */ #include -#include +#include #include #include #include diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index 90101c236f35..b25ae8b7ec90 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -106,7 +106,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/hwmon/lochnagar-hwmon.c b/drivers/hwmon/lochnagar-hwmon.c index 6350904a8a8b..5202dddfd61e 100644 --- a/drivers/hwmon/lochnagar-hwmon.c +++ b/drivers/hwmon/lochnagar-hwmon.c @@ -16,7 +16,6 @@ #include #include #include -#include #include #include diff --git a/drivers/hwmon/ltq-cputemp.c b/drivers/hwmon/ltq-cputemp.c index 08e09a82acab..f7e4a4ca5239 100644 --- a/drivers/hwmon/ltq-cputemp.c +++ b/drivers/hwmon/ltq-cputemp.c @@ -9,8 +9,9 @@ #include #include #include +#include #include -#include +#include #include diff --git a/drivers/hwmon/max31730.c b/drivers/hwmon/max31730.c index b1300ca9db1f..7d237db6e57c 100644 --- a/drivers/hwmon/max31730.c +++ b/drivers/hwmon/max31730.c @@ -11,7 +11,6 @@ #include #include #include -#include #include #include diff --git a/drivers/hwmon/max6621.c b/drivers/hwmon/max6621.c index 7f709fd1af89..af7e62685898 100644 --- a/drivers/hwmon/max6621.c +++ b/drivers/hwmon/max6621.c @@ -12,7 +12,7 @@ #include #include #include -#include +#include #include #define MAX6621_DRV_NAME "max6621" diff --git a/drivers/hwmon/max6697.c b/drivers/hwmon/max6697.c index 3a67778f111c..fe826fcf9990 100644 --- a/drivers/hwmon/max6697.c +++ b/drivers/hwmon/max6697.c @@ -15,7 +15,6 @@ #include #include #include -#include #include #include diff --git a/drivers/hwmon/mcp3021.c b/drivers/hwmon/mcp3021.c index 127e15ff3e76..9814eaf24564 100644 --- a/drivers/hwmon/mcp3021.c +++ b/drivers/hwmon/mcp3021.c @@ -20,7 +20,6 @@ #include #include #include -#include /* Vdd / reference voltage in millivolt */ #define MCP3021_VDD_REF_MAX 5500 diff --git a/drivers/hwmon/nsa320-hwmon.c b/drivers/hwmon/nsa320-hwmon.c index ebe6b031e56f..e26334469549 100644 --- a/drivers/hwmon/nsa320-hwmon.c +++ b/drivers/hwmon/nsa320-hwmon.c @@ -20,8 +20,6 @@ #include #include #include -#include -#include #include /* Tests for error return values rely upon this value being < 0x80 */ diff --git a/drivers/hwmon/pmbus/dps920ab.c b/drivers/hwmon/pmbus/dps920ab.c index f7ff3e4650b7..04e0d598a6e5 100644 --- a/drivers/hwmon/pmbus/dps920ab.c +++ b/drivers/hwmon/pmbus/dps920ab.c @@ -9,7 +9,7 @@ #include #include #include -#include +#include #include "pmbus.h" struct dps920ab_data { diff --git a/drivers/hwmon/pmbus/ibm-cffps.c b/drivers/hwmon/pmbus/ibm-cffps.c index c791925b8907..5b11aacda4d2 100644 --- a/drivers/hwmon/pmbus/ibm-cffps.c +++ b/drivers/hwmon/pmbus/ibm-cffps.c @@ -13,7 +13,7 @@ #include #include #include -#include +#include #include #include "pmbus.h" diff --git a/drivers/hwmon/pmbus/ir38064.c b/drivers/hwmon/pmbus/ir38064.c index 871c322d3d51..04185be3fdb6 100644 --- a/drivers/hwmon/pmbus/ir38064.c +++ b/drivers/hwmon/pmbus/ir38064.c @@ -6,7 +6,7 @@ * * VOUT_MODE is not supported by the device. The driver fakes VOUT linear16 * mode with exponent value -8 as direct mode with m=256/b=0/R=0. - * + * * The device supports VOUT_PEAK, IOUT_PEAK, and TEMPERATURE_PEAK, however * this driver does not currently support them. */ @@ -16,7 +16,7 @@ #include #include #include -#include +#include #include #include "pmbus.h" diff --git a/drivers/hwmon/pmbus/max20730.c b/drivers/hwmon/pmbus/max20730.c index 7bcf27995033..6f99085c2c3b 100644 --- a/drivers/hwmon/pmbus/max20730.c +++ b/drivers/hwmon/pmbus/max20730.c @@ -15,7 +15,7 @@ #include #include #include -#include +#include #include #include #include "pmbus.h" diff --git a/drivers/hwmon/pmbus/mp5023.c b/drivers/hwmon/pmbus/mp5023.c index c4c4324d2b74..21acb7fd9a1a 100644 --- a/drivers/hwmon/pmbus/mp5023.c +++ b/drivers/hwmon/pmbus/mp5023.c @@ -5,7 +5,7 @@ #include #include -#include +#include #include "pmbus.h" static struct pmbus_driver_info mp5023_info = { diff --git a/drivers/hwmon/pmbus/mpq7932.c b/drivers/hwmon/pmbus/mpq7932.c index 865d42edda1a..6c62f01da7c6 100644 --- a/drivers/hwmon/pmbus/mpq7932.c +++ b/drivers/hwmon/pmbus/mpq7932.c @@ -12,7 +12,7 @@ #include #include #include -#include +#include #include #include "pmbus.h" diff --git a/drivers/hwmon/pmbus/q54sj108a2.c b/drivers/hwmon/pmbus/q54sj108a2.c index b830f3b02bcc..a235c1cdf4fe 100644 --- a/drivers/hwmon/pmbus/q54sj108a2.c +++ b/drivers/hwmon/pmbus/q54sj108a2.c @@ -10,7 +10,7 @@ #include #include #include -#include +#include #include "pmbus.h" #define STORE_DEFAULT_ALL 0x11 diff --git a/drivers/hwmon/pmbus/tps53679.c b/drivers/hwmon/pmbus/tps53679.c index ef99005a3af5..e77b12f342b4 100644 --- a/drivers/hwmon/pmbus/tps53679.c +++ b/drivers/hwmon/pmbus/tps53679.c @@ -12,7 +12,7 @@ #include #include #include -#include +#include #include "pmbus.h" enum chips { diff --git a/drivers/hwmon/pmbus/ucd9000.c b/drivers/hwmon/pmbus/ucd9000.c index c404d306e8f7..b1d1d4214e69 100644 --- a/drivers/hwmon/pmbus/ucd9000.c +++ b/drivers/hwmon/pmbus/ucd9000.c @@ -10,7 +10,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/hwmon/pmbus/ucd9200.c b/drivers/hwmon/pmbus/ucd9200.c index a82847945508..e4aad64b2d94 100644 --- a/drivers/hwmon/pmbus/ucd9200.c +++ b/drivers/hwmon/pmbus/ucd9200.c @@ -7,7 +7,7 @@ #include #include -#include +#include #include #include #include diff --git a/drivers/hwmon/sbtsi_temp.c b/drivers/hwmon/sbtsi_temp.c index b79cece4ac9a..dd85cf89f008 100644 --- a/drivers/hwmon/sbtsi_temp.c +++ b/drivers/hwmon/sbtsi_temp.c @@ -13,7 +13,6 @@ #include #include #include -#include #include /* diff --git a/drivers/hwmon/scpi-hwmon.c b/drivers/hwmon/scpi-hwmon.c index 121e5e9f487f..a0d220609565 100644 --- a/drivers/hwmon/scpi-hwmon.c +++ b/drivers/hwmon/scpi-hwmon.c @@ -8,7 +8,7 @@ #include #include -#include +#include #include #include #include diff --git a/drivers/hwmon/tmp421.c b/drivers/hwmon/tmp421.c index 3cde3916ab6d..10b66c9ce045 100644 --- a/drivers/hwmon/tmp421.c +++ b/drivers/hwmon/tmp421.c @@ -20,7 +20,7 @@ #include #include #include -#include +#include #include /* Addresses to scan */ diff --git a/drivers/hwmon/tmp464.c b/drivers/hwmon/tmp464.c index 4b79c3f4d9fe..f58ca4c6acb6 100644 --- a/drivers/hwmon/tmp464.c +++ b/drivers/hwmon/tmp464.c @@ -14,7 +14,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/hwmon/tps23861.c b/drivers/hwmon/tps23861.c index 8fbbb29ae11d..d33ecbac00d6 100644 --- a/drivers/hwmon/tps23861.c +++ b/drivers/hwmon/tps23861.c @@ -14,7 +14,7 @@ #include #include #include -#include +#include #include #define TEMPERATURE 0x2c diff --git a/drivers/hwmon/ultra45_env.c b/drivers/hwmon/ultra45_env.c index b23cff2e3d5d..3b580f229887 100644 --- a/drivers/hwmon/ultra45_env.c +++ b/drivers/hwmon/ultra45_env.c @@ -9,7 +9,8 @@ #include #include #include -#include +#include +#include #include #include #include diff --git a/drivers/hwmon/vexpress-hwmon.c b/drivers/hwmon/vexpress-hwmon.c index 2ac5fb96bba4..d82a3b454d0e 100644 --- a/drivers/hwmon/vexpress-hwmon.c +++ b/drivers/hwmon/vexpress-hwmon.c @@ -13,7 +13,6 @@ #include #include #include -#include #include #include diff --git a/drivers/hwmon/w83773g.c b/drivers/hwmon/w83773g.c index 7f3615f5587c..045eea8378c2 100644 --- a/drivers/hwmon/w83773g.c +++ b/drivers/hwmon/w83773g.c @@ -12,7 +12,7 @@ #include #include #include -#include +#include #include /* W83773 has 3 channels */ From 170fea88170796562a95e561a486f8403cfc747d Mon Sep 17 00:00:00 2001 From: Azeem Shaikh Date: Wed, 12 Jul 2023 21:43:07 +0000 Subject: [PATCH 553/656] hwmon: (pmbus/max20730) Remove strlcpy occurences strlcpy() reads the entire source buffer first. This read may exceed the destination size limit. This is both inefficient and can lead to linear read overflows if a source string is not NUL-terminated [1]. In an effort to remove strlcpy() completely [2], replace strlcpy() here with direct assignment. strlcpy in this file is used to copy fixed-length strings which can be completely avoided by direct assignment and is safe to do so. strlen() is used to return the length of @tbuf. [1] https://www.kernel.org/doc/html/latest/process/deprecated.html#strlcpy [2] https://github.com/KSPP/linux/issues/89 Signed-off-by: Azeem Shaikh Reviewed-by: Kees Cook Link: https://lore.kernel.org/r/20230712214307.2424810-1-azeemshaikh38@gmail.com Signed-off-by: Guenter Roeck --- drivers/hwmon/pmbus/max20730.c | 64 ++++++++++++++++++---------------- 1 file changed, 33 insertions(+), 31 deletions(-) diff --git a/drivers/hwmon/pmbus/max20730.c b/drivers/hwmon/pmbus/max20730.c index 6f99085c2c3b..6df4c5b75bdc 100644 --- a/drivers/hwmon/pmbus/max20730.c +++ b/drivers/hwmon/pmbus/max20730.c @@ -114,6 +114,7 @@ static ssize_t max20730_debugfs_read(struct file *file, char __user *buf, const struct pmbus_driver_info *info; const struct max20730_data *data; char tbuf[DEBUG_FS_DATA_MAX] = { 0 }; + char *result = tbuf; u16 val; info = pmbus_get_driver_info(psu->client); @@ -148,13 +149,13 @@ static ssize_t max20730_debugfs_read(struct file *file, char __user *buf, >> MAX20730_MFR_DEVSET1_TSTAT_BIT_POS; if (val == 0) - len = strlcpy(tbuf, "2000\n", DEBUG_FS_DATA_MAX); + result = "2000\n"; else if (val == 1) - len = strlcpy(tbuf, "125\n", DEBUG_FS_DATA_MAX); + result = "125\n"; else if (val == 2) - len = strlcpy(tbuf, "62.5\n", DEBUG_FS_DATA_MAX); + result = "62.5\n"; else - len = strlcpy(tbuf, "32\n", DEBUG_FS_DATA_MAX); + result = "32\n"; break; case MAX20730_DEBUGFS_INTERNAL_GAIN: val = (data->mfr_devset1 & MAX20730_MFR_DEVSET1_RGAIN_MASK) @@ -163,35 +164,35 @@ static ssize_t max20730_debugfs_read(struct file *file, char __user *buf, if (data->id == max20734) { /* AN6209 */ if (val == 0) - len = strlcpy(tbuf, "0.8\n", DEBUG_FS_DATA_MAX); + result = "0.8\n"; else if (val == 1) - len = strlcpy(tbuf, "3.2\n", DEBUG_FS_DATA_MAX); + result = "3.2\n"; else if (val == 2) - len = strlcpy(tbuf, "1.6\n", DEBUG_FS_DATA_MAX); + result = "1.6\n"; else - len = strlcpy(tbuf, "6.4\n", DEBUG_FS_DATA_MAX); + result = "6.4\n"; } else if (data->id == max20730 || data->id == max20710) { /* AN6042 or AN6140 */ if (val == 0) - len = strlcpy(tbuf, "0.9\n", DEBUG_FS_DATA_MAX); + result = "0.9\n"; else if (val == 1) - len = strlcpy(tbuf, "3.6\n", DEBUG_FS_DATA_MAX); + result = "3.6\n"; else if (val == 2) - len = strlcpy(tbuf, "1.8\n", DEBUG_FS_DATA_MAX); + result = "1.8\n"; else - len = strlcpy(tbuf, "7.2\n", DEBUG_FS_DATA_MAX); + result = "7.2\n"; } else if (data->id == max20743) { /* AN6042 */ if (val == 0) - len = strlcpy(tbuf, "0.45\n", DEBUG_FS_DATA_MAX); + result = "0.45\n"; else if (val == 1) - len = strlcpy(tbuf, "1.8\n", DEBUG_FS_DATA_MAX); + result = "1.8\n"; else if (val == 2) - len = strlcpy(tbuf, "0.9\n", DEBUG_FS_DATA_MAX); + result = "0.9\n"; else - len = strlcpy(tbuf, "3.6\n", DEBUG_FS_DATA_MAX); + result = "3.6\n"; } else { - len = strlcpy(tbuf, "Not supported\n", DEBUG_FS_DATA_MAX); + result = "Not supported\n"; } break; case MAX20730_DEBUGFS_BOOT_VOLTAGE: @@ -199,26 +200,26 @@ static ssize_t max20730_debugfs_read(struct file *file, char __user *buf, >> MAX20730_MFR_DEVSET1_VBOOT_BIT_POS; if (val == 0) - len = strlcpy(tbuf, "0.6484\n", DEBUG_FS_DATA_MAX); + result = "0.6484\n"; else if (val == 1) - len = strlcpy(tbuf, "0.8984\n", DEBUG_FS_DATA_MAX); + result = "0.8984\n"; else if (val == 2) - len = strlcpy(tbuf, "1.0\n", DEBUG_FS_DATA_MAX); + result = "1.0\n"; else - len = strlcpy(tbuf, "Invalid\n", DEBUG_FS_DATA_MAX); + result = "Invalid\n"; break; case MAX20730_DEBUGFS_OUT_V_RAMP_RATE: val = (data->mfr_devset2 & MAX20730_MFR_DEVSET2_VRATE) >> MAX20730_MFR_DEVSET2_VRATE_BIT_POS; if (val == 0) - len = strlcpy(tbuf, "4\n", DEBUG_FS_DATA_MAX); + result = "4\n"; else if (val == 1) - len = strlcpy(tbuf, "2\n", DEBUG_FS_DATA_MAX); + result = "2\n"; else if (val == 2) - len = strlcpy(tbuf, "1\n", DEBUG_FS_DATA_MAX); + result = "1\n"; else - len = strlcpy(tbuf, "Invalid\n", DEBUG_FS_DATA_MAX); + result = "Invalid\n"; break; case MAX20730_DEBUGFS_OC_PROTECT_MODE: ret = (data->mfr_devset2 & MAX20730_MFR_DEVSET2_OCPM_MASK) @@ -230,13 +231,13 @@ static ssize_t max20730_debugfs_read(struct file *file, char __user *buf, >> MAX20730_MFR_DEVSET2_SS_BIT_POS; if (val == 0) - len = strlcpy(tbuf, "0.75\n", DEBUG_FS_DATA_MAX); + result = "0.75\n"; else if (val == 1) - len = strlcpy(tbuf, "1.5\n", DEBUG_FS_DATA_MAX); + result = "1.5\n"; else if (val == 2) - len = strlcpy(tbuf, "3\n", DEBUG_FS_DATA_MAX); + result = "3\n"; else - len = strlcpy(tbuf, "6\n", DEBUG_FS_DATA_MAX); + result = "6\n"; break; case MAX20730_DEBUGFS_IMAX: ret = (data->mfr_devset2 & MAX20730_MFR_DEVSET2_IMAX_MASK) @@ -287,10 +288,11 @@ static ssize_t max20730_debugfs_read(struct file *file, char __user *buf, "%d.%d\n", ret / 10000, ret % 10000); break; default: - len = strlcpy(tbuf, "Invalid\n", DEBUG_FS_DATA_MAX); + result = "Invalid\n"; } - return simple_read_from_buffer(buf, count, ppos, tbuf, len); + len = strlen(result); + return simple_read_from_buffer(buf, count, ppos, result, len); } static const struct file_operations max20730_fops = { From 46290c6bc0b102dc30250ded4f359174a384c957 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Tue, 11 Jul 2023 17:21:43 +0200 Subject: [PATCH 554/656] hwmon: (dimmtemp) Support more than 32 DIMMs This patch introduces support for handling more than 32 DIMMs by utilizing bitmap operations. The changes ensure that the driver can handle a higher number of DIMMs efficiently. Signed-off-by: Patrick Rudolph Link: https://lore.kernel.org/r/20230711152144.755177-1-Naresh.Solanki@9elements.com Signed-off-by: Guenter Roeck --- drivers/hwmon/peci/dimmtemp.c | 26 +++++++++++++++----------- 1 file changed, 15 insertions(+), 11 deletions(-) diff --git a/drivers/hwmon/peci/dimmtemp.c b/drivers/hwmon/peci/dimmtemp.c index ed968401f93c..ce89da3937a0 100644 --- a/drivers/hwmon/peci/dimmtemp.c +++ b/drivers/hwmon/peci/dimmtemp.c @@ -219,19 +219,21 @@ static int check_populated_dimms(struct peci_dimmtemp *priv) { int chan_rank_max = priv->gen_info->chan_rank_max; int dimm_idx_max = priv->gen_info->dimm_idx_max; - u32 chan_rank_empty = 0; - u32 dimm_mask = 0; - int chan_rank, dimm_idx, ret; + DECLARE_BITMAP(dimm_mask, DIMM_NUMS_MAX); + DECLARE_BITMAP(chan_rank_empty, CHAN_RANK_MAX); + + int chan_rank, dimm_idx, ret, i; u32 pcs; - BUILD_BUG_ON(BITS_PER_TYPE(chan_rank_empty) < CHAN_RANK_MAX); - BUILD_BUG_ON(BITS_PER_TYPE(dimm_mask) < DIMM_NUMS_MAX); if (chan_rank_max * dimm_idx_max > DIMM_NUMS_MAX) { WARN_ONCE(1, "Unsupported number of DIMMs - chan_rank_max: %d, dimm_idx_max: %d", chan_rank_max, dimm_idx_max); return -EINVAL; } + bitmap_zero(dimm_mask, DIMM_NUMS_MAX); + bitmap_zero(chan_rank_empty, CHAN_RANK_MAX); + for (chan_rank = 0; chan_rank < chan_rank_max; chan_rank++) { ret = peci_pcs_read(priv->peci_dev, PECI_PCS_DDR_DIMM_TEMP, chan_rank, &pcs); if (ret) { @@ -242,7 +244,7 @@ static int check_populated_dimms(struct peci_dimmtemp *priv) * detection to be performed at a later point in time. */ if (ret == -EINVAL) { - chan_rank_empty |= BIT(chan_rank); + bitmap_set(chan_rank_empty, chan_rank, 1); continue; } @@ -251,7 +253,7 @@ static int check_populated_dimms(struct peci_dimmtemp *priv) for (dimm_idx = 0; dimm_idx < dimm_idx_max; dimm_idx++) if (__dimm_temp(pcs, dimm_idx)) - dimm_mask |= BIT(chan_rank * dimm_idx_max + dimm_idx); + bitmap_set(dimm_mask, chan_rank * dimm_idx_max + dimm_idx, 1); } /* @@ -260,7 +262,7 @@ static int check_populated_dimms(struct peci_dimmtemp *priv) * host platform boot. Retrying a couple of times lets us make sure * that the state is persistent. */ - if (chan_rank_empty == GENMASK(chan_rank_max - 1, 0)) { + if (bitmap_full(chan_rank_empty, chan_rank_max)) { if (priv->no_dimm_retry_count < NO_DIMM_RETRY_COUNT_MAX) { priv->no_dimm_retry_count++; @@ -274,14 +276,16 @@ static int check_populated_dimms(struct peci_dimmtemp *priv) * It's possible that memory training is not done yet. In this case we * defer the detection to be performed at a later point in time. */ - if (!dimm_mask) { + if (bitmap_empty(dimm_mask, DIMM_NUMS_MAX)) { priv->no_dimm_retry_count = 0; return -EAGAIN; } - dev_dbg(priv->dev, "Scanned populated DIMMs: %#x\n", dimm_mask); + for_each_set_bit(i, dimm_mask, DIMM_NUMS_MAX) { + dev_dbg(priv->dev, "Found DIMM%#x\n", i); + } - bitmap_from_arr32(priv->dimm_mask, &dimm_mask, DIMM_NUMS_MAX); + bitmap_copy(priv->dimm_mask, dimm_mask, DIMM_NUMS_MAX); return 0; } From c0cf96d7e3f004fac3cc36434eeeb01fa5a38dae Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Tue, 4 Jul 2023 17:43:06 +0800 Subject: [PATCH 555/656] hwmon: (bt1-pvt) Convert to devm_platform_ioremap_resource() Use devm_platform_ioremap_resource() to simplify code. Signed-off-by: Yangtao Li Link: https://lore.kernel.org/r/20230704094306.21933-1-frank.li@vivo.com Signed-off-by: Guenter Roeck --- drivers/hwmon/bt1-pvt.c | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) diff --git a/drivers/hwmon/bt1-pvt.c b/drivers/hwmon/bt1-pvt.c index 8d402a627306..b77ebac2e0ce 100644 --- a/drivers/hwmon/bt1-pvt.c +++ b/drivers/hwmon/bt1-pvt.c @@ -891,15 +891,8 @@ static struct pvt_hwmon *pvt_create_data(struct platform_device *pdev) static int pvt_request_regs(struct pvt_hwmon *pvt) { struct platform_device *pdev = to_platform_device(pvt->dev); - struct resource *res; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) { - dev_err(pvt->dev, "Couldn't find PVT memresource\n"); - return -EINVAL; - } - - pvt->regs = devm_ioremap_resource(pvt->dev, res); + pvt->regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(pvt->regs)) return PTR_ERR(pvt->regs); From 23299bba08dfb7037877edcc430c907f0522c856 Mon Sep 17 00:00:00 2001 From: Ahmad Khalifa Date: Sat, 15 Jul 2023 20:52:44 +0100 Subject: [PATCH 556/656] hwmon: (nct6775) Change labels for nct6799 nct6799d-r and nct6796d-s are very similar and chip_id is only different in the version nibblet. Since both will be detected by the driver anyway due to the chipid mask, they should be labeled together for dmesg msg. Signed-off-by: Ahmad Khalifa Link: https://lore.kernel.org/r/20230715195244.1334723-1-ahmad@khalifa.ws Signed-off-by: Guenter Roeck --- Documentation/hwmon/nct6775.rst | 11 ++++++++++- drivers/hwmon/nct6775-core.c | 3 ++- drivers/hwmon/nct6775-platform.c | 2 +- 3 files changed, 13 insertions(+), 3 deletions(-) diff --git a/Documentation/hwmon/nct6775.rst b/Documentation/hwmon/nct6775.rst index 5ba8276aad4b..9d7a10de61a7 100644 --- a/Documentation/hwmon/nct6775.rst +++ b/Documentation/hwmon/nct6775.rst @@ -80,7 +80,13 @@ Supported chips: Datasheet: Available from Nuvoton upon request + * Nuvoton NCT6796D-S/NCT6799D-R + Prefix: 'nct6799' + + Addresses scanned: ISA address retrieved from Super I/O registers + + Datasheet: Available from Nuvoton upon request Authors: @@ -277,4 +283,7 @@ will not reflect a usable value. It often reports unreasonably high temperatures, and in some cases the reported temperature declines if the actual temperature increases (similar to the raw PECI temperature value - see PECI specification for details). CPUTIN should therefore be ignored on ASUS -boards. The CPU temperature on ASUS boards is reported from PECI 0. +boards. The CPU temperature on ASUS boards is reported from PECI 0 or TSI 0. + +NCT6796D-S and NCT6799D-R chips are very similar and their chip_id indicates +they are different versions. This driver treats them the same way. diff --git a/drivers/hwmon/nct6775-core.c b/drivers/hwmon/nct6775-core.c index 08ce4984151d..e0d1770806b7 100644 --- a/drivers/hwmon/nct6775-core.c +++ b/drivers/hwmon/nct6775-core.c @@ -33,7 +33,8 @@ * (0xd451) * nct6798d 14 7 7 2+6 0xd428 0xc1 0x5ca3 * (0xd429) - * nct6799d 14 7 7 2+6 0xd802 0xc1 0x5ca3 + * nct6796d-s 18 7 7 6+2 0xd801 0xc1 0x5ca3 + * nct6799d-r 18 7 7 6+2 0xd802 0xc1 0x5ca3 * * #temp lists the number of monitored temperature sources (first value) plus * the number of directly connectable temperature sensors (second value). diff --git a/drivers/hwmon/nct6775-platform.c b/drivers/hwmon/nct6775-platform.c index a409d7a0b813..81bf03dad6bb 100644 --- a/drivers/hwmon/nct6775-platform.c +++ b/drivers/hwmon/nct6775-platform.c @@ -35,7 +35,7 @@ static const char * const nct6775_sio_names[] __initconst = { "NCT6796D", "NCT6797D", "NCT6798D", - "NCT6799D", + "NCT6796D-S/NCT6799D-R", }; static unsigned short force_id; From b3af14c4c2841343584b61c49b0cfb8808764239 Mon Sep 17 00:00:00 2001 From: Guenter Roeck Date: Sun, 16 Jul 2023 08:39:41 -0700 Subject: [PATCH 557/656] hwmon: Remove smm665 driver SMM665 and related chips are power controller/sequencer chips from Summit Microelectronics. The company was acquired by Qualcomm in 2012, and support for the chip series stopped. The chips are long since gone from active use, making the driver unsupportable and just consuming space and compile time. Remove it. Signed-off-by: Guenter Roeck --- Documentation/hwmon/index.rst | 1 - Documentation/hwmon/smm665.rst | 187 --------- MAINTAINERS | 7 - drivers/hwmon/Kconfig | 14 - drivers/hwmon/Makefile | 1 - drivers/hwmon/smm665.c | 706 --------------------------------- 6 files changed, 916 deletions(-) delete mode 100644 Documentation/hwmon/smm665.rst delete mode 100644 drivers/hwmon/smm665.c diff --git a/Documentation/hwmon/index.rst b/Documentation/hwmon/index.rst index 042e1cf9501b..d11924667f76 100644 --- a/Documentation/hwmon/index.rst +++ b/Documentation/hwmon/index.rst @@ -195,7 +195,6 @@ Hardware Monitoring Kernel Drivers shtc1 sis5595 sl28cpld - smm665 smpro-hwmon smsc47b397 smsc47m192 diff --git a/Documentation/hwmon/smm665.rst b/Documentation/hwmon/smm665.rst deleted file mode 100644 index 481e69d8bf39..000000000000 --- a/Documentation/hwmon/smm665.rst +++ /dev/null @@ -1,187 +0,0 @@ -Kernel driver smm665 -==================== - -Supported chips: - - * Summit Microelectronics SMM465 - - Prefix: 'smm465' - - Addresses scanned: - - - Datasheet: - - http://www.summitmicro.com/prod_select/summary/SMM465/SMM465DS.pdf - - * Summit Microelectronics SMM665, SMM665B - - Prefix: 'smm665' - - Addresses scanned: - - - Datasheet: - - http://www.summitmicro.com/prod_select/summary/SMM665/SMM665B_2089_20.pdf - - * Summit Microelectronics SMM665C - - Prefix: 'smm665c' - - Addresses scanned: - - - Datasheet: - - http://www.summitmicro.com/prod_select/summary/SMM665C/SMM665C_2125.pdf - - * Summit Microelectronics SMM764 - - Prefix: 'smm764' - - Addresses scanned: - - - Datasheet: - - http://www.summitmicro.com/prod_select/summary/SMM764/SMM764_2098.pdf - - * Summit Microelectronics SMM766, SMM766B - - Prefix: 'smm766' - - Addresses scanned: - - - Datasheets: - - http://www.summitmicro.com/prod_select/summary/SMM766/SMM766_2086.pdf - - http://www.summitmicro.com/prod_select/summary/SMM766B/SMM766B_2122.pdf - -Author: Guenter Roeck - - -Module Parameters ------------------ - -* vref: int - Default: 1250 (mV) - - Reference voltage on VREF_ADC pin in mV. It should not be necessary to set - this parameter unless a non-default reference voltage is used. - - -Description ------------ - -[From datasheet] The SMM665 is an Active DC Output power supply Controller -that monitors, margins and cascade sequences power. The part monitors six -power supply channels as well as VDD, 12V input, two general-purpose analog -inputs and an internal temperature sensor using a 10-bit ADC. - -Each monitored channel has its own high and low limits, plus a critical -limit. - -Support for SMM465, SMM764, and SMM766 has been implemented but is untested. - - -Usage Notes ------------ - -This driver does not probe for devices, since there is no register which -can be safely used to identify the chip. You will have to instantiate -the devices explicitly. When instantiating the device, you have to specify -its configuration register address. - -Example: the following will load the driver for an SMM665 at address 0x57 -on I2C bus #1:: - - $ modprobe smm665 - $ echo smm665 0x57 > /sys/bus/i2c/devices/i2c-1/new_device - - -Sysfs entries -------------- - -This driver uses the values in the datasheet to convert ADC register values -into the values specified in the sysfs-interface document. All attributes are -read only. - -Min, max, lcrit, and crit values are used by the chip to trigger external signals -and/or other activity. Triggered signals can include HEALTHY, RST, Power Off, -or Fault depending on the chip configuration. The driver reports values as lcrit -or crit if exceeding the limits triggers RST, Power Off, or Fault, and as min or -max otherwise. For details please see the SMM665 datasheet. - -For SMM465 and SMM764, values for Channel E and F are reported but undefined. - -======================= ======================================================= -in1_input 12V input voltage (mV) -in2_input 3.3V (VDD) input voltage (mV) -in3_input Channel A voltage (mV) -in4_input Channel B voltage (mV) -in5_input Channel C voltage (mV) -in6_input Channel D voltage (mV) -in7_input Channel E voltage (mV) -in8_input Channel F voltage (mV) -in9_input AIN1 voltage (mV) -in10_input AIN2 voltage (mV) - -in1_min 12v input minimum voltage (mV) -in2_min 3.3V (VDD) input minimum voltage (mV) -in3_min Channel A minimum voltage (mV) -in4_min Channel B minimum voltage (mV) -in5_min Channel C minimum voltage (mV) -in6_min Channel D minimum voltage (mV) -in7_min Channel E minimum voltage (mV) -in8_min Channel F minimum voltage (mV) -in9_min AIN1 minimum voltage (mV) -in10_min AIN2 minimum voltage (mV) - -in1_max 12v input maximum voltage (mV) -in2_max 3.3V (VDD) input maximum voltage (mV) -in3_max Channel A maximum voltage (mV) -in4_max Channel B maximum voltage (mV) -in5_max Channel C maximum voltage (mV) -in6_max Channel D maximum voltage (mV) -in7_max Channel E maximum voltage (mV) -in8_max Channel F maximum voltage (mV) -in9_max AIN1 maximum voltage (mV) -in10_max AIN2 maximum voltage (mV) - -in1_lcrit 12v input critical minimum voltage (mV) -in2_lcrit 3.3V (VDD) input critical minimum voltage (mV) -in3_lcrit Channel A critical minimum voltage (mV) -in4_lcrit Channel B critical minimum voltage (mV) -in5_lcrit Channel C critical minimum voltage (mV) -in6_lcrit Channel D critical minimum voltage (mV) -in7_lcrit Channel E critical minimum voltage (mV) -in8_lcrit Channel F critical minimum voltage (mV) -in9_lcrit AIN1 critical minimum voltage (mV) -in10_lcrit AIN2 critical minimum voltage (mV) - -in1_crit 12v input critical maximum voltage (mV) -in2_crit 3.3V (VDD) input critical maximum voltage (mV) -in3_crit Channel A critical maximum voltage (mV) -in4_crit Channel B critical maximum voltage (mV) -in5_crit Channel C critical maximum voltage (mV) -in6_crit Channel D critical maximum voltage (mV) -in7_crit Channel E critical maximum voltage (mV) -in8_crit Channel F critical maximum voltage (mV) -in9_crit AIN1 critical maximum voltage (mV) -in10_crit AIN2 critical maximum voltage (mV) - -in1_crit_alarm 12v input critical alarm -in2_crit_alarm 3.3V (VDD) input critical alarm -in3_crit_alarm Channel A critical alarm -in4_crit_alarm Channel B critical alarm -in5_crit_alarm Channel C critical alarm -in6_crit_alarm Channel D critical alarm -in7_crit_alarm Channel E critical alarm -in8_crit_alarm Channel F critical alarm -in9_crit_alarm AIN1 critical alarm -in10_crit_alarm AIN2 critical alarm - -temp1_input Chip temperature -temp1_min Minimum chip temperature -temp1_max Maximum chip temperature -temp1_crit Critical chip temperature -temp1_crit_alarm Temperature critical alarm -======================= ======================================================= diff --git a/MAINTAINERS b/MAINTAINERS index 53b7ca804465..080e39424343 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -19596,13 +19596,6 @@ M: Nicolas Pitre S: Odd Fixes F: drivers/net/ethernet/smsc/smc91x.* -SMM665 HARDWARE MONITOR DRIVER -M: Guenter Roeck -L: linux-hwmon@vger.kernel.org -S: Maintained -F: Documentation/hwmon/smm665.rst -F: drivers/hwmon/smm665.c - SMSC EMC2103 HARDWARE MONITOR DRIVER M: Steve Glendinning L: linux-hwmon@vger.kernel.org diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig index 307477b8a371..2913299c2c9e 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig @@ -1951,20 +1951,6 @@ config SENSORS_SFCTEMP This driver can also be built as a module. If so, the module will be called sfctemp. -config SENSORS_SMM665 - tristate "Summit Microelectronics SMM665" - depends on I2C - help - If you say yes here you get support for the hardware monitoring - features of the Summit Microelectronics SMM665/SMM665B Six-Channel - Active DC Output Controller / Monitor. - - Other supported chips are SMM465, SMM665C, SMM764, and SMM766. - Support for those chips is untested. - - This driver can also be built as a module. If so, the module will - be called smm665. - config SENSORS_ADC128D818 tristate "Texas Instruments ADC128D818" depends on I2C diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile index 3f4b0fda0998..ff6bfd109c72 100644 --- a/drivers/hwmon/Makefile +++ b/drivers/hwmon/Makefile @@ -191,7 +191,6 @@ obj-$(CONFIG_SENSORS_SHT3x) += sht3x.o obj-$(CONFIG_SENSORS_SHT4x) += sht4x.o obj-$(CONFIG_SENSORS_SHTC1) += shtc1.o obj-$(CONFIG_SENSORS_SIS5595) += sis5595.o -obj-$(CONFIG_SENSORS_SMM665) += smm665.o obj-$(CONFIG_SENSORS_SMPRO) += smpro-hwmon.o obj-$(CONFIG_SENSORS_SMSC47B397)+= smsc47b397.o obj-$(CONFIG_SENSORS_SMSC47M1) += smsc47m1.o diff --git a/drivers/hwmon/smm665.c b/drivers/hwmon/smm665.c deleted file mode 100644 index 026c76f8c22e..000000000000 --- a/drivers/hwmon/smm665.c +++ /dev/null @@ -1,706 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Driver for SMM665 Power Controller / Monitor - * - * Copyright (C) 2010 Ericsson AB. - * - * This driver should also work for SMM465, SMM764, and SMM766, but is untested - * for those chips. Only monitoring functionality is implemented. - * - * Datasheets: - * http://www.summitmicro.com/prod_select/summary/SMM665/SMM665B_2089_20.pdf - * http://www.summitmicro.com/prod_select/summary/SMM766B/SMM766B_2122.pdf - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -/* Internal reference voltage (VREF, x 1000 */ -#define SMM665_VREF_ADC_X1000 1250 - -/* module parameters */ -static int vref = SMM665_VREF_ADC_X1000; -module_param(vref, int, 0); -MODULE_PARM_DESC(vref, "Reference voltage in mV"); - -enum chips { smm465, smm665, smm665c, smm764, smm766 }; - -/* - * ADC channel addresses - */ -#define SMM665_MISC16_ADC_DATA_A 0x00 -#define SMM665_MISC16_ADC_DATA_B 0x01 -#define SMM665_MISC16_ADC_DATA_C 0x02 -#define SMM665_MISC16_ADC_DATA_D 0x03 -#define SMM665_MISC16_ADC_DATA_E 0x04 -#define SMM665_MISC16_ADC_DATA_F 0x05 -#define SMM665_MISC16_ADC_DATA_VDD 0x06 -#define SMM665_MISC16_ADC_DATA_12V 0x07 -#define SMM665_MISC16_ADC_DATA_INT_TEMP 0x08 -#define SMM665_MISC16_ADC_DATA_AIN1 0x09 -#define SMM665_MISC16_ADC_DATA_AIN2 0x0a - -/* - * Command registers - */ -#define SMM665_MISC8_CMD_STS 0x80 -#define SMM665_MISC8_STATUS1 0x81 -#define SMM665_MISC8_STATUSS2 0x82 -#define SMM665_MISC8_IO_POLARITY 0x83 -#define SMM665_MISC8_PUP_POLARITY 0x84 -#define SMM665_MISC8_ADOC_STATUS1 0x85 -#define SMM665_MISC8_ADOC_STATUS2 0x86 -#define SMM665_MISC8_WRITE_PROT 0x87 -#define SMM665_MISC8_STS_TRACK 0x88 - -/* - * Configuration registers and register groups - */ -#define SMM665_ADOC_ENABLE 0x0d -#define SMM665_LIMIT_BASE 0x80 /* First limit register */ - -/* - * Limit register bit masks - */ -#define SMM665_TRIGGER_RST 0x8000 -#define SMM665_TRIGGER_HEALTHY 0x4000 -#define SMM665_TRIGGER_POWEROFF 0x2000 -#define SMM665_TRIGGER_SHUTDOWN 0x1000 -#define SMM665_ADC_MASK 0x03ff - -#define smm665_is_critical(lim) ((lim) & (SMM665_TRIGGER_RST \ - | SMM665_TRIGGER_POWEROFF \ - | SMM665_TRIGGER_SHUTDOWN)) -/* - * Fault register bit definitions - * Values are merged from status registers 1/2, - * with status register 1 providing the upper 8 bits. - */ -#define SMM665_FAULT_A 0x0001 -#define SMM665_FAULT_B 0x0002 -#define SMM665_FAULT_C 0x0004 -#define SMM665_FAULT_D 0x0008 -#define SMM665_FAULT_E 0x0010 -#define SMM665_FAULT_F 0x0020 -#define SMM665_FAULT_VDD 0x0040 -#define SMM665_FAULT_12V 0x0080 -#define SMM665_FAULT_TEMP 0x0100 -#define SMM665_FAULT_AIN1 0x0200 -#define SMM665_FAULT_AIN2 0x0400 - -/* - * I2C Register addresses - * - * The configuration register needs to be the configured base register. - * The command/status register address is derived from it. - */ -#define SMM665_REGMASK 0x78 -#define SMM665_CMDREG_BASE 0x48 -#define SMM665_CONFREG_BASE 0x50 - -/* - * Equations given by chip manufacturer to calculate voltage/temperature values - * vref = Reference voltage on VREF_ADC pin (module parameter) - * adc = 10bit ADC value read back from registers - */ - -/* Voltage A-F and VDD */ -#define SMM665_VMON_ADC_TO_VOLTS(adc) ((adc) * vref / 256) - -/* Voltage 12VIN */ -#define SMM665_12VIN_ADC_TO_VOLTS(adc) ((adc) * vref * 3 / 256) - -/* Voltage AIN1, AIN2 */ -#define SMM665_AIN_ADC_TO_VOLTS(adc) ((adc) * vref / 512) - -/* Temp Sensor */ -#define SMM665_TEMP_ADC_TO_CELSIUS(adc) (((adc) <= 511) ? \ - ((int)(adc) * 1000 / 4) : \ - (((int)(adc) - 0x400) * 1000 / 4)) - -#define SMM665_NUM_ADC 11 - -/* - * Chip dependent ADC conversion time, in uS - */ -#define SMM665_ADC_WAIT_SMM665 70 -#define SMM665_ADC_WAIT_SMM766 185 - -struct smm665_data { - enum chips type; - int conversion_time; /* ADC conversion time */ - struct i2c_client *client; - struct mutex update_lock; - bool valid; - unsigned long last_updated; /* in jiffies */ - u16 adc[SMM665_NUM_ADC]; /* adc values (raw) */ - u16 faults; /* fault status */ - /* The following values are in mV */ - int critical_min_limit[SMM665_NUM_ADC]; - int alarm_min_limit[SMM665_NUM_ADC]; - int critical_max_limit[SMM665_NUM_ADC]; - int alarm_max_limit[SMM665_NUM_ADC]; - struct i2c_client *cmdreg; -}; - -/* - * smm665_read16() - * - * Read 16 bit value from , . Upper 8 bits are in . - */ -static int smm665_read16(struct i2c_client *client, int reg) -{ - int rv, val; - - rv = i2c_smbus_read_byte_data(client, reg); - if (rv < 0) - return rv; - val = rv << 8; - rv = i2c_smbus_read_byte_data(client, reg + 1); - if (rv < 0) - return rv; - val |= rv; - return val; -} - -/* - * Read adc value. - */ -static int smm665_read_adc(struct smm665_data *data, int adc) -{ - struct i2c_client *client = data->cmdreg; - int rv; - int radc; - - /* - * Algorithm for reading ADC, per SMM665 datasheet - * - * {[S][addr][W][Ack]} {[offset][Ack]} {[S][addr][R][Nack]} - * [wait conversion time] - * {[S][addr][R][Ack]} {[datahi][Ack]} {[datalo][Ack][P]} - * - * To implement the first part of this exchange, - * do a full read transaction and expect a failure/Nack. - * This sets up the address pointer on the SMM665 - * and starts the ADC conversion. - * Then do a two-byte read transaction. - */ - rv = i2c_smbus_read_byte_data(client, adc << 3); - if (rv != -ENXIO) { - /* - * We expect ENXIO to reflect NACK - * (per Documentation/i2c/fault-codes.rst). - * Everything else is an error. - */ - dev_dbg(&client->dev, - "Unexpected return code %d when setting ADC index", rv); - return (rv < 0) ? rv : -EIO; - } - - udelay(data->conversion_time); - - /* - * Now read two bytes. - * - * Neither i2c_smbus_read_byte() nor - * i2c_smbus_read_block_data() worked here, - * so use i2c_smbus_read_word_swapped() instead. - * We could also try to use i2c_master_recv(), - * but that is not always supported. - */ - rv = i2c_smbus_read_word_swapped(client, 0); - if (rv < 0) { - dev_dbg(&client->dev, "Failed to read ADC value: error %d", rv); - return rv; - } - /* - * Validate/verify readback adc channel (in bit 11..14). - */ - radc = (rv >> 11) & 0x0f; - if (radc != adc) { - dev_dbg(&client->dev, "Unexpected RADC: Expected %d got %d", - adc, radc); - return -EIO; - } - - return rv & SMM665_ADC_MASK; -} - -static struct smm665_data *smm665_update_device(struct device *dev) -{ - struct smm665_data *data = dev_get_drvdata(dev); - struct i2c_client *client = data->client; - struct smm665_data *ret = data; - - mutex_lock(&data->update_lock); - - if (time_after(jiffies, data->last_updated + HZ) || !data->valid) { - int i, val; - - /* - * read status registers - */ - val = smm665_read16(client, SMM665_MISC8_STATUS1); - if (unlikely(val < 0)) { - ret = ERR_PTR(val); - goto abort; - } - data->faults = val; - - /* Read adc registers */ - for (i = 0; i < SMM665_NUM_ADC; i++) { - val = smm665_read_adc(data, i); - if (unlikely(val < 0)) { - ret = ERR_PTR(val); - goto abort; - } - data->adc[i] = val; - } - data->last_updated = jiffies; - data->valid = true; - } -abort: - mutex_unlock(&data->update_lock); - return ret; -} - -/* Return converted value from given adc */ -static int smm665_convert(u16 adcval, int index) -{ - int val = 0; - - switch (index) { - case SMM665_MISC16_ADC_DATA_12V: - val = SMM665_12VIN_ADC_TO_VOLTS(adcval & SMM665_ADC_MASK); - break; - - case SMM665_MISC16_ADC_DATA_VDD: - case SMM665_MISC16_ADC_DATA_A: - case SMM665_MISC16_ADC_DATA_B: - case SMM665_MISC16_ADC_DATA_C: - case SMM665_MISC16_ADC_DATA_D: - case SMM665_MISC16_ADC_DATA_E: - case SMM665_MISC16_ADC_DATA_F: - val = SMM665_VMON_ADC_TO_VOLTS(adcval & SMM665_ADC_MASK); - break; - - case SMM665_MISC16_ADC_DATA_AIN1: - case SMM665_MISC16_ADC_DATA_AIN2: - val = SMM665_AIN_ADC_TO_VOLTS(adcval & SMM665_ADC_MASK); - break; - - case SMM665_MISC16_ADC_DATA_INT_TEMP: - val = SMM665_TEMP_ADC_TO_CELSIUS(adcval & SMM665_ADC_MASK); - break; - - default: - /* If we get here, the developer messed up */ - WARN_ON_ONCE(1); - break; - } - - return val; -} - -static int smm665_get_min(struct device *dev, int index) -{ - struct smm665_data *data = dev_get_drvdata(dev); - - return data->alarm_min_limit[index]; -} - -static int smm665_get_max(struct device *dev, int index) -{ - struct smm665_data *data = dev_get_drvdata(dev); - - return data->alarm_max_limit[index]; -} - -static int smm665_get_lcrit(struct device *dev, int index) -{ - struct smm665_data *data = dev_get_drvdata(dev); - - return data->critical_min_limit[index]; -} - -static int smm665_get_crit(struct device *dev, int index) -{ - struct smm665_data *data = dev_get_drvdata(dev); - - return data->critical_max_limit[index]; -} - -static ssize_t smm665_show_crit_alarm(struct device *dev, - struct device_attribute *da, char *buf) -{ - struct sensor_device_attribute *attr = to_sensor_dev_attr(da); - struct smm665_data *data = smm665_update_device(dev); - int val = 0; - - if (IS_ERR(data)) - return PTR_ERR(data); - - if (data->faults & (1 << attr->index)) - val = 1; - - return sysfs_emit(buf, "%d\n", val); -} - -static ssize_t smm665_show_input(struct device *dev, - struct device_attribute *da, char *buf) -{ - struct sensor_device_attribute *attr = to_sensor_dev_attr(da); - struct smm665_data *data = smm665_update_device(dev); - int adc = attr->index; - int val; - - if (IS_ERR(data)) - return PTR_ERR(data); - - val = smm665_convert(data->adc[adc], adc); - return sysfs_emit(buf, "%d\n", val); -} - -#define SMM665_SHOW(what) \ -static ssize_t smm665_show_##what(struct device *dev, \ - struct device_attribute *da, char *buf) \ -{ \ - struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \ - const int val = smm665_get_##what(dev, attr->index); \ - return snprintf(buf, PAGE_SIZE, "%d\n", val); \ -} - -SMM665_SHOW(min); -SMM665_SHOW(max); -SMM665_SHOW(lcrit); -SMM665_SHOW(crit); - -/* - * These macros are used below in constructing device attribute objects - * for use with sysfs_create_group() to make a sysfs device file - * for each register. - */ - -#define SMM665_ATTR(name, type, cmd_idx) \ - static SENSOR_DEVICE_ATTR(name##_##type, S_IRUGO, \ - smm665_show_##type, NULL, cmd_idx) - -/* Construct a sensor_device_attribute structure for each register */ - -/* Input voltages */ -SMM665_ATTR(in1, input, SMM665_MISC16_ADC_DATA_12V); -SMM665_ATTR(in2, input, SMM665_MISC16_ADC_DATA_VDD); -SMM665_ATTR(in3, input, SMM665_MISC16_ADC_DATA_A); -SMM665_ATTR(in4, input, SMM665_MISC16_ADC_DATA_B); -SMM665_ATTR(in5, input, SMM665_MISC16_ADC_DATA_C); -SMM665_ATTR(in6, input, SMM665_MISC16_ADC_DATA_D); -SMM665_ATTR(in7, input, SMM665_MISC16_ADC_DATA_E); -SMM665_ATTR(in8, input, SMM665_MISC16_ADC_DATA_F); -SMM665_ATTR(in9, input, SMM665_MISC16_ADC_DATA_AIN1); -SMM665_ATTR(in10, input, SMM665_MISC16_ADC_DATA_AIN2); - -/* Input voltages min */ -SMM665_ATTR(in1, min, SMM665_MISC16_ADC_DATA_12V); -SMM665_ATTR(in2, min, SMM665_MISC16_ADC_DATA_VDD); -SMM665_ATTR(in3, min, SMM665_MISC16_ADC_DATA_A); -SMM665_ATTR(in4, min, SMM665_MISC16_ADC_DATA_B); -SMM665_ATTR(in5, min, SMM665_MISC16_ADC_DATA_C); -SMM665_ATTR(in6, min, SMM665_MISC16_ADC_DATA_D); -SMM665_ATTR(in7, min, SMM665_MISC16_ADC_DATA_E); -SMM665_ATTR(in8, min, SMM665_MISC16_ADC_DATA_F); -SMM665_ATTR(in9, min, SMM665_MISC16_ADC_DATA_AIN1); -SMM665_ATTR(in10, min, SMM665_MISC16_ADC_DATA_AIN2); - -/* Input voltages max */ -SMM665_ATTR(in1, max, SMM665_MISC16_ADC_DATA_12V); -SMM665_ATTR(in2, max, SMM665_MISC16_ADC_DATA_VDD); -SMM665_ATTR(in3, max, SMM665_MISC16_ADC_DATA_A); -SMM665_ATTR(in4, max, SMM665_MISC16_ADC_DATA_B); -SMM665_ATTR(in5, max, SMM665_MISC16_ADC_DATA_C); -SMM665_ATTR(in6, max, SMM665_MISC16_ADC_DATA_D); -SMM665_ATTR(in7, max, SMM665_MISC16_ADC_DATA_E); -SMM665_ATTR(in8, max, SMM665_MISC16_ADC_DATA_F); -SMM665_ATTR(in9, max, SMM665_MISC16_ADC_DATA_AIN1); -SMM665_ATTR(in10, max, SMM665_MISC16_ADC_DATA_AIN2); - -/* Input voltages lcrit */ -SMM665_ATTR(in1, lcrit, SMM665_MISC16_ADC_DATA_12V); -SMM665_ATTR(in2, lcrit, SMM665_MISC16_ADC_DATA_VDD); -SMM665_ATTR(in3, lcrit, SMM665_MISC16_ADC_DATA_A); -SMM665_ATTR(in4, lcrit, SMM665_MISC16_ADC_DATA_B); -SMM665_ATTR(in5, lcrit, SMM665_MISC16_ADC_DATA_C); -SMM665_ATTR(in6, lcrit, SMM665_MISC16_ADC_DATA_D); -SMM665_ATTR(in7, lcrit, SMM665_MISC16_ADC_DATA_E); -SMM665_ATTR(in8, lcrit, SMM665_MISC16_ADC_DATA_F); -SMM665_ATTR(in9, lcrit, SMM665_MISC16_ADC_DATA_AIN1); -SMM665_ATTR(in10, lcrit, SMM665_MISC16_ADC_DATA_AIN2); - -/* Input voltages crit */ -SMM665_ATTR(in1, crit, SMM665_MISC16_ADC_DATA_12V); -SMM665_ATTR(in2, crit, SMM665_MISC16_ADC_DATA_VDD); -SMM665_ATTR(in3, crit, SMM665_MISC16_ADC_DATA_A); -SMM665_ATTR(in4, crit, SMM665_MISC16_ADC_DATA_B); -SMM665_ATTR(in5, crit, SMM665_MISC16_ADC_DATA_C); -SMM665_ATTR(in6, crit, SMM665_MISC16_ADC_DATA_D); -SMM665_ATTR(in7, crit, SMM665_MISC16_ADC_DATA_E); -SMM665_ATTR(in8, crit, SMM665_MISC16_ADC_DATA_F); -SMM665_ATTR(in9, crit, SMM665_MISC16_ADC_DATA_AIN1); -SMM665_ATTR(in10, crit, SMM665_MISC16_ADC_DATA_AIN2); - -/* critical alarms */ -SMM665_ATTR(in1, crit_alarm, SMM665_FAULT_12V); -SMM665_ATTR(in2, crit_alarm, SMM665_FAULT_VDD); -SMM665_ATTR(in3, crit_alarm, SMM665_FAULT_A); -SMM665_ATTR(in4, crit_alarm, SMM665_FAULT_B); -SMM665_ATTR(in5, crit_alarm, SMM665_FAULT_C); -SMM665_ATTR(in6, crit_alarm, SMM665_FAULT_D); -SMM665_ATTR(in7, crit_alarm, SMM665_FAULT_E); -SMM665_ATTR(in8, crit_alarm, SMM665_FAULT_F); -SMM665_ATTR(in9, crit_alarm, SMM665_FAULT_AIN1); -SMM665_ATTR(in10, crit_alarm, SMM665_FAULT_AIN2); - -/* Temperature */ -SMM665_ATTR(temp1, input, SMM665_MISC16_ADC_DATA_INT_TEMP); -SMM665_ATTR(temp1, min, SMM665_MISC16_ADC_DATA_INT_TEMP); -SMM665_ATTR(temp1, max, SMM665_MISC16_ADC_DATA_INT_TEMP); -SMM665_ATTR(temp1, lcrit, SMM665_MISC16_ADC_DATA_INT_TEMP); -SMM665_ATTR(temp1, crit, SMM665_MISC16_ADC_DATA_INT_TEMP); -SMM665_ATTR(temp1, crit_alarm, SMM665_FAULT_TEMP); - -/* - * Finally, construct an array of pointers to members of the above objects, - * as required for sysfs_create_group() - */ -static struct attribute *smm665_attrs[] = { - &sensor_dev_attr_in1_input.dev_attr.attr, - &sensor_dev_attr_in1_min.dev_attr.attr, - &sensor_dev_attr_in1_max.dev_attr.attr, - &sensor_dev_attr_in1_lcrit.dev_attr.attr, - &sensor_dev_attr_in1_crit.dev_attr.attr, - &sensor_dev_attr_in1_crit_alarm.dev_attr.attr, - - &sensor_dev_attr_in2_input.dev_attr.attr, - &sensor_dev_attr_in2_min.dev_attr.attr, - &sensor_dev_attr_in2_max.dev_attr.attr, - &sensor_dev_attr_in2_lcrit.dev_attr.attr, - &sensor_dev_attr_in2_crit.dev_attr.attr, - &sensor_dev_attr_in2_crit_alarm.dev_attr.attr, - - &sensor_dev_attr_in3_input.dev_attr.attr, - &sensor_dev_attr_in3_min.dev_attr.attr, - &sensor_dev_attr_in3_max.dev_attr.attr, - &sensor_dev_attr_in3_lcrit.dev_attr.attr, - &sensor_dev_attr_in3_crit.dev_attr.attr, - &sensor_dev_attr_in3_crit_alarm.dev_attr.attr, - - &sensor_dev_attr_in4_input.dev_attr.attr, - &sensor_dev_attr_in4_min.dev_attr.attr, - &sensor_dev_attr_in4_max.dev_attr.attr, - &sensor_dev_attr_in4_lcrit.dev_attr.attr, - &sensor_dev_attr_in4_crit.dev_attr.attr, - &sensor_dev_attr_in4_crit_alarm.dev_attr.attr, - - &sensor_dev_attr_in5_input.dev_attr.attr, - &sensor_dev_attr_in5_min.dev_attr.attr, - &sensor_dev_attr_in5_max.dev_attr.attr, - &sensor_dev_attr_in5_lcrit.dev_attr.attr, - &sensor_dev_attr_in5_crit.dev_attr.attr, - &sensor_dev_attr_in5_crit_alarm.dev_attr.attr, - - &sensor_dev_attr_in6_input.dev_attr.attr, - &sensor_dev_attr_in6_min.dev_attr.attr, - &sensor_dev_attr_in6_max.dev_attr.attr, - &sensor_dev_attr_in6_lcrit.dev_attr.attr, - &sensor_dev_attr_in6_crit.dev_attr.attr, - &sensor_dev_attr_in6_crit_alarm.dev_attr.attr, - - &sensor_dev_attr_in7_input.dev_attr.attr, - &sensor_dev_attr_in7_min.dev_attr.attr, - &sensor_dev_attr_in7_max.dev_attr.attr, - &sensor_dev_attr_in7_lcrit.dev_attr.attr, - &sensor_dev_attr_in7_crit.dev_attr.attr, - &sensor_dev_attr_in7_crit_alarm.dev_attr.attr, - - &sensor_dev_attr_in8_input.dev_attr.attr, - &sensor_dev_attr_in8_min.dev_attr.attr, - &sensor_dev_attr_in8_max.dev_attr.attr, - &sensor_dev_attr_in8_lcrit.dev_attr.attr, - &sensor_dev_attr_in8_crit.dev_attr.attr, - &sensor_dev_attr_in8_crit_alarm.dev_attr.attr, - - &sensor_dev_attr_in9_input.dev_attr.attr, - &sensor_dev_attr_in9_min.dev_attr.attr, - &sensor_dev_attr_in9_max.dev_attr.attr, - &sensor_dev_attr_in9_lcrit.dev_attr.attr, - &sensor_dev_attr_in9_crit.dev_attr.attr, - &sensor_dev_attr_in9_crit_alarm.dev_attr.attr, - - &sensor_dev_attr_in10_input.dev_attr.attr, - &sensor_dev_attr_in10_min.dev_attr.attr, - &sensor_dev_attr_in10_max.dev_attr.attr, - &sensor_dev_attr_in10_lcrit.dev_attr.attr, - &sensor_dev_attr_in10_crit.dev_attr.attr, - &sensor_dev_attr_in10_crit_alarm.dev_attr.attr, - - &sensor_dev_attr_temp1_input.dev_attr.attr, - &sensor_dev_attr_temp1_min.dev_attr.attr, - &sensor_dev_attr_temp1_max.dev_attr.attr, - &sensor_dev_attr_temp1_lcrit.dev_attr.attr, - &sensor_dev_attr_temp1_crit.dev_attr.attr, - &sensor_dev_attr_temp1_crit_alarm.dev_attr.attr, - - NULL, -}; - -ATTRIBUTE_GROUPS(smm665); - -static const struct i2c_device_id smm665_id[]; - -static int smm665_probe(struct i2c_client *client) -{ - struct i2c_adapter *adapter = client->adapter; - struct smm665_data *data; - struct device *hwmon_dev; - int i, ret; - - if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA - | I2C_FUNC_SMBUS_WORD_DATA)) - return -ENODEV; - - if (i2c_smbus_read_byte_data(client, SMM665_ADOC_ENABLE) < 0) - return -ENODEV; - - data = devm_kzalloc(&client->dev, sizeof(*data), GFP_KERNEL); - if (!data) - return -ENOMEM; - - i2c_set_clientdata(client, data); - mutex_init(&data->update_lock); - - data->client = client; - data->type = i2c_match_id(smm665_id, client)->driver_data; - data->cmdreg = i2c_new_dummy_device(adapter, (client->addr & ~SMM665_REGMASK) - | SMM665_CMDREG_BASE); - if (IS_ERR(data->cmdreg)) - return PTR_ERR(data->cmdreg); - - switch (data->type) { - case smm465: - case smm665: - data->conversion_time = SMM665_ADC_WAIT_SMM665; - break; - case smm665c: - case smm764: - case smm766: - data->conversion_time = SMM665_ADC_WAIT_SMM766; - break; - } - - ret = -ENODEV; - if (i2c_smbus_read_byte_data(data->cmdreg, SMM665_MISC8_CMD_STS) < 0) - goto out_unregister; - - /* - * Read limits. - * - * Limit registers start with register SMM665_LIMIT_BASE. - * Each channel uses 8 registers, providing four limit values - * per channel. Each limit value requires two registers, with the - * high byte in the first register and the low byte in the second - * register. The first two limits are under limit values, followed - * by two over limit values. - * - * Limit register order matches the ADC register order, so we use - * ADC register defines throughout the code to index limit registers. - * - * We save the first retrieved value both as "critical" and "alarm" - * value. The second value overwrites either the critical or the - * alarm value, depending on its configuration. This ensures that both - * critical and alarm values are initialized, even if both registers are - * configured as critical or non-critical. - */ - for (i = 0; i < SMM665_NUM_ADC; i++) { - int val; - - val = smm665_read16(client, SMM665_LIMIT_BASE + i * 8); - if (unlikely(val < 0)) - goto out_unregister; - data->critical_min_limit[i] = data->alarm_min_limit[i] - = smm665_convert(val, i); - val = smm665_read16(client, SMM665_LIMIT_BASE + i * 8 + 2); - if (unlikely(val < 0)) - goto out_unregister; - if (smm665_is_critical(val)) - data->critical_min_limit[i] = smm665_convert(val, i); - else - data->alarm_min_limit[i] = smm665_convert(val, i); - val = smm665_read16(client, SMM665_LIMIT_BASE + i * 8 + 4); - if (unlikely(val < 0)) - goto out_unregister; - data->critical_max_limit[i] = data->alarm_max_limit[i] - = smm665_convert(val, i); - val = smm665_read16(client, SMM665_LIMIT_BASE + i * 8 + 6); - if (unlikely(val < 0)) - goto out_unregister; - if (smm665_is_critical(val)) - data->critical_max_limit[i] = smm665_convert(val, i); - else - data->alarm_max_limit[i] = smm665_convert(val, i); - } - - hwmon_dev = devm_hwmon_device_register_with_groups(&client->dev, - client->name, data, - smm665_groups); - if (IS_ERR(hwmon_dev)) { - ret = PTR_ERR(hwmon_dev); - goto out_unregister; - } - - return 0; - -out_unregister: - i2c_unregister_device(data->cmdreg); - return ret; -} - -static void smm665_remove(struct i2c_client *client) -{ - struct smm665_data *data = i2c_get_clientdata(client); - - i2c_unregister_device(data->cmdreg); -} - -static const struct i2c_device_id smm665_id[] = { - {"smm465", smm465}, - {"smm665", smm665}, - {"smm665c", smm665c}, - {"smm764", smm764}, - {"smm766", smm766}, - {} -}; - -MODULE_DEVICE_TABLE(i2c, smm665_id); - -/* This is the driver that will be inserted */ -static struct i2c_driver smm665_driver = { - .driver = { - .name = "smm665", - }, - .probe = smm665_probe, - .remove = smm665_remove, - .id_table = smm665_id, -}; - -module_i2c_driver(smm665_driver); - -MODULE_AUTHOR("Guenter Roeck"); -MODULE_DESCRIPTION("SMM665 driver"); -MODULE_LICENSE("GPL"); From 3b7f4bde06daaff391a374fc27c8163b2847de34 Mon Sep 17 00:00:00 2001 From: Ahmad Khalifa Date: Mon, 17 Jul 2023 21:10:51 +0100 Subject: [PATCH 558/656] hwmon: (nct6775) Increase and reorder ALARM/BEEP bits * Increase available bits, IN: 16 to 24, FAN: 8 to 12, TEMP: 6 to 12 * Reorder alarm/beep definitions to match in order to allow additional inputs in the future * Remove comments about 'unused' bits as probe() is a better reference Testing note: * Tested on nct6799 with IN/FAN/TEMP, and changing min/max/high/hyst, that triggers the corresponding alarms correctly. Good confirmation on the original mapping of the registers and masks. As to be expected, only 4 fans and 2 temps (fixed) have limits currently on nct6799 on my board. * Trouble with testing intrusion alarms and beeps, no way to confirm those. As I understand now, intrusion/caseopen is probably not connected on my board. And I haven't seen a buzzer on a board in ages. Signed-off-by: Ahmad Khalifa Link: https://lore.kernel.org/r/20230717201050.1657809-1-ahmad@khalifa.ws Signed-off-by: Guenter Roeck --- drivers/hwmon/nct6775-core.c | 167 +++++++++++++++-------------------- drivers/hwmon/nct6775.h | 23 ++++- 2 files changed, 92 insertions(+), 98 deletions(-) diff --git a/drivers/hwmon/nct6775-core.c b/drivers/hwmon/nct6775-core.c index e0d1770806b7..fa0b7551ebf5 100644 --- a/drivers/hwmon/nct6775-core.c +++ b/drivers/hwmon/nct6775-core.c @@ -98,31 +98,23 @@ static const u16 NCT6775_REG_IN[] = { static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B }; -/* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */ - -static const s8 NCT6775_ALARM_BITS[] = { - 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */ - 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */ - -1, /* unused */ - 6, 7, 11, -1, -1, /* fan1..fan5 */ - -1, -1, -1, /* unused */ - 4, 5, 13, -1, -1, -1, /* temp1..temp6 */ - 12, -1 }; /* intrusion0, intrusion1 */ +static const s8 NCT6775_ALARM_BITS[NUM_ALARM_BITS] = { + 0, 1, 2, 3, 8, 21, 20, 16, 17, -1, -1, -1, /* in0-in11 */ + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ + 6, 7, 11, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ + 4, 5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ + 12, -1, /* intr0-intr1 */ +}; static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e }; -/* - * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures, - * 30..31 intrusion - */ -static const s8 NCT6775_BEEP_BITS[] = { - 0, 1, 2, 3, 8, 9, 10, 16, /* in0.. in7 */ - 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */ - 21, /* global beep enable */ - 6, 7, 11, 28, -1, /* fan1..fan5 */ - -1, -1, -1, /* unused */ - 4, 5, 13, -1, -1, -1, /* temp1..temp6 */ - 12, -1 }; /* intrusion0, intrusion1 */ +static const s8 NCT6775_BEEP_BITS[NUM_BEEP_BITS] = { + 0, 1, 2, 3, 8, 9, 10, 16, 17, -1, -1, -1, /* in0-in11 */ + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ + 6, 7, 11, 28, -1, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ + 4, 5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ + 12, -1, 21 /* intr0-intr1, beep_en */ +}; /* DC or PWM output fan configuration */ static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 }; @@ -256,25 +248,23 @@ static const u16 NCT6775_REG_TSI_TEMP[] = { 0x669 }; #define NCT6776_REG_FAN_STEP_UP_TIME NCT6775_REG_FAN_STEP_DOWN_TIME #define NCT6776_REG_FAN_STEP_DOWN_TIME NCT6775_REG_FAN_STEP_UP_TIME -static const s8 NCT6776_ALARM_BITS[] = { - 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */ - 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */ - -1, /* unused */ - 6, 7, 11, 10, 23, /* fan1..fan5 */ - -1, -1, -1, /* unused */ - 4, 5, 13, -1, -1, -1, /* temp1..temp6 */ - 12, 9 }; /* intrusion0, intrusion1 */ +static const s8 NCT6776_ALARM_BITS[NUM_ALARM_BITS] = { + 0, 1, 2, 3, 8, 21, 20, 16, 17, -1, -1, -1, /* in0-in11 */ + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ + 6, 7, 11, 10, 23, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ + 4, 5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ + 12, 9, /* intr0-intr1 */ +}; static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 }; -static const s8 NCT6776_BEEP_BITS[] = { - 0, 1, 2, 3, 4, 5, 6, 7, /* in0.. in7 */ - 8, -1, -1, -1, -1, -1, -1, /* in8..in14 */ - 24, /* global beep enable */ - 25, 26, 27, 28, 29, /* fan1..fan5 */ - -1, -1, -1, /* unused */ - 16, 17, 18, 19, 20, 21, /* temp1..temp6 */ - 30, 31 }; /* intrusion0, intrusion1 */ +static const s8 NCT6776_BEEP_BITS[NUM_BEEP_BITS] = { + 0, 1, 2, 3, 4, 5, 6, 7, 8, -1, -1, -1, /* in0-in11 */ + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ + 25, 26, 27, 28, 29, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ + 16, 17, 18, 19, 20, 21, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ + 30, 31, 24 /* intr0-intr1, beep_en */ +}; static const u16 NCT6776_REG_TOLERANCE_H[] = { 0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c, 0xb0c }; @@ -345,23 +335,21 @@ static const u16 NCT6779_REG_IN[] = { static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B, 0x568 }; -static const s8 NCT6779_ALARM_BITS[] = { - 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */ - 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */ - -1, /* unused */ - 6, 7, 11, 10, 23, /* fan1..fan5 */ - -1, -1, -1, /* unused */ - 4, 5, 13, -1, -1, -1, /* temp1..temp6 */ - 12, 9 }; /* intrusion0, intrusion1 */ +static const s8 NCT6779_ALARM_BITS[NUM_ALARM_BITS] = { + 0, 1, 2, 3, 8, 21, 20, 16, 17, 24, 25, 26, /* in0-in11 */ + 27, 28, 29, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ + 6, 7, 11, 10, 23, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ + 4, 5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ + 12, 9, /* intr0-intr1 */ +}; -static const s8 NCT6779_BEEP_BITS[] = { - 0, 1, 2, 3, 4, 5, 6, 7, /* in0.. in7 */ - 8, 9, 10, 11, 12, 13, 14, /* in8..in14 */ - 24, /* global beep enable */ - 25, 26, 27, 28, 29, /* fan1..fan5 */ - -1, -1, -1, /* unused */ - 16, 17, -1, -1, -1, -1, /* temp1..temp6 */ - 30, 31 }; /* intrusion0, intrusion1 */ +static const s8 NCT6779_BEEP_BITS[NUM_BEEP_BITS] = { + 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, /* in0-in11 */ + 12, 13, 14, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ + 25, 26, 27, 28, 29, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ + 16, 17, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ + 30, 31, 24 /* intr0-intr1, beep_en */ +}; static const u16 NCT6779_REG_FAN[] = { 0x4c0, 0x4c2, 0x4c4, 0x4c6, 0x4c8, 0x4ca, 0x4ce }; @@ -449,14 +437,13 @@ static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[NUM_FAN] = { 0, 0x23e }; static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B, 0x568, 0x45D }; -static const s8 NCT6791_ALARM_BITS[] = { - 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */ - 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */ - -1, /* unused */ - 6, 7, 11, 10, 23, 33, /* fan1..fan6 */ - -1, -1, /* unused */ - 4, 5, 13, -1, -1, -1, /* temp1..temp6 */ - 12, 9 }; /* intrusion0, intrusion1 */ +static const s8 NCT6791_ALARM_BITS[NUM_ALARM_BITS] = { + 0, 1, 2, 3, 8, 21, 20, 16, 17, 24, 25, 26, /* in0-in11 */ + 27, 28, 29, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ + 6, 7, 11, 10, 23, 33, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ + 4, 5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ + 12, 9, /* intr0-intr1 */ +}; /* NCT6792/NCT6793 specific data */ @@ -764,27 +751,23 @@ static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 }; static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = { 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d }; -static const s8 NCT6106_ALARM_BITS[] = { - 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */ - 9, -1, -1, -1, -1, -1, -1, /* in8..in14 */ - -1, /* unused */ - 32, 33, 34, -1, -1, /* fan1..fan5 */ - -1, -1, -1, /* unused */ - 16, 17, 18, 19, 20, 21, /* temp1..temp6 */ - 48, -1 /* intrusion0, intrusion1 */ +static const s8 NCT6106_ALARM_BITS[NUM_ALARM_BITS] = { + 0, 1, 2, 3, 4, 5, 7, 8, 9, -1, -1, -1, /* in0-in11 */ + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ + 32, 33, 34, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ + 16, 17, 18, 19, 20, 21, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ + 48, -1, /* intr0-intr1 */ }; static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = { 0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 }; -static const s8 NCT6106_BEEP_BITS[] = { - 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */ - 9, 10, 11, 12, -1, -1, -1, /* in8..in14 */ - 32, /* global beep enable */ - 24, 25, 26, 27, 28, /* fan1..fan5 */ - -1, -1, -1, /* unused */ - 16, 17, 18, 19, 20, 21, /* temp1..temp6 */ - 34, -1 /* intrusion0, intrusion1 */ +static const s8 NCT6106_BEEP_BITS[NUM_BEEP_BITS] = { + 0, 1, 2, 3, 4, 5, 7, 8, 9, 10, 11, 12, /* in0-in11 */ + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ + 24, 25, 26, 27, 28, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ + 16, 17, 18, 19, 20, 21, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ + 34, -1, 32 /* intr0-intr1, beep_en */ }; static const u16 NCT6106_REG_TEMP_ALTERNATE[32] = { @@ -844,24 +827,20 @@ static const u16 NCT6116_REG_AUTO_TEMP[] = { static const u16 NCT6116_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184, 0x1d4, 0x1e4 }; -static const s8 NCT6116_ALARM_BITS[] = { - 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */ - 9, -1, -1, -1, -1, -1, -1, /* in8..in9 */ - -1, /* unused */ - 32, 33, 34, 35, 36, /* fan1..fan5 */ - -1, -1, -1, /* unused */ - 16, 17, 18, -1, -1, -1, /* temp1..temp6 */ - 48, -1 /* intrusion0, intrusion1 */ +static const s8 NCT6116_ALARM_BITS[NUM_ALARM_BITS] = { + 0, 1, 2, 3, 4, 5, 7, 8, 9, -1, -1, -1, /* in0-in11 */ + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ + 32, 33, 34, 35, 36, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ + 16, 17, 18, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ + 48, -1, /* intr0-intr1 */ }; -static const s8 NCT6116_BEEP_BITS[] = { - 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */ - 9, 10, 11, 12, -1, -1, -1, /* in8..in14 */ - 32, /* global beep enable */ - 24, 25, 26, 27, 28, /* fan1..fan5 */ - -1, -1, -1, /* unused */ - 16, 17, 18, -1, -1, -1, /* temp1..temp6 */ - 34, -1 /* intrusion0, intrusion1 */ +static const s8 NCT6116_BEEP_BITS[NUM_BEEP_BITS] = { + 0, 1, 2, 3, 4, 5, 7, 8, 9, 10, 11, 12, /* in0-in11 */ + -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ + 24, 25, 26, 27, 28, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ + 16, 17, 18, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ + 34, -1, 32 /* intr0-intr1, beep_en */ }; static const u16 NCT6116_REG_TSI_TEMP[] = { 0x59, 0x5b }; diff --git a/drivers/hwmon/nct6775.h b/drivers/hwmon/nct6775.h index a84c6ce7275d..c752bc7bbe72 100644 --- a/drivers/hwmon/nct6775.h +++ b/drivers/hwmon/nct6775.h @@ -239,10 +239,25 @@ nct6775_add_attr_group(struct nct6775_data *data, const struct attribute_group * #define NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE 0x28 -#define FAN_ALARM_BASE 16 -#define TEMP_ALARM_BASE 24 -#define INTRUSION_ALARM_BASE 30 -#define BEEP_ENABLE_BASE 15 +/* + * ALARM_BITS and BEEP_BITS store bit-index for the mask of the registers + * loaded into data->alarm and data->beep. + * + * Every input register (IN/TEMP/FAN) must have a corresponding + * ALARM/BEEP bit at the same index BITS[BASE + index] + * Set value to -1 to disable the visibility of that '*_alarm' attribute and + * to pad the bits until the next BASE + * + * Beep has an additional GLOBAL_BEEP_ENABLE bit + */ +#define VIN_ALARM_BASE 0 +#define FAN_ALARM_BASE 24 +#define TEMP_ALARM_BASE 36 +#define INTRUSION_ALARM_BASE 48 +#define BEEP_ENABLE_BASE 50 + +#define NUM_ALARM_BITS (INTRUSION_ALARM_BASE + 4) +#define NUM_BEEP_BITS (BEEP_ENABLE_BASE + 1) /* * Not currently used: From 49ffb5eefebccf498fb2a45b46ff58d0b255bf97 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Joaqu=C3=ADn=20Ignacio=20Aramend=C3=ADa?= Date: Mon, 17 Jul 2023 19:25:16 -0300 Subject: [PATCH 559/656] hwmon: (oxp-sensors) Move board detection to the init function MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Move detection logic to the start of init() function so we won't instantiate the driver if the board is not compatible. Signed-off-by: Joaquín Ignacio Aramendía Reviewed-by: Greg Kroah-Hartman Link: https://lore.kernel.org/r/20230717222526.229984-3-samsagax@gmail.com Signed-off-by: Guenter Roeck --- drivers/hwmon/oxp-sensors.c | 29 +++++++++++++++-------------- 1 file changed, 15 insertions(+), 14 deletions(-) diff --git a/drivers/hwmon/oxp-sensors.c b/drivers/hwmon/oxp-sensors.c index 1e1cc67bcdea..ea9602063eab 100644 --- a/drivers/hwmon/oxp-sensors.c +++ b/drivers/hwmon/oxp-sensors.c @@ -434,23 +434,9 @@ static const struct hwmon_chip_info oxp_ec_chip_info = { /* Initialization logic */ static int oxp_platform_probe(struct platform_device *pdev) { - const struct dmi_system_id *dmi_entry; struct device *dev = &pdev->dev; struct device *hwdev; - /* - * Have to check for AMD processor here because DMI strings are the - * same between Intel and AMD boards, the only way to tell them apart - * is the CPU. - * Intel boards seem to have different EC registers and values to - * read/write. - */ - dmi_entry = dmi_first_match(dmi_table); - if (!dmi_entry || boot_cpu_data.x86_vendor != X86_VENDOR_AMD) - return -ENODEV; - - board = (enum oxp_board)(unsigned long)dmi_entry->driver_data; - hwdev = devm_hwmon_device_register_with_info(dev, "oxpec", NULL, &oxp_ec_chip_info, NULL); @@ -469,6 +455,21 @@ static struct platform_device *oxp_platform_device; static int __init oxp_platform_init(void) { + const struct dmi_system_id *dmi_entry; + + /* + * Have to check for AMD processor here because DMI strings are the + * same between Intel and AMD boards, the only way to tell them apart + * is the CPU. + * Intel boards seem to have different EC registers and values to + * read/write. + */ + dmi_entry = dmi_first_match(dmi_table); + if (!dmi_entry || boot_cpu_data.x86_vendor != X86_VENDOR_AMD) + return -ENODEV; + + board = (enum oxp_board)(unsigned long)dmi_entry->driver_data; + oxp_platform_device = platform_create_bundle(&oxp_platform_driver, oxp_platform_probe, NULL, 0, NULL, 0); From 4018e0a9c00131d8514015749f45f0578cc59c64 Mon Sep 17 00:00:00 2001 From: Frank Crawford Date: Fri, 7 Jul 2023 22:29:50 +1000 Subject: [PATCH 560/656] hwmon: (it87) Split temperature sensor detection to separate function The temperature sensor type will need to be used in multiple places, so split it out into its own function. Signed-off-by: Frank Crawford Link: https://lore.kernel.org/r/20230707123005.956415-2-frank@crawford.emu.id.au [groeck: Dropped unnecessary 'type' variable in show_temp_type()] Signed-off-by: Guenter Roeck --- drivers/hwmon/it87.c | 47 +++++++++++++++++++++++++++++--------------- 1 file changed, 31 insertions(+), 16 deletions(-) diff --git a/drivers/hwmon/it87.c b/drivers/hwmon/it87.c index 5deff5e5f693..f9703c4e3a9d 100644 --- a/drivers/hwmon/it87.c +++ b/drivers/hwmon/it87.c @@ -1159,28 +1159,43 @@ static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0); static SENSOR_DEVICE_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0); static SENSOR_DEVICE_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0); -static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr, - char *buf) +static int get_temp_type(struct it87_data *data, int index) { - struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); - int nr = sensor_attr->index; - struct it87_data *data = it87_update_device(dev); + /* + * 2 is deprecated; + * 3 = thermal diode; + * 4 = thermistor; + * 5 = AMDTSI; + * 6 = Intel PECI; + * 0 = disabled + */ u8 reg, extra; - - if (IS_ERR(data)) - return PTR_ERR(data); + int type = 0; reg = data->sensor; /* In case value is updated while used */ extra = data->extra; - if ((has_temp_peci(data, nr) && (reg >> 6 == nr + 1)) || - (has_temp_old_peci(data, nr) && (extra & 0x80))) - return sprintf(buf, "6\n"); /* Intel PECI */ - if (reg & (1 << nr)) - return sprintf(buf, "3\n"); /* thermal diode */ - if (reg & (8 << nr)) - return sprintf(buf, "4\n"); /* thermistor */ - return sprintf(buf, "0\n"); /* disabled */ + if ((has_temp_peci(data, index) && (reg >> 6 == index + 1)) || + (has_temp_old_peci(data, index) && (extra & 0x80))) + type = 6; /* Intel PECI */ + else if (reg & BIT(index)) + type = 3; /* thermal diode */ + else if (reg & BIT(index + 3)) + type = 4; /* thermistor */ + + return type; +} + +static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); + struct it87_data *data = it87_update_device(dev); + + if (IS_ERR(data)) + return PTR_ERR(data); + + return sprintf(buf, "%d\n", get_temp_type(data, sensor_attr->index)); } static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr, From 2f60e5932942d923258b37d24d147cb7d765df3d Mon Sep 17 00:00:00 2001 From: Frank Crawford Date: Fri, 7 Jul 2023 22:29:51 +1000 Subject: [PATCH 561/656] hwmon: (it87) Improve temperature reporting support Add test if thermistor sensor type attribute should be visible, i.e. test if the attribute is defined. Signed-off-by: Frank Crawford Link: https://lore.kernel.org/r/20230707123005.956415-3-frank@crawford.emu.id.au [groeck: Dropped unnecessary 'type' variable in it87_temp_is_visible()] Signed-off-by: Guenter Roeck --- drivers/hwmon/it87.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/hwmon/it87.c b/drivers/hwmon/it87.c index f9703c4e3a9d..36cc7a2b56b5 100644 --- a/drivers/hwmon/it87.c +++ b/drivers/hwmon/it87.c @@ -2328,6 +2328,12 @@ static umode_t it87_temp_is_visible(struct kobject *kobj, if (!(data->has_temp & BIT(i))) return 0; + if (a == 3) { + if (get_temp_type(data, i) == 0) + return 0; + return attr->mode; + } + if (a == 5 && !has_temp_offset(data)) return 0; From 6593eac899202eedf328247d6f1818453c1b49ac Mon Sep 17 00:00:00 2001 From: Frank Crawford Date: Fri, 7 Jul 2023 22:29:52 +1000 Subject: [PATCH 562/656] hwmon: (it87) Add support to detect sensor type AMDTSI Add test for sensor type AMDTSI which is available on certain recent chipsets. Signed-off-by: Frank Crawford Link: https://lore.kernel.org/r/20230707123005.956415-4-frank@crawford.emu.id.au Signed-off-by: Guenter Roeck --- drivers/hwmon/it87.c | 35 +++++++++++++++++++++++++++++++---- 1 file changed, 31 insertions(+), 4 deletions(-) diff --git a/drivers/hwmon/it87.c b/drivers/hwmon/it87.c index 36cc7a2b56b5..fbe86cec6055 100644 --- a/drivers/hwmon/it87.c +++ b/drivers/hwmon/it87.c @@ -221,6 +221,10 @@ static bool fix_pwm_polarity; * Super-I/O configuration space. */ #define IT87_REG_VID 0x0a + +/* Interface Selection register on other chips */ +#define IT87_REG_IFSEL 0x0a + /* * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b * for fan divisors. Later IT8712F revisions must use 16-bit tachometer @@ -1170,14 +1174,37 @@ static int get_temp_type(struct it87_data *data, int index) * 0 = disabled */ u8 reg, extra; - int type = 0; + int ttype, type = 0; - reg = data->sensor; /* In case value is updated while used */ - extra = data->extra; + /* Detect PECI vs. AMDTSI */ + ttype = 6; + if ((has_temp_peci(data, index)) || data->type == it8721 || + data->type == it8720) { + extra = it87_read_value(data, IT87_REG_IFSEL); + if ((extra & 0x70) == 0x40) + ttype = 5; + } + + reg = it87_read_value(data, IT87_REG_TEMP_ENABLE); + + /* Per chip special detection */ + switch (data->type) { + case it8622: + if (!(reg & 0xc0) && index == 3) + type = ttype; + break; + default: + break; + } + + if (type || index >= 3) + return type; + + extra = it87_read_value(data, IT87_REG_TEMP_EXTRA); if ((has_temp_peci(data, index) && (reg >> 6 == index + 1)) || (has_temp_old_peci(data, index) && (extra & 0x80))) - type = 6; /* Intel PECI */ + type = ttype; /* Intel PECI or AMDTSI */ else if (reg & BIT(index)) type = 3; /* thermal diode */ else if (reg & BIT(index + 3)) From b4389ee5274535fd22966a188a048624fe700b70 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Fri, 14 Jul 2023 15:51:09 +0200 Subject: [PATCH 563/656] hwmon: (pmbus/mp2975) Fix whitespace error Fix whitespace error reported by checkpatch.pl Signed-off-by: Patrick Rudolph Signed-off-by: Naresh Solanki Link: https://lore.kernel.org/r/20230714135124.2645339-1-Naresh.Solanki@9elements.com Signed-off-by: Guenter Roeck --- drivers/hwmon/pmbus/mp2975.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/hwmon/pmbus/mp2975.c b/drivers/hwmon/pmbus/mp2975.c index 2109b0458a8b..130cfde52e42 100644 --- a/drivers/hwmon/pmbus/mp2975.c +++ b/drivers/hwmon/pmbus/mp2975.c @@ -600,7 +600,7 @@ mp2975_vout_ov_scale_get(struct i2c_client *client, struct mp2975_data *data, if (ret < 0) return ret; thres_dev = ret & MP2975_PRT_THRES_DIV_OV_EN ? MP2975_PROT_DEV_OV_ON : - MP2975_PROT_DEV_OV_OFF; + MP2975_PROT_DEV_OV_OFF; /* Select the gain of remote sense amplifier. */ ret = i2c_smbus_read_word_data(client, PMBUS_VOUT_SCALE_LOOP); From 99a368cfab265a4ecd5643feca5470c6d3c829f2 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Fri, 14 Jul 2023 15:51:10 +0200 Subject: [PATCH 564/656] dt-bindings: trivial-devices: Add MPS MP2971 and MP2973 Add Monolithic Power Systems MP2971 & MP2973 to trivial devices. Signed-off-by: Patrick Rudolph Signed-off-by: Naresh Solanki Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230714135124.2645339-2-Naresh.Solanki@9elements.com Signed-off-by: Guenter Roeck --- Documentation/devicetree/bindings/trivial-devices.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml index ba2bfb547909..6e24c4d25ec3 100644 --- a/Documentation/devicetree/bindings/trivial-devices.yaml +++ b/Documentation/devicetree/bindings/trivial-devices.yaml @@ -119,6 +119,10 @@ properties: - fsl,mpr121 # Monolithic Power Systems Inc. multi-phase controller mp2888 - mps,mp2888 + # Monolithic Power Systems Inc. multi-phase controller mp2971 + - mps,mp2971 + # Monolithic Power Systems Inc. multi-phase controller mp2973 + - mps,mp2973 # Monolithic Power Systems Inc. multi-phase controller mp2975 - mps,mp2975 # Honeywell Humidicon HIH-6130 humidity/temperature sensor From 1f6f34d08a95b953c58e1c7388a787e78d819c83 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Fri, 14 Jul 2023 15:51:11 +0200 Subject: [PATCH 565/656] hwmon: (pmbus/mp2975) Prepare for MP2973 and MP2971 Add support for differntiating between the chips. The following commits will make use of this mechanism. Signed-off-by: Patrick Rudolph Signed-off-by: Naresh Solanki Link: https://lore.kernel.org/r/20230714135124.2645339-3-Naresh.Solanki@9elements.com [groeck: double-cast of_device_get_match_data() to make gcc happy] Signed-off-by: Guenter Roeck --- drivers/hwmon/pmbus/mp2975.c | 27 +++++++++++++++++++-------- 1 file changed, 19 insertions(+), 8 deletions(-) diff --git a/drivers/hwmon/pmbus/mp2975.c b/drivers/hwmon/pmbus/mp2975.c index 130cfde52e42..047f040451ee 100644 --- a/drivers/hwmon/pmbus/mp2975.c +++ b/drivers/hwmon/pmbus/mp2975.c @@ -10,6 +10,7 @@ #include #include #include +#include #include "pmbus.h" /* Vendor specific registers. */ @@ -56,8 +57,13 @@ PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | \ PMBUS_HAVE_POUT | PMBUS_PHASE_VIRTUAL) +enum chips { + mp2975 +}; + struct mp2975_data { struct pmbus_driver_info info; + enum chips chip_id; int vout_scale; int vid_step[MP2975_PAGE_NUM]; int vref[MP2975_PAGE_NUM]; @@ -68,6 +74,13 @@ struct mp2975_data { int curr_sense_gain[MP2975_PAGE_NUM]; }; +static const struct i2c_device_id mp2975_id[] = { + {"mp2975", mp2975}, + {} +}; + +MODULE_DEVICE_TABLE(i2c, mp2975_id); + #define to_mp2975_data(x) container_of(x, struct mp2975_data, info) static int mp2975_read_byte_data(struct i2c_client *client, int page, int reg) @@ -691,6 +704,11 @@ static int mp2975_probe(struct i2c_client *client) if (!data) return -ENOMEM; + if (client->dev.of_node) + data->chip_id = (enum chips)(unsigned long)of_device_get_match_data(&client->dev); + else + data->chip_id = i2c_match_id(mp2975_id, client)->driver_data; + memcpy(&data->info, &mp2975_info, sizeof(*info)); info = &data->info; @@ -739,15 +757,8 @@ static int mp2975_probe(struct i2c_client *client) return pmbus_do_probe(client, info); } -static const struct i2c_device_id mp2975_id[] = { - {"mp2975", 0}, - {} -}; - -MODULE_DEVICE_TABLE(i2c, mp2975_id); - static const struct of_device_id __maybe_unused mp2975_of_match[] = { - {.compatible = "mps,mp2975"}, + {.compatible = "mps,mp2975", .data = (void *)mp2975}, {} }; MODULE_DEVICE_TABLE(of, mp2975_of_match); From 1feb31e810b0634d962920b7c2ccb54d2817ba56 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Fri, 14 Jul 2023 15:51:12 +0200 Subject: [PATCH 566/656] hwmon: (pmbus/mp2975) Simplify VOUT code In order to upstream MP2973/MP2971 simplify the code by removing support for various VOUT formats. The MP2973 and MP2971 supports all PMBUS supported formats for VOUT, while the MP2975 only support DIRECT and VID for VOUT. In DIRECT mode all chips report the voltage in 1mV/LSB. Configure the chip to use DIRECT format for VOUT and drop the code conversion code for other formats. The to be added chips MP2973/MP2971 will be configured to also report VOUT in DIRECT format. The maximum voltage that can be reported in DIRECT format is 32768mV. This is sufficient as the maximum output voltage for VR12/VR13 is 3040 mV. Signed-off-by: Patrick Rudolph Signed-off-by: Naresh Solanki Link: https://lore.kernel.org/r/20230714135124.2645339-4-Naresh.Solanki@9elements.com Signed-off-by: Guenter Roeck --- drivers/hwmon/pmbus/mp2975.c | 60 ++++++------------------------------ 1 file changed, 10 insertions(+), 50 deletions(-) diff --git a/drivers/hwmon/pmbus/mp2975.c b/drivers/hwmon/pmbus/mp2975.c index 047f040451ee..82f9d972762a 100644 --- a/drivers/hwmon/pmbus/mp2975.c +++ b/drivers/hwmon/pmbus/mp2975.c @@ -70,7 +70,6 @@ struct mp2975_data { int vref_off[MP2975_PAGE_NUM]; int vout_max[MP2975_PAGE_NUM]; int vout_ov_fixed[MP2975_PAGE_NUM]; - int vout_format[MP2975_PAGE_NUM]; int curr_sense_gain[MP2975_PAGE_NUM]; }; @@ -83,22 +82,6 @@ MODULE_DEVICE_TABLE(i2c, mp2975_id); #define to_mp2975_data(x) container_of(x, struct mp2975_data, info) -static int mp2975_read_byte_data(struct i2c_client *client, int page, int reg) -{ - switch (reg) { - case PMBUS_VOUT_MODE: - /* - * Enforce VOUT direct format, since device allows to set the - * different formats for the different rails. Conversion from - * VID to direct provided by driver internally, in case it is - * necessary. - */ - return PB_VOUT_MODE_DIRECT; - default: - return -ENODATA; - } -} - static int mp2975_read_word_helper(struct i2c_client *client, int page, int phase, u8 reg, u16 mask) @@ -273,24 +256,6 @@ static int mp2975_read_word_data(struct i2c_client *client, int page, ret = DIV_ROUND_CLOSEST(data->vref[page] * 10 - 50 * (ret + 1) * data->vout_scale, 10); break; - case PMBUS_READ_VOUT: - ret = mp2975_read_word_helper(client, page, phase, reg, - GENMASK(11, 0)); - if (ret < 0) - return ret; - - /* - * READ_VOUT can be provided in VID or direct format. The - * format type is specified by bit 15 of the register - * MP2975_MFR_DC_LOOP_CTRL. The driver enforces VOUT direct - * format, since device allows to set the different formats for - * the different rails and also all VOUT limits registers are - * provided in a direct format. In case format is VID - convert - * to direct. - */ - if (data->vout_format[page] == vid) - ret = mp2975_vid2direct(info->vrm_version[page], ret); - break; case PMBUS_VIRT_READ_POUT_MAX: ret = mp2975_read_word_helper(client, page, phase, MP2975_MFR_READ_POUT_PK, @@ -578,20 +543,20 @@ mp2975_vout_max_get(struct i2c_client *client, struct mp2975_data *data, } static int -mp2975_identify_vout_format(struct i2c_client *client, - struct mp2975_data *data, int page) +mp2975_set_vout_format(struct i2c_client *client, + struct mp2975_data *data, int page) { int ret; ret = i2c_smbus_read_word_data(client, MP2975_MFR_DC_LOOP_CTRL); if (ret < 0) return ret; - - if (ret & MP2975_VOUT_FORMAT) - data->vout_format[page] = vid; - else - data->vout_format[page] = direct; - return 0; + /* Enable DIRECT VOUT format 1mV/LSB */ + if (ret & MP2975_VOUT_FORMAT) { + ret &= ~MP2975_VOUT_FORMAT; + ret = i2c_smbus_write_word_data(client, MP2975_MFR_DC_LOOP_CTRL, ret); + } + return ret; } static int @@ -649,12 +614,8 @@ mp2975_vout_per_rail_config_get(struct i2c_client *client, if (ret < 0) return ret; - /* - * Get VOUT format for READ_VOUT command : VID or direct. - * Pages on same device can be configured with different - * formats. - */ - ret = mp2975_identify_vout_format(client, data, i); + /* Set VOUT format for READ_VOUT command : direct. */ + ret = mp2975_set_vout_format(client, data, i); if (ret < 0) return ret; @@ -689,7 +650,6 @@ static struct pmbus_driver_info mp2975_info = { PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP | PMBUS_HAVE_POUT | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT | PMBUS_PHASE_VIRTUAL, - .read_byte_data = mp2975_read_byte_data, .read_word_data = mp2975_read_word_data, }; From e2c90b481d1de049dba7fbacf176052c49e83a9c Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Fri, 14 Jul 2023 15:51:13 +0200 Subject: [PATCH 567/656] hwmon: (pmbus/mp2975) Make phase count variable In order to add support for MP2973 and MP2971 replace hardcoded phase count for both channels by a variable. Signed-off-by: Patrick Rudolph Signed-off-by: Naresh Solanki Link: https://lore.kernel.org/r/20230714135124.2645339-5-Naresh.Solanki@9elements.com Signed-off-by: Guenter Roeck --- drivers/hwmon/pmbus/mp2975.c | 33 ++++++++++++++++++++------------- 1 file changed, 20 insertions(+), 13 deletions(-) diff --git a/drivers/hwmon/pmbus/mp2975.c b/drivers/hwmon/pmbus/mp2975.c index 82f9d972762a..6a97d46ea5e8 100644 --- a/drivers/hwmon/pmbus/mp2975.c +++ b/drivers/hwmon/pmbus/mp2975.c @@ -61,10 +61,15 @@ enum chips { mp2975 }; +static const int mp2975_max_phases[][MP2975_PAGE_NUM] = { + [mp2975] = { MP2975_MAX_PHASE_RAIL1, MP2975_MAX_PHASE_RAIL2 }, +}; + struct mp2975_data { struct pmbus_driver_info info; enum chips chip_id; int vout_scale; + int max_phases[MP2975_PAGE_NUM]; int vid_step[MP2975_PAGE_NUM]; int vref[MP2975_PAGE_NUM]; int vref_off[MP2975_PAGE_NUM]; @@ -304,25 +309,25 @@ static int mp2975_read_word_data(struct i2c_client *client, int page, return ret; } -static int mp2975_identify_multiphase_rail2(struct i2c_client *client) +static int mp2975_identify_multiphase_rail2(struct i2c_client *client, + struct mp2975_data *data) { int ret; /* - * Identify multiphase for rail 2 - could be from 0 to 4. + * Identify multiphase for rail 2 - could be from 0 to data->max_phases[1]. * In case phase number is zero – only page zero is supported */ ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 2); if (ret < 0) return ret; - /* Identify multiphase for rail 2 - could be from 0 to 4. */ ret = i2c_smbus_read_word_data(client, MP2975_MFR_VR_MULTI_CONFIG_R2); if (ret < 0) return ret; ret &= GENMASK(2, 0); - return (ret >= 4) ? 4 : ret; + return (ret >= data->max_phases[1]) ? data->max_phases[1] : ret; } static void mp2975_set_phase_rail1(struct pmbus_driver_info *info) @@ -353,7 +358,7 @@ mp2975_identify_multiphase(struct i2c_client *client, struct mp2975_data *data, if (ret < 0) return ret; - /* Identify multiphase for rail 1 - could be from 1 to 8. */ + /* Identify multiphase for rail 1 - could be from 1 to data->max_phases[0]. */ ret = i2c_smbus_read_word_data(client, MP2975_MFR_VR_MULTI_CONFIG_R1); if (ret <= 0) return ret; @@ -361,19 +366,19 @@ mp2975_identify_multiphase(struct i2c_client *client, struct mp2975_data *data, info->phases[0] = ret & GENMASK(3, 0); /* - * The device provides a total of 8 PWM pins, and can be configured + * The device provides a total of $n PWM pins, and can be configured * to different phase count applications for rail 1 and rail 2. - * Rail 1 can be set to 8 phases, while rail 2 can only be set to 4 - * phases at most. When rail 1’s phase count is configured as 0, rail + * Rail 1 can be set to $n phases, while rail 2 can be set to less than + * that. When rail 1’s phase count is configured as 0, rail * 1 operates with 1-phase DCM. When rail 2 phase count is configured * as 0, rail 2 is disabled. */ - if (info->phases[0] > MP2975_MAX_PHASE_RAIL1) + if (info->phases[0] > data->max_phases[0]) return -EINVAL; mp2975_set_phase_rail1(info); - num_phases2 = min(MP2975_MAX_PHASE_RAIL1 - info->phases[0], - MP2975_MAX_PHASE_RAIL2); + num_phases2 = min(data->max_phases[0] - info->phases[0], + data->max_phases[1]); if (info->phases[1] && info->phases[1] <= num_phases2) mp2975_set_phase_rail2(info, num_phases2); @@ -669,11 +674,13 @@ static int mp2975_probe(struct i2c_client *client) else data->chip_id = i2c_match_id(mp2975_id, client)->driver_data; - memcpy(&data->info, &mp2975_info, sizeof(*info)); + memcpy(data->max_phases, mp2975_max_phases[data->chip_id], + sizeof(data->max_phases)); + info = &data->info; /* Identify multiphase configuration for rail 2. */ - ret = mp2975_identify_multiphase_rail2(client); + ret = mp2975_identify_multiphase_rail2(client, data); if (ret < 0) return ret; From 5239277ef41086cf4173c62de2fe3dda2cd9c777 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Fri, 14 Jul 2023 15:51:14 +0200 Subject: [PATCH 568/656] hwmon: (pmbus/mp2975) Add support for MP2971 and MP2973 Add support for MP2971 and MP2973, the successor of MP2975. The major differences are: - On MP2973 and MP2971 the Vref cannot be read and thus most of the OVP/current calculations won't work. - MP2973 and MP2971 also support LINEAR format for VOUT - MP2973 and MP2971 do not support OVP2 - On MP2973 and MP2971 most registers are in LINEAR format - The IMVP9_EN bit has a different position - Per phase current sense haven't been implemented. As on MP2975 most of the FAULT_LIMIT and WARN_LIMIT registers have been redefined and doesn't provide the functionality as defined in PMBUS spec. Tested on MP2973 and MP2971. Signed-off-by: Patrick Rudolph Signed-off-by: Naresh Solanki Link: https://lore.kernel.org/r/20230714135124.2645339-6-Naresh.Solanki@9elements.com Signed-off-by: Guenter Roeck --- drivers/hwmon/pmbus/mp2975.c | 247 ++++++++++++++++++++++++++++++----- 1 file changed, 214 insertions(+), 33 deletions(-) diff --git a/drivers/hwmon/pmbus/mp2975.c b/drivers/hwmon/pmbus/mp2975.c index 6a97d46ea5e8..634369ebec43 100644 --- a/drivers/hwmon/pmbus/mp2975.c +++ b/drivers/hwmon/pmbus/mp2975.c @@ -35,6 +35,8 @@ #define MP2975_MFR_OVP_TH_SET 0xe5 #define MP2975_MFR_UVP_SET 0xe6 +#define MP2973_MFR_RESO_SET 0xc7 + #define MP2975_VOUT_FORMAT BIT(15) #define MP2975_VID_STEP_SEL_R1 BIT(4) #define MP2975_IMVP9_EN_R1 BIT(13) @@ -49,8 +51,32 @@ #define MP2975_SENSE_AMPL_HALF 2 #define MP2975_VIN_UV_LIMIT_UNIT 8 +#define MP2973_VOUT_FORMAT_R1 GENMASK(7, 6) +#define MP2973_VOUT_FORMAT_R2 GENMASK(4, 3) +#define MP2973_VOUT_FORMAT_DIRECT_R1 BIT(7) +#define MP2973_VOUT_FORMAT_LINEAR_R1 BIT(6) +#define MP2973_VOUT_FORMAT_DIRECT_R2 BIT(4) +#define MP2973_VOUT_FORMAT_LINEAR_R2 BIT(3) + +#define MP2973_MFR_VR_MULTI_CONFIG_R1 0x0d +#define MP2973_MFR_VR_MULTI_CONFIG_R2 0x1d +#define MP2973_VID_STEP_SEL_R1 BIT(4) +#define MP2973_IMVP9_EN_R1 BIT(14) +#define MP2973_VID_STEP_SEL_R2 BIT(3) +#define MP2973_IMVP9_EN_R2 BIT(13) + +#define MP2973_MFR_READ_IOUT_PK 0x90 +#define MP2973_MFR_READ_POUT_PK 0x91 + #define MP2975_MAX_PHASE_RAIL1 8 #define MP2975_MAX_PHASE_RAIL2 4 + +#define MP2973_MAX_PHASE_RAIL1 14 +#define MP2973_MAX_PHASE_RAIL2 6 + +#define MP2971_MAX_PHASE_RAIL1 8 +#define MP2971_MAX_PHASE_RAIL2 3 + #define MP2975_PAGE_NUM 2 #define MP2975_RAIL2_FUNC (PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | \ @@ -58,11 +84,13 @@ PMBUS_HAVE_POUT | PMBUS_PHASE_VIRTUAL) enum chips { - mp2975 + mp2971, mp2973, mp2975 }; static const int mp2975_max_phases[][MP2975_PAGE_NUM] = { [mp2975] = { MP2975_MAX_PHASE_RAIL1, MP2975_MAX_PHASE_RAIL2 }, + [mp2973] = { MP2973_MAX_PHASE_RAIL1, MP2973_MAX_PHASE_RAIL2 }, + [mp2971] = { MP2971_MAX_PHASE_RAIL1, MP2971_MAX_PHASE_RAIL2 }, }; struct mp2975_data { @@ -79,6 +107,8 @@ struct mp2975_data { }; static const struct i2c_device_id mp2975_id[] = { + {"mp2971", mp2971}, + {"mp2973", mp2973}, {"mp2975", mp2975}, {} }; @@ -215,6 +245,76 @@ mp2975_read_phases(struct i2c_client *client, struct mp2975_data *data, return ret; } +static int mp2973_read_word_data(struct i2c_client *client, int page, + int phase, int reg) +{ + const struct pmbus_driver_info *info = pmbus_get_driver_info(client); + struct mp2975_data *data = to_mp2975_data(info); + int ret; + + switch (reg) { + case PMBUS_OT_FAULT_LIMIT: + ret = mp2975_read_word_helper(client, page, phase, reg, + GENMASK(7, 0)); + break; + case PMBUS_VIN_OV_FAULT_LIMIT: + ret = mp2975_read_word_helper(client, page, phase, reg, + GENMASK(7, 0)); + if (ret < 0) + return ret; + + ret = DIV_ROUND_CLOSEST(ret, MP2975_VIN_UV_LIMIT_UNIT); + break; + case PMBUS_VOUT_OV_FAULT_LIMIT: + /* + * MP2971 and mp2973 only supports tracking (ovp1) mode. + */ + ret = mp2975_read_word_helper(client, page, phase, + MP2975_MFR_OVP_TH_SET, + GENMASK(2, 0)); + if (ret < 0) + return ret; + + ret = data->vout_max[page] + 50 * (ret + 1); + break; + case PMBUS_VOUT_UV_FAULT_LIMIT: + ret = mp2975_read_word_helper(client, page, phase, reg, + GENMASK(8, 0)); + if (ret < 0) + return ret; + ret = mp2975_vid2direct(info->vrm_version[page], ret); + break; + case PMBUS_VIRT_READ_POUT_MAX: + ret = pmbus_read_word_data(client, page, phase, + MP2973_MFR_READ_POUT_PK); + break; + case PMBUS_VIRT_READ_IOUT_MAX: + ret = pmbus_read_word_data(client, page, phase, + MP2973_MFR_READ_IOUT_PK); + break; + case PMBUS_UT_WARN_LIMIT: + case PMBUS_UT_FAULT_LIMIT: + case PMBUS_VIN_UV_WARN_LIMIT: + case PMBUS_VIN_UV_FAULT_LIMIT: + case PMBUS_VOUT_UV_WARN_LIMIT: + case PMBUS_VOUT_OV_WARN_LIMIT: + case PMBUS_VIN_OV_WARN_LIMIT: + case PMBUS_IIN_OC_FAULT_LIMIT: + case PMBUS_IOUT_OC_LV_FAULT_LIMIT: + case PMBUS_IOUT_OC_WARN_LIMIT: + case PMBUS_IOUT_OC_FAULT_LIMIT: + case PMBUS_IOUT_UC_FAULT_LIMIT: + case PMBUS_POUT_OP_FAULT_LIMIT: + case PMBUS_POUT_OP_WARN_LIMIT: + case PMBUS_PIN_OP_WARN_LIMIT: + return -ENXIO; + default: + return -ENODATA; + } + + return ret; +} + static int mp2975_read_word_data(struct i2c_client *client, int page, int phase, int reg) { @@ -434,6 +534,35 @@ mp2975_identify_rails_vid(struct i2c_client *client, struct mp2975_data *data, MP2975_MFR_VR_MULTI_CONFIG_R2, 1, MP2975_IMVP9_EN_R2, MP2975_VID_STEP_SEL_R2); + + return ret; +} + +static int +mp2973_identify_rails_vid(struct i2c_client *client, struct mp2975_data *data, + struct pmbus_driver_info *info) +{ + int ret; + + ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 2); + if (ret < 0) + return ret; + + /* Identify VID mode for rail 1. */ + ret = mp2975_identify_vid(client, data, info, + MP2973_MFR_VR_MULTI_CONFIG_R1, 0, + MP2973_IMVP9_EN_R1, MP2973_VID_STEP_SEL_R1); + + if (ret < 0) + return ret; + + /* Identify VID mode for rail 2, if connected. */ + if (info->phases[1]) + ret = mp2975_identify_vid(client, data, info, + MP2973_MFR_VR_MULTI_CONFIG_R2, 1, + MP2973_IMVP9_EN_R2, + MP2973_VID_STEP_SEL_R2); + return ret; } @@ -551,15 +680,32 @@ static int mp2975_set_vout_format(struct i2c_client *client, struct mp2975_data *data, int page) { - int ret; + int ret, i; - ret = i2c_smbus_read_word_data(client, MP2975_MFR_DC_LOOP_CTRL); - if (ret < 0) - return ret; /* Enable DIRECT VOUT format 1mV/LSB */ - if (ret & MP2975_VOUT_FORMAT) { - ret &= ~MP2975_VOUT_FORMAT; - ret = i2c_smbus_write_word_data(client, MP2975_MFR_DC_LOOP_CTRL, ret); + if (data->chip_id == mp2975) { + ret = i2c_smbus_read_word_data(client, MP2975_MFR_DC_LOOP_CTRL); + if (ret < 0) + return ret; + if (ret & MP2975_VOUT_FORMAT) { + ret &= ~MP2975_VOUT_FORMAT; + ret = i2c_smbus_write_word_data(client, MP2975_MFR_DC_LOOP_CTRL, ret); + } + } else { + ret = i2c_smbus_read_word_data(client, MP2973_MFR_RESO_SET); + if (ret < 0) + return ret; + i = ret; + + if (page == 0) { + i &= ~MP2973_VOUT_FORMAT_R1; + i |= MP2973_VOUT_FORMAT_DIRECT_R1; + } else { + i &= ~MP2973_VOUT_FORMAT_R2; + i |= MP2973_VOUT_FORMAT_DIRECT_R2; + } + if (i != ret) + ret = i2c_smbus_write_word_data(client, MP2973_MFR_RESO_SET, i); } return ret; } @@ -607,10 +753,10 @@ mp2975_vout_per_rail_config_get(struct i2c_client *client, for (i = 0; i < data->info.pages; i++) { ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, i); if (ret < 0) - return ret; + continue; - /* Obtain voltage reference offsets. */ - ret = mp2975_vref_offset_get(client, data, i); + /* Set VOUT format for READ_VOUT command : direct. */ + ret = mp2975_set_vout_format(client, data, i); if (ret < 0) return ret; @@ -619,8 +765,12 @@ mp2975_vout_per_rail_config_get(struct i2c_client *client, if (ret < 0) return ret; - /* Set VOUT format for READ_VOUT command : direct. */ - ret = mp2975_set_vout_format(client, data, i); + /* Skip if reading Vref is unsupported */ + if (data->chip_id != mp2975) + continue; + + /* Obtain voltage reference offsets. */ + ret = mp2975_vref_offset_get(client, data, i); if (ret < 0) return ret; @@ -658,6 +808,23 @@ static struct pmbus_driver_info mp2975_info = { .read_word_data = mp2975_read_word_data, }; +static struct pmbus_driver_info mp2973_info = { + .pages = 1, + .format[PSC_VOLTAGE_IN] = linear, + .format[PSC_VOLTAGE_OUT] = direct, + .format[PSC_TEMPERATURE] = linear, + .format[PSC_CURRENT_IN] = linear, + .format[PSC_CURRENT_OUT] = linear, + .format[PSC_POWER] = linear, + .m[PSC_VOLTAGE_OUT] = 1, + .R[PSC_VOLTAGE_OUT] = 3, + .func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | + PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | + PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP | PMBUS_HAVE_POUT | + PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT, + .read_word_data = mp2973_read_word_data, +}; + static int mp2975_probe(struct i2c_client *client) { struct pmbus_driver_info *info; @@ -677,6 +844,11 @@ static int mp2975_probe(struct i2c_client *client) memcpy(data->max_phases, mp2975_max_phases[data->chip_id], sizeof(data->max_phases)); + if (data->chip_id == mp2975) + memcpy(&data->info, &mp2975_info, sizeof(*info)); + else + memcpy(&data->info, &mp2973_info, sizeof(*info)); + info = &data->info; /* Identify multiphase configuration for rail 2. */ @@ -691,30 +863,37 @@ static int mp2975_probe(struct i2c_client *client) data->info.func[1] = MP2975_RAIL2_FUNC; } - /* Identify multiphase configuration. */ - ret = mp2975_identify_multiphase(client, data, info); - if (ret) - return ret; + if (data->chip_id == mp2975) { + /* Identify multiphase configuration. */ + ret = mp2975_identify_multiphase(client, data, info); + if (ret) + return ret; - /* Identify VID setting per rail. */ - ret = mp2975_identify_rails_vid(client, data, info); - if (ret < 0) - return ret; + /* Identify VID setting per rail. */ + ret = mp2975_identify_rails_vid(client, data, info); + if (ret < 0) + return ret; - /* Obtain current sense gain of power stage. */ - ret = mp2975_current_sense_gain_get(client, data); - if (ret) - return ret; + /* Obtain current sense gain of power stage. */ + ret = mp2975_current_sense_gain_get(client, data); + if (ret) + return ret; - /* Obtain voltage reference values. */ - ret = mp2975_vref_get(client, data, info); - if (ret) - return ret; + /* Obtain voltage reference values. */ + ret = mp2975_vref_get(client, data, info); + if (ret) + return ret; - /* Obtain vout over-voltage scales. */ - ret = mp2975_vout_ov_scale_get(client, data, info); - if (ret < 0) - return ret; + /* Obtain vout over-voltage scales. */ + ret = mp2975_vout_ov_scale_get(client, data, info); + if (ret < 0) + return ret; + } else { + /* Identify VID setting per rail. */ + ret = mp2973_identify_rails_vid(client, data, info); + if (ret < 0) + return ret; + } /* Obtain offsets, maximum and format for vout. */ ret = mp2975_vout_per_rail_config_get(client, data, info); @@ -725,6 +904,8 @@ static int mp2975_probe(struct i2c_client *client) } static const struct of_device_id __maybe_unused mp2975_of_match[] = { + {.compatible = "mps,mp2971", .data = (void *)mp2971}, + {.compatible = "mps,mp2973", .data = (void *)mp2973}, {.compatible = "mps,mp2975", .data = (void *)mp2975}, {} }; From 88fc1efcd45c3f681740659a1483978e7553ade7 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Fri, 14 Jul 2023 15:51:15 +0200 Subject: [PATCH 569/656] hwmon: (pmbus/mp2975) Add regulator support Add support to expose the PMBUS regulator. Tested on MP2973 and MP2971. Signed-off-by: Patrick Rudolph Signed-off-by: Naresh Solanki Link: https://lore.kernel.org/r/20230714135124.2645339-7-Naresh.Solanki@9elements.com Signed-off-by: Guenter Roeck --- drivers/hwmon/pmbus/Kconfig | 7 +++++++ drivers/hwmon/pmbus/mp2975.c | 15 +++++++++++++++ 2 files changed, 22 insertions(+) diff --git a/drivers/hwmon/pmbus/Kconfig b/drivers/hwmon/pmbus/Kconfig index 270b6336b76d..b4e93bd5835e 100644 --- a/drivers/hwmon/pmbus/Kconfig +++ b/drivers/hwmon/pmbus/Kconfig @@ -317,6 +317,13 @@ config SENSORS_MP2975 This driver can also be built as a module. If so, the module will be called mp2975. +config SENSORS_MP2975_REGULATOR + depends on SENSORS_MP2975 && REGULATOR + bool "Regulator support for MPS MP2975" + help + If you say yes here you get regulator support for MPS MP2975 + Dual Loop Digital Multi-Phase Controller. + config SENSORS_MP5023 tristate "MPS MP5023" help diff --git a/drivers/hwmon/pmbus/mp2975.c b/drivers/hwmon/pmbus/mp2975.c index 634369ebec43..5fb21b9f4ab3 100644 --- a/drivers/hwmon/pmbus/mp2975.c +++ b/drivers/hwmon/pmbus/mp2975.c @@ -115,6 +115,11 @@ static const struct i2c_device_id mp2975_id[] = { MODULE_DEVICE_TABLE(i2c, mp2975_id); +static const struct regulator_desc __maybe_unused mp2975_reg_desc[] = { + PMBUS_REGULATOR("vout", 0), + PMBUS_REGULATOR("vout", 1), +}; + #define to_mp2975_data(x) container_of(x, struct mp2975_data, info) static int @@ -806,6 +811,10 @@ static struct pmbus_driver_info mp2975_info = { PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP | PMBUS_HAVE_POUT | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT | PMBUS_PHASE_VIRTUAL, .read_word_data = mp2975_read_word_data, +#if IS_ENABLED(CONFIG_SENSORS_MP2975_REGULATOR) + .num_regulators = 1, + .reg_desc = mp2975_reg_desc, +#endif }; static struct pmbus_driver_info mp2973_info = { @@ -823,6 +832,10 @@ static struct pmbus_driver_info mp2973_info = { PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP | PMBUS_HAVE_POUT | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT, .read_word_data = mp2973_read_word_data, +#if IS_ENABLED(CONFIG_SENSORS_MP2975_REGULATOR) + .num_regulators = 1, + .reg_desc = mp2975_reg_desc, +#endif }; static int mp2975_probe(struct i2c_client *client) @@ -861,6 +874,8 @@ static int mp2975_probe(struct i2c_client *client) data->info.pages = MP2975_PAGE_NUM; data->info.phases[1] = ret; data->info.func[1] = MP2975_RAIL2_FUNC; + if (IS_ENABLED(CONFIG_SENSORS_MP2975_REGULATOR)) + data->info.num_regulators = MP2975_PAGE_NUM; } if (data->chip_id == mp2975) { From 45f154dc966322948725af1004f53a5531f03b7f Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Fri, 14 Jul 2023 15:51:16 +0200 Subject: [PATCH 570/656] hwmon: (pmbus/mp2975) Add OCP limit Add support for PMBUS_IOUT_OC_FAULT_LIMIT. Add a helper function to convert the limit to LINEAR11 format and read data->info.phases[0] on MP2971 and MP2973 as well. Signed-off-by: Patrick Rudolph Signed-off-by: Naresh Solanki Link: https://lore.kernel.org/r/20230714135124.2645339-8-Naresh.Solanki@9elements.com Signed-off-by: Guenter Roeck --- drivers/hwmon/pmbus/mp2975.c | 76 ++++++++++++++++++++++++++++++------ 1 file changed, 65 insertions(+), 11 deletions(-) diff --git a/drivers/hwmon/pmbus/mp2975.c b/drivers/hwmon/pmbus/mp2975.c index 5fb21b9f4ab3..28f33f4618fa 100644 --- a/drivers/hwmon/pmbus/mp2975.c +++ b/drivers/hwmon/pmbus/mp2975.c @@ -65,6 +65,10 @@ #define MP2973_VID_STEP_SEL_R2 BIT(3) #define MP2973_IMVP9_EN_R2 BIT(13) +#define MP2973_MFR_OCP_TOTAL_SET 0x5f +#define MP2973_OCP_TOTAL_CUR_MASK GENMASK(6, 0) +#define MP2973_MFR_OCP_LEVEL_RES BIT(15) + #define MP2973_MFR_READ_IOUT_PK 0x90 #define MP2973_MFR_READ_POUT_PK 0x91 @@ -153,6 +157,41 @@ mp2975_vid2direct(int vrf, int val) return 0; } +#define MAX_LIN_MANTISSA (1023 * 1000) +#define MIN_LIN_MANTISSA (511 * 1000) + +/* Converts a milli-unit DIRECT value to LINEAR11 format */ +static u16 mp2975_data2reg_linear11(s64 val) +{ + s16 exponent = 0, mantissa; + bool negative = false; + + /* simple case */ + if (val == 0) + return 0; + + /* Reduce large mantissa until it fits into 10 bit */ + while (val >= MAX_LIN_MANTISSA && exponent < 15) { + exponent++; + val >>= 1; + } + /* Increase small mantissa to improve precision */ + while (val < MIN_LIN_MANTISSA && exponent > -15) { + exponent--; + val <<= 1; + } + + /* Convert mantissa from milli-units to units */ + mantissa = clamp_val(DIV_ROUND_CLOSEST_ULL(val, 1000), 0, 0x3ff); + + /* restore sign */ + if (negative) + mantissa = -mantissa; + + /* Convert to 5 bit exponent, 11 bit mantissa */ + return (mantissa & 0x7ff) | ((exponent << 11) & 0xf800); +} + static int mp2975_read_phase(struct i2c_client *client, struct mp2975_data *data, int page, int phase, u8 reg) @@ -297,6 +336,20 @@ static int mp2973_read_word_data(struct i2c_client *client, int page, ret = pmbus_read_word_data(client, page, phase, MP2973_MFR_READ_IOUT_PK); break; + case PMBUS_IOUT_OC_FAULT_LIMIT: + ret = mp2975_read_word_helper(client, page, phase, + MP2973_MFR_OCP_TOTAL_SET, + GENMASK(15, 0)); + if (ret < 0) + return ret; + + if (ret & MP2973_MFR_OCP_LEVEL_RES) + ret = 2 * (ret & MP2973_OCP_TOTAL_CUR_MASK); + else + ret = ret & MP2973_OCP_TOTAL_CUR_MASK; + + ret = mp2975_data2reg_linear11(ret * info->phases[page] * 1000); + break; case PMBUS_UT_WARN_LIMIT: case PMBUS_UT_FAULT_LIMIT: case PMBUS_VIN_UV_WARN_LIMIT: @@ -307,7 +360,6 @@ static int mp2973_read_word_data(struct i2c_client *client, int page, case PMBUS_IIN_OC_FAULT_LIMIT: case PMBUS_IOUT_OC_LV_FAULT_LIMIT: case PMBUS_IOUT_OC_WARN_LIMIT: - case PMBUS_IOUT_OC_FAULT_LIMIT: case PMBUS_IOUT_UC_FAULT_LIMIT: case PMBUS_POUT_OP_FAULT_LIMIT: case PMBUS_POUT_OP_WARN_LIMIT: @@ -481,11 +533,13 @@ mp2975_identify_multiphase(struct i2c_client *client, struct mp2975_data *data, if (info->phases[0] > data->max_phases[0]) return -EINVAL; - mp2975_set_phase_rail1(info); - num_phases2 = min(data->max_phases[0] - info->phases[0], - data->max_phases[1]); - if (info->phases[1] && info->phases[1] <= num_phases2) - mp2975_set_phase_rail2(info, num_phases2); + if (data->chip_id == mp2975) { + mp2975_set_phase_rail1(info); + num_phases2 = min(data->max_phases[0] - info->phases[0], + data->max_phases[1]); + if (info->phases[1] && info->phases[1] <= num_phases2) + mp2975_set_phase_rail2(info, num_phases2); + } return 0; } @@ -878,12 +932,12 @@ static int mp2975_probe(struct i2c_client *client) data->info.num_regulators = MP2975_PAGE_NUM; } - if (data->chip_id == mp2975) { - /* Identify multiphase configuration. */ - ret = mp2975_identify_multiphase(client, data, info); - if (ret) - return ret; + /* Identify multiphase configuration. */ + ret = mp2975_identify_multiphase(client, data, info); + if (ret) + return ret; + if (data->chip_id == mp2975) { /* Identify VID setting per rail. */ ret = mp2975_identify_rails_vid(client, data, info); if (ret < 0) From acda945afb465e2a2c436623a35203d63994441f Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Mon, 31 Jul 2023 11:22:04 +0200 Subject: [PATCH 571/656] hwmon: (pmbus/mp2975) Fix PGOOD in READ_STATUS_WORD MP2973 & MP2971 return PGOOD instead of PB_STATUS_POWER_GOOD_N. Fix that in the read_word_data hook. MP2975 should not be affected, but that has not been confirmed with hardware. Signed-off-by: Patrick Rudolph Signed-off-by: Naresh Solanki Link: https://lore.kernel.org/r/20230731092204.2933045-1-Naresh.Solanki@9elements.com [groeck: Rephrased description to indicate that MP2975 is likely not affected] Signed-off-by: Guenter Roeck --- drivers/hwmon/pmbus/mp2975.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/hwmon/pmbus/mp2975.c b/drivers/hwmon/pmbus/mp2975.c index 28f33f4618fa..26ba50633100 100644 --- a/drivers/hwmon/pmbus/mp2975.c +++ b/drivers/hwmon/pmbus/mp2975.c @@ -380,6 +380,11 @@ static int mp2975_read_word_data(struct i2c_client *client, int page, int ret; switch (reg) { + case PMBUS_STATUS_WORD: + /* MP2973 & MP2971 return PGOOD instead of PB_STATUS_POWER_GOOD_N. */ + ret = pmbus_read_word_data(client, page, phase, reg); + ret ^= PB_STATUS_POWER_GOOD_N; + break; case PMBUS_OT_FAULT_LIMIT: ret = mp2975_read_word_helper(client, page, phase, reg, GENMASK(7, 0)); From a0ac418c6007c9e1694e21056964c923364f3175 Mon Sep 17 00:00:00 2001 From: JuenKit Yip Date: Mon, 3 Jul 2023 22:08:16 +0800 Subject: [PATCH 572/656] hwmon: (sht3x) convert some of sysfs interface to hwmon update_interval, temperature/humidity max/min and hyst were moved to new hwmon interface, and only heater and repeatability were reserved as non-stardard sysfs interface. Signed-off-by: JuenKit Yip Link: https://lore.kernel.org/r/DB4PR10MB626157BC697F2CD6100431359229A@DB4PR10MB6261.EURPRD10.PROD.OUTLOOK.COM Signed-off-by: Guenter Roeck --- drivers/hwmon/sht3x.c | 389 +++++++++++++++++++++++++++--------------- 1 file changed, 252 insertions(+), 137 deletions(-) diff --git a/drivers/hwmon/sht3x.c b/drivers/hwmon/sht3x.c index bf18630619e0..79657910b79e 100644 --- a/drivers/hwmon/sht3x.c +++ b/drivers/hwmon/sht3x.c @@ -147,8 +147,20 @@ static const u16 mode_to_update_interval[] = { 100, }; +static const struct hwmon_channel_info * const sht3x_channel_info[] = { + HWMON_CHANNEL_INFO(chip, HWMON_C_UPDATE_INTERVAL), + HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT | HWMON_T_MIN | + HWMON_T_MIN_HYST | HWMON_T_MAX | + HWMON_T_MAX_HYST | HWMON_T_ALARM), + HWMON_CHANNEL_INFO(humidity, HWMON_H_INPUT | HWMON_H_MIN | + HWMON_H_MIN_HYST | HWMON_H_MAX | + HWMON_H_MAX_HYST | HWMON_H_ALARM), + NULL, +}; + struct sht3x_data { struct i2c_client *client; + enum sht3x_chips chip_id; struct mutex i2c_lock; /* lock for sending i2c commands */ struct mutex data_lock; /* lock for updating driver data */ @@ -276,27 +288,24 @@ out: return data; } -/* sysfs attributes */ -static ssize_t temp1_input_show(struct device *dev, - struct device_attribute *attr, char *buf) +static int temp1_input_read(struct device *dev) { struct sht3x_data *data = sht3x_update_client(dev); if (IS_ERR(data)) return PTR_ERR(data); - return sprintf(buf, "%d\n", data->temperature); + return data->temperature; } -static ssize_t humidity1_input_show(struct device *dev, - struct device_attribute *attr, char *buf) +static int humidity1_input_read(struct device *dev) { struct sht3x_data *data = sht3x_update_client(dev); if (IS_ERR(data)) return PTR_ERR(data); - return sprintf(buf, "%u\n", data->humidity); + return data->humidity; } /* @@ -332,33 +341,24 @@ static int limits_update(struct sht3x_data *data) return ret; } -static ssize_t temp1_limit_show(struct device *dev, - struct device_attribute *attr, - char *buf) +static int temp1_limit_read(struct device *dev, int index) { struct sht3x_data *data = dev_get_drvdata(dev); - u8 index = to_sensor_dev_attr(attr)->index; - int temperature_limit = data->temperature_limits[index]; - return sysfs_emit(buf, "%d\n", temperature_limit); + return data->temperature_limits[index]; } -static ssize_t humidity1_limit_show(struct device *dev, - struct device_attribute *attr, - char *buf) +static int humidity1_limit_read(struct device *dev, int index) { struct sht3x_data *data = dev_get_drvdata(dev); - u8 index = to_sensor_dev_attr(attr)->index; - u32 humidity_limit = data->humidity_limits[index]; - return sysfs_emit(buf, "%u\n", humidity_limit); + return data->humidity_limits[index]; } /* - * limit_store must only be called with data_lock held + * limit_write must only be called with data_lock held */ -static size_t limit_store(struct device *dev, - size_t count, +static size_t limit_write(struct device *dev, u8 index, int temperature, u32 humidity) @@ -379,7 +379,7 @@ static size_t limit_store(struct device *dev, * ST = (T + 45) / 175 * 2^16 * SRH = RH / 100 * 2^16 * adapted for fixed point arithmetic and packed the same as - * in limit_show() + * in limit_read() */ raw = ((u32)(temperature + 45000) * 24543) >> (16 + 7); raw |= ((humidity * 42950) >> 16) & 0xfe00; @@ -400,50 +400,35 @@ static size_t limit_store(struct device *dev, data->temperature_limits[index] = temperature; data->humidity_limits[index] = humidity; - return count; + + return 0; } -static ssize_t temp1_limit_store(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t count) +static int temp1_limit_write(struct device *dev, int index, int val) { int temperature; int ret; struct sht3x_data *data = dev_get_drvdata(dev); - u8 index = to_sensor_dev_attr(attr)->index; - ret = kstrtoint(buf, 0, &temperature); - if (ret) - return ret; - - temperature = clamp_val(temperature, SHT3X_MIN_TEMPERATURE, + temperature = clamp_val(val, SHT3X_MIN_TEMPERATURE, SHT3X_MAX_TEMPERATURE); mutex_lock(&data->data_lock); - ret = limit_store(dev, count, index, temperature, + ret = limit_write(dev, index, temperature, data->humidity_limits[index]); mutex_unlock(&data->data_lock); return ret; } -static ssize_t humidity1_limit_store(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t count) +static int humidity1_limit_write(struct device *dev, int index, int val) { u32 humidity; int ret; struct sht3x_data *data = dev_get_drvdata(dev); - u8 index = to_sensor_dev_attr(attr)->index; - ret = kstrtou32(buf, 0, &humidity); - if (ret) - return ret; - - humidity = clamp_val(humidity, SHT3X_MIN_HUMIDITY, SHT3X_MAX_HUMIDITY); + humidity = clamp_val(val, SHT3X_MIN_HUMIDITY, SHT3X_MAX_HUMIDITY); mutex_lock(&data->data_lock); - ret = limit_store(dev, count, index, data->temperature_limits[index], + ret = limit_write(dev, index, data->temperature_limits[index], humidity); mutex_unlock(&data->data_lock); @@ -474,7 +459,6 @@ static void sht3x_select_command(struct sht3x_data *data) } static int status_register_read(struct device *dev, - struct device_attribute *attr, char *buffer, int length) { int ret; @@ -487,34 +471,30 @@ static int status_register_read(struct device *dev, return ret; } -static ssize_t temp1_alarm_show(struct device *dev, - struct device_attribute *attr, - char *buf) +static int temp1_alarm_read(struct device *dev) { char buffer[SHT3X_WORD_LEN + SHT3X_CRC8_LEN]; int ret; - ret = status_register_read(dev, attr, buffer, + ret = status_register_read(dev, buffer, SHT3X_WORD_LEN + SHT3X_CRC8_LEN); if (ret) return ret; - return sysfs_emit(buf, "%d\n", !!(buffer[0] & 0x04)); + return !!(buffer[0] & 0x04); } -static ssize_t humidity1_alarm_show(struct device *dev, - struct device_attribute *attr, - char *buf) +static int humidity1_alarm_read(struct device *dev) { char buffer[SHT3X_WORD_LEN + SHT3X_CRC8_LEN]; int ret; - ret = status_register_read(dev, attr, buffer, + ret = status_register_read(dev, buffer, SHT3X_WORD_LEN + SHT3X_CRC8_LEN); if (ret) return ret; - return sysfs_emit(buf, "%d\n", !!(buffer[0] & 0x08)); + return !!(buffer[0] & 0x08); } static ssize_t heater_enable_show(struct device *dev, @@ -524,7 +504,7 @@ static ssize_t heater_enable_show(struct device *dev, char buffer[SHT3X_WORD_LEN + SHT3X_CRC8_LEN]; int ret; - ret = status_register_read(dev, attr, buffer, + ret = status_register_read(dev, buffer, SHT3X_WORD_LEN + SHT3X_CRC8_LEN); if (ret) return ret; @@ -560,39 +540,28 @@ static ssize_t heater_enable_store(struct device *dev, return ret; } -static ssize_t update_interval_show(struct device *dev, - struct device_attribute *attr, - char *buf) +static int update_interval_read(struct device *dev) { struct sht3x_data *data = dev_get_drvdata(dev); - return sysfs_emit(buf, "%u\n", - mode_to_update_interval[data->mode]); + return mode_to_update_interval[data->mode]; } -static ssize_t update_interval_store(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t count) +static int update_interval_write(struct device *dev, int val) { - u16 update_interval; u8 mode; int ret; const char *command; struct sht3x_data *data = dev_get_drvdata(dev); struct i2c_client *client = data->client; - ret = kstrtou16(buf, 0, &update_interval); - if (ret) - return ret; - - mode = get_mode_from_update_interval(update_interval); + mode = get_mode_from_update_interval(val); mutex_lock(&data->data_lock); /* mode did not change */ if (mode == data->mode) { mutex_unlock(&data->data_lock); - return count; + return 0; } mutex_lock(&data->i2c_lock); @@ -634,7 +603,7 @@ out: if (ret != SHT3X_CMD_LENGTH) return ret < 0 ? ret : -EIO; - return count; + return 0; } static ssize_t repeatability_show(struct device *dev, @@ -668,60 +637,219 @@ static ssize_t repeatability_store(struct device *dev, return count; } -static SENSOR_DEVICE_ATTR_RO(temp1_input, temp1_input, 0); -static SENSOR_DEVICE_ATTR_RO(humidity1_input, humidity1_input, 0); -static SENSOR_DEVICE_ATTR_RW(temp1_max, temp1_limit, limit_max); -static SENSOR_DEVICE_ATTR_RW(humidity1_max, humidity1_limit, limit_max); -static SENSOR_DEVICE_ATTR_RW(temp1_max_hyst, temp1_limit, limit_max_hyst); -static SENSOR_DEVICE_ATTR_RW(humidity1_max_hyst, humidity1_limit, - limit_max_hyst); -static SENSOR_DEVICE_ATTR_RW(temp1_min, temp1_limit, limit_min); -static SENSOR_DEVICE_ATTR_RW(humidity1_min, humidity1_limit, limit_min); -static SENSOR_DEVICE_ATTR_RW(temp1_min_hyst, temp1_limit, limit_min_hyst); -static SENSOR_DEVICE_ATTR_RW(humidity1_min_hyst, humidity1_limit, - limit_min_hyst); -static SENSOR_DEVICE_ATTR_RO(temp1_alarm, temp1_alarm, 0); -static SENSOR_DEVICE_ATTR_RO(humidity1_alarm, humidity1_alarm, 0); static SENSOR_DEVICE_ATTR_RW(heater_enable, heater_enable, 0); -static SENSOR_DEVICE_ATTR_RW(update_interval, update_interval, 0); static SENSOR_DEVICE_ATTR_RW(repeatability, repeatability, 0); static struct attribute *sht3x_attrs[] = { - &sensor_dev_attr_temp1_input.dev_attr.attr, - &sensor_dev_attr_humidity1_input.dev_attr.attr, - &sensor_dev_attr_temp1_max.dev_attr.attr, - &sensor_dev_attr_temp1_max_hyst.dev_attr.attr, - &sensor_dev_attr_humidity1_max.dev_attr.attr, - &sensor_dev_attr_humidity1_max_hyst.dev_attr.attr, - &sensor_dev_attr_temp1_min.dev_attr.attr, - &sensor_dev_attr_temp1_min_hyst.dev_attr.attr, - &sensor_dev_attr_humidity1_min.dev_attr.attr, - &sensor_dev_attr_humidity1_min_hyst.dev_attr.attr, - &sensor_dev_attr_temp1_alarm.dev_attr.attr, - &sensor_dev_attr_humidity1_alarm.dev_attr.attr, &sensor_dev_attr_heater_enable.dev_attr.attr, - &sensor_dev_attr_update_interval.dev_attr.attr, - &sensor_dev_attr_repeatability.dev_attr.attr, - NULL -}; - -static struct attribute *sts3x_attrs[] = { - &sensor_dev_attr_temp1_input.dev_attr.attr, - &sensor_dev_attr_temp1_max.dev_attr.attr, - &sensor_dev_attr_temp1_max_hyst.dev_attr.attr, - &sensor_dev_attr_temp1_min.dev_attr.attr, - &sensor_dev_attr_temp1_min_hyst.dev_attr.attr, - &sensor_dev_attr_temp1_alarm.dev_attr.attr, - &sensor_dev_attr_heater_enable.dev_attr.attr, - &sensor_dev_attr_update_interval.dev_attr.attr, &sensor_dev_attr_repeatability.dev_attr.attr, NULL }; ATTRIBUTE_GROUPS(sht3x); -ATTRIBUTE_GROUPS(sts3x); -static const struct i2c_device_id sht3x_ids[]; +static umode_t sht3x_is_visible(const void *data, enum hwmon_sensor_types type, + u32 attr, int channel) +{ + const struct sht3x_data *chip_data = data; + + switch (type) { + case hwmon_chip: + switch (attr) { + case hwmon_chip_update_interval: + return 0644; + default: + break; + } + break; + case hwmon_temp: + switch (attr) { + case hwmon_temp_input: + case hwmon_temp_alarm: + return 0444; + case hwmon_temp_max: + case hwmon_temp_max_hyst: + case hwmon_temp_min: + case hwmon_temp_min_hyst: + return 0644; + default: + break; + } + break; + case hwmon_humidity: + if (chip_data->chip_id == sts3x) + break; + switch (attr) { + case hwmon_humidity_input: + case hwmon_humidity_alarm: + return 0444; + case hwmon_humidity_max: + case hwmon_humidity_max_hyst: + case hwmon_humidity_min: + case hwmon_humidity_min_hyst: + return 0644; + default: + break; + } + break; + default: + break; + } + + return 0; +} + +static int sht3x_read(struct device *dev, enum hwmon_sensor_types type, + u32 attr, int channel, long *val) +{ + enum sht3x_limits index; + + switch (type) { + case hwmon_chip: + switch (attr) { + case hwmon_chip_update_interval: + *val = update_interval_read(dev); + break; + default: + return -EOPNOTSUPP; + } + break; + case hwmon_temp: + switch (attr) { + case hwmon_temp_input: + *val = temp1_input_read(dev); + break; + case hwmon_temp_alarm: + *val = temp1_alarm_read(dev); + break; + case hwmon_temp_max: + index = limit_max; + *val = temp1_limit_read(dev, index); + break; + case hwmon_temp_max_hyst: + index = limit_max_hyst; + *val = temp1_limit_read(dev, index); + break; + case hwmon_temp_min: + index = limit_min; + *val = temp1_limit_read(dev, index); + break; + case hwmon_temp_min_hyst: + index = limit_min_hyst; + *val = temp1_limit_read(dev, index); + break; + default: + return -EOPNOTSUPP; + } + break; + case hwmon_humidity: + switch (attr) { + case hwmon_humidity_input: + *val = humidity1_input_read(dev); + break; + case hwmon_humidity_alarm: + *val = humidity1_alarm_read(dev); + break; + case hwmon_humidity_max: + index = limit_max; + *val = humidity1_limit_read(dev, index); + break; + case hwmon_humidity_max_hyst: + index = limit_max_hyst; + *val = humidity1_limit_read(dev, index); + break; + case hwmon_humidity_min: + index = limit_min; + *val = humidity1_limit_read(dev, index); + break; + case hwmon_humidity_min_hyst: + index = limit_min_hyst; + *val = humidity1_limit_read(dev, index); + break; + default: + return -EOPNOTSUPP; + } + break; + default: + return -EOPNOTSUPP; + } + + return 0; +} + +static int sht3x_write(struct device *dev, enum hwmon_sensor_types type, + u32 attr, int channel, long val) +{ + enum sht3x_limits index; + + switch (type) { + case hwmon_chip: + switch (attr) { + case hwmon_chip_update_interval: + return update_interval_write(dev, val); + default: + return -EOPNOTSUPP; + } + case hwmon_temp: + switch (attr) { + case hwmon_temp_max: + index = limit_max; + break; + case hwmon_temp_max_hyst: + index = limit_max_hyst; + break; + case hwmon_temp_min: + index = limit_min; + break; + case hwmon_temp_min_hyst: + index = limit_min_hyst; + break; + default: + return -EOPNOTSUPP; + } + return temp1_limit_write(dev, index, val); + case hwmon_humidity: + switch (attr) { + case hwmon_humidity_max: + index = limit_max; + break; + case hwmon_humidity_max_hyst: + index = limit_max_hyst; + break; + case hwmon_humidity_min: + index = limit_min; + break; + case hwmon_humidity_min_hyst: + index = limit_min_hyst; + break; + default: + return -EOPNOTSUPP; + } + return humidity1_limit_write(dev, index, val); + default: + return -EOPNOTSUPP; + } +} + +static const struct hwmon_ops sht3x_ops = { + .is_visible = sht3x_is_visible, + .read = sht3x_read, + .write = sht3x_write, +}; + +static const struct hwmon_chip_info sht3x_chip_info = { + .ops = &sht3x_ops, + .info = sht3x_channel_info, +}; + +/* device ID table */ +static const struct i2c_device_id sht3x_ids[] = { + {"sht3x", sht3x}, + {"sts3x", sts3x}, + {} +}; + +MODULE_DEVICE_TABLE(i2c, sht3x_ids); static int sht3x_probe(struct i2c_client *client) { @@ -730,7 +858,6 @@ static int sht3x_probe(struct i2c_client *client) struct device *hwmon_dev; struct i2c_adapter *adap = client->adapter; struct device *dev = &client->dev; - const struct attribute_group **attribute_groups; /* * we require full i2c support since the sht3x uses multi-byte read and @@ -753,6 +880,7 @@ static int sht3x_probe(struct i2c_client *client) data->mode = 0; data->last_update = jiffies - msecs_to_jiffies(3000); data->client = client; + data->chip_id = i2c_match_id(sht3x_ids, client)->driver_data; crc8_populate_msb(sht3x_crc8_table, SHT3X_CRC8_POLYNOMIAL); sht3x_select_command(data); @@ -771,15 +899,11 @@ static int sht3x_probe(struct i2c_client *client) if (ret) return ret; - if (i2c_match_id(sht3x_ids, client)->driver_data == sts3x) - attribute_groups = sts3x_groups; - else - attribute_groups = sht3x_groups; - - hwmon_dev = devm_hwmon_device_register_with_groups(dev, - client->name, - data, - attribute_groups); + hwmon_dev = devm_hwmon_device_register_with_info(dev, + client->name, + data, + &sht3x_chip_info, + sht3x_groups); if (IS_ERR(hwmon_dev)) dev_dbg(dev, "unable to register hwmon device\n"); @@ -787,15 +911,6 @@ static int sht3x_probe(struct i2c_client *client) return PTR_ERR_OR_ZERO(hwmon_dev); } -/* device ID table */ -static const struct i2c_device_id sht3x_ids[] = { - {"sht3x", sht3x}, - {"sts3x", sts3x}, - {} -}; - -MODULE_DEVICE_TABLE(i2c, sht3x_ids); - static struct i2c_driver sht3x_i2c_driver = { .driver.name = "sht3x", .probe = sht3x_probe, From 4f65c15cf70eb22c074889af60b9d2bcffbb375a Mon Sep 17 00:00:00 2001 From: Ahmad Khalifa Date: Wed, 19 Jul 2023 23:41:42 +0100 Subject: [PATCH 573/656] hwmon: (nct6775) Add support for 18 IN readings for nct6799 * Add additional VIN/IN_MIN/IN_MAX register values * Separate ALARM/BEEP bits for nct6799 * Update scaling factors for nct6799 Registers/alarms match for NCT6796D-S and NCT6799D-R Tested on NCT6799D-R for new IN/MIN/MAX and ALARMS Signed-off-by: Ahmad Khalifa Link: https://lore.kernel.org/r/20230719224142.411237-1-ahmad@khalifa.ws Signed-off-by: Guenter Roeck --- drivers/hwmon/nct6775-core.c | 51 +++++++++++++++++++++++++++++------- drivers/hwmon/nct6775.h | 5 ++-- 2 files changed, 45 insertions(+), 11 deletions(-) diff --git a/drivers/hwmon/nct6775-core.c b/drivers/hwmon/nct6775-core.c index fa0b7551ebf5..33533d95cf48 100644 --- a/drivers/hwmon/nct6775-core.c +++ b/drivers/hwmon/nct6775-core.c @@ -80,14 +80,17 @@ static const char * const nct6775_device_names[] = { /* Common and NCT6775 specific data */ -/* Voltage min/max registers for nr=7..14 are in bank 5 */ +/* + * Voltage min/max registers for nr=7..14 are in bank 5 + * min/max: 15-17 for NCT6799 only + */ static const u16 NCT6775_REG_IN_MAX[] = { 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a, - 0x55c, 0x55e, 0x560, 0x562 }; + 0x55c, 0x55e, 0x560, 0x562, 0x564, 0x570, 0x572 }; static const u16 NCT6775_REG_IN_MIN[] = { 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b, - 0x55d, 0x55f, 0x561, 0x563 }; + 0x55d, 0x55f, 0x561, 0x563, 0x565, 0x571, 0x573 }; static const u16 NCT6775_REG_IN[] = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552 }; @@ -256,7 +259,8 @@ static const s8 NCT6776_ALARM_BITS[NUM_ALARM_BITS] = { 12, 9, /* intr0-intr1 */ }; -static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 }; +/* 0xbf: nct6799 only */ +static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5, 0xbf }; static const s8 NCT6776_BEEP_BITS[NUM_BEEP_BITS] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, -1, -1, -1, /* in0-in11 */ @@ -328,9 +332,16 @@ static const u16 NCT6776_REG_TSI_TEMP[] = { /* NCT6779 specific data */ +/* + * 15-17 for NCT6799 only, register labels are: + * CPUVC, VIN1, AVSB, 3VCC, VIN0, VIN8, VIN4, 3VSB + * VBAT, VTT, VIN5, VIN6, VIN2, VIN3, VIN7, VIN9 + * VHIF, VIN10 + */ static const u16 NCT6779_REG_IN[] = { 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487, - 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e }; + 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e, 0x48f, + 0x470, 0x471}; static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B, 0x568 }; @@ -644,6 +655,22 @@ static const char *const nct6798_temp_label[] = { #define NCT6798_TEMP_MASK 0xbfff0ffe #define NCT6798_VIRT_TEMP_MASK 0x80000c00 +static const s8 NCT6799_ALARM_BITS[NUM_ALARM_BITS] = { + 0, 1, 2, 3, 8, -1, 20, 16, 17, 24, 25, 26, /* in0-in11 */ + 27, 28, 29, 30, 31, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ + 6, 7, 11, 10, 23, 33, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ + 4, 5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ + 12, 9, /* intr0-intr1 */ +}; + +static const s8 NCT6799_BEEP_BITS[NUM_BEEP_BITS] = { + 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, /* in0-in11 */ + 12, 13, 14, 15, 34, 35, -1, -1, -1, -1, -1, -1, /* in12-in23 */ + 25, 26, 27, 28, 29, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ + 16, 17, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ + 30, 31, 24 /* intr0-intr1, beep_en */ +}; + static const char *const nct6799_temp_label[] = { "", "SYSTIN", @@ -938,12 +965,12 @@ static const u16 scale_in[15] = { /* * NCT6798 scaling: * CPUVC, IN1, AVSB, 3VCC, IN0, IN8, IN4, 3VSB, VBAT, VTT, IN5, IN6, IN2, - * IN3, IN7 - * Additional scales to be added later: IN9 (800), VHIF (1600) + * IN3, IN7, IN9, VHIF, IN10 + * 15-17 for NCT6799 only */ -static const u16 scale_in_6798[15] = { +static const u16 scale_in_6798[NUM_IN] = { 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 1600, 1600, 1600, 800, - 800, 800 + 800, 800, 800, 1600, 800 }; static inline long in_from_reg(u8 reg, u8 nr, const u16 *scales) @@ -3961,7 +3988,13 @@ int nct6775_probe(struct device *dev, struct nct6775_data *data, case nct6796: case nct6797: case nct6798: + data->REG_TSI_TEMP = NCT6796_REG_TSI_TEMP; + num_reg_tsi_temp = ARRAY_SIZE(NCT6796_REG_TSI_TEMP); + break; case nct6799: + data->in_num = 18; + data->ALARM_BITS = NCT6799_ALARM_BITS; + data->BEEP_BITS = NCT6799_BEEP_BITS; data->REG_TSI_TEMP = NCT6796_REG_TSI_TEMP; num_reg_tsi_temp = ARRAY_SIZE(NCT6796_REG_TSI_TEMP); break; diff --git a/drivers/hwmon/nct6775.h b/drivers/hwmon/nct6775.h index c752bc7bbe72..edcde39c4791 100644 --- a/drivers/hwmon/nct6775.h +++ b/drivers/hwmon/nct6775.h @@ -16,6 +16,7 @@ enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 }; #define NUM_REG_BEEP 5 /* Max number of beep registers */ #define NUM_FAN 7 +#define NUM_IN 18 struct nct6775_data { int addr; /* IO base of hw monitor block */ @@ -97,7 +98,7 @@ struct nct6775_data { /* Register values */ u8 bank; /* current register bank */ u8 in_num; /* number of in inputs we have */ - u8 in[15][3]; /* [0]=in, [1]=in_max, [2]=in_min */ + u8 in[NUM_IN][3]; /* [0]=in, [1]=in_max, [2]=in_min */ const u16 *scale_in; /* internal scaling factors */ unsigned int rpm[NUM_FAN]; u16 fan_min[NUM_FAN]; @@ -166,7 +167,7 @@ struct nct6775_data { u16 have_temp; u16 have_temp_fixed; u16 have_tsi_temp; - u16 have_in; + u32 have_in; /* Remember extra register values over suspend/resume */ u8 vbat; From 10a7a334d3a1f2d888a42a3c956813274ffb8a9c Mon Sep 17 00:00:00 2001 From: James Seo Date: Sat, 22 Jul 2023 10:25:13 -0700 Subject: [PATCH 574/656] hwmon: (hp-wmi-sensors) Get WMI instance count from WMI driver core Commit 2a2b13ae50cf ("platform/x86: wmi: Allow retrieving the number of WMI object instances") means we no longer need to find this ourselves. Signed-off-by: James Seo Link: https://lore.kernel.org/r/20230722172513.9324-2-james@equiv.tech Signed-off-by: Guenter Roeck --- drivers/hwmon/hp-wmi-sensors.c | 20 +++----------------- 1 file changed, 3 insertions(+), 17 deletions(-) diff --git a/drivers/hwmon/hp-wmi-sensors.c b/drivers/hwmon/hp-wmi-sensors.c index ebe2fb513480..3a99cc5f44b2 100644 --- a/drivers/hwmon/hp-wmi-sensors.c +++ b/drivers/hwmon/hp-wmi-sensors.c @@ -435,25 +435,11 @@ static union acpi_object *hp_wmi_get_wobj(const char *guid, u8 instance) /* hp_wmi_wobj_instance_count - find count of WMI object instances */ static u8 hp_wmi_wobj_instance_count(const char *guid) { - u8 hi = HP_WMI_MAX_INSTANCES; - union acpi_object *wobj; - u8 lo = 0; - u8 mid; + int count; - while (lo < hi) { - mid = (lo + hi) / 2; + count = wmi_instance_count(guid); - wobj = hp_wmi_get_wobj(guid, mid); - if (!wobj) { - hi = mid; - continue; - } - - lo = mid + 1; - kfree(wobj); - } - - return lo; + return clamp(count, 0, (int)HP_WMI_MAX_INSTANCES); } static int check_wobj(const union acpi_object *wobj, From 311cb3638e9c98e974dee03438c671b722154969 Mon Sep 17 00:00:00 2001 From: James Seo Date: Tue, 25 Jul 2023 02:48:17 -0700 Subject: [PATCH 575/656] hwmon: (hp-wmi-sensors) Initialize pevents in hp_wmi_sensors_init() The following warning is given by the Smatch static checker: drivers/hwmon/hp-wmi-sensors.c:1937 hp_wmi_sensors_init() error: uninitialized symbol 'pevents'. If there are no instances of the HPBIOS_PlatformEvents WMI object available, init_platform_events() never initializes this pointer, which may then be passed to hp_wmi_debugfs_init() uninitialized. The impact should be limited because hp_wmi_debugfs_init() uses this pointer only if the count of HPBIOS_PlatformEvents instances is _not_ zero, while conversely, it will be uninitialized only if the count of such instances _is_ zero. However, passing it uninitialized still constitutes a bug. Reported-by: Dan Carpenter Closes: https://lore.kernel.org/linux-hwmon/f72c129b-8c57-406a-bf41-bd889b65ea0f@moroto.mountain/ Signed-off-by: James Seo Link: https://lore.kernel.org/r/20230725094817.588640-1-james@equiv.tech Signed-off-by: Guenter Roeck --- drivers/hwmon/hp-wmi-sensors.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/hwmon/hp-wmi-sensors.c b/drivers/hwmon/hp-wmi-sensors.c index 3a99cc5f44b2..17ae62f88bbf 100644 --- a/drivers/hwmon/hp-wmi-sensors.c +++ b/drivers/hwmon/hp-wmi-sensors.c @@ -1913,7 +1913,7 @@ static bool add_event_handler(struct hp_wmi_sensors *state) static int hp_wmi_sensors_init(struct hp_wmi_sensors *state) { struct hp_wmi_info *connected[HP_WMI_MAX_INSTANCES]; - struct hp_wmi_platform_events *pevents; + struct hp_wmi_platform_events *pevents = NULL; struct device *dev = &state->wdev->dev; struct hp_wmi_info *info; struct device *hwdev; From 6ae8867ae31b202018b19959c32105213148878e Mon Sep 17 00:00:00 2001 From: Andre Werner Date: Wed, 26 Jul 2023 07:16:34 +0200 Subject: [PATCH 576/656] dt-bindings: hwmon: Add description for new hwmon sensor hs3001 Add binding for Renesas HS3001 Temperature and Relative Humidity Sensor. Signed-off-by: Andre Werner Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230726051635.9778-1-andre.werner@systec-electronic.com Signed-off-by: Guenter Roeck --- Documentation/devicetree/bindings/trivial-devices.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml index 6e24c4d25ec3..40bc475ee7e1 100644 --- a/Documentation/devicetree/bindings/trivial-devices.yaml +++ b/Documentation/devicetree/bindings/trivial-devices.yaml @@ -319,6 +319,8 @@ properties: - plx,pex8648 # Pulsedlight LIDAR range-finding sensor - pulsedlight,lidar-lite-v2 + # Renesas HS3001 Temperature and Relative Humidity Sensors + - renesas,hs3001 # Renesas ISL29501 time-of-flight sensor - renesas,isl29501 # Rohm DH2228FV From 43fbe66dc2164c03e7a58dfcf0ab737b2f12cc79 Mon Sep 17 00:00:00 2001 From: Andre Werner Date: Tue, 25 Jul 2023 06:22:07 +0200 Subject: [PATCH 577/656] hwmon: Add driver for Renesas HS3001 Add base support for Renesas HS3001 temperature and humidity sensors and its compatibles HS3002, HS3003 and HS3004. The sensor has a fix I2C address 0x44. The resolution is fixed to 14bit (ref. Missing feature). Missing feature: - Accessing non-volatile memory: Custom board has no possibility to control voltage supply of sensor. Thus, we cannot send the necessary control commands within the first 10ms after power-on. Signed-off-by: Andre Werner Link: https://lore.kernel.org/r/20230725042207.22310-2-andre.werner@systec-electronic.com [groeck: Cosmetic documentation fixup; added documentation to index; replaced probe_new with probe dropped unused variable] Signed-off-by: Guenter Roeck --- Documentation/hwmon/hs3001.rst | 37 +++++ Documentation/hwmon/index.rst | 1 + MAINTAINERS | 6 + drivers/hwmon/Kconfig | 10 ++ drivers/hwmon/Makefile | 1 + drivers/hwmon/hs3001.c | 242 +++++++++++++++++++++++++++++++++ 6 files changed, 297 insertions(+) create mode 100644 Documentation/hwmon/hs3001.rst create mode 100644 drivers/hwmon/hs3001.c diff --git a/Documentation/hwmon/hs3001.rst b/Documentation/hwmon/hs3001.rst new file mode 100644 index 000000000000..9f59dfc212d9 --- /dev/null +++ b/Documentation/hwmon/hs3001.rst @@ -0,0 +1,37 @@ +.. SPDX-License-Identifier: GPL-2.0-or-later + +Kernel driver HS3001 +==================== + +Supported chips: + + * Renesas HS3001, HS3002, HS3003, HS3004 + + Prefix: 'hs3001' + + Addresses scanned: - + + Datasheet: https://www.renesas.com/us/en/document/dst/hs300x-datasheet?r=417401 + +Author: + + - Andre Werner + +Description +----------- + +This driver implements support for the Renesas HS3001 chips, a humidity +and temperature family. Temperature is measured in degrees celsius, relative +humidity is expressed as a percentage. In the sysfs interface, all values are +scaled by 1000, i.e. the value for 31.5 degrees celsius is 31500. + +The device communicates with the I2C protocol. Sensors have the I2C +address 0x44 by default. + +sysfs-Interface +--------------- + +=================== ================= +temp1_input: temperature input +humidity1_input: humidity input +=================== ================= diff --git a/Documentation/hwmon/index.rst b/Documentation/hwmon/index.rst index d11924667f76..88dadea85cfc 100644 --- a/Documentation/hwmon/index.rst +++ b/Documentation/hwmon/index.rst @@ -78,6 +78,7 @@ Hardware Monitoring Kernel Drivers gxp-fan-ctrl hih6130 hp-wmi-sensors + hs3001 ibmaem ibm-cffps ibmpowernv diff --git a/MAINTAINERS b/MAINTAINERS index 080e39424343..2c163adcda2d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -9497,6 +9497,12 @@ S: Maintained W: http://artax.karlin.mff.cuni.cz/~mikulas/vyplody/hpfs/index-e.cgi F: fs/hpfs/ +HS3001 Hardware Temperature and Humidity Sensor +M: Andre Werner +L: linux-hwmon@vger.kernel.org +S: Maintained +F: drivers/hwmon/hs3001.c + HSI SUBSYSTEM M: Sebastian Reichel S: Maintained diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig index 2913299c2c9e..ec38c8892158 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig @@ -734,6 +734,16 @@ config SENSORS_HIH6130 This driver can also be built as a module. If so, the module will be called hih6130. +config SENSORS_HS3001 + tristate "Renesas HS3001 humidity and temperature sensors" + depends on I2C + help + If you say yes here you get support for the Renesas HS3001, + to HS3004 humidity and temperature sensors. + + This driver can also be built as a module. If so, the module + will be called hs3001. + config SENSORS_IBMAEM tristate "IBM Active Energy Manager temperature/power sensors and control" select IPMI_SI diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile index ff6bfd109c72..4ac9452b5430 100644 --- a/drivers/hwmon/Makefile +++ b/drivers/hwmon/Makefile @@ -86,6 +86,7 @@ obj-$(CONFIG_SENSORS_GSC) += gsc-hwmon.o obj-$(CONFIG_SENSORS_GPIO_FAN) += gpio-fan.o obj-$(CONFIG_SENSORS_GXP_FAN_CTRL) += gxp-fan-ctrl.o obj-$(CONFIG_SENSORS_HIH6130) += hih6130.o +obj-$(CONFIG_SENSORS_HS3001) += hs3001.o obj-$(CONFIG_SENSORS_ULTRA45) += ultra45_env.o obj-$(CONFIG_SENSORS_I5500) += i5500_temp.o obj-$(CONFIG_SENSORS_I5K_AMB) += i5k_amb.o diff --git a/drivers/hwmon/hs3001.c b/drivers/hwmon/hs3001.c new file mode 100644 index 000000000000..ac574e46d069 --- /dev/null +++ b/drivers/hwmon/hs3001.c @@ -0,0 +1,242 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * This is a non-complete driver implementation for the + * HS3001 humidity and temperature sensor and compatibles. It does not include + * the configuration possibilities, where it needs to be set to 'programming mode' + * during power-up. + * + * + * Copyright (C) 2023 SYS TEC electronic AG + * Author: Andre Werner + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Measurement times */ +#define HS3001_WAKEUP_TIME 100 /* us */ +#define HS3001_8BIT_RESOLUTION 550 /* us */ +#define HS3001_10BIT_RESOLUTION 1310 /* us */ +#define HS3001_12BIT_RESOLUTION 4500 /* us */ +#define HS3001_14BIT_RESOLUTION 16900 /* us */ + +#define HS3001_RESPONSE_LENGTH 4 + +#define HS3001_FIXPOINT_ARITH 1000U + +#define HS3001_MASK_HUMIDITY_0X3FFF GENMASK(13, 0) +#define HS3001_MASK_STATUS_0XC0 GENMASK(7, 6) + +/* Definitions for Status Bits of A/D Data */ +#define HS3001_DATA_VALID 0x00 /* Valid Data */ +#define HS3001_DATA_STALE 0x01 /* Stale Data */ + +struct hs3001_data { + struct i2c_client *client; + struct mutex i2c_lock; /* lock for sending i2c commands */ + u32 wait_time; /* in us */ + int temperature; /* in milli degree */ + u32 humidity; /* in milli % */ +}; + +static int hs3001_extract_temperature(u16 raw) +{ + /* fixpoint arithmetic 1 digit */ + u32 temp = (raw >> 2) * HS3001_FIXPOINT_ARITH * 165; + + temp /= (1 << 14) - 1; + + return (int)temp - 40 * HS3001_FIXPOINT_ARITH; +} + +static u32 hs3001_extract_humidity(u16 raw) +{ + u32 hum = (raw & HS3001_MASK_HUMIDITY_0X3FFF) * HS3001_FIXPOINT_ARITH * 100; + + return hum /= (1 << 14) - 1; +} + +static int hs3001_data_fetch_command(struct i2c_client *client, + struct hs3001_data *data) +{ + int ret; + u8 buf[HS3001_RESPONSE_LENGTH]; + u8 hs3001_status; + + ret = i2c_master_recv(client, buf, HS3001_RESPONSE_LENGTH); + if (ret != HS3001_RESPONSE_LENGTH) { + ret = ret < 0 ? ret : -EIO; + dev_dbg(&client->dev, + "Error in i2c communication. Error code: %d.\n", ret); + return ret; + } + + hs3001_status = FIELD_GET(HS3001_MASK_STATUS_0XC0, buf[0]); + if (hs3001_status == HS3001_DATA_STALE) { + dev_dbg(&client->dev, "Sensor busy.\n"); + return -EBUSY; + } + if (hs3001_status != HS3001_DATA_VALID) { + dev_dbg(&client->dev, "Data invalid.\n"); + return -EIO; + } + + data->humidity = + hs3001_extract_humidity(be16_to_cpup((__be16 *)&buf[0])); + data->temperature = + hs3001_extract_temperature(be16_to_cpup((__be16 *)&buf[2])); + + return 0; +} + +static umode_t hs3001_is_visible(const void *data, enum hwmon_sensor_types type, + u32 attr, int channel) +{ + /* Both, humidity and temperature can only be read. */ + return 0444; +} + +static int hs3001_read(struct device *dev, enum hwmon_sensor_types type, + u32 attr, int channel, long *val) +{ + struct hs3001_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->client; + int ret; + + mutex_lock(&data->i2c_lock); + ret = i2c_master_send(client, NULL, 0); + if (ret < 0) { + mutex_unlock(&data->i2c_lock); + return ret; + } + + /* + * Sensor needs some time to process measurement depending on + * resolution (ref. datasheet) + */ + fsleep(data->wait_time); + + ret = hs3001_data_fetch_command(client, data); + mutex_unlock(&data->i2c_lock); + + if (ret < 0) + return ret; + + switch (type) { + case hwmon_temp: + switch (attr) { + case hwmon_temp_input: + *val = data->temperature; + break; + default: + return -EINVAL; + } + break; + case hwmon_humidity: + switch (attr) { + case hwmon_humidity_input: + *val = data->humidity; + break; + default: + return -EINVAL; + } + break; + default: + return -EINVAL; + } + + return 0; +} + +static const struct hwmon_channel_info *hs3001_info[] = { + HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT), + HWMON_CHANNEL_INFO(humidity, HWMON_H_INPUT), + NULL +}; + +static const struct hwmon_ops hs3001_hwmon_ops = { + .is_visible = hs3001_is_visible, + .read = hs3001_read, +}; + +static const struct hwmon_chip_info hs3001_chip_info = { + .ops = &hs3001_hwmon_ops, + .info = hs3001_info, +}; + +/* device ID table */ +static const struct i2c_device_id hs3001_ids[] = { + { "hs3001", 0 }, + { }, +}; + +MODULE_DEVICE_TABLE(i2c, hs3001_ids); + +static const struct of_device_id hs3001_of_match[] = { + {.compatible = "renesas,hs3001"}, + { }, +}; + +MODULE_DEVICE_TABLE(of, hs3001_of_match); + +static int hs3001_probe(struct i2c_client *client) +{ + struct hs3001_data *data; + struct device *hwmon_dev; + struct device *dev = &client->dev; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) + return -EOPNOTSUPP; + + data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + data->client = client; + + /* + * Measurement time = wake-up time + measurement time temperature + * + measurement time humidity. This is currently static, because + * enabling programming mode is not supported, yet. + */ + data->wait_time = (HS3001_WAKEUP_TIME + HS3001_14BIT_RESOLUTION + + HS3001_14BIT_RESOLUTION); + + mutex_init(&data->i2c_lock); + + hwmon_dev = devm_hwmon_device_register_with_info(dev, + client->name, + data, + &hs3001_chip_info, + NULL); + + if (IS_ERR(hwmon_dev)) + return dev_err_probe(dev, PTR_ERR(hwmon_dev), + "Unable to register hwmon device.\n"); + + return 0; +} + +static struct i2c_driver hs3001_i2c_driver = { + .driver = { + .name = "hs3001", + .of_match_table = hs3001_of_match, + }, + .probe = hs3001_probe, + .id_table = hs3001_ids, +}; + +module_i2c_driver(hs3001_i2c_driver); + +MODULE_AUTHOR("Andre Werner "); +MODULE_DESCRIPTION("HS3001 humidity and temperature sensor base driver"); +MODULE_LICENSE("GPL"); From b7f1f7b2523a6a4382f12fe953380b847b80e09d Mon Sep 17 00:00:00 2001 From: Ahmad Khalifa Date: Wed, 2 Aug 2023 19:58:21 +0100 Subject: [PATCH 578/656] hwmon: (nct6775) Additional TEMP registers for nct6799 Additional TEMP registers for nct6798d, nct6799d-r and nct6796d-s This allows the max/max_hyst/crit attributes to be shown/stored * Increase NUM_TEMP from 10 to 12 * Separate TEMP/MON_TEMP/OVER/HYST/CRIT registers * Rename "PECI Calibration" to include "TSI" too * Update ALARM/BEEP bits for temps for 6799 * For 6799, keep temp_fixed_num at 6, but increase num_temp_alarms/num_temp_beeps to 7/8 Tested with NCT6799D-R showing additional sysfs attributes: * temp3-temp8: max/max_hyst/beep/alarm * temp3-temp6: crit/offset Signed-off-by: Ahmad Khalifa Link: https://lore.kernel.org/r/20230802185820.3642399-1-ahmad@khalifa.ws [groeck: Addressed cosmetic checkpatch complaints] Signed-off-by: Guenter Roeck --- drivers/hwmon/nct6775-core.c | 150 ++++++++++++++++++++++++++++------- drivers/hwmon/nct6775.h | 2 +- 2 files changed, 121 insertions(+), 31 deletions(-) diff --git a/drivers/hwmon/nct6775-core.c b/drivers/hwmon/nct6775-core.c index 33533d95cf48..02a71244fc3b 100644 --- a/drivers/hwmon/nct6775-core.c +++ b/drivers/hwmon/nct6775-core.c @@ -617,6 +617,28 @@ static const char *const nct6796_temp_label[] = { static const u16 NCT6796_REG_TSI_TEMP[] = { 0x409, 0x40b }; +static const u16 NCT6798_REG_TEMP[] = { + 0x27, 0x150, 0x670, 0x672, 0x674, 0x676, 0x678, 0x67a}; + +static const u16 NCT6798_REG_TEMP_SOURCE[] = { + 0x621, 0x622, 0xc26, 0xc27, 0xc28, 0xc29, 0xc2a, 0xc2b }; + +static const u16 NCT6798_REG_TEMP_MON[] = { + 0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d, 0x4a0 }; +static const u16 NCT6798_REG_TEMP_OVER[] = { + 0x39, 0x155, 0xc1a, 0xc1b, 0xc1c, 0xc1d, 0xc1e, 0xc1f }; +static const u16 NCT6798_REG_TEMP_HYST[] = { + 0x3a, 0x153, 0xc20, 0xc21, 0xc22, 0xc23, 0xc24, 0xc25 }; + +static const u16 NCT6798_REG_TEMP_CRIT[32] = { + 0x135, 0x235, 0x335, 0x835, 0x935, 0xa35, 0xb35, 0 }; + +static const u16 NCT6798_REG_TEMP_ALTERNATE[32] = { + 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0x496, 0, + 0, 0, 0, 0, 0x4a2, 0, 0, 0, + 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407, + 0x408, 0x419, 0x41a, 0x4f4, 0x4f5 }; + static const char *const nct6798_temp_label[] = { "", "SYSTIN", @@ -655,11 +677,14 @@ static const char *const nct6798_temp_label[] = { #define NCT6798_TEMP_MASK 0xbfff0ffe #define NCT6798_VIRT_TEMP_MASK 0x80000c00 +static const u16 NCT6799_REG_ALARM[NUM_REG_ALARM] = { + 0x459, 0x45A, 0x45B, 0x568, 0x45D, 0xc01 }; + static const s8 NCT6799_ALARM_BITS[NUM_ALARM_BITS] = { 0, 1, 2, 3, 8, -1, 20, 16, 17, 24, 25, 26, /* in0-in11 */ 27, 28, 29, 30, 31, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 6, 7, 11, 10, 23, 33, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ - 4, 5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ + 4, 5, 40, 41, 42, 43, 44, -1, -1, -1, -1, -1, /* temp1-temp12 */ 12, 9, /* intr0-intr1 */ }; @@ -667,10 +692,11 @@ static const s8 NCT6799_BEEP_BITS[NUM_BEEP_BITS] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, /* in0-in11 */ 12, 13, 14, 15, 34, 35, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 25, 26, 27, 28, 29, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ - 16, 17, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ + 16, 17, 18, 19, 20, 21, 22, 23, -1, -1, -1, -1, /* temp1-temp12 */ 30, 31, 24 /* intr0-intr1, beep_en */ }; +/* PECI Calibration only for NCT6799D, not NCT6796D-S */ static const char *const nct6799_temp_label[] = { "", "SYSTIN", @@ -700,8 +726,8 @@ static const char *const nct6799_temp_label[] = { "Agent1 Dimm1", "BYTE_TEMP0", "BYTE_TEMP1", - "PECI Agent 0 Calibration", /* undocumented */ - "PECI Agent 1 Calibration", /* undocumented */ + "PECI/TSI Agent 0 Calibration", + "PECI/TSI Agent 1 Calibration", "", "Virtual_TEMP" }; @@ -3869,13 +3895,9 @@ int nct6775_probe(struct device *dev, struct nct6775_data *data, case nct6795: case nct6796: case nct6797: - case nct6798: - case nct6799: data->in_num = 15; data->pwm_num = (data->kind == nct6796 || - data->kind == nct6797 || - data->kind == nct6798 || - data->kind == nct6799) ? 7 : 6; + data->kind == nct6797) ? 7 : 6; data->auto_pwm_num = 4; data->has_fan_div = false; data->temp_fixed_num = 6; @@ -3919,16 +3941,6 @@ int nct6775_probe(struct device *dev, struct nct6775_data *data, data->temp_mask = NCT6796_TEMP_MASK; data->virt_temp_mask = NCT6796_VIRT_TEMP_MASK; break; - case nct6798: - data->temp_label = nct6798_temp_label; - data->temp_mask = NCT6798_TEMP_MASK; - data->virt_temp_mask = NCT6798_VIRT_TEMP_MASK; - break; - case nct6799: - data->temp_label = nct6799_temp_label; - data->temp_mask = NCT6799_TEMP_MASK; - data->virt_temp_mask = NCT6799_VIRT_TEMP_MASK; - break; } data->REG_CONFIG = NCT6775_REG_CONFIG; @@ -3987,14 +3999,6 @@ int nct6775_probe(struct device *dev, struct nct6775_data *data, case nct6795: case nct6796: case nct6797: - case nct6798: - data->REG_TSI_TEMP = NCT6796_REG_TSI_TEMP; - num_reg_tsi_temp = ARRAY_SIZE(NCT6796_REG_TSI_TEMP); - break; - case nct6799: - data->in_num = 18; - data->ALARM_BITS = NCT6799_ALARM_BITS; - data->BEEP_BITS = NCT6799_BEEP_BITS; data->REG_TSI_TEMP = NCT6796_REG_TSI_TEMP; num_reg_tsi_temp = ARRAY_SIZE(NCT6796_REG_TSI_TEMP); break; @@ -4003,9 +4007,6 @@ int nct6775_probe(struct device *dev, struct nct6775_data *data, break; } - if (data->kind == nct6798 || data->kind == nct6799) - data->scale_in = scale_in_6798; - reg_temp = NCT6779_REG_TEMP; num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP); if (data->kind == nct6791) { @@ -4021,6 +4022,95 @@ int nct6775_probe(struct device *dev, struct nct6775_data *data, reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE; reg_temp_crit = NCT6779_REG_TEMP_CRIT; + break; + case nct6798: + case nct6799: + data->in_num = data->kind == nct6799 ? 18 : 15; + data->scale_in = scale_in_6798; + data->pwm_num = 7; + data->auto_pwm_num = 4; + data->has_fan_div = false; + data->temp_fixed_num = 6; + data->num_temp_alarms = 7; + data->num_temp_beeps = 8; + + data->ALARM_BITS = NCT6799_ALARM_BITS; + data->BEEP_BITS = NCT6799_BEEP_BITS; + + data->fan_from_reg = fan_from_reg_rpm; + data->fan_from_reg_min = fan_from_reg13; + data->target_temp_mask = 0xff; + data->tolerance_mask = 0x07; + data->speed_tolerance_limit = 63; + + switch (data->kind) { + default: + case nct6798: + data->temp_label = nct6798_temp_label; + data->temp_mask = NCT6798_TEMP_MASK; + data->virt_temp_mask = NCT6798_VIRT_TEMP_MASK; + break; + case nct6799: + data->temp_label = nct6799_temp_label; + data->temp_mask = NCT6799_TEMP_MASK; + data->virt_temp_mask = NCT6799_VIRT_TEMP_MASK; + break; + } + + data->REG_CONFIG = NCT6775_REG_CONFIG; + data->REG_VBAT = NCT6775_REG_VBAT; + data->REG_DIODE = NCT6775_REG_DIODE; + data->DIODE_MASK = NCT6775_DIODE_MASK; + data->REG_VIN = NCT6779_REG_IN; + data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN; + data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX; + data->REG_TARGET = NCT6775_REG_TARGET; + data->REG_FAN = NCT6779_REG_FAN; + data->REG_FAN_MODE = NCT6775_REG_FAN_MODE; + data->REG_FAN_MIN = NCT6776_REG_FAN_MIN; + data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES; + data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT; + data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME; + data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME; + data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME; + data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H; + data->REG_PWM[0] = NCT6775_REG_PWM; + data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT; + data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT; + data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP; + data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE; + data->REG_PWM_READ = NCT6775_REG_PWM_READ; + data->REG_PWM_MODE = NCT6776_REG_PWM_MODE; + data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK; + data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP; + data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM; + data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP; + data->REG_CRITICAL_TEMP_TOLERANCE = NCT6775_REG_CRITICAL_TEMP_TOLERANCE; + data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE; + data->CRITICAL_PWM_ENABLE_MASK = NCT6779_CRITICAL_PWM_ENABLE_MASK; + data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM; + data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET; + data->REG_TEMP_SOURCE = NCT6798_REG_TEMP_SOURCE; + data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL; + data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL; + data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP; + data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL; + data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE; + data->REG_ALARM = NCT6799_REG_ALARM; + data->REG_BEEP = NCT6792_REG_BEEP; + data->REG_TSI_TEMP = NCT6796_REG_TSI_TEMP; + num_reg_tsi_temp = ARRAY_SIZE(NCT6796_REG_TSI_TEMP); + + reg_temp = NCT6798_REG_TEMP; + num_reg_temp = ARRAY_SIZE(NCT6798_REG_TEMP); + reg_temp_mon = NCT6798_REG_TEMP_MON; + num_reg_temp_mon = ARRAY_SIZE(NCT6798_REG_TEMP_MON); + reg_temp_over = NCT6798_REG_TEMP_OVER; + reg_temp_hyst = NCT6798_REG_TEMP_HYST; + reg_temp_config = NCT6779_REG_TEMP_CONFIG; + reg_temp_alternate = NCT6798_REG_TEMP_ALTERNATE; + reg_temp_crit = NCT6798_REG_TEMP_CRIT; + break; default: return -ENODEV; diff --git a/drivers/hwmon/nct6775.h b/drivers/hwmon/nct6775.h index edcde39c4791..296eff99d003 100644 --- a/drivers/hwmon/nct6775.h +++ b/drivers/hwmon/nct6775.h @@ -8,7 +8,7 @@ enum kinds { nct6106, nct6116, nct6775, nct6776, nct6779, nct6791, nct6792, nct6793, nct6795, nct6796, nct6797, nct6798, nct6799 }; enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 }; -#define NUM_TEMP 10 /* Max number of temp attribute sets w/ limits*/ +#define NUM_TEMP 12 /* Max number of temp attribute sets w/ limits*/ #define NUM_TEMP_FIXED 6 /* Max number of fixed temp attribute sets */ #define NUM_TSI_TEMP 8 /* Max number of TSI temp register pairs */ From f11e27383c1223620264044442b8abb23bdb1c9f Mon Sep 17 00:00:00 2001 From: Naresh Solanki Date: Thu, 3 Aug 2023 16:44:00 +0200 Subject: [PATCH 579/656] hwmon: (max6639) Add compatible string Use maxim,max6639 as compatible string for the driver. Signed-off-by: Naresh Solanki Link: https://lore.kernel.org/r/20230803144401.1151065-2-Naresh.Solanki@9elements.com Signed-off-by: Guenter Roeck --- drivers/hwmon/max6639.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/hwmon/max6639.c b/drivers/hwmon/max6639.c index caf527154fca..aa7f21ab2395 100644 --- a/drivers/hwmon/max6639.c +++ b/drivers/hwmon/max6639.c @@ -618,11 +618,17 @@ MODULE_DEVICE_TABLE(i2c, max6639_id); static DEFINE_SIMPLE_DEV_PM_OPS(max6639_pm_ops, max6639_suspend, max6639_resume); +static const struct of_device_id max6639_of_match[] = { + { .compatible = "maxim,max6639", }, + { }, +}; + static struct i2c_driver max6639_driver = { .class = I2C_CLASS_HWMON, .driver = { .name = "max6639", .pm = pm_sleep_ptr(&max6639_pm_ops), + .of_match_table = max6639_of_match, }, .probe = max6639_probe, .id_table = max6639_id, From 3fc59546a6412374d5dc4d0e127ead6b85ed7f6e Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 10 Aug 2023 11:31:43 +0200 Subject: [PATCH 580/656] hwmon: (adt7475) fix Wvoid-pointer-to-enum-cast warning 'chip' is an enum, thus cast of pointer on 64-bit compile test with W=1 causes: adt7475.c:1655:10: error: cast to smaller integer type 'enum chips' from 'const void *' [-Werror,-Wvoid-pointer-to-enum-cast] Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230810093157.94244-1-krzysztof.kozlowski@linaro.org Signed-off-by: Guenter Roeck --- drivers/hwmon/adt7475.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/hwmon/adt7475.c b/drivers/hwmon/adt7475.c index 5363254644da..03acadc3a6cb 100644 --- a/drivers/hwmon/adt7475.c +++ b/drivers/hwmon/adt7475.c @@ -1652,7 +1652,7 @@ static int adt7475_probe(struct i2c_client *client) i2c_set_clientdata(client, data); if (client->dev.of_node) - chip = (enum chips)of_device_get_match_data(&client->dev); + chip = (uintptr_t)of_device_get_match_data(&client->dev); else chip = id->driver_data; From c8b73e42f5bbc9ac134192d57bcc19ff225c95ad Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 10 Aug 2023 11:31:44 +0200 Subject: [PATCH 581/656] hwmon: (ad7418) fix Wvoid-pointer-to-enum-cast warning 'type' is an enum, thus cast of pointer on 64-bit compile test with W=1 causes: ad7418.c:256:16: error: cast to smaller integer type 'enum chips' from 'const void *' [-Werror,-Wvoid-pointer-to-enum-cast] Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230810093157.94244-2-krzysztof.kozlowski@linaro.org Signed-off-by: Guenter Roeck --- drivers/hwmon/ad7418.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/hwmon/ad7418.c b/drivers/hwmon/ad7418.c index bcea66eac82b..4829f83ff52e 100644 --- a/drivers/hwmon/ad7418.c +++ b/drivers/hwmon/ad7418.c @@ -253,7 +253,7 @@ static int ad7418_probe(struct i2c_client *client) mutex_init(&data->lock); data->client = client; if (dev->of_node) - data->type = (enum chips)of_device_get_match_data(dev); + data->type = (uintptr_t)of_device_get_match_data(dev); else data->type = i2c_match_id(ad7418_id, client)->driver_data; From 3ff0befaefeffd92c828b961ba3a582490bab777 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 10 Aug 2023 11:31:45 +0200 Subject: [PATCH 582/656] hwmon: (ads7828) fix Wvoid-pointer-to-enum-cast warning 'chip' is an enum, thus cast of pointer on 64-bit compile test with W=1 causes: ads7828.c:142:10: error: cast to smaller integer type 'enum ads7828_chips' from 'const void *' [-Werror,-Wvoid-pointer-to-enum-cast] Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230810093157.94244-3-krzysztof.kozlowski@linaro.org Signed-off-by: Guenter Roeck --- drivers/hwmon/ads7828.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/hwmon/ads7828.c b/drivers/hwmon/ads7828.c index e86894e35639..809e830f52a6 100644 --- a/drivers/hwmon/ads7828.c +++ b/drivers/hwmon/ads7828.c @@ -139,8 +139,7 @@ static int ads7828_probe(struct i2c_client *client) } if (client->dev.of_node) - chip = (enum ads7828_chips) - of_device_get_match_data(&client->dev); + chip = (uintptr_t)of_device_get_match_data(&client->dev); else chip = i2c_match_id(ads7828_device_ids, client)->driver_data; From 4a2a41dfff69ddc2bf9f1ac76fd7e98ab982f105 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 10 Aug 2023 11:31:46 +0200 Subject: [PATCH 583/656] hwmon: (ina2xx) fix Wvoid-pointer-to-enum-cast warning 'chip' is an enum, thus cast of pointer on 64-bit compile test with W=1 causes: ina2xx.c:627:10: error: cast to smaller integer type 'enum ina2xx_ids' from 'const void *' [-Werror,-Wvoid-pointer-to-enum-cast] Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230810093157.94244-4-krzysztof.kozlowski@linaro.org Signed-off-by: Guenter Roeck --- drivers/hwmon/ina2xx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/hwmon/ina2xx.c b/drivers/hwmon/ina2xx.c index a47973e2d606..d8415d1f21fc 100644 --- a/drivers/hwmon/ina2xx.c +++ b/drivers/hwmon/ina2xx.c @@ -624,7 +624,7 @@ static int ina2xx_probe(struct i2c_client *client) enum ina2xx_ids chip; if (client->dev.of_node) - chip = (enum ina2xx_ids)of_device_get_match_data(&client->dev); + chip = (uintptr_t)of_device_get_match_data(&client->dev); else chip = i2c_match_id(ina2xx_id, client)->driver_data; From d96e79d00ffbdac475a46e7e25d201b94e8dcea2 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 10 Aug 2023 11:31:47 +0200 Subject: [PATCH 584/656] hwmon: (lm63) fix Wvoid-pointer-to-enum-cast warning 'kind' is an enum, thus cast of pointer on 64-bit compile test with W=1 causes: lm63.c:1108:16: error: cast to smaller integer type 'enum chips' from 'const void *' [-Werror,-Wvoid-pointer-to-enum-cast] Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230810093157.94244-5-krzysztof.kozlowski@linaro.org Signed-off-by: Guenter Roeck --- drivers/hwmon/lm63.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/hwmon/lm63.c b/drivers/hwmon/lm63.c index 562c94c7d831..0878a044dd8e 100644 --- a/drivers/hwmon/lm63.c +++ b/drivers/hwmon/lm63.c @@ -1105,7 +1105,7 @@ static int lm63_probe(struct i2c_client *client) /* Set the device type */ if (client->dev.of_node) - data->kind = (enum chips)of_device_get_match_data(&client->dev); + data->kind = (uintptr_t)of_device_get_match_data(&client->dev); else data->kind = i2c_match_id(lm63_id, client)->driver_data; if (data->kind == lm64) From c7e07faa48512f4beafef54b144a1e6df25c727f Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 10 Aug 2023 11:31:48 +0200 Subject: [PATCH 585/656] hwmon: (lm75) fix Wvoid-pointer-to-enum-cast warning 'kind' is an enum, thus cast of pointer on 64-bit compile test with W=1 causes: lm75.c:581:10: error: cast to smaller integer type 'enum lm75_type' from 'const void *' [-Werror,-Wvoid-pointer-to-enum-cast] Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230810093157.94244-6-krzysztof.kozlowski@linaro.org Signed-off-by: Guenter Roeck --- drivers/hwmon/lm75.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/hwmon/lm75.c b/drivers/hwmon/lm75.c index bcfa8193e5e7..5b2ea05c951e 100644 --- a/drivers/hwmon/lm75.c +++ b/drivers/hwmon/lm75.c @@ -578,7 +578,7 @@ static int lm75_probe(struct i2c_client *client) enum lm75_type kind; if (client->dev.of_node) - kind = (enum lm75_type)of_device_get_match_data(&client->dev); + kind = (uintptr_t)of_device_get_match_data(&client->dev); else kind = i2c_match_id(lm75_ids, client)->driver_data; From 8d84910a27ddd5c4a83df712424b7cab4ed95d3d Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 10 Aug 2023 11:31:49 +0200 Subject: [PATCH 586/656] hwmon: (lm85) fix Wvoid-pointer-to-enum-cast warning 'type' is an enum, thus cast of pointer on 64-bit compile test with W=1 causes: lm85.c:1562:16: error: cast to smaller integer type 'enum chips' from 'const void *' [-Werror,-Wvoid-pointer-to-enum-cast] Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230810093157.94244-7-krzysztof.kozlowski@linaro.org Signed-off-by: Guenter Roeck --- drivers/hwmon/lm85.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/hwmon/lm85.c b/drivers/hwmon/lm85.c index 2a62ea7b25a9..68c210002357 100644 --- a/drivers/hwmon/lm85.c +++ b/drivers/hwmon/lm85.c @@ -1559,7 +1559,7 @@ static int lm85_probe(struct i2c_client *client) data->client = client; if (client->dev.of_node) - data->type = (enum chips)of_device_get_match_data(&client->dev); + data->type = (uintptr_t)of_device_get_match_data(&client->dev); else data->type = i2c_match_id(lm85_id, client)->driver_data; mutex_init(&data->update_lock); From 1ef2ebf2631221cf6ee975be81e95cb512f43346 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 10 Aug 2023 11:31:50 +0200 Subject: [PATCH 587/656] hwmon: (lm90) fix Wvoid-pointer-to-enum-cast warning 'kind' is an enum, thus cast of pointer on 64-bit compile test with W=1 causes: lm90.c:2768:16: error: cast to smaller integer type 'enum chips' from 'const void *' [-Werror,-Wvoid-pointer-to-enum-cast] Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230810093157.94244-8-krzysztof.kozlowski@linaro.org Signed-off-by: Guenter Roeck --- drivers/hwmon/lm90.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index b25ae8b7ec90..e0d7454a301c 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -2765,7 +2765,7 @@ static int lm90_probe(struct i2c_client *client) /* Set the device type */ if (client->dev.of_node) - data->kind = (enum chips)of_device_get_match_data(&client->dev); + data->kind = (uintptr_t)of_device_get_match_data(&client->dev); else data->kind = i2c_match_id(lm90_id, client)->driver_data; From 026738ecd077c83737ec87ecda2fb350c2bcebae Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 10 Aug 2023 11:31:51 +0200 Subject: [PATCH 588/656] hwmon: (max20730) fix Wvoid-pointer-to-enum-cast warning 'chip_id' is an enum, thus cast of pointer on 64-bit compile test with W=1 causes: max20730.c:719:13: error: cast to smaller integer type 'enum chips' from 'const void *' [-Werror,-Wvoid-pointer-to-enum-cast] Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230810093157.94244-9-krzysztof.kozlowski@linaro.org Signed-off-by: Guenter Roeck --- drivers/hwmon/pmbus/max20730.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/hwmon/pmbus/max20730.c b/drivers/hwmon/pmbus/max20730.c index 6df4c5b75bdc..d56ec24764fd 100644 --- a/drivers/hwmon/pmbus/max20730.c +++ b/drivers/hwmon/pmbus/max20730.c @@ -716,7 +716,7 @@ static int max20730_probe(struct i2c_client *client) } if (client->dev.of_node) - chip_id = (enum chips)of_device_get_match_data(dev); + chip_id = (uintptr_t)of_device_get_match_data(dev); else chip_id = i2c_match_id(max20730_id, client)->driver_data; From d6f09471b331e1f8bf5eb8f1ecde4f62ddee8352 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 10 Aug 2023 11:31:52 +0200 Subject: [PATCH 589/656] hwmon: (max6697) fix Wvoid-pointer-to-enum-cast warning 'type' is an enum, thus cast of pointer on 64-bit compile test with W=1 causes: max6697.c:705:16: error: cast to smaller integer type 'enum chips' from 'const void *' [-Werror,-Wvoid-pointer-to-enum-cast] Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230810093157.94244-10-krzysztof.kozlowski@linaro.org Signed-off-by: Guenter Roeck --- drivers/hwmon/max6697.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/hwmon/max6697.c b/drivers/hwmon/max6697.c index fe826fcf9990..7d10dd434f2e 100644 --- a/drivers/hwmon/max6697.c +++ b/drivers/hwmon/max6697.c @@ -702,7 +702,7 @@ static int max6697_probe(struct i2c_client *client) return -ENOMEM; if (client->dev.of_node) - data->type = (enum chips)of_device_get_match_data(&client->dev); + data->type = (uintptr_t)of_device_get_match_data(&client->dev); else data->type = i2c_match_id(max6697_id, client)->driver_data; data->chip = &max6697_chip_data[data->type]; From 58aec51df895c456b6057531e9ee959131b7efda Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 10 Aug 2023 11:31:53 +0200 Subject: [PATCH 590/656] hwmon: (tmp513) fix Wvoid-pointer-to-enum-cast warning 'id' is an enum, thus cast of pointer on 64-bit compile test with W=1 causes: tmp513.c:724:14: error: cast to smaller integer type 'enum tmp51x_ids' from 'const void *' [-Werror,-Wvoid-pointer-to-enum-cast] Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230810093157.94244-11-krzysztof.kozlowski@linaro.org Signed-off-by: Guenter Roeck --- drivers/hwmon/tmp513.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/hwmon/tmp513.c b/drivers/hwmon/tmp513.c index bff10f4b56e1..7db5d0fc24a4 100644 --- a/drivers/hwmon/tmp513.c +++ b/drivers/hwmon/tmp513.c @@ -721,7 +721,7 @@ static int tmp51x_probe(struct i2c_client *client) return -ENOMEM; if (client->dev.of_node) - data->id = (enum tmp51x_ids)device_get_match_data(&client->dev); + data->id = (uintptr_t)device_get_match_data(&client->dev); else data->id = i2c_match_id(tmp51x_id, client)->driver_data; From 45f980cae3224022f9a1827d57b6732302c0734a Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 10 Aug 2023 11:31:54 +0200 Subject: [PATCH 591/656] hwmon: (pmbus/ibm-cffps) fix Wvoid-pointer-to-enum-cast warning 'vs' is an enum, thus cast of pointer on 64-bit compile test with W=1 causes: ibm-cffps.c:492:8: error: cast to smaller integer type 'enum versions' from 'const void *' [-Werror,-Wvoid-pointer-to-enum-cast] Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230810093157.94244-12-krzysztof.kozlowski@linaro.org Signed-off-by: Guenter Roeck --- drivers/hwmon/pmbus/ibm-cffps.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/hwmon/pmbus/ibm-cffps.c b/drivers/hwmon/pmbus/ibm-cffps.c index 5b11aacda4d2..1ba4c5e95820 100644 --- a/drivers/hwmon/pmbus/ibm-cffps.c +++ b/drivers/hwmon/pmbus/ibm-cffps.c @@ -489,7 +489,7 @@ static int ibm_cffps_probe(struct i2c_client *client) const struct i2c_device_id *id; if (md) { - vs = (enum versions)md; + vs = (uintptr_t)md; } else { id = i2c_match_id(ibm_cffps_id, client); if (id) From 30572c7b086745c3411c1a580319a99eda7a7a56 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 10 Aug 2023 11:31:55 +0200 Subject: [PATCH 592/656] hwmon: (pmbus/tps53679) fix Wvoid-pointer-to-enum-cast warning 'chip_id' is an enum, thus cast of pointer on 64-bit compile test with W=1 causes: tps53679.c:238:13: error: cast to smaller integer type 'enum chips' from 'const void *' [-Werror,-Wvoid-pointer-to-enum-cast] Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230810093157.94244-13-krzysztof.kozlowski@linaro.org Signed-off-by: Guenter Roeck --- drivers/hwmon/pmbus/tps53679.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/hwmon/pmbus/tps53679.c b/drivers/hwmon/pmbus/tps53679.c index e77b12f342b4..5c9466244d70 100644 --- a/drivers/hwmon/pmbus/tps53679.c +++ b/drivers/hwmon/pmbus/tps53679.c @@ -235,7 +235,7 @@ static int tps53679_probe(struct i2c_client *client) enum chips chip_id; if (dev->of_node) - chip_id = (enum chips)of_device_get_match_data(dev); + chip_id = (uintptr_t)of_device_get_match_data(dev); else chip_id = i2c_match_id(tps53679_id, client)->driver_data; From d29b763c0a047c8b31d0e63575b2a2c4c498214a Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 10 Aug 2023 11:31:56 +0200 Subject: [PATCH 593/656] hwmon: (pmbus/ucd9000) fix Wvoid-pointer-to-enum-cast warning 'chip' is an enum, thus cast of pointer on 64-bit compile test with W=1 causes: ucd9000.c:591:10: error: cast to smaller integer type 'enum chips' from 'const void *' [-Werror,-Wvoid-pointer-to-enum-cast] Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230810093157.94244-14-krzysztof.kozlowski@linaro.org Signed-off-by: Guenter Roeck --- drivers/hwmon/pmbus/ucd9000.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/hwmon/pmbus/ucd9000.c b/drivers/hwmon/pmbus/ucd9000.c index b1d1d4214e69..8d9d422450e5 100644 --- a/drivers/hwmon/pmbus/ucd9000.c +++ b/drivers/hwmon/pmbus/ucd9000.c @@ -588,7 +588,7 @@ static int ucd9000_probe(struct i2c_client *client) } if (client->dev.of_node) - chip = (enum chips)of_device_get_match_data(&client->dev); + chip = (uintptr_t)of_device_get_match_data(&client->dev); else chip = mid->driver_data; From 1030892c4427e503b32ec46f88179e9138cdbf4e Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 10 Aug 2023 11:31:57 +0200 Subject: [PATCH 594/656] hwmon: (pmbus/ucd9200) fix Wvoid-pointer-to-enum-cast warning 'chip' is an enum, thus cast of pointer on 64-bit compile test with W=1 causes: ucd9200.c:106:10: error: cast to smaller integer type 'enum chips' from 'const void *' [-Werror,-Wvoid-pointer-to-enum-cast] Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230810093157.94244-15-krzysztof.kozlowski@linaro.org Signed-off-by: Guenter Roeck --- drivers/hwmon/pmbus/ucd9200.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/hwmon/pmbus/ucd9200.c b/drivers/hwmon/pmbus/ucd9200.c index e4aad64b2d94..7920d1c06df0 100644 --- a/drivers/hwmon/pmbus/ucd9200.c +++ b/drivers/hwmon/pmbus/ucd9200.c @@ -103,7 +103,7 @@ static int ucd9200_probe(struct i2c_client *client) } if (client->dev.of_node) - chip = (enum chips)of_device_get_match_data(&client->dev); + chip = (uintptr_t)of_device_get_match_data(&client->dev); else chip = mid->driver_data; From 7d9be29d8382030266c88a732a82d3bbc6fb0c5f Mon Sep 17 00:00:00 2001 From: Ruan Jinjie Date: Thu, 10 Aug 2023 14:26:35 +0800 Subject: [PATCH 595/656] hwmon: (nsa320-hwmon) Remove redundant of_match_ptr() The driver depends on CONFIG_OF, it is not necessary to use of_match_ptr() here. Signed-off-by: Ruan Jinjie Link: https://lore.kernel.org/r/20230810062635.1947552-1-ruanjinjie@huawei.com Signed-off-by: Guenter Roeck --- drivers/hwmon/nsa320-hwmon.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/hwmon/nsa320-hwmon.c b/drivers/hwmon/nsa320-hwmon.c index e26334469549..18076ba7fc14 100644 --- a/drivers/hwmon/nsa320-hwmon.c +++ b/drivers/hwmon/nsa320-hwmon.c @@ -191,7 +191,7 @@ static struct platform_driver nsa320_hwmon_driver = { .probe = nsa320_hwmon_probe, .driver = { .name = "nsa320-hwmon", - .of_match_table = of_match_ptr(of_nsa320_hwmon_match), + .of_match_table = of_nsa320_hwmon_match, }, }; From 14cf45f2f2d56adc061f7b8c9104b56db8d8cb60 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Thu, 17 Aug 2023 11:25:24 +0200 Subject: [PATCH 596/656] hwmon: pmbus: Reduce clear fault page invocations Observing I2C traffic revealed consecutive transmission of CLEAR_FAULT commands. While this doesn't cause issues, it extends driver probe time. Avoid invoking pmbus_clear_fault_page for virtual registers, as they're managed by the driver, not the chip. TEST: Verified using an I2C bus analyzer that only one CLEAR_FAULT command is send instead 5 in a row. Signed-off-by: Patrick Rudolph Signed-off-by: Naresh Solanki Link: https://lore.kernel.org/r/20230817092527.808631-1-Naresh.Solanki@9elements.com Signed-off-by: Guenter Roeck --- drivers/hwmon/pmbus/pmbus_core.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/hwmon/pmbus/pmbus_core.c b/drivers/hwmon/pmbus/pmbus_core.c index 69a4e62b6c8d..cbfabdd69056 100644 --- a/drivers/hwmon/pmbus/pmbus_core.c +++ b/drivers/hwmon/pmbus/pmbus_core.c @@ -561,7 +561,8 @@ static bool pmbus_check_register(struct i2c_client *client, rv = pmbus_check_status_cml(client); if (rv < 0 && (data->flags & PMBUS_READ_STATUS_AFTER_FAILED_CHECK)) data->read_status(client, -1); - pmbus_clear_fault_page(client, -1); + if (reg < PMBUS_VIRT_BASE) + pmbus_clear_fault_page(client, -1); return rv >= 0; } From 3fd2188e588ffd8d45df5ac92ab1089328211a86 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Thu, 17 Aug 2023 11:25:25 +0200 Subject: [PATCH 597/656] hwmon: pmbus: Drop unnecessary clear fault page The pmbus_check_byte_register function already calls clear fault page, so there's no need to do it again in pmbus_identify_common. TEST: Verified using an I2C bus analyser to confirm that only one clear fault page is being send instead of two in a row. Signed-off-by: Patrick Rudolph Signed-off-by: Naresh Solanki Link: https://lore.kernel.org/r/20230817092527.808631-2-Naresh.Solanki@9elements.com Signed-off-by: Guenter Roeck --- drivers/hwmon/pmbus/pmbus_core.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/hwmon/pmbus/pmbus_core.c b/drivers/hwmon/pmbus/pmbus_core.c index cbfabdd69056..1363d9f89181 100644 --- a/drivers/hwmon/pmbus/pmbus_core.c +++ b/drivers/hwmon/pmbus/pmbus_core.c @@ -2541,7 +2541,6 @@ static int pmbus_identify_common(struct i2c_client *client, } } - pmbus_clear_fault_page(client, page); return 0; } From e7593bda6a2e2e46521567f0ddea940f4acda0db Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Thu, 17 Aug 2023 11:25:26 +0200 Subject: [PATCH 598/656] hwmon: pmbus: Fix -EIO seen on pli1209 After doing performance optimizations the pli1209 driver failed to probe with a probabilty of 2%. It wasn't able to read the PMBUS_OPERATION register due to an -EIO error. An investigation showed that the PLI1209 takes 230 usec to execute the CLEAR_FAULTS command. During that time it's busy and NACKs all requests on the SMBUS interface. It also NACKs reads on PMBUS_STATUS_BYTE making it impossible to poll the BUSY flag. Add a custom write_data function to just wait for not BUSY unconditionally after sending a CLEAR_FAULTS command. TEST: Verified using an I2C bus analyser that no more NACKs are seen after sending a CLEAR_FAULTS command. Signed-off-by: Patrick Rudolph Signed-off-by: Naresh Solanki Link: https://lore.kernel.org/r/20230817092527.808631-3-Naresh.Solanki@9elements.com Signed-off-by: Guenter Roeck --- drivers/hwmon/pmbus/pli1209bc.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/drivers/hwmon/pmbus/pli1209bc.c b/drivers/hwmon/pmbus/pli1209bc.c index 7d8bd3167b21..c95433790b11 100644 --- a/drivers/hwmon/pmbus/pli1209bc.c +++ b/drivers/hwmon/pmbus/pli1209bc.c @@ -5,6 +5,7 @@ * Copyright (c) 2022 9elements GmbH */ +#include #include #include #include @@ -53,6 +54,30 @@ static int pli1209bc_read_word_data(struct i2c_client *client, int page, } } +static int pli1209bc_write_byte(struct i2c_client *client, int page, u8 reg) +{ + int ret; + + switch (reg) { + case PMBUS_CLEAR_FAULTS: + ret = pmbus_write_byte(client, page, reg); + /* + * PLI1209 takes 230 usec to execute the CLEAR_FAULTS command. + * During that time it's busy and NACKs all requests on the + * SMBUS interface. It also NACKs reads on PMBUS_STATUS_BYTE + * making it impossible to poll the BUSY flag. + * + * Just wait for not BUSY unconditionally. + */ + usleep_range(250, 300); + break; + default: + ret = -ENODATA; + break; + } + return ret; +} + #if IS_ENABLED(CONFIG_SENSORS_PLI1209BC_REGULATOR) static const struct regulator_desc pli1209bc_reg_desc = { .name = "vout2", @@ -102,6 +127,7 @@ static struct pmbus_driver_info pli1209bc_info = { | PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP | PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_STATUS_INPUT, .read_word_data = pli1209bc_read_word_data, + .write_byte = pli1209bc_write_byte, #if IS_ENABLED(CONFIG_SENSORS_PLI1209BC_REGULATOR) .num_regulators = 1, .reg_desc = &pli1209bc_reg_desc, From 08e6c5038fee470d9f240c12dcf69927e204a56b Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 18 Aug 2023 17:31:32 +0800 Subject: [PATCH 599/656] spi: orion: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230818093154.1183529-2-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-orion.c | 86 ++++++++++++++++++++--------------------- 1 file changed, 43 insertions(+), 43 deletions(-) diff --git a/drivers/spi/spi-orion.c b/drivers/spi/spi-orion.c index faf2764b91a8..1f10f5c8e34d 100644 --- a/drivers/spi/spi-orion.c +++ b/drivers/spi/spi-orion.c @@ -90,7 +90,7 @@ struct orion_child_options { }; struct orion_spi { - struct spi_master *master; + struct spi_controller *host; void __iomem *base; struct clk *clk; struct clk *axi_clk; @@ -141,7 +141,7 @@ static int orion_spi_baudrate_set(struct spi_device *spi, unsigned int speed) struct orion_spi *orion_spi; const struct orion_spi_dev *devdata; - orion_spi = spi_master_get_devdata(spi->master); + orion_spi = spi_controller_get_devdata(spi->controller); devdata = orion_spi->devdata; tclk_hz = clk_get_rate(orion_spi->clk); @@ -235,7 +235,7 @@ orion_spi_mode_set(struct spi_device *spi) u32 reg; struct orion_spi *orion_spi; - orion_spi = spi_master_get_devdata(spi->master); + orion_spi = spi_controller_get_devdata(spi->controller); reg = readl(spi_reg(orion_spi, ORION_SPI_IF_CONFIG_REG)); reg &= ~ORION_SPI_MODE_MASK; @@ -257,7 +257,7 @@ orion_spi_50mhz_ac_timing_erratum(struct spi_device *spi, unsigned int speed) u32 reg; struct orion_spi *orion_spi; - orion_spi = spi_master_get_devdata(spi->master); + orion_spi = spi_controller_get_devdata(spi->controller); /* * Erratum description: (Erratum NO. FE-9144572) The device @@ -297,7 +297,7 @@ orion_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t) unsigned int bits_per_word = spi->bits_per_word; int rc; - orion_spi = spi_master_get_devdata(spi->master); + orion_spi = spi_controller_get_devdata(spi->controller); if ((t != NULL) && t->speed_hz) speed = t->speed_hz; @@ -330,7 +330,7 @@ static void orion_spi_set_cs(struct spi_device *spi, bool enable) void __iomem *ctrl_reg; u32 val; - orion_spi = spi_master_get_devdata(spi->master); + orion_spi = spi_controller_get_devdata(spi->controller); ctrl_reg = spi_reg(orion_spi, ORION_SPI_IF_CTRL_REG); val = readl(ctrl_reg); @@ -388,7 +388,7 @@ orion_spi_write_read_8bit(struct spi_device *spi, cs_single_byte = spi->mode & SPI_CS_WORD; - orion_spi = spi_master_get_devdata(spi->master); + orion_spi = spi_controller_get_devdata(spi->controller); if (cs_single_byte) orion_spi_set_cs(spi, 0); @@ -439,7 +439,7 @@ orion_spi_write_read_16bit(struct spi_device *spi, return -1; } - orion_spi = spi_master_get_devdata(spi->master); + orion_spi = spi_controller_get_devdata(spi->controller); tx_reg = spi_reg(orion_spi, ORION_SPI_DATA_OUT_REG); rx_reg = spi_reg(orion_spi, ORION_SPI_DATA_IN_REG); int_reg = spi_reg(orion_spi, ORION_SPI_INT_CAUSE_REG); @@ -475,7 +475,7 @@ orion_spi_write_read(struct spi_device *spi, struct spi_transfer *xfer) word_len = spi->bits_per_word; count = xfer->len; - orion_spi = spi_master_get_devdata(spi->master); + orion_spi = spi_controller_get_devdata(spi->controller); /* * Use SPI direct write mode if base address is available @@ -528,7 +528,7 @@ out: return xfer->len - count; } -static int orion_spi_transfer_one(struct spi_master *master, +static int orion_spi_transfer_one(struct spi_controller *host, struct spi_device *spi, struct spi_transfer *t) { @@ -548,7 +548,7 @@ static int orion_spi_setup(struct spi_device *spi) { int ret; #ifdef CONFIG_PM - struct orion_spi *orion_spi = spi_master_get_devdata(spi->master); + struct orion_spi *orion_spi = spi_controller_get_devdata(spi->controller); struct device *dev = orion_spi->dev; orion_spi_runtime_resume(dev); @@ -644,44 +644,44 @@ MODULE_DEVICE_TABLE(of, orion_spi_of_match_table); static int orion_spi_probe(struct platform_device *pdev) { const struct orion_spi_dev *devdata; - struct spi_master *master; + struct spi_controller *host; struct orion_spi *spi; struct resource *r; unsigned long tclk_hz; int status = 0; struct device_node *np; - master = spi_alloc_master(&pdev->dev, sizeof(*spi)); - if (master == NULL) { - dev_dbg(&pdev->dev, "master allocation failed\n"); + host = spi_alloc_host(&pdev->dev, sizeof(*spi)); + if (host == NULL) { + dev_dbg(&pdev->dev, "host allocation failed\n"); return -ENOMEM; } if (pdev->id != -1) - master->bus_num = pdev->id; + host->bus_num = pdev->id; if (pdev->dev.of_node) { u32 cell_index; if (!of_property_read_u32(pdev->dev.of_node, "cell-index", &cell_index)) - master->bus_num = cell_index; + host->bus_num = cell_index; } /* we support all 4 SPI modes and LSB first option */ - master->mode_bits = SPI_CPHA | SPI_CPOL | SPI_LSB_FIRST | SPI_CS_WORD; - master->set_cs = orion_spi_set_cs; - master->transfer_one = orion_spi_transfer_one; - master->num_chipselect = ORION_NUM_CHIPSELECTS; - master->setup = orion_spi_setup; - master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16); - master->auto_runtime_pm = true; - master->use_gpio_descriptors = true; - master->flags = SPI_CONTROLLER_GPIO_SS; + host->mode_bits = SPI_CPHA | SPI_CPOL | SPI_LSB_FIRST | SPI_CS_WORD; + host->set_cs = orion_spi_set_cs; + host->transfer_one = orion_spi_transfer_one; + host->num_chipselect = ORION_NUM_CHIPSELECTS; + host->setup = orion_spi_setup; + host->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16); + host->auto_runtime_pm = true; + host->use_gpio_descriptors = true; + host->flags = SPI_CONTROLLER_GPIO_SS; - platform_set_drvdata(pdev, master); + platform_set_drvdata(pdev, host); - spi = spi_master_get_devdata(master); - spi->master = master; + spi = spi_controller_get_devdata(host); + spi->host = host; spi->dev = &pdev->dev; devdata = device_get_match_data(&pdev->dev); @@ -718,14 +718,14 @@ static int orion_spi_probe(struct platform_device *pdev) */ if (of_device_is_compatible(pdev->dev.of_node, "marvell,armada-370-spi")) - master->max_speed_hz = min(devdata->max_hz, + host->max_speed_hz = min(devdata->max_hz, DIV_ROUND_UP(tclk_hz, devdata->min_divisor)); else if (devdata->min_divisor) - master->max_speed_hz = + host->max_speed_hz = DIV_ROUND_UP(tclk_hz, devdata->min_divisor); else - master->max_speed_hz = devdata->max_hz; - master->min_speed_hz = DIV_ROUND_UP(tclk_hz, devdata->max_divisor); + host->max_speed_hz = devdata->max_hz; + host->min_speed_hz = DIV_ROUND_UP(tclk_hz, devdata->max_divisor); spi->base = devm_platform_get_and_ioremap_resource(pdev, 0, &r); if (IS_ERR(spi->base)) { @@ -784,8 +784,8 @@ static int orion_spi_probe(struct platform_device *pdev) if (status < 0) goto out_rel_pm; - master->dev.of_node = pdev->dev.of_node; - status = spi_register_master(master); + host->dev.of_node = pdev->dev.of_node; + status = spi_register_controller(host); if (status < 0) goto out_rel_pm; @@ -798,21 +798,21 @@ out_rel_axi_clk: out_rel_clk: clk_disable_unprepare(spi->clk); out: - spi_master_put(master); + spi_controller_put(host); return status; } static void orion_spi_remove(struct platform_device *pdev) { - struct spi_master *master = platform_get_drvdata(pdev); - struct orion_spi *spi = spi_master_get_devdata(master); + struct spi_controller *host = platform_get_drvdata(pdev); + struct orion_spi *spi = spi_controller_get_devdata(host); pm_runtime_get_sync(&pdev->dev); clk_disable_unprepare(spi->axi_clk); clk_disable_unprepare(spi->clk); - spi_unregister_master(master); + spi_unregister_controller(host); pm_runtime_disable(&pdev->dev); } @@ -821,8 +821,8 @@ MODULE_ALIAS("platform:" DRIVER_NAME); #ifdef CONFIG_PM static int orion_spi_runtime_suspend(struct device *dev) { - struct spi_master *master = dev_get_drvdata(dev); - struct orion_spi *spi = spi_master_get_devdata(master); + struct spi_controller *host = dev_get_drvdata(dev); + struct orion_spi *spi = spi_controller_get_devdata(host); clk_disable_unprepare(spi->axi_clk); clk_disable_unprepare(spi->clk); @@ -831,8 +831,8 @@ static int orion_spi_runtime_suspend(struct device *dev) static int orion_spi_runtime_resume(struct device *dev) { - struct spi_master *master = dev_get_drvdata(dev); - struct orion_spi *spi = spi_master_get_devdata(master); + struct spi_controller *host = dev_get_drvdata(dev); + struct orion_spi *spi = spi_controller_get_devdata(host); if (!IS_ERR(spi->axi_clk)) clk_prepare_enable(spi->axi_clk); From f9977bb164a26d3bec31cdaf04865accf97e4353 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 18 Aug 2023 17:31:33 +0800 Subject: [PATCH 600/656] spi: mchp-pci1xxxx: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230818093154.1183529-3-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-pci1xxxx.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/spi/spi-pci1xxxx.c b/drivers/spi/spi-pci1xxxx.c index d23c42839da1..3638e974f5d4 100644 --- a/drivers/spi/spi-pci1xxxx.c +++ b/drivers/spi/spi-pci1xxxx.c @@ -65,7 +65,7 @@ struct pci1xxxx_spi_internal { bool spi_xfer_in_progress; int irq; struct completion spi_xfer_done; - struct spi_master *spi_host; + struct spi_controller *spi_host; struct pci1xxxx_spi *parent; struct { unsigned int dev_sel : 3; @@ -250,7 +250,7 @@ static int pci1xxxx_spi_probe(struct pci_dev *pdev, const struct pci_device_id * struct pci1xxxx_spi_internal *spi_sub_ptr; struct device *dev = &pdev->dev; struct pci1xxxx_spi *spi_bus; - struct spi_master *spi_host; + struct spi_controller *spi_host; u32 regval; int ret; @@ -276,7 +276,7 @@ static int pci1xxxx_spi_probe(struct pci_dev *pdev, const struct pci_device_id * sizeof(struct pci1xxxx_spi_internal), GFP_KERNEL); spi_sub_ptr = spi_bus->spi_int[iter]; - spi_sub_ptr->spi_host = devm_spi_alloc_master(dev, sizeof(struct spi_master)); + spi_sub_ptr->spi_host = devm_spi_alloc_host(dev, sizeof(struct spi_controller)); if (!spi_sub_ptr->spi_host) return -ENOMEM; @@ -366,8 +366,8 @@ static int pci1xxxx_spi_probe(struct pci_dev *pdev, const struct pci_device_id * spi_host->max_speed_hz = PCI1XXXX_SPI_MAX_CLOCK_HZ; spi_host->min_speed_hz = PCI1XXXX_SPI_MIN_CLOCK_HZ; spi_host->flags = SPI_CONTROLLER_MUST_TX; - spi_master_set_devdata(spi_host, spi_sub_ptr); - ret = devm_spi_register_master(dev, spi_host); + spi_controller_set_devdata(spi_host, spi_sub_ptr); + ret = devm_spi_register_controller(dev, spi_host); if (ret) goto error; } @@ -415,7 +415,7 @@ static int pci1xxxx_spi_resume(struct device *dev) for (iter = 0; iter < spi_ptr->total_hw_instances; iter++) { spi_sub_ptr = spi_ptr->spi_int[iter]; - spi_master_resume(spi_sub_ptr->spi_host); + spi_controller_resume(spi_sub_ptr->spi_host); writel(regval, spi_ptr->reg_base + SPI_MST_EVENT_MASK_REG_OFFSET(iter)); @@ -441,7 +441,7 @@ static int pci1xxxx_spi_suspend(struct device *dev) /* Store existing config before suspend */ store_restore_config(spi_ptr, spi_sub_ptr, iter, 1); - spi_master_suspend(spi_sub_ptr->spi_host); + spi_controller_suspend(spi_sub_ptr->spi_host); writel(reg1, spi_ptr->reg_base + SPI_MST_EVENT_MASK_REG_OFFSET(iter)); } From cc64ab491b4236cbeb8aabf2cd41db4499a0745b Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 18 Aug 2023 17:31:34 +0800 Subject: [PATCH 601/656] spi: pic32-sqi: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230818093154.1183529-4-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-pic32-sqi.c | 84 ++++++++++++++++++------------------- 1 file changed, 42 insertions(+), 42 deletions(-) diff --git a/drivers/spi/spi-pic32-sqi.c b/drivers/spi/spi-pic32-sqi.c index 5cbebcf26a2a..883354d0ff52 100644 --- a/drivers/spi/spi-pic32-sqi.c +++ b/drivers/spi/spi-pic32-sqi.c @@ -139,7 +139,7 @@ struct pic32_sqi { void __iomem *regs; struct clk *sys_clk; struct clk *base_clk; /* drives spi clock */ - struct spi_master *master; + struct spi_controller *host; int irq; struct completion xfer_done; struct ring_desc *ring; @@ -316,9 +316,9 @@ static int pic32_sqi_one_transfer(struct pic32_sqi *sqi, return 0; } -static int pic32_sqi_prepare_hardware(struct spi_master *master) +static int pic32_sqi_prepare_hardware(struct spi_controller *host) { - struct pic32_sqi *sqi = spi_master_get_devdata(master); + struct pic32_sqi *sqi = spi_controller_get_devdata(host); /* enable spi interface */ pic32_setbits(sqi->regs + PESQI_CONF_REG, PESQI_EN); @@ -328,7 +328,7 @@ static int pic32_sqi_prepare_hardware(struct spi_master *master) return 0; } -static bool pic32_sqi_can_dma(struct spi_master *master, +static bool pic32_sqi_can_dma(struct spi_controller *host, struct spi_device *spi, struct spi_transfer *x) { @@ -336,7 +336,7 @@ static bool pic32_sqi_can_dma(struct spi_master *master, return true; } -static int pic32_sqi_one_message(struct spi_master *master, +static int pic32_sqi_one_message(struct spi_controller *host, struct spi_message *msg) { struct spi_device *spi = msg->spi; @@ -347,7 +347,7 @@ static int pic32_sqi_one_message(struct spi_master *master, unsigned long timeout; u32 val; - sqi = spi_master_get_devdata(master); + sqi = spi_controller_get_devdata(host); reinit_completion(&sqi->xfer_done); msg->actual_length = 0; @@ -412,7 +412,7 @@ static int pic32_sqi_one_message(struct spi_master *master, /* wait for xfer completion */ timeout = wait_for_completion_timeout(&sqi->xfer_done, 5 * HZ); if (timeout == 0) { - dev_err(&sqi->master->dev, "wait timedout/interrupted\n"); + dev_err(&sqi->host->dev, "wait timedout/interrupted\n"); ret = -ETIMEDOUT; msg->status = ret; } else { @@ -434,14 +434,14 @@ xfer_out: /* release ring descr */ ring_desc_put(sqi, rdesc); } - spi_finalize_current_message(spi->master); + spi_finalize_current_message(spi->controller); return ret; } -static int pic32_sqi_unprepare_hardware(struct spi_master *master) +static int pic32_sqi_unprepare_hardware(struct spi_controller *host) { - struct pic32_sqi *sqi = spi_master_get_devdata(master); + struct pic32_sqi *sqi = spi_controller_get_devdata(host); /* disable clk */ pic32_clrbits(sqi->regs + PESQI_CLK_CTRL_REG, PESQI_CLK_EN); @@ -458,18 +458,18 @@ static int ring_desc_ring_alloc(struct pic32_sqi *sqi) int i; /* allocate coherent DMAable memory for hardware buffer descriptors. */ - sqi->bd = dma_alloc_coherent(&sqi->master->dev, + sqi->bd = dma_alloc_coherent(&sqi->host->dev, sizeof(*bd) * PESQI_BD_COUNT, &sqi->bd_dma, GFP_KERNEL); if (!sqi->bd) { - dev_err(&sqi->master->dev, "failed allocating dma buffer\n"); + dev_err(&sqi->host->dev, "failed allocating dma buffer\n"); return -ENOMEM; } /* allocate software ring descriptors */ sqi->ring = kcalloc(PESQI_BD_COUNT, sizeof(*rdesc), GFP_KERNEL); if (!sqi->ring) { - dma_free_coherent(&sqi->master->dev, + dma_free_coherent(&sqi->host->dev, sizeof(*bd) * PESQI_BD_COUNT, sqi->bd, sqi->bd_dma); return -ENOMEM; @@ -498,7 +498,7 @@ static int ring_desc_ring_alloc(struct pic32_sqi *sqi) static void ring_desc_ring_free(struct pic32_sqi *sqi) { - dma_free_coherent(&sqi->master->dev, + dma_free_coherent(&sqi->host->dev, sizeof(struct buf_desc) * PESQI_BD_COUNT, sqi->bd, sqi->bd_dma); kfree(sqi->ring); @@ -568,28 +568,28 @@ static void pic32_sqi_hw_init(struct pic32_sqi *sqi) static int pic32_sqi_probe(struct platform_device *pdev) { - struct spi_master *master; + struct spi_controller *host; struct pic32_sqi *sqi; int ret; - master = spi_alloc_master(&pdev->dev, sizeof(*sqi)); - if (!master) + host = spi_alloc_host(&pdev->dev, sizeof(*sqi)); + if (!host) return -ENOMEM; - sqi = spi_master_get_devdata(master); - sqi->master = master; + sqi = spi_controller_get_devdata(host); + sqi->host = host; sqi->regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(sqi->regs)) { ret = PTR_ERR(sqi->regs); - goto err_free_master; + goto err_free_host; } /* irq */ sqi->irq = platform_get_irq(pdev, 0); if (sqi->irq < 0) { ret = sqi->irq; - goto err_free_master; + goto err_free_host; } /* clocks */ @@ -597,27 +597,27 @@ static int pic32_sqi_probe(struct platform_device *pdev) if (IS_ERR(sqi->sys_clk)) { ret = PTR_ERR(sqi->sys_clk); dev_err(&pdev->dev, "no sys_clk ?\n"); - goto err_free_master; + goto err_free_host; } sqi->base_clk = devm_clk_get(&pdev->dev, "spi_ck"); if (IS_ERR(sqi->base_clk)) { ret = PTR_ERR(sqi->base_clk); dev_err(&pdev->dev, "no base clk ?\n"); - goto err_free_master; + goto err_free_host; } ret = clk_prepare_enable(sqi->sys_clk); if (ret) { dev_err(&pdev->dev, "sys clk enable failed\n"); - goto err_free_master; + goto err_free_host; } ret = clk_prepare_enable(sqi->base_clk); if (ret) { dev_err(&pdev->dev, "base clk enable failed\n"); clk_disable_unprepare(sqi->sys_clk); - goto err_free_master; + goto err_free_host; } init_completion(&sqi->xfer_done); @@ -640,24 +640,24 @@ static int pic32_sqi_probe(struct platform_device *pdev) goto err_free_ring; } - /* register master */ - master->num_chipselect = 2; - master->max_speed_hz = clk_get_rate(sqi->base_clk); - master->dma_alignment = 32; - master->max_dma_len = PESQI_BD_BUF_LEN_MAX; - master->dev.of_node = pdev->dev.of_node; - master->mode_bits = SPI_MODE_3 | SPI_MODE_0 | SPI_TX_DUAL | + /* register host */ + host->num_chipselect = 2; + host->max_speed_hz = clk_get_rate(sqi->base_clk); + host->dma_alignment = 32; + host->max_dma_len = PESQI_BD_BUF_LEN_MAX; + host->dev.of_node = pdev->dev.of_node; + host->mode_bits = SPI_MODE_3 | SPI_MODE_0 | SPI_TX_DUAL | SPI_RX_DUAL | SPI_TX_QUAD | SPI_RX_QUAD; - master->flags = SPI_CONTROLLER_HALF_DUPLEX; - master->can_dma = pic32_sqi_can_dma; - master->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 32); - master->transfer_one_message = pic32_sqi_one_message; - master->prepare_transfer_hardware = pic32_sqi_prepare_hardware; - master->unprepare_transfer_hardware = pic32_sqi_unprepare_hardware; + host->flags = SPI_CONTROLLER_HALF_DUPLEX; + host->can_dma = pic32_sqi_can_dma; + host->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 32); + host->transfer_one_message = pic32_sqi_one_message; + host->prepare_transfer_hardware = pic32_sqi_prepare_hardware; + host->unprepare_transfer_hardware = pic32_sqi_unprepare_hardware; - ret = devm_spi_register_master(&pdev->dev, master); + ret = devm_spi_register_controller(&pdev->dev, host); if (ret) { - dev_err(&master->dev, "failed registering spi master\n"); + dev_err(&host->dev, "failed registering spi host\n"); free_irq(sqi->irq, sqi); goto err_free_ring; } @@ -673,8 +673,8 @@ err_disable_clk: clk_disable_unprepare(sqi->base_clk); clk_disable_unprepare(sqi->sys_clk); -err_free_master: - spi_master_put(master); +err_free_host: + spi_controller_put(host); return ret; } From 0273727c3bae812e12d9bc32830af9d7b3767d3b Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 18 Aug 2023 17:31:35 +0800 Subject: [PATCH 602/656] spi: pic32: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230818093154.1183529-5-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-pic32.c | 152 ++++++++++++++++++++-------------------- 1 file changed, 76 insertions(+), 76 deletions(-) diff --git a/drivers/spi/spi-pic32.c b/drivers/spi/spi-pic32.c index e9b4c9cb97fb..52b788dac10a 100644 --- a/drivers/spi/spi-pic32.c +++ b/drivers/spi/spi-pic32.c @@ -100,7 +100,7 @@ struct pic32_spi { int tx_irq; u32 fifo_n_byte; /* FIFO depth in bytes */ struct clk *clk; - struct spi_master *master; + struct spi_controller *host; /* Current controller setting */ u32 speed_hz; /* spi-clk rate */ u32 mode; @@ -224,9 +224,9 @@ static void pic32_err_stop(struct pic32_spi *pic32s, const char *msg) disable_irq_nosync(pic32s->tx_irq); /* Show err message and abort xfer with err */ - dev_err(&pic32s->master->dev, "%s\n", msg); - if (pic32s->master->cur_msg) - pic32s->master->cur_msg->status = -EIO; + dev_err(&pic32s->host->dev, "%s\n", msg); + if (pic32s->host->cur_msg) + pic32s->host->cur_msg->status = -EIO; complete(&pic32s->xfer_done); } @@ -250,7 +250,7 @@ static irqreturn_t pic32_spi_fault_irq(int irq, void *dev_id) return IRQ_HANDLED; } - if (!pic32s->master->cur_msg) { + if (!pic32s->host->cur_msg) { pic32_err_stop(pic32s, "err_irq: no mesg"); return IRQ_NONE; } @@ -300,16 +300,16 @@ static void pic32_spi_dma_rx_notify(void *data) static int pic32_spi_dma_transfer(struct pic32_spi *pic32s, struct spi_transfer *xfer) { - struct spi_master *master = pic32s->master; + struct spi_controller *host = pic32s->host; struct dma_async_tx_descriptor *desc_rx; struct dma_async_tx_descriptor *desc_tx; dma_cookie_t cookie; int ret; - if (!master->dma_rx || !master->dma_tx) + if (!host->dma_rx || !host->dma_tx) return -ENODEV; - desc_rx = dmaengine_prep_slave_sg(master->dma_rx, + desc_rx = dmaengine_prep_slave_sg(host->dma_rx, xfer->rx_sg.sgl, xfer->rx_sg.nents, DMA_DEV_TO_MEM, @@ -319,7 +319,7 @@ static int pic32_spi_dma_transfer(struct pic32_spi *pic32s, goto err_dma; } - desc_tx = dmaengine_prep_slave_sg(master->dma_tx, + desc_tx = dmaengine_prep_slave_sg(host->dma_tx, xfer->tx_sg.sgl, xfer->tx_sg.nents, DMA_MEM_TO_DEV, @@ -343,13 +343,13 @@ static int pic32_spi_dma_transfer(struct pic32_spi *pic32s, if (ret) goto err_dma_tx; - dma_async_issue_pending(master->dma_rx); - dma_async_issue_pending(master->dma_tx); + dma_async_issue_pending(host->dma_rx); + dma_async_issue_pending(host->dma_tx); return 0; err_dma_tx: - dmaengine_terminate_all(master->dma_rx); + dmaengine_terminate_all(host->dma_rx); err_dma: return ret; } @@ -357,7 +357,7 @@ err_dma: static int pic32_spi_dma_config(struct pic32_spi *pic32s, u32 dma_width) { int buf_offset = offsetof(struct pic32_spi_regs, buf); - struct spi_master *master = pic32s->master; + struct spi_controller *host = pic32s->host; struct dma_slave_config cfg; int ret; @@ -371,16 +371,16 @@ static int pic32_spi_dma_config(struct pic32_spi *pic32s, u32 dma_width) cfg.dst_addr_width = dma_width; /* tx channel */ cfg.direction = DMA_MEM_TO_DEV; - ret = dmaengine_slave_config(master->dma_tx, &cfg); + ret = dmaengine_slave_config(host->dma_tx, &cfg); if (ret) { - dev_err(&master->dev, "tx channel setup failed\n"); + dev_err(&host->dev, "tx channel setup failed\n"); return ret; } /* rx channel */ cfg.direction = DMA_DEV_TO_MEM; - ret = dmaengine_slave_config(master->dma_rx, &cfg); + ret = dmaengine_slave_config(host->dma_rx, &cfg); if (ret) - dev_err(&master->dev, "rx channel setup failed\n"); + dev_err(&host->dev, "rx channel setup failed\n"); return ret; } @@ -430,19 +430,19 @@ static int pic32_spi_set_word_size(struct pic32_spi *pic32s, u8 bits_per_word) return 0; } -static int pic32_spi_prepare_hardware(struct spi_master *master) +static int pic32_spi_prepare_hardware(struct spi_controller *host) { - struct pic32_spi *pic32s = spi_master_get_devdata(master); + struct pic32_spi *pic32s = spi_controller_get_devdata(host); pic32_spi_enable(pic32s); return 0; } -static int pic32_spi_prepare_message(struct spi_master *master, +static int pic32_spi_prepare_message(struct spi_controller *host, struct spi_message *msg) { - struct pic32_spi *pic32s = spi_master_get_devdata(master); + struct pic32_spi *pic32s = spi_controller_get_devdata(host); struct spi_device *spi = msg->spi; u32 val; @@ -481,18 +481,18 @@ static int pic32_spi_prepare_message(struct spi_master *master, return 0; } -static bool pic32_spi_can_dma(struct spi_master *master, +static bool pic32_spi_can_dma(struct spi_controller *host, struct spi_device *spi, struct spi_transfer *xfer) { - struct pic32_spi *pic32s = spi_master_get_devdata(master); + struct pic32_spi *pic32s = spi_controller_get_devdata(host); /* skip using DMA on small size transfer to avoid overhead.*/ return (xfer->len >= PIC32_DMA_LEN_MIN) && test_bit(PIC32F_DMA_PREP, &pic32s->flags); } -static int pic32_spi_one_transfer(struct spi_master *master, +static int pic32_spi_one_transfer(struct spi_controller *host, struct spi_device *spi, struct spi_transfer *transfer) { @@ -501,7 +501,7 @@ static int pic32_spi_one_transfer(struct spi_master *master, unsigned long timeout; int ret; - pic32s = spi_master_get_devdata(master); + pic32s = spi_controller_get_devdata(host); /* handle transfer specific word size change */ if (transfer->bits_per_word && @@ -549,8 +549,8 @@ static int pic32_spi_one_transfer(struct spi_master *master, if (timeout == 0) { dev_err(&spi->dev, "wait error/timedout\n"); if (dma_issued) { - dmaengine_terminate_all(master->dma_rx); - dmaengine_terminate_all(master->dma_tx); + dmaengine_terminate_all(host->dma_rx); + dmaengine_terminate_all(host->dma_tx); } ret = -ETIMEDOUT; } else { @@ -560,16 +560,16 @@ static int pic32_spi_one_transfer(struct spi_master *master, return ret; } -static int pic32_spi_unprepare_message(struct spi_master *master, +static int pic32_spi_unprepare_message(struct spi_controller *host, struct spi_message *msg) { /* nothing to do */ return 0; } -static int pic32_spi_unprepare_hardware(struct spi_master *master) +static int pic32_spi_unprepare_hardware(struct spi_controller *host) { - struct pic32_spi *pic32s = spi_master_get_devdata(master); + struct pic32_spi *pic32s = spi_controller_get_devdata(host); pic32_spi_disable(pic32s); @@ -605,28 +605,28 @@ static void pic32_spi_cleanup(struct spi_device *spi) static int pic32_spi_dma_prep(struct pic32_spi *pic32s, struct device *dev) { - struct spi_master *master = pic32s->master; + struct spi_controller *host = pic32s->host; int ret = 0; - master->dma_rx = dma_request_chan(dev, "spi-rx"); - if (IS_ERR(master->dma_rx)) { - if (PTR_ERR(master->dma_rx) == -EPROBE_DEFER) + host->dma_rx = dma_request_chan(dev, "spi-rx"); + if (IS_ERR(host->dma_rx)) { + if (PTR_ERR(host->dma_rx) == -EPROBE_DEFER) ret = -EPROBE_DEFER; else dev_warn(dev, "RX channel not found.\n"); - master->dma_rx = NULL; + host->dma_rx = NULL; goto out_err; } - master->dma_tx = dma_request_chan(dev, "spi-tx"); - if (IS_ERR(master->dma_tx)) { - if (PTR_ERR(master->dma_tx) == -EPROBE_DEFER) + host->dma_tx = dma_request_chan(dev, "spi-tx"); + if (IS_ERR(host->dma_tx)) { + if (PTR_ERR(host->dma_tx) == -EPROBE_DEFER) ret = -EPROBE_DEFER; else dev_warn(dev, "TX channel not found.\n"); - master->dma_tx = NULL; + host->dma_tx = NULL; goto out_err; } @@ -639,14 +639,14 @@ static int pic32_spi_dma_prep(struct pic32_spi *pic32s, struct device *dev) return 0; out_err: - if (master->dma_rx) { - dma_release_channel(master->dma_rx); - master->dma_rx = NULL; + if (host->dma_rx) { + dma_release_channel(host->dma_rx); + host->dma_rx = NULL; } - if (master->dma_tx) { - dma_release_channel(master->dma_tx); - master->dma_tx = NULL; + if (host->dma_tx) { + dma_release_channel(host->dma_tx); + host->dma_tx = NULL; } return ret; @@ -658,11 +658,11 @@ static void pic32_spi_dma_unprep(struct pic32_spi *pic32s) return; clear_bit(PIC32F_DMA_PREP, &pic32s->flags); - if (pic32s->master->dma_rx) - dma_release_channel(pic32s->master->dma_rx); + if (pic32s->host->dma_rx) + dma_release_channel(pic32s->host->dma_rx); - if (pic32s->master->dma_tx) - dma_release_channel(pic32s->master->dma_tx); + if (pic32s->host->dma_tx) + dma_release_channel(pic32s->host->dma_tx); } static void pic32_spi_hw_init(struct pic32_spi *pic32s) @@ -680,7 +680,7 @@ static void pic32_spi_hw_init(struct pic32_spi *pic32s) /* disable framing mode */ ctrl &= ~CTRL_FRMEN; - /* enable master mode while disabled */ + /* enable host mode while disabled */ ctrl |= CTRL_MSTEN; /* set tx fifo threshold interrupt */ @@ -752,36 +752,36 @@ err_unmap_mem: static int pic32_spi_probe(struct platform_device *pdev) { - struct spi_master *master; + struct spi_controller *host; struct pic32_spi *pic32s; int ret; - master = spi_alloc_master(&pdev->dev, sizeof(*pic32s)); - if (!master) + host = spi_alloc_host(&pdev->dev, sizeof(*pic32s)); + if (!host) return -ENOMEM; - pic32s = spi_master_get_devdata(master); - pic32s->master = master; + pic32s = spi_controller_get_devdata(host); + pic32s->host = host; ret = pic32_spi_hw_probe(pdev, pic32s); if (ret) - goto err_master; + goto err_host; - master->dev.of_node = pdev->dev.of_node; - master->mode_bits = SPI_MODE_3 | SPI_MODE_0 | SPI_CS_HIGH; - master->num_chipselect = 1; /* single chip-select */ - master->max_speed_hz = clk_get_rate(pic32s->clk); - master->setup = pic32_spi_setup; - master->cleanup = pic32_spi_cleanup; - master->flags = SPI_CONTROLLER_MUST_TX | SPI_CONTROLLER_MUST_RX; - master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16) | + host->dev.of_node = pdev->dev.of_node; + host->mode_bits = SPI_MODE_3 | SPI_MODE_0 | SPI_CS_HIGH; + host->num_chipselect = 1; /* single chip-select */ + host->max_speed_hz = clk_get_rate(pic32s->clk); + host->setup = pic32_spi_setup; + host->cleanup = pic32_spi_cleanup; + host->flags = SPI_CONTROLLER_MUST_TX | SPI_CONTROLLER_MUST_RX; + host->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16) | SPI_BPW_MASK(32); - master->transfer_one = pic32_spi_one_transfer; - master->prepare_message = pic32_spi_prepare_message; - master->unprepare_message = pic32_spi_unprepare_message; - master->prepare_transfer_hardware = pic32_spi_prepare_hardware; - master->unprepare_transfer_hardware = pic32_spi_unprepare_hardware; - master->use_gpio_descriptors = true; + host->transfer_one = pic32_spi_one_transfer; + host->prepare_message = pic32_spi_prepare_message; + host->unprepare_message = pic32_spi_unprepare_message; + host->prepare_transfer_hardware = pic32_spi_prepare_hardware; + host->unprepare_transfer_hardware = pic32_spi_unprepare_hardware; + host->use_gpio_descriptors = true; /* optional DMA support */ ret = pic32_spi_dma_prep(pic32s, &pdev->dev); @@ -789,7 +789,7 @@ static int pic32_spi_probe(struct platform_device *pdev) goto err_bailout; if (test_bit(PIC32F_DMA_PREP, &pic32s->flags)) - master->can_dma = pic32_spi_can_dma; + host->can_dma = pic32_spi_can_dma; init_completion(&pic32s->xfer_done); pic32s->mode = -1; @@ -824,10 +824,10 @@ static int pic32_spi_probe(struct platform_device *pdev) goto err_bailout; } - /* register master */ - ret = devm_spi_register_master(&pdev->dev, master); + /* register host */ + ret = devm_spi_register_controller(&pdev->dev, host); if (ret) { - dev_err(&master->dev, "failed registering spi master\n"); + dev_err(&host->dev, "failed registering spi host\n"); goto err_bailout; } @@ -838,8 +838,8 @@ static int pic32_spi_probe(struct platform_device *pdev) err_bailout: pic32_spi_dma_unprep(pic32s); clk_disable_unprepare(pic32s->clk); -err_master: - spi_master_put(master); +err_host: + spi_controller_put(host); return ret; } From c97a43a54600fd977acf654802ccf3c94f5f592a Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 18 Aug 2023 17:31:36 +0800 Subject: [PATCH 603/656] spi: spl022: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230818093154.1183529-6-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-pl022.c | 94 ++++++++++++++++++++--------------------- 1 file changed, 47 insertions(+), 47 deletions(-) diff --git a/drivers/spi/spi-pl022.c b/drivers/spi/spi-pl022.c index 1af75eff26b6..bb347b6bb6f3 100644 --- a/drivers/spi/spi-pl022.c +++ b/drivers/spi/spi-pl022.c @@ -336,8 +336,8 @@ struct vendor_data { * @phybase: the physical memory where the SSP device resides * @virtbase: the virtual memory where the SSP is mapped * @clk: outgoing clock "SPICLK" for the SPI bus - * @master: SPI framework hookup - * @master_info: controller-specific data from machine setup + * @host: SPI framework hookup + * @host_info: controller-specific data from machine setup * @pump_transfers: Tasklet used in Interrupt Transfer mode * @cur_msg: Pointer to current spi_message being processed * @cur_transfer: Pointer to current spi_transfer @@ -370,8 +370,8 @@ struct pl022 { resource_size_t phybase; void __iomem *virtbase; struct clk *clk; - struct spi_master *master; - struct pl022_ssp_controller *master_info; + struct spi_controller *host; + struct pl022_ssp_controller *host_info; /* Message per-transfer pump */ struct tasklet_struct pump_transfers; struct spi_message *cur_msg; @@ -500,7 +500,7 @@ static void giveback(struct pl022 *pl022) * could invalidate the cs_control() callback... */ /* get a pointer to the next message, if any */ - next_msg = spi_get_next_queued_message(pl022->master); + next_msg = spi_get_next_queued_message(pl022->host); /* * see if the next and current messages point @@ -523,7 +523,7 @@ static void giveback(struct pl022 *pl022) writew((readw(SSP_CR1(pl022->virtbase)) & (~SSP_CR1_MASK_SSE)), SSP_CR1(pl022->virtbase)); - spi_finalize_current_message(pl022->master); + spi_finalize_current_message(pl022->host); } /** @@ -1110,16 +1110,16 @@ static int pl022_dma_probe(struct pl022 *pl022) * of them. */ pl022->dma_rx_channel = dma_request_channel(mask, - pl022->master_info->dma_filter, - pl022->master_info->dma_rx_param); + pl022->host_info->dma_filter, + pl022->host_info->dma_rx_param); if (!pl022->dma_rx_channel) { dev_dbg(&pl022->adev->dev, "no RX DMA channel!\n"); goto err_no_rxchan; } pl022->dma_tx_channel = dma_request_channel(mask, - pl022->master_info->dma_filter, - pl022->master_info->dma_tx_param); + pl022->host_info->dma_filter, + pl022->host_info->dma_tx_param); if (!pl022->dma_tx_channel) { dev_dbg(&pl022->adev->dev, "no TX DMA channel!\n"); goto err_no_txchan; @@ -1573,10 +1573,10 @@ out: return; } -static int pl022_transfer_one_message(struct spi_master *master, +static int pl022_transfer_one_message(struct spi_controller *host, struct spi_message *msg) { - struct pl022 *pl022 = spi_master_get_devdata(master); + struct pl022 *pl022 = spi_controller_get_devdata(host); /* Initial message state */ pl022->cur_msg = msg; @@ -1602,9 +1602,9 @@ static int pl022_transfer_one_message(struct spi_master *master, return 0; } -static int pl022_unprepare_transfer_hardware(struct spi_master *master) +static int pl022_unprepare_transfer_hardware(struct spi_controller *host) { - struct pl022 *pl022 = spi_master_get_devdata(master); + struct pl022 *pl022 = spi_controller_get_devdata(host); /* nothing more to do - disable spi/ssp and power off */ writew((readw(SSP_CR1(pl022->virtbase)) & @@ -1826,10 +1826,10 @@ static const struct pl022_config_chip pl022_default_chip_info = { }; /** - * pl022_setup - setup function registered to SPI master framework + * pl022_setup - setup function registered to SPI host framework * @spi: spi device which is requesting setup * - * This function is registered to the SPI framework for this SPI master + * This function is registered to the SPI framework for this SPI host * controller. If it is the first time when setup is called by this device, * this function will initialize the runtime state for this chip and save * the same in the device structure. Else it will update the runtime info @@ -1844,7 +1844,7 @@ static int pl022_setup(struct spi_device *spi) struct chip_data *chip; struct ssp_clock_params clk_freq = { .cpsdvsr = 0, .scr = 0}; int status = 0; - struct pl022 *pl022 = spi_master_get_devdata(spi->master); + struct pl022 *pl022 = spi_controller_get_devdata(spi->controller); unsigned int bits = spi->bits_per_word; u32 tmp; struct device_node *np = spi->dev.of_node; @@ -1964,7 +1964,7 @@ static int pl022_setup(struct spi_device *spi) chip->dmacr = 0; chip->cpsr = 0; if ((chip_info->com_mode == DMA_TRANSFER) - && ((pl022->master_info)->enable_dma)) { + && ((pl022->host_info)->enable_dma)) { chip->enable_dma = true; dev_dbg(&spi->dev, "DMA mode set in controller state\n"); SSP_WRITE_BITS(chip->dmacr, SSP_DMA_ENABLED, @@ -2061,10 +2061,10 @@ static int pl022_setup(struct spi_device *spi) } /** - * pl022_cleanup - cleanup function registered to SPI master framework + * pl022_cleanup - cleanup function registered to SPI host framework * @spi: spi device which is requesting cleanup * - * This function is registered to the SPI framework for this SPI master + * This function is registered to the SPI framework for this SPI host * controller. It will free the runtime state of chip. */ static void pl022_cleanup(struct spi_device *spi) @@ -2103,7 +2103,7 @@ static int pl022_probe(struct amba_device *adev, const struct amba_id *id) struct device *dev = &adev->dev; struct pl022_ssp_controller *platform_info = dev_get_platdata(&adev->dev); - struct spi_master *master; + struct spi_controller *host; struct pl022 *pl022 = NULL; /*Data for this driver */ int status = 0; @@ -2117,16 +2117,16 @@ static int pl022_probe(struct amba_device *adev, const struct amba_id *id) return -ENODEV; } - /* Allocate master with space for data */ - master = spi_alloc_master(dev, sizeof(struct pl022)); - if (master == NULL) { - dev_err(&adev->dev, "probe - cannot alloc SPI master\n"); + /* Allocate host with space for data */ + host = spi_alloc_host(dev, sizeof(struct pl022)); + if (host == NULL) { + dev_err(&adev->dev, "probe - cannot alloc SPI host\n"); return -ENOMEM; } - pl022 = spi_master_get_devdata(master); - pl022->master = master; - pl022->master_info = platform_info; + pl022 = spi_controller_get_devdata(host); + pl022->host = host; + pl022->host_info = platform_info; pl022->adev = adev; pl022->vendor = id->data; @@ -2134,25 +2134,25 @@ static int pl022_probe(struct amba_device *adev, const struct amba_id *id) * Bus Number Which has been Assigned to this SSP controller * on this board */ - master->bus_num = platform_info->bus_id; - master->cleanup = pl022_cleanup; - master->setup = pl022_setup; - master->auto_runtime_pm = true; - master->transfer_one_message = pl022_transfer_one_message; - master->unprepare_transfer_hardware = pl022_unprepare_transfer_hardware; - master->rt = platform_info->rt; - master->dev.of_node = dev->of_node; - master->use_gpio_descriptors = true; + host->bus_num = platform_info->bus_id; + host->cleanup = pl022_cleanup; + host->setup = pl022_setup; + host->auto_runtime_pm = true; + host->transfer_one_message = pl022_transfer_one_message; + host->unprepare_transfer_hardware = pl022_unprepare_transfer_hardware; + host->rt = platform_info->rt; + host->dev.of_node = dev->of_node; + host->use_gpio_descriptors = true; /* * Supports mode 0-3, loopback, and active low CS. Transfers are * always MS bit first on the original pl022. */ - master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LOOP; + host->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LOOP; if (pl022->vendor->extended_cr) - master->mode_bits |= SPI_LSB_FIRST; + host->mode_bits |= SPI_LSB_FIRST; - dev_dbg(&adev->dev, "BUSNO: %d\n", master->bus_num); + dev_dbg(&adev->dev, "BUSNO: %d\n", host->bus_num); status = amba_request_regions(adev, NULL); if (status) @@ -2215,10 +2215,10 @@ static int pl022_probe(struct amba_device *adev, const struct amba_id *id) /* Register with the SPI framework */ amba_set_drvdata(adev, pl022); - status = devm_spi_register_master(&adev->dev, master); + status = devm_spi_register_controller(&adev->dev, host); if (status != 0) { dev_err_probe(&adev->dev, status, - "problem registering spi master\n"); + "problem registering spi host\n"); goto err_spi_register; } dev_dbg(dev, "probe succeeded\n"); @@ -2246,7 +2246,7 @@ static int pl022_probe(struct amba_device *adev, const struct amba_id *id) err_no_ioremap: amba_release_regions(adev); err_no_ioregion: - spi_master_put(master); + spi_controller_put(host); return status; } @@ -2265,7 +2265,7 @@ pl022_remove(struct amba_device *adev) pm_runtime_get_noresume(&adev->dev); load_ssp_default_config(pl022); - if (pl022->master_info->enable_dma) + if (pl022->host_info->enable_dma) pl022_dma_remove(pl022); clk_disable_unprepare(pl022->clk); @@ -2279,13 +2279,13 @@ static int pl022_suspend(struct device *dev) struct pl022 *pl022 = dev_get_drvdata(dev); int ret; - ret = spi_master_suspend(pl022->master); + ret = spi_controller_suspend(pl022->host); if (ret) return ret; ret = pm_runtime_force_suspend(dev); if (ret) { - spi_master_resume(pl022->master); + spi_controller_resume(pl022->host); return ret; } @@ -2305,7 +2305,7 @@ static int pl022_resume(struct device *dev) dev_err(dev, "problem resuming\n"); /* Start the queue running */ - ret = spi_master_resume(pl022->master); + ret = spi_controller_resume(pl022->host); if (!ret) dev_dbg(dev, "resumed\n"); From 71345830575984c01c4c2b655ef3a7877100fba3 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 18 Aug 2023 17:31:37 +0800 Subject: [PATCH 604/656] spi: ppc4xx: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230818093154.1183529-7-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-ppc4xx.c | 44 ++++++++++++++++++++-------------------- 1 file changed, 22 insertions(+), 22 deletions(-) diff --git a/drivers/spi/spi-ppc4xx.c b/drivers/spi/spi-ppc4xx.c index d725e915025d..03aab661be9d 100644 --- a/drivers/spi/spi-ppc4xx.c +++ b/drivers/spi/spi-ppc4xx.c @@ -126,7 +126,7 @@ struct ppc4xx_spi { unsigned char *rx; struct spi_ppc4xx_regs __iomem *regs; /* pointer to the registers */ - struct spi_master *master; + struct spi_controller *host; struct device *dev; }; @@ -143,7 +143,7 @@ static int spi_ppc4xx_txrx(struct spi_device *spi, struct spi_transfer *t) dev_dbg(&spi->dev, "txrx: tx %p, rx %p, len %d\n", t->tx_buf, t->rx_buf, t->len); - hw = spi_master_get_devdata(spi->master); + hw = spi_controller_get_devdata(spi->controller); hw->tx = t->tx_buf; hw->rx = t->rx_buf; @@ -161,7 +161,7 @@ static int spi_ppc4xx_txrx(struct spi_device *spi, struct spi_transfer *t) static int spi_ppc4xx_setupxfer(struct spi_device *spi, struct spi_transfer *t) { - struct ppc4xx_spi *hw = spi_master_get_devdata(spi->master); + struct ppc4xx_spi *hw = spi_controller_get_devdata(spi->controller); struct spi_ppc4xx_cs *cs = spi->controller_state; int scr; u8 cdm = 0; @@ -340,7 +340,7 @@ static void spi_ppc4xx_enable(struct ppc4xx_spi *hw) static int spi_ppc4xx_of_probe(struct platform_device *op) { struct ppc4xx_spi *hw; - struct spi_master *master; + struct spi_controller *host; struct spi_bitbang *bbp; struct resource resource; struct device_node *np = op->dev.of_node; @@ -349,20 +349,20 @@ static int spi_ppc4xx_of_probe(struct platform_device *op) int ret; const unsigned int *clk; - master = spi_alloc_master(dev, sizeof(*hw)); - if (master == NULL) + host = spi_alloc_host(dev, sizeof(*hw)); + if (host == NULL) return -ENOMEM; - master->dev.of_node = np; - platform_set_drvdata(op, master); - hw = spi_master_get_devdata(master); - hw->master = master; + host->dev.of_node = np; + platform_set_drvdata(op, host); + hw = spi_controller_get_devdata(host); + hw->host = host; hw->dev = dev; init_completion(&hw->done); /* Setup the state for the bitbang driver */ bbp = &hw->bitbang; - bbp->master = hw->master; + bbp->master = hw->host; bbp->setup_transfer = spi_ppc4xx_setupxfer; bbp->txrx_bufs = spi_ppc4xx_txrx; bbp->use_dma = 0; @@ -385,7 +385,7 @@ static int spi_ppc4xx_of_probe(struct platform_device *op) if (opbnp == NULL) { dev_err(dev, "OPB: cannot find node\n"); ret = -ENODEV; - goto free_master; + goto free_host; } /* Get the clock (Hz) for the OPB */ clk = of_get_property(opbnp, "clock-frequency", NULL); @@ -393,7 +393,7 @@ static int spi_ppc4xx_of_probe(struct platform_device *op) dev_err(dev, "OPB: no clock-frequency property set\n"); of_node_put(opbnp); ret = -ENODEV; - goto free_master; + goto free_host; } hw->opb_freq = *clk; hw->opb_freq >>= 2; @@ -402,7 +402,7 @@ static int spi_ppc4xx_of_probe(struct platform_device *op) ret = of_address_to_resource(np, 0, &resource); if (ret) { dev_err(dev, "error while parsing device node resource\n"); - goto free_master; + goto free_host; } hw->mapbase = resource.start; hw->mapsize = resource_size(&resource); @@ -411,7 +411,7 @@ static int spi_ppc4xx_of_probe(struct platform_device *op) if (hw->mapsize < sizeof(struct spi_ppc4xx_regs)) { dev_err(dev, "too small to map registers\n"); ret = -EINVAL; - goto free_master; + goto free_host; } /* Request IRQ */ @@ -420,7 +420,7 @@ static int spi_ppc4xx_of_probe(struct platform_device *op) 0, "spi_ppc4xx_of", (void *)hw); if (ret) { dev_err(dev, "unable to allocate interrupt\n"); - goto free_master; + goto free_host; } if (!request_mem_region(hw->mapbase, hw->mapsize, DRIVER_NAME)) { @@ -443,7 +443,7 @@ static int spi_ppc4xx_of_probe(struct platform_device *op) dev->dma_mask = 0; ret = spi_bitbang_start(bbp); if (ret) { - dev_err(dev, "failed to register SPI master\n"); + dev_err(dev, "failed to register SPI host\n"); goto unmap_regs; } @@ -457,8 +457,8 @@ map_io_error: release_mem_region(hw->mapbase, hw->mapsize); request_mem_error: free_irq(hw->irqnum, hw); -free_master: - spi_master_put(master); +free_host: + spi_controller_put(host); dev_err(dev, "initialization failed\n"); return ret; @@ -466,14 +466,14 @@ free_master: static void spi_ppc4xx_of_remove(struct platform_device *op) { - struct spi_master *master = platform_get_drvdata(op); - struct ppc4xx_spi *hw = spi_master_get_devdata(master); + struct spi_controller *host = platform_get_drvdata(op); + struct ppc4xx_spi *hw = spi_controller_get_devdata(host); spi_bitbang_stop(&hw->bitbang); release_mem_region(hw->mapbase, hw->mapsize); free_irq(hw->irqnum, hw); iounmap(hw->regs); - spi_master_put(master); + spi_controller_put(host); } static const struct of_device_id spi_ppc4xx_of_match[] = { From 60ba4431c8e8c137f92d050b9f0bfc8e8c26a364 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 18 Aug 2023 17:31:38 +0800 Subject: [PATCH 605/656] spi: pxa2xx: switch to use modern name Change legacy name master/slave to modern name host/target or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230818093154.1183529-8-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-pxa2xx.c | 24 ++++++++++++------------ include/linux/spi/pxa2xx_spi.h | 4 ++-- 2 files changed, 14 insertions(+), 14 deletions(-) diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c index 21f156587669..f2a856f6a99e 100644 --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c @@ -1102,7 +1102,7 @@ static int pxa2xx_spi_transfer_one(struct spi_controller *controller, } } - if (spi_controller_is_slave(controller)) { + if (spi_controller_is_target(controller)) { while (drv_data->write(drv_data)) ; if (drv_data->gpiod_ready) { @@ -1121,7 +1121,7 @@ static int pxa2xx_spi_transfer_one(struct spi_controller *controller, return 1; } -static int pxa2xx_spi_slave_abort(struct spi_controller *controller) +static int pxa2xx_spi_target_abort(struct spi_controller *controller) { struct driver_data *drv_data = spi_controller_get_devdata(controller); @@ -1199,7 +1199,7 @@ static int setup(struct spi_device *spi) break; default: tx_hi_thres = 0; - if (spi_controller_is_slave(drv_data->controller)) { + if (spi_controller_is_target(drv_data->controller)) { tx_thres = 1; rx_thres = 2; } else { @@ -1248,7 +1248,7 @@ static int setup(struct spi_device *spi) } chip->cr1 = 0; - if (spi_controller_is_slave(drv_data->controller)) { + if (spi_controller_is_target(drv_data->controller)) { chip->cr1 |= SSCR1_SCFR; chip->cr1 |= SSCR1_SCLKDIR; chip->cr1 |= SSCR1_SFRMDIR; @@ -1395,7 +1395,7 @@ pxa2xx_spi_init_pdata(struct platform_device *pdev) else ssp->port_id = uid; - pdata->is_slave = device_property_read_bool(dev, "spi-slave"); + pdata->is_target = device_property_read_bool(dev, "spi-slave"); pdata->num_chipselect = 1; pdata->enable_dma = true; pdata->dma_burst_size = 1; @@ -1461,10 +1461,10 @@ static int pxa2xx_spi_probe(struct platform_device *pdev) return -ENODEV; } - if (platform_info->is_slave) - controller = devm_spi_alloc_slave(dev, sizeof(*drv_data)); + if (platform_info->is_target) + controller = devm_spi_alloc_target(dev, sizeof(*drv_data)); else - controller = devm_spi_alloc_master(dev, sizeof(*drv_data)); + controller = devm_spi_alloc_host(dev, sizeof(*drv_data)); if (!controller) { dev_err(&pdev->dev, "cannot alloc spi_controller\n"); @@ -1487,7 +1487,7 @@ static int pxa2xx_spi_probe(struct platform_device *pdev) controller->setup = setup; controller->set_cs = pxa2xx_spi_set_cs; controller->transfer_one = pxa2xx_spi_transfer_one; - controller->slave_abort = pxa2xx_spi_slave_abort; + controller->target_abort = pxa2xx_spi_target_abort; controller->handle_err = pxa2xx_spi_handle_err; controller->unprepare_transfer_hardware = pxa2xx_spi_unprepare_transfer; controller->fw_translate_cs = pxa2xx_spi_fw_translate_cs; @@ -1579,7 +1579,7 @@ static int pxa2xx_spi_probe(struct platform_device *pdev) break; default: - if (spi_controller_is_slave(controller)) { + if (spi_controller_is_target(controller)) { tmp = SSCR1_SCFR | SSCR1_SCLKDIR | SSCR1_SFRMDIR | @@ -1592,7 +1592,7 @@ static int pxa2xx_spi_probe(struct platform_device *pdev) } pxa2xx_spi_write(drv_data, SSCR1, tmp); tmp = SSCR0_Motorola | SSCR0_DataSize(8); - if (!spi_controller_is_slave(controller)) + if (!spi_controller_is_target(controller)) tmp |= SSCR0_SCR(2); pxa2xx_spi_write(drv_data, SSCR0, tmp); break; @@ -1620,7 +1620,7 @@ static int pxa2xx_spi_probe(struct platform_device *pdev) controller->num_chipselect = platform_info->num_chipselect; controller->use_gpio_descriptors = true; - if (platform_info->is_slave) { + if (platform_info->is_target) { drv_data->gpiod_ready = devm_gpiod_get_optional(dev, "ready", GPIOD_OUT_LOW); if (IS_ERR(drv_data->gpiod_ready)) { diff --git a/include/linux/spi/pxa2xx_spi.h b/include/linux/spi/pxa2xx_spi.h index 4658e7801b42..0916cb9bcb0a 100644 --- a/include/linux/spi/pxa2xx_spi.h +++ b/include/linux/spi/pxa2xx_spi.h @@ -19,7 +19,7 @@ struct pxa2xx_spi_controller { u16 num_chipselect; u8 enable_dma; u8 dma_burst_size; - bool is_slave; + bool is_target; /* DMA engine specific config */ bool (*dma_filter)(struct dma_chan *chan, void *param); @@ -31,7 +31,7 @@ struct pxa2xx_spi_controller { }; /* - * The controller specific data for SPI slave devices + * The controller specific data for SPI target devices * (resides in spi_board_info.controller_data), * copied to spi_device.platform_data ... mostly for * DMA tuning. From 8d3ad99ad8f7370a0f9c8bdb741747fdd70e4e49 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 18 Aug 2023 17:31:39 +0800 Subject: [PATCH 606/656] spi: spi-qcom-qspi: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230818093154.1183529-9-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-qcom-qspi.c | 80 ++++++++++++++++++------------------- 1 file changed, 40 insertions(+), 40 deletions(-) diff --git a/drivers/spi/spi-qcom-qspi.c b/drivers/spi/spi-qcom-qspi.c index b9d5641b3365..49b775134485 100644 --- a/drivers/spi/spi-qcom-qspi.c +++ b/drivers/spi/spi-qcom-qspi.c @@ -247,11 +247,11 @@ static void qcom_qspi_pio_xfer(struct qcom_qspi *ctrl) qcom_qspi_pio_xfer_ctrl(ctrl); } -static void qcom_qspi_handle_err(struct spi_master *master, +static void qcom_qspi_handle_err(struct spi_controller *host, struct spi_message *msg) { u32 int_status; - struct qcom_qspi *ctrl = spi_master_get_devdata(master); + struct qcom_qspi *ctrl = spi_controller_get_devdata(host); unsigned long flags; int i; @@ -411,11 +411,11 @@ static bool qcom_qspi_can_dma(struct spi_controller *ctlr, return xfer->len > QSPI_MAX_BYTES_FIFO; } -static int qcom_qspi_transfer_one(struct spi_master *master, +static int qcom_qspi_transfer_one(struct spi_controller *host, struct spi_device *slv, struct spi_transfer *xfer) { - struct qcom_qspi *ctrl = spi_master_get_devdata(master); + struct qcom_qspi *ctrl = spi_controller_get_devdata(host); int ret; unsigned long speed_hz; unsigned long flags; @@ -443,7 +443,7 @@ static int qcom_qspi_transfer_one(struct spi_master *master, ctrl->xfer.tx_buf = xfer->tx_buf; } ctrl->xfer.is_last = list_is_last(&xfer->transfer_list, - &master->cur_msg->transfers); + &host->cur_msg->transfers); ctrl->xfer.rem_bytes = xfer->len; if (xfer->rx_sg.nents || xfer->tx_sg.nents) { @@ -481,7 +481,7 @@ exit: return 1; } -static int qcom_qspi_prepare_message(struct spi_master *master, +static int qcom_qspi_prepare_message(struct spi_controller *host, struct spi_message *message) { u32 mstr_cfg; @@ -490,7 +490,7 @@ static int qcom_qspi_prepare_message(struct spi_master *master, int tx_data_delay = 1; unsigned long flags; - ctrl = spi_master_get_devdata(master); + ctrl = spi_controller_get_devdata(host); spin_lock_irqsave(&ctrl->lock, flags); mstr_cfg = readl(ctrl->base + MSTR_CONFIG); @@ -694,18 +694,18 @@ static int qcom_qspi_probe(struct platform_device *pdev) { int ret; struct device *dev; - struct spi_master *master; + struct spi_controller *host; struct qcom_qspi *ctrl; dev = &pdev->dev; - master = devm_spi_alloc_master(dev, sizeof(*ctrl)); - if (!master) + host = devm_spi_alloc_host(dev, sizeof(*ctrl)); + if (!host) return -ENOMEM; - platform_set_drvdata(pdev, master); + platform_set_drvdata(pdev, host); - ctrl = spi_master_get_devdata(master); + ctrl = spi_controller_get_devdata(host); spin_lock_init(&ctrl->lock); ctrl->dev = dev; @@ -758,23 +758,23 @@ static int qcom_qspi_probe(struct platform_device *pdev) if (ret) return dev_err_probe(dev, ret, "could not set DMA mask\n"); - master->max_speed_hz = 300000000; - master->max_dma_len = 65536; /* as per HPG */ - master->dma_alignment = QSPI_ALIGN_REQ; - master->num_chipselect = QSPI_NUM_CS; - master->bus_num = -1; - master->dev.of_node = pdev->dev.of_node; - master->mode_bits = SPI_MODE_0 | - SPI_TX_DUAL | SPI_RX_DUAL | - SPI_TX_QUAD | SPI_RX_QUAD; - master->flags = SPI_CONTROLLER_HALF_DUPLEX; - master->prepare_message = qcom_qspi_prepare_message; - master->transfer_one = qcom_qspi_transfer_one; - master->handle_err = qcom_qspi_handle_err; + host->max_speed_hz = 300000000; + host->max_dma_len = 65536; /* as per HPG */ + host->dma_alignment = QSPI_ALIGN_REQ; + host->num_chipselect = QSPI_NUM_CS; + host->bus_num = -1; + host->dev.of_node = pdev->dev.of_node; + host->mode_bits = SPI_MODE_0 | + SPI_TX_DUAL | SPI_RX_DUAL | + SPI_TX_QUAD | SPI_RX_QUAD; + host->flags = SPI_CONTROLLER_HALF_DUPLEX; + host->prepare_message = qcom_qspi_prepare_message; + host->transfer_one = qcom_qspi_transfer_one; + host->handle_err = qcom_qspi_handle_err; if (of_property_read_bool(pdev->dev.of_node, "iommus")) - master->can_dma = qcom_qspi_can_dma; - master->auto_runtime_pm = true; - master->mem_ops = &qcom_qspi_mem_ops; + host->can_dma = qcom_qspi_can_dma; + host->auto_runtime_pm = true; + host->mem_ops = &qcom_qspi_mem_ops; ret = devm_pm_opp_set_clkname(&pdev->dev, "core"); if (ret) @@ -794,7 +794,7 @@ static int qcom_qspi_probe(struct platform_device *pdev) pm_runtime_set_autosuspend_delay(dev, 250); pm_runtime_enable(dev); - ret = spi_register_master(master); + ret = spi_register_controller(host); if (!ret) return 0; @@ -805,18 +805,18 @@ static int qcom_qspi_probe(struct platform_device *pdev) static void qcom_qspi_remove(struct platform_device *pdev) { - struct spi_master *master = platform_get_drvdata(pdev); + struct spi_controller *host = platform_get_drvdata(pdev); /* Unregister _before_ disabling pm_runtime() so we stop transfers */ - spi_unregister_master(master); + spi_unregister_controller(host); pm_runtime_disable(&pdev->dev); } static int __maybe_unused qcom_qspi_runtime_suspend(struct device *dev) { - struct spi_master *master = dev_get_drvdata(dev); - struct qcom_qspi *ctrl = spi_master_get_devdata(master); + struct spi_controller *host = dev_get_drvdata(dev); + struct qcom_qspi *ctrl = spi_controller_get_devdata(host); int ret; /* Drop the performance state vote */ @@ -837,8 +837,8 @@ static int __maybe_unused qcom_qspi_runtime_suspend(struct device *dev) static int __maybe_unused qcom_qspi_runtime_resume(struct device *dev) { - struct spi_master *master = dev_get_drvdata(dev); - struct qcom_qspi *ctrl = spi_master_get_devdata(master); + struct spi_controller *host = dev_get_drvdata(dev); + struct qcom_qspi *ctrl = spi_controller_get_devdata(host); int ret; pinctrl_pm_select_default_state(dev); @@ -859,30 +859,30 @@ static int __maybe_unused qcom_qspi_runtime_resume(struct device *dev) static int __maybe_unused qcom_qspi_suspend(struct device *dev) { - struct spi_master *master = dev_get_drvdata(dev); + struct spi_controller *host = dev_get_drvdata(dev); int ret; - ret = spi_master_suspend(master); + ret = spi_controller_suspend(host); if (ret) return ret; ret = pm_runtime_force_suspend(dev); if (ret) - spi_master_resume(master); + spi_controller_resume(host); return ret; } static int __maybe_unused qcom_qspi_resume(struct device *dev) { - struct spi_master *master = dev_get_drvdata(dev); + struct spi_controller *host = dev_get_drvdata(dev); int ret; ret = pm_runtime_force_resume(dev); if (ret) return ret; - ret = spi_master_resume(master); + ret = spi_controller_resume(host); if (ret) pm_runtime_force_suspend(dev); From 597442ff4f6226206b7cc28b86eb2be0ae9c6418 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 18 Aug 2023 17:31:40 +0800 Subject: [PATCH 607/656] spi: qup: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230818093154.1183529-10-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-qup.c | 166 +++++++++++++++++++++--------------------- 1 file changed, 83 insertions(+), 83 deletions(-) diff --git a/drivers/spi/spi-qup.c b/drivers/spi/spi-qup.c index fd16acb1f578..4b6f6b25219b 100644 --- a/drivers/spi/spi-qup.c +++ b/drivers/spi/spi-qup.c @@ -385,20 +385,20 @@ static void spi_qup_write(struct spi_qup *controller) } while (remainder); } -static int spi_qup_prep_sg(struct spi_master *master, struct scatterlist *sgl, +static int spi_qup_prep_sg(struct spi_controller *host, struct scatterlist *sgl, unsigned int nents, enum dma_transfer_direction dir, dma_async_tx_callback callback) { - struct spi_qup *qup = spi_master_get_devdata(master); + struct spi_qup *qup = spi_controller_get_devdata(host); unsigned long flags = DMA_PREP_INTERRUPT | DMA_PREP_FENCE; struct dma_async_tx_descriptor *desc; struct dma_chan *chan; dma_cookie_t cookie; if (dir == DMA_MEM_TO_DEV) - chan = master->dma_tx; + chan = host->dma_tx; else - chan = master->dma_rx; + chan = host->dma_rx; desc = dmaengine_prep_slave_sg(chan, sgl, nents, dir, flags); if (IS_ERR_OR_NULL(desc)) @@ -412,13 +412,13 @@ static int spi_qup_prep_sg(struct spi_master *master, struct scatterlist *sgl, return dma_submit_error(cookie); } -static void spi_qup_dma_terminate(struct spi_master *master, +static void spi_qup_dma_terminate(struct spi_controller *host, struct spi_transfer *xfer) { if (xfer->tx_buf) - dmaengine_terminate_all(master->dma_tx); + dmaengine_terminate_all(host->dma_tx); if (xfer->rx_buf) - dmaengine_terminate_all(master->dma_rx); + dmaengine_terminate_all(host->dma_rx); } static u32 spi_qup_sgl_get_nents_len(struct scatterlist *sgl, u32 max, @@ -445,8 +445,8 @@ static int spi_qup_do_dma(struct spi_device *spi, struct spi_transfer *xfer, unsigned long timeout) { dma_async_tx_callback rx_done = NULL, tx_done = NULL; - struct spi_master *master = spi->master; - struct spi_qup *qup = spi_master_get_devdata(master); + struct spi_controller *host = spi->controller; + struct spi_qup *qup = spi_controller_get_devdata(host); struct scatterlist *tx_sgl, *rx_sgl; int ret; @@ -481,20 +481,20 @@ static int spi_qup_do_dma(struct spi_device *spi, struct spi_transfer *xfer, return ret; } if (rx_sgl) { - ret = spi_qup_prep_sg(master, rx_sgl, rx_nents, + ret = spi_qup_prep_sg(host, rx_sgl, rx_nents, DMA_DEV_TO_MEM, rx_done); if (ret) return ret; - dma_async_issue_pending(master->dma_rx); + dma_async_issue_pending(host->dma_rx); } if (tx_sgl) { - ret = spi_qup_prep_sg(master, tx_sgl, tx_nents, + ret = spi_qup_prep_sg(host, tx_sgl, tx_nents, DMA_MEM_TO_DEV, tx_done); if (ret) return ret; - dma_async_issue_pending(master->dma_tx); + dma_async_issue_pending(host->dma_tx); } if (!wait_for_completion_timeout(&qup->done, timeout)) @@ -513,8 +513,8 @@ static int spi_qup_do_dma(struct spi_device *spi, struct spi_transfer *xfer, static int spi_qup_do_pio(struct spi_device *spi, struct spi_transfer *xfer, unsigned long timeout) { - struct spi_master *master = spi->master; - struct spi_qup *qup = spi_master_get_devdata(master); + struct spi_controller *host = spi->controller; + struct spi_qup *qup = spi_controller_get_devdata(host); int ret, n_words, iterations, offset = 0; n_words = qup->n_words; @@ -658,7 +658,7 @@ static irqreturn_t spi_qup_qup_irq(int irq, void *dev_id) /* set clock freq ... bits per word, determine mode */ static int spi_qup_io_prep(struct spi_device *spi, struct spi_transfer *xfer) { - struct spi_qup *controller = spi_master_get_devdata(spi->master); + struct spi_qup *controller = spi_controller_get_devdata(spi->controller); int ret; if (spi->mode & SPI_LOOP && xfer->len > controller->in_fifo_sz) { @@ -679,9 +679,9 @@ static int spi_qup_io_prep(struct spi_device *spi, struct spi_transfer *xfer) if (controller->n_words <= (controller->in_fifo_sz / sizeof(u32))) controller->mode = QUP_IO_M_MODE_FIFO; - else if (spi->master->can_dma && - spi->master->can_dma(spi->master, spi, xfer) && - spi->master->cur_msg_mapped) + else if (spi->controller->can_dma && + spi->controller->can_dma(spi->controller, spi, xfer) && + spi->controller->cur_msg_mapped) controller->mode = QUP_IO_M_MODE_BAM; else controller->mode = QUP_IO_M_MODE_BLOCK; @@ -692,7 +692,7 @@ static int spi_qup_io_prep(struct spi_device *spi, struct spi_transfer *xfer) /* prep qup for another spi transaction of specific type */ static int spi_qup_io_config(struct spi_device *spi, struct spi_transfer *xfer) { - struct spi_qup *controller = spi_master_get_devdata(spi->master); + struct spi_qup *controller = spi_controller_get_devdata(spi->controller); u32 config, iomode, control; unsigned long flags; @@ -840,11 +840,11 @@ static int spi_qup_io_config(struct spi_device *spi, struct spi_transfer *xfer) return 0; } -static int spi_qup_transfer_one(struct spi_master *master, +static int spi_qup_transfer_one(struct spi_controller *host, struct spi_device *spi, struct spi_transfer *xfer) { - struct spi_qup *controller = spi_master_get_devdata(master); + struct spi_qup *controller = spi_controller_get_devdata(host); unsigned long timeout, flags; int ret; @@ -878,21 +878,21 @@ static int spi_qup_transfer_one(struct spi_master *master, spin_unlock_irqrestore(&controller->lock, flags); if (ret && spi_qup_is_dma_xfer(controller->mode)) - spi_qup_dma_terminate(master, xfer); + spi_qup_dma_terminate(host, xfer); return ret; } -static bool spi_qup_can_dma(struct spi_master *master, struct spi_device *spi, +static bool spi_qup_can_dma(struct spi_controller *host, struct spi_device *spi, struct spi_transfer *xfer) { - struct spi_qup *qup = spi_master_get_devdata(master); + struct spi_qup *qup = spi_controller_get_devdata(host); size_t dma_align = dma_get_cache_alignment(); int n_words; if (xfer->rx_buf) { if (!IS_ALIGNED((size_t)xfer->rx_buf, dma_align) || - IS_ERR_OR_NULL(master->dma_rx)) + IS_ERR_OR_NULL(host->dma_rx)) return false; if (qup->qup_v1 && (xfer->len % qup->in_blk_sz)) return false; @@ -900,7 +900,7 @@ static bool spi_qup_can_dma(struct spi_master *master, struct spi_device *spi, if (xfer->tx_buf) { if (!IS_ALIGNED((size_t)xfer->tx_buf, dma_align) || - IS_ERR_OR_NULL(master->dma_tx)) + IS_ERR_OR_NULL(host->dma_tx)) return false; if (qup->qup_v1 && (xfer->len % qup->out_blk_sz)) return false; @@ -913,30 +913,30 @@ static bool spi_qup_can_dma(struct spi_master *master, struct spi_device *spi, return true; } -static void spi_qup_release_dma(struct spi_master *master) +static void spi_qup_release_dma(struct spi_controller *host) { - if (!IS_ERR_OR_NULL(master->dma_rx)) - dma_release_channel(master->dma_rx); - if (!IS_ERR_OR_NULL(master->dma_tx)) - dma_release_channel(master->dma_tx); + if (!IS_ERR_OR_NULL(host->dma_rx)) + dma_release_channel(host->dma_rx); + if (!IS_ERR_OR_NULL(host->dma_tx)) + dma_release_channel(host->dma_tx); } -static int spi_qup_init_dma(struct spi_master *master, resource_size_t base) +static int spi_qup_init_dma(struct spi_controller *host, resource_size_t base) { - struct spi_qup *spi = spi_master_get_devdata(master); + struct spi_qup *spi = spi_controller_get_devdata(host); struct dma_slave_config *rx_conf = &spi->rx_conf, *tx_conf = &spi->tx_conf; struct device *dev = spi->dev; int ret; /* allocate dma resources, if available */ - master->dma_rx = dma_request_chan(dev, "rx"); - if (IS_ERR(master->dma_rx)) - return PTR_ERR(master->dma_rx); + host->dma_rx = dma_request_chan(dev, "rx"); + if (IS_ERR(host->dma_rx)) + return PTR_ERR(host->dma_rx); - master->dma_tx = dma_request_chan(dev, "tx"); - if (IS_ERR(master->dma_tx)) { - ret = PTR_ERR(master->dma_tx); + host->dma_tx = dma_request_chan(dev, "tx"); + if (IS_ERR(host->dma_tx)) { + ret = PTR_ERR(host->dma_tx); goto err_tx; } @@ -951,13 +951,13 @@ static int spi_qup_init_dma(struct spi_master *master, resource_size_t base) tx_conf->dst_addr = base + QUP_OUTPUT_FIFO; tx_conf->dst_maxburst = spi->out_blk_sz; - ret = dmaengine_slave_config(master->dma_rx, rx_conf); + ret = dmaengine_slave_config(host->dma_rx, rx_conf); if (ret) { dev_err(dev, "failed to configure RX channel\n"); goto err; } - ret = dmaengine_slave_config(master->dma_tx, tx_conf); + ret = dmaengine_slave_config(host->dma_tx, tx_conf); if (ret) { dev_err(dev, "failed to configure TX channel\n"); goto err; @@ -966,9 +966,9 @@ static int spi_qup_init_dma(struct spi_master *master, resource_size_t base) return 0; err: - dma_release_channel(master->dma_tx); + dma_release_channel(host->dma_tx); err_tx: - dma_release_channel(master->dma_rx); + dma_release_channel(host->dma_rx); return ret; } @@ -978,7 +978,7 @@ static void spi_qup_set_cs(struct spi_device *spi, bool val) u32 spi_ioc; u32 spi_ioc_orig; - controller = spi_master_get_devdata(spi->master); + controller = spi_controller_get_devdata(spi->controller); spi_ioc = readl_relaxed(controller->base + SPI_IO_CONTROL); spi_ioc_orig = spi_ioc; if (!val) @@ -992,7 +992,7 @@ static void spi_qup_set_cs(struct spi_device *spi, bool val) static int spi_qup_probe(struct platform_device *pdev) { - struct spi_master *master; + struct spi_controller *host; struct clk *iclk, *cclk; struct spi_qup *controller; struct resource *res; @@ -1027,34 +1027,34 @@ static int spi_qup_probe(struct platform_device *pdev) return -ENXIO; } - master = spi_alloc_master(dev, sizeof(struct spi_qup)); - if (!master) { - dev_err(dev, "cannot allocate master\n"); + host = spi_alloc_host(dev, sizeof(struct spi_qup)); + if (!host) { + dev_err(dev, "cannot allocate host\n"); return -ENOMEM; } /* use num-cs unless not present or out of range */ if (of_property_read_u32(dev->of_node, "num-cs", &num_cs) || num_cs > SPI_NUM_CHIPSELECTS) - master->num_chipselect = SPI_NUM_CHIPSELECTS; + host->num_chipselect = SPI_NUM_CHIPSELECTS; else - master->num_chipselect = num_cs; + host->num_chipselect = num_cs; - master->use_gpio_descriptors = true; - master->max_native_cs = SPI_NUM_CHIPSELECTS; - master->bus_num = pdev->id; - master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LOOP; - master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32); - master->max_speed_hz = max_freq; - master->transfer_one = spi_qup_transfer_one; - master->dev.of_node = pdev->dev.of_node; - master->auto_runtime_pm = true; - master->dma_alignment = dma_get_cache_alignment(); - master->max_dma_len = SPI_MAX_XFER; + host->use_gpio_descriptors = true; + host->max_native_cs = SPI_NUM_CHIPSELECTS; + host->bus_num = pdev->id; + host->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LOOP; + host->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32); + host->max_speed_hz = max_freq; + host->transfer_one = spi_qup_transfer_one; + host->dev.of_node = pdev->dev.of_node; + host->auto_runtime_pm = true; + host->dma_alignment = dma_get_cache_alignment(); + host->max_dma_len = SPI_MAX_XFER; - platform_set_drvdata(pdev, master); + platform_set_drvdata(pdev, host); - controller = spi_master_get_devdata(master); + controller = spi_controller_get_devdata(host); controller->dev = dev; controller->base = base; @@ -1062,16 +1062,16 @@ static int spi_qup_probe(struct platform_device *pdev) controller->cclk = cclk; controller->irq = irq; - ret = spi_qup_init_dma(master, res->start); + ret = spi_qup_init_dma(host, res->start); if (ret == -EPROBE_DEFER) goto error; else if (!ret) - master->can_dma = spi_qup_can_dma; + host->can_dma = spi_qup_can_dma; controller->qup_v1 = (uintptr_t)of_device_get_match_data(dev); if (!controller->qup_v1) - master->set_cs = spi_qup_set_cs; + host->set_cs = spi_qup_set_cs; spin_lock_init(&controller->lock); init_completion(&controller->done); @@ -1149,7 +1149,7 @@ static int spi_qup_probe(struct platform_device *pdev) pm_runtime_set_active(dev); pm_runtime_enable(dev); - ret = devm_spi_register_master(dev, master); + ret = devm_spi_register_controller(dev, host); if (ret) goto disable_pm; @@ -1161,17 +1161,17 @@ error_clk: clk_disable_unprepare(cclk); clk_disable_unprepare(iclk); error_dma: - spi_qup_release_dma(master); + spi_qup_release_dma(host); error: - spi_master_put(master); + spi_controller_put(host); return ret; } #ifdef CONFIG_PM static int spi_qup_pm_suspend_runtime(struct device *device) { - struct spi_master *master = dev_get_drvdata(device); - struct spi_qup *controller = spi_master_get_devdata(master); + struct spi_controller *host = dev_get_drvdata(device); + struct spi_qup *controller = spi_controller_get_devdata(host); u32 config; /* Enable clocks auto gaiting */ @@ -1187,8 +1187,8 @@ static int spi_qup_pm_suspend_runtime(struct device *device) static int spi_qup_pm_resume_runtime(struct device *device) { - struct spi_master *master = dev_get_drvdata(device); - struct spi_qup *controller = spi_master_get_devdata(master); + struct spi_controller *host = dev_get_drvdata(device); + struct spi_qup *controller = spi_controller_get_devdata(host); u32 config; int ret; @@ -1213,8 +1213,8 @@ static int spi_qup_pm_resume_runtime(struct device *device) #ifdef CONFIG_PM_SLEEP static int spi_qup_suspend(struct device *device) { - struct spi_master *master = dev_get_drvdata(device); - struct spi_qup *controller = spi_master_get_devdata(master); + struct spi_controller *host = dev_get_drvdata(device); + struct spi_qup *controller = spi_controller_get_devdata(host); int ret; if (pm_runtime_suspended(device)) { @@ -1222,7 +1222,7 @@ static int spi_qup_suspend(struct device *device) if (ret) return ret; } - ret = spi_master_suspend(master); + ret = spi_controller_suspend(host); if (ret) return ret; @@ -1237,8 +1237,8 @@ static int spi_qup_suspend(struct device *device) static int spi_qup_resume(struct device *device) { - struct spi_master *master = dev_get_drvdata(device); - struct spi_qup *controller = spi_master_get_devdata(master); + struct spi_controller *host = dev_get_drvdata(device); + struct spi_qup *controller = spi_controller_get_devdata(host); int ret; ret = clk_prepare_enable(controller->iclk); @@ -1255,7 +1255,7 @@ static int spi_qup_resume(struct device *device) if (ret) goto disable_clk; - ret = spi_master_resume(master); + ret = spi_controller_resume(host); if (ret) goto disable_clk; @@ -1270,8 +1270,8 @@ disable_clk: static void spi_qup_remove(struct platform_device *pdev) { - struct spi_master *master = dev_get_drvdata(&pdev->dev); - struct spi_qup *controller = spi_master_get_devdata(master); + struct spi_controller *host = dev_get_drvdata(&pdev->dev); + struct spi_qup *controller = spi_controller_get_devdata(host); int ret; ret = pm_runtime_get_sync(&pdev->dev); @@ -1289,7 +1289,7 @@ static void spi_qup_remove(struct platform_device *pdev) ERR_PTR(ret)); } - spi_qup_release_dma(master); + spi_qup_release_dma(host); pm_runtime_put_noidle(&pdev->dev); pm_runtime_disable(&pdev->dev); From e6302d00d985d49f891d4b007afdae824d873edf Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 18 Aug 2023 17:31:41 +0800 Subject: [PATCH 608/656] spi: rb4xx: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230818093154.1183529-11-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-rb4xx.c | 36 ++++++++++++++++++------------------ 1 file changed, 18 insertions(+), 18 deletions(-) diff --git a/drivers/spi/spi-rb4xx.c b/drivers/spi/spi-rb4xx.c index c817889a7797..225f75550780 100644 --- a/drivers/spi/spi-rb4xx.c +++ b/drivers/spi/spi-rb4xx.c @@ -80,7 +80,7 @@ static void do_spi_byte_two(struct rb4xx_spi *rbspi, u32 spi_ioc, u8 byte) static void rb4xx_set_cs(struct spi_device *spi, bool enable) { - struct rb4xx_spi *rbspi = spi_master_get_devdata(spi->master); + struct rb4xx_spi *rbspi = spi_controller_get_devdata(spi->controller); /* * Setting CS is done along with bitbanging the actual values, @@ -92,10 +92,10 @@ static void rb4xx_set_cs(struct spi_device *spi, bool enable) AR71XX_SPI_IOC_CS0 | AR71XX_SPI_IOC_CS1); } -static int rb4xx_transfer_one(struct spi_master *master, +static int rb4xx_transfer_one(struct spi_controller *host, struct spi_device *spi, struct spi_transfer *t) { - struct rb4xx_spi *rbspi = spi_master_get_devdata(master); + struct rb4xx_spi *rbspi = spi_controller_get_devdata(host); int i; u32 spi_ioc; u8 *rx_buf; @@ -126,14 +126,14 @@ static int rb4xx_transfer_one(struct spi_master *master, continue; rx_buf[i] = rb4xx_read(rbspi, AR71XX_SPI_REG_RDS); } - spi_finalize_current_transfer(master); + spi_finalize_current_transfer(host); return 0; } static int rb4xx_spi_probe(struct platform_device *pdev) { - struct spi_master *master; + struct spi_controller *host; struct clk *ahb_clk; struct rb4xx_spi *rbspi; int err; @@ -143,31 +143,31 @@ static int rb4xx_spi_probe(struct platform_device *pdev) if (IS_ERR(spi_base)) return PTR_ERR(spi_base); - master = devm_spi_alloc_master(&pdev->dev, sizeof(*rbspi)); - if (!master) + host = devm_spi_alloc_host(&pdev->dev, sizeof(*rbspi)); + if (!host) return -ENOMEM; ahb_clk = devm_clk_get(&pdev->dev, "ahb"); if (IS_ERR(ahb_clk)) return PTR_ERR(ahb_clk); - master->dev.of_node = pdev->dev.of_node; - master->bus_num = 0; - master->num_chipselect = 3; - master->mode_bits = SPI_TX_DUAL; - master->bits_per_word_mask = SPI_BPW_MASK(8); - master->flags = SPI_CONTROLLER_MUST_TX; - master->transfer_one = rb4xx_transfer_one; - master->set_cs = rb4xx_set_cs; + host->dev.of_node = pdev->dev.of_node; + host->bus_num = 0; + host->num_chipselect = 3; + host->mode_bits = SPI_TX_DUAL; + host->bits_per_word_mask = SPI_BPW_MASK(8); + host->flags = SPI_CONTROLLER_MUST_TX; + host->transfer_one = rb4xx_transfer_one; + host->set_cs = rb4xx_set_cs; - rbspi = spi_master_get_devdata(master); + rbspi = spi_controller_get_devdata(host); rbspi->base = spi_base; rbspi->clk = ahb_clk; platform_set_drvdata(pdev, rbspi); - err = devm_spi_register_master(&pdev->dev, master); + err = devm_spi_register_controller(&pdev->dev, host); if (err) { - dev_err(&pdev->dev, "failed to register SPI master\n"); + dev_err(&pdev->dev, "failed to register SPI host\n"); return err; } From c84036243c6bc0e1b5846e379f5d4b3e4658688e Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 18 Aug 2023 17:31:42 +0800 Subject: [PATCH 609/656] spi: realtek-rtl: switch to use devm_spi_alloc_host() Switch to use modern name function devm_spi_alloc_host(). No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230818093154.1183529-12-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-realtek-rtl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/spi-realtek-rtl.c b/drivers/spi/spi-realtek-rtl.c index 866b0477dbd7..0b0123e20b54 100644 --- a/drivers/spi/spi-realtek-rtl.c +++ b/drivers/spi/spi-realtek-rtl.c @@ -153,7 +153,7 @@ static int realtek_rtl_spi_probe(struct platform_device *pdev) struct rtspi *rtspi; int err; - ctrl = devm_spi_alloc_master(&pdev->dev, sizeof(*rtspi)); + ctrl = devm_spi_alloc_host(&pdev->dev, sizeof(*rtspi)); if (!ctrl) { dev_err(&pdev->dev, "Error allocating SPI controller\n"); return -ENOMEM; From 7d5db7251997da069ca22c837a53ca8a84b4036e Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 18 Aug 2023 17:31:43 +0800 Subject: [PATCH 610/656] spi: rockchip-sfc: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230818093154.1183529-13-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-rockchip-sfc.c | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/drivers/spi/spi-rockchip-sfc.c b/drivers/spi/spi-rockchip-sfc.c index bd550e76ab3d..0d7fadcd4ed3 100644 --- a/drivers/spi/spi-rockchip-sfc.c +++ b/drivers/spi/spi-rockchip-sfc.c @@ -487,7 +487,7 @@ static int rockchip_sfc_xfer_done(struct rockchip_sfc *sfc, u32 timeout_us) static int rockchip_sfc_exec_mem_op(struct spi_mem *mem, const struct spi_mem_op *op) { - struct rockchip_sfc *sfc = spi_master_get_devdata(mem->spi->master); + struct rockchip_sfc *sfc = spi_controller_get_devdata(mem->spi->controller); u32 len = op->data.nbytes; int ret; @@ -523,7 +523,7 @@ static int rockchip_sfc_exec_mem_op(struct spi_mem *mem, const struct spi_mem_op static int rockchip_sfc_adjust_op_size(struct spi_mem *mem, struct spi_mem_op *op) { - struct rockchip_sfc *sfc = spi_master_get_devdata(mem->spi->master); + struct rockchip_sfc *sfc = spi_controller_get_devdata(mem->spi->controller); op->data.nbytes = min(op->data.nbytes, sfc->max_iosize); @@ -557,22 +557,22 @@ static irqreturn_t rockchip_sfc_irq_handler(int irq, void *dev_id) static int rockchip_sfc_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; - struct spi_master *master; + struct spi_controller *host; struct rockchip_sfc *sfc; int ret; - master = devm_spi_alloc_master(&pdev->dev, sizeof(*sfc)); - if (!master) + host = devm_spi_alloc_host(&pdev->dev, sizeof(*sfc)); + if (!host) return -ENOMEM; - master->flags = SPI_CONTROLLER_HALF_DUPLEX; - master->mem_ops = &rockchip_sfc_mem_ops; - master->dev.of_node = pdev->dev.of_node; - master->mode_bits = SPI_TX_QUAD | SPI_TX_DUAL | SPI_RX_QUAD | SPI_RX_DUAL; - master->max_speed_hz = SFC_MAX_SPEED; - master->num_chipselect = SFC_MAX_CHIPSELECT_NUM; + host->flags = SPI_CONTROLLER_HALF_DUPLEX; + host->mem_ops = &rockchip_sfc_mem_ops; + host->dev.of_node = pdev->dev.of_node; + host->mode_bits = SPI_TX_QUAD | SPI_TX_DUAL | SPI_RX_QUAD | SPI_RX_DUAL; + host->max_speed_hz = SFC_MAX_SPEED; + host->num_chipselect = SFC_MAX_CHIPSELECT_NUM; - sfc = spi_master_get_devdata(master); + sfc = spi_controller_get_devdata(host); sfc->dev = dev; sfc->regbase = devm_platform_ioremap_resource(pdev, 0); @@ -640,7 +640,7 @@ static int rockchip_sfc_probe(struct platform_device *pdev) sfc->max_iosize = rockchip_sfc_get_max_iosize(sfc); sfc->version = rockchip_sfc_get_version(sfc); - ret = spi_register_master(master); + ret = spi_register_controller(host); if (ret) goto err_irq; @@ -656,10 +656,10 @@ err_hclk: static void rockchip_sfc_remove(struct platform_device *pdev) { - struct spi_master *master = platform_get_drvdata(pdev); + struct spi_controller *host = platform_get_drvdata(pdev); struct rockchip_sfc *sfc = platform_get_drvdata(pdev); - spi_unregister_master(master); + spi_unregister_controller(host); clk_disable_unprepare(sfc->clk); clk_disable_unprepare(sfc->hclk); From 1a3ccff3bc39acc04e69e3a65833d474471598ec Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 18 Aug 2023 17:31:44 +0800 Subject: [PATCH 611/656] spi: rockchip: switch to use modern name Change legacy name master/slave to modern name host/target or controller. No functional changed. Signed-off-by: Yang Yingliang Acked-by: Heiko Stuebner Link: https://lore.kernel.org/r/20230818093154.1183529-14-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-rockchip.c | 58 +++++++++++++++++++------------------- 1 file changed, 29 insertions(+), 29 deletions(-) diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c index a37943847e81..5b010094dace 100644 --- a/drivers/spi/spi-rockchip.c +++ b/drivers/spi/spi-rockchip.c @@ -104,8 +104,8 @@ #define CR0_XFM_RO 0x2 #define CR0_OPM_OFFSET 20 -#define CR0_OPM_MASTER 0x0 -#define CR0_OPM_SLAVE 0x1 +#define CR0_OPM_HOST 0x0 +#define CR0_OPM_TARGET 0x1 #define CR0_SOI_OFFSET 23 @@ -125,7 +125,7 @@ #define SR_TF_EMPTY (1 << 2) #define SR_RF_EMPTY (1 << 3) #define SR_RF_FULL (1 << 4) -#define SR_SLAVE_TX_BUSY (1 << 5) +#define SR_TARGET_TX_BUSY (1 << 5) /* Bit fields in ISR, IMR, ISR, RISR, 5bit */ #define INT_MASK 0x1f @@ -151,7 +151,7 @@ #define RXDMA (1 << 0) #define TXDMA (1 << 1) -/* sclk_out: spi master internal logic in rk3x can support 50Mhz */ +/* sclk_out: spi host internal logic in rk3x can support 50Mhz */ #define MAX_SCLK_OUT 50000000U /* @@ -194,8 +194,8 @@ struct rockchip_spi { bool cs_asserted[ROCKCHIP_SPI_MAX_CS_NUM]; - bool slave_abort; - bool cs_inactive; /* spi slave tansmition stop when cs inactive */ + bool target_abort; + bool cs_inactive; /* spi target tansmition stop when cs inactive */ bool cs_high_supported; /* native CS supports active-high polarity */ struct spi_transfer *xfer; /* Store xfer temporarily */ @@ -206,13 +206,13 @@ static inline void spi_enable_chip(struct rockchip_spi *rs, bool enable) writel_relaxed((enable ? 1U : 0U), rs->regs + ROCKCHIP_SPI_SSIENR); } -static inline void wait_for_tx_idle(struct rockchip_spi *rs, bool slave_mode) +static inline void wait_for_tx_idle(struct rockchip_spi *rs, bool target_mode) { unsigned long timeout = jiffies + msecs_to_jiffies(5); do { - if (slave_mode) { - if (!(readl_relaxed(rs->regs + ROCKCHIP_SPI_SR) & SR_SLAVE_TX_BUSY) && + if (target_mode) { + if (!(readl_relaxed(rs->regs + ROCKCHIP_SPI_SR) & SR_TARGET_TX_BUSY) && !((readl_relaxed(rs->regs + ROCKCHIP_SPI_SR) & SR_BUSY))) return; } else { @@ -351,9 +351,9 @@ static irqreturn_t rockchip_spi_isr(int irq, void *dev_id) struct spi_controller *ctlr = dev_id; struct rockchip_spi *rs = spi_controller_get_devdata(ctlr); - /* When int_cs_inactive comes, spi slave abort */ + /* When int_cs_inactive comes, spi target abort */ if (rs->cs_inactive && readl_relaxed(rs->regs + ROCKCHIP_SPI_IMR) & INT_CS_INACTIVE) { - ctlr->slave_abort(ctlr); + ctlr->target_abort(ctlr); writel_relaxed(0, rs->regs + ROCKCHIP_SPI_IMR); writel_relaxed(0xffffffff, rs->regs + ROCKCHIP_SPI_ICR); @@ -405,7 +405,7 @@ static void rockchip_spi_dma_rxcb(void *data) struct rockchip_spi *rs = spi_controller_get_devdata(ctlr); int state = atomic_fetch_andnot(RXDMA, &rs->state); - if (state & TXDMA && !rs->slave_abort) + if (state & TXDMA && !rs->target_abort) return; if (rs->cs_inactive) @@ -421,11 +421,11 @@ static void rockchip_spi_dma_txcb(void *data) struct rockchip_spi *rs = spi_controller_get_devdata(ctlr); int state = atomic_fetch_andnot(TXDMA, &rs->state); - if (state & RXDMA && !rs->slave_abort) + if (state & RXDMA && !rs->target_abort) return; /* Wait until the FIFO data completely. */ - wait_for_tx_idle(rs, ctlr->slave); + wait_for_tx_idle(rs, ctlr->target); spi_enable_chip(rs, false); spi_finalize_current_transfer(ctlr); @@ -525,7 +525,7 @@ static int rockchip_spi_prepare_dma(struct rockchip_spi *rs, static int rockchip_spi_config(struct rockchip_spi *rs, struct spi_device *spi, struct spi_transfer *xfer, - bool use_dma, bool slave_mode) + bool use_dma, bool target_mode) { u32 cr0 = CR0_FRF_SPI << CR0_FRF_OFFSET | CR0_BHT_8BIT << CR0_BHT_OFFSET @@ -534,9 +534,9 @@ static int rockchip_spi_config(struct rockchip_spi *rs, u32 cr1; u32 dmacr = 0; - if (slave_mode) - cr0 |= CR0_OPM_SLAVE << CR0_OPM_OFFSET; - rs->slave_abort = false; + if (target_mode) + cr0 |= CR0_OPM_TARGET << CR0_OPM_OFFSET; + rs->target_abort = false; cr0 |= rs->rsd << CR0_RSD_OFFSET; cr0 |= (spi->mode & 0x3U) << CR0_SCPH_OFFSET; @@ -614,7 +614,7 @@ static size_t rockchip_spi_max_transfer_size(struct spi_device *spi) return ROCKCHIP_SPI_MAX_TRANLEN; } -static int rockchip_spi_slave_abort(struct spi_controller *ctlr) +static int rockchip_spi_target_abort(struct spi_controller *ctlr) { struct rockchip_spi *rs = spi_controller_get_devdata(ctlr); u32 rx_fifo_left; @@ -659,7 +659,7 @@ out: dmaengine_terminate_sync(ctlr->dma_tx); atomic_set(&rs->state, 0); spi_enable_chip(rs, false); - rs->slave_abort = true; + rs->target_abort = true; spi_finalize_current_transfer(ctlr); return 0; @@ -697,7 +697,7 @@ static int rockchip_spi_transfer_one( rs->xfer = xfer; use_dma = ctlr->can_dma ? ctlr->can_dma(ctlr, spi, xfer) : false; - ret = rockchip_spi_config(rs, spi, xfer, use_dma, ctlr->slave); + ret = rockchip_spi_config(rs, spi, xfer, use_dma, ctlr->target); if (ret) return ret; @@ -757,15 +757,15 @@ static int rockchip_spi_probe(struct platform_device *pdev) struct resource *mem; struct device_node *np = pdev->dev.of_node; u32 rsd_nsecs, num_cs; - bool slave_mode; + bool target_mode; - slave_mode = of_property_read_bool(np, "spi-slave"); + target_mode = of_property_read_bool(np, "spi-slave"); - if (slave_mode) - ctlr = spi_alloc_slave(&pdev->dev, + if (target_mode) + ctlr = spi_alloc_target(&pdev->dev, sizeof(struct rockchip_spi)); else - ctlr = spi_alloc_master(&pdev->dev, + ctlr = spi_alloc_host(&pdev->dev, sizeof(struct rockchip_spi)); if (!ctlr) @@ -854,9 +854,9 @@ static int rockchip_spi_probe(struct platform_device *pdev) ctlr->auto_runtime_pm = true; ctlr->bus_num = pdev->id; ctlr->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LOOP | SPI_LSB_FIRST; - if (slave_mode) { + if (target_mode) { ctlr->mode_bits |= SPI_NO_CS; - ctlr->slave_abort = rockchip_spi_slave_abort; + ctlr->target_abort = rockchip_spi_target_abort; } else { ctlr->flags = SPI_CONTROLLER_GPIO_SS; ctlr->max_native_cs = ROCKCHIP_SPI_MAX_CS_NUM; @@ -911,7 +911,7 @@ static int rockchip_spi_probe(struct platform_device *pdev) case ROCKCHIP_SPI_VER2_TYPE2: rs->cs_high_supported = true; ctlr->mode_bits |= SPI_CS_HIGH; - if (ctlr->can_dma && slave_mode) + if (ctlr->can_dma && target_mode) rs->cs_inactive = true; else rs->cs_inactive = false; From 1405efe76f2a242832a53b56deda15f17d51219b Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 18 Aug 2023 17:31:45 +0800 Subject: [PATCH 612/656] spi: rspi: switch to use spi_alloc_host() Switch to use modern name function spi_alloc_host(). No functional changed. Signed-off-by: Yang Yingliang Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20230818093154.1183529-15-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-rspi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c index 83bb16995e06..8e81f1a8623f 100644 --- a/drivers/spi/spi-rspi.c +++ b/drivers/spi/spi-rspi.c @@ -1294,7 +1294,7 @@ static int rspi_probe(struct platform_device *pdev) const struct spi_ops *ops; unsigned long clksrc; - ctlr = spi_alloc_master(&pdev->dev, sizeof(struct rspi_data)); + ctlr = spi_alloc_host(&pdev->dev, sizeof(struct rspi_data)); if (ctlr == NULL) return -ENOMEM; From 6536da62e4378caafa309ae372ca88f065f3e47c Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 18 Aug 2023 17:31:46 +0800 Subject: [PATCH 613/656] spi: rzv2m-csi: switch to use devm_spi_alloc_host() Switch to use modern name function devm_spi_alloc_host(). No functional changed. Signed-off-by: Yang Yingliang Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20230818093154.1183529-16-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-rzv2m-csi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/spi-rzv2m-csi.c b/drivers/spi/spi-rzv2m-csi.c index d098aefa370d..d0f51b17aa7c 100644 --- a/drivers/spi/spi-rzv2m-csi.c +++ b/drivers/spi/spi-rzv2m-csi.c @@ -555,7 +555,7 @@ static int rzv2m_csi_probe(struct platform_device *pdev) int irq; int ret; - controller = devm_spi_alloc_master(dev, sizeof(*csi)); + controller = devm_spi_alloc_host(dev, sizeof(*csi)); if (!controller) return -ENOMEM; From f4bc49eda254c6f49c6679149d31e93271d6ee74 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 18 Aug 2023 17:31:47 +0800 Subject: [PATCH 614/656] spi: s3c64xx: switch to use modern name Change legacy name master/slave to modern name host/target or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230818093154.1183529-17-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-s3c64xx.c | 126 +++++++++++++++++++------------------- 1 file changed, 63 insertions(+), 63 deletions(-) diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c index bf7cb18be9dc..0e48ffd499b9 100644 --- a/drivers/spi/spi-s3c64xx.c +++ b/drivers/spi/spi-s3c64xx.c @@ -163,9 +163,9 @@ struct s3c64xx_spi_port_config { * struct s3c64xx_spi_driver_data - Runtime info holder for SPI driver. * @clk: Pointer to the spi clock. * @src_clk: Pointer to the clock used to generate SPI signals. - * @ioclk: Pointer to the i/o clock between master and slave + * @ioclk: Pointer to the i/o clock between host and target * @pdev: Pointer to device's platform device data - * @master: Pointer to the SPI Protocol master. + * @host: Pointer to the SPI Protocol host. * @cntrlr_info: Platform specific data for the controller this driver manages. * @lock: Controller specific lock. * @state: Set of FLAGS to indicate status. @@ -186,7 +186,7 @@ struct s3c64xx_spi_driver_data { struct clk *src_clk; struct clk *ioclk; struct platform_device *pdev; - struct spi_master *master; + struct spi_controller *host; struct s3c64xx_spi_info *cntrlr_info; spinlock_t lock; unsigned long sfr_start; @@ -329,7 +329,7 @@ static int prepare_dma(struct s3c64xx_spi_dma_data *dma, static void s3c64xx_spi_set_cs(struct spi_device *spi, bool enable) { struct s3c64xx_spi_driver_data *sdd = - spi_master_get_devdata(spi->master); + spi_controller_get_devdata(spi->controller); if (sdd->cntrlr_info->no_cs) return; @@ -351,9 +351,9 @@ static void s3c64xx_spi_set_cs(struct spi_device *spi, bool enable) } } -static int s3c64xx_spi_prepare_transfer(struct spi_master *spi) +static int s3c64xx_spi_prepare_transfer(struct spi_controller *spi) { - struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(spi); + struct s3c64xx_spi_driver_data *sdd = spi_controller_get_devdata(spi); if (is_polling(sdd)) return 0; @@ -381,9 +381,9 @@ static int s3c64xx_spi_prepare_transfer(struct spi_master *spi) return 0; } -static int s3c64xx_spi_unprepare_transfer(struct spi_master *spi) +static int s3c64xx_spi_unprepare_transfer(struct spi_controller *spi) { - struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(spi); + struct s3c64xx_spi_driver_data *sdd = spi_controller_get_devdata(spi); if (is_polling(sdd)) return 0; @@ -399,11 +399,11 @@ static int s3c64xx_spi_unprepare_transfer(struct spi_master *spi) return 0; } -static bool s3c64xx_spi_can_dma(struct spi_master *master, +static bool s3c64xx_spi_can_dma(struct spi_controller *host, struct spi_device *spi, struct spi_transfer *xfer) { - struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master); + struct s3c64xx_spi_driver_data *sdd = spi_controller_get_devdata(host); if (sdd->rx_dma.ch && sdd->tx_dma.ch) { return xfer->len > (FIFO_LVL_MASK(sdd) >> 1) + 1; @@ -712,10 +712,10 @@ static int s3c64xx_spi_config(struct s3c64xx_spi_driver_data *sdd) #define XFER_DMAADDR_INVALID DMA_BIT_MASK(32) -static int s3c64xx_spi_prepare_message(struct spi_master *master, +static int s3c64xx_spi_prepare_message(struct spi_controller *host, struct spi_message *msg) { - struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master); + struct s3c64xx_spi_driver_data *sdd = spi_controller_get_devdata(host); struct spi_device *spi = msg->spi; struct s3c64xx_spi_csinfo *cs = spi->controller_data; @@ -736,11 +736,11 @@ static size_t s3c64xx_spi_max_transfer_size(struct spi_device *spi) return ctlr->can_dma ? S3C64XX_SPI_PACKET_CNT_MASK : SIZE_MAX; } -static int s3c64xx_spi_transfer_one(struct spi_master *master, +static int s3c64xx_spi_transfer_one(struct spi_controller *host, struct spi_device *spi, struct spi_transfer *xfer) { - struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master); + struct s3c64xx_spi_driver_data *sdd = spi_controller_get_devdata(host); const unsigned int fifo_len = (FIFO_LVL_MASK(sdd) >> 1) + 1; const void *tx_buf = NULL; void *rx_buf = NULL; @@ -890,15 +890,15 @@ static int s3c64xx_spi_transfer_one(struct spi_master *master, return status; } -static struct s3c64xx_spi_csinfo *s3c64xx_get_slave_ctrldata( +static struct s3c64xx_spi_csinfo *s3c64xx_get_target_ctrldata( struct spi_device *spi) { struct s3c64xx_spi_csinfo *cs; - struct device_node *slave_np, *data_np = NULL; + struct device_node *target_np, *data_np = NULL; u32 fb_delay = 0; - slave_np = spi->dev.of_node; - if (!slave_np) { + target_np = spi->dev.of_node; + if (!target_np) { dev_err(&spi->dev, "device node not found\n"); return ERR_PTR(-EINVAL); } @@ -907,7 +907,7 @@ static struct s3c64xx_spi_csinfo *s3c64xx_get_slave_ctrldata( if (!cs) return ERR_PTR(-ENOMEM); - data_np = of_get_child_by_name(slave_np, "controller-data"); + data_np = of_get_child_by_name(target_np, "controller-data"); if (!data_np) { dev_info(&spi->dev, "feedback delay set to default (0)\n"); return cs; @@ -932,9 +932,9 @@ static int s3c64xx_spi_setup(struct spi_device *spi) int err; int div; - sdd = spi_master_get_devdata(spi->master); + sdd = spi_controller_get_devdata(spi->controller); if (spi->dev.of_node) { - cs = s3c64xx_get_slave_ctrldata(spi); + cs = s3c64xx_get_target_ctrldata(spi); spi->controller_data = cs; } @@ -1022,7 +1022,7 @@ static void s3c64xx_spi_cleanup(struct spi_device *spi) static irqreturn_t s3c64xx_spi_irq(int irq, void *data) { struct s3c64xx_spi_driver_data *sdd = data; - struct spi_master *spi = sdd->master; + struct spi_controller *spi = sdd->host; unsigned int val, clr = 0; val = readl(sdd->regs + S3C64XX_SPI_STATUS); @@ -1151,7 +1151,7 @@ static int s3c64xx_spi_probe(struct platform_device *pdev) struct resource *mem_res; struct s3c64xx_spi_driver_data *sdd; struct s3c64xx_spi_info *sci = dev_get_platdata(&pdev->dev); - struct spi_master *master; + struct spi_controller *host; int ret, irq; char clk_name[16]; @@ -1169,16 +1169,16 @@ static int s3c64xx_spi_probe(struct platform_device *pdev) if (irq < 0) return irq; - master = devm_spi_alloc_master(&pdev->dev, sizeof(*sdd)); - if (!master) + host = devm_spi_alloc_host(&pdev->dev, sizeof(*sdd)); + if (!host) return dev_err_probe(&pdev->dev, -ENOMEM, - "Unable to allocate SPI Master\n"); + "Unable to allocate SPI Host\n"); - platform_set_drvdata(pdev, master); + platform_set_drvdata(pdev, host); - sdd = spi_master_get_devdata(master); + sdd = spi_controller_get_devdata(host); sdd->port_conf = s3c64xx_spi_get_port_config(pdev); - sdd->master = master; + sdd->host = host; sdd->cntrlr_info = sci; sdd->pdev = pdev; if (pdev->dev.of_node) { @@ -1196,27 +1196,27 @@ static int s3c64xx_spi_probe(struct platform_device *pdev) sdd->tx_dma.direction = DMA_MEM_TO_DEV; sdd->rx_dma.direction = DMA_DEV_TO_MEM; - master->dev.of_node = pdev->dev.of_node; - master->bus_num = sdd->port_id; - master->setup = s3c64xx_spi_setup; - master->cleanup = s3c64xx_spi_cleanup; - master->prepare_transfer_hardware = s3c64xx_spi_prepare_transfer; - master->unprepare_transfer_hardware = s3c64xx_spi_unprepare_transfer; - master->prepare_message = s3c64xx_spi_prepare_message; - master->transfer_one = s3c64xx_spi_transfer_one; - master->max_transfer_size = s3c64xx_spi_max_transfer_size; - master->num_chipselect = sci->num_cs; - master->use_gpio_descriptors = true; - master->dma_alignment = 8; - master->bits_per_word_mask = SPI_BPW_MASK(32) | SPI_BPW_MASK(16) | - SPI_BPW_MASK(8); + host->dev.of_node = pdev->dev.of_node; + host->bus_num = sdd->port_id; + host->setup = s3c64xx_spi_setup; + host->cleanup = s3c64xx_spi_cleanup; + host->prepare_transfer_hardware = s3c64xx_spi_prepare_transfer; + host->unprepare_transfer_hardware = s3c64xx_spi_unprepare_transfer; + host->prepare_message = s3c64xx_spi_prepare_message; + host->transfer_one = s3c64xx_spi_transfer_one; + host->max_transfer_size = s3c64xx_spi_max_transfer_size; + host->num_chipselect = sci->num_cs; + host->use_gpio_descriptors = true; + host->dma_alignment = 8; + host->bits_per_word_mask = SPI_BPW_MASK(32) | SPI_BPW_MASK(16) | + SPI_BPW_MASK(8); /* the spi->mode bits understood by this driver: */ - master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; + host->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; if (sdd->port_conf->has_loopback) - master->mode_bits |= SPI_LOOP; - master->auto_runtime_pm = true; + host->mode_bits |= SPI_LOOP; + host->auto_runtime_pm = true; if (!is_polling(sdd)) - master->can_dma = s3c64xx_spi_can_dma; + host->can_dma = s3c64xx_spi_can_dma; sdd->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &mem_res); if (IS_ERR(sdd->regs)) @@ -1271,14 +1271,14 @@ static int s3c64xx_spi_probe(struct platform_device *pdev) S3C64XX_SPI_INT_TX_OVERRUN_EN | S3C64XX_SPI_INT_TX_UNDERRUN_EN, sdd->regs + S3C64XX_SPI_INT_EN); - ret = devm_spi_register_master(&pdev->dev, master); + ret = devm_spi_register_controller(&pdev->dev, host); if (ret != 0) { - dev_err(&pdev->dev, "cannot register SPI master: %d\n", ret); + dev_err(&pdev->dev, "cannot register SPI host: %d\n", ret); goto err_pm_put; } - dev_dbg(&pdev->dev, "Samsung SoC SPI Driver loaded for Bus SPI-%d with %d Slaves attached\n", - sdd->port_id, master->num_chipselect); + dev_dbg(&pdev->dev, "Samsung SoC SPI Driver loaded for Bus SPI-%d with %d Targets attached\n", + sdd->port_id, host->num_chipselect); dev_dbg(&pdev->dev, "\tIOmem=[%pR]\tFIFO %dbytes\n", mem_res, (FIFO_LVL_MASK(sdd) >> 1) + 1); @@ -1297,8 +1297,8 @@ err_pm_put: static void s3c64xx_spi_remove(struct platform_device *pdev) { - struct spi_master *master = platform_get_drvdata(pdev); - struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master); + struct spi_controller *host = platform_get_drvdata(pdev); + struct s3c64xx_spi_driver_data *sdd = spi_controller_get_devdata(host); pm_runtime_get_sync(&pdev->dev); @@ -1317,10 +1317,10 @@ static void s3c64xx_spi_remove(struct platform_device *pdev) #ifdef CONFIG_PM_SLEEP static int s3c64xx_spi_suspend(struct device *dev) { - struct spi_master *master = dev_get_drvdata(dev); - struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master); + struct spi_controller *host = dev_get_drvdata(dev); + struct s3c64xx_spi_driver_data *sdd = spi_controller_get_devdata(host); - int ret = spi_master_suspend(master); + int ret = spi_controller_suspend(host); if (ret) return ret; @@ -1335,8 +1335,8 @@ static int s3c64xx_spi_suspend(struct device *dev) static int s3c64xx_spi_resume(struct device *dev) { - struct spi_master *master = dev_get_drvdata(dev); - struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master); + struct spi_controller *host = dev_get_drvdata(dev); + struct s3c64xx_spi_driver_data *sdd = spi_controller_get_devdata(host); struct s3c64xx_spi_info *sci = sdd->cntrlr_info; int ret; @@ -1347,15 +1347,15 @@ static int s3c64xx_spi_resume(struct device *dev) if (ret < 0) return ret; - return spi_master_resume(master); + return spi_controller_resume(host); } #endif /* CONFIG_PM_SLEEP */ #ifdef CONFIG_PM static int s3c64xx_spi_runtime_suspend(struct device *dev) { - struct spi_master *master = dev_get_drvdata(dev); - struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master); + struct spi_controller *host = dev_get_drvdata(dev); + struct s3c64xx_spi_driver_data *sdd = spi_controller_get_devdata(host); clk_disable_unprepare(sdd->clk); clk_disable_unprepare(sdd->src_clk); @@ -1366,8 +1366,8 @@ static int s3c64xx_spi_runtime_suspend(struct device *dev) static int s3c64xx_spi_runtime_resume(struct device *dev) { - struct spi_master *master = dev_get_drvdata(dev); - struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master); + struct spi_controller *host = dev_get_drvdata(dev); + struct s3c64xx_spi_driver_data *sdd = spi_controller_get_devdata(host); int ret; if (sdd->port_conf->clk_ioclk) { From 82a779231805c388e09921f4a28d9daebf95aeda Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 18 Aug 2023 17:31:48 +0800 Subject: [PATCH 615/656] spi: sc18is602: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230818093154.1183529-18-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-sc18is602.c | 48 ++++++++++++++++++------------------- 1 file changed, 24 insertions(+), 24 deletions(-) diff --git a/drivers/spi/spi-sc18is602.c b/drivers/spi/spi-sc18is602.c index 9f98bf350697..eecf9ea95ae3 100644 --- a/drivers/spi/spi-sc18is602.c +++ b/drivers/spi/spi-sc18is602.c @@ -30,7 +30,7 @@ enum chips { sc18is602, sc18is602b, sc18is603 }; #define SC18IS602_MODE_CLOCK_DIV_128 0x3 struct sc18is602 { - struct spi_master *master; + struct spi_controller *host; struct device *dev; u8 ctrl; u32 freq; @@ -179,10 +179,10 @@ static int sc18is602_check_transfer(struct spi_device *spi, return 0; } -static int sc18is602_transfer_one(struct spi_master *master, +static int sc18is602_transfer_one(struct spi_controller *host, struct spi_message *m) { - struct sc18is602 *hw = spi_master_get_devdata(master); + struct sc18is602 *hw = spi_controller_get_devdata(host); struct spi_device *spi = m->spi; struct spi_transfer *t; int status = 0; @@ -213,7 +213,7 @@ static int sc18is602_transfer_one(struct spi_master *master, spi_transfer_delay_exec(t); } m->status = status; - spi_finalize_current_message(master); + spi_finalize_current_message(host); return status; } @@ -225,7 +225,7 @@ static size_t sc18is602_max_transfer_size(struct spi_device *spi) static int sc18is602_setup(struct spi_device *spi) { - struct sc18is602 *hw = spi_master_get_devdata(spi->master); + struct sc18is602 *hw = spi_controller_get_devdata(spi->controller); /* SC18IS602 does not support CS2 */ if (hw->id == sc18is602 && (spi_get_chipselect(spi, 0) == 2)) @@ -241,17 +241,17 @@ static int sc18is602_probe(struct i2c_client *client) struct device_node *np = dev->of_node; struct sc18is602_platform_data *pdata = dev_get_platdata(dev); struct sc18is602 *hw; - struct spi_master *master; + struct spi_controller *host; if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C | I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) return -EINVAL; - master = devm_spi_alloc_master(dev, sizeof(struct sc18is602)); - if (!master) + host = devm_spi_alloc_host(dev, sizeof(struct sc18is602)); + if (!host) return -ENOMEM; - hw = spi_master_get_devdata(master); + hw = spi_controller_get_devdata(host); i2c_set_clientdata(client, hw); /* assert reset and then release */ @@ -260,7 +260,7 @@ static int sc18is602_probe(struct i2c_client *client) return PTR_ERR(hw->reset); gpiod_set_value_cansleep(hw->reset, 0); - hw->master = master; + hw->host = host; hw->client = client; hw->dev = dev; hw->ctrl = 0xff; @@ -273,11 +273,11 @@ static int sc18is602_probe(struct i2c_client *client) switch (hw->id) { case sc18is602: case sc18is602b: - master->num_chipselect = 4; + host->num_chipselect = 4; hw->freq = SC18IS602_CLOCK; break; case sc18is603: - master->num_chipselect = 2; + host->num_chipselect = 2; if (pdata) { hw->freq = pdata->clock_frequency; } else { @@ -292,18 +292,18 @@ static int sc18is602_probe(struct i2c_client *client) hw->freq = SC18IS602_CLOCK; break; } - master->bus_num = np ? -1 : client->adapter->nr; - master->mode_bits = SPI_CPHA | SPI_CPOL | SPI_LSB_FIRST; - master->bits_per_word_mask = SPI_BPW_MASK(8); - master->setup = sc18is602_setup; - master->transfer_one_message = sc18is602_transfer_one; - master->max_transfer_size = sc18is602_max_transfer_size; - master->max_message_size = sc18is602_max_transfer_size; - master->dev.of_node = np; - master->min_speed_hz = hw->freq / 128; - master->max_speed_hz = hw->freq / 4; + host->bus_num = np ? -1 : client->adapter->nr; + host->mode_bits = SPI_CPHA | SPI_CPOL | SPI_LSB_FIRST; + host->bits_per_word_mask = SPI_BPW_MASK(8); + host->setup = sc18is602_setup; + host->transfer_one_message = sc18is602_transfer_one; + host->max_transfer_size = sc18is602_max_transfer_size; + host->max_message_size = sc18is602_max_transfer_size; + host->dev.of_node = np; + host->min_speed_hz = hw->freq / 128; + host->max_speed_hz = hw->freq / 4; - return devm_spi_register_master(dev, master); + return devm_spi_register_controller(dev, host); } static const struct i2c_device_id sc18is602_id[] = { @@ -342,6 +342,6 @@ static struct i2c_driver sc18is602_driver = { module_i2c_driver(sc18is602_driver); -MODULE_DESCRIPTION("SC18IS602/603 SPI Master Driver"); +MODULE_DESCRIPTION("SC18IS602/603 SPI Host Driver"); MODULE_AUTHOR("Guenter Roeck"); MODULE_LICENSE("GPL"); From 0c8e5afc879f5b693dd2db68a7db3ffb3dc6823b Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 18 Aug 2023 17:31:49 +0800 Subject: [PATCH 616/656] spi: sh-hspi: switch to use modern name Change legacy name master to modern name host. No functional changed. Signed-off-by: Yang Yingliang Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20230818093154.1183529-19-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-sh-hspi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-sh-hspi.c b/drivers/spi/spi-sh-hspi.c index d6ffeae66ed3..5d63aa1d28e2 100644 --- a/drivers/spi/spi-sh-hspi.c +++ b/drivers/spi/spi-sh-hspi.c @@ -82,7 +82,7 @@ static int hspi_status_check_timeout(struct hspi_priv *hspi, u32 mask, u32 val) } /* - * spi master function + * spi host function */ #define hspi_hw_cs_enable(hspi) hspi_hw_cs_ctrl(hspi, 0) @@ -224,7 +224,7 @@ static int hspi_probe(struct platform_device *pdev) return -EINVAL; } - ctlr = spi_alloc_master(&pdev->dev, sizeof(*hspi)); + ctlr = spi_alloc_host(&pdev->dev, sizeof(*hspi)); if (!ctlr) return -ENOMEM; From 1cb3ebc417fe6cc5bea1b37682c0e860ea9ffb2d Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 18 Aug 2023 17:31:50 +0800 Subject: [PATCH 617/656] spi: sh-msiof: switch to use modern name Change legacy name master/slave to modern name host/target. No functional changed. Signed-off-by: Yang Yingliang Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20230818093154.1183529-20-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-sh-msiof.c | 50 ++++++++++++++++++------------------ include/linux/spi/sh_msiof.h | 4 +-- 2 files changed, 27 insertions(+), 27 deletions(-) diff --git a/drivers/spi/spi-sh-msiof.c b/drivers/spi/spi-sh-msiof.c index 5c75b5c58d97..fb452bc78372 100644 --- a/drivers/spi/spi-sh-msiof.c +++ b/drivers/spi/spi-sh-msiof.c @@ -54,7 +54,7 @@ struct sh_msiof_spi_priv { dma_addr_t rx_dma_addr; bool native_cs_inited; bool native_cs_high; - bool slave_aborted; + bool target_aborted; }; #define MAX_SS 3 /* Maximum number of native chip selects */ @@ -361,7 +361,7 @@ static void sh_msiof_spi_set_pin_regs(struct sh_msiof_spi_priv *p, u32 ss, tmp |= !cs_high << SIMDR1_SYNCAC_SHIFT; tmp |= lsb_first << SIMDR1_BITLSB_SHIFT; tmp |= sh_msiof_spi_get_dtdl_and_syncdl(p); - if (spi_controller_is_slave(p->ctlr)) { + if (spi_controller_is_target(p->ctlr)) { sh_msiof_write(p, SITMDR1, tmp | SITMDR1_PCON); } else { sh_msiof_write(p, SITMDR1, @@ -553,7 +553,7 @@ static int sh_msiof_spi_setup(struct spi_device *spi) spi_controller_get_devdata(spi->controller); u32 clr, set, tmp; - if (spi_get_csgpiod(spi, 0) || spi_controller_is_slave(p->ctlr)) + if (spi_get_csgpiod(spi, 0) || spi_controller_is_target(p->ctlr)) return 0; if (p->native_cs_inited && @@ -602,11 +602,11 @@ static int sh_msiof_prepare_message(struct spi_controller *ctlr, static int sh_msiof_spi_start(struct sh_msiof_spi_priv *p, void *rx_buf) { - bool slave = spi_controller_is_slave(p->ctlr); + bool target = spi_controller_is_target(p->ctlr); int ret = 0; /* setup clock and rx/tx signals */ - if (!slave) + if (!target) ret = sh_msiof_modify_ctr_wait(p, 0, SICTR_TSCKE); if (rx_buf && !ret) ret = sh_msiof_modify_ctr_wait(p, 0, SICTR_RXE); @@ -614,7 +614,7 @@ static int sh_msiof_spi_start(struct sh_msiof_spi_priv *p, void *rx_buf) ret = sh_msiof_modify_ctr_wait(p, 0, SICTR_TXE); /* start by setting frame bit */ - if (!ret && !slave) + if (!ret && !target) ret = sh_msiof_modify_ctr_wait(p, 0, SICTR_TFSE); return ret; @@ -622,27 +622,27 @@ static int sh_msiof_spi_start(struct sh_msiof_spi_priv *p, void *rx_buf) static int sh_msiof_spi_stop(struct sh_msiof_spi_priv *p, void *rx_buf) { - bool slave = spi_controller_is_slave(p->ctlr); + bool target = spi_controller_is_target(p->ctlr); int ret = 0; /* shut down frame, rx/tx and clock signals */ - if (!slave) + if (!target) ret = sh_msiof_modify_ctr_wait(p, SICTR_TFSE, 0); if (!ret) ret = sh_msiof_modify_ctr_wait(p, SICTR_TXE, 0); if (rx_buf && !ret) ret = sh_msiof_modify_ctr_wait(p, SICTR_RXE, 0); - if (!ret && !slave) + if (!ret && !target) ret = sh_msiof_modify_ctr_wait(p, SICTR_TSCKE, 0); return ret; } -static int sh_msiof_slave_abort(struct spi_controller *ctlr) +static int sh_msiof_target_abort(struct spi_controller *ctlr) { struct sh_msiof_spi_priv *p = spi_controller_get_devdata(ctlr); - p->slave_aborted = true; + p->target_aborted = true; complete(&p->done); complete(&p->done_txdma); return 0; @@ -651,9 +651,9 @@ static int sh_msiof_slave_abort(struct spi_controller *ctlr) static int sh_msiof_wait_for_completion(struct sh_msiof_spi_priv *p, struct completion *x) { - if (spi_controller_is_slave(p->ctlr)) { + if (spi_controller_is_target(p->ctlr)) { if (wait_for_completion_interruptible(x) || - p->slave_aborted) { + p->target_aborted) { dev_dbg(&p->pdev->dev, "interrupted\n"); return -EINTR; } @@ -699,7 +699,7 @@ static int sh_msiof_spi_txrx_once(struct sh_msiof_spi_priv *p, tx_fifo(p, tx_buf, words, fifo_shift); reinit_completion(&p->done); - p->slave_aborted = false; + p->target_aborted = false; ret = sh_msiof_spi_start(p, rx_buf); if (ret) { @@ -796,7 +796,7 @@ static int sh_msiof_dma_once(struct sh_msiof_spi_priv *p, const void *tx, reinit_completion(&p->done); if (tx) reinit_completion(&p->done_txdma); - p->slave_aborted = false; + p->target_aborted = false; /* Now start DMA */ if (rx) @@ -925,7 +925,7 @@ static int sh_msiof_transfer_one(struct spi_controller *ctlr, sh_msiof_spi_reset_regs(p); /* setup clocks (clock already enabled in chipselect()) */ - if (!spi_controller_is_slave(p->ctlr)) + if (!spi_controller_is_target(p->ctlr)) sh_msiof_spi_set_clk_regs(p, t); while (ctlr->dma_tx && len > 15) { @@ -1101,11 +1101,11 @@ static struct sh_msiof_spi_info *sh_msiof_spi_parse_dt(struct device *dev) if (!info) return NULL; - info->mode = of_property_read_bool(np, "spi-slave") ? MSIOF_SPI_SLAVE - : MSIOF_SPI_MASTER; + info->mode = of_property_read_bool(np, "spi-slave") ? MSIOF_SPI_TARGET + : MSIOF_SPI_HOST; /* Parse the MSIOF properties */ - if (info->mode == MSIOF_SPI_MASTER) + if (info->mode == MSIOF_SPI_HOST) of_property_read_u32(np, "num-cs", &num_cs); of_property_read_u32(np, "renesas,tx-fifo-size", &info->tx_fifo_override); @@ -1279,12 +1279,12 @@ static int sh_msiof_spi_probe(struct platform_device *pdev) return -ENXIO; } - if (info->mode == MSIOF_SPI_SLAVE) - ctlr = spi_alloc_slave(&pdev->dev, - sizeof(struct sh_msiof_spi_priv)); + if (info->mode == MSIOF_SPI_TARGET) + ctlr = spi_alloc_target(&pdev->dev, + sizeof(struct sh_msiof_spi_priv)); else - ctlr = spi_alloc_master(&pdev->dev, - sizeof(struct sh_msiof_spi_priv)); + ctlr = spi_alloc_host(&pdev->dev, + sizeof(struct sh_msiof_spi_priv)); if (ctlr == NULL) return -ENOMEM; @@ -1347,7 +1347,7 @@ static int sh_msiof_spi_probe(struct platform_device *pdev) ctlr->dev.of_node = pdev->dev.of_node; ctlr->setup = sh_msiof_spi_setup; ctlr->prepare_message = sh_msiof_prepare_message; - ctlr->slave_abort = sh_msiof_slave_abort; + ctlr->target_abort = sh_msiof_target_abort; ctlr->bits_per_word_mask = chipdata->bits_per_word_mask; ctlr->auto_runtime_pm = true; ctlr->transfer_one = sh_msiof_transfer_one; diff --git a/include/linux/spi/sh_msiof.h b/include/linux/spi/sh_msiof.h index dc2a0cbd210d..f950d280461b 100644 --- a/include/linux/spi/sh_msiof.h +++ b/include/linux/spi/sh_msiof.h @@ -3,8 +3,8 @@ #define __SPI_SH_MSIOF_H__ enum { - MSIOF_SPI_MASTER, - MSIOF_SPI_SLAVE, + MSIOF_SPI_HOST, + MSIOF_SPI_TARGET, }; struct sh_msiof_spi_info { From 91a940bb1075337184c3aa537c6e5b9429380400 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 18 Aug 2023 17:31:51 +0800 Subject: [PATCH 618/656] spi: sh-sci: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20230818093154.1183529-21-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-sh-sci.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/drivers/spi/spi-sh-sci.c b/drivers/spi/spi-sh-sci.c index 92ca3f2d61ba..148d615d2f38 100644 --- a/drivers/spi/spi-sh-sci.c +++ b/drivers/spi/spi-sh-sci.c @@ -56,17 +56,17 @@ static inline void setbits(struct sh_sci_spi *sp, int bits, int on) static inline void setsck(struct spi_device *dev, int on) { - setbits(spi_master_get_devdata(dev->master), PIN_SCK, on); + setbits(spi_controller_get_devdata(dev->controller), PIN_SCK, on); } static inline void setmosi(struct spi_device *dev, int on) { - setbits(spi_master_get_devdata(dev->master), PIN_TXD, on); + setbits(spi_controller_get_devdata(dev->controller), PIN_TXD, on); } static inline u32 getmiso(struct spi_device *dev) { - struct sh_sci_spi *sp = spi_master_get_devdata(dev->master); + struct sh_sci_spi *sp = spi_controller_get_devdata(dev->controller); return (ioread8(SCSPTR(sp)) & PIN_RXD) ? 1 : 0; } @@ -105,7 +105,7 @@ static u32 sh_sci_spi_txrx_mode3(struct spi_device *spi, static void sh_sci_spi_chipselect(struct spi_device *dev, int value) { - struct sh_sci_spi *sp = spi_master_get_devdata(dev->master); + struct sh_sci_spi *sp = spi_controller_get_devdata(dev->controller); if (sp->info->chip_select) (sp->info->chip_select)(sp->info, spi_get_chipselect(dev, 0), value); @@ -114,18 +114,18 @@ static void sh_sci_spi_chipselect(struct spi_device *dev, int value) static int sh_sci_spi_probe(struct platform_device *dev) { struct resource *r; - struct spi_master *master; + struct spi_controller *host; struct sh_sci_spi *sp; int ret; - master = spi_alloc_master(&dev->dev, sizeof(struct sh_sci_spi)); - if (master == NULL) { - dev_err(&dev->dev, "failed to allocate spi master\n"); + host = spi_alloc_host(&dev->dev, sizeof(struct sh_sci_spi)); + if (host == NULL) { + dev_err(&dev->dev, "failed to allocate spi host\n"); ret = -ENOMEM; goto err0; } - sp = spi_master_get_devdata(master); + sp = spi_controller_get_devdata(host); platform_set_drvdata(dev, sp); sp->info = dev_get_platdata(&dev->dev); @@ -136,7 +136,7 @@ static int sh_sci_spi_probe(struct platform_device *dev) } /* setup spi bitbang adaptor */ - sp->bitbang.master = master; + sp->bitbang.master = host; sp->bitbang.master->bus_num = sp->info->bus_num; sp->bitbang.master->num_chipselect = sp->info->num_chipselect; sp->bitbang.chipselect = sh_sci_spi_chipselect; @@ -166,7 +166,7 @@ static int sh_sci_spi_probe(struct platform_device *dev) setbits(sp, PIN_INIT, 0); iounmap(sp->membase); err1: - spi_master_put(sp->bitbang.master); + spi_controller_put(sp->bitbang.master); err0: return ret; } @@ -178,7 +178,7 @@ static void sh_sci_spi_remove(struct platform_device *dev) spi_bitbang_stop(&sp->bitbang); setbits(sp, PIN_INIT, 0); iounmap(sp->membase); - spi_master_put(sp->bitbang.master); + spi_controller_put(sp->bitbang.master); } static struct platform_driver sh_sci_spi_drv = { From 0ec6a15091a17dc5af7a4b23a2d02e554cbe3549 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 18 Aug 2023 17:31:52 +0800 Subject: [PATCH 619/656] spi: sh: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20230818093154.1183529-22-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-sh.c | 34 +++++++++++++++++----------------- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/drivers/spi/spi-sh.c b/drivers/spi/spi-sh.c index d358a2a9c3f5..4b873d9a7602 100644 --- a/drivers/spi/spi-sh.c +++ b/drivers/spi/spi-sh.c @@ -72,7 +72,7 @@ struct spi_sh_data { void __iomem *addr; int irq; - struct spi_master *master; + struct spi_controller *host; unsigned long cr1; wait_queue_head_t wait; int width; @@ -327,7 +327,7 @@ static int spi_sh_transfer_one_message(struct spi_controller *ctlr, static int spi_sh_setup(struct spi_device *spi) { - struct spi_sh_data *ss = spi_master_get_devdata(spi->master); + struct spi_sh_data *ss = spi_controller_get_devdata(spi->controller); pr_debug("%s: enter\n", __func__); @@ -346,7 +346,7 @@ static int spi_sh_setup(struct spi_device *spi) static void spi_sh_cleanup(struct spi_device *spi) { - struct spi_sh_data *ss = spi_master_get_devdata(spi->master); + struct spi_sh_data *ss = spi_controller_get_devdata(spi->controller); pr_debug("%s: enter\n", __func__); @@ -381,14 +381,14 @@ static void spi_sh_remove(struct platform_device *pdev) { struct spi_sh_data *ss = platform_get_drvdata(pdev); - spi_unregister_master(ss->master); + spi_unregister_controller(ss->host); free_irq(ss->irq, ss); } static int spi_sh_probe(struct platform_device *pdev) { struct resource *res; - struct spi_master *master; + struct spi_controller *host; struct spi_sh_data *ss; int ret, irq; @@ -403,13 +403,13 @@ static int spi_sh_probe(struct platform_device *pdev) if (irq < 0) return irq; - master = devm_spi_alloc_master(&pdev->dev, sizeof(struct spi_sh_data)); - if (master == NULL) { - dev_err(&pdev->dev, "spi_alloc_master error.\n"); + host = devm_spi_alloc_host(&pdev->dev, sizeof(struct spi_sh_data)); + if (host == NULL) { + dev_err(&pdev->dev, "devm_spi_alloc_host error.\n"); return -ENOMEM; } - ss = spi_master_get_devdata(master); + ss = spi_controller_get_devdata(host); platform_set_drvdata(pdev, ss); switch (res->flags & IORESOURCE_MEM_TYPE_MASK) { @@ -424,7 +424,7 @@ static int spi_sh_probe(struct platform_device *pdev) return -ENODEV; } ss->irq = irq; - ss->master = master; + ss->host = host; ss->addr = devm_ioremap(&pdev->dev, res->start, resource_size(res)); if (ss->addr == NULL) { dev_err(&pdev->dev, "ioremap error.\n"); @@ -438,15 +438,15 @@ static int spi_sh_probe(struct platform_device *pdev) return ret; } - master->num_chipselect = 2; - master->bus_num = pdev->id; - master->setup = spi_sh_setup; - master->transfer_one_message = spi_sh_transfer_one_message; - master->cleanup = spi_sh_cleanup; + host->num_chipselect = 2; + host->bus_num = pdev->id; + host->setup = spi_sh_setup; + host->transfer_one_message = spi_sh_transfer_one_message; + host->cleanup = spi_sh_cleanup; - ret = spi_register_master(master); + ret = spi_register_controller(host); if (ret < 0) { - printk(KERN_ERR "spi_register_master error.\n"); + printk(KERN_ERR "spi_register_controller error.\n"); goto error3; } From 8d9ae783fb706ae98db18d050201d96a9634bd45 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 18 Aug 2023 17:31:53 +0800 Subject: [PATCH 620/656] spi: sifive: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230818093154.1183529-23-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-sifive.c | 80 ++++++++++++++++++++-------------------- 1 file changed, 40 insertions(+), 40 deletions(-) diff --git a/drivers/spi/spi-sifive.c b/drivers/spi/spi-sifive.c index 2f77dae85386..cfd17bbb2202 100644 --- a/drivers/spi/spi-sifive.c +++ b/drivers/spi/spi-sifive.c @@ -128,9 +128,9 @@ static void sifive_spi_init(struct sifive_spi *spi) } static int -sifive_spi_prepare_message(struct spi_master *master, struct spi_message *msg) +sifive_spi_prepare_message(struct spi_controller *host, struct spi_message *msg) { - struct sifive_spi *spi = spi_master_get_devdata(master); + struct sifive_spi *spi = spi_controller_get_devdata(host); struct spi_device *device = msg->spi; /* Update the chip select polarity */ @@ -152,7 +152,7 @@ sifive_spi_prepare_message(struct spi_master *master, struct spi_message *msg) static void sifive_spi_set_cs(struct spi_device *device, bool is_high) { - struct sifive_spi *spi = spi_master_get_devdata(device->master); + struct sifive_spi *spi = spi_controller_get_devdata(device->controller); /* Reverse polarity is handled by SCMR/CPOL. Not inverted CS. */ if (device->mode & SPI_CS_HIGH) @@ -252,10 +252,10 @@ static void sifive_spi_rx(struct sifive_spi *spi, u8 *rx_ptr) } static int -sifive_spi_transfer_one(struct spi_master *master, struct spi_device *device, +sifive_spi_transfer_one(struct spi_controller *host, struct spi_device *device, struct spi_transfer *t) { - struct sifive_spi *spi = spi_master_get_devdata(master); + struct sifive_spi *spi = spi_controller_get_devdata(host); int poll = sifive_spi_prep_transfer(spi, device, t); const u8 *tx_ptr = t->tx_buf; u8 *rx_ptr = t->rx_buf; @@ -294,35 +294,35 @@ static int sifive_spi_probe(struct platform_device *pdev) struct sifive_spi *spi; int ret, irq, num_cs; u32 cs_bits, max_bits_per_word; - struct spi_master *master; + struct spi_controller *host; - master = spi_alloc_master(&pdev->dev, sizeof(struct sifive_spi)); - if (!master) { + host = spi_alloc_host(&pdev->dev, sizeof(struct sifive_spi)); + if (!host) { dev_err(&pdev->dev, "out of memory\n"); return -ENOMEM; } - spi = spi_master_get_devdata(master); + spi = spi_controller_get_devdata(host); init_completion(&spi->done); - platform_set_drvdata(pdev, master); + platform_set_drvdata(pdev, host); spi->regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(spi->regs)) { ret = PTR_ERR(spi->regs); - goto put_master; + goto put_host; } spi->clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(spi->clk)) { dev_err(&pdev->dev, "Unable to find bus clock\n"); ret = PTR_ERR(spi->clk); - goto put_master; + goto put_host; } irq = platform_get_irq(pdev, 0); if (irq < 0) { ret = irq; - goto put_master; + goto put_host; } /* Optional parameters */ @@ -339,14 +339,14 @@ static int sifive_spi_probe(struct platform_device *pdev) if (!ret && max_bits_per_word < 8) { dev_err(&pdev->dev, "Only 8bit SPI words supported by the driver\n"); ret = -EINVAL; - goto put_master; + goto put_host; } /* Spin up the bus clock before hitting registers */ ret = clk_prepare_enable(spi->clk); if (ret) { dev_err(&pdev->dev, "Unable to enable bus clock\n"); - goto put_master; + goto put_host; } /* probe the number of CS lines */ @@ -362,30 +362,30 @@ static int sifive_spi_probe(struct platform_device *pdev) num_cs = ilog2(cs_bits) + 1; if (num_cs > SIFIVE_SPI_MAX_CS) { - dev_err(&pdev->dev, "Invalid number of spi slaves\n"); + dev_err(&pdev->dev, "Invalid number of spi targets\n"); ret = -EINVAL; goto disable_clk; } - /* Define our master */ - master->dev.of_node = pdev->dev.of_node; - master->bus_num = pdev->id; - master->num_chipselect = num_cs; - master->mode_bits = SPI_CPHA | SPI_CPOL + /* Define our host */ + host->dev.of_node = pdev->dev.of_node; + host->bus_num = pdev->id; + host->num_chipselect = num_cs; + host->mode_bits = SPI_CPHA | SPI_CPOL | SPI_CS_HIGH | SPI_LSB_FIRST | SPI_TX_DUAL | SPI_TX_QUAD | SPI_RX_DUAL | SPI_RX_QUAD; /* TODO: add driver support for bits_per_word < 8 * we need to "left-align" the bits (unless SPI_LSB_FIRST) */ - master->bits_per_word_mask = SPI_BPW_MASK(8); - master->flags = SPI_CONTROLLER_MUST_TX | SPI_CONTROLLER_GPIO_SS; - master->prepare_message = sifive_spi_prepare_message; - master->set_cs = sifive_spi_set_cs; - master->transfer_one = sifive_spi_transfer_one; + host->bits_per_word_mask = SPI_BPW_MASK(8); + host->flags = SPI_CONTROLLER_MUST_TX | SPI_CONTROLLER_GPIO_SS; + host->prepare_message = sifive_spi_prepare_message; + host->set_cs = sifive_spi_set_cs; + host->transfer_one = sifive_spi_transfer_one; pdev->dev.dma_mask = NULL; - /* Configure the SPI master hardware */ + /* Configure the SPI host hardware */ sifive_spi_init(spi); /* Register for SPI Interrupt */ @@ -397,11 +397,11 @@ static int sifive_spi_probe(struct platform_device *pdev) } dev_info(&pdev->dev, "mapped; irq=%d, cs=%d\n", - irq, master->num_chipselect); + irq, host->num_chipselect); - ret = devm_spi_register_master(&pdev->dev, master); + ret = devm_spi_register_controller(&pdev->dev, host); if (ret < 0) { - dev_err(&pdev->dev, "spi_register_master failed\n"); + dev_err(&pdev->dev, "spi_register_host failed\n"); goto disable_clk; } @@ -409,16 +409,16 @@ static int sifive_spi_probe(struct platform_device *pdev) disable_clk: clk_disable_unprepare(spi->clk); -put_master: - spi_master_put(master); +put_host: + spi_controller_put(host); return ret; } static void sifive_spi_remove(struct platform_device *pdev) { - struct spi_master *master = platform_get_drvdata(pdev); - struct sifive_spi *spi = spi_master_get_devdata(master); + struct spi_controller *host = platform_get_drvdata(pdev); + struct sifive_spi *spi = spi_controller_get_devdata(host); /* Disable all the interrupts just in case */ sifive_spi_write(spi, SIFIVE_SPI_REG_IE, 0); @@ -427,11 +427,11 @@ static void sifive_spi_remove(struct platform_device *pdev) static int sifive_spi_suspend(struct device *dev) { - struct spi_master *master = dev_get_drvdata(dev); - struct sifive_spi *spi = spi_master_get_devdata(master); + struct spi_controller *host = dev_get_drvdata(dev); + struct sifive_spi *spi = spi_controller_get_devdata(host); int ret; - ret = spi_master_suspend(master); + ret = spi_controller_suspend(host); if (ret) return ret; @@ -445,14 +445,14 @@ static int sifive_spi_suspend(struct device *dev) static int sifive_spi_resume(struct device *dev) { - struct spi_master *master = dev_get_drvdata(dev); - struct sifive_spi *spi = spi_master_get_devdata(master); + struct spi_controller *host = dev_get_drvdata(dev); + struct sifive_spi *spi = spi_controller_get_devdata(host); int ret; ret = clk_prepare_enable(spi->clk); if (ret) return ret; - ret = spi_master_resume(master); + ret = spi_controller_resume(host); if (ret) clk_disable_unprepare(spi->clk); From 557efcf4c64f27f1b69af464246bf90b4d52e5be Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Fri, 18 Aug 2023 17:31:54 +0800 Subject: [PATCH 621/656] spi: spi-sn-f-ospi: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20230818093154.1183529-24-yangyingliang@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-sn-f-ospi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-sn-f-ospi.c b/drivers/spi/spi-sn-f-ospi.c index 85e4a01bc8b0..a7c3b3923b4a 100644 --- a/drivers/spi/spi-sn-f-ospi.c +++ b/drivers/spi/spi-sn-f-ospi.c @@ -501,7 +501,7 @@ out: static int f_ospi_exec_op(struct spi_mem *mem, const struct spi_mem_op *op) { - struct f_ospi *ospi = spi_controller_get_devdata(mem->spi->master); + struct f_ospi *ospi = spi_controller_get_devdata(mem->spi->controller); int err = 0; switch (op->data.dir) { @@ -606,7 +606,7 @@ static int f_ospi_probe(struct platform_device *pdev) u32 num_cs = OSPI_NUM_CS; int ret; - ctlr = spi_alloc_master(dev, sizeof(*ospi)); + ctlr = spi_alloc_host(dev, sizeof(*ospi)); if (!ctlr) return -ENOMEM; From 17a7ca35890b411414a71fbeef13cb65fe9511df Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Thu, 17 Aug 2023 10:52:28 +0200 Subject: [PATCH 622/656] gpiolib: rename the gpio_device notifier Change the generic "notifier" name to "line_state_notifier" in order to reflect its purpose in preparation for adding a second notifier which will be used to notify wait queues about device unregistering. Signed-off-by: Bartosz Golaszewski Reviewed-by: Linus Walleij Reviewed-by: Kent Gibson --- drivers/gpio/gpiolib-cdev.c | 16 ++++++++-------- drivers/gpio/gpiolib.c | 6 +++--- drivers/gpio/gpiolib.h | 6 +++--- 3 files changed, 14 insertions(+), 14 deletions(-) diff --git a/drivers/gpio/gpiolib-cdev.c b/drivers/gpio/gpiolib-cdev.c index 0a33971c964c..9ee8604f32e1 100644 --- a/drivers/gpio/gpiolib-cdev.c +++ b/drivers/gpio/gpiolib-cdev.c @@ -230,7 +230,7 @@ static long linehandle_set_config(struct linehandle_state *lh, return ret; } - blocking_notifier_call_chain(&desc->gdev->notifier, + blocking_notifier_call_chain(&desc->gdev->line_state_notifier, GPIO_V2_LINE_CHANGED_CONFIG, desc); } @@ -414,7 +414,7 @@ static int linehandle_create(struct gpio_device *gdev, void __user *ip) goto out_free_lh; } - blocking_notifier_call_chain(&desc->gdev->notifier, + blocking_notifier_call_chain(&desc->gdev->line_state_notifier, GPIO_V2_LINE_CHANGED_REQUESTED, desc); dev_dbg(&gdev->dev, "registered chardev handle for line %d\n", @@ -1407,7 +1407,7 @@ static long linereq_set_config_unlocked(struct linereq *lr, WRITE_ONCE(line->edflags, edflags); - blocking_notifier_call_chain(&desc->gdev->notifier, + blocking_notifier_call_chain(&desc->gdev->line_state_notifier, GPIO_V2_LINE_CHANGED_CONFIG, desc); } @@ -1720,7 +1720,7 @@ static int linereq_create(struct gpio_device *gdev, void __user *ip) lr->lines[i].edflags = edflags; - blocking_notifier_call_chain(&desc->gdev->notifier, + blocking_notifier_call_chain(&desc->gdev->line_state_notifier, GPIO_V2_LINE_CHANGED_REQUESTED, desc); dev_dbg(&gdev->dev, "registered chardev handle for line %d\n", @@ -2117,7 +2117,7 @@ static int lineevent_create(struct gpio_device *gdev, void __user *ip) if (ret) goto out_free_le; - blocking_notifier_call_chain(&desc->gdev->notifier, + blocking_notifier_call_chain(&desc->gdev->line_state_notifier, GPIO_V2_LINE_CHANGED_REQUESTED, desc); irq = gpiod_to_irq(desc); @@ -2671,7 +2671,7 @@ static int gpio_chrdev_open(struct inode *inode, struct file *file) cdev->gdev = gpio_device_get(gdev); cdev->lineinfo_changed_nb.notifier_call = lineinfo_changed_notify; - ret = blocking_notifier_chain_register(&gdev->notifier, + ret = blocking_notifier_chain_register(&gdev->line_state_notifier, &cdev->lineinfo_changed_nb); if (ret) goto out_free_bitmap; @@ -2687,7 +2687,7 @@ static int gpio_chrdev_open(struct inode *inode, struct file *file) return ret; out_unregister_notifier: - blocking_notifier_chain_unregister(&gdev->notifier, + blocking_notifier_chain_unregister(&gdev->line_state_notifier, &cdev->lineinfo_changed_nb); out_free_bitmap: gpio_device_put(gdev); @@ -2711,7 +2711,7 @@ static int gpio_chrdev_release(struct inode *inode, struct file *file) struct gpio_device *gdev = cdev->gdev; bitmap_free(cdev->watched_lines); - blocking_notifier_chain_unregister(&gdev->notifier, + blocking_notifier_chain_unregister(&gdev->line_state_notifier, &cdev->lineinfo_changed_nb); gpio_device_put(gdev); kfree(cdev); diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index edab00c9cb3c..38640df1d798 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c @@ -847,7 +847,7 @@ int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data, spin_unlock_irqrestore(&gpio_lock, flags); - BLOCKING_INIT_NOTIFIER_HEAD(&gdev->notifier); + BLOCKING_INIT_NOTIFIER_HEAD(&gdev->line_state_notifier); init_rwsem(&gdev->sem); #ifdef CONFIG_PINCTRL @@ -2177,7 +2177,7 @@ static bool gpiod_free_commit(struct gpio_desc *desc) } spin_unlock_irqrestore(&gpio_lock, flags); - blocking_notifier_call_chain(&desc->gdev->notifier, + blocking_notifier_call_chain(&desc->gdev->line_state_notifier, GPIOLINE_CHANGED_RELEASED, desc); return ret; @@ -4007,7 +4007,7 @@ static struct gpio_desc *gpiod_find_and_request(struct device *consumer, return ERR_PTR(ret); } - blocking_notifier_call_chain(&desc->gdev->notifier, + blocking_notifier_call_chain(&desc->gdev->line_state_notifier, GPIOLINE_CHANGED_REQUESTED, desc); return desc; diff --git a/drivers/gpio/gpiolib.h b/drivers/gpio/gpiolib.h index 08e8e8274883..11a5e02f317d 100644 --- a/drivers/gpio/gpiolib.h +++ b/drivers/gpio/gpiolib.h @@ -39,8 +39,8 @@ * or name of the IP component in a System on Chip. * @data: per-instance data assigned by the driver * @list: links gpio_device:s together for traversal - * @notifier: used to notify subscribers about lines being requested, released - * or reconfigured + * @line_state_notifier: used to notify subscribers about lines being + * requested, released or reconfigured * @sem: protects the structure from a NULL-pointer dereference of @chip by * user-space operations when the device gets unregistered during * a hot-unplug event @@ -64,7 +64,7 @@ struct gpio_device { const char *label; void *data; struct list_head list; - struct blocking_notifier_head notifier; + struct blocking_notifier_head line_state_notifier; struct rw_semaphore sem; #ifdef CONFIG_PINCTRL From e82bbd6761f7e313141c4033ebb79e3d397b6a9c Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Thu, 17 Aug 2023 13:42:34 +0200 Subject: [PATCH 623/656] gpio: cdev: open-code to_gpio_chardev_data() This function is a wrapper around container_of(). It's used only once and we will have a second notifier soon, so instead of having two flavors of this helper, let's just open-code where needed. Signed-off-by: Bartosz Golaszewski Reviewed-by: Linus Walleij Reviewed-by: Kent Gibson --- drivers/gpio/gpiolib-cdev.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/drivers/gpio/gpiolib-cdev.c b/drivers/gpio/gpiolib-cdev.c index 9ee8604f32e1..91bdd3b928b5 100644 --- a/drivers/gpio/gpiolib-cdev.c +++ b/drivers/gpio/gpiolib-cdev.c @@ -2491,16 +2491,11 @@ static long gpio_ioctl_compat(struct file *file, unsigned int cmd, } #endif -static struct gpio_chardev_data * -to_gpio_chardev_data(struct notifier_block *nb) -{ - return container_of(nb, struct gpio_chardev_data, lineinfo_changed_nb); -} - static int lineinfo_changed_notify(struct notifier_block *nb, unsigned long action, void *data) { - struct gpio_chardev_data *cdev = to_gpio_chardev_data(nb); + struct gpio_chardev_data *cdev = + container_of(nb, struct gpio_chardev_data, lineinfo_changed_nb); struct gpio_v2_line_info_changed chg; struct gpio_desc *desc = data; int ret; From a067419ba77da830939852758702388f0fba09a1 Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Thu, 17 Aug 2023 13:59:05 +0200 Subject: [PATCH 624/656] gpiolib: add a second blocking notifier to struct gpio_device Add a new blocking notifier to struct gpio_device and use it to notify subscribers about the GPIO device being unregistered from the device model. Signed-off-by: Bartosz Golaszewski Reviewed-by: Linus Walleij Reviewed-by: Kent Gibson --- drivers/gpio/gpiolib-cdev.c | 1 + drivers/gpio/gpiolib.c | 1 + drivers/gpio/gpiolib.h | 3 +++ 3 files changed, 5 insertions(+) diff --git a/drivers/gpio/gpiolib-cdev.c b/drivers/gpio/gpiolib-cdev.c index 91bdd3b928b5..fec446510028 100644 --- a/drivers/gpio/gpiolib-cdev.c +++ b/drivers/gpio/gpiolib-cdev.c @@ -2748,4 +2748,5 @@ int gpiolib_cdev_register(struct gpio_device *gdev, dev_t devt) void gpiolib_cdev_unregister(struct gpio_device *gdev) { cdev_device_del(&gdev->chrdev, &gdev->dev); + blocking_notifier_call_chain(&gdev->device_notifier, 0, NULL); } diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index 38640df1d798..8f74e0bb2a5c 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c @@ -848,6 +848,7 @@ int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data, spin_unlock_irqrestore(&gpio_lock, flags); BLOCKING_INIT_NOTIFIER_HEAD(&gdev->line_state_notifier); + BLOCKING_INIT_NOTIFIER_HEAD(&gdev->device_notifier); init_rwsem(&gdev->sem); #ifdef CONFIG_PINCTRL diff --git a/drivers/gpio/gpiolib.h b/drivers/gpio/gpiolib.h index 11a5e02f317d..e860ed434bc2 100644 --- a/drivers/gpio/gpiolib.h +++ b/drivers/gpio/gpiolib.h @@ -41,6 +41,8 @@ * @list: links gpio_device:s together for traversal * @line_state_notifier: used to notify subscribers about lines being * requested, released or reconfigured + * @device_notifier: used to notify character device wait queues about the GPIO + * device being unregistered * @sem: protects the structure from a NULL-pointer dereference of @chip by * user-space operations when the device gets unregistered during * a hot-unplug event @@ -65,6 +67,7 @@ struct gpio_device { void *data; struct list_head list; struct blocking_notifier_head line_state_notifier; + struct blocking_notifier_head device_notifier; struct rw_semaphore sem; #ifdef CONFIG_PINCTRL From d2e2586a3292e05d4872e9111e8b005bc4ff4d09 Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Thu, 17 Aug 2023 14:42:24 +0200 Subject: [PATCH 625/656] gpio: cdev: wake up chardev poll() on device unbind Add a notifier block to the gpio_chardev_data structure and register it with the gpio_device's device notifier. Upon reception of an event, wake up the wait queue so that the user-space be forced out of poll() and need to go into a new system call which will then fail due to the chip being gone. Signed-off-by: Bartosz Golaszewski Reviewed-by: Linus Walleij Reviewed-by: Kent Gibson --- drivers/gpio/gpiolib-cdev.c | 29 +++++++++++++++++++++++++++-- 1 file changed, 27 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/gpiolib-cdev.c b/drivers/gpio/gpiolib-cdev.c index fec446510028..bc1542544e49 100644 --- a/drivers/gpio/gpiolib-cdev.c +++ b/drivers/gpio/gpiolib-cdev.c @@ -2320,6 +2320,7 @@ struct gpio_chardev_data { wait_queue_head_t wait; DECLARE_KFIFO(events, struct gpio_v2_line_info_changed, 32); struct notifier_block lineinfo_changed_nb; + struct notifier_block device_unregistered_nb; unsigned long *watched_lines; #ifdef CONFIG_GPIO_CDEV_V1 atomic_t watch_abi_version; @@ -2517,6 +2518,18 @@ static int lineinfo_changed_notify(struct notifier_block *nb, return NOTIFY_OK; } +static int gpio_device_unregistered_notify(struct notifier_block *nb, + unsigned long action, void *data) +{ + struct gpio_chardev_data *cdev = container_of(nb, + struct gpio_chardev_data, + device_unregistered_nb); + + wake_up_poll(&cdev->wait, EPOLLIN | EPOLLERR); + + return NOTIFY_OK; +} + static __poll_t lineinfo_watch_poll_unlocked(struct file *file, struct poll_table_struct *pollt) { @@ -2671,17 +2684,27 @@ static int gpio_chrdev_open(struct inode *inode, struct file *file) if (ret) goto out_free_bitmap; + cdev->device_unregistered_nb.notifier_call = + gpio_device_unregistered_notify; + ret = blocking_notifier_chain_register(&gdev->device_notifier, + &cdev->device_unregistered_nb); + if (ret) + goto out_unregister_line_notifier; + file->private_data = cdev; ret = nonseekable_open(inode, file); if (ret) - goto out_unregister_notifier; + goto out_unregister_device_notifier; up_read(&gdev->sem); return ret; -out_unregister_notifier: +out_unregister_device_notifier: + blocking_notifier_chain_unregister(&gdev->device_notifier, + &cdev->device_unregistered_nb); +out_unregister_line_notifier: blocking_notifier_chain_unregister(&gdev->line_state_notifier, &cdev->lineinfo_changed_nb); out_free_bitmap: @@ -2706,6 +2729,8 @@ static int gpio_chrdev_release(struct inode *inode, struct file *file) struct gpio_device *gdev = cdev->gdev; bitmap_free(cdev->watched_lines); + blocking_notifier_chain_unregister(&gdev->device_notifier, + &cdev->device_unregistered_nb); blocking_notifier_chain_unregister(&gdev->line_state_notifier, &cdev->lineinfo_changed_nb); gpio_device_put(gdev); From a0dda508bd66b9eeeedc6fe0597aa8613f4b3c5d Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Thu, 17 Aug 2023 15:18:58 +0200 Subject: [PATCH 626/656] gpio: cdev: wake up linereq poll() on device unbind Add a notifier block to the linereq structure and register it with the gpio_device's device notifier. Upon reception of an event, wake up the wait queue so that the user-space be forced out of poll() and need to go into a new system call which will then fail due to the chip being gone. Signed-off-by: Bartosz Golaszewski Reviewed-by: Linus Walleij Reviewed-by: Kent Gibson --- drivers/gpio/gpiolib-cdev.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/drivers/gpio/gpiolib-cdev.c b/drivers/gpio/gpiolib-cdev.c index bc1542544e49..7d0c83127ccb 100644 --- a/drivers/gpio/gpiolib-cdev.c +++ b/drivers/gpio/gpiolib-cdev.c @@ -555,6 +555,7 @@ struct line { * @label: consumer label used to tag GPIO descriptors * @num_lines: the number of lines in the lines array * @wait: wait queue that handles blocking reads of events + * @device_unregistered_nb: notifier block for receiving gdev unregister events * @event_buffer_size: the number of elements allocated in @events * @events: KFIFO for the GPIO events * @seqno: the sequence number for edge events generated on all lines in @@ -569,6 +570,7 @@ struct linereq { const char *label; u32 num_lines; wait_queue_head_t wait; + struct notifier_block device_unregistered_nb; u32 event_buffer_size; DECLARE_KFIFO_PTR(events, struct gpio_v2_line_event); atomic_t seqno; @@ -610,6 +612,17 @@ struct linereq { GPIO_V2_LINE_FLAG_EVENT_CLOCK_HTE | \ GPIO_V2_LINE_EDGE_FLAGS) +static int linereq_unregistered_notify(struct notifier_block *nb, + unsigned long action, void *data) +{ + struct linereq *lr = container_of(nb, struct linereq, + device_unregistered_nb); + + wake_up_poll(&lr->wait, EPOLLIN | EPOLLERR); + + return NOTIFY_OK; +} + static void linereq_put_event(struct linereq *lr, struct gpio_v2_line_event *le) { @@ -1567,6 +1580,10 @@ static void linereq_free(struct linereq *lr) { unsigned int i; + if (lr->device_unregistered_nb.notifier_call) + blocking_notifier_chain_unregister(&lr->gdev->device_notifier, + &lr->device_unregistered_nb); + for (i = 0; i < lr->num_lines; i++) { if (lr->lines[i].desc) { edge_detector_stop(&lr->lines[i]); @@ -1727,6 +1744,12 @@ static int linereq_create(struct gpio_device *gdev, void __user *ip) offset); } + lr->device_unregistered_nb.notifier_call = linereq_unregistered_notify; + ret = blocking_notifier_chain_register(&gdev->device_notifier, + &lr->device_unregistered_nb); + if (ret) + goto out_free_linereq; + fd = get_unused_fd_flags(O_RDONLY | O_CLOEXEC); if (fd < 0) { ret = fd; From 91043f559313fb04ac18253fcf18561a40c1b045 Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Thu, 17 Aug 2023 15:28:31 +0200 Subject: [PATCH 627/656] gpio: cdev: wake up lineevent poll() on device unbind Add a notifier block to the lineevent_state structure and register it with the gpio_device's device notifier. Upon reception of an event, wake up the wait queue so that the user-space be forced out of poll() and need to go into a new system call which will then fail due to the chip being gone. Signed-off-by: Bartosz Golaszewski Reviewed-by: Linus Walleij Reviewed-by: Kent Gibson --- drivers/gpio/gpiolib-cdev.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/drivers/gpio/gpiolib-cdev.c b/drivers/gpio/gpiolib-cdev.c index 7d0c83127ccb..35dcaf78aed6 100644 --- a/drivers/gpio/gpiolib-cdev.c +++ b/drivers/gpio/gpiolib-cdev.c @@ -1802,6 +1802,7 @@ out_free_linereq: * @eflags: the event flags this line was requested with * @irq: the interrupt that trigger in response to events on this GPIO * @wait: wait queue that handles blocking reads of events + * @device_unregistered_nb: notifier block for receiving gdev unregister events * @events: KFIFO for the GPIO events * @timestamp: cache for the timestamp storing it between hardirq * and IRQ thread, used to bring the timestamp close to the actual @@ -1814,6 +1815,7 @@ struct lineevent_state { u32 eflags; int irq; wait_queue_head_t wait; + struct notifier_block device_unregistered_nb; DECLARE_KFIFO(events, struct gpioevent_data, 16); u64 timestamp; }; @@ -1847,6 +1849,17 @@ static __poll_t lineevent_poll(struct file *file, return call_poll_locked(file, wait, le->gdev, lineevent_poll_unlocked); } +static int lineevent_unregistered_notify(struct notifier_block *nb, + unsigned long action, void *data) +{ + struct lineevent_state *le = container_of(nb, struct lineevent_state, + device_unregistered_nb); + + wake_up_poll(&le->wait, EPOLLIN | EPOLLERR); + + return NOTIFY_OK; +} + struct compat_gpioeevent_data { compat_u64 timestamp; u32 id; @@ -1932,6 +1945,9 @@ static ssize_t lineevent_read(struct file *file, char __user *buf, static void lineevent_free(struct lineevent_state *le) { + if (le->device_unregistered_nb.notifier_call) + blocking_notifier_chain_unregister(&le->gdev->device_notifier, + &le->device_unregistered_nb); if (le->irq) free_irq(le->irq, le); if (le->desc) @@ -2160,6 +2176,12 @@ static int lineevent_create(struct gpio_device *gdev, void __user *ip) INIT_KFIFO(le->events); init_waitqueue_head(&le->wait); + le->device_unregistered_nb.notifier_call = lineevent_unregistered_notify; + ret = blocking_notifier_chain_register(&gdev->device_notifier, + &le->device_unregistered_nb); + if (ret) + goto out_free_le; + /* Request a thread to read the events */ ret = request_threaded_irq(irq, lineevent_irq_handler, From 9ce4ed5b4db13633f9934a4eac02c4cde04d5c63 Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Mon, 21 Aug 2023 16:18:27 +0200 Subject: [PATCH 628/656] gpiolib: provide and use gpiod_line_state_notify() Wrap the calls to blocking_notifier_call_chain() for the line state notifier with a helper that allows us to use fewer lines of code and simpler syntax. Signed-off-by: Bartosz Golaszewski Reviewed-by: Andy Shevchenko --- drivers/gpio/gpiolib-cdev.c | 17 +++++------------ drivers/gpio/gpiolib.c | 12 ++++++++---- drivers/gpio/gpiolib.h | 1 + 3 files changed, 14 insertions(+), 16 deletions(-) diff --git a/drivers/gpio/gpiolib-cdev.c b/drivers/gpio/gpiolib-cdev.c index 35dcaf78aed6..e39d344feb28 100644 --- a/drivers/gpio/gpiolib-cdev.c +++ b/drivers/gpio/gpiolib-cdev.c @@ -230,9 +230,7 @@ static long linehandle_set_config(struct linehandle_state *lh, return ret; } - blocking_notifier_call_chain(&desc->gdev->line_state_notifier, - GPIO_V2_LINE_CHANGED_CONFIG, - desc); + gpiod_line_state_notify(desc, GPIO_V2_LINE_CHANGED_CONFIG); } return 0; } @@ -414,8 +412,7 @@ static int linehandle_create(struct gpio_device *gdev, void __user *ip) goto out_free_lh; } - blocking_notifier_call_chain(&desc->gdev->line_state_notifier, - GPIO_V2_LINE_CHANGED_REQUESTED, desc); + gpiod_line_state_notify(desc, GPIO_V2_LINE_CHANGED_REQUESTED); dev_dbg(&gdev->dev, "registered chardev handle for line %d\n", offset); @@ -1420,9 +1417,7 @@ static long linereq_set_config_unlocked(struct linereq *lr, WRITE_ONCE(line->edflags, edflags); - blocking_notifier_call_chain(&desc->gdev->line_state_notifier, - GPIO_V2_LINE_CHANGED_CONFIG, - desc); + gpiod_line_state_notify(desc, GPIO_V2_LINE_CHANGED_CONFIG); } return 0; } @@ -1737,8 +1732,7 @@ static int linereq_create(struct gpio_device *gdev, void __user *ip) lr->lines[i].edflags = edflags; - blocking_notifier_call_chain(&desc->gdev->line_state_notifier, - GPIO_V2_LINE_CHANGED_REQUESTED, desc); + gpiod_line_state_notify(desc, GPIO_V2_LINE_CHANGED_REQUESTED); dev_dbg(&gdev->dev, "registered chardev handle for line %d\n", offset); @@ -2156,8 +2150,7 @@ static int lineevent_create(struct gpio_device *gdev, void __user *ip) if (ret) goto out_free_le; - blocking_notifier_call_chain(&desc->gdev->line_state_notifier, - GPIO_V2_LINE_CHANGED_REQUESTED, desc); + gpiod_line_state_notify(desc, GPIO_V2_LINE_CHANGED_REQUESTED); irq = gpiod_to_irq(desc); if (irq <= 0) { diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index 8f74e0bb2a5c..810bc09467a9 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c @@ -2178,8 +2178,7 @@ static bool gpiod_free_commit(struct gpio_desc *desc) } spin_unlock_irqrestore(&gpio_lock, flags); - blocking_notifier_call_chain(&desc->gdev->line_state_notifier, - GPIOLINE_CHANGED_RELEASED, desc); + gpiod_line_state_notify(desc, GPIOLINE_CHANGED_RELEASED); return ret; } @@ -3741,6 +3740,12 @@ int gpiod_set_array_value_cansleep(unsigned int array_size, } EXPORT_SYMBOL_GPL(gpiod_set_array_value_cansleep); +void gpiod_line_state_notify(struct gpio_desc *desc, unsigned long action) +{ + blocking_notifier_call_chain(&desc->gdev->line_state_notifier, + action, desc); +} + /** * gpiod_add_lookup_table() - register GPIO device consumers * @table: table of consumers to register @@ -4008,8 +4013,7 @@ static struct gpio_desc *gpiod_find_and_request(struct device *consumer, return ERR_PTR(ret); } - blocking_notifier_call_chain(&desc->gdev->line_state_notifier, - GPIOLINE_CHANGED_REQUESTED, desc); + gpiod_line_state_notify(desc, GPIOLINE_CHANGED_REQUESTED); return desc; } diff --git a/drivers/gpio/gpiolib.h b/drivers/gpio/gpiolib.h index e860ed434bc2..a0a67569300b 100644 --- a/drivers/gpio/gpiolib.h +++ b/drivers/gpio/gpiolib.h @@ -147,6 +147,7 @@ int gpiod_set_array_value_complex(bool raw, bool can_sleep, extern spinlock_t gpio_lock; extern struct list_head gpio_devices; +void gpiod_line_state_notify(struct gpio_desc *desc, unsigned long action); /** * struct gpio_desc - Opaque descriptor for a GPIO From bb5ad5ef7493ed21abc2c8b890204c8f79df86a8 Mon Sep 17 00:00:00 2001 From: Haibo Chen Date: Sat, 6 May 2023 16:59:27 +0800 Subject: [PATCH 629/656] gpio: vf610: switch to dynamic allocat GPIO base gpiolib want to get completely rid of static gpiobase allocation, so switch to dynamic allocat GPIO base, also can avoid warning message: [ 1.529974] gpio gpiochip0: Static allocation of GPIO base is deprecated, use dynamic allocation. Signed-off-by: Haibo Chen Reviewed-by: Linus Walleij Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-vf610.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpio/gpio-vf610.c b/drivers/gpio/gpio-vf610.c index 54e7c51f48c8..dbc7ba0ee72c 100644 --- a/drivers/gpio/gpio-vf610.c +++ b/drivers/gpio/gpio-vf610.c @@ -258,7 +258,6 @@ static void vf610_gpio_disable_clk(void *data) static int vf610_gpio_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; - struct device_node *np = dev->of_node; struct vf610_gpio_port *port; struct gpio_chip *gc; struct gpio_irq_chip *girq; @@ -318,7 +317,7 @@ static int vf610_gpio_probe(struct platform_device *pdev) gc->parent = dev; gc->label = dev_name(dev); gc->ngpio = VF610_GPIO_PER_PORT; - gc->base = of_alias_get_id(np, "gpio") * VF610_GPIO_PER_PORT; + gc->base = -1; gc->request = gpiochip_generic_request; gc->free = gpiochip_generic_free; From db3b16dcc7e4f5bfbe35806a54fb15dc858d19f8 Mon Sep 17 00:00:00 2001 From: Biju Das Date: Sat, 19 Aug 2023 19:04:43 +0100 Subject: [PATCH 630/656] gpio: pcf857x: Extend match data support for OF tables The driver has OF match table, but still it uses an ID lookup table for retrieving match data. Currently, the driver is working on the assumption that an I2C device registered via OF will always match a legacy I2C device ID. Extend match data support for OF tables by using i2c_get_match_data() instead of the ID lookup for both OF/ID matches by making similar OF/ID tables. Signed-off-by: Biju Das Reviewed-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-pcf857x.c | 29 ++++++++++++++--------------- 1 file changed, 14 insertions(+), 15 deletions(-) diff --git a/drivers/gpio/gpio-pcf857x.c b/drivers/gpio/gpio-pcf857x.c index c4c785548408..53b69abe6787 100644 --- a/drivers/gpio/gpio-pcf857x.c +++ b/drivers/gpio/gpio-pcf857x.c @@ -36,19 +36,19 @@ static const struct i2c_device_id pcf857x_id[] = { MODULE_DEVICE_TABLE(i2c, pcf857x_id); static const struct of_device_id pcf857x_of_table[] = { - { .compatible = "nxp,pcf8574" }, - { .compatible = "nxp,pcf8574a" }, - { .compatible = "nxp,pca8574" }, - { .compatible = "nxp,pca9670" }, - { .compatible = "nxp,pca9672" }, - { .compatible = "nxp,pca9674" }, - { .compatible = "nxp,pcf8575" }, - { .compatible = "nxp,pca8575" }, - { .compatible = "nxp,pca9671" }, - { .compatible = "nxp,pca9673" }, - { .compatible = "nxp,pca9675" }, - { .compatible = "maxim,max7328" }, - { .compatible = "maxim,max7329" }, + { .compatible = "nxp,pcf8574", (void *)8 }, + { .compatible = "nxp,pcf8574a", (void *)8 }, + { .compatible = "nxp,pca8574", (void *)8 }, + { .compatible = "nxp,pca9670", (void *)8 }, + { .compatible = "nxp,pca9672", (void *)8 }, + { .compatible = "nxp,pca9674", (void *)8 }, + { .compatible = "nxp,pcf8575", (void *)16 }, + { .compatible = "nxp,pca8575", (void *)16 }, + { .compatible = "nxp,pca9671", (void *)16 }, + { .compatible = "nxp,pca9673", (void *)16 }, + { .compatible = "nxp,pca9675", (void *)16 }, + { .compatible = "maxim,max7328", (void *)8 }, + { .compatible = "maxim,max7329", (void *)8 }, { } }; MODULE_DEVICE_TABLE(of, pcf857x_of_table); @@ -272,7 +272,6 @@ static const struct irq_chip pcf857x_irq_chip = { static int pcf857x_probe(struct i2c_client *client) { - const struct i2c_device_id *id = i2c_client_get_device_id(client); struct pcf857x *gpio; unsigned int n_latch = 0; int status; @@ -296,7 +295,7 @@ static int pcf857x_probe(struct i2c_client *client) gpio->chip.set_multiple = pcf857x_set_multiple; gpio->chip.direction_input = pcf857x_input; gpio->chip.direction_output = pcf857x_output; - gpio->chip.ngpio = id->driver_data; + gpio->chip.ngpio = (uintptr_t)i2c_get_match_data(client); /* NOTE: the OnSemi jlc1562b is also largely compatible with * these parts, notably for output. It has a low-resolution From 60ea3db33fbddf559e18567ca8897f6bb9f25290 Mon Sep 17 00:00:00 2001 From: Jinjie Ruan Date: Tue, 22 Aug 2023 20:46:42 +0800 Subject: [PATCH 631/656] spi: at91-usart: Use PTR_ERR_OR_ZERO() to simplify code Return PTR_ERR_OR_ZERO() instead of return 0 or PTR_ERR() to simplify code. Signed-off-by: Jinjie Ruan Link: https://lore.kernel.org/r/20230822124643.987079-1-ruanjinjie@huawei.com Signed-off-by: Mark Brown --- drivers/spi/spi-at91-usart.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/spi/spi-at91-usart.c b/drivers/spi/spi-at91-usart.c index 75d9bc606442..b11d0f993cc7 100644 --- a/drivers/spi/spi-at91-usart.c +++ b/drivers/spi/spi-at91-usart.c @@ -485,10 +485,7 @@ static int at91_usart_gpio_setup(struct platform_device *pdev) cs_gpios = devm_gpiod_get_array_optional(&pdev->dev, "cs", GPIOD_OUT_LOW); - if (IS_ERR(cs_gpios)) - return PTR_ERR(cs_gpios); - - return 0; + return PTR_ERR_OR_ZERO(cs_gpios); } static int at91_usart_spi_probe(struct platform_device *pdev) From ed7c6a2ba6a682f191f289de01e8eb0a1366c3eb Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Tue, 22 Aug 2023 12:03:43 +0200 Subject: [PATCH 632/656] dt-bindings: regulator: qcom,rpmh-regulator: allow i, j, l, m & n as RPMh resource name suffix Add "i", "j", "l", "m" and "n" to the allowed subffix list as they can be used as RPMh resource name suffixes on new platforms. Signed-off-by: Neil Armstrong Acked-by: Konrad Dybcio Link: https://lore.kernel.org/r/20230822-topic-sm8x50-upstream-rpmh-regulator-suffix-v2-1-136b315085a4@linaro.org Signed-off-by: Mark Brown --- .../devicetree/bindings/regulator/qcom,rpmh-regulator.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml index e758093365bc..127a6f39b7f0 100644 --- a/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml @@ -92,7 +92,7 @@ properties: RPMh resource name suffix used for the regulators found on this PMIC. $ref: /schemas/types.yaml#/definitions/string - enum: [a, b, c, d, e, f, g, h, k] + enum: [a, b, c, d, e, f, g, h, i, j, k, l, m, n] qcom,always-wait-for-ack: description: | From b0cc7491c98917f191f14efce7630b547f7ec419 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Fri, 14 Jul 2023 11:44:18 -0600 Subject: [PATCH 633/656] crypto: drivers - Explicitly include correct DT includes The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring Signed-off-by: Herbert Xu --- drivers/crypto/allwinner/sun4i-ss/sun4i-ss-core.c | 1 - drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 1 - drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c | 1 - drivers/crypto/amlogic/amlogic-gxl-core.c | 1 - drivers/crypto/aspeed/aspeed-acry.c | 3 --- drivers/crypto/atmel-aes.c | 6 ++---- drivers/crypto/atmel-ecc.c | 2 +- drivers/crypto/atmel-sha.c | 6 ++---- drivers/crypto/atmel-tdes.c | 6 ++---- drivers/crypto/bcm/cipher.c | 3 +-- drivers/crypto/caam/ctrl.c | 1 + drivers/crypto/caam/jr.c | 1 + drivers/crypto/caam/qi.c | 1 + drivers/crypto/ccree/cc_driver.c | 1 - drivers/crypto/exynos-rng.c | 2 +- drivers/crypto/gemini/sl3516-ce-core.c | 1 - drivers/crypto/img-hash.c | 4 ++-- drivers/crypto/intel/keembay/keembay-ocs-hcu-core.c | 3 ++- drivers/crypto/n2_core.c | 2 +- drivers/crypto/omap-aes.c | 1 - drivers/crypto/omap-des.c | 2 -- drivers/crypto/omap-sham.c | 1 - drivers/crypto/rockchip/rk3288_crypto.c | 1 - drivers/crypto/s5p-sss.c | 1 - drivers/crypto/sa2ul.c | 3 ++- drivers/crypto/sahara.c | 1 - drivers/crypto/starfive/jh7110-cryp.c | 2 +- drivers/crypto/starfive/jh7110-hash.c | 1 - drivers/crypto/stm32/stm32-cryp.c | 2 +- drivers/crypto/stm32/stm32-hash.c | 2 +- drivers/crypto/talitos.c | 4 ++-- drivers/crypto/xilinx/zynqmp-aes-gcm.c | 2 +- drivers/crypto/xilinx/zynqmp-sha.c | 1 - 33 files changed, 25 insertions(+), 45 deletions(-) diff --git a/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-core.c b/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-core.c index 51a3a7b5b985..3bcfcfc37084 100644 --- a/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-core.c +++ b/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-core.c @@ -14,7 +14,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c index 1c2c32d0568e..d4ccd5254280 100644 --- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c +++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c @@ -24,7 +24,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c index 62c001c9efc2..4a9587285c04 100644 --- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c +++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c @@ -23,7 +23,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c index 9846d791c956..da6dfe0f9ac3 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-core.c +++ b/drivers/crypto/amlogic/amlogic-gxl-core.c @@ -18,7 +18,6 @@ #include #include #include -#include #include #include "amlogic-gxl.h" diff --git a/drivers/crypto/aspeed/aspeed-acry.c b/drivers/crypto/aspeed/aspeed-acry.c index 2a970367e686..247c568aa8df 100644 --- a/drivers/crypto/aspeed/aspeed-acry.c +++ b/drivers/crypto/aspeed/aspeed-acry.c @@ -15,9 +15,6 @@ #include #include #include -#include -#include -#include #include #include #include diff --git a/drivers/crypto/atmel-aes.c b/drivers/crypto/atmel-aes.c index 9692254faad9..55b5f577b01c 100644 --- a/drivers/crypto/atmel-aes.c +++ b/drivers/crypto/atmel-aes.c @@ -28,7 +28,7 @@ #include #include #include -#include +#include #include #include #include @@ -2533,13 +2533,11 @@ static void atmel_aes_get_cap(struct atmel_aes_dev *dd) } } -#if defined(CONFIG_OF) static const struct of_device_id atmel_aes_dt_ids[] = { { .compatible = "atmel,at91sam9g46-aes" }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, atmel_aes_dt_ids); -#endif static int atmel_aes_probe(struct platform_device *pdev) { @@ -2678,7 +2676,7 @@ static struct platform_driver atmel_aes_driver = { .remove = atmel_aes_remove, .driver = { .name = "atmel_aes", - .of_match_table = of_match_ptr(atmel_aes_dt_ids), + .of_match_table = atmel_aes_dt_ids, }, }; diff --git a/drivers/crypto/atmel-ecc.c b/drivers/crypto/atmel-ecc.c index 432beabd79e6..590ea984c622 100644 --- a/drivers/crypto/atmel-ecc.c +++ b/drivers/crypto/atmel-ecc.c @@ -14,7 +14,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/crypto/atmel-sha.c b/drivers/crypto/atmel-sha.c index 99a9ff8e743f..3622120add62 100644 --- a/drivers/crypto/atmel-sha.c +++ b/drivers/crypto/atmel-sha.c @@ -28,7 +28,7 @@ #include #include #include -#include +#include #include #include #include @@ -2571,14 +2571,12 @@ static void atmel_sha_get_cap(struct atmel_sha_dev *dd) } } -#if defined(CONFIG_OF) static const struct of_device_id atmel_sha_dt_ids[] = { { .compatible = "atmel,at91sam9g46-sha" }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, atmel_sha_dt_ids); -#endif static int atmel_sha_probe(struct platform_device *pdev) { @@ -2708,7 +2706,7 @@ static struct platform_driver atmel_sha_driver = { .remove = atmel_sha_remove, .driver = { .name = "atmel_sha", - .of_match_table = of_match_ptr(atmel_sha_dt_ids), + .of_match_table = atmel_sha_dt_ids, }, }; diff --git a/drivers/crypto/atmel-tdes.c b/drivers/crypto/atmel-tdes.c index ba8981f326cf..099b32a10dd7 100644 --- a/drivers/crypto/atmel-tdes.c +++ b/drivers/crypto/atmel-tdes.c @@ -28,7 +28,7 @@ #include #include #include -#include +#include #include #include #include @@ -1139,13 +1139,11 @@ static void atmel_tdes_get_cap(struct atmel_tdes_dev *dd) } } -#if defined(CONFIG_OF) static const struct of_device_id atmel_tdes_dt_ids[] = { { .compatible = "atmel,at91sam9g46-tdes" }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, atmel_tdes_dt_ids); -#endif static int atmel_tdes_probe(struct platform_device *pdev) { @@ -1274,7 +1272,7 @@ static struct platform_driver atmel_tdes_driver = { .remove = atmel_tdes_remove, .driver = { .name = "atmel_tdes", - .of_match_table = of_match_ptr(atmel_tdes_dt_ids), + .of_match_table = atmel_tdes_dt_ids, }, }; diff --git a/drivers/crypto/bcm/cipher.c b/drivers/crypto/bcm/cipher.c index 4c46357e2570..689be70d69c1 100644 --- a/drivers/crypto/bcm/cipher.c +++ b/drivers/crypto/bcm/cipher.c @@ -15,8 +15,7 @@ #include #include #include -#include -#include +#include #include #include diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c index 2a228a36fa15..f63c3ed26c37 100644 --- a/drivers/crypto/caam/ctrl.c +++ b/drivers/crypto/caam/ctrl.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include diff --git a/drivers/crypto/caam/jr.c b/drivers/crypto/caam/jr.c index 07ec2f27cc68..b1f1b393b98e 100644 --- a/drivers/crypto/caam/jr.c +++ b/drivers/crypto/caam/jr.c @@ -9,6 +9,7 @@ #include #include +#include #include "compat.h" #include "ctrl.h" diff --git a/drivers/crypto/caam/qi.c b/drivers/crypto/caam/qi.c index 2ad2c1035856..46a083849a8e 100644 --- a/drivers/crypto/caam/qi.c +++ b/drivers/crypto/caam/qi.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include diff --git a/drivers/crypto/ccree/cc_driver.c b/drivers/crypto/ccree/cc_driver.c index c57f929805d5..0f0694037dd7 100644 --- a/drivers/crypto/ccree/cc_driver.c +++ b/drivers/crypto/ccree/cc_driver.c @@ -14,7 +14,6 @@ #include #include #include -#include #include #include "cc_driver.h" diff --git a/drivers/crypto/exynos-rng.c b/drivers/crypto/exynos-rng.c index b1df66be9adc..5d60a4bcb511 100644 --- a/drivers/crypto/exynos-rng.c +++ b/drivers/crypto/exynos-rng.c @@ -15,7 +15,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/crypto/gemini/sl3516-ce-core.c b/drivers/crypto/gemini/sl3516-ce-core.c index 0fd47ab9df5c..0f43c6e39bb9 100644 --- a/drivers/crypto/gemini/sl3516-ce-core.c +++ b/drivers/crypto/gemini/sl3516-ce-core.c @@ -21,7 +21,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/crypto/img-hash.c b/drivers/crypto/img-hash.c index 359aa2b41016..45063693859c 100644 --- a/drivers/crypto/img-hash.c +++ b/drivers/crypto/img-hash.c @@ -13,7 +13,7 @@ #include #include #include -#include +#include #include #include @@ -1105,7 +1105,7 @@ static struct platform_driver img_hash_driver = { .driver = { .name = "img-hash-accelerator", .pm = &img_hash_pm_ops, - .of_match_table = of_match_ptr(img_hash_match), + .of_match_table = img_hash_match, } }; module_platform_driver(img_hash_driver); diff --git a/drivers/crypto/intel/keembay/keembay-ocs-hcu-core.c b/drivers/crypto/intel/keembay/keembay-ocs-hcu-core.c index 57a20281ead8..daba8ca05dbe 100644 --- a/drivers/crypto/intel/keembay/keembay-ocs-hcu-core.c +++ b/drivers/crypto/intel/keembay/keembay-ocs-hcu-core.c @@ -16,8 +16,9 @@ #include #include #include +#include #include -#include +#include #include #include "ocs-hcu.h" diff --git a/drivers/crypto/n2_core.c b/drivers/crypto/n2_core.c index 4f6ca229ee5e..d5a32d71a3e9 100644 --- a/drivers/crypto/n2_core.c +++ b/drivers/crypto/n2_core.c @@ -10,7 +10,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/crypto/omap-aes.c b/drivers/crypto/omap-aes.c index ea1331218105..ed83023dd77a 100644 --- a/drivers/crypto/omap-aes.c +++ b/drivers/crypto/omap-aes.c @@ -28,7 +28,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/crypto/omap-des.c b/drivers/crypto/omap-des.c index ae9e9e4eb94c..089dd45eaedd 100644 --- a/drivers/crypto/omap-des.c +++ b/drivers/crypto/omap-des.c @@ -29,8 +29,6 @@ #include #include #include -#include -#include #include #include #include diff --git a/drivers/crypto/omap-sham.c b/drivers/crypto/omap-sham.c index 4b79d54fd671..a6b4a0b3ace3 100644 --- a/drivers/crypto/omap-sham.c +++ b/drivers/crypto/omap-sham.c @@ -30,7 +30,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/crypto/rockchip/rk3288_crypto.c b/drivers/crypto/rockchip/rk3288_crypto.c index 937826c50470..77d5705a5d96 100644 --- a/drivers/crypto/rockchip/rk3288_crypto.c +++ b/drivers/crypto/rockchip/rk3288_crypto.c @@ -23,7 +23,6 @@ #include #include #include -#include #include #include diff --git a/drivers/crypto/s5p-sss.c b/drivers/crypto/s5p-sss.c index 1c4d5fb05d69..fe8cf9ba8005 100644 --- a/drivers/crypto/s5p-sss.c +++ b/drivers/crypto/s5p-sss.c @@ -20,7 +20,6 @@ #include #include #include -#include #include #include diff --git a/drivers/crypto/sa2ul.c b/drivers/crypto/sa2ul.c index df5f9d675c57..6238d34f8db2 100644 --- a/drivers/crypto/sa2ul.c +++ b/drivers/crypto/sa2ul.c @@ -15,7 +15,8 @@ #include #include #include -#include +#include +#include #include #include diff --git a/drivers/crypto/sahara.c b/drivers/crypto/sahara.c index 4c799df3e883..62d93526920f 100644 --- a/drivers/crypto/sahara.c +++ b/drivers/crypto/sahara.c @@ -27,7 +27,6 @@ #include #include #include -#include #include #include diff --git a/drivers/crypto/starfive/jh7110-cryp.c b/drivers/crypto/starfive/jh7110-cryp.c index 890ad5259329..08e974e0dd12 100644 --- a/drivers/crypto/starfive/jh7110-cryp.c +++ b/drivers/crypto/starfive/jh7110-cryp.c @@ -15,8 +15,8 @@ #include #include #include +#include #include -#include #include #include #include diff --git a/drivers/crypto/starfive/jh7110-hash.c b/drivers/crypto/starfive/jh7110-hash.c index 739e944229af..cc7650198d70 100644 --- a/drivers/crypto/starfive/jh7110-hash.c +++ b/drivers/crypto/starfive/jh7110-hash.c @@ -17,7 +17,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/crypto/stm32/stm32-cryp.c b/drivers/crypto/stm32/stm32-cryp.c index c67239686b1e..f095f0065428 100644 --- a/drivers/crypto/stm32/stm32-cryp.c +++ b/drivers/crypto/stm32/stm32-cryp.c @@ -18,7 +18,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/crypto/stm32/stm32-hash.c b/drivers/crypto/stm32/stm32-hash.c index 53cf922d1a38..2b2382d4332c 100644 --- a/drivers/crypto/stm32/stm32-hash.c +++ b/drivers/crypto/stm32/stm32-hash.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/crypto/talitos.c b/drivers/crypto/talitos.c index bb27f011cf31..4ca4fbd227bc 100644 --- a/drivers/crypto/talitos.c +++ b/drivers/crypto/talitos.c @@ -19,9 +19,9 @@ #include #include #include -#include +#include #include -#include +#include #include #include #include diff --git a/drivers/crypto/xilinx/zynqmp-aes-gcm.c b/drivers/crypto/xilinx/zynqmp-aes-gcm.c index 42fe2b7afef2..ce335578b759 100644 --- a/drivers/crypto/xilinx/zynqmp-aes-gcm.c +++ b/drivers/crypto/xilinx/zynqmp-aes-gcm.c @@ -14,7 +14,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/crypto/xilinx/zynqmp-sha.c b/drivers/crypto/xilinx/zynqmp-sha.c index 43ff170ff1c2..426bf1a72ba6 100644 --- a/drivers/crypto/xilinx/zynqmp-sha.c +++ b/drivers/crypto/xilinx/zynqmp-sha.c @@ -15,7 +15,6 @@ #include #include #include -#include #include #define ZYNQMP_DMA_BIT_MASK 32U From 1d2a22fa6d2511d5871d87c15b4fe7a944fe3b2a Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 23 Aug 2023 10:52:58 +0200 Subject: [PATCH 634/656] gpio: mlxbf3: use capital "OR" for multiple licenses in SPDX Documentation/process/license-rules.rst and checkpatch expect the SPDX identifier syntax for multiple licenses to use capital "OR". Correct it to keep consistent format and avoid copy-paste issues. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-mlxbf3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-mlxbf3.c b/drivers/gpio/gpio-mlxbf3.c index 0a5f241a8352..7a3e1760fc5b 100644 --- a/drivers/gpio/gpio-mlxbf3.c +++ b/drivers/gpio/gpio-mlxbf3.c @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0-only or BSD-3-Clause +// SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause /* Copyright (C) 2022 NVIDIA CORPORATION & AFFILIATES */ #include From a11937b3cff5449871f428e46e202481dc61a9de Mon Sep 17 00:00:00 2001 From: Liming Sun Date: Tue, 22 Aug 2023 15:59:28 -0400 Subject: [PATCH 635/656] mmc: sdhci-of-dwcmshc: Add error handling in dwcmshc_resume This commit adds handling in dwcmshc_resume() for different error cases. Signed-off-by: Liming Sun Acked-by: Adrian Hunter Link: https://lore.kernel.org/r/20230822195929.168552-1-limings@nvidia.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-of-dwcmshc.c | 21 ++++++++++++++++++--- 1 file changed, 18 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c index 31c1892f4ecd..bc332a035032 100644 --- a/drivers/mmc/host/sdhci-of-dwcmshc.c +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c @@ -630,17 +630,32 @@ static int dwcmshc_resume(struct device *dev) if (!IS_ERR(priv->bus_clk)) { ret = clk_prepare_enable(priv->bus_clk); if (ret) - return ret; + goto disable_clk; } if (rk_priv) { ret = clk_bulk_prepare_enable(RK35xx_MAX_CLKS, rk_priv->rockchip_clks); if (ret) - return ret; + goto disable_bus_clk; } - return sdhci_resume_host(host); + ret = sdhci_resume_host(host); + if (ret) + goto disable_rockchip_clks; + + return 0; + +disable_rockchip_clks: + if (rk_priv) + clk_bulk_disable_unprepare(RK35xx_MAX_CLKS, + rk_priv->rockchip_clks); +disable_bus_clk: + if (!IS_ERR(priv->bus_clk)) + clk_disable_unprepare(priv->bus_clk); +disable_clk: + clk_disable_unprepare(pltfm_host->clk); + return ret; } #endif From 48fe8fadbe5e03edfd83315c331b171a9ae245a4 Mon Sep 17 00:00:00 2001 From: Liming Sun Date: Tue, 22 Aug 2023 15:59:29 -0400 Subject: [PATCH 636/656] mmc: sdhci-of-dwcmshc: Add runtime PM operations This commit implements the runtime PM operations to disable eMMC card clock when idle. Reviewed-by: David Thompson Signed-off-by: Liming Sun Acked-by: Adrian Hunter Link: https://lore.kernel.org/r/20230822195929.168552-2-limings@nvidia.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-of-dwcmshc.c | 64 ++++++++++++++++++++++++++++- 1 file changed, 62 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c index bc332a035032..3a3bae6948a8 100644 --- a/drivers/mmc/host/sdhci-of-dwcmshc.c +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include @@ -548,9 +549,13 @@ static int dwcmshc_probe(struct platform_device *pdev) host->mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY; + pm_runtime_get_noresume(dev); + pm_runtime_set_active(dev); + pm_runtime_enable(dev); + err = sdhci_setup_host(host); if (err) - goto err_clk; + goto err_rpm; if (rk_priv) dwcmshc_rk35xx_postinit(host, priv); @@ -559,10 +564,15 @@ static int dwcmshc_probe(struct platform_device *pdev) if (err) goto err_setup_host; + pm_runtime_put(dev); + return 0; err_setup_host: sdhci_cleanup_host(host); +err_rpm: + pm_runtime_disable(dev); + pm_runtime_put_noidle(dev); err_clk: clk_disable_unprepare(pltfm_host->clk); clk_disable_unprepare(priv->bus_clk); @@ -600,6 +610,8 @@ static int dwcmshc_suspend(struct device *dev) struct rk35xx_priv *rk_priv = priv->priv; int ret; + pm_runtime_resume(dev); + ret = sdhci_suspend_host(host); if (ret) return ret; @@ -659,7 +671,55 @@ disable_clk: } #endif -static SIMPLE_DEV_PM_OPS(dwcmshc_pmops, dwcmshc_suspend, dwcmshc_resume); +#ifdef CONFIG_PM + +static void dwcmshc_enable_card_clk(struct sdhci_host *host) +{ + u16 ctrl; + + ctrl = sdhci_readw(host, SDHCI_CLOCK_CONTROL); + if ((ctrl & SDHCI_CLOCK_INT_EN) && !(ctrl & SDHCI_CLOCK_CARD_EN)) { + ctrl |= SDHCI_CLOCK_CARD_EN; + sdhci_writew(host, ctrl, SDHCI_CLOCK_CONTROL); + } +} + +static void dwcmshc_disable_card_clk(struct sdhci_host *host) +{ + u16 ctrl; + + ctrl = sdhci_readw(host, SDHCI_CLOCK_CONTROL); + if (ctrl & SDHCI_CLOCK_CARD_EN) { + ctrl &= ~SDHCI_CLOCK_CARD_EN; + sdhci_writew(host, ctrl, SDHCI_CLOCK_CONTROL); + } +} + +static int dwcmshc_runtime_suspend(struct device *dev) +{ + struct sdhci_host *host = dev_get_drvdata(dev); + + dwcmshc_disable_card_clk(host); + + return 0; +} + +static int dwcmshc_runtime_resume(struct device *dev) +{ + struct sdhci_host *host = dev_get_drvdata(dev); + + dwcmshc_enable_card_clk(host); + + return 0; +} + +#endif + +static const struct dev_pm_ops dwcmshc_pmops = { + SET_SYSTEM_SLEEP_PM_OPS(dwcmshc_suspend, dwcmshc_resume) + SET_RUNTIME_PM_OPS(dwcmshc_runtime_suspend, + dwcmshc_runtime_resume, NULL) +}; static struct platform_driver sdhci_dwcmshc_driver = { .driver = { From 21cc7f816c670423a9dae06ad7de5fbc40da97c7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Thu, 24 Aug 2023 21:56:17 +0200 Subject: [PATCH 637/656] regulator: aw37503: Switch back to use struct i2c_driver's .probe() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit struct i2c_driver::probe_new is about to go away. Switch the driver to use the probe callback with the same prototype. Signed-off-by: Uwe Kleine-König Date: Thu, 24 Aug 2023 23:48:22 +0100 Subject: [PATCH 638/656] regulator: userspace-consumer: Drop event support for this cycle Drop commit 22475bcc2083 ("regulator: userspace-consumer: Add regulator event support") since Zev Weiss points out that it leaks the constants we use for notifications out as ABI which isn't ideal, we should have something more abstracted there. There's a definite need for this feature but it needs some more work on the interface. Signed-off-by: Mark Brown events; - data->events = 0; - mutex_unlock(&events_lock); - - return sprintf(buf, "0x%lx\n", e); -} - static DEVICE_ATTR_RO(name); static DEVICE_ATTR_RW(state); -static DEVICE_ATTR_RO(events); static struct attribute *attributes[] = { &dev_attr_name.attr, &dev_attr_state.attr, - &dev_attr_events.attr, NULL, }; @@ -137,28 +115,12 @@ static const struct attribute_group attr_group = { .is_visible = attr_visible, }; -static int regulator_userspace_notify(struct notifier_block *nb, - unsigned long event, - void *ignored) -{ - struct userspace_consumer_data *data = - container_of(nb, struct userspace_consumer_data, nb); - - mutex_lock(&events_lock); - data->events |= event; - mutex_unlock(&events_lock); - - sysfs_notify(data->kobj, NULL, dev_attr_events.attr.name); - - return NOTIFY_OK; -} - static int regulator_userspace_consumer_probe(struct platform_device *pdev) { struct regulator_userspace_consumer_data tmpdata; struct regulator_userspace_consumer_data *pdata; struct userspace_consumer_data *drvdata; - int i, ret; + int ret; pdata = dev_get_platdata(&pdev->dev); if (!pdata) { @@ -191,7 +153,6 @@ static int regulator_userspace_consumer_probe(struct platform_device *pdev) drvdata->num_supplies = pdata->num_supplies; drvdata->supplies = pdata->supplies; drvdata->no_autoswitch = pdata->no_autoswitch; - drvdata->kobj = &pdev->dev.kobj; mutex_init(&drvdata->lock); @@ -225,13 +186,6 @@ static int regulator_userspace_consumer_probe(struct platform_device *pdev) } drvdata->enabled = !!ret; - drvdata->nb.notifier_call = regulator_userspace_notify; - for (i = 0; i < drvdata->num_supplies; i++) { - ret = devm_regulator_register_notifier(drvdata->supplies[i].consumer, &drvdata->nb); - if (ret) - goto err_enable; - } - return 0; err_enable: @@ -243,10 +197,6 @@ err_enable: static int regulator_userspace_consumer_remove(struct platform_device *pdev) { struct userspace_consumer_data *data = platform_get_drvdata(pdev); - int i; - - for (i = 0; i < data->num_supplies; i++) - devm_regulator_unregister_notifier(data->supplies[i].consumer, &data->nb); sysfs_remove_group(&pdev->dev.kobj, &attr_group); From bac806830fde94ccf41482535fc442c02656febc Mon Sep 17 00:00:00 2001 From: Wenchao Chen Date: Fri, 25 Aug 2023 17:17:42 +0800 Subject: [PATCH 639/656] mmc: core: Add host specific tuning support for SD HS mode To support the need for host specific tuning for SD high-speed mode, let's add two new optional callbacks, ->prepare|execute_sd_hs_tuning() and let's call them when switching into the SD high-speed mode. Note that, during the tuning process it's also needed for host drivers to send commands to the SD card to verify that the tuning process succeeds. Therefore, let's also share the corresponding functions from the core to allow this. Signed-off-by: Wenchao Chen Link: https://lore.kernel.org/r/20230825091743.15613-2-wenchao.chen@unisoc.com [Ulf: Dropped unnecessary function declarations and updated the commit msg] Signed-off-by: Ulf Hansson --- drivers/mmc/core/mmc_ops.h | 1 - drivers/mmc/core/sd.c | 14 ++++++++++++++ drivers/mmc/core/sd_ops.c | 1 + drivers/mmc/core/sd_ops.h | 2 -- include/linux/mmc/host.h | 8 ++++++++ 5 files changed, 23 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/core/mmc_ops.h b/drivers/mmc/core/mmc_ops.h index 09ffbc00908b..92d4194c7893 100644 --- a/drivers/mmc/core/mmc_ops.h +++ b/drivers/mmc/core/mmc_ops.h @@ -32,7 +32,6 @@ int mmc_send_adtc_data(struct mmc_card *card, struct mmc_host *host, u32 opcode, u32 args, void *buf, unsigned len); int mmc_send_csd(struct mmc_card *card, u32 *csd); int __mmc_send_status(struct mmc_card *card, u32 *status, unsigned int retries); -int mmc_send_status(struct mmc_card *card, u32 *status); int mmc_send_cid(struct mmc_host *host, u32 *cid); int mmc_spi_read_ocr(struct mmc_host *host, int highcap, u32 *ocrp); int mmc_spi_set_crc(struct mmc_host *host, int use_crc); diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c index 246ce027ae0a..c3e554344c99 100644 --- a/drivers/mmc/core/sd.c +++ b/drivers/mmc/core/sd.c @@ -1518,6 +1518,13 @@ retry: */ mmc_set_clock(host, mmc_sd_get_max_clock(card)); + if (host->ios.timing == MMC_TIMING_SD_HS && + host->ops->prepare_sd_hs_tuning) { + err = host->ops->prepare_sd_hs_tuning(host, card); + if (err) + goto free_card; + } + /* * Switch to wider bus (if supported). */ @@ -1529,6 +1536,13 @@ retry: mmc_set_bus_width(host, MMC_BUS_WIDTH_4); } + + if (host->ios.timing == MMC_TIMING_SD_HS && + host->ops->execute_sd_hs_tuning) { + err = host->ops->execute_sd_hs_tuning(host, card); + if (err) + goto free_card; + } } cont: if (!oldcard) { diff --git a/drivers/mmc/core/sd_ops.c b/drivers/mmc/core/sd_ops.c index ef8d1dce5af1..a59cd592f06e 100644 --- a/drivers/mmc/core/sd_ops.c +++ b/drivers/mmc/core/sd_ops.c @@ -323,6 +323,7 @@ int mmc_sd_switch(struct mmc_card *card, int mode, int group, return mmc_send_adtc_data(card, card->host, SD_SWITCH, cmd_args, resp, 64); } +EXPORT_SYMBOL_GPL(mmc_sd_switch); int mmc_app_sd_status(struct mmc_card *card, void *ssr) { diff --git a/drivers/mmc/core/sd_ops.h b/drivers/mmc/core/sd_ops.h index 3ba7b3cf4652..7667fc223b74 100644 --- a/drivers/mmc/core/sd_ops.h +++ b/drivers/mmc/core/sd_ops.h @@ -19,8 +19,6 @@ int mmc_send_if_cond(struct mmc_host *host, u32 ocr); int mmc_send_if_cond_pcie(struct mmc_host *host, u32 ocr); int mmc_send_relative_addr(struct mmc_host *host, unsigned int *rca); int mmc_app_send_scr(struct mmc_card *card); -int mmc_sd_switch(struct mmc_card *card, int mode, int group, - u8 value, u8 *resp); int mmc_app_sd_status(struct mmc_card *card, void *ssr); int mmc_app_cmd(struct mmc_host *host, struct mmc_card *card); diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h index 461d1543893b..62a6847a3b6f 100644 --- a/include/linux/mmc/host.h +++ b/include/linux/mmc/host.h @@ -184,6 +184,12 @@ struct mmc_host_ops { /* Execute HS400 tuning depending host driver */ int (*execute_hs400_tuning)(struct mmc_host *host, struct mmc_card *card); + /* Optional callback to prepare for SD high-speed tuning */ + int (*prepare_sd_hs_tuning)(struct mmc_host *host, struct mmc_card *card); + + /* Optional callback to execute SD high-speed tuning */ + int (*execute_sd_hs_tuning)(struct mmc_host *host, struct mmc_card *card); + /* Prepare switch to DDR during the HS400 init sequence */ int (*hs400_prepare_ddr)(struct mmc_host *host); @@ -665,6 +671,8 @@ static inline void mmc_debugfs_err_stats_inc(struct mmc_host *host, host->err_stats[stat] += 1; } +int mmc_sd_switch(struct mmc_card *card, int mode, int group, u8 value, u8 *resp); +int mmc_send_status(struct mmc_card *card, u32 *status); int mmc_send_tuning(struct mmc_host *host, u32 opcode, int *cmd_error); int mmc_send_abort_tuning(struct mmc_host *host, u32 opcode); int mmc_get_ext_csd(struct mmc_card *card, u8 **new_ext_csd); From d83d251bf3c2521bfce59016977da6c1cf995d61 Mon Sep 17 00:00:00 2001 From: Wenchao Chen Date: Fri, 25 Aug 2023 17:17:43 +0800 Subject: [PATCH 640/656] mmc: sdhci-sprd: Add SD HS mode online tuning First of all, Unisoc's IC provides cmd delay and read delay to ensure that the host can get the correct data. However, according to SD Spec, there is no need to do tuning in high speed mode, but with the development of chip processes, it is more and more difficult to find a suitable delay to cover all the chips. Therefore, we need SD high speed mode online tuning. In addition, we added mmc_sd_switch() and mmc_send_status() to the header file to allow it to be usable by the driver. Signed-off-by: Wenchao Chen Link: https://lore.kernel.org/r/20230825091743.15613-3-wenchao.chen@unisoc.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/sdhci-sprd.c | 149 ++++++++++++++++++++++++++++++++++ 1 file changed, 149 insertions(+) diff --git a/drivers/mmc/host/sdhci-sprd.c b/drivers/mmc/host/sdhci-sprd.c index 28639d6621fd..649ae075e229 100644 --- a/drivers/mmc/host/sdhci-sprd.c +++ b/drivers/mmc/host/sdhci-sprd.c @@ -9,6 +9,8 @@ #include #include #include +#include +#include #include #include #include @@ -72,6 +74,11 @@ #define SDHCI_SPRD_CLK_DEF_RATE 26000000 #define SDHCI_SPRD_PHY_DLL_CLK 52000000 +#define SDHCI_SPRD_MAX_RANGE 0xff +#define SDHCI_SPRD_CMD_DLY_MASK GENMASK(15, 8) +#define SDHCI_SPRD_POSRD_DLY_MASK GENMASK(23, 16) +#define SDHCI_SPRD_CPST_EN GENMASK(27, 24) + struct sdhci_sprd_host { u32 version; struct clk *clk_sdio; @@ -85,6 +92,11 @@ struct sdhci_sprd_host { u32 phy_delay[MMC_TIMING_MMC_HS400 + 2]; }; +enum sdhci_sprd_tuning_type { + SDHCI_SPRD_TUNING_SD_HS_CMD, + SDHCI_SPRD_TUNING_SD_HS_DATA, +}; + struct sdhci_sprd_phy_cfg { const char *property; u8 timing; @@ -532,6 +544,138 @@ static void sdhci_sprd_hs400_enhanced_strobe(struct mmc_host *mmc, SDHCI_SPRD_REG_32_DLL_DLY); } +static int mmc_send_tuning_cmd(struct mmc_card *card) +{ + return mmc_send_status(card, NULL); +} + +static int mmc_send_tuning_data(struct mmc_card *card) +{ + u8 *status; + int ret; + + status = kmalloc(64, GFP_KERNEL); + if (!status) + return -ENOMEM; + + ret = mmc_sd_switch(card, 0, 0, 0, status); + + kfree(status); + + return ret; +} + +static int sdhci_sprd_get_best_clk_sample(struct mmc_host *mmc, u8 *value) +{ + int range_end = SDHCI_SPRD_MAX_RANGE; + int range_length = 0; + int middle_range = 0; + int count = 0; + int i; + + for (i = 0; i <= SDHCI_SPRD_MAX_RANGE; i++) { + if (value[i]) { + pr_debug("%s: tuning ok: %d\n", mmc_hostname(mmc), i); + count++; + } else { + pr_debug("%s: tuning fail: %d\n", mmc_hostname(mmc), i); + if (range_length < count) { + range_length = count; + range_end = i - 1; + count = 0; + } + } + } + + if (!count) + return -EIO; + + if (count > range_length) { + range_length = count; + range_end = i - 1; + } + + middle_range = range_end - (range_length - 1) / 2; + + return middle_range; +} + +static int sdhci_sprd_tuning(struct mmc_host *mmc, struct mmc_card *card, + enum sdhci_sprd_tuning_type type) +{ + struct sdhci_host *host = mmc_priv(mmc); + struct sdhci_sprd_host *sprd_host = TO_SPRD_HOST(host); + u32 *p = sprd_host->phy_delay; + u32 dll_cfg, dll_dly; + int best_clk_sample; + int err = 0; + u8 *value; + int i; + + value = kmalloc(SDHCI_SPRD_MAX_RANGE + 1, GFP_KERNEL); + if (!value) + return -ENOMEM; + + sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA); + + dll_cfg = sdhci_readl(host, SDHCI_SPRD_REG_32_DLL_CFG); + dll_cfg &= ~SDHCI_SPRD_CPST_EN; + sdhci_writel(host, dll_cfg, SDHCI_SPRD_REG_32_DLL_CFG); + + dll_dly = p[mmc->ios.timing]; + + for (i = 0; i <= SDHCI_SPRD_MAX_RANGE; i++) { + if (type == SDHCI_SPRD_TUNING_SD_HS_CMD) { + dll_dly &= ~SDHCI_SPRD_CMD_DLY_MASK; + dll_dly |= ((i << 8) & SDHCI_SPRD_CMD_DLY_MASK); + } else { + dll_dly &= ~SDHCI_SPRD_POSRD_DLY_MASK; + dll_dly |= ((i << 16) & SDHCI_SPRD_POSRD_DLY_MASK); + } + + sdhci_writel(host, dll_dly, SDHCI_SPRD_REG_32_DLL_DLY); + + if (type == SDHCI_SPRD_TUNING_SD_HS_CMD) + value[i] = !mmc_send_tuning_cmd(card); + else + value[i] = !mmc_send_tuning_data(card); + } + + best_clk_sample = sdhci_sprd_get_best_clk_sample(mmc, value); + if (best_clk_sample < 0) { + dev_err(mmc_dev(host->mmc), "all tuning phase fail!\n"); + goto out; + } + + if (type == SDHCI_SPRD_TUNING_SD_HS_CMD) { + p[mmc->ios.timing] &= ~SDHCI_SPRD_CMD_DLY_MASK; + p[mmc->ios.timing] |= ((best_clk_sample << 8) & SDHCI_SPRD_CMD_DLY_MASK); + } else { + p[mmc->ios.timing] &= ~(SDHCI_SPRD_POSRD_DLY_MASK); + p[mmc->ios.timing] |= ((best_clk_sample << 16) & SDHCI_SPRD_POSRD_DLY_MASK); + } + + pr_debug("%s: the best clk sample %d, delay value 0x%08x\n", + mmc_hostname(host->mmc), best_clk_sample, p[mmc->ios.timing]); + +out: + sdhci_writel(host, p[mmc->ios.timing], SDHCI_SPRD_REG_32_DLL_DLY); + + kfree(value); + + return err; +} + +static int sdhci_sprd_prepare_sd_hs_cmd_tuning(struct mmc_host *mmc, struct mmc_card *card) +{ + return sdhci_sprd_tuning(mmc, card, SDHCI_SPRD_TUNING_SD_HS_CMD); +} + +static int sdhci_sprd_execute_sd_hs_data_tuning(struct mmc_host *mmc, struct mmc_card *card) +{ + return sdhci_sprd_tuning(mmc, card, SDHCI_SPRD_TUNING_SD_HS_DATA); +} + static void sdhci_sprd_phy_param_parse(struct sdhci_sprd_host *sprd_host, struct device_node *np) { @@ -576,6 +720,11 @@ static int sdhci_sprd_probe(struct platform_device *pdev) host->mmc_host_ops.request = sdhci_sprd_request; host->mmc_host_ops.hs400_enhanced_strobe = sdhci_sprd_hs400_enhanced_strobe; + host->mmc_host_ops.prepare_sd_hs_tuning = + sdhci_sprd_prepare_sd_hs_cmd_tuning; + host->mmc_host_ops.execute_sd_hs_tuning = + sdhci_sprd_execute_sd_hs_data_tuning; + /* * We can not use the standard ops to change and detect the voltage * signal for Spreadtrum SD host controller, since our voltage regulator From fab9516f02b418e37d3cde6c21c316085262aece Mon Sep 17 00:00:00 2001 From: Adam Guerin Date: Mon, 14 Aug 2023 16:52:30 +0100 Subject: [PATCH 641/656] crypto: qat - fix crypto capability detection for 4xxx When extending the capability detection logic for 4xxx devices the SMx algorithms were accidentally missed. Enable these SMx capabilities by default for QAT GEN4 devices. Check for device variants where the SMx algorithms are explicitly disabled by the GEN4 hardware. This is indicated in fusectl1 register. Mask out SM3 and SM4 based on a bit specific to those algorithms. Mask out SM2 if the PKE slice is not present. Fixes: 4b44d28c715d ("crypto: qat - extend crypto capability detection for 4xxx") Signed-off-by: Adam Guerin Reviewed-by: Giovanni Cabiddu Reviewed-by: Fiona Trahe Signed-off-by: Herbert Xu --- drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c | 9 +++++++++ drivers/crypto/intel/qat/qat_common/icp_qat_hw.h | 5 ++++- 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c b/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c index 268a1f7694fc..dd4464b7e00b 100644 --- a/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c +++ b/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c @@ -225,6 +225,8 @@ static u32 get_accel_cap(struct adf_accel_dev *accel_dev) ICP_ACCEL_CAPABILITIES_HKDF | ICP_ACCEL_CAPABILITIES_CHACHA_POLY | ICP_ACCEL_CAPABILITIES_AESGCM_SPC | + ICP_ACCEL_CAPABILITIES_SM3 | + ICP_ACCEL_CAPABILITIES_SM4 | ICP_ACCEL_CAPABILITIES_AES_V2; /* A set bit in fusectl1 means the feature is OFF in this SKU */ @@ -248,12 +250,19 @@ static u32 get_accel_cap(struct adf_accel_dev *accel_dev) capabilities_sym &= ~ICP_ACCEL_CAPABILITIES_CIPHER; } + if (fusectl1 & ICP_ACCEL_4XXX_MASK_SMX_SLICE) { + capabilities_sym &= ~ICP_ACCEL_CAPABILITIES_SM3; + capabilities_sym &= ~ICP_ACCEL_CAPABILITIES_SM4; + } + capabilities_asym = ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC | ICP_ACCEL_CAPABILITIES_CIPHER | + ICP_ACCEL_CAPABILITIES_SM2 | ICP_ACCEL_CAPABILITIES_ECEDMONT; if (fusectl1 & ICP_ACCEL_4XXX_MASK_PKE_SLICE) { capabilities_asym &= ~ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC; + capabilities_asym &= ~ICP_ACCEL_CAPABILITIES_SM2; capabilities_asym &= ~ICP_ACCEL_CAPABILITIES_ECEDMONT; } diff --git a/drivers/crypto/intel/qat/qat_common/icp_qat_hw.h b/drivers/crypto/intel/qat/qat_common/icp_qat_hw.h index a65059e56248..0c8883e2ccc6 100644 --- a/drivers/crypto/intel/qat/qat_common/icp_qat_hw.h +++ b/drivers/crypto/intel/qat/qat_common/icp_qat_hw.h @@ -97,7 +97,10 @@ enum icp_qat_capabilities_mask { ICP_ACCEL_CAPABILITIES_SHA3_EXT = BIT(15), ICP_ACCEL_CAPABILITIES_AESGCM_SPC = BIT(16), ICP_ACCEL_CAPABILITIES_CHACHA_POLY = BIT(17), - /* Bits 18-21 are currently reserved */ + ICP_ACCEL_CAPABILITIES_SM2 = BIT(18), + ICP_ACCEL_CAPABILITIES_SM3 = BIT(19), + ICP_ACCEL_CAPABILITIES_SM4 = BIT(20), + /* Bit 21 is currently reserved */ ICP_ACCEL_CAPABILITIES_CNV_INTEGRITY = BIT(22), ICP_ACCEL_CAPABILITIES_CNV_INTEGRITY64 = BIT(23), ICP_ACCEL_CAPABILITIES_LZ4_COMPRESSION = BIT(24), From ef5b52a631f8c18353e80ccab8408b963305510c Mon Sep 17 00:00:00 2001 From: Thore Sommer Date: Tue, 15 Aug 2023 14:29:42 +0300 Subject: [PATCH 642/656] X.509: if signature is unsupported skip validation When the hash algorithm for the signature is not available the digest size is 0 and the signature in the certificate is marked as unsupported. When validating a self-signed certificate, this needs to be checked, because otherwise trying to validate the signature will fail with an warning: Loading compiled-in X.509 certificates WARNING: CPU: 0 PID: 1 at crypto/rsa-pkcs1pad.c:537 \ pkcs1pad_verify+0x46/0x12c ... Problem loading in-kernel X.509 certificate (-22) Signed-off-by: Thore Sommer Cc: stable@vger.kernel.org # v4.7+ Fixes: 6c2dc5ae4ab7 ("X.509: Extract signature digest and make self-signed cert checks earlier") Signed-off-by: Herbert Xu --- crypto/asymmetric_keys/x509_public_key.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/crypto/asymmetric_keys/x509_public_key.c b/crypto/asymmetric_keys/x509_public_key.c index 6fdfc82e23a8..7c71db3ac23d 100644 --- a/crypto/asymmetric_keys/x509_public_key.c +++ b/crypto/asymmetric_keys/x509_public_key.c @@ -130,6 +130,11 @@ int x509_check_for_self_signed(struct x509_certificate *cert) goto out; } + if (cert->unsupported_sig) { + ret = 0; + goto out; + } + ret = public_key_verify_signature(cert->pub, cert->sig); if (ret < 0) { if (ret == -ENOPKG) { From 9687daf785c035b4b6f73c998e6ee75bb0697c7e Mon Sep 17 00:00:00 2001 From: Yue Haibing Date: Thu, 17 Aug 2023 21:48:54 +0800 Subject: [PATCH 643/656] crypto: chelsio - Remove unused declarations These declarations are not implemented now, remove them. Signed-off-by: Yue Haibing Signed-off-by: Herbert Xu --- drivers/crypto/chelsio/chcr_core.h | 1 - drivers/crypto/chelsio/chcr_crypto.h | 1 - 2 files changed, 2 deletions(-) diff --git a/drivers/crypto/chelsio/chcr_core.h b/drivers/crypto/chelsio/chcr_core.h index f7c8bb95a71b..5e9d568131fe 100644 --- a/drivers/crypto/chelsio/chcr_core.h +++ b/drivers/crypto/chelsio/chcr_core.h @@ -133,7 +133,6 @@ int start_crypto(void); int stop_crypto(void); int chcr_uld_rx_handler(void *handle, const __be64 *rsp, const struct pkt_gl *pgl); -int chcr_uld_tx_handler(struct sk_buff *skb, struct net_device *dev); int chcr_handle_resp(struct crypto_async_request *req, unsigned char *input, int err); #endif /* __CHCR_CORE_H__ */ diff --git a/drivers/crypto/chelsio/chcr_crypto.h b/drivers/crypto/chelsio/chcr_crypto.h index 7f88ddb08631..1d693b8436e6 100644 --- a/drivers/crypto/chelsio/chcr_crypto.h +++ b/drivers/crypto/chelsio/chcr_crypto.h @@ -344,7 +344,6 @@ void chcr_add_cipher_dst_ent(struct skcipher_request *req, struct cpl_rx_phys_dsgl *phys_cpl, struct cipher_wr_param *wrparam, unsigned short qid); -int sg_nents_len_skip(struct scatterlist *sg, u64 len, u64 skip); void chcr_add_hash_src_ent(struct ahash_request *req, struct ulptx_sgl *ulptx, struct hash_wr_param *param); int chcr_hash_dma_map(struct device *dev, struct ahash_request *req); From 85b9bf9a514d991fcecb118d0a8a35e754ff9265 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Thu, 24 Aug 2023 13:33:20 +0200 Subject: [PATCH 644/656] Revert "dt-bindings: crypto: qcom,prng: Add SM8450" This reverts commit b9296bb41275 ("dt-bindings: crypto: qcom,prng: Add SM8450"), since the RNG HW on the SM8450 SoC is in fact a True Random Number Generator, a more appropriate compatible should be instead as reported at [1]. [1] https://lore.kernel.org/all/20230818161720.3644424-1-quic_omprsing@quicinc.com/ Suggested-by: Om Prakash Singh Suggested-by: Konrad Dybcio Signed-off-by: Neil Armstrong Reviewed-by: Konrad Dybcio Signed-off-by: Herbert Xu --- .../devicetree/bindings/crypto/qcom,prng.yaml | 24 ++++--------------- 1 file changed, 5 insertions(+), 19 deletions(-) diff --git a/Documentation/devicetree/bindings/crypto/qcom,prng.yaml b/Documentation/devicetree/bindings/crypto/qcom,prng.yaml index 36b0ebd9a44b..bb42f4588b40 100644 --- a/Documentation/devicetree/bindings/crypto/qcom,prng.yaml +++ b/Documentation/devicetree/bindings/crypto/qcom,prng.yaml @@ -11,13 +11,9 @@ maintainers: properties: compatible: - oneOf: - - enum: - - qcom,prng # 8916 etc. - - qcom,prng-ee # 8996 and later using EE - - items: - - const: qcom,sm8450-prng-ee - - const: qcom,prng-ee + enum: + - qcom,prng # 8916 etc. + - qcom,prng-ee # 8996 and later using EE reg: maxItems: 1 @@ -32,18 +28,8 @@ properties: required: - compatible - reg - -allOf: - - if: - not: - properties: - compatible: - contains: - const: qcom,sm8450-prng-ee - then: - required: - - clocks - - clock-names + - clocks + - clock-names additionalProperties: false From ea05787136256b078fab3cc7db33caf24678ee47 Mon Sep 17 00:00:00 2001 From: Biju Das Date: Thu, 24 Aug 2023 17:00:17 +0100 Subject: [PATCH 645/656] gpio: pca953x: Use i2c_get_match_data() Replace device_get_match_data() and id lookup for retrieving match data by i2c_get_match_data(). Signed-off-by: Biju Das Reviewed-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-pca953x.c | 18 +++--------------- 1 file changed, 3 insertions(+), 15 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index a806a3c1b801..929a2d075fe4 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -1051,7 +1051,6 @@ out: static int pca953x_probe(struct i2c_client *client) { - const struct i2c_device_id *i2c_id = i2c_client_get_device_id(client); struct pca953x_platform_data *pdata; struct pca953x_chip *chip; int irq_base = 0; @@ -1090,6 +1089,9 @@ static int pca953x_probe(struct i2c_client *client) } chip->client = client; + chip->driver_data = (uintptr_t)i2c_get_match_data(client); + if (!chip->driver_data) + return -ENODEV; reg = devm_regulator_get(&client->dev, "vcc"); if (IS_ERR(reg)) @@ -1102,20 +1104,6 @@ static int pca953x_probe(struct i2c_client *client) } chip->regulator = reg; - if (i2c_id) { - chip->driver_data = i2c_id->driver_data; - } else { - const void *match; - - match = device_get_match_data(&client->dev); - if (!match) { - ret = -ENODEV; - goto err_exit; - } - - chip->driver_data = (uintptr_t)match; - } - i2c_set_clientdata(client, chip); pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK); From 1b961a75abfc043b2e5a8f97e1939d12242f4346 Mon Sep 17 00:00:00 2001 From: Liam Beguin Date: Thu, 24 Aug 2023 19:16:26 -0400 Subject: [PATCH 646/656] dt-bindings: gpio: pca95xx: document new tca9538 chip Add a compatible for tca9538. Signed-off-by: Liam Beguin Acked-by: Krzysztof Kozlowski [Bartosz: tweaked the commit message] Signed-off-by: Bartosz Golaszewski --- Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml b/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml index fa116148ee90..99febb8ea1b6 100644 --- a/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml +++ b/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml @@ -66,6 +66,7 @@ properties: - ti,tca6408 - ti,tca6416 - ti,tca6424 + - ti,tca9538 - ti,tca9539 - ti,tca9554 From 3d0957b07e27abd3237b1fe0c7f06485ba80852f Mon Sep 17 00:00:00 2001 From: Liam Beguin Date: Thu, 24 Aug 2023 19:16:25 -0400 Subject: [PATCH 647/656] gpio: pca953x: add support for TCA9538 The TCA9538 is an 8 bit version of the already supported TCA9539. This chip also has interrupt support. Signed-off-by: Liam Beguin Reviewed-by: Andy Shevchenko Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-pca953x.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index 929a2d075fe4..bdd50a78e414 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -108,6 +108,7 @@ static const struct i2c_device_id pca953x_id[] = { { "tca6408", 8 | PCA953X_TYPE | PCA_INT, }, { "tca6416", 16 | PCA953X_TYPE | PCA_INT, }, { "tca6424", 24 | PCA953X_TYPE | PCA_INT, }, + { "tca9538", 8 | PCA953X_TYPE | PCA_INT, }, { "tca9539", 16 | PCA953X_TYPE | PCA_INT, }, { "tca9554", 8 | PCA953X_TYPE | PCA_INT, }, { "xra1202", 8 | PCA953X_TYPE }, @@ -1342,6 +1343,7 @@ static const struct of_device_id pca953x_dt_ids[] = { { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), }, { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), }, { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), }, + { .compatible = "ti,tca9538", .data = OF_953X( 8, PCA_INT), }, { .compatible = "ti,tca9539", .data = OF_953X(16, PCA_INT), }, { .compatible = "onnn,cat9554", .data = OF_953X( 8, PCA_INT), }, From ce6e94722523f85e265455eb3296ebdbe996b3b5 Mon Sep 17 00:00:00 2001 From: Balamanikandan Gunasundar Date: Fri, 25 Aug 2023 15:21:55 +0530 Subject: [PATCH 648/656] mmc: atmel-mci: Convert to gpio descriptors Replace the legacy GPIO APIs with gpio descriptor consumer interface. To maintain backward compatibility, we rely on the "cd-inverted" property to manage the invertion flag instead of GPIO property. Signed-off-by: Balamanikandan Gunasundar Reviewed-by: Linus Walleij Link: https://lore.kernel.org/r/20230825095157.76073-2-balamanikandan.gunasundar@microchip.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/atmel-mci.c | 77 +++++++++++++++++------------------- include/linux/atmel-mci.h | 4 +- 2 files changed, 39 insertions(+), 42 deletions(-) diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c index 1f89d02c4685..892d29fed9ec 100644 --- a/drivers/mmc/host/atmel-mci.c +++ b/drivers/mmc/host/atmel-mci.c @@ -11,14 +11,14 @@ #include #include #include -#include #include #include #include #include #include #include -#include +#include +#include #include #include #include @@ -387,8 +387,8 @@ struct atmel_mci_slot { #define ATMCI_CARD_NEED_INIT 1 #define ATMCI_SHUTDOWN 2 - int detect_pin; - int wp_pin; + struct gpio_desc *detect_pin; + struct gpio_desc *wp_pin; bool detect_is_active_high; struct timer_list detect_timer; @@ -636,7 +636,10 @@ atmci_of_init(struct platform_device *pdev) pdata->slot[slot_id].bus_width = 1; pdata->slot[slot_id].detect_pin = - of_get_named_gpio(cnp, "cd-gpios", 0); + devm_fwnode_gpiod_get(&pdev->dev, of_fwnode_handle(cnp), + "cd", GPIOD_IN, "cd-gpios"); + if (IS_ERR(pdata->slot[slot_id].detect_pin)) + pdata->slot[slot_id].detect_pin = NULL; pdata->slot[slot_id].detect_is_active_high = of_property_read_bool(cnp, "cd-inverted"); @@ -645,7 +648,10 @@ atmci_of_init(struct platform_device *pdev) of_property_read_bool(cnp, "non-removable"); pdata->slot[slot_id].wp_pin = - of_get_named_gpio(cnp, "wp-gpios", 0); + devm_fwnode_gpiod_get(&pdev->dev, of_fwnode_handle(cnp), + "wp", GPIOD_IN, "wp-gpios"); + if (IS_ERR(pdata->slot[slot_id].wp_pin)) + pdata->slot[slot_id].wp_pin = NULL; } return pdata; @@ -1508,8 +1514,8 @@ static int atmci_get_ro(struct mmc_host *mmc) int read_only = -ENOSYS; struct atmel_mci_slot *slot = mmc_priv(mmc); - if (gpio_is_valid(slot->wp_pin)) { - read_only = gpio_get_value(slot->wp_pin); + if (slot->wp_pin) { + read_only = gpiod_get_value(slot->wp_pin); dev_dbg(&mmc->class_dev, "card is %s\n", read_only ? "read-only" : "read-write"); } @@ -1522,8 +1528,8 @@ static int atmci_get_cd(struct mmc_host *mmc) int present = -ENOSYS; struct atmel_mci_slot *slot = mmc_priv(mmc); - if (gpio_is_valid(slot->detect_pin)) { - present = !(gpio_get_value(slot->detect_pin) ^ + if (slot->detect_pin) { + present = !(gpiod_get_raw_value(slot->detect_pin) ^ slot->detect_is_active_high); dev_dbg(&mmc->class_dev, "card is %spresent\n", present ? "" : "not "); @@ -1636,8 +1642,8 @@ static void atmci_detect_change(struct timer_list *t) if (test_bit(ATMCI_SHUTDOWN, &slot->flags)) return; - enable_irq(gpio_to_irq(slot->detect_pin)); - present = !(gpio_get_value(slot->detect_pin) ^ + enable_irq(gpiod_to_irq(slot->detect_pin)); + present = !(gpiod_get_raw_value(slot->detect_pin) ^ slot->detect_is_active_high); present_old = test_bit(ATMCI_CARD_PRESENT, &slot->flags); @@ -2236,9 +2242,9 @@ static int atmci_init_slot(struct atmel_mci *host, dev_dbg(&mmc->class_dev, "slot[%u]: bus_width=%u, detect_pin=%d, " "detect_is_active_high=%s, wp_pin=%d\n", - id, slot_data->bus_width, slot_data->detect_pin, + id, slot_data->bus_width, desc_to_gpio(slot_data->detect_pin), slot_data->detect_is_active_high ? "true" : "false", - slot_data->wp_pin); + desc_to_gpio(slot_data->wp_pin)); mmc->ops = &atmci_ops; mmc->f_min = DIV_ROUND_UP(host->bus_hz, 512); @@ -2274,31 +2280,24 @@ static int atmci_init_slot(struct atmel_mci *host, /* Assume card is present initially */ set_bit(ATMCI_CARD_PRESENT, &slot->flags); - if (gpio_is_valid(slot->detect_pin)) { - if (devm_gpio_request(&host->pdev->dev, slot->detect_pin, - "mmc_detect")) { - dev_dbg(&mmc->class_dev, "no detect pin available\n"); - slot->detect_pin = -EBUSY; - } else if (gpio_get_value(slot->detect_pin) ^ - slot->detect_is_active_high) { + if (slot->detect_pin) { + if (gpiod_get_raw_value(slot->detect_pin) ^ + slot->detect_is_active_high) { clear_bit(ATMCI_CARD_PRESENT, &slot->flags); } + } else { + dev_dbg(&mmc->class_dev, "no detect pin available\n"); } - if (!gpio_is_valid(slot->detect_pin)) { + if (!slot->detect_pin) { if (slot_data->non_removable) mmc->caps |= MMC_CAP_NONREMOVABLE; else mmc->caps |= MMC_CAP_NEEDS_POLL; } - if (gpio_is_valid(slot->wp_pin)) { - if (devm_gpio_request(&host->pdev->dev, slot->wp_pin, - "mmc_wp")) { - dev_dbg(&mmc->class_dev, "no WP pin available\n"); - slot->wp_pin = -EBUSY; - } - } + if (!slot->wp_pin) + dev_dbg(&mmc->class_dev, "no WP pin available\n"); host->slot[id] = slot; mmc_regulator_get_supply(mmc); @@ -2308,18 +2307,18 @@ static int atmci_init_slot(struct atmel_mci *host, return ret; } - if (gpio_is_valid(slot->detect_pin)) { + if (slot->detect_pin) { timer_setup(&slot->detect_timer, atmci_detect_change, 0); - ret = request_irq(gpio_to_irq(slot->detect_pin), - atmci_detect_interrupt, - IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, - "mmc-detect", slot); + ret = request_irq(gpiod_to_irq(slot->detect_pin), + atmci_detect_interrupt, + IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, + "mmc-detect", slot); if (ret) { dev_dbg(&mmc->class_dev, "could not request IRQ %d for detect pin\n", - gpio_to_irq(slot->detect_pin)); - slot->detect_pin = -EBUSY; + gpiod_to_irq(slot->detect_pin)); + slot->detect_pin = NULL; } } @@ -2338,10 +2337,8 @@ static void atmci_cleanup_slot(struct atmel_mci_slot *slot, mmc_remove_host(slot->mmc); - if (gpio_is_valid(slot->detect_pin)) { - int pin = slot->detect_pin; - - free_irq(gpio_to_irq(pin), slot); + if (slot->detect_pin) { + free_irq(gpiod_to_irq(slot->detect_pin), slot); del_timer_sync(&slot->detect_timer); } diff --git a/include/linux/atmel-mci.h b/include/linux/atmel-mci.h index 1491af38cc6e..017e7d8f6126 100644 --- a/include/linux/atmel-mci.h +++ b/include/linux/atmel-mci.h @@ -26,8 +26,8 @@ */ struct mci_slot_pdata { unsigned int bus_width; - int detect_pin; - int wp_pin; + struct gpio_desc *detect_pin; + struct gpio_desc *wp_pin; bool detect_is_active_high; bool non_removable; }; From d2c6d518c21d73d96616e08a19eccd4642f4bafa Mon Sep 17 00:00:00 2001 From: Balamanikandan Gunasundar Date: Fri, 25 Aug 2023 15:21:56 +0530 Subject: [PATCH 649/656] mmc: atmel-mci: move atmel MCI header file Move the contents of linux/atmel-mci.h into drivers/mmc/host/atmel-mci.c as it is only used in one file Signed-off-by: Balamanikandan Gunasundar Reviewed-by: Ludovic Desroches Link: https://lore.kernel.org/r/20230825095157.76073-3-balamanikandan.gunasundar@microchip.com Signed-off-by: Ulf Hansson --- drivers/mmc/host/atmel-mci.c | 39 +++++++++++++++++++++++++++++- include/linux/atmel-mci.h | 46 ------------------------------------ 2 files changed, 38 insertions(+), 47 deletions(-) delete mode 100644 include/linux/atmel-mci.h diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c index 892d29fed9ec..6f815818dd22 100644 --- a/drivers/mmc/host/atmel-mci.c +++ b/drivers/mmc/host/atmel-mci.c @@ -29,7 +29,6 @@ #include #include -#include #include #include #include @@ -39,6 +38,8 @@ #include #include +#define ATMCI_MAX_NR_SLOTS 2 + /* * Superset of MCI IP registers integrated in Atmel AT91 Processor * Registers and bitfields marked with [2] are only available in MCI2 @@ -200,6 +201,42 @@ enum atmci_pdc_buf { PDC_SECOND_BUF, }; +/** + * struct mci_slot_pdata - board-specific per-slot configuration + * @bus_width: Number of data lines wired up the slot + * @detect_pin: GPIO pin wired to the card detect switch + * @wp_pin: GPIO pin wired to the write protect sensor + * @detect_is_active_high: The state of the detect pin when it is active + * @non_removable: The slot is not removable, only detect once + * + * If a given slot is not present on the board, @bus_width should be + * set to 0. The other fields are ignored in this case. + * + * Any pins that aren't available should be set to a negative value. + * + * Note that support for multiple slots is experimental -- some cards + * might get upset if we don't get the clock management exactly right. + * But in most cases, it should work just fine. + */ +struct mci_slot_pdata { + unsigned int bus_width; + struct gpio_desc *detect_pin; + struct gpio_desc *wp_pin; + bool detect_is_active_high; + bool non_removable; +}; + +/** + * struct mci_platform_data - board-specific MMC/SDcard configuration + * @dma_slave: DMA slave interface to use in data transfers. + * @slot: Per-slot configuration data. + */ +struct mci_platform_data { + void *dma_slave; + dma_filter_fn dma_filter; + struct mci_slot_pdata slot[ATMCI_MAX_NR_SLOTS]; +}; + struct atmel_mci_caps { bool has_dma_conf_reg; bool has_pdc; diff --git a/include/linux/atmel-mci.h b/include/linux/atmel-mci.h deleted file mode 100644 index 017e7d8f6126..000000000000 --- a/include/linux/atmel-mci.h +++ /dev/null @@ -1,46 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __LINUX_ATMEL_MCI_H -#define __LINUX_ATMEL_MCI_H - -#include -#include - -#define ATMCI_MAX_NR_SLOTS 2 - -/** - * struct mci_slot_pdata - board-specific per-slot configuration - * @bus_width: Number of data lines wired up the slot - * @detect_pin: GPIO pin wired to the card detect switch - * @wp_pin: GPIO pin wired to the write protect sensor - * @detect_is_active_high: The state of the detect pin when it is active - * @non_removable: The slot is not removable, only detect once - * - * If a given slot is not present on the board, @bus_width should be - * set to 0. The other fields are ignored in this case. - * - * Any pins that aren't available should be set to a negative value. - * - * Note that support for multiple slots is experimental -- some cards - * might get upset if we don't get the clock management exactly right. - * But in most cases, it should work just fine. - */ -struct mci_slot_pdata { - unsigned int bus_width; - struct gpio_desc *detect_pin; - struct gpio_desc *wp_pin; - bool detect_is_active_high; - bool non_removable; -}; - -/** - * struct mci_platform_data - board-specific MMC/SDcard configuration - * @dma_slave: DMA slave interface to use in data transfers. - * @slot: Per-slot configuration data. - */ -struct mci_platform_data { - void *dma_slave; - dma_filter_fn dma_filter; - struct mci_slot_pdata slot[ATMCI_MAX_NR_SLOTS]; -}; - -#endif /* __LINUX_ATMEL_MCI_H */ From 98ac9e4fc07f101c435f1ab6b395b6245b096a68 Mon Sep 17 00:00:00 2001 From: Balamanikandan Gunasundar Date: Fri, 25 Aug 2023 15:21:57 +0530 Subject: [PATCH 650/656] mmc: atmel-mci: Move card detect gpio polarity quirk to gpiolib The polarity of the card detection gpio is handled by the "cd-inverted" property in the device tree. Move this inversion logic to gpiolib to avoid reading the gpio raw value. Signed-off-by: Balamanikandan Gunasundar Suggested-by: Linus Walleij Link: https://lore.kernel.org/r/20230825095157.76073-4-balamanikandan.gunasundar@microchip.com Signed-off-by: Ulf Hansson --- drivers/gpio/gpiolib-of.c | 20 ++++++++++++++++++-- drivers/mmc/host/atmel-mci.c | 33 +++++++++++++++------------------ 2 files changed, 33 insertions(+), 20 deletions(-) diff --git a/drivers/gpio/gpiolib-of.c b/drivers/gpio/gpiolib-of.c index 1436cdb5fa26..9694eb5afa21 100644 --- a/drivers/gpio/gpiolib-of.c +++ b/drivers/gpio/gpiolib-of.c @@ -209,6 +209,8 @@ static void of_gpio_set_polarity_by_property(const struct device_node *np, const char *propname, enum of_gpio_flags *flags) { + const struct device_node *np_compat = np; + const struct device_node *np_propname = np; static const struct { const char *compatible; const char *gpio_propname; @@ -252,15 +254,29 @@ static void of_gpio_set_polarity_by_property(const struct device_node *np, #if IS_ENABLED(CONFIG_REGULATOR_GPIO) { "regulator-gpio", "enable-gpio", "enable-active-high" }, { "regulator-gpio", "enable-gpios", "enable-active-high" }, +#endif +#if IS_ENABLED(CONFIG_MMC_ATMELMCI) + { "atmel,hsmci", "cd-gpios", "cd-inverted" }, #endif }; unsigned int i; bool active_high; +#if IS_ENABLED(CONFIG_MMC_ATMELMCI) + /* + * The Atmel HSMCI has compatible property in the parent node and + * gpio property in a child node + */ + if (of_device_is_compatible(np->parent, "atmel,hsmci")) { + np_compat = np->parent; + np_propname = np; + } +#endif + for (i = 0; i < ARRAY_SIZE(gpios); i++) { - if (of_device_is_compatible(np, gpios[i].compatible) && + if (of_device_is_compatible(np_compat, gpios[i].compatible) && !strcmp(propname, gpios[i].gpio_propname)) { - active_high = of_property_read_bool(np, + active_high = of_property_read_bool(np_propname, gpios[i].polarity_propname); of_gpio_quirk_polarity(np, active_high, flags); break; diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c index 6f815818dd22..535783c43105 100644 --- a/drivers/mmc/host/atmel-mci.c +++ b/drivers/mmc/host/atmel-mci.c @@ -206,7 +206,6 @@ enum atmci_pdc_buf { * @bus_width: Number of data lines wired up the slot * @detect_pin: GPIO pin wired to the card detect switch * @wp_pin: GPIO pin wired to the write protect sensor - * @detect_is_active_high: The state of the detect pin when it is active * @non_removable: The slot is not removable, only detect once * * If a given slot is not present on the board, @bus_width should be @@ -222,7 +221,6 @@ struct mci_slot_pdata { unsigned int bus_width; struct gpio_desc *detect_pin; struct gpio_desc *wp_pin; - bool detect_is_active_high; bool non_removable; }; @@ -405,7 +403,6 @@ struct atmel_mci { * available. * @wp_pin: GPIO pin used for card write protect sending, or negative * if not available. - * @detect_is_active_high: The state of the detect pin when it is active. * @detect_timer: Timer used for debouncing @detect_pin interrupts. */ struct atmel_mci_slot { @@ -426,7 +423,6 @@ struct atmel_mci_slot { struct gpio_desc *detect_pin; struct gpio_desc *wp_pin; - bool detect_is_active_high; struct timer_list detect_timer; }; @@ -644,6 +640,7 @@ atmci_of_init(struct platform_device *pdev) struct device_node *cnp; struct mci_platform_data *pdata; u32 slot_id; + int err; if (!np) { dev_err(&pdev->dev, "device node not found\n"); @@ -675,11 +672,12 @@ atmci_of_init(struct platform_device *pdev) pdata->slot[slot_id].detect_pin = devm_fwnode_gpiod_get(&pdev->dev, of_fwnode_handle(cnp), "cd", GPIOD_IN, "cd-gpios"); - if (IS_ERR(pdata->slot[slot_id].detect_pin)) + err = PTR_ERR_OR_ZERO(pdata->slot[slot_id].detect_pin); + if (err) { + if (err != -ENOENT) + return ERR_PTR(err); pdata->slot[slot_id].detect_pin = NULL; - - pdata->slot[slot_id].detect_is_active_high = - of_property_read_bool(cnp, "cd-inverted"); + } pdata->slot[slot_id].non_removable = of_property_read_bool(cnp, "non-removable"); @@ -687,8 +685,12 @@ atmci_of_init(struct platform_device *pdev) pdata->slot[slot_id].wp_pin = devm_fwnode_gpiod_get(&pdev->dev, of_fwnode_handle(cnp), "wp", GPIOD_IN, "wp-gpios"); - if (IS_ERR(pdata->slot[slot_id].wp_pin)) + err = PTR_ERR_OR_ZERO(pdata->slot[slot_id].wp_pin); + if (err) { + if (err != -ENOENT) + return ERR_PTR(err); pdata->slot[slot_id].wp_pin = NULL; + } } return pdata; @@ -1566,8 +1568,7 @@ static int atmci_get_cd(struct mmc_host *mmc) struct atmel_mci_slot *slot = mmc_priv(mmc); if (slot->detect_pin) { - present = !(gpiod_get_raw_value(slot->detect_pin) ^ - slot->detect_is_active_high); + present = gpiod_get_value_cansleep(slot->detect_pin); dev_dbg(&mmc->class_dev, "card is %spresent\n", present ? "" : "not "); } @@ -1680,8 +1681,7 @@ static void atmci_detect_change(struct timer_list *t) return; enable_irq(gpiod_to_irq(slot->detect_pin)); - present = !(gpiod_get_raw_value(slot->detect_pin) ^ - slot->detect_is_active_high); + present = gpiod_get_value_cansleep(slot->detect_pin); present_old = test_bit(ATMCI_CARD_PRESENT, &slot->flags); dev_vdbg(&slot->mmc->class_dev, "detect change: %d (was %d)\n", @@ -2272,7 +2272,6 @@ static int atmci_init_slot(struct atmel_mci *host, slot->host = host; slot->detect_pin = slot_data->detect_pin; slot->wp_pin = slot_data->wp_pin; - slot->detect_is_active_high = slot_data->detect_is_active_high; slot->sdc_reg = sdc_reg; slot->sdio_irq = sdio_irq; @@ -2280,7 +2279,7 @@ static int atmci_init_slot(struct atmel_mci *host, "slot[%u]: bus_width=%u, detect_pin=%d, " "detect_is_active_high=%s, wp_pin=%d\n", id, slot_data->bus_width, desc_to_gpio(slot_data->detect_pin), - slot_data->detect_is_active_high ? "true" : "false", + !gpiod_is_active_low(slot_data->detect_pin) ? "true" : "false", desc_to_gpio(slot_data->wp_pin)); mmc->ops = &atmci_ops; @@ -2318,10 +2317,8 @@ static int atmci_init_slot(struct atmel_mci *host, /* Assume card is present initially */ set_bit(ATMCI_CARD_PRESENT, &slot->flags); if (slot->detect_pin) { - if (gpiod_get_raw_value(slot->detect_pin) ^ - slot->detect_is_active_high) { + if (!gpiod_get_value_cansleep(slot->detect_pin)) clear_bit(ATMCI_CARD_PRESENT, &slot->flags); - } } else { dev_dbg(&mmc->class_dev, "no detect pin available\n"); } From 70332ec735202ceb874407be29f68919ab898dce Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= Date: Thu, 24 Aug 2023 16:28:23 +0300 Subject: [PATCH 651/656] hwmon: (via686a) Do PCI error checks on own line MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Instead of if conditions with line splits, use the usual error handling pattern with a separate variable to improve readability. No functional changes intended. Signed-off-by: Ilpo Järvinen Link: https://lore.kernel.org/r/20230824132832.78705-6-ilpo.jarvinen@linux.intel.com Signed-off-by: Guenter Roeck --- drivers/hwmon/via686a.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/hwmon/via686a.c b/drivers/hwmon/via686a.c index 37d7374896f6..407933d6e425 100644 --- a/drivers/hwmon/via686a.c +++ b/drivers/hwmon/via686a.c @@ -855,16 +855,17 @@ static int via686a_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) { u16 address, val; + int ret; if (force_addr) { address = force_addr & ~(VIA686A_EXTENT - 1); dev_warn(&dev->dev, "Forcing ISA address 0x%x\n", address); - if (PCIBIOS_SUCCESSFUL != - pci_write_config_word(dev, VIA686A_BASE_REG, address | 1)) + ret = pci_write_config_word(dev, VIA686A_BASE_REG, address | 1); + if (ret != PCIBIOS_SUCCESSFUL) return -ENODEV; } - if (PCIBIOS_SUCCESSFUL != - pci_read_config_word(dev, VIA686A_BASE_REG, &val)) + ret = pci_read_config_word(dev, VIA686A_BASE_REG, &val); + if (ret != PCIBIOS_SUCCESSFUL) return -ENODEV; address = val & ~(VIA686A_EXTENT - 1); @@ -874,8 +875,8 @@ static int via686a_pci_probe(struct pci_dev *dev, return -ENODEV; } - if (PCIBIOS_SUCCESSFUL != - pci_read_config_word(dev, VIA686A_ENABLE_REG, &val)) + ret = pci_read_config_word(dev, VIA686A_ENABLE_REG, &val); + if (ret != PCIBIOS_SUCCESSFUL) return -ENODEV; if (!(val & 0x0001)) { if (!force_addr) { @@ -886,9 +887,8 @@ static int via686a_pci_probe(struct pci_dev *dev, } dev_warn(&dev->dev, "Enabling sensors\n"); - if (PCIBIOS_SUCCESSFUL != - pci_write_config_word(dev, VIA686A_ENABLE_REG, - val | 0x0001)) + ret = pci_write_config_word(dev, VIA686A_ENABLE_REG, val | 0x1); + if (ret != PCIBIOS_SUCCESSFUL) return -ENODEV; } From 1e3c3a7989495512f2b180adb4f22d500cb79960 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= Date: Thu, 24 Aug 2023 16:28:24 +0300 Subject: [PATCH 652/656] hwmon: (vt8231) Do PCI error checks on own line MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Instead of if conditions with line splits, use the usual error handling pattern with a separate variable to improve readability. No functional changes intended. Signed-off-by: Ilpo Järvinen Link: https://lore.kernel.org/r/20230824132832.78705-7-ilpo.jarvinen@linux.intel.com Signed-off-by: Guenter Roeck --- drivers/hwmon/vt8231.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/hwmon/vt8231.c b/drivers/hwmon/vt8231.c index b7c6392ba673..16bc16d33cd1 100644 --- a/drivers/hwmon/vt8231.c +++ b/drivers/hwmon/vt8231.c @@ -971,13 +971,15 @@ static int vt8231_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) { u16 address, val; + int ret; + if (force_addr) { address = force_addr & 0xff00; dev_warn(&dev->dev, "Forcing ISA address 0x%x\n", address); - if (PCIBIOS_SUCCESSFUL != - pci_write_config_word(dev, VT8231_BASE_REG, address | 1)) + ret = pci_write_config_word(dev, VT8231_BASE_REG, address | 1); + if (ret != PCIBIOS_SUCCESSFUL) return -ENODEV; } @@ -997,9 +999,8 @@ static int vt8231_pci_probe(struct pci_dev *dev, if (!(val & 0x0001)) { dev_warn(&dev->dev, "enabling sensors\n"); - if (PCIBIOS_SUCCESSFUL != - pci_write_config_word(dev, VT8231_ENABLE_REG, - val | 0x0001)) + ret = pci_write_config_word(dev, VT8231_ENABLE_REG, val | 0x1); + if (ret != PCIBIOS_SUCCESSFUL) return -ENODEV; } From a1f38987dd1cd2fce4a6a00fc7377c3d556a240f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= Date: Thu, 24 Aug 2023 16:28:31 +0300 Subject: [PATCH 653/656] hwmon: (sis5595) Do PCI error checks on own line MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Instead of if conditions with line splits, use the usual error handling pattern with a separate variable to improve readability. Handle error print with a label instead of trying to chain everything into a single if condition. No functional changes intended. Signed-off-by: Ilpo Järvinen Link: https://lore.kernel.org/r/20230824132832.78705-14-ilpo.jarvinen@linux.intel.com Signed-off-by: Guenter Roeck --- drivers/hwmon/sis5595.c | 35 ++++++++++++++++++++--------------- 1 file changed, 20 insertions(+), 15 deletions(-) diff --git a/drivers/hwmon/sis5595.c b/drivers/hwmon/sis5595.c index b0b05fd12221..0a0479501e11 100644 --- a/drivers/hwmon/sis5595.c +++ b/drivers/hwmon/sis5595.c @@ -798,7 +798,7 @@ static int sis5595_pci_probe(struct pci_dev *dev, { u16 address; u8 enable; - int *i; + int *i, err; for (i = blacklist; *i != 0; i++) { struct pci_dev *d; @@ -818,8 +818,8 @@ static int sis5595_pci_probe(struct pci_dev *dev, pci_write_config_word(dev, SIS5595_BASE_REG, force_addr); } - if (PCIBIOS_SUCCESSFUL != - pci_read_config_word(dev, SIS5595_BASE_REG, &address)) { + err = pci_read_config_word(dev, SIS5595_BASE_REG, &address); + if (err != PCIBIOS_SUCCESSFUL) { dev_err(&dev->dev, "Failed to read ISA address\n"); return -ENODEV; } @@ -836,22 +836,23 @@ static int sis5595_pci_probe(struct pci_dev *dev, return -ENODEV; } - if (PCIBIOS_SUCCESSFUL != - pci_read_config_byte(dev, SIS5595_ENABLE_REG, &enable)) { + err = pci_read_config_byte(dev, SIS5595_ENABLE_REG, &enable); + if (err != PCIBIOS_SUCCESSFUL) { dev_err(&dev->dev, "Failed to read enable register\n"); return -ENODEV; } if (!(enable & 0x80)) { - if ((PCIBIOS_SUCCESSFUL != - pci_write_config_byte(dev, SIS5595_ENABLE_REG, - enable | 0x80)) - || (PCIBIOS_SUCCESSFUL != - pci_read_config_byte(dev, SIS5595_ENABLE_REG, &enable)) - || (!(enable & 0x80))) { - /* doesn't work for some chips! */ - dev_err(&dev->dev, "Failed to enable HWM device\n"); - return -ENODEV; - } + err = pci_write_config_byte(dev, SIS5595_ENABLE_REG, enable | 0x80); + if (err != PCIBIOS_SUCCESSFUL) + goto enable_fail; + + err = pci_read_config_byte(dev, SIS5595_ENABLE_REG, &enable); + if (err != PCIBIOS_SUCCESSFUL) + goto enable_fail; + + /* doesn't work for some chips! */ + if (!(enable & 0x80)) + goto enable_fail; } if (platform_driver_register(&sis5595_driver)) { @@ -871,6 +872,10 @@ static int sis5595_pci_probe(struct pci_dev *dev, */ return -ENODEV; +enable_fail: + dev_err(&dev->dev, "Failed to enable HWM device\n"); + goto exit; + exit_unregister: pci_dev_put(dev); platform_driver_unregister(&sis5595_driver); From dadca53dd948f70dbfd9af90aff72ebd27d3fc53 Mon Sep 17 00:00:00 2001 From: Vadim Pasternak Date: Thu, 24 Aug 2023 16:40:06 +0000 Subject: [PATCH 654/656] hwmon: (mlxreg-fan) Extend number of supported fans Some new big modular systems can be equipped with up to 24 fans. Extend maximum number of fans accordingly. Signed-off-by: Vadim Pasternak Link: https://lore.kernel.org/r/20230824164006.26868-1-vadimp@nvidia.com Signed-off-by: Guenter Roeck --- drivers/hwmon/mlxreg-fan.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/hwmon/mlxreg-fan.c b/drivers/hwmon/mlxreg-fan.c index c2a96468c9b4..a5f89aab3fb4 100644 --- a/drivers/hwmon/mlxreg-fan.c +++ b/drivers/hwmon/mlxreg-fan.c @@ -12,7 +12,7 @@ #include #include -#define MLXREG_FAN_MAX_TACHO 14 +#define MLXREG_FAN_MAX_TACHO 24 #define MLXREG_FAN_MAX_PWM 4 #define MLXREG_FAN_PWM_NOT_CONNECTED 0xff #define MLXREG_FAN_MAX_STATE 10 @@ -300,6 +300,16 @@ static const struct hwmon_channel_info * const mlxreg_fan_hwmon_info[] = { HWMON_F_INPUT | HWMON_F_FAULT, HWMON_F_INPUT | HWMON_F_FAULT, HWMON_F_INPUT | HWMON_F_FAULT, + HWMON_F_INPUT | HWMON_F_FAULT, + HWMON_F_INPUT | HWMON_F_FAULT, + HWMON_F_INPUT | HWMON_F_FAULT, + HWMON_F_INPUT | HWMON_F_FAULT, + HWMON_F_INPUT | HWMON_F_FAULT, + HWMON_F_INPUT | HWMON_F_FAULT, + HWMON_F_INPUT | HWMON_F_FAULT, + HWMON_F_INPUT | HWMON_F_FAULT, + HWMON_F_INPUT | HWMON_F_FAULT, + HWMON_F_INPUT | HWMON_F_FAULT, HWMON_F_INPUT | HWMON_F_FAULT), HWMON_CHANNEL_INFO(pwm, HWMON_PWM_INPUT, From d103337e38e7e64c3d915029e947b1cb0b512737 Mon Sep 17 00:00:00 2001 From: Biju Das Date: Thu, 24 Aug 2023 21:44:54 +0100 Subject: [PATCH 655/656] hwmon: (tmp513) Fix the channel number in tmp51x_is_visible() The supported channels for this driver are {0..3}. Fix the incorrect channel in tmp51x_is_visible(). Reported-by: Guenter Roeck Closes: https://lore.kernel.org/all/ea0eccc0-a29f-41e4-9049-a1a13f8b16f1@roeck-us.net/ Fixes: 59dfa75e5d82 ("hwmon: Add driver for Texas Instruments TMP512/513 sensor chips.") Signed-off-by: Biju Das Link: https://lore.kernel.org/r/20230824204456.401580-2-biju.das.jz@bp.renesas.com Signed-off-by: Guenter Roeck --- drivers/hwmon/tmp513.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/hwmon/tmp513.c b/drivers/hwmon/tmp513.c index 7db5d0fc24a4..8ee6e02b02e3 100644 --- a/drivers/hwmon/tmp513.c +++ b/drivers/hwmon/tmp513.c @@ -434,7 +434,7 @@ static umode_t tmp51x_is_visible(const void *_data, switch (type) { case hwmon_temp: - if (data->id == tmp512 && channel == 4) + if (data->id == tmp512 && channel == 3) return 0; switch (attr) { case hwmon_temp_input: From 919a83d020a8dfa1411c1dc1cff23a833f0f5268 Mon Sep 17 00:00:00 2001 From: Biju Das Date: Thu, 24 Aug 2023 21:44:55 +0100 Subject: [PATCH 656/656] hwmon: (tmp513) Simplify probe() Simpilfy probe() by replacing device_get_match_data() and id lookup for retrieving match data by i2c_get_match_data(). Signed-off-by: Biju Das Link: https://lore.kernel.org/r/20230824204456.401580-3-biju.das.jz@bp.renesas.com Signed-off-by: Guenter Roeck --- drivers/hwmon/tmp513.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/hwmon/tmp513.c b/drivers/hwmon/tmp513.c index 8ee6e02b02e3..9a180b1030c9 100644 --- a/drivers/hwmon/tmp513.c +++ b/drivers/hwmon/tmp513.c @@ -720,10 +720,7 @@ static int tmp51x_probe(struct i2c_client *client) if (!data) return -ENOMEM; - if (client->dev.of_node) - data->id = (uintptr_t)device_get_match_data(&client->dev); - else - data->id = i2c_match_id(tmp51x_id, client)->driver_data; + data->id = (uintptr_t)i2c_get_match_data(client); ret = tmp51x_configure(dev, data); if (ret < 0) {