diff --git a/CREDITS b/CREDITS index 8b4882024635..f33a33fd2371 100644 --- a/CREDITS +++ b/CREDITS @@ -666,11 +666,6 @@ S: Tamsui town, Taipei county, S: Taiwan 251 S: Republic of China -N: Reinette Chatre -E: reinette.chatre@intel.com -D: WiMedia Link Protocol implementation -D: UWB stack bits and pieces - N: Michael Elizabeth Chastain E: mec@shout.net D: Configure, Menuconfig, xconfig @@ -3023,12 +3018,6 @@ S: Demonstratsii 8-382 S: Tula 300000 S: Russia -N: Inaky Perez-Gonzalez -E: inaky.perez-gonzalez@intel.com -D: UWB stack, HWA-RC driver and HWA-HC drivers -D: Wireless USB additions to the USB stack -D: WiMedia Link Protocol bits and pieces - N: Gordon Peters E: GordPeters@smarttech.com D: Isochronous receive for IEEE 1394 driver (OHCI module). diff --git a/Documentation/ABI/stable/sysfs-bus-mhi b/Documentation/ABI/stable/sysfs-bus-mhi index 96ccc3385a2b..1a47f9e0cc84 100644 --- a/Documentation/ABI/stable/sysfs-bus-mhi +++ b/Documentation/ABI/stable/sysfs-bus-mhi @@ -1,7 +1,7 @@ What: /sys/bus/mhi/devices/.../serialnumber Date: Sept 2020 KernelVersion: 5.10 -Contact: Bhaumik Bhatt +Contact: mhi@lists.linux.dev Description: The file holds the serial number of the client device obtained using a BHI (Boot Host Interface) register read after at least one attempt to power up the device has been done. If read @@ -12,7 +12,7 @@ Users: Any userspace application or clients interested in device info. What: /sys/bus/mhi/devices/.../oem_pk_hash Date: Sept 2020 KernelVersion: 5.10 -Contact: Bhaumik Bhatt +Contact: mhi@lists.linux.dev Description: The file holds the OEM PK Hash value of the endpoint device obtained using a BHI (Boot Host Interface) register read after at least one attempt to power up the device has been done. If diff --git a/Documentation/ABI/testing/configfs-usb-gadget-midi2 b/Documentation/ABI/testing/configfs-usb-gadget-midi2 new file mode 100644 index 000000000000..0eac3aaba137 --- /dev/null +++ b/Documentation/ABI/testing/configfs-usb-gadget-midi2 @@ -0,0 +1,54 @@ +What: /config/usb-gadget/gadget/functions/midi2.name +Date: Jul 2023 +KernelVersion: 6.6 +Description: + The attributes: + + ============ =============================================== + process_ump Flag to process UMP Stream messages (0 or 1) + static_block Flag for static blocks (0 or 1) + iface_name MIDI interface name string + ============ =============================================== + +What: /config/usb-gadget/gadget/functions/midi2.name/ep.number +Date: Jul 2023 +KernelVersion: 6.6 +Description: + This group contains a UMP Endpoint configuration. + A new Endpoint starts from 0, and can be up to 3. + + The attributes: + + ============= =============================================== + protocol_caps MIDI protocol capabilities (1, 2 or 3 for both) + protocol Default MIDI protocol (1 or 2) + ep_name UMP Endpoint name string + product_id Product ID string + manufacturer Manufacture ID (24 bit) + family Device family ID (16 bit) + model Device model ID (16 bit) + sw_revision Software Revision (32 bit) + ============= =============================================== + +What: /config/usb-gadget/gadget/functions/midi2.name/ep.number/block.number +Date: Jul 2023 +KernelVersion: 6.6 +Description: + This group contains a UMP Function Block configuration. + A new block starts from 0, and can be up to 31. + + The attributes: + + ================= ============================================== + name Function Block name string + direction 1: input, 2: output, 3: bidirectional + first_group The first UMP Group number (0-15) + num_groups The number of groups in this FB (1-16) + midi1_first_group The first UMP Group number for MIDI 1.0 (0-15) + midi1_num_groups The number of groups for MIDI 1.0 (0-16) + ui_hint 0: unknown, 1: receiver, 2: sender, 3: both + midi_ci_verison Supported MIDI-CI version number (8 bit) + is_midi1 Legacy MIDI 1.0 device (0, 1 or 2) + sysex8_streams Max number of SysEx8 streams (8 bit) + active Active FB flag (0 or 1) + ================= ============================================== diff --git a/Documentation/ABI/testing/sysfs-bus-counter b/Documentation/ABI/testing/sysfs-bus-counter index dc3b3a5c876b..73ac84c0bca7 100644 --- a/Documentation/ABI/testing/sysfs-bus-counter +++ b/Documentation/ABI/testing/sysfs-bus-counter @@ -22,11 +22,11 @@ Description: phase clock. What: /sys/bus/counter/devices/counterX/external_input_phase_clock_select_available -KernelVersion: 6.4 -Contact: linux-iio@vger.kernel.org +KernelVersion: 6.4 +Contact: linux-iio@vger.kernel.org Description: - Discrete set of available values for the respective device - configuration are listed in this file. + Discrete set of available values for the respective device + configuration are listed in this file. What: /sys/bus/counter/devices/counterX/countY/count KernelVersion: 5.2 diff --git a/Documentation/ABI/testing/sysfs-bus-fsi-devices-sbefifo b/Documentation/ABI/testing/sysfs-bus-fsi-devices-sbefifo index 1329b0bb2882..c7393b4dd2d8 100644 --- a/Documentation/ABI/testing/sysfs-bus-fsi-devices-sbefifo +++ b/Documentation/ABI/testing/sysfs-bus-fsi-devices-sbefifo @@ -7,4 +7,4 @@ Description: by the driver. A value of 1 indicates that a timeout has occurred and no transfers have completed since the timeout. A value of 0 indicates that no timeout has occurred, or if one - has, more recent transfers have completed successful. + has, more recent transfers have completed successfully. diff --git a/Documentation/ABI/testing/sysfs-bus-iio b/Documentation/ABI/testing/sysfs-bus-iio index 7140e8e7313f..a2854dc9a839 100644 --- a/Documentation/ABI/testing/sysfs-bus-iio +++ b/Documentation/ABI/testing/sysfs-bus-iio @@ -2163,3 +2163,19 @@ Contact: linux-iio@vger.kernel.org Description: An example format is 16-bytes, 2-digits-per-byte, HEX-string representing the sensor unique ID number. + +What: /sys/.../events/in_proximity_thresh_either_runningperiod +KernelVersion: 6.6 +Contact: linux-iio@vger.kernel.org +Description: + A running period of time (in seconds) for which + in_proximity_thresh_either_runningcount amount of conditions + must occur before an event is generated. If direction is not + specified then this period applies to both directions. + +What: /sys/.../events/in_proximity_thresh_either_runningcount +KernelVersion: 6.6 +Contact: linux-iio@vger.kernel.org +Description: + Number of conditions that must occur, during a running + period, before an event is generated. diff --git a/Documentation/ABI/testing/sysfs-bus-iio-filter-admv8818 b/Documentation/ABI/testing/sysfs-bus-iio-filter-admv8818 index f6c035752639..31dbb390573f 100644 --- a/Documentation/ABI/testing/sysfs-bus-iio-filter-admv8818 +++ b/Documentation/ABI/testing/sysfs-bus-iio-filter-admv8818 @@ -7,6 +7,8 @@ Description: - auto -> Adjust bandpass filter to track changes in input clock rate. - manual -> disable/unregister the clock rate notifier / input clock tracking. + - bypass -> bypass low pass filter, high pass filter and disable/unregister + the clock rate notifier What: /sys/bus/iio/devices/iio:deviceX/filter_mode KernelVersion: diff --git a/Documentation/ABI/testing/sysfs-bus-thunderbolt b/Documentation/ABI/testing/sysfs-bus-thunderbolt index 76ab3e1fe374..221b6c75ed93 100644 --- a/Documentation/ABI/testing/sysfs-bus-thunderbolt +++ b/Documentation/ABI/testing/sysfs-bus-thunderbolt @@ -1,7 +1,7 @@ What: /sys/bus/thunderbolt/devices/.../domainX/boot_acl Date: Jun 2018 KernelVersion: 4.17 -Contact: thunderbolt-software@lists.01.org +Contact: Mika Westerberg Description: Holds a comma separated list of device unique_ids that are allowed to be connected automatically during system startup (e.g boot devices). The list always contains @@ -33,7 +33,7 @@ Description: This attribute tells whether the system supports What: /sys/bus/thunderbolt/devices/.../domainX/iommu_dma_protection Date: Mar 2019 KernelVersion: 4.21 -Contact: thunderbolt-software@lists.01.org +Contact: Mika Westerberg Description: This attribute tells whether the system uses IOMMU for DMA protection. Value of 1 means IOMMU is used 0 means it is not (DMA protection is solely based on Thunderbolt @@ -42,7 +42,7 @@ Description: This attribute tells whether the system uses IOMMU What: /sys/bus/thunderbolt/devices/.../domainX/security Date: Sep 2017 KernelVersion: 4.13 -Contact: thunderbolt-software@lists.01.org +Contact: Mika Westerberg Description: This attribute holds current Thunderbolt security level set by the system BIOS. Possible values are: @@ -64,7 +64,7 @@ Description: This attribute holds current Thunderbolt security level What: /sys/bus/thunderbolt/devices/.../authorized Date: Sep 2017 KernelVersion: 4.13 -Contact: thunderbolt-software@lists.01.org +Contact: Mika Westerberg Description: This attribute is used to authorize Thunderbolt devices after they have been connected. If the device is not authorized, no PCIe devices are available to the system. @@ -98,7 +98,7 @@ Description: This attribute is used to authorize Thunderbolt devices What: /sys/bus/thunderbolt/devices/.../boot Date: Jun 2018 KernelVersion: 4.17 -Contact: thunderbolt-software@lists.01.org +Contact: Mika Westerberg Description: This attribute contains 1 if Thunderbolt device was already authorized on boot and 0 otherwise. @@ -113,7 +113,7 @@ Description: This attribute contains the generation of the Thunderbolt What: /sys/bus/thunderbolt/devices/.../key Date: Sep 2017 KernelVersion: 4.13 -Contact: thunderbolt-software@lists.01.org +Contact: Mika Westerberg Description: When a devices supports Thunderbolt secure connect it will have this attribute. Writing 32 byte hex string changes authorization to use the secure connection method instead. @@ -123,14 +123,14 @@ Description: When a devices supports Thunderbolt secure connect it will What: /sys/bus/thunderbolt/devices/.../device Date: Sep 2017 KernelVersion: 4.13 -Contact: thunderbolt-software@lists.01.org +Contact: Mika Westerberg Description: This attribute contains id of this device extracted from the device DROM. What: /sys/bus/thunderbolt/devices/.../device_name Date: Sep 2017 KernelVersion: 4.13 -Contact: thunderbolt-software@lists.01.org +Contact: Mika Westerberg Description: This attribute contains name of this device extracted from the device DROM. @@ -172,21 +172,21 @@ Description: This attribute reports number of TX lanes the device is What: /sys/bus/thunderbolt/devices/.../vendor Date: Sep 2017 KernelVersion: 4.13 -Contact: thunderbolt-software@lists.01.org +Contact: Mika Westerberg Description: This attribute contains vendor id of this device extracted from the device DROM. What: /sys/bus/thunderbolt/devices/.../vendor_name Date: Sep 2017 KernelVersion: 4.13 -Contact: thunderbolt-software@lists.01.org +Contact: Mika Westerberg Description: This attribute contains vendor name of this device extracted from the device DROM. What: /sys/bus/thunderbolt/devices/.../unique_id Date: Sep 2017 KernelVersion: 4.13 -Contact: thunderbolt-software@lists.01.org +Contact: Mika Westerberg Description: This attribute contains unique_id string of this device. This is either read from hardware registers (UUID on newer hardware) or based on UID from the device DROM. @@ -195,7 +195,7 @@ Description: This attribute contains unique_id string of this device. What: /sys/bus/thunderbolt/devices/.../nvm_version Date: Sep 2017 KernelVersion: 4.13 -Contact: thunderbolt-software@lists.01.org +Contact: Mika Westerberg Description: If the device has upgradeable firmware the version number is available here. Format: %x.%x, major.minor. If the device is in safe mode reading the file returns @@ -204,7 +204,7 @@ Description: If the device has upgradeable firmware the version What: /sys/bus/thunderbolt/devices/.../nvm_authenticate Date: Sep 2017 KernelVersion: 4.13 -Contact: thunderbolt-software@lists.01.org +Contact: Mika Westerberg Description: When new NVM image is written to the non-active NVM area (through non_activeX NVMem device), the authentication procedure is started by writing to @@ -246,7 +246,7 @@ Description: For supported devices, automatically authenticate the new Thunderbo What: /sys/bus/thunderbolt/devices/./key Date: Jan 2018 KernelVersion: 4.15 -Contact: thunderbolt-software@lists.01.org +Contact: Mika Westerberg Description: This contains name of the property directory the XDomain service exposes. This entry describes the protocol in question. Following directories are already reserved by @@ -261,35 +261,35 @@ Description: This contains name of the property directory the XDomain What: /sys/bus/thunderbolt/devices/./modalias Date: Jan 2018 KernelVersion: 4.15 -Contact: thunderbolt-software@lists.01.org +Contact: Mika Westerberg Description: Stores the same MODALIAS value emitted by uevent for the XDomain service. Format: tbtsvc:kSpNvNrN What: /sys/bus/thunderbolt/devices/./prtcid Date: Jan 2018 KernelVersion: 4.15 -Contact: thunderbolt-software@lists.01.org +Contact: Mika Westerberg Description: This contains XDomain protocol identifier the XDomain service supports. What: /sys/bus/thunderbolt/devices/./prtcvers Date: Jan 2018 KernelVersion: 4.15 -Contact: thunderbolt-software@lists.01.org +Contact: Mika Westerberg Description: This contains XDomain protocol version the XDomain service supports. What: /sys/bus/thunderbolt/devices/./prtcrevs Date: Jan 2018 KernelVersion: 4.15 -Contact: thunderbolt-software@lists.01.org +Contact: Mika Westerberg Description: This contains XDomain software version the XDomain service supports. What: /sys/bus/thunderbolt/devices/./prtcstns Date: Jan 2018 KernelVersion: 4.15 -Contact: thunderbolt-software@lists.01.org +Contact: Mika Westerberg Description: This contains XDomain service specific settings as bitmask. Format: %x diff --git a/Documentation/ABI/testing/sysfs-bus-umc b/Documentation/ABI/testing/sysfs-bus-umc deleted file mode 100644 index 80ef88bc5097..000000000000 --- a/Documentation/ABI/testing/sysfs-bus-umc +++ /dev/null @@ -1,28 +0,0 @@ -What: /sys/bus/umc/ -Date: July 2008 -KernelVersion: 2.6.27 -Contact: David Vrabel -Description: - The Wireless Host Controller Interface (WHCI) - specification describes a PCI-based device with - multiple capabilities; the UWB Multi-interface - Controller (UMC). - - The umc bus presents each of the individual - capabilities as a device. - -What: /sys/bus/umc/devices/.../capability_id -Date: July 2008 -KernelVersion: 2.6.27 -Contact: David Vrabel -Description: - The ID of this capability, with 0 being the radio - controller capability. - -What: /sys/bus/umc/devices/.../version -Date: July 2008 -KernelVersion: 2.6.27 -Contact: David Vrabel -Description: - The specification version this capability's hardware - interface complies with. diff --git a/Documentation/ABI/testing/sysfs-bus-usb b/Documentation/ABI/testing/sysfs-bus-usb index be663258b9b7..a44bfe020061 100644 --- a/Documentation/ABI/testing/sysfs-bus-usb +++ b/Documentation/ABI/testing/sysfs-bus-usb @@ -28,40 +28,6 @@ Description: drivers, non-authorized one are not. By default, wired USB devices are authorized. - Certified Wireless USB devices are not authorized - initially and should be (by writing 1) after the - device has been authenticated. - -What: /sys/bus/usb/device/.../wusb_cdid -Date: July 2008 -KernelVersion: 2.6.27 -Contact: David Vrabel -Description: - For Certified Wireless USB devices only. - - A devices's CDID, as 16 space-separated hex octets. - -What: /sys/bus/usb/device/.../wusb_ck -Date: July 2008 -KernelVersion: 2.6.27 -Contact: David Vrabel -Description: - For Certified Wireless USB devices only. - - Write the device's connection key (CK) to start the - authentication of the device. The CK is 16 - space-separated hex octets. - -What: /sys/bus/usb/device/.../wusb_disconnect -Date: July 2008 -KernelVersion: 2.6.27 -Contact: David Vrabel -Description: - For Certified Wireless USB devices only. - - Write a 1 to force the device to disconnect - (equivalent to unplugging a wired USB device). - What: /sys/bus/usb/drivers/.../new_id Date: October 2011 Contact: linux-usb@vger.kernel.org diff --git a/Documentation/ABI/testing/sysfs-class-uwb_rc b/Documentation/ABI/testing/sysfs-class-uwb_rc deleted file mode 100644 index a7ea169dc4eb..000000000000 --- a/Documentation/ABI/testing/sysfs-class-uwb_rc +++ /dev/null @@ -1,156 +0,0 @@ -What: /sys/class/uwb_rc -Date: July 2008 -KernelVersion: 2.6.27 -Contact: linux-usb@vger.kernel.org -Description: - Interfaces for WiMedia Ultra Wideband Common Radio - Platform (UWB) radio controllers. - - Familiarity with the ECMA-368 'High Rate Ultra - Wideband MAC and PHY Specification' is assumed. - -What: /sys/class/uwb_rc/beacon_timeout_ms -Date: July 2008 -KernelVersion: 2.6.27 -Description: - If no beacons are received from a device for at least - this time, the device will be considered to have gone - and it will be removed. The default is 3 superframes - (~197 ms) as required by the specification. - -What: /sys/class/uwb_rc/uwb/ -Date: July 2008 -KernelVersion: 2.6.27 -Contact: linux-usb@vger.kernel.org -Description: - An individual UWB radio controller. - -What: /sys/class/uwb_rc/uwb/beacon -Date: July 2008 -KernelVersion: 2.6.27 -Contact: linux-usb@vger.kernel.org -Description: - Write: - - - - to force a specific channel to be used when beaconing, - or, if is -1, to prohibit beaconing. If - is 0, then the default channel selection - algorithm will be used. Valid channels depends on the - radio controller's supported band groups. - - Reading returns the currently active channel, or -1 if - the radio controller is not beaconing. - -What: /sys/class/uwb_rc/uwb/ASIE -Date: August 2014 -KernelVersion: 3.18 -Contact: linux-usb@vger.kernel.org -Description: - - The application-specific information element (ASIE) - included in this device's beacon, in space separated - hex octets. - - Reading returns the current ASIE. Writing replaces - the current ASIE with the one written. - -What: /sys/class/uwb_rc/uwb/scan -Date: July 2008 -KernelVersion: 2.6.27 -Contact: linux-usb@vger.kernel.org -Description: - Write: - - [] - - to start (or stop) scanning on a channel. is one of: - - == ======================================= - 0 scan - 1 scan outside BP - 2 scan while inactive - 3 scanning disabled - 4 scan (with start time of ) - == ======================================= - -What: /sys/class/uwb_rc/uwb/mac_address -Date: July 2008 -KernelVersion: 2.6.27 -Contact: linux-usb@vger.kernel.org -Description: - The EUI-48, in colon-separated hex octets, for this - radio controller. A write will change the radio - controller's EUI-48 but only do so while the device is - not beaconing or scanning. - -What: /sys/class/uwb_rc/uwb/wusbhc -Date: July 2008 -KernelVersion: 2.6.27 -Contact: linux-usb@vger.kernel.org -Description: - A symlink to the device (if any) of the WUSB Host - Controller PAL using this radio controller. - -What: /sys/class/uwb_rc/uwb// -Date: July 2008 -KernelVersion: 2.6.27 -Contact: linux-usb@vger.kernel.org -Description: - A neighbour UWB device that has either been detected - as part of a scan or is a member of the radio - controllers beacon group. - -What: /sys/class/uwb_rc/uwb//BPST -Date: July 2008 -KernelVersion: 2.6.27 -Contact: linux-usb@vger.kernel.org -Description: - The time (using the radio controllers internal 1 ms - interval superframe timer) of the last beacon from - this device was received. - -What: /sys/class/uwb_rc/uwb//DevAddr -Date: July 2008 -KernelVersion: 2.6.27 -Contact: linux-usb@vger.kernel.org -Description: - The current DevAddr of this device in colon separated - hex octets. - -What: /sys/class/uwb_rc/uwb//EUI_48 -Date: July 2008 -KernelVersion: 2.6.27 -Contact: linux-usb@vger.kernel.org -Description: - - The EUI-48 of this device in colon separated hex - octets. - -What: /sys/class/uwb_rc/uwb//IEs -Date: July 2008 -KernelVersion: 2.6.27 -Contact: linux-usb@vger.kernel.org -Description: - The latest IEs included in this device's beacon, in - space separated hex octets with one IE per line. - -What: /sys/class/uwb_rc/uwb//LQE -Date: July 2008 -KernelVersion: 2.6.27 -Contact: linux-usb@vger.kernel.org -Description: - Link Quality Estimate - the Signal to Noise Ratio - (SNR) of all packets received from this device in dB. - This gives an estimate on a suitable PHY rate. Refer - to [ECMA-368] section 13.3 for more details. - -What: /sys/class/uwb_rc/uwb//RSSI -Date: July 2008 -KernelVersion: 2.6.27 -Contact: linux-usb@vger.kernel.org -Description: - Received Signal Strength Indication - the strength of - the received signal in dB. LQE is a more useful - measure of the radio link quality. diff --git a/Documentation/ABI/testing/sysfs-class-uwb_rc-wusbhc b/Documentation/ABI/testing/sysfs-class-uwb_rc-wusbhc deleted file mode 100644 index 130ea5189b02..000000000000 --- a/Documentation/ABI/testing/sysfs-class-uwb_rc-wusbhc +++ /dev/null @@ -1,57 +0,0 @@ -What: /sys/class/uwb_rc/uwb/wusbhc/wusb_chid -Date: July 2008 -KernelVersion: 2.6.27 -Contact: David Vrabel -Description: - Write the CHID (16 space-separated hex octets) for this host controller. - This starts the host controller, allowing it to accept connection from - WUSB devices. - - Set an all zero CHID to stop the host controller. - -What: /sys/class/uwb_rc/uwb/wusbhc/wusb_trust_timeout -Date: July 2008 -KernelVersion: 2.6.27 -Contact: David Vrabel -Description: - Devices that haven't sent a WUSB packet to the host - within 'wusb_trust_timeout' ms are considered to have - disconnected and are removed. The default value of - 4000 ms is the value required by the WUSB - specification. - - Since this relates to security (specifically, the - lifetime of PTKs and GTKs) it should not be changed - from the default. - -What: /sys/class/uwb_rc/uwb/wusbhc/wusb_phy_rate -Date: August 2009 -KernelVersion: 2.6.32 -Contact: David Vrabel -Description: - The maximum PHY rate to use for all connected devices. - This is only of limited use for testing and - development as the hardware's automatic rate - adaptation is better then this simple control. - - Refer to [ECMA-368] section 10.3.1.1 for the value to - use. - -What: /sys/class/uwb_rc/uwb/wusbhc/wusb_dnts -Date: June 2013 -KernelVersion: 3.11 -Contact: Thomas Pugliese -Description: - The device notification time slot (DNTS) count and interval in - milliseconds that the WUSB host should use. This controls how - often the devices will have the opportunity to send - notifications to the host. - -What: /sys/class/uwb_rc/uwb/wusbhc/wusb_retry_count -Date: June 2013 -KernelVersion: 3.11 -Contact: Thomas Pugliese -Description: - The number of retries that the WUSB host should attempt - before reporting an error for a bus transaction. The range of - valid values is [0..15], where 0 indicates infinite retries. diff --git a/Documentation/ABI/testing/sysfs-wusb_cbaf b/Documentation/ABI/testing/sysfs-wusb_cbaf deleted file mode 100644 index 2969d3694ec0..000000000000 --- a/Documentation/ABI/testing/sysfs-wusb_cbaf +++ /dev/null @@ -1,101 +0,0 @@ -What: /sys/bus/usb/drivers/wusb_cbaf/.../wusb_* -Date: August 2008 -KernelVersion: 2.6.27 -Contact: David Vrabel -Description: - Various files for managing Cable Based Association of - (wireless) USB devices. - - The sequence of operations should be: - - 1. Device is plugged in. - - 2. The connection manager (CM) sees a device with CBA capability. - (the wusb_chid etc. files in /sys/devices/blah/OURDEVICE). - - 3. The CM writes the host name, supported band groups, - and the CHID (host ID) into the wusb_host_name, - wusb_host_band_groups and wusb_chid files. These - get sent to the device and the CDID (if any) for - this host is requested. - - 4. The CM can verify that the device's supported band - groups (wusb_device_band_groups) are compatible - with the host. - - 5. The CM reads the wusb_cdid file. - - 6. The CM looks it up its database. - - - If it has a matching CHID,CDID entry, the device - has been authorized before and nothing further - needs to be done. - - - If the CDID is zero (or the CM doesn't find a - matching CDID in its database), the device is - assumed to be not known. The CM may associate - the host with device by: writing a randomly - generated CDID to wusb_cdid and then a random CK - to wusb_ck (this uploads the new CC to the - device). - - CMD may choose to prompt the user before - associating with a new device. - - 7. Device is unplugged. - - References: - [WUSB-AM] - Association Models Supplement to the - Certified Wireless Universal Serial Bus - Specification, version 1.0. - -What: /sys/bus/usb/drivers/wusb_cbaf/.../wusb_chid -Date: August 2008 -KernelVersion: 2.6.27 -Contact: David Vrabel -Description: - The CHID of the host formatted as 16 space-separated - hex octets. - - Writes fetches device's supported band groups and the - the CDID for any existing association with this host. - -What: /sys/bus/usb/drivers/wusb_cbaf/.../wusb_host_name -Date: August 2008 -KernelVersion: 2.6.27 -Contact: David Vrabel -Description: - A friendly name for the host as a UTF-8 encoded string. - -What: /sys/bus/usb/drivers/wusb_cbaf/.../wusb_host_band_groups -Date: August 2008 -KernelVersion: 2.6.27 -Contact: David Vrabel -Description: - The band groups supported by the host, in the format - defined in [WUSB-AM]. - -What: /sys/bus/usb/drivers/wusb_cbaf/.../wusb_device_band_groups -Date: August 2008 -KernelVersion: 2.6.27 -Contact: David Vrabel -Description: - The band groups supported by the device, in the format - defined in [WUSB-AM]. - -What: /sys/bus/usb/drivers/wusb_cbaf/.../wusb_cdid -Date: August 2008 -KernelVersion: 2.6.27 -Contact: David Vrabel -Description: - The device's CDID formatted as 16 space-separated hex - octets. - -What: /sys/bus/usb/drivers/wusb_cbaf/.../wusb_ck -Date: August 2008 -KernelVersion: 2.6.27 -Contact: David Vrabel -Description: - Write 16 space-separated random, hex octets to - associate with the device. diff --git a/Documentation/admin-guide/devices.txt b/Documentation/admin-guide/devices.txt index b1b57f638b94..839054923530 100644 --- a/Documentation/admin-guide/devices.txt +++ b/Documentation/admin-guide/devices.txt @@ -2691,18 +2691,9 @@ 45 = /dev/ttyMM1 Marvell MPSC - port 1 (obsolete unused) 46 = /dev/ttyCPM0 PPC CPM (SCC or SMC) - port 0 ... - 49 = /dev/ttyCPM5 PPC CPM (SCC or SMC) - port 3 - 50 = /dev/ttyIOC0 Altix serial card - ... - 81 = /dev/ttyIOC31 Altix serial card + 51 = /dev/ttyCPM5 PPC CPM (SCC or SMC) - port 5 82 = /dev/ttyVR0 NEC VR4100 series SIU 83 = /dev/ttyVR1 NEC VR4100 series DSIU - 84 = /dev/ttyIOC84 Altix ioc4 serial card - ... - 115 = /dev/ttyIOC115 Altix ioc4 serial card - 116 = /dev/ttySIOC0 Altix ioc3 serial card - ... - 147 = /dev/ttySIOC31 Altix ioc3 serial card 148 = /dev/ttyPSC0 PPC PSC - port 0 ... 153 = /dev/ttyPSC5 PPC PSC - port 5 @@ -2761,10 +2752,7 @@ 43 = /dev/ttycusmx2 Callout device for ttySMX2 46 = /dev/cucpm0 Callout device for ttyCPM0 ... - 49 = /dev/cucpm5 Callout device for ttyCPM5 - 50 = /dev/cuioc40 Callout device for ttyIOC40 - ... - 81 = /dev/cuioc431 Callout device for ttyIOC431 + 51 = /dev/cucpm5 Callout device for ttyCPM5 82 = /dev/cuvr0 Callout device for ttyVR0 83 = /dev/cuvr1 Callout device for ttyVR1 diff --git a/Documentation/admin-guide/dynamic-debug-howto.rst b/Documentation/admin-guide/dynamic-debug-howto.rst index 8dc668cc1216..0b3d39c610d9 100644 --- a/Documentation/admin-guide/dynamic-debug-howto.rst +++ b/Documentation/admin-guide/dynamic-debug-howto.rst @@ -216,13 +216,14 @@ The flags are:: t Include thread ID, or m Include module name f Include the function name + s Include the source file name l Include line number For ``print_hex_dump_debug()`` and ``print_hex_dump_bytes()``, only the ``p`` flag has meaning, other flags are ignored. -Note the regexp ``^[-+=][flmpt_]+$`` matches a flags specification. -To clear all flags at once, use ``=_`` or ``-flmpt``. +Note the regexp ``^[-+=][fslmpt_]+$`` matches a flags specification. +To clear all flags at once, use ``=_`` or ``-fslmpt``. Debug messages during Boot Process diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 1db4df9f95bd..e60effbf17e0 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -6723,7 +6723,7 @@ usbcore.authorized_default= [USB] Default USB device authorization: - (default -1 = authorized except for wireless USB, + (default -1 = authorized (same as 1), 0 = not authorized, 1 = authorized, 2 = authorized if device connected to internal port) diff --git a/Documentation/devicetree/bindings/extcon/maxim,max77843.yaml b/Documentation/devicetree/bindings/extcon/maxim,max77843.yaml index 128960545640..55800fb0221d 100644 --- a/Documentation/devicetree/bindings/extcon/maxim,max77843.yaml +++ b/Documentation/devicetree/bindings/extcon/maxim,max77843.yaml @@ -23,6 +23,7 @@ properties: connector: $ref: /schemas/connector/usb-connector.yaml# + unevaluatedProperties: false ports: $ref: /schemas/graph.yaml#/properties/ports diff --git a/Documentation/devicetree/bindings/extcon/siliconmitus,sm5502-muic.yaml b/Documentation/devicetree/bindings/extcon/siliconmitus,sm5502-muic.yaml index 7a224b2f0977..7ef2d9bef72d 100644 --- a/Documentation/devicetree/bindings/extcon/siliconmitus,sm5502-muic.yaml +++ b/Documentation/devicetree/bindings/extcon/siliconmitus,sm5502-muic.yaml @@ -27,6 +27,10 @@ properties: description: I2C slave address of the device. Usually 0x25 for SM5502 and SM5703, 0x14 for SM5504. + connector: + $ref: /schemas/connector/usb-connector.yaml# + unevaluatedProperties: false + interrupts: maxItems: 1 diff --git a/Documentation/devicetree/bindings/fsi/ibm,i2cr-fsi-master.yaml b/Documentation/devicetree/bindings/fsi/ibm,i2cr-fsi-master.yaml new file mode 100644 index 000000000000..442cecdc57cb --- /dev/null +++ b/Documentation/devicetree/bindings/fsi/ibm,i2cr-fsi-master.yaml @@ -0,0 +1,41 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/fsi/ibm,i2cr-fsi-master.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: IBM I2C Responder virtual FSI master + +maintainers: + - Eddie James + +description: | + The I2C Responder (I2CR) is a an I2C device that's connected to an FSI CFAM + (see fsi.txt). The I2CR translates I2C bus operations to FSI CFAM reads and + writes or SCOM operations, thereby acting as an FSI master. + +properties: + compatible: + enum: + - ibm,i2cr-fsi-master + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + i2cr@20 { + compatible = "ibm,i2cr-fsi-master"; + reg = <0x20>; + }; + }; diff --git a/Documentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml b/Documentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml new file mode 100644 index 000000000000..7ef46c90ebc8 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml @@ -0,0 +1,91 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/allwinner,sun20i-d1-gpadc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner D1 General Purpose ADC + +maintainers: + - Maksim Kiselev + +properties: + compatible: + enum: + - allwinner,sun20i-d1-gpadc + + "#io-channel-cells": + const: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + clocks: + maxItems: 1 + + interrupts: + maxItems: 1 + + reg: + maxItems: 1 + + resets: + maxItems: 1 + +patternProperties: + "^channel@[0-9a-f]+$": + $ref: adc.yaml + type: object + description: + Represents the internal channels of the ADC. + + properties: + reg: + items: + minimum: 0 + maximum: 15 + + required: + - reg + + unevaluatedProperties: false + +required: + - "#io-channel-cells" + - clocks + - compatible + - interrupts + - reg + - resets + +additionalProperties: false + +examples: + - | + #include + #include + #include + + gpadc: adc@2009000 { + compatible = "allwinner,sun20i-d1-gpadc"; + reg = <0x2009000 0x400>; + clocks = <&ccu CLK_BUS_GPADC>; + resets = <&ccu RST_BUS_GPADC>; + interrupts = <73 IRQ_TYPE_LEVEL_HIGH>; + #io-channel-cells = <1>; + + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + }; + + channel@1 { + reg = <1>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/adc/ti,ads1015.yaml b/Documentation/devicetree/bindings/iio/adc/ti,ads1015.yaml index 2127d639a768..e004659099c1 100644 --- a/Documentation/devicetree/bindings/iio/adc/ti,ads1015.yaml +++ b/Documentation/devicetree/bindings/iio/adc/ti,ads1015.yaml @@ -78,9 +78,9 @@ patternProperties: ti,datarate: $ref: /schemas/types.yaml#/definitions/uint32 minimum: 0 - maximum: 6 + maximum: 7 description: | - Data acquisition rate in samples per second + Data acquisition rate in samples per second for ADS1015, TLA2024 0: 128 1: 250 2: 490 @@ -88,6 +88,17 @@ patternProperties: 4: 1600 (default) 5: 2400 6: 3300 + 7: 3300 + + Data acquisition rate in samples per second for ADS1115 + 0: 8 + 1: 16 + 2: 32 + 3: 64 + 4: 128 (default) + 5: 250 + 6: 475 + 7: 860 required: - reg diff --git a/Documentation/devicetree/bindings/iio/dac/microchip,mcp4728.yaml b/Documentation/devicetree/bindings/iio/dac/microchip,mcp4728.yaml new file mode 100644 index 000000000000..99831d7f1c16 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/dac/microchip,mcp4728.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- + +$id: http://devicetree.org/schemas/iio/dac/microchip,mcp4728.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip MCP4728 DAC + +maintainers: + - Andrea Collamati + +description: | + MCP4728 is a quad channel, 12-bit voltage output + Digital-to-Analog Converter with non-volatile + memory and I2C compatible Serial Interface. + https://www.microchip.com/en-us/product/mcp4728 + +properties: + compatible: + const: microchip,mcp4728 + + reg: + maxItems: 1 + + vdd-supply: + description: | + Provides both power and acts as the reference supply on the MCP4728 + when Internal Vref is not selected. + +required: + - compatible + - reg + - vdd-supply + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + dac@60 { + compatible = "microchip,mcp4728"; + reg = <0x60>; + vdd-supply = <&vdac_vdd>; + }; + }; diff --git a/Documentation/devicetree/bindings/iio/frequency/adi,admv1013.yaml b/Documentation/devicetree/bindings/iio/frequency/adi,admv1013.yaml index fc813bcb6532..f2eb2287ed9e 100644 --- a/Documentation/devicetree/bindings/iio/frequency/adi,admv1013.yaml +++ b/Documentation/devicetree/bindings/iio/frequency/adi,admv1013.yaml @@ -39,6 +39,46 @@ properties: description: Analog voltage regulator. + vcc-drv-supply: + description: + RF Driver voltage regulator. + + vcc2-drv-supply: + description: + RF predriver voltage regulator. + + vcc-vva-supply: + description: + VVA Control Circuit voltage regulator. + + vcc-amp1-supply: + description: + RF Amplifier 1 voltage regulator. + + vcc-amp2-supply: + description: + RF Amplifier 2 voltage regulator. + + vcc-env-supply: + description: + Envelope Detector voltage regulator. + + vcc-bg-supply: + description: + Mixer Chip Band Gap Circuit voltage regulator. + + vcc-bg2-supply: + description: + VGA Chip Band Gap Circuit voltage regulator. + + vcc-mixer-supply: + description: + Mixer voltage regulator. + + vcc-quad-supply: + description: + Quadruppler voltage regulator. + adi,detector-enable: description: Enable the Envelope Detector available at output pins VENV_P and @@ -69,6 +109,16 @@ required: - clocks - clock-names - vcm-supply + - vcc-drv-supply + - vcc2-drv-supply + - vcc-vva-supply + - vcc-amp1-supply + - vcc-amp2-supply + - vcc-env-supply + - vcc-bg-supply + - vcc-bg2-supply + - vcc-mixer-supply + - vcc-quad-supply allOf: - $ref: /schemas/spi/spi-peripheral-props.yaml# @@ -87,6 +137,16 @@ examples: clocks = <&admv1013_lo>; clock-names = "lo_in"; vcm-supply = <&vcm>; + vcc-drv-supply = <&vcc_drv>; + vcc2-drv-supply = <&vcc2_drv>; + vcc-vva-supply = <&vcc_vva>; + vcc-amp1-supply = <&vcc_amp1>; + vcc-amp2-supply = <&vcc_amp2>; + vcc-env-supply = <&vcc_env>; + vcc-bg-supply = <&vcc_bg>; + vcc-bg2-supply = <&vcc_bg2>; + vcc-mixer-supply = <&vcc_mixer>; + vcc-quad-supply = <&vcc_quad>; adi,quad-se-mode = "diff"; adi,detector-enable; }; diff --git a/Documentation/devicetree/bindings/iio/frequency/adi,admv1014.yaml b/Documentation/devicetree/bindings/iio/frequency/adi,admv1014.yaml index d17601dbc498..39cc63a11762 100644 --- a/Documentation/devicetree/bindings/iio/frequency/adi,admv1014.yaml +++ b/Documentation/devicetree/bindings/iio/frequency/adi,admv1014.yaml @@ -103,6 +103,14 @@ required: - clocks - clock-names - vcm-supply + - vcc-if-bb-supply + - vcc-vga-supply + - vcc-vva-supply + - vcc-lna-3p3-supply + - vcc-lna-1p5-supply + - vcc-bg-supply + - vcc-quad-supply + - vcc-mixer-supply allOf: - $ref: /schemas/spi/spi-peripheral-props.yaml# diff --git a/Documentation/devicetree/bindings/iio/light/rohm,bu27010.yaml b/Documentation/devicetree/bindings/iio/light/rohm,bu27010.yaml new file mode 100644 index 000000000000..8376d64a641a --- /dev/null +++ b/Documentation/devicetree/bindings/iio/light/rohm,bu27010.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/light/rohm,bu27010.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ROHM BU27010 color sensor + +maintainers: + - Matti Vaittinen + +description: | + The ROHM BU27010 is a sensor with 6 photodiodes (red, green, blue, clear, + IR and flickering detection) with five configurable channels. Red, green + and flickering detection being always available and two out of the rest + three (blue, clear, IR) can be selected to be simultaneously measured. + Typical application is adjusting LCD/OLED backlight of TVs, mobile phones + and tablet PCs. + +properties: + compatible: + const: rohm,bu27010 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + vdd-supply: true + +required: + - compatible + - reg + - vdd-supply + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + light-sensor@38 { + compatible = "rohm,bu27010"; + reg = <0x38>; + }; + }; diff --git a/Documentation/devicetree/bindings/iio/proximity/murata,irsd200.yaml b/Documentation/devicetree/bindings/iio/proximity/murata,irsd200.yaml new file mode 100644 index 000000000000..67f5389ece67 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/proximity/murata,irsd200.yaml @@ -0,0 +1,60 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/proximity/murata,irsd200.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Murata IRS-D200 PIR sensor + +maintainers: + - Waqar Hameed + +description: + PIR sensor for human detection. + +properties: + compatible: + const: murata,irsd200 + + reg: + items: + - enum: + - 0x48 + - 0x49 + description: | + When the AD pin is connected to GND, the slave address is 0x48. + When the AD pin is connected to VDD, the slave address is 0x49. + + interrupts: + maxItems: 1 + description: + Type should be IRQ_TYPE_EDGE_RISING. + + vdd-supply: + description: + 3.3 V supply voltage. + +required: + - compatible + - reg + - interrupts + - vdd-supply + +additionalProperties: false + +examples: + - | + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + proximity@48 { + compatible = "murata,irsd200"; + reg = <0x48>; + interrupts = <24 IRQ_TYPE_EDGE_RISING>; + vdd-supply = <®ulator_3v3>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/proximity/semtech,sx9310.yaml b/Documentation/devicetree/bindings/iio/proximity/semtech,sx9310.yaml index 5de0bb2180e6..775555d147bf 100644 --- a/Documentation/devicetree/bindings/iio/proximity/semtech,sx9310.yaml +++ b/Documentation/devicetree/bindings/iio/proximity/semtech,sx9310.yaml @@ -15,6 +15,9 @@ description: | Specifications about the devices can be found at: https://www.semtech.com/products/smart-sensing/sar-sensors/sx9310 +allOf: + - $ref: /schemas/iio/iio.yaml# + properties: compatible: enum: @@ -102,7 +105,7 @@ required: - reg - "#io-channel-cells" -additionalProperties: false +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/proximity/semtech,sx9324.yaml b/Documentation/devicetree/bindings/iio/proximity/semtech,sx9324.yaml index b3aa2ebf9661..48f221463166 100644 --- a/Documentation/devicetree/bindings/iio/proximity/semtech,sx9324.yaml +++ b/Documentation/devicetree/bindings/iio/proximity/semtech,sx9324.yaml @@ -13,6 +13,9 @@ maintainers: description: | Semtech's SX9324 proximity sensor. +allOf: + - $ref: /schemas/iio/iio.yaml# + properties: compatible: const: semtech,sx9324 @@ -167,7 +170,7 @@ required: - reg - "#io-channel-cells" -additionalProperties: false +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml index 5d17bdcfdf70..73f809cdb783 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml @@ -25,14 +25,20 @@ properties: - const: qcom,msm8998-bwmon # BWMON v4 - items: - enum: + - qcom,sc7180-cpu-bwmon - qcom,sc7280-cpu-bwmon - qcom,sc8280xp-cpu-bwmon - qcom,sdm845-cpu-bwmon + - qcom,sm6350-llcc-bwmon + - qcom,sm8250-cpu-bwmon - qcom,sm8550-cpu-bwmon - const: qcom,sdm845-bwmon # BWMON v4, unified register space - items: - enum: + - qcom,sc7180-llcc-bwmon - qcom,sc8280xp-llcc-bwmon + - qcom,sm6350-cpu-bwmon + - qcom,sm8250-llcc-bwmon - qcom,sm8550-llcc-bwmon - const: qcom,sc7280-llcc-bwmon - const: qcom,sc7280-llcc-bwmon # BWMON v5 diff --git a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml index 9d0a98d77ae9..21dae0b92819 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml @@ -21,6 +21,7 @@ properties: - enum: - qcom,sc7180-osm-l3 - qcom,sc8180x-osm-l3 + - qcom,sdm670-osm-l3 - qcom,sdm845-osm-l3 - qcom,sm6350-osm-l3 - qcom,sm8150-osm-l3 diff --git a/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml b/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml index 4d93ad415e0b..a46497af1fd8 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml @@ -18,9 +18,6 @@ description: | least one RPMh device child node pertaining to their RSC and each provider can map to multiple RPMh resources. -allOf: - - $ref: qcom,rpmh-common.yaml# - properties: reg: maxItems: 1 @@ -91,6 +88,7 @@ properties: - qcom,sm8250-mc-virt - qcom,sm8250-mmss-noc - qcom,sm8250-npu-noc + - qcom,sm8250-qup-virt - qcom,sm8250-system-noc - qcom,sm8350-aggre1-noc - qcom,sm8350-aggre2-noc @@ -107,7 +105,19 @@ properties: required: - compatible - - reg + +allOf: + - $ref: qcom,rpmh-common.yaml# + - if: + not: + properties: + compatible: + enum: + - qcom,sm8250-qup-virt + then: + required: + - reg + unevaluatedProperties: false diff --git a/Documentation/devicetree/bindings/nvmem/fsl,t1023-sfp.yaml b/Documentation/devicetree/bindings/nvmem/fsl,t1023-sfp.yaml new file mode 100644 index 000000000000..df826b40d8ca --- /dev/null +++ b/Documentation/devicetree/bindings/nvmem/fsl,t1023-sfp.yaml @@ -0,0 +1,37 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/nvmem/fsl,t1023-sfp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP QorIQ eFuse support + +maintainers: + - Richard Alpe + +description: + Read support for the eFuses (SFP) on NXP QorIQ series SoC's. + +allOf: + - $ref: nvmem.yaml# + +properties: + compatible: + const: fsl,t1023-sfp + + reg: + maxItems: 1 + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + efuse@e8000 { + compatible = "fsl,t1023-sfp"; + reg = <0xe8000 0x1000>; + }; +... diff --git a/Documentation/devicetree/bindings/nvmem/layouts/fixed-cell.yaml b/Documentation/devicetree/bindings/nvmem/layouts/fixed-cell.yaml index e698098450e1..ac2381e66027 100644 --- a/Documentation/devicetree/bindings/nvmem/layouts/fixed-cell.yaml +++ b/Documentation/devicetree/bindings/nvmem/layouts/fixed-cell.yaml @@ -11,6 +11,15 @@ maintainers: - Srinivas Kandagatla properties: + compatible: + oneOf: + - const: mac-base + description: > + Cell with base MAC address to be used for calculating extra relative + addresses. + It can be stored in a plain binary format (cell length 6) or as an + ASCII text like "00:11:22:33:44:55" (cell length 17). + reg: maxItems: 1 @@ -25,6 +34,23 @@ properties: description: Size in bit within the address range specified by reg. +allOf: + - if: + required: [ compatible ] + then: + if: + properties: + compatible: + contains: + const: mac-base + then: + properties: + "#nvmem-cell-cells": + description: The first argument is a MAC address offset. + const: 1 + required: + - "#nvmem-cell-cells" + required: - reg diff --git a/Documentation/devicetree/bindings/nvmem/layouts/fixed-layout.yaml b/Documentation/devicetree/bindings/nvmem/layouts/fixed-layout.yaml index c271537d0714..9bd34bd5af30 100644 --- a/Documentation/devicetree/bindings/nvmem/layouts/fixed-layout.yaml +++ b/Documentation/devicetree/bindings/nvmem/layouts/fixed-layout.yaml @@ -44,6 +44,18 @@ examples: #address-cells = <1>; #size-cells = <1>; + mac@100 { + compatible = "mac-base"; + reg = <0x100 0x6>; + #nvmem-cell-cells = <1>; + }; + + mac@110 { + compatible = "mac-base"; + reg = <0x110 0x11>; + #nvmem-cell-cells = <1>; + }; + calibration@4000 { reg = <0x4000 0x100>; }; diff --git a/Documentation/devicetree/bindings/nvmem/nvmem.yaml b/Documentation/devicetree/bindings/nvmem/nvmem.yaml index 980244100690..9f921d940142 100644 --- a/Documentation/devicetree/bindings/nvmem/nvmem.yaml +++ b/Documentation/devicetree/bindings/nvmem/nvmem.yaml @@ -49,7 +49,10 @@ properties: patternProperties: "@[0-9a-f]+(,[0-7])?$": type: object - $ref: layouts/fixed-cell.yaml + allOf: + - $ref: layouts/fixed-cell.yaml + - properties: + compatible: false deprecated: true additionalProperties: true diff --git a/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml b/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml index 6cd4682a167d..8740938c32eb 100644 --- a/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml +++ b/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml @@ -23,11 +23,13 @@ properties: - qcom,ipq8064-qfprom - qcom,ipq8074-qfprom - qcom,ipq9574-qfprom + - qcom,msm8226-qfprom - qcom,msm8916-qfprom - qcom,msm8974-qfprom - qcom,msm8976-qfprom - qcom,msm8996-qfprom - qcom,msm8998-qfprom + - qcom,qcm2290-qfprom - qcom,qcs404-qfprom - qcom,sc7180-qfprom - qcom,sc7280-qfprom diff --git a/Documentation/devicetree/bindings/nvmem/qcom,sec-qfprom.yaml b/Documentation/devicetree/bindings/nvmem/qcom,sec-qfprom.yaml new file mode 100644 index 000000000000..9b133f783d29 --- /dev/null +++ b/Documentation/devicetree/bindings/nvmem/qcom,sec-qfprom.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/nvmem/qcom,sec-qfprom.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Technologies Inc, Secure QFPROM Efuse + +maintainers: + - Komal Bajaj + +description: + For some of the Qualcomm SoC's, it is possible that the qfprom region is + protected from non-secure access. In such situations, the OS have to use + secure calls to read the region. + +allOf: + - $ref: nvmem.yaml# + +properties: + compatible: + items: + - enum: + - qcom,qdu1000-sec-qfprom + - const: qcom,sec-qfprom + + reg: + items: + - description: The secure qfprom corrected region. + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + soc { + #address-cells = <2>; + #size-cells = <2>; + + efuse@221c8000 { + compatible = "qcom,qdu1000-sec-qfprom", "qcom,sec-qfprom"; + reg = <0 0x221c8000 0 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + + multi_chan_ddr: multi-chan-ddr@12b { + reg = <0x12b 0x1>; + bits = <0 2>; + }; + }; + }; + diff --git a/Documentation/devicetree/bindings/peci/nuvoton,npcm-peci.yaml b/Documentation/devicetree/bindings/peci/nuvoton,npcm-peci.yaml new file mode 100644 index 000000000000..087e02a9ade3 --- /dev/null +++ b/Documentation/devicetree/bindings/peci/nuvoton,npcm-peci.yaml @@ -0,0 +1,56 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/peci/nuvoton,npcm-peci.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Nuvoton PECI Bus + +maintainers: + - Tomer Maimon + +allOf: + - $ref: peci-controller.yaml# + +properties: + compatible: + enum: + - nuvoton,npcm750-peci + - nuvoton,npcm845-peci + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + description: + Clock source for PECI controller. Should reference the APB clock. + maxItems: 1 + + cmd-timeout-ms: + minimum: 1 + maximum: 1000 + default: 1000 + +required: + - compatible + - reg + - interrupts + - clocks + +additionalProperties: false + +examples: + - | + #include + #include + peci-controller@f0100000 { + compatible = "nuvoton,npcm750-peci"; + reg = <0xf0100000 0x200>; + interrupts = ; + clocks = <&clk NPCM7XX_CLK_APB3>; + cmd-timeout-ms = <1000>; + }; +... diff --git a/Documentation/devicetree/bindings/phy/realtek,usb2phy.yaml b/Documentation/devicetree/bindings/phy/realtek,usb2phy.yaml new file mode 100644 index 000000000000..9911ada39ee7 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/realtek,usb2phy.yaml @@ -0,0 +1,175 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2023 Realtek Semiconductor Corporation +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/realtek,usb2phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Realtek DHC SoCs USB 2.0 PHY + +maintainers: + - Stanley Chang + +description: | + Realtek USB 2.0 PHY support the digital home center (DHC) RTD series SoCs. + The USB 2.0 PHY driver is designed to support the XHCI controller. The SoCs + support multiple XHCI controllers. One PHY device node maps to one XHCI + controller. + + RTD1295/RTD1619 SoCs USB + The USB architecture includes three XHCI controllers. + Each XHCI maps to one USB 2.0 PHY and map one USB 3.0 PHY on some + controllers. + XHCI controller#0 -- usb2phy -- phy#0 + |- usb3phy -- phy#0 + XHCI controller#1 -- usb2phy -- phy#0 + XHCI controller#2 -- usb2phy -- phy#0 + |- usb3phy -- phy#0 + + RTD1395 SoCs USB + The USB architecture includes two XHCI controllers. + The controller#0 has one USB 2.0 PHY. The controller#1 includes two USB 2.0 + PHY. + XHCI controller#0 -- usb2phy -- phy#0 + XHCI controller#1 -- usb2phy -- phy#0 + |- phy#1 + + RTD1319/RTD1619b SoCs USB + The USB architecture includes three XHCI controllers. + Each XHCI maps to one USB 2.0 PHY and map one USB 3.0 PHY on controllers#2. + XHCI controller#0 -- usb2phy -- phy#0 + XHCI controller#1 -- usb2phy -- phy#0 + XHCI controller#2 -- usb2phy -- phy#0 + |- usb3phy -- phy#0 + + RTD1319d SoCs USB + The USB architecture includes three XHCI controllers. + Each xhci maps to one USB 2.0 PHY and map one USB 3.0 PHY on controllers#0. + XHCI controller#0 -- usb2phy -- phy#0 + |- usb3phy -- phy#0 + XHCI controller#1 -- usb2phy -- phy#0 + XHCI controller#2 -- usb2phy -- phy#0 + + RTD1312c/RTD1315e SoCs USB + The USB architecture includes three XHCI controllers. + Each XHCI maps to one USB 2.0 PHY. + XHCI controller#0 -- usb2phy -- phy#0 + XHCI controller#1 -- usb2phy -- phy#0 + XHCI controller#2 -- usb2phy -- phy#0 + +properties: + compatible: + enum: + - realtek,rtd1295-usb2phy + - realtek,rtd1312c-usb2phy + - realtek,rtd1315e-usb2phy + - realtek,rtd1319-usb2phy + - realtek,rtd1319d-usb2phy + - realtek,rtd1395-usb2phy + - realtek,rtd1395-usb2phy-2port + - realtek,rtd1619-usb2phy + - realtek,rtd1619b-usb2phy + + reg: + items: + - description: PHY data registers + - description: PHY control registers + + "#phy-cells": + const: 0 + + nvmem-cells: + maxItems: 2 + description: + Phandles to nvmem cell that contains the trimming data. + If unspecified, default value is used. + + nvmem-cell-names: + items: + - const: usb-dc-cal + - const: usb-dc-dis + description: + The following names, which correspond to each nvmem-cells. + usb-dc-cal is the driving level for each phy specified via efuse. + usb-dc-dis is the disconnection level for each phy specified via efuse. + + realtek,inverse-hstx-sync-clock: + description: + For one of the phys of RTD1619b SoC, the synchronous clock of the + high-speed tx must be inverted. + type: boolean + + realtek,driving-level: + description: + Control the magnitude of High speed Dp/Dm output swing (mV). + For a different board or port, the original magnitude maybe not meet + the specification. In this situation we can adjust the value to meet + the specification. + $ref: /schemas/types.yaml#/definitions/uint32 + default: 8 + minimum: 0 + maximum: 31 + + realtek,driving-level-compensate: + description: + For RTD1315e SoC, the driving level can be adjusted by reading the + efuse table. This property provides drive compensation. + If the magnitude of High speed Dp/Dm output swing still not meet the + specification, then we can set this value to meet the specification. + $ref: /schemas/types.yaml#/definitions/int32 + default: 0 + minimum: -8 + maximum: 8 + + realtek,disconnection-compensate: + description: + This adjusts the disconnection level compensation for the different + boards with different disconnection level. + $ref: /schemas/types.yaml#/definitions/int32 + default: 0 + minimum: -8 + maximum: 8 + +required: + - compatible + - reg + - "#phy-cells" + +allOf: + - if: + not: + properties: + compatible: + contains: + enum: + - realtek,rtd1619b-usb2phy + then: + properties: + realtek,inverse-hstx-sync-clock: false + + - if: + not: + properties: + compatible: + contains: + enum: + - realtek,rtd1315e-usb2phy + then: + properties: + realtek,driving-level-compensate: false + +additionalProperties: false + +examples: + - | + usb-phy@13214 { + compatible = "realtek,rtd1619b-usb2phy"; + reg = <0x13214 0x4>, <0x28280 0x4>; + #phy-cells = <0>; + nvmem-cells = <&otp_usb_port0_dc_cal>, <&otp_usb_port0_dc_dis>; + nvmem-cell-names = "usb-dc-cal", "usb-dc-dis"; + + realtek,inverse-hstx-sync-clock; + realtek,driving-level = <0xa>; + realtek,disconnection-compensate = <(-1)>; + }; diff --git a/Documentation/devicetree/bindings/phy/realtek,usb3phy.yaml b/Documentation/devicetree/bindings/phy/realtek,usb3phy.yaml new file mode 100644 index 000000000000..dfe2bb4e59e7 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/realtek,usb3phy.yaml @@ -0,0 +1,107 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2023 Realtek Semiconductor Corporation +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/realtek,usb3phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Realtek DHC SoCs USB 3.0 PHY + +maintainers: + - Stanley Chang + +description: | + Realtek USB 3.0 PHY support the digital home center (DHC) RTD series SoCs. + The USB 3.0 PHY driver is designed to support the XHCI controller. The SoCs + support multiple XHCI controllers. One PHY device node maps to one XHCI + controller. + + RTD1295/RTD1619 SoCs USB + The USB architecture includes three XHCI controllers. + Each XHCI maps to one USB 2.0 PHY and map one USB 3.0 PHY on some + controllers. + XHCI controller#0 -- usb2phy -- phy#0 + |- usb3phy -- phy#0 + XHCI controller#1 -- usb2phy -- phy#0 + XHCI controller#2 -- usb2phy -- phy#0 + |- usb3phy -- phy#0 + + RTD1319/RTD1619b SoCs USB + The USB architecture includes three XHCI controllers. + Each XHCI maps to one USB 2.0 PHY and map one USB 3.0 PHY on controllers#2. + XHCI controller#0 -- usb2phy -- phy#0 + XHCI controller#1 -- usb2phy -- phy#0 + XHCI controller#2 -- usb2phy -- phy#0 + |- usb3phy -- phy#0 + + RTD1319d SoCs USB + The USB architecture includes three XHCI controllers. + Each xhci maps to one USB 2.0 PHY and map one USB 3.0 PHY on controllers#0. + XHCI controller#0 -- usb2phy -- phy#0 + |- usb3phy -- phy#0 + XHCI controller#1 -- usb2phy -- phy#0 + XHCI controller#2 -- usb2phy -- phy#0 + +properties: + compatible: + enum: + - realtek,rtd1295-usb3phy + - realtek,rtd1319-usb3phy + - realtek,rtd1319d-usb3phy + - realtek,rtd1619-usb3phy + - realtek,rtd1619b-usb3phy + + reg: + maxItems: 1 + + "#phy-cells": + const: 0 + + nvmem-cells: + maxItems: 1 + description: A phandle to the tx lfps swing trim data provided by + a nvmem device, if unspecified, default values shall be used. + + nvmem-cell-names: + items: + - const: usb_u3_tx_lfps_swing_trim + + realtek,amplitude-control-coarse-tuning: + description: + This adjusts the signal amplitude for normal operation and beacon LFPS. + This value is a parameter for coarse tuning. + For different boards, if the default value is inappropriate, this + property can be assigned to adjust. + $ref: /schemas/types.yaml#/definitions/uint32 + default: 255 + minimum: 0 + maximum: 255 + + realtek,amplitude-control-fine-tuning: + description: + This adjusts the signal amplitude for normal operation and beacon LFPS. + This value is used for fine-tuning parameters. + $ref: /schemas/types.yaml#/definitions/uint32 + default: 65535 + minimum: 0 + maximum: 65535 + +required: + - compatible + - reg + - "#phy-cells" + +additionalProperties: false + +examples: + - | + usb-phy@13e10 { + compatible = "realtek,rtd1319d-usb3phy"; + reg = <0x13e10 0x4>; + #phy-cells = <0>; + + nvmem-cells = <&otp_usb_u3_tx_lfps_swing_trim>; + nvmem-cell-names = "usb_u3_tx_lfps_swing_trim"; + + realtek,amplitude-control-coarse-tuning = <0x77>; + }; diff --git a/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml b/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml index 01ec45b3b406..2e189e548327 100644 --- a/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml +++ b/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml @@ -33,6 +33,7 @@ properties: - amlogic,meson8b-uart - amlogic,meson-gx-uart - amlogic,meson-s4-uart + - amlogic,meson-a1-uart - const: amlogic,meson-ao-uart - description: Always-on power domain UART controller on G12A SoCs items: @@ -46,10 +47,15 @@ properties: - amlogic,meson8b-uart - amlogic,meson-gx-uart - amlogic,meson-s4-uart + - amlogic,meson-a1-uart - description: Everything-Else power domain UART controller on G12A SoCs items: - const: amlogic,meson-g12a-uart - const: amlogic,meson-gx-uart + - description: UART controller on S4 compatible SoCs + items: + - const: amlogic,t7-uart + - const: amlogic,meson-s4-uart reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/serial/fsl-lpuart.yaml b/Documentation/devicetree/bindings/serial/fsl-lpuart.yaml index 93062403276b..3a5b59f5d3e3 100644 --- a/Documentation/devicetree/bindings/serial/fsl-lpuart.yaml +++ b/Documentation/devicetree/bindings/serial/fsl-lpuart.yaml @@ -25,9 +25,13 @@ properties: - fsl,imxrt1050-lpuart - items: - enum: - - fsl,imx93-lpuart - fsl,imx8ulp-lpuart - const: fsl,imx7ulp-lpuart + - items: + - enum: + - fsl,imx93-lpuart + - const: fsl,imx8ulp-lpuart + - const: fsl,imx7ulp-lpuart - items: - enum: - fsl,imx8qm-lpuart diff --git a/Documentation/devicetree/bindings/serial/nxp,sc16is7xx.txt b/Documentation/devicetree/bindings/serial/nxp,sc16is7xx.txt index 0fa8e3e43bf8..1a7e4bff0456 100644 --- a/Documentation/devicetree/bindings/serial/nxp,sc16is7xx.txt +++ b/Documentation/devicetree/bindings/serial/nxp,sc16is7xx.txt @@ -23,6 +23,9 @@ Optional properties: 1 = active low. - irda-mode-ports: An array that lists the indices of the port that should operate in IrDA mode. +- nxp,modem-control-line-ports: An array that lists the indices of the port that + should have shared GPIO lines configured as + modem control lines. Example: sc16is750: sc16is750@51 { @@ -35,6 +38,26 @@ Example: #gpio-cells = <2>; }; + sc16is752: sc16is752@53 { + compatible = "nxp,sc16is752"; + reg = <0x53>; + clocks = <&clk20m>; + interrupt-parent = <&gpio3>; + interrupts = <7 IRQ_TYPE_EDGE_FALLING>; + nxp,modem-control-line-ports = <1>; /* Port 1 as modem control lines */ + gpio-controller; /* Port 0 as GPIOs */ + #gpio-cells = <2>; + }; + + sc16is752: sc16is752@54 { + compatible = "nxp,sc16is752"; + reg = <0x54>; + clocks = <&clk20m>; + interrupt-parent = <&gpio3>; + interrupts = <7 IRQ_TYPE_EDGE_FALLING>; + nxp,modem-control-line-ports = <0 1>; /* Ports 0 and 1 as modem control lines */ + }; + * spi as bus Required properties: @@ -59,6 +82,9 @@ Optional properties: 1 = active low. - irda-mode-ports: An array that lists the indices of the port that should operate in IrDA mode. +- nxp,modem-control-line-ports: An array that lists the indices of the port that + should have shared GPIO lines configured as + modem control lines. Example: sc16is750: sc16is750@0 { @@ -70,3 +96,23 @@ Example: gpio-controller; #gpio-cells = <2>; }; + + sc16is752: sc16is752@1 { + compatible = "nxp,sc16is752"; + reg = <1>; + clocks = <&clk20m>; + interrupt-parent = <&gpio3>; + interrupts = <7 IRQ_TYPE_EDGE_FALLING>; + nxp,modem-control-line-ports = <1>; /* Port 1 as modem control lines */ + gpio-controller; /* Port 0 as GPIOs */ + #gpio-cells = <2>; + }; + + sc16is752: sc16is752@2 { + compatible = "nxp,sc16is752"; + reg = <2>; + clocks = <&clk20m>; + interrupt-parent = <&gpio3>; + interrupts = <7 IRQ_TYPE_EDGE_FALLING>; + nxp,modem-control-line-ports = <0 1>; /* Ports 0 and 1 as modem control lines */ + }; diff --git a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml index 3862411c77b5..17c553123f96 100644 --- a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml +++ b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml @@ -117,7 +117,6 @@ properties: required: - compatible - reg - - interrupts unevaluatedProperties: false diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml index 91f135c3495b..1394557517b1 100644 --- a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml +++ b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml @@ -34,6 +34,7 @@ properties: - fsl,imx23-usb - fsl,imx25-usb - fsl,imx28-usb + - fsl,imx35-usb - fsl,imx50-usb - fsl,imx51-usb - fsl,imx53-usb @@ -76,11 +77,11 @@ properties: clocks: minItems: 1 - maxItems: 2 + maxItems: 3 clock-names: minItems: 1 - maxItems: 2 + maxItems: 3 dr_mode: true @@ -292,6 +293,18 @@ properties: minimum: 0x0 maximum: 0xf + fsl,picophy-rise-fall-time-adjust: + description: + HS Transmitter Rise/Fall Time Adjustment. Adjust the rise/fall times + of the high-speed transmitter waveform. It has no unit. The rise/fall + time will be increased or decreased by a certain percentage relative + to design default time. (0:-10%; 1:design default; 2:+15%; 3:+20%) + Details can refer to TXRISETUNE0 bit of USBNC_n_PHY_CFG1. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 3 + default: 1 + usb-phy: description: phandle for the PHY device. Use "phys" instead. $ref: /schemas/types.yaml#/definitions/phandle diff --git a/Documentation/devicetree/bindings/usb/cypress,hx3.yaml b/Documentation/devicetree/bindings/usb/cypress,hx3.yaml new file mode 100644 index 000000000000..47add0d85fb8 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/cypress,hx3.yaml @@ -0,0 +1,77 @@ +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/cypress,hx3.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Cypress HX3 USB 3.0 hub controller family + +maintainers: + - Benjamin Bara + +allOf: + - $ref: usb-device.yaml# + +properties: + compatible: + enum: + - usb4b4,6504 + - usb4b4,6506 + + reg: true + + reset-gpios: + items: + - description: GPIO specifier for RESETN pin. + + vdd-supply: + description: + 1V2 power supply (VDD_EFUSE, AVDD12, DVDD12). + + vdd2-supply: + description: + 3V3 power supply (AVDD33, VDD_IO). + + peer-hub: + $ref: /schemas/types.yaml#/definitions/phandle + description: + phandle to the peer hub on the controller. + +required: + - compatible + - reg + - peer-hub + - vdd-supply + - vdd2-supply + +additionalProperties: false + +examples: + - | + #include + + usb { + dr_mode = "host"; + #address-cells = <1>; + #size-cells = <0>; + + /* 2.0 hub on port 1 */ + hub_2_0: hub@1 { + compatible = "usb4b4,6504"; + reg = <1>; + peer-hub = <&hub_3_0>; + reset-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; + vdd-supply = <®_1v2_usb>; + vdd2-supply = <®_3v3_usb>; + }; + + /* 3.0 hub on port 2 */ + hub_3_0: hub@2 { + compatible = "usb4b4,6506"; + reg = <2>; + peer-hub = <&hub_2_0>; + reset-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; + vdd-supply = <®_1v2_usb>; + vdd2-supply = <®_3v3_usb>; + }; + }; diff --git a/Documentation/devicetree/bindings/usb/generic-ehci.yaml b/Documentation/devicetree/bindings/usb/generic-ehci.yaml index f37191f21501..87986c45be88 100644 --- a/Documentation/devicetree/bindings/usb/generic-ehci.yaml +++ b/Documentation/devicetree/bindings/usb/generic-ehci.yaml @@ -68,6 +68,7 @@ properties: - const: generic-ehci - items: - enum: + - atmel,at91sam9g45-ehci - cavium,octeon-6335-ehci - ibm,usb-ehci-440epx - ibm,usb-ehci-460ex diff --git a/Documentation/devicetree/bindings/usb/genesys,gl850g.yaml b/Documentation/devicetree/bindings/usb/genesys,gl850g.yaml index 6378356727e1..d0927f6768a4 100644 --- a/Documentation/devicetree/bindings/usb/genesys,gl850g.yaml +++ b/Documentation/devicetree/bindings/usb/genesys,gl850g.yaml @@ -17,6 +17,7 @@ properties: enum: - usb5e3,608 - usb5e3,610 + - usb5e3,620 reg: true diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml index ae24dac78d9a..67591057f234 100644 --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml @@ -14,6 +14,7 @@ properties: items: - enum: - qcom,ipq4019-dwc3 + - qcom,ipq5332-dwc3 - qcom,ipq6018-dwc3 - qcom,ipq8064-dwc3 - qcom,ipq8074-dwc3 @@ -82,15 +83,6 @@ properties: minItems: 1 maxItems: 9 - assigned-clocks: - items: - - description: Phandle and clock specifier of MOCK_UTMI_CLK. - - description: Phandle and clock specifoer of MASTER_CLK. - - assigned-clock-rates: - items: - - description: Must be 19.2MHz (19200000). - - description: Must be >= 60 MHz in HS mode, >= 125 MHz in SS mode. resets: maxItems: 1 @@ -246,6 +238,7 @@ allOf: compatible: contains: enum: + - qcom,ipq5332-dwc3 - qcom,msm8994-dwc3 - qcom,qcs404-dwc3 then: @@ -290,15 +283,23 @@ allOf: then: properties: clocks: - minItems: 6 + minItems: 5 + maxItems: 6 clock-names: - items: - - const: cfg_noc - - const: core - - const: iface - - const: sleep - - const: mock_utmi - - const: bus + oneOf: + - items: + - const: cfg_noc + - const: core + - const: iface + - const: sleep + - const: mock_utmi + - const: bus + - items: + - const: cfg_noc + - const: core + - const: sleep + - const: mock_utmi + - const: bus - if: properties: @@ -410,6 +411,7 @@ allOf: compatible: contains: enum: + - qcom,ipq5332-dwc3 - qcom,sdm660-dwc3 then: properties: diff --git a/Documentation/devicetree/bindings/usb/samsung,exynos-dwc3.yaml b/Documentation/devicetree/bindings/usb/samsung,exynos-dwc3.yaml index 42ceaf13cd5d..1ade99e85ba8 100644 --- a/Documentation/devicetree/bindings/usb/samsung,exynos-dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/samsung,exynos-dwc3.yaml @@ -15,6 +15,7 @@ properties: - samsung,exynos5250-dwusb3 - samsung,exynos5433-dwusb3 - samsung,exynos7-dwusb3 + - samsung,exynos850-dwusb3 '#address-cells': const: 1 @@ -72,7 +73,7 @@ allOf: properties: compatible: contains: - const: samsung,exynos54333-dwusb3 + const: samsung,exynos5433-dwusb3 then: properties: clocks: @@ -82,8 +83,8 @@ allOf: items: - const: aclk - const: susp_clk - - const: pipe_pclk - const: phyclk + - const: pipe_pclk - if: properties: @@ -101,6 +102,21 @@ allOf: - const: usbdrd30_susp_clk - const: usbdrd30_axius_clk + - if: + properties: + compatible: + contains: + const: samsung,exynos850-dwusb3 + then: + properties: + clocks: + minItems: 2 + maxItems: 2 + clock-names: + items: + - const: bus_early + - const: ref + additionalProperties: false examples: diff --git a/Documentation/driver-api/interconnect.rst b/Documentation/driver-api/interconnect.rst index 5ed4f57a6bac..a92d0f277a1f 100644 --- a/Documentation/driver-api/interconnect.rst +++ b/Documentation/driver-api/interconnect.rst @@ -113,3 +113,28 @@ through dot to generate diagrams in many graphical formats:: $ cat /sys/kernel/debug/interconnect/interconnect_graph | \ dot -Tsvg > interconnect_graph.svg + +The ``test-client`` directory provides interfaces for issuing BW requests to +any arbitrary path. Note that for safety reasons, this feature is disabled by +default without a Kconfig to enable it. Enabling it requires code changes to +``#define INTERCONNECT_ALLOW_WRITE_DEBUGFS``. Example usage:: + + cd /sys/kernel/debug/interconnect/test-client/ + + # Configure node endpoints for the path from CPU to DDR on + # qcom/sm8550. + echo chm_apps > src_node + echo ebi > dst_node + + # Get path between src_node and dst_node. This is only + # necessary after updating the node endpoints. + echo 1 > get + + # Set desired BW to 1GBps avg and 2GBps peak. + echo 1000000 > avg_bw + echo 2000000 > peak_bw + + # Vote for avg_bw and peak_bw on the latest path from "get". + # Voting for multiple paths is possible by repeating this + # process for different nodes endpoints. + echo 1 > commit diff --git a/Documentation/driver-api/tty/tty_buffer.rst b/Documentation/driver-api/tty/tty_buffer.rst index a39d4781e0d2..4b5ca1776d4f 100644 --- a/Documentation/driver-api/tty/tty_buffer.rst +++ b/Documentation/driver-api/tty/tty_buffer.rst @@ -15,10 +15,13 @@ Flip Buffer Management ====================== .. kernel-doc:: drivers/tty/tty_buffer.c - :identifiers: tty_prepare_flip_string tty_insert_flip_string_fixed_flag - tty_insert_flip_string_flags __tty_insert_flip_char + :identifiers: tty_prepare_flip_string tty_flip_buffer_push tty_ldisc_receive_buf +.. kernel-doc:: include/linux/tty_flip.h + :identifiers: tty_insert_flip_string_fixed_flag tty_insert_flip_string_flags + tty_insert_flip_char + ---- Other Functions diff --git a/Documentation/driver-api/usb/usb.rst b/Documentation/driver-api/usb/usb.rst index 2c94ff2f4385..fb41768696ec 100644 --- a/Documentation/driver-api/usb/usb.rst +++ b/Documentation/driver-api/usb/usb.rst @@ -420,6 +420,12 @@ USBDEVFS_CONNECTINFO know the devnum value already, it's the DDD value of the device file name. +USBDEVFS_GET_SPEED + Returns the speed of the device. The speed is returned as a + nummerical value in accordance with enum usb_device_speed + + File modification time is not updated by this request. + USBDEVFS_GETDRIVER Returns the name of the kernel driver bound to a given interface (a string). Parameter is a pointer to this structure, which is @@ -771,8 +777,7 @@ Speed may be: ======= ====================================================== 1.5 Mbit/s for low speed USB 12 Mbit/s for full speed USB - 480 Mbit/s for high speed USB (added for USB 2.0); - also used for Wireless USB, which has no fixed speed + 480 Mbit/s for high speed USB (added for USB 2.0) 5000 Mbit/s for SuperSpeed USB (added for USB 3.0) ======= ====================================================== diff --git a/Documentation/process/stable-kernel-rules.rst b/Documentation/process/stable-kernel-rules.rst index 51df1197d5ab..41f1e07abfdf 100644 --- a/Documentation/process/stable-kernel-rules.rst +++ b/Documentation/process/stable-kernel-rules.rst @@ -6,30 +6,29 @@ Everything you ever wanted to know about Linux -stable releases Rules on what kind of patches are accepted, and which ones are not, into the "-stable" tree: + - It or an equivalent fix must already exist in Linus' tree (upstream). - It must be obviously correct and tested. - It cannot be bigger than 100 lines, with context. - - It must fix only one thing. - - It must fix a real bug that bothers people (not a, "This could be a - problem..." type thing). - - It must fix a problem that causes a build error (but not for things - marked CONFIG_BROKEN), an oops, a hang, data corruption, a real - security issue, or some "oh, that's not good" issue. In short, something - critical. - - Serious issues as reported by a user of a distribution kernel may also - be considered if they fix a notable performance or interactivity issue. - As these fixes are not as obvious and have a higher risk of a subtle - regression they should only be submitted by a distribution kernel - maintainer and include an addendum linking to a bugzilla entry if it - exists and additional information on the user-visible impact. - - New device IDs and quirks are also accepted. - - No "theoretical race condition" issues, unless an explanation of how the - race can be exploited is also provided. - - It cannot contain any "trivial" fixes in it (spelling changes, - whitespace cleanups, etc). - It must follow the :ref:`Documentation/process/submitting-patches.rst ` rules. - - It or an equivalent fix must already exist in Linus' tree (upstream). + - It must either fix a real bug that bothers people or just add a device ID. + To elaborate on the former: + + - It fixes a problem like an oops, a hang, data corruption, a real security + issue, a hardware quirk, a build error (but not for things marked + CONFIG_BROKEN), or some "oh, that's not good" issue. + - Serious issues as reported by a user of a distribution kernel may also + be considered if they fix a notable performance or interactivity issue. + As these fixes are not as obvious and have a higher risk of a subtle + regression they should only be submitted by a distribution kernel + maintainer and include an addendum linking to a bugzilla entry if it + exists and additional information on the user-visible impact. + - No "This could be a problem..." type of things like a "theoretical race + condition", unless an explanation of how the bug can be exploited is also + provided. + - No "trivial" fixes without benefit for users (spelling changes, whitespace + cleanups, etc). Procedure for submitting patches to the -stable tree @@ -41,32 +40,106 @@ Procedure for submitting patches to the -stable tree process but should follow the procedures in :ref:`Documentation/process/security-bugs.rst `. -For all other submissions, choose one of the following procedures ------------------------------------------------------------------ +There are three options to submit a change to -stable trees: + + 1. Add a 'stable tag' to the description of a patch you then submit for + mainline inclusion. + 2. Ask the stable team to pick up a patch already mainlined. + 3. Submit a patch to the stable team that is equivalent to a change already + mainlined. + +The sections below describe each of the options in more detail. + +:ref:`option_1` is **strongly** preferred, it is the easiest and most common. +:ref:`option_2` is mainly meant for changes where backporting was not considered +at the time of submission. :ref:`option_3` is an alternative to the two earlier +options for cases where a mainlined patch needs adjustments to apply in older +series (for example due to API changes). + +When using option 2 or 3 you can ask for your change to be included in specific +stable series. When doing so, ensure the fix or an equivalent is applicable, +submitted, or already present in all newer stable trees still supported. This is +meant to prevent regressions that users might later encounter on updating, if +e.g. a fix merged for 5.19-rc1 would be backported to 5.10.y, but not to 5.15.y. .. _option_1: Option 1 ******** -To have the patch automatically included in the stable tree, add the tag +To have a patch you submit for mainline inclusion later automatically picked up +for stable trees, add the tag .. code-block:: none Cc: stable@vger.kernel.org -in the sign-off area. Once the patch is merged it will be applied to -the stable tree without anything else needing to be done by the author -or subsystem maintainer. +in the sign-off area. Once the patch is mainlined it will be applied to the +stable tree without anything else needing to be done by the author or +subsystem maintainer. + +To sent additional instructions to the stable team, use a shell-style inline +comment: + + * To specify any additional patch prerequisites for cherry picking use the + following format in the sign-off area: + + .. code-block:: none + + Cc: # 3.3.x: a1f84a3: sched: Check for idle + Cc: # 3.3.x: 1b9508f: sched: Rate-limit newidle + Cc: # 3.3.x: fd21073: sched: Fix affinity logic + Cc: # 3.3.x + Signed-off-by: Ingo Molnar + + The tag sequence has the meaning of: + + .. code-block:: none + + git cherry-pick a1f84a3 + git cherry-pick 1b9508f + git cherry-pick fd21073 + git cherry-pick + + * For patches that may have kernel version prerequisites specify them using + the following format in the sign-off area: + + .. code-block:: none + + Cc: # 3.3.x + + The tag has the meaning of: + + .. code-block:: none + + git cherry-pick + + For each "-stable" tree starting with the specified version. + + Note, such tagging is unnecessary if the stable team can derive the + appropriate versions from Fixes: tags. + + * To delay pick up of patches, use the following format: + + .. code-block:: none + + Cc: # after 4 weeks in mainline + + * For any other requests, just add a note to the stable tag. This for example + can be used to point out known problems: + + .. code-block:: none + + Cc: # see patch description, needs adjustments for <= 6.3 .. _option_2: Option 2 ******** -After the patch has been merged to Linus' tree, send an email to +If the patch already has been merged to mainline, send an email to stable@vger.kernel.org containing the subject of the patch, the commit ID, -why you think it should be applied, and what kernel version you wish it to +why you think it should be applied, and what kernel versions you wish it to be applied to. .. _option_3: @@ -75,23 +148,9 @@ Option 3 ******** Send the patch, after verifying that it follows the above rules, to -stable@vger.kernel.org. You must note the upstream commit ID in the -changelog of your submission, as well as the kernel version you wish -it to be applied to. - -:ref:`option_1` is **strongly** preferred, is the easiest and most common. -:ref:`option_2` and :ref:`option_3` are more useful if the patch isn't deemed -worthy at the time it is applied to a public git tree (for instance, because -it deserves more regression testing first). :ref:`option_3` is especially -useful if the original upstream patch needs to be backported (for example -the backport needs some special handling due to e.g. API changes). - -Note that for :ref:`option_3`, if the patch deviates from the original -upstream patch (for example because it had to be backported) this must be very -clearly documented and justified in the patch description. - -The upstream commit ID must be specified with a separate line above the commit -text, like this: +stable@vger.kernel.org and mention the kernel versions you wish it to be applied +to. When doing so, you must note the upstream commit ID in the changelog of your +submission with a separate line above the commit text, like this: .. code-block:: none @@ -103,49 +162,20 @@ or alternatively: [ Upstream commit ] -Additionally, some patches submitted via :ref:`option_1` may have additional -patch prerequisites which can be cherry-picked. This can be specified in the -following format in the sign-off area: +If the submitted patch deviates from the original upstream patch (for example +because it had to be adjusted for the older API), this must be very clearly +documented and justified in the patch description. -.. code-block:: none - Cc: # 3.3.x: a1f84a3: sched: Check for idle - Cc: # 3.3.x: 1b9508f: sched: Rate-limit newidle - Cc: # 3.3.x: fd21073: sched: Fix affinity logic - Cc: # 3.3.x - Signed-off-by: Ingo Molnar +Following the submission +------------------------ -The tag sequence has the meaning of: +The sender will receive an ACK when the patch has been accepted into the +queue, or a NAK if the patch is rejected. This response might take a few +days, according to the schedules of the stable team members. -.. code-block:: none - - git cherry-pick a1f84a3 - git cherry-pick 1b9508f - git cherry-pick fd21073 - git cherry-pick - -Also, some patches may have kernel version prerequisites. This can be -specified in the following format in the sign-off area: - -.. code-block:: none - - Cc: # 3.3.x - -The tag has the meaning of: - -.. code-block:: none - - git cherry-pick - -For each "-stable" tree starting with the specified version. - -Following the submission: - - - The sender will receive an ACK when the patch has been accepted into the - queue, or a NAK if the patch is rejected. This response might take a few - days, according to the developer's schedules. - - If accepted, the patch will be added to the -stable queue, for review by - other developers and by the relevant subsystem maintainer. +If accepted, the patch will be added to the -stable queue, for review by other +developers and by the relevant subsystem maintainer. Review cycle @@ -174,6 +204,7 @@ Review cycle security kernel team, and not go through the normal review cycle. Contact the kernel security team for more details on this procedure. + Trees ----- diff --git a/Documentation/usb/authorization.rst b/Documentation/usb/authorization.rst index 9e53909d04c2..150a14970e95 100644 --- a/Documentation/usb/authorization.rst +++ b/Documentation/usb/authorization.rst @@ -33,12 +33,9 @@ Remove the lock down:: $ echo 1 > /sys/bus/usb/devices/usbX/authorized_default -By default, Wired USB devices are authorized by default to -connect. Wireless USB hosts deauthorize by default all new connected -devices (this is so because we need to do an authentication phase -before authorizing). Writing "2" to the authorized_default attribute -causes kernel to only authorize by default devices connected to internal -USB ports. +By default, all USB devices are authorized. Writing "2" to the +authorized_default attribute causes the kernel to authorize by default +only devices connected to internal USB ports. Example system lockdown (lame) diff --git a/Documentation/usb/gadget-testing.rst b/Documentation/usb/gadget-testing.rst index 2fca40443dc9..394cd226bfae 100644 --- a/Documentation/usb/gadget-testing.rst +++ b/Documentation/usb/gadget-testing.rst @@ -27,6 +27,7 @@ provided by gadgets. 18. UVC function 19. PRINTER function 20. UAC1 function (new API) + 21. MIDI2 function 1. ACM function @@ -965,3 +966,156 @@ e.g.:: $ arecord -f dat -t wav -D hw:CARD=UAC1Gadget,DEV=0 | \ aplay -D default:CARD=OdroidU3 + + +21. MIDI2 function +================== + +The function is provided by usb_f_midi2.ko module. +It will create a virtual ALSA card containing a UMP rawmidi device +where the UMP packet is looped back. In addition, a legacy rawmidi +device is created. The UMP rawmidi is bound with ALSA sequencer +clients, too. + +Function-specific configfs interface +------------------------------------ + +The function name to use when creating the function directory is "midi2". +The midi2 function provides these attributes in its function directory +as the card top-level information: + + ============= ================================================= + process_ump Bool flag to process UMP Stream messages (0 or 1) + static_block Bool flag for static blocks (0 or 1) + iface_name Optional interface name string + ============= ================================================= + +The directory contains a subdirectory "ep.0", and this provides the +attributes for a UMP Endpoint (which is a pair of USB MIDI Endpoints): + + ============= ================================================= + protocol_caps MIDI protocol capabilities; + 1: MIDI 1.0, 2: MIDI 2.0, or 3: both protocols + protocol Default MIDI protocol (either 1 or 2) + ep_name UMP Endpoint name string + product_id Product ID string + manufacturer Manufacture ID number (24 bit) + family Device family ID number (16 bit) + model Device model ID number (16 bit) + sw_revision Software revision (32 bit) + ============= ================================================= + +Each Endpoint subdirectory contains a subdirectory "block.0", which +represents the Function Block for Block 0 information. +Its attributes are: + + ================= =============================================== + name Function Block name string + direction Direction of this FB + 1: input, 2: output, or 3: bidirectional + first_group The first UMP Group number (0-15) + num_groups The number of groups in this FB (1-16) + midi1_first_group The first UMP Group number for MIDI 1.0 (0-15) + midi1_num_groups The number of groups for MIDI 1.0 (0-16) + ui_hint UI-hint of this FB + 0: unknown, 1: receiver, 2: sender, 3: both + midi_ci_verison Supported MIDI-CI version number (8 bit) + is_midi1 Legacy MIDI 1.0 device (0-2) + 0: MIDI 2.0 device, + 1: MIDI 1.0 without restriction, or + 2: MIDI 1.0 with low speed + sysex8_streams Max number of SysEx8 streams (8 bit) + active Bool flag for FB activity (0 or 1) + ================= =============================================== + +If multiple Function Blocks are required, you can add more Function +Blocks by creating subdirectories "block." with the corresponding +Function Block number (1, 2, ....). The FB subdirectories can be +dynamically removed, too. Note that the Function Block numbers must be +continuous. + +Similarly, if you multiple UMP Endpoints are required, you can add +more Endpoints by creating subdirectories "ep.". The number must +be continuous. + +For emulating the old MIDI 2.0 device without UMP v1.1 support, pass 0 +to `process_ump` flag. Then the whole UMP v1.1 requests are ignored. + +Testing the MIDI2 function +-------------------------- + +On the device: run the gadget, and running:: + + $ cat /proc/asound/cards + +will show a new sound card containing a MIDI2 device. + +OTOH, on the host:: + + $ cat /proc/asound/cards + +will show a new sound card containing either MIDI1 or MIDI2 device, +depending on the USB audio driver configuration. + +On both, when ALSA sequencer is enabled on the host, you can find the +UMP MIDI client such as "MIDI 2.0 Gadget". + +As the driver simply loops back the data, there is no need for a real +device just for testing. + +For testing a MIDI input from the gadget to the host (e.g. emulating a +MIDI keyboard), you can send a MIDI stream like the following. + +On the gadget:: + + $ aconnect -o + .... + client 20: 'MIDI 2.0 Gadget' [type=kernel,card=1] + 0 'MIDI 2.0 ' + 1 'Group 1 (MIDI 2.0 Gadget I/O)' + $ aplaymidi -p 20:1 to_host.mid + +On the host:: + + $ aconnect -i + .... + client 24: 'MIDI 2.0 Gadget' [type=kernel,card=2] + 0 'MIDI 2.0 ' + 1 'Group 1 (MIDI 2.0 Gadget I/O)' + $ arecordmidi -p 24:1 from_gadget.mid + +If you have a UMP-capable application, you can use the UMP port to +send/receive the raw UMP packets, too. For example, aseqdump program +with UMP support can receive from UMP port. On the host:: + + $ aseqdump -u 2 -p 24:1 + Waiting for data. Press Ctrl+C to end. + Source Group Event Ch Data + 24:1 Group 0, Program change 0, program 0, Bank select 0:0 + 24:1 Group 0, Channel pressure 0, value 0x80000000 + +For testing a MIDI output to the gadget to the host (e.g. emulating a +MIDI synth), it'll be just other way round. + +On the gadget:: + + $ arecordmidi -p 20:1 from_host.mid + +On the host:: + + $ aplaymidi -p 24:1 to_gadget.mid + +The access to MIDI 1.0 on altset 0 on the host is supported, and it's +translated from/to UMP packets on the gadget. It's bound to only +Function Block 0. + +The current operation mode can be observed in ALSA control element +"Operation Mode" for SND_CTL_IFACE_RAWMIDI. For example:: + + $ amixer -c1 contents + numid=1,iface=RAWMIDI,name='Operation Mode' + ; type=INTEGER,access=r--v----,values=1,min=0,max=2,step=0 + : values=2 + +where 0 = unused, 1 = MIDI 1.0 (altset 0), 2 = MIDI 2.0 (altset 1). +The example above shows it's running in 2, i.e. MIDI 2.0. diff --git a/MAINTAINERS b/MAINTAINERS index e71e6bda292c..ae2fbdba3843 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -14014,12 +14014,14 @@ F: drivers/nvmem/microchip-otpc.c F: include/dt-bindings/nvmem/microchip,sama7g5-otpc.h MICROCHIP PCI1XXXX GP DRIVER +M: Vaibhaav Ram T.L M: Kumaravel Thiagarajan L: linux-gpio@vger.kernel.org S: Supported F: drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gp.c F: drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gp.h F: drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c +F: drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_otpe2p.c MICROCHIP PCI1XXXX I2C DRIVER M: Tharun Kumar P diff --git a/arch/alpha/kernel/setup.c b/arch/alpha/kernel/setup.c index 3d7473531ab1..c80258ec332f 100644 --- a/arch/alpha/kernel/setup.c +++ b/arch/alpha/kernel/setup.c @@ -421,7 +421,7 @@ register_cpus(void) arch_initcall(register_cpus); #ifdef CONFIG_MAGIC_SYSRQ -static void sysrq_reboot_handler(int unused) +static void sysrq_reboot_handler(u8 unused) { machine_halt(); } diff --git a/arch/alpha/kernel/srmcons.c b/arch/alpha/kernel/srmcons.c index 6dc952b0df4a..d6139dbae4ac 100644 --- a/arch/alpha/kernel/srmcons.c +++ b/arch/alpha/kernel/srmcons.c @@ -129,9 +129,8 @@ srmcons_do_write(struct tty_port *port, const char *buf, int count) return count; } -static int -srmcons_write(struct tty_struct *tty, - const unsigned char *buf, int count) +static ssize_t +srmcons_write(struct tty_struct *tty, const u8 *buf, size_t count) { unsigned long flags; diff --git a/arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi b/arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi index c7b5ef15b716..868454ae6bde 100644 --- a/arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi +++ b/arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi @@ -220,6 +220,15 @@ }; }; + peci: peci-controller@f0100000 { + compatible = "nuvoton,npcm750-peci"; + reg = <0xf0100000 0x200>; + interrupts = ; + clocks = <&clk NPCM7XX_CLK_APB3>; + cmd-timeout-ms = <1000>; + status = "disabled"; + }; + spi0: spi@200000 { compatible = "nuvoton,npcm750-pspi"; reg = <0x200000 0x1000>; diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi index c8f344596285..96225c421194 100644 --- a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi @@ -108,7 +108,7 @@ }; uart_AO: serial@1c00 { - compatible = "amlogic,meson-gx-uart", + compatible = "amlogic,meson-a1-uart", "amlogic,meson-ao-uart"; reg = <0x0 0x1c00 0x0 0x18>; interrupts = ; @@ -118,7 +118,7 @@ }; uart_AO_B: serial@2000 { - compatible = "amlogic,meson-gx-uart", + compatible = "amlogic,meson-a1-uart", "amlogic,meson-ao-uart"; reg = <0x0 0x2000 0x0 0x18>; interrupts = ; diff --git a/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi b/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi index aa7aac8c3774..ecd171b2feba 100644 --- a/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi +++ b/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi @@ -68,6 +68,15 @@ ranges = <0x0 0x0 0xf0000000 0x00300000>, <0xfff00000 0x0 0xfff00000 0x00016000>; + peci: peci-controller@100000 { + compatible = "nuvoton,npcm845-peci"; + reg = <0x100000 0x1000>; + interrupts = ; + clocks = <&clk NPCM8XX_CLK_APB3>; + cmd-timeout-ms = <1000>; + status = "disabled"; + }; + timer0: timer@8000 { compatible = "nuvoton,npcm845-timer"; interrupts = ; diff --git a/arch/loongarch/kernel/sysrq.c b/arch/loongarch/kernel/sysrq.c index 366baef72d29..e663c10fa39c 100644 --- a/arch/loongarch/kernel/sysrq.c +++ b/arch/loongarch/kernel/sysrq.c @@ -43,7 +43,7 @@ static void sysrq_tlbdump_othercpus(struct work_struct *dummy) static DECLARE_WORK(sysrq_tlbdump, sysrq_tlbdump_othercpus); #endif -static void sysrq_handle_tlbdump(int key) +static void sysrq_handle_tlbdump(u8 key) { sysrq_tlbdump_single(NULL); #ifdef CONFIG_SMP diff --git a/arch/m68k/emu/nfcon.c b/arch/m68k/emu/nfcon.c index 6fdc13610565..3a74d493eb3e 100644 --- a/arch/m68k/emu/nfcon.c +++ b/arch/m68k/emu/nfcon.c @@ -70,16 +70,16 @@ static void nfcon_tty_close(struct tty_struct *tty, struct file *filp) { } -static int nfcon_tty_write(struct tty_struct *tty, const unsigned char *buf, - int count) +static ssize_t nfcon_tty_write(struct tty_struct *tty, const u8 *buf, + size_t count) { nfputs(buf, count); return count; } -static int nfcon_tty_put_char(struct tty_struct *tty, unsigned char ch) +static int nfcon_tty_put_char(struct tty_struct *tty, u8 ch) { - char temp[2] = { ch, 0 }; + u8 temp[2] = { ch, 0 }; nf_call(stderr_id, virt_to_phys(temp)); return 1; diff --git a/arch/mips/cavium-octeon/Makefile b/arch/mips/cavium-octeon/Makefile index 7c02e542959a..2a5926578841 100644 --- a/arch/mips/cavium-octeon/Makefile +++ b/arch/mips/cavium-octeon/Makefile @@ -18,4 +18,3 @@ obj-y += crypto/ obj-$(CONFIG_MTD) += flash_setup.o obj-$(CONFIG_SMP) += smp.o obj-$(CONFIG_OCTEON_ILM) += oct_ilm.o -obj-$(CONFIG_USB) += octeon-usb.o diff --git a/arch/mips/cavium-octeon/octeon-platform.c b/arch/mips/cavium-octeon/octeon-platform.c index ce05c0dd3acd..235c77ce7b18 100644 --- a/arch/mips/cavium-octeon/octeon-platform.c +++ b/arch/mips/cavium-octeon/octeon-platform.c @@ -450,7 +450,6 @@ static const struct of_device_id octeon_ids[] __initconst = { { .compatible = "cavium,octeon-3860-bootbus", }, { .compatible = "cavium,mdio-mux", }, { .compatible = "gpio-leds", }, - { .compatible = "cavium,octeon-7130-usb-uctl", }, {}, }; diff --git a/arch/mips/kernel/sysrq.c b/arch/mips/kernel/sysrq.c index 9c1a2019113b..2e98049fe783 100644 --- a/arch/mips/kernel/sysrq.c +++ b/arch/mips/kernel/sysrq.c @@ -44,7 +44,7 @@ static void sysrq_tlbdump_othercpus(struct work_struct *dummy) static DECLARE_WORK(sysrq_tlbdump, sysrq_tlbdump_othercpus); #endif -static void sysrq_handle_tlbdump(int key) +static void sysrq_handle_tlbdump(u8 key) { sysrq_tlbdump_single(NULL); #ifdef CONFIG_SMP diff --git a/arch/powerpc/include/asm/fs_pd.h b/arch/powerpc/include/asm/fs_pd.h deleted file mode 100644 index d530f68b4eef..000000000000 --- a/arch/powerpc/include/asm/fs_pd.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * Platform information definitions. - * - * 2006 (c) MontaVista Software, Inc. - * Vitaly Bordug - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - -#ifndef FS_PD_H -#define FS_PD_H -#include -#include - -static inline int uart_baudrate(void) -{ - return get_baudrate(); -} - -static inline int uart_clock(void) -{ - return ppc_proc_freq; -} - -#endif diff --git a/arch/powerpc/platforms/8xx/mpc885ads_setup.c b/arch/powerpc/platforms/8xx/mpc885ads_setup.c index 76c7cd78c17e..2d899be746eb 100644 --- a/arch/powerpc/platforms/8xx/mpc885ads_setup.c +++ b/arch/powerpc/platforms/8xx/mpc885ads_setup.c @@ -21,7 +21,6 @@ #include #include -#include #include #include #include diff --git a/arch/powerpc/platforms/8xx/tqm8xx_setup.c b/arch/powerpc/platforms/8xx/tqm8xx_setup.c index 1670dfd30809..d97a7910c594 100644 --- a/arch/powerpc/platforms/8xx/tqm8xx_setup.c +++ b/arch/powerpc/platforms/8xx/tqm8xx_setup.c @@ -24,7 +24,6 @@ #include #include -#include #include #include #include diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c index 528506f6e2b8..3949ceb79e64 100644 --- a/arch/powerpc/sysdev/fsl_soc.c +++ b/arch/powerpc/sysdev/fsl_soc.c @@ -22,7 +22,6 @@ #include #include #include -#include #include #include @@ -35,7 +34,6 @@ #include #include /* For the Freescale hypervisor */ -extern void init_smc_ioports(struct fs_uart_platform_info*); static phys_addr_t immrbase = -1; phys_addr_t get_immrbase(void) diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c index 5888fcd8e408..b3b94cd37713 100644 --- a/arch/powerpc/xmon/xmon.c +++ b/arch/powerpc/xmon/xmon.c @@ -3988,7 +3988,7 @@ static void xmon_init(int enable) } #ifdef CONFIG_MAGIC_SYSRQ -static void sysrq_handle_xmon(int key) +static void sysrq_handle_xmon(u8 key) { if (xmon_is_locked_down()) { clear_all_bpt(); diff --git a/arch/sparc/include/asm/vio.h b/arch/sparc/include/asm/vio.h index 8a0c3c11c9ce..587fb7841096 100644 --- a/arch/sparc/include/asm/vio.h +++ b/arch/sparc/include/asm/vio.h @@ -284,7 +284,7 @@ struct vio_dring_state { struct ldc_trans_cookie cookies[VIO_MAX_RING_COOKIES]; }; -#define VIO_TAG_SIZE ((int)sizeof(struct vio_msg_tag)) +#define VIO_TAG_SIZE (sizeof(struct vio_msg_tag)) #define VIO_VCC_MTU_SIZE (LDC_PACKET_SIZE - VIO_TAG_SIZE) struct vio_vcc { diff --git a/arch/sparc/kernel/process_64.c b/arch/sparc/kernel/process_64.c index 1ea3f37fa985..529adfecd58c 100644 --- a/arch/sparc/kernel/process_64.c +++ b/arch/sparc/kernel/process_64.c @@ -295,7 +295,7 @@ void arch_trigger_cpumask_backtrace(const cpumask_t *mask, int exclude_cpu) #ifdef CONFIG_MAGIC_SYSRQ -static void sysrq_handle_globreg(int key) +static void sysrq_handle_globreg(u8 key) { trigger_all_cpu_backtrace(); } @@ -370,7 +370,7 @@ static void pmu_snapshot_all_cpus(void) spin_unlock_irqrestore(&global_cpu_snapshot_lock, flags); } -static void sysrq_handle_globpmu(int key) +static void sysrq_handle_globpmu(u8 key) { pmu_snapshot_all_cpus(); } diff --git a/arch/um/drivers/line.c b/arch/um/drivers/line.c index 02b0befd6763..b98545f3edb5 100644 --- a/arch/um/drivers/line.c +++ b/arch/um/drivers/line.c @@ -184,7 +184,7 @@ void line_flush_chars(struct tty_struct *tty) line_flush_buffer(tty); } -int line_write(struct tty_struct *tty, const unsigned char *buf, int len) +ssize_t line_write(struct tty_struct *tty, const u8 *buf, size_t len) { struct line *line = tty->driver_data; unsigned long flags; diff --git a/arch/um/drivers/line.h b/arch/um/drivers/line.h index f15be75a3bf3..e84fb9b4165e 100644 --- a/arch/um/drivers/line.h +++ b/arch/um/drivers/line.h @@ -64,8 +64,7 @@ extern void line_cleanup(struct tty_struct *tty); extern void line_hangup(struct tty_struct *tty); extern int line_setup(char **conf, unsigned nlines, char **def, char *init, char *name); -extern int line_write(struct tty_struct *tty, const unsigned char *buf, - int len); +extern ssize_t line_write(struct tty_struct *tty, const u8 *buf, size_t len); extern unsigned int line_chars_in_buffer(struct tty_struct *tty); extern void line_flush_buffer(struct tty_struct *tty); extern void line_flush_chars(struct tty_struct *tty); diff --git a/arch/x86/kernel/apm_32.c b/arch/x86/kernel/apm_32.c index c6c15ce1952f..5934ee5bc087 100644 --- a/arch/x86/kernel/apm_32.c +++ b/arch/x86/kernel/apm_32.c @@ -238,12 +238,6 @@ extern int (*console_blank_hook)(int); #endif -/* - * The apm_bios device is one of the misc char devices. - * This is its minor number. - */ -#define APM_MINOR_DEV 134 - /* * Various options can be changed at boot time as follows: * (We allow underscores for compatibility with the modules code) diff --git a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c index 458cb7419502..8f559eeae08e 100644 --- a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c +++ b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c @@ -45,7 +45,21 @@ static u64 prefetch_disable_bits; */ static unsigned int pseudo_lock_major; static unsigned long pseudo_lock_minor_avail = GENMASK(MINORBITS, 0); -static struct class *pseudo_lock_class; + +static char *pseudo_lock_devnode(const struct device *dev, umode_t *mode) +{ + const struct rdtgroup *rdtgrp; + + rdtgrp = dev_get_drvdata(dev); + if (mode) + *mode = 0600; + return kasprintf(GFP_KERNEL, "pseudo_lock/%s", rdtgrp->kn->name); +} + +static const struct class pseudo_lock_class = { + .name = "pseudo_lock", + .devnode = pseudo_lock_devnode, +}; /** * get_prefetch_disable_bits - prefetch disable bits of supported platforms @@ -1353,7 +1367,7 @@ int rdtgroup_pseudo_lock_create(struct rdtgroup *rdtgrp) &pseudo_measure_fops); } - dev = device_create(pseudo_lock_class, NULL, + dev = device_create(&pseudo_lock_class, NULL, MKDEV(pseudo_lock_major, new_minor), rdtgrp, "%s", rdtgrp->kn->name); @@ -1383,7 +1397,7 @@ int rdtgroup_pseudo_lock_create(struct rdtgroup *rdtgrp) goto out; out_device: - device_destroy(pseudo_lock_class, MKDEV(pseudo_lock_major, new_minor)); + device_destroy(&pseudo_lock_class, MKDEV(pseudo_lock_major, new_minor)); out_debugfs: debugfs_remove_recursive(plr->debugfs_dir); pseudo_lock_minor_release(new_minor); @@ -1424,7 +1438,7 @@ void rdtgroup_pseudo_lock_remove(struct rdtgroup *rdtgrp) pseudo_lock_cstates_relax(plr); debugfs_remove_recursive(rdtgrp->plr->debugfs_dir); - device_destroy(pseudo_lock_class, MKDEV(pseudo_lock_major, plr->minor)); + device_destroy(&pseudo_lock_class, MKDEV(pseudo_lock_major, plr->minor)); pseudo_lock_minor_release(plr->minor); free: @@ -1560,16 +1574,6 @@ static const struct file_operations pseudo_lock_dev_fops = { .mmap = pseudo_lock_dev_mmap, }; -static char *pseudo_lock_devnode(const struct device *dev, umode_t *mode) -{ - const struct rdtgroup *rdtgrp; - - rdtgrp = dev_get_drvdata(dev); - if (mode) - *mode = 0600; - return kasprintf(GFP_KERNEL, "pseudo_lock/%s", rdtgrp->kn->name); -} - int rdt_pseudo_lock_init(void) { int ret; @@ -1580,21 +1584,18 @@ int rdt_pseudo_lock_init(void) pseudo_lock_major = ret; - pseudo_lock_class = class_create("pseudo_lock"); - if (IS_ERR(pseudo_lock_class)) { - ret = PTR_ERR(pseudo_lock_class); + ret = class_register(&pseudo_lock_class); + if (ret) { unregister_chrdev(pseudo_lock_major, "pseudo_lock"); return ret; } - pseudo_lock_class->devnode = pseudo_lock_devnode; return 0; } void rdt_pseudo_lock_release(void) { - class_destroy(pseudo_lock_class); - pseudo_lock_class = NULL; + class_unregister(&pseudo_lock_class); unregister_chrdev(pseudo_lock_major, "pseudo_lock"); pseudo_lock_major = 0; } diff --git a/arch/x86/kernel/cpuid.c b/arch/x86/kernel/cpuid.c index bdc0d5539b57..dae436253de4 100644 --- a/arch/x86/kernel/cpuid.c +++ b/arch/x86/kernel/cpuid.c @@ -40,7 +40,6 @@ #include #include -static struct class *cpuid_class; static enum cpuhp_state cpuhp_cpuid_state; struct cpuid_regs_done { @@ -124,26 +123,31 @@ static const struct file_operations cpuid_fops = { .open = cpuid_open, }; +static char *cpuid_devnode(const struct device *dev, umode_t *mode) +{ + return kasprintf(GFP_KERNEL, "cpu/%u/cpuid", MINOR(dev->devt)); +} + +static const struct class cpuid_class = { + .name = "cpuid", + .devnode = cpuid_devnode, +}; + static int cpuid_device_create(unsigned int cpu) { struct device *dev; - dev = device_create(cpuid_class, NULL, MKDEV(CPUID_MAJOR, cpu), NULL, + dev = device_create(&cpuid_class, NULL, MKDEV(CPUID_MAJOR, cpu), NULL, "cpu%d", cpu); return PTR_ERR_OR_ZERO(dev); } static int cpuid_device_destroy(unsigned int cpu) { - device_destroy(cpuid_class, MKDEV(CPUID_MAJOR, cpu)); + device_destroy(&cpuid_class, MKDEV(CPUID_MAJOR, cpu)); return 0; } -static char *cpuid_devnode(const struct device *dev, umode_t *mode) -{ - return kasprintf(GFP_KERNEL, "cpu/%u/cpuid", MINOR(dev->devt)); -} - static int __init cpuid_init(void) { int err; @@ -154,12 +158,9 @@ static int __init cpuid_init(void) CPUID_MAJOR); return -EBUSY; } - cpuid_class = class_create("cpuid"); - if (IS_ERR(cpuid_class)) { - err = PTR_ERR(cpuid_class); + err = class_register(&cpuid_class); + if (err) goto out_chrdev; - } - cpuid_class->devnode = cpuid_devnode; err = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "x86/cpuid:online", cpuid_device_create, cpuid_device_destroy); @@ -170,7 +171,7 @@ static int __init cpuid_init(void) return 0; out_class: - class_destroy(cpuid_class); + class_unregister(&cpuid_class); out_chrdev: __unregister_chrdev(CPUID_MAJOR, 0, NR_CPUS, "cpu/cpuid"); return err; @@ -180,7 +181,7 @@ module_init(cpuid_init); static void __exit cpuid_exit(void) { cpuhp_remove_state(cpuhp_cpuid_state); - class_destroy(cpuid_class); + class_unregister(&cpuid_class); __unregister_chrdev(CPUID_MAJOR, 0, NR_CPUS, "cpu/cpuid"); } module_exit(cpuid_exit); diff --git a/arch/x86/kernel/msr.c b/arch/x86/kernel/msr.c index 7bb17d37db01..e17c16c54a37 100644 --- a/arch/x86/kernel/msr.c +++ b/arch/x86/kernel/msr.c @@ -39,7 +39,6 @@ #include #include -static struct class *msr_class; static enum cpuhp_state cpuhp_msr_state; enum allow_write_msrs { @@ -235,26 +234,31 @@ static const struct file_operations msr_fops = { .compat_ioctl = msr_ioctl, }; +static char *msr_devnode(const struct device *dev, umode_t *mode) +{ + return kasprintf(GFP_KERNEL, "cpu/%u/msr", MINOR(dev->devt)); +} + +static const struct class msr_class = { + .name = "msr", + .devnode = msr_devnode, +}; + static int msr_device_create(unsigned int cpu) { struct device *dev; - dev = device_create(msr_class, NULL, MKDEV(MSR_MAJOR, cpu), NULL, + dev = device_create(&msr_class, NULL, MKDEV(MSR_MAJOR, cpu), NULL, "msr%d", cpu); return PTR_ERR_OR_ZERO(dev); } static int msr_device_destroy(unsigned int cpu) { - device_destroy(msr_class, MKDEV(MSR_MAJOR, cpu)); + device_destroy(&msr_class, MKDEV(MSR_MAJOR, cpu)); return 0; } -static char *msr_devnode(const struct device *dev, umode_t *mode) -{ - return kasprintf(GFP_KERNEL, "cpu/%u/msr", MINOR(dev->devt)); -} - static int __init msr_init(void) { int err; @@ -263,12 +267,9 @@ static int __init msr_init(void) pr_err("unable to get major %d for msr\n", MSR_MAJOR); return -EBUSY; } - msr_class = class_create("msr"); - if (IS_ERR(msr_class)) { - err = PTR_ERR(msr_class); + err = class_register(&msr_class); + if (err) goto out_chrdev; - } - msr_class->devnode = msr_devnode; err = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "x86/msr:online", msr_device_create, msr_device_destroy); @@ -278,7 +279,7 @@ static int __init msr_init(void) return 0; out_class: - class_destroy(msr_class); + class_unregister(&msr_class); out_chrdev: __unregister_chrdev(MSR_MAJOR, 0, NR_CPUS, "cpu/msr"); return err; @@ -288,7 +289,7 @@ module_init(msr_init); static void __exit msr_exit(void) { cpuhp_remove_state(cpuhp_msr_state); - class_destroy(msr_class); + class_unregister(&msr_class); __unregister_chrdev(MSR_MAJOR, 0, NR_CPUS, "cpu/msr"); } module_exit(msr_exit) diff --git a/arch/xtensa/platforms/iss/console.c b/arch/xtensa/platforms/iss/console.c index 10b79d3c74e0..7d1f8b398a46 100644 --- a/arch/xtensa/platforms/iss/console.c +++ b/arch/xtensa/platforms/iss/console.c @@ -52,8 +52,7 @@ static void rs_close(struct tty_struct *tty, struct file * filp) } -static int rs_write(struct tty_struct * tty, - const unsigned char *buf, int count) +static ssize_t rs_write(struct tty_struct * tty, const u8 *buf, size_t count) { /* see drivers/char/serialX.c to reference original version */ @@ -82,32 +81,12 @@ static void rs_poll(struct timer_list *unused) mod_timer(&serial_timer, jiffies + SERIAL_TIMER_VALUE); } - -static int rs_put_char(struct tty_struct *tty, unsigned char ch) -{ - return rs_write(tty, &ch, 1); -} - -static void rs_flush_chars(struct tty_struct *tty) -{ -} - static unsigned int rs_write_room(struct tty_struct *tty) { /* Let's say iss can always accept 2K characters.. */ return 2 * 1024; } -static void rs_hangup(struct tty_struct *tty) -{ - /* Stub, once again.. */ -} - -static void rs_wait_until_sent(struct tty_struct *tty, int timeout) -{ - /* Stub, once again.. */ -} - static int rs_proc_show(struct seq_file *m, void *v) { seq_printf(m, "serinfo:1.0 driver:0.1\n"); @@ -118,11 +97,7 @@ static const struct tty_operations serial_ops = { .open = rs_open, .close = rs_close, .write = rs_write, - .put_char = rs_put_char, - .flush_chars = rs_flush_chars, .write_room = rs_write_room, - .hangup = rs_hangup, - .wait_until_sent = rs_wait_until_sent, .proc_show = rs_proc_show, }; diff --git a/drivers/accessibility/speakup/spk_ttyio.c b/drivers/accessibility/speakup/spk_ttyio.c index 07373b3debd1..4c0a6e1f019d 100644 --- a/drivers/accessibility/speakup/spk_ttyio.c +++ b/drivers/accessibility/speakup/spk_ttyio.c @@ -71,15 +71,14 @@ static void spk_ttyio_ldisc_close(struct tty_struct *tty) kfree(tty->disc_data); } -static int spk_ttyio_receive_buf2(struct tty_struct *tty, - const unsigned char *cp, - const char *fp, int count) +static size_t spk_ttyio_receive_buf2(struct tty_struct *tty, const u8 *cp, + const u8 *fp, size_t count) { struct spk_ldisc_data *ldisc_data = tty->disc_data; struct spk_synth *synth = ldisc_data->synth; if (synth->read_buff_add) { - int i; + unsigned int i; for (i = 0; i < count; i++) synth->read_buff_add(cp[i]); diff --git a/drivers/acpi/arm64/amba.c b/drivers/acpi/arm64/amba.c index b2a7631d7ac7..60be8ee1dbdc 100644 --- a/drivers/acpi/arm64/amba.c +++ b/drivers/acpi/arm64/amba.c @@ -22,7 +22,6 @@ static const struct acpi_device_id amba_id_list[] = { {"ARMH0061", 0}, /* PL061 GPIO Device */ {"ARMH0330", 0}, /* ARM DMA Controller DMA-330 */ - {"ARMHC500", 0}, /* ARM CoreSight ETM4x */ {"ARMHC501", 0}, /* ARM CoreSight ETR */ {"ARMHC502", 0}, /* ARM CoreSight STM */ {"ARMHC503", 0}, /* ARM CoreSight Debug */ diff --git a/drivers/amba/bus.c b/drivers/amba/bus.c index ce88af9eb562..09e72967b8ab 100644 --- a/drivers/amba/bus.c +++ b/drivers/amba/bus.c @@ -528,6 +528,7 @@ static void amba_device_release(struct device *dev) { struct amba_device *d = to_amba_device(dev); + of_node_put(d->dev.of_node); if (d->res.parent) release_resource(&d->res); mutex_destroy(&d->periphid_lock); diff --git a/drivers/android/binder.c b/drivers/android/binder.c index 55fe9f4bd48c..d8d794c5b04f 100644 --- a/drivers/android/binder.c +++ b/drivers/android/binder.c @@ -6758,6 +6758,7 @@ static int __init binder_init(void) struct binder_device *device; struct hlist_node *tmp; char *device_names = NULL; + const struct binder_debugfs_entry *db_entry; ret = binder_alloc_shrinker_init(); if (ret) @@ -6767,19 +6768,16 @@ static int __init binder_init(void) atomic_set(&binder_transaction_log_failed.cur, ~0U); binder_debugfs_dir_entry_root = debugfs_create_dir("binder", NULL); - if (binder_debugfs_dir_entry_root) { - const struct binder_debugfs_entry *db_entry; - binder_for_each_debugfs_entry(db_entry) - debugfs_create_file(db_entry->name, - db_entry->mode, - binder_debugfs_dir_entry_root, - db_entry->data, - db_entry->fops); + binder_for_each_debugfs_entry(db_entry) + debugfs_create_file(db_entry->name, + db_entry->mode, + binder_debugfs_dir_entry_root, + db_entry->data, + db_entry->fops); - binder_debugfs_dir_entry_proc = debugfs_create_dir("proc", - binder_debugfs_dir_entry_root); - } + binder_debugfs_dir_entry_proc = debugfs_create_dir("proc", + binder_debugfs_dir_entry_root); if (!IS_ENABLED(CONFIG_ANDROID_BINDERFS) && strcmp(binder_devices_param, "") != 0) { diff --git a/drivers/android/binderfs.c b/drivers/android/binderfs.c index faebe9f5412a..81effec17b3d 100644 --- a/drivers/android/binderfs.c +++ b/drivers/android/binderfs.c @@ -19,7 +19,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/base/core.c b/drivers/base/core.c index 704ba73e1459..b7d7f410c256 100644 --- a/drivers/base/core.c +++ b/drivers/base/core.c @@ -2306,12 +2306,12 @@ static void device_platform_notify(struct device *dev) static void device_platform_notify_remove(struct device *dev) { - acpi_device_notify_remove(dev); + if (platform_notify_remove) + platform_notify_remove(dev); software_node_notify_remove(dev); - if (platform_notify_remove) - platform_notify_remove(dev); + acpi_device_notify_remove(dev); } /** @@ -3528,18 +3528,17 @@ int device_add(struct device *dev) * the name, and force the use of dev_name() */ if (dev->init_name) { - dev_set_name(dev, "%s", dev->init_name); + error = dev_set_name(dev, "%s", dev->init_name); dev->init_name = NULL; } + if (dev_name(dev)) + error = 0; /* subsystems can specify simple device enumeration */ - if (!dev_name(dev) && dev->bus && dev->bus->dev_name) - dev_set_name(dev, "%s%u", dev->bus->dev_name, dev->id); - - if (!dev_name(dev)) { - error = -EINVAL; + else if (dev->bus && dev->bus->dev_name) + error = dev_set_name(dev, "%s%u", dev->bus->dev_name, dev->id); + if (error) goto name_error; - } pr_debug("device: '%s': %s\n", dev_name(dev), __func__); @@ -3815,6 +3814,17 @@ void device_del(struct device *dev) device_platform_notify_remove(dev); device_links_purge(dev); + /* + * If a device does not have a driver attached, we need to clean + * up any managed resources. We do this in device_release(), but + * it's never called (and we leak the device) if a managed + * resource holds a reference to the device. So release all + * managed resources here, like we do in driver_detach(). We + * still need to do so again in device_release() in case someone + * adds a new resource after this point, though. + */ + devres_release_all(dev); + bus_notify(dev, BUS_NOTIFY_REMOVED_DEVICE); kobject_uevent(&dev->kobj, KOBJ_REMOVE); glue_dir = get_glue_dir(dev); diff --git a/drivers/base/cpu.c b/drivers/base/cpu.c index 43dab03958f1..9ea22e165acd 100644 --- a/drivers/base/cpu.c +++ b/drivers/base/cpu.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include "base.h" @@ -50,12 +51,30 @@ static int cpu_subsys_online(struct device *dev) int cpuid = dev->id; int from_nid, to_nid; int ret; + int retries = 0; from_nid = cpu_to_node(cpuid); if (from_nid == NUMA_NO_NODE) return -ENODEV; +retry: ret = cpu_device_up(dev); + + /* + * If -EBUSY is returned, it is likely that hotplug is temporarily + * disabled when cpu_hotplug_disable() was called. This condition is + * transient. So we retry after waiting for an exponentially + * increasing delay up to a total of at least 620ms as some PCI + * device initialization can take quite a while. + */ + if (ret == -EBUSY) { + retries++; + if (retries > 5) + return ret; + msleep(10 * (1 << retries)); + goto retry; + } + /* * When hot adding memory to memoryless node and enabling a cpu * on the node, node number of the cpu may internally change. diff --git a/drivers/base/dd.c b/drivers/base/dd.c index 878aa7646b37..a528cec24264 100644 --- a/drivers/base/dd.c +++ b/drivers/base/dd.c @@ -693,6 +693,8 @@ re_probe: device_remove(dev); driver_sysfs_remove(dev); + if (dev->bus && dev->bus->dma_cleanup) + dev->bus->dma_cleanup(dev); device_unbind_cleanup(dev); goto re_probe; diff --git a/drivers/base/node.c b/drivers/base/node.c index 8e871ba9162f..493d533f8375 100644 --- a/drivers/base/node.c +++ b/drivers/base/node.c @@ -20,7 +20,6 @@ #include #include #include -#include static struct bus_type node_subsys = { .name = "node", diff --git a/drivers/base/test/.kunitconfig b/drivers/base/test/.kunitconfig new file mode 100644 index 000000000000..473923f0998b --- /dev/null +++ b/drivers/base/test/.kunitconfig @@ -0,0 +1,2 @@ +CONFIG_KUNIT=y +CONFIG_DM_KUNIT_TEST=y diff --git a/drivers/base/test/Kconfig b/drivers/base/test/Kconfig index 610a1ba7a467..9d42051f8f8e 100644 --- a/drivers/base/test/Kconfig +++ b/drivers/base/test/Kconfig @@ -9,6 +9,10 @@ config TEST_ASYNC_DRIVER_PROBE If unsure say N. +config DM_KUNIT_TEST + tristate "KUnit Tests for the device model" if !KUNIT_ALL_TESTS + depends on KUNIT + config DRIVER_PE_KUNIT_TEST bool "KUnit Tests for property entry API" if !KUNIT_ALL_TESTS depends on KUNIT=y diff --git a/drivers/base/test/Makefile b/drivers/base/test/Makefile index 7f76fee6f989..e321dfc7e922 100644 --- a/drivers/base/test/Makefile +++ b/drivers/base/test/Makefile @@ -1,5 +1,8 @@ # SPDX-License-Identifier: GPL-2.0 obj-$(CONFIG_TEST_ASYNC_DRIVER_PROBE) += test_async_driver_probe.o +obj-$(CONFIG_DM_KUNIT_TEST) += root-device-test.o +obj-$(CONFIG_DM_KUNIT_TEST) += platform-device-test.o + obj-$(CONFIG_DRIVER_PE_KUNIT_TEST) += property-entry-test.o CFLAGS_property-entry-test.o += $(DISABLE_STRUCTLEAK_PLUGIN) diff --git a/drivers/base/test/platform-device-test.c b/drivers/base/test/platform-device-test.c new file mode 100644 index 000000000000..ea05b8785743 --- /dev/null +++ b/drivers/base/test/platform-device-test.c @@ -0,0 +1,224 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include + +#include +#include + +#define DEVICE_NAME "test" + +struct test_priv { + bool probe_done; + bool release_done; + wait_queue_head_t probe_wq; + wait_queue_head_t release_wq; + struct device *dev; +}; + +static int platform_device_devm_init(struct kunit *test) +{ + struct test_priv *priv; + + priv = kunit_kzalloc(test, sizeof(*priv), GFP_KERNEL); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, priv); + init_waitqueue_head(&priv->probe_wq); + init_waitqueue_head(&priv->release_wq); + + test->priv = priv; + + return 0; +} + +static void devm_device_action(void *ptr) +{ + struct test_priv *priv = ptr; + + priv->release_done = true; + wake_up_interruptible(&priv->release_wq); +} + +static void devm_put_device_action(void *ptr) +{ + struct test_priv *priv = ptr; + + put_device(priv->dev); + priv->release_done = true; + wake_up_interruptible(&priv->release_wq); +} + +#define RELEASE_TIMEOUT_MS 100 + +/* + * Tests that a platform bus, non-probed device will run its + * device-managed actions when unregistered. + */ +static void platform_device_devm_register_unregister_test(struct kunit *test) +{ + struct platform_device *pdev; + struct test_priv *priv = test->priv; + int ret; + + pdev = platform_device_alloc(DEVICE_NAME, PLATFORM_DEVID_NONE); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, pdev); + + ret = platform_device_add(pdev); + KUNIT_ASSERT_EQ(test, ret, 0); + + priv->dev = &pdev->dev; + + ret = devm_add_action_or_reset(priv->dev, devm_device_action, priv); + KUNIT_ASSERT_EQ(test, ret, 0); + + platform_device_unregister(pdev); + + ret = wait_event_interruptible_timeout(priv->release_wq, priv->release_done, + msecs_to_jiffies(RELEASE_TIMEOUT_MS)); + KUNIT_EXPECT_GT(test, ret, 0); +} + +/* + * Tests that a platform bus, non-probed device will run its + * device-managed actions when unregistered, even if someone still holds + * a reference to it. + */ +static void platform_device_devm_register_get_unregister_with_devm_test(struct kunit *test) +{ + struct platform_device *pdev; + struct test_priv *priv = test->priv; + int ret; + + pdev = platform_device_alloc(DEVICE_NAME, PLATFORM_DEVID_NONE); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, pdev); + + ret = platform_device_add(pdev); + KUNIT_ASSERT_EQ(test, ret, 0); + + priv->dev = &pdev->dev; + + get_device(priv->dev); + + ret = devm_add_action_or_reset(priv->dev, devm_put_device_action, priv); + KUNIT_ASSERT_EQ(test, ret, 0); + + platform_device_unregister(pdev); + + ret = wait_event_interruptible_timeout(priv->release_wq, priv->release_done, + msecs_to_jiffies(RELEASE_TIMEOUT_MS)); + KUNIT_EXPECT_GT(test, ret, 0); +} + +static int fake_probe(struct platform_device *pdev) +{ + struct test_priv *priv = platform_get_drvdata(pdev); + + priv->probe_done = true; + wake_up_interruptible(&priv->probe_wq); + + return 0; +} + +static struct platform_driver fake_driver = { + .probe = fake_probe, + .driver = { + .name = DEVICE_NAME, + }, +}; + +/* + * Tests that a platform bus, probed device will run its device-managed + * actions when unregistered. + */ +static void probed_platform_device_devm_register_unregister_test(struct kunit *test) +{ + struct platform_device *pdev; + struct test_priv *priv = test->priv; + int ret; + + ret = platform_driver_register(&fake_driver); + KUNIT_ASSERT_EQ(test, ret, 0); + + pdev = platform_device_alloc(DEVICE_NAME, PLATFORM_DEVID_NONE); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, pdev); + + priv->dev = &pdev->dev; + platform_set_drvdata(pdev, priv); + + ret = platform_device_add(pdev); + KUNIT_ASSERT_EQ(test, ret, 0); + + ret = wait_event_interruptible_timeout(priv->probe_wq, priv->probe_done, + msecs_to_jiffies(RELEASE_TIMEOUT_MS)); + KUNIT_ASSERT_GT(test, ret, 0); + + ret = devm_add_action_or_reset(priv->dev, devm_device_action, priv); + KUNIT_ASSERT_EQ(test, ret, 0); + + platform_device_unregister(pdev); + + ret = wait_event_interruptible_timeout(priv->release_wq, priv->release_done, + msecs_to_jiffies(RELEASE_TIMEOUT_MS)); + KUNIT_EXPECT_GT(test, ret, 0); + + platform_driver_unregister(&fake_driver); +} + +/* + * Tests that a platform bus, probed device will run its device-managed + * actions when unregistered, even if someone still holds a reference to + * it. + */ +static void probed_platform_device_devm_register_get_unregister_with_devm_test(struct kunit *test) +{ + struct platform_device *pdev; + struct test_priv *priv = test->priv; + int ret; + + ret = platform_driver_register(&fake_driver); + KUNIT_ASSERT_EQ(test, ret, 0); + + pdev = platform_device_alloc(DEVICE_NAME, PLATFORM_DEVID_NONE); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, pdev); + + priv->dev = &pdev->dev; + platform_set_drvdata(pdev, priv); + + ret = platform_device_add(pdev); + KUNIT_ASSERT_EQ(test, ret, 0); + + ret = wait_event_interruptible_timeout(priv->probe_wq, priv->probe_done, + msecs_to_jiffies(RELEASE_TIMEOUT_MS)); + KUNIT_ASSERT_GT(test, ret, 0); + + get_device(priv->dev); + + ret = devm_add_action_or_reset(priv->dev, devm_put_device_action, priv); + KUNIT_ASSERT_EQ(test, ret, 0); + + platform_device_unregister(pdev); + + ret = wait_event_interruptible_timeout(priv->release_wq, priv->release_done, + msecs_to_jiffies(RELEASE_TIMEOUT_MS)); + KUNIT_EXPECT_GT(test, ret, 0); + + platform_driver_unregister(&fake_driver); +} + +static struct kunit_case platform_device_devm_tests[] = { + KUNIT_CASE(platform_device_devm_register_unregister_test), + KUNIT_CASE(platform_device_devm_register_get_unregister_with_devm_test), + KUNIT_CASE(probed_platform_device_devm_register_unregister_test), + KUNIT_CASE(probed_platform_device_devm_register_get_unregister_with_devm_test), + {} +}; + +static struct kunit_suite platform_device_devm_test_suite = { + .name = "platform-device-devm", + .init = platform_device_devm_init, + .test_cases = platform_device_devm_tests, +}; + +kunit_test_suite(platform_device_devm_test_suite); + +MODULE_DESCRIPTION("Test module for platform devices"); +MODULE_AUTHOR("Maxime Ripard "); +MODULE_LICENSE("GPL"); diff --git a/drivers/base/test/root-device-test.c b/drivers/base/test/root-device-test.c new file mode 100644 index 000000000000..9aea23c9123e --- /dev/null +++ b/drivers/base/test/root-device-test.c @@ -0,0 +1,112 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright 2023 Maxime Ripard + +#include + +#include + +#define DEVICE_NAME "test" + +struct test_priv { + bool probe_done; + bool release_done; + wait_queue_head_t release_wq; + struct device *dev; +}; + +static int root_device_devm_init(struct kunit *test) +{ + struct test_priv *priv; + + priv = kunit_kzalloc(test, sizeof(*priv), GFP_KERNEL); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, priv); + init_waitqueue_head(&priv->release_wq); + + test->priv = priv; + + return 0; +} + +static void devm_device_action(void *ptr) +{ + struct test_priv *priv = ptr; + + priv->release_done = true; + wake_up_interruptible(&priv->release_wq); +} + +#define RELEASE_TIMEOUT_MS 100 + +/* + * Tests that a bus-less, non-probed device will run its device-managed + * actions when unregistered. + */ +static void root_device_devm_register_unregister_test(struct kunit *test) +{ + struct test_priv *priv = test->priv; + int ret; + + priv->dev = root_device_register(DEVICE_NAME); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, priv->dev); + + ret = devm_add_action_or_reset(priv->dev, devm_device_action, priv); + KUNIT_ASSERT_EQ(test, ret, 0); + + root_device_unregister(priv->dev); + + ret = wait_event_interruptible_timeout(priv->release_wq, priv->release_done, + msecs_to_jiffies(RELEASE_TIMEOUT_MS)); + KUNIT_EXPECT_GT(test, ret, 0); +} + +static void devm_put_device_action(void *ptr) +{ + struct test_priv *priv = ptr; + + put_device(priv->dev); + priv->release_done = true; + wake_up_interruptible(&priv->release_wq); +} + +/* + * Tests that a bus-less, non-probed device will run its device-managed + * actions when unregistered, even if someone still holds a reference to + * it. + */ +static void root_device_devm_register_get_unregister_with_devm_test(struct kunit *test) +{ + struct test_priv *priv = test->priv; + int ret; + + priv->dev = root_device_register(DEVICE_NAME); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, priv->dev); + + get_device(priv->dev); + + ret = devm_add_action_or_reset(priv->dev, devm_put_device_action, priv); + KUNIT_ASSERT_EQ(test, ret, 0); + + root_device_unregister(priv->dev); + + ret = wait_event_interruptible_timeout(priv->release_wq, priv->release_done, + msecs_to_jiffies(RELEASE_TIMEOUT_MS)); + KUNIT_EXPECT_GT(test, ret, 0); +} + +static struct kunit_case root_device_devm_tests[] = { + KUNIT_CASE(root_device_devm_register_unregister_test), + KUNIT_CASE(root_device_devm_register_get_unregister_with_devm_test), + {} +}; + +static struct kunit_suite root_device_devm_test_suite = { + .name = "root-device-devm", + .init = root_device_devm_init, + .test_cases = root_device_devm_tests, +}; + +kunit_test_suite(root_device_devm_test_suite); + +MODULE_DESCRIPTION("Test module for root devices"); +MODULE_AUTHOR("Maxime Ripard "); +MODULE_LICENSE("GPL"); diff --git a/drivers/base/test/test_async_driver_probe.c b/drivers/base/test/test_async_driver_probe.c index 929410d0dd6f..3465800baa6c 100644 --- a/drivers/base/test/test_async_driver_probe.c +++ b/drivers/base/test/test_async_driver_probe.c @@ -84,7 +84,7 @@ test_platform_device_register_node(char *name, int id, int nid) pdev = platform_device_alloc(name, id); if (!pdev) - return NULL; + return ERR_PTR(-ENOMEM); if (nid != NUMA_NO_NODE) set_dev_node(&pdev->dev, nid); diff --git a/drivers/bluetooth/hci_ldisc.c b/drivers/bluetooth/hci_ldisc.c index a76eb98c0047..a26367e9fb19 100644 --- a/drivers/bluetooth/hci_ldisc.c +++ b/drivers/bluetooth/hci_ldisc.c @@ -599,7 +599,7 @@ static void hci_uart_tty_wakeup(struct tty_struct *tty) * Return Value: None */ static void hci_uart_tty_receive(struct tty_struct *tty, const u8 *data, - const char *flags, int count) + const u8 *flags, size_t count) { struct hci_uart *hu = tty->disc_data; @@ -807,20 +807,14 @@ static int hci_uart_tty_ioctl(struct tty_struct *tty, unsigned int cmd, * We don't provide read/write/poll interface for user space. */ static ssize_t hci_uart_tty_read(struct tty_struct *tty, struct file *file, - unsigned char *buf, size_t nr, - void **cookie, unsigned long offset) + u8 *buf, size_t nr, void **cookie, + unsigned long offset) { return 0; } static ssize_t hci_uart_tty_write(struct tty_struct *tty, struct file *file, - const unsigned char *data, size_t count) -{ - return 0; -} - -static __poll_t hci_uart_tty_poll(struct tty_struct *tty, - struct file *filp, poll_table *wait) + const u8 *data, size_t count) { return 0; } @@ -835,7 +829,6 @@ static struct tty_ldisc_ops hci_uart_ldisc = { .write = hci_uart_tty_write, .ioctl = hci_uart_tty_ioctl, .compat_ioctl = hci_uart_tty_ioctl, - .poll = hci_uart_tty_poll, .receive_buf = hci_uart_tty_receive, .write_wakeup = hci_uart_tty_wakeup, }; diff --git a/drivers/bus/mhi/host/boot.c b/drivers/bus/mhi/host/boot.c index d2a19b07ccb8..edc0ec5a0933 100644 --- a/drivers/bus/mhi/host/boot.c +++ b/drivers/bus/mhi/host/boot.c @@ -365,12 +365,10 @@ error_alloc_mhi_buf: } static void mhi_firmware_copy(struct mhi_controller *mhi_cntrl, - const struct firmware *firmware, + const u8 *buf, size_t remainder, struct image_info *img_info) { - size_t remainder = firmware->size; size_t to_cpy; - const u8 *buf = firmware->data; struct mhi_buf *mhi_buf = img_info->mhi_buf; struct bhi_vec_entry *bhi_vec = img_info->bhi_vec; @@ -393,9 +391,10 @@ void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl) struct device *dev = &mhi_cntrl->mhi_dev->dev; enum mhi_pm_state new_state; const char *fw_name; + const u8 *fw_data; void *buf; dma_addr_t dma_addr; - size_t size; + size_t size, fw_sz; int i, ret; if (MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state)) { @@ -425,6 +424,20 @@ void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl) fw_name = (mhi_cntrl->ee == MHI_EE_EDL) ? mhi_cntrl->edl_image : mhi_cntrl->fw_image; + /* check if the driver has already provided the firmware data */ + if (!fw_name && mhi_cntrl->fbc_download && + mhi_cntrl->fw_data && mhi_cntrl->fw_sz) { + if (!mhi_cntrl->sbl_size) { + dev_err(dev, "fw_data provided but no sbl_size\n"); + goto error_fw_load; + } + + size = mhi_cntrl->sbl_size; + fw_data = mhi_cntrl->fw_data; + fw_sz = mhi_cntrl->fw_sz; + goto skip_req_fw; + } + if (!fw_name || (mhi_cntrl->fbc_download && (!mhi_cntrl->sbl_size || !mhi_cntrl->seg_len))) { dev_err(dev, @@ -444,6 +457,10 @@ void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl) if (size > firmware->size) size = firmware->size; + fw_data = firmware->data; + fw_sz = firmware->size; + +skip_req_fw: buf = dma_alloc_coherent(mhi_cntrl->cntrl_dev, size, &dma_addr, GFP_KERNEL); if (!buf) { @@ -452,7 +469,7 @@ void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl) } /* Download image using BHI */ - memcpy(buf, firmware->data, size); + memcpy(buf, fw_data, size); ret = mhi_fw_load_bhi(mhi_cntrl, dma_addr, size); dma_free_coherent(mhi_cntrl->cntrl_dev, size, buf, dma_addr); @@ -464,7 +481,7 @@ void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl) } /* Wait for ready since EDL image was loaded */ - if (fw_name == mhi_cntrl->edl_image) { + if (fw_name && fw_name == mhi_cntrl->edl_image) { release_firmware(firmware); goto fw_load_ready_state; } @@ -478,15 +495,14 @@ void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl) * device transitioning into MHI READY state */ if (mhi_cntrl->fbc_download) { - ret = mhi_alloc_bhie_table(mhi_cntrl, &mhi_cntrl->fbc_image, - firmware->size); + ret = mhi_alloc_bhie_table(mhi_cntrl, &mhi_cntrl->fbc_image, fw_sz); if (ret) { release_firmware(firmware); goto error_fw_load; } /* Load the firmware into BHIE vec table */ - mhi_firmware_copy(mhi_cntrl, firmware, mhi_cntrl->fbc_image); + mhi_firmware_copy(mhi_cntrl, fw_data, fw_sz, mhi_cntrl->fbc_image); } release_firmware(firmware); diff --git a/drivers/bus/mhi/host/init.c b/drivers/bus/mhi/host/init.c index f72fcb66f408..f78aefd2d7a3 100644 --- a/drivers/bus/mhi/host/init.c +++ b/drivers/bus/mhi/host/init.c @@ -759,7 +759,7 @@ static int parse_ch_cfg(struct mhi_controller *mhi_cntrl, * so to avoid any memory possible allocation failures, vzalloc is * used here */ - mhi_cntrl->mhi_chan = vzalloc(mhi_cntrl->max_chan * + mhi_cntrl->mhi_chan = vcalloc(mhi_cntrl->max_chan, sizeof(*mhi_cntrl->mhi_chan)); if (!mhi_cntrl->mhi_chan) return -ENOMEM; diff --git a/drivers/bus/mhi/host/main.c b/drivers/bus/mhi/host/main.c index 74a75439c713..dcf627b36e82 100644 --- a/drivers/bus/mhi/host/main.c +++ b/drivers/bus/mhi/host/main.c @@ -938,7 +938,6 @@ int mhi_process_ctrl_ev_ring(struct mhi_controller *mhi_cntrl, if (!mhi_chan->configured) break; parse_xfer_event(mhi_cntrl, local_rp, mhi_chan); - event_quota--; } break; default: diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_generic.c index db0a0b062d8e..08f3f039dbdd 100644 --- a/drivers/bus/mhi/host/pci_generic.c +++ b/drivers/bus/mhi/host/pci_generic.c @@ -212,6 +212,19 @@ struct mhi_pci_dev_info { .offload_channel = false, \ } +#define MHI_EVENT_CONFIG_SW_DATA(ev_ring, el_count) \ + { \ + .num_elements = el_count, \ + .irq_moderation_ms = 0, \ + .irq = (ev_ring) + 1, \ + .priority = 1, \ + .mode = MHI_DB_BRST_DISABLE, \ + .data_type = MHI_ER_DATA, \ + .hardware_event = false, \ + .client_managed = false, \ + .offload_channel = false, \ + } + #define MHI_EVENT_CONFIG_HW_DATA(ev_ring, el_count, ch_num) \ { \ .num_elements = el_count, \ @@ -237,8 +250,10 @@ static const struct mhi_channel_config modem_qcom_v1_mhi_channels[] = { MHI_CHANNEL_CONFIG_DL_AUTOQUEUE(21, "IPCR", 8, 0), MHI_CHANNEL_CONFIG_UL_FP(34, "FIREHOSE", 32, 0), MHI_CHANNEL_CONFIG_DL_FP(35, "FIREHOSE", 32, 0), - MHI_CHANNEL_CONFIG_HW_UL(100, "IP_HW0", 128, 2), - MHI_CHANNEL_CONFIG_HW_DL(101, "IP_HW0", 128, 3), + MHI_CHANNEL_CONFIG_UL(46, "IP_SW0", 64, 2), + MHI_CHANNEL_CONFIG_DL(47, "IP_SW0", 64, 3), + MHI_CHANNEL_CONFIG_HW_UL(100, "IP_HW0", 128, 4), + MHI_CHANNEL_CONFIG_HW_DL(101, "IP_HW0", 128, 5), }; static struct mhi_event_config modem_qcom_v1_mhi_events[] = { @@ -246,9 +261,12 @@ static struct mhi_event_config modem_qcom_v1_mhi_events[] = { MHI_EVENT_CONFIG_CTRL(0, 64), /* DIAG dedicated event ring */ MHI_EVENT_CONFIG_DATA(1, 128), + /* Software channels dedicated event ring */ + MHI_EVENT_CONFIG_SW_DATA(2, 64), + MHI_EVENT_CONFIG_SW_DATA(3, 64), /* Hardware channels request dedicated hardware event rings */ - MHI_EVENT_CONFIG_HW_DATA(2, 1024, 100), - MHI_EVENT_CONFIG_HW_DATA(3, 2048, 101) + MHI_EVENT_CONFIG_HW_DATA(4, 1024, 100), + MHI_EVENT_CONFIG_HW_DATA(5, 2048, 101) }; static const struct mhi_controller_config modem_qcom_v1_mhiv_config = { @@ -334,6 +352,16 @@ static const struct mhi_pci_dev_info mhi_quectel_em1xx_info = { .sideband_wake = true, }; +static const struct mhi_pci_dev_info mhi_quectel_rm5xx_info = { + .name = "quectel-rm5xx", + .edl = "qcom/prog_firehose_sdx6x.elf", + .config = &modem_quectel_em1xx_config, + .bar_num = MHI_PCI_DEFAULT_BAR_NUM, + .dma_data_width = 32, + .mru_default = 32768, + .sideband_wake = true, +}; + static const struct mhi_channel_config mhi_foxconn_sdx55_channels[] = { MHI_CHANNEL_CONFIG_UL(0, "LOOPBACK", 32, 0), MHI_CHANNEL_CONFIG_DL(1, "LOOPBACK", 32, 0), @@ -567,12 +595,23 @@ static const struct pci_device_id mhi_pci_id_table[] = { /* Telit FN990 */ { PCI_DEVICE_SUB(PCI_VENDOR_ID_QCOM, 0x0308, 0x1c5d, 0x2010), .driver_data = (kernel_ulong_t) &mhi_telit_fn990_info }, + /* Telit FE990 */ + { PCI_DEVICE_SUB(PCI_VENDOR_ID_QCOM, 0x0308, 0x1c5d, 0x2015), + .driver_data = (kernel_ulong_t) &mhi_telit_fn990_info }, { PCI_DEVICE(PCI_VENDOR_ID_QCOM, 0x0308), .driver_data = (kernel_ulong_t) &mhi_qcom_sdx65_info }, { PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x1001), /* EM120R-GL (sdx24) */ .driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info }, { PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x1002), /* EM160R-GL (sdx24) */ .driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info }, + /* RM520N-GL (sdx6x), eSIM */ + { PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x1004), + .driver_data = (kernel_ulong_t) &mhi_quectel_rm5xx_info }, + /* RM520N-GL (sdx6x), Lenovo variant */ + { PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x1007), + .driver_data = (kernel_ulong_t) &mhi_quectel_rm5xx_info }, + { PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x100d), /* EM160R-GL (sdx24) */ + .driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info }, { PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x2001), /* EM120R-GL for FCCL (sdx24) */ .driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info }, /* T99W175 (sdx55), Both for eSIM and Non-eSIM */ @@ -605,6 +644,12 @@ static const struct pci_device_id mhi_pci_id_table[] = { /* T99W510 (sdx24), variant 3 */ { PCI_DEVICE(PCI_VENDOR_ID_FOXCONN, 0xe0f2), .driver_data = (kernel_ulong_t) &mhi_foxconn_sdx24_info }, + /* DW5932e-eSIM (sdx62), With eSIM */ + { PCI_DEVICE(PCI_VENDOR_ID_FOXCONN, 0xe0f5), + .driver_data = (kernel_ulong_t) &mhi_foxconn_sdx65_info }, + /* DW5932e (sdx62), Non-eSIM */ + { PCI_DEVICE(PCI_VENDOR_ID_FOXCONN, 0xe0f9), + .driver_data = (kernel_ulong_t) &mhi_foxconn_sdx65_info }, /* MV31-W (Cinterion) */ { PCI_DEVICE(PCI_VENDOR_ID_THALES, 0x00b3), .driver_data = (kernel_ulong_t) &mhi_mv31_info }, diff --git a/drivers/bus/mhi/host/pm.c b/drivers/bus/mhi/host/pm.c index 083459028a4b..8a4362d75fc4 100644 --- a/drivers/bus/mhi/host/pm.c +++ b/drivers/bus/mhi/host/pm.c @@ -470,6 +470,10 @@ static void mhi_pm_disable_transition(struct mhi_controller *mhi_cntrl) /* Trigger MHI RESET so that the device will not access host memory */ if (!MHI_PM_IN_FATAL_STATE(mhi_cntrl->pm_state)) { + /* Skip MHI RESET if in RDDM state */ + if (mhi_cntrl->rddm_image && mhi_get_exec_env(mhi_cntrl) == MHI_EE_RDDM) + goto skip_mhi_reset; + dev_dbg(dev, "Triggering MHI Reset in device\n"); mhi_set_mhi_state(mhi_cntrl, MHI_STATE_RESET); @@ -495,6 +499,7 @@ static void mhi_pm_disable_transition(struct mhi_controller *mhi_cntrl) } } +skip_mhi_reset: dev_dbg(dev, "Waiting for all pending event ring processing to complete\n"); mhi_event = mhi_cntrl->mhi_event; diff --git a/drivers/cdx/controller/cdx_controller.c b/drivers/cdx/controller/cdx_controller.c index dc52f95f8978..bb4ae7970e21 100644 --- a/drivers/cdx/controller/cdx_controller.c +++ b/drivers/cdx/controller/cdx_controller.c @@ -5,7 +5,8 @@ * Copyright (C) 2022-2023, Advanced Micro Devices, Inc. */ -#include +#include +#include #include #include diff --git a/drivers/cdx/controller/cdx_rpmsg.c b/drivers/cdx/controller/cdx_rpmsg.c index f37e639d6ce3..04b578a0be17 100644 --- a/drivers/cdx/controller/cdx_rpmsg.c +++ b/drivers/cdx/controller/cdx_rpmsg.c @@ -7,7 +7,8 @@ #include #include -#include +#include +#include #include #include diff --git a/drivers/char/agp/uninorth-agp.c b/drivers/char/agp/uninorth-agp.c index 62de7f4ba864..84411b13c49f 100644 --- a/drivers/char/agp/uninorth-agp.c +++ b/drivers/char/agp/uninorth-agp.c @@ -3,6 +3,7 @@ * UniNorth AGPGART routines. */ #include +#include #include #include #include diff --git a/drivers/char/bsr.c b/drivers/char/bsr.c index 12143854aeac..70d31aed9011 100644 --- a/drivers/char/bsr.c +++ b/drivers/char/bsr.c @@ -6,11 +6,10 @@ * Author: Sonny Rao */ +#include #include #include #include -#include -#include #include #include #include diff --git a/drivers/char/tpm/tpm-chip.c b/drivers/char/tpm/tpm-chip.c index ea6b4013bc38..23f6f2eda84c 100644 --- a/drivers/char/tpm/tpm-chip.c +++ b/drivers/char/tpm/tpm-chip.c @@ -28,8 +28,13 @@ DEFINE_IDR(dev_nums_idr); static DEFINE_MUTEX(idr_lock); -struct class *tpm_class; -struct class *tpmrm_class; +const struct class tpm_class = { + .name = "tpm", + .shutdown_pre = tpm_class_shutdown, +}; +const struct class tpmrm_class = { + .name = "tmprm", +}; dev_t tpm_devt; static int tpm_request_locality(struct tpm_chip *chip) @@ -336,7 +341,7 @@ struct tpm_chip *tpm_chip_alloc(struct device *pdev, device_initialize(&chip->dev); - chip->dev.class = tpm_class; + chip->dev.class = &tpm_class; chip->dev.release = tpm_dev_release; chip->dev.parent = pdev; chip->dev.groups = chip->groups; diff --git a/drivers/char/tpm/tpm-interface.c b/drivers/char/tpm/tpm-interface.c index 586ca10b0d72..66b16d26eecc 100644 --- a/drivers/char/tpm/tpm-interface.c +++ b/drivers/char/tpm/tpm-interface.c @@ -476,18 +476,15 @@ static int __init tpm_init(void) { int rc; - tpm_class = class_create("tpm"); - if (IS_ERR(tpm_class)) { + rc = class_register(&tpm_class); + if (rc) { pr_err("couldn't create tpm class\n"); - return PTR_ERR(tpm_class); + return rc; } - tpm_class->shutdown_pre = tpm_class_shutdown; - - tpmrm_class = class_create("tpmrm"); - if (IS_ERR(tpmrm_class)) { + rc = class_register(&tpmrm_class); + if (rc) { pr_err("couldn't create tpmrm class\n"); - rc = PTR_ERR(tpmrm_class); goto out_destroy_tpm_class; } @@ -508,9 +505,9 @@ static int __init tpm_init(void) out_unreg_chrdev: unregister_chrdev_region(tpm_devt, 2 * TPM_NUM_DEVICES); out_destroy_tpmrm_class: - class_destroy(tpmrm_class); + class_unregister(&tpmrm_class); out_destroy_tpm_class: - class_destroy(tpm_class); + class_unregister(&tpm_class); return rc; } @@ -518,8 +515,8 @@ out_destroy_tpm_class: static void __exit tpm_exit(void) { idr_destroy(&dev_nums_idr); - class_destroy(tpm_class); - class_destroy(tpmrm_class); + class_unregister(&tpm_class); + class_unregister(&tpmrm_class); unregister_chrdev_region(tpm_devt, 2*TPM_NUM_DEVICES); tpm_dev_common_exit(); } diff --git a/drivers/char/tpm/tpm.h b/drivers/char/tpm/tpm.h index 460bb85dd142..61445f1dc46d 100644 --- a/drivers/char/tpm/tpm.h +++ b/drivers/char/tpm/tpm.h @@ -230,8 +230,8 @@ enum tpm2_pt_props { * compiler warnings about stack frame size. */ #define TPM_MAX_RNG_DATA 128 -extern struct class *tpm_class; -extern struct class *tpmrm_class; +extern const struct class tpm_class; +extern const struct class tpmrm_class; extern dev_t tpm_devt; extern const struct file_operations tpm_fops; extern const struct file_operations tpmrm_fops; diff --git a/drivers/char/tpm/tpm2-space.c b/drivers/char/tpm/tpm2-space.c index ffb35f0154c1..363afdd4d1d3 100644 --- a/drivers/char/tpm/tpm2-space.c +++ b/drivers/char/tpm/tpm2-space.c @@ -606,7 +606,7 @@ int tpm_devs_add(struct tpm_chip *chip) device_initialize(&chip->devs); chip->devs.parent = chip->dev.parent; - chip->devs.class = tpmrm_class; + chip->devs.class = &tpmrm_class; /* * Get extra reference on main device to hold on behalf of devs. diff --git a/drivers/char/ttyprintk.c b/drivers/char/ttyprintk.c index ed45d04905c2..5af804c17a75 100644 --- a/drivers/char/ttyprintk.c +++ b/drivers/char/ttyprintk.c @@ -51,7 +51,7 @@ static void tpk_flush(void) } } -static int tpk_printk(const unsigned char *buf, int count) +static int tpk_printk(const u8 *buf, int count) { int i; @@ -103,8 +103,7 @@ static void tpk_close(struct tty_struct *tty, struct file *filp) /* * TTY operations write function. */ -static int tpk_write(struct tty_struct *tty, - const unsigned char *buf, int count) +static ssize_t tpk_write(struct tty_struct *tty, const u8 *buf, size_t count) { struct ttyprintk_port *tpkp = tty->driver_data; unsigned long flags; diff --git a/drivers/char/xillybus/Kconfig b/drivers/char/xillybus/Kconfig index a8036dad437e..f51d533390a9 100644 --- a/drivers/char/xillybus/Kconfig +++ b/drivers/char/xillybus/Kconfig @@ -29,7 +29,7 @@ config XILLYBUS_PCIE config XILLYBUS_OF tristate "Xillybus over Device Tree" - depends on OF && HAS_DMA + depends on OF && HAS_DMA && HAS_IOMEM help Set to M if you want Xillybus to find its resources from the Open Firmware Flattened Device Tree. If the target is an embedded diff --git a/drivers/counter/microchip-tcb-capture.c b/drivers/counter/microchip-tcb-capture.c index e2d1dc6ca668..975e431d1590 100644 --- a/drivers/counter/microchip-tcb-capture.c +++ b/drivers/counter/microchip-tcb-capture.c @@ -10,7 +10,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/counter/rz-mtu3-cnt.c b/drivers/counter/rz-mtu3-cnt.c index 48c83933aa2f..ee821493b166 100644 --- a/drivers/counter/rz-mtu3-cnt.c +++ b/drivers/counter/rz-mtu3-cnt.c @@ -500,8 +500,8 @@ static int rz_mtu3_count_enable_write(struct counter_device *counter, int ret = 0; if (enable) { - pm_runtime_get_sync(ch->dev); mutex_lock(&priv->lock); + pm_runtime_get_sync(ch->dev); ret = rz_mtu3_initialize_counter(counter, count->id); if (ret == 0) priv->count_is_enabled[count->id] = true; @@ -510,8 +510,8 @@ static int rz_mtu3_count_enable_write(struct counter_device *counter, mutex_lock(&priv->lock); rz_mtu3_terminate_counter(counter, count->id); priv->count_is_enabled[count->id] = false; - mutex_unlock(&priv->lock); pm_runtime_put(ch->dev); + mutex_unlock(&priv->lock); } return ret; diff --git a/drivers/extcon/Kconfig b/drivers/extcon/Kconfig index 0ef1971d22bb..8de9023c2a38 100644 --- a/drivers/extcon/Kconfig +++ b/drivers/extcon/Kconfig @@ -62,6 +62,7 @@ config EXTCON_INTEL_CHT_WC tristate "Intel Cherrytrail Whiskey Cove PMIC extcon driver" depends on INTEL_SOC_PMIC_CHTWC depends on USB_SUPPORT + depends on POWER_SUPPLY select USB_ROLE_SWITCH help Say Y here to enable extcon support for charger detection / control diff --git a/drivers/firmware/google/Kconfig b/drivers/firmware/google/Kconfig index 1bc7cbf2f65d..41b78f5cb735 100644 --- a/drivers/firmware/google/Kconfig +++ b/drivers/firmware/google/Kconfig @@ -59,7 +59,7 @@ config GOOGLE_MEMCONSOLE_X86_LEGACY config GOOGLE_FRAMEBUFFER_COREBOOT tristate "Coreboot Framebuffer" - depends on FB_SIMPLE + depends on FB_SIMPLE || DRM_SIMPLEDRM depends on GOOGLE_COREBOOT_TABLE help This option enables the kernel to search for a framebuffer in diff --git a/drivers/firmware/stratix10-rsu.c b/drivers/firmware/stratix10-rsu.c index ab3074705380..4f7a7abada48 100644 --- a/drivers/firmware/stratix10-rsu.c +++ b/drivers/firmware/stratix10-rsu.c @@ -33,6 +33,10 @@ #define INVALID_RETRY_COUNTER 0xFF #define INVALID_DCMF_VERSION 0xFF #define INVALID_DCMF_STATUS 0xFFFFFFFF +#define INVALID_SPT_ADDRESS 0x0 + +#define RSU_GET_SPT_CMD 0x5A +#define RSU_GET_SPT_RESP_LEN (4 * sizeof(unsigned int)) typedef void (*rsu_callback)(struct stratix10_svc_client *client, struct stratix10_svc_cb_data *data); @@ -58,6 +62,9 @@ typedef void (*rsu_callback)(struct stratix10_svc_client *client, * @dcmf_status.dcmf3: dcmf3 status * @retry_counter: the current image's retry counter * @max_retry: the preset max retry value + * @spt0_address: address of spt0 + * @spt1_address: address of spt1 + * @get_spt_response_buf: response from sdm for get_spt command */ struct stratix10_rsu_priv { struct stratix10_svc_chan *chan; @@ -89,6 +96,11 @@ struct stratix10_rsu_priv { unsigned int retry_counter; unsigned int max_retry; + + unsigned long spt0_address; + unsigned long spt1_address; + + unsigned int *get_spt_response_buf; }; /** @@ -258,6 +270,36 @@ static void rsu_dcmf_status_callback(struct stratix10_svc_client *client, complete(&priv->completion); } +static void rsu_get_spt_callback(struct stratix10_svc_client *client, + struct stratix10_svc_cb_data *data) +{ + struct stratix10_rsu_priv *priv = client->priv; + unsigned long *mbox_err = (unsigned long *)data->kaddr1; + unsigned long *resp_len = (unsigned long *)data->kaddr2; + + if (data->status != BIT(SVC_STATUS_OK) || (*mbox_err) || + (*resp_len != RSU_GET_SPT_RESP_LEN)) + goto error; + + priv->spt0_address = priv->get_spt_response_buf[0]; + priv->spt0_address <<= 32; + priv->spt0_address |= priv->get_spt_response_buf[1]; + + priv->spt1_address = priv->get_spt_response_buf[2]; + priv->spt1_address <<= 32; + priv->spt1_address |= priv->get_spt_response_buf[3]; + + goto complete; + +error: + dev_err(client->dev, "failed to get SPTs\n"); + +complete: + stratix10_svc_free_memory(priv->chan, priv->get_spt_response_buf); + priv->get_spt_response_buf = NULL; + complete(&priv->completion); +} + /** * rsu_send_msg() - send a message to Intel service layer * @priv: pointer to rsu private data @@ -287,6 +329,14 @@ static int rsu_send_msg(struct stratix10_rsu_priv *priv, if (arg) msg.arg[0] = arg; + if (command == COMMAND_MBOX_SEND_CMD) { + msg.arg[1] = 0; + msg.payload = NULL; + msg.payload_length = 0; + msg.payload_output = priv->get_spt_response_buf; + msg.payload_length_output = RSU_GET_SPT_RESP_LEN; + } + ret = stratix10_svc_send(priv->chan, &msg); if (ret < 0) goto status_done; @@ -571,6 +621,34 @@ static ssize_t notify_store(struct device *dev, return count; } +static ssize_t spt0_address_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct stratix10_rsu_priv *priv = dev_get_drvdata(dev); + + if (!priv) + return -ENODEV; + + if (priv->spt0_address == INVALID_SPT_ADDRESS) + return -EIO; + + return scnprintf(buf, PAGE_SIZE, "0x%08lx\n", priv->spt0_address); +} + +static ssize_t spt1_address_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct stratix10_rsu_priv *priv = dev_get_drvdata(dev); + + if (!priv) + return -ENODEV; + + if (priv->spt1_address == INVALID_SPT_ADDRESS) + return -EIO; + + return scnprintf(buf, PAGE_SIZE, "0x%08lx\n", priv->spt1_address); +} + static DEVICE_ATTR_RO(current_image); static DEVICE_ATTR_RO(fail_image); static DEVICE_ATTR_RO(state); @@ -589,6 +667,8 @@ static DEVICE_ATTR_RO(dcmf2_status); static DEVICE_ATTR_RO(dcmf3_status); static DEVICE_ATTR_WO(reboot_image); static DEVICE_ATTR_WO(notify); +static DEVICE_ATTR_RO(spt0_address); +static DEVICE_ATTR_RO(spt1_address); static struct attribute *rsu_attrs[] = { &dev_attr_current_image.attr, @@ -609,6 +689,8 @@ static struct attribute *rsu_attrs[] = { &dev_attr_dcmf3_status.attr, &dev_attr_reboot_image.attr, &dev_attr_notify.attr, + &dev_attr_spt0_address.attr, + &dev_attr_spt1_address.attr, NULL }; @@ -638,11 +720,13 @@ static int stratix10_rsu_probe(struct platform_device *pdev) priv->dcmf_version.dcmf1 = INVALID_DCMF_VERSION; priv->dcmf_version.dcmf2 = INVALID_DCMF_VERSION; priv->dcmf_version.dcmf3 = INVALID_DCMF_VERSION; - priv->max_retry = INVALID_RETRY_COUNTER; priv->dcmf_status.dcmf0 = INVALID_DCMF_STATUS; priv->dcmf_status.dcmf1 = INVALID_DCMF_STATUS; priv->dcmf_status.dcmf2 = INVALID_DCMF_STATUS; priv->dcmf_status.dcmf3 = INVALID_DCMF_STATUS; + priv->max_retry = INVALID_RETRY_COUNTER; + priv->spt0_address = INVALID_SPT_ADDRESS; + priv->spt1_address = INVALID_SPT_ADDRESS; mutex_init(&priv->lock); priv->chan = stratix10_svc_request_channel_byname(&priv->client, @@ -692,6 +776,20 @@ static int stratix10_rsu_probe(struct platform_device *pdev) stratix10_svc_free_channel(priv->chan); } + priv->get_spt_response_buf = + stratix10_svc_allocate_memory(priv->chan, RSU_GET_SPT_RESP_LEN); + + if (IS_ERR(priv->get_spt_response_buf)) { + dev_err(dev, "failed to allocate get spt buffer\n"); + } else { + ret = rsu_send_msg(priv, COMMAND_MBOX_SEND_CMD, + RSU_GET_SPT_CMD, rsu_get_spt_callback); + if (ret) { + dev_err(dev, "Error, getting SPT table %i\n", ret); + stratix10_svc_free_channel(priv->chan); + } + } + return ret; } diff --git a/drivers/firmware/stratix10-svc.c b/drivers/firmware/stratix10-svc.c index 2d674126160f..c693da60e9a9 100644 --- a/drivers/firmware/stratix10-svc.c +++ b/drivers/firmware/stratix10-svc.c @@ -37,6 +37,7 @@ #define SVC_NUM_CHANNEL 3 #define FPGA_CONFIG_DATA_CLAIM_TIMEOUT_MS 200 #define FPGA_CONFIG_STATUS_TIMEOUT_SEC 30 +#define BYTE_TO_WORD_SIZE 4 /* stratix10 service layer clients */ #define STRATIX10_RSU "stratix10-rsu" @@ -361,6 +362,13 @@ static void svc_thread_recv_status_ok(struct stratix10_svc_data *p_data, cb_data->kaddr2 = svc_pa_to_va(res.a2); cb_data->kaddr3 = &res.a3; break; + case COMMAND_MBOX_SEND_CMD: + cb_data->status = BIT(SVC_STATUS_OK); + cb_data->kaddr1 = &res.a1; + /* SDM return size in u8. Convert size to u32 word */ + res.a2 = res.a2 * BYTE_TO_WORD_SIZE; + cb_data->kaddr2 = &res.a2; + break; default: pr_warn("it shouldn't happen\n"); break; @@ -534,6 +542,15 @@ static int svc_normal_to_secure_thread(void *data) a1 = 0; a2 = 0; break; + case COMMAND_MBOX_SEND_CMD: + a0 = INTEL_SIP_SMC_MBOX_SEND_CMD; + a1 = pdata->arg[0]; + a2 = (unsigned long)pdata->paddr; + a3 = (unsigned long)pdata->size / BYTE_TO_WORD_SIZE; + a4 = pdata->arg[1]; + a5 = (unsigned long)pdata->paddr_output; + a6 = (unsigned long)pdata->size_output / BYTE_TO_WORD_SIZE; + break; default: pr_warn("it shouldn't happen\n"); break; @@ -597,6 +614,7 @@ static int svc_normal_to_secure_thread(void *data) case COMMAND_FCS_DATA_ENCRYPTION: case COMMAND_FCS_DATA_DECRYPTION: case COMMAND_FCS_RANDOM_NUMBER_GEN: + case COMMAND_MBOX_SEND_CMD: cbdata->status = BIT(SVC_STATUS_INVALID_PARAM); cbdata->kaddr1 = NULL; cbdata->kaddr2 = NULL; @@ -756,7 +774,7 @@ svc_create_memory_pool(struct platform_device *pdev, paddr = begin; size = end - begin; va = devm_memremap(dev, paddr, size, MEMREMAP_WC); - if (!va) { + if (IS_ERR(va)) { dev_err(dev, "fail to remap shared memory\n"); return ERR_PTR(-EINVAL); } diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig index 0a00763b9f28..2f689ac4ba3a 100644 --- a/drivers/fpga/Kconfig +++ b/drivers/fpga/Kconfig @@ -276,4 +276,6 @@ config FPGA_MGR_LATTICE_SYSCONFIG_SPI FPGA manager driver support for Lattice FPGAs programming over slave SPI sysCONFIG interface. +source "drivers/fpga/tests/Kconfig" + endif # FPGA diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile index 72e554b4d2f7..352a2612623e 100644 --- a/drivers/fpga/Makefile +++ b/drivers/fpga/Makefile @@ -55,3 +55,6 @@ obj-$(CONFIG_FPGA_DFL_NIOS_INTEL_PAC_N3000) += dfl-n3000-nios.o # Drivers for FPGAs which implement DFL obj-$(CONFIG_FPGA_DFL_PCI) += dfl-pci.o + +# KUnit tests +obj-$(CONFIG_FPGA_KUNIT_TESTS) += tests/ diff --git a/drivers/fpga/altera-fpga2sdram.c b/drivers/fpga/altera-fpga2sdram.c index ff3a646fd9e3..1fa2ccc321ab 100644 --- a/drivers/fpga/altera-fpga2sdram.c +++ b/drivers/fpga/altera-fpga2sdram.c @@ -27,7 +27,7 @@ #include #include #include -#include +#include #include #define ALT_SDR_CTL_FPGAPORTRST_OFST 0x80 diff --git a/drivers/fpga/altera-freeze-bridge.c b/drivers/fpga/altera-freeze-bridge.c index 445f4b011167..0c3fb8226908 100644 --- a/drivers/fpga/altera-freeze-bridge.c +++ b/drivers/fpga/altera-freeze-bridge.c @@ -7,8 +7,9 @@ #include #include #include -#include +#include #include +#include #include #define FREEZE_CSR_STATUS_OFFSET 0 @@ -198,13 +199,11 @@ static const struct fpga_bridge_ops altera_freeze_br_br_ops = { .enable_show = altera_freeze_br_enable_show, }; -#ifdef CONFIG_OF static const struct of_device_id altera_freeze_br_of_match[] = { { .compatible = "altr,freeze-bridge-controller", }, {}, }; MODULE_DEVICE_TABLE(of, altera_freeze_br_of_match); -#endif static int altera_freeze_br_probe(struct platform_device *pdev) { @@ -213,14 +212,12 @@ static int altera_freeze_br_probe(struct platform_device *pdev) void __iomem *base_addr; struct altera_freeze_br_data *priv; struct fpga_bridge *br; - struct resource *res; u32 status, revision; if (!np) return -ENODEV; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - base_addr = devm_ioremap_resource(dev, res); + base_addr = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(base_addr)) return PTR_ERR(base_addr); @@ -270,7 +267,7 @@ static struct platform_driver altera_freeze_br_driver = { .remove = altera_freeze_br_remove, .driver = { .name = "altera_freeze_br", - .of_match_table = of_match_ptr(altera_freeze_br_of_match), + .of_match_table = altera_freeze_br_of_match, }, }; diff --git a/drivers/fpga/altera-pr-ip-core-plat.c b/drivers/fpga/altera-pr-ip-core-plat.c index b008a6b8d2d3..9dc263930007 100644 --- a/drivers/fpga/altera-pr-ip-core-plat.c +++ b/drivers/fpga/altera-pr-ip-core-plat.c @@ -9,19 +9,16 @@ */ #include #include -#include +#include +#include static int alt_pr_platform_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; void __iomem *reg_base; - struct resource *res; /* First mmio base is for register access */ - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - - reg_base = devm_ioremap_resource(dev, res); - + reg_base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(reg_base)) return PTR_ERR(reg_base); diff --git a/drivers/fpga/dfl-fme-main.c b/drivers/fpga/dfl-fme-main.c index bcb5d34b3b82..3dcf990bd261 100644 --- a/drivers/fpga/dfl-fme-main.c +++ b/drivers/fpga/dfl-fme-main.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include "dfl.h" @@ -231,19 +232,19 @@ static int thermal_hwmon_read(struct device *dev, enum hwmon_sensor_types type, switch (attr) { case hwmon_temp_input: v = readq(feature->ioaddr + FME_THERM_RDSENSOR_FMT1); - *val = (long)(FIELD_GET(FPGA_TEMPERATURE, v) * 1000); + *val = (long)(FIELD_GET(FPGA_TEMPERATURE, v) * MILLI); break; case hwmon_temp_max: v = readq(feature->ioaddr + FME_THERM_THRESHOLD); - *val = (long)(FIELD_GET(TEMP_THRESHOLD1, v) * 1000); + *val = (long)(FIELD_GET(TEMP_THRESHOLD1, v) * MILLI); break; case hwmon_temp_crit: v = readq(feature->ioaddr + FME_THERM_THRESHOLD); - *val = (long)(FIELD_GET(TEMP_THRESHOLD2, v) * 1000); + *val = (long)(FIELD_GET(TEMP_THRESHOLD2, v) * MILLI); break; case hwmon_temp_emergency: v = readq(feature->ioaddr + FME_THERM_THRESHOLD); - *val = (long)(FIELD_GET(TRIP_THRESHOLD, v) * 1000); + *val = (long)(FIELD_GET(TRIP_THRESHOLD, v) * MILLI); break; case hwmon_temp_max_alarm: v = readq(feature->ioaddr + FME_THERM_THRESHOLD); @@ -382,15 +383,15 @@ static int power_hwmon_read(struct device *dev, enum hwmon_sensor_types type, switch (attr) { case hwmon_power_input: v = readq(feature->ioaddr + FME_PWR_STATUS); - *val = (long)(FIELD_GET(PWR_CONSUMED, v) * 1000000); + *val = (long)(FIELD_GET(PWR_CONSUMED, v) * MICRO); break; case hwmon_power_max: v = readq(feature->ioaddr + FME_PWR_THRESHOLD); - *val = (long)(FIELD_GET(PWR_THRESHOLD1, v) * 1000000); + *val = (long)(FIELD_GET(PWR_THRESHOLD1, v) * MICRO); break; case hwmon_power_crit: v = readq(feature->ioaddr + FME_PWR_THRESHOLD); - *val = (long)(FIELD_GET(PWR_THRESHOLD2, v) * 1000000); + *val = (long)(FIELD_GET(PWR_THRESHOLD2, v) * MICRO); break; case hwmon_power_max_alarm: v = readq(feature->ioaddr + FME_PWR_THRESHOLD); @@ -415,7 +416,7 @@ static int power_hwmon_write(struct device *dev, enum hwmon_sensor_types type, int ret = 0; u64 v; - val = clamp_val(val / 1000000, 0, PWR_THRESHOLD_MAX); + val = clamp_val(val / MICRO, 0, PWR_THRESHOLD_MAX); mutex_lock(&pdata->lock); diff --git a/drivers/fpga/dfl-fme-mgr.c b/drivers/fpga/dfl-fme-mgr.c index af0785783b52..ab228d8837a0 100644 --- a/drivers/fpga/dfl-fme-mgr.c +++ b/drivers/fpga/dfl-fme-mgr.c @@ -280,7 +280,6 @@ static int fme_mgr_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct fme_mgr_priv *priv; struct fpga_manager *mgr; - struct resource *res; priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); if (!priv) @@ -290,8 +289,7 @@ static int fme_mgr_probe(struct platform_device *pdev) priv->ioaddr = pdata->ioaddr; if (!priv->ioaddr) { - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - priv->ioaddr = devm_ioremap_resource(dev, res); + priv->ioaddr = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(priv->ioaddr)) return PTR_ERR(priv->ioaddr); } diff --git a/drivers/fpga/dfl-pci.c b/drivers/fpga/dfl-pci.c index 1bc04378118c..98b8fd16183e 100644 --- a/drivers/fpga/dfl-pci.c +++ b/drivers/fpga/dfl-pci.c @@ -156,19 +156,12 @@ static int *cci_pci_create_irq_table(struct pci_dev *pcidev, unsigned int nvec) static int find_dfls_by_vsec(struct pci_dev *pcidev, struct dfl_fpga_enum_info *info) { - u32 bir, offset, vndr_hdr, dfl_cnt, dfl_res; - int dfl_res_off, i, bars, voff = 0; + u32 bir, offset, dfl_cnt, dfl_res; + int dfl_res_off, i, bars, voff; resource_size_t start, len; - while ((voff = pci_find_next_ext_capability(pcidev, voff, PCI_EXT_CAP_ID_VNDR))) { - vndr_hdr = 0; - pci_read_config_dword(pcidev, voff + PCI_VNDR_HEADER, &vndr_hdr); - - if (PCI_VNDR_HEADER_ID(vndr_hdr) == PCI_VSEC_ID_INTEL_DFLS && - pcidev->vendor == PCI_VENDOR_ID_INTEL) - break; - } - + voff = pci_find_vsec_capability(pcidev, PCI_VENDOR_ID_INTEL, + PCI_VSEC_ID_INTEL_DFLS); if (!voff) { dev_dbg(&pcidev->dev, "%s no DFL VSEC found\n", __func__); return -ENODEV; diff --git a/drivers/fpga/fpga-bridge.c b/drivers/fpga/fpga-bridge.c index a6c25dee9cc1..a024be2b84e2 100644 --- a/drivers/fpga/fpga-bridge.c +++ b/drivers/fpga/fpga-bridge.c @@ -14,7 +14,7 @@ #include static DEFINE_IDA(fpga_bridge_ida); -static struct class *fpga_bridge_class; +static const struct class fpga_bridge_class; /* Lock for adding/removing bridges to linked lists*/ static DEFINE_SPINLOCK(bridge_list_lock); @@ -87,19 +87,20 @@ err_dev: /** * of_fpga_bridge_get - get an exclusive reference to an fpga bridge * - * @np: node pointer of an FPGA bridge - * @info: fpga image specific information + * @np: node pointer of an FPGA bridge. + * @info: fpga image specific information. * - * Return fpga_bridge struct if successful. - * Return -EBUSY if someone already has a reference to the bridge. - * Return -ENODEV if @np is not an FPGA Bridge. + * Return: + * * fpga_bridge struct pointer if successful. + * * -EBUSY if someone already has a reference to the bridge. + * * -ENODEV if @np is not an FPGA Bridge or can't take parent driver refcount. */ struct fpga_bridge *of_fpga_bridge_get(struct device_node *np, struct fpga_image_info *info) { struct device *dev; - dev = class_find_device_by_of_node(fpga_bridge_class, np); + dev = class_find_device_by_of_node(&fpga_bridge_class, np); if (!dev) return ERR_PTR(-ENODEV); @@ -126,7 +127,7 @@ struct fpga_bridge *fpga_bridge_get(struct device *dev, { struct device *bridge_dev; - bridge_dev = class_find_device(fpga_bridge_class, NULL, dev, + bridge_dev = class_find_device(&fpga_bridge_class, NULL, dev, fpga_bridge_dev_match); if (!bridge_dev) return ERR_PTR(-ENODEV); @@ -155,9 +156,9 @@ EXPORT_SYMBOL_GPL(fpga_bridge_put); * fpga_bridges_enable - enable bridges in a list * @bridge_list: list of FPGA bridges * - * Enable each bridge in the list. If list is empty, do nothing. + * Enable each bridge in the list. If list is empty, do nothing. * - * Return 0 for success or empty bridge list; return error code otherwise. + * Return: 0 for success or empty bridge list or an error code otherwise. */ int fpga_bridges_enable(struct list_head *bridge_list) { @@ -179,9 +180,9 @@ EXPORT_SYMBOL_GPL(fpga_bridges_enable); * * @bridge_list: list of FPGA bridges * - * Disable each bridge in the list. If list is empty, do nothing. + * Disable each bridge in the list. If list is empty, do nothing. * - * Return 0 for success or empty bridge list; return error code otherwise. + * Return: 0 for success or empty bridge list or an error code otherwise. */ int fpga_bridges_disable(struct list_head *bridge_list) { @@ -230,7 +231,7 @@ EXPORT_SYMBOL_GPL(fpga_bridges_put); * * Get an exclusive reference to the bridge and it to the list. * - * Return 0 for success, error code from of_fpga_bridge_get() otherwise. + * Return: 0 for success, error code from of_fpga_bridge_get() otherwise. */ int of_fpga_bridge_get_to_list(struct device_node *np, struct fpga_image_info *info, @@ -260,7 +261,7 @@ EXPORT_SYMBOL_GPL(of_fpga_bridge_get_to_list); * * Get an exclusive reference to the bridge and it to the list. * - * Return 0 for success, error code from fpga_bridge_get() otherwise. + * Return: 0 for success, error code from fpga_bridge_get() otherwise. */ int fpga_bridge_get_to_list(struct device *dev, struct fpga_image_info *info, @@ -359,7 +360,7 @@ fpga_bridge_register(struct device *parent, const char *name, bridge->priv = priv; bridge->dev.groups = br_ops->groups; - bridge->dev.class = fpga_bridge_class; + bridge->dev.class = &fpga_bridge_class; bridge->dev.parent = parent; bridge->dev.of_node = parent->of_node; bridge->dev.id = id; @@ -415,21 +416,20 @@ static void fpga_bridge_dev_release(struct device *dev) kfree(bridge); } +static const struct class fpga_bridge_class = { + .name = "fpga_bridge", + .dev_groups = fpga_bridge_groups, + .dev_release = fpga_bridge_dev_release, +}; + static int __init fpga_bridge_dev_init(void) { - fpga_bridge_class = class_create("fpga_bridge"); - if (IS_ERR(fpga_bridge_class)) - return PTR_ERR(fpga_bridge_class); - - fpga_bridge_class->dev_groups = fpga_bridge_groups; - fpga_bridge_class->dev_release = fpga_bridge_dev_release; - - return 0; + return class_register(&fpga_bridge_class); } static void __exit fpga_bridge_dev_exit(void) { - class_destroy(fpga_bridge_class); + class_unregister(&fpga_bridge_class); ida_destroy(&fpga_bridge_ida); } diff --git a/drivers/fpga/fpga-mgr.c b/drivers/fpga/fpga-mgr.c index eb583f86a0b9..06651389c592 100644 --- a/drivers/fpga/fpga-mgr.c +++ b/drivers/fpga/fpga-mgr.c @@ -19,7 +19,7 @@ #include static DEFINE_IDA(fpga_mgr_ida); -static struct class *fpga_mgr_class; +static const struct class fpga_mgr_class; struct fpga_mgr_devres { struct fpga_manager *mgr; @@ -693,7 +693,7 @@ static int fpga_mgr_dev_match(struct device *dev, const void *data) */ struct fpga_manager *fpga_mgr_get(struct device *dev) { - struct device *mgr_dev = class_find_device(fpga_mgr_class, NULL, dev, + struct device *mgr_dev = class_find_device(&fpga_mgr_class, NULL, dev, fpga_mgr_dev_match); if (!mgr_dev) return ERR_PTR(-ENODEV); @@ -713,7 +713,7 @@ struct fpga_manager *of_fpga_mgr_get(struct device_node *node) { struct device *dev; - dev = class_find_device_by_of_node(fpga_mgr_class, node); + dev = class_find_device_by_of_node(&fpga_mgr_class, node); if (!dev) return ERR_PTR(-ENODEV); @@ -809,7 +809,7 @@ fpga_mgr_register_full(struct device *parent, const struct fpga_manager_info *in mgr->priv = info->priv; mgr->compat_id = info->compat_id; - mgr->dev.class = fpga_mgr_class; + mgr->dev.class = &fpga_mgr_class; mgr->dev.groups = mops->groups; mgr->dev.parent = parent; mgr->dev.of_node = parent->of_node; @@ -967,23 +967,22 @@ static void fpga_mgr_dev_release(struct device *dev) kfree(mgr); } +static const struct class fpga_mgr_class = { + .name = "fpga_manager", + .dev_groups = fpga_mgr_groups, + .dev_release = fpga_mgr_dev_release, +}; + static int __init fpga_mgr_class_init(void) { pr_info("FPGA manager framework\n"); - fpga_mgr_class = class_create("fpga_manager"); - if (IS_ERR(fpga_mgr_class)) - return PTR_ERR(fpga_mgr_class); - - fpga_mgr_class->dev_groups = fpga_mgr_groups; - fpga_mgr_class->dev_release = fpga_mgr_dev_release; - - return 0; + return class_register(&fpga_mgr_class); } static void __exit fpga_mgr_class_exit(void) { - class_destroy(fpga_mgr_class); + class_unregister(&fpga_mgr_class); ida_destroy(&fpga_mgr_ida); } diff --git a/drivers/fpga/fpga-region.c b/drivers/fpga/fpga-region.c index ccf6fdab1360..b364a929425c 100644 --- a/drivers/fpga/fpga-region.c +++ b/drivers/fpga/fpga-region.c @@ -16,7 +16,7 @@ #include static DEFINE_IDA(fpga_region_ida); -static struct class *fpga_region_class; +static const struct class fpga_region_class; struct fpga_region * fpga_region_class_find(struct device *start, const void *data, @@ -24,7 +24,7 @@ fpga_region_class_find(struct device *start, const void *data, { struct device *dev; - dev = class_find_device(fpga_region_class, start, data, match); + dev = class_find_device(&fpga_region_class, start, data, match); if (!dev) return NULL; @@ -38,9 +38,10 @@ EXPORT_SYMBOL_GPL(fpga_region_class_find); * * Caller should call fpga_region_put() when done with region. * - * Return fpga_region struct if successful. - * Return -EBUSY if someone already has a reference to the region. - * Return -ENODEV if @np is not an FPGA Region. + * Return: + * * fpga_region struct if successful. + * * -EBUSY if someone already has a reference to the region. + * * -ENODEV if can't take parent driver module refcount. */ static struct fpga_region *fpga_region_get(struct fpga_region *region) { @@ -91,7 +92,7 @@ static void fpga_region_put(struct fpga_region *region) * The caller will need to call fpga_bridges_put() before attempting to * reprogram the region. * - * Return 0 for success or negative error code. + * Return: 0 for success or negative error code. */ int fpga_region_program_fpga(struct fpga_region *region) { @@ -216,7 +217,7 @@ fpga_region_register_full(struct device *parent, const struct fpga_region_info * mutex_init(®ion->mutex); INIT_LIST_HEAD(®ion->bridge_list); - region->dev.class = fpga_region_class; + region->dev.class = &fpga_region_class; region->dev.parent = parent; region->dev.of_node = parent->of_node; region->dev.id = id; @@ -287,25 +288,25 @@ static void fpga_region_dev_release(struct device *dev) kfree(region); } +static const struct class fpga_region_class = { + .name = "fpga_region", + .dev_groups = fpga_region_groups, + .dev_release = fpga_region_dev_release, +}; + /** - * fpga_region_init - init function for fpga_region class - * Creates the fpga_region class and registers a reconfig notifier. + * fpga_region_init - creates the fpga_region class. + * + * Return: 0 on success or ERR_PTR() on error. */ static int __init fpga_region_init(void) { - fpga_region_class = class_create("fpga_region"); - if (IS_ERR(fpga_region_class)) - return PTR_ERR(fpga_region_class); - - fpga_region_class->dev_groups = fpga_region_groups; - fpga_region_class->dev_release = fpga_region_dev_release; - - return 0; + return class_register(&fpga_region_class); } static void __exit fpga_region_exit(void) { - class_destroy(fpga_region_class); + class_unregister(&fpga_region_class); ida_destroy(&fpga_region_ida); } diff --git a/drivers/fpga/microchip-spi.c b/drivers/fpga/microchip-spi.c index d6070e7f5205..2a82c726d6e5 100644 --- a/drivers/fpga/microchip-spi.c +++ b/drivers/fpga/microchip-spi.c @@ -8,7 +8,7 @@ #include #include #include -#include +#include #include #define MPF_SPI_ISC_ENABLE 0x0B diff --git a/drivers/fpga/of-fpga-region.c b/drivers/fpga/of-fpga-region.c index ae82532fc127..a6affd83f275 100644 --- a/drivers/fpga/of-fpga-region.c +++ b/drivers/fpga/of-fpga-region.c @@ -12,7 +12,9 @@ #include #include #include +#include #include +#include #include #include diff --git a/drivers/fpga/socfpga-a10.c b/drivers/fpga/socfpga-a10.c index ac8e89b8a5cc..cc4861e345c9 100644 --- a/drivers/fpga/socfpga-a10.c +++ b/drivers/fpga/socfpga-a10.c @@ -471,7 +471,6 @@ static int socfpga_a10_fpga_probe(struct platform_device *pdev) struct a10_fpga_priv *priv; void __iomem *reg_base; struct fpga_manager *mgr; - struct resource *res; int ret; priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); @@ -479,14 +478,12 @@ static int socfpga_a10_fpga_probe(struct platform_device *pdev) return -ENOMEM; /* First mmio base is for register access */ - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - reg_base = devm_ioremap_resource(dev, res); + reg_base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(reg_base)) return PTR_ERR(reg_base); /* Second mmio base is for writing FPGA image data */ - res = platform_get_resource(pdev, IORESOURCE_MEM, 1); - priv->fpga_data_addr = devm_ioremap_resource(dev, res); + priv->fpga_data_addr = devm_platform_ioremap_resource(pdev, 1); if (IS_ERR(priv->fpga_data_addr)) return PTR_ERR(priv->fpga_data_addr); diff --git a/drivers/fpga/socfpga.c b/drivers/fpga/socfpga.c index 7e0741f99696..723ea0ad3f09 100644 --- a/drivers/fpga/socfpga.c +++ b/drivers/fpga/socfpga.c @@ -545,20 +545,17 @@ static int socfpga_fpga_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct socfpga_fpga_priv *priv; struct fpga_manager *mgr; - struct resource *res; int ret; priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); if (!priv) return -ENOMEM; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - priv->fpga_base_addr = devm_ioremap_resource(dev, res); + priv->fpga_base_addr = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(priv->fpga_base_addr)) return PTR_ERR(priv->fpga_base_addr); - res = platform_get_resource(pdev, IORESOURCE_MEM, 1); - priv->fpga_data_addr = devm_ioremap_resource(dev, res); + priv->fpga_data_addr = devm_platform_ioremap_resource(pdev, 1); if (IS_ERR(priv->fpga_data_addr)) return PTR_ERR(priv->fpga_data_addr); diff --git a/drivers/fpga/stratix10-soc.c b/drivers/fpga/stratix10-soc.c index f7f01982a512..cacb9cc5757e 100644 --- a/drivers/fpga/stratix10-soc.c +++ b/drivers/fpga/stratix10-soc.c @@ -10,6 +10,7 @@ #include #include #include +#include /* * FPGA programming requires a higher level of privilege (EL3), per the SoC diff --git a/drivers/fpga/tests/.kunitconfig b/drivers/fpga/tests/.kunitconfig new file mode 100644 index 000000000000..a1c2a2974c39 --- /dev/null +++ b/drivers/fpga/tests/.kunitconfig @@ -0,0 +1,5 @@ +CONFIG_KUNIT=y +CONFIG_FPGA=y +CONFIG_FPGA_REGION=y +CONFIG_FPGA_BRIDGE=y +CONFIG_FPGA_KUNIT_TESTS=y diff --git a/drivers/fpga/tests/Kconfig b/drivers/fpga/tests/Kconfig new file mode 100644 index 000000000000..e4a64815f16d --- /dev/null +++ b/drivers/fpga/tests/Kconfig @@ -0,0 +1,11 @@ +config FPGA_KUNIT_TESTS + tristate "KUnit test for the FPGA subsystem" if !KUNIT_ALL_TESTS + depends on FPGA && FPGA_REGION && FPGA_BRIDGE && KUNIT=y + default KUNIT_ALL_TESTS + help + This builds unit tests for the FPGA subsystem + + For more information on KUnit and unit tests in general, + please refer to the KUnit documentation in Documentation/dev-tools/kunit/. + + If unsure, say N. diff --git a/drivers/fpga/tests/Makefile b/drivers/fpga/tests/Makefile new file mode 100644 index 000000000000..bb78215c645c --- /dev/null +++ b/drivers/fpga/tests/Makefile @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0 +# +# Makefile for KUnit test suites for the FPGA subsystem +# + +obj-$(CONFIG_FPGA_KUNIT_TESTS) += fpga-mgr-test.o fpga-bridge-test.o fpga-region-test.o diff --git a/drivers/fpga/tests/fpga-bridge-test.c b/drivers/fpga/tests/fpga-bridge-test.c new file mode 100644 index 000000000000..1d258002cdd7 --- /dev/null +++ b/drivers/fpga/tests/fpga-bridge-test.c @@ -0,0 +1,175 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * KUnit test for the FPGA Bridge + * + * Copyright (C) 2023 Red Hat, Inc. + * + * Author: Marco Pagani + */ + +#include +#include +#include +#include +#include + +struct bridge_stats { + bool enable; +}; + +struct bridge_ctx { + struct fpga_bridge *bridge; + struct platform_device *pdev; + struct bridge_stats stats; +}; + +static int op_enable_set(struct fpga_bridge *bridge, bool enable) +{ + struct bridge_stats *stats = bridge->priv; + + stats->enable = enable; + + return 0; +} + +/* + * Fake FPGA bridge that implements only the enable_set op to track + * the state. + */ +static const struct fpga_bridge_ops fake_bridge_ops = { + .enable_set = op_enable_set, +}; + +/** + * register_test_bridge() - Register a fake FPGA bridge for testing. + * @test: KUnit test context object. + * + * Return: Context of the newly registered FPGA bridge. + */ +static struct bridge_ctx *register_test_bridge(struct kunit *test) +{ + struct bridge_ctx *ctx; + + ctx = kunit_kzalloc(test, sizeof(*ctx), GFP_KERNEL); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ctx); + + ctx->pdev = platform_device_register_simple("bridge_pdev", PLATFORM_DEVID_AUTO, NULL, 0); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ctx->pdev); + + ctx->bridge = fpga_bridge_register(&ctx->pdev->dev, "Fake FPGA bridge", &fake_bridge_ops, + &ctx->stats); + KUNIT_ASSERT_FALSE(test, IS_ERR_OR_NULL(ctx->bridge)); + + return ctx; +} + +static void unregister_test_bridge(struct bridge_ctx *ctx) +{ + fpga_bridge_unregister(ctx->bridge); + platform_device_unregister(ctx->pdev); +} + +static void fpga_bridge_test_get(struct kunit *test) +{ + struct bridge_ctx *ctx = test->priv; + struct fpga_bridge *bridge; + + bridge = fpga_bridge_get(&ctx->pdev->dev, NULL); + KUNIT_EXPECT_PTR_EQ(test, bridge, ctx->bridge); + + bridge = fpga_bridge_get(&ctx->pdev->dev, NULL); + KUNIT_EXPECT_EQ(test, PTR_ERR(bridge), -EBUSY); + + fpga_bridge_put(ctx->bridge); +} + +static void fpga_bridge_test_toggle(struct kunit *test) +{ + struct bridge_ctx *ctx = test->priv; + int ret; + + ret = fpga_bridge_disable(ctx->bridge); + KUNIT_EXPECT_EQ(test, ret, 0); + KUNIT_EXPECT_FALSE(test, ctx->stats.enable); + + ret = fpga_bridge_enable(ctx->bridge); + KUNIT_EXPECT_EQ(test, ret, 0); + KUNIT_EXPECT_TRUE(test, ctx->stats.enable); +} + +/* Test the functions for getting and controlling a list of bridges */ +static void fpga_bridge_test_get_put_list(struct kunit *test) +{ + struct list_head bridge_list; + struct bridge_ctx *ctx_0, *ctx_1; + int ret; + + ctx_0 = test->priv; + ctx_1 = register_test_bridge(test); + + INIT_LIST_HEAD(&bridge_list); + + /* Get bridge 0 and add it to the list */ + ret = fpga_bridge_get_to_list(&ctx_0->pdev->dev, NULL, &bridge_list); + KUNIT_EXPECT_EQ(test, ret, 0); + + KUNIT_EXPECT_PTR_EQ(test, ctx_0->bridge, + list_first_entry_or_null(&bridge_list, struct fpga_bridge, node)); + + /* Get bridge 1 and add it to the list */ + ret = fpga_bridge_get_to_list(&ctx_1->pdev->dev, NULL, &bridge_list); + KUNIT_EXPECT_EQ(test, ret, 0); + + KUNIT_EXPECT_PTR_EQ(test, ctx_1->bridge, + list_first_entry_or_null(&bridge_list, struct fpga_bridge, node)); + + /* Disable an then enable both bridges from the list */ + ret = fpga_bridges_disable(&bridge_list); + KUNIT_EXPECT_EQ(test, ret, 0); + + KUNIT_EXPECT_FALSE(test, ctx_0->stats.enable); + KUNIT_EXPECT_FALSE(test, ctx_1->stats.enable); + + ret = fpga_bridges_enable(&bridge_list); + KUNIT_EXPECT_EQ(test, ret, 0); + + KUNIT_EXPECT_TRUE(test, ctx_0->stats.enable); + KUNIT_EXPECT_TRUE(test, ctx_1->stats.enable); + + /* Put and remove both bridges from the list */ + fpga_bridges_put(&bridge_list); + + KUNIT_EXPECT_TRUE(test, list_empty(&bridge_list)); + + unregister_test_bridge(ctx_1); +} + +static int fpga_bridge_test_init(struct kunit *test) +{ + test->priv = register_test_bridge(test); + + return 0; +} + +static void fpga_bridge_test_exit(struct kunit *test) +{ + unregister_test_bridge(test->priv); +} + +static struct kunit_case fpga_bridge_test_cases[] = { + KUNIT_CASE(fpga_bridge_test_get), + KUNIT_CASE(fpga_bridge_test_toggle), + KUNIT_CASE(fpga_bridge_test_get_put_list), + {} +}; + +static struct kunit_suite fpga_bridge_suite = { + .name = "fpga_bridge", + .init = fpga_bridge_test_init, + .exit = fpga_bridge_test_exit, + .test_cases = fpga_bridge_test_cases, +}; + +kunit_test_suite(fpga_bridge_suite); + +MODULE_LICENSE("GPL"); diff --git a/drivers/fpga/tests/fpga-mgr-test.c b/drivers/fpga/tests/fpga-mgr-test.c new file mode 100644 index 000000000000..6acec55b60ce --- /dev/null +++ b/drivers/fpga/tests/fpga-mgr-test.c @@ -0,0 +1,327 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * KUnit test for the FPGA Manager + * + * Copyright (C) 2023 Red Hat, Inc. + * + * Author: Marco Pagani + */ + +#include +#include +#include +#include +#include +#include + +#define HEADER_FILL 'H' +#define IMAGE_FILL 'P' +#define IMAGE_BLOCK 1024 + +#define HEADER_SIZE IMAGE_BLOCK +#define IMAGE_SIZE (IMAGE_BLOCK * 4) + +struct mgr_stats { + bool header_match; + bool image_match; + u32 seq_num; + u32 op_parse_header_seq; + u32 op_write_init_seq; + u32 op_write_seq; + u32 op_write_sg_seq; + u32 op_write_complete_seq; + enum fpga_mgr_states op_parse_header_state; + enum fpga_mgr_states op_write_init_state; + enum fpga_mgr_states op_write_state; + enum fpga_mgr_states op_write_sg_state; + enum fpga_mgr_states op_write_complete_state; +}; + +struct mgr_ctx { + struct fpga_image_info *img_info; + struct fpga_manager *mgr; + struct platform_device *pdev; + struct mgr_stats stats; +}; + +/** + * init_test_buffer() - Allocate and initialize a test image in a buffer. + * @test: KUnit test context object. + * @count: image size in bytes. + * + * Return: pointer to the newly allocated image. + */ +static char *init_test_buffer(struct kunit *test, size_t count) +{ + char *buf; + + KUNIT_ASSERT_GE(test, count, HEADER_SIZE); + + buf = kunit_kzalloc(test, count, GFP_KERNEL); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, buf); + + memset(buf, HEADER_FILL, HEADER_SIZE); + memset(buf + HEADER_SIZE, IMAGE_FILL, count - HEADER_SIZE); + + return buf; +} + +/* + * Check the image header. Do not return an error code if the image check fails + * since, in this case, it is a failure of the FPGA manager itself, not this + * op that tests it. + */ +static int op_parse_header(struct fpga_manager *mgr, struct fpga_image_info *info, + const char *buf, size_t count) +{ + struct mgr_stats *stats = mgr->priv; + size_t i; + + stats->op_parse_header_state = mgr->state; + stats->op_parse_header_seq = stats->seq_num++; + + /* Set header_size and data_size for later */ + info->header_size = HEADER_SIZE; + info->data_size = info->count - HEADER_SIZE; + + stats->header_match = true; + for (i = 0; i < info->header_size; i++) { + if (buf[i] != HEADER_FILL) { + stats->header_match = false; + break; + } + } + + return 0; +} + +static int op_write_init(struct fpga_manager *mgr, struct fpga_image_info *info, + const char *buf, size_t count) +{ + struct mgr_stats *stats = mgr->priv; + + stats->op_write_init_state = mgr->state; + stats->op_write_init_seq = stats->seq_num++; + + return 0; +} + +/* + * Check the image data. As with op_parse_header, do not return an error code + * if the image check fails. + */ +static int op_write(struct fpga_manager *mgr, const char *buf, size_t count) +{ + struct mgr_stats *stats = mgr->priv; + size_t i; + + stats->op_write_state = mgr->state; + stats->op_write_seq = stats->seq_num++; + + stats->image_match = true; + for (i = 0; i < count; i++) { + if (buf[i] != IMAGE_FILL) { + stats->image_match = false; + break; + } + } + + return 0; +} + +/* + * Check the image data, but first skip the header since write_sg will get + * the whole image in sg_table. As with op_parse_header, do not return an + * error code if the image check fails. + */ +static int op_write_sg(struct fpga_manager *mgr, struct sg_table *sgt) +{ + struct mgr_stats *stats = mgr->priv; + struct sg_mapping_iter miter; + char *img; + size_t i; + + stats->op_write_sg_state = mgr->state; + stats->op_write_sg_seq = stats->seq_num++; + + stats->image_match = true; + sg_miter_start(&miter, sgt->sgl, sgt->nents, SG_MITER_FROM_SG); + + if (!sg_miter_skip(&miter, HEADER_SIZE)) { + stats->image_match = false; + goto out; + } + + while (sg_miter_next(&miter)) { + img = miter.addr; + for (i = 0; i < miter.length; i++) { + if (img[i] != IMAGE_FILL) { + stats->image_match = false; + goto out; + } + } + } +out: + sg_miter_stop(&miter); + return 0; +} + +static int op_write_complete(struct fpga_manager *mgr, struct fpga_image_info *info) +{ + struct mgr_stats *stats = mgr->priv; + + stats->op_write_complete_state = mgr->state; + stats->op_write_complete_seq = stats->seq_num++; + + return 0; +} + +/* + * Fake FPGA manager that implements all ops required to check the programming + * sequence using a single contiguous buffer and a scatter gather table. + */ +static const struct fpga_manager_ops fake_mgr_ops = { + .skip_header = true, + .parse_header = op_parse_header, + .write_init = op_write_init, + .write = op_write, + .write_sg = op_write_sg, + .write_complete = op_write_complete, +}; + +static void fpga_mgr_test_get(struct kunit *test) +{ + struct mgr_ctx *ctx = test->priv; + struct fpga_manager *mgr; + + mgr = fpga_mgr_get(&ctx->pdev->dev); + KUNIT_EXPECT_PTR_EQ(test, mgr, ctx->mgr); + + fpga_mgr_put(ctx->mgr); +} + +static void fpga_mgr_test_lock(struct kunit *test) +{ + struct mgr_ctx *ctx = test->priv; + int ret; + + ret = fpga_mgr_lock(ctx->mgr); + KUNIT_EXPECT_EQ(test, ret, 0); + + ret = fpga_mgr_lock(ctx->mgr); + KUNIT_EXPECT_EQ(test, ret, -EBUSY); + + fpga_mgr_unlock(ctx->mgr); +} + +/* Check the programming sequence using an image in a buffer */ +static void fpga_mgr_test_img_load_buf(struct kunit *test) +{ + struct mgr_ctx *ctx = test->priv; + char *img_buf; + int ret; + + img_buf = init_test_buffer(test, IMAGE_SIZE); + + ctx->img_info->count = IMAGE_SIZE; + ctx->img_info->buf = img_buf; + + ret = fpga_mgr_load(ctx->mgr, ctx->img_info); + KUNIT_EXPECT_EQ(test, ret, 0); + + KUNIT_EXPECT_TRUE(test, ctx->stats.header_match); + KUNIT_EXPECT_TRUE(test, ctx->stats.image_match); + + KUNIT_EXPECT_EQ(test, ctx->stats.op_parse_header_state, FPGA_MGR_STATE_PARSE_HEADER); + KUNIT_EXPECT_EQ(test, ctx->stats.op_write_init_state, FPGA_MGR_STATE_WRITE_INIT); + KUNIT_EXPECT_EQ(test, ctx->stats.op_write_state, FPGA_MGR_STATE_WRITE); + KUNIT_EXPECT_EQ(test, ctx->stats.op_write_complete_state, FPGA_MGR_STATE_WRITE_COMPLETE); + + KUNIT_EXPECT_EQ(test, ctx->stats.op_write_init_seq, ctx->stats.op_parse_header_seq + 1); + KUNIT_EXPECT_EQ(test, ctx->stats.op_write_seq, ctx->stats.op_parse_header_seq + 2); + KUNIT_EXPECT_EQ(test, ctx->stats.op_write_complete_seq, ctx->stats.op_parse_header_seq + 3); +} + +/* Check the programming sequence using an image in a scatter gather table */ +static void fpga_mgr_test_img_load_sgt(struct kunit *test) +{ + struct mgr_ctx *ctx = test->priv; + struct sg_table *sgt; + char *img_buf; + int ret; + + img_buf = init_test_buffer(test, IMAGE_SIZE); + + sgt = kunit_kzalloc(test, sizeof(*sgt), GFP_KERNEL); + ret = sg_alloc_table(sgt, 1, GFP_KERNEL); + KUNIT_ASSERT_EQ(test, ret, 0); + sg_init_one(sgt->sgl, img_buf, IMAGE_SIZE); + + ctx->img_info->sgt = sgt; + + ret = fpga_mgr_load(ctx->mgr, ctx->img_info); + KUNIT_EXPECT_EQ(test, ret, 0); + + KUNIT_EXPECT_TRUE(test, ctx->stats.header_match); + KUNIT_EXPECT_TRUE(test, ctx->stats.image_match); + + KUNIT_EXPECT_EQ(test, ctx->stats.op_parse_header_state, FPGA_MGR_STATE_PARSE_HEADER); + KUNIT_EXPECT_EQ(test, ctx->stats.op_write_init_state, FPGA_MGR_STATE_WRITE_INIT); + KUNIT_EXPECT_EQ(test, ctx->stats.op_write_sg_state, FPGA_MGR_STATE_WRITE); + KUNIT_EXPECT_EQ(test, ctx->stats.op_write_complete_state, FPGA_MGR_STATE_WRITE_COMPLETE); + + KUNIT_EXPECT_EQ(test, ctx->stats.op_write_init_seq, ctx->stats.op_parse_header_seq + 1); + KUNIT_EXPECT_EQ(test, ctx->stats.op_write_sg_seq, ctx->stats.op_parse_header_seq + 2); + KUNIT_EXPECT_EQ(test, ctx->stats.op_write_complete_seq, ctx->stats.op_parse_header_seq + 3); + + sg_free_table(ctx->img_info->sgt); +} + +static int fpga_mgr_test_init(struct kunit *test) +{ + struct mgr_ctx *ctx; + + ctx = kunit_kzalloc(test, sizeof(*ctx), GFP_KERNEL); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ctx); + + ctx->pdev = platform_device_register_simple("mgr_pdev", PLATFORM_DEVID_AUTO, NULL, 0); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ctx->pdev); + + ctx->mgr = devm_fpga_mgr_register(&ctx->pdev->dev, "Fake FPGA Manager", &fake_mgr_ops, + &ctx->stats); + KUNIT_ASSERT_FALSE(test, IS_ERR_OR_NULL(ctx->mgr)); + + ctx->img_info = fpga_image_info_alloc(&ctx->pdev->dev); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ctx->img_info); + + test->priv = ctx; + + return 0; +} + +static void fpga_mgr_test_exit(struct kunit *test) +{ + struct mgr_ctx *ctx = test->priv; + + fpga_image_info_free(ctx->img_info); + platform_device_unregister(ctx->pdev); +} + +static struct kunit_case fpga_mgr_test_cases[] = { + KUNIT_CASE(fpga_mgr_test_get), + KUNIT_CASE(fpga_mgr_test_lock), + KUNIT_CASE(fpga_mgr_test_img_load_buf), + KUNIT_CASE(fpga_mgr_test_img_load_sgt), + {} +}; + +static struct kunit_suite fpga_mgr_suite = { + .name = "fpga_mgr", + .init = fpga_mgr_test_init, + .exit = fpga_mgr_test_exit, + .test_cases = fpga_mgr_test_cases, +}; + +kunit_test_suite(fpga_mgr_suite); + +MODULE_LICENSE("GPL"); diff --git a/drivers/fpga/tests/fpga-region-test.c b/drivers/fpga/tests/fpga-region-test.c new file mode 100644 index 000000000000..9f9d50ee7871 --- /dev/null +++ b/drivers/fpga/tests/fpga-region-test.c @@ -0,0 +1,211 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * KUnit test for the FPGA Region + * + * Copyright (C) 2023 Red Hat, Inc. + * + * Author: Marco Pagani + */ + +#include +#include +#include +#include +#include +#include +#include + +struct mgr_stats { + u32 write_count; +}; + +struct bridge_stats { + bool enable; + u32 cycles_count; +}; + +struct test_ctx { + struct fpga_manager *mgr; + struct platform_device *mgr_pdev; + struct fpga_bridge *bridge; + struct platform_device *bridge_pdev; + struct fpga_region *region; + struct platform_device *region_pdev; + struct bridge_stats bridge_stats; + struct mgr_stats mgr_stats; +}; + +static int op_write(struct fpga_manager *mgr, const char *buf, size_t count) +{ + struct mgr_stats *stats = mgr->priv; + + stats->write_count++; + + return 0; +} + +/* + * Fake FPGA manager that implements only the write op to count the number + * of programming cycles. The internals of the programming sequence are + * tested in the Manager suite since they are outside the responsibility + * of the Region. + */ +static const struct fpga_manager_ops fake_mgr_ops = { + .write = op_write, +}; + +static int op_enable_set(struct fpga_bridge *bridge, bool enable) +{ + struct bridge_stats *stats = bridge->priv; + + if (!stats->enable && enable) + stats->cycles_count++; + + stats->enable = enable; + + return 0; +} + +/* + * Fake FPGA bridge that implements only enable_set op to count the number + * of activation cycles. + */ +static const struct fpga_bridge_ops fake_bridge_ops = { + .enable_set = op_enable_set, +}; + +static int fake_region_get_bridges(struct fpga_region *region) +{ + struct fpga_bridge *bridge = region->priv; + + return fpga_bridge_get_to_list(bridge->dev.parent, region->info, ®ion->bridge_list); +} + +static int fake_region_match(struct device *dev, const void *data) +{ + return dev->parent == data; +} + +static void fpga_region_test_class_find(struct kunit *test) +{ + struct test_ctx *ctx = test->priv; + struct fpga_region *region; + + region = fpga_region_class_find(NULL, &ctx->region_pdev->dev, fake_region_match); + KUNIT_EXPECT_PTR_EQ(test, region, ctx->region); +} + +/* + * FPGA Region programming test. The Region must call get_bridges() to get + * and control the bridges, and then the Manager for the actual programming. + */ +static void fpga_region_test_program_fpga(struct kunit *test) +{ + struct test_ctx *ctx = test->priv; + struct fpga_image_info *img_info; + char img_buf[4]; + int ret; + + img_info = fpga_image_info_alloc(&ctx->mgr_pdev->dev); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, img_info); + + img_info->buf = img_buf; + img_info->count = sizeof(img_buf); + + ctx->region->info = img_info; + ret = fpga_region_program_fpga(ctx->region); + KUNIT_ASSERT_EQ(test, ret, 0); + + KUNIT_EXPECT_EQ(test, 1, ctx->mgr_stats.write_count); + KUNIT_EXPECT_EQ(test, 1, ctx->bridge_stats.cycles_count); + + fpga_bridges_put(&ctx->region->bridge_list); + + ret = fpga_region_program_fpga(ctx->region); + KUNIT_ASSERT_EQ(test, ret, 0); + + KUNIT_EXPECT_EQ(test, 2, ctx->mgr_stats.write_count); + KUNIT_EXPECT_EQ(test, 2, ctx->bridge_stats.cycles_count); + + fpga_bridges_put(&ctx->region->bridge_list); + + fpga_image_info_free(img_info); +} + +/* + * The configuration used in this test suite uses a single bridge to + * limit the code under test to a single unit. The functions used by the + * Region for getting and controlling bridges are tested (with a list of + * multiple bridges) in the Bridge suite. + */ +static int fpga_region_test_init(struct kunit *test) +{ + struct test_ctx *ctx; + struct fpga_region_info region_info = { 0 }; + + ctx = kunit_kzalloc(test, sizeof(*ctx), GFP_KERNEL); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ctx); + + ctx->mgr_pdev = platform_device_register_simple("mgr_pdev", PLATFORM_DEVID_AUTO, NULL, 0); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ctx->mgr_pdev); + + ctx->mgr = devm_fpga_mgr_register(&ctx->mgr_pdev->dev, "Fake FPGA Manager", &fake_mgr_ops, + &ctx->mgr_stats); + KUNIT_ASSERT_FALSE(test, IS_ERR_OR_NULL(ctx->mgr)); + + ctx->bridge_pdev = platform_device_register_simple("bridge_pdev", PLATFORM_DEVID_AUTO, + NULL, 0); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ctx->bridge_pdev); + + ctx->bridge = fpga_bridge_register(&ctx->bridge_pdev->dev, "Fake FPGA Bridge", + &fake_bridge_ops, &ctx->bridge_stats); + KUNIT_ASSERT_FALSE(test, IS_ERR_OR_NULL(ctx->bridge)); + + ctx->bridge_stats.enable = true; + + ctx->region_pdev = platform_device_register_simple("region_pdev", PLATFORM_DEVID_AUTO, + NULL, 0); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ctx->region_pdev); + + region_info.mgr = ctx->mgr; + region_info.priv = ctx->bridge; + region_info.get_bridges = fake_region_get_bridges; + + ctx->region = fpga_region_register_full(&ctx->region_pdev->dev, ®ion_info); + KUNIT_ASSERT_FALSE(test, IS_ERR_OR_NULL(ctx->region)); + + test->priv = ctx; + + return 0; +} + +static void fpga_region_test_exit(struct kunit *test) +{ + struct test_ctx *ctx = test->priv; + + fpga_region_unregister(ctx->region); + platform_device_unregister(ctx->region_pdev); + + fpga_bridge_unregister(ctx->bridge); + platform_device_unregister(ctx->bridge_pdev); + + platform_device_unregister(ctx->mgr_pdev); +} + +static struct kunit_case fpga_region_test_cases[] = { + KUNIT_CASE(fpga_region_test_class_find), + KUNIT_CASE(fpga_region_test_program_fpga), + + {} +}; + +static struct kunit_suite fpga_region_suite = { + .name = "fpga_mgr", + .init = fpga_region_test_init, + .exit = fpga_region_test_exit, + .test_cases = fpga_region_test_cases, +}; + +kunit_test_suite(fpga_region_suite); + +MODULE_LICENSE("GPL"); diff --git a/drivers/fpga/ts73xx-fpga.c b/drivers/fpga/ts73xx-fpga.c index 8e6e9c840d9d..4e1d2a4d3df4 100644 --- a/drivers/fpga/ts73xx-fpga.c +++ b/drivers/fpga/ts73xx-fpga.c @@ -103,7 +103,6 @@ static int ts73xx_fpga_probe(struct platform_device *pdev) struct device *kdev = &pdev->dev; struct ts73xx_fpga_priv *priv; struct fpga_manager *mgr; - struct resource *res; priv = devm_kzalloc(kdev, sizeof(*priv), GFP_KERNEL); if (!priv) @@ -111,8 +110,7 @@ static int ts73xx_fpga_probe(struct platform_device *pdev) priv->dev = kdev; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - priv->io_base = devm_ioremap_resource(kdev, res); + priv->io_base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(priv->io_base)) return PTR_ERR(priv->io_base); diff --git a/drivers/fpga/xilinx-pr-decoupler.c b/drivers/fpga/xilinx-pr-decoupler.c index b76d85449b8f..208d9560f56d 100644 --- a/drivers/fpga/xilinx-pr-decoupler.c +++ b/drivers/fpga/xilinx-pr-decoupler.c @@ -108,7 +108,6 @@ static int xlnx_pr_decoupler_probe(struct platform_device *pdev) struct xlnx_pr_decoupler_data *priv; struct fpga_bridge *br; int err; - struct resource *res; priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); if (!priv) @@ -122,8 +121,7 @@ static int xlnx_pr_decoupler_probe(struct platform_device *pdev) priv->ipconfig = match->data; } - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - priv->io_base = devm_ioremap_resource(&pdev->dev, res); + priv->io_base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(priv->io_base)) return PTR_ERR(priv->io_base); diff --git a/drivers/fpga/zynq-fpga.c b/drivers/fpga/zynq-fpga.c index f8214cae9b6e..96611d424a10 100644 --- a/drivers/fpga/zynq-fpga.c +++ b/drivers/fpga/zynq-fpga.c @@ -555,7 +555,6 @@ static int zynq_fpga_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct zynq_fpga_priv *priv; struct fpga_manager *mgr; - struct resource *res; int err; priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); @@ -563,8 +562,7 @@ static int zynq_fpga_probe(struct platform_device *pdev) return -ENOMEM; spin_lock_init(&priv->dma_lock); - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - priv->io_base = devm_ioremap_resource(dev, res); + priv->io_base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(priv->io_base)) return PTR_ERR(priv->io_base); diff --git a/drivers/fsi/Kconfig b/drivers/fsi/Kconfig index e6668a869913..79a31593618a 100644 --- a/drivers/fsi/Kconfig +++ b/drivers/fsi/Kconfig @@ -62,6 +62,15 @@ config FSI_MASTER_ASPEED Enable it for your BMC kernel in an OpenPower or IBM Power system. +config FSI_MASTER_I2CR + tristate "IBM I2C Responder virtual FSI master" + depends on I2C + help + This option enables a virtual FSI master in order to access a CFAM + behind an IBM I2C Responder (I2CR) chip. The I2CR is an I2C device + that translates I2C commands to CFAM or SCOM operations, effectively + implementing an FSI master and bus. + config FSI_SCOM tristate "SCOM FSI client device driver" help @@ -85,4 +94,12 @@ config FSI_OCC provide the raw sensor data as well as perform thermal and power management on the system. +config I2CR_SCOM + tristate "IBM I2C Responder SCOM driver" + depends on FSI_MASTER_I2CR + help + This option enables an I2C Responder based SCOM device driver. The + I2CR has the capability to directly perform SCOM operations instead + of using the FSI2PIB engine. + endif diff --git a/drivers/fsi/Makefile b/drivers/fsi/Makefile index da218a1ad8e1..5550aa15e0b1 100644 --- a/drivers/fsi/Makefile +++ b/drivers/fsi/Makefile @@ -4,7 +4,9 @@ obj-$(CONFIG_FSI) += fsi-core.o obj-$(CONFIG_FSI_MASTER_HUB) += fsi-master-hub.o obj-$(CONFIG_FSI_MASTER_ASPEED) += fsi-master-aspeed.o obj-$(CONFIG_FSI_MASTER_GPIO) += fsi-master-gpio.o +obj-$(CONFIG_FSI_MASTER_I2CR) += fsi-master-i2cr.o obj-$(CONFIG_FSI_MASTER_AST_CF) += fsi-master-ast-cf.o obj-$(CONFIG_FSI_SCOM) += fsi-scom.o obj-$(CONFIG_FSI_SBEFIFO) += fsi-sbefifo.o obj-$(CONFIG_FSI_OCC) += fsi-occ.o +obj-$(CONFIG_I2CR_SCOM) += i2cr-scom.o diff --git a/drivers/fsi/fsi-core.c b/drivers/fsi/fsi-core.c index 0b927c9f4267..097d5a780264 100644 --- a/drivers/fsi/fsi-core.c +++ b/drivers/fsi/fsi-core.c @@ -16,6 +16,8 @@ #include #include #include +#include +#include #include #include #include @@ -23,6 +25,10 @@ #include #include "fsi-master.h" +#include "fsi-slave.h" + +#define CREATE_TRACE_POINTS +#include #define FSI_SLAVE_CONF_NEXT_MASK GENMASK(31, 31) #define FSI_SLAVE_CONF_SLOTS_MASK GENMASK(23, 16) @@ -78,26 +84,6 @@ static const int engine_page_size = 0x400; static DEFINE_IDA(master_ida); -struct fsi_slave { - struct device dev; - struct fsi_master *master; - struct cdev cdev; - int cdev_idx; - int id; /* FSI address */ - int link; /* FSI link# */ - u32 cfam_id; - int chip_id; - uint32_t size; /* size of slave address space */ - u8 t_send_delay; - u8 t_echo_delay; -}; - -#define CREATE_TRACE_POINTS -#include - -#define to_fsi_master(d) container_of(d, struct fsi_master, dev) -#define to_fsi_slave(d) container_of(d, struct fsi_slave, dev) - static const int slave_retries = 2; static int discard_errors; @@ -415,28 +401,18 @@ EXPORT_SYMBOL_GPL(fsi_slave_release_range); static bool fsi_device_node_matches(struct device *dev, struct device_node *np, uint32_t addr, uint32_t size) { - unsigned int len, na, ns; - const __be32 *prop; - uint32_t psize; + u64 paddr, psize; - na = of_n_addr_cells(np); - ns = of_n_size_cells(np); - - if (na != 1 || ns != 1) + if (of_property_read_reg(np, 0, &paddr, &psize)) return false; - prop = of_get_property(np, "reg", &len); - if (!prop || len != 8) + if (paddr != addr) return false; - if (of_read_number(prop, 1) != addr) - return false; - - psize = of_read_number(prop + 1, 1); if (psize != size) { dev_warn(dev, - "node %s matches probed address, but not size (got 0x%x, expected 0x%x)", - of_node_full_name(np), psize, size); + "node %pOF matches probed address, but not size (got 0x%llx, expected 0x%x)", + np, psize, size); } return true; @@ -653,24 +629,12 @@ static void fsi_slave_release(struct device *dev) static bool fsi_slave_node_matches(struct device_node *np, int link, uint8_t id) { - unsigned int len, na, ns; - const __be32 *prop; + u64 addr; - na = of_n_addr_cells(np); - ns = of_n_size_cells(np); - - /* Ensure we have the correct format for addresses and sizes in - * reg properties - */ - if (na != 2 || ns != 0) + if (of_property_read_reg(np, 0, &addr, NULL)) return false; - prop = of_get_property(np, "reg", &len); - if (!prop || len != 8) - return false; - - return (of_read_number(prop, 1) == link) && - (of_read_number(prop + 1, 1) == id); + return addr == (((u64)link << 32) | id); } /* Find a matching node for the slave at (link, id). Returns NULL if none @@ -949,9 +913,13 @@ static int __fsi_get_new_minor(struct fsi_slave *slave, enum fsi_dev_type type, /* Check if we qualify for legacy numbering */ if (cid >= 0 && cid < 16 && type < 4) { - /* Try reserving the legacy number */ - id = (cid << 4) | type; - id = ida_simple_get(&fsi_minor_ida, id, id + 1, GFP_KERNEL); + /* + * Try reserving the legacy number, which has 0 - 0x3f reserved + * in the ida range. cid goes up to 0xf and type contains two + * bits, so construct the id with the below two bit shift. + */ + id = (cid << 2) | type; + id = ida_alloc_range(&fsi_minor_ida, id, id, GFP_KERNEL); if (id >= 0) { *out_index = fsi_adjust_index(cid); *out_dev = fsi_base_dev + id; @@ -962,8 +930,8 @@ static int __fsi_get_new_minor(struct fsi_slave *slave, enum fsi_dev_type type, return id; /* Fallback to non-legacy allocation */ } - id = ida_simple_get(&fsi_minor_ida, FSI_CHAR_LEGACY_TOP, - FSI_CHAR_MAX_DEVICES, GFP_KERNEL); + id = ida_alloc_range(&fsi_minor_ida, FSI_CHAR_LEGACY_TOP, + FSI_CHAR_MAX_DEVICES - 1, GFP_KERNEL); if (id < 0) return id; *out_index = fsi_adjust_index(id); @@ -971,16 +939,42 @@ static int __fsi_get_new_minor(struct fsi_slave *slave, enum fsi_dev_type type, return 0; } +static const char *const fsi_dev_type_names[] = { + "cfam", + "sbefifo", + "scom", + "occ", +}; + int fsi_get_new_minor(struct fsi_device *fdev, enum fsi_dev_type type, dev_t *out_dev, int *out_index) { + if (fdev->dev.of_node) { + int aid = of_alias_get_id(fdev->dev.of_node, fsi_dev_type_names[type]); + + if (aid >= 0) { + /* Use the same scheme as the legacy numbers. */ + int id = (aid << 2) | type; + + id = ida_alloc_range(&fsi_minor_ida, id, id, GFP_KERNEL); + if (id >= 0) { + *out_index = aid; + *out_dev = fsi_base_dev + id; + return 0; + } + + if (id != -ENOSPC) + return id; + } + } + return __fsi_get_new_minor(fdev->slave, type, out_dev, out_index); } EXPORT_SYMBOL_GPL(fsi_get_new_minor); void fsi_free_minor(dev_t dev) { - ida_simple_remove(&fsi_minor_ida, MINOR(dev)); + ida_free(&fsi_minor_ida, MINOR(dev)); } EXPORT_SYMBOL_GPL(fsi_free_minor); @@ -1210,6 +1204,7 @@ static int fsi_master_scan(struct fsi_master *master) { int link, rc; + trace_fsi_master_scan(master, true); for (link = 0; link < master->n_links; link++) { rc = fsi_master_link_enable(master, link); if (rc) { @@ -1251,6 +1246,7 @@ static int fsi_master_remove_slave(struct device *dev, void *arg) static void fsi_master_unscan(struct fsi_master *master) { + trace_fsi_master_scan(master, false); device_for_each_child(&master->dev, NULL, fsi_master_remove_slave); } @@ -1313,41 +1309,53 @@ int fsi_master_register(struct fsi_master *master) struct device_node *np; mutex_init(&master->scan_lock); - master->idx = ida_simple_get(&master_ida, 0, INT_MAX, GFP_KERNEL); + + /* Alloc the requested index if it's non-zero */ + if (master->idx) { + master->idx = ida_alloc_range(&master_ida, master->idx, + master->idx, GFP_KERNEL); + } else { + master->idx = ida_alloc(&master_ida, GFP_KERNEL); + } + if (master->idx < 0) return master->idx; - dev_set_name(&master->dev, "fsi%d", master->idx); + if (!dev_name(&master->dev)) + dev_set_name(&master->dev, "fsi%d", master->idx); + master->dev.class = &fsi_master_class; + mutex_lock(&master->scan_lock); rc = device_register(&master->dev); if (rc) { - ida_simple_remove(&master_ida, master->idx); - return rc; + ida_free(&master_ida, master->idx); + goto out; } np = dev_of_node(&master->dev); if (!of_property_read_bool(np, "no-scan-on-init")) { - mutex_lock(&master->scan_lock); fsi_master_scan(master); - mutex_unlock(&master->scan_lock); } - - return 0; +out: + mutex_unlock(&master->scan_lock); + return rc; } EXPORT_SYMBOL_GPL(fsi_master_register); void fsi_master_unregister(struct fsi_master *master) { - if (master->idx >= 0) { - ida_simple_remove(&master_ida, master->idx); - master->idx = -1; - } + int idx = master->idx; + + trace_fsi_master_unregister(master); mutex_lock(&master->scan_lock); fsi_master_unscan(master); + master->n_links = 0; mutex_unlock(&master->scan_lock); + device_unregister(&master->dev); + ida_free(&master_ida, idx); } EXPORT_SYMBOL_GPL(fsi_master_unregister); @@ -1366,8 +1374,14 @@ static int fsi_bus_match(struct device *dev, struct device_driver *drv) if (id->engine_type != fsi_dev->engine_type) continue; if (id->version == FSI_VERSION_ANY || - id->version == fsi_dev->version) - return 1; + id->version == fsi_dev->version) { + if (drv->of_match_table) { + if (of_driver_match_device(dev, drv)) + return 1; + } else { + return 1; + } + } } return 0; diff --git a/drivers/fsi/fsi-master-aspeed.c b/drivers/fsi/fsi-master-aspeed.c index 7cec1772820d..f0a19cd451a0 100644 --- a/drivers/fsi/fsi-master-aspeed.c +++ b/drivers/fsi/fsi-master-aspeed.c @@ -376,7 +376,7 @@ static int aspeed_master_break(struct fsi_master *master, int link) static void aspeed_master_release(struct device *dev) { struct fsi_master_aspeed *aspeed = - to_fsi_master_aspeed(dev_to_fsi_master(dev)); + to_fsi_master_aspeed(to_fsi_master(dev)); kfree(aspeed); } @@ -454,6 +454,8 @@ static ssize_t cfam_reset_store(struct device *dev, struct device_attribute *att gpiod_set_value(aspeed->cfam_reset_gpio, 1); usleep_range(900, 1000); gpiod_set_value(aspeed->cfam_reset_gpio, 0); + usleep_range(900, 1000); + opb_writel(aspeed, ctrl_base + FSI_MRESP0, cpu_to_be32(FSI_MRESP_RST_ALL_MASTER)); mutex_unlock(&aspeed->lock); trace_fsi_master_aspeed_cfam_reset(false); diff --git a/drivers/fsi/fsi-master-ast-cf.c b/drivers/fsi/fsi-master-ast-cf.c index 5f608ef8b53c..812dfa9a9140 100644 --- a/drivers/fsi/fsi-master-ast-cf.c +++ b/drivers/fsi/fsi-master-ast-cf.c @@ -1133,7 +1133,7 @@ static int fsi_master_acf_gpio_request(void *data) /* Note: This doesn't require holding out mutex */ - /* Write reqest */ + /* Write request */ iowrite8(ARB_ARM_REQ, master->sram + ARB_REG); /* @@ -1190,7 +1190,7 @@ static int fsi_master_acf_gpio_release(void *data) static void fsi_master_acf_release(struct device *dev) { - struct fsi_master_acf *master = to_fsi_master_acf(dev_to_fsi_master(dev)); + struct fsi_master_acf *master = to_fsi_master_acf(to_fsi_master(dev)); /* Cleanup, stop coprocessor */ mutex_lock(&master->lock); @@ -1441,3 +1441,4 @@ static struct platform_driver fsi_master_acf = { module_platform_driver(fsi_master_acf); MODULE_LICENSE("GPL"); +MODULE_FIRMWARE(FW_FILE_NAME); diff --git a/drivers/fsi/fsi-master-gpio.c b/drivers/fsi/fsi-master-gpio.c index 7d5f29b4b595..ed03da4f2447 100644 --- a/drivers/fsi/fsi-master-gpio.c +++ b/drivers/fsi/fsi-master-gpio.c @@ -761,7 +761,7 @@ static DEVICE_ATTR(external_mode, 0664, static void fsi_master_gpio_release(struct device *dev) { - struct fsi_master_gpio *master = to_fsi_master_gpio(dev_to_fsi_master(dev)); + struct fsi_master_gpio *master = to_fsi_master_gpio(to_fsi_master(dev)); of_node_put(dev_of_node(master->dev)); diff --git a/drivers/fsi/fsi-master-hub.c b/drivers/fsi/fsi-master-hub.c index 01f0a796111e..6d8b6e8854e5 100644 --- a/drivers/fsi/fsi-master-hub.c +++ b/drivers/fsi/fsi-master-hub.c @@ -105,7 +105,7 @@ static int hub_master_link_enable(struct fsi_master *master, int link, static void hub_master_release(struct device *dev) { - struct fsi_master_hub *hub = to_fsi_master_hub(dev_to_fsi_master(dev)); + struct fsi_master_hub *hub = to_fsi_master_hub(to_fsi_master(dev)); kfree(hub); } diff --git a/drivers/fsi/fsi-master-i2cr.c b/drivers/fsi/fsi-master-i2cr.c new file mode 100644 index 000000000000..40f1f4d231e5 --- /dev/null +++ b/drivers/fsi/fsi-master-i2cr.c @@ -0,0 +1,316 @@ +// SPDX-License-Identifier: GPL-2.0 +/* Copyright (C) IBM Corporation 2023 */ + +#include +#include +#include +#include +#include +#include + +#include "fsi-master-i2cr.h" + +#define CREATE_TRACE_POINTS +#include + +#define I2CR_ADDRESS_CFAM(a) ((a) >> 2) +#define I2CR_INITIAL_PARITY true + +#define I2CR_STATUS_CMD 0x60002 +#define I2CR_STATUS_ERR BIT_ULL(61) +#define I2CR_ERROR_CMD 0x60004 +#define I2CR_LOG_CMD 0x60008 + +static const u8 i2cr_cfam[] = { + 0xc0, 0x02, 0x0d, 0xa6, + 0x80, 0x01, 0x10, 0x02, + 0x80, 0x01, 0x10, 0x02, + 0x80, 0x01, 0x10, 0x02, + 0x80, 0x01, 0x80, 0x52, + 0x80, 0x01, 0x10, 0x02, + 0x80, 0x01, 0x10, 0x02, + 0x80, 0x01, 0x10, 0x02, + 0x80, 0x01, 0x10, 0x02, + 0x80, 0x01, 0x22, 0x2d, + 0x00, 0x00, 0x00, 0x00, + 0xde, 0xad, 0xc0, 0xde +}; + +static bool i2cr_check_parity32(u32 v, bool parity) +{ + u32 i; + + for (i = 0; i < 32; ++i) { + if (v & (1u << i)) + parity = !parity; + } + + return parity; +} + +static bool i2cr_check_parity64(u64 v) +{ + u32 i; + bool parity = I2CR_INITIAL_PARITY; + + for (i = 0; i < 64; ++i) { + if (v & (1llu << i)) + parity = !parity; + } + + return parity; +} + +static u32 i2cr_get_command(u32 address, bool parity) +{ + address <<= 1; + + if (i2cr_check_parity32(address, parity)) + address |= 1; + + return address; +} + +static int i2cr_transfer(struct i2c_client *client, u32 command, u64 *data) +{ + struct i2c_msg msgs[2]; + int ret; + + msgs[0].addr = client->addr; + msgs[0].flags = 0; + msgs[0].len = sizeof(command); + msgs[0].buf = (__u8 *)&command; + msgs[1].addr = client->addr; + msgs[1].flags = I2C_M_RD; + msgs[1].len = sizeof(*data); + msgs[1].buf = (__u8 *)data; + + ret = i2c_transfer(client->adapter, msgs, 2); + if (ret == 2) + return 0; + + trace_i2cr_i2c_error(client, command, ret); + + if (ret < 0) + return ret; + + return -EIO; +} + +static int i2cr_check_status(struct i2c_client *client) +{ + u64 status; + int ret; + + ret = i2cr_transfer(client, I2CR_STATUS_CMD, &status); + if (ret) + return ret; + + if (status & I2CR_STATUS_ERR) { + u32 buf[3] = { 0, 0, 0 }; + u64 error; + u64 log; + + i2cr_transfer(client, I2CR_ERROR_CMD, &error); + i2cr_transfer(client, I2CR_LOG_CMD, &log); + + trace_i2cr_status_error(client, status, error, log); + + buf[0] = I2CR_STATUS_CMD; + i2c_master_send(client, (const char *)buf, sizeof(buf)); + + buf[0] = I2CR_ERROR_CMD; + i2c_master_send(client, (const char *)buf, sizeof(buf)); + + buf[0] = I2CR_LOG_CMD; + i2c_master_send(client, (const char *)buf, sizeof(buf)); + + dev_err(&client->dev, "status:%016llx error:%016llx log:%016llx\n", status, error, + log); + return -EREMOTEIO; + } + + trace_i2cr_status(client, status); + return 0; +} + +int fsi_master_i2cr_read(struct fsi_master_i2cr *i2cr, u32 addr, u64 *data) +{ + u32 command = i2cr_get_command(addr, I2CR_INITIAL_PARITY); + int ret; + + mutex_lock(&i2cr->lock); + + ret = i2cr_transfer(i2cr->client, command, data); + if (ret) + goto unlock; + + ret = i2cr_check_status(i2cr->client); + if (ret) + goto unlock; + + trace_i2cr_read(i2cr->client, command, data); + +unlock: + mutex_unlock(&i2cr->lock); + return ret; +} +EXPORT_SYMBOL_GPL(fsi_master_i2cr_read); + +int fsi_master_i2cr_write(struct fsi_master_i2cr *i2cr, u32 addr, u64 data) +{ + u32 buf[3] = { 0 }; + int ret; + + buf[0] = i2cr_get_command(addr, i2cr_check_parity64(data)); + memcpy(&buf[1], &data, sizeof(data)); + + mutex_lock(&i2cr->lock); + + ret = i2c_master_send(i2cr->client, (const char *)buf, sizeof(buf)); + if (ret == sizeof(buf)) { + ret = i2cr_check_status(i2cr->client); + if (!ret) + trace_i2cr_write(i2cr->client, buf[0], data); + } else { + trace_i2cr_i2c_error(i2cr->client, buf[0], ret); + + if (ret >= 0) + ret = -EIO; + } + + mutex_unlock(&i2cr->lock); + return ret; +} +EXPORT_SYMBOL_GPL(fsi_master_i2cr_write); + +static int i2cr_read(struct fsi_master *master, int link, uint8_t id, uint32_t addr, void *val, + size_t size) +{ + struct fsi_master_i2cr *i2cr = container_of(master, struct fsi_master_i2cr, master); + u64 data; + size_t i; + int ret; + + if (link || id || (addr & 0xffff0000) || !(size == 1 || size == 2 || size == 4)) + return -EINVAL; + + /* + * The I2CR doesn't have CFAM or FSI slave address space - only the + * engines. In order for this to work with the FSI core, we need to + * emulate at minimum the CFAM config table so that the appropriate + * engines are discovered. + */ + if (addr < 0xc00) { + if (addr > sizeof(i2cr_cfam) - 4) + addr = (addr & 0x3) + (sizeof(i2cr_cfam) - 4); + + memcpy(val, &i2cr_cfam[addr], size); + return 0; + } + + ret = fsi_master_i2cr_read(i2cr, I2CR_ADDRESS_CFAM(addr), &data); + if (ret) + return ret; + + /* + * FSI core expects up to 4 bytes BE back, while I2CR replied with LE + * bytes on the wire. + */ + for (i = 0; i < size; ++i) + ((u8 *)val)[i] = ((u8 *)&data)[7 - i]; + + return 0; +} + +static int i2cr_write(struct fsi_master *master, int link, uint8_t id, uint32_t addr, + const void *val, size_t size) +{ + struct fsi_master_i2cr *i2cr = container_of(master, struct fsi_master_i2cr, master); + u64 data = 0; + size_t i; + + if (link || id || (addr & 0xffff0000) || !(size == 1 || size == 2 || size == 4)) + return -EINVAL; + + /* I2CR writes to CFAM or FSI slave address are a successful no-op. */ + if (addr < 0xc00) + return 0; + + /* + * FSI core passes up to 4 bytes BE, while the I2CR expects LE bytes on + * the wire. + */ + for (i = 0; i < size; ++i) + ((u8 *)&data)[7 - i] = ((u8 *)val)[i]; + + return fsi_master_i2cr_write(i2cr, I2CR_ADDRESS_CFAM(addr), data); +} + +static void i2cr_release(struct device *dev) +{ + struct fsi_master_i2cr *i2cr = to_fsi_master_i2cr(to_fsi_master(dev)); + + of_node_put(dev->of_node); + + kfree(i2cr); +} + +static int i2cr_probe(struct i2c_client *client) +{ + struct fsi_master_i2cr *i2cr; + int ret; + + i2cr = kzalloc(sizeof(*i2cr), GFP_KERNEL); + if (!i2cr) + return -ENOMEM; + + /* Only one I2CR on any given I2C bus (fixed I2C device address) */ + i2cr->master.idx = client->adapter->nr; + dev_set_name(&i2cr->master.dev, "i2cr%d", i2cr->master.idx); + i2cr->master.dev.parent = &client->dev; + i2cr->master.dev.of_node = of_node_get(dev_of_node(&client->dev)); + i2cr->master.dev.release = i2cr_release; + + i2cr->master.n_links = 1; + i2cr->master.read = i2cr_read; + i2cr->master.write = i2cr_write; + + mutex_init(&i2cr->lock); + i2cr->client = client; + + ret = fsi_master_register(&i2cr->master); + if (ret) + return ret; + + i2c_set_clientdata(client, i2cr); + return 0; +} + +static void i2cr_remove(struct i2c_client *client) +{ + struct fsi_master_i2cr *i2cr = i2c_get_clientdata(client); + + fsi_master_unregister(&i2cr->master); +} + +static const struct of_device_id i2cr_ids[] = { + { .compatible = "ibm,i2cr-fsi-master" }, + { } +}; +MODULE_DEVICE_TABLE(of, i2cr_ids); + +static struct i2c_driver i2cr_driver = { + .probe = i2cr_probe, + .remove = i2cr_remove, + .driver = { + .name = "fsi-master-i2cr", + .of_match_table = i2cr_ids, + }, +}; + +module_i2c_driver(i2cr_driver) + +MODULE_AUTHOR("Eddie James "); +MODULE_DESCRIPTION("IBM I2C Responder virtual FSI master driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/fsi/fsi-master-i2cr.h b/drivers/fsi/fsi-master-i2cr.h new file mode 100644 index 000000000000..96636bf28cac --- /dev/null +++ b/drivers/fsi/fsi-master-i2cr.h @@ -0,0 +1,33 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) IBM Corporation 2023 */ + +#ifndef DRIVERS_FSI_MASTER_I2CR_H +#define DRIVERS_FSI_MASTER_I2CR_H + +#include +#include + +#include "fsi-master.h" + +struct i2c_client; + +struct fsi_master_i2cr { + struct fsi_master master; + struct mutex lock; /* protect HW access */ + struct i2c_client *client; +}; + +#define to_fsi_master_i2cr(m) container_of(m, struct fsi_master_i2cr, master) + +int fsi_master_i2cr_read(struct fsi_master_i2cr *i2cr, u32 addr, u64 *data); +int fsi_master_i2cr_write(struct fsi_master_i2cr *i2cr, u32 addr, u64 data); + +static inline bool is_fsi_master_i2cr(struct fsi_master *master) +{ + if (master->dev.parent && master->dev.parent->type == &i2c_client_type) + return true; + + return false; +} + +#endif /* DRIVERS_FSI_MASTER_I2CR_H */ diff --git a/drivers/fsi/fsi-master.h b/drivers/fsi/fsi-master.h index 4762315a46ba..967622c1cabf 100644 --- a/drivers/fsi/fsi-master.h +++ b/drivers/fsi/fsi-master.h @@ -136,7 +136,7 @@ struct fsi_master { u8 t_send_delay, u8 t_echo_delay); }; -#define dev_to_fsi_master(d) container_of(d, struct fsi_master, dev) +#define to_fsi_master(d) container_of(d, struct fsi_master, dev) /** * fsi_master registration & lifetime: the fsi_master_register() and diff --git a/drivers/fsi/fsi-occ.c b/drivers/fsi/fsi-occ.c index abdd37d5507f..da35ca9e84a6 100644 --- a/drivers/fsi/fsi-occ.c +++ b/drivers/fsi/fsi-occ.c @@ -15,7 +15,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/fsi/fsi-sbefifo.c b/drivers/fsi/fsi-sbefifo.c index 9912b7a6a4b9..0a98517f3959 100644 --- a/drivers/fsi/fsi-sbefifo.c +++ b/drivers/fsi/fsi-sbefifo.c @@ -22,8 +22,8 @@ #include #include #include -#include #include +#include #include #include #include @@ -81,7 +81,7 @@ enum sbe_state { - SBE_STATE_UNKNOWN = 0x0, // Unkown, initial state + SBE_STATE_UNKNOWN = 0x0, // Unknown, initial state SBE_STATE_IPLING = 0x1, // IPL'ing - autonomous mode (transient) SBE_STATE_ISTEP = 0x2, // ISTEP - Running IPL by steps (transient) SBE_STATE_MPIPL = 0x3, // MPIPL @@ -127,6 +127,7 @@ struct sbefifo { bool dead; bool async_ffdc; bool timed_out; + u32 timeout_in_cmd_ms; u32 timeout_start_rsp_ms; }; @@ -136,6 +137,7 @@ struct sbefifo_user { void *cmd_page; void *pending_cmd; size_t pending_len; + u32 cmd_timeout_ms; u32 read_timeout_ms; }; @@ -508,7 +510,7 @@ static int sbefifo_send_command(struct sbefifo *sbefifo, rc = sbefifo_wait(sbefifo, true, &status, timeout); if (rc < 0) return rc; - timeout = msecs_to_jiffies(SBEFIFO_TIMEOUT_IN_CMD); + timeout = msecs_to_jiffies(sbefifo->timeout_in_cmd_ms); vacant = sbefifo_vacant(status); len = chunk = min(vacant, remaining); @@ -730,7 +732,7 @@ static int __sbefifo_submit(struct sbefifo *sbefifo, * @response: The output response buffer * @resp_len: In: Response buffer size, Out: Response size * - * This will perform the entire operation. If the reponse buffer + * This will perform the entire operation. If the response buffer * overflows, returns -EOVERFLOW */ int sbefifo_submit(struct device *dev, const __be32 *command, size_t cmd_len, @@ -802,6 +804,7 @@ static int sbefifo_user_open(struct inode *inode, struct file *file) return -ENOMEM; } mutex_init(&user->file_lock); + user->cmd_timeout_ms = SBEFIFO_TIMEOUT_IN_CMD; user->read_timeout_ms = SBEFIFO_TIMEOUT_START_RSP; return 0; @@ -845,9 +848,11 @@ static ssize_t sbefifo_user_read(struct file *file, char __user *buf, rc = mutex_lock_interruptible(&sbefifo->lock); if (rc) goto bail; + sbefifo->timeout_in_cmd_ms = user->cmd_timeout_ms; sbefifo->timeout_start_rsp_ms = user->read_timeout_ms; rc = __sbefifo_submit(sbefifo, user->pending_cmd, cmd_len, &resp_iter); sbefifo->timeout_start_rsp_ms = SBEFIFO_TIMEOUT_START_RSP; + sbefifo->timeout_in_cmd_ms = SBEFIFO_TIMEOUT_IN_CMD; mutex_unlock(&sbefifo->lock); if (rc < 0) goto bail; @@ -937,6 +942,25 @@ static int sbefifo_user_release(struct inode *inode, struct file *file) return 0; } +static int sbefifo_cmd_timeout(struct sbefifo_user *user, void __user *argp) +{ + struct device *dev = &user->sbefifo->dev; + u32 timeout; + + if (get_user(timeout, (__u32 __user *)argp)) + return -EFAULT; + + if (timeout == 0) { + user->cmd_timeout_ms = SBEFIFO_TIMEOUT_IN_CMD; + dev_dbg(dev, "Command timeout reset to %us\n", user->cmd_timeout_ms / 1000); + return 0; + } + + user->cmd_timeout_ms = timeout * 1000; /* user timeout is in sec */ + dev_dbg(dev, "Command timeout set to %us\n", timeout); + return 0; +} + static int sbefifo_read_timeout(struct sbefifo_user *user, void __user *argp) { struct device *dev = &user->sbefifo->dev; @@ -947,17 +971,12 @@ static int sbefifo_read_timeout(struct sbefifo_user *user, void __user *argp) if (timeout == 0) { user->read_timeout_ms = SBEFIFO_TIMEOUT_START_RSP; - dev_dbg(dev, "Timeout reset to %d\n", user->read_timeout_ms); + dev_dbg(dev, "Timeout reset to %us\n", user->read_timeout_ms / 1000); return 0; } - if (timeout < 10 || timeout > 120) - return -EINVAL; - user->read_timeout_ms = timeout * 1000; /* user timeout is in sec */ - - dev_dbg(dev, "Timeout set to %d\n", user->read_timeout_ms); - + dev_dbg(dev, "Timeout set to %us\n", timeout); return 0; } @@ -971,6 +990,9 @@ static long sbefifo_user_ioctl(struct file *file, unsigned int cmd, unsigned lon mutex_lock(&user->file_lock); switch (cmd) { + case FSI_SBEFIFO_CMD_TIMEOUT_SECONDS: + rc = sbefifo_cmd_timeout(user, (void __user *)arg); + break; case FSI_SBEFIFO_READ_TIMEOUT_SECONDS: rc = sbefifo_read_timeout(user, (void __user *)arg); break; @@ -1025,16 +1047,9 @@ static int sbefifo_probe(struct device *dev) sbefifo->fsi_dev = fsi_dev; dev_set_drvdata(dev, sbefifo); mutex_init(&sbefifo->lock); + sbefifo->timeout_in_cmd_ms = SBEFIFO_TIMEOUT_IN_CMD; sbefifo->timeout_start_rsp_ms = SBEFIFO_TIMEOUT_START_RSP; - /* - * Try cleaning up the FIFO. If this fails, we still register the - * driver and will try cleaning things up again on the next access. - */ - rc = sbefifo_cleanup_hw(sbefifo); - if (rc && rc != -ESHUTDOWN) - dev_err(dev, "Initial HW cleanup failed, will retry later\n"); - /* Create chardev for userspace access */ sbefifo->dev.type = &fsi_cdev_type; sbefifo->dev.parent = dev; diff --git a/drivers/fsi/fsi-scom.c b/drivers/fsi/fsi-scom.c index bcb756dc9866..61dbda9dbe2b 100644 --- a/drivers/fsi/fsi-scom.c +++ b/drivers/fsi/fsi-scom.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -587,6 +588,12 @@ static int scom_remove(struct device *dev) return 0; } +static const struct of_device_id scom_of_ids[] = { + { .compatible = "ibm,fsi2pib" }, + { } +}; +MODULE_DEVICE_TABLE(of, scom_of_ids); + static const struct fsi_device_id scom_ids[] = { { .engine_type = FSI_ENGID_SCOM, @@ -600,6 +607,7 @@ static struct fsi_driver scom_drv = { .drv = { .name = "scom", .bus = &fsi_bus_type, + .of_match_table = scom_of_ids, .probe = scom_probe, .remove = scom_remove, } diff --git a/drivers/fsi/fsi-slave.h b/drivers/fsi/fsi-slave.h new file mode 100644 index 000000000000..1d63a585829d --- /dev/null +++ b/drivers/fsi/fsi-slave.h @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) IBM Corporation 2023 */ + +#ifndef DRIVERS_FSI_SLAVE_H +#define DRIVERS_FSI_SLAVE_H + +#include +#include + +struct fsi_master; + +struct fsi_slave { + struct device dev; + struct fsi_master *master; + struct cdev cdev; + int cdev_idx; + int id; /* FSI address */ + int link; /* FSI link# */ + u32 cfam_id; + int chip_id; + uint32_t size; /* size of slave address space */ + u8 t_send_delay; + u8 t_echo_delay; +}; + +#define to_fsi_slave(d) container_of(d, struct fsi_slave, dev) + +#endif /* DRIVERS_FSI_SLAVE_H */ diff --git a/drivers/fsi/i2cr-scom.c b/drivers/fsi/i2cr-scom.c new file mode 100644 index 000000000000..cb7e02213032 --- /dev/null +++ b/drivers/fsi/i2cr-scom.c @@ -0,0 +1,154 @@ +// SPDX-License-Identifier: GPL-2.0 +/* Copyright (C) IBM Corporation 2023 */ + +#include +#include +#include +#include +#include +#include + +#include "fsi-master-i2cr.h" +#include "fsi-slave.h" + +struct i2cr_scom { + struct device dev; + struct cdev cdev; + struct fsi_master_i2cr *i2cr; +}; + +static loff_t i2cr_scom_llseek(struct file *file, loff_t offset, int whence) +{ + switch (whence) { + case SEEK_CUR: + break; + case SEEK_SET: + file->f_pos = offset; + break; + default: + return -EINVAL; + } + + return offset; +} + +static ssize_t i2cr_scom_read(struct file *filep, char __user *buf, size_t len, loff_t *offset) +{ + struct i2cr_scom *scom = filep->private_data; + u64 data; + int ret; + + if (len != sizeof(data)) + return -EINVAL; + + ret = fsi_master_i2cr_read(scom->i2cr, (u32)*offset, &data); + if (ret) + return ret; + + ret = copy_to_user(buf, &data, len); + if (ret) + return ret; + + return len; +} + +static ssize_t i2cr_scom_write(struct file *filep, const char __user *buf, size_t len, + loff_t *offset) +{ + struct i2cr_scom *scom = filep->private_data; + u64 data; + int ret; + + if (len != sizeof(data)) + return -EINVAL; + + ret = copy_from_user(&data, buf, len); + if (ret) + return ret; + + ret = fsi_master_i2cr_write(scom->i2cr, (u32)*offset, data); + if (ret) + return ret; + + return len; +} + +static const struct file_operations i2cr_scom_fops = { + .owner = THIS_MODULE, + .open = simple_open, + .llseek = i2cr_scom_llseek, + .read = i2cr_scom_read, + .write = i2cr_scom_write, +}; + +static int i2cr_scom_probe(struct device *dev) +{ + struct fsi_device *fsi_dev = to_fsi_dev(dev); + struct i2cr_scom *scom; + int didx; + int ret; + + if (!is_fsi_master_i2cr(fsi_dev->slave->master)) + return -ENODEV; + + scom = devm_kzalloc(dev, sizeof(*scom), GFP_KERNEL); + if (!scom) + return -ENOMEM; + + scom->i2cr = to_fsi_master_i2cr(fsi_dev->slave->master); + dev_set_drvdata(dev, scom); + + scom->dev.type = &fsi_cdev_type; + scom->dev.parent = dev; + device_initialize(&scom->dev); + + ret = fsi_get_new_minor(fsi_dev, fsi_dev_scom, &scom->dev.devt, &didx); + if (ret) + return ret; + + dev_set_name(&scom->dev, "scom%d", didx); + cdev_init(&scom->cdev, &i2cr_scom_fops); + ret = cdev_device_add(&scom->cdev, &scom->dev); + if (ret) + fsi_free_minor(scom->dev.devt); + + return ret; +} + +static int i2cr_scom_remove(struct device *dev) +{ + struct i2cr_scom *scom = dev_get_drvdata(dev); + + cdev_device_del(&scom->cdev, &scom->dev); + fsi_free_minor(scom->dev.devt); + + return 0; +} + +static const struct of_device_id i2cr_scom_of_ids[] = { + { .compatible = "ibm,i2cr-scom" }, + { } +}; +MODULE_DEVICE_TABLE(of, i2cr_scom_of_ids); + +static const struct fsi_device_id i2cr_scom_ids[] = { + { 0x5, FSI_VERSION_ANY }, + { } +}; + +static struct fsi_driver i2cr_scom_driver = { + .id_table = i2cr_scom_ids, + .drv = { + .name = "i2cr_scom", + .bus = &fsi_bus_type, + .of_match_table = i2cr_scom_of_ids, + .probe = i2cr_scom_probe, + .remove = i2cr_scom_remove, + } +}; + +module_fsi_driver(i2cr_scom_driver); + +MODULE_AUTHOR("Eddie James "); +MODULE_DESCRIPTION("IBM I2C Responder SCOM driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c index 61a5d450cc20..d612133e2cf7 100644 --- a/drivers/gpu/drm/drm_fb_helper.c +++ b/drivers/gpu/drm/drm_fb_helper.c @@ -301,7 +301,7 @@ static void drm_fb_helper_restore_work_fn(struct work_struct *ignored) static DECLARE_WORK(drm_fb_helper_restore_work, drm_fb_helper_restore_work_fn); -static void drm_fb_helper_sysrq(int dummy1) +static void drm_fb_helper_sysrq(u8 dummy1) { schedule_work(&drm_fb_helper_restore_work); } diff --git a/drivers/hid/hid-roccat-arvo.c b/drivers/hid/hid-roccat-arvo.c index ea6b79b3aeeb..d55aaabab1ed 100644 --- a/drivers/hid/hid-roccat-arvo.c +++ b/drivers/hid/hid-roccat-arvo.c @@ -23,8 +23,6 @@ #include "hid-roccat-common.h" #include "hid-roccat-arvo.h" -static struct class *arvo_class; - static ssize_t arvo_sysfs_show_mode_key(struct device *dev, struct device_attribute *attr, char *buf) { @@ -268,6 +266,11 @@ static const struct attribute_group *arvo_groups[] = { NULL, }; +static const struct class arvo_class = { + .name = "arvo", + .dev_groups = arvo_groups, +}; + static int arvo_init_arvo_device_struct(struct usb_device *usb_dev, struct arvo_device *arvo) { @@ -309,7 +312,7 @@ static int arvo_init_specials(struct hid_device *hdev) goto exit_free; } - retval = roccat_connect(arvo_class, hdev, + retval = roccat_connect(&arvo_class, hdev, sizeof(struct arvo_roccat_report)); if (retval < 0) { hid_err(hdev, "couldn't init char dev\n"); @@ -433,21 +436,20 @@ static int __init arvo_init(void) { int retval; - arvo_class = class_create("arvo"); - if (IS_ERR(arvo_class)) - return PTR_ERR(arvo_class); - arvo_class->dev_groups = arvo_groups; + retval = class_register(&arvo_class); + if (retval) + return retval; retval = hid_register_driver(&arvo_driver); if (retval) - class_destroy(arvo_class); + class_unregister(&arvo_class); return retval; } static void __exit arvo_exit(void) { hid_unregister_driver(&arvo_driver); - class_destroy(arvo_class); + class_unregister(&arvo_class); } module_init(arvo_init); diff --git a/drivers/hid/hid-roccat-isku.c b/drivers/hid/hid-roccat-isku.c index 3903a2cea00c..458060403397 100644 --- a/drivers/hid/hid-roccat-isku.c +++ b/drivers/hid/hid-roccat-isku.c @@ -23,8 +23,6 @@ #include "hid-roccat-common.h" #include "hid-roccat-isku.h" -static struct class *isku_class; - static void isku_profile_activated(struct isku_device *isku, uint new_profile) { isku->actual_profile = new_profile; @@ -248,6 +246,11 @@ static const struct attribute_group *isku_groups[] = { NULL, }; +static const struct class isku_class = { + .name = "isku", + .dev_groups = isku_groups, +}; + static int isku_init_isku_device_struct(struct usb_device *usb_dev, struct isku_device *isku) { @@ -289,7 +292,7 @@ static int isku_init_specials(struct hid_device *hdev) goto exit_free; } - retval = roccat_connect(isku_class, hdev, + retval = roccat_connect(&isku_class, hdev, sizeof(struct isku_roccat_report)); if (retval < 0) { hid_err(hdev, "couldn't init char dev\n"); @@ -435,21 +438,21 @@ static struct hid_driver isku_driver = { static int __init isku_init(void) { int retval; - isku_class = class_create("isku"); - if (IS_ERR(isku_class)) - return PTR_ERR(isku_class); - isku_class->dev_groups = isku_groups; + + retval = class_register(&isku_class); + if (retval) + return retval; retval = hid_register_driver(&isku_driver); if (retval) - class_destroy(isku_class); + class_unregister(&isku_class); return retval; } static void __exit isku_exit(void) { hid_unregister_driver(&isku_driver); - class_destroy(isku_class); + class_unregister(&isku_class); } module_init(isku_init); diff --git a/drivers/hid/hid-roccat-kone.c b/drivers/hid/hid-roccat-kone.c index 945ae236fb45..00a1abc7e839 100644 --- a/drivers/hid/hid-roccat-kone.c +++ b/drivers/hid/hid-roccat-kone.c @@ -89,9 +89,6 @@ static int kone_send(struct usb_device *usb_dev, uint usb_command, return ((len < 0) ? len : ((len != size) ? -EIO : 0)); } -/* kone_class is used for creating sysfs attributes via roccat char device */ -static struct class *kone_class; - static void kone_set_settings_checksum(struct kone_settings *settings) { uint16_t checksum = 0; @@ -657,6 +654,12 @@ static const struct attribute_group *kone_groups[] = { NULL, }; +/* kone_class is used for creating sysfs attributes via roccat char device */ +static const struct class kone_class = { + .name = "kone", + .dev_groups = kone_groups, +}; + static int kone_init_kone_device_struct(struct usb_device *usb_dev, struct kone_device *kone) { @@ -712,8 +715,8 @@ static int kone_init_specials(struct hid_device *hdev) goto exit_free; } - retval = roccat_connect(kone_class, hdev, - sizeof(struct kone_roccat_report)); + retval = roccat_connect(&kone_class, hdev, + sizeof(struct kone_roccat_report)); if (retval < 0) { hid_err(hdev, "couldn't init char dev\n"); /* be tolerant about not getting chrdev */ @@ -890,21 +893,20 @@ static int __init kone_init(void) int retval; /* class name has to be same as driver name */ - kone_class = class_create("kone"); - if (IS_ERR(kone_class)) - return PTR_ERR(kone_class); - kone_class->dev_groups = kone_groups; + retval = class_register(&kone_class); + if (retval) + return retval; retval = hid_register_driver(&kone_driver); if (retval) - class_destroy(kone_class); + class_unregister(&kone_class); return retval; } static void __exit kone_exit(void) { hid_unregister_driver(&kone_driver); - class_destroy(kone_class); + class_unregister(&kone_class); } module_init(kone_init); diff --git a/drivers/hid/hid-roccat-koneplus.c b/drivers/hid/hid-roccat-koneplus.c index 97b83b6f53dd..22b895436a7c 100644 --- a/drivers/hid/hid-roccat-koneplus.c +++ b/drivers/hid/hid-roccat-koneplus.c @@ -26,8 +26,6 @@ static uint profile_numbers[5] = {0, 1, 2, 3, 4}; -static struct class *koneplus_class; - static void koneplus_profile_activated(struct koneplus_device *koneplus, uint new_profile) { @@ -356,6 +354,11 @@ static const struct attribute_group *koneplus_groups[] = { NULL, }; +static const struct class koneplus_class = { + .name = "koneplus", + .dev_groups = koneplus_groups, +}; + static int koneplus_init_koneplus_device_struct(struct usb_device *usb_dev, struct koneplus_device *koneplus) { @@ -394,8 +397,8 @@ static int koneplus_init_specials(struct hid_device *hdev) goto exit_free; } - retval = roccat_connect(koneplus_class, hdev, - sizeof(struct koneplus_roccat_report)); + retval = roccat_connect(&koneplus_class, hdev, + sizeof(struct koneplus_roccat_report)); if (retval < 0) { hid_err(hdev, "couldn't init char dev\n"); } else { @@ -549,21 +552,20 @@ static int __init koneplus_init(void) int retval; /* class name has to be same as driver name */ - koneplus_class = class_create("koneplus"); - if (IS_ERR(koneplus_class)) - return PTR_ERR(koneplus_class); - koneplus_class->dev_groups = koneplus_groups; + retval = class_register(&koneplus_class); + if (retval) + return retval; retval = hid_register_driver(&koneplus_driver); if (retval) - class_destroy(koneplus_class); + class_unregister(&koneplus_class); return retval; } static void __exit koneplus_exit(void) { hid_unregister_driver(&koneplus_driver); - class_destroy(koneplus_class); + class_unregister(&koneplus_class); } module_init(koneplus_init); diff --git a/drivers/hid/hid-roccat-konepure.c b/drivers/hid/hid-roccat-konepure.c index a297756f2410..beca8aef8bbb 100644 --- a/drivers/hid/hid-roccat-konepure.c +++ b/drivers/hid/hid-roccat-konepure.c @@ -36,8 +36,6 @@ struct konepure_mouse_report_button { uint8_t unknown[2]; } __packed; -static struct class *konepure_class; - ROCCAT_COMMON2_BIN_ATTRIBUTE_W(control, 0x04, 0x03); ROCCAT_COMMON2_BIN_ATTRIBUTE_RW(actual_profile, 0x05, 0x03); ROCCAT_COMMON2_BIN_ATTRIBUTE_RW(profile_settings, 0x06, 0x1f); @@ -72,6 +70,11 @@ static const struct attribute_group *konepure_groups[] = { NULL, }; +static const struct class konepure_class = { + .name = "konepure", + .dev_groups = konepure_groups, +}; + static int konepure_init_specials(struct hid_device *hdev) { struct usb_interface *intf = to_usb_interface(hdev->dev.parent); @@ -98,8 +101,8 @@ static int konepure_init_specials(struct hid_device *hdev) goto exit_free; } - retval = roccat_connect(konepure_class, hdev, - sizeof(struct konepure_mouse_report_button)); + retval = roccat_connect(&konepure_class, hdev, + sizeof(struct konepure_mouse_report_button)); if (retval < 0) { hid_err(hdev, "couldn't init char dev\n"); } else { @@ -207,21 +210,20 @@ static int __init konepure_init(void) { int retval; - konepure_class = class_create("konepure"); - if (IS_ERR(konepure_class)) - return PTR_ERR(konepure_class); - konepure_class->dev_groups = konepure_groups; + retval = class_register(&konepure_class); + if (retval) + return retval; retval = hid_register_driver(&konepure_driver); if (retval) - class_destroy(konepure_class); + class_unregister(&konepure_class); return retval; } static void __exit konepure_exit(void) { hid_unregister_driver(&konepure_driver); - class_destroy(konepure_class); + class_unregister(&konepure_class); } module_init(konepure_init); diff --git a/drivers/hid/hid-roccat-kovaplus.c b/drivers/hid/hid-roccat-kovaplus.c index 1a1d96e11683..86af538c10d6 100644 --- a/drivers/hid/hid-roccat-kovaplus.c +++ b/drivers/hid/hid-roccat-kovaplus.c @@ -24,8 +24,6 @@ static uint profile_numbers[5] = {0, 1, 2, 3, 4}; -static struct class *kovaplus_class; - static uint kovaplus_convert_event_cpi(uint value) { return (value == 7 ? 4 : (value == 4 ? 3 : value)); @@ -409,6 +407,11 @@ static const struct attribute_group *kovaplus_groups[] = { NULL, }; +static const struct class kovaplus_class = { + .name = "kovaplus", + .dev_groups = kovaplus_groups, +}; + static int kovaplus_init_kovaplus_device_struct(struct usb_device *usb_dev, struct kovaplus_device *kovaplus) { @@ -463,8 +466,8 @@ static int kovaplus_init_specials(struct hid_device *hdev) goto exit_free; } - retval = roccat_connect(kovaplus_class, hdev, - sizeof(struct kovaplus_roccat_report)); + retval = roccat_connect(&kovaplus_class, hdev, + sizeof(struct kovaplus_roccat_report)); if (retval < 0) { hid_err(hdev, "couldn't init char dev\n"); } else { @@ -638,21 +641,20 @@ static int __init kovaplus_init(void) { int retval; - kovaplus_class = class_create("kovaplus"); - if (IS_ERR(kovaplus_class)) - return PTR_ERR(kovaplus_class); - kovaplus_class->dev_groups = kovaplus_groups; + retval = class_register(&kovaplus_class); + if (retval) + return retval; retval = hid_register_driver(&kovaplus_driver); if (retval) - class_destroy(kovaplus_class); + class_unregister(&kovaplus_class); return retval; } static void __exit kovaplus_exit(void) { hid_unregister_driver(&kovaplus_driver); - class_destroy(kovaplus_class); + class_unregister(&kovaplus_class); } module_init(kovaplus_init); diff --git a/drivers/hid/hid-roccat-pyra.c b/drivers/hid/hid-roccat-pyra.c index 15528c3b013c..5663b9cd9c69 100644 --- a/drivers/hid/hid-roccat-pyra.c +++ b/drivers/hid/hid-roccat-pyra.c @@ -26,9 +26,6 @@ static uint profile_numbers[5] = {0, 1, 2, 3, 4}; -/* pyra_class is used for creating sysfs attributes via roccat char device */ -static struct class *pyra_class; - static void profile_activated(struct pyra_device *pyra, unsigned int new_profile) { @@ -366,6 +363,12 @@ static const struct attribute_group *pyra_groups[] = { NULL, }; +/* pyra_class is used for creating sysfs attributes via roccat char device */ +static const struct class pyra_class = { + .name = "pyra", + .dev_groups = pyra_groups, +}; + static int pyra_init_pyra_device_struct(struct usb_device *usb_dev, struct pyra_device *pyra) { @@ -413,7 +416,7 @@ static int pyra_init_specials(struct hid_device *hdev) goto exit_free; } - retval = roccat_connect(pyra_class, hdev, + retval = roccat_connect(&pyra_class, hdev, sizeof(struct pyra_roccat_report)); if (retval < 0) { hid_err(hdev, "couldn't init char dev\n"); @@ -585,21 +588,20 @@ static int __init pyra_init(void) int retval; /* class name has to be same as driver name */ - pyra_class = class_create("pyra"); - if (IS_ERR(pyra_class)) - return PTR_ERR(pyra_class); - pyra_class->dev_groups = pyra_groups; + retval = class_register(&pyra_class); + if (retval) + return retval; retval = hid_register_driver(&pyra_driver); if (retval) - class_destroy(pyra_class); + class_unregister(&pyra_class); return retval; } static void __exit pyra_exit(void) { hid_unregister_driver(&pyra_driver); - class_destroy(pyra_class); + class_unregister(&pyra_class); } module_init(pyra_init); diff --git a/drivers/hid/hid-roccat-ryos.c b/drivers/hid/hid-roccat-ryos.c index 0eb17a3b925d..57714a4525e2 100644 --- a/drivers/hid/hid-roccat-ryos.c +++ b/drivers/hid/hid-roccat-ryos.c @@ -28,8 +28,6 @@ struct ryos_report_special { uint8_t data[4]; } __packed; -static struct class *ryos_class; - ROCCAT_COMMON2_BIN_ATTRIBUTE_W(control, 0x04, 0x03); ROCCAT_COMMON2_BIN_ATTRIBUTE_RW(profile, 0x05, 0x03); ROCCAT_COMMON2_BIN_ATTRIBUTE_RW(keys_primary, 0x06, 0x7d); @@ -80,6 +78,11 @@ static const struct attribute_group *ryos_groups[] = { NULL, }; +static const struct class ryos_class = { + .name = "ryos", + .dev_groups = ryos_groups, +}; + static int ryos_init_specials(struct hid_device *hdev) { struct usb_interface *intf = to_usb_interface(hdev->dev.parent); @@ -106,7 +109,7 @@ static int ryos_init_specials(struct hid_device *hdev) goto exit_free; } - retval = roccat_connect(ryos_class, hdev, + retval = roccat_connect(&ryos_class, hdev, sizeof(struct ryos_report_special)); if (retval < 0) { hid_err(hdev, "couldn't init char dev\n"); @@ -216,21 +219,20 @@ static int __init ryos_init(void) { int retval; - ryos_class = class_create("ryos"); - if (IS_ERR(ryos_class)) - return PTR_ERR(ryos_class); - ryos_class->dev_groups = ryos_groups; + retval = class_register(&ryos_class); + if (retval) + return retval; retval = hid_register_driver(&ryos_driver); if (retval) - class_destroy(ryos_class); + class_unregister(&ryos_class); return retval; } static void __exit ryos_exit(void) { hid_unregister_driver(&ryos_driver); - class_destroy(ryos_class); + class_unregister(&ryos_class); } module_init(ryos_init); diff --git a/drivers/hid/hid-roccat-savu.c b/drivers/hid/hid-roccat-savu.c index 93be7acef673..2baa47a0efc5 100644 --- a/drivers/hid/hid-roccat-savu.c +++ b/drivers/hid/hid-roccat-savu.c @@ -22,8 +22,6 @@ #include "hid-roccat-common.h" #include "hid-roccat-savu.h" -static struct class *savu_class; - ROCCAT_COMMON2_BIN_ATTRIBUTE_W(control, 0x4, 0x03); ROCCAT_COMMON2_BIN_ATTRIBUTE_RW(profile, 0x5, 0x03); ROCCAT_COMMON2_BIN_ATTRIBUTE_RW(general, 0x6, 0x10); @@ -52,6 +50,11 @@ static const struct attribute_group *savu_groups[] = { NULL, }; +static const struct class savu_class = { + .name = "savu", + .dev_groups = savu_groups, +}; + static int savu_init_specials(struct hid_device *hdev) { struct usb_interface *intf = to_usb_interface(hdev->dev.parent); @@ -78,7 +81,7 @@ static int savu_init_specials(struct hid_device *hdev) goto exit_free; } - retval = roccat_connect(savu_class, hdev, + retval = roccat_connect(&savu_class, hdev, sizeof(struct savu_roccat_report)); if (retval < 0) { hid_err(hdev, "couldn't init char dev\n"); @@ -204,21 +207,20 @@ static int __init savu_init(void) { int retval; - savu_class = class_create("savu"); - if (IS_ERR(savu_class)) - return PTR_ERR(savu_class); - savu_class->dev_groups = savu_groups; + retval = class_register(&savu_class); + if (retval) + return retval; retval = hid_register_driver(&savu_driver); if (retval) - class_destroy(savu_class); + class_unregister(&savu_class); return retval; } static void __exit savu_exit(void) { hid_unregister_driver(&savu_driver); - class_destroy(savu_class); + class_unregister(&savu_class); } module_init(savu_init); diff --git a/drivers/hid/hid-roccat.c b/drivers/hid/hid-roccat.c index 6da80e442fdd..c7f7562e22e5 100644 --- a/drivers/hid/hid-roccat.c +++ b/drivers/hid/hid-roccat.c @@ -295,7 +295,7 @@ EXPORT_SYMBOL_GPL(roccat_report_event); * Return value is minor device number in Range [0, ROCCAT_MAX_DEVICES] on * success, a negative error code on failure. */ -int roccat_connect(struct class *klass, struct hid_device *hid, int report_size) +int roccat_connect(const struct class *klass, struct hid_device *hid, int report_size) { unsigned int minor; struct roccat_device *device; diff --git a/drivers/hid/hidraw.c b/drivers/hid/hidraw.c index e63c56a0d57f..13c8dd8cd350 100644 --- a/drivers/hid/hidraw.c +++ b/drivers/hid/hidraw.c @@ -32,7 +32,9 @@ static int hidraw_major; static struct cdev hidraw_cdev; -static struct class *hidraw_class; +static const struct class hidraw_class = { + .name = "hidraw", +}; static struct hidraw *hidraw_table[HIDRAW_MAX_DEVICES]; static DECLARE_RWSEM(minors_rwsem); @@ -329,7 +331,7 @@ static void drop_ref(struct hidraw *hidraw, int exists_bit) hid_hw_close(hidraw->hid); wake_up_interruptible(&hidraw->wait); } - device_destroy(hidraw_class, + device_destroy(&hidraw_class, MKDEV(hidraw_major, hidraw->minor)); } else { --hidraw->open; @@ -569,7 +571,7 @@ int hidraw_connect(struct hid_device *hid) goto out; } - dev->dev = device_create(hidraw_class, &hid->dev, MKDEV(hidraw_major, minor), + dev->dev = device_create(&hidraw_class, &hid->dev, MKDEV(hidraw_major, minor), NULL, "%s%d", "hidraw", minor); if (IS_ERR(dev->dev)) { @@ -623,11 +625,9 @@ int __init hidraw_init(void) hidraw_major = MAJOR(dev_id); - hidraw_class = class_create("hidraw"); - if (IS_ERR(hidraw_class)) { - result = PTR_ERR(hidraw_class); + result = class_register(&hidraw_class); + if (result) goto error_cdev; - } cdev_init(&hidraw_cdev, &hidraw_ops); result = cdev_add(&hidraw_cdev, dev_id, HIDRAW_MAX_DEVICES); @@ -639,7 +639,7 @@ out: return result; error_class: - class_destroy(hidraw_class); + class_unregister(&hidraw_class); error_cdev: unregister_chrdev_region(dev_id, HIDRAW_MAX_DEVICES); goto out; @@ -650,7 +650,7 @@ void hidraw_exit(void) dev_t dev_id = MKDEV(hidraw_major, 0); cdev_del(&hidraw_cdev); - class_destroy(hidraw_class); + class_unregister(&hidraw_class); unregister_chrdev_region(dev_id, HIDRAW_MAX_DEVICES); } diff --git a/drivers/hwmon/peci/cputemp.c b/drivers/hwmon/peci/cputemp.c index e5b65a382772..a812c15948d9 100644 --- a/drivers/hwmon/peci/cputemp.c +++ b/drivers/hwmon/peci/cputemp.c @@ -363,6 +363,7 @@ static int init_core_mask(struct peci_cputemp *priv) switch (peci_dev->info.model) { case INTEL_FAM6_ICELAKE_X: case INTEL_FAM6_ICELAKE_D: + case INTEL_FAM6_SAPPHIRERAPIDS_X: ret = peci_ep_pci_local_read(peci_dev, 0, reg->bus, reg->dev, reg->func, reg->offset + 4, &data); if (ret) @@ -531,6 +532,13 @@ static struct resolved_cores_reg resolved_cores_reg_icx = { .offset = 0xd0, }; +static struct resolved_cores_reg resolved_cores_reg_spr = { + .bus = 31, + .dev = 30, + .func = 6, + .offset = 0x80, +}; + static const struct cpu_info cpu_hsx = { .reg = &resolved_cores_reg_hsx, .min_peci_revision = 0x33, @@ -549,6 +557,12 @@ static const struct cpu_info cpu_icx = { .thermal_margin_to_millidegree = &dts_ten_dot_six_to_millidegree, }; +static const struct cpu_info cpu_spr = { + .reg = &resolved_cores_reg_spr, + .min_peci_revision = 0x40, + .thermal_margin_to_millidegree = &dts_ten_dot_six_to_millidegree, +}; + static const struct auxiliary_device_id peci_cputemp_ids[] = { { .name = "peci_cpu.cputemp.hsx", @@ -574,6 +588,10 @@ static const struct auxiliary_device_id peci_cputemp_ids[] = { .name = "peci_cpu.cputemp.icxd", .driver_data = (kernel_ulong_t)&cpu_icx, }, + { + .name = "peci_cpu.cputemp.spr", + .driver_data = (kernel_ulong_t)&cpu_spr, + }, { } }; MODULE_DEVICE_TABLE(auxiliary, peci_cputemp_ids); diff --git a/drivers/hwmon/peci/dimmtemp.c b/drivers/hwmon/peci/dimmtemp.c index ce89da3937a0..5ca4d04e4b14 100644 --- a/drivers/hwmon/peci/dimmtemp.c +++ b/drivers/hwmon/peci/dimmtemp.c @@ -30,6 +30,8 @@ #define DIMM_IDX_MAX_ON_ICX 2 #define CHAN_RANK_MAX_ON_ICXD 4 #define DIMM_IDX_MAX_ON_ICXD 2 +#define CHAN_RANK_MAX_ON_SPR 8 +#define DIMM_IDX_MAX_ON_SPR 2 #define CHAN_RANK_MAX CHAN_RANK_MAX_ON_HSX #define DIMM_IDX_MAX DIMM_IDX_MAX_ON_HSX @@ -534,6 +536,43 @@ read_thresholds_icx(struct peci_dimmtemp *priv, int dimm_order, int chan_rank, u return 0; } +static int +read_thresholds_spr(struct peci_dimmtemp *priv, int dimm_order, int chan_rank, u32 *data) +{ + u32 reg_val; + u64 offset; + int ret; + u8 dev; + + ret = peci_ep_pci_local_read(priv->peci_dev, 0, 30, 0, 2, 0xd4, ®_val); + if (ret || !(reg_val & BIT(31))) + return -ENODATA; /* Use default or previous value */ + + ret = peci_ep_pci_local_read(priv->peci_dev, 0, 30, 0, 2, 0xd0, ®_val); + if (ret) + return -ENODATA; /* Use default or previous value */ + + /* + * Device 26, Offset 219a8: IMC 0 channel 0 -> rank 0 + * Device 26, Offset 299a8: IMC 0 channel 1 -> rank 1 + * Device 27, Offset 219a8: IMC 1 channel 0 -> rank 2 + * Device 27, Offset 299a8: IMC 1 channel 1 -> rank 3 + * Device 28, Offset 219a8: IMC 2 channel 0 -> rank 4 + * Device 28, Offset 299a8: IMC 2 channel 1 -> rank 5 + * Device 29, Offset 219a8: IMC 3 channel 0 -> rank 6 + * Device 29, Offset 299a8: IMC 3 channel 1 -> rank 7 + */ + dev = 26 + chan_rank / 2; + offset = 0x219a8 + dimm_order * 4 + (chan_rank % 2) * 0x8000; + + ret = peci_mmio_read(priv->peci_dev, 0, GET_CPU_SEG(reg_val), GET_CPU_BUS(reg_val), + dev, 0, offset, data); + if (ret) + return ret; + + return 0; +} + static const struct dimm_info dimm_hsx = { .chan_rank_max = CHAN_RANK_MAX_ON_HSX, .dimm_idx_max = DIMM_IDX_MAX_ON_HSX, @@ -576,6 +615,13 @@ static const struct dimm_info dimm_icxd = { .read_thresholds = &read_thresholds_icx, }; +static const struct dimm_info dimm_spr = { + .chan_rank_max = CHAN_RANK_MAX_ON_SPR, + .dimm_idx_max = DIMM_IDX_MAX_ON_SPR, + .min_peci_revision = 0x40, + .read_thresholds = &read_thresholds_spr, +}; + static const struct auxiliary_device_id peci_dimmtemp_ids[] = { { .name = "peci_cpu.dimmtemp.hsx", @@ -601,6 +647,10 @@ static const struct auxiliary_device_id peci_dimmtemp_ids[] = { .name = "peci_cpu.dimmtemp.icxd", .driver_data = (kernel_ulong_t)&dimm_icxd, }, + { + .name = "peci_cpu.dimmtemp.spr", + .driver_data = (kernel_ulong_t)&dimm_spr, + }, { } }; MODULE_DEVICE_TABLE(auxiliary, peci_dimmtemp_ids); diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c index 118fcf27854d..9fabe00a40d6 100644 --- a/drivers/hwtracing/coresight/coresight-core.c +++ b/drivers/hwtracing/coresight/coresight-core.c @@ -17,7 +17,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/hwtracing/coresight/coresight-cti-core.c b/drivers/hwtracing/coresight/coresight-cti-core.c index 7023ff70cc28..3999d0a2cb60 100644 --- a/drivers/hwtracing/coresight/coresight-cti-core.c +++ b/drivers/hwtracing/coresight/coresight-cti-core.c @@ -22,7 +22,7 @@ #include "coresight-priv.h" #include "coresight-cti.h" -/** +/* * CTI devices can be associated with a PE, or be connected to CoreSight * hardware. We have a list of all CTIs irrespective of CPU bound or * otherwise. diff --git a/drivers/hwtracing/coresight/coresight-dummy.c b/drivers/hwtracing/coresight/coresight-dummy.c index 8035120b70b3..e4deafae7bc2 100644 --- a/drivers/hwtracing/coresight/coresight-dummy.c +++ b/drivers/hwtracing/coresight/coresight-dummy.c @@ -147,17 +147,7 @@ static struct platform_driver dummy_driver = { }, }; -static int __init dummy_init(void) -{ - return platform_driver_register(&dummy_driver); -} -module_init(dummy_init); - -static void __exit dummy_exit(void) -{ - platform_driver_unregister(&dummy_driver); -} -module_exit(dummy_exit); +module_platform_driver(dummy_driver); MODULE_LICENSE("GPL"); MODULE_DESCRIPTION("CoreSight dummy driver"); diff --git a/drivers/hwtracing/coresight/coresight-etm4x-cfg.c b/drivers/hwtracing/coresight/coresight-etm4x-cfg.c index d2ea903231b2..c302072b293a 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-cfg.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-cfg.c @@ -40,7 +40,7 @@ * Invalid offsets will result in fail code return and feature load failure. * * @drvdata: driver data to map into. - * @reg: register to map. + * @reg_csdev: register to map. * @offset: device offset for the register */ static int etm4_cfg_map_reg_offset(struct etmv4_drvdata *drvdata, @@ -132,7 +132,7 @@ static int etm4_cfg_map_reg_offset(struct etmv4_drvdata *drvdata, * etm4_cfg_load_feature - load a feature into a device instance. * * @csdev: An ETMv4 CoreSight device. - * @feat: The feature to be loaded. + * @feat_csdev: The feature to be loaded. * * The function will load a feature instance into the device, checking that * the register definitions are valid for the device. diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c index 7e307022303a..77b0271ce6eb 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c @@ -3,6 +3,7 @@ * Copyright (c) 2014, The Linux Foundation. All rights reserved. */ +#include #include #include #include @@ -30,6 +31,7 @@ #include #include #include +#include #include #include @@ -66,7 +68,6 @@ static u64 etm4_get_access_type(struct etmv4_config *config); static enum cpuhp_state hp_online; struct etm4_init_arg { - unsigned int pid; struct device *dev; struct csdev_access *csa; }; @@ -370,9 +371,17 @@ static void etm4_disable_arch_specific(struct etmv4_drvdata *drvdata) } static void etm4_check_arch_features(struct etmv4_drvdata *drvdata, - unsigned int id) + struct csdev_access *csa) { - if (etm4_hisi_match_pid(id)) + /* + * TRCPIDR* registers are not required for ETMs with system + * instructions. They must be identified by the MIDR+REVIDRs. + * Skip the TRCPID checks for now. + */ + if (!csa->io_mem) + return; + + if (etm4_hisi_match_pid(coresight_get_pid(csa))) set_bit(ETM4_IMPDEF_HISI_CORE_COMMIT, drvdata->arch_features); } #else @@ -385,7 +394,7 @@ static void etm4_disable_arch_specific(struct etmv4_drvdata *drvdata) } static void etm4_check_arch_features(struct etmv4_drvdata *drvdata, - unsigned int id) + struct csdev_access *csa) { } #endif /* CONFIG_ETM4X_IMPDEF_FEATURE */ @@ -1066,11 +1075,21 @@ static bool etm4_init_sysreg_access(struct etmv4_drvdata *drvdata, return true; } +static bool is_devtype_cpu_trace(void __iomem *base) +{ + u32 devtype = readl(base + TRCDEVTYPE); + + return (devtype == CS_DEVTYPE_PE_TRACE); +} + static bool etm4_init_iomem_access(struct etmv4_drvdata *drvdata, struct csdev_access *csa) { u32 devarch = readl_relaxed(drvdata->base + TRCDEVARCH); + if (!is_coresight_device(drvdata->base) || !is_devtype_cpu_trace(drvdata->base)) + return false; + /* * All ETMs must implement TRCDEVARCH to indicate that * the component is an ETMv4. Even though TRCIDR1 also @@ -1161,7 +1180,7 @@ static void etm4_init_arch_data(void *info) etm4_os_unlock_csa(drvdata, csa); etm4_cs_unlock(drvdata, csa); - etm4_check_arch_features(drvdata, init_arg->pid); + etm4_check_arch_features(drvdata, csa); /* find all capabilities of the tracing unit */ etmidr0 = etm4x_relaxed_read32(csa, TRCIDR0); @@ -2044,19 +2063,16 @@ static int etm4_add_coresight_dev(struct etm4_init_arg *init_arg) return 0; } -static int etm4_probe(struct device *dev, void __iomem *base, u32 etm_pid) +static int etm4_probe(struct device *dev) { - struct etmv4_drvdata *drvdata; + struct etmv4_drvdata *drvdata = dev_get_drvdata(dev); struct csdev_access access = { 0 }; struct etm4_init_arg init_arg = { 0 }; struct etm4_init_arg *delayed; - drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); - if (!drvdata) + if (WARN_ON(!drvdata)) return -ENOMEM; - dev_set_drvdata(dev, drvdata); - if (pm_save_enable == PARAM_PM_SAVE_FIRMWARE) pm_save_enable = coresight_loses_context_with_cpu(dev) ? PARAM_PM_SAVE_SELF_HOSTED : PARAM_PM_SAVE_NEVER; @@ -2068,8 +2084,6 @@ static int etm4_probe(struct device *dev, void __iomem *base, u32 etm_pid) return -ENOMEM; } - drvdata->base = base; - spin_lock_init(&drvdata->spinlock); drvdata->cpu = coresight_get_cpu(dev); @@ -2078,7 +2092,6 @@ static int etm4_probe(struct device *dev, void __iomem *base, u32 etm_pid) init_arg.dev = dev; init_arg.csa = &access; - init_arg.pid = etm_pid; /* * Serialize against CPUHP callbacks to avoid race condition @@ -2108,6 +2121,7 @@ static int etm4_probe(struct device *dev, void __iomem *base, u32 etm_pid) static int etm4_probe_amba(struct amba_device *adev, const struct amba_id *id) { + struct etmv4_drvdata *drvdata; void __iomem *base; struct device *dev = &adev->dev; struct resource *res = &adev->res; @@ -2118,7 +2132,13 @@ static int etm4_probe_amba(struct amba_device *adev, const struct amba_id *id) if (IS_ERR(base)) return PTR_ERR(base); - ret = etm4_probe(dev, base, id->id); + drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); + if (!drvdata) + return -ENOMEM; + + drvdata->base = base; + dev_set_drvdata(dev, drvdata); + ret = etm4_probe(dev); if (!ret) pm_runtime_put(&adev->dev); @@ -2127,18 +2147,32 @@ static int etm4_probe_amba(struct amba_device *adev, const struct amba_id *id) static int etm4_probe_platform_dev(struct platform_device *pdev) { + struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + struct etmv4_drvdata *drvdata; int ret; + drvdata = devm_kzalloc(&pdev->dev, sizeof(*drvdata), GFP_KERNEL); + if (!drvdata) + return -ENOMEM; + + drvdata->pclk = coresight_get_enable_apb_pclk(&pdev->dev); + if (IS_ERR(drvdata->pclk)) + return -ENODEV; + + if (res) { + drvdata->base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(drvdata->base)) { + clk_put(drvdata->pclk); + return PTR_ERR(drvdata->base); + } + } + + dev_set_drvdata(&pdev->dev, drvdata); pm_runtime_get_noresume(&pdev->dev); pm_runtime_set_active(&pdev->dev); pm_runtime_enable(&pdev->dev); - /* - * System register based devices could match the - * HW by reading appropriate registers on the HW - * and thus we could skip the PID. - */ - ret = etm4_probe(&pdev->dev, NULL, 0); + ret = etm4_probe(&pdev->dev); pm_runtime_put(&pdev->dev); return ret; @@ -2178,7 +2212,7 @@ static struct amba_cs_uci_id uci_id_etm4[] = { /* ETMv4 UCI data */ .devarch = ETM_DEVARCH_ETMv4x_ARCH, .devarch_mask = ETM_DEVARCH_ID_MASK, - .devtype = 0x00000013, + .devtype = CS_DEVTYPE_PE_TRACE, } }; @@ -2234,6 +2268,10 @@ static int __exit etm4_remove_platform_dev(struct platform_device *pdev) if (drvdata) etm4_remove_dev(drvdata); pm_runtime_disable(&pdev->dev); + + if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) + clk_put(drvdata->pclk); + return 0; } @@ -2278,19 +2316,55 @@ static struct amba_driver etm4x_amba_driver = { .id_table = etm4_ids, }; +#ifdef CONFIG_PM +static int etm4_runtime_suspend(struct device *dev) +{ + struct etmv4_drvdata *drvdata = dev_get_drvdata(dev); + + if (drvdata->pclk && !IS_ERR(drvdata->pclk)) + clk_disable_unprepare(drvdata->pclk); + + return 0; +} + +static int etm4_runtime_resume(struct device *dev) +{ + struct etmv4_drvdata *drvdata = dev_get_drvdata(dev); + + if (drvdata->pclk && !IS_ERR(drvdata->pclk)) + clk_prepare_enable(drvdata->pclk); + + return 0; +} +#endif + +static const struct dev_pm_ops etm4_dev_pm_ops = { + SET_RUNTIME_PM_OPS(etm4_runtime_suspend, etm4_runtime_resume, NULL) +}; + static const struct of_device_id etm4_sysreg_match[] = { { .compatible = "arm,coresight-etm4x-sysreg" }, { .compatible = "arm,embedded-trace-extension" }, {} }; +#ifdef CONFIG_ACPI +static const struct acpi_device_id etm4x_acpi_ids[] = { + {"ARMHC500", 0}, /* ARM CoreSight ETM4x */ + {} +}; +MODULE_DEVICE_TABLE(acpi, etm4x_acpi_ids); +#endif + static struct platform_driver etm4_platform_driver = { .probe = etm4_probe_platform_dev, .remove = etm4_remove_platform_dev, .driver = { .name = "coresight-etm4x", .of_match_table = etm4_sysreg_match, + .acpi_match_table = ACPI_PTR(etm4x_acpi_ids), .suppress_bind_attrs = true, + .pm = &etm4_dev_pm_ops, }, }; diff --git a/drivers/hwtracing/coresight/coresight-etm4x.h b/drivers/hwtracing/coresight/coresight-etm4x.h index 27c8a9901868..20e2e4cb7614 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.h +++ b/drivers/hwtracing/coresight/coresight-etm4x.h @@ -701,6 +701,8 @@ #define ETM_DEVARCH_ETE_ARCH \ (ETM_DEVARCH_ARCHITECT_ARM | ETM_DEVARCH_ARCHID_ETE | ETM_DEVARCH_PRESENT) +#define CS_DEVTYPE_PE_TRACE 0x00000013 + #define TRCSTATR_IDLE_BIT 0 #define TRCSTATR_PMSTABLE_BIT 1 #define ETM_DEFAULT_ADDR_COMP 0 @@ -944,6 +946,7 @@ struct etmv4_save_state { /** * struct etm4_drvdata - specifics associated to an ETM component + * @pclk APB clock if present, otherwise NULL * @base: Memory mapped base address for this component. * @csdev: Component vitals needed by the framework. * @spinlock: Only one at a time pls. @@ -1009,6 +1012,7 @@ struct etmv4_save_state { * @arch_features: Bitmap of arch features of etmv4 devices. */ struct etmv4_drvdata { + struct clk *pclk; void __iomem *base; struct coresight_device *csdev; spinlock_t spinlock; diff --git a/drivers/hwtracing/coresight/coresight-platform.c b/drivers/hwtracing/coresight/coresight-platform.c index 3e2e135cb8f6..9d550f5697fa 100644 --- a/drivers/hwtracing/coresight/coresight-platform.c +++ b/drivers/hwtracing/coresight/coresight-platform.c @@ -9,9 +9,7 @@ #include #include #include -#include #include -#include #include #include #include @@ -494,19 +492,18 @@ static inline bool acpi_validate_dsd_graph(const union acpi_object *graph) /* acpi_get_dsd_graph - Find the _DSD Graph property for the given device. */ static const union acpi_object * -acpi_get_dsd_graph(struct acpi_device *adev) +acpi_get_dsd_graph(struct acpi_device *adev, struct acpi_buffer *buf) { int i; - struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER }; acpi_status status; const union acpi_object *dsd; status = acpi_evaluate_object_typed(adev->handle, "_DSD", NULL, - &buf, ACPI_TYPE_PACKAGE); + buf, ACPI_TYPE_PACKAGE); if (ACPI_FAILURE(status)) return NULL; - dsd = buf.pointer; + dsd = buf->pointer; /* * _DSD property consists tuples { Prop_UUID, Package() } @@ -557,12 +554,12 @@ acpi_validate_coresight_graph(const union acpi_object *cs_graph) * returns NULL. */ static const union acpi_object * -acpi_get_coresight_graph(struct acpi_device *adev) +acpi_get_coresight_graph(struct acpi_device *adev, struct acpi_buffer *buf) { const union acpi_object *graph_list, *graph; int i, nr_graphs; - graph_list = acpi_get_dsd_graph(adev); + graph_list = acpi_get_dsd_graph(adev, buf); if (!graph_list) return graph_list; @@ -663,18 +660,24 @@ static int acpi_coresight_parse_graph(struct device *dev, struct acpi_device *adev, struct coresight_platform_data *pdata) { + int ret = 0; int i, nlinks; const union acpi_object *graph; struct coresight_connection conn, zero_conn = {}; struct coresight_connection *new_conn; + struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL }; - graph = acpi_get_coresight_graph(adev); + graph = acpi_get_coresight_graph(adev, &buf); + /* + * There are no graph connections, which is fine for some components. + * e.g., ETE + */ if (!graph) - return -ENOENT; + goto free; nlinks = graph->package.elements[2].integer.value; if (!nlinks) - return 0; + goto free; for (i = 0; i < nlinks; i++) { const union acpi_object *link = &graph->package.elements[3 + i]; @@ -682,17 +685,28 @@ static int acpi_coresight_parse_graph(struct device *dev, conn = zero_conn; dir = acpi_coresight_parse_link(adev, link, &conn); - if (dir < 0) - return dir; + if (dir < 0) { + ret = dir; + goto free; + } if (dir == ACPI_CORESIGHT_LINK_MASTER) { new_conn = coresight_add_out_conn(dev, pdata, &conn); - if (IS_ERR(new_conn)) - return PTR_ERR(new_conn); + if (IS_ERR(new_conn)) { + ret = PTR_ERR(new_conn); + goto free; + } } } - return 0; +free: + /* + * When ACPI fails to alloc a buffer, it will free the buffer + * created via ACPI_ALLOCATE_BUFFER and set to NULL. + * ACPI_FREE can handle NULL pointers, so free it directly. + */ + ACPI_FREE(buf.pointer); + return ret; } /* diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c index 79d8c64eac49..7406b65e2cdd 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c @@ -452,7 +452,7 @@ static int tmc_set_etf_buffer(struct coresight_device *csdev, return -EINVAL; /* wrap head around to the amount of space we have */ - head = handle->head & ((buf->nr_pages << PAGE_SHIFT) - 1); + head = handle->head & (((unsigned long)buf->nr_pages << PAGE_SHIFT) - 1); /* find the page to write to */ buf->cur = head / PAGE_SIZE; diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c index 766325de0e29..66dc5f97a009 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c @@ -45,7 +45,8 @@ struct etr_perf_buffer { }; /* Convert the perf index to an offset within the ETR buffer */ -#define PERF_IDX2OFF(idx, buf) ((idx) % ((buf)->nr_pages << PAGE_SHIFT)) +#define PERF_IDX2OFF(idx, buf) \ + ((idx) % ((unsigned long)(buf)->nr_pages << PAGE_SHIFT)) /* Lower limit for ETR hardware buffer */ #define TMC_ETR_PERF_MIN_BUF_SIZE SZ_1M @@ -1267,7 +1268,7 @@ alloc_etr_buf(struct tmc_drvdata *drvdata, struct perf_event *event, * than the size requested via sysfs. */ if ((nr_pages << PAGE_SHIFT) > drvdata->size) { - etr_buf = tmc_alloc_etr_buf(drvdata, (nr_pages << PAGE_SHIFT), + etr_buf = tmc_alloc_etr_buf(drvdata, ((ssize_t)nr_pages << PAGE_SHIFT), 0, node, NULL); if (!IS_ERR(etr_buf)) goto done; diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracing/coresight/coresight-tmc.h index b97da39652d2..0ee48c5ba764 100644 --- a/drivers/hwtracing/coresight/coresight-tmc.h +++ b/drivers/hwtracing/coresight/coresight-tmc.h @@ -325,7 +325,7 @@ ssize_t tmc_sg_table_get_data(struct tmc_sg_table *sg_table, static inline unsigned long tmc_sg_table_buf_size(struct tmc_sg_table *sg_table) { - return sg_table->data_pages.nr_pages << PAGE_SHIFT; + return (unsigned long)sg_table->data_pages.nr_pages << PAGE_SHIFT; } struct coresight_device *tmc_etr_get_catu_device(struct tmc_drvdata *drvdata); diff --git a/drivers/hwtracing/coresight/coresight-trbe.c b/drivers/hwtracing/coresight/coresight-trbe.c index 7720619909d6..e20c1c6acc73 100644 --- a/drivers/hwtracing/coresight/coresight-trbe.c +++ b/drivers/hwtracing/coresight/coresight-trbe.c @@ -1225,6 +1225,16 @@ static void arm_trbe_enable_cpu(void *info) enable_percpu_irq(drvdata->irq, IRQ_TYPE_NONE); } +static void arm_trbe_disable_cpu(void *info) +{ + struct trbe_drvdata *drvdata = info; + struct trbe_cpudata *cpudata = this_cpu_ptr(drvdata->cpudata); + + disable_percpu_irq(drvdata->irq); + trbe_reset_local(cpudata); +} + + static void arm_trbe_register_coresight_cpu(struct trbe_drvdata *drvdata, int cpu) { struct trbe_cpudata *cpudata = per_cpu_ptr(drvdata->cpudata, cpu); @@ -1244,10 +1254,13 @@ static void arm_trbe_register_coresight_cpu(struct trbe_drvdata *drvdata, int cp if (!desc.name) goto cpu_clear; + desc.pdata = coresight_get_platform_data(dev); + if (IS_ERR(desc.pdata)) + goto cpu_clear; + desc.type = CORESIGHT_DEV_TYPE_SINK; desc.subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_PERCPU_SYSMEM; desc.ops = &arm_trbe_cs_ops; - desc.pdata = dev_get_platdata(dev); desc.groups = arm_trbe_groups; desc.dev = dev; trbe_csdev = coresight_register(&desc); @@ -1326,18 +1339,12 @@ cpu_clear: cpumask_clear_cpu(cpu, &drvdata->supported_cpus); } -static void arm_trbe_remove_coresight_cpu(void *info) +static void arm_trbe_remove_coresight_cpu(struct trbe_drvdata *drvdata, int cpu) { - int cpu = smp_processor_id(); - struct trbe_drvdata *drvdata = info; - struct trbe_cpudata *cpudata = per_cpu_ptr(drvdata->cpudata, cpu); struct coresight_device *trbe_csdev = coresight_get_percpu_sink(cpu); - disable_percpu_irq(drvdata->irq); - trbe_reset_local(cpudata); if (trbe_csdev) { coresight_unregister(trbe_csdev); - cpudata->drvdata = NULL; coresight_set_percpu_sink(cpu, NULL); } } @@ -1366,8 +1373,10 @@ static int arm_trbe_remove_coresight(struct trbe_drvdata *drvdata) { int cpu; - for_each_cpu(cpu, &drvdata->supported_cpus) - smp_call_function_single(cpu, arm_trbe_remove_coresight_cpu, drvdata, 1); + for_each_cpu(cpu, &drvdata->supported_cpus) { + smp_call_function_single(cpu, arm_trbe_disable_cpu, drvdata, 1); + arm_trbe_remove_coresight_cpu(drvdata, cpu); + } free_percpu(drvdata->cpudata); return 0; } @@ -1406,12 +1415,8 @@ static int arm_trbe_cpu_teardown(unsigned int cpu, struct hlist_node *node) { struct trbe_drvdata *drvdata = hlist_entry_safe(node, struct trbe_drvdata, hotplug_node); - if (cpumask_test_cpu(cpu, &drvdata->supported_cpus)) { - struct trbe_cpudata *cpudata = per_cpu_ptr(drvdata->cpudata, cpu); - - disable_percpu_irq(drvdata->irq); - trbe_reset_local(cpudata); - } + if (cpumask_test_cpu(cpu, &drvdata->supported_cpus)) + arm_trbe_disable_cpu(drvdata); return 0; } @@ -1479,7 +1484,6 @@ static void arm_trbe_remove_irq(struct trbe_drvdata *drvdata) static int arm_trbe_device_probe(struct platform_device *pdev) { - struct coresight_platform_data *pdata; struct trbe_drvdata *drvdata; struct device *dev = &pdev->dev; int ret; @@ -1494,12 +1498,7 @@ static int arm_trbe_device_probe(struct platform_device *pdev) if (!drvdata) return -ENOMEM; - pdata = coresight_get_platform_data(dev); - if (IS_ERR(pdata)) - return PTR_ERR(pdata); - dev_set_drvdata(dev, drvdata); - dev->platform_data = pdata; drvdata->pdev = pdev; ret = arm_trbe_probe_irq(pdev, drvdata); if (ret) diff --git a/drivers/hwtracing/coresight/coresight-trbe.h b/drivers/hwtracing/coresight/coresight-trbe.h index 77cbb5c63878..e915e749be55 100644 --- a/drivers/hwtracing/coresight/coresight-trbe.h +++ b/drivers/hwtracing/coresight/coresight-trbe.h @@ -23,7 +23,7 @@ static inline bool is_trbe_available(void) unsigned int trbe = cpuid_feature_extract_unsigned_field(aa64dfr0, ID_AA64DFR0_EL1_TraceBuffer_SHIFT); - return trbe >= 0b0001; + return trbe >= ID_AA64DFR0_EL1_TraceBuffer_IMP; } static inline bool is_trbe_enabled(void) diff --git a/drivers/hwtracing/ptt/hisi_ptt.c b/drivers/hwtracing/ptt/hisi_ptt.c index ba081b6d2435..49ea1b0f7489 100644 --- a/drivers/hwtracing/ptt/hisi_ptt.c +++ b/drivers/hwtracing/ptt/hisi_ptt.c @@ -618,13 +618,13 @@ static int hisi_ptt_notifier_call(struct notifier_block *nb, unsigned long actio if (!root_port) return 0; - port_devid = PCI_DEVID(root_port->bus->number, root_port->devfn); + port_devid = pci_dev_id(root_port); if (port_devid < hisi_ptt->lower_bdf || port_devid > hisi_ptt->upper_bdf) return 0; info.is_port = pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT; - info.devid = PCI_DEVID(pdev->bus->number, pdev->devfn); + info.devid = pci_dev_id(pdev); switch (action) { case BUS_NOTIFY_ADD_DEVICE: @@ -664,7 +664,7 @@ static int hisi_ptt_init_filters(struct pci_dev *pdev, void *data) if (!root_port) return 0; - port_devid = PCI_DEVID(root_port->bus->number, root_port->devfn); + port_devid = pci_dev_id(root_port); if (port_devid < hisi_ptt->lower_bdf || port_devid > hisi_ptt->upper_bdf) return 0; @@ -674,7 +674,7 @@ static int hisi_ptt_init_filters(struct pci_dev *pdev, void *data) * should be partial initialized and users would know which filter fails * through the log. Other functions of PTT device are still available. */ - filter = hisi_ptt_alloc_add_filter(hisi_ptt, PCI_DEVID(pdev->bus->number, pdev->devfn), + filter = hisi_ptt_alloc_add_filter(hisi_ptt, pci_dev_id(pdev), pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT); if (!filter) return -ENOMEM; diff --git a/drivers/iio/accel/adxl313_i2c.c b/drivers/iio/accel/adxl313_i2c.c index 524327ea3663..a4cf0cf2c5aa 100644 --- a/drivers/iio/accel/adxl313_i2c.c +++ b/drivers/iio/accel/adxl313_i2c.c @@ -40,8 +40,8 @@ static const struct regmap_config adxl31x_i2c_regmap_config[] = { static const struct i2c_device_id adxl313_i2c_id[] = { { .name = "adxl312", .driver_data = (kernel_ulong_t)&adxl31x_chip_info[ADXL312] }, - { .name = "adxl313", .driver_data = (kernel_ulong_t)&adxl31x_chip_info[ADXL312] }, - { .name = "adxl314", .driver_data = (kernel_ulong_t)&adxl31x_chip_info[ADXL312] }, + { .name = "adxl313", .driver_data = (kernel_ulong_t)&adxl31x_chip_info[ADXL313] }, + { .name = "adxl314", .driver_data = (kernel_ulong_t)&adxl31x_chip_info[ADXL314] }, { } }; @@ -65,9 +65,7 @@ static int adxl313_i2c_probe(struct i2c_client *client) * Retrieves device specific data as a pointer to a * adxl313_chip_info structure */ - chip_data = device_get_match_data(&client->dev); - if (!chip_data) - chip_data = (const struct adxl313_chip_info *)i2c_match_id(adxl313_i2c_id, client)->driver_data; + chip_data = i2c_get_match_data(client); regmap = devm_regmap_init_i2c(client, &adxl31x_i2c_regmap_config[chip_data->type]); diff --git a/drivers/iio/accel/adxl355_i2c.c b/drivers/iio/accel/adxl355_i2c.c index d5beea61479d..32398cde9608 100644 --- a/drivers/iio/accel/adxl355_i2c.c +++ b/drivers/iio/accel/adxl355_i2c.c @@ -24,19 +24,10 @@ static int adxl355_i2c_probe(struct i2c_client *client) { struct regmap *regmap; const struct adxl355_chip_info *chip_data; - const struct i2c_device_id *adxl355; - chip_data = device_get_match_data(&client->dev); - if (!chip_data) { - adxl355 = to_i2c_driver(client->dev.driver)->id_table; - if (!adxl355) - return -EINVAL; - - chip_data = (void *)i2c_match_id(adxl355, client)->driver_data; - - if (!chip_data) - return -EINVAL; - } + chip_data = i2c_get_match_data(client); + if (!chip_data) + return -ENODEV; regmap = devm_regmap_init_i2c(client, &adxl355_i2c_regmap_config); if (IS_ERR(regmap)) { diff --git a/drivers/iio/accel/adxl372_spi.c b/drivers/iio/accel/adxl372_spi.c index 2bd267a22f29..75a88f16c6c9 100644 --- a/drivers/iio/accel/adxl372_spi.c +++ b/drivers/iio/accel/adxl372_spi.c @@ -8,7 +8,6 @@ #include #include #include -#include #include #include "adxl372.h" diff --git a/drivers/iio/accel/bma180.c b/drivers/iio/accel/bma180.c index e8ab0d249351..13439f52d26d 100644 --- a/drivers/iio/accel/bma180.c +++ b/drivers/iio/accel/bma180.c @@ -16,7 +16,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/iio/accel/da280.c b/drivers/iio/accel/da280.c index 2f27a5ded94c..572bfe9694b0 100644 --- a/drivers/iio/accel/da280.c +++ b/drivers/iio/accel/da280.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * IIO driver for the MiraMEMS DA280 3-axis accelerometer and + * IIO driver for the MiraMEMS DA217 and DA280 3-axis accelerometer and * IIO driver for the MiraMEMS DA226 2-axis accelerometer * * Copyright (c) 2016 Hans de Goede @@ -23,7 +23,7 @@ #define DA280_MODE_ENABLE 0x1e #define DA280_MODE_DISABLE 0x9e -enum da280_chipset { da226, da280 }; +enum da280_chipset { da217, da226, da280 }; /* * a value of + or -4096 corresponds to + or - 1G @@ -134,7 +134,10 @@ static int da280_probe(struct i2c_client *client) chip = id->driver_data; } - if (chip == da226) { + if (chip == da217) { + indio_dev->name = "da217"; + indio_dev->num_channels = 3; + } else if (chip == da226) { indio_dev->name = "da226"; indio_dev->num_channels = 2; } else { @@ -166,12 +169,14 @@ static int da280_resume(struct device *dev) static DEFINE_SIMPLE_DEV_PM_OPS(da280_pm_ops, da280_suspend, da280_resume); static const struct acpi_device_id da280_acpi_match[] = { + {"NSA2513", da217}, {"MIRAACC", da280}, {}, }; MODULE_DEVICE_TABLE(acpi, da280_acpi_match); static const struct i2c_device_id da280_i2c_id[] = { + { "da217", da217 }, { "da226", da226 }, { "da280", da280 }, {} diff --git a/drivers/iio/accel/kxsd9-spi.c b/drivers/iio/accel/kxsd9-spi.c index 07f14a9f22c7..1719a9f1d90a 100644 --- a/drivers/iio/accel/kxsd9-spi.c +++ b/drivers/iio/accel/kxsd9-spi.c @@ -2,7 +2,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/iio/accel/mma8452.c b/drivers/iio/accel/mma8452.c index 6e7399e72221..f42a88711486 100644 --- a/drivers/iio/accel/mma8452.c +++ b/drivers/iio/accel/mma8452.c @@ -28,7 +28,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig index dc14bde31ac1..517b3db114b8 100644 --- a/drivers/iio/adc/Kconfig +++ b/drivers/iio/adc/Kconfig @@ -1116,7 +1116,7 @@ config STMPE_ADC built-in ADC block (stmpe811). config SUN4I_GPADC - tristate "Support for the Allwinner SoCs GPADC" + tristate "Allwinner A10/A13/A31 and similar GPADCs driver" depends on IIO depends on MFD_SUN4I_GPADC || MACH_SUN8I depends on THERMAL || !THERMAL_OF @@ -1134,6 +1134,16 @@ config SUN4I_GPADC To compile this driver as a module, choose M here: the module will be called sun4i-gpadc-iio. +config SUN20I_GPADC + tristate "Allwinner D1/T113s/T507/R329 and similar GPADCs driver" + depends on ARCH_SUNXI || COMPILE_TEST + help + Say yes here to build support for Allwinner (D1, T113, T507 and R329) + SoCs GPADC. This ADC provides up to 16 channels. + + To compile this driver as a module, choose M here: the module will be + called sun20i-gpadc-iio. + config TI_ADC081C tristate "Texas Instruments ADC081C/ADC101C/ADC121C family" depends on I2C diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile index eb6e891790fb..2facf979327d 100644 --- a/drivers/iio/adc/Makefile +++ b/drivers/iio/adc/Makefile @@ -96,6 +96,7 @@ obj-$(CONFIG_RZG2L_ADC) += rzg2l_adc.o obj-$(CONFIG_SC27XX_ADC) += sc27xx_adc.o obj-$(CONFIG_SPEAR_ADC) += spear_adc.o obj-$(CONFIG_SUN4I_GPADC) += sun4i-gpadc-iio.o +obj-$(CONFIG_SUN20I_GPADC) += sun20i-gpadc-iio.o obj-$(CONFIG_STM32_ADC_CORE) += stm32-adc-core.o obj-$(CONFIG_STM32_ADC) += stm32-adc.o obj-$(CONFIG_STM32_DFSDM_CORE) += stm32-dfsdm-core.o diff --git a/drivers/iio/adc/ab8500-gpadc.c b/drivers/iio/adc/ab8500-gpadc.c index 4fa2126a354b..3b1bdd0b531d 100644 --- a/drivers/iio/adc/ab8500-gpadc.c +++ b/drivers/iio/adc/ab8500-gpadc.c @@ -1099,14 +1099,12 @@ static int ab8500_gpadc_probe(struct platform_device *pdev) gpadc->irq_sw = platform_get_irq_byname(pdev, "SW_CONV_END"); if (gpadc->irq_sw < 0) - return dev_err_probe(dev, gpadc->irq_sw, - "failed to get platform sw_conv_end irq\n"); + return gpadc->irq_sw; if (is_ab8500(gpadc->ab8500)) { gpadc->irq_hw = platform_get_irq_byname(pdev, "HW_CONV_END"); if (gpadc->irq_hw < 0) - return dev_err_probe(dev, gpadc->irq_hw, - "failed to get platform hw_conv_end irq\n"); + return gpadc->irq_hw; } else { gpadc->irq_hw = 0; } diff --git a/drivers/iio/adc/ad7124.c b/drivers/iio/adc/ad7124.c index 050a2fbf5c49..b9b206fcd748 100644 --- a/drivers/iio/adc/ad7124.c +++ b/drivers/iio/adc/ad7124.c @@ -14,7 +14,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/iio/adc/ad7192.c b/drivers/iio/adc/ad7192.c index 7bc3ebfe8081..69d1103b9508 100644 --- a/drivers/iio/adc/ad7192.c +++ b/drivers/iio/adc/ad7192.c @@ -16,7 +16,7 @@ #include #include #include -#include +#include #include #include @@ -402,8 +402,8 @@ static int ad7192_setup(struct iio_dev *indio_dev, struct device_node *np) id &= AD7192_ID_MASK; if (id != st->chip_info->chip_id) - dev_warn(&st->sd.spi->dev, "device ID query failed (0x%X)\n", - id); + dev_warn(&st->sd.spi->dev, "device ID query failed (0x%X != 0x%X)\n", + id, st->chip_info->chip_id); st->mode = AD7192_MODE_SEL(AD7192_MODE_IDLE) | AD7192_MODE_CLKSRC(st->clock_sel) | @@ -561,9 +561,8 @@ static ssize_t ad7192_show_filter_avail(struct device *dev, ad7192_get_available_filter_freq(st, freq_avail); for (i = 0; i < ARRAY_SIZE(freq_avail); i++) - len += scnprintf(buf + len, PAGE_SIZE - len, - "%d.%d ", freq_avail[i] / 1000, - freq_avail[i] % 1000); + len += sysfs_emit_at(buf, len, "%d.%03d ", freq_avail[i] / 1000, + freq_avail[i] % 1000); buf[len - 1] = '\n'; @@ -972,11 +971,6 @@ static void ad7192_reg_disable(void *reg) regulator_disable(reg); } -static void ad7192_clk_disable(void *clk) -{ - clk_disable_unprepare(clk); -} - static int ad7192_probe(struct spi_device *spi) { struct ad7192_state *st; @@ -1036,7 +1030,9 @@ static int ad7192_probe(struct spi_device *spi) else indio_dev->info = &ad7192_info; - ad_sd_init(&st->sd, indio_dev, spi, &ad7192_sigma_delta_info); + ret = ad_sd_init(&st->sd, indio_dev, spi, &ad7192_sigma_delta_info); + if (ret) + return ret; ret = devm_ad_sd_setup_buffer_and_trigger(&spi->dev, indio_dev); if (ret) @@ -1044,7 +1040,7 @@ static int ad7192_probe(struct spi_device *spi) st->fclk = AD7192_INT_FREQ_MHZ; - st->mclk = devm_clk_get_optional(&spi->dev, "mclk"); + st->mclk = devm_clk_get_optional_enabled(&spi->dev, "mclk"); if (IS_ERR(st->mclk)) return PTR_ERR(st->mclk); @@ -1052,15 +1048,6 @@ static int ad7192_probe(struct spi_device *spi) if (st->clock_sel == AD7192_CLK_EXT_MCLK1_2 || st->clock_sel == AD7192_CLK_EXT_MCLK2) { - ret = clk_prepare_enable(st->mclk); - if (ret < 0) - return ret; - - ret = devm_add_action_or_reset(&spi->dev, ad7192_clk_disable, - st->mclk); - if (ret) - return ret; - st->fclk = clk_get_rate(st->mclk); if (!ad7192_valid_external_frequency(st->fclk)) { dev_err(&spi->dev, diff --git a/drivers/iio/adc/ad9467.c b/drivers/iio/adc/ad9467.c index 0621cf59d614..39eccc28debe 100644 --- a/drivers/iio/adc/ad9467.c +++ b/drivers/iio/adc/ad9467.c @@ -13,7 +13,7 @@ #include #include #include -#include +#include #include diff --git a/drivers/iio/adc/adi-axi-adc.c b/drivers/iio/adc/adi-axi-adc.c index e8a8ea4140f1..aff0532a974a 100644 --- a/drivers/iio/adc/adi-axi-adc.c +++ b/drivers/iio/adc/adi-axi-adc.c @@ -11,8 +11,9 @@ #include #include #include -#include +#include #include +#include #include #include diff --git a/drivers/iio/adc/at91_adc.c b/drivers/iio/adc/at91_adc.c index 366e252ebeb0..de6650f9c4b1 100644 --- a/drivers/iio/adc/at91_adc.c +++ b/drivers/iio/adc/at91_adc.c @@ -16,7 +16,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/iio/adc/bcm_iproc_adc.c b/drivers/iio/adc/bcm_iproc_adc.c index 44e1e53ada72..0d6885413a7e 100644 --- a/drivers/iio/adc/bcm_iproc_adc.c +++ b/drivers/iio/adc/bcm_iproc_adc.c @@ -540,8 +540,8 @@ static int iproc_adc_probe(struct platform_device *pdev) } adc_priv->irqno = platform_get_irq(pdev, 0); - if (adc_priv->irqno <= 0) - return -ENODEV; + if (adc_priv->irqno < 0) + return adc_priv->irqno; ret = regmap_update_bits(adc_priv->regmap, IPROC_REGCTL2, IPROC_ADC_AUXIN_SCAN_ENA, 0); diff --git a/drivers/iio/adc/cc10001_adc.c b/drivers/iio/adc/cc10001_adc.c index 2cde4b44fc6e..a432342348ab 100644 --- a/drivers/iio/adc/cc10001_adc.c +++ b/drivers/iio/adc/cc10001_adc.c @@ -9,7 +9,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/iio/adc/imx7d_adc.c b/drivers/iio/adc/imx7d_adc.c index 22da81bac97f..828d3fea6d43 100644 --- a/drivers/iio/adc/imx7d_adc.c +++ b/drivers/iio/adc/imx7d_adc.c @@ -496,7 +496,7 @@ static int imx7d_adc_probe(struct platform_device *pdev) irq = platform_get_irq(pdev, 0); if (irq < 0) - return dev_err_probe(dev, irq, "Failed getting irq\n"); + return irq; info->clk = devm_clk_get(dev, "adc"); if (IS_ERR(info->clk)) diff --git a/drivers/iio/adc/ina2xx-adc.c b/drivers/iio/adc/ina2xx-adc.c index aea83f369437..9e52207352fb 100644 --- a/drivers/iio/adc/ina2xx-adc.c +++ b/drivers/iio/adc/ina2xx-adc.c @@ -28,7 +28,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/iio/adc/lpc32xx_adc.c b/drivers/iio/adc/lpc32xx_adc.c index 732c924a976d..e34ed7dacd89 100644 --- a/drivers/iio/adc/lpc32xx_adc.c +++ b/drivers/iio/adc/lpc32xx_adc.c @@ -176,8 +176,8 @@ static int lpc32xx_adc_probe(struct platform_device *pdev) } irq = platform_get_irq(pdev, 0); - if (irq <= 0) - return -ENXIO; + if (irq < 0) + return irq; retval = devm_request_irq(&pdev->dev, irq, lpc32xx_adc_isr, 0, LPC32XXAD_NAME, st); diff --git a/drivers/iio/adc/men_z188_adc.c b/drivers/iio/adc/men_z188_adc.c index adc5ceaef8c9..198c7e68e0cf 100644 --- a/drivers/iio/adc/men_z188_adc.c +++ b/drivers/iio/adc/men_z188_adc.c @@ -161,7 +161,6 @@ MODULE_DEVICE_TABLE(mcb, men_z188_ids); static struct mcb_driver men_z188_driver = { .driver = { .name = "z188-adc", - .owner = THIS_MODULE, }, .probe = men_z188_probe, .remove = men_z188_remove, diff --git a/drivers/iio/adc/meson_saradc.c b/drivers/iio/adc/meson_saradc.c index eb78a6f17fd0..320e3e7e3d4d 100644 --- a/drivers/iio/adc/meson_saradc.c +++ b/drivers/iio/adc/meson_saradc.c @@ -17,7 +17,6 @@ #include #include #include -#include #include #include #include @@ -156,6 +155,10 @@ */ #define MESON_SAR_ADC_REG11 0x2c #define MESON_SAR_ADC_REG11_BANDGAP_EN BIT(13) + #define MESON_SAR_ADC_REG11_CMV_SEL BIT(6) + #define MESON_SAR_ADC_REG11_VREF_VOLTAGE BIT(5) + #define MESON_SAR_ADC_REG11_EOC BIT(1) + #define MESON_SAR_ADC_REG11_VREF_SEL BIT(0) #define MESON_SAR_ADC_REG13 0x34 #define MESON_SAR_ADC_REG13_12BIT_CALIBRATION_MASK GENMASK(13, 8) @@ -163,6 +166,7 @@ #define MESON_SAR_ADC_MAX_FIFO_SIZE 32 #define MESON_SAR_ADC_TIMEOUT 100 /* ms */ #define MESON_SAR_ADC_VOLTAGE_AND_TEMP_CHANNEL 6 +#define MESON_SAR_ADC_VOLTAGE_AND_MUX_CHANNEL 7 #define MESON_SAR_ADC_TEMP_OFFSET 27 /* temperature sensor calibration information in eFuse */ @@ -202,29 +206,22 @@ .datasheet_name = "TEMP_SENSOR", \ } -static const struct iio_chan_spec meson_sar_adc_iio_channels[] = { - MESON_SAR_ADC_CHAN(0), - MESON_SAR_ADC_CHAN(1), - MESON_SAR_ADC_CHAN(2), - MESON_SAR_ADC_CHAN(3), - MESON_SAR_ADC_CHAN(4), - MESON_SAR_ADC_CHAN(5), - MESON_SAR_ADC_CHAN(6), - MESON_SAR_ADC_CHAN(7), - IIO_CHAN_SOFT_TIMESTAMP(8), -}; +#define MESON_SAR_ADC_MUX(_chan, _sel) { \ + .type = IIO_VOLTAGE, \ + .channel = _chan, \ + .indexed = 1, \ + .address = MESON_SAR_ADC_VOLTAGE_AND_MUX_CHANNEL, \ + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ + BIT(IIO_CHAN_INFO_AVERAGE_RAW), \ + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_CALIBBIAS) | \ + BIT(IIO_CHAN_INFO_CALIBSCALE), \ + .datasheet_name = "SAR_ADC_MUX_"#_sel, \ +} -static const struct iio_chan_spec meson_sar_adc_and_temp_iio_channels[] = { - MESON_SAR_ADC_CHAN(0), - MESON_SAR_ADC_CHAN(1), - MESON_SAR_ADC_CHAN(2), - MESON_SAR_ADC_CHAN(3), - MESON_SAR_ADC_CHAN(4), - MESON_SAR_ADC_CHAN(5), - MESON_SAR_ADC_CHAN(6), - MESON_SAR_ADC_CHAN(7), - MESON_SAR_ADC_TEMP_CHAN(8), - IIO_CHAN_SOFT_TIMESTAMP(9), +enum meson_sar_adc_vref_sel { + VREF_CALIBATION_VOLTAGE = 0, + VREF_VDDA = 1, }; enum meson_sar_adc_avg_mode { @@ -249,6 +246,72 @@ enum meson_sar_adc_chan7_mux_sel { CHAN7_MUX_CH7_INPUT = 0x7, }; +enum meson_sar_adc_channel_index { + NUM_CHAN_0, + NUM_CHAN_1, + NUM_CHAN_2, + NUM_CHAN_3, + NUM_CHAN_4, + NUM_CHAN_5, + NUM_CHAN_6, + NUM_CHAN_7, + NUM_CHAN_TEMP, + NUM_MUX_0_VSS, + NUM_MUX_1_VDD_DIV4, + NUM_MUX_2_VDD_DIV2, + NUM_MUX_3_VDD_MUL3_DIV4, + NUM_MUX_4_VDD, +}; + +static enum meson_sar_adc_chan7_mux_sel chan7_mux_values[] = { + CHAN7_MUX_VSS, + CHAN7_MUX_VDD_DIV4, + CHAN7_MUX_VDD_DIV2, + CHAN7_MUX_VDD_MUL3_DIV4, + CHAN7_MUX_VDD, +}; + +static const char * const chan7_mux_names[] = { + [CHAN7_MUX_VSS] = "gnd", + [CHAN7_MUX_VDD_DIV4] = "0.25vdd", + [CHAN7_MUX_VDD_DIV2] = "0.5vdd", + [CHAN7_MUX_VDD_MUL3_DIV4] = "0.75vdd", + [CHAN7_MUX_VDD] = "vdd", +}; + +static const struct iio_chan_spec meson_sar_adc_iio_channels[] = { + MESON_SAR_ADC_CHAN(NUM_CHAN_0), + MESON_SAR_ADC_CHAN(NUM_CHAN_1), + MESON_SAR_ADC_CHAN(NUM_CHAN_2), + MESON_SAR_ADC_CHAN(NUM_CHAN_3), + MESON_SAR_ADC_CHAN(NUM_CHAN_4), + MESON_SAR_ADC_CHAN(NUM_CHAN_5), + MESON_SAR_ADC_CHAN(NUM_CHAN_6), + MESON_SAR_ADC_CHAN(NUM_CHAN_7), + MESON_SAR_ADC_MUX(NUM_MUX_0_VSS, 0), + MESON_SAR_ADC_MUX(NUM_MUX_1_VDD_DIV4, 1), + MESON_SAR_ADC_MUX(NUM_MUX_2_VDD_DIV2, 2), + MESON_SAR_ADC_MUX(NUM_MUX_3_VDD_MUL3_DIV4, 3), + MESON_SAR_ADC_MUX(NUM_MUX_4_VDD, 4), +}; + +static const struct iio_chan_spec meson_sar_adc_and_temp_iio_channels[] = { + MESON_SAR_ADC_CHAN(NUM_CHAN_0), + MESON_SAR_ADC_CHAN(NUM_CHAN_1), + MESON_SAR_ADC_CHAN(NUM_CHAN_2), + MESON_SAR_ADC_CHAN(NUM_CHAN_3), + MESON_SAR_ADC_CHAN(NUM_CHAN_4), + MESON_SAR_ADC_CHAN(NUM_CHAN_5), + MESON_SAR_ADC_CHAN(NUM_CHAN_6), + MESON_SAR_ADC_CHAN(NUM_CHAN_7), + MESON_SAR_ADC_TEMP_CHAN(NUM_CHAN_TEMP), + MESON_SAR_ADC_MUX(NUM_MUX_0_VSS, 0), + MESON_SAR_ADC_MUX(NUM_MUX_1_VDD_DIV4, 1), + MESON_SAR_ADC_MUX(NUM_MUX_2_VDD_DIV2, 2), + MESON_SAR_ADC_MUX(NUM_MUX_3_VDD_MUL3_DIV4, 3), + MESON_SAR_ADC_MUX(NUM_MUX_4_VDD, 4), +}; + struct meson_sar_adc_param { bool has_bl30_integration; unsigned long clock_rate; @@ -258,6 +321,13 @@ struct meson_sar_adc_param { u8 temperature_trimming_bits; unsigned int temperature_multiplier; unsigned int temperature_divider; + u8 disable_ring_counter; + bool has_reg11; + bool has_vref_select; + u8 vref_select; + u8 cmv_select; + u8 adc_eoc; + enum meson_sar_adc_vref_sel vref_volatge; }; struct meson_sar_adc_data { @@ -285,6 +355,7 @@ struct meson_sar_adc_priv { bool temperature_sensor_calibrated; u8 temperature_sensor_coefficient; u16 temperature_sensor_adc_val; + enum meson_sar_adc_chan7_mux_sel chan7_mux_sel; }; static const struct regmap_config meson_sar_adc_regmap_config_gxbb = { @@ -301,6 +372,17 @@ static const struct regmap_config meson_sar_adc_regmap_config_meson8 = { .max_register = MESON_SAR_ADC_DELTA_10, }; +static const struct iio_chan_spec * +find_channel_by_num(struct iio_dev *indio_dev, int num) +{ + int i; + + for (i = 0; i < indio_dev->num_channels; i++) + if (indio_dev->channels[i].channel == num) + return &indio_dev->channels[i]; + return NULL; +} + static unsigned int meson_sar_adc_get_fifo_count(struct iio_dev *indio_dev) { struct meson_sar_adc_priv *priv = iio_priv(indio_dev); @@ -338,6 +420,21 @@ static int meson_sar_adc_wait_busy_clear(struct iio_dev *indio_dev) 1, 10000); } +static void meson_sar_adc_set_chan7_mux(struct iio_dev *indio_dev, + enum meson_sar_adc_chan7_mux_sel sel) +{ + struct meson_sar_adc_priv *priv = iio_priv(indio_dev); + u32 regval; + + regval = FIELD_PREP(MESON_SAR_ADC_REG3_CTRL_CHAN7_MUX_SEL_MASK, sel); + regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG3, + MESON_SAR_ADC_REG3_CTRL_CHAN7_MUX_SEL_MASK, regval); + + usleep_range(10, 20); + + priv->chan7_mux_sel = sel; +} + static int meson_sar_adc_read_raw_sample(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, int *val) @@ -431,22 +528,18 @@ static void meson_sar_adc_enable_channel(struct iio_dev *indio_dev, regmap_update_bits(priv->regmap, MESON_SAR_ADC_DELTA_10, MESON_SAR_ADC_DELTA_10_TEMP_SEL, regval); + } else if (chan->address == MESON_SAR_ADC_VOLTAGE_AND_MUX_CHANNEL) { + enum meson_sar_adc_chan7_mux_sel sel; + + if (chan->channel == NUM_CHAN_7) + sel = CHAN7_MUX_CH7_INPUT; + else + sel = chan7_mux_values[chan->channel - NUM_MUX_0_VSS]; + if (sel != priv->chan7_mux_sel) + meson_sar_adc_set_chan7_mux(indio_dev, sel); } } -static void meson_sar_adc_set_chan7_mux(struct iio_dev *indio_dev, - enum meson_sar_adc_chan7_mux_sel sel) -{ - struct meson_sar_adc_priv *priv = iio_priv(indio_dev); - u32 regval; - - regval = FIELD_PREP(MESON_SAR_ADC_REG3_CTRL_CHAN7_MUX_SEL_MASK, sel); - regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG3, - MESON_SAR_ADC_REG3_CTRL_CHAN7_MUX_SEL_MASK, regval); - - usleep_range(10, 20); -} - static void meson_sar_adc_start_sample_engine(struct iio_dev *indio_dev) { struct meson_sar_adc_priv *priv = iio_priv(indio_dev); @@ -821,6 +914,22 @@ static int meson_sar_adc_init(struct iio_dev *indio_dev) MESON_SAR_ADC_CHAN_10_SW_CHAN1_MUX_SEL_MASK, regval); + regmap_update_bits(priv->regmap, MESON_SAR_ADC_CHAN_10_SW, + MESON_SAR_ADC_CHAN_10_SW_CHAN0_XP_DRIVE_SW, + MESON_SAR_ADC_CHAN_10_SW_CHAN0_XP_DRIVE_SW); + + regmap_update_bits(priv->regmap, MESON_SAR_ADC_CHAN_10_SW, + MESON_SAR_ADC_CHAN_10_SW_CHAN0_YP_DRIVE_SW, + MESON_SAR_ADC_CHAN_10_SW_CHAN0_YP_DRIVE_SW); + + regmap_update_bits(priv->regmap, MESON_SAR_ADC_CHAN_10_SW, + MESON_SAR_ADC_CHAN_10_SW_CHAN1_XP_DRIVE_SW, + MESON_SAR_ADC_CHAN_10_SW_CHAN1_XP_DRIVE_SW); + + regmap_update_bits(priv->regmap, MESON_SAR_ADC_CHAN_10_SW, + MESON_SAR_ADC_CHAN_10_SW_CHAN1_YP_DRIVE_SW, + MESON_SAR_ADC_CHAN_10_SW_CHAN1_YP_DRIVE_SW); + /* * set up the input channel muxes in MESON_SAR_ADC_AUX_SW * (2 = SAR_ADC_CH2, 3 = SAR_ADC_CH3, ...) and enable @@ -873,6 +982,35 @@ static int meson_sar_adc_init(struct iio_dev *indio_dev) MESON_SAR_ADC_DELTA_10_TS_REVE0, 0); } + regval = FIELD_PREP(MESON_SAR_ADC_REG3_CTRL_CONT_RING_COUNTER_EN, + priv->param->disable_ring_counter); + regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG3, + MESON_SAR_ADC_REG3_CTRL_CONT_RING_COUNTER_EN, + regval); + + if (priv->param->has_reg11) { + regval = FIELD_PREP(MESON_SAR_ADC_REG11_EOC, priv->param->adc_eoc); + regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG11, + MESON_SAR_ADC_REG11_EOC, regval); + + if (priv->param->has_vref_select) { + regval = FIELD_PREP(MESON_SAR_ADC_REG11_VREF_SEL, + priv->param->vref_select); + regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG11, + MESON_SAR_ADC_REG11_VREF_SEL, regval); + } + + regval = FIELD_PREP(MESON_SAR_ADC_REG11_VREF_VOLTAGE, + priv->param->vref_volatge); + regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG11, + MESON_SAR_ADC_REG11_VREF_VOLTAGE, regval); + + regval = FIELD_PREP(MESON_SAR_ADC_REG11_CMV_SEL, + priv->param->cmv_select); + regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG11, + MESON_SAR_ADC_REG11_CMV_SEL, regval); + } + ret = clk_set_parent(priv->adc_sel_clk, priv->clkin); if (ret) return dev_err_probe(dev, ret, "failed to set adc parent to clkin\n"); @@ -1006,7 +1144,8 @@ static int meson_sar_adc_calib(struct iio_dev *indio_dev) meson_sar_adc_set_chan7_mux(indio_dev, CHAN7_MUX_VDD_DIV4); usleep_range(10, 20); ret = meson_sar_adc_get_sample(indio_dev, - &indio_dev->channels[7], + find_channel_by_num(indio_dev, + NUM_MUX_1_VDD_DIV4), MEAN_AVERAGING, EIGHT_SAMPLES, &value0); if (ret < 0) goto out; @@ -1014,7 +1153,8 @@ static int meson_sar_adc_calib(struct iio_dev *indio_dev) meson_sar_adc_set_chan7_mux(indio_dev, CHAN7_MUX_VDD_MUL3_DIV4); usleep_range(10, 20); ret = meson_sar_adc_get_sample(indio_dev, - &indio_dev->channels[7], + find_channel_by_num(indio_dev, + NUM_MUX_3_VDD_MUL3_DIV4), MEAN_AVERAGING, EIGHT_SAMPLES, &value1); if (ret < 0) goto out; @@ -1035,8 +1175,23 @@ out: return ret; } +static int read_label(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + char *label) +{ + if (chan->type == IIO_TEMP) + return sprintf(label, "temp-sensor\n"); + if (chan->type == IIO_VOLTAGE && chan->channel >= NUM_MUX_0_VSS) + return sprintf(label, "%s\n", + chan7_mux_names[chan->channel - NUM_MUX_0_VSS]); + if (chan->type == IIO_VOLTAGE) + return sprintf(label, "channel-%d\n", chan->channel); + return 0; +} + static const struct iio_info meson_sar_adc_iio_info = { .read_raw = meson_sar_adc_iio_info_read_raw, + .read_label = read_label, }; static const struct meson_sar_adc_param meson_sar_adc_meson8_param = { @@ -1067,6 +1222,9 @@ static const struct meson_sar_adc_param meson_sar_adc_gxbb_param = { .bandgap_reg = MESON_SAR_ADC_REG11, .regmap_config = &meson_sar_adc_regmap_config_gxbb, .resolution = 10, + .has_reg11 = true, + .vref_volatge = 1, + .cmv_select = 1, }; static const struct meson_sar_adc_param meson_sar_adc_gxl_param = { @@ -1075,6 +1233,10 @@ static const struct meson_sar_adc_param meson_sar_adc_gxl_param = { .bandgap_reg = MESON_SAR_ADC_REG11, .regmap_config = &meson_sar_adc_regmap_config_gxbb, .resolution = 12, + .disable_ring_counter = 1, + .has_reg11 = true, + .vref_volatge = 1, + .cmv_select = 1, }; static const struct meson_sar_adc_param meson_sar_adc_g12a_param = { @@ -1083,6 +1245,11 @@ static const struct meson_sar_adc_param meson_sar_adc_g12a_param = { .bandgap_reg = MESON_SAR_ADC_REG11, .regmap_config = &meson_sar_adc_regmap_config_gxbb, .resolution = 12, + .disable_ring_counter = 1, + .has_reg11 = true, + .adc_eoc = 1, + .has_vref_select = true, + .vref_select = VREF_VDDA, }; static const struct meson_sar_adc_data meson_sar_adc_meson8_data = { diff --git a/drivers/iio/adc/npcm_adc.c b/drivers/iio/adc/npcm_adc.c index ba4cd8f49f66..3d9207c160eb 100644 --- a/drivers/iio/adc/npcm_adc.c +++ b/drivers/iio/adc/npcm_adc.c @@ -244,8 +244,8 @@ static int npcm_adc_probe(struct platform_device *pdev) info->adc_sample_hz = clk_get_rate(info->adc_clk) / ((div + 1) * 2); irq = platform_get_irq(pdev, 0); - if (irq <= 0) { - ret = -EINVAL; + if (irq < 0) { + ret = irq; goto err_disable_clk; } diff --git a/drivers/iio/adc/palmas_gpadc.c b/drivers/iio/adc/palmas_gpadc.c index 27b2632c1037..e202ea18af10 100644 --- a/drivers/iio/adc/palmas_gpadc.c +++ b/drivers/iio/adc/palmas_gpadc.c @@ -18,7 +18,6 @@ #include #include #include -#include #include #include #include @@ -916,8 +915,7 @@ static int palmas_gpadc_probe(struct platform_device *pdev) adc->irq_auto_0 = platform_get_irq(pdev, 1); if (adc->irq_auto_0 < 0) - return dev_err_probe(adc->dev, adc->irq_auto_0, - "get auto0 irq failed\n"); + return adc->irq_auto_0; ret = devm_request_threaded_irq(&pdev->dev, adc->irq_auto_0, NULL, palmas_gpadc_irq_auto, IRQF_ONESHOT, @@ -929,8 +927,7 @@ static int palmas_gpadc_probe(struct platform_device *pdev) adc->irq_auto_1 = platform_get_irq(pdev, 2); if (adc->irq_auto_1 < 0) - return dev_err_probe(adc->dev, adc->irq_auto_1, - "get auto1 irq failed\n"); + return adc->irq_auto_1; ret = devm_request_threaded_irq(&pdev->dev, adc->irq_auto_1, NULL, palmas_gpadc_irq_auto, IRQF_ONESHOT, diff --git a/drivers/iio/adc/qcom-spmi-adc5.c b/drivers/iio/adc/qcom-spmi-adc5.c index 0a4fd3a46113..b6b612d733ff 100644 --- a/drivers/iio/adc/qcom-spmi-adc5.c +++ b/drivers/iio/adc/qcom-spmi-adc5.c @@ -555,6 +555,8 @@ static const struct adc5_channels adc5_chans_pmic[ADC5_MAX_CHANNEL] = { SCALE_HW_CALIB_PM5_SMB_TEMP) [ADC5_GPIO1_100K_PU] = ADC5_CHAN_TEMP("gpio1_100k_pu", 0, SCALE_HW_CALIB_THERM_100K_PULLUP) + [ADC5_GPIO2_100K_PU] = ADC5_CHAN_TEMP("gpio2_100k_pu", 0, + SCALE_HW_CALIB_THERM_100K_PULLUP) [ADC5_GPIO3_100K_PU] = ADC5_CHAN_TEMP("gpio3_100k_pu", 0, SCALE_HW_CALIB_THERM_100K_PULLUP) [ADC5_GPIO4_100K_PU] = ADC5_CHAN_TEMP("gpio4_100k_pu", 0, diff --git a/drivers/iio/adc/qcom-spmi-iadc.c b/drivers/iio/adc/qcom-spmi-iadc.c index acbda6636dc5..7fb8b2499a1d 100644 --- a/drivers/iio/adc/qcom-spmi-iadc.c +++ b/drivers/iio/adc/qcom-spmi-iadc.c @@ -13,7 +13,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c index 4b011f7eddec..dd94667a623b 100644 --- a/drivers/iio/adc/rockchip_saradc.c +++ b/drivers/iio/adc/rockchip_saradc.c @@ -11,7 +11,6 @@ #include #include #include -#include #include #include #include @@ -467,7 +466,7 @@ static int rockchip_saradc_probe(struct platform_device *pdev) irq = platform_get_irq(pdev, 0); if (irq < 0) - return dev_err_probe(&pdev->dev, irq, "failed to get irq\n"); + return irq; ret = devm_request_irq(&pdev->dev, irq, rockchip_saradc_isr, 0, dev_name(&pdev->dev), info); diff --git a/drivers/iio/adc/sc27xx_adc.c b/drivers/iio/adc/sc27xx_adc.c index ff1fc329bb9b..b4a2e057d80f 100644 --- a/drivers/iio/adc/sc27xx_adc.c +++ b/drivers/iio/adc/sc27xx_adc.c @@ -7,7 +7,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/iio/adc/spear_adc.c b/drivers/iio/adc/spear_adc.c index d93e580b3dc5..ad54ef798109 100644 --- a/drivers/iio/adc/spear_adc.c +++ b/drivers/iio/adc/spear_adc.c @@ -310,8 +310,8 @@ static int spear_adc_probe(struct platform_device *pdev) } irq = platform_get_irq(pdev, 0); - if (irq <= 0) { - ret = -EINVAL; + if (irq < 0) { + ret = irq; goto errout2; } diff --git a/drivers/iio/adc/stm32-adc-core.c b/drivers/iio/adc/stm32-adc-core.c index 48f02dcc81c1..2f082006550f 100644 --- a/drivers/iio/adc/stm32-adc-core.c +++ b/drivers/iio/adc/stm32-adc-core.c @@ -18,6 +18,8 @@ #include #include #include +#include +#include #include #include #include @@ -723,8 +725,7 @@ static int stm32_adc_probe(struct platform_device *pdev) priv->nb_adc_max = priv->cfg->num_adcs; spin_lock_init(&priv->common.lock); - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - priv->common.base = devm_ioremap_resource(&pdev->dev, res); + priv->common.base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(priv->common.base)) return PTR_ERR(priv->common.base); priv->common.phys_base = res->start; diff --git a/drivers/iio/adc/stm32-dfsdm-adc.c b/drivers/iio/adc/stm32-dfsdm-adc.c index a428bdb567d5..b5cc43d12b6f 100644 --- a/drivers/iio/adc/stm32-dfsdm-adc.c +++ b/drivers/iio/adc/stm32-dfsdm-adc.c @@ -19,7 +19,8 @@ #include #include #include -#include +#include +#include #include #include #include diff --git a/drivers/iio/adc/stm32-dfsdm-core.c b/drivers/iio/adc/stm32-dfsdm-core.c index 0362df285a57..0f6ebb3061a0 100644 --- a/drivers/iio/adc/stm32-dfsdm-core.c +++ b/drivers/iio/adc/stm32-dfsdm-core.c @@ -12,8 +12,10 @@ #include #include #include -#include +#include +#include #include +#include #include #include #include diff --git a/drivers/iio/adc/stmpe-adc.c b/drivers/iio/adc/stmpe-adc.c index 67518e460e05..8e56def1c9e5 100644 --- a/drivers/iio/adc/stmpe-adc.c +++ b/drivers/iio/adc/stmpe-adc.c @@ -14,7 +14,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/iio/adc/sun20i-gpadc-iio.c b/drivers/iio/adc/sun20i-gpadc-iio.c new file mode 100644 index 000000000000..6a893d484cf7 --- /dev/null +++ b/drivers/iio/adc/sun20i-gpadc-iio.c @@ -0,0 +1,276 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * GPADC driver for sunxi platforms (D1, T113-S3 and R329) + * Copyright (c) 2023 Maksim Kiselev + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define SUN20I_GPADC_DRIVER_NAME "sun20i-gpadc" + +/* Register map definition */ +#define SUN20I_GPADC_SR 0x00 +#define SUN20I_GPADC_CTRL 0x04 +#define SUN20I_GPADC_CS_EN 0x08 +#define SUN20I_GPADC_FIFO_INTC 0x0c +#define SUN20I_GPADC_FIFO_INTS 0x10 +#define SUN20I_GPADC_FIFO_DATA 0X14 +#define SUN20I_GPADC_CB_DATA 0X18 +#define SUN20I_GPADC_DATAL_INTC 0x20 +#define SUN20I_GPADC_DATAH_INTC 0x24 +#define SUN20I_GPADC_DATA_INTC 0x28 +#define SUN20I_GPADC_DATAL_INTS 0x30 +#define SUN20I_GPADC_DATAH_INTS 0x34 +#define SUN20I_GPADC_DATA_INTS 0x38 +#define SUN20I_GPADC_CH_CMP_DATA(x) (0x40 + (x) * 4) +#define SUN20I_GPADC_CH_DATA(x) (0x80 + (x) * 4) + +#define SUN20I_GPADC_CTRL_ADC_AUTOCALI_EN_MASK BIT(23) +#define SUN20I_GPADC_CTRL_WORK_MODE_MASK GENMASK(19, 18) +#define SUN20I_GPADC_CTRL_ADC_EN_MASK BIT(16) +#define SUN20I_GPADC_CS_EN_ADC_CH(x) BIT(x) +#define SUN20I_GPADC_DATA_INTC_CH_DATA_IRQ_EN(x) BIT(x) + +#define SUN20I_GPADC_WORK_MODE_SINGLE 0 + +struct sun20i_gpadc_iio { + void __iomem *regs; + struct completion completion; + int last_channel; + /* + * Lock to protect the device state during a potential concurrent + * read access from userspace. Reading a raw value requires a sequence + * of register writes, then a wait for a completion callback, + * and finally a register read, during which userspace could issue + * another read request. This lock protects a read access from + * ocurring before another one has finished. + */ + struct mutex lock; +}; + +static int sun20i_gpadc_adc_read(struct sun20i_gpadc_iio *info, + struct iio_chan_spec const *chan, int *val) +{ + u32 ctrl; + int ret = IIO_VAL_INT; + + mutex_lock(&info->lock); + + reinit_completion(&info->completion); + + if (info->last_channel != chan->channel) { + info->last_channel = chan->channel; + + /* enable the analog input channel */ + writel(SUN20I_GPADC_CS_EN_ADC_CH(chan->channel), + info->regs + SUN20I_GPADC_CS_EN); + + /* enable the data irq for input channel */ + writel(SUN20I_GPADC_DATA_INTC_CH_DATA_IRQ_EN(chan->channel), + info->regs + SUN20I_GPADC_DATA_INTC); + } + + /* enable the ADC function */ + ctrl = readl(info->regs + SUN20I_GPADC_CTRL); + ctrl |= FIELD_PREP(SUN20I_GPADC_CTRL_ADC_EN_MASK, 1); + writel(ctrl, info->regs + SUN20I_GPADC_CTRL); + + /* + * According to the datasheet maximum acquire time(TACQ) can be + * (65535+1)/24Mhz and conversion time(CONV_TIME) is always constant + * and equal to 14/24Mhz, so (TACQ+CONV_TIME) <= 2.73125ms. + * A 10ms delay should be enough to make sure an interrupt occurs in + * normal conditions. If it doesn't occur, then there is a timeout. + */ + if (!wait_for_completion_timeout(&info->completion, msecs_to_jiffies(10))) { + ret = -ETIMEDOUT; + goto err_unlock; + } + + /* read the ADC data */ + *val = readl(info->regs + SUN20I_GPADC_CH_DATA(chan->channel)); + +err_unlock: + mutex_unlock(&info->lock); + + return ret; +} + +static int sun20i_gpadc_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, int *val, + int *val2, long mask) +{ + struct sun20i_gpadc_iio *info = iio_priv(indio_dev); + + switch (mask) { + case IIO_CHAN_INFO_RAW: + return sun20i_gpadc_adc_read(info, chan, val); + case IIO_CHAN_INFO_SCALE: + /* value in mv = 1800mV / 4096 raw */ + *val = 1800; + *val2 = 12; + return IIO_VAL_FRACTIONAL_LOG2; + default: + return -EINVAL; + } +} + +static irqreturn_t sun20i_gpadc_irq_handler(int irq, void *data) +{ + struct sun20i_gpadc_iio *info = data; + + /* clear data interrupt status register */ + writel(GENMASK(31, 0), info->regs + SUN20I_GPADC_DATA_INTS); + + complete(&info->completion); + + return IRQ_HANDLED; +} + +static const struct iio_info sun20i_gpadc_iio_info = { + .read_raw = sun20i_gpadc_read_raw, +}; + +static void sun20i_gpadc_reset_assert(void *data) +{ + struct reset_control *rst = data; + + reset_control_assert(rst); +} + +static int sun20i_gpadc_alloc_channels(struct iio_dev *indio_dev, + struct device *dev) +{ + unsigned int channel; + int num_channels, i, ret; + struct iio_chan_spec *channels; + struct fwnode_handle *node; + + num_channels = device_get_child_node_count(dev); + if (num_channels == 0) + return dev_err_probe(dev, -ENODEV, "no channel children\n"); + + channels = devm_kcalloc(dev, num_channels, sizeof(*channels), + GFP_KERNEL); + if (!channels) + return -ENOMEM; + + i = 0; + device_for_each_child_node(dev, node) { + ret = fwnode_property_read_u32(node, "reg", &channel); + if (ret) { + fwnode_handle_put(node); + return dev_err_probe(dev, ret, "invalid channel number\n"); + } + + channels[i].type = IIO_VOLTAGE; + channels[i].indexed = 1; + channels[i].channel = channel; + channels[i].info_mask_separate = BIT(IIO_CHAN_INFO_RAW); + channels[i].info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE); + + i++; + } + + indio_dev->channels = channels; + indio_dev->num_channels = num_channels; + + return 0; +} + +static int sun20i_gpadc_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct iio_dev *indio_dev; + struct sun20i_gpadc_iio *info; + struct reset_control *rst; + struct clk *clk; + int irq; + int ret; + + indio_dev = devm_iio_device_alloc(dev, sizeof(*info)); + if (!indio_dev) + return -ENOMEM; + + info = iio_priv(indio_dev); + info->last_channel = -1; + + mutex_init(&info->lock); + init_completion(&info->completion); + + ret = sun20i_gpadc_alloc_channels(indio_dev, dev); + if (ret) + return ret; + + indio_dev->info = &sun20i_gpadc_iio_info; + indio_dev->name = SUN20I_GPADC_DRIVER_NAME; + + info->regs = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(info->regs)) + return PTR_ERR(info->regs); + + clk = devm_clk_get_enabled(dev, NULL); + if (IS_ERR(clk)) + return dev_err_probe(dev, PTR_ERR(clk), "failed to enable bus clock\n"); + + rst = devm_reset_control_get_exclusive(dev, NULL); + if (IS_ERR(rst)) + return dev_err_probe(dev, PTR_ERR(rst), "failed to get reset control\n"); + + ret = reset_control_deassert(rst); + if (ret) + return dev_err_probe(dev, ret, "failed to deassert reset\n"); + + ret = devm_add_action_or_reset(dev, sun20i_gpadc_reset_assert, rst); + if (ret) + return ret; + + irq = platform_get_irq(pdev, 0); + if (irq < 0) + return irq; + + ret = devm_request_irq(dev, irq, sun20i_gpadc_irq_handler, 0, + dev_name(dev), info); + if (ret) + return dev_err_probe(dev, ret, "failed requesting irq %d\n", irq); + + writel(FIELD_PREP(SUN20I_GPADC_CTRL_ADC_AUTOCALI_EN_MASK, 1) | + FIELD_PREP(SUN20I_GPADC_CTRL_WORK_MODE_MASK, SUN20I_GPADC_WORK_MODE_SINGLE), + info->regs + SUN20I_GPADC_CTRL); + + ret = devm_iio_device_register(dev, indio_dev); + if (ret) + return dev_err_probe(dev, ret, "could not register the device\n"); + + return 0; +} + +static const struct of_device_id sun20i_gpadc_of_id[] = { + { .compatible = "allwinner,sun20i-d1-gpadc" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, sun20i_gpadc_of_id); + +static struct platform_driver sun20i_gpadc_driver = { + .driver = { + .name = SUN20I_GPADC_DRIVER_NAME, + .of_match_table = sun20i_gpadc_of_id, + }, + .probe = sun20i_gpadc_probe, +}; +module_platform_driver(sun20i_gpadc_driver); + +MODULE_DESCRIPTION("ADC driver for sunxi platforms"); +MODULE_AUTHOR("Maksim Kiselev "); +MODULE_LICENSE("GPL"); diff --git a/drivers/iio/adc/sun4i-gpadc-iio.c b/drivers/iio/adc/sun4i-gpadc-iio.c index a5322550c422..25bba96367a8 100644 --- a/drivers/iio/adc/sun4i-gpadc-iio.c +++ b/drivers/iio/adc/sun4i-gpadc-iio.c @@ -24,7 +24,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/iio/adc/ti-lmp92064.c b/drivers/iio/adc/ti-lmp92064.c index c30ed824924f..84ba5c4a0eea 100644 --- a/drivers/iio/adc/ti-lmp92064.c +++ b/drivers/iio/adc/ti-lmp92064.c @@ -16,7 +16,10 @@ #include #include +#include #include +#include +#include #define TI_LMP92064_REG_CONFIG_A 0x0000 #define TI_LMP92064_REG_CONFIG_B 0x0001 @@ -91,6 +94,12 @@ static const struct iio_chan_spec lmp92064_adc_channels[] = { .address = TI_LMP92064_CHAN_INC, .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), + .scan_index = TI_LMP92064_CHAN_INC, + .scan_type = { + .sign = 'u', + .realbits = 12, + .storagebits = 16, + }, .datasheet_name = "INC", }, { @@ -98,8 +107,20 @@ static const struct iio_chan_spec lmp92064_adc_channels[] = { .address = TI_LMP92064_CHAN_INV, .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), + .scan_index = TI_LMP92064_CHAN_INV, + .scan_type = { + .sign = 'u', + .realbits = 12, + .storagebits = 16, + }, .datasheet_name = "INV", }, + IIO_CHAN_SOFT_TIMESTAMP(2), +}; + +static const unsigned long lmp92064_scan_masks[] = { + BIT(TI_LMP92064_CHAN_INC) | BIT(TI_LMP92064_CHAN_INV), + 0 }; static int lmp92064_read_meas(struct lmp92064_adc_priv *priv, u16 *res) @@ -171,6 +192,32 @@ static int lmp92064_read_raw(struct iio_dev *indio_dev, } } +static irqreturn_t lmp92064_trigger_handler(int irq, void *p) +{ + struct iio_poll_func *pf = p; + struct iio_dev *indio_dev = pf->indio_dev; + struct lmp92064_adc_priv *priv = iio_priv(indio_dev); + struct { + u16 values[2]; + int64_t timestamp __aligned(8); + } data; + int ret; + + memset(&data, 0, sizeof(data)); + + ret = lmp92064_read_meas(priv, data.values); + if (ret) + goto err; + + iio_push_to_buffers_with_timestamp(indio_dev, &data, + iio_get_time_ns(indio_dev)); + +err: + iio_trigger_notify_done(indio_dev->trig); + + return IRQ_HANDLED; +} + static int lmp92064_reset(struct lmp92064_adc_priv *priv, struct gpio_desc *gpio_reset) { @@ -301,6 +348,12 @@ static int lmp92064_adc_probe(struct spi_device *spi) indio_dev->channels = lmp92064_adc_channels; indio_dev->num_channels = ARRAY_SIZE(lmp92064_adc_channels); indio_dev->info = &lmp92064_adc_info; + indio_dev->available_scan_masks = lmp92064_scan_masks; + + ret = devm_iio_triggered_buffer_setup(dev, indio_dev, NULL, + lmp92064_trigger_handler, NULL); + if (ret) + return dev_err_probe(dev, ret, "Failed to setup buffered read\n"); return devm_iio_device_register(dev, indio_dev); } diff --git a/drivers/iio/adc/ti_am335x_adc.c b/drivers/iio/adc/ti_am335x_adc.c index 642c5c4895e3..8db7a01cb5fb 100644 --- a/drivers/iio/adc/ti_am335x_adc.c +++ b/drivers/iio/adc/ti_am335x_adc.c @@ -14,7 +14,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/iio/amplifiers/Kconfig b/drivers/iio/amplifiers/Kconfig index f217a2a1e958..b54fe01734b0 100644 --- a/drivers/iio/amplifiers/Kconfig +++ b/drivers/iio/amplifiers/Kconfig @@ -18,6 +18,7 @@ config AD8366 AD8366 Dual-Digital Variable Gain Amplifier (VGA) ADA4961 BiCMOS RF Digital Gain Amplifier (DGA) ADL5240 Digitally controlled variable gain amplifier (VGA) + HMC792A 0.25 dB LSB GaAs MMIC 6-Bit Digital Attenuator HMC1119 0.25 dB LSB, 7-Bit, Silicon Digital Attenuator To compile this driver as a module, choose M here: the diff --git a/drivers/iio/amplifiers/ad8366.c b/drivers/iio/amplifiers/ad8366.c index 8d8c8ea94258..31564afb13a2 100644 --- a/drivers/iio/amplifiers/ad8366.c +++ b/drivers/iio/amplifiers/ad8366.c @@ -5,6 +5,7 @@ * AD8366 Dual-Digital Variable Gain Amplifier (VGA) * ADA4961 BiCMOS RF Digital Gain Amplifier (DGA) * ADL5240 Digitally controlled variable gain amplifier (VGA) + * HMC792A 0.25 dB LSB GaAs MMIC 6-Bit Digital Attenuator * HMC1119 0.25 dB LSB, 7-Bit, Silicon Digital Attenuator * * Copyright 2012-2019 Analog Devices Inc. @@ -28,6 +29,7 @@ enum ad8366_type { ID_AD8366, ID_ADA4961, ID_ADL5240, + ID_HMC792, ID_HMC1119, }; @@ -64,6 +66,10 @@ static struct ad8366_info ad8366_infos[] = { .gain_min = -11500, .gain_max = 20000, }, + [ID_HMC792] = { + .gain_min = -15750, + .gain_max = 0, + }, [ID_HMC1119] = { .gain_min = -31750, .gain_max = 0, @@ -90,6 +96,7 @@ static int ad8366_write(struct iio_dev *indio_dev, case ID_ADL5240: st->data[0] = (ch_a & 0x3F); break; + case ID_HMC792: case ID_HMC1119: st->data[0] = ch_a; break; @@ -127,6 +134,9 @@ static int ad8366_read_raw(struct iio_dev *indio_dev, case ID_ADL5240: gain = 20000 - 31500 + code * 500; break; + case ID_HMC792: + gain = -1 * code * 500; + break; case ID_HMC1119: gain = -1 * code * 250; break; @@ -176,6 +186,9 @@ static int ad8366_write_raw(struct iio_dev *indio_dev, case ID_ADL5240: code = ((gain - 500 - 20000) / 500) & 0x3F; break; + case ID_HMC792: + code = (abs(gain) / 500) & 0x3F; + break; case ID_HMC1119: code = (abs(gain) / 250) & 0x7F; break; @@ -261,6 +274,7 @@ static int ad8366_probe(struct spi_device *spi) break; case ID_ADA4961: case ID_ADL5240: + case ID_HMC792: case ID_HMC1119: st->reset_gpio = devm_gpiod_get_optional(&spi->dev, "reset", GPIOD_OUT_HIGH); if (IS_ERR(st->reset_gpio)) { @@ -314,6 +328,7 @@ static const struct spi_device_id ad8366_id[] = { {"ad8366", ID_AD8366}, {"ada4961", ID_ADA4961}, {"adl5240", ID_ADL5240}, + {"hmc792a", ID_HMC792}, {"hmc1119", ID_HMC1119}, {} }; diff --git a/drivers/iio/cdc/ad7150.c b/drivers/iio/cdc/ad7150.c index d656d2f12755..4c03b9e834b8 100644 --- a/drivers/iio/cdc/ad7150.c +++ b/drivers/iio/cdc/ad7150.c @@ -541,6 +541,7 @@ static int ad7150_probe(struct i2c_client *client) const struct i2c_device_id *id = i2c_client_get_device_id(client); struct ad7150_chip_info *chip; struct iio_dev *indio_dev; + bool use_irq = true; int ret; indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*chip)); @@ -561,14 +562,13 @@ static int ad7150_probe(struct i2c_client *client) chip->interrupts[0] = fwnode_irq_get(dev_fwnode(&client->dev), 0); if (chip->interrupts[0] < 0) - return chip->interrupts[0]; - if (id->driver_data == AD7150) { + use_irq = false; + else if (id->driver_data == AD7150) { chip->interrupts[1] = fwnode_irq_get(dev_fwnode(&client->dev), 1); if (chip->interrupts[1] < 0) - return chip->interrupts[1]; + use_irq = false; } - if (chip->interrupts[0] && - (id->driver_data == AD7151 || chip->interrupts[1])) { + if (use_irq) { irq_set_status_flags(chip->interrupts[0], IRQ_NOAUTOEN); ret = devm_request_threaded_irq(&client->dev, chip->interrupts[0], diff --git a/drivers/iio/chemical/scd4x.c b/drivers/iio/chemical/scd4x.c index a4f22d926400..ca6b20270711 100644 --- a/drivers/iio/chemical/scd4x.c +++ b/drivers/iio/chemical/scd4x.c @@ -36,6 +36,8 @@ #define SCD4X_WRITE_BUF_SIZE 5 #define SCD4X_FRC_MIN_PPM 0 #define SCD4X_FRC_MAX_PPM 2000 +#define SCD4X_PRESSURE_COMP_MIN_MBAR 700 +#define SCD4X_PRESSURE_COMP_MAX_MBAR 1200 #define SCD4X_READY_MASK 0x01 /*Commands SCD4X*/ @@ -45,6 +47,8 @@ enum scd4x_cmd { CMD_STOP_MEAS = 0x3f86, CMD_SET_TEMP_OFFSET = 0x241d, CMD_GET_TEMP_OFFSET = 0x2318, + CMD_SET_AMB_PRESSURE = 0xe000, + CMD_GET_AMB_PRESSURE = 0xe000, CMD_FRC = 0x362f, CMD_SET_ASC = 0x2416, CMD_GET_ASC = 0x2313, @@ -137,7 +141,8 @@ static int scd4x_read(struct scd4x_state *state, enum scd4x_cmd cmd, * Measurement needs to be stopped before sending commands. * Except for reading measurement and data ready command. */ - if ((cmd != CMD_GET_DATA_READY) && (cmd != CMD_READ_MEAS)) { + if ((cmd != CMD_GET_DATA_READY) && (cmd != CMD_READ_MEAS) && + (cmd != CMD_GET_AMB_PRESSURE)) { ret = scd4x_send_command(state, CMD_STOP_MEAS); if (ret) return ret; @@ -166,7 +171,8 @@ static int scd4x_read(struct scd4x_state *state, enum scd4x_cmd cmd, } /* start measurement */ - if ((cmd != CMD_GET_DATA_READY) && (cmd != CMD_READ_MEAS)) { + if ((cmd != CMD_GET_DATA_READY) && (cmd != CMD_READ_MEAS) && + (cmd != CMD_GET_AMB_PRESSURE)) { ret = scd4x_send_command(state, CMD_START_MEAS); if (ret) return ret; @@ -188,9 +194,11 @@ static int scd4x_write(struct scd4x_state *state, enum scd4x_cmd cmd, uint16_t a buf[4] = crc; /* measurement needs to be stopped before sending commands */ - ret = scd4x_send_command(state, CMD_STOP_MEAS); - if (ret) - return ret; + if (cmd != CMD_SET_AMB_PRESSURE) { + ret = scd4x_send_command(state, CMD_STOP_MEAS); + if (ret) + return ret; + } /* execution time */ msleep_interruptible(500); @@ -200,7 +208,7 @@ static int scd4x_write(struct scd4x_state *state, enum scd4x_cmd cmd, uint16_t a return ret; /* start measurement, except for forced calibration command */ - if (cmd != CMD_FRC) { + if ((cmd != CMD_FRC) && (cmd != CMD_SET_AMB_PRESSURE)) { ret = scd4x_send_command(state, CMD_START_MEAS); if (ret) return ret; @@ -338,6 +346,18 @@ static int scd4x_read_raw(struct iio_dev *indio_dev, switch (mask) { case IIO_CHAN_INFO_RAW: + if (chan->output) { + mutex_lock(&state->lock); + ret = scd4x_read(state, CMD_GET_AMB_PRESSURE, &tmp, sizeof(tmp)); + mutex_unlock(&state->lock); + + if (ret) + return ret; + + *val = be16_to_cpu(tmp); + return IIO_VAL_INT; + } + ret = iio_device_claim_direct_mode(indio_dev); if (ret) return ret; @@ -386,6 +406,25 @@ static int scd4x_read_raw(struct iio_dev *indio_dev, } } +static const int scd4x_pressure_calibbias_available[] = { + SCD4X_PRESSURE_COMP_MIN_MBAR, 1, SCD4X_PRESSURE_COMP_MAX_MBAR, +}; + +static int scd4x_read_avail(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, + const int **vals, int *type, int *length, long mask) +{ + switch (mask) { + case IIO_CHAN_INFO_RAW: + *vals = scd4x_pressure_calibbias_available; + *type = IIO_VAL_INT; + + return IIO_AVAIL_RANGE; + } + + return -EINVAL; +} + + static int scd4x_write_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int val, int val2, long mask) { @@ -399,6 +438,21 @@ static int scd4x_write_raw(struct iio_dev *indio_dev, struct iio_chan_spec const mutex_unlock(&state->lock); return ret; + case IIO_CHAN_INFO_RAW: + switch (chan->type) { + case IIO_PRESSURE: + if (val < SCD4X_PRESSURE_COMP_MIN_MBAR || + val > SCD4X_PRESSURE_COMP_MAX_MBAR) + return -EINVAL; + + mutex_lock(&state->lock); + ret = scd4x_write(state, CMD_SET_AMB_PRESSURE, val); + mutex_unlock(&state->lock); + + return ret; + default: + return -EINVAL; + } default: return -EINVAL; } @@ -503,9 +557,22 @@ static const struct iio_info scd4x_info = { .attrs = &scd4x_attr_group, .read_raw = scd4x_read_raw, .write_raw = scd4x_write_raw, + .read_avail = scd4x_read_avail, }; static const struct iio_chan_spec scd4x_channels[] = { + { + /* + * this channel is special in a sense we are pretending that + * sensor is able to change measurement chamber pressure but in + * fact we're just setting pressure compensation value + */ + .type = IIO_PRESSURE, + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), + .info_mask_separate_available = BIT(IIO_CHAN_INFO_RAW), + .output = 1, + .scan_index = -1, + }, { .type = IIO_CONCENTRATION, .channel2 = IIO_MOD_CO2, diff --git a/drivers/iio/common/Kconfig b/drivers/iio/common/Kconfig index 0334b4954773..1ccb5ccf3706 100644 --- a/drivers/iio/common/Kconfig +++ b/drivers/iio/common/Kconfig @@ -5,6 +5,7 @@ source "drivers/iio/common/cros_ec_sensors/Kconfig" source "drivers/iio/common/hid-sensors/Kconfig" +source "drivers/iio/common/inv_sensors/Kconfig" source "drivers/iio/common/ms_sensors/Kconfig" source "drivers/iio/common/scmi_sensors/Kconfig" source "drivers/iio/common/ssp_sensors/Kconfig" diff --git a/drivers/iio/common/Makefile b/drivers/iio/common/Makefile index fad40e1e1718..d3e952239a62 100644 --- a/drivers/iio/common/Makefile +++ b/drivers/iio/common/Makefile @@ -10,6 +10,7 @@ # When adding new entries keep the list in alphabetical order obj-y += cros_ec_sensors/ obj-y += hid-sensors/ +obj-y += inv_sensors/ obj-y += ms_sensors/ obj-y += scmi_sensors/ obj-y += ssp_sensors/ diff --git a/drivers/iio/common/inv_sensors/Kconfig b/drivers/iio/common/inv_sensors/Kconfig new file mode 100644 index 000000000000..28815fb43157 --- /dev/null +++ b/drivers/iio/common/inv_sensors/Kconfig @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0-only +# +# TDK-InvenSense sensors common library +# + +config IIO_INV_SENSORS_TIMESTAMP + tristate diff --git a/drivers/iio/common/inv_sensors/Makefile b/drivers/iio/common/inv_sensors/Makefile new file mode 100644 index 000000000000..dcf39f249112 --- /dev/null +++ b/drivers/iio/common/inv_sensors/Makefile @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0 +# +# Makefile for TDK-InvenSense sensors module. +# + +obj-$(CONFIG_IIO_INV_SENSORS_TIMESTAMP) += inv_sensors_timestamp.o diff --git a/drivers/iio/imu/inv_icm42600/inv_icm42600_timestamp.c b/drivers/iio/common/inv_sensors/inv_sensors_timestamp.c similarity index 56% rename from drivers/iio/imu/inv_icm42600/inv_icm42600_timestamp.c rename to drivers/iio/common/inv_sensors/inv_sensors_timestamp.c index 37cbf08acb3a..03823ee57f59 100644 --- a/drivers/iio/imu/inv_icm42600/inv_icm42600_timestamp.c +++ b/drivers/iio/common/inv_sensors/inv_sensors_timestamp.c @@ -3,25 +3,23 @@ * Copyright (C) 2020 Invensense, Inc. */ +#include #include -#include #include +#include -#include "inv_icm42600.h" -#include "inv_icm42600_timestamp.h" +#include -/* internal chip period is 32kHz, 31250ns */ -#define INV_ICM42600_TIMESTAMP_PERIOD 31250 -/* allow a jitter of +/- 2% */ -#define INV_ICM42600_TIMESTAMP_JITTER 2 -/* compute min and max periods accepted */ -#define INV_ICM42600_TIMESTAMP_MIN_PERIOD(_p) \ - (((_p) * (100 - INV_ICM42600_TIMESTAMP_JITTER)) / 100) -#define INV_ICM42600_TIMESTAMP_MAX_PERIOD(_p) \ - (((_p) * (100 + INV_ICM42600_TIMESTAMP_JITTER)) / 100) +/* compute jitter, min and max following jitter in per mille */ +#define INV_SENSORS_TIMESTAMP_JITTER(_val, _jitter) \ + (div_s64((_val) * (_jitter), 1000)) +#define INV_SENSORS_TIMESTAMP_MIN(_val, _jitter) \ + (((_val) * (1000 - (_jitter))) / 1000) +#define INV_SENSORS_TIMESTAMP_MAX(_val, _jitter) \ + (((_val) * (1000 + (_jitter))) / 1000) /* Add a new value inside an accumulator and update the estimate value */ -static void inv_update_acc(struct inv_icm42600_timestamp_acc *acc, uint32_t val) +static void inv_update_acc(struct inv_sensors_timestamp_acc *acc, uint32_t val) { uint64_t sum = 0; size_t i; @@ -40,65 +38,57 @@ static void inv_update_acc(struct inv_icm42600_timestamp_acc *acc, uint32_t val) acc->val = div_u64(sum, i); } -void inv_icm42600_timestamp_init(struct inv_icm42600_timestamp *ts, - uint32_t period) +void inv_sensors_timestamp_init(struct inv_sensors_timestamp *ts, + const struct inv_sensors_timestamp_chip *chip) { - /* initial odr for sensor after reset is 1kHz */ - const uint32_t default_period = 1000000; + memset(ts, 0, sizeof(*ts)); + + /* save chip parameters and compute min and max clock period */ + ts->chip = *chip; + ts->min_period = INV_SENSORS_TIMESTAMP_MIN(chip->clock_period, chip->jitter); + ts->max_period = INV_SENSORS_TIMESTAMP_MAX(chip->clock_period, chip->jitter); /* current multiplier and period values after reset */ - ts->mult = default_period / INV_ICM42600_TIMESTAMP_PERIOD; - ts->period = default_period; - /* new set multiplier is the one from chip initialization */ - ts->new_mult = period / INV_ICM42600_TIMESTAMP_PERIOD; + ts->mult = chip->init_period / chip->clock_period; + ts->period = chip->init_period; /* use theoretical value for chip period */ - inv_update_acc(&ts->chip_period, INV_ICM42600_TIMESTAMP_PERIOD); + inv_update_acc(&ts->chip_period, chip->clock_period); } +EXPORT_SYMBOL_NS_GPL(inv_sensors_timestamp_init, IIO_INV_SENSORS_TIMESTAMP); -int inv_icm42600_timestamp_setup(struct inv_icm42600_state *st) -{ - unsigned int val; - - /* enable timestamp register */ - val = INV_ICM42600_TMST_CONFIG_TMST_TO_REGS_EN | - INV_ICM42600_TMST_CONFIG_TMST_EN; - return regmap_update_bits(st->map, INV_ICM42600_REG_TMST_CONFIG, - INV_ICM42600_TMST_CONFIG_MASK, val); -} - -int inv_icm42600_timestamp_update_odr(struct inv_icm42600_timestamp *ts, - uint32_t period, bool fifo) +int inv_sensors_timestamp_update_odr(struct inv_sensors_timestamp *ts, + uint32_t period, bool fifo) { /* when FIFO is on, prevent odr change if one is already pending */ if (fifo && ts->new_mult != 0) return -EAGAIN; - ts->new_mult = period / INV_ICM42600_TIMESTAMP_PERIOD; + ts->new_mult = period / ts->chip.clock_period; return 0; } +EXPORT_SYMBOL_NS_GPL(inv_sensors_timestamp_update_odr, IIO_INV_SENSORS_TIMESTAMP); -static bool inv_validate_period(uint32_t period, uint32_t mult) +static bool inv_validate_period(struct inv_sensors_timestamp *ts, uint32_t period, uint32_t mult) { - const uint32_t chip_period = INV_ICM42600_TIMESTAMP_PERIOD; uint32_t period_min, period_max; /* check that period is acceptable */ - period_min = INV_ICM42600_TIMESTAMP_MIN_PERIOD(chip_period) * mult; - period_max = INV_ICM42600_TIMESTAMP_MAX_PERIOD(chip_period) * mult; + period_min = ts->min_period * mult; + period_max = ts->max_period * mult; if (period > period_min && period < period_max) return true; else return false; } -static bool inv_update_chip_period(struct inv_icm42600_timestamp *ts, - uint32_t mult, uint32_t period) +static bool inv_update_chip_period(struct inv_sensors_timestamp *ts, + uint32_t mult, uint32_t period) { uint32_t new_chip_period; - if (!inv_validate_period(period, mult)) + if (!inv_validate_period(ts, period, mult)) return false; /* update chip internal period estimation */ @@ -109,7 +99,7 @@ static bool inv_update_chip_period(struct inv_icm42600_timestamp *ts, return true; } -static void inv_align_timestamp_it(struct inv_icm42600_timestamp *ts) +static void inv_align_timestamp_it(struct inv_sensors_timestamp *ts) { int64_t delta, jitter; int64_t adjust; @@ -118,7 +108,7 @@ static void inv_align_timestamp_it(struct inv_icm42600_timestamp *ts) delta = ts->it.lo - ts->timestamp; /* adjust timestamp while respecting jitter */ - jitter = div_s64((int64_t)ts->period * INV_ICM42600_TIMESTAMP_JITTER, 100); + jitter = INV_SENSORS_TIMESTAMP_JITTER((int64_t)ts->period, ts->chip.jitter); if (delta > jitter) adjust = jitter; else if (delta < -jitter) @@ -129,13 +119,13 @@ static void inv_align_timestamp_it(struct inv_icm42600_timestamp *ts) ts->timestamp += adjust; } -void inv_icm42600_timestamp_interrupt(struct inv_icm42600_timestamp *ts, +void inv_sensors_timestamp_interrupt(struct inv_sensors_timestamp *ts, uint32_t fifo_period, size_t fifo_nb, size_t sensor_nb, int64_t timestamp) { - struct inv_icm42600_timestamp_interval *it; + struct inv_sensors_timestamp_interval *it; int64_t delta, interval; - const uint32_t fifo_mult = fifo_period / INV_ICM42600_TIMESTAMP_PERIOD; + const uint32_t fifo_mult = fifo_period / ts->chip.clock_period; uint32_t period = ts->period; bool valid = false; @@ -165,10 +155,11 @@ void inv_icm42600_timestamp_interrupt(struct inv_icm42600_timestamp *ts, if (valid) inv_align_timestamp_it(ts); } +EXPORT_SYMBOL_NS_GPL(inv_sensors_timestamp_interrupt, IIO_INV_SENSORS_TIMESTAMP); -void inv_icm42600_timestamp_apply_odr(struct inv_icm42600_timestamp *ts, - uint32_t fifo_period, size_t fifo_nb, - unsigned int fifo_no) +void inv_sensors_timestamp_apply_odr(struct inv_sensors_timestamp *ts, + uint32_t fifo_period, size_t fifo_nb, + unsigned int fifo_no) { int64_t interval; uint32_t fifo_mult; @@ -189,10 +180,15 @@ void inv_icm42600_timestamp_apply_odr(struct inv_icm42600_timestamp *ts, */ if (ts->timestamp != 0) { /* compute measured fifo period */ - fifo_mult = fifo_period / INV_ICM42600_TIMESTAMP_PERIOD; + fifo_mult = fifo_period / ts->chip.clock_period; fifo_period = fifo_mult * ts->chip_period.val; /* computes time interval between interrupt and this sample */ interval = (int64_t)(fifo_nb - fifo_no) * (int64_t)fifo_period; ts->timestamp = ts->it.up - interval; } } +EXPORT_SYMBOL_NS_GPL(inv_sensors_timestamp_apply_odr, IIO_INV_SENSORS_TIMESTAMP); + +MODULE_AUTHOR("InvenSense, Inc."); +MODULE_DESCRIPTION("InvenSense sensors timestamp module"); +MODULE_LICENSE("GPL"); diff --git a/drivers/iio/dac/Kconfig b/drivers/iio/dac/Kconfig index 3acd9c3f388e..93b8be183de6 100644 --- a/drivers/iio/dac/Kconfig +++ b/drivers/iio/dac/Kconfig @@ -389,6 +389,17 @@ config MCP4725 To compile this driver as a module, choose M here: the module will be called mcp4725. +config MCP4728 + tristate "MCP4728 DAC driver" + depends on I2C + help + Say Y here if you want to build a driver for the Microchip + MCP4728 quad channel, 12-bit digital-to-analog converter (DAC) + with I2C interface. + + To compile this driver as a module, choose M here: the module + will be called mcp4728. + config MCP4922 tristate "MCP4902, MCP4912, MCP4922 DAC driver" depends on SPI diff --git a/drivers/iio/dac/Makefile b/drivers/iio/dac/Makefile index addd97a78838..5b2bac900d5a 100644 --- a/drivers/iio/dac/Makefile +++ b/drivers/iio/dac/Makefile @@ -41,6 +41,7 @@ obj-$(CONFIG_MAX517) += max517.o obj-$(CONFIG_MAX5522) += max5522.o obj-$(CONFIG_MAX5821) += max5821.o obj-$(CONFIG_MCP4725) += mcp4725.o +obj-$(CONFIG_MCP4728) += mcp4728.o obj-$(CONFIG_MCP4922) += mcp4922.o obj-$(CONFIG_STM32_DAC_CORE) += stm32-dac-core.o obj-$(CONFIG_STM32_DAC) += stm32-dac.o diff --git a/drivers/iio/dac/mcp4728.c b/drivers/iio/dac/mcp4728.c new file mode 100644 index 000000000000..5113f67ddc31 --- /dev/null +++ b/drivers/iio/dac/mcp4728.c @@ -0,0 +1,618 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Support for Microchip MCP4728 + * + * Copyright (C) 2023 Andrea Collamati + * + * Based on mcp4725 by Peter Meerwald + * + * Driver for the Microchip I2C 12-bit digital-to-analog quad channels + * converter (DAC). + * + * (7-bit I2C slave address 0x60, the three LSBs can be configured in + * hardware) + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MCP4728_RESOLUTION 12 +#define MCP4728_N_CHANNELS 4 + +#define MCP4728_CMD_MASK GENMASK(7, 3) +#define MCP4728_CHSEL_MASK GENMASK(2, 1) +#define MCP4728_UDAC_MASK BIT(0) + +#define MCP4728_VREF_MASK BIT(7) +#define MCP4728_PDMODE_MASK GENMASK(6, 5) +#define MCP4728_GAIN_MASK BIT(4) + +#define MCP4728_DAC_H_MASK GENMASK(3, 0) +#define MCP4728_DAC_L_MASK GENMASK(7, 0) + +#define MCP4728_RDY_MASK BIT(7) + +#define MCP4728_MW_CMD 0x08 /* Multiwrite Command */ +#define MCP4728_SW_CMD 0x0A /* Sequential Write Command with EEPROM */ + +#define MCP4728_READ_RESPONSE_LEN (MCP4728_N_CHANNELS * 3 * 2) +#define MCP4728_WRITE_EEPROM_LEN (1 + MCP4728_N_CHANNELS * 2) + +enum vref_mode { + MCP4728_VREF_EXTERNAL_VDD = 0, + MCP4728_VREF_INTERNAL_2048mV = 1, +}; + +enum gain_mode { + MCP4728_GAIN_X1 = 0, + MCP4728_GAIN_X2 = 1, +}; + +enum iio_powerdown_mode { + MCP4728_IIO_1K, + MCP4728_IIO_100K, + MCP4728_IIO_500K, +}; + +struct mcp4728_channel_data { + enum vref_mode ref_mode; + enum iio_powerdown_mode pd_mode; + enum gain_mode g_mode; + u16 dac_value; +}; + +/* MCP4728 Full Scale Ranges + * the device available ranges are + * - VREF = VDD FSR = from 0.0V to VDD + * - VREF = Internal Gain = 1 FSR = from 0.0V to VREF + * - VREF = Internal Gain = 2 FSR = from 0.0V to 2*VREF + */ +enum mcp4728_scale { + MCP4728_SCALE_VDD, + MCP4728_SCALE_VINT_NO_GAIN, + MCP4728_SCALE_VINT_GAIN_X2, + MCP4728_N_SCALES +}; + +struct mcp4728_data { + struct i2c_client *client; + struct regulator *vdd_reg; + bool powerdown; + int scales_avail[MCP4728_N_SCALES * 2]; + struct mcp4728_channel_data chdata[MCP4728_N_CHANNELS]; +}; + +#define MCP4728_CHAN(chan) { \ + .type = IIO_VOLTAGE, \ + .output = 1, \ + .indexed = 1, \ + .channel = chan, \ + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ + BIT(IIO_CHAN_INFO_SCALE), \ + .info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_SCALE), \ + .ext_info = mcp4728_ext_info, \ +} + +static int mcp4728_suspend(struct device *dev); +static int mcp4728_resume(struct device *dev); + +static ssize_t mcp4728_store_eeprom(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t len) +{ + struct iio_dev *indio_dev = dev_to_iio_dev(dev); + struct mcp4728_data *data = iio_priv(indio_dev); + u8 outbuf[MCP4728_WRITE_EEPROM_LEN]; + int tries = 20; + u8 inbuf[3]; + bool state; + int ret; + unsigned int i; + + ret = kstrtobool(buf, &state); + if (ret < 0) + return ret; + + if (!state) + return 0; + + outbuf[0] = FIELD_PREP(MCP4728_CMD_MASK, MCP4728_SW_CMD); + + for (i = 0; i < MCP4728_N_CHANNELS; i++) { + struct mcp4728_channel_data *ch = &data->chdata[i]; + int offset = 1 + i * 2; + + outbuf[offset] = FIELD_PREP(MCP4728_VREF_MASK, ch->ref_mode); + + if (data->powerdown) { + u8 mcp4728_pd_mode = ch->pd_mode + 1; + + outbuf[offset] |= FIELD_PREP(MCP4728_PDMODE_MASK, + mcp4728_pd_mode); + } + + outbuf[offset] |= FIELD_PREP(MCP4728_GAIN_MASK, ch->g_mode); + outbuf[offset] |= + FIELD_PREP(MCP4728_DAC_H_MASK, ch->dac_value >> 8); + outbuf[offset + 1] = + FIELD_PREP(MCP4728_DAC_L_MASK, ch->dac_value); + } + + ret = i2c_master_send(data->client, outbuf, MCP4728_WRITE_EEPROM_LEN); + if (ret < 0) + return ret; + else if (ret != MCP4728_WRITE_EEPROM_LEN) + return -EIO; + + /* wait RDY signal for write complete, takes up to 50ms */ + while (tries--) { + msleep(20); + ret = i2c_master_recv(data->client, inbuf, 3); + if (ret < 0) + return ret; + else if (ret != 3) + return -EIO; + + if (FIELD_GET(MCP4728_RDY_MASK, inbuf[0])) + break; + } + + if (tries < 0) { + dev_err(&data->client->dev, "%s failed, incomplete\n", + __func__); + return -EIO; + } + return len; +} + +static IIO_DEVICE_ATTR(store_eeprom, 0200, NULL, mcp4728_store_eeprom, 0); + +static struct attribute *mcp4728_attributes[] = { + &iio_dev_attr_store_eeprom.dev_attr.attr, + NULL, +}; + +static const struct attribute_group mcp4728_attribute_group = { + .attrs = mcp4728_attributes, +}; + +static int mcp4728_program_channel_cfg(int channel, struct iio_dev *indio_dev) +{ + struct mcp4728_data *data = iio_priv(indio_dev); + struct mcp4728_channel_data *ch = &data->chdata[channel]; + u8 outbuf[3]; + int ret; + + outbuf[0] = FIELD_PREP(MCP4728_CMD_MASK, MCP4728_MW_CMD); + outbuf[0] |= FIELD_PREP(MCP4728_CHSEL_MASK, channel); + outbuf[0] |= FIELD_PREP(MCP4728_UDAC_MASK, 0); + + outbuf[1] = FIELD_PREP(MCP4728_VREF_MASK, ch->ref_mode); + + if (data->powerdown) + outbuf[1] |= FIELD_PREP(MCP4728_PDMODE_MASK, ch->pd_mode + 1); + + outbuf[1] |= FIELD_PREP(MCP4728_GAIN_MASK, ch->g_mode); + outbuf[1] |= FIELD_PREP(MCP4728_DAC_H_MASK, ch->dac_value >> 8); + outbuf[2] = FIELD_PREP(MCP4728_DAC_L_MASK, ch->dac_value); + + ret = i2c_master_send(data->client, outbuf, 3); + if (ret < 0) + return ret; + else if (ret != 3) + return -EIO; + + return 0; +} + +static const char *const mcp4728_powerdown_modes[] = { "1kohm_to_gnd", + "100kohm_to_gnd", + "500kohm_to_gnd" }; + +static int mcp4728_get_powerdown_mode(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan) +{ + struct mcp4728_data *data = iio_priv(indio_dev); + + return data->chdata[chan->channel].pd_mode; +} + +static int mcp4728_set_powerdown_mode(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + unsigned int mode) +{ + struct mcp4728_data *data = iio_priv(indio_dev); + + data->chdata[chan->channel].pd_mode = mode; + + return 0; +} + +static ssize_t mcp4728_read_powerdown(struct iio_dev *indio_dev, + uintptr_t private, + const struct iio_chan_spec *chan, + char *buf) +{ + struct mcp4728_data *data = iio_priv(indio_dev); + + return sysfs_emit(buf, "%d\n", data->powerdown); +} + +static ssize_t mcp4728_write_powerdown(struct iio_dev *indio_dev, + uintptr_t private, + const struct iio_chan_spec *chan, + const char *buf, size_t len) +{ + struct mcp4728_data *data = iio_priv(indio_dev); + bool state; + int ret; + + ret = kstrtobool(buf, &state); + if (ret) + return ret; + + if (state) + ret = mcp4728_suspend(&data->client->dev); + else + ret = mcp4728_resume(&data->client->dev); + + if (ret < 0) + return ret; + + return len; +} + +static const struct iio_enum mcp4728_powerdown_mode_enum = { + .items = mcp4728_powerdown_modes, + .num_items = ARRAY_SIZE(mcp4728_powerdown_modes), + .get = mcp4728_get_powerdown_mode, + .set = mcp4728_set_powerdown_mode, +}; + +static const struct iio_chan_spec_ext_info mcp4728_ext_info[] = { + { + .name = "powerdown", + .read = mcp4728_read_powerdown, + .write = mcp4728_write_powerdown, + .shared = IIO_SEPARATE, + }, + IIO_ENUM("powerdown_mode", IIO_SEPARATE, &mcp4728_powerdown_mode_enum), + IIO_ENUM_AVAILABLE("powerdown_mode", IIO_SHARED_BY_TYPE, + &mcp4728_powerdown_mode_enum), + {}, +}; + +static const struct iio_chan_spec mcp4728_channels[MCP4728_N_CHANNELS] = { + MCP4728_CHAN(0), + MCP4728_CHAN(1), + MCP4728_CHAN(2), + MCP4728_CHAN(3), +}; + +static void mcp4728_get_scale_avail(enum mcp4728_scale scale, + struct mcp4728_data *data, int *val, + int *val2) +{ + *val = data->scales_avail[scale * 2]; + *val2 = data->scales_avail[scale * 2 + 1]; +} + +static void mcp4728_get_scale(int channel, struct mcp4728_data *data, int *val, + int *val2) +{ + int ref_mode = data->chdata[channel].ref_mode; + int g_mode = data->chdata[channel].g_mode; + + if (ref_mode == MCP4728_VREF_EXTERNAL_VDD) { + mcp4728_get_scale_avail(MCP4728_SCALE_VDD, data, val, val2); + } else { + if (g_mode == MCP4728_GAIN_X1) { + mcp4728_get_scale_avail(MCP4728_SCALE_VINT_NO_GAIN, + data, val, val2); + } else { + mcp4728_get_scale_avail(MCP4728_SCALE_VINT_GAIN_X2, + data, val, val2); + } + } +} + +static int mcp4728_find_matching_scale(struct mcp4728_data *data, int val, + int val2) +{ + for (int i = 0; i < MCP4728_N_SCALES; i++) { + if (data->scales_avail[i * 2] == val && + data->scales_avail[i * 2 + 1] == val2) + return i; + } + return -EINVAL; +} + +static int mcp4728_set_scale(int channel, struct mcp4728_data *data, int val, + int val2) +{ + int scale = mcp4728_find_matching_scale(data, val, val2); + + if (scale < 0) + return scale; + + switch (scale) { + case MCP4728_SCALE_VDD: + data->chdata[channel].ref_mode = MCP4728_VREF_EXTERNAL_VDD; + return 0; + case MCP4728_SCALE_VINT_NO_GAIN: + data->chdata[channel].ref_mode = MCP4728_VREF_INTERNAL_2048mV; + data->chdata[channel].g_mode = MCP4728_GAIN_X1; + return 0; + case MCP4728_SCALE_VINT_GAIN_X2: + data->chdata[channel].ref_mode = MCP4728_VREF_INTERNAL_2048mV; + data->chdata[channel].g_mode = MCP4728_GAIN_X2; + return 0; + default: + return -EINVAL; + } +} + +static int mcp4728_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, int *val, + int *val2, long mask) +{ + struct mcp4728_data *data = iio_priv(indio_dev); + + switch (mask) { + case IIO_CHAN_INFO_RAW: + *val = data->chdata[chan->channel].dac_value; + return IIO_VAL_INT; + case IIO_CHAN_INFO_SCALE: + mcp4728_get_scale(chan->channel, data, val, val2); + return IIO_VAL_INT_PLUS_MICRO; + } + return -EINVAL; +} + +static int mcp4728_write_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, int val, + int val2, long mask) +{ + struct mcp4728_data *data = iio_priv(indio_dev); + int ret; + + switch (mask) { + case IIO_CHAN_INFO_RAW: + if (val < 0 || val > GENMASK(MCP4728_RESOLUTION - 1, 0)) + return -EINVAL; + data->chdata[chan->channel].dac_value = val; + return mcp4728_program_channel_cfg(chan->channel, indio_dev); + case IIO_CHAN_INFO_SCALE: + ret = mcp4728_set_scale(chan->channel, data, val, val2); + if (ret) + return ret; + + return mcp4728_program_channel_cfg(chan->channel, indio_dev); + default: + return -EINVAL; + } +} + +static void mcp4728_init_scale_avail(enum mcp4728_scale scale, int vref_mv, + struct mcp4728_data *data) +{ + s64 tmp; + int value_micro; + int value_int; + + tmp = (s64)vref_mv * 1000000LL >> MCP4728_RESOLUTION; + value_int = div_s64_rem(tmp, 1000000LL, &value_micro); + + data->scales_avail[scale * 2] = value_int; + data->scales_avail[scale * 2 + 1] = value_micro; +} + +static int mcp4728_init_scales_avail(struct mcp4728_data *data) +{ + int ret; + + ret = regulator_get_voltage(data->vdd_reg); + if (ret < 0) + return ret; + + mcp4728_init_scale_avail(MCP4728_SCALE_VDD, ret / 1000, data); + mcp4728_init_scale_avail(MCP4728_SCALE_VINT_NO_GAIN, 2048, data); + mcp4728_init_scale_avail(MCP4728_SCALE_VINT_GAIN_X2, 4096, data); + + return 0; +} + +static int mcp4728_read_avail(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + const int **vals, int *type, int *length, + long info) +{ + struct mcp4728_data *data = iio_priv(indio_dev); + + switch (info) { + case IIO_CHAN_INFO_SCALE: + *type = IIO_VAL_INT_PLUS_MICRO; + + switch (chan->type) { + case IIO_VOLTAGE: + *vals = data->scales_avail; + *length = MCP4728_N_SCALES * 2; + return IIO_AVAIL_LIST; + default: + return -EINVAL; + } + default: + return -EINVAL; + } +} + +static const struct iio_info mcp4728_info = { + .read_raw = mcp4728_read_raw, + .write_raw = mcp4728_write_raw, + .read_avail = &mcp4728_read_avail, + .attrs = &mcp4728_attribute_group, +}; + +static int mcp4728_suspend(struct device *dev) +{ + struct iio_dev *indio_dev = dev_get_drvdata(dev); + struct mcp4728_data *data = iio_priv(indio_dev); + unsigned int i; + + data->powerdown = true; + + for (i = 0; i < MCP4728_N_CHANNELS; i++) { + int err = mcp4728_program_channel_cfg(i, indio_dev); + + if (err) + return err; + } + return 0; +} + +static int mcp4728_resume(struct device *dev) +{ + struct iio_dev *indio_dev = dev_get_drvdata(dev); + struct mcp4728_data *data = iio_priv(indio_dev); + int err = 0; + unsigned int i; + + data->powerdown = false; + + for (i = 0; i < MCP4728_N_CHANNELS; i++) { + int ret = mcp4728_program_channel_cfg(i, indio_dev); + + if (ret) + err = ret; + } + return err; +} + +static DEFINE_SIMPLE_DEV_PM_OPS(mcp4728_pm_ops, mcp4728_suspend, + mcp4728_resume); + +static int mcp4728_init_channels_data(struct mcp4728_data *data) +{ + u8 inbuf[MCP4728_READ_RESPONSE_LEN]; + int ret; + unsigned int i; + + ret = i2c_master_recv(data->client, inbuf, MCP4728_READ_RESPONSE_LEN); + if (ret < 0) { + return dev_err_probe(&data->client->dev, ret, + "failed to read mcp4728 conf.\n"); + } else if (ret != MCP4728_READ_RESPONSE_LEN) { + return dev_err_probe(&data->client->dev, -EIO, + "failed to read mcp4728 conf. Wrong Response Len ret=%d\n", + ret); + } + + for (i = 0; i < MCP4728_N_CHANNELS; i++) { + struct mcp4728_channel_data *ch = &data->chdata[i]; + u8 r2 = inbuf[i * 6 + 1]; + u8 r3 = inbuf[i * 6 + 2]; + + ch->dac_value = FIELD_GET(MCP4728_DAC_H_MASK, r2) << 8 | + FIELD_GET(MCP4728_DAC_L_MASK, r3); + ch->ref_mode = FIELD_GET(MCP4728_VREF_MASK, r2); + ch->pd_mode = FIELD_GET(MCP4728_PDMODE_MASK, r2); + ch->g_mode = FIELD_GET(MCP4728_GAIN_MASK, r2); + } + + return 0; +} + +static void mcp4728_reg_disable(void *reg) +{ + regulator_disable(reg); +} + +static int mcp4728_probe(struct i2c_client *client) +{ + const struct i2c_device_id *id = i2c_client_get_device_id(client); + struct mcp4728_data *data; + struct iio_dev *indio_dev; + int err; + + indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); + if (!indio_dev) + return -ENOMEM; + + data = iio_priv(indio_dev); + i2c_set_clientdata(client, indio_dev); + data->client = client; + + data->vdd_reg = devm_regulator_get(&client->dev, "vdd"); + if (IS_ERR(data->vdd_reg)) + return PTR_ERR(data->vdd_reg); + + err = regulator_enable(data->vdd_reg); + if (err) + return err; + + err = devm_add_action_or_reset(&client->dev, mcp4728_reg_disable, + data->vdd_reg); + if (err) + return err; + + /* + * MCP4728 has internal EEPROM that save each channel boot + * configuration. It means that device configuration is unknown to the + * driver at kernel boot. mcp4728_init_channels_data() reads back DAC + * settings and stores them in data structure. + */ + err = mcp4728_init_channels_data(data); + if (err) { + return dev_err_probe(&client->dev, err, + "failed to read mcp4728 current configuration\n"); + } + + err = mcp4728_init_scales_avail(data); + if (err) { + return dev_err_probe(&client->dev, err, + "failed to init scales\n"); + } + + indio_dev->name = id->name; + indio_dev->info = &mcp4728_info; + indio_dev->channels = mcp4728_channels; + indio_dev->num_channels = MCP4728_N_CHANNELS; + indio_dev->modes = INDIO_DIRECT_MODE; + + return devm_iio_device_register(&client->dev, indio_dev); +} + +static const struct i2c_device_id mcp4728_id[] = { + { "mcp4728", 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, mcp4728_id); + +static const struct of_device_id mcp4728_of_match[] = { + { .compatible = "microchip,mcp4728" }, + {} +}; +MODULE_DEVICE_TABLE(of, mcp4728_of_match); + +static struct i2c_driver mcp4728_driver = { + .driver = { + .name = "mcp4728", + .of_match_table = mcp4728_of_match, + .pm = pm_sleep_ptr(&mcp4728_pm_ops), + }, + .probe = mcp4728_probe, + .id_table = mcp4728_id, +}; +module_i2c_driver(mcp4728_driver); + +MODULE_AUTHOR("Andrea Collamati "); +MODULE_DESCRIPTION("MCP4728 12-bit DAC"); +MODULE_LICENSE("GPL"); diff --git a/drivers/iio/filter/admv8818.c b/drivers/iio/filter/admv8818.c index fe8d46cb7f1d..848baa6e3bbf 100644 --- a/drivers/iio/filter/admv8818.c +++ b/drivers/iio/filter/admv8818.c @@ -78,6 +78,7 @@ enum { enum { ADMV8818_AUTO_MODE, ADMV8818_MANUAL_MODE, + ADMV8818_BYPASS_MODE, }; struct admv8818_state { @@ -114,7 +115,8 @@ static const struct regmap_config admv8818_regmap_config = { static const char * const admv8818_modes[] = { [0] = "auto", - [1] = "manual" + [1] = "manual", + [2] = "bypass" }; static int __admv8818_hpf_select(struct admv8818_state *st, u64 freq) @@ -394,6 +396,36 @@ static int admv8818_reg_access(struct iio_dev *indio_dev, return regmap_write(st->regmap, reg, write_val); } +static int admv8818_filter_bypass(struct admv8818_state *st) +{ + int ret; + + mutex_lock(&st->lock); + + ret = regmap_update_bits(st->regmap, ADMV8818_REG_WR0_SW, + ADMV8818_SW_IN_SET_WR0_MSK | + ADMV8818_SW_IN_WR0_MSK | + ADMV8818_SW_OUT_SET_WR0_MSK | + ADMV8818_SW_OUT_WR0_MSK, + FIELD_PREP(ADMV8818_SW_IN_SET_WR0_MSK, 1) | + FIELD_PREP(ADMV8818_SW_IN_WR0_MSK, 0) | + FIELD_PREP(ADMV8818_SW_OUT_SET_WR0_MSK, 1) | + FIELD_PREP(ADMV8818_SW_OUT_WR0_MSK, 0)); + if (ret) + goto exit; + + ret = regmap_update_bits(st->regmap, ADMV8818_REG_WR0_FILTER, + ADMV8818_HPF_WR0_MSK | + ADMV8818_LPF_WR0_MSK, + FIELD_PREP(ADMV8818_HPF_WR0_MSK, 0) | + FIELD_PREP(ADMV8818_LPF_WR0_MSK, 0)); + +exit: + mutex_unlock(&st->lock); + + return ret; +} + static int admv8818_get_mode(struct iio_dev *indio_dev, const struct iio_chan_spec *chan) { @@ -411,14 +443,22 @@ static int admv8818_set_mode(struct iio_dev *indio_dev, if (!st->clkin) { if (mode == ADMV8818_MANUAL_MODE) - return 0; + goto set_mode; + + if (mode == ADMV8818_BYPASS_MODE) { + ret = admv8818_filter_bypass(st); + if (ret) + return ret; + + goto set_mode; + } return -EINVAL; } switch (mode) { case ADMV8818_AUTO_MODE: - if (!st->filter_mode) + if (st->filter_mode == ADMV8818_AUTO_MODE) return 0; ret = clk_prepare_enable(st->clkin); @@ -434,20 +474,27 @@ static int admv8818_set_mode(struct iio_dev *indio_dev, break; case ADMV8818_MANUAL_MODE: - if (st->filter_mode) - return 0; + case ADMV8818_BYPASS_MODE: + if (st->filter_mode == ADMV8818_AUTO_MODE) { + clk_disable_unprepare(st->clkin); - clk_disable_unprepare(st->clkin); + ret = clk_notifier_unregister(st->clkin, &st->nb); + if (ret) + return ret; + } - ret = clk_notifier_unregister(st->clkin, &st->nb); - if (ret) - return ret; + if (mode == ADMV8818_BYPASS_MODE) { + ret = admv8818_filter_bypass(st); + if (ret) + return ret; + } break; default: return -EINVAL; } +set_mode: st->filter_mode = mode; return ret; diff --git a/drivers/iio/frequency/admv1013.c b/drivers/iio/frequency/admv1013.c index 8c8e0bbfc99f..6355c1f28423 100644 --- a/drivers/iio/frequency/admv1013.c +++ b/drivers/iio/frequency/admv1013.c @@ -382,6 +382,11 @@ static const struct iio_info admv1013_info = { .debugfs_reg_access = &admv1013_reg_access, }; +static const char * const admv1013_vcc_regs[] = { + "vcc-drv", "vcc2-drv", "vcc-vva", "vcc-amp1", "vcc-amp2", + "vcc-env", "vcc-bg", "vcc-bg2", "vcc-mixer", "vcc-quad" +}; + static int admv1013_freq_change(struct notifier_block *nb, unsigned long action, void *data) { struct admv1013_state *st = container_of(nb, struct admv1013_state, nb); @@ -557,6 +562,15 @@ static int admv1013_properties_parse(struct admv1013_state *st) return dev_err_probe(&spi->dev, PTR_ERR(st->reg), "failed to get the common-mode voltage\n"); + ret = devm_regulator_bulk_get_enable(&st->spi->dev, + ARRAY_SIZE(admv1013_vcc_regs), + admv1013_vcc_regs); + if (ret) { + dev_err_probe(&spi->dev, ret, + "Failed to request VCC regulators\n"); + return ret; + } + return 0; } diff --git a/drivers/iio/imu/adis16475.c b/drivers/iio/imu/adis16475.c index 3abffb01ba31..17275a53ca2c 100644 --- a/drivers/iio/imu/adis16475.c +++ b/drivers/iio/imu/adis16475.c @@ -115,8 +115,6 @@ enum { ADIS16475_SCAN_ACCEL_Y, ADIS16475_SCAN_ACCEL_Z, ADIS16475_SCAN_TEMP, - ADIS16475_SCAN_DIAG_S_FLAGS, - ADIS16475_SCAN_CRC_FAILURE, }; static bool low_rate_allow; @@ -728,6 +726,7 @@ static const struct adis16475_chip_info adis16475_chip_info[] = { .max_dec = 1999, .sync = adis16475_sync_mode, .num_sync = ARRAY_SIZE(adis16475_sync_mode), + .has_burst32 = true, .adis_data = ADIS16475_DATA(16477, &adis16475_timeouts), }, [ADIS16477_2] = { @@ -743,6 +742,7 @@ static const struct adis16475_chip_info adis16475_chip_info[] = { .max_dec = 1999, .sync = adis16475_sync_mode, .num_sync = ARRAY_SIZE(adis16475_sync_mode), + .has_burst32 = true, .adis_data = ADIS16475_DATA(16477, &adis16475_timeouts), }, [ADIS16477_3] = { @@ -758,6 +758,7 @@ static const struct adis16475_chip_info adis16475_chip_info[] = { .max_dec = 1999, .sync = adis16475_sync_mode, .num_sync = ARRAY_SIZE(adis16475_sync_mode), + .has_burst32 = true, .adis_data = ADIS16475_DATA(16477, &adis16475_timeouts), }, [ADIS16465_1] = { diff --git a/drivers/iio/imu/inv_icm42600/Kconfig b/drivers/iio/imu/inv_icm42600/Kconfig index 50cbcfcb6cf1..f56b0816cc4d 100644 --- a/drivers/iio/imu/inv_icm42600/Kconfig +++ b/drivers/iio/imu/inv_icm42600/Kconfig @@ -3,6 +3,7 @@ config INV_ICM42600 tristate select IIO_BUFFER + select IIO_INV_SENSORS_TIMESTAMP config INV_ICM42600_I2C tristate "InvenSense ICM-426xx I2C driver" diff --git a/drivers/iio/imu/inv_icm42600/Makefile b/drivers/iio/imu/inv_icm42600/Makefile index 291714d9aa54..0f49f6df3647 100644 --- a/drivers/iio/imu/inv_icm42600/Makefile +++ b/drivers/iio/imu/inv_icm42600/Makefile @@ -6,7 +6,6 @@ inv-icm42600-y += inv_icm42600_gyro.o inv-icm42600-y += inv_icm42600_accel.o inv-icm42600-y += inv_icm42600_temp.o inv-icm42600-y += inv_icm42600_buffer.o -inv-icm42600-y += inv_icm42600_timestamp.o obj-$(CONFIG_INV_ICM42600_I2C) += inv-icm42600-i2c.o inv-icm42600-i2c-y += inv_icm42600_i2c.o diff --git a/drivers/iio/imu/inv_icm42600/inv_icm42600_accel.c b/drivers/iio/imu/inv_icm42600/inv_icm42600_accel.c index c3f433ad3af6..b1e4fde27d25 100644 --- a/drivers/iio/imu/inv_icm42600/inv_icm42600_accel.c +++ b/drivers/iio/imu/inv_icm42600/inv_icm42600_accel.c @@ -10,14 +10,15 @@ #include #include #include -#include + #include +#include +#include #include #include "inv_icm42600.h" #include "inv_icm42600_temp.h" #include "inv_icm42600_buffer.h" -#include "inv_icm42600_timestamp.h" #define INV_ICM42600_ACCEL_CHAN(_modifier, _index, _ext_info) \ { \ @@ -98,7 +99,7 @@ static int inv_icm42600_accel_update_scan_mode(struct iio_dev *indio_dev, const unsigned long *scan_mask) { struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev); - struct inv_icm42600_timestamp *ts = iio_priv(indio_dev); + struct inv_sensors_timestamp *ts = iio_priv(indio_dev); struct inv_icm42600_sensor_conf conf = INV_ICM42600_SENSOR_CONF_INIT; unsigned int fifo_en = 0; unsigned int sleep_temp = 0; @@ -126,7 +127,7 @@ static int inv_icm42600_accel_update_scan_mode(struct iio_dev *indio_dev, } /* update data FIFO write */ - inv_icm42600_timestamp_apply_odr(ts, 0, 0, 0); + inv_sensors_timestamp_apply_odr(ts, 0, 0, 0); ret = inv_icm42600_buffer_set_fifo_en(st, fifo_en | st->fifo.en); if (ret) goto out_unlock; @@ -311,7 +312,7 @@ static int inv_icm42600_accel_write_odr(struct iio_dev *indio_dev, int val, int val2) { struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev); - struct inv_icm42600_timestamp *ts = iio_priv(indio_dev); + struct inv_sensors_timestamp *ts = iio_priv(indio_dev); struct device *dev = regmap_get_device(st->map); unsigned int idx; struct inv_icm42600_sensor_conf conf = INV_ICM42600_SENSOR_CONF_INIT; @@ -330,8 +331,8 @@ static int inv_icm42600_accel_write_odr(struct iio_dev *indio_dev, pm_runtime_get_sync(dev); mutex_lock(&st->lock); - ret = inv_icm42600_timestamp_update_odr(ts, inv_icm42600_odr_to_period(conf.odr), - iio_buffer_enabled(indio_dev)); + ret = inv_sensors_timestamp_update_odr(ts, inv_icm42600_odr_to_period(conf.odr), + iio_buffer_enabled(indio_dev)); if (ret) goto out_unlock; @@ -707,7 +708,8 @@ struct iio_dev *inv_icm42600_accel_init(struct inv_icm42600_state *st) { struct device *dev = regmap_get_device(st->map); const char *name; - struct inv_icm42600_timestamp *ts; + struct inv_sensors_timestamp_chip ts_chip; + struct inv_sensors_timestamp *ts; struct iio_dev *indio_dev; int ret; @@ -719,8 +721,15 @@ struct iio_dev *inv_icm42600_accel_init(struct inv_icm42600_state *st) if (!indio_dev) return ERR_PTR(-ENOMEM); + /* + * clock period is 32kHz (31250ns) + * jitter is +/- 2% (20 per mille) + */ + ts_chip.clock_period = 31250; + ts_chip.jitter = 20; + ts_chip.init_period = inv_icm42600_odr_to_period(st->conf.accel.odr); ts = iio_priv(indio_dev); - inv_icm42600_timestamp_init(ts, inv_icm42600_odr_to_period(st->conf.accel.odr)); + inv_sensors_timestamp_init(ts, &ts_chip); iio_device_set_drvdata(indio_dev, st); indio_dev->name = name; @@ -745,7 +754,7 @@ struct iio_dev *inv_icm42600_accel_init(struct inv_icm42600_state *st) int inv_icm42600_accel_parse_fifo(struct iio_dev *indio_dev) { struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev); - struct inv_icm42600_timestamp *ts = iio_priv(indio_dev); + struct inv_sensors_timestamp *ts = iio_priv(indio_dev); ssize_t i, size; unsigned int no; const void *accel, *gyro, *timestamp; @@ -768,15 +777,15 @@ int inv_icm42600_accel_parse_fifo(struct iio_dev *indio_dev) /* update odr */ if (odr & INV_ICM42600_SENSOR_ACCEL) - inv_icm42600_timestamp_apply_odr(ts, st->fifo.period, - st->fifo.nb.total, no); + inv_sensors_timestamp_apply_odr(ts, st->fifo.period, + st->fifo.nb.total, no); /* buffer is copied to userspace, zeroing it to avoid any data leak */ memset(&buffer, 0, sizeof(buffer)); memcpy(&buffer.accel, accel, sizeof(buffer.accel)); /* convert 8 bits FIFO temperature in high resolution format */ buffer.temp = temp ? (*temp * 64) : 0; - ts_val = inv_icm42600_timestamp_pop(ts); + ts_val = inv_sensors_timestamp_pop(ts); iio_push_to_buffers_with_timestamp(indio_dev, &buffer, ts_val); } diff --git a/drivers/iio/imu/inv_icm42600/inv_icm42600_buffer.c b/drivers/iio/imu/inv_icm42600/inv_icm42600_buffer.c index 32d7f8364230..6ef1df9d60b7 100644 --- a/drivers/iio/imu/inv_icm42600/inv_icm42600_buffer.c +++ b/drivers/iio/imu/inv_icm42600/inv_icm42600_buffer.c @@ -9,11 +9,12 @@ #include #include #include -#include + #include +#include +#include #include "inv_icm42600.h" -#include "inv_icm42600_timestamp.h" #include "inv_icm42600_buffer.h" /* FIFO header: 1 byte */ @@ -275,12 +276,12 @@ static int inv_icm42600_buffer_preenable(struct iio_dev *indio_dev) { struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev); struct device *dev = regmap_get_device(st->map); - struct inv_icm42600_timestamp *ts = iio_priv(indio_dev); + struct inv_sensors_timestamp *ts = iio_priv(indio_dev); pm_runtime_get_sync(dev); mutex_lock(&st->lock); - inv_icm42600_timestamp_reset(ts); + inv_sensors_timestamp_reset(ts); mutex_unlock(&st->lock); return 0; @@ -504,7 +505,7 @@ int inv_icm42600_buffer_fifo_read(struct inv_icm42600_state *st, int inv_icm42600_buffer_fifo_parse(struct inv_icm42600_state *st) { - struct inv_icm42600_timestamp *ts; + struct inv_sensors_timestamp *ts; int ret; if (st->fifo.nb.total == 0) @@ -512,8 +513,8 @@ int inv_icm42600_buffer_fifo_parse(struct inv_icm42600_state *st) /* handle gyroscope timestamp and FIFO data parsing */ ts = iio_priv(st->indio_gyro); - inv_icm42600_timestamp_interrupt(ts, st->fifo.period, st->fifo.nb.total, - st->fifo.nb.gyro, st->timestamp.gyro); + inv_sensors_timestamp_interrupt(ts, st->fifo.period, st->fifo.nb.total, + st->fifo.nb.gyro, st->timestamp.gyro); if (st->fifo.nb.gyro > 0) { ret = inv_icm42600_gyro_parse_fifo(st->indio_gyro); if (ret) @@ -522,8 +523,8 @@ int inv_icm42600_buffer_fifo_parse(struct inv_icm42600_state *st) /* handle accelerometer timestamp and FIFO data parsing */ ts = iio_priv(st->indio_accel); - inv_icm42600_timestamp_interrupt(ts, st->fifo.period, st->fifo.nb.total, - st->fifo.nb.accel, st->timestamp.accel); + inv_sensors_timestamp_interrupt(ts, st->fifo.period, st->fifo.nb.total, + st->fifo.nb.accel, st->timestamp.accel); if (st->fifo.nb.accel > 0) { ret = inv_icm42600_accel_parse_fifo(st->indio_accel); if (ret) @@ -536,7 +537,7 @@ int inv_icm42600_buffer_fifo_parse(struct inv_icm42600_state *st) int inv_icm42600_buffer_hwfifo_flush(struct inv_icm42600_state *st, unsigned int count) { - struct inv_icm42600_timestamp *ts; + struct inv_sensors_timestamp *ts; int64_t gyro_ts, accel_ts; int ret; @@ -552,9 +553,9 @@ int inv_icm42600_buffer_hwfifo_flush(struct inv_icm42600_state *st, if (st->fifo.nb.gyro > 0) { ts = iio_priv(st->indio_gyro); - inv_icm42600_timestamp_interrupt(ts, st->fifo.period, - st->fifo.nb.total, st->fifo.nb.gyro, - gyro_ts); + inv_sensors_timestamp_interrupt(ts, st->fifo.period, + st->fifo.nb.total, st->fifo.nb.gyro, + gyro_ts); ret = inv_icm42600_gyro_parse_fifo(st->indio_gyro); if (ret) return ret; @@ -562,9 +563,9 @@ int inv_icm42600_buffer_hwfifo_flush(struct inv_icm42600_state *st, if (st->fifo.nb.accel > 0) { ts = iio_priv(st->indio_accel); - inv_icm42600_timestamp_interrupt(ts, st->fifo.period, - st->fifo.nb.total, st->fifo.nb.accel, - accel_ts); + inv_sensors_timestamp_interrupt(ts, st->fifo.period, + st->fifo.nb.total, st->fifo.nb.accel, + accel_ts); ret = inv_icm42600_accel_parse_fifo(st->indio_accel); if (ret) return ret; diff --git a/drivers/iio/imu/inv_icm42600/inv_icm42600_core.c b/drivers/iio/imu/inv_icm42600/inv_icm42600_core.c index 7b3a2a0dc2cb..a5e81906e37e 100644 --- a/drivers/iio/imu/inv_icm42600/inv_icm42600_core.c +++ b/drivers/iio/imu/inv_icm42600/inv_icm42600_core.c @@ -15,11 +15,11 @@ #include #include #include + #include #include "inv_icm42600.h" #include "inv_icm42600_buffer.h" -#include "inv_icm42600_timestamp.h" static const struct regmap_range_cfg inv_icm42600_regmap_ranges[] = { { @@ -516,6 +516,17 @@ static int inv_icm42600_irq_init(struct inv_icm42600_state *st, int irq, "inv_icm42600", st); } +static int inv_icm42600_timestamp_setup(struct inv_icm42600_state *st) +{ + unsigned int val; + + /* enable timestamp register */ + val = INV_ICM42600_TMST_CONFIG_TMST_TO_REGS_EN | + INV_ICM42600_TMST_CONFIG_TMST_EN; + return regmap_update_bits(st->map, INV_ICM42600_REG_TMST_CONFIG, + INV_ICM42600_TMST_CONFIG_MASK, val); +} + static int inv_icm42600_enable_regulator_vddio(struct inv_icm42600_state *st) { int ret; @@ -788,3 +799,4 @@ EXPORT_NS_GPL_DEV_PM_OPS(inv_icm42600_pm_ops, IIO_ICM42600) = { MODULE_AUTHOR("InvenSense, Inc."); MODULE_DESCRIPTION("InvenSense ICM-426xx device driver"); MODULE_LICENSE("GPL"); +MODULE_IMPORT_NS(IIO_INV_SENSORS_TIMESTAMP); diff --git a/drivers/iio/imu/inv_icm42600/inv_icm42600_gyro.c b/drivers/iio/imu/inv_icm42600/inv_icm42600_gyro.c index 9d94a8518e3c..3bf946e56e1d 100644 --- a/drivers/iio/imu/inv_icm42600/inv_icm42600_gyro.c +++ b/drivers/iio/imu/inv_icm42600/inv_icm42600_gyro.c @@ -10,14 +10,15 @@ #include #include #include -#include + #include +#include +#include #include #include "inv_icm42600.h" #include "inv_icm42600_temp.h" #include "inv_icm42600_buffer.h" -#include "inv_icm42600_timestamp.h" #define INV_ICM42600_GYRO_CHAN(_modifier, _index, _ext_info) \ { \ @@ -98,7 +99,7 @@ static int inv_icm42600_gyro_update_scan_mode(struct iio_dev *indio_dev, const unsigned long *scan_mask) { struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev); - struct inv_icm42600_timestamp *ts = iio_priv(indio_dev); + struct inv_sensors_timestamp *ts = iio_priv(indio_dev); struct inv_icm42600_sensor_conf conf = INV_ICM42600_SENSOR_CONF_INIT; unsigned int fifo_en = 0; unsigned int sleep_gyro = 0; @@ -126,7 +127,7 @@ static int inv_icm42600_gyro_update_scan_mode(struct iio_dev *indio_dev, } /* update data FIFO write */ - inv_icm42600_timestamp_apply_odr(ts, 0, 0, 0); + inv_sensors_timestamp_apply_odr(ts, 0, 0, 0); ret = inv_icm42600_buffer_set_fifo_en(st, fifo_en | st->fifo.en); if (ret) goto out_unlock; @@ -323,7 +324,7 @@ static int inv_icm42600_gyro_write_odr(struct iio_dev *indio_dev, int val, int val2) { struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev); - struct inv_icm42600_timestamp *ts = iio_priv(indio_dev); + struct inv_sensors_timestamp *ts = iio_priv(indio_dev); struct device *dev = regmap_get_device(st->map); unsigned int idx; struct inv_icm42600_sensor_conf conf = INV_ICM42600_SENSOR_CONF_INIT; @@ -342,8 +343,8 @@ static int inv_icm42600_gyro_write_odr(struct iio_dev *indio_dev, pm_runtime_get_sync(dev); mutex_lock(&st->lock); - ret = inv_icm42600_timestamp_update_odr(ts, inv_icm42600_odr_to_period(conf.odr), - iio_buffer_enabled(indio_dev)); + ret = inv_sensors_timestamp_update_odr(ts, inv_icm42600_odr_to_period(conf.odr), + iio_buffer_enabled(indio_dev)); if (ret) goto out_unlock; @@ -718,7 +719,8 @@ struct iio_dev *inv_icm42600_gyro_init(struct inv_icm42600_state *st) { struct device *dev = regmap_get_device(st->map); const char *name; - struct inv_icm42600_timestamp *ts; + struct inv_sensors_timestamp_chip ts_chip; + struct inv_sensors_timestamp *ts; struct iio_dev *indio_dev; int ret; @@ -730,8 +732,15 @@ struct iio_dev *inv_icm42600_gyro_init(struct inv_icm42600_state *st) if (!indio_dev) return ERR_PTR(-ENOMEM); + /* + * clock period is 32kHz (31250ns) + * jitter is +/- 2% (20 per mille) + */ + ts_chip.clock_period = 31250; + ts_chip.jitter = 20; + ts_chip.init_period = inv_icm42600_odr_to_period(st->conf.accel.odr); ts = iio_priv(indio_dev); - inv_icm42600_timestamp_init(ts, inv_icm42600_odr_to_period(st->conf.gyro.odr)); + inv_sensors_timestamp_init(ts, &ts_chip); iio_device_set_drvdata(indio_dev, st); indio_dev->name = name; @@ -757,7 +766,7 @@ struct iio_dev *inv_icm42600_gyro_init(struct inv_icm42600_state *st) int inv_icm42600_gyro_parse_fifo(struct iio_dev *indio_dev) { struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev); - struct inv_icm42600_timestamp *ts = iio_priv(indio_dev); + struct inv_sensors_timestamp *ts = iio_priv(indio_dev); ssize_t i, size; unsigned int no; const void *accel, *gyro, *timestamp; @@ -780,15 +789,15 @@ int inv_icm42600_gyro_parse_fifo(struct iio_dev *indio_dev) /* update odr */ if (odr & INV_ICM42600_SENSOR_GYRO) - inv_icm42600_timestamp_apply_odr(ts, st->fifo.period, - st->fifo.nb.total, no); + inv_sensors_timestamp_apply_odr(ts, st->fifo.period, + st->fifo.nb.total, no); /* buffer is copied to userspace, zeroing it to avoid any data leak */ memset(&buffer, 0, sizeof(buffer)); memcpy(&buffer.gyro, gyro, sizeof(buffer.gyro)); /* convert 8 bits FIFO temperature in high resolution format */ buffer.temp = temp ? (*temp * 64) : 0; - ts_val = inv_icm42600_timestamp_pop(ts); + ts_val = inv_sensors_timestamp_pop(ts); iio_push_to_buffers_with_timestamp(indio_dev, &buffer, ts_val); } diff --git a/drivers/iio/imu/inv_icm42600/inv_icm42600_timestamp.h b/drivers/iio/imu/inv_icm42600/inv_icm42600_timestamp.h deleted file mode 100644 index 4e4f331d4fe4..000000000000 --- a/drivers/iio/imu/inv_icm42600/inv_icm42600_timestamp.h +++ /dev/null @@ -1,85 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * Copyright (C) 2020 Invensense, Inc. - */ - -#ifndef INV_ICM42600_TIMESTAMP_H_ -#define INV_ICM42600_TIMESTAMP_H_ - -#include - -struct inv_icm42600_state; - -/** - * struct inv_icm42600_timestamp_interval - timestamps interval - * @lo: interval lower bound - * @up: interval upper bound - */ -struct inv_icm42600_timestamp_interval { - int64_t lo; - int64_t up; -}; - -/** - * struct inv_icm42600_timestamp_acc - accumulator for computing an estimation - * @val: current estimation of the value, the mean of all values - * @idx: current index of the next free place in values table - * @values: table of all measured values, use for computing the mean - */ -struct inv_icm42600_timestamp_acc { - uint32_t val; - size_t idx; - uint32_t values[32]; -}; - -/** - * struct inv_icm42600_timestamp - timestamp management states - * @it: interrupts interval timestamps - * @timestamp: store last timestamp for computing next data timestamp - * @mult: current internal period multiplier - * @new_mult: new set internal period multiplier (not yet effective) - * @period: measured current period of the sensor - * @chip_period: accumulator for computing internal chip period - */ -struct inv_icm42600_timestamp { - struct inv_icm42600_timestamp_interval it; - int64_t timestamp; - uint32_t mult; - uint32_t new_mult; - uint32_t period; - struct inv_icm42600_timestamp_acc chip_period; -}; - -void inv_icm42600_timestamp_init(struct inv_icm42600_timestamp *ts, - uint32_t period); - -int inv_icm42600_timestamp_setup(struct inv_icm42600_state *st); - -int inv_icm42600_timestamp_update_odr(struct inv_icm42600_timestamp *ts, - uint32_t period, bool fifo); - -void inv_icm42600_timestamp_interrupt(struct inv_icm42600_timestamp *ts, - uint32_t fifo_period, size_t fifo_nb, - size_t sensor_nb, int64_t timestamp); - -static inline int64_t -inv_icm42600_timestamp_pop(struct inv_icm42600_timestamp *ts) -{ - ts->timestamp += ts->period; - return ts->timestamp; -} - -void inv_icm42600_timestamp_apply_odr(struct inv_icm42600_timestamp *ts, - uint32_t fifo_period, size_t fifo_nb, - unsigned int fifo_no); - -static inline void -inv_icm42600_timestamp_reset(struct inv_icm42600_timestamp *ts) -{ - const struct inv_icm42600_timestamp_interval interval_init = {0LL, 0LL}; - - ts->it = interval_init; - ts->timestamp = 0; -} - -#endif diff --git a/drivers/iio/imu/inv_mpu6050/Kconfig b/drivers/iio/imu/inv_mpu6050/Kconfig index 64dd73dcc4ba..5f62e4fd475d 100644 --- a/drivers/iio/imu/inv_mpu6050/Kconfig +++ b/drivers/iio/imu/inv_mpu6050/Kconfig @@ -7,6 +7,7 @@ config INV_MPU6050_IIO tristate select IIO_BUFFER select IIO_TRIGGERED_BUFFER + select IIO_INV_SENSORS_TIMESTAMP config INV_MPU6050_I2C tristate "Invensense MPU6050 devices (I2C)" diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c b/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c index 592a6e60b413..29f906c884bd 100644 --- a/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c +++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c @@ -12,12 +12,15 @@ #include #include #include -#include #include #include #include #include #include + +#include +#include + #include "inv_mpu_iio.h" #include "inv_mpu_magn.h" @@ -521,6 +524,7 @@ static int inv_mpu6050_init_config(struct iio_dev *indio_dev) int result; u8 d; struct inv_mpu6050_state *st = iio_priv(indio_dev); + struct inv_sensors_timestamp_chip timestamp; result = inv_mpu6050_set_gyro_fsr(st, st->chip_config.fsr); if (result) @@ -544,12 +548,12 @@ static int inv_mpu6050_init_config(struct iio_dev *indio_dev) if (result) return result; - /* - * Internal chip period is 1ms (1kHz). - * Let's use at the beginning the theorical value before measuring - * with interrupt timestamps. - */ - st->chip_period = NSEC_PER_MSEC; + /* clock jitter is +/- 2% */ + timestamp.clock_period = NSEC_PER_SEC / INV_MPU6050_INTERNAL_FREQ_HZ; + timestamp.jitter = 20; + timestamp.init_period = + NSEC_PER_SEC / INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider); + inv_sensors_timestamp_init(&st->timestamp, ×tamp); /* magn chip init, noop if not present in the chip */ result = inv_mpu_magn_probe(st); @@ -936,6 +940,8 @@ inv_mpu6050_fifo_rate_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { int fifo_rate; + u32 fifo_period; + bool fifo_on; u8 d; int result; struct iio_dev *indio_dev = dev_to_iio_dev(dev); @@ -952,12 +958,21 @@ inv_mpu6050_fifo_rate_store(struct device *dev, struct device_attribute *attr, d = INV_MPU6050_FIFO_RATE_TO_DIVIDER(fifo_rate); /* compute back the fifo rate to handle truncation cases */ fifo_rate = INV_MPU6050_DIVIDER_TO_FIFO_RATE(d); + fifo_period = NSEC_PER_SEC / fifo_rate; mutex_lock(&st->lock); if (d == st->chip_config.divider) { result = 0; goto fifo_rate_fail_unlock; } + + fifo_on = st->chip_config.accl_fifo_enable || + st->chip_config.gyro_fifo_enable || + st->chip_config.magn_fifo_enable; + result = inv_sensors_timestamp_update_odr(&st->timestamp, fifo_period, fifo_on); + if (result) + goto fifo_rate_fail_unlock; + result = pm_runtime_resume_and_get(pdev); if (result) goto fifo_rate_fail_unlock; @@ -1330,6 +1345,9 @@ static int inv_check_and_setup_chip(struct inv_mpu6050_state *st) st->reg = hw_info[st->chip_type].reg; memcpy(&st->chip_config, hw_info[st->chip_type].config, sizeof(st->chip_config)); + st->data = devm_kzalloc(regmap_get_device(st->map), st->hw->fifo_size, GFP_KERNEL); + if (st->data == NULL) + return -ENOMEM; /* check chip self-identification */ result = regmap_read(st->map, INV_MPU6050_REG_WHOAMI, ®val); @@ -1785,3 +1803,4 @@ EXPORT_NS_GPL_DEV_PM_OPS(inv_mpu_pmops, IIO_MPU6050) = { MODULE_AUTHOR("Invensense Corporation"); MODULE_DESCRIPTION("Invensense device MPU6050 driver"); MODULE_LICENSE("GPL"); +MODULE_IMPORT_NS(IIO_INV_SENSORS_TIMESTAMP); diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h b/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h index b4ab2c397d0f..ed5a96e78df0 100644 --- a/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h +++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h @@ -9,15 +9,17 @@ #include #include #include -#include -#include +#include #include -#include + +#include +#include +#include #include #include #include #include -#include +#include /** * struct inv_mpu6050_reg_map - Notable registers. @@ -170,16 +172,14 @@ struct inv_mpu6050_hw { * @map regmap pointer. * @irq interrupt number. * @irq_mask the int_pin_cfg mask to configure interrupt type. - * @chip_period: chip internal period estimation (~1kHz). - * @it_timestamp: timestamp from previous interrupt. - * @data_timestamp: timestamp for next data sample. + * @timestamp: timestamping module * @vdd_supply: VDD voltage regulator for the chip. * @vddio_supply I/O voltage regulator for the chip. * @magn_disabled: magnetometer disabled for backward compatibility reason. * @magn_raw_to_gauss: coefficient to convert mag raw value to Gauss. * @magn_orient: magnetometer sensor chip orientation if available. * @suspended_sensors: sensors mask of sensors turned off for suspend - * @data: dma safe buffer used for bulk reads. + * @data: read buffer used for bulk reads. */ struct inv_mpu6050_state { struct mutex lock; @@ -196,16 +196,14 @@ struct inv_mpu6050_state { int irq; u8 irq_mask; unsigned skip_samples; - s64 chip_period; - s64 it_timestamp; - s64 data_timestamp; + struct inv_sensors_timestamp timestamp; struct regulator *vdd_supply; struct regulator *vddio_supply; bool magn_disabled; s32 magn_raw_to_gauss[3]; struct iio_mount_matrix magn_orient; unsigned int suspended_sensors; - u8 data[INV_MPU6050_OUTPUT_DATA_SIZE] __aligned(IIO_DMA_MINALIGN); + u8 *data; }; /*register and associated bit definition*/ diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_ring.c b/drivers/iio/imu/inv_mpu6050/inv_mpu_ring.c index 45c37525c2f1..66d4ba088e70 100644 --- a/drivers/iio/imu/inv_mpu6050/inv_mpu_ring.c +++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_ring.c @@ -13,82 +13,11 @@ #include #include #include + +#include + #include "inv_mpu_iio.h" -/** - * inv_mpu6050_update_period() - Update chip internal period estimation - * - * @st: driver state - * @timestamp: the interrupt timestamp - * @nb: number of data set in the fifo - * - * This function uses interrupt timestamps to estimate the chip period and - * to choose the data timestamp to come. - */ -static void inv_mpu6050_update_period(struct inv_mpu6050_state *st, - s64 timestamp, size_t nb) -{ - /* Period boundaries for accepting timestamp */ - const s64 period_min = - (NSEC_PER_MSEC * (100 - INV_MPU6050_TS_PERIOD_JITTER)) / 100; - const s64 period_max = - (NSEC_PER_MSEC * (100 + INV_MPU6050_TS_PERIOD_JITTER)) / 100; - const s32 divider = INV_MPU6050_FREQ_DIVIDER(st); - s64 delta, interval; - bool use_it_timestamp = false; - - if (st->it_timestamp == 0) { - /* not initialized, forced to use it_timestamp */ - use_it_timestamp = true; - } else if (nb == 1) { - /* - * Validate the use of it timestamp by checking if interrupt - * has been delayed. - * nb > 1 means interrupt was delayed for more than 1 sample, - * so it's obviously not good. - * Compute the chip period between 2 interrupts for validating. - */ - delta = div_s64(timestamp - st->it_timestamp, divider); - if (delta > period_min && delta < period_max) { - /* update chip period and use it timestamp */ - st->chip_period = (st->chip_period + delta) / 2; - use_it_timestamp = true; - } - } - - if (use_it_timestamp) { - /* - * Manage case of multiple samples in the fifo (nb > 1): - * compute timestamp corresponding to the first sample using - * estimated chip period. - */ - interval = (nb - 1) * st->chip_period * divider; - st->data_timestamp = timestamp - interval; - } - - /* save it timestamp */ - st->it_timestamp = timestamp; -} - -/** - * inv_mpu6050_get_timestamp() - Return the current data timestamp - * - * @st: driver state - * @return: current data timestamp - * - * This function returns the current data timestamp and prepares for next one. - */ -static s64 inv_mpu6050_get_timestamp(struct inv_mpu6050_state *st) -{ - s64 ts; - - /* return current data timestamp and increment */ - ts = st->data_timestamp; - st->data_timestamp += st->chip_period * INV_MPU6050_FREQ_DIVIDER(st); - - return ts; -} - static int inv_reset_fifo(struct iio_dev *indio_dev) { int result; @@ -121,7 +50,9 @@ irqreturn_t inv_mpu6050_read_fifo(int irq, void *p) size_t bytes_per_datum; int result; u16 fifo_count; + u32 fifo_period; s64 timestamp; + u8 data[INV_MPU6050_OUTPUT_DATA_SIZE]; int int_status; size_t i, nb; @@ -175,21 +106,30 @@ irqreturn_t inv_mpu6050_read_fifo(int irq, void *p) goto flush_fifo; } - /* compute and process all complete datum */ + /* compute and process only all complete datum */ nb = fifo_count / bytes_per_datum; - inv_mpu6050_update_period(st, pf->timestamp, nb); + fifo_count = nb * bytes_per_datum; + /* Each FIFO data contains all sensors, so same number for FIFO and sensor data */ + fifo_period = NSEC_PER_SEC / INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider); + inv_sensors_timestamp_interrupt(&st->timestamp, fifo_period, nb, nb, pf->timestamp); + inv_sensors_timestamp_apply_odr(&st->timestamp, fifo_period, nb, 0); + + /* clear internal data buffer for avoiding kernel data leak */ + memset(data, 0, sizeof(data)); + + /* read all data once and process every samples */ + result = regmap_noinc_read(st->map, st->reg->fifo_r_w, st->data, fifo_count); + if (result) + goto flush_fifo; for (i = 0; i < nb; ++i) { - result = regmap_noinc_read(st->map, st->reg->fifo_r_w, - st->data, bytes_per_datum); - if (result) - goto flush_fifo; /* skip first samples if needed */ if (st->skip_samples) { st->skip_samples--; continue; } - timestamp = inv_mpu6050_get_timestamp(st); - iio_push_to_buffers_with_timestamp(indio_dev, st->data, timestamp); + memcpy(data, &st->data[i * bytes_per_datum], bytes_per_datum); + timestamp = inv_sensors_timestamp_pop(&st->timestamp); + iio_push_to_buffers_with_timestamp(indio_dev, data, timestamp); } end_session: diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_trigger.c b/drivers/iio/imu/inv_mpu6050/inv_mpu_trigger.c index 882546897255..676704f9151f 100644 --- a/drivers/iio/imu/inv_mpu6050/inv_mpu_trigger.c +++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_trigger.c @@ -4,6 +4,9 @@ */ #include + +#include + #include "inv_mpu_iio.h" static unsigned int inv_scan_query_mpu6050(struct iio_dev *indio_dev) @@ -106,7 +109,8 @@ int inv_mpu6050_prepare_fifo(struct inv_mpu6050_state *st, bool enable) int ret; if (enable) { - st->it_timestamp = 0; + /* reset timestamping */ + inv_sensors_timestamp_reset(&st->timestamp); /* reset FIFO */ d = st->chip_config.user_ctrl | INV_MPU6050_BIT_FIFO_RST; ret = regmap_write(st->map, st->reg->user_ctrl, d); diff --git a/drivers/iio/industrialio-core.c b/drivers/iio/industrialio-core.c index adcba832e6fa..d752e9c0499b 100644 --- a/drivers/iio/industrialio-core.c +++ b/drivers/iio/industrialio-core.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only -/* The industrial I/O core +/* + * The industrial I/O core * * Copyright (c) 2008 Jonathan Cameron * @@ -183,7 +184,9 @@ static const char * const iio_chan_info_postfix[] = { * @indio_dev: Device structure whose ID is being queried * * The IIO device ID is a unique index used for example for the naming - * of the character device /dev/iio\:device[ID] + * of the character device /dev/iio\:device[ID]. + * + * Returns: Unique ID for the device. */ int iio_device_id(struct iio_dev *indio_dev) { @@ -196,14 +199,16 @@ EXPORT_SYMBOL_GPL(iio_device_id); /** * iio_buffer_enabled() - helper function to test if the buffer is enabled * @indio_dev: IIO device structure for device + * + * Returns: True, if the buffer is enabled. */ bool iio_buffer_enabled(struct iio_dev *indio_dev) { struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev); - return iio_dev_opaque->currentmode - & (INDIO_BUFFER_TRIGGERED | INDIO_BUFFER_HARDWARE | - INDIO_BUFFER_SOFTWARE); + return iio_dev_opaque->currentmode & + (INDIO_BUFFER_HARDWARE | INDIO_BUFFER_SOFTWARE | + INDIO_BUFFER_TRIGGERED); } EXPORT_SYMBOL_GPL(iio_buffer_enabled); @@ -225,6 +230,9 @@ EXPORT_SYMBOL_GPL(iio_get_debugfs_dentry); * iio_find_channel_from_si() - get channel from its scan index * @indio_dev: device * @si: scan index to match + * + * Returns: + * Constant pointer to iio_chan_spec, if scan index matches, NULL on failure. */ const struct iio_chan_spec *iio_find_channel_from_si(struct iio_dev *indio_dev, int si) @@ -249,7 +257,9 @@ EXPORT_SYMBOL(iio_read_const_attr); /** * iio_device_set_clock() - Set current timestamping clock for the device * @indio_dev: IIO device structure containing the device - * @clock_id: timestamping clock posix identifier to set. + * @clock_id: timestamping clock POSIX identifier to set. + * + * Returns: 0 on success, or a negative error code. */ int iio_device_set_clock(struct iio_dev *indio_dev, clockid_t clock_id) { @@ -275,6 +285,8 @@ EXPORT_SYMBOL(iio_device_set_clock); /** * iio_device_get_clock() - Retrieve current timestamping clock for the device * @indio_dev: IIO device structure containing the device + * + * Returns: Clock ID of the current timestamping clock for the device. */ clockid_t iio_device_get_clock(const struct iio_dev *indio_dev) { @@ -287,6 +299,8 @@ EXPORT_SYMBOL(iio_device_get_clock); /** * iio_get_time_ns() - utility function to get a time stamp for events etc * @indio_dev: device + * + * Returns: Timestamp of the event in nanoseconds. */ s64 iio_get_time_ns(const struct iio_dev *indio_dev) { @@ -372,8 +386,8 @@ static ssize_t iio_debugfs_read_reg(struct file *file, char __user *userbuf, } iio_dev_opaque->read_buf_len = snprintf(iio_dev_opaque->read_buf, - sizeof(iio_dev_opaque->read_buf), - "0x%X\n", val); + sizeof(iio_dev_opaque->read_buf), + "0x%X\n", val); return simple_read_from_buffer(userbuf, count, ppos, iio_dev_opaque->read_buf, @@ -389,7 +403,7 @@ static ssize_t iio_debugfs_write_reg(struct file *file, char buf[80]; int ret; - count = min_t(size_t, count, (sizeof(buf)-1)); + count = min(count, sizeof(buf) - 1); if (copy_from_user(buf, userbuf, count)) return -EFAULT; @@ -476,8 +490,7 @@ static ssize_t iio_read_channel_ext_info(struct device *dev, static ssize_t iio_write_channel_ext_info(struct device *dev, struct device_attribute *attr, - const char *buf, - size_t len) + const char *buf, size_t len) { struct iio_dev *indio_dev = dev_to_iio_dev(dev); struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); @@ -524,7 +537,7 @@ ssize_t iio_enum_read(struct iio_dev *indio_dev, i = e->get(indio_dev, chan); if (i < 0) return i; - else if (i >= e->num_items || !e->items[i]) + if (i >= e->num_items || !e->items[i]) return -EINVAL; return sysfs_emit(buf, "%s\n", e->items[i]); @@ -569,9 +582,9 @@ static int iio_setup_mount_idmatrix(const struct device *dev, ssize_t iio_show_mount_matrix(struct iio_dev *indio_dev, uintptr_t priv, const struct iio_chan_spec *chan, char *buf) { - const struct iio_mount_matrix *mtx = ((iio_get_mount_matrix_t *) - priv)(indio_dev, chan); + const struct iio_mount_matrix *mtx; + mtx = ((iio_get_mount_matrix_t *)priv)(indio_dev, chan); if (IS_ERR(mtx)) return PTR_ERR(mtx); @@ -594,7 +607,7 @@ EXPORT_SYMBOL_GPL(iio_show_mount_matrix); * If device is assigned no mounting matrix property, a default 3x3 identity * matrix will be filled in. * - * Return: 0 if success, or a negative error code on failure. + * Returns: 0 if success, or a negative error code on failure. */ int iio_read_mount_matrix(struct device *dev, struct iio_mount_matrix *matrix) { @@ -692,9 +705,9 @@ static ssize_t __iio_format_value(char *buf, size_t offset, unsigned int type, * @vals: Pointer to the values, exact meaning depends on the * type parameter. * - * Return: 0 by default, a negative number on failure or the - * total number of characters written for a type that belongs - * to the IIO_VAL_* constant. + * Returns: + * 0 by default, a negative number on failure or the total number of characters + * written for a type that belongs to the IIO_VAL_* constant. */ ssize_t iio_format_value(char *buf, unsigned int type, int size, int *vals) { @@ -847,8 +860,8 @@ static ssize_t iio_read_channel_info_avail(struct device *dev, * @fract: The fractional part of the number * @scale_db: True if this should parse as dB * - * Returns 0 on success, or a negative error code if the string could not be - * parsed. + * Returns: + * 0 on success, or a negative error code if the string could not be parsed. */ static int __iio_str_to_fixpoint(const char *str, int fract_mult, int *integer, int *fract, bool scale_db) @@ -917,8 +930,8 @@ static int __iio_str_to_fixpoint(const char *str, int fract_mult, * @integer: The integer part of the number * @fract: The fractional part of the number * - * Returns 0 on success, or a negative error code if the string could not be - * parsed. + * Returns: + * 0 on success, or a negative error code if the string could not be parsed. */ int iio_str_to_fixpoint(const char *str, int fract_mult, int *integer, int *fract) @@ -1009,14 +1022,12 @@ int __iio_device_attr_init(struct device_attribute *dev_attr, if (chan->modified && (shared_by == IIO_SEPARATE)) { if (chan->extend_name) full_postfix = kasprintf(GFP_KERNEL, "%s_%s_%s", - iio_modifier_names[chan - ->channel2], + iio_modifier_names[chan->channel2], chan->extend_name, postfix); else full_postfix = kasprintf(GFP_KERNEL, "%s_%s", - iio_modifier_names[chan - ->channel2], + iio_modifier_names[chan->channel2], postfix); } else { if (chan->extend_name == NULL || shared_by != IIO_SEPARATE) @@ -1217,7 +1228,7 @@ static int iio_device_add_info_mask_type(struct iio_dev *indio_dev, &iio_dev_opaque->channel_attr_list); if ((ret == -EBUSY) && (shared_by != IIO_SEPARATE)) continue; - else if (ret < 0) + if (ret < 0) return ret; attrcount++; } @@ -1255,7 +1266,7 @@ static int iio_device_add_info_mask_type_avail(struct iio_dev *indio_dev, kfree(avail_postfix); if ((ret == -EBUSY) && (shared_by != IIO_SEPARATE)) continue; - else if (ret < 0) + if (ret < 0) return ret; attrcount++; } @@ -1400,50 +1411,42 @@ static ssize_t label_show(struct device *dev, struct device_attribute *attr, static DEVICE_ATTR_RO(label); +static const char * const clock_names[] = { + [CLOCK_REALTIME] = "realtime", + [CLOCK_MONOTONIC] = "monotonic", + [CLOCK_PROCESS_CPUTIME_ID] = "process_cputime_id", + [CLOCK_THREAD_CPUTIME_ID] = "thread_cputime_id", + [CLOCK_MONOTONIC_RAW] = "monotonic_raw", + [CLOCK_REALTIME_COARSE] = "realtime_coarse", + [CLOCK_MONOTONIC_COARSE] = "monotonic_coarse", + [CLOCK_BOOTTIME] = "boottime", + [CLOCK_REALTIME_ALARM] = "realtime_alarm", + [CLOCK_BOOTTIME_ALARM] = "boottime_alarm", + [CLOCK_SGI_CYCLE] = "sgi_cycle", + [CLOCK_TAI] = "tai", +}; + static ssize_t current_timestamp_clock_show(struct device *dev, struct device_attribute *attr, char *buf) { const struct iio_dev *indio_dev = dev_to_iio_dev(dev); const clockid_t clk = iio_device_get_clock(indio_dev); - const char *name; - ssize_t sz; switch (clk) { case CLOCK_REALTIME: - name = "realtime\n"; - sz = sizeof("realtime\n"); - break; case CLOCK_MONOTONIC: - name = "monotonic\n"; - sz = sizeof("monotonic\n"); - break; case CLOCK_MONOTONIC_RAW: - name = "monotonic_raw\n"; - sz = sizeof("monotonic_raw\n"); - break; case CLOCK_REALTIME_COARSE: - name = "realtime_coarse\n"; - sz = sizeof("realtime_coarse\n"); - break; case CLOCK_MONOTONIC_COARSE: - name = "monotonic_coarse\n"; - sz = sizeof("monotonic_coarse\n"); - break; case CLOCK_BOOTTIME: - name = "boottime\n"; - sz = sizeof("boottime\n"); - break; case CLOCK_TAI: - name = "tai\n"; - sz = sizeof("tai\n"); break; default: BUG(); } - memcpy(buf, name, sz); - return sz; + return sysfs_emit(buf, "%s\n", clock_names[clk]); } static ssize_t current_timestamp_clock_store(struct device *dev, @@ -1453,22 +1456,23 @@ static ssize_t current_timestamp_clock_store(struct device *dev, clockid_t clk; int ret; - if (sysfs_streq(buf, "realtime")) - clk = CLOCK_REALTIME; - else if (sysfs_streq(buf, "monotonic")) - clk = CLOCK_MONOTONIC; - else if (sysfs_streq(buf, "monotonic_raw")) - clk = CLOCK_MONOTONIC_RAW; - else if (sysfs_streq(buf, "realtime_coarse")) - clk = CLOCK_REALTIME_COARSE; - else if (sysfs_streq(buf, "monotonic_coarse")) - clk = CLOCK_MONOTONIC_COARSE; - else if (sysfs_streq(buf, "boottime")) - clk = CLOCK_BOOTTIME; - else if (sysfs_streq(buf, "tai")) - clk = CLOCK_TAI; - else + ret = sysfs_match_string(clock_names, buf); + if (ret < 0) + return ret; + clk = ret; + + switch (clk) { + case CLOCK_REALTIME: + case CLOCK_MONOTONIC: + case CLOCK_MONOTONIC_RAW: + case CLOCK_REALTIME_COARSE: + case CLOCK_MONOTONIC_COARSE: + case CLOCK_BOOTTIME: + case CLOCK_TAI: + break; + default: return -EINVAL; + } ret = iio_device_set_clock(dev_to_iio_dev(dev), clk); if (ret) @@ -1484,7 +1488,7 @@ int iio_device_register_sysfs_group(struct iio_dev *indio_dev, const struct attribute_group **new, **old = iio_dev_opaque->groups; unsigned int cnt = iio_dev_opaque->groupcounter; - new = krealloc(old, sizeof(*new) * (cnt + 2), GFP_KERNEL); + new = krealloc_array(old, cnt + 2, sizeof(*new), GFP_KERNEL); if (!new) return -ENOMEM; @@ -1621,7 +1625,10 @@ const struct device_type iio_device_type = { * iio_device_alloc() - allocate an iio_dev from a driver * @parent: Parent device. * @sizeof_priv: Space to allocate for private structure. - **/ + * + * Returns: + * Pointer to allocated iio_dev on success, NULL on failure. + */ struct iio_dev *iio_device_alloc(struct device *parent, int sizeof_priv) { struct iio_dev_opaque *iio_dev_opaque; @@ -1677,7 +1684,7 @@ EXPORT_SYMBOL(iio_device_alloc); /** * iio_device_free() - free an iio_dev from a driver * @dev: the iio_dev associated with the device - **/ + */ void iio_device_free(struct iio_dev *dev) { if (dev) @@ -1698,7 +1705,7 @@ static void devm_iio_device_release(void *iio_dev) * Managed iio_device_alloc. iio_dev allocated with this function is * automatically freed on driver detach. * - * RETURNS: + * Returns: * Pointer to allocated iio_dev on success, NULL on failure. */ struct iio_dev *devm_iio_device_alloc(struct device *parent, int sizeof_priv) @@ -1725,8 +1732,8 @@ EXPORT_SYMBOL_GPL(devm_iio_device_alloc); * @filp: File structure for iio device used to keep and later access * private data * - * Return: 0 on success or -EBUSY if the device is already opened - **/ + * Returns: 0 on success or -EBUSY if the device is already opened + */ static int iio_chrdev_open(struct inode *inode, struct file *filp) { struct iio_dev_opaque *iio_dev_opaque = @@ -1759,7 +1766,7 @@ static int iio_chrdev_open(struct inode *inode, struct file *filp) * @inode: Inode structure pointer for the char device * @filp: File structure pointer for the char device * - * Return: 0 for successful release + * Returns: 0 for successful release. */ static int iio_chrdev_release(struct inode *inode, struct file *filp) { @@ -1798,7 +1805,7 @@ static long iio_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) mutex_lock(&iio_dev_opaque->info_exist_lock); - /** + /* * The NULL check here is required to prevent crashing when a device * is being removed while userspace would still have open file handles * to try to access this device. @@ -1976,7 +1983,7 @@ EXPORT_SYMBOL(__iio_device_register); /** * iio_device_unregister() - unregister a device from the IIO subsystem * @indio_dev: Device structure representing the device. - **/ + */ void iio_device_unregister(struct iio_dev *indio_dev) { struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev); @@ -2027,7 +2034,7 @@ EXPORT_SYMBOL_GPL(__devm_iio_device_register); * * Use with iio_device_release_direct_mode() * - * Returns: 0 on success, -EBUSY on failure + * Returns: 0 on success, -EBUSY on failure. */ int iio_device_claim_direct_mode(struct iio_dev *indio_dev) { diff --git a/drivers/iio/industrialio-event.c b/drivers/iio/industrialio-event.c index f77ce49d4c36..19f7a91157ee 100644 --- a/drivers/iio/industrialio-event.c +++ b/drivers/iio/industrialio-event.c @@ -252,6 +252,8 @@ static const char * const iio_ev_info_text[] = { [IIO_EV_INFO_TIMEOUT] = "timeout", [IIO_EV_INFO_RESET_TIMEOUT] = "reset_timeout", [IIO_EV_INFO_TAP2_MIN_DELAY] = "tap2_min_delay", + [IIO_EV_INFO_RUNNING_PERIOD] = "runningperiod", + [IIO_EV_INFO_RUNNING_COUNT] = "runningcount", }; static enum iio_event_direction iio_ev_attr_dir(struct iio_dev_attr *attr) diff --git a/drivers/iio/industrialio-trigger.c b/drivers/iio/industrialio-trigger.c index f207e36b12cc..18f83158f637 100644 --- a/drivers/iio/industrialio-trigger.c +++ b/drivers/iio/industrialio-trigger.c @@ -313,7 +313,7 @@ int iio_trigger_attach_poll_func(struct iio_trigger *trig, /* Enable trigger in driver */ if (trig->ops && trig->ops->set_trigger_state && notinuse) { ret = trig->ops->set_trigger_state(trig, true); - if (ret < 0) + if (ret) goto out_free_irq; } diff --git a/drivers/iio/light/cm3605.c b/drivers/iio/light/cm3605.c index 0b30db77f78b..e7f0b81b7f5a 100644 --- a/drivers/iio/light/cm3605.c +++ b/drivers/iio/light/cm3605.c @@ -227,7 +227,7 @@ static int cm3605_probe(struct platform_device *pdev) irq = platform_get_irq(pdev, 0); if (irq < 0) { - ret = dev_err_probe(dev, irq, "failed to get irq\n"); + ret = irq; goto out_disable_aset; } diff --git a/drivers/iio/light/rohm-bu27008.c b/drivers/iio/light/rohm-bu27008.c index b50bf8973d9a..6a6d77805091 100644 --- a/drivers/iio/light/rohm-bu27008.c +++ b/drivers/iio/light/rohm-bu27008.c @@ -1,6 +1,8 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * BU27008 ROHM Colour Sensor + * ROHM Colour Sensor driver for + * - BU27008 RGBC sensor + * - BU27010 RGBC + Flickering sensor * * Copyright (c) 2023, ROHM Semiconductor. */ @@ -22,6 +24,25 @@ #include #include +/* + * A word about register address and mask definitions. + * + * At a quick glance to the data-sheet register tables, the BU27010 has all the + * registers that the BU27008 has. On top of that the BU27010 adds couple of new + * ones. + * + * So, all definitions BU27008_REG_* are there also for BU27010 but none of the + * BU27010_REG_* are present on BU27008. This makes sense as BU27010 just adds + * some features (Flicker FIFO, more power control) on top of the BU27008. + * + * Unfortunately, some of the wheel has been re-invented. Even though the names + * of the registers have stayed the same, pretty much all of the functionality + * provided by the registers has changed place. Contents of all MODE_CONTROL + * registers on BU27008 and BU27010 are different. + * + * Chip-specific mapping from register addresses/bits to functionality is done + * in bu27_chip_data structures. + */ #define BU27008_REG_SYSTEM_CONTROL 0x40 #define BU27008_MASK_SW_RESET BIT(7) #define BU27008_MASK_PART_ID GENMASK(5, 0) @@ -52,6 +73,56 @@ #define BU27008_REG_MANUFACTURER_ID 0x92 #define BU27008_REG_MAX BU27008_REG_MANUFACTURER_ID +/* BU27010 specific definitions */ + +#define BU27010_MASK_SW_RESET BIT(7) +#define BU27010_ID 0x1b +#define BU27010_REG_POWER 0x3e +#define BU27010_MASK_POWER BIT(0) + +#define BU27010_REG_RESET 0x3f +#define BU27010_MASK_RESET BIT(0) +#define BU27010_RESET_RELEASE BU27010_MASK_RESET + +#define BU27010_MASK_MEAS_EN BIT(1) + +#define BU27010_MASK_CHAN_SEL GENMASK(7, 6) +#define BU27010_MASK_MEAS_MODE GENMASK(5, 4) +#define BU27010_MASK_RGBC_GAIN GENMASK(3, 0) + +#define BU27010_MASK_DATA3_GAIN GENMASK(7, 6) +#define BU27010_MASK_DATA2_GAIN GENMASK(5, 4) +#define BU27010_MASK_DATA1_GAIN GENMASK(3, 2) +#define BU27010_MASK_DATA0_GAIN GENMASK(1, 0) + +#define BU27010_MASK_FLC_MODE BIT(7) +#define BU27010_MASK_FLC_GAIN GENMASK(4, 0) + +#define BU27010_REG_MODE_CONTROL4 0x44 +/* If flicker is ever to be supported the IRQ must be handled as a field */ +#define BU27010_IRQ_DIS_ALL GENMASK(1, 0) +#define BU27010_DRDY_EN BIT(0) +#define BU27010_MASK_INT_SEL GENMASK(1, 0) + +#define BU27010_REG_MODE_CONTROL5 0x45 +#define BU27010_MASK_RGB_VALID BIT(7) +#define BU27010_MASK_FLC_VALID BIT(6) +#define BU27010_MASK_WAIT_EN BIT(3) +#define BU27010_MASK_FIFO_EN BIT(2) +#define BU27010_MASK_RGB_EN BIT(1) +#define BU27010_MASK_FLC_EN BIT(0) + +#define BU27010_REG_DATA_FLICKER_LO 0x56 +#define BU27010_MASK_DATA_FLICKER_HI GENMASK(2, 0) +#define BU27010_REG_FLICKER_COUNT 0x5a +#define BU27010_REG_FIFO_LEVEL_LO 0x5b +#define BU27010_MASK_FIFO_LEVEL_HI BIT(0) +#define BU27010_REG_FIFO_DATA_LO 0x5d +#define BU27010_REG_FIFO_DATA_HI 0x5e +#define BU27010_MASK_FIFO_DATA_HI GENMASK(2, 0) +#define BU27010_REG_MANUFACTURER_ID 0x92 +#define BU27010_REG_MAX BU27010_REG_MANUFACTURER_ID + /** * enum bu27008_chan_type - BU27008 channel types * @BU27008_RED: Red channel. Always via data0. @@ -117,6 +188,17 @@ static const unsigned long bu27008_scan_masks[] = { */ #define BU27008_SCALE_1X 16 +/* + * On BU27010 available scales with gain 1x - 4096x, + * timings 55, 100, 200, 400 mS. Time impacts to gain: 1x, 2x, 4x, 8x. + * + * => Max total gain is HWGAIN * gain by integration time (8 * 4096) + * + * Using NANO precision for scale we must use scale 64x corresponding gain 1x + * to avoid precision loss. + */ +#define BU27010_SCALE_1X 64 + /* See the data sheet for the "Gain Setting" table */ #define BU27008_GSEL_1X 0x00 #define BU27008_GSEL_4X 0x08 @@ -152,10 +234,44 @@ static const struct iio_gain_sel_pair bu27008_gains_ir[] = { GAIN_SCALE_GAIN(1024, BU27008_GSEL_1024X), }; +#define BU27010_GSEL_1X 0x00 /* 000000 */ +#define BU27010_GSEL_4X 0x08 /* 001000 */ +#define BU27010_GSEL_16X 0x09 /* 001001 */ +#define BU27010_GSEL_64X 0x0e /* 001110 */ +#define BU27010_GSEL_256X 0x1e /* 011110 */ +#define BU27010_GSEL_1024X 0x2e /* 101110 */ +#define BU27010_GSEL_4096X 0x3f /* 111111 */ + +static const struct iio_gain_sel_pair bu27010_gains[] = { + GAIN_SCALE_GAIN(1, BU27010_GSEL_1X), + GAIN_SCALE_GAIN(4, BU27010_GSEL_4X), + GAIN_SCALE_GAIN(16, BU27010_GSEL_16X), + GAIN_SCALE_GAIN(64, BU27010_GSEL_64X), + GAIN_SCALE_GAIN(256, BU27010_GSEL_256X), + GAIN_SCALE_GAIN(1024, BU27010_GSEL_1024X), + GAIN_SCALE_GAIN(4096, BU27010_GSEL_4096X), +}; + +static const struct iio_gain_sel_pair bu27010_gains_ir[] = { + GAIN_SCALE_GAIN(2, BU27010_GSEL_1X), + GAIN_SCALE_GAIN(4, BU27010_GSEL_4X), + GAIN_SCALE_GAIN(16, BU27010_GSEL_16X), + GAIN_SCALE_GAIN(64, BU27010_GSEL_64X), + GAIN_SCALE_GAIN(256, BU27010_GSEL_256X), + GAIN_SCALE_GAIN(1024, BU27010_GSEL_1024X), + GAIN_SCALE_GAIN(4096, BU27010_GSEL_4096X), +}; + #define BU27008_MEAS_MODE_100MS 0x00 #define BU27008_MEAS_MODE_55MS 0x01 #define BU27008_MEAS_MODE_200MS 0x02 #define BU27008_MEAS_MODE_400MS 0x04 + +#define BU27010_MEAS_MODE_100MS 0x00 +#define BU27010_MEAS_MODE_55MS 0x03 +#define BU27010_MEAS_MODE_200MS 0x01 +#define BU27010_MEAS_MODE_400MS 0x02 + #define BU27008_MEAS_TIME_MAX_MS 400 static const struct iio_itime_sel_mul bu27008_itimes[] = { @@ -165,6 +281,13 @@ static const struct iio_itime_sel_mul bu27008_itimes[] = { GAIN_SCALE_ITIME_US(55000, BU27008_MEAS_MODE_55MS, 1), }; +static const struct iio_itime_sel_mul bu27010_itimes[] = { + GAIN_SCALE_ITIME_US(400000, BU27010_MEAS_MODE_400MS, 8), + GAIN_SCALE_ITIME_US(200000, BU27010_MEAS_MODE_200MS, 4), + GAIN_SCALE_ITIME_US(100000, BU27010_MEAS_MODE_100MS, 2), + GAIN_SCALE_ITIME_US(55000, BU27010_MEAS_MODE_55MS, 1), +}; + /* * All the RGBC channels share the same gain. * IR gain can be fine-tuned from the gain set for the RGBC by 2 bit, but this @@ -211,7 +334,35 @@ static const struct iio_chan_spec bu27008_channels[] = { IIO_CHAN_SOFT_TIMESTAMP(BU27008_NUM_CHANS), }; +struct bu27008_data; + +struct bu27_chip_data { + const char *name; + int (*chip_init)(struct bu27008_data *data); + int (*get_gain_sel)(struct bu27008_data *data, int *sel); + int (*write_gain_sel)(struct bu27008_data *data, int sel); + const struct regmap_config *regmap_cfg; + const struct iio_gain_sel_pair *gains; + const struct iio_gain_sel_pair *gains_ir; + const struct iio_itime_sel_mul *itimes; + int num_gains; + int num_gains_ir; + int num_itimes; + int scale1x; + + int drdy_en_reg; + int drdy_en_mask; + int meas_en_reg; + int meas_en_mask; + int valid_reg; + int chan_sel_reg; + int chan_sel_mask; + int int_time_mask; + u8 part_id; +}; + struct bu27008_data { + const struct bu27_chip_data *cd; struct regmap *regmap; struct iio_trigger *trig; struct device *dev; @@ -240,11 +391,29 @@ static const struct regmap_range bu27008_volatile_ranges[] = { }, }; +static const struct regmap_range bu27010_volatile_ranges[] = { + { + .range_min = BU27010_REG_RESET, /* RSTB */ + .range_max = BU27008_REG_SYSTEM_CONTROL, /* RESET */ + }, { + .range_min = BU27010_REG_MODE_CONTROL5, /* VALID bits */ + .range_max = BU27010_REG_MODE_CONTROL5, + }, { + .range_min = BU27008_REG_DATA0_LO, + .range_max = BU27010_REG_FIFO_DATA_HI, + }, +}; + static const struct regmap_access_table bu27008_volatile_regs = { .yes_ranges = &bu27008_volatile_ranges[0], .n_yes_ranges = ARRAY_SIZE(bu27008_volatile_ranges), }; +static const struct regmap_access_table bu27010_volatile_regs = { + .yes_ranges = &bu27010_volatile_ranges[0], + .n_yes_ranges = ARRAY_SIZE(bu27010_volatile_ranges), +}; + static const struct regmap_range bu27008_read_only_ranges[] = { { .range_min = BU27008_REG_DATA0_LO, @@ -255,11 +424,26 @@ static const struct regmap_range bu27008_read_only_ranges[] = { }, }; +static const struct regmap_range bu27010_read_only_ranges[] = { + { + .range_min = BU27008_REG_DATA0_LO, + .range_max = BU27010_REG_FIFO_DATA_HI, + }, { + .range_min = BU27010_REG_MANUFACTURER_ID, + .range_max = BU27010_REG_MANUFACTURER_ID, + } +}; + static const struct regmap_access_table bu27008_ro_regs = { .no_ranges = &bu27008_read_only_ranges[0], .n_no_ranges = ARRAY_SIZE(bu27008_read_only_ranges), }; +static const struct regmap_access_table bu27010_ro_regs = { + .no_ranges = &bu27010_read_only_ranges[0], + .n_no_ranges = ARRAY_SIZE(bu27010_read_only_ranges), +}; + static const struct regmap_config bu27008_regmap = { .reg_bits = 8, .val_bits = 8, @@ -282,50 +466,16 @@ static const struct regmap_config bu27008_regmap = { .disable_locking = true, }; -#define BU27008_MAX_VALID_RESULT_WAIT_US 50000 -#define BU27008_VALID_RESULT_WAIT_QUANTA_US 1000 +static const struct regmap_config bu27010_regmap = { + .reg_bits = 8, + .val_bits = 8, -static int bu27008_chan_read_data(struct bu27008_data *data, int reg, int *val) -{ - int ret, valid; - __le16 tmp; - - ret = regmap_read_poll_timeout(data->regmap, BU27008_REG_MODE_CONTROL3, - valid, (valid & BU27008_MASK_VALID), - BU27008_VALID_RESULT_WAIT_QUANTA_US, - BU27008_MAX_VALID_RESULT_WAIT_US); - if (ret) - return ret; - - ret = regmap_bulk_read(data->regmap, reg, &tmp, sizeof(tmp)); - if (ret) - dev_err(data->dev, "Reading channel data failed\n"); - - *val = le16_to_cpu(tmp); - - return ret; -} - -static int bu27008_get_gain(struct bu27008_data *data, struct iio_gts *gts, int *gain) -{ - int ret, sel; - - ret = regmap_read(data->regmap, BU27008_REG_MODE_CONTROL2, &sel); - if (ret) - return ret; - - sel = FIELD_GET(BU27008_MASK_RGBC_GAIN, sel); - - ret = iio_gts_find_gain_by_sel(gts, sel); - if (ret < 0) { - dev_err(data->dev, "unknown gain value 0x%x\n", sel); - return ret; - } - - *gain = ret; - - return 0; -} + .max_register = BU27010_REG_MAX, + .cache_type = REGCACHE_RBTREE, + .volatile_table = &bu27010_volatile_regs, + .wr_table = &bu27010_ro_regs, + .disable_locking = true, +}; static int bu27008_write_gain_sel(struct bu27008_data *data, int sel) { @@ -368,6 +518,264 @@ static int bu27008_write_gain_sel(struct bu27008_data *data, int sel) BU27008_MASK_RGBC_GAIN, regval); } +static int bu27010_write_gain_sel(struct bu27008_data *data, int sel) +{ + unsigned int regval; + int ret, chan_selector; + + /* + * Gain 'selector' is composed of two registers. Selector is 6bit value, + * 4 high bits being the RGBC gain fieild in MODE_CONTROL1 register and + * two low bits being the channel specific gain in MODE_CONTROL2. + * + * Let's take the 4 high bits of whole 6 bit selector, and prepare + * the MODE_CONTROL1 value (RGBC gain part). + */ + regval = FIELD_PREP(BU27010_MASK_RGBC_GAIN, (sel >> 2)); + + ret = regmap_update_bits(data->regmap, BU27008_REG_MODE_CONTROL1, + BU27010_MASK_RGBC_GAIN, regval); + if (ret) + return ret; + + /* + * Two low two bits of the selector must be written for all 4 + * channels in the MODE_CONTROL2 register. Copy these two bits for + * all channels. + */ + chan_selector = sel & GENMASK(1, 0); + + regval = FIELD_PREP(BU27010_MASK_DATA0_GAIN, chan_selector); + regval |= FIELD_PREP(BU27010_MASK_DATA1_GAIN, chan_selector); + regval |= FIELD_PREP(BU27010_MASK_DATA2_GAIN, chan_selector); + regval |= FIELD_PREP(BU27010_MASK_DATA3_GAIN, chan_selector); + + return regmap_write(data->regmap, BU27008_REG_MODE_CONTROL2, regval); +} + +static int bu27008_get_gain_sel(struct bu27008_data *data, int *sel) +{ + int ret; + + /* + * If we always "lock" the gain selectors for all channels to prevent + * unsupported configs, then it does not matter which channel is used + * we can just return selector from any of them. + * + * This, however is not true if we decide to support only 4X and 16X + * and then individual gains for channels. Currently this is not the + * case. + * + * If we some day decide to support individual gains, then we need to + * have channel information here. + */ + + ret = regmap_read(data->regmap, BU27008_REG_MODE_CONTROL2, sel); + if (ret) + return ret; + + *sel = FIELD_GET(BU27008_MASK_RGBC_GAIN, *sel); + + return 0; +} + +static int bu27010_get_gain_sel(struct bu27008_data *data, int *sel) +{ + int ret, tmp; + + /* + * We always "lock" the gain selectors for all channels to prevent + * unsupported configs. It does not matter which channel is used + * we can just return selector from any of them. + * + * Read the channel0 gain. + */ + ret = regmap_read(data->regmap, BU27008_REG_MODE_CONTROL2, sel); + if (ret) + return ret; + + *sel = FIELD_GET(BU27010_MASK_DATA0_GAIN, *sel); + + /* Read the shared gain */ + ret = regmap_read(data->regmap, BU27008_REG_MODE_CONTROL1, &tmp); + if (ret) + return ret; + + /* + * The gain selector is made as a combination of common RGBC gain and + * the channel specific gain. The channel specific gain forms the low + * bits of selector and RGBC gain is appended right after it. + * + * Compose the selector from channel0 gain and shared RGBC gain. + */ + *sel |= FIELD_GET(BU27010_MASK_RGBC_GAIN, tmp) << fls(BU27010_MASK_DATA0_GAIN); + + return ret; +} + +static int bu27008_chip_init(struct bu27008_data *data) +{ + int ret; + + ret = regmap_write_bits(data->regmap, BU27008_REG_SYSTEM_CONTROL, + BU27008_MASK_SW_RESET, BU27008_MASK_SW_RESET); + if (ret) + return dev_err_probe(data->dev, ret, "Sensor reset failed\n"); + + /* + * The data-sheet does not tell how long performing the IC reset takes. + * However, the data-sheet says the minimum time it takes the IC to be + * able to take inputs after power is applied, is 100 uS. I'd assume + * > 1 mS is enough. + */ + msleep(1); + + ret = regmap_reinit_cache(data->regmap, data->cd->regmap_cfg); + if (ret) + dev_err(data->dev, "Failed to reinit reg cache\n"); + + return ret; +} + +static int bu27010_chip_init(struct bu27008_data *data) +{ + int ret; + + ret = regmap_write_bits(data->regmap, BU27008_REG_SYSTEM_CONTROL, + BU27010_MASK_SW_RESET, BU27010_MASK_SW_RESET); + if (ret) + return dev_err_probe(data->dev, ret, "Sensor reset failed\n"); + + msleep(1); + + /* Power ON*/ + ret = regmap_write_bits(data->regmap, BU27010_REG_POWER, + BU27010_MASK_POWER, BU27010_MASK_POWER); + if (ret) + return dev_err_probe(data->dev, ret, "Sensor power-on failed\n"); + + msleep(1); + + /* Release blocks from reset */ + ret = regmap_write_bits(data->regmap, BU27010_REG_RESET, + BU27010_MASK_RESET, BU27010_RESET_RELEASE); + if (ret) + return dev_err_probe(data->dev, ret, "Sensor powering failed\n"); + + msleep(1); + + /* + * The IRQ enabling on BU27010 is done in a peculiar way. The IRQ + * enabling is not a bit mask where individual IRQs could be enabled but + * a field which values are: + * 00 => IRQs disabled + * 01 => Data-ready (RGBC/IR) + * 10 => Data-ready (flicker) + * 11 => Flicker FIFO + * + * So, only one IRQ can be enabled at a time and enabling for example + * flicker FIFO would automagically disable data-ready IRQ. + * + * Currently the driver does not support the flicker. Hence, we can + * just treat the RGBC data-ready as single bit which can be enabled / + * disabled. This works for as long as the second bit in the field + * stays zero. Here we ensure it gets zeroed. + */ + return regmap_clear_bits(data->regmap, BU27010_REG_MODE_CONTROL4, + BU27010_IRQ_DIS_ALL); +} + +static const struct bu27_chip_data bu27010_chip = { + .name = "bu27010", + .chip_init = bu27010_chip_init, + .get_gain_sel = bu27010_get_gain_sel, + .write_gain_sel = bu27010_write_gain_sel, + .regmap_cfg = &bu27010_regmap, + .gains = &bu27010_gains[0], + .gains_ir = &bu27010_gains_ir[0], + .itimes = &bu27010_itimes[0], + .num_gains = ARRAY_SIZE(bu27010_gains), + .num_gains_ir = ARRAY_SIZE(bu27010_gains_ir), + .num_itimes = ARRAY_SIZE(bu27010_itimes), + .scale1x = BU27010_SCALE_1X, + .drdy_en_reg = BU27010_REG_MODE_CONTROL4, + .drdy_en_mask = BU27010_DRDY_EN, + .meas_en_reg = BU27010_REG_MODE_CONTROL5, + .meas_en_mask = BU27010_MASK_MEAS_EN, + .valid_reg = BU27010_REG_MODE_CONTROL5, + .chan_sel_reg = BU27008_REG_MODE_CONTROL1, + .chan_sel_mask = BU27010_MASK_CHAN_SEL, + .int_time_mask = BU27010_MASK_MEAS_MODE, + .part_id = BU27010_ID, +}; + +static const struct bu27_chip_data bu27008_chip = { + .name = "bu27008", + .chip_init = bu27008_chip_init, + .get_gain_sel = bu27008_get_gain_sel, + .write_gain_sel = bu27008_write_gain_sel, + .regmap_cfg = &bu27008_regmap, + .gains = &bu27008_gains[0], + .gains_ir = &bu27008_gains_ir[0], + .itimes = &bu27008_itimes[0], + .num_gains = ARRAY_SIZE(bu27008_gains), + .num_gains_ir = ARRAY_SIZE(bu27008_gains_ir), + .num_itimes = ARRAY_SIZE(bu27008_itimes), + .scale1x = BU27008_SCALE_1X, + .drdy_en_reg = BU27008_REG_MODE_CONTROL3, + .drdy_en_mask = BU27008_MASK_INT_EN, + .valid_reg = BU27008_REG_MODE_CONTROL3, + .meas_en_reg = BU27008_REG_MODE_CONTROL3, + .meas_en_mask = BU27008_MASK_MEAS_EN, + .chan_sel_reg = BU27008_REG_MODE_CONTROL3, + .chan_sel_mask = BU27008_MASK_CHAN_SEL, + .int_time_mask = BU27008_MASK_MEAS_MODE, + .part_id = BU27008_ID, +}; + +#define BU27008_MAX_VALID_RESULT_WAIT_US 50000 +#define BU27008_VALID_RESULT_WAIT_QUANTA_US 1000 + +static int bu27008_chan_read_data(struct bu27008_data *data, int reg, int *val) +{ + int ret, valid; + __le16 tmp; + + ret = regmap_read_poll_timeout(data->regmap, data->cd->valid_reg, + valid, (valid & BU27008_MASK_VALID), + BU27008_VALID_RESULT_WAIT_QUANTA_US, + BU27008_MAX_VALID_RESULT_WAIT_US); + if (ret) + return ret; + + ret = regmap_bulk_read(data->regmap, reg, &tmp, sizeof(tmp)); + if (ret) + dev_err(data->dev, "Reading channel data failed\n"); + + *val = le16_to_cpu(tmp); + + return ret; +} + +static int bu27008_get_gain(struct bu27008_data *data, struct iio_gts *gts, int *gain) +{ + int ret, sel; + + ret = data->cd->get_gain_sel(data, &sel); + if (ret) + return ret; + + ret = iio_gts_find_gain_by_sel(gts, sel); + if (ret < 0) { + dev_err(data->dev, "unknown gain value 0x%x\n", sel); + return ret; + } + + *gain = ret; + + return 0; +} + static int bu27008_set_gain(struct bu27008_data *data, int gain) { int ret; @@ -376,7 +784,7 @@ static int bu27008_set_gain(struct bu27008_data *data, int gain) if (ret < 0) return ret; - return bu27008_write_gain_sel(data, ret); + return data->cd->write_gain_sel(data, ret); } static int bu27008_get_int_time_sel(struct bu27008_data *data, int *sel) @@ -384,15 +792,23 @@ static int bu27008_get_int_time_sel(struct bu27008_data *data, int *sel) int ret, val; ret = regmap_read(data->regmap, BU27008_REG_MODE_CONTROL1, &val); - *sel = FIELD_GET(BU27008_MASK_MEAS_MODE, val); + if (ret) + return ret; - return ret; + val &= data->cd->int_time_mask; + val >>= ffs(data->cd->int_time_mask) - 1; + + *sel = val; + + return 0; } static int bu27008_set_int_time_sel(struct bu27008_data *data, int sel) { + sel <<= ffs(data->cd->int_time_mask) - 1; + return regmap_update_bits(data->regmap, BU27008_REG_MODE_CONTROL1, - BU27008_MASK_MEAS_MODE, sel); + data->cd->int_time_mask, sel); } static int bu27008_get_int_time_us(struct bu27008_data *data) @@ -448,8 +864,7 @@ static int bu27008_set_int_time(struct bu27008_data *data, int time) if (ret < 0) return ret; - return regmap_update_bits(data->regmap, BU27008_REG_MODE_CONTROL1, - BU27008_MASK_MEAS_MODE, ret); + return bu27008_set_int_time_sel(data, ret); } /* Try to change the time so that the scale is maintained */ @@ -527,10 +942,13 @@ unlock_out: return ret; } -static int bu27008_meas_set(struct bu27008_data *data, int state) +static int bu27008_meas_set(struct bu27008_data *data, bool enable) { - return regmap_update_bits(data->regmap, BU27008_REG_MODE_CONTROL3, - BU27008_MASK_MEAS_EN, state); + if (enable) + return regmap_set_bits(data->regmap, data->cd->meas_en_reg, + data->cd->meas_en_mask); + return regmap_clear_bits(data->regmap, data->cd->meas_en_reg, + data->cd->meas_en_mask); } static int bu27008_chan_cfg(struct bu27008_data *data, @@ -543,9 +961,15 @@ static int bu27008_chan_cfg(struct bu27008_data *data, else chan_sel = BU27008_CLEAR2_IR3; - chan_sel = FIELD_PREP(BU27008_MASK_CHAN_SEL, chan_sel); + /* + * prepare bitfield for channel sel. The FIELD_PREP works only when + * mask is constant. In our case the mask is assigned based on the + * chip type. Hence the open-coded FIELD_PREP here. We don't bother + * zeroing the irrelevant bits though - update_bits takes care of that. + */ + chan_sel <<= ffs(data->cd->chan_sel_mask) - 1; - return regmap_update_bits(data->regmap, BU27008_REG_MODE_CONTROL3, + return regmap_update_bits(data->regmap, data->cd->chan_sel_reg, BU27008_MASK_CHAN_SEL, chan_sel); } @@ -558,7 +982,7 @@ static int bu27008_read_one(struct bu27008_data *data, struct iio_dev *idev, if (ret) return ret; - ret = bu27008_meas_set(data, BU27008_MEAS_EN); + ret = bu27008_meas_set(data, true); if (ret) return ret; @@ -574,7 +998,7 @@ static int bu27008_read_one(struct bu27008_data *data, struct iio_dev *idev, if (!ret) ret = IIO_VAL_INT; - if (bu27008_meas_set(data, BU27008_MEAS_DIS)) + if (bu27008_meas_set(data, false)) dev_warn(data->dev, "measurement disabling failed\n"); return ret; @@ -669,7 +1093,7 @@ static int bu27008_set_scale(struct bu27008_data *data, goto unlock_out; } - ret = bu27008_write_gain_sel(data, gain_sel); + ret = data->cd->write_gain_sel(data, gain_sel); unlock_out: mutex_unlock(&data->mutex); @@ -762,10 +1186,10 @@ static int bu27008_update_scan_mode(struct iio_dev *idev, chan_sel = BU27008_CLEAR2_IR3; } - chan_sel = FIELD_PREP(BU27008_MASK_CHAN_SEL, chan_sel); + chan_sel <<= ffs(data->cd->chan_sel_mask) - 1; - return regmap_update_bits(data->regmap, BU27008_REG_MODE_CONTROL3, - BU27008_MASK_CHAN_SEL, chan_sel); + return regmap_update_bits(data->regmap, data->cd->chan_sel_reg, + data->cd->chan_sel_mask, chan_sel); } static const struct iio_info bu27008_info = { @@ -777,46 +1201,18 @@ static const struct iio_info bu27008_info = { .validate_trigger = iio_validate_own_trigger, }; -static int bu27008_chip_init(struct bu27008_data *data) -{ - int ret; - - ret = regmap_write_bits(data->regmap, BU27008_REG_SYSTEM_CONTROL, - BU27008_MASK_SW_RESET, BU27008_MASK_SW_RESET); - if (ret) - return dev_err_probe(data->dev, ret, "Sensor reset failed\n"); - - /* - * The data-sheet does not tell how long performing the IC reset takes. - * However, the data-sheet says the minimum time it takes the IC to be - * able to take inputs after power is applied, is 100 uS. I'd assume - * > 1 mS is enough. - */ - msleep(1); - - ret = regmap_reinit_cache(data->regmap, &bu27008_regmap); - if (ret) - dev_err(data->dev, "Failed to reinit reg cache\n"); - - return ret; -} - -static int bu27008_set_drdy_irq(struct bu27008_data *data, int state) -{ - return regmap_update_bits(data->regmap, BU27008_REG_MODE_CONTROL3, - BU27008_MASK_INT_EN, state); -} - -static int bu27008_trigger_set_state(struct iio_trigger *trig, - bool state) +static int bu27008_trigger_set_state(struct iio_trigger *trig, bool state) { struct bu27008_data *data = iio_trigger_get_drvdata(trig); int ret; + if (state) - ret = bu27008_set_drdy_irq(data, BU27008_INT_EN); + ret = regmap_set_bits(data->regmap, data->cd->drdy_en_reg, + data->cd->drdy_en_mask); else - ret = bu27008_set_drdy_irq(data, BU27008_INT_DIS); + ret = regmap_clear_bits(data->regmap, data->cd->drdy_en_reg, + data->cd->drdy_en_mask); if (ret) dev_err(data->dev, "Failed to set trigger state\n"); @@ -852,7 +1248,7 @@ static irqreturn_t bu27008_trigger_handler(int irq, void *p) * After some measurements, it seems reading the * BU27008_REG_MODE_CONTROL3 debounces the IRQ line */ - ret = regmap_read(data->regmap, BU27008_REG_MODE_CONTROL3, &dummy); + ret = regmap_read(data->regmap, data->cd->valid_reg, &dummy); if (ret < 0) goto err_read; @@ -872,14 +1268,14 @@ static int bu27008_buffer_preenable(struct iio_dev *idev) { struct bu27008_data *data = iio_priv(idev); - return bu27008_meas_set(data, BU27008_MEAS_EN); + return bu27008_meas_set(data, true); } static int bu27008_buffer_postdisable(struct iio_dev *idev) { struct bu27008_data *data = iio_priv(idev); - return bu27008_meas_set(data, BU27008_MEAS_DIS); + return bu27008_meas_set(data, false); } static const struct iio_buffer_setup_ops bu27008_buffer_ops = { @@ -952,11 +1348,6 @@ static int bu27008_probe(struct i2c_client *i2c) struct iio_dev *idev; int ret; - regmap = devm_regmap_init_i2c(i2c, &bu27008_regmap); - if (IS_ERR(regmap)) - return dev_err_probe(dev, PTR_ERR(regmap), - "Failed to initialize Regmap\n"); - idev = devm_iio_device_alloc(dev, sizeof(*data)); if (!idev) return -ENOMEM; @@ -967,24 +1358,34 @@ static int bu27008_probe(struct i2c_client *i2c) data = iio_priv(idev); + data->cd = device_get_match_data(&i2c->dev); + if (!data->cd) + return -ENODEV; + + regmap = devm_regmap_init_i2c(i2c, data->cd->regmap_cfg); + if (IS_ERR(regmap)) + return dev_err_probe(dev, PTR_ERR(regmap), + "Failed to initialize Regmap\n"); + + ret = regmap_read(regmap, BU27008_REG_SYSTEM_CONTROL, ®); if (ret) return dev_err_probe(dev, ret, "Failed to access sensor\n"); part_id = FIELD_GET(BU27008_MASK_PART_ID, reg); - if (part_id != BU27008_ID) + if (part_id != data->cd->part_id) dev_warn(dev, "unknown device 0x%x\n", part_id); - ret = devm_iio_init_iio_gts(dev, BU27008_SCALE_1X, 0, bu27008_gains, - ARRAY_SIZE(bu27008_gains), bu27008_itimes, - ARRAY_SIZE(bu27008_itimes), &data->gts); + ret = devm_iio_init_iio_gts(dev, data->cd->scale1x, 0, data->cd->gains, + data->cd->num_gains, data->cd->itimes, + data->cd->num_itimes, &data->gts); if (ret) return ret; - ret = devm_iio_init_iio_gts(dev, BU27008_SCALE_1X, 0, bu27008_gains_ir, - ARRAY_SIZE(bu27008_gains_ir), bu27008_itimes, - ARRAY_SIZE(bu27008_itimes), &data->gts_ir); + ret = devm_iio_init_iio_gts(dev, data->cd->scale1x, 0, data->cd->gains_ir, + data->cd->num_gains_ir, data->cd->itimes, + data->cd->num_itimes, &data->gts_ir); if (ret) return ret; @@ -995,12 +1396,12 @@ static int bu27008_probe(struct i2c_client *i2c) idev->channels = bu27008_channels; idev->num_channels = ARRAY_SIZE(bu27008_channels); - idev->name = "bu27008"; + idev->name = data->cd->name; idev->info = &bu27008_info; idev->modes = INDIO_DIRECT_MODE; idev->available_scan_masks = bu27008_scan_masks; - ret = bu27008_chip_init(data); + ret = data->cd->chip_init(data); if (ret) return ret; @@ -1021,7 +1422,8 @@ static int bu27008_probe(struct i2c_client *i2c) } static const struct of_device_id bu27008_of_match[] = { - { .compatible = "rohm,bu27008" }, + { .compatible = "rohm,bu27008", .data = &bu27008_chip }, + { .compatible = "rohm,bu27010", .data = &bu27010_chip }, { } }; MODULE_DEVICE_TABLE(of, bu27008_of_match); @@ -1036,7 +1438,7 @@ static struct i2c_driver bu27008_i2c_driver = { }; module_i2c_driver(bu27008_i2c_driver); -MODULE_DESCRIPTION("ROHM BU27008 colour sensor driver"); +MODULE_DESCRIPTION("ROHM BU27008 and BU27010 colour sensor driver"); MODULE_AUTHOR("Matti Vaittinen "); MODULE_LICENSE("GPL"); MODULE_IMPORT_NS(IIO_GTS_HELPER); diff --git a/drivers/iio/light/vcnl4000.c b/drivers/iio/light/vcnl4000.c index 7c7362e28821..3a52b09c2823 100644 --- a/drivers/iio/light/vcnl4000.c +++ b/drivers/iio/light/vcnl4000.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include @@ -60,11 +61,15 @@ #define VCNL4200_AL_CONF 0x00 /* Ambient light configuration */ #define VCNL4200_PS_CONF1 0x03 /* Proximity configuration */ +#define VCNL4200_PS_CONF3 0x04 /* Proximity configuration */ #define VCNL4040_PS_THDL_LM 0x06 /* Proximity threshold low */ #define VCNL4040_PS_THDH_LM 0x07 /* Proximity threshold high */ +#define VCNL4040_ALS_THDL_LM 0x02 /* Ambient light threshold low */ +#define VCNL4040_ALS_THDH_LM 0x01 /* Ambient light threshold high */ #define VCNL4200_PS_DATA 0x08 /* Proximity data */ #define VCNL4200_AL_DATA 0x09 /* Ambient light data */ #define VCNL4040_INT_FLAGS 0x0b /* Interrupt register */ +#define VCNL4200_INT_FLAGS 0x0d /* Interrupt register */ #define VCNL4200_DEV_ID 0x0e /* Device ID, slave address and version */ #define VCNL4040_DEV_ID 0x0c /* Device ID and version */ @@ -79,11 +84,19 @@ #define VCNL4000_SELF_TIMED_EN BIT(0) /* start self-timed measurement */ #define VCNL4040_ALS_CONF_ALS_SHUTDOWN BIT(0) +#define VCNL4040_ALS_CONF_IT GENMASK(7, 6) /* Ambient integration time */ +#define VCNL4040_ALS_CONF_INT_EN BIT(1) /* Ambient light Interrupt enable */ +#define VCNL4040_ALS_CONF_PERS GENMASK(3, 2) /* Ambient interrupt persistence setting */ #define VCNL4040_PS_CONF1_PS_SHUTDOWN BIT(0) #define VCNL4040_PS_CONF2_PS_IT GENMASK(3, 1) /* Proximity integration time */ +#define VCNL4040_CONF1_PS_PERS GENMASK(5, 4) /* Proximity interrupt persistence setting */ #define VCNL4040_PS_CONF2_PS_INT GENMASK(9, 8) /* Proximity interrupt mode */ +#define VCNL4040_PS_CONF3_MPS GENMASK(6, 5) /* Proximity multi pulse number */ +#define VCNL4040_PS_MS_LED_I GENMASK(10, 8) /* Proximity current */ #define VCNL4040_PS_IF_AWAY BIT(8) /* Proximity event cross low threshold */ #define VCNL4040_PS_IF_CLOSE BIT(9) /* Proximity event cross high threshold */ +#define VCNL4040_ALS_RISING BIT(12) /* Ambient Light cross high threshold */ +#define VCNL4040_ALS_FALLING BIT(13) /* Ambient Light cross low threshold */ /* Bit masks for interrupt registers. */ #define VCNL4010_INT_THR_SEL BIT(0) /* Select threshold interrupt source */ @@ -123,6 +136,44 @@ static const int vcnl4040_ps_it_times[][2] = { {0, 800}, }; +static const int vcnl4200_ps_it_times[][2] = { + {0, 96}, + {0, 144}, + {0, 192}, + {0, 384}, + {0, 768}, + {0, 864}, +}; + +static const int vcnl4040_als_it_times[][2] = { + {0, 80000}, + {0, 160000}, + {0, 320000}, + {0, 640000}, +}; + +static const int vcnl4200_als_it_times[][2] = { + {0, 50000}, + {0, 100000}, + {0, 200000}, + {0, 400000}, +}; + +static const int vcnl4040_ps_calibbias_ua[][2] = { + {0, 50000}, + {0, 75000}, + {0, 100000}, + {0, 120000}, + {0, 140000}, + {0, 160000}, + {0, 180000}, + {0, 200000}, +}; + +static const int vcnl4040_als_persistence[] = {1, 2, 4, 8}; +static const int vcnl4040_ps_persistence[] = {1, 2, 3, 4}; +static const int vcnl4040_ps_oversampling_ratio[] = {1, 2, 4, 8}; + #define VCNL4000_SLEEP_DELAY_MS 2000 /* before we enter pm_runtime_suspend */ enum vcnl4000_device_ids { @@ -145,6 +196,7 @@ struct vcnl4000_data { int rev; int al_scale; u8 ps_int; /* proximity interrupt mode */ + u8 als_int; /* ambient light interrupt mode*/ const struct vcnl4000_chip_spec *chip_spec; struct mutex vcnl4000_lock; struct vcnl4200_channel vcnl4200_al; @@ -164,6 +216,13 @@ struct vcnl4000_chip_spec { int (*set_power_state)(struct vcnl4000_data *data, bool on); irqreturn_t (*irq_thread)(int irq, void *priv); irqreturn_t (*trig_buffer_func)(int irq, void *priv); + + u8 int_reg; + const int(*ps_it_times)[][2]; + const int num_ps_it_times; + const int(*als_it_times)[][2]; + const int num_als_it_times; + const unsigned int ulux_step; }; static const struct i2c_device_id vcnl4000_id[] = { @@ -263,7 +322,7 @@ static int vcnl4200_set_power_state(struct vcnl4000_data *data, bool on) int ret; /* Do not power down if interrupts are enabled */ - if (!on && data->ps_int) + if (!on && (data->ps_int || data->als_int)) return 0; ret = vcnl4000_write_als_enable(data, on); @@ -308,6 +367,7 @@ static int vcnl4200_init(struct vcnl4000_data *data) data->rev = (ret >> 8) & 0xf; data->ps_int = 0; + data->als_int = 0; data->vcnl4200_al.reg = VCNL4200_AL_DATA; data->vcnl4200_ps.reg = VCNL4200_PS_DATA; @@ -317,16 +377,15 @@ static int vcnl4200_init(struct vcnl4000_data *data) data->vcnl4200_al.sampling_rate = ktime_set(0, 60000 * 1000); /* Default wait time is 4.8ms, add 20% tolerance. */ data->vcnl4200_ps.sampling_rate = ktime_set(0, 5760 * 1000); - data->al_scale = 24000; break; case VCNL4040_PROD_ID: /* Default wait time is 80ms, add 20% tolerance. */ data->vcnl4200_al.sampling_rate = ktime_set(0, 96000 * 1000); /* Default wait time is 5ms, add 20% tolerance. */ data->vcnl4200_ps.sampling_rate = ktime_set(0, 6000 * 1000); - data->al_scale = 120000; break; } + data->al_scale = data->chip_spec->ulux_step; mutex_init(&data->vcnl4200_al.lock); mutex_init(&data->vcnl4200_ps.lock); @@ -496,6 +555,60 @@ static int vcnl4000_set_pm_runtime_state(struct vcnl4000_data *data, bool on) return ret; } +static int vcnl4040_read_als_it(struct vcnl4000_data *data, int *val, int *val2) +{ + int ret; + + ret = i2c_smbus_read_word_data(data->client, VCNL4200_AL_CONF); + if (ret < 0) + return ret; + + ret = FIELD_GET(VCNL4040_ALS_CONF_IT, ret); + if (ret >= data->chip_spec->num_als_it_times) + return -EINVAL; + + *val = (*data->chip_spec->als_it_times)[ret][0]; + *val2 = (*data->chip_spec->als_it_times)[ret][1]; + + return 0; +} + +static ssize_t vcnl4040_write_als_it(struct vcnl4000_data *data, int val) +{ + unsigned int i; + int ret; + u16 regval; + + for (i = 0; i < data->chip_spec->num_als_it_times; i++) { + if (val == (*data->chip_spec->als_it_times)[i][1]) + break; + } + + if (i == data->chip_spec->num_als_it_times) + return -EINVAL; + + data->vcnl4200_al.sampling_rate = ktime_set(0, val * 1200); + data->al_scale = div_u64(mul_u32_u32(data->chip_spec->ulux_step, + (*data->chip_spec->als_it_times)[0][1]), + val); + + mutex_lock(&data->vcnl4000_lock); + + ret = i2c_smbus_read_word_data(data->client, VCNL4200_AL_CONF); + if (ret < 0) + goto out_unlock; + + regval = FIELD_PREP(VCNL4040_ALS_CONF_IT, i); + regval |= (ret & ~VCNL4040_ALS_CONF_IT); + ret = i2c_smbus_write_word_data(data->client, + VCNL4200_AL_CONF, + regval); + +out_unlock: + mutex_unlock(&data->vcnl4000_lock); + return ret; +} + static int vcnl4040_read_ps_it(struct vcnl4000_data *data, int *val, int *val2) { int ret; @@ -506,11 +619,11 @@ static int vcnl4040_read_ps_it(struct vcnl4000_data *data, int *val, int *val2) ret = FIELD_GET(VCNL4040_PS_CONF2_PS_IT, ret); - if (ret >= ARRAY_SIZE(vcnl4040_ps_it_times)) + if (ret >= data->chip_spec->num_ps_it_times) return -EINVAL; - *val = vcnl4040_ps_it_times[ret][0]; - *val2 = vcnl4040_ps_it_times[ret][1]; + *val = (*data->chip_spec->ps_it_times)[ret][0]; + *val2 = (*data->chip_spec->ps_it_times)[ret][1]; return 0; } @@ -521,8 +634,8 @@ static ssize_t vcnl4040_write_ps_it(struct vcnl4000_data *data, int val) int ret, index = -1; u16 regval; - for (i = 0; i < ARRAY_SIZE(vcnl4040_ps_it_times); i++) { - if (val == vcnl4040_ps_it_times[i][1]) { + for (i = 0; i < data->chip_spec->num_ps_it_times; i++) { + if (val == (*data->chip_spec->ps_it_times)[i][1]) { index = i; break; } @@ -531,6 +644,8 @@ static ssize_t vcnl4040_write_ps_it(struct vcnl4000_data *data, int val) if (index < 0) return -EINVAL; + data->vcnl4200_ps.sampling_rate = ktime_set(0, val * 60 * NSEC_PER_USEC); + mutex_lock(&data->vcnl4000_lock); ret = i2c_smbus_read_word_data(data->client, VCNL4200_PS_CONF1); @@ -547,6 +662,224 @@ out: return ret; } +static ssize_t vcnl4040_read_als_period(struct vcnl4000_data *data, int *val, int *val2) +{ + int ret, ret_pers, it; + int64_t val_c; + + ret = i2c_smbus_read_word_data(data->client, VCNL4200_AL_CONF); + if (ret < 0) + return ret; + + ret_pers = FIELD_GET(VCNL4040_ALS_CONF_PERS, ret); + if (ret_pers >= ARRAY_SIZE(vcnl4040_als_persistence)) + return -EINVAL; + + it = FIELD_GET(VCNL4040_ALS_CONF_IT, ret); + if (it >= data->chip_spec->num_als_it_times) + return -EINVAL; + + val_c = mul_u32_u32((*data->chip_spec->als_it_times)[it][1], + vcnl4040_als_persistence[ret_pers]); + *val = div_u64_rem(val_c, MICRO, val2); + + return IIO_VAL_INT_PLUS_MICRO; +} + +static ssize_t vcnl4040_write_als_period(struct vcnl4000_data *data, int val, int val2) +{ + unsigned int i; + int ret, it; + u16 regval; + u64 val_n = mul_u32_u32(val, MICRO) + val2; + + ret = i2c_smbus_read_word_data(data->client, VCNL4200_AL_CONF); + if (ret < 0) + return ret; + + it = FIELD_GET(VCNL4040_ALS_CONF_IT, ret); + if (it >= data->chip_spec->num_als_it_times) + return -EINVAL; + + for (i = 0; i < ARRAY_SIZE(vcnl4040_als_persistence) - 1; i++) { + if (val_n < mul_u32_u32(vcnl4040_als_persistence[i], + (*data->chip_spec->als_it_times)[it][1])) + break; + } + + mutex_lock(&data->vcnl4000_lock); + + ret = i2c_smbus_read_word_data(data->client, VCNL4200_AL_CONF); + if (ret < 0) + goto out_unlock; + + regval = FIELD_PREP(VCNL4040_ALS_CONF_PERS, i); + regval |= (ret & ~VCNL4040_ALS_CONF_PERS); + ret = i2c_smbus_write_word_data(data->client, VCNL4200_AL_CONF, + regval); + +out_unlock: + mutex_unlock(&data->vcnl4000_lock); + return ret; +} + +static ssize_t vcnl4040_read_ps_period(struct vcnl4000_data *data, int *val, int *val2) +{ + int ret, ret_pers, it; + + ret = i2c_smbus_read_word_data(data->client, VCNL4200_PS_CONF1); + if (ret < 0) + return ret; + + ret_pers = FIELD_GET(VCNL4040_CONF1_PS_PERS, ret); + if (ret_pers >= ARRAY_SIZE(vcnl4040_ps_persistence)) + return -EINVAL; + + it = FIELD_GET(VCNL4040_PS_CONF2_PS_IT, ret); + if (it >= data->chip_spec->num_ps_it_times) + return -EINVAL; + + *val = (*data->chip_spec->ps_it_times)[it][0]; + *val2 = (*data->chip_spec->ps_it_times)[it][1] * + vcnl4040_ps_persistence[ret_pers]; + + return IIO_VAL_INT_PLUS_MICRO; +} + +static ssize_t vcnl4040_write_ps_period(struct vcnl4000_data *data, int val, int val2) +{ + int ret, it, i; + u16 regval; + + ret = i2c_smbus_read_word_data(data->client, VCNL4200_PS_CONF1); + if (ret < 0) + return ret; + + it = FIELD_GET(VCNL4040_PS_CONF2_PS_IT, ret); + if (it >= data->chip_spec->num_ps_it_times) + return -EINVAL; + + if (val > 0) + i = ARRAY_SIZE(vcnl4040_ps_persistence) - 1; + else { + for (i = 0; i < ARRAY_SIZE(vcnl4040_ps_persistence) - 1; i++) { + if (val2 <= vcnl4040_ps_persistence[i] * + (*data->chip_spec->ps_it_times)[it][1]) + break; + } + } + + mutex_lock(&data->vcnl4000_lock); + + ret = i2c_smbus_read_word_data(data->client, VCNL4200_PS_CONF1); + if (ret < 0) + goto out_unlock; + + regval = FIELD_PREP(VCNL4040_CONF1_PS_PERS, i); + regval |= (ret & ~VCNL4040_CONF1_PS_PERS); + ret = i2c_smbus_write_word_data(data->client, VCNL4200_PS_CONF1, + regval); + +out_unlock: + mutex_unlock(&data->vcnl4000_lock); + return ret; +} + +static ssize_t vcnl4040_read_ps_oversampling_ratio(struct vcnl4000_data *data, int *val) +{ + int ret; + + ret = i2c_smbus_read_word_data(data->client, VCNL4200_PS_CONF3); + if (ret < 0) + return ret; + + ret = FIELD_GET(VCNL4040_PS_CONF3_MPS, ret); + if (ret >= ARRAY_SIZE(vcnl4040_ps_oversampling_ratio)) + return -EINVAL; + + *val = vcnl4040_ps_oversampling_ratio[ret]; + + return ret; +} + +static ssize_t vcnl4040_write_ps_oversampling_ratio(struct vcnl4000_data *data, int val) +{ + unsigned int i; + int ret; + u16 regval; + + for (i = 0; i < ARRAY_SIZE(vcnl4040_ps_oversampling_ratio); i++) { + if (val == vcnl4040_ps_oversampling_ratio[i]) + break; + } + + if (i >= ARRAY_SIZE(vcnl4040_ps_oversampling_ratio)) + return -EINVAL; + + mutex_lock(&data->vcnl4000_lock); + + ret = i2c_smbus_read_word_data(data->client, VCNL4200_PS_CONF3); + if (ret < 0) + goto out_unlock; + + regval = FIELD_PREP(VCNL4040_PS_CONF3_MPS, i); + regval |= (ret & ~VCNL4040_PS_CONF3_MPS); + ret = i2c_smbus_write_word_data(data->client, VCNL4200_PS_CONF3, + regval); + +out_unlock: + mutex_unlock(&data->vcnl4000_lock); + return ret; +} + +static ssize_t vcnl4040_read_ps_calibbias(struct vcnl4000_data *data, int *val, int *val2) +{ + int ret; + + ret = i2c_smbus_read_word_data(data->client, VCNL4200_PS_CONF3); + if (ret < 0) + return ret; + + ret = FIELD_GET(VCNL4040_PS_MS_LED_I, ret); + if (ret >= ARRAY_SIZE(vcnl4040_ps_calibbias_ua)) + return -EINVAL; + + *val = vcnl4040_ps_calibbias_ua[ret][0]; + *val2 = vcnl4040_ps_calibbias_ua[ret][1]; + + return ret; +} + +static ssize_t vcnl4040_write_ps_calibbias(struct vcnl4000_data *data, int val) +{ + unsigned int i; + int ret; + u16 regval; + + for (i = 0; i < ARRAY_SIZE(vcnl4040_ps_calibbias_ua); i++) { + if (val == vcnl4040_ps_calibbias_ua[i][1]) + break; + } + + if (i >= ARRAY_SIZE(vcnl4040_ps_calibbias_ua)) + return -EINVAL; + + mutex_lock(&data->vcnl4000_lock); + + ret = i2c_smbus_read_word_data(data->client, VCNL4200_PS_CONF3); + if (ret < 0) + goto out_unlock; + + regval = (ret & ~VCNL4040_PS_MS_LED_I); + regval |= FIELD_PREP(VCNL4040_PS_MS_LED_I, i); + ret = i2c_smbus_write_word_data(data->client, VCNL4200_PS_CONF3, + regval); + +out_unlock: + mutex_unlock(&data->vcnl4000_lock); + return ret; +} + static int vcnl4000_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long mask) @@ -584,12 +917,39 @@ static int vcnl4000_read_raw(struct iio_dev *indio_dev, *val2 = data->al_scale; return IIO_VAL_INT_PLUS_MICRO; case IIO_CHAN_INFO_INT_TIME: - if (chan->type != IIO_PROXIMITY) + switch (chan->type) { + case IIO_LIGHT: + ret = vcnl4040_read_als_it(data, val, val2); + break; + case IIO_PROXIMITY: + ret = vcnl4040_read_ps_it(data, val, val2); + break; + default: return -EINVAL; - ret = vcnl4040_read_ps_it(data, val, val2); + } if (ret < 0) return ret; return IIO_VAL_INT_PLUS_MICRO; + case IIO_CHAN_INFO_OVERSAMPLING_RATIO: + switch (chan->type) { + case IIO_PROXIMITY: + ret = vcnl4040_read_ps_oversampling_ratio(data, val); + if (ret < 0) + return ret; + return IIO_VAL_INT; + default: + return -EINVAL; + } + case IIO_CHAN_INFO_CALIBBIAS: + switch (chan->type) { + case IIO_PROXIMITY: + ret = vcnl4040_read_ps_calibbias(data, val, val2); + if (ret < 0) + return ret; + return IIO_VAL_INT_PLUS_MICRO; + default: + return -EINVAL; + } default: return -EINVAL; } @@ -605,9 +965,28 @@ static int vcnl4040_write_raw(struct iio_dev *indio_dev, case IIO_CHAN_INFO_INT_TIME: if (val != 0) return -EINVAL; - if (chan->type != IIO_PROXIMITY) + switch (chan->type) { + case IIO_LIGHT: + return vcnl4040_write_als_it(data, val2); + case IIO_PROXIMITY: + return vcnl4040_write_ps_it(data, val2); + default: return -EINVAL; - return vcnl4040_write_ps_it(data, val2); + } + case IIO_CHAN_INFO_OVERSAMPLING_RATIO: + switch (chan->type) { + case IIO_PROXIMITY: + return vcnl4040_write_ps_oversampling_ratio(data, val); + default: + return -EINVAL; + } + case IIO_CHAN_INFO_CALIBBIAS: + switch (chan->type) { + case IIO_PROXIMITY: + return vcnl4040_write_ps_calibbias(data, val2); + default: + return -EINVAL; + } default: return -EINVAL; } @@ -618,12 +997,44 @@ static int vcnl4040_read_avail(struct iio_dev *indio_dev, const int **vals, int *type, int *length, long mask) { + struct vcnl4000_data *data = iio_priv(indio_dev); + switch (mask) { case IIO_CHAN_INFO_INT_TIME: - *vals = (int *)vcnl4040_ps_it_times; + switch (chan->type) { + case IIO_LIGHT: + *vals = (int *)(*data->chip_spec->als_it_times); + *length = 2 * data->chip_spec->num_als_it_times; + break; + case IIO_PROXIMITY: + *vals = (int *)(*data->chip_spec->ps_it_times); + *length = 2 * data->chip_spec->num_ps_it_times; + break; + default: + return -EINVAL; + } *type = IIO_VAL_INT_PLUS_MICRO; - *length = 2 * ARRAY_SIZE(vcnl4040_ps_it_times); return IIO_AVAIL_LIST; + case IIO_CHAN_INFO_OVERSAMPLING_RATIO: + switch (chan->type) { + case IIO_PROXIMITY: + *vals = (int *)vcnl4040_ps_oversampling_ratio; + *length = ARRAY_SIZE(vcnl4040_ps_oversampling_ratio); + *type = IIO_VAL_INT; + return IIO_AVAIL_LIST; + default: + return -EINVAL; + } + case IIO_CHAN_INFO_CALIBBIAS: + switch (chan->type) { + case IIO_PROXIMITY: + *vals = (int *)vcnl4040_ps_calibbias_ua; + *length = 2 * ARRAY_SIZE(vcnl4040_ps_calibbias_ua); + *type = IIO_VAL_INT_PLUS_MICRO; + return IIO_AVAIL_LIST; + default: + return -EINVAL; + } default: return -EINVAL; } @@ -818,24 +1229,58 @@ static int vcnl4040_read_event(struct iio_dev *indio_dev, int ret; struct vcnl4000_data *data = iio_priv(indio_dev); - switch (dir) { - case IIO_EV_DIR_RISING: - ret = i2c_smbus_read_word_data(data->client, - VCNL4040_PS_THDH_LM); - if (ret < 0) - return ret; - *val = ret; - return IIO_VAL_INT; - case IIO_EV_DIR_FALLING: - ret = i2c_smbus_read_word_data(data->client, - VCNL4040_PS_THDL_LM); - if (ret < 0) - return ret; - *val = ret; - return IIO_VAL_INT; + switch (chan->type) { + case IIO_LIGHT: + switch (info) { + case IIO_EV_INFO_PERIOD: + return vcnl4040_read_als_period(data, val, val2); + case IIO_EV_INFO_VALUE: + switch (dir) { + case IIO_EV_DIR_RISING: + ret = i2c_smbus_read_word_data(data->client, + VCNL4040_ALS_THDH_LM); + break; + case IIO_EV_DIR_FALLING: + ret = i2c_smbus_read_word_data(data->client, + VCNL4040_ALS_THDL_LM); + break; + default: + return -EINVAL; + } + break; + default: + return -EINVAL; + } + break; + case IIO_PROXIMITY: + switch (info) { + case IIO_EV_INFO_PERIOD: + return vcnl4040_read_ps_period(data, val, val2); + case IIO_EV_INFO_VALUE: + switch (dir) { + case IIO_EV_DIR_RISING: + ret = i2c_smbus_read_word_data(data->client, + VCNL4040_PS_THDH_LM); + break; + case IIO_EV_DIR_FALLING: + ret = i2c_smbus_read_word_data(data->client, + VCNL4040_PS_THDL_LM); + break; + default: + return -EINVAL; + } + break; + default: + return -EINVAL; + } + break; default: return -EINVAL; } + if (ret < 0) + return ret; + *val = ret; + return IIO_VAL_INT; } static int vcnl4040_write_event(struct iio_dev *indio_dev, @@ -848,22 +1293,61 @@ static int vcnl4040_write_event(struct iio_dev *indio_dev, int ret; struct vcnl4000_data *data = iio_priv(indio_dev); - switch (dir) { - case IIO_EV_DIR_RISING: - ret = i2c_smbus_write_word_data(data->client, - VCNL4040_PS_THDH_LM, val); - if (ret < 0) - return ret; - return IIO_VAL_INT; - case IIO_EV_DIR_FALLING: - ret = i2c_smbus_write_word_data(data->client, - VCNL4040_PS_THDL_LM, val); - if (ret < 0) - return ret; - return IIO_VAL_INT; + switch (chan->type) { + case IIO_LIGHT: + switch (info) { + case IIO_EV_INFO_PERIOD: + return vcnl4040_write_als_period(data, val, val2); + case IIO_EV_INFO_VALUE: + switch (dir) { + case IIO_EV_DIR_RISING: + ret = i2c_smbus_write_word_data(data->client, + VCNL4040_ALS_THDH_LM, + val); + break; + case IIO_EV_DIR_FALLING: + ret = i2c_smbus_write_word_data(data->client, + VCNL4040_ALS_THDL_LM, + val); + break; + default: + return -EINVAL; + } + break; + default: + return -EINVAL; + } + break; + case IIO_PROXIMITY: + switch (info) { + case IIO_EV_INFO_PERIOD: + return vcnl4040_write_ps_period(data, val, val2); + case IIO_EV_INFO_VALUE: + switch (dir) { + case IIO_EV_DIR_RISING: + ret = i2c_smbus_write_word_data(data->client, + VCNL4040_PS_THDH_LM, + val); + break; + case IIO_EV_DIR_FALLING: + ret = i2c_smbus_write_word_data(data->client, + VCNL4040_PS_THDL_LM, + val); + break; + default: + return -EINVAL; + } + break; + default: + return -EINVAL; + } + break; default: return -EINVAL; } + if (ret < 0) + return ret; + return IIO_VAL_INT; } static bool vcnl4010_is_thr_enabled(struct vcnl4000_data *data) @@ -956,15 +1440,28 @@ static int vcnl4040_read_event_config(struct iio_dev *indio_dev, int ret; struct vcnl4000_data *data = iio_priv(indio_dev); - ret = i2c_smbus_read_word_data(data->client, VCNL4200_PS_CONF1); - if (ret < 0) - return ret; + switch (chan->type) { + case IIO_LIGHT: + ret = i2c_smbus_read_word_data(data->client, VCNL4200_AL_CONF); + if (ret < 0) + return ret; - data->ps_int = FIELD_GET(VCNL4040_PS_CONF2_PS_INT, ret); + data->als_int = FIELD_GET(VCNL4040_ALS_CONF_INT_EN, ret); - return (dir == IIO_EV_DIR_RISING) ? - FIELD_GET(VCNL4040_PS_IF_AWAY, ret) : - FIELD_GET(VCNL4040_PS_IF_CLOSE, ret); + return data->als_int; + case IIO_PROXIMITY: + ret = i2c_smbus_read_word_data(data->client, VCNL4200_PS_CONF1); + if (ret < 0) + return ret; + + data->ps_int = FIELD_GET(VCNL4040_PS_CONF2_PS_INT, ret); + + return (dir == IIO_EV_DIR_RISING) ? + FIELD_GET(VCNL4040_PS_IF_AWAY, ret) : + FIELD_GET(VCNL4040_PS_IF_CLOSE, ret); + default: + return -EINVAL; + } } static int vcnl4040_write_event_config(struct iio_dev *indio_dev, @@ -972,29 +1469,51 @@ static int vcnl4040_write_event_config(struct iio_dev *indio_dev, enum iio_event_type type, enum iio_event_direction dir, int state) { - int ret; + int ret = -EINVAL; u16 val, mask; struct vcnl4000_data *data = iio_priv(indio_dev); mutex_lock(&data->vcnl4000_lock); - ret = i2c_smbus_read_word_data(data->client, VCNL4200_PS_CONF1); - if (ret < 0) - goto out; + switch (chan->type) { + case IIO_LIGHT: + ret = i2c_smbus_read_word_data(data->client, VCNL4200_AL_CONF); + if (ret < 0) + goto out; - if (dir == IIO_EV_DIR_RISING) - mask = VCNL4040_PS_IF_AWAY; - else - mask = VCNL4040_PS_IF_CLOSE; + mask = VCNL4040_ALS_CONF_INT_EN; + if (state) + val = (ret | mask); + else + val = (ret & ~mask); - val = state ? (ret | mask) : (ret & ~mask); + data->als_int = FIELD_GET(VCNL4040_ALS_CONF_INT_EN, val); + ret = i2c_smbus_write_word_data(data->client, VCNL4200_AL_CONF, + val); + break; + case IIO_PROXIMITY: + ret = i2c_smbus_read_word_data(data->client, VCNL4200_PS_CONF1); + if (ret < 0) + goto out; - data->ps_int = FIELD_GET(VCNL4040_PS_CONF2_PS_INT, val); - ret = i2c_smbus_write_word_data(data->client, VCNL4200_PS_CONF1, val); + if (dir == IIO_EV_DIR_RISING) + mask = VCNL4040_PS_IF_AWAY; + else + mask = VCNL4040_PS_IF_CLOSE; + + val = state ? (ret | mask) : (ret & ~mask); + + data->ps_int = FIELD_GET(VCNL4040_PS_CONF2_PS_INT, val); + ret = i2c_smbus_write_word_data(data->client, VCNL4200_PS_CONF1, + val); + break; + default: + break; + } out: mutex_unlock(&data->vcnl4000_lock); - data->chip_spec->set_power_state(data, data->ps_int != 0); + data->chip_spec->set_power_state(data, data->ps_int || data->als_int); return ret; } @@ -1005,7 +1524,7 @@ static irqreturn_t vcnl4040_irq_thread(int irq, void *p) struct vcnl4000_data *data = iio_priv(indio_dev); int ret; - ret = i2c_smbus_read_word_data(data->client, VCNL4040_INT_FLAGS); + ret = i2c_smbus_read_word_data(data->client, data->chip_spec->int_reg); if (ret < 0) return IRQ_HANDLED; @@ -1025,6 +1544,22 @@ static irqreturn_t vcnl4040_irq_thread(int irq, void *p) iio_get_time_ns(indio_dev)); } + if (ret & VCNL4040_ALS_FALLING) { + iio_push_event(indio_dev, + IIO_UNMOD_EVENT_CODE(IIO_LIGHT, 0, + IIO_EV_TYPE_THRESH, + IIO_EV_DIR_FALLING), + iio_get_time_ns(indio_dev)); + } + + if (ret & VCNL4040_ALS_RISING) { + iio_push_event(indio_dev, + IIO_UNMOD_EVENT_CODE(IIO_LIGHT, 0, + IIO_EV_TYPE_THRESH, + IIO_EV_DIR_RISING), + iio_get_time_ns(indio_dev)); + } + return IRQ_HANDLED; } @@ -1191,6 +1726,22 @@ static const struct iio_event_spec vcnl4000_event_spec[] = { } }; +static const struct iio_event_spec vcnl4040_als_event_spec[] = { + { + .type = IIO_EV_TYPE_THRESH, + .dir = IIO_EV_DIR_RISING, + .mask_separate = BIT(IIO_EV_INFO_VALUE), + }, { + .type = IIO_EV_TYPE_THRESH, + .dir = IIO_EV_DIR_FALLING, + .mask_separate = BIT(IIO_EV_INFO_VALUE), + }, { + .type = IIO_EV_TYPE_THRESH, + .dir = IIO_EV_DIR_EITHER, + .mask_separate = BIT(IIO_EV_INFO_ENABLE) | BIT(IIO_EV_INFO_PERIOD), + }, +}; + static const struct iio_event_spec vcnl4040_event_spec[] = { { .type = IIO_EV_TYPE_THRESH, @@ -1200,6 +1751,10 @@ static const struct iio_event_spec vcnl4040_event_spec[] = { .type = IIO_EV_TYPE_THRESH, .dir = IIO_EV_DIR_FALLING, .mask_separate = BIT(IIO_EV_INFO_VALUE) | BIT(IIO_EV_INFO_ENABLE), + }, { + .type = IIO_EV_TYPE_THRESH, + .dir = IIO_EV_DIR_EITHER, + .mask_separate = BIT(IIO_EV_INFO_PERIOD), }, }; @@ -1244,12 +1799,20 @@ static const struct iio_chan_spec vcnl4040_channels[] = { { .type = IIO_LIGHT, .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | - BIT(IIO_CHAN_INFO_SCALE), + BIT(IIO_CHAN_INFO_SCALE) | + BIT(IIO_CHAN_INFO_INT_TIME), + .info_mask_separate_available = BIT(IIO_CHAN_INFO_INT_TIME), + .event_spec = vcnl4040_als_event_spec, + .num_event_specs = ARRAY_SIZE(vcnl4040_als_event_spec), }, { .type = IIO_PROXIMITY, .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | - BIT(IIO_CHAN_INFO_INT_TIME), - .info_mask_separate_available = BIT(IIO_CHAN_INFO_INT_TIME), + BIT(IIO_CHAN_INFO_INT_TIME) | + BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO) | + BIT(IIO_CHAN_INFO_CALIBBIAS), + .info_mask_separate_available = BIT(IIO_CHAN_INFO_INT_TIME) | + BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO) | + BIT(IIO_CHAN_INFO_CALIBBIAS), .ext_info = vcnl4000_ext_info, .event_spec = vcnl4040_event_spec, .num_event_specs = ARRAY_SIZE(vcnl4040_event_spec), @@ -1314,6 +1877,12 @@ static const struct vcnl4000_chip_spec vcnl4000_chip_spec_cfg[] = { .num_channels = ARRAY_SIZE(vcnl4040_channels), .info = &vcnl4040_info, .irq_thread = vcnl4040_irq_thread, + .int_reg = VCNL4040_INT_FLAGS, + .ps_it_times = &vcnl4040_ps_it_times, + .num_ps_it_times = ARRAY_SIZE(vcnl4040_ps_it_times), + .als_it_times = &vcnl4040_als_it_times, + .num_als_it_times = ARRAY_SIZE(vcnl4040_als_it_times), + .ulux_step = 100000, }, [VCNL4200] = { .prod = "VCNL4200", @@ -1321,9 +1890,16 @@ static const struct vcnl4000_chip_spec vcnl4000_chip_spec_cfg[] = { .measure_light = vcnl4200_measure_light, .measure_proximity = vcnl4200_measure_proximity, .set_power_state = vcnl4200_set_power_state, - .channels = vcnl4000_channels, + .channels = vcnl4040_channels, .num_channels = ARRAY_SIZE(vcnl4000_channels), - .info = &vcnl4000_info, + .info = &vcnl4040_info, + .irq_thread = vcnl4040_irq_thread, + .int_reg = VCNL4200_INT_FLAGS, + .ps_it_times = &vcnl4200_ps_it_times, + .num_ps_it_times = ARRAY_SIZE(vcnl4200_ps_it_times), + .als_it_times = &vcnl4200_als_it_times, + .num_als_it_times = ARRAY_SIZE(vcnl4200_als_it_times), + .ulux_step = 24000, }, }; diff --git a/drivers/iio/potentiometer/mcp4018.c b/drivers/iio/potentiometer/mcp4018.c index 89daecc90305..44678d372126 100644 --- a/drivers/iio/potentiometer/mcp4018.c +++ b/drivers/iio/potentiometer/mcp4018.c @@ -99,20 +99,25 @@ static const struct iio_info mcp4018_info = { .write_raw = mcp4018_write_raw, }; +#define MCP4018_ID_TABLE(_name, cfg) { \ + .name = _name, \ + .driver_data = (kernel_ulong_t)&mcp4018_cfg[cfg], \ +} + static const struct i2c_device_id mcp4018_id[] = { - { "mcp4017-502", MCP4018_502 }, - { "mcp4017-103", MCP4018_103 }, - { "mcp4017-503", MCP4018_503 }, - { "mcp4017-104", MCP4018_104 }, - { "mcp4018-502", MCP4018_502 }, - { "mcp4018-103", MCP4018_103 }, - { "mcp4018-503", MCP4018_503 }, - { "mcp4018-104", MCP4018_104 }, - { "mcp4019-502", MCP4018_502 }, - { "mcp4019-103", MCP4018_103 }, - { "mcp4019-503", MCP4018_503 }, - { "mcp4019-104", MCP4018_104 }, - {} + MCP4018_ID_TABLE("mcp4017-502", MCP4018_502), + MCP4018_ID_TABLE("mcp4017-103", MCP4018_103), + MCP4018_ID_TABLE("mcp4017-503", MCP4018_503), + MCP4018_ID_TABLE("mcp4017-104", MCP4018_104), + MCP4018_ID_TABLE("mcp4018-502", MCP4018_502), + MCP4018_ID_TABLE("mcp4018-103", MCP4018_103), + MCP4018_ID_TABLE("mcp4018-503", MCP4018_503), + MCP4018_ID_TABLE("mcp4018-104", MCP4018_104), + MCP4018_ID_TABLE("mcp4019-502", MCP4018_502), + MCP4018_ID_TABLE("mcp4019-103", MCP4018_103), + MCP4018_ID_TABLE("mcp4019-503", MCP4018_503), + MCP4018_ID_TABLE("mcp4019-104", MCP4018_104), + { /* sentinel */ } }; MODULE_DEVICE_TABLE(i2c, mcp4018_id); @@ -157,9 +162,7 @@ static int mcp4018_probe(struct i2c_client *client) i2c_set_clientdata(client, indio_dev); data->client = client; - data->cfg = device_get_match_data(dev); - if (!data->cfg) - data->cfg = &mcp4018_cfg[i2c_match_id(mcp4018_id, client)->driver_data]; + data->cfg = i2c_get_match_data(client); indio_dev->info = &mcp4018_info; indio_dev->channels = &mcp4018_channel; diff --git a/drivers/iio/potentiometer/mcp4531.c b/drivers/iio/potentiometer/mcp4531.c index c513c00c8243..f28880ebd758 100644 --- a/drivers/iio/potentiometer/mcp4531.c +++ b/drivers/iio/potentiometer/mcp4531.c @@ -206,72 +206,77 @@ static const struct iio_info mcp4531_info = { .write_raw = mcp4531_write_raw, }; +#define MCP4531_ID_TABLE(_name, cfg) { \ + .name = _name, \ + .driver_data = (kernel_ulong_t)&mcp4531_cfg[cfg], \ +} + static const struct i2c_device_id mcp4531_id[] = { - { "mcp4531-502", MCP453x_502 }, - { "mcp4531-103", MCP453x_103 }, - { "mcp4531-503", MCP453x_503 }, - { "mcp4531-104", MCP453x_104 }, - { "mcp4532-502", MCP453x_502 }, - { "mcp4532-103", MCP453x_103 }, - { "mcp4532-503", MCP453x_503 }, - { "mcp4532-104", MCP453x_104 }, - { "mcp4541-502", MCP454x_502 }, - { "mcp4541-103", MCP454x_103 }, - { "mcp4541-503", MCP454x_503 }, - { "mcp4541-104", MCP454x_104 }, - { "mcp4542-502", MCP454x_502 }, - { "mcp4542-103", MCP454x_103 }, - { "mcp4542-503", MCP454x_503 }, - { "mcp4542-104", MCP454x_104 }, - { "mcp4551-502", MCP455x_502 }, - { "mcp4551-103", MCP455x_103 }, - { "mcp4551-503", MCP455x_503 }, - { "mcp4551-104", MCP455x_104 }, - { "mcp4552-502", MCP455x_502 }, - { "mcp4552-103", MCP455x_103 }, - { "mcp4552-503", MCP455x_503 }, - { "mcp4552-104", MCP455x_104 }, - { "mcp4561-502", MCP456x_502 }, - { "mcp4561-103", MCP456x_103 }, - { "mcp4561-503", MCP456x_503 }, - { "mcp4561-104", MCP456x_104 }, - { "mcp4562-502", MCP456x_502 }, - { "mcp4562-103", MCP456x_103 }, - { "mcp4562-503", MCP456x_503 }, - { "mcp4562-104", MCP456x_104 }, - { "mcp4631-502", MCP463x_502 }, - { "mcp4631-103", MCP463x_103 }, - { "mcp4631-503", MCP463x_503 }, - { "mcp4631-104", MCP463x_104 }, - { "mcp4632-502", MCP463x_502 }, - { "mcp4632-103", MCP463x_103 }, - { "mcp4632-503", MCP463x_503 }, - { "mcp4632-104", MCP463x_104 }, - { "mcp4641-502", MCP464x_502 }, - { "mcp4641-103", MCP464x_103 }, - { "mcp4641-503", MCP464x_503 }, - { "mcp4641-104", MCP464x_104 }, - { "mcp4642-502", MCP464x_502 }, - { "mcp4642-103", MCP464x_103 }, - { "mcp4642-503", MCP464x_503 }, - { "mcp4642-104", MCP464x_104 }, - { "mcp4651-502", MCP465x_502 }, - { "mcp4651-103", MCP465x_103 }, - { "mcp4651-503", MCP465x_503 }, - { "mcp4651-104", MCP465x_104 }, - { "mcp4652-502", MCP465x_502 }, - { "mcp4652-103", MCP465x_103 }, - { "mcp4652-503", MCP465x_503 }, - { "mcp4652-104", MCP465x_104 }, - { "mcp4661-502", MCP466x_502 }, - { "mcp4661-103", MCP466x_103 }, - { "mcp4661-503", MCP466x_503 }, - { "mcp4661-104", MCP466x_104 }, - { "mcp4662-502", MCP466x_502 }, - { "mcp4662-103", MCP466x_103 }, - { "mcp4662-503", MCP466x_503 }, - { "mcp4662-104", MCP466x_104 }, - {} + MCP4531_ID_TABLE("mcp4531-502", MCP453x_502), + MCP4531_ID_TABLE("mcp4531-103", MCP453x_103), + MCP4531_ID_TABLE("mcp4531-503", MCP453x_503), + MCP4531_ID_TABLE("mcp4531-104", MCP453x_104), + MCP4531_ID_TABLE("mcp4532-502", MCP453x_502), + MCP4531_ID_TABLE("mcp4532-103", MCP453x_103), + MCP4531_ID_TABLE("mcp4532-503", MCP453x_503), + MCP4531_ID_TABLE("mcp4532-104", MCP453x_104), + MCP4531_ID_TABLE("mcp4541-502", MCP454x_502), + MCP4531_ID_TABLE("mcp4541-103", MCP454x_103), + MCP4531_ID_TABLE("mcp4541-503", MCP454x_503), + MCP4531_ID_TABLE("mcp4541-104", MCP454x_104), + MCP4531_ID_TABLE("mcp4542-502", MCP454x_502), + MCP4531_ID_TABLE("mcp4542-103", MCP454x_103), + MCP4531_ID_TABLE("mcp4542-503", MCP454x_503), + MCP4531_ID_TABLE("mcp4542-104", MCP454x_104), + MCP4531_ID_TABLE("mcp4551-502", MCP455x_502), + MCP4531_ID_TABLE("mcp4551-103", MCP455x_103), + MCP4531_ID_TABLE("mcp4551-503", MCP455x_503), + MCP4531_ID_TABLE("mcp4551-104", MCP455x_104), + MCP4531_ID_TABLE("mcp4552-502", MCP455x_502), + MCP4531_ID_TABLE("mcp4552-103", MCP455x_103), + MCP4531_ID_TABLE("mcp4552-503", MCP455x_503), + MCP4531_ID_TABLE("mcp4552-104", MCP455x_104), + MCP4531_ID_TABLE("mcp4561-502", MCP456x_502), + MCP4531_ID_TABLE("mcp4561-103", MCP456x_103), + MCP4531_ID_TABLE("mcp4561-503", MCP456x_503), + MCP4531_ID_TABLE("mcp4561-104", MCP456x_104), + MCP4531_ID_TABLE("mcp4562-502", MCP456x_502), + MCP4531_ID_TABLE("mcp4562-103", MCP456x_103), + MCP4531_ID_TABLE("mcp4562-503", MCP456x_503), + MCP4531_ID_TABLE("mcp4562-104", MCP456x_104), + MCP4531_ID_TABLE("mcp4631-502", MCP463x_502), + MCP4531_ID_TABLE("mcp4631-103", MCP463x_103), + MCP4531_ID_TABLE("mcp4631-503", MCP463x_503), + MCP4531_ID_TABLE("mcp4631-104", MCP463x_104), + MCP4531_ID_TABLE("mcp4632-502", MCP463x_502), + MCP4531_ID_TABLE("mcp4632-103", MCP463x_103), + MCP4531_ID_TABLE("mcp4632-503", MCP463x_503), + MCP4531_ID_TABLE("mcp4632-104", MCP463x_104), + MCP4531_ID_TABLE("mcp4641-502", MCP464x_502), + MCP4531_ID_TABLE("mcp4641-103", MCP464x_103), + MCP4531_ID_TABLE("mcp4641-503", MCP464x_503), + MCP4531_ID_TABLE("mcp4641-104", MCP464x_104), + MCP4531_ID_TABLE("mcp4642-502", MCP464x_502), + MCP4531_ID_TABLE("mcp4642-103", MCP464x_103), + MCP4531_ID_TABLE("mcp4642-503", MCP464x_503), + MCP4531_ID_TABLE("mcp4642-104", MCP464x_104), + MCP4531_ID_TABLE("mcp4651-502", MCP465x_502), + MCP4531_ID_TABLE("mcp4651-103", MCP465x_103), + MCP4531_ID_TABLE("mcp4651-503", MCP465x_503), + MCP4531_ID_TABLE("mcp4651-104", MCP465x_104), + MCP4531_ID_TABLE("mcp4652-502", MCP465x_502), + MCP4531_ID_TABLE("mcp4652-103", MCP465x_103), + MCP4531_ID_TABLE("mcp4652-503", MCP465x_503), + MCP4531_ID_TABLE("mcp4652-104", MCP465x_104), + MCP4531_ID_TABLE("mcp4661-502", MCP466x_502), + MCP4531_ID_TABLE("mcp4661-103", MCP466x_103), + MCP4531_ID_TABLE("mcp4661-503", MCP466x_503), + MCP4531_ID_TABLE("mcp4661-104", MCP466x_104), + MCP4531_ID_TABLE("mcp4662-502", MCP466x_502), + MCP4531_ID_TABLE("mcp4662-103", MCP466x_103), + MCP4531_ID_TABLE("mcp4662-503", MCP466x_503), + MCP4531_ID_TABLE("mcp4662-104", MCP466x_104), + { /* sentinel */ } }; MODULE_DEVICE_TABLE(i2c, mcp4531_id); @@ -368,9 +373,7 @@ static int mcp4531_probe(struct i2c_client *client) i2c_set_clientdata(client, indio_dev); data->client = client; - data->cfg = device_get_match_data(dev); - if (!data->cfg) - data->cfg = &mcp4531_cfg[i2c_match_id(mcp4531_id, client)->driver_data]; + data->cfg = i2c_get_match_data(client); indio_dev->info = &mcp4531_info; indio_dev->channels = mcp4531_channels; diff --git a/drivers/iio/proximity/Kconfig b/drivers/iio/proximity/Kconfig index 0e5c17530b8b..2ca3b0bc5eba 100644 --- a/drivers/iio/proximity/Kconfig +++ b/drivers/iio/proximity/Kconfig @@ -32,6 +32,18 @@ config CROS_EC_MKBP_PROXIMITY To compile this driver as a module, choose M here: the module will be called cros_ec_mkbp_proximity. +config IRSD200 + tristate "Murata IRS-D200 PIR sensor" + select IIO_BUFFER + select IIO_TRIGGERED_BUFFER + select REGMAP_I2C + depends on I2C + help + Say Y here to build a driver for the Murata IRS-D200 PIR sensor. + + To compile this driver as a module, choose M here: the module will be + called irsd200. + config ISL29501 tristate "Intersil ISL29501 Time Of Flight sensor" depends on I2C diff --git a/drivers/iio/proximity/Makefile b/drivers/iio/proximity/Makefile index cc838bb5408a..f36598380446 100644 --- a/drivers/iio/proximity/Makefile +++ b/drivers/iio/proximity/Makefile @@ -6,6 +6,7 @@ # When adding new entries keep the list in alphabetical order obj-$(CONFIG_AS3935) += as3935.o obj-$(CONFIG_CROS_EC_MKBP_PROXIMITY) += cros_ec_mkbp_proximity.o +obj-$(CONFIG_IRSD200) += irsd200.o obj-$(CONFIG_ISL29501) += isl29501.o obj-$(CONFIG_LIDAR_LITE_V2) += pulsedlight-lidar-lite-v2.o obj-$(CONFIG_MB1232) += mb1232.o diff --git a/drivers/iio/proximity/irsd200.c b/drivers/iio/proximity/irsd200.c new file mode 100644 index 000000000000..5bd791b46d98 --- /dev/null +++ b/drivers/iio/proximity/irsd200.c @@ -0,0 +1,958 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Driver for Murata IRS-D200 PIR sensor. + * + * Copyright (C) 2023 Axis Communications AB + */ + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#define IRS_DRV_NAME "irsd200" + +/* Registers. */ +#define IRS_REG_OP 0x00 /* Operation mode. */ +#define IRS_REG_DATA_LO 0x02 /* Sensor data LSB. */ +#define IRS_REG_DATA_HI 0x03 /* Sensor data MSB. */ +#define IRS_REG_STATUS 0x04 /* Interrupt status. */ +#define IRS_REG_COUNT 0x05 /* Count of exceeding threshold. */ +#define IRS_REG_DATA_RATE 0x06 /* Output data rate. */ +#define IRS_REG_FILTER 0x07 /* High-pass and low-pass filter. */ +#define IRS_REG_INTR 0x09 /* Interrupt mode. */ +#define IRS_REG_NR_COUNT 0x0a /* Number of counts before interrupt. */ +#define IRS_REG_THR_HI 0x0b /* Upper threshold. */ +#define IRS_REG_THR_LO 0x0c /* Lower threshold. */ +#define IRS_REG_TIMER_LO 0x0d /* Timer setting LSB. */ +#define IRS_REG_TIMER_HI 0x0e /* Timer setting MSB. */ + +/* Interrupt status bits. */ +#define IRS_INTR_DATA 0 /* Data update. */ +#define IRS_INTR_TIMER 1 /* Timer expiration. */ +#define IRS_INTR_COUNT_THR_AND 2 /* Count "AND" threshold. */ +#define IRS_INTR_COUNT_THR_OR 3 /* Count "OR" threshold. */ + +/* Operation states. */ +#define IRS_OP_ACTIVE 0x00 +#define IRS_OP_SLEEP 0x01 + +/* + * Quantization scale value for threshold. Used for conversion from/to register + * value. + */ +#define IRS_THR_QUANT_SCALE 128 + +#define IRS_UPPER_COUNT(count) FIELD_GET(GENMASK(7, 4), count) +#define IRS_LOWER_COUNT(count) FIELD_GET(GENMASK(3, 0), count) + +/* Index corresponds to the value of IRS_REG_DATA_RATE register. */ +static const int irsd200_data_rates[] = { + 50, + 100, +}; + +/* Index corresponds to the (field) value of IRS_REG_FILTER register. */ +static const unsigned int irsd200_lp_filter_freq[] = { + 10, + 7, +}; + +/* + * Index corresponds to the (field) value of IRS_REG_FILTER register. Note that + * this represents a fractional value (e.g the first value corresponds to 3 / 10 + * = 0.3 Hz). + */ +static const unsigned int irsd200_hp_filter_freq[][2] = { + { 3, 10 }, + { 5, 10 }, +}; + +/* Register fields. */ +enum irsd200_regfield { + /* Data interrupt. */ + IRS_REGF_INTR_DATA, + /* Timer interrupt. */ + IRS_REGF_INTR_TIMER, + /* AND count threshold interrupt. */ + IRS_REGF_INTR_COUNT_THR_AND, + /* OR count threshold interrupt. */ + IRS_REGF_INTR_COUNT_THR_OR, + + /* Low-pass filter frequency. */ + IRS_REGF_LP_FILTER, + /* High-pass filter frequency. */ + IRS_REGF_HP_FILTER, + + /* Sentinel value. */ + IRS_REGF_MAX +}; + +static const struct reg_field irsd200_regfields[] = { + [IRS_REGF_INTR_DATA] = + REG_FIELD(IRS_REG_INTR, IRS_INTR_DATA, IRS_INTR_DATA), + [IRS_REGF_INTR_TIMER] = + REG_FIELD(IRS_REG_INTR, IRS_INTR_TIMER, IRS_INTR_TIMER), + [IRS_REGF_INTR_COUNT_THR_AND] = REG_FIELD( + IRS_REG_INTR, IRS_INTR_COUNT_THR_AND, IRS_INTR_COUNT_THR_AND), + [IRS_REGF_INTR_COUNT_THR_OR] = REG_FIELD( + IRS_REG_INTR, IRS_INTR_COUNT_THR_OR, IRS_INTR_COUNT_THR_OR), + + [IRS_REGF_LP_FILTER] = REG_FIELD(IRS_REG_FILTER, 1, 1), + [IRS_REGF_HP_FILTER] = REG_FIELD(IRS_REG_FILTER, 0, 0), +}; + +static const struct regmap_config irsd200_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = IRS_REG_TIMER_HI, +}; + +struct irsd200_data { + struct regmap *regmap; + struct regmap_field *regfields[IRS_REGF_MAX]; + struct device *dev; +}; + +static int irsd200_setup(struct irsd200_data *data) +{ + unsigned int val; + int ret; + + /* Disable all interrupt sources. */ + ret = regmap_write(data->regmap, IRS_REG_INTR, 0); + if (ret) { + dev_err(data->dev, "Could not set interrupt sources (%d)\n", + ret); + return ret; + } + + /* Set operation to active. */ + ret = regmap_write(data->regmap, IRS_REG_OP, IRS_OP_ACTIVE); + if (ret) { + dev_err(data->dev, "Could not set operation mode (%d)\n", ret); + return ret; + } + + /* Clear threshold count. */ + ret = regmap_read(data->regmap, IRS_REG_COUNT, &val); + if (ret) { + dev_err(data->dev, "Could not clear threshold count (%d)\n", + ret); + return ret; + } + + /* Clear status. */ + ret = regmap_write(data->regmap, IRS_REG_STATUS, 0x0f); + if (ret) { + dev_err(data->dev, "Could not clear status (%d)\n", ret); + return ret; + } + + return 0; +} + +static int irsd200_read_threshold(struct irsd200_data *data, + enum iio_event_direction dir, int *val) +{ + unsigned int regval; + unsigned int reg; + int scale; + int ret; + + /* Set quantization scale. */ + if (dir == IIO_EV_DIR_RISING) { + scale = IRS_THR_QUANT_SCALE; + reg = IRS_REG_THR_HI; + } else if (dir == IIO_EV_DIR_FALLING) { + scale = -IRS_THR_QUANT_SCALE; + reg = IRS_REG_THR_LO; + } else { + return -EINVAL; + } + + ret = regmap_read(data->regmap, reg, ®val); + if (ret) { + dev_err(data->dev, "Could not read threshold (%d)\n", ret); + return ret; + } + + *val = ((int)regval) * scale; + + return 0; +} + +static int irsd200_write_threshold(struct irsd200_data *data, + enum iio_event_direction dir, int val) +{ + unsigned int regval; + unsigned int reg; + int scale; + int ret; + + /* Set quantization scale. */ + if (dir == IIO_EV_DIR_RISING) { + if (val < 0) + return -ERANGE; + + scale = IRS_THR_QUANT_SCALE; + reg = IRS_REG_THR_HI; + } else if (dir == IIO_EV_DIR_FALLING) { + if (val > 0) + return -ERANGE; + + scale = -IRS_THR_QUANT_SCALE; + reg = IRS_REG_THR_LO; + } else { + return -EINVAL; + } + + regval = val / scale; + + if (regval >= BIT(8)) + return -ERANGE; + + ret = regmap_write(data->regmap, reg, regval); + if (ret) { + dev_err(data->dev, "Could not write threshold (%d)\n", ret); + return ret; + } + + return 0; +} + +static int irsd200_read_data(struct irsd200_data *data, s16 *val) +{ + __le16 buf; + int ret; + + ret = regmap_bulk_read(data->regmap, IRS_REG_DATA_LO, &buf, + sizeof(buf)); + if (ret) { + dev_err(data->dev, "Could not bulk read data (%d)\n", ret); + return ret; + } + + *val = le16_to_cpu(buf); + + return 0; +} + +static int irsd200_read_data_rate(struct irsd200_data *data, int *val) +{ + unsigned int regval; + int ret; + + ret = regmap_read(data->regmap, IRS_REG_DATA_RATE, ®val); + if (ret) { + dev_err(data->dev, "Could not read data rate (%d)\n", ret); + return ret; + } + + if (regval >= ARRAY_SIZE(irsd200_data_rates)) + return -ERANGE; + + *val = irsd200_data_rates[regval]; + + return 0; +} + +static int irsd200_write_data_rate(struct irsd200_data *data, int val) +{ + size_t idx; + int ret; + + for (idx = 0; idx < ARRAY_SIZE(irsd200_data_rates); ++idx) { + if (irsd200_data_rates[idx] == val) + break; + } + + if (idx == ARRAY_SIZE(irsd200_data_rates)) + return -ERANGE; + + ret = regmap_write(data->regmap, IRS_REG_DATA_RATE, idx); + if (ret) { + dev_err(data->dev, "Could not write data rate (%d)\n", ret); + return ret; + } + + /* + * Data sheet says the device needs 3 seconds of settling time. The + * device operates normally during this period though. This is more of a + * "guarantee" than trying to prevent other user space reads/writes. + */ + ssleep(3); + + return 0; +} + +static int irsd200_read_timer(struct irsd200_data *data, int *val, int *val2) +{ + __le16 buf; + int ret; + + ret = regmap_bulk_read(data->regmap, IRS_REG_TIMER_LO, &buf, + sizeof(buf)); + if (ret) { + dev_err(data->dev, "Could not bulk read timer (%d)\n", ret); + return ret; + } + + ret = irsd200_read_data_rate(data, val2); + if (ret) + return ret; + + *val = le16_to_cpu(buf); + + return 0; +} + +static int irsd200_write_timer(struct irsd200_data *data, int val, int val2) +{ + unsigned int regval; + int data_rate; + __le16 buf; + int ret; + + if (val < 0 || val2 < 0) + return -ERANGE; + + ret = irsd200_read_data_rate(data, &data_rate); + if (ret) + return ret; + + /* Quantize from seconds. */ + regval = val * data_rate + (val2 * data_rate) / 1000000; + + /* Value is 10 bits. */ + if (regval >= BIT(10)) + return -ERANGE; + + buf = cpu_to_le16((u16)regval); + + ret = regmap_bulk_write(data->regmap, IRS_REG_TIMER_LO, &buf, + sizeof(buf)); + if (ret) { + dev_err(data->dev, "Could not bulk write timer (%d)\n", ret); + return ret; + } + + return 0; +} + +static int irsd200_read_nr_count(struct irsd200_data *data, int *val) +{ + unsigned int regval; + int ret; + + ret = regmap_read(data->regmap, IRS_REG_NR_COUNT, ®val); + if (ret) { + dev_err(data->dev, "Could not read nr count (%d)\n", ret); + return ret; + } + + *val = regval; + + return 0; +} + +static int irsd200_write_nr_count(struct irsd200_data *data, int val) +{ + unsigned int regval; + int ret; + + /* A value of zero means that IRS_REG_STATUS is never set. */ + if (val <= 0 || val >= 8) + return -ERANGE; + + regval = val; + + if (regval >= 2) { + /* + * According to the data sheet, timer must be also set in this + * case (i.e. be non-zero). Check and enforce that. + */ + ret = irsd200_read_timer(data, &val, &val); + if (ret) + return ret; + + if (val == 0) { + dev_err(data->dev, + "Timer must be non-zero when nr count is %u\n", + regval); + return -EPERM; + } + } + + ret = regmap_write(data->regmap, IRS_REG_NR_COUNT, regval); + if (ret) { + dev_err(data->dev, "Could not write nr count (%d)\n", ret); + return ret; + } + + return 0; +} + +static int irsd200_read_lp_filter(struct irsd200_data *data, int *val) +{ + unsigned int regval; + int ret; + + ret = regmap_field_read(data->regfields[IRS_REGF_LP_FILTER], ®val); + if (ret) { + dev_err(data->dev, "Could not read lp filter frequency (%d)\n", + ret); + return ret; + } + + *val = irsd200_lp_filter_freq[regval]; + + return 0; +} + +static int irsd200_write_lp_filter(struct irsd200_data *data, int val) +{ + size_t idx; + int ret; + + for (idx = 0; idx < ARRAY_SIZE(irsd200_lp_filter_freq); ++idx) { + if (irsd200_lp_filter_freq[idx] == val) + break; + } + + if (idx == ARRAY_SIZE(irsd200_lp_filter_freq)) + return -ERANGE; + + ret = regmap_field_write(data->regfields[IRS_REGF_LP_FILTER], idx); + if (ret) { + dev_err(data->dev, "Could not write lp filter frequency (%d)\n", + ret); + return ret; + } + + return 0; +} + +static int irsd200_read_hp_filter(struct irsd200_data *data, int *val, + int *val2) +{ + unsigned int regval; + int ret; + + ret = regmap_field_read(data->regfields[IRS_REGF_HP_FILTER], ®val); + if (ret) { + dev_err(data->dev, "Could not read hp filter frequency (%d)\n", + ret); + return ret; + } + + *val = irsd200_hp_filter_freq[regval][0]; + *val2 = irsd200_hp_filter_freq[regval][1]; + + return 0; +} + +static int irsd200_write_hp_filter(struct irsd200_data *data, int val, int val2) +{ + size_t idx; + int ret; + + /* Truncate fractional part to one digit. */ + val2 /= 100000; + + for (idx = 0; idx < ARRAY_SIZE(irsd200_hp_filter_freq); ++idx) { + if (irsd200_hp_filter_freq[idx][0] == val2) + break; + } + + if (idx == ARRAY_SIZE(irsd200_hp_filter_freq) || val != 0) + return -ERANGE; + + ret = regmap_field_write(data->regfields[IRS_REGF_HP_FILTER], idx); + if (ret) { + dev_err(data->dev, "Could not write hp filter frequency (%d)\n", + ret); + return ret; + } + + return 0; +} + +static int irsd200_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, int *val, + int *val2, long mask) +{ + struct irsd200_data *data = iio_priv(indio_dev); + int ret; + s16 buf; + + switch (mask) { + case IIO_CHAN_INFO_RAW: + ret = irsd200_read_data(data, &buf); + if (ret) + return ret; + + *val = buf; + return IIO_VAL_INT; + case IIO_CHAN_INFO_SAMP_FREQ: + ret = irsd200_read_data_rate(data, val); + if (ret) + return ret; + + return IIO_VAL_INT; + case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY: + ret = irsd200_read_lp_filter(data, val); + if (ret) + return ret; + + return IIO_VAL_INT; + case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY: + ret = irsd200_read_hp_filter(data, val, val2); + if (ret) + return ret; + + return IIO_VAL_FRACTIONAL; + default: + return -EINVAL; + } +} + +static int irsd200_read_avail(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + const int **vals, int *type, int *length, + long mask) +{ + switch (mask) { + case IIO_CHAN_INFO_SAMP_FREQ: + *vals = irsd200_data_rates; + *type = IIO_VAL_INT; + *length = ARRAY_SIZE(irsd200_data_rates); + return IIO_AVAIL_LIST; + case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY: + *vals = irsd200_lp_filter_freq; + *type = IIO_VAL_INT; + *length = ARRAY_SIZE(irsd200_lp_filter_freq); + return IIO_AVAIL_LIST; + case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY: + *vals = (int *)irsd200_hp_filter_freq; + *type = IIO_VAL_FRACTIONAL; + *length = 2 * ARRAY_SIZE(irsd200_hp_filter_freq); + return IIO_AVAIL_LIST; + default: + return -EINVAL; + } +} + +static int irsd200_write_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, int val, + int val2, long mask) +{ + struct irsd200_data *data = iio_priv(indio_dev); + + switch (mask) { + case IIO_CHAN_INFO_SAMP_FREQ: + return irsd200_write_data_rate(data, val); + case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY: + return irsd200_write_lp_filter(data, val); + case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY: + return irsd200_write_hp_filter(data, val, val2); + default: + return -EINVAL; + } +} + +static int irsd200_read_event(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir, + enum iio_event_info info, int *val, int *val2) +{ + struct irsd200_data *data = iio_priv(indio_dev); + int ret; + + switch (info) { + case IIO_EV_INFO_VALUE: + ret = irsd200_read_threshold(data, dir, val); + if (ret) + return ret; + + return IIO_VAL_INT; + case IIO_EV_INFO_RUNNING_PERIOD: + ret = irsd200_read_timer(data, val, val2); + if (ret) + return ret; + + return IIO_VAL_FRACTIONAL; + case IIO_EV_INFO_RUNNING_COUNT: + ret = irsd200_read_nr_count(data, val); + if (ret) + return ret; + + return IIO_VAL_INT; + default: + return -EINVAL; + } +} + +static int irsd200_write_event(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir, + enum iio_event_info info, int val, int val2) +{ + struct irsd200_data *data = iio_priv(indio_dev); + + switch (info) { + case IIO_EV_INFO_VALUE: + return irsd200_write_threshold(data, dir, val); + case IIO_EV_INFO_RUNNING_PERIOD: + return irsd200_write_timer(data, val, val2); + case IIO_EV_INFO_RUNNING_COUNT: + return irsd200_write_nr_count(data, val); + default: + return -EINVAL; + } +} + +static int irsd200_read_event_config(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir) +{ + struct irsd200_data *data = iio_priv(indio_dev); + unsigned int val; + int ret; + + switch (type) { + case IIO_EV_TYPE_THRESH: + ret = regmap_field_read( + data->regfields[IRS_REGF_INTR_COUNT_THR_OR], &val); + if (ret) + return ret; + + return val; + default: + return -EINVAL; + } +} + +static int irsd200_write_event_config(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir, int state) +{ + struct irsd200_data *data = iio_priv(indio_dev); + unsigned int tmp; + int ret; + + switch (type) { + case IIO_EV_TYPE_THRESH: + /* Clear the count register (by reading from it). */ + ret = regmap_read(data->regmap, IRS_REG_COUNT, &tmp); + if (ret) + return ret; + + return regmap_field_write( + data->regfields[IRS_REGF_INTR_COUNT_THR_OR], !!state); + default: + return -EINVAL; + } +} + +static irqreturn_t irsd200_irq_thread(int irq, void *dev_id) +{ + struct iio_dev *indio_dev = dev_id; + struct irsd200_data *data = iio_priv(indio_dev); + enum iio_event_direction dir; + unsigned int lower_count; + unsigned int upper_count; + unsigned int status = 0; + unsigned int source = 0; + unsigned int clear = 0; + unsigned int count = 0; + int ret; + + ret = regmap_read(data->regmap, IRS_REG_INTR, &source); + if (ret) { + dev_err(data->dev, "Could not read interrupt source (%d)\n", + ret); + return IRQ_HANDLED; + } + + ret = regmap_read(data->regmap, IRS_REG_STATUS, &status); + if (ret) { + dev_err(data->dev, "Could not acknowledge interrupt (%d)\n", + ret); + return IRQ_HANDLED; + } + + if (status & BIT(IRS_INTR_DATA) && iio_buffer_enabled(indio_dev)) { + iio_trigger_poll_nested(indio_dev->trig); + clear |= BIT(IRS_INTR_DATA); + } + + if (status & BIT(IRS_INTR_COUNT_THR_OR) && + source & BIT(IRS_INTR_COUNT_THR_OR)) { + /* + * The register value resets to zero after reading. We therefore + * need to read once and manually extract the lower and upper + * count register fields. + */ + ret = regmap_read(data->regmap, IRS_REG_COUNT, &count); + if (ret) + dev_err(data->dev, "Could not read count (%d)\n", ret); + + upper_count = IRS_UPPER_COUNT(count); + lower_count = IRS_LOWER_COUNT(count); + + /* + * We only check the OR mode to be able to push events for + * rising and falling thresholds. AND mode is covered when both + * upper and lower count is non-zero, and is signaled with + * IIO_EV_DIR_EITHER. + */ + if (upper_count && !lower_count) + dir = IIO_EV_DIR_RISING; + else if (!upper_count && lower_count) + dir = IIO_EV_DIR_FALLING; + else + dir = IIO_EV_DIR_EITHER; + + iio_push_event(indio_dev, + IIO_UNMOD_EVENT_CODE(IIO_PROXIMITY, 0, + IIO_EV_TYPE_THRESH, dir), + iio_get_time_ns(indio_dev)); + + /* + * The OR mode will always trigger when the AND mode does, but + * not vice versa. However, it seems like the AND bit needs to + * be cleared if data capture _and_ threshold count interrupts + * are desirable, even though it hasn't explicitly been selected + * (with IRS_REG_INTR). Either way, it doesn't hurt... + */ + clear |= BIT(IRS_INTR_COUNT_THR_OR) | + BIT(IRS_INTR_COUNT_THR_AND); + } + + if (!clear) + return IRQ_NONE; + + ret = regmap_write(data->regmap, IRS_REG_STATUS, clear); + if (ret) + dev_err(data->dev, + "Could not clear interrupt status (%d)\n", ret); + + return IRQ_HANDLED; +} + +static irqreturn_t irsd200_trigger_handler(int irq, void *pollf) +{ + struct iio_dev *indio_dev = ((struct iio_poll_func *)pollf)->indio_dev; + struct irsd200_data *data = iio_priv(indio_dev); + s16 buf = 0; + int ret; + + ret = irsd200_read_data(data, &buf); + if (ret) + goto end; + + iio_push_to_buffers_with_timestamp(indio_dev, &buf, + iio_get_time_ns(indio_dev)); + +end: + iio_trigger_notify_done(indio_dev->trig); + + return IRQ_HANDLED; +} + +static int irsd200_set_trigger_state(struct iio_trigger *trig, bool state) +{ + struct irsd200_data *data = iio_trigger_get_drvdata(trig); + int ret; + + ret = regmap_field_write(data->regfields[IRS_REGF_INTR_DATA], state); + if (ret) { + dev_err(data->dev, "Could not %s data interrupt source (%d)\n", + state ? "enable" : "disable", ret); + } + + return ret; +} + +static const struct iio_info irsd200_info = { + .read_raw = irsd200_read_raw, + .read_avail = irsd200_read_avail, + .write_raw = irsd200_write_raw, + .read_event_value = irsd200_read_event, + .write_event_value = irsd200_write_event, + .read_event_config = irsd200_read_event_config, + .write_event_config = irsd200_write_event_config, +}; + +static const struct iio_trigger_ops irsd200_trigger_ops = { + .set_trigger_state = irsd200_set_trigger_state, + .validate_device = iio_trigger_validate_own_device, +}; + +static const struct iio_event_spec irsd200_event_spec[] = { + { + .type = IIO_EV_TYPE_THRESH, + .dir = IIO_EV_DIR_RISING, + .mask_separate = BIT(IIO_EV_INFO_VALUE), + }, + { + .type = IIO_EV_TYPE_THRESH, + .dir = IIO_EV_DIR_FALLING, + .mask_separate = BIT(IIO_EV_INFO_VALUE), + }, + { + .type = IIO_EV_TYPE_THRESH, + .dir = IIO_EV_DIR_EITHER, + .mask_separate = + BIT(IIO_EV_INFO_RUNNING_PERIOD) | + BIT(IIO_EV_INFO_RUNNING_COUNT) | + BIT(IIO_EV_INFO_ENABLE), + }, +}; + +static const struct iio_chan_spec irsd200_channels[] = { + { + .type = IIO_PROXIMITY, + .info_mask_separate = + BIT(IIO_CHAN_INFO_RAW) | + BIT(IIO_CHAN_INFO_SAMP_FREQ) | + BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY) | + BIT(IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY), + .info_mask_separate_available = + BIT(IIO_CHAN_INFO_SAMP_FREQ) | + BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY) | + BIT(IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY), + .event_spec = irsd200_event_spec, + .num_event_specs = ARRAY_SIZE(irsd200_event_spec), + .scan_type = { + .sign = 's', + .realbits = 16, + .storagebits = 16, + .endianness = IIO_CPU, + }, + }, +}; + +static int irsd200_probe(struct i2c_client *client) +{ + struct iio_trigger *trigger; + struct irsd200_data *data; + struct iio_dev *indio_dev; + size_t i; + int ret; + + indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); + if (!indio_dev) + return dev_err_probe(&client->dev, -ENOMEM, + "Could not allocate iio device\n"); + + data = iio_priv(indio_dev); + data->dev = &client->dev; + + data->regmap = devm_regmap_init_i2c(client, &irsd200_regmap_config); + if (IS_ERR(data->regmap)) + return dev_err_probe(data->dev, PTR_ERR(data->regmap), + "Could not initialize regmap\n"); + + for (i = 0; i < IRS_REGF_MAX; ++i) { + data->regfields[i] = devm_regmap_field_alloc( + data->dev, data->regmap, irsd200_regfields[i]); + if (IS_ERR(data->regfields[i])) + return dev_err_probe( + data->dev, PTR_ERR(data->regfields[i]), + "Could not allocate register field %zu\n", i); + } + + ret = devm_regulator_get_enable(data->dev, "vdd"); + if (ret) + return dev_err_probe( + data->dev, ret, + "Could not get and enable regulator (%d)\n", ret); + + ret = irsd200_setup(data); + if (ret) + return ret; + + indio_dev->info = &irsd200_info; + indio_dev->name = IRS_DRV_NAME; + indio_dev->channels = irsd200_channels; + indio_dev->num_channels = ARRAY_SIZE(irsd200_channels); + indio_dev->modes = INDIO_DIRECT_MODE; + + if (!client->irq) + return dev_err_probe(data->dev, -ENXIO, "No irq available\n"); + + ret = devm_iio_triggered_buffer_setup(data->dev, indio_dev, NULL, + irsd200_trigger_handler, NULL); + if (ret) + return dev_err_probe( + data->dev, ret, + "Could not setup iio triggered buffer (%d)\n", ret); + + ret = devm_request_threaded_irq(data->dev, client->irq, NULL, + irsd200_irq_thread, + IRQF_TRIGGER_RISING | IRQF_ONESHOT, + NULL, indio_dev); + if (ret) + return dev_err_probe(data->dev, ret, + "Could not request irq (%d)\n", ret); + + trigger = devm_iio_trigger_alloc(data->dev, "%s-dev%d", indio_dev->name, + iio_device_id(indio_dev)); + if (!trigger) + return dev_err_probe(data->dev, -ENOMEM, + "Could not allocate iio trigger\n"); + + trigger->ops = &irsd200_trigger_ops; + iio_trigger_set_drvdata(trigger, data); + + ret = devm_iio_trigger_register(data->dev, trigger); + if (ret) + return dev_err_probe(data->dev, ret, + "Could not register iio trigger (%d)\n", + ret); + + ret = devm_iio_device_register(data->dev, indio_dev); + if (ret) + return dev_err_probe(data->dev, ret, + "Could not register iio device (%d)\n", + ret); + + return 0; +} + +static const struct of_device_id irsd200_of_match[] = { + { + .compatible = "murata,irsd200", + }, + {} +}; +MODULE_DEVICE_TABLE(of, irsd200_of_match); + +static struct i2c_driver irsd200_driver = { + .driver = { + .name = IRS_DRV_NAME, + .of_match_table = irsd200_of_match, + }, + .probe = irsd200_probe, +}; +module_i2c_driver(irsd200_driver); + +MODULE_AUTHOR("Waqar Hameed "); +MODULE_DESCRIPTION("Murata IRS-D200 PIR sensor driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/iio/proximity/isl29501.c b/drivers/iio/proximity/isl29501.c index fe45ca35a124..bcebacaf3dab 100644 --- a/drivers/iio/proximity/isl29501.c +++ b/drivers/iio/proximity/isl29501.c @@ -12,7 +12,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/iio/proximity/mb1232.c b/drivers/iio/proximity/mb1232.c index fb1073c8d9f7..614e65cb9d42 100644 --- a/drivers/iio/proximity/mb1232.c +++ b/drivers/iio/proximity/mb1232.c @@ -76,7 +76,7 @@ static s16 mb1232_read_distance(struct mb1232_data *data) goto error_unlock; } - if (data->irqnr >= 0) { + if (data->irqnr > 0) { /* it cannot take more than 100 ms */ ret = wait_for_completion_killable_timeout(&data->ranging, HZ/10); @@ -212,10 +212,7 @@ static int mb1232_probe(struct i2c_client *client) init_completion(&data->ranging); data->irqnr = fwnode_irq_get(dev_fwnode(&client->dev), 0); - if (data->irqnr <= 0) { - /* usage of interrupt is optional */ - data->irqnr = -1; - } else { + if (data->irqnr > 0) { ret = devm_request_irq(dev, data->irqnr, mb1232_handle_irq, IRQF_TRIGGER_FALLING, id->name, indio_dev); if (ret < 0) { diff --git a/drivers/iio/temperature/mlx90614.c b/drivers/iio/temperature/mlx90614.c index 676dc8701924..07bb5df24ab3 100644 --- a/drivers/iio/temperature/mlx90614.c +++ b/drivers/iio/temperature/mlx90614.c @@ -27,8 +27,8 @@ #include #include #include +#include #include -#include #include #include diff --git a/drivers/iio/trigger/stm32-lptimer-trigger.c b/drivers/iio/trigger/stm32-lptimer-trigger.c index 2e447a3f047d..f1e18913236a 100644 --- a/drivers/iio/trigger/stm32-lptimer-trigger.c +++ b/drivers/iio/trigger/stm32-lptimer-trigger.c @@ -73,7 +73,6 @@ static int stm32_lptim_trigger_probe(struct platform_device *pdev) { struct stm32_lptim_trigger *priv; u32 index; - int ret; priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); if (!priv) @@ -88,13 +87,7 @@ static int stm32_lptim_trigger_probe(struct platform_device *pdev) priv->dev = &pdev->dev; priv->trg = stm32_lptim_triggers[index]; - ret = stm32_lptim_setup_trig(priv); - if (ret) - return ret; - - platform_set_drvdata(pdev, priv); - - return 0; + return stm32_lptim_setup_trig(priv); } static const struct of_device_id stm32_lptim_trig_of_match[] = { diff --git a/drivers/input/serio/serport.c b/drivers/input/serio/serport.c index 7f7ef0e3a749..1db3f30011c4 100644 --- a/drivers/input/serio/serport.c +++ b/drivers/input/serio/serport.c @@ -103,7 +103,7 @@ static int serport_ldisc_open(struct tty_struct *tty) static void serport_ldisc_close(struct tty_struct *tty) { - struct serport *serport = (struct serport *) tty->disc_data; + struct serport *serport = tty->disc_data; kfree(serport); } @@ -114,10 +114,10 @@ static void serport_ldisc_close(struct tty_struct *tty) * 'interrupt' routine. */ -static void serport_ldisc_receive(struct tty_struct *tty, - const unsigned char *cp, const char *fp, int count) +static void serport_ldisc_receive(struct tty_struct *tty, const u8 *cp, + const u8 *fp, size_t count) { - struct serport *serport = (struct serport*) tty->disc_data; + struct serport *serport = tty->disc_data; unsigned long flags; unsigned int ch_flags = 0; int i; @@ -158,10 +158,10 @@ out: */ static ssize_t serport_ldisc_read(struct tty_struct * tty, struct file * file, - unsigned char *kbuf, size_t nr, - void **cookie, unsigned long offset) + u8 *kbuf, size_t nr, void **cookie, + unsigned long offset) { - struct serport *serport = (struct serport*) tty->disc_data; + struct serport *serport = tty->disc_data; struct serio *serio; if (test_and_set_bit(SERPORT_BUSY, &serport->flags)) @@ -245,7 +245,7 @@ static int serport_ldisc_compat_ioctl(struct tty_struct *tty, static void serport_ldisc_hangup(struct tty_struct *tty) { - struct serport *serport = (struct serport *) tty->disc_data; + struct serport *serport = tty->disc_data; unsigned long flags; spin_lock_irqsave(&serport->lock, flags); @@ -257,7 +257,7 @@ static void serport_ldisc_hangup(struct tty_struct *tty) static void serport_ldisc_write_wakeup(struct tty_struct * tty) { - struct serport *serport = (struct serport *) tty->disc_data; + struct serport *serport = tty->disc_data; unsigned long flags; spin_lock_irqsave(&serport->lock, flags); diff --git a/drivers/interconnect/Makefile b/drivers/interconnect/Makefile index 5604ce351a9f..d0888babb9a1 100644 --- a/drivers/interconnect/Makefile +++ b/drivers/interconnect/Makefile @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 CFLAGS_core.o := -I$(src) -icc-core-objs := core.o bulk.o +icc-core-objs := core.o bulk.o debugfs-client.o obj-$(CONFIG_INTERCONNECT) += icc-core.o obj-$(CONFIG_INTERCONNECT_IMX) += imx/ diff --git a/drivers/interconnect/core.c b/drivers/interconnect/core.c index 5fac448c28fd..dfab160ca529 100644 --- a/drivers/interconnect/core.c +++ b/drivers/interconnect/core.c @@ -28,6 +28,7 @@ static LIST_HEAD(icc_providers); static int providers_count; static bool synced_state; static DEFINE_MUTEX(icc_lock); +static DEFINE_MUTEX(icc_bw_lock); static struct dentry *icc_debugfs_dir; static void icc_summary_show_one(struct seq_file *s, struct icc_node *n) @@ -147,6 +148,21 @@ static struct icc_node *node_find(const int id) return idr_find(&icc_idr, id); } +static struct icc_node *node_find_by_name(const char *name) +{ + struct icc_provider *provider; + struct icc_node *n; + + list_for_each_entry(provider, &icc_providers, provider_list) { + list_for_each_entry(n, &provider->nodes, node_list) { + if (!strcmp(n->name, name)) + return n; + } + } + + return NULL; +} + static struct icc_path *path_init(struct device *dev, struct icc_node *dst, ssize_t num_nodes) { @@ -561,6 +577,54 @@ struct icc_path *of_icc_get(struct device *dev, const char *name) } EXPORT_SYMBOL_GPL(of_icc_get); +/** + * icc_get() - get a path handle between two endpoints + * @dev: device pointer for the consumer device + * @src: source node name + * @dst: destination node name + * + * This function will search for a path between two endpoints and return an + * icc_path handle on success. Use icc_put() to release constraints when they + * are not needed anymore. + * + * Return: icc_path pointer on success or ERR_PTR() on error. NULL is returned + * when the API is disabled. + */ +struct icc_path *icc_get(struct device *dev, const char *src, const char *dst) +{ + struct icc_node *src_node, *dst_node; + struct icc_path *path = ERR_PTR(-EPROBE_DEFER); + + mutex_lock(&icc_lock); + + src_node = node_find_by_name(src); + if (!src_node) { + dev_err(dev, "%s: invalid src=%s\n", __func__, src); + goto out; + } + + dst_node = node_find_by_name(dst); + if (!dst_node) { + dev_err(dev, "%s: invalid dst=%s\n", __func__, dst); + goto out; + } + + path = path_find(dev, src_node, dst_node); + if (IS_ERR(path)) { + dev_err(dev, "%s: invalid path=%ld\n", __func__, PTR_ERR(path)); + goto out; + } + + path->name = kasprintf(GFP_KERNEL, "%s-%s", src_node->name, dst_node->name); + if (!path->name) { + kfree(path); + path = ERR_PTR(-ENOMEM); + } +out: + mutex_unlock(&icc_lock); + return path; +} + /** * icc_set_tag() - set an optional tag on a path * @path: the path we want to tag @@ -631,7 +695,7 @@ int icc_set_bw(struct icc_path *path, u32 avg_bw, u32 peak_bw) if (WARN_ON(IS_ERR(path) || !path->num_nodes)) return -EINVAL; - mutex_lock(&icc_lock); + mutex_lock(&icc_bw_lock); old_avg = path->reqs[0].avg_bw; old_peak = path->reqs[0].peak_bw; @@ -663,7 +727,7 @@ int icc_set_bw(struct icc_path *path, u32 avg_bw, u32 peak_bw) apply_constraints(path); } - mutex_unlock(&icc_lock); + mutex_unlock(&icc_bw_lock); trace_icc_set_bw_end(path, ret); @@ -872,6 +936,7 @@ void icc_node_add(struct icc_node *node, struct icc_provider *provider) return; mutex_lock(&icc_lock); + mutex_lock(&icc_bw_lock); node->provider = provider; list_add_tail(&node->node_list, &provider->nodes); @@ -900,6 +965,7 @@ void icc_node_add(struct icc_node *node, struct icc_provider *provider) node->avg_bw = 0; node->peak_bw = 0; + mutex_unlock(&icc_bw_lock); mutex_unlock(&icc_lock); } EXPORT_SYMBOL_GPL(icc_node_add); @@ -1025,6 +1091,7 @@ void icc_sync_state(struct device *dev) return; mutex_lock(&icc_lock); + mutex_lock(&icc_bw_lock); synced_state = true; list_for_each_entry(p, &icc_providers, provider_list) { dev_dbg(p->dev, "interconnect provider is in synced state\n"); @@ -1037,13 +1104,21 @@ void icc_sync_state(struct device *dev) } } } + mutex_unlock(&icc_bw_lock); mutex_unlock(&icc_lock); } EXPORT_SYMBOL_GPL(icc_sync_state); static int __init icc_init(void) { - struct device_node *root = of_find_node_by_path("/"); + struct device_node *root; + + /* Teach lockdep about lock ordering wrt. shrinker: */ + fs_reclaim_acquire(GFP_KERNEL); + might_lock(&icc_bw_lock); + fs_reclaim_release(GFP_KERNEL); + + root = of_find_node_by_path("/"); providers_count = of_count_icc_providers(root); of_node_put(root); @@ -1053,6 +1128,9 @@ static int __init icc_init(void) icc_debugfs_dir, NULL, &icc_summary_fops); debugfs_create_file("interconnect_graph", 0444, icc_debugfs_dir, NULL, &icc_graph_fops); + + icc_debugfs_client_init(icc_debugfs_dir); + return 0; } diff --git a/drivers/interconnect/debugfs-client.c b/drivers/interconnect/debugfs-client.c new file mode 100644 index 000000000000..bc3fd8a7b9eb --- /dev/null +++ b/drivers/interconnect/debugfs-client.c @@ -0,0 +1,168 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. + */ +#include +#include +#include + +#include "internal.h" + +/* + * This can be dangerous, therefore don't provide any real compile time + * configuration option for this feature. + * People who want to use this will need to modify the source code directly. + */ +#undef INTERCONNECT_ALLOW_WRITE_DEBUGFS + +#if defined(INTERCONNECT_ALLOW_WRITE_DEBUGFS) && defined(CONFIG_DEBUG_FS) + +static LIST_HEAD(debugfs_paths); +static DEFINE_MUTEX(debugfs_lock); + +static struct platform_device *pdev; +static struct icc_path *cur_path; + +static char *src_node; +static char *dst_node; +static u32 avg_bw; +static u32 peak_bw; +static u32 tag; + +struct debugfs_path { + const char *src; + const char *dst; + struct icc_path *path; + struct list_head list; +}; + +static struct icc_path *get_path(const char *src, const char *dst) +{ + struct debugfs_path *path; + + list_for_each_entry(path, &debugfs_paths, list) { + if (!strcmp(path->src, src) && !strcmp(path->dst, dst)) + return path->path; + } + + return NULL; +} + +static int icc_get_set(void *data, u64 val) +{ + struct debugfs_path *debugfs_path; + char *src, *dst; + int ret = 0; + + mutex_lock(&debugfs_lock); + + rcu_read_lock(); + src = rcu_dereference(src_node); + dst = rcu_dereference(dst_node); + + /* + * If we've already looked up a path, then use the existing one instead + * of calling icc_get() again. This allows for updating previous BW + * votes when "get" is written to multiple times for multiple paths. + */ + cur_path = get_path(src, dst); + if (cur_path) { + rcu_read_unlock(); + goto out; + } + + src = kstrdup(src, GFP_ATOMIC); + dst = kstrdup(dst, GFP_ATOMIC); + rcu_read_unlock(); + + if (!src || !dst) { + ret = -ENOMEM; + goto err_free; + } + + cur_path = icc_get(&pdev->dev, src, dst); + if (IS_ERR(cur_path)) { + ret = PTR_ERR(cur_path); + goto err_free; + } + + debugfs_path = kzalloc(sizeof(*debugfs_path), GFP_KERNEL); + if (!debugfs_path) { + ret = -ENOMEM; + goto err_put; + } + + debugfs_path->path = cur_path; + debugfs_path->src = src; + debugfs_path->dst = dst; + list_add_tail(&debugfs_path->list, &debugfs_paths); + + goto out; + +err_put: + icc_put(cur_path); +err_free: + kfree(src); + kfree(dst); +out: + mutex_unlock(&debugfs_lock); + return ret; +} + +DEFINE_DEBUGFS_ATTRIBUTE(icc_get_fops, NULL, icc_get_set, "%llu\n"); + +static int icc_commit_set(void *data, u64 val) +{ + int ret; + + mutex_lock(&debugfs_lock); + + if (IS_ERR_OR_NULL(cur_path)) { + ret = PTR_ERR(cur_path); + goto out; + } + + icc_set_tag(cur_path, tag); + ret = icc_set_bw(cur_path, avg_bw, peak_bw); +out: + mutex_unlock(&debugfs_lock); + return ret; +} + +DEFINE_DEBUGFS_ATTRIBUTE(icc_commit_fops, NULL, icc_commit_set, "%llu\n"); + +int icc_debugfs_client_init(struct dentry *icc_dir) +{ + struct dentry *client_dir; + int ret; + + pdev = platform_device_alloc("icc-debugfs-client", PLATFORM_DEVID_NONE); + + ret = platform_device_add(pdev); + if (ret) { + pr_err("%s: failed to add platform device: %d\n", __func__, ret); + platform_device_put(pdev); + return ret; + } + + client_dir = debugfs_create_dir("test_client", icc_dir); + + debugfs_create_str("src_node", 0600, client_dir, &src_node); + debugfs_create_str("dst_node", 0600, client_dir, &dst_node); + debugfs_create_file("get", 0200, client_dir, NULL, &icc_get_fops); + debugfs_create_u32("avg_bw", 0600, client_dir, &avg_bw); + debugfs_create_u32("peak_bw", 0600, client_dir, &peak_bw); + debugfs_create_u32("tag", 0600, client_dir, &tag); + debugfs_create_file("commit", 0200, client_dir, NULL, &icc_commit_fops); + + return 0; +} + +#else + +int icc_debugfs_client_init(struct dentry *icc_dir) +{ + return 0; +} + +#endif diff --git a/drivers/interconnect/icc-clk.c b/drivers/interconnect/icc-clk.c index 4d43ebff4257..d787f2ea36d9 100644 --- a/drivers/interconnect/icc-clk.c +++ b/drivers/interconnect/icc-clk.c @@ -16,7 +16,7 @@ struct icc_clk_node { struct icc_clk_provider { struct icc_provider provider; int num_clocks; - struct icc_clk_node clocks[]; + struct icc_clk_node clocks[] __counted_by(num_clocks); }; #define to_icc_clk_provider(_provider) \ diff --git a/drivers/interconnect/imx/imx8mp.c b/drivers/interconnect/imx/imx8mp.c index 8bfaf173f1da..a66ae3638b18 100644 --- a/drivers/interconnect/imx/imx8mp.c +++ b/drivers/interconnect/imx/imx8mp.c @@ -7,7 +7,6 @@ */ #include -#include #include #include diff --git a/drivers/interconnect/internal.h b/drivers/interconnect/internal.h index f5f82a5c939e..3b9d50589c01 100644 --- a/drivers/interconnect/internal.h +++ b/drivers/interconnect/internal.h @@ -38,7 +38,10 @@ struct icc_req { struct icc_path { const char *name; size_t num_nodes; - struct icc_req reqs[]; + struct icc_req reqs[] __counted_by(num_nodes); }; +struct icc_path *icc_get(struct device *dev, const char *src, const char *dst); +int icc_debugfs_client_init(struct dentry *icc_dir); + #endif diff --git a/drivers/interconnect/qcom/bcm-voter.c b/drivers/interconnect/qcom/bcm-voter.c index d5f2a6b5376b..a2d437a05a11 100644 --- a/drivers/interconnect/qcom/bcm-voter.c +++ b/drivers/interconnect/qcom/bcm-voter.c @@ -58,6 +58,36 @@ static u64 bcm_div(u64 num, u32 base) return num; } +/* BCMs with enable_mask use one-hot-encoding for on/off signaling */ +static void bcm_aggregate_mask(struct qcom_icc_bcm *bcm) +{ + struct qcom_icc_node *node; + int bucket, i; + + for (bucket = 0; bucket < QCOM_ICC_NUM_BUCKETS; bucket++) { + bcm->vote_x[bucket] = 0; + bcm->vote_y[bucket] = 0; + + for (i = 0; i < bcm->num_nodes; i++) { + node = bcm->nodes[i]; + + /* If any vote in this bucket exists, keep the BCM enabled */ + if (node->sum_avg[bucket] || node->max_peak[bucket]) { + bcm->vote_x[bucket] = 0; + bcm->vote_y[bucket] = bcm->enable_mask; + break; + } + } + } + + if (bcm->keepalive) { + bcm->vote_x[QCOM_ICC_BUCKET_AMC] = bcm->enable_mask; + bcm->vote_x[QCOM_ICC_BUCKET_WAKE] = bcm->enable_mask; + bcm->vote_y[QCOM_ICC_BUCKET_AMC] = bcm->enable_mask; + bcm->vote_y[QCOM_ICC_BUCKET_WAKE] = bcm->enable_mask; + } +} + static void bcm_aggregate(struct qcom_icc_bcm *bcm) { struct qcom_icc_node *node; @@ -83,11 +113,6 @@ static void bcm_aggregate(struct qcom_icc_bcm *bcm) temp = agg_peak[bucket] * bcm->vote_scale; bcm->vote_y[bucket] = bcm_div(temp, bcm->aux_data.unit); - - if (bcm->enable_mask && (bcm->vote_x[bucket] || bcm->vote_y[bucket])) { - bcm->vote_x[bucket] = 0; - bcm->vote_y[bucket] = bcm->enable_mask; - } } if (bcm->keepalive && bcm->vote_x[QCOM_ICC_BUCKET_AMC] == 0 && @@ -260,8 +285,12 @@ int qcom_icc_bcm_voter_commit(struct bcm_voter *voter) return 0; mutex_lock(&voter->lock); - list_for_each_entry(bcm, &voter->commit_list, list) - bcm_aggregate(bcm); + list_for_each_entry(bcm, &voter->commit_list, list) { + if (bcm->enable_mask) + bcm_aggregate_mask(bcm); + else + bcm_aggregate(bcm); + } /* * Pre sort the BCMs based on VCD for ease of generating a command list diff --git a/drivers/interconnect/qcom/bcm-voter.h b/drivers/interconnect/qcom/bcm-voter.h index 0f64c0bab2c0..b4d36e349f3c 100644 --- a/drivers/interconnect/qcom/bcm-voter.h +++ b/drivers/interconnect/qcom/bcm-voter.h @@ -12,14 +12,6 @@ #include "icc-rpmh.h" -#define DEFINE_QBCM(_name, _bcmname, _keepalive, ...) \ -static struct qcom_icc_bcm _name = { \ - .name = _bcmname, \ - .keepalive = _keepalive, \ - .num_nodes = ARRAY_SIZE(((struct qcom_icc_node *[]){ __VA_ARGS__ })), \ - .nodes = { __VA_ARGS__ }, \ -} - struct bcm_voter *of_bcm_voter_get(struct device *dev, const char *name); void qcom_icc_bcm_voter_add(struct bcm_voter *voter, struct qcom_icc_bcm *bcm); int qcom_icc_bcm_voter_commit(struct bcm_voter *voter); diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c index 3209d8de709b..2c16917ba1fd 100644 --- a/drivers/interconnect/qcom/icc-rpm.c +++ b/drivers/interconnect/qcom/icc-rpm.c @@ -7,7 +7,7 @@ #include #include #include -#include +#include #include #include #include @@ -240,7 +240,7 @@ static int qcom_icc_rpm_set(struct qcom_icc_node *qn, u64 *bw) } } - return ret; + return 0; } /** diff --git a/drivers/interconnect/qcom/icc-rpmh.c b/drivers/interconnect/qcom/icc-rpmh.c index fdb5e58e408b..b9f27ce3b607 100644 --- a/drivers/interconnect/qcom/icc-rpmh.c +++ b/drivers/interconnect/qcom/icc-rpmh.c @@ -7,7 +7,7 @@ #include #include #include -#include +#include #include #include "bcm-voter.h" @@ -185,6 +185,7 @@ int qcom_icc_rpmh_probe(struct platform_device *pdev) data = devm_kzalloc(dev, struct_size(data, nodes, num_nodes), GFP_KERNEL); if (!data) return -ENOMEM; + data->num_nodes = num_nodes; provider = &qp->provider; provider->dev = dev; @@ -228,8 +229,6 @@ int qcom_icc_rpmh_probe(struct platform_device *pdev) data->nodes[i] = node; } - data->num_nodes = num_nodes; - ret = icc_provider_register(provider); if (ret) goto err_remove_nodes; diff --git a/drivers/interconnect/qcom/icc-rpmh.h b/drivers/interconnect/qcom/icc-rpmh.h index 7843d8864d6b..5f0af8b1fc43 100644 --- a/drivers/interconnect/qcom/icc-rpmh.h +++ b/drivers/interconnect/qcom/icc-rpmh.h @@ -120,16 +120,6 @@ struct qcom_icc_desc { size_t num_bcms; }; -#define DEFINE_QNODE(_name, _id, _channels, _buswidth, ...) \ - static struct qcom_icc_node _name = { \ - .id = _id, \ - .name = #_name, \ - .channels = _channels, \ - .buswidth = _buswidth, \ - .num_links = ARRAY_SIZE(((int[]){ __VA_ARGS__ })), \ - .links = { __VA_ARGS__ }, \ - } - int qcom_icc_aggregate(struct icc_node *node, u32 tag, u32 avg_bw, u32 peak_bw, u32 *agg_avg, u32 *agg_peak); int qcom_icc_set(struct icc_node *src, struct icc_node *dst); diff --git a/drivers/interconnect/qcom/msm8916.c b/drivers/interconnect/qcom/msm8916.c index b567a2b4199c..35148880b3e8 100644 --- a/drivers/interconnect/qcom/msm8916.c +++ b/drivers/interconnect/qcom/msm8916.c @@ -8,9 +8,9 @@ #include #include #include +#include #include #include -#include #include diff --git a/drivers/interconnect/qcom/msm8939.c b/drivers/interconnect/qcom/msm8939.c index 6732eeeb8158..b52c5ac1175c 100644 --- a/drivers/interconnect/qcom/msm8939.c +++ b/drivers/interconnect/qcom/msm8939.c @@ -9,9 +9,9 @@ #include #include #include +#include #include #include -#include #include diff --git a/drivers/interconnect/qcom/msm8974.c b/drivers/interconnect/qcom/msm8974.c index 968162213d40..885ca9d6d4ed 100644 --- a/drivers/interconnect/qcom/msm8974.c +++ b/drivers/interconnect/qcom/msm8974.c @@ -33,8 +33,7 @@ #include #include #include -#include -#include +#include #include #include @@ -676,6 +675,7 @@ static int msm8974_icc_probe(struct platform_device *pdev) GFP_KERNEL); if (!data) return -ENOMEM; + data->num_nodes = num_nodes; qp->bus_clks = devm_kmemdup(dev, msm8974_icc_bus_clocks, sizeof(msm8974_icc_bus_clocks), GFP_KERNEL); @@ -722,7 +722,6 @@ static int msm8974_icc_probe(struct platform_device *pdev) data->nodes[i] = node; } - data->num_nodes = num_nodes; ret = icc_provider_register(provider); if (ret) diff --git a/drivers/interconnect/qcom/msm8996.c b/drivers/interconnect/qcom/msm8996.c index b9695c1931ce..88683dfa468f 100644 --- a/drivers/interconnect/qcom/msm8996.c +++ b/drivers/interconnect/qcom/msm8996.c @@ -8,9 +8,8 @@ #include #include #include +#include #include -#include -#include #include #include diff --git a/drivers/interconnect/qcom/osm-l3.c b/drivers/interconnect/qcom/osm-l3.c index a1f4f918b911..dc321bb86d0b 100644 --- a/drivers/interconnect/qcom/osm-l3.c +++ b/drivers/interconnect/qcom/osm-l3.c @@ -9,7 +9,7 @@ #include #include #include -#include +#include #include #include @@ -232,6 +232,7 @@ static int qcom_osm_l3_probe(struct platform_device *pdev) data = devm_kzalloc(&pdev->dev, struct_size(data, nodes, num_nodes), GFP_KERNEL); if (!data) return -ENOMEM; + data->num_nodes = num_nodes; provider = &qp->provider; provider->dev = &pdev->dev; @@ -261,7 +262,6 @@ static int qcom_osm_l3_probe(struct platform_device *pdev) data->nodes[i] = node; } - data->num_nodes = num_nodes; ret = icc_provider_register(provider); if (ret) diff --git a/drivers/interconnect/qcom/qcm2290.c b/drivers/interconnect/qcom/qcm2290.c index 8fc4acc4220b..5bc4b7516608 100644 --- a/drivers/interconnect/qcom/qcm2290.c +++ b/drivers/interconnect/qcom/qcm2290.c @@ -10,9 +10,8 @@ #include #include #include +#include #include -#include -#include #include #include #include @@ -1197,6 +1196,7 @@ static const struct qcom_icc_desc qcm2290_bimc = { .num_nodes = ARRAY_SIZE(qcm2290_bimc_nodes), .bus_clk_desc = &bimc_clk, .regmap_cfg = &qcm2290_bimc_regmap_config, + .keep_alive = true, /* M_REG_BASE() in vendor msm_bus_bimc_adhoc driver */ .qos_offset = 0x8000, }; @@ -1253,6 +1253,7 @@ static const struct qcom_icc_desc qcm2290_cnoc = { .num_nodes = ARRAY_SIZE(qcm2290_cnoc_nodes), .bus_clk_desc = &bus_1_clk, .regmap_cfg = &qcm2290_cnoc_regmap_config, + .keep_alive = true, }; static struct qcom_icc_node * const qcm2290_snoc_nodes[] = { @@ -1295,6 +1296,7 @@ static const struct qcom_icc_desc qcm2290_snoc = { .num_nodes = ARRAY_SIZE(qcm2290_snoc_nodes), .bus_clk_desc = &bus_2_clk, .regmap_cfg = &qcm2290_snoc_regmap_config, + .keep_alive = true, /* Vendor DT node fab-sys_noc property 'qcom,base-offset' */ .qos_offset = 0x15000, }; @@ -1309,6 +1311,7 @@ static const struct qcom_icc_desc qcm2290_qup_virt = { .nodes = qcm2290_qup_virt_nodes, .num_nodes = ARRAY_SIZE(qcm2290_qup_virt_nodes), .bus_clk_desc = &qup_clk, + .keep_alive = true, }; static struct qcom_icc_node * const qcm2290_mmnrt_virt_nodes[] = { @@ -1324,6 +1327,7 @@ static const struct qcom_icc_desc qcm2290_mmnrt_virt = { .num_nodes = ARRAY_SIZE(qcm2290_mmnrt_virt_nodes), .bus_clk_desc = &mmaxi_0_clk, .regmap_cfg = &qcm2290_snoc_regmap_config, + .keep_alive = true, .qos_offset = 0x15000, }; @@ -1339,6 +1343,7 @@ static const struct qcom_icc_desc qcm2290_mmrt_virt = { .num_nodes = ARRAY_SIZE(qcm2290_mmrt_virt_nodes), .bus_clk_desc = &mmaxi_1_clk, .regmap_cfg = &qcm2290_snoc_regmap_config, + .keep_alive = true, .qos_offset = 0x15000, }; @@ -1359,6 +1364,7 @@ static struct platform_driver qcm2290_noc_driver = { .driver = { .name = "qnoc-qcm2290", .of_match_table = qcm2290_noc_of_match, + .sync_state = icc_sync_state, }, }; module_platform_driver(qcm2290_noc_driver); diff --git a/drivers/interconnect/qcom/qcs404.c b/drivers/interconnect/qcom/qcs404.c index 82fe905b74a9..9fa1da70c843 100644 --- a/drivers/interconnect/qcom/qcs404.c +++ b/drivers/interconnect/qcom/qcs404.c @@ -8,8 +8,8 @@ #include #include #include +#include #include -#include #include "icc-rpm.h" diff --git a/drivers/interconnect/qcom/qdu1000.c b/drivers/interconnect/qcom/qdu1000.c index a4cf559de2b0..bf800dd7d4ba 100644 --- a/drivers/interconnect/qcom/qdu1000.c +++ b/drivers/interconnect/qcom/qdu1000.c @@ -7,8 +7,9 @@ #include #include #include +#include #include -#include +#include #include #include "bcm-voter.h" diff --git a/drivers/interconnect/qcom/sa8775p.c b/drivers/interconnect/qcom/sa8775p.c index f56538669de0..ef1b5e326089 100644 --- a/drivers/interconnect/qcom/sa8775p.c +++ b/drivers/interconnect/qcom/sa8775p.c @@ -7,8 +7,9 @@ #include #include #include +#include #include -#include +#include #include #include "bcm-voter.h" diff --git a/drivers/interconnect/qcom/sc7180.c b/drivers/interconnect/qcom/sc7180.c index ef4e13fb4983..d94ab9b39f3d 100644 --- a/drivers/interconnect/qcom/sc7180.c +++ b/drivers/interconnect/qcom/sc7180.c @@ -7,176 +7,1466 @@ #include #include #include +#include #include -#include +#include #include #include "bcm-voter.h" #include "icc-rpmh.h" #include "sc7180.h" -DEFINE_QNODE(qhm_a1noc_cfg, SC7180_MASTER_A1NOC_CFG, 1, 4, SC7180_SLAVE_SERVICE_A1NOC); -DEFINE_QNODE(qhm_qspi, SC7180_MASTER_QSPI, 1, 4, SC7180_SLAVE_A1NOC_SNOC); -DEFINE_QNODE(qhm_qup_0, SC7180_MASTER_QUP_0, 1, 4, SC7180_SLAVE_A1NOC_SNOC); -DEFINE_QNODE(xm_sdc2, SC7180_MASTER_SDCC_2, 1, 8, SC7180_SLAVE_A1NOC_SNOC); -DEFINE_QNODE(xm_emmc, SC7180_MASTER_EMMC, 1, 8, SC7180_SLAVE_A1NOC_SNOC); -DEFINE_QNODE(xm_ufs_mem, SC7180_MASTER_UFS_MEM, 1, 8, SC7180_SLAVE_A1NOC_SNOC); -DEFINE_QNODE(qhm_a2noc_cfg, SC7180_MASTER_A2NOC_CFG, 1, 4, SC7180_SLAVE_SERVICE_A2NOC); -DEFINE_QNODE(qhm_qdss_bam, SC7180_MASTER_QDSS_BAM, 1, 4, SC7180_SLAVE_A2NOC_SNOC); -DEFINE_QNODE(qhm_qup_1, SC7180_MASTER_QUP_1, 1, 4, SC7180_SLAVE_A2NOC_SNOC); -DEFINE_QNODE(qxm_crypto, SC7180_MASTER_CRYPTO, 1, 8, SC7180_SLAVE_A2NOC_SNOC); -DEFINE_QNODE(qxm_ipa, SC7180_MASTER_IPA, 1, 8, SC7180_SLAVE_A2NOC_SNOC); -DEFINE_QNODE(xm_qdss_etr, SC7180_MASTER_QDSS_ETR, 1, 8, SC7180_SLAVE_A2NOC_SNOC); -DEFINE_QNODE(qhm_usb3, SC7180_MASTER_USB3, 1, 8, SC7180_SLAVE_A2NOC_SNOC); -DEFINE_QNODE(qxm_camnoc_hf0_uncomp, SC7180_MASTER_CAMNOC_HF0_UNCOMP, 1, 32, SC7180_SLAVE_CAMNOC_UNCOMP); -DEFINE_QNODE(qxm_camnoc_hf1_uncomp, SC7180_MASTER_CAMNOC_HF1_UNCOMP, 1, 32, SC7180_SLAVE_CAMNOC_UNCOMP); -DEFINE_QNODE(qxm_camnoc_sf_uncomp, SC7180_MASTER_CAMNOC_SF_UNCOMP, 1, 32, SC7180_SLAVE_CAMNOC_UNCOMP); -DEFINE_QNODE(qnm_npu, SC7180_MASTER_NPU, 2, 32, SC7180_SLAVE_CDSP_GEM_NOC); -DEFINE_QNODE(qxm_npu_dsp, SC7180_MASTER_NPU_PROC, 1, 8, SC7180_SLAVE_CDSP_GEM_NOC); -DEFINE_QNODE(qnm_snoc, SC7180_MASTER_SNOC_CNOC, 1, 8, SC7180_SLAVE_A1NOC_CFG, SC7180_SLAVE_A2NOC_CFG, SC7180_SLAVE_AHB2PHY_SOUTH, SC7180_SLAVE_AHB2PHY_CENTER, SC7180_SLAVE_AOP, SC7180_SLAVE_AOSS, SC7180_SLAVE_BOOT_ROM, SC7180_SLAVE_CAMERA_CFG, SC7180_SLAVE_CAMERA_NRT_THROTTLE_CFG, SC7180_SLAVE_CAMERA_RT_THROTTLE_CFG, SC7180_SLAVE_CLK_CTL, SC7180_SLAVE_RBCPR_CX_CFG, SC7180_SLAVE_RBCPR_MX_CFG, SC7180_SLAVE_CRYPTO_0_CFG, SC7180_SLAVE_DCC_CFG, SC7180_SLAVE_CNOC_DDRSS, SC7180_SLAVE_DISPLAY_CFG, SC7180_SLAVE_DISPLAY_RT_THROTTLE_CFG, SC7180_SLAVE_DISPLAY_THROTTLE_CFG, SC7180_SLAVE_EMMC_CFG, SC7180_SLAVE_GLM, - SC7180_SLAVE_GFX3D_CFG, SC7180_SLAVE_IMEM_CFG, SC7180_SLAVE_IPA_CFG, SC7180_SLAVE_CNOC_MNOC_CFG, SC7180_SLAVE_CNOC_MSS, SC7180_SLAVE_NPU_CFG, SC7180_SLAVE_NPU_DMA_BWMON_CFG, SC7180_SLAVE_NPU_PROC_BWMON_CFG, SC7180_SLAVE_PDM, SC7180_SLAVE_PIMEM_CFG, SC7180_SLAVE_PRNG, SC7180_SLAVE_QDSS_CFG, SC7180_SLAVE_QM_CFG, SC7180_SLAVE_QM_MPU_CFG, SC7180_SLAVE_QSPI_0, SC7180_SLAVE_QUP_0, SC7180_SLAVE_QUP_1, SC7180_SLAVE_SDCC_2, SC7180_SLAVE_SECURITY, SC7180_SLAVE_SNOC_CFG, SC7180_SLAVE_TCSR, SC7180_SLAVE_TLMM_WEST, SC7180_SLAVE_TLMM_NORTH, SC7180_SLAVE_TLMM_SOUTH, SC7180_SLAVE_UFS_MEM_CFG, SC7180_SLAVE_USB3, SC7180_SLAVE_VENUS_CFG, SC7180_SLAVE_VENUS_THROTTLE_CFG, SC7180_SLAVE_VSENSE_CTRL_CFG, SC7180_SLAVE_SERVICE_CNOC); -DEFINE_QNODE(xm_qdss_dap, SC7180_MASTER_QDSS_DAP, 1, 8, SC7180_SLAVE_A1NOC_CFG, SC7180_SLAVE_A2NOC_CFG, SC7180_SLAVE_AHB2PHY_SOUTH, SC7180_SLAVE_AHB2PHY_CENTER, SC7180_SLAVE_AOP, SC7180_SLAVE_AOSS, SC7180_SLAVE_BOOT_ROM, SC7180_SLAVE_CAMERA_CFG, SC7180_SLAVE_CAMERA_NRT_THROTTLE_CFG, SC7180_SLAVE_CAMERA_RT_THROTTLE_CFG, SC7180_SLAVE_CLK_CTL, SC7180_SLAVE_RBCPR_CX_CFG, SC7180_SLAVE_RBCPR_MX_CFG, SC7180_SLAVE_CRYPTO_0_CFG, SC7180_SLAVE_DCC_CFG, SC7180_SLAVE_CNOC_DDRSS, SC7180_SLAVE_DISPLAY_CFG, SC7180_SLAVE_DISPLAY_RT_THROTTLE_CFG, SC7180_SLAVE_DISPLAY_THROTTLE_CFG, SC7180_SLAVE_EMMC_CFG, SC7180_SLAVE_GLM, SC7180_SLAVE_GFX3D_CFG, SC7180_SLAVE_IMEM_CFG, SC7180_SLAVE_IPA_CFG, SC7180_SLAVE_CNOC_MNOC_CFG, SC7180_SLAVE_CNOC_MSS, SC7180_SLAVE_NPU_CFG, SC7180_SLAVE_NPU_DMA_BWMON_CFG, -SC7180_SLAVE_NPU_PROC_BWMON_CFG, SC7180_SLAVE_PDM, SC7180_SLAVE_PIMEM_CFG, SC7180_SLAVE_PRNG, SC7180_SLAVE_QDSS_CFG, SC7180_SLAVE_QM_CFG, SC7180_SLAVE_QM_MPU_CFG, SC7180_SLAVE_QSPI_0, SC7180_SLAVE_QUP_0, SC7180_SLAVE_QUP_1, SC7180_SLAVE_SDCC_2, SC7180_SLAVE_SECURITY, SC7180_SLAVE_SNOC_CFG, SC7180_SLAVE_TCSR, SC7180_SLAVE_TLMM_WEST, SC7180_SLAVE_TLMM_NORTH, SC7180_SLAVE_TLMM_SOUTH, SC7180_SLAVE_UFS_MEM_CFG, SC7180_SLAVE_USB3, SC7180_SLAVE_VENUS_CFG, SC7180_SLAVE_VENUS_THROTTLE_CFG, SC7180_SLAVE_VSENSE_CTRL_CFG, SC7180_SLAVE_SERVICE_CNOC); -DEFINE_QNODE(qhm_cnoc_dc_noc, SC7180_MASTER_CNOC_DC_NOC, 1, 4, SC7180_SLAVE_GEM_NOC_CFG, SC7180_SLAVE_LLCC_CFG); -DEFINE_QNODE(acm_apps0, SC7180_MASTER_APPSS_PROC, 1, 16, SC7180_SLAVE_GEM_NOC_SNOC, SC7180_SLAVE_LLCC); -DEFINE_QNODE(acm_sys_tcu, SC7180_MASTER_SYS_TCU, 1, 8, SC7180_SLAVE_GEM_NOC_SNOC, SC7180_SLAVE_LLCC); -DEFINE_QNODE(qhm_gemnoc_cfg, SC7180_MASTER_GEM_NOC_CFG, 1, 4, SC7180_SLAVE_MSS_PROC_MS_MPU_CFG, SC7180_SLAVE_SERVICE_GEM_NOC); -DEFINE_QNODE(qnm_cmpnoc, SC7180_MASTER_COMPUTE_NOC, 1, 32, SC7180_SLAVE_GEM_NOC_SNOC, SC7180_SLAVE_LLCC); -DEFINE_QNODE(qnm_mnoc_hf, SC7180_MASTER_MNOC_HF_MEM_NOC, 1, 32, SC7180_SLAVE_LLCC); -DEFINE_QNODE(qnm_mnoc_sf, SC7180_MASTER_MNOC_SF_MEM_NOC, 1, 32, SC7180_SLAVE_GEM_NOC_SNOC, SC7180_SLAVE_LLCC); -DEFINE_QNODE(qnm_snoc_gc, SC7180_MASTER_SNOC_GC_MEM_NOC, 1, 8, SC7180_SLAVE_LLCC); -DEFINE_QNODE(qnm_snoc_sf, SC7180_MASTER_SNOC_SF_MEM_NOC, 1, 16, SC7180_SLAVE_LLCC); -DEFINE_QNODE(qxm_gpu, SC7180_MASTER_GFX3D, 2, 32, SC7180_SLAVE_GEM_NOC_SNOC, SC7180_SLAVE_LLCC); -DEFINE_QNODE(llcc_mc, SC7180_MASTER_LLCC, 2, 4, SC7180_SLAVE_EBI1); -DEFINE_QNODE(qhm_mnoc_cfg, SC7180_MASTER_CNOC_MNOC_CFG, 1, 4, SC7180_SLAVE_SERVICE_MNOC); -DEFINE_QNODE(qxm_camnoc_hf0, SC7180_MASTER_CAMNOC_HF0, 2, 32, SC7180_SLAVE_MNOC_HF_MEM_NOC); -DEFINE_QNODE(qxm_camnoc_hf1, SC7180_MASTER_CAMNOC_HF1, 2, 32, SC7180_SLAVE_MNOC_HF_MEM_NOC); -DEFINE_QNODE(qxm_camnoc_sf, SC7180_MASTER_CAMNOC_SF, 1, 32, SC7180_SLAVE_MNOC_SF_MEM_NOC); -DEFINE_QNODE(qxm_mdp0, SC7180_MASTER_MDP0, 1, 32, SC7180_SLAVE_MNOC_HF_MEM_NOC); -DEFINE_QNODE(qxm_rot, SC7180_MASTER_ROTATOR, 1, 16, SC7180_SLAVE_MNOC_SF_MEM_NOC); -DEFINE_QNODE(qxm_venus0, SC7180_MASTER_VIDEO_P0, 1, 32, SC7180_SLAVE_MNOC_SF_MEM_NOC); -DEFINE_QNODE(qxm_venus_arm9, SC7180_MASTER_VIDEO_PROC, 1, 8, SC7180_SLAVE_MNOC_SF_MEM_NOC); -DEFINE_QNODE(amm_npu_sys, SC7180_MASTER_NPU_SYS, 2, 32, SC7180_SLAVE_NPU_COMPUTE_NOC); -DEFINE_QNODE(qhm_npu_cfg, SC7180_MASTER_NPU_NOC_CFG, 1, 4, SC7180_SLAVE_NPU_CAL_DP0, SC7180_SLAVE_NPU_CP, SC7180_SLAVE_NPU_INT_DMA_BWMON_CFG, SC7180_SLAVE_NPU_DPM, SC7180_SLAVE_ISENSE_CFG, SC7180_SLAVE_NPU_LLM_CFG, SC7180_SLAVE_NPU_TCM, SC7180_SLAVE_SERVICE_NPU_NOC); -DEFINE_QNODE(qup_core_master_1, SC7180_MASTER_QUP_CORE_0, 1, 4, SC7180_SLAVE_QUP_CORE_0); -DEFINE_QNODE(qup_core_master_2, SC7180_MASTER_QUP_CORE_1, 1, 4, SC7180_SLAVE_QUP_CORE_1); -DEFINE_QNODE(qhm_snoc_cfg, SC7180_MASTER_SNOC_CFG, 1, 4, SC7180_SLAVE_SERVICE_SNOC); -DEFINE_QNODE(qnm_aggre1_noc, SC7180_MASTER_A1NOC_SNOC, 1, 16, SC7180_SLAVE_APPSS, SC7180_SLAVE_SNOC_CNOC, SC7180_SLAVE_SNOC_GEM_NOC_SF, SC7180_SLAVE_IMEM, SC7180_SLAVE_PIMEM, SC7180_SLAVE_QDSS_STM); -DEFINE_QNODE(qnm_aggre2_noc, SC7180_MASTER_A2NOC_SNOC, 1, 16, SC7180_SLAVE_APPSS, SC7180_SLAVE_SNOC_CNOC, SC7180_SLAVE_SNOC_GEM_NOC_SF, SC7180_SLAVE_IMEM, SC7180_SLAVE_PIMEM, SC7180_SLAVE_QDSS_STM, SC7180_SLAVE_TCU); -DEFINE_QNODE(qnm_gemnoc, SC7180_MASTER_GEM_NOC_SNOC, 1, 8, SC7180_SLAVE_APPSS, SC7180_SLAVE_SNOC_CNOC, SC7180_SLAVE_IMEM, SC7180_SLAVE_PIMEM, SC7180_SLAVE_QDSS_STM, SC7180_SLAVE_TCU); -DEFINE_QNODE(qxm_pimem, SC7180_MASTER_PIMEM, 1, 8, SC7180_SLAVE_SNOC_GEM_NOC_GC, SC7180_SLAVE_IMEM); -DEFINE_QNODE(qns_a1noc_snoc, SC7180_SLAVE_A1NOC_SNOC, 1, 16, SC7180_MASTER_A1NOC_SNOC); -DEFINE_QNODE(srvc_aggre1_noc, SC7180_SLAVE_SERVICE_A1NOC, 1, 4); -DEFINE_QNODE(qns_a2noc_snoc, SC7180_SLAVE_A2NOC_SNOC, 1, 16, SC7180_MASTER_A2NOC_SNOC); -DEFINE_QNODE(srvc_aggre2_noc, SC7180_SLAVE_SERVICE_A2NOC, 1, 4); -DEFINE_QNODE(qns_camnoc_uncomp, SC7180_SLAVE_CAMNOC_UNCOMP, 1, 32); -DEFINE_QNODE(qns_cdsp_gemnoc, SC7180_SLAVE_CDSP_GEM_NOC, 1, 32, SC7180_MASTER_COMPUTE_NOC); -DEFINE_QNODE(qhs_a1_noc_cfg, SC7180_SLAVE_A1NOC_CFG, 1, 4, SC7180_MASTER_A1NOC_CFG); -DEFINE_QNODE(qhs_a2_noc_cfg, SC7180_SLAVE_A2NOC_CFG, 1, 4, SC7180_MASTER_A2NOC_CFG); -DEFINE_QNODE(qhs_ahb2phy0, SC7180_SLAVE_AHB2PHY_SOUTH, 1, 4); -DEFINE_QNODE(qhs_ahb2phy2, SC7180_SLAVE_AHB2PHY_CENTER, 1, 4); -DEFINE_QNODE(qhs_aop, SC7180_SLAVE_AOP, 1, 4); -DEFINE_QNODE(qhs_aoss, SC7180_SLAVE_AOSS, 1, 4); -DEFINE_QNODE(qhs_boot_rom, SC7180_SLAVE_BOOT_ROM, 1, 4); -DEFINE_QNODE(qhs_camera_cfg, SC7180_SLAVE_CAMERA_CFG, 1, 4); -DEFINE_QNODE(qhs_camera_nrt_throttle_cfg, SC7180_SLAVE_CAMERA_NRT_THROTTLE_CFG, 1, 4); -DEFINE_QNODE(qhs_camera_rt_throttle_cfg, SC7180_SLAVE_CAMERA_RT_THROTTLE_CFG, 1, 4); -DEFINE_QNODE(qhs_clk_ctl, SC7180_SLAVE_CLK_CTL, 1, 4); -DEFINE_QNODE(qhs_cpr_cx, SC7180_SLAVE_RBCPR_CX_CFG, 1, 4); -DEFINE_QNODE(qhs_cpr_mx, SC7180_SLAVE_RBCPR_MX_CFG, 1, 4); -DEFINE_QNODE(qhs_crypto0_cfg, SC7180_SLAVE_CRYPTO_0_CFG, 1, 4); -DEFINE_QNODE(qhs_dcc_cfg, SC7180_SLAVE_DCC_CFG, 1, 4); -DEFINE_QNODE(qhs_ddrss_cfg, SC7180_SLAVE_CNOC_DDRSS, 1, 4, SC7180_MASTER_CNOC_DC_NOC); -DEFINE_QNODE(qhs_display_cfg, SC7180_SLAVE_DISPLAY_CFG, 1, 4); -DEFINE_QNODE(qhs_display_rt_throttle_cfg, SC7180_SLAVE_DISPLAY_RT_THROTTLE_CFG, 1, 4); -DEFINE_QNODE(qhs_display_throttle_cfg, SC7180_SLAVE_DISPLAY_THROTTLE_CFG, 1, 4); -DEFINE_QNODE(qhs_emmc_cfg, SC7180_SLAVE_EMMC_CFG, 1, 4); -DEFINE_QNODE(qhs_glm, SC7180_SLAVE_GLM, 1, 4); -DEFINE_QNODE(qhs_gpuss_cfg, SC7180_SLAVE_GFX3D_CFG, 1, 8); -DEFINE_QNODE(qhs_imem_cfg, SC7180_SLAVE_IMEM_CFG, 1, 4); -DEFINE_QNODE(qhs_ipa, SC7180_SLAVE_IPA_CFG, 1, 4); -DEFINE_QNODE(qhs_mnoc_cfg, SC7180_SLAVE_CNOC_MNOC_CFG, 1, 4, SC7180_MASTER_CNOC_MNOC_CFG); -DEFINE_QNODE(qhs_mss_cfg, SC7180_SLAVE_CNOC_MSS, 1, 4); -DEFINE_QNODE(qhs_npu_cfg, SC7180_SLAVE_NPU_CFG, 1, 4, SC7180_MASTER_NPU_NOC_CFG); -DEFINE_QNODE(qhs_npu_dma_throttle_cfg, SC7180_SLAVE_NPU_DMA_BWMON_CFG, 1, 4); -DEFINE_QNODE(qhs_npu_dsp_throttle_cfg, SC7180_SLAVE_NPU_PROC_BWMON_CFG, 1, 4); -DEFINE_QNODE(qhs_pdm, SC7180_SLAVE_PDM, 1, 4); -DEFINE_QNODE(qhs_pimem_cfg, SC7180_SLAVE_PIMEM_CFG, 1, 4); -DEFINE_QNODE(qhs_prng, SC7180_SLAVE_PRNG, 1, 4); -DEFINE_QNODE(qhs_qdss_cfg, SC7180_SLAVE_QDSS_CFG, 1, 4); -DEFINE_QNODE(qhs_qm_cfg, SC7180_SLAVE_QM_CFG, 1, 4); -DEFINE_QNODE(qhs_qm_mpu_cfg, SC7180_SLAVE_QM_MPU_CFG, 1, 4); -DEFINE_QNODE(qhs_qspi, SC7180_SLAVE_QSPI_0, 1, 4); -DEFINE_QNODE(qhs_qup0, SC7180_SLAVE_QUP_0, 1, 4); -DEFINE_QNODE(qhs_qup1, SC7180_SLAVE_QUP_1, 1, 4); -DEFINE_QNODE(qhs_sdc2, SC7180_SLAVE_SDCC_2, 1, 4); -DEFINE_QNODE(qhs_security, SC7180_SLAVE_SECURITY, 1, 4); -DEFINE_QNODE(qhs_snoc_cfg, SC7180_SLAVE_SNOC_CFG, 1, 4, SC7180_MASTER_SNOC_CFG); -DEFINE_QNODE(qhs_tcsr, SC7180_SLAVE_TCSR, 1, 4); -DEFINE_QNODE(qhs_tlmm_1, SC7180_SLAVE_TLMM_WEST, 1, 4); -DEFINE_QNODE(qhs_tlmm_2, SC7180_SLAVE_TLMM_NORTH, 1, 4); -DEFINE_QNODE(qhs_tlmm_3, SC7180_SLAVE_TLMM_SOUTH, 1, 4); -DEFINE_QNODE(qhs_ufs_mem_cfg, SC7180_SLAVE_UFS_MEM_CFG, 1, 4); -DEFINE_QNODE(qhs_usb3, SC7180_SLAVE_USB3, 1, 4); -DEFINE_QNODE(qhs_venus_cfg, SC7180_SLAVE_VENUS_CFG, 1, 4); -DEFINE_QNODE(qhs_venus_throttle_cfg, SC7180_SLAVE_VENUS_THROTTLE_CFG, 1, 4); -DEFINE_QNODE(qhs_vsense_ctrl_cfg, SC7180_SLAVE_VSENSE_CTRL_CFG, 1, 4); -DEFINE_QNODE(srvc_cnoc, SC7180_SLAVE_SERVICE_CNOC, 1, 4); -DEFINE_QNODE(qhs_gemnoc, SC7180_SLAVE_GEM_NOC_CFG, 1, 4, SC7180_MASTER_GEM_NOC_CFG); -DEFINE_QNODE(qhs_llcc, SC7180_SLAVE_LLCC_CFG, 1, 4); -DEFINE_QNODE(qhs_mdsp_ms_mpu_cfg, SC7180_SLAVE_MSS_PROC_MS_MPU_CFG, 1, 4); -DEFINE_QNODE(qns_gem_noc_snoc, SC7180_SLAVE_GEM_NOC_SNOC, 1, 8, SC7180_MASTER_GEM_NOC_SNOC); -DEFINE_QNODE(qns_llcc, SC7180_SLAVE_LLCC, 1, 16, SC7180_MASTER_LLCC); -DEFINE_QNODE(srvc_gemnoc, SC7180_SLAVE_SERVICE_GEM_NOC, 1, 4); -DEFINE_QNODE(ebi, SC7180_SLAVE_EBI1, 2, 4); -DEFINE_QNODE(qns_mem_noc_hf, SC7180_SLAVE_MNOC_HF_MEM_NOC, 1, 32, SC7180_MASTER_MNOC_HF_MEM_NOC); -DEFINE_QNODE(qns_mem_noc_sf, SC7180_SLAVE_MNOC_SF_MEM_NOC, 1, 32, SC7180_MASTER_MNOC_SF_MEM_NOC); -DEFINE_QNODE(srvc_mnoc, SC7180_SLAVE_SERVICE_MNOC, 1, 4); -DEFINE_QNODE(qhs_cal_dp0, SC7180_SLAVE_NPU_CAL_DP0, 1, 4); -DEFINE_QNODE(qhs_cp, SC7180_SLAVE_NPU_CP, 1, 4); -DEFINE_QNODE(qhs_dma_bwmon, SC7180_SLAVE_NPU_INT_DMA_BWMON_CFG, 1, 4); -DEFINE_QNODE(qhs_dpm, SC7180_SLAVE_NPU_DPM, 1, 4); -DEFINE_QNODE(qhs_isense, SC7180_SLAVE_ISENSE_CFG, 1, 4); -DEFINE_QNODE(qhs_llm, SC7180_SLAVE_NPU_LLM_CFG, 1, 4); -DEFINE_QNODE(qhs_tcm, SC7180_SLAVE_NPU_TCM, 1, 4); -DEFINE_QNODE(qns_npu_sys, SC7180_SLAVE_NPU_COMPUTE_NOC, 2, 32); -DEFINE_QNODE(srvc_noc, SC7180_SLAVE_SERVICE_NPU_NOC, 1, 4); -DEFINE_QNODE(qup_core_slave_1, SC7180_SLAVE_QUP_CORE_0, 1, 4); -DEFINE_QNODE(qup_core_slave_2, SC7180_SLAVE_QUP_CORE_1, 1, 4); -DEFINE_QNODE(qhs_apss, SC7180_SLAVE_APPSS, 1, 8); -DEFINE_QNODE(qns_cnoc, SC7180_SLAVE_SNOC_CNOC, 1, 8, SC7180_MASTER_SNOC_CNOC); -DEFINE_QNODE(qns_gemnoc_gc, SC7180_SLAVE_SNOC_GEM_NOC_GC, 1, 8, SC7180_MASTER_SNOC_GC_MEM_NOC); -DEFINE_QNODE(qns_gemnoc_sf, SC7180_SLAVE_SNOC_GEM_NOC_SF, 1, 16, SC7180_MASTER_SNOC_SF_MEM_NOC); -DEFINE_QNODE(qxs_imem, SC7180_SLAVE_IMEM, 1, 8); -DEFINE_QNODE(qxs_pimem, SC7180_SLAVE_PIMEM, 1, 8); -DEFINE_QNODE(srvc_snoc, SC7180_SLAVE_SERVICE_SNOC, 1, 4); -DEFINE_QNODE(xs_qdss_stm, SC7180_SLAVE_QDSS_STM, 1, 4); -DEFINE_QNODE(xs_sys_tcu_cfg, SC7180_SLAVE_TCU, 1, 8); +static struct qcom_icc_node qhm_a1noc_cfg = { + .name = "qhm_a1noc_cfg", + .id = SC7180_MASTER_A1NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SC7180_SLAVE_SERVICE_A1NOC }, +}; -DEFINE_QBCM(bcm_acv, "ACV", false, &ebi); -DEFINE_QBCM(bcm_mc0, "MC0", true, &ebi); -DEFINE_QBCM(bcm_sh0, "SH0", true, &qns_llcc); -DEFINE_QBCM(bcm_mm0, "MM0", false, &qns_mem_noc_hf); -DEFINE_QBCM(bcm_ce0, "CE0", false, &qxm_crypto); -DEFINE_QBCM(bcm_cn0, "CN0", true, &qnm_snoc, &xm_qdss_dap, &qhs_a1_noc_cfg, &qhs_a2_noc_cfg, &qhs_ahb2phy0, &qhs_aop, &qhs_aoss, &qhs_boot_rom, &qhs_camera_cfg, &qhs_camera_nrt_throttle_cfg, &qhs_camera_rt_throttle_cfg, &qhs_clk_ctl, &qhs_cpr_cx, &qhs_cpr_mx, &qhs_crypto0_cfg, &qhs_dcc_cfg, &qhs_ddrss_cfg, &qhs_display_cfg, &qhs_display_rt_throttle_cfg, &qhs_display_throttle_cfg, &qhs_glm, &qhs_gpuss_cfg, &qhs_imem_cfg, &qhs_ipa, &qhs_mnoc_cfg, &qhs_mss_cfg, &qhs_npu_cfg, &qhs_npu_dma_throttle_cfg, &qhs_npu_dsp_throttle_cfg, &qhs_pimem_cfg, &qhs_prng, &qhs_qdss_cfg, &qhs_qm_cfg, &qhs_qm_mpu_cfg, &qhs_qup0, &qhs_qup1, &qhs_security, &qhs_snoc_cfg, &qhs_tcsr, &qhs_tlmm_1, &qhs_tlmm_2, &qhs_tlmm_3, &qhs_ufs_mem_cfg, &qhs_usb3, &qhs_venus_cfg, &qhs_venus_throttle_cfg, &qhs_vsense_ctrl_cfg, &srvc_cnoc); -DEFINE_QBCM(bcm_mm1, "MM1", false, &qxm_camnoc_hf0_uncomp, &qxm_camnoc_hf1_uncomp, &qxm_camnoc_sf_uncomp, &qhm_mnoc_cfg, &qxm_mdp0, &qxm_rot, &qxm_venus0, &qxm_venus_arm9); -DEFINE_QBCM(bcm_sh2, "SH2", false, &acm_sys_tcu); -DEFINE_QBCM(bcm_mm2, "MM2", false, &qns_mem_noc_sf); -DEFINE_QBCM(bcm_qup0, "QUP0", false, &qup_core_master_1, &qup_core_master_2); -DEFINE_QBCM(bcm_sh3, "SH3", false, &qnm_cmpnoc); -DEFINE_QBCM(bcm_sh4, "SH4", false, &acm_apps0); -DEFINE_QBCM(bcm_sn0, "SN0", true, &qns_gemnoc_sf); -DEFINE_QBCM(bcm_co0, "CO0", false, &qns_cdsp_gemnoc); -DEFINE_QBCM(bcm_sn1, "SN1", false, &qxs_imem); -DEFINE_QBCM(bcm_cn1, "CN1", false, &qhm_qspi, &xm_sdc2, &xm_emmc, &qhs_ahb2phy2, &qhs_emmc_cfg, &qhs_pdm, &qhs_qspi, &qhs_sdc2); -DEFINE_QBCM(bcm_sn2, "SN2", false, &qxm_pimem, &qns_gemnoc_gc); -DEFINE_QBCM(bcm_co2, "CO2", false, &qnm_npu); -DEFINE_QBCM(bcm_sn3, "SN3", false, &qxs_pimem); -DEFINE_QBCM(bcm_co3, "CO3", false, &qxm_npu_dsp); -DEFINE_QBCM(bcm_sn4, "SN4", false, &xs_qdss_stm); -DEFINE_QBCM(bcm_sn7, "SN7", false, &qnm_aggre1_noc); -DEFINE_QBCM(bcm_sn9, "SN9", false, &qnm_aggre2_noc); -DEFINE_QBCM(bcm_sn12, "SN12", false, &qnm_gemnoc); +static struct qcom_icc_node qhm_qspi = { + .name = "qhm_qspi", + .id = SC7180_MASTER_QSPI, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SC7180_SLAVE_A1NOC_SNOC }, +}; + +static struct qcom_icc_node qhm_qup_0 = { + .name = "qhm_qup_0", + .id = SC7180_MASTER_QUP_0, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SC7180_SLAVE_A1NOC_SNOC }, +}; + +static struct qcom_icc_node xm_sdc2 = { + .name = "xm_sdc2", + .id = SC7180_MASTER_SDCC_2, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SC7180_SLAVE_A1NOC_SNOC }, +}; + +static struct qcom_icc_node xm_emmc = { + .name = "xm_emmc", + .id = SC7180_MASTER_EMMC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SC7180_SLAVE_A1NOC_SNOC }, +}; + +static struct qcom_icc_node xm_ufs_mem = { + .name = "xm_ufs_mem", + .id = SC7180_MASTER_UFS_MEM, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SC7180_SLAVE_A1NOC_SNOC }, +}; + +static struct qcom_icc_node qhm_a2noc_cfg = { + .name = "qhm_a2noc_cfg", + .id = SC7180_MASTER_A2NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SC7180_SLAVE_SERVICE_A2NOC }, +}; + +static struct qcom_icc_node qhm_qdss_bam = { + .name = "qhm_qdss_bam", + .id = SC7180_MASTER_QDSS_BAM, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SC7180_SLAVE_A2NOC_SNOC }, +}; + +static struct qcom_icc_node qhm_qup_1 = { + .name = "qhm_qup_1", + .id = SC7180_MASTER_QUP_1, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SC7180_SLAVE_A2NOC_SNOC }, +}; + +static struct qcom_icc_node qxm_crypto = { + .name = "qxm_crypto", + .id = SC7180_MASTER_CRYPTO, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SC7180_SLAVE_A2NOC_SNOC }, +}; + +static struct qcom_icc_node qxm_ipa = { + .name = "qxm_ipa", + .id = SC7180_MASTER_IPA, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SC7180_SLAVE_A2NOC_SNOC }, +}; + +static struct qcom_icc_node xm_qdss_etr = { + .name = "xm_qdss_etr", + .id = SC7180_MASTER_QDSS_ETR, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SC7180_SLAVE_A2NOC_SNOC }, +}; + +static struct qcom_icc_node qhm_usb3 = { + .name = "qhm_usb3", + .id = SC7180_MASTER_USB3, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SC7180_SLAVE_A2NOC_SNOC }, +}; + +static struct qcom_icc_node qxm_camnoc_hf0_uncomp = { + .name = "qxm_camnoc_hf0_uncomp", + .id = SC7180_MASTER_CAMNOC_HF0_UNCOMP, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SC7180_SLAVE_CAMNOC_UNCOMP }, +}; + +static struct qcom_icc_node qxm_camnoc_hf1_uncomp = { + .name = "qxm_camnoc_hf1_uncomp", + .id = SC7180_MASTER_CAMNOC_HF1_UNCOMP, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SC7180_SLAVE_CAMNOC_UNCOMP }, +}; + +static struct qcom_icc_node qxm_camnoc_sf_uncomp = { + .name = "qxm_camnoc_sf_uncomp", + .id = SC7180_MASTER_CAMNOC_SF_UNCOMP, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SC7180_SLAVE_CAMNOC_UNCOMP }, +}; + +static struct qcom_icc_node qnm_npu = { + .name = "qnm_npu", + .id = SC7180_MASTER_NPU, + .channels = 2, + .buswidth = 32, + .num_links = 1, + .links = { SC7180_SLAVE_CDSP_GEM_NOC }, +}; + +static struct qcom_icc_node qxm_npu_dsp = { + .name = "qxm_npu_dsp", + .id = SC7180_MASTER_NPU_PROC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SC7180_SLAVE_CDSP_GEM_NOC }, +}; + +static struct qcom_icc_node qnm_snoc = { + .name = "qnm_snoc", + .id = SC7180_MASTER_SNOC_CNOC, + .channels = 1, + .buswidth = 8, + .num_links = 51, + .links = { SC7180_SLAVE_A1NOC_CFG, + SC7180_SLAVE_A2NOC_CFG, + SC7180_SLAVE_AHB2PHY_SOUTH, + SC7180_SLAVE_AHB2PHY_CENTER, + SC7180_SLAVE_AOP, + SC7180_SLAVE_AOSS, + SC7180_SLAVE_BOOT_ROM, + SC7180_SLAVE_CAMERA_CFG, + SC7180_SLAVE_CAMERA_NRT_THROTTLE_CFG, + SC7180_SLAVE_CAMERA_RT_THROTTLE_CFG, + SC7180_SLAVE_CLK_CTL, + SC7180_SLAVE_RBCPR_CX_CFG, + SC7180_SLAVE_RBCPR_MX_CFG, + SC7180_SLAVE_CRYPTO_0_CFG, + SC7180_SLAVE_DCC_CFG, + SC7180_SLAVE_CNOC_DDRSS, + SC7180_SLAVE_DISPLAY_CFG, + SC7180_SLAVE_DISPLAY_RT_THROTTLE_CFG, + SC7180_SLAVE_DISPLAY_THROTTLE_CFG, + SC7180_SLAVE_EMMC_CFG, + SC7180_SLAVE_GLM, + SC7180_SLAVE_GFX3D_CFG, + SC7180_SLAVE_IMEM_CFG, + SC7180_SLAVE_IPA_CFG, + SC7180_SLAVE_CNOC_MNOC_CFG, + SC7180_SLAVE_CNOC_MSS, + SC7180_SLAVE_NPU_CFG, + SC7180_SLAVE_NPU_DMA_BWMON_CFG, + SC7180_SLAVE_NPU_PROC_BWMON_CFG, + SC7180_SLAVE_PDM, + SC7180_SLAVE_PIMEM_CFG, + SC7180_SLAVE_PRNG, + SC7180_SLAVE_QDSS_CFG, + SC7180_SLAVE_QM_CFG, + SC7180_SLAVE_QM_MPU_CFG, + SC7180_SLAVE_QSPI_0, + SC7180_SLAVE_QUP_0, + SC7180_SLAVE_QUP_1, + SC7180_SLAVE_SDCC_2, + SC7180_SLAVE_SECURITY, + SC7180_SLAVE_SNOC_CFG, + SC7180_SLAVE_TCSR, + SC7180_SLAVE_TLMM_WEST, + SC7180_SLAVE_TLMM_NORTH, + SC7180_SLAVE_TLMM_SOUTH, + SC7180_SLAVE_UFS_MEM_CFG, + SC7180_SLAVE_USB3, + SC7180_SLAVE_VENUS_CFG, + SC7180_SLAVE_VENUS_THROTTLE_CFG, + SC7180_SLAVE_VSENSE_CTRL_CFG, + SC7180_SLAVE_SERVICE_CNOC + }, +}; + +static struct qcom_icc_node xm_qdss_dap = { + .name = "xm_qdss_dap", + .id = SC7180_MASTER_QDSS_DAP, + .channels = 1, + .buswidth = 8, + .num_links = 51, + .links = { SC7180_SLAVE_A1NOC_CFG, + SC7180_SLAVE_A2NOC_CFG, + SC7180_SLAVE_AHB2PHY_SOUTH, + SC7180_SLAVE_AHB2PHY_CENTER, + SC7180_SLAVE_AOP, + SC7180_SLAVE_AOSS, + SC7180_SLAVE_BOOT_ROM, + SC7180_SLAVE_CAMERA_CFG, + SC7180_SLAVE_CAMERA_NRT_THROTTLE_CFG, + SC7180_SLAVE_CAMERA_RT_THROTTLE_CFG, + SC7180_SLAVE_CLK_CTL, + SC7180_SLAVE_RBCPR_CX_CFG, + SC7180_SLAVE_RBCPR_MX_CFG, + SC7180_SLAVE_CRYPTO_0_CFG, + SC7180_SLAVE_DCC_CFG, + SC7180_SLAVE_CNOC_DDRSS, + SC7180_SLAVE_DISPLAY_CFG, + SC7180_SLAVE_DISPLAY_RT_THROTTLE_CFG, + SC7180_SLAVE_DISPLAY_THROTTLE_CFG, + SC7180_SLAVE_EMMC_CFG, + SC7180_SLAVE_GLM, + SC7180_SLAVE_GFX3D_CFG, + SC7180_SLAVE_IMEM_CFG, + SC7180_SLAVE_IPA_CFG, + SC7180_SLAVE_CNOC_MNOC_CFG, + SC7180_SLAVE_CNOC_MSS, + SC7180_SLAVE_NPU_CFG, + SC7180_SLAVE_NPU_DMA_BWMON_CFG, + SC7180_SLAVE_NPU_PROC_BWMON_CFG, + SC7180_SLAVE_PDM, + SC7180_SLAVE_PIMEM_CFG, + SC7180_SLAVE_PRNG, + SC7180_SLAVE_QDSS_CFG, + SC7180_SLAVE_QM_CFG, + SC7180_SLAVE_QM_MPU_CFG, + SC7180_SLAVE_QSPI_0, + SC7180_SLAVE_QUP_0, + SC7180_SLAVE_QUP_1, + SC7180_SLAVE_SDCC_2, + SC7180_SLAVE_SECURITY, + SC7180_SLAVE_SNOC_CFG, + SC7180_SLAVE_TCSR, + SC7180_SLAVE_TLMM_WEST, + SC7180_SLAVE_TLMM_NORTH, + SC7180_SLAVE_TLMM_SOUTH, + SC7180_SLAVE_UFS_MEM_CFG, + SC7180_SLAVE_USB3, + SC7180_SLAVE_VENUS_CFG, + SC7180_SLAVE_VENUS_THROTTLE_CFG, + SC7180_SLAVE_VSENSE_CTRL_CFG, + SC7180_SLAVE_SERVICE_CNOC + }, +}; + +static struct qcom_icc_node qhm_cnoc_dc_noc = { + .name = "qhm_cnoc_dc_noc", + .id = SC7180_MASTER_CNOC_DC_NOC, + .channels = 1, + .buswidth = 4, + .num_links = 2, + .links = { SC7180_SLAVE_GEM_NOC_CFG, + SC7180_SLAVE_LLCC_CFG + }, +}; + +static struct qcom_icc_node acm_apps0 = { + .name = "acm_apps0", + .id = SC7180_MASTER_APPSS_PROC, + .channels = 1, + .buswidth = 16, + .num_links = 2, + .links = { SC7180_SLAVE_GEM_NOC_SNOC, + SC7180_SLAVE_LLCC + }, +}; + +static struct qcom_icc_node acm_sys_tcu = { + .name = "acm_sys_tcu", + .id = SC7180_MASTER_SYS_TCU, + .channels = 1, + .buswidth = 8, + .num_links = 2, + .links = { SC7180_SLAVE_GEM_NOC_SNOC, + SC7180_SLAVE_LLCC + }, +}; + +static struct qcom_icc_node qhm_gemnoc_cfg = { + .name = "qhm_gemnoc_cfg", + .id = SC7180_MASTER_GEM_NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 2, + .links = { SC7180_SLAVE_MSS_PROC_MS_MPU_CFG, + SC7180_SLAVE_SERVICE_GEM_NOC + }, +}; + +static struct qcom_icc_node qnm_cmpnoc = { + .name = "qnm_cmpnoc", + .id = SC7180_MASTER_COMPUTE_NOC, + .channels = 1, + .buswidth = 32, + .num_links = 2, + .links = { SC7180_SLAVE_GEM_NOC_SNOC, + SC7180_SLAVE_LLCC + }, +}; + +static struct qcom_icc_node qnm_mnoc_hf = { + .name = "qnm_mnoc_hf", + .id = SC7180_MASTER_MNOC_HF_MEM_NOC, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SC7180_SLAVE_LLCC }, +}; + +static struct qcom_icc_node qnm_mnoc_sf = { + .name = "qnm_mnoc_sf", + .id = SC7180_MASTER_MNOC_SF_MEM_NOC, + .channels = 1, + .buswidth = 32, + .num_links = 2, + .links = { SC7180_SLAVE_GEM_NOC_SNOC, + SC7180_SLAVE_LLCC + }, +}; + +static struct qcom_icc_node qnm_snoc_gc = { + .name = "qnm_snoc_gc", + .id = SC7180_MASTER_SNOC_GC_MEM_NOC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SC7180_SLAVE_LLCC }, +}; + +static struct qcom_icc_node qnm_snoc_sf = { + .name = "qnm_snoc_sf", + .id = SC7180_MASTER_SNOC_SF_MEM_NOC, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SC7180_SLAVE_LLCC }, +}; + +static struct qcom_icc_node qxm_gpu = { + .name = "qxm_gpu", + .id = SC7180_MASTER_GFX3D, + .channels = 2, + .buswidth = 32, + .num_links = 2, + .links = { SC7180_SLAVE_GEM_NOC_SNOC, + SC7180_SLAVE_LLCC + }, +}; + +static struct qcom_icc_node llcc_mc = { + .name = "llcc_mc", + .id = SC7180_MASTER_LLCC, + .channels = 2, + .buswidth = 4, + .num_links = 1, + .links = { SC7180_SLAVE_EBI1 }, +}; + +static struct qcom_icc_node qhm_mnoc_cfg = { + .name = "qhm_mnoc_cfg", + .id = SC7180_MASTER_CNOC_MNOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SC7180_SLAVE_SERVICE_MNOC }, +}; + +static struct qcom_icc_node qxm_camnoc_hf0 = { + .name = "qxm_camnoc_hf0", + .id = SC7180_MASTER_CAMNOC_HF0, + .channels = 2, + .buswidth = 32, + .num_links = 1, + .links = { SC7180_SLAVE_MNOC_HF_MEM_NOC }, +}; + +static struct qcom_icc_node qxm_camnoc_hf1 = { + .name = "qxm_camnoc_hf1", + .id = SC7180_MASTER_CAMNOC_HF1, + .channels = 2, + .buswidth = 32, + .num_links = 1, + .links = { SC7180_SLAVE_MNOC_HF_MEM_NOC }, +}; + +static struct qcom_icc_node qxm_camnoc_sf = { + .name = "qxm_camnoc_sf", + .id = SC7180_MASTER_CAMNOC_SF, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SC7180_SLAVE_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qxm_mdp0 = { + .name = "qxm_mdp0", + .id = SC7180_MASTER_MDP0, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SC7180_SLAVE_MNOC_HF_MEM_NOC }, +}; + +static struct qcom_icc_node qxm_rot = { + .name = "qxm_rot", + .id = SC7180_MASTER_ROTATOR, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SC7180_SLAVE_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qxm_venus0 = { + .name = "qxm_venus0", + .id = SC7180_MASTER_VIDEO_P0, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SC7180_SLAVE_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qxm_venus_arm9 = { + .name = "qxm_venus_arm9", + .id = SC7180_MASTER_VIDEO_PROC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SC7180_SLAVE_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node amm_npu_sys = { + .name = "amm_npu_sys", + .id = SC7180_MASTER_NPU_SYS, + .channels = 2, + .buswidth = 32, + .num_links = 1, + .links = { SC7180_SLAVE_NPU_COMPUTE_NOC }, +}; + +static struct qcom_icc_node qhm_npu_cfg = { + .name = "qhm_npu_cfg", + .id = SC7180_MASTER_NPU_NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 8, + .links = { SC7180_SLAVE_NPU_CAL_DP0, + SC7180_SLAVE_NPU_CP, + SC7180_SLAVE_NPU_INT_DMA_BWMON_CFG, + SC7180_SLAVE_NPU_DPM, + SC7180_SLAVE_ISENSE_CFG, + SC7180_SLAVE_NPU_LLM_CFG, + SC7180_SLAVE_NPU_TCM, + SC7180_SLAVE_SERVICE_NPU_NOC + }, +}; + +static struct qcom_icc_node qup_core_master_1 = { + .name = "qup_core_master_1", + .id = SC7180_MASTER_QUP_CORE_0, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SC7180_SLAVE_QUP_CORE_0 }, +}; + +static struct qcom_icc_node qup_core_master_2 = { + .name = "qup_core_master_2", + .id = SC7180_MASTER_QUP_CORE_1, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SC7180_SLAVE_QUP_CORE_1 }, +}; + +static struct qcom_icc_node qhm_snoc_cfg = { + .name = "qhm_snoc_cfg", + .id = SC7180_MASTER_SNOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SC7180_SLAVE_SERVICE_SNOC }, +}; + +static struct qcom_icc_node qnm_aggre1_noc = { + .name = "qnm_aggre1_noc", + .id = SC7180_MASTER_A1NOC_SNOC, + .channels = 1, + .buswidth = 16, + .num_links = 6, + .links = { SC7180_SLAVE_APPSS, + SC7180_SLAVE_SNOC_CNOC, + SC7180_SLAVE_SNOC_GEM_NOC_SF, + SC7180_SLAVE_IMEM, + SC7180_SLAVE_PIMEM, + SC7180_SLAVE_QDSS_STM + }, +}; + +static struct qcom_icc_node qnm_aggre2_noc = { + .name = "qnm_aggre2_noc", + .id = SC7180_MASTER_A2NOC_SNOC, + .channels = 1, + .buswidth = 16, + .num_links = 7, + .links = { SC7180_SLAVE_APPSS, + SC7180_SLAVE_SNOC_CNOC, + SC7180_SLAVE_SNOC_GEM_NOC_SF, + SC7180_SLAVE_IMEM, + SC7180_SLAVE_PIMEM, + SC7180_SLAVE_QDSS_STM, + SC7180_SLAVE_TCU + }, +}; + +static struct qcom_icc_node qnm_gemnoc = { + .name = "qnm_gemnoc", + .id = SC7180_MASTER_GEM_NOC_SNOC, + .channels = 1, + .buswidth = 8, + .num_links = 6, + .links = { SC7180_SLAVE_APPSS, + SC7180_SLAVE_SNOC_CNOC, + SC7180_SLAVE_IMEM, + SC7180_SLAVE_PIMEM, + SC7180_SLAVE_QDSS_STM, + SC7180_SLAVE_TCU + }, +}; + +static struct qcom_icc_node qxm_pimem = { + .name = "qxm_pimem", + .id = SC7180_MASTER_PIMEM, + .channels = 1, + .buswidth = 8, + .num_links = 2, + .links = { SC7180_SLAVE_SNOC_GEM_NOC_GC, + SC7180_SLAVE_IMEM + }, +}; + +static struct qcom_icc_node qns_a1noc_snoc = { + .name = "qns_a1noc_snoc", + .id = SC7180_SLAVE_A1NOC_SNOC, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SC7180_MASTER_A1NOC_SNOC }, +}; + +static struct qcom_icc_node srvc_aggre1_noc = { + .name = "srvc_aggre1_noc", + .id = SC7180_SLAVE_SERVICE_A1NOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_a2noc_snoc = { + .name = "qns_a2noc_snoc", + .id = SC7180_SLAVE_A2NOC_SNOC, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SC7180_MASTER_A2NOC_SNOC }, +}; + +static struct qcom_icc_node srvc_aggre2_noc = { + .name = "srvc_aggre2_noc", + .id = SC7180_SLAVE_SERVICE_A2NOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_camnoc_uncomp = { + .name = "qns_camnoc_uncomp", + .id = SC7180_SLAVE_CAMNOC_UNCOMP, + .channels = 1, + .buswidth = 32, +}; + +static struct qcom_icc_node qns_cdsp_gemnoc = { + .name = "qns_cdsp_gemnoc", + .id = SC7180_SLAVE_CDSP_GEM_NOC, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SC7180_MASTER_COMPUTE_NOC }, +}; + +static struct qcom_icc_node qhs_a1_noc_cfg = { + .name = "qhs_a1_noc_cfg", + .id = SC7180_SLAVE_A1NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SC7180_MASTER_A1NOC_CFG }, +}; + +static struct qcom_icc_node qhs_a2_noc_cfg = { + .name = "qhs_a2_noc_cfg", + .id = SC7180_SLAVE_A2NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SC7180_MASTER_A2NOC_CFG }, +}; + +static struct qcom_icc_node qhs_ahb2phy0 = { + .name = "qhs_ahb2phy0", + .id = SC7180_SLAVE_AHB2PHY_SOUTH, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_ahb2phy2 = { + .name = "qhs_ahb2phy2", + .id = SC7180_SLAVE_AHB2PHY_CENTER, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_aop = { + .name = "qhs_aop", + .id = SC7180_SLAVE_AOP, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_aoss = { + .name = "qhs_aoss", + .id = SC7180_SLAVE_AOSS, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_boot_rom = { + .name = "qhs_boot_rom", + .id = SC7180_SLAVE_BOOT_ROM, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_camera_cfg = { + .name = "qhs_camera_cfg", + .id = SC7180_SLAVE_CAMERA_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_camera_nrt_throttle_cfg = { + .name = "qhs_camera_nrt_throttle_cfg", + .id = SC7180_SLAVE_CAMERA_NRT_THROTTLE_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_camera_rt_throttle_cfg = { + .name = "qhs_camera_rt_throttle_cfg", + .id = SC7180_SLAVE_CAMERA_RT_THROTTLE_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_clk_ctl = { + .name = "qhs_clk_ctl", + .id = SC7180_SLAVE_CLK_CTL, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_cpr_cx = { + .name = "qhs_cpr_cx", + .id = SC7180_SLAVE_RBCPR_CX_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_cpr_mx = { + .name = "qhs_cpr_mx", + .id = SC7180_SLAVE_RBCPR_MX_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_crypto0_cfg = { + .name = "qhs_crypto0_cfg", + .id = SC7180_SLAVE_CRYPTO_0_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_dcc_cfg = { + .name = "qhs_dcc_cfg", + .id = SC7180_SLAVE_DCC_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_ddrss_cfg = { + .name = "qhs_ddrss_cfg", + .id = SC7180_SLAVE_CNOC_DDRSS, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SC7180_MASTER_CNOC_DC_NOC }, +}; + +static struct qcom_icc_node qhs_display_cfg = { + .name = "qhs_display_cfg", + .id = SC7180_SLAVE_DISPLAY_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_display_rt_throttle_cfg = { + .name = "qhs_display_rt_throttle_cfg", + .id = SC7180_SLAVE_DISPLAY_RT_THROTTLE_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_display_throttle_cfg = { + .name = "qhs_display_throttle_cfg", + .id = SC7180_SLAVE_DISPLAY_THROTTLE_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_emmc_cfg = { + .name = "qhs_emmc_cfg", + .id = SC7180_SLAVE_EMMC_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_glm = { + .name = "qhs_glm", + .id = SC7180_SLAVE_GLM, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_gpuss_cfg = { + .name = "qhs_gpuss_cfg", + .id = SC7180_SLAVE_GFX3D_CFG, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node qhs_imem_cfg = { + .name = "qhs_imem_cfg", + .id = SC7180_SLAVE_IMEM_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_ipa = { + .name = "qhs_ipa", + .id = SC7180_SLAVE_IPA_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_mnoc_cfg = { + .name = "qhs_mnoc_cfg", + .id = SC7180_SLAVE_CNOC_MNOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SC7180_MASTER_CNOC_MNOC_CFG }, +}; + +static struct qcom_icc_node qhs_mss_cfg = { + .name = "qhs_mss_cfg", + .id = SC7180_SLAVE_CNOC_MSS, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_npu_cfg = { + .name = "qhs_npu_cfg", + .id = SC7180_SLAVE_NPU_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SC7180_MASTER_NPU_NOC_CFG }, +}; + +static struct qcom_icc_node qhs_npu_dma_throttle_cfg = { + .name = "qhs_npu_dma_throttle_cfg", + .id = SC7180_SLAVE_NPU_DMA_BWMON_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_npu_dsp_throttle_cfg = { + .name = "qhs_npu_dsp_throttle_cfg", + .id = SC7180_SLAVE_NPU_PROC_BWMON_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_pdm = { + .name = "qhs_pdm", + .id = SC7180_SLAVE_PDM, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_pimem_cfg = { + .name = "qhs_pimem_cfg", + .id = SC7180_SLAVE_PIMEM_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_prng = { + .name = "qhs_prng", + .id = SC7180_SLAVE_PRNG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_qdss_cfg = { + .name = "qhs_qdss_cfg", + .id = SC7180_SLAVE_QDSS_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_qm_cfg = { + .name = "qhs_qm_cfg", + .id = SC7180_SLAVE_QM_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_qm_mpu_cfg = { + .name = "qhs_qm_mpu_cfg", + .id = SC7180_SLAVE_QM_MPU_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_qspi = { + .name = "qhs_qspi", + .id = SC7180_SLAVE_QSPI_0, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_qup0 = { + .name = "qhs_qup0", + .id = SC7180_SLAVE_QUP_0, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_qup1 = { + .name = "qhs_qup1", + .id = SC7180_SLAVE_QUP_1, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_sdc2 = { + .name = "qhs_sdc2", + .id = SC7180_SLAVE_SDCC_2, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_security = { + .name = "qhs_security", + .id = SC7180_SLAVE_SECURITY, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_snoc_cfg = { + .name = "qhs_snoc_cfg", + .id = SC7180_SLAVE_SNOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SC7180_MASTER_SNOC_CFG }, +}; + +static struct qcom_icc_node qhs_tcsr = { + .name = "qhs_tcsr", + .id = SC7180_SLAVE_TCSR, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_tlmm_1 = { + .name = "qhs_tlmm_1", + .id = SC7180_SLAVE_TLMM_WEST, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_tlmm_2 = { + .name = "qhs_tlmm_2", + .id = SC7180_SLAVE_TLMM_NORTH, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_tlmm_3 = { + .name = "qhs_tlmm_3", + .id = SC7180_SLAVE_TLMM_SOUTH, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_ufs_mem_cfg = { + .name = "qhs_ufs_mem_cfg", + .id = SC7180_SLAVE_UFS_MEM_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_usb3 = { + .name = "qhs_usb3", + .id = SC7180_SLAVE_USB3, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_venus_cfg = { + .name = "qhs_venus_cfg", + .id = SC7180_SLAVE_VENUS_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_venus_throttle_cfg = { + .name = "qhs_venus_throttle_cfg", + .id = SC7180_SLAVE_VENUS_THROTTLE_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_vsense_ctrl_cfg = { + .name = "qhs_vsense_ctrl_cfg", + .id = SC7180_SLAVE_VSENSE_CTRL_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node srvc_cnoc = { + .name = "srvc_cnoc", + .id = SC7180_SLAVE_SERVICE_CNOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_gemnoc = { + .name = "qhs_gemnoc", + .id = SC7180_SLAVE_GEM_NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SC7180_MASTER_GEM_NOC_CFG }, +}; + +static struct qcom_icc_node qhs_llcc = { + .name = "qhs_llcc", + .id = SC7180_SLAVE_LLCC_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_mdsp_ms_mpu_cfg = { + .name = "qhs_mdsp_ms_mpu_cfg", + .id = SC7180_SLAVE_MSS_PROC_MS_MPU_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_gem_noc_snoc = { + .name = "qns_gem_noc_snoc", + .id = SC7180_SLAVE_GEM_NOC_SNOC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SC7180_MASTER_GEM_NOC_SNOC }, +}; + +static struct qcom_icc_node qns_llcc = { + .name = "qns_llcc", + .id = SC7180_SLAVE_LLCC, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SC7180_MASTER_LLCC }, +}; + +static struct qcom_icc_node srvc_gemnoc = { + .name = "srvc_gemnoc", + .id = SC7180_SLAVE_SERVICE_GEM_NOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node ebi = { + .name = "ebi", + .id = SC7180_SLAVE_EBI1, + .channels = 2, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_mem_noc_hf = { + .name = "qns_mem_noc_hf", + .id = SC7180_SLAVE_MNOC_HF_MEM_NOC, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SC7180_MASTER_MNOC_HF_MEM_NOC }, +}; + +static struct qcom_icc_node qns_mem_noc_sf = { + .name = "qns_mem_noc_sf", + .id = SC7180_SLAVE_MNOC_SF_MEM_NOC, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SC7180_MASTER_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node srvc_mnoc = { + .name = "srvc_mnoc", + .id = SC7180_SLAVE_SERVICE_MNOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_cal_dp0 = { + .name = "qhs_cal_dp0", + .id = SC7180_SLAVE_NPU_CAL_DP0, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_cp = { + .name = "qhs_cp", + .id = SC7180_SLAVE_NPU_CP, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_dma_bwmon = { + .name = "qhs_dma_bwmon", + .id = SC7180_SLAVE_NPU_INT_DMA_BWMON_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_dpm = { + .name = "qhs_dpm", + .id = SC7180_SLAVE_NPU_DPM, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_isense = { + .name = "qhs_isense", + .id = SC7180_SLAVE_ISENSE_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_llm = { + .name = "qhs_llm", + .id = SC7180_SLAVE_NPU_LLM_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_tcm = { + .name = "qhs_tcm", + .id = SC7180_SLAVE_NPU_TCM, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_npu_sys = { + .name = "qns_npu_sys", + .id = SC7180_SLAVE_NPU_COMPUTE_NOC, + .channels = 2, + .buswidth = 32, +}; + +static struct qcom_icc_node srvc_noc = { + .name = "srvc_noc", + .id = SC7180_SLAVE_SERVICE_NPU_NOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qup_core_slave_1 = { + .name = "qup_core_slave_1", + .id = SC7180_SLAVE_QUP_CORE_0, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qup_core_slave_2 = { + .name = "qup_core_slave_2", + .id = SC7180_SLAVE_QUP_CORE_1, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_apss = { + .name = "qhs_apss", + .id = SC7180_SLAVE_APPSS, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node qns_cnoc = { + .name = "qns_cnoc", + .id = SC7180_SLAVE_SNOC_CNOC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SC7180_MASTER_SNOC_CNOC }, +}; + +static struct qcom_icc_node qns_gemnoc_gc = { + .name = "qns_gemnoc_gc", + .id = SC7180_SLAVE_SNOC_GEM_NOC_GC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SC7180_MASTER_SNOC_GC_MEM_NOC }, +}; + +static struct qcom_icc_node qns_gemnoc_sf = { + .name = "qns_gemnoc_sf", + .id = SC7180_SLAVE_SNOC_GEM_NOC_SF, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SC7180_MASTER_SNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qxs_imem = { + .name = "qxs_imem", + .id = SC7180_SLAVE_IMEM, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node qxs_pimem = { + .name = "qxs_pimem", + .id = SC7180_SLAVE_PIMEM, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node srvc_snoc = { + .name = "srvc_snoc", + .id = SC7180_SLAVE_SERVICE_SNOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node xs_qdss_stm = { + .name = "xs_qdss_stm", + .id = SC7180_SLAVE_QDSS_STM, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node xs_sys_tcu_cfg = { + .name = "xs_sys_tcu_cfg", + .id = SC7180_SLAVE_TCU, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_bcm bcm_acv = { + .name = "ACV", + .keepalive = false, + .num_nodes = 1, + .nodes = { &ebi }, +}; + +static struct qcom_icc_bcm bcm_mc0 = { + .name = "MC0", + .keepalive = true, + .num_nodes = 1, + .nodes = { &ebi }, +}; + +static struct qcom_icc_bcm bcm_sh0 = { + .name = "SH0", + .keepalive = true, + .num_nodes = 1, + .nodes = { &qns_llcc }, +}; + +static struct qcom_icc_bcm bcm_mm0 = { + .name = "MM0", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qns_mem_noc_hf }, +}; + +static struct qcom_icc_bcm bcm_ce0 = { + .name = "CE0", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qxm_crypto }, +}; + +static struct qcom_icc_bcm bcm_cn0 = { + .name = "CN0", + .keepalive = true, + .num_nodes = 48, + .nodes = { &qnm_snoc, + &xm_qdss_dap, + &qhs_a1_noc_cfg, + &qhs_a2_noc_cfg, + &qhs_ahb2phy0, + &qhs_aop, + &qhs_aoss, + &qhs_boot_rom, + &qhs_camera_cfg, + &qhs_camera_nrt_throttle_cfg, + &qhs_camera_rt_throttle_cfg, + &qhs_clk_ctl, + &qhs_cpr_cx, + &qhs_cpr_mx, + &qhs_crypto0_cfg, + &qhs_dcc_cfg, + &qhs_ddrss_cfg, + &qhs_display_cfg, + &qhs_display_rt_throttle_cfg, + &qhs_display_throttle_cfg, + &qhs_glm, + &qhs_gpuss_cfg, + &qhs_imem_cfg, + &qhs_ipa, + &qhs_mnoc_cfg, + &qhs_mss_cfg, + &qhs_npu_cfg, + &qhs_npu_dma_throttle_cfg, + &qhs_npu_dsp_throttle_cfg, + &qhs_pimem_cfg, + &qhs_prng, + &qhs_qdss_cfg, + &qhs_qm_cfg, + &qhs_qm_mpu_cfg, + &qhs_qup0, + &qhs_qup1, + &qhs_security, + &qhs_snoc_cfg, + &qhs_tcsr, + &qhs_tlmm_1, + &qhs_tlmm_2, + &qhs_tlmm_3, + &qhs_ufs_mem_cfg, + &qhs_usb3, + &qhs_venus_cfg, + &qhs_venus_throttle_cfg, + &qhs_vsense_ctrl_cfg, + &srvc_cnoc + }, +}; + +static struct qcom_icc_bcm bcm_mm1 = { + .name = "MM1", + .keepalive = false, + .num_nodes = 8, + .nodes = { &qxm_camnoc_hf0_uncomp, + &qxm_camnoc_hf1_uncomp, + &qxm_camnoc_sf_uncomp, + &qhm_mnoc_cfg, + &qxm_mdp0, + &qxm_rot, + &qxm_venus0, + &qxm_venus_arm9 + }, +}; + +static struct qcom_icc_bcm bcm_sh2 = { + .name = "SH2", + .keepalive = false, + .num_nodes = 1, + .nodes = { &acm_sys_tcu }, +}; + +static struct qcom_icc_bcm bcm_mm2 = { + .name = "MM2", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qns_mem_noc_sf }, +}; + +static struct qcom_icc_bcm bcm_qup0 = { + .name = "QUP0", + .keepalive = false, + .num_nodes = 2, + .nodes = { &qup_core_master_1, &qup_core_master_2 }, +}; + +static struct qcom_icc_bcm bcm_sh3 = { + .name = "SH3", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qnm_cmpnoc }, +}; + +static struct qcom_icc_bcm bcm_sh4 = { + .name = "SH4", + .keepalive = false, + .num_nodes = 1, + .nodes = { &acm_apps0 }, +}; + +static struct qcom_icc_bcm bcm_sn0 = { + .name = "SN0", + .keepalive = true, + .num_nodes = 1, + .nodes = { &qns_gemnoc_sf }, +}; + +static struct qcom_icc_bcm bcm_co0 = { + .name = "CO0", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qns_cdsp_gemnoc }, +}; + +static struct qcom_icc_bcm bcm_sn1 = { + .name = "SN1", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qxs_imem }, +}; + +static struct qcom_icc_bcm bcm_cn1 = { + .name = "CN1", + .keepalive = false, + .num_nodes = 8, + .nodes = { &qhm_qspi, + &xm_sdc2, + &xm_emmc, + &qhs_ahb2phy2, + &qhs_emmc_cfg, + &qhs_pdm, + &qhs_qspi, + &qhs_sdc2 + }, +}; + +static struct qcom_icc_bcm bcm_sn2 = { + .name = "SN2", + .keepalive = false, + .num_nodes = 2, + .nodes = { &qxm_pimem, &qns_gemnoc_gc }, +}; + +static struct qcom_icc_bcm bcm_co2 = { + .name = "CO2", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qnm_npu }, +}; + +static struct qcom_icc_bcm bcm_sn3 = { + .name = "SN3", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qxs_pimem }, +}; + +static struct qcom_icc_bcm bcm_co3 = { + .name = "CO3", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qxm_npu_dsp }, +}; + +static struct qcom_icc_bcm bcm_sn4 = { + .name = "SN4", + .keepalive = false, + .num_nodes = 1, + .nodes = { &xs_qdss_stm }, +}; + +static struct qcom_icc_bcm bcm_sn7 = { + .name = "SN7", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qnm_aggre1_noc }, +}; + +static struct qcom_icc_bcm bcm_sn9 = { + .name = "SN9", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qnm_aggre2_noc }, +}; + +static struct qcom_icc_bcm bcm_sn12 = { + .name = "SN12", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qnm_gemnoc }, +}; static struct qcom_icc_bcm * const aggre1_noc_bcms[] = { &bcm_cn1, diff --git a/drivers/interconnect/qcom/sc7280.c b/drivers/interconnect/qcom/sc7280.c index 971f538bc98a..6592839b4d94 100644 --- a/drivers/interconnect/qcom/sc7280.c +++ b/drivers/interconnect/qcom/sc7280.c @@ -7,8 +7,9 @@ #include #include #include +#include #include -#include +#include #include #include "bcm-voter.h" diff --git a/drivers/interconnect/qcom/sc8180x.c b/drivers/interconnect/qcom/sc8180x.c index c76e3a6a98cd..0fb4898dabcf 100644 --- a/drivers/interconnect/qcom/sc8180x.c +++ b/drivers/interconnect/qcom/sc8180x.c @@ -7,7 +7,8 @@ #include #include #include -#include +#include +#include #include diff --git a/drivers/interconnect/qcom/sc8280xp.c b/drivers/interconnect/qcom/sc8280xp.c index e56df893ec3e..b82c5493cbb5 100644 --- a/drivers/interconnect/qcom/sc8280xp.c +++ b/drivers/interconnect/qcom/sc8280xp.c @@ -7,8 +7,9 @@ #include #include #include +#include #include -#include +#include #include #include "bcm-voter.h" diff --git a/drivers/interconnect/qcom/sdm660.c b/drivers/interconnect/qcom/sdm660.c index e1aed937c86b..36962f7bd7bb 100644 --- a/drivers/interconnect/qcom/sdm660.c +++ b/drivers/interconnect/qcom/sdm660.c @@ -8,9 +8,8 @@ #include #include #include +#include #include -#include -#include #include #include #include diff --git a/drivers/interconnect/qcom/sdm670.c b/drivers/interconnect/qcom/sdm670.c index bda955035518..540a2108b77c 100644 --- a/drivers/interconnect/qcom/sdm670.c +++ b/drivers/interconnect/qcom/sdm670.c @@ -6,155 +6,1260 @@ #include #include #include +#include #include -#include +#include #include #include "bcm-voter.h" #include "icc-rpmh.h" #include "sdm670.h" -DEFINE_QNODE(qhm_a1noc_cfg, SDM670_MASTER_A1NOC_CFG, 1, 4, SDM670_SLAVE_SERVICE_A1NOC); -DEFINE_QNODE(qhm_qup1, SDM670_MASTER_BLSP_1, 1, 4, SDM670_SLAVE_A1NOC_SNOC); -DEFINE_QNODE(qhm_tsif, SDM670_MASTER_TSIF, 1, 4, SDM670_SLAVE_A1NOC_SNOC); -DEFINE_QNODE(xm_emmc, SDM670_MASTER_EMMC, 1, 8, SDM670_SLAVE_A1NOC_SNOC); -DEFINE_QNODE(xm_sdc2, SDM670_MASTER_SDCC_2, 1, 8, SDM670_SLAVE_A1NOC_SNOC); -DEFINE_QNODE(xm_sdc4, SDM670_MASTER_SDCC_4, 1, 8, SDM670_SLAVE_A1NOC_SNOC); -DEFINE_QNODE(xm_ufs_mem, SDM670_MASTER_UFS_MEM, 1, 8, SDM670_SLAVE_A1NOC_SNOC); -DEFINE_QNODE(qhm_a2noc_cfg, SDM670_MASTER_A2NOC_CFG, 1, 4, SDM670_SLAVE_SERVICE_A2NOC); -DEFINE_QNODE(qhm_qdss_bam, SDM670_MASTER_QDSS_BAM, 1, 4, SDM670_SLAVE_A2NOC_SNOC); -DEFINE_QNODE(qhm_qup2, SDM670_MASTER_BLSP_2, 1, 4, SDM670_SLAVE_A2NOC_SNOC); -DEFINE_QNODE(qnm_cnoc, SDM670_MASTER_CNOC_A2NOC, 1, 8, SDM670_SLAVE_A2NOC_SNOC); -DEFINE_QNODE(qxm_crypto, SDM670_MASTER_CRYPTO_CORE_0, 1, 8, SDM670_SLAVE_A2NOC_SNOC); -DEFINE_QNODE(qxm_ipa, SDM670_MASTER_IPA, 1, 8, SDM670_SLAVE_A2NOC_SNOC); -DEFINE_QNODE(xm_qdss_etr, SDM670_MASTER_QDSS_ETR, 1, 8, SDM670_SLAVE_A2NOC_SNOC); -DEFINE_QNODE(xm_usb3_0, SDM670_MASTER_USB3, 1, 8, SDM670_SLAVE_A2NOC_SNOC); -DEFINE_QNODE(qxm_camnoc_hf0_uncomp, SDM670_MASTER_CAMNOC_HF0_UNCOMP, 1, 32, SDM670_SLAVE_CAMNOC_UNCOMP); -DEFINE_QNODE(qxm_camnoc_hf1_uncomp, SDM670_MASTER_CAMNOC_HF1_UNCOMP, 1, 32, SDM670_SLAVE_CAMNOC_UNCOMP); -DEFINE_QNODE(qxm_camnoc_sf_uncomp, SDM670_MASTER_CAMNOC_SF_UNCOMP, 1, 32, SDM670_SLAVE_CAMNOC_UNCOMP); -DEFINE_QNODE(qhm_spdm, SDM670_MASTER_SPDM, 1, 4, SDM670_SLAVE_CNOC_A2NOC); -DEFINE_QNODE(qnm_snoc, SDM670_MASTER_SNOC_CNOC, 1, 8, SDM670_SLAVE_TLMM_SOUTH, SDM670_SLAVE_CAMERA_CFG, SDM670_SLAVE_SDCC_4, SDM670_SLAVE_SDCC_2, SDM670_SLAVE_CNOC_MNOC_CFG, SDM670_SLAVE_UFS_MEM_CFG, SDM670_SLAVE_GLM, SDM670_SLAVE_PDM, SDM670_SLAVE_A2NOC_CFG, SDM670_SLAVE_QDSS_CFG, SDM670_SLAVE_DISPLAY_CFG, SDM670_SLAVE_TCSR, SDM670_SLAVE_DCC_CFG, SDM670_SLAVE_CNOC_DDRSS, SDM670_SLAVE_SNOC_CFG, SDM670_SLAVE_SOUTH_PHY_CFG, SDM670_SLAVE_GRAPHICS_3D_CFG, SDM670_SLAVE_VENUS_CFG, SDM670_SLAVE_TSIF, SDM670_SLAVE_CDSP_CFG, SDM670_SLAVE_AOP, SDM670_SLAVE_BLSP_2, SDM670_SLAVE_SERVICE_CNOC, SDM670_SLAVE_USB3, SDM670_SLAVE_IPA_CFG, SDM670_SLAVE_RBCPR_CX_CFG, SDM670_SLAVE_A1NOC_CFG, SDM670_SLAVE_AOSS, SDM670_SLAVE_PRNG, SDM670_SLAVE_VSENSE_CTRL_CFG, SDM670_SLAVE_EMMC_CFG, SDM670_SLAVE_BLSP_1, SDM670_SLAVE_SPDM_WRAPPER, SDM670_SLAVE_CRYPTO_0_CFG, SDM670_SLAVE_PIMEM_CFG, SDM670_SLAVE_TLMM_NORTH, SDM670_SLAVE_CLK_CTL, SDM670_SLAVE_IMEM_CFG); -DEFINE_QNODE(qhm_cnoc, SDM670_MASTER_CNOC_DC_NOC, 1, 4, SDM670_SLAVE_MEM_NOC_CFG, SDM670_SLAVE_LLCC_CFG); -DEFINE_QNODE(acm_l3, SDM670_MASTER_AMPSS_M0, 1, 16, SDM670_SLAVE_SERVICE_GNOC, SDM670_SLAVE_GNOC_SNOC, SDM670_SLAVE_GNOC_MEM_NOC); -DEFINE_QNODE(pm_gnoc_cfg, SDM670_MASTER_GNOC_CFG, 1, 4, SDM670_SLAVE_SERVICE_GNOC); -DEFINE_QNODE(llcc_mc, SDM670_MASTER_LLCC, 2, 4, SDM670_SLAVE_EBI_CH0); -DEFINE_QNODE(acm_tcu, SDM670_MASTER_TCU_0, 1, 8, SDM670_SLAVE_MEM_NOC_GNOC, SDM670_SLAVE_LLCC, SDM670_SLAVE_MEM_NOC_SNOC); -DEFINE_QNODE(qhm_memnoc_cfg, SDM670_MASTER_MEM_NOC_CFG, 1, 4, SDM670_SLAVE_SERVICE_MEM_NOC, SDM670_SLAVE_MSS_PROC_MS_MPU_CFG); -DEFINE_QNODE(qnm_apps, SDM670_MASTER_GNOC_MEM_NOC, 2, 32, SDM670_SLAVE_LLCC); -DEFINE_QNODE(qnm_mnoc_hf, SDM670_MASTER_MNOC_HF_MEM_NOC, 2, 32, SDM670_SLAVE_LLCC); -DEFINE_QNODE(qnm_mnoc_sf, SDM670_MASTER_MNOC_SF_MEM_NOC, 1, 32, SDM670_SLAVE_MEM_NOC_GNOC, SDM670_SLAVE_LLCC, SDM670_SLAVE_MEM_NOC_SNOC); -DEFINE_QNODE(qnm_snoc_gc, SDM670_MASTER_SNOC_GC_MEM_NOC, 1, 8, SDM670_SLAVE_LLCC); -DEFINE_QNODE(qnm_snoc_sf, SDM670_MASTER_SNOC_SF_MEM_NOC, 1, 16, SDM670_SLAVE_MEM_NOC_GNOC, SDM670_SLAVE_LLCC); -DEFINE_QNODE(qxm_gpu, SDM670_MASTER_GRAPHICS_3D, 2, 32, SDM670_SLAVE_MEM_NOC_GNOC, SDM670_SLAVE_LLCC, SDM670_SLAVE_MEM_NOC_SNOC); -DEFINE_QNODE(qhm_mnoc_cfg, SDM670_MASTER_CNOC_MNOC_CFG, 1, 4, SDM670_SLAVE_SERVICE_MNOC); -DEFINE_QNODE(qxm_camnoc_hf0, SDM670_MASTER_CAMNOC_HF0, 1, 32, SDM670_SLAVE_MNOC_HF_MEM_NOC); -DEFINE_QNODE(qxm_camnoc_hf1, SDM670_MASTER_CAMNOC_HF1, 1, 32, SDM670_SLAVE_MNOC_HF_MEM_NOC); -DEFINE_QNODE(qxm_camnoc_sf, SDM670_MASTER_CAMNOC_SF, 1, 32, SDM670_SLAVE_MNOC_SF_MEM_NOC); -DEFINE_QNODE(qxm_mdp0, SDM670_MASTER_MDP_PORT0, 1, 32, SDM670_SLAVE_MNOC_HF_MEM_NOC); -DEFINE_QNODE(qxm_mdp1, SDM670_MASTER_MDP_PORT1, 1, 32, SDM670_SLAVE_MNOC_HF_MEM_NOC); -DEFINE_QNODE(qxm_rot, SDM670_MASTER_ROTATOR, 1, 32, SDM670_SLAVE_MNOC_SF_MEM_NOC); -DEFINE_QNODE(qxm_venus0, SDM670_MASTER_VIDEO_P0, 1, 32, SDM670_SLAVE_MNOC_SF_MEM_NOC); -DEFINE_QNODE(qxm_venus1, SDM670_MASTER_VIDEO_P1, 1, 32, SDM670_SLAVE_MNOC_SF_MEM_NOC); -DEFINE_QNODE(qxm_venus_arm9, SDM670_MASTER_VIDEO_PROC, 1, 8, SDM670_SLAVE_MNOC_SF_MEM_NOC); -DEFINE_QNODE(qhm_snoc_cfg, SDM670_MASTER_SNOC_CFG, 1, 4, SDM670_SLAVE_SERVICE_SNOC); -DEFINE_QNODE(qnm_aggre1_noc, SDM670_MASTER_A1NOC_SNOC, 1, 16, SDM670_SLAVE_PIMEM, SDM670_SLAVE_SNOC_MEM_NOC_SF, SDM670_SLAVE_OCIMEM, SDM670_SLAVE_APPSS, SDM670_SLAVE_SNOC_CNOC, SDM670_SLAVE_QDSS_STM); -DEFINE_QNODE(qnm_aggre2_noc, SDM670_MASTER_A2NOC_SNOC, 1, 16, SDM670_SLAVE_PIMEM, SDM670_SLAVE_SNOC_MEM_NOC_SF, SDM670_SLAVE_OCIMEM, SDM670_SLAVE_APPSS, SDM670_SLAVE_SNOC_CNOC, SDM670_SLAVE_TCU, SDM670_SLAVE_QDSS_STM); -DEFINE_QNODE(qnm_gladiator_sodv, SDM670_MASTER_GNOC_SNOC, 1, 8, SDM670_SLAVE_PIMEM, SDM670_SLAVE_OCIMEM, SDM670_SLAVE_APPSS, SDM670_SLAVE_SNOC_CNOC, SDM670_SLAVE_TCU, SDM670_SLAVE_QDSS_STM); -DEFINE_QNODE(qnm_memnoc, SDM670_MASTER_MEM_NOC_SNOC, 1, 8, SDM670_SLAVE_OCIMEM, SDM670_SLAVE_APPSS, SDM670_SLAVE_PIMEM, SDM670_SLAVE_SNOC_CNOC, SDM670_SLAVE_QDSS_STM); -DEFINE_QNODE(qxm_pimem, SDM670_MASTER_PIMEM, 1, 8, SDM670_SLAVE_OCIMEM, SDM670_SLAVE_SNOC_MEM_NOC_GC); -DEFINE_QNODE(xm_gic, SDM670_MASTER_GIC, 1, 8, SDM670_SLAVE_OCIMEM, SDM670_SLAVE_SNOC_MEM_NOC_GC); -DEFINE_QNODE(qns_a1noc_snoc, SDM670_SLAVE_A1NOC_SNOC, 1, 16, SDM670_MASTER_A1NOC_SNOC); -DEFINE_QNODE(srvc_aggre1_noc, SDM670_SLAVE_SERVICE_A1NOC, 1, 4); -DEFINE_QNODE(qns_a2noc_snoc, SDM670_SLAVE_A2NOC_SNOC, 1, 16, SDM670_MASTER_A2NOC_SNOC); -DEFINE_QNODE(srvc_aggre2_noc, SDM670_SLAVE_SERVICE_A2NOC, 1, 4); -DEFINE_QNODE(qns_camnoc_uncomp, SDM670_SLAVE_CAMNOC_UNCOMP, 1, 32); -DEFINE_QNODE(qhs_a1_noc_cfg, SDM670_SLAVE_A1NOC_CFG, 1, 4, SDM670_MASTER_A1NOC_CFG); -DEFINE_QNODE(qhs_a2_noc_cfg, SDM670_SLAVE_A2NOC_CFG, 1, 4, SDM670_MASTER_A2NOC_CFG); -DEFINE_QNODE(qhs_aop, SDM670_SLAVE_AOP, 1, 4); -DEFINE_QNODE(qhs_aoss, SDM670_SLAVE_AOSS, 1, 4); -DEFINE_QNODE(qhs_camera_cfg, SDM670_SLAVE_CAMERA_CFG, 1, 4); -DEFINE_QNODE(qhs_clk_ctl, SDM670_SLAVE_CLK_CTL, 1, 4); -DEFINE_QNODE(qhs_compute_dsp_cfg, SDM670_SLAVE_CDSP_CFG, 1, 4); -DEFINE_QNODE(qhs_cpr_cx, SDM670_SLAVE_RBCPR_CX_CFG, 1, 4); -DEFINE_QNODE(qhs_crypto0_cfg, SDM670_SLAVE_CRYPTO_0_CFG, 1, 4); -DEFINE_QNODE(qhs_dcc_cfg, SDM670_SLAVE_DCC_CFG, 1, 4, SDM670_MASTER_CNOC_DC_NOC); -DEFINE_QNODE(qhs_ddrss_cfg, SDM670_SLAVE_CNOC_DDRSS, 1, 4); -DEFINE_QNODE(qhs_display_cfg, SDM670_SLAVE_DISPLAY_CFG, 1, 4); -DEFINE_QNODE(qhs_emmc_cfg, SDM670_SLAVE_EMMC_CFG, 1, 4); -DEFINE_QNODE(qhs_glm, SDM670_SLAVE_GLM, 1, 4); -DEFINE_QNODE(qhs_gpuss_cfg, SDM670_SLAVE_GRAPHICS_3D_CFG, 1, 8); -DEFINE_QNODE(qhs_imem_cfg, SDM670_SLAVE_IMEM_CFG, 1, 4); -DEFINE_QNODE(qhs_ipa, SDM670_SLAVE_IPA_CFG, 1, 4); -DEFINE_QNODE(qhs_mnoc_cfg, SDM670_SLAVE_CNOC_MNOC_CFG, 1, 4, SDM670_MASTER_CNOC_MNOC_CFG); -DEFINE_QNODE(qhs_pdm, SDM670_SLAVE_PDM, 1, 4); -DEFINE_QNODE(qhs_phy_refgen_south, SDM670_SLAVE_SOUTH_PHY_CFG, 1, 4); -DEFINE_QNODE(qhs_pimem_cfg, SDM670_SLAVE_PIMEM_CFG, 1, 4); -DEFINE_QNODE(qhs_prng, SDM670_SLAVE_PRNG, 1, 4); -DEFINE_QNODE(qhs_qdss_cfg, SDM670_SLAVE_QDSS_CFG, 1, 4); -DEFINE_QNODE(qhs_qupv3_north, SDM670_SLAVE_BLSP_2, 1, 4); -DEFINE_QNODE(qhs_qupv3_south, SDM670_SLAVE_BLSP_1, 1, 4); -DEFINE_QNODE(qhs_sdc2, SDM670_SLAVE_SDCC_2, 1, 4); -DEFINE_QNODE(qhs_sdc4, SDM670_SLAVE_SDCC_4, 1, 4); -DEFINE_QNODE(qhs_snoc_cfg, SDM670_SLAVE_SNOC_CFG, 1, 4, SDM670_MASTER_SNOC_CFG); -DEFINE_QNODE(qhs_spdm, SDM670_SLAVE_SPDM_WRAPPER, 1, 4); -DEFINE_QNODE(qhs_tcsr, SDM670_SLAVE_TCSR, 1, 4); -DEFINE_QNODE(qhs_tlmm_north, SDM670_SLAVE_TLMM_NORTH, 1, 4); -DEFINE_QNODE(qhs_tlmm_south, SDM670_SLAVE_TLMM_SOUTH, 1, 4); -DEFINE_QNODE(qhs_tsif, SDM670_SLAVE_TSIF, 1, 4); -DEFINE_QNODE(qhs_ufs_mem_cfg, SDM670_SLAVE_UFS_MEM_CFG, 1, 4); -DEFINE_QNODE(qhs_usb3_0, SDM670_SLAVE_USB3, 1, 4); -DEFINE_QNODE(qhs_venus_cfg, SDM670_SLAVE_VENUS_CFG, 1, 4); -DEFINE_QNODE(qhs_vsense_ctrl_cfg, SDM670_SLAVE_VSENSE_CTRL_CFG, 1, 4); -DEFINE_QNODE(qns_cnoc_a2noc, SDM670_SLAVE_CNOC_A2NOC, 1, 8, SDM670_MASTER_CNOC_A2NOC); -DEFINE_QNODE(srvc_cnoc, SDM670_SLAVE_SERVICE_CNOC, 1, 4); -DEFINE_QNODE(qhs_llcc, SDM670_SLAVE_LLCC_CFG, 1, 4); -DEFINE_QNODE(qhs_memnoc, SDM670_SLAVE_MEM_NOC_CFG, 1, 4, SDM670_MASTER_MEM_NOC_CFG); -DEFINE_QNODE(qns_gladiator_sodv, SDM670_SLAVE_GNOC_SNOC, 1, 8, SDM670_MASTER_GNOC_SNOC); -DEFINE_QNODE(qns_gnoc_memnoc, SDM670_SLAVE_GNOC_MEM_NOC, 2, 32, SDM670_MASTER_GNOC_MEM_NOC); -DEFINE_QNODE(srvc_gnoc, SDM670_SLAVE_SERVICE_GNOC, 1, 4); -DEFINE_QNODE(ebi, SDM670_SLAVE_EBI_CH0, 2, 4); -DEFINE_QNODE(qhs_mdsp_ms_mpu_cfg, SDM670_SLAVE_MSS_PROC_MS_MPU_CFG, 1, 4); -DEFINE_QNODE(qns_apps_io, SDM670_SLAVE_MEM_NOC_GNOC, 1, 32); -DEFINE_QNODE(qns_llcc, SDM670_SLAVE_LLCC, 2, 16, SDM670_MASTER_LLCC); -DEFINE_QNODE(qns_memnoc_snoc, SDM670_SLAVE_MEM_NOC_SNOC, 1, 8, SDM670_MASTER_MEM_NOC_SNOC); -DEFINE_QNODE(srvc_memnoc, SDM670_SLAVE_SERVICE_MEM_NOC, 1, 4); -DEFINE_QNODE(qns2_mem_noc, SDM670_SLAVE_MNOC_SF_MEM_NOC, 1, 32, SDM670_MASTER_MNOC_SF_MEM_NOC); -DEFINE_QNODE(qns_mem_noc_hf, SDM670_SLAVE_MNOC_HF_MEM_NOC, 2, 32, SDM670_MASTER_MNOC_HF_MEM_NOC); -DEFINE_QNODE(srvc_mnoc, SDM670_SLAVE_SERVICE_MNOC, 1, 4); -DEFINE_QNODE(qhs_apss, SDM670_SLAVE_APPSS, 1, 8); -DEFINE_QNODE(qns_cnoc, SDM670_SLAVE_SNOC_CNOC, 1, 8, SDM670_MASTER_SNOC_CNOC); -DEFINE_QNODE(qns_memnoc_gc, SDM670_SLAVE_SNOC_MEM_NOC_GC, 1, 8, SDM670_MASTER_SNOC_GC_MEM_NOC); -DEFINE_QNODE(qns_memnoc_sf, SDM670_SLAVE_SNOC_MEM_NOC_SF, 1, 16, SDM670_MASTER_SNOC_SF_MEM_NOC); -DEFINE_QNODE(qxs_imem, SDM670_SLAVE_OCIMEM, 1, 8); -DEFINE_QNODE(qxs_pimem, SDM670_SLAVE_PIMEM, 1, 8); -DEFINE_QNODE(srvc_snoc, SDM670_SLAVE_SERVICE_SNOC, 1, 4); -DEFINE_QNODE(xs_qdss_stm, SDM670_SLAVE_QDSS_STM, 1, 4); -DEFINE_QNODE(xs_sys_tcu_cfg, SDM670_SLAVE_TCU, 1, 8); +static struct qcom_icc_node qhm_a1noc_cfg = { + .name = "qhm_a1noc_cfg", + .id = SDM670_MASTER_A1NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDM670_SLAVE_SERVICE_A1NOC }, +}; -DEFINE_QBCM(bcm_acv, "ACV", false, &ebi); -DEFINE_QBCM(bcm_mc0, "MC0", true, &ebi); -DEFINE_QBCM(bcm_sh0, "SH0", true, &qns_llcc); -DEFINE_QBCM(bcm_mm0, "MM0", true, &qns_mem_noc_hf); -DEFINE_QBCM(bcm_sh1, "SH1", false, &qns_apps_io); -DEFINE_QBCM(bcm_mm1, "MM1", true, &qxm_camnoc_hf0_uncomp, &qxm_camnoc_hf1_uncomp, &qxm_camnoc_sf_uncomp, &qxm_camnoc_hf0, &qxm_camnoc_hf1, &qxm_mdp0, &qxm_mdp1); -DEFINE_QBCM(bcm_sh2, "SH2", false, &qns_memnoc_snoc); -DEFINE_QBCM(bcm_mm2, "MM2", false, &qns2_mem_noc); -DEFINE_QBCM(bcm_sh3, "SH3", false, &acm_tcu); -DEFINE_QBCM(bcm_mm3, "MM3", false, &qxm_camnoc_sf, &qxm_rot, &qxm_venus0, &qxm_venus1, &qxm_venus_arm9); -DEFINE_QBCM(bcm_sh5, "SH5", false, &qnm_apps); -DEFINE_QBCM(bcm_sn0, "SN0", true, &qns_memnoc_sf); -DEFINE_QBCM(bcm_ce0, "CE0", false, &qxm_crypto); -DEFINE_QBCM(bcm_cn0, "CN0", true, &qhm_spdm, &qnm_snoc, &qhs_a1_noc_cfg, &qhs_a2_noc_cfg, &qhs_aop, &qhs_aoss, &qhs_camera_cfg, &qhs_clk_ctl, &qhs_compute_dsp_cfg, &qhs_cpr_cx, &qhs_crypto0_cfg, &qhs_dcc_cfg, &qhs_ddrss_cfg, &qhs_display_cfg, &qhs_emmc_cfg, &qhs_glm, &qhs_gpuss_cfg, &qhs_imem_cfg, &qhs_ipa, &qhs_mnoc_cfg, &qhs_pdm, &qhs_phy_refgen_south, &qhs_pimem_cfg, &qhs_prng, &qhs_qdss_cfg, &qhs_qupv3_north, &qhs_qupv3_south, &qhs_sdc2, &qhs_sdc4, &qhs_snoc_cfg, &qhs_spdm, &qhs_tcsr, &qhs_tlmm_north, &qhs_tlmm_south, &qhs_tsif, &qhs_ufs_mem_cfg, &qhs_usb3_0, &qhs_venus_cfg, &qhs_vsense_ctrl_cfg, &qns_cnoc_a2noc, &srvc_cnoc); -DEFINE_QBCM(bcm_qup0, "QUP0", false, &qhm_qup1, &qhm_qup2); -DEFINE_QBCM(bcm_sn1, "SN1", false, &qxs_imem); -DEFINE_QBCM(bcm_sn2, "SN2", false, &qns_memnoc_gc); -DEFINE_QBCM(bcm_sn3, "SN3", false, &qns_cnoc); -DEFINE_QBCM(bcm_sn4, "SN4", false, &qxm_pimem, &qxs_pimem); -DEFINE_QBCM(bcm_sn5, "SN5", false, &xs_qdss_stm); -DEFINE_QBCM(bcm_sn8, "SN8", false, &qnm_aggre1_noc, &srvc_aggre1_noc); -DEFINE_QBCM(bcm_sn10, "SN10", false, &qnm_aggre2_noc, &srvc_aggre2_noc); -DEFINE_QBCM(bcm_sn11, "SN11", false, &qnm_gladiator_sodv, &xm_gic); -DEFINE_QBCM(bcm_sn13, "SN13", false, &qnm_memnoc); +static struct qcom_icc_node qhm_qup1 = { + .name = "qhm_qup1", + .id = SDM670_MASTER_BLSP_1, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDM670_SLAVE_A1NOC_SNOC }, +}; + +static struct qcom_icc_node qhm_tsif = { + .name = "qhm_tsif", + .id = SDM670_MASTER_TSIF, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDM670_SLAVE_A1NOC_SNOC }, +}; + +static struct qcom_icc_node xm_emmc = { + .name = "xm_emmc", + .id = SDM670_MASTER_EMMC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDM670_SLAVE_A1NOC_SNOC }, +}; + +static struct qcom_icc_node xm_sdc2 = { + .name = "xm_sdc2", + .id = SDM670_MASTER_SDCC_2, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDM670_SLAVE_A1NOC_SNOC }, +}; + +static struct qcom_icc_node xm_sdc4 = { + .name = "xm_sdc4", + .id = SDM670_MASTER_SDCC_4, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDM670_SLAVE_A1NOC_SNOC }, +}; + +static struct qcom_icc_node xm_ufs_mem = { + .name = "xm_ufs_mem", + .id = SDM670_MASTER_UFS_MEM, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDM670_SLAVE_A1NOC_SNOC }, +}; + +static struct qcom_icc_node qhm_a2noc_cfg = { + .name = "qhm_a2noc_cfg", + .id = SDM670_MASTER_A2NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDM670_SLAVE_SERVICE_A2NOC }, +}; + +static struct qcom_icc_node qhm_qdss_bam = { + .name = "qhm_qdss_bam", + .id = SDM670_MASTER_QDSS_BAM, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDM670_SLAVE_A2NOC_SNOC }, +}; + +static struct qcom_icc_node qhm_qup2 = { + .name = "qhm_qup2", + .id = SDM670_MASTER_BLSP_2, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDM670_SLAVE_A2NOC_SNOC }, +}; + +static struct qcom_icc_node qnm_cnoc = { + .name = "qnm_cnoc", + .id = SDM670_MASTER_CNOC_A2NOC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDM670_SLAVE_A2NOC_SNOC }, +}; + +static struct qcom_icc_node qxm_crypto = { + .name = "qxm_crypto", + .id = SDM670_MASTER_CRYPTO_CORE_0, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDM670_SLAVE_A2NOC_SNOC }, +}; + +static struct qcom_icc_node qxm_ipa = { + .name = "qxm_ipa", + .id = SDM670_MASTER_IPA, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDM670_SLAVE_A2NOC_SNOC }, +}; + +static struct qcom_icc_node xm_qdss_etr = { + .name = "xm_qdss_etr", + .id = SDM670_MASTER_QDSS_ETR, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDM670_SLAVE_A2NOC_SNOC }, +}; + +static struct qcom_icc_node xm_usb3_0 = { + .name = "xm_usb3_0", + .id = SDM670_MASTER_USB3, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDM670_SLAVE_A2NOC_SNOC }, +}; + +static struct qcom_icc_node qxm_camnoc_hf0_uncomp = { + .name = "qxm_camnoc_hf0_uncomp", + .id = SDM670_MASTER_CAMNOC_HF0_UNCOMP, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SDM670_SLAVE_CAMNOC_UNCOMP }, +}; + +static struct qcom_icc_node qxm_camnoc_hf1_uncomp = { + .name = "qxm_camnoc_hf1_uncomp", + .id = SDM670_MASTER_CAMNOC_HF1_UNCOMP, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SDM670_SLAVE_CAMNOC_UNCOMP }, +}; + +static struct qcom_icc_node qxm_camnoc_sf_uncomp = { + .name = "qxm_camnoc_sf_uncomp", + .id = SDM670_MASTER_CAMNOC_SF_UNCOMP, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SDM670_SLAVE_CAMNOC_UNCOMP }, +}; + +static struct qcom_icc_node qhm_spdm = { + .name = "qhm_spdm", + .id = SDM670_MASTER_SPDM, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDM670_SLAVE_CNOC_A2NOC }, +}; + +static struct qcom_icc_node qnm_snoc = { + .name = "qnm_snoc", + .id = SDM670_MASTER_SNOC_CNOC, + .channels = 1, + .buswidth = 8, + .num_links = 38, + .links = { SDM670_SLAVE_TLMM_SOUTH, + SDM670_SLAVE_CAMERA_CFG, + SDM670_SLAVE_SDCC_4, + SDM670_SLAVE_SDCC_2, + SDM670_SLAVE_CNOC_MNOC_CFG, + SDM670_SLAVE_UFS_MEM_CFG, + SDM670_SLAVE_GLM, + SDM670_SLAVE_PDM, + SDM670_SLAVE_A2NOC_CFG, + SDM670_SLAVE_QDSS_CFG, + SDM670_SLAVE_DISPLAY_CFG, + SDM670_SLAVE_TCSR, + SDM670_SLAVE_DCC_CFG, + SDM670_SLAVE_CNOC_DDRSS, + SDM670_SLAVE_SNOC_CFG, + SDM670_SLAVE_SOUTH_PHY_CFG, + SDM670_SLAVE_GRAPHICS_3D_CFG, + SDM670_SLAVE_VENUS_CFG, + SDM670_SLAVE_TSIF, + SDM670_SLAVE_CDSP_CFG, + SDM670_SLAVE_AOP, + SDM670_SLAVE_BLSP_2, + SDM670_SLAVE_SERVICE_CNOC, + SDM670_SLAVE_USB3, + SDM670_SLAVE_IPA_CFG, + SDM670_SLAVE_RBCPR_CX_CFG, + SDM670_SLAVE_A1NOC_CFG, + SDM670_SLAVE_AOSS, + SDM670_SLAVE_PRNG, + SDM670_SLAVE_VSENSE_CTRL_CFG, + SDM670_SLAVE_EMMC_CFG, + SDM670_SLAVE_BLSP_1, + SDM670_SLAVE_SPDM_WRAPPER, + SDM670_SLAVE_CRYPTO_0_CFG, + SDM670_SLAVE_PIMEM_CFG, + SDM670_SLAVE_TLMM_NORTH, + SDM670_SLAVE_CLK_CTL, + SDM670_SLAVE_IMEM_CFG + }, +}; + +static struct qcom_icc_node qhm_cnoc = { + .name = "qhm_cnoc", + .id = SDM670_MASTER_CNOC_DC_NOC, + .channels = 1, + .buswidth = 4, + .num_links = 2, + .links = { SDM670_SLAVE_MEM_NOC_CFG, + SDM670_SLAVE_LLCC_CFG + }, +}; + +static struct qcom_icc_node acm_l3 = { + .name = "acm_l3", + .id = SDM670_MASTER_AMPSS_M0, + .channels = 1, + .buswidth = 16, + .num_links = 3, + .links = { SDM670_SLAVE_SERVICE_GNOC, + SDM670_SLAVE_GNOC_SNOC, + SDM670_SLAVE_GNOC_MEM_NOC + }, +}; + +static struct qcom_icc_node pm_gnoc_cfg = { + .name = "pm_gnoc_cfg", + .id = SDM670_MASTER_GNOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDM670_SLAVE_SERVICE_GNOC }, +}; + +static struct qcom_icc_node llcc_mc = { + .name = "llcc_mc", + .id = SDM670_MASTER_LLCC, + .channels = 2, + .buswidth = 4, + .num_links = 1, + .links = { SDM670_SLAVE_EBI_CH0 }, +}; + +static struct qcom_icc_node acm_tcu = { + .name = "acm_tcu", + .id = SDM670_MASTER_TCU_0, + .channels = 1, + .buswidth = 8, + .num_links = 3, + .links = { SDM670_SLAVE_MEM_NOC_GNOC, + SDM670_SLAVE_LLCC, + SDM670_SLAVE_MEM_NOC_SNOC + }, +}; + +static struct qcom_icc_node qhm_memnoc_cfg = { + .name = "qhm_memnoc_cfg", + .id = SDM670_MASTER_MEM_NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 2, + .links = { SDM670_SLAVE_SERVICE_MEM_NOC, + SDM670_SLAVE_MSS_PROC_MS_MPU_CFG + }, +}; + +static struct qcom_icc_node qnm_apps = { + .name = "qnm_apps", + .id = SDM670_MASTER_GNOC_MEM_NOC, + .channels = 2, + .buswidth = 32, + .num_links = 1, + .links = { SDM670_SLAVE_LLCC }, +}; + +static struct qcom_icc_node qnm_mnoc_hf = { + .name = "qnm_mnoc_hf", + .id = SDM670_MASTER_MNOC_HF_MEM_NOC, + .channels = 2, + .buswidth = 32, + .num_links = 1, + .links = { SDM670_SLAVE_LLCC }, +}; + +static struct qcom_icc_node qnm_mnoc_sf = { + .name = "qnm_mnoc_sf", + .id = SDM670_MASTER_MNOC_SF_MEM_NOC, + .channels = 1, + .buswidth = 32, + .num_links = 3, + .links = { SDM670_SLAVE_MEM_NOC_GNOC, + SDM670_SLAVE_LLCC, + SDM670_SLAVE_MEM_NOC_SNOC + }, +}; + +static struct qcom_icc_node qnm_snoc_gc = { + .name = "qnm_snoc_gc", + .id = SDM670_MASTER_SNOC_GC_MEM_NOC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDM670_SLAVE_LLCC }, +}; + +static struct qcom_icc_node qnm_snoc_sf = { + .name = "qnm_snoc_sf", + .id = SDM670_MASTER_SNOC_SF_MEM_NOC, + .channels = 1, + .buswidth = 16, + .num_links = 2, + .links = { SDM670_SLAVE_MEM_NOC_GNOC, + SDM670_SLAVE_LLCC + }, +}; + +static struct qcom_icc_node qxm_gpu = { + .name = "qxm_gpu", + .id = SDM670_MASTER_GRAPHICS_3D, + .channels = 2, + .buswidth = 32, + .num_links = 3, + .links = { SDM670_SLAVE_MEM_NOC_GNOC, + SDM670_SLAVE_LLCC, + SDM670_SLAVE_MEM_NOC_SNOC + }, +}; + +static struct qcom_icc_node qhm_mnoc_cfg = { + .name = "qhm_mnoc_cfg", + .id = SDM670_MASTER_CNOC_MNOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDM670_SLAVE_SERVICE_MNOC }, +}; + +static struct qcom_icc_node qxm_camnoc_hf0 = { + .name = "qxm_camnoc_hf0", + .id = SDM670_MASTER_CAMNOC_HF0, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SDM670_SLAVE_MNOC_HF_MEM_NOC }, +}; + +static struct qcom_icc_node qxm_camnoc_hf1 = { + .name = "qxm_camnoc_hf1", + .id = SDM670_MASTER_CAMNOC_HF1, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SDM670_SLAVE_MNOC_HF_MEM_NOC }, +}; + +static struct qcom_icc_node qxm_camnoc_sf = { + .name = "qxm_camnoc_sf", + .id = SDM670_MASTER_CAMNOC_SF, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SDM670_SLAVE_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qxm_mdp0 = { + .name = "qxm_mdp0", + .id = SDM670_MASTER_MDP_PORT0, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SDM670_SLAVE_MNOC_HF_MEM_NOC }, +}; + +static struct qcom_icc_node qxm_mdp1 = { + .name = "qxm_mdp1", + .id = SDM670_MASTER_MDP_PORT1, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SDM670_SLAVE_MNOC_HF_MEM_NOC }, +}; + +static struct qcom_icc_node qxm_rot = { + .name = "qxm_rot", + .id = SDM670_MASTER_ROTATOR, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SDM670_SLAVE_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qxm_venus0 = { + .name = "qxm_venus0", + .id = SDM670_MASTER_VIDEO_P0, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SDM670_SLAVE_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qxm_venus1 = { + .name = "qxm_venus1", + .id = SDM670_MASTER_VIDEO_P1, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SDM670_SLAVE_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qxm_venus_arm9 = { + .name = "qxm_venus_arm9", + .id = SDM670_MASTER_VIDEO_PROC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDM670_SLAVE_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qhm_snoc_cfg = { + .name = "qhm_snoc_cfg", + .id = SDM670_MASTER_SNOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDM670_SLAVE_SERVICE_SNOC }, +}; + +static struct qcom_icc_node qnm_aggre1_noc = { + .name = "qnm_aggre1_noc", + .id = SDM670_MASTER_A1NOC_SNOC, + .channels = 1, + .buswidth = 16, + .num_links = 6, + .links = { SDM670_SLAVE_PIMEM, + SDM670_SLAVE_SNOC_MEM_NOC_SF, + SDM670_SLAVE_OCIMEM, + SDM670_SLAVE_APPSS, + SDM670_SLAVE_SNOC_CNOC, + SDM670_SLAVE_QDSS_STM + }, +}; + +static struct qcom_icc_node qnm_aggre2_noc = { + .name = "qnm_aggre2_noc", + .id = SDM670_MASTER_A2NOC_SNOC, + .channels = 1, + .buswidth = 16, + .num_links = 7, + .links = { SDM670_SLAVE_PIMEM, + SDM670_SLAVE_SNOC_MEM_NOC_SF, + SDM670_SLAVE_OCIMEM, + SDM670_SLAVE_APPSS, + SDM670_SLAVE_SNOC_CNOC, + SDM670_SLAVE_TCU, + SDM670_SLAVE_QDSS_STM + }, +}; + +static struct qcom_icc_node qnm_gladiator_sodv = { + .name = "qnm_gladiator_sodv", + .id = SDM670_MASTER_GNOC_SNOC, + .channels = 1, + .buswidth = 8, + .num_links = 6, + .links = { SDM670_SLAVE_PIMEM, + SDM670_SLAVE_OCIMEM, + SDM670_SLAVE_APPSS, + SDM670_SLAVE_SNOC_CNOC, + SDM670_SLAVE_TCU, + SDM670_SLAVE_QDSS_STM + }, +}; + +static struct qcom_icc_node qnm_memnoc = { + .name = "qnm_memnoc", + .id = SDM670_MASTER_MEM_NOC_SNOC, + .channels = 1, + .buswidth = 8, + .num_links = 5, + .links = { SDM670_SLAVE_OCIMEM, + SDM670_SLAVE_APPSS, + SDM670_SLAVE_PIMEM, + SDM670_SLAVE_SNOC_CNOC, + SDM670_SLAVE_QDSS_STM + }, +}; + +static struct qcom_icc_node qxm_pimem = { + .name = "qxm_pimem", + .id = SDM670_MASTER_PIMEM, + .channels = 1, + .buswidth = 8, + .num_links = 2, + .links = { SDM670_SLAVE_OCIMEM, + SDM670_SLAVE_SNOC_MEM_NOC_GC + }, +}; + +static struct qcom_icc_node xm_gic = { + .name = "xm_gic", + .id = SDM670_MASTER_GIC, + .channels = 1, + .buswidth = 8, + .num_links = 2, + .links = { SDM670_SLAVE_OCIMEM, + SDM670_SLAVE_SNOC_MEM_NOC_GC + }, +}; + +static struct qcom_icc_node qns_a1noc_snoc = { + .name = "qns_a1noc_snoc", + .id = SDM670_SLAVE_A1NOC_SNOC, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SDM670_MASTER_A1NOC_SNOC }, +}; + +static struct qcom_icc_node srvc_aggre1_noc = { + .name = "srvc_aggre1_noc", + .id = SDM670_SLAVE_SERVICE_A1NOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_a2noc_snoc = { + .name = "qns_a2noc_snoc", + .id = SDM670_SLAVE_A2NOC_SNOC, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SDM670_MASTER_A2NOC_SNOC }, +}; + +static struct qcom_icc_node srvc_aggre2_noc = { + .name = "srvc_aggre2_noc", + .id = SDM670_SLAVE_SERVICE_A2NOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_camnoc_uncomp = { + .name = "qns_camnoc_uncomp", + .id = SDM670_SLAVE_CAMNOC_UNCOMP, + .channels = 1, + .buswidth = 32, +}; + +static struct qcom_icc_node qhs_a1_noc_cfg = { + .name = "qhs_a1_noc_cfg", + .id = SDM670_SLAVE_A1NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDM670_MASTER_A1NOC_CFG }, +}; + +static struct qcom_icc_node qhs_a2_noc_cfg = { + .name = "qhs_a2_noc_cfg", + .id = SDM670_SLAVE_A2NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDM670_MASTER_A2NOC_CFG }, +}; + +static struct qcom_icc_node qhs_aop = { + .name = "qhs_aop", + .id = SDM670_SLAVE_AOP, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_aoss = { + .name = "qhs_aoss", + .id = SDM670_SLAVE_AOSS, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_camera_cfg = { + .name = "qhs_camera_cfg", + .id = SDM670_SLAVE_CAMERA_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_clk_ctl = { + .name = "qhs_clk_ctl", + .id = SDM670_SLAVE_CLK_CTL, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_compute_dsp_cfg = { + .name = "qhs_compute_dsp_cfg", + .id = SDM670_SLAVE_CDSP_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_cpr_cx = { + .name = "qhs_cpr_cx", + .id = SDM670_SLAVE_RBCPR_CX_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_crypto0_cfg = { + .name = "qhs_crypto0_cfg", + .id = SDM670_SLAVE_CRYPTO_0_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_dcc_cfg = { + .name = "qhs_dcc_cfg", + .id = SDM670_SLAVE_DCC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDM670_MASTER_CNOC_DC_NOC }, +}; + +static struct qcom_icc_node qhs_ddrss_cfg = { + .name = "qhs_ddrss_cfg", + .id = SDM670_SLAVE_CNOC_DDRSS, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_display_cfg = { + .name = "qhs_display_cfg", + .id = SDM670_SLAVE_DISPLAY_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_emmc_cfg = { + .name = "qhs_emmc_cfg", + .id = SDM670_SLAVE_EMMC_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_glm = { + .name = "qhs_glm", + .id = SDM670_SLAVE_GLM, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_gpuss_cfg = { + .name = "qhs_gpuss_cfg", + .id = SDM670_SLAVE_GRAPHICS_3D_CFG, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node qhs_imem_cfg = { + .name = "qhs_imem_cfg", + .id = SDM670_SLAVE_IMEM_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_ipa = { + .name = "qhs_ipa", + .id = SDM670_SLAVE_IPA_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_mnoc_cfg = { + .name = "qhs_mnoc_cfg", + .id = SDM670_SLAVE_CNOC_MNOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDM670_MASTER_CNOC_MNOC_CFG }, +}; + +static struct qcom_icc_node qhs_pdm = { + .name = "qhs_pdm", + .id = SDM670_SLAVE_PDM, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_phy_refgen_south = { + .name = "qhs_phy_refgen_south", + .id = SDM670_SLAVE_SOUTH_PHY_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_pimem_cfg = { + .name = "qhs_pimem_cfg", + .id = SDM670_SLAVE_PIMEM_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_prng = { + .name = "qhs_prng", + .id = SDM670_SLAVE_PRNG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_qdss_cfg = { + .name = "qhs_qdss_cfg", + .id = SDM670_SLAVE_QDSS_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_qupv3_north = { + .name = "qhs_qupv3_north", + .id = SDM670_SLAVE_BLSP_2, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_qupv3_south = { + .name = "qhs_qupv3_south", + .id = SDM670_SLAVE_BLSP_1, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_sdc2 = { + .name = "qhs_sdc2", + .id = SDM670_SLAVE_SDCC_2, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_sdc4 = { + .name = "qhs_sdc4", + .id = SDM670_SLAVE_SDCC_4, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_snoc_cfg = { + .name = "qhs_snoc_cfg", + .id = SDM670_SLAVE_SNOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDM670_MASTER_SNOC_CFG }, +}; + +static struct qcom_icc_node qhs_spdm = { + .name = "qhs_spdm", + .id = SDM670_SLAVE_SPDM_WRAPPER, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_tcsr = { + .name = "qhs_tcsr", + .id = SDM670_SLAVE_TCSR, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_tlmm_north = { + .name = "qhs_tlmm_north", + .id = SDM670_SLAVE_TLMM_NORTH, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_tlmm_south = { + .name = "qhs_tlmm_south", + .id = SDM670_SLAVE_TLMM_SOUTH, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_tsif = { + .name = "qhs_tsif", + .id = SDM670_SLAVE_TSIF, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_ufs_mem_cfg = { + .name = "qhs_ufs_mem_cfg", + .id = SDM670_SLAVE_UFS_MEM_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_usb3_0 = { + .name = "qhs_usb3_0", + .id = SDM670_SLAVE_USB3, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_venus_cfg = { + .name = "qhs_venus_cfg", + .id = SDM670_SLAVE_VENUS_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_vsense_ctrl_cfg = { + .name = "qhs_vsense_ctrl_cfg", + .id = SDM670_SLAVE_VSENSE_CTRL_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_cnoc_a2noc = { + .name = "qns_cnoc_a2noc", + .id = SDM670_SLAVE_CNOC_A2NOC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDM670_MASTER_CNOC_A2NOC }, +}; + +static struct qcom_icc_node srvc_cnoc = { + .name = "srvc_cnoc", + .id = SDM670_SLAVE_SERVICE_CNOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_llcc = { + .name = "qhs_llcc", + .id = SDM670_SLAVE_LLCC_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_memnoc = { + .name = "qhs_memnoc", + .id = SDM670_SLAVE_MEM_NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDM670_MASTER_MEM_NOC_CFG }, +}; + +static struct qcom_icc_node qns_gladiator_sodv = { + .name = "qns_gladiator_sodv", + .id = SDM670_SLAVE_GNOC_SNOC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDM670_MASTER_GNOC_SNOC }, +}; + +static struct qcom_icc_node qns_gnoc_memnoc = { + .name = "qns_gnoc_memnoc", + .id = SDM670_SLAVE_GNOC_MEM_NOC, + .channels = 2, + .buswidth = 32, + .num_links = 1, + .links = { SDM670_MASTER_GNOC_MEM_NOC }, +}; + +static struct qcom_icc_node srvc_gnoc = { + .name = "srvc_gnoc", + .id = SDM670_SLAVE_SERVICE_GNOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node ebi = { + .name = "ebi", + .id = SDM670_SLAVE_EBI_CH0, + .channels = 2, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_mdsp_ms_mpu_cfg = { + .name = "qhs_mdsp_ms_mpu_cfg", + .id = SDM670_SLAVE_MSS_PROC_MS_MPU_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_apps_io = { + .name = "qns_apps_io", + .id = SDM670_SLAVE_MEM_NOC_GNOC, + .channels = 1, + .buswidth = 32, +}; + +static struct qcom_icc_node qns_llcc = { + .name = "qns_llcc", + .id = SDM670_SLAVE_LLCC, + .channels = 2, + .buswidth = 16, + .num_links = 1, + .links = { SDM670_MASTER_LLCC }, +}; + +static struct qcom_icc_node qns_memnoc_snoc = { + .name = "qns_memnoc_snoc", + .id = SDM670_SLAVE_MEM_NOC_SNOC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDM670_MASTER_MEM_NOC_SNOC }, +}; + +static struct qcom_icc_node srvc_memnoc = { + .name = "srvc_memnoc", + .id = SDM670_SLAVE_SERVICE_MEM_NOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns2_mem_noc = { + .name = "qns2_mem_noc", + .id = SDM670_SLAVE_MNOC_SF_MEM_NOC, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SDM670_MASTER_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qns_mem_noc_hf = { + .name = "qns_mem_noc_hf", + .id = SDM670_SLAVE_MNOC_HF_MEM_NOC, + .channels = 2, + .buswidth = 32, + .num_links = 1, + .links = { SDM670_MASTER_MNOC_HF_MEM_NOC }, +}; + +static struct qcom_icc_node srvc_mnoc = { + .name = "srvc_mnoc", + .id = SDM670_SLAVE_SERVICE_MNOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_apss = { + .name = "qhs_apss", + .id = SDM670_SLAVE_APPSS, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node qns_cnoc = { + .name = "qns_cnoc", + .id = SDM670_SLAVE_SNOC_CNOC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDM670_MASTER_SNOC_CNOC }, +}; + +static struct qcom_icc_node qns_memnoc_gc = { + .name = "qns_memnoc_gc", + .id = SDM670_SLAVE_SNOC_MEM_NOC_GC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDM670_MASTER_SNOC_GC_MEM_NOC }, +}; + +static struct qcom_icc_node qns_memnoc_sf = { + .name = "qns_memnoc_sf", + .id = SDM670_SLAVE_SNOC_MEM_NOC_SF, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SDM670_MASTER_SNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qxs_imem = { + .name = "qxs_imem", + .id = SDM670_SLAVE_OCIMEM, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node qxs_pimem = { + .name = "qxs_pimem", + .id = SDM670_SLAVE_PIMEM, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node srvc_snoc = { + .name = "srvc_snoc", + .id = SDM670_SLAVE_SERVICE_SNOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node xs_qdss_stm = { + .name = "xs_qdss_stm", + .id = SDM670_SLAVE_QDSS_STM, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node xs_sys_tcu_cfg = { + .name = "xs_sys_tcu_cfg", + .id = SDM670_SLAVE_TCU, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_bcm bcm_acv = { + .name = "ACV", + .keepalive = false, + .num_nodes = 1, + .nodes = { &ebi }, +}; + +static struct qcom_icc_bcm bcm_mc0 = { + .name = "MC0", + .keepalive = true, + .num_nodes = 1, + .nodes = { &ebi }, +}; + +static struct qcom_icc_bcm bcm_sh0 = { + .name = "SH0", + .keepalive = true, + .num_nodes = 1, + .nodes = { &qns_llcc }, +}; + +static struct qcom_icc_bcm bcm_mm0 = { + .name = "MM0", + .keepalive = true, + .num_nodes = 1, + .nodes = { &qns_mem_noc_hf }, +}; + +static struct qcom_icc_bcm bcm_sh1 = { + .name = "SH1", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qns_apps_io }, +}; + +static struct qcom_icc_bcm bcm_mm1 = { + .name = "MM1", + .keepalive = true, + .num_nodes = 7, + .nodes = { &qxm_camnoc_hf0_uncomp, + &qxm_camnoc_hf1_uncomp, + &qxm_camnoc_sf_uncomp, + &qxm_camnoc_hf0, + &qxm_camnoc_hf1, + &qxm_mdp0, + &qxm_mdp1 + }, +}; + +static struct qcom_icc_bcm bcm_sh2 = { + .name = "SH2", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qns_memnoc_snoc }, +}; + +static struct qcom_icc_bcm bcm_mm2 = { + .name = "MM2", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qns2_mem_noc }, +}; + +static struct qcom_icc_bcm bcm_sh3 = { + .name = "SH3", + .keepalive = false, + .num_nodes = 1, + .nodes = { &acm_tcu }, +}; + +static struct qcom_icc_bcm bcm_mm3 = { + .name = "MM3", + .keepalive = false, + .num_nodes = 5, + .nodes = { &qxm_camnoc_sf, &qxm_rot, &qxm_venus0, &qxm_venus1, &qxm_venus_arm9 }, +}; + +static struct qcom_icc_bcm bcm_sh5 = { + .name = "SH5", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qnm_apps }, +}; + +static struct qcom_icc_bcm bcm_sn0 = { + .name = "SN0", + .keepalive = true, + .num_nodes = 1, + .nodes = { &qns_memnoc_sf }, +}; + +static struct qcom_icc_bcm bcm_ce0 = { + .name = "CE0", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qxm_crypto }, +}; + +static struct qcom_icc_bcm bcm_cn0 = { + .name = "CN0", + .keepalive = true, + .num_nodes = 41, + .nodes = { &qhm_spdm, + &qnm_snoc, + &qhs_a1_noc_cfg, + &qhs_a2_noc_cfg, + &qhs_aop, + &qhs_aoss, + &qhs_camera_cfg, + &qhs_clk_ctl, + &qhs_compute_dsp_cfg, + &qhs_cpr_cx, + &qhs_crypto0_cfg, + &qhs_dcc_cfg, + &qhs_ddrss_cfg, + &qhs_display_cfg, + &qhs_emmc_cfg, + &qhs_glm, + &qhs_gpuss_cfg, + &qhs_imem_cfg, + &qhs_ipa, + &qhs_mnoc_cfg, + &qhs_pdm, + &qhs_phy_refgen_south, + &qhs_pimem_cfg, + &qhs_prng, + &qhs_qdss_cfg, + &qhs_qupv3_north, + &qhs_qupv3_south, + &qhs_sdc2, + &qhs_sdc4, + &qhs_snoc_cfg, + &qhs_spdm, + &qhs_tcsr, + &qhs_tlmm_north, + &qhs_tlmm_south, + &qhs_tsif, + &qhs_ufs_mem_cfg, + &qhs_usb3_0, + &qhs_venus_cfg, + &qhs_vsense_ctrl_cfg, + &qns_cnoc_a2noc, + &srvc_cnoc + }, +}; + +static struct qcom_icc_bcm bcm_qup0 = { + .name = "QUP0", + .keepalive = false, + .num_nodes = 2, + .nodes = { &qhm_qup1, &qhm_qup2 }, +}; + +static struct qcom_icc_bcm bcm_sn1 = { + .name = "SN1", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qxs_imem }, +}; + +static struct qcom_icc_bcm bcm_sn2 = { + .name = "SN2", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qns_memnoc_gc }, +}; + +static struct qcom_icc_bcm bcm_sn3 = { + .name = "SN3", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qns_cnoc }, +}; + +static struct qcom_icc_bcm bcm_sn4 = { + .name = "SN4", + .keepalive = false, + .num_nodes = 2, + .nodes = { &qxm_pimem, &qxs_pimem }, +}; + +static struct qcom_icc_bcm bcm_sn5 = { + .name = "SN5", + .keepalive = false, + .num_nodes = 1, + .nodes = { &xs_qdss_stm }, +}; + +static struct qcom_icc_bcm bcm_sn8 = { + .name = "SN8", + .keepalive = false, + .num_nodes = 2, + .nodes = { &qnm_aggre1_noc, &srvc_aggre1_noc }, +}; + +static struct qcom_icc_bcm bcm_sn10 = { + .name = "SN10", + .keepalive = false, + .num_nodes = 2, + .nodes = { &qnm_aggre2_noc, &srvc_aggre2_noc }, +}; + +static struct qcom_icc_bcm bcm_sn11 = { + .name = "SN11", + .keepalive = false, + .num_nodes = 2, + .nodes = { &qnm_gladiator_sodv, &xm_gic }, +}; + +static struct qcom_icc_bcm bcm_sn13 = { + .name = "SN13", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qnm_memnoc }, +}; static struct qcom_icc_bcm * const aggre1_noc_bcms[] = { &bcm_qup0, diff --git a/drivers/interconnect/qcom/sdm845.c b/drivers/interconnect/qcom/sdm845.c index 954e7bd13fc4..b9243c0aa626 100644 --- a/drivers/interconnect/qcom/sdm845.c +++ b/drivers/interconnect/qcom/sdm845.c @@ -7,7 +7,8 @@ #include #include #include -#include +#include +#include #include @@ -15,165 +16,1502 @@ #include "icc-rpmh.h" #include "sdm845.h" -DEFINE_QNODE(qhm_a1noc_cfg, SDM845_MASTER_A1NOC_CFG, 1, 4, SDM845_SLAVE_SERVICE_A1NOC); -DEFINE_QNODE(qhm_qup1, SDM845_MASTER_BLSP_1, 1, 4, SDM845_SLAVE_A1NOC_SNOC); -DEFINE_QNODE(qhm_tsif, SDM845_MASTER_TSIF, 1, 4, SDM845_SLAVE_A1NOC_SNOC); -DEFINE_QNODE(xm_sdc2, SDM845_MASTER_SDCC_2, 1, 8, SDM845_SLAVE_A1NOC_SNOC); -DEFINE_QNODE(xm_sdc4, SDM845_MASTER_SDCC_4, 1, 8, SDM845_SLAVE_A1NOC_SNOC); -DEFINE_QNODE(xm_ufs_card, SDM845_MASTER_UFS_CARD, 1, 8, SDM845_SLAVE_A1NOC_SNOC); -DEFINE_QNODE(xm_ufs_mem, SDM845_MASTER_UFS_MEM, 1, 8, SDM845_SLAVE_A1NOC_SNOC); -DEFINE_QNODE(xm_pcie_0, SDM845_MASTER_PCIE_0, 1, 8, SDM845_SLAVE_ANOC_PCIE_A1NOC_SNOC); -DEFINE_QNODE(qhm_a2noc_cfg, SDM845_MASTER_A2NOC_CFG, 1, 4, SDM845_SLAVE_SERVICE_A2NOC); -DEFINE_QNODE(qhm_qdss_bam, SDM845_MASTER_QDSS_BAM, 1, 4, SDM845_SLAVE_A2NOC_SNOC); -DEFINE_QNODE(qhm_qup2, SDM845_MASTER_BLSP_2, 1, 4, SDM845_SLAVE_A2NOC_SNOC); -DEFINE_QNODE(qnm_cnoc, SDM845_MASTER_CNOC_A2NOC, 1, 8, SDM845_SLAVE_A2NOC_SNOC); -DEFINE_QNODE(qxm_crypto, SDM845_MASTER_CRYPTO, 1, 8, SDM845_SLAVE_A2NOC_SNOC); -DEFINE_QNODE(qxm_ipa, SDM845_MASTER_IPA, 1, 8, SDM845_SLAVE_A2NOC_SNOC); -DEFINE_QNODE(xm_pcie3_1, SDM845_MASTER_PCIE_1, 1, 8, SDM845_SLAVE_ANOC_PCIE_SNOC); -DEFINE_QNODE(xm_qdss_etr, SDM845_MASTER_QDSS_ETR, 1, 8, SDM845_SLAVE_A2NOC_SNOC); -DEFINE_QNODE(xm_usb3_0, SDM845_MASTER_USB3_0, 1, 8, SDM845_SLAVE_A2NOC_SNOC); -DEFINE_QNODE(xm_usb3_1, SDM845_MASTER_USB3_1, 1, 8, SDM845_SLAVE_A2NOC_SNOC); -DEFINE_QNODE(qxm_camnoc_hf0_uncomp, SDM845_MASTER_CAMNOC_HF0_UNCOMP, 1, 32, SDM845_SLAVE_CAMNOC_UNCOMP); -DEFINE_QNODE(qxm_camnoc_hf1_uncomp, SDM845_MASTER_CAMNOC_HF1_UNCOMP, 1, 32, SDM845_SLAVE_CAMNOC_UNCOMP); -DEFINE_QNODE(qxm_camnoc_sf_uncomp, SDM845_MASTER_CAMNOC_SF_UNCOMP, 1, 32, SDM845_SLAVE_CAMNOC_UNCOMP); -DEFINE_QNODE(qhm_spdm, SDM845_MASTER_SPDM, 1, 4, SDM845_SLAVE_CNOC_A2NOC); -DEFINE_QNODE(qhm_tic, SDM845_MASTER_TIC, 1, 4, SDM845_SLAVE_A1NOC_CFG, SDM845_SLAVE_A2NOC_CFG, SDM845_SLAVE_AOP, SDM845_SLAVE_AOSS, SDM845_SLAVE_CAMERA_CFG, SDM845_SLAVE_CLK_CTL, SDM845_SLAVE_CDSP_CFG, SDM845_SLAVE_RBCPR_CX_CFG, SDM845_SLAVE_CRYPTO_0_CFG, SDM845_SLAVE_DCC_CFG, SDM845_SLAVE_CNOC_DDRSS, SDM845_SLAVE_DISPLAY_CFG, SDM845_SLAVE_GLM, SDM845_SLAVE_GFX3D_CFG, SDM845_SLAVE_IMEM_CFG, SDM845_SLAVE_IPA_CFG, SDM845_SLAVE_CNOC_MNOC_CFG, SDM845_SLAVE_PCIE_0_CFG, SDM845_SLAVE_PCIE_1_CFG, SDM845_SLAVE_PDM, SDM845_SLAVE_SOUTH_PHY_CFG, SDM845_SLAVE_PIMEM_CFG, SDM845_SLAVE_PRNG, SDM845_SLAVE_QDSS_CFG, SDM845_SLAVE_BLSP_2, SDM845_SLAVE_BLSP_1, SDM845_SLAVE_SDCC_2, SDM845_SLAVE_SDCC_4, SDM845_SLAVE_SNOC_CFG, SDM845_SLAVE_SPDM_WRAPPER, SDM845_SLAVE_SPSS_CFG, SDM845_SLAVE_TCSR, SDM845_SLAVE_TLMM_NORTH, SDM845_SLAVE_TLMM_SOUTH, SDM845_SLAVE_TSIF, SDM845_SLAVE_UFS_CARD_CFG, SDM845_SLAVE_UFS_MEM_CFG, SDM845_SLAVE_USB3_0, SDM845_SLAVE_USB3_1, SDM845_SLAVE_VENUS_CFG, SDM845_SLAVE_VSENSE_CTRL_CFG, SDM845_SLAVE_CNOC_A2NOC, SDM845_SLAVE_SERVICE_CNOC); -DEFINE_QNODE(qnm_snoc, SDM845_MASTER_SNOC_CNOC, 1, 8, SDM845_SLAVE_A1NOC_CFG, SDM845_SLAVE_A2NOC_CFG, SDM845_SLAVE_AOP, SDM845_SLAVE_AOSS, SDM845_SLAVE_CAMERA_CFG, SDM845_SLAVE_CLK_CTL, SDM845_SLAVE_CDSP_CFG, SDM845_SLAVE_RBCPR_CX_CFG, SDM845_SLAVE_CRYPTO_0_CFG, SDM845_SLAVE_DCC_CFG, SDM845_SLAVE_CNOC_DDRSS, SDM845_SLAVE_DISPLAY_CFG, SDM845_SLAVE_GLM, SDM845_SLAVE_GFX3D_CFG, SDM845_SLAVE_IMEM_CFG, SDM845_SLAVE_IPA_CFG, SDM845_SLAVE_CNOC_MNOC_CFG, SDM845_SLAVE_PCIE_0_CFG, SDM845_SLAVE_PCIE_1_CFG, SDM845_SLAVE_PDM, SDM845_SLAVE_SOUTH_PHY_CFG, SDM845_SLAVE_PIMEM_CFG, SDM845_SLAVE_PRNG, SDM845_SLAVE_QDSS_CFG, SDM845_SLAVE_BLSP_2, SDM845_SLAVE_BLSP_1, SDM845_SLAVE_SDCC_2, SDM845_SLAVE_SDCC_4, SDM845_SLAVE_SNOC_CFG, SDM845_SLAVE_SPDM_WRAPPER, SDM845_SLAVE_SPSS_CFG, SDM845_SLAVE_TCSR, SDM845_SLAVE_TLMM_NORTH, SDM845_SLAVE_TLMM_SOUTH, SDM845_SLAVE_TSIF, SDM845_SLAVE_UFS_CARD_CFG, SDM845_SLAVE_UFS_MEM_CFG, SDM845_SLAVE_USB3_0, SDM845_SLAVE_USB3_1, SDM845_SLAVE_VENUS_CFG, SDM845_SLAVE_VSENSE_CTRL_CFG, SDM845_SLAVE_SERVICE_CNOC); -DEFINE_QNODE(xm_qdss_dap, SDM845_MASTER_QDSS_DAP, 1, 8, SDM845_SLAVE_A1NOC_CFG, SDM845_SLAVE_A2NOC_CFG, SDM845_SLAVE_AOP, SDM845_SLAVE_AOSS, SDM845_SLAVE_CAMERA_CFG, SDM845_SLAVE_CLK_CTL, SDM845_SLAVE_CDSP_CFG, SDM845_SLAVE_RBCPR_CX_CFG, SDM845_SLAVE_CRYPTO_0_CFG, SDM845_SLAVE_DCC_CFG, SDM845_SLAVE_CNOC_DDRSS, SDM845_SLAVE_DISPLAY_CFG, SDM845_SLAVE_GLM, SDM845_SLAVE_GFX3D_CFG, SDM845_SLAVE_IMEM_CFG, SDM845_SLAVE_IPA_CFG, SDM845_SLAVE_CNOC_MNOC_CFG, SDM845_SLAVE_PCIE_0_CFG, SDM845_SLAVE_PCIE_1_CFG, SDM845_SLAVE_PDM, SDM845_SLAVE_SOUTH_PHY_CFG, SDM845_SLAVE_PIMEM_CFG, SDM845_SLAVE_PRNG, SDM845_SLAVE_QDSS_CFG, SDM845_SLAVE_BLSP_2, SDM845_SLAVE_BLSP_1, SDM845_SLAVE_SDCC_2, SDM845_SLAVE_SDCC_4, SDM845_SLAVE_SNOC_CFG, SDM845_SLAVE_SPDM_WRAPPER, SDM845_SLAVE_SPSS_CFG, SDM845_SLAVE_TCSR, SDM845_SLAVE_TLMM_NORTH, SDM845_SLAVE_TLMM_SOUTH, SDM845_SLAVE_TSIF, SDM845_SLAVE_UFS_CARD_CFG, SDM845_SLAVE_UFS_MEM_CFG, SDM845_SLAVE_USB3_0, SDM845_SLAVE_USB3_1, SDM845_SLAVE_VENUS_CFG, SDM845_SLAVE_VSENSE_CTRL_CFG, SDM845_SLAVE_CNOC_A2NOC, SDM845_SLAVE_SERVICE_CNOC); -DEFINE_QNODE(qhm_cnoc, SDM845_MASTER_CNOC_DC_NOC, 1, 4, SDM845_SLAVE_LLCC_CFG, SDM845_SLAVE_MEM_NOC_CFG); -DEFINE_QNODE(acm_l3, SDM845_MASTER_APPSS_PROC, 1, 16, SDM845_SLAVE_GNOC_SNOC, SDM845_SLAVE_GNOC_MEM_NOC, SDM845_SLAVE_SERVICE_GNOC); -DEFINE_QNODE(pm_gnoc_cfg, SDM845_MASTER_GNOC_CFG, 1, 4, SDM845_SLAVE_SERVICE_GNOC); -DEFINE_QNODE(llcc_mc, SDM845_MASTER_LLCC, 4, 4, SDM845_SLAVE_EBI1); -DEFINE_QNODE(acm_tcu, SDM845_MASTER_TCU_0, 1, 8, SDM845_SLAVE_MEM_NOC_GNOC, SDM845_SLAVE_LLCC, SDM845_SLAVE_MEM_NOC_SNOC); -DEFINE_QNODE(qhm_memnoc_cfg, SDM845_MASTER_MEM_NOC_CFG, 1, 4, SDM845_SLAVE_MSS_PROC_MS_MPU_CFG, SDM845_SLAVE_SERVICE_MEM_NOC); -DEFINE_QNODE(qnm_apps, SDM845_MASTER_GNOC_MEM_NOC, 2, 32, SDM845_SLAVE_LLCC); -DEFINE_QNODE(qnm_mnoc_hf, SDM845_MASTER_MNOC_HF_MEM_NOC, 2, 32, SDM845_SLAVE_MEM_NOC_GNOC, SDM845_SLAVE_LLCC); -DEFINE_QNODE(qnm_mnoc_sf, SDM845_MASTER_MNOC_SF_MEM_NOC, 1, 32, SDM845_SLAVE_MEM_NOC_GNOC, SDM845_SLAVE_LLCC, SDM845_SLAVE_MEM_NOC_SNOC); -DEFINE_QNODE(qnm_snoc_gc, SDM845_MASTER_SNOC_GC_MEM_NOC, 1, 8, SDM845_SLAVE_LLCC); -DEFINE_QNODE(qnm_snoc_sf, SDM845_MASTER_SNOC_SF_MEM_NOC, 1, 16, SDM845_SLAVE_MEM_NOC_GNOC, SDM845_SLAVE_LLCC); -DEFINE_QNODE(qxm_gpu, SDM845_MASTER_GFX3D, 2, 32, SDM845_SLAVE_MEM_NOC_GNOC, SDM845_SLAVE_LLCC, SDM845_SLAVE_MEM_NOC_SNOC); -DEFINE_QNODE(qhm_mnoc_cfg, SDM845_MASTER_CNOC_MNOC_CFG, 1, 4, SDM845_SLAVE_SERVICE_MNOC); -DEFINE_QNODE(qxm_camnoc_hf0, SDM845_MASTER_CAMNOC_HF0, 1, 32, SDM845_SLAVE_MNOC_HF_MEM_NOC); -DEFINE_QNODE(qxm_camnoc_hf1, SDM845_MASTER_CAMNOC_HF1, 1, 32, SDM845_SLAVE_MNOC_HF_MEM_NOC); -DEFINE_QNODE(qxm_camnoc_sf, SDM845_MASTER_CAMNOC_SF, 1, 32, SDM845_SLAVE_MNOC_SF_MEM_NOC); -DEFINE_QNODE(qxm_mdp0, SDM845_MASTER_MDP0, 1, 32, SDM845_SLAVE_MNOC_HF_MEM_NOC); -DEFINE_QNODE(qxm_mdp1, SDM845_MASTER_MDP1, 1, 32, SDM845_SLAVE_MNOC_HF_MEM_NOC); -DEFINE_QNODE(qxm_rot, SDM845_MASTER_ROTATOR, 1, 32, SDM845_SLAVE_MNOC_SF_MEM_NOC); -DEFINE_QNODE(qxm_venus0, SDM845_MASTER_VIDEO_P0, 1, 32, SDM845_SLAVE_MNOC_SF_MEM_NOC); -DEFINE_QNODE(qxm_venus1, SDM845_MASTER_VIDEO_P1, 1, 32, SDM845_SLAVE_MNOC_SF_MEM_NOC); -DEFINE_QNODE(qxm_venus_arm9, SDM845_MASTER_VIDEO_PROC, 1, 8, SDM845_SLAVE_MNOC_SF_MEM_NOC); -DEFINE_QNODE(qhm_snoc_cfg, SDM845_MASTER_SNOC_CFG, 1, 4, SDM845_SLAVE_SERVICE_SNOC); -DEFINE_QNODE(qnm_aggre1_noc, SDM845_MASTER_A1NOC_SNOC, 1, 16, SDM845_SLAVE_APPSS, SDM845_SLAVE_SNOC_CNOC, SDM845_SLAVE_SNOC_MEM_NOC_SF, SDM845_SLAVE_IMEM, SDM845_SLAVE_PIMEM, SDM845_SLAVE_QDSS_STM); -DEFINE_QNODE(qnm_aggre2_noc, SDM845_MASTER_A2NOC_SNOC, 1, 16, SDM845_SLAVE_APPSS, SDM845_SLAVE_SNOC_CNOC, SDM845_SLAVE_SNOC_MEM_NOC_SF, SDM845_SLAVE_IMEM, SDM845_SLAVE_PCIE_0, SDM845_SLAVE_PCIE_1, SDM845_SLAVE_PIMEM, SDM845_SLAVE_QDSS_STM, SDM845_SLAVE_TCU); -DEFINE_QNODE(qnm_gladiator_sodv, SDM845_MASTER_GNOC_SNOC, 1, 8, SDM845_SLAVE_APPSS, SDM845_SLAVE_SNOC_CNOC, SDM845_SLAVE_IMEM, SDM845_SLAVE_PCIE_0, SDM845_SLAVE_PCIE_1, SDM845_SLAVE_PIMEM, SDM845_SLAVE_QDSS_STM, SDM845_SLAVE_TCU); -DEFINE_QNODE(qnm_memnoc, SDM845_MASTER_MEM_NOC_SNOC, 1, 8, SDM845_SLAVE_APPSS, SDM845_SLAVE_SNOC_CNOC, SDM845_SLAVE_IMEM, SDM845_SLAVE_PIMEM, SDM845_SLAVE_QDSS_STM); -DEFINE_QNODE(qnm_pcie_anoc, SDM845_MASTER_ANOC_PCIE_SNOC, 1, 16, SDM845_SLAVE_APPSS, SDM845_SLAVE_SNOC_CNOC, SDM845_SLAVE_SNOC_MEM_NOC_SF, SDM845_SLAVE_IMEM, SDM845_SLAVE_QDSS_STM); -DEFINE_QNODE(qxm_pimem, SDM845_MASTER_PIMEM, 1, 8, SDM845_SLAVE_SNOC_MEM_NOC_GC, SDM845_SLAVE_IMEM); -DEFINE_QNODE(xm_gic, SDM845_MASTER_GIC, 1, 8, SDM845_SLAVE_SNOC_MEM_NOC_GC, SDM845_SLAVE_IMEM); -DEFINE_QNODE(qns_a1noc_snoc, SDM845_SLAVE_A1NOC_SNOC, 1, 16, SDM845_MASTER_A1NOC_SNOC); -DEFINE_QNODE(srvc_aggre1_noc, SDM845_SLAVE_SERVICE_A1NOC, 1, 4, 0); -DEFINE_QNODE(qns_pcie_a1noc_snoc, SDM845_SLAVE_ANOC_PCIE_A1NOC_SNOC, 1, 16, SDM845_MASTER_ANOC_PCIE_SNOC); -DEFINE_QNODE(qns_a2noc_snoc, SDM845_SLAVE_A2NOC_SNOC, 1, 16, SDM845_MASTER_A2NOC_SNOC); -DEFINE_QNODE(qns_pcie_snoc, SDM845_SLAVE_ANOC_PCIE_SNOC, 1, 16, SDM845_MASTER_ANOC_PCIE_SNOC); -DEFINE_QNODE(srvc_aggre2_noc, SDM845_SLAVE_SERVICE_A2NOC, 1, 4); -DEFINE_QNODE(qns_camnoc_uncomp, SDM845_SLAVE_CAMNOC_UNCOMP, 1, 32); -DEFINE_QNODE(qhs_a1_noc_cfg, SDM845_SLAVE_A1NOC_CFG, 1, 4, SDM845_MASTER_A1NOC_CFG); -DEFINE_QNODE(qhs_a2_noc_cfg, SDM845_SLAVE_A2NOC_CFG, 1, 4, SDM845_MASTER_A2NOC_CFG); -DEFINE_QNODE(qhs_aop, SDM845_SLAVE_AOP, 1, 4); -DEFINE_QNODE(qhs_aoss, SDM845_SLAVE_AOSS, 1, 4); -DEFINE_QNODE(qhs_camera_cfg, SDM845_SLAVE_CAMERA_CFG, 1, 4); -DEFINE_QNODE(qhs_clk_ctl, SDM845_SLAVE_CLK_CTL, 1, 4); -DEFINE_QNODE(qhs_compute_dsp_cfg, SDM845_SLAVE_CDSP_CFG, 1, 4); -DEFINE_QNODE(qhs_cpr_cx, SDM845_SLAVE_RBCPR_CX_CFG, 1, 4); -DEFINE_QNODE(qhs_crypto0_cfg, SDM845_SLAVE_CRYPTO_0_CFG, 1, 4); -DEFINE_QNODE(qhs_dcc_cfg, SDM845_SLAVE_DCC_CFG, 1, 4, SDM845_MASTER_CNOC_DC_NOC); -DEFINE_QNODE(qhs_ddrss_cfg, SDM845_SLAVE_CNOC_DDRSS, 1, 4); -DEFINE_QNODE(qhs_display_cfg, SDM845_SLAVE_DISPLAY_CFG, 1, 4); -DEFINE_QNODE(qhs_glm, SDM845_SLAVE_GLM, 1, 4); -DEFINE_QNODE(qhs_gpuss_cfg, SDM845_SLAVE_GFX3D_CFG, 1, 8); -DEFINE_QNODE(qhs_imem_cfg, SDM845_SLAVE_IMEM_CFG, 1, 4); -DEFINE_QNODE(qhs_ipa, SDM845_SLAVE_IPA_CFG, 1, 4); -DEFINE_QNODE(qhs_mnoc_cfg, SDM845_SLAVE_CNOC_MNOC_CFG, 1, 4, SDM845_MASTER_CNOC_MNOC_CFG); -DEFINE_QNODE(qhs_pcie0_cfg, SDM845_SLAVE_PCIE_0_CFG, 1, 4); -DEFINE_QNODE(qhs_pcie_gen3_cfg, SDM845_SLAVE_PCIE_1_CFG, 1, 4); -DEFINE_QNODE(qhs_pdm, SDM845_SLAVE_PDM, 1, 4); -DEFINE_QNODE(qhs_phy_refgen_south, SDM845_SLAVE_SOUTH_PHY_CFG, 1, 4); -DEFINE_QNODE(qhs_pimem_cfg, SDM845_SLAVE_PIMEM_CFG, 1, 4); -DEFINE_QNODE(qhs_prng, SDM845_SLAVE_PRNG, 1, 4); -DEFINE_QNODE(qhs_qdss_cfg, SDM845_SLAVE_QDSS_CFG, 1, 4); -DEFINE_QNODE(qhs_qupv3_north, SDM845_SLAVE_BLSP_2, 1, 4); -DEFINE_QNODE(qhs_qupv3_south, SDM845_SLAVE_BLSP_1, 1, 4); -DEFINE_QNODE(qhs_sdc2, SDM845_SLAVE_SDCC_2, 1, 4); -DEFINE_QNODE(qhs_sdc4, SDM845_SLAVE_SDCC_4, 1, 4); -DEFINE_QNODE(qhs_snoc_cfg, SDM845_SLAVE_SNOC_CFG, 1, 4, SDM845_MASTER_SNOC_CFG); -DEFINE_QNODE(qhs_spdm, SDM845_SLAVE_SPDM_WRAPPER, 1, 4); -DEFINE_QNODE(qhs_spss_cfg, SDM845_SLAVE_SPSS_CFG, 1, 4); -DEFINE_QNODE(qhs_tcsr, SDM845_SLAVE_TCSR, 1, 4); -DEFINE_QNODE(qhs_tlmm_north, SDM845_SLAVE_TLMM_NORTH, 1, 4); -DEFINE_QNODE(qhs_tlmm_south, SDM845_SLAVE_TLMM_SOUTH, 1, 4); -DEFINE_QNODE(qhs_tsif, SDM845_SLAVE_TSIF, 1, 4); -DEFINE_QNODE(qhs_ufs_card_cfg, SDM845_SLAVE_UFS_CARD_CFG, 1, 4); -DEFINE_QNODE(qhs_ufs_mem_cfg, SDM845_SLAVE_UFS_MEM_CFG, 1, 4); -DEFINE_QNODE(qhs_usb3_0, SDM845_SLAVE_USB3_0, 1, 4); -DEFINE_QNODE(qhs_usb3_1, SDM845_SLAVE_USB3_1, 1, 4); -DEFINE_QNODE(qhs_venus_cfg, SDM845_SLAVE_VENUS_CFG, 1, 4); -DEFINE_QNODE(qhs_vsense_ctrl_cfg, SDM845_SLAVE_VSENSE_CTRL_CFG, 1, 4); -DEFINE_QNODE(qns_cnoc_a2noc, SDM845_SLAVE_CNOC_A2NOC, 1, 8, SDM845_MASTER_CNOC_A2NOC); -DEFINE_QNODE(srvc_cnoc, SDM845_SLAVE_SERVICE_CNOC, 1, 4); -DEFINE_QNODE(qhs_llcc, SDM845_SLAVE_LLCC_CFG, 1, 4); -DEFINE_QNODE(qhs_memnoc, SDM845_SLAVE_MEM_NOC_CFG, 1, 4, SDM845_MASTER_MEM_NOC_CFG); -DEFINE_QNODE(qns_gladiator_sodv, SDM845_SLAVE_GNOC_SNOC, 1, 8, SDM845_MASTER_GNOC_SNOC); -DEFINE_QNODE(qns_gnoc_memnoc, SDM845_SLAVE_GNOC_MEM_NOC, 2, 32, SDM845_MASTER_GNOC_MEM_NOC); -DEFINE_QNODE(srvc_gnoc, SDM845_SLAVE_SERVICE_GNOC, 1, 4); -DEFINE_QNODE(ebi, SDM845_SLAVE_EBI1, 4, 4); -DEFINE_QNODE(qhs_mdsp_ms_mpu_cfg, SDM845_SLAVE_MSS_PROC_MS_MPU_CFG, 1, 4); -DEFINE_QNODE(qns_apps_io, SDM845_SLAVE_MEM_NOC_GNOC, 1, 32); -DEFINE_QNODE(qns_llcc, SDM845_SLAVE_LLCC, 4, 16, SDM845_MASTER_LLCC); -DEFINE_QNODE(qns_memnoc_snoc, SDM845_SLAVE_MEM_NOC_SNOC, 1, 8, SDM845_MASTER_MEM_NOC_SNOC); -DEFINE_QNODE(srvc_memnoc, SDM845_SLAVE_SERVICE_MEM_NOC, 1, 4); -DEFINE_QNODE(qns2_mem_noc, SDM845_SLAVE_MNOC_SF_MEM_NOC, 1, 32, SDM845_MASTER_MNOC_SF_MEM_NOC); -DEFINE_QNODE(qns_mem_noc_hf, SDM845_SLAVE_MNOC_HF_MEM_NOC, 2, 32, SDM845_MASTER_MNOC_HF_MEM_NOC); -DEFINE_QNODE(srvc_mnoc, SDM845_SLAVE_SERVICE_MNOC, 1, 4); -DEFINE_QNODE(qhs_apss, SDM845_SLAVE_APPSS, 1, 8); -DEFINE_QNODE(qns_cnoc, SDM845_SLAVE_SNOC_CNOC, 1, 8, SDM845_MASTER_SNOC_CNOC); -DEFINE_QNODE(qns_memnoc_gc, SDM845_SLAVE_SNOC_MEM_NOC_GC, 1, 8, SDM845_MASTER_SNOC_GC_MEM_NOC); -DEFINE_QNODE(qns_memnoc_sf, SDM845_SLAVE_SNOC_MEM_NOC_SF, 1, 16, SDM845_MASTER_SNOC_SF_MEM_NOC); -DEFINE_QNODE(qxs_imem, SDM845_SLAVE_IMEM, 1, 8); -DEFINE_QNODE(qxs_pcie, SDM845_SLAVE_PCIE_0, 1, 8); -DEFINE_QNODE(qxs_pcie_gen3, SDM845_SLAVE_PCIE_1, 1, 8); -DEFINE_QNODE(qxs_pimem, SDM845_SLAVE_PIMEM, 1, 8); -DEFINE_QNODE(srvc_snoc, SDM845_SLAVE_SERVICE_SNOC, 1, 4); -DEFINE_QNODE(xs_qdss_stm, SDM845_SLAVE_QDSS_STM, 1, 4); -DEFINE_QNODE(xs_sys_tcu_cfg, SDM845_SLAVE_TCU, 1, 8); +static struct qcom_icc_node qhm_a1noc_cfg = { + .name = "qhm_a1noc_cfg", + .id = SDM845_MASTER_A1NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDM845_SLAVE_SERVICE_A1NOC }, +}; -DEFINE_QBCM(bcm_acv, "ACV", false, &ebi); -DEFINE_QBCM(bcm_mc0, "MC0", true, &ebi); -DEFINE_QBCM(bcm_sh0, "SH0", true, &qns_llcc); -DEFINE_QBCM(bcm_mm0, "MM0", false, &qns_mem_noc_hf); -DEFINE_QBCM(bcm_sh1, "SH1", false, &qns_apps_io); -DEFINE_QBCM(bcm_mm1, "MM1", true, &qxm_camnoc_hf0_uncomp, &qxm_camnoc_hf1_uncomp, &qxm_camnoc_sf_uncomp, &qxm_camnoc_hf0, &qxm_camnoc_hf1, &qxm_mdp0, &qxm_mdp1); -DEFINE_QBCM(bcm_sh2, "SH2", false, &qns_memnoc_snoc); -DEFINE_QBCM(bcm_mm2, "MM2", false, &qns2_mem_noc); -DEFINE_QBCM(bcm_sh3, "SH3", false, &acm_tcu); -DEFINE_QBCM(bcm_mm3, "MM3", false, &qxm_camnoc_sf, &qxm_rot, &qxm_venus0, &qxm_venus1, &qxm_venus_arm9); -DEFINE_QBCM(bcm_sh5, "SH5", false, &qnm_apps); -DEFINE_QBCM(bcm_sn0, "SN0", true, &qns_memnoc_sf); -DEFINE_QBCM(bcm_ce0, "CE0", false, &qxm_crypto); -DEFINE_QBCM(bcm_cn0, "CN0", false, &qhm_spdm, &qhm_tic, &qnm_snoc, &xm_qdss_dap, &qhs_a1_noc_cfg, &qhs_a2_noc_cfg, &qhs_aop, &qhs_aoss, &qhs_camera_cfg, &qhs_clk_ctl, &qhs_compute_dsp_cfg, &qhs_cpr_cx, &qhs_crypto0_cfg, &qhs_dcc_cfg, &qhs_ddrss_cfg, &qhs_display_cfg, &qhs_glm, &qhs_gpuss_cfg, &qhs_imem_cfg, &qhs_ipa, &qhs_mnoc_cfg, &qhs_pcie0_cfg, &qhs_pcie_gen3_cfg, &qhs_pdm, &qhs_phy_refgen_south, &qhs_pimem_cfg, &qhs_prng, &qhs_qdss_cfg, &qhs_qupv3_north, &qhs_qupv3_south, &qhs_sdc2, &qhs_sdc4, &qhs_snoc_cfg, &qhs_spdm, &qhs_spss_cfg, &qhs_tcsr, &qhs_tlmm_north, &qhs_tlmm_south, &qhs_tsif, &qhs_ufs_card_cfg, &qhs_ufs_mem_cfg, &qhs_usb3_0, &qhs_usb3_1, &qhs_venus_cfg, &qhs_vsense_ctrl_cfg, &qns_cnoc_a2noc, &srvc_cnoc); -DEFINE_QBCM(bcm_qup0, "QUP0", false, &qhm_qup1, &qhm_qup2); -DEFINE_QBCM(bcm_sn1, "SN1", false, &qxs_imem); -DEFINE_QBCM(bcm_sn2, "SN2", false, &qns_memnoc_gc); -DEFINE_QBCM(bcm_sn3, "SN3", false, &qns_cnoc); -DEFINE_QBCM(bcm_sn4, "SN4", false, &qxm_pimem); -DEFINE_QBCM(bcm_sn5, "SN5", false, &xs_qdss_stm); -DEFINE_QBCM(bcm_sn6, "SN6", false, &qhs_apss, &srvc_snoc, &xs_sys_tcu_cfg); -DEFINE_QBCM(bcm_sn7, "SN7", false, &qxs_pcie); -DEFINE_QBCM(bcm_sn8, "SN8", false, &qxs_pcie_gen3); -DEFINE_QBCM(bcm_sn9, "SN9", false, &srvc_aggre1_noc, &qnm_aggre1_noc); -DEFINE_QBCM(bcm_sn11, "SN11", false, &srvc_aggre2_noc, &qnm_aggre2_noc); -DEFINE_QBCM(bcm_sn12, "SN12", false, &qnm_gladiator_sodv, &xm_gic); -DEFINE_QBCM(bcm_sn14, "SN14", false, &qnm_pcie_anoc); -DEFINE_QBCM(bcm_sn15, "SN15", false, &qnm_memnoc); +static struct qcom_icc_node qhm_qup1 = { + .name = "qhm_qup1", + .id = SDM845_MASTER_BLSP_1, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDM845_SLAVE_A1NOC_SNOC }, +}; + +static struct qcom_icc_node qhm_tsif = { + .name = "qhm_tsif", + .id = SDM845_MASTER_TSIF, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDM845_SLAVE_A1NOC_SNOC }, +}; + +static struct qcom_icc_node xm_sdc2 = { + .name = "xm_sdc2", + .id = SDM845_MASTER_SDCC_2, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDM845_SLAVE_A1NOC_SNOC }, +}; + +static struct qcom_icc_node xm_sdc4 = { + .name = "xm_sdc4", + .id = SDM845_MASTER_SDCC_4, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDM845_SLAVE_A1NOC_SNOC }, +}; + +static struct qcom_icc_node xm_ufs_card = { + .name = "xm_ufs_card", + .id = SDM845_MASTER_UFS_CARD, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDM845_SLAVE_A1NOC_SNOC }, +}; + +static struct qcom_icc_node xm_ufs_mem = { + .name = "xm_ufs_mem", + .id = SDM845_MASTER_UFS_MEM, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDM845_SLAVE_A1NOC_SNOC }, +}; + +static struct qcom_icc_node xm_pcie_0 = { + .name = "xm_pcie_0", + .id = SDM845_MASTER_PCIE_0, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDM845_SLAVE_ANOC_PCIE_A1NOC_SNOC }, +}; + +static struct qcom_icc_node qhm_a2noc_cfg = { + .name = "qhm_a2noc_cfg", + .id = SDM845_MASTER_A2NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDM845_SLAVE_SERVICE_A2NOC }, +}; + +static struct qcom_icc_node qhm_qdss_bam = { + .name = "qhm_qdss_bam", + .id = SDM845_MASTER_QDSS_BAM, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDM845_SLAVE_A2NOC_SNOC }, +}; + +static struct qcom_icc_node qhm_qup2 = { + .name = "qhm_qup2", + .id = SDM845_MASTER_BLSP_2, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDM845_SLAVE_A2NOC_SNOC }, +}; + +static struct qcom_icc_node qnm_cnoc = { + .name = "qnm_cnoc", + .id = SDM845_MASTER_CNOC_A2NOC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDM845_SLAVE_A2NOC_SNOC }, +}; + +static struct qcom_icc_node qxm_crypto = { + .name = "qxm_crypto", + .id = SDM845_MASTER_CRYPTO, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDM845_SLAVE_A2NOC_SNOC }, +}; + +static struct qcom_icc_node qxm_ipa = { + .name = "qxm_ipa", + .id = SDM845_MASTER_IPA, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDM845_SLAVE_A2NOC_SNOC }, +}; + +static struct qcom_icc_node xm_pcie3_1 = { + .name = "xm_pcie3_1", + .id = SDM845_MASTER_PCIE_1, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDM845_SLAVE_ANOC_PCIE_SNOC }, +}; + +static struct qcom_icc_node xm_qdss_etr = { + .name = "xm_qdss_etr", + .id = SDM845_MASTER_QDSS_ETR, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDM845_SLAVE_A2NOC_SNOC }, +}; + +static struct qcom_icc_node xm_usb3_0 = { + .name = "xm_usb3_0", + .id = SDM845_MASTER_USB3_0, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDM845_SLAVE_A2NOC_SNOC }, +}; + +static struct qcom_icc_node xm_usb3_1 = { + .name = "xm_usb3_1", + .id = SDM845_MASTER_USB3_1, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDM845_SLAVE_A2NOC_SNOC }, +}; + +static struct qcom_icc_node qxm_camnoc_hf0_uncomp = { + .name = "qxm_camnoc_hf0_uncomp", + .id = SDM845_MASTER_CAMNOC_HF0_UNCOMP, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SDM845_SLAVE_CAMNOC_UNCOMP }, +}; + +static struct qcom_icc_node qxm_camnoc_hf1_uncomp = { + .name = "qxm_camnoc_hf1_uncomp", + .id = SDM845_MASTER_CAMNOC_HF1_UNCOMP, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SDM845_SLAVE_CAMNOC_UNCOMP }, +}; + +static struct qcom_icc_node qxm_camnoc_sf_uncomp = { + .name = "qxm_camnoc_sf_uncomp", + .id = SDM845_MASTER_CAMNOC_SF_UNCOMP, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SDM845_SLAVE_CAMNOC_UNCOMP }, +}; + +static struct qcom_icc_node qhm_spdm = { + .name = "qhm_spdm", + .id = SDM845_MASTER_SPDM, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDM845_SLAVE_CNOC_A2NOC }, +}; + +static struct qcom_icc_node qhm_tic = { + .name = "qhm_tic", + .id = SDM845_MASTER_TIC, + .channels = 1, + .buswidth = 4, + .num_links = 43, + .links = { SDM845_SLAVE_A1NOC_CFG, + SDM845_SLAVE_A2NOC_CFG, + SDM845_SLAVE_AOP, + SDM845_SLAVE_AOSS, + SDM845_SLAVE_CAMERA_CFG, + SDM845_SLAVE_CLK_CTL, + SDM845_SLAVE_CDSP_CFG, + SDM845_SLAVE_RBCPR_CX_CFG, + SDM845_SLAVE_CRYPTO_0_CFG, + SDM845_SLAVE_DCC_CFG, + SDM845_SLAVE_CNOC_DDRSS, + SDM845_SLAVE_DISPLAY_CFG, + SDM845_SLAVE_GLM, + SDM845_SLAVE_GFX3D_CFG, + SDM845_SLAVE_IMEM_CFG, + SDM845_SLAVE_IPA_CFG, + SDM845_SLAVE_CNOC_MNOC_CFG, + SDM845_SLAVE_PCIE_0_CFG, + SDM845_SLAVE_PCIE_1_CFG, + SDM845_SLAVE_PDM, + SDM845_SLAVE_SOUTH_PHY_CFG, + SDM845_SLAVE_PIMEM_CFG, + SDM845_SLAVE_PRNG, + SDM845_SLAVE_QDSS_CFG, + SDM845_SLAVE_BLSP_2, + SDM845_SLAVE_BLSP_1, + SDM845_SLAVE_SDCC_2, + SDM845_SLAVE_SDCC_4, + SDM845_SLAVE_SNOC_CFG, + SDM845_SLAVE_SPDM_WRAPPER, + SDM845_SLAVE_SPSS_CFG, + SDM845_SLAVE_TCSR, + SDM845_SLAVE_TLMM_NORTH, + SDM845_SLAVE_TLMM_SOUTH, + SDM845_SLAVE_TSIF, + SDM845_SLAVE_UFS_CARD_CFG, + SDM845_SLAVE_UFS_MEM_CFG, + SDM845_SLAVE_USB3_0, + SDM845_SLAVE_USB3_1, + SDM845_SLAVE_VENUS_CFG, + SDM845_SLAVE_VSENSE_CTRL_CFG, + SDM845_SLAVE_CNOC_A2NOC, + SDM845_SLAVE_SERVICE_CNOC + }, +}; + +static struct qcom_icc_node qnm_snoc = { + .name = "qnm_snoc", + .id = SDM845_MASTER_SNOC_CNOC, + .channels = 1, + .buswidth = 8, + .num_links = 42, + .links = { SDM845_SLAVE_A1NOC_CFG, + SDM845_SLAVE_A2NOC_CFG, + SDM845_SLAVE_AOP, + SDM845_SLAVE_AOSS, + SDM845_SLAVE_CAMERA_CFG, + SDM845_SLAVE_CLK_CTL, + SDM845_SLAVE_CDSP_CFG, + SDM845_SLAVE_RBCPR_CX_CFG, + SDM845_SLAVE_CRYPTO_0_CFG, + SDM845_SLAVE_DCC_CFG, + SDM845_SLAVE_CNOC_DDRSS, + SDM845_SLAVE_DISPLAY_CFG, + SDM845_SLAVE_GLM, + SDM845_SLAVE_GFX3D_CFG, + SDM845_SLAVE_IMEM_CFG, + SDM845_SLAVE_IPA_CFG, + SDM845_SLAVE_CNOC_MNOC_CFG, + SDM845_SLAVE_PCIE_0_CFG, + SDM845_SLAVE_PCIE_1_CFG, + SDM845_SLAVE_PDM, + SDM845_SLAVE_SOUTH_PHY_CFG, + SDM845_SLAVE_PIMEM_CFG, + SDM845_SLAVE_PRNG, + SDM845_SLAVE_QDSS_CFG, + SDM845_SLAVE_BLSP_2, + SDM845_SLAVE_BLSP_1, + SDM845_SLAVE_SDCC_2, + SDM845_SLAVE_SDCC_4, + SDM845_SLAVE_SNOC_CFG, + SDM845_SLAVE_SPDM_WRAPPER, + SDM845_SLAVE_SPSS_CFG, + SDM845_SLAVE_TCSR, + SDM845_SLAVE_TLMM_NORTH, + SDM845_SLAVE_TLMM_SOUTH, + SDM845_SLAVE_TSIF, + SDM845_SLAVE_UFS_CARD_CFG, + SDM845_SLAVE_UFS_MEM_CFG, + SDM845_SLAVE_USB3_0, + SDM845_SLAVE_USB3_1, + SDM845_SLAVE_VENUS_CFG, + SDM845_SLAVE_VSENSE_CTRL_CFG, + SDM845_SLAVE_SERVICE_CNOC + }, +}; + +static struct qcom_icc_node xm_qdss_dap = { + .name = "xm_qdss_dap", + .id = SDM845_MASTER_QDSS_DAP, + .channels = 1, + .buswidth = 8, + .num_links = 43, + .links = { SDM845_SLAVE_A1NOC_CFG, + SDM845_SLAVE_A2NOC_CFG, + SDM845_SLAVE_AOP, + SDM845_SLAVE_AOSS, + SDM845_SLAVE_CAMERA_CFG, + SDM845_SLAVE_CLK_CTL, + SDM845_SLAVE_CDSP_CFG, + SDM845_SLAVE_RBCPR_CX_CFG, + SDM845_SLAVE_CRYPTO_0_CFG, + SDM845_SLAVE_DCC_CFG, + SDM845_SLAVE_CNOC_DDRSS, + SDM845_SLAVE_DISPLAY_CFG, + SDM845_SLAVE_GLM, + SDM845_SLAVE_GFX3D_CFG, + SDM845_SLAVE_IMEM_CFG, + SDM845_SLAVE_IPA_CFG, + SDM845_SLAVE_CNOC_MNOC_CFG, + SDM845_SLAVE_PCIE_0_CFG, + SDM845_SLAVE_PCIE_1_CFG, + SDM845_SLAVE_PDM, + SDM845_SLAVE_SOUTH_PHY_CFG, + SDM845_SLAVE_PIMEM_CFG, + SDM845_SLAVE_PRNG, + SDM845_SLAVE_QDSS_CFG, + SDM845_SLAVE_BLSP_2, + SDM845_SLAVE_BLSP_1, + SDM845_SLAVE_SDCC_2, + SDM845_SLAVE_SDCC_4, + SDM845_SLAVE_SNOC_CFG, + SDM845_SLAVE_SPDM_WRAPPER, + SDM845_SLAVE_SPSS_CFG, + SDM845_SLAVE_TCSR, + SDM845_SLAVE_TLMM_NORTH, + SDM845_SLAVE_TLMM_SOUTH, + SDM845_SLAVE_TSIF, + SDM845_SLAVE_UFS_CARD_CFG, + SDM845_SLAVE_UFS_MEM_CFG, + SDM845_SLAVE_USB3_0, + SDM845_SLAVE_USB3_1, + SDM845_SLAVE_VENUS_CFG, + SDM845_SLAVE_VSENSE_CTRL_CFG, + SDM845_SLAVE_CNOC_A2NOC, + SDM845_SLAVE_SERVICE_CNOC + }, +}; + +static struct qcom_icc_node qhm_cnoc = { + .name = "qhm_cnoc", + .id = SDM845_MASTER_CNOC_DC_NOC, + .channels = 1, + .buswidth = 4, + .num_links = 2, + .links = { SDM845_SLAVE_LLCC_CFG, + SDM845_SLAVE_MEM_NOC_CFG + }, +}; + +static struct qcom_icc_node acm_l3 = { + .name = "acm_l3", + .id = SDM845_MASTER_APPSS_PROC, + .channels = 1, + .buswidth = 16, + .num_links = 3, + .links = { SDM845_SLAVE_GNOC_SNOC, + SDM845_SLAVE_GNOC_MEM_NOC, + SDM845_SLAVE_SERVICE_GNOC + }, +}; + +static struct qcom_icc_node pm_gnoc_cfg = { + .name = "pm_gnoc_cfg", + .id = SDM845_MASTER_GNOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDM845_SLAVE_SERVICE_GNOC }, +}; + +static struct qcom_icc_node llcc_mc = { + .name = "llcc_mc", + .id = SDM845_MASTER_LLCC, + .channels = 4, + .buswidth = 4, + .num_links = 1, + .links = { SDM845_SLAVE_EBI1 }, +}; + +static struct qcom_icc_node acm_tcu = { + .name = "acm_tcu", + .id = SDM845_MASTER_TCU_0, + .channels = 1, + .buswidth = 8, + .num_links = 3, + .links = { SDM845_SLAVE_MEM_NOC_GNOC, + SDM845_SLAVE_LLCC, + SDM845_SLAVE_MEM_NOC_SNOC + }, +}; + +static struct qcom_icc_node qhm_memnoc_cfg = { + .name = "qhm_memnoc_cfg", + .id = SDM845_MASTER_MEM_NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 2, + .links = { SDM845_SLAVE_MSS_PROC_MS_MPU_CFG, + SDM845_SLAVE_SERVICE_MEM_NOC + }, +}; + +static struct qcom_icc_node qnm_apps = { + .name = "qnm_apps", + .id = SDM845_MASTER_GNOC_MEM_NOC, + .channels = 2, + .buswidth = 32, + .num_links = 1, + .links = { SDM845_SLAVE_LLCC }, +}; + +static struct qcom_icc_node qnm_mnoc_hf = { + .name = "qnm_mnoc_hf", + .id = SDM845_MASTER_MNOC_HF_MEM_NOC, + .channels = 2, + .buswidth = 32, + .num_links = 2, + .links = { SDM845_SLAVE_MEM_NOC_GNOC, + SDM845_SLAVE_LLCC + }, +}; + +static struct qcom_icc_node qnm_mnoc_sf = { + .name = "qnm_mnoc_sf", + .id = SDM845_MASTER_MNOC_SF_MEM_NOC, + .channels = 1, + .buswidth = 32, + .num_links = 3, + .links = { SDM845_SLAVE_MEM_NOC_GNOC, + SDM845_SLAVE_LLCC, + SDM845_SLAVE_MEM_NOC_SNOC + }, +}; + +static struct qcom_icc_node qnm_snoc_gc = { + .name = "qnm_snoc_gc", + .id = SDM845_MASTER_SNOC_GC_MEM_NOC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDM845_SLAVE_LLCC }, +}; + +static struct qcom_icc_node qnm_snoc_sf = { + .name = "qnm_snoc_sf", + .id = SDM845_MASTER_SNOC_SF_MEM_NOC, + .channels = 1, + .buswidth = 16, + .num_links = 2, + .links = { SDM845_SLAVE_MEM_NOC_GNOC, + SDM845_SLAVE_LLCC + }, +}; + +static struct qcom_icc_node qxm_gpu = { + .name = "qxm_gpu", + .id = SDM845_MASTER_GFX3D, + .channels = 2, + .buswidth = 32, + .num_links = 3, + .links = { SDM845_SLAVE_MEM_NOC_GNOC, + SDM845_SLAVE_LLCC, + SDM845_SLAVE_MEM_NOC_SNOC + }, +}; + +static struct qcom_icc_node qhm_mnoc_cfg = { + .name = "qhm_mnoc_cfg", + .id = SDM845_MASTER_CNOC_MNOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDM845_SLAVE_SERVICE_MNOC }, +}; + +static struct qcom_icc_node qxm_camnoc_hf0 = { + .name = "qxm_camnoc_hf0", + .id = SDM845_MASTER_CAMNOC_HF0, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SDM845_SLAVE_MNOC_HF_MEM_NOC }, +}; + +static struct qcom_icc_node qxm_camnoc_hf1 = { + .name = "qxm_camnoc_hf1", + .id = SDM845_MASTER_CAMNOC_HF1, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SDM845_SLAVE_MNOC_HF_MEM_NOC }, +}; + +static struct qcom_icc_node qxm_camnoc_sf = { + .name = "qxm_camnoc_sf", + .id = SDM845_MASTER_CAMNOC_SF, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SDM845_SLAVE_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qxm_mdp0 = { + .name = "qxm_mdp0", + .id = SDM845_MASTER_MDP0, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SDM845_SLAVE_MNOC_HF_MEM_NOC }, +}; + +static struct qcom_icc_node qxm_mdp1 = { + .name = "qxm_mdp1", + .id = SDM845_MASTER_MDP1, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SDM845_SLAVE_MNOC_HF_MEM_NOC }, +}; + +static struct qcom_icc_node qxm_rot = { + .name = "qxm_rot", + .id = SDM845_MASTER_ROTATOR, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SDM845_SLAVE_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qxm_venus0 = { + .name = "qxm_venus0", + .id = SDM845_MASTER_VIDEO_P0, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SDM845_SLAVE_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qxm_venus1 = { + .name = "qxm_venus1", + .id = SDM845_MASTER_VIDEO_P1, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SDM845_SLAVE_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qxm_venus_arm9 = { + .name = "qxm_venus_arm9", + .id = SDM845_MASTER_VIDEO_PROC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDM845_SLAVE_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qhm_snoc_cfg = { + .name = "qhm_snoc_cfg", + .id = SDM845_MASTER_SNOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDM845_SLAVE_SERVICE_SNOC }, +}; + +static struct qcom_icc_node qnm_aggre1_noc = { + .name = "qnm_aggre1_noc", + .id = SDM845_MASTER_A1NOC_SNOC, + .channels = 1, + .buswidth = 16, + .num_links = 6, + .links = { SDM845_SLAVE_APPSS, + SDM845_SLAVE_SNOC_CNOC, + SDM845_SLAVE_SNOC_MEM_NOC_SF, + SDM845_SLAVE_IMEM, + SDM845_SLAVE_PIMEM, + SDM845_SLAVE_QDSS_STM + }, +}; + +static struct qcom_icc_node qnm_aggre2_noc = { + .name = "qnm_aggre2_noc", + .id = SDM845_MASTER_A2NOC_SNOC, + .channels = 1, + .buswidth = 16, + .num_links = 9, + .links = { SDM845_SLAVE_APPSS, + SDM845_SLAVE_SNOC_CNOC, + SDM845_SLAVE_SNOC_MEM_NOC_SF, + SDM845_SLAVE_IMEM, + SDM845_SLAVE_PCIE_0, + SDM845_SLAVE_PCIE_1, + SDM845_SLAVE_PIMEM, + SDM845_SLAVE_QDSS_STM, + SDM845_SLAVE_TCU + }, +}; + +static struct qcom_icc_node qnm_gladiator_sodv = { + .name = "qnm_gladiator_sodv", + .id = SDM845_MASTER_GNOC_SNOC, + .channels = 1, + .buswidth = 8, + .num_links = 8, + .links = { SDM845_SLAVE_APPSS, + SDM845_SLAVE_SNOC_CNOC, + SDM845_SLAVE_IMEM, + SDM845_SLAVE_PCIE_0, + SDM845_SLAVE_PCIE_1, + SDM845_SLAVE_PIMEM, + SDM845_SLAVE_QDSS_STM, + SDM845_SLAVE_TCU + }, +}; + +static struct qcom_icc_node qnm_memnoc = { + .name = "qnm_memnoc", + .id = SDM845_MASTER_MEM_NOC_SNOC, + .channels = 1, + .buswidth = 8, + .num_links = 5, + .links = { SDM845_SLAVE_APPSS, + SDM845_SLAVE_SNOC_CNOC, + SDM845_SLAVE_IMEM, + SDM845_SLAVE_PIMEM, + SDM845_SLAVE_QDSS_STM + }, +}; + +static struct qcom_icc_node qnm_pcie_anoc = { + .name = "qnm_pcie_anoc", + .id = SDM845_MASTER_ANOC_PCIE_SNOC, + .channels = 1, + .buswidth = 16, + .num_links = 5, + .links = { SDM845_SLAVE_APPSS, + SDM845_SLAVE_SNOC_CNOC, + SDM845_SLAVE_SNOC_MEM_NOC_SF, + SDM845_SLAVE_IMEM, + SDM845_SLAVE_QDSS_STM + }, +}; + +static struct qcom_icc_node qxm_pimem = { + .name = "qxm_pimem", + .id = SDM845_MASTER_PIMEM, + .channels = 1, + .buswidth = 8, + .num_links = 2, + .links = { SDM845_SLAVE_SNOC_MEM_NOC_GC, + SDM845_SLAVE_IMEM + }, +}; + +static struct qcom_icc_node xm_gic = { + .name = "xm_gic", + .id = SDM845_MASTER_GIC, + .channels = 1, + .buswidth = 8, + .num_links = 2, + .links = { SDM845_SLAVE_SNOC_MEM_NOC_GC, + SDM845_SLAVE_IMEM + }, +}; + +static struct qcom_icc_node qns_a1noc_snoc = { + .name = "qns_a1noc_snoc", + .id = SDM845_SLAVE_A1NOC_SNOC, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SDM845_MASTER_A1NOC_SNOC }, +}; + +static struct qcom_icc_node srvc_aggre1_noc = { + .name = "srvc_aggre1_noc", + .id = SDM845_SLAVE_SERVICE_A1NOC, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { 0 }, +}; + +static struct qcom_icc_node qns_pcie_a1noc_snoc = { + .name = "qns_pcie_a1noc_snoc", + .id = SDM845_SLAVE_ANOC_PCIE_A1NOC_SNOC, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SDM845_MASTER_ANOC_PCIE_SNOC }, +}; + +static struct qcom_icc_node qns_a2noc_snoc = { + .name = "qns_a2noc_snoc", + .id = SDM845_SLAVE_A2NOC_SNOC, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SDM845_MASTER_A2NOC_SNOC }, +}; + +static struct qcom_icc_node qns_pcie_snoc = { + .name = "qns_pcie_snoc", + .id = SDM845_SLAVE_ANOC_PCIE_SNOC, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SDM845_MASTER_ANOC_PCIE_SNOC }, +}; + +static struct qcom_icc_node srvc_aggre2_noc = { + .name = "srvc_aggre2_noc", + .id = SDM845_SLAVE_SERVICE_A2NOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_camnoc_uncomp = { + .name = "qns_camnoc_uncomp", + .id = SDM845_SLAVE_CAMNOC_UNCOMP, + .channels = 1, + .buswidth = 32, +}; + +static struct qcom_icc_node qhs_a1_noc_cfg = { + .name = "qhs_a1_noc_cfg", + .id = SDM845_SLAVE_A1NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDM845_MASTER_A1NOC_CFG }, +}; + +static struct qcom_icc_node qhs_a2_noc_cfg = { + .name = "qhs_a2_noc_cfg", + .id = SDM845_SLAVE_A2NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDM845_MASTER_A2NOC_CFG }, +}; + +static struct qcom_icc_node qhs_aop = { + .name = "qhs_aop", + .id = SDM845_SLAVE_AOP, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_aoss = { + .name = "qhs_aoss", + .id = SDM845_SLAVE_AOSS, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_camera_cfg = { + .name = "qhs_camera_cfg", + .id = SDM845_SLAVE_CAMERA_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_clk_ctl = { + .name = "qhs_clk_ctl", + .id = SDM845_SLAVE_CLK_CTL, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_compute_dsp_cfg = { + .name = "qhs_compute_dsp_cfg", + .id = SDM845_SLAVE_CDSP_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_cpr_cx = { + .name = "qhs_cpr_cx", + .id = SDM845_SLAVE_RBCPR_CX_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_crypto0_cfg = { + .name = "qhs_crypto0_cfg", + .id = SDM845_SLAVE_CRYPTO_0_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_dcc_cfg = { + .name = "qhs_dcc_cfg", + .id = SDM845_SLAVE_DCC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDM845_MASTER_CNOC_DC_NOC }, +}; + +static struct qcom_icc_node qhs_ddrss_cfg = { + .name = "qhs_ddrss_cfg", + .id = SDM845_SLAVE_CNOC_DDRSS, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_display_cfg = { + .name = "qhs_display_cfg", + .id = SDM845_SLAVE_DISPLAY_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_glm = { + .name = "qhs_glm", + .id = SDM845_SLAVE_GLM, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_gpuss_cfg = { + .name = "qhs_gpuss_cfg", + .id = SDM845_SLAVE_GFX3D_CFG, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node qhs_imem_cfg = { + .name = "qhs_imem_cfg", + .id = SDM845_SLAVE_IMEM_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_ipa = { + .name = "qhs_ipa", + .id = SDM845_SLAVE_IPA_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_mnoc_cfg = { + .name = "qhs_mnoc_cfg", + .id = SDM845_SLAVE_CNOC_MNOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDM845_MASTER_CNOC_MNOC_CFG }, +}; + +static struct qcom_icc_node qhs_pcie0_cfg = { + .name = "qhs_pcie0_cfg", + .id = SDM845_SLAVE_PCIE_0_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_pcie_gen3_cfg = { + .name = "qhs_pcie_gen3_cfg", + .id = SDM845_SLAVE_PCIE_1_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_pdm = { + .name = "qhs_pdm", + .id = SDM845_SLAVE_PDM, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_phy_refgen_south = { + .name = "qhs_phy_refgen_south", + .id = SDM845_SLAVE_SOUTH_PHY_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_pimem_cfg = { + .name = "qhs_pimem_cfg", + .id = SDM845_SLAVE_PIMEM_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_prng = { + .name = "qhs_prng", + .id = SDM845_SLAVE_PRNG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_qdss_cfg = { + .name = "qhs_qdss_cfg", + .id = SDM845_SLAVE_QDSS_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_qupv3_north = { + .name = "qhs_qupv3_north", + .id = SDM845_SLAVE_BLSP_2, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_qupv3_south = { + .name = "qhs_qupv3_south", + .id = SDM845_SLAVE_BLSP_1, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_sdc2 = { + .name = "qhs_sdc2", + .id = SDM845_SLAVE_SDCC_2, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_sdc4 = { + .name = "qhs_sdc4", + .id = SDM845_SLAVE_SDCC_4, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_snoc_cfg = { + .name = "qhs_snoc_cfg", + .id = SDM845_SLAVE_SNOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDM845_MASTER_SNOC_CFG }, +}; + +static struct qcom_icc_node qhs_spdm = { + .name = "qhs_spdm", + .id = SDM845_SLAVE_SPDM_WRAPPER, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_spss_cfg = { + .name = "qhs_spss_cfg", + .id = SDM845_SLAVE_SPSS_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_tcsr = { + .name = "qhs_tcsr", + .id = SDM845_SLAVE_TCSR, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_tlmm_north = { + .name = "qhs_tlmm_north", + .id = SDM845_SLAVE_TLMM_NORTH, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_tlmm_south = { + .name = "qhs_tlmm_south", + .id = SDM845_SLAVE_TLMM_SOUTH, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_tsif = { + .name = "qhs_tsif", + .id = SDM845_SLAVE_TSIF, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_ufs_card_cfg = { + .name = "qhs_ufs_card_cfg", + .id = SDM845_SLAVE_UFS_CARD_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_ufs_mem_cfg = { + .name = "qhs_ufs_mem_cfg", + .id = SDM845_SLAVE_UFS_MEM_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_usb3_0 = { + .name = "qhs_usb3_0", + .id = SDM845_SLAVE_USB3_0, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_usb3_1 = { + .name = "qhs_usb3_1", + .id = SDM845_SLAVE_USB3_1, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_venus_cfg = { + .name = "qhs_venus_cfg", + .id = SDM845_SLAVE_VENUS_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_vsense_ctrl_cfg = { + .name = "qhs_vsense_ctrl_cfg", + .id = SDM845_SLAVE_VSENSE_CTRL_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_cnoc_a2noc = { + .name = "qns_cnoc_a2noc", + .id = SDM845_SLAVE_CNOC_A2NOC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDM845_MASTER_CNOC_A2NOC }, +}; + +static struct qcom_icc_node srvc_cnoc = { + .name = "srvc_cnoc", + .id = SDM845_SLAVE_SERVICE_CNOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_llcc = { + .name = "qhs_llcc", + .id = SDM845_SLAVE_LLCC_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_memnoc = { + .name = "qhs_memnoc", + .id = SDM845_SLAVE_MEM_NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDM845_MASTER_MEM_NOC_CFG }, +}; + +static struct qcom_icc_node qns_gladiator_sodv = { + .name = "qns_gladiator_sodv", + .id = SDM845_SLAVE_GNOC_SNOC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDM845_MASTER_GNOC_SNOC }, +}; + +static struct qcom_icc_node qns_gnoc_memnoc = { + .name = "qns_gnoc_memnoc", + .id = SDM845_SLAVE_GNOC_MEM_NOC, + .channels = 2, + .buswidth = 32, + .num_links = 1, + .links = { SDM845_MASTER_GNOC_MEM_NOC }, +}; + +static struct qcom_icc_node srvc_gnoc = { + .name = "srvc_gnoc", + .id = SDM845_SLAVE_SERVICE_GNOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node ebi = { + .name = "ebi", + .id = SDM845_SLAVE_EBI1, + .channels = 4, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_mdsp_ms_mpu_cfg = { + .name = "qhs_mdsp_ms_mpu_cfg", + .id = SDM845_SLAVE_MSS_PROC_MS_MPU_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_apps_io = { + .name = "qns_apps_io", + .id = SDM845_SLAVE_MEM_NOC_GNOC, + .channels = 1, + .buswidth = 32, +}; + +static struct qcom_icc_node qns_llcc = { + .name = "qns_llcc", + .id = SDM845_SLAVE_LLCC, + .channels = 4, + .buswidth = 16, + .num_links = 1, + .links = { SDM845_MASTER_LLCC }, +}; + +static struct qcom_icc_node qns_memnoc_snoc = { + .name = "qns_memnoc_snoc", + .id = SDM845_SLAVE_MEM_NOC_SNOC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDM845_MASTER_MEM_NOC_SNOC }, +}; + +static struct qcom_icc_node srvc_memnoc = { + .name = "srvc_memnoc", + .id = SDM845_SLAVE_SERVICE_MEM_NOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns2_mem_noc = { + .name = "qns2_mem_noc", + .id = SDM845_SLAVE_MNOC_SF_MEM_NOC, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SDM845_MASTER_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qns_mem_noc_hf = { + .name = "qns_mem_noc_hf", + .id = SDM845_SLAVE_MNOC_HF_MEM_NOC, + .channels = 2, + .buswidth = 32, + .num_links = 1, + .links = { SDM845_MASTER_MNOC_HF_MEM_NOC }, +}; + +static struct qcom_icc_node srvc_mnoc = { + .name = "srvc_mnoc", + .id = SDM845_SLAVE_SERVICE_MNOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_apss = { + .name = "qhs_apss", + .id = SDM845_SLAVE_APPSS, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node qns_cnoc = { + .name = "qns_cnoc", + .id = SDM845_SLAVE_SNOC_CNOC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDM845_MASTER_SNOC_CNOC }, +}; + +static struct qcom_icc_node qns_memnoc_gc = { + .name = "qns_memnoc_gc", + .id = SDM845_SLAVE_SNOC_MEM_NOC_GC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDM845_MASTER_SNOC_GC_MEM_NOC }, +}; + +static struct qcom_icc_node qns_memnoc_sf = { + .name = "qns_memnoc_sf", + .id = SDM845_SLAVE_SNOC_MEM_NOC_SF, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SDM845_MASTER_SNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qxs_imem = { + .name = "qxs_imem", + .id = SDM845_SLAVE_IMEM, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node qxs_pcie = { + .name = "qxs_pcie", + .id = SDM845_SLAVE_PCIE_0, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node qxs_pcie_gen3 = { + .name = "qxs_pcie_gen3", + .id = SDM845_SLAVE_PCIE_1, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node qxs_pimem = { + .name = "qxs_pimem", + .id = SDM845_SLAVE_PIMEM, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node srvc_snoc = { + .name = "srvc_snoc", + .id = SDM845_SLAVE_SERVICE_SNOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node xs_qdss_stm = { + .name = "xs_qdss_stm", + .id = SDM845_SLAVE_QDSS_STM, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node xs_sys_tcu_cfg = { + .name = "xs_sys_tcu_cfg", + .id = SDM845_SLAVE_TCU, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_bcm bcm_acv = { + .name = "ACV", + .keepalive = false, + .num_nodes = 1, + .nodes = { &ebi }, +}; + +static struct qcom_icc_bcm bcm_mc0 = { + .name = "MC0", + .keepalive = true, + .num_nodes = 1, + .nodes = { &ebi }, +}; + +static struct qcom_icc_bcm bcm_sh0 = { + .name = "SH0", + .keepalive = true, + .num_nodes = 1, + .nodes = { &qns_llcc }, +}; + +static struct qcom_icc_bcm bcm_mm0 = { + .name = "MM0", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qns_mem_noc_hf }, +}; + +static struct qcom_icc_bcm bcm_sh1 = { + .name = "SH1", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qns_apps_io }, +}; + +static struct qcom_icc_bcm bcm_mm1 = { + .name = "MM1", + .keepalive = true, + .num_nodes = 7, + .nodes = { &qxm_camnoc_hf0_uncomp, + &qxm_camnoc_hf1_uncomp, + &qxm_camnoc_sf_uncomp, + &qxm_camnoc_hf0, + &qxm_camnoc_hf1, + &qxm_mdp0, + &qxm_mdp1 + }, +}; + +static struct qcom_icc_bcm bcm_sh2 = { + .name = "SH2", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qns_memnoc_snoc }, +}; + +static struct qcom_icc_bcm bcm_mm2 = { + .name = "MM2", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qns2_mem_noc }, +}; + +static struct qcom_icc_bcm bcm_sh3 = { + .name = "SH3", + .keepalive = false, + .num_nodes = 1, + .nodes = { &acm_tcu }, +}; + +static struct qcom_icc_bcm bcm_mm3 = { + .name = "MM3", + .keepalive = false, + .num_nodes = 5, + .nodes = { &qxm_camnoc_sf, &qxm_rot, &qxm_venus0, &qxm_venus1, &qxm_venus_arm9 }, +}; + +static struct qcom_icc_bcm bcm_sh5 = { + .name = "SH5", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qnm_apps }, +}; + +static struct qcom_icc_bcm bcm_sn0 = { + .name = "SN0", + .keepalive = true, + .num_nodes = 1, + .nodes = { &qns_memnoc_sf }, +}; + +static struct qcom_icc_bcm bcm_ce0 = { + .name = "CE0", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qxm_crypto }, +}; + +static struct qcom_icc_bcm bcm_cn0 = { + .name = "CN0", + .keepalive = false, + .num_nodes = 47, + .nodes = { &qhm_spdm, + &qhm_tic, + &qnm_snoc, + &xm_qdss_dap, + &qhs_a1_noc_cfg, + &qhs_a2_noc_cfg, + &qhs_aop, + &qhs_aoss, + &qhs_camera_cfg, + &qhs_clk_ctl, + &qhs_compute_dsp_cfg, + &qhs_cpr_cx, + &qhs_crypto0_cfg, + &qhs_dcc_cfg, + &qhs_ddrss_cfg, + &qhs_display_cfg, + &qhs_glm, + &qhs_gpuss_cfg, + &qhs_imem_cfg, + &qhs_ipa, + &qhs_mnoc_cfg, + &qhs_pcie0_cfg, + &qhs_pcie_gen3_cfg, + &qhs_pdm, + &qhs_phy_refgen_south, + &qhs_pimem_cfg, + &qhs_prng, + &qhs_qdss_cfg, + &qhs_qupv3_north, + &qhs_qupv3_south, + &qhs_sdc2, + &qhs_sdc4, + &qhs_snoc_cfg, + &qhs_spdm, + &qhs_spss_cfg, + &qhs_tcsr, + &qhs_tlmm_north, + &qhs_tlmm_south, + &qhs_tsif, + &qhs_ufs_card_cfg, + &qhs_ufs_mem_cfg, + &qhs_usb3_0, + &qhs_usb3_1, + &qhs_venus_cfg, + &qhs_vsense_ctrl_cfg, + &qns_cnoc_a2noc, + &srvc_cnoc + }, +}; + +static struct qcom_icc_bcm bcm_qup0 = { + .name = "QUP0", + .keepalive = false, + .num_nodes = 2, + .nodes = { &qhm_qup1, &qhm_qup2 }, +}; + +static struct qcom_icc_bcm bcm_sn1 = { + .name = "SN1", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qxs_imem }, +}; + +static struct qcom_icc_bcm bcm_sn2 = { + .name = "SN2", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qns_memnoc_gc }, +}; + +static struct qcom_icc_bcm bcm_sn3 = { + .name = "SN3", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qns_cnoc }, +}; + +static struct qcom_icc_bcm bcm_sn4 = { + .name = "SN4", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qxm_pimem }, +}; + +static struct qcom_icc_bcm bcm_sn5 = { + .name = "SN5", + .keepalive = false, + .num_nodes = 1, + .nodes = { &xs_qdss_stm }, +}; + +static struct qcom_icc_bcm bcm_sn6 = { + .name = "SN6", + .keepalive = false, + .num_nodes = 3, + .nodes = { &qhs_apss, &srvc_snoc, &xs_sys_tcu_cfg }, +}; + +static struct qcom_icc_bcm bcm_sn7 = { + .name = "SN7", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qxs_pcie }, +}; + +static struct qcom_icc_bcm bcm_sn8 = { + .name = "SN8", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qxs_pcie_gen3 }, +}; + +static struct qcom_icc_bcm bcm_sn9 = { + .name = "SN9", + .keepalive = false, + .num_nodes = 2, + .nodes = { &srvc_aggre1_noc, &qnm_aggre1_noc }, +}; + +static struct qcom_icc_bcm bcm_sn11 = { + .name = "SN11", + .keepalive = false, + .num_nodes = 2, + .nodes = { &srvc_aggre2_noc, &qnm_aggre2_noc }, +}; + +static struct qcom_icc_bcm bcm_sn12 = { + .name = "SN12", + .keepalive = false, + .num_nodes = 2, + .nodes = { &qnm_gladiator_sodv, &xm_gic }, +}; + +static struct qcom_icc_bcm bcm_sn14 = { + .name = "SN14", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qnm_pcie_anoc }, +}; + +static struct qcom_icc_bcm bcm_sn15 = { + .name = "SN15", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qnm_memnoc }, +}; static struct qcom_icc_bcm * const aggre1_noc_bcms[] = { &bcm_sn9, diff --git a/drivers/interconnect/qcom/sdx55.c b/drivers/interconnect/qcom/sdx55.c index 130a828c3873..4117db046fa0 100644 --- a/drivers/interconnect/qcom/sdx55.c +++ b/drivers/interconnect/qcom/sdx55.c @@ -10,94 +10,778 @@ #include #include #include +#include #include -#include +#include #include #include "bcm-voter.h" #include "icc-rpmh.h" #include "sdx55.h" -DEFINE_QNODE(llcc_mc, SDX55_MASTER_LLCC, 4, 4, SDX55_SLAVE_EBI_CH0); -DEFINE_QNODE(acm_tcu, SDX55_MASTER_TCU_0, 1, 8, SDX55_SLAVE_LLCC, SDX55_SLAVE_MEM_NOC_SNOC, SDX55_SLAVE_MEM_NOC_PCIE_SNOC); -DEFINE_QNODE(qnm_snoc_gc, SDX55_MASTER_SNOC_GC_MEM_NOC, 1, 8, SDX55_SLAVE_LLCC); -DEFINE_QNODE(xm_apps_rdwr, SDX55_MASTER_AMPSS_M0, 1, 16, SDX55_SLAVE_LLCC, SDX55_SLAVE_MEM_NOC_SNOC, SDX55_SLAVE_MEM_NOC_PCIE_SNOC); -DEFINE_QNODE(qhm_audio, SDX55_MASTER_AUDIO, 1, 4, SDX55_SLAVE_ANOC_SNOC); -DEFINE_QNODE(qhm_blsp1, SDX55_MASTER_BLSP_1, 1, 4, SDX55_SLAVE_ANOC_SNOC); -DEFINE_QNODE(qhm_qdss_bam, SDX55_MASTER_QDSS_BAM, 1, 4, SDX55_SLAVE_SNOC_CFG, SDX55_SLAVE_EMAC_CFG, SDX55_SLAVE_USB3, SDX55_SLAVE_TLMM, SDX55_SLAVE_SPMI_FETCHER, SDX55_SLAVE_QDSS_CFG, SDX55_SLAVE_PDM, SDX55_SLAVE_SNOC_MEM_NOC_GC, SDX55_SLAVE_TCSR, SDX55_SLAVE_CNOC_DDRSS, SDX55_SLAVE_SPMI_VGI_COEX, SDX55_SLAVE_QPIC, SDX55_SLAVE_OCIMEM, SDX55_SLAVE_IPA_CFG, SDX55_SLAVE_USB3_PHY_CFG, SDX55_SLAVE_AOP, SDX55_SLAVE_BLSP_1, SDX55_SLAVE_SDCC_1, SDX55_SLAVE_CNOC_MSS, SDX55_SLAVE_PCIE_PARF, SDX55_SLAVE_ECC_CFG, SDX55_SLAVE_AUDIO, SDX55_SLAVE_AOSS, SDX55_SLAVE_PRNG, SDX55_SLAVE_CRYPTO_0_CFG, SDX55_SLAVE_TCU, SDX55_SLAVE_CLK_CTL, SDX55_SLAVE_IMEM_CFG); -DEFINE_QNODE(qhm_qpic, SDX55_MASTER_QPIC, 1, 4, SDX55_SLAVE_AOSS, SDX55_SLAVE_IPA_CFG, SDX55_SLAVE_ANOC_SNOC, SDX55_SLAVE_AOP, SDX55_SLAVE_AUDIO); -DEFINE_QNODE(qhm_snoc_cfg, SDX55_MASTER_SNOC_CFG, 1, 4, SDX55_SLAVE_SERVICE_SNOC); -DEFINE_QNODE(qhm_spmi_fetcher1, SDX55_MASTER_SPMI_FETCHER, 1, 4, SDX55_SLAVE_AOSS, SDX55_SLAVE_ANOC_SNOC, SDX55_SLAVE_AOP); -DEFINE_QNODE(qnm_aggre_noc, SDX55_MASTER_ANOC_SNOC, 1, 8, SDX55_SLAVE_PCIE_0, SDX55_SLAVE_SNOC_CFG, SDX55_SLAVE_SDCC_1, SDX55_SLAVE_TLMM, SDX55_SLAVE_SPMI_FETCHER, SDX55_SLAVE_QDSS_CFG, SDX55_SLAVE_PDM, SDX55_SLAVE_SNOC_MEM_NOC_GC, SDX55_SLAVE_TCSR, SDX55_SLAVE_CNOC_DDRSS, SDX55_SLAVE_SPMI_VGI_COEX, SDX55_SLAVE_QDSS_STM, SDX55_SLAVE_QPIC, SDX55_SLAVE_OCIMEM, SDX55_SLAVE_IPA_CFG, SDX55_SLAVE_USB3_PHY_CFG, SDX55_SLAVE_AOP, SDX55_SLAVE_BLSP_1, SDX55_SLAVE_USB3, SDX55_SLAVE_CNOC_MSS, SDX55_SLAVE_PCIE_PARF, SDX55_SLAVE_ECC_CFG, SDX55_SLAVE_APPSS, SDX55_SLAVE_AUDIO, SDX55_SLAVE_AOSS, SDX55_SLAVE_PRNG, SDX55_SLAVE_CRYPTO_0_CFG, SDX55_SLAVE_TCU, SDX55_SLAVE_CLK_CTL, SDX55_SLAVE_IMEM_CFG); -DEFINE_QNODE(qnm_ipa, SDX55_MASTER_IPA, 1, 8, SDX55_SLAVE_SNOC_CFG, SDX55_SLAVE_EMAC_CFG, SDX55_SLAVE_USB3, SDX55_SLAVE_AOSS, SDX55_SLAVE_SPMI_FETCHER, SDX55_SLAVE_QDSS_CFG, SDX55_SLAVE_PDM, SDX55_SLAVE_SNOC_MEM_NOC_GC, SDX55_SLAVE_TCSR, SDX55_SLAVE_CNOC_DDRSS, SDX55_SLAVE_QDSS_STM, SDX55_SLAVE_QPIC, SDX55_SLAVE_OCIMEM, SDX55_SLAVE_IPA_CFG, SDX55_SLAVE_USB3_PHY_CFG, SDX55_SLAVE_AOP, SDX55_SLAVE_BLSP_1, SDX55_SLAVE_SDCC_1, SDX55_SLAVE_CNOC_MSS, SDX55_SLAVE_PCIE_PARF, SDX55_SLAVE_ECC_CFG, SDX55_SLAVE_AUDIO, SDX55_SLAVE_TLMM, SDX55_SLAVE_PRNG, SDX55_SLAVE_CRYPTO_0_CFG, SDX55_SLAVE_CLK_CTL, SDX55_SLAVE_IMEM_CFG); -DEFINE_QNODE(qnm_memnoc, SDX55_MASTER_MEM_NOC_SNOC, 1, 8, SDX55_SLAVE_SNOC_CFG, SDX55_SLAVE_EMAC_CFG, SDX55_SLAVE_USB3, SDX55_SLAVE_TLMM, SDX55_SLAVE_SPMI_FETCHER, SDX55_SLAVE_QDSS_CFG, SDX55_SLAVE_PDM, SDX55_SLAVE_TCSR, SDX55_SLAVE_CNOC_DDRSS, SDX55_SLAVE_SPMI_VGI_COEX, SDX55_SLAVE_QDSS_STM, SDX55_SLAVE_QPIC, SDX55_SLAVE_OCIMEM, SDX55_SLAVE_IPA_CFG, SDX55_SLAVE_USB3_PHY_CFG, SDX55_SLAVE_AOP, SDX55_SLAVE_BLSP_1, SDX55_SLAVE_SDCC_1, SDX55_SLAVE_CNOC_MSS, SDX55_SLAVE_PCIE_PARF, SDX55_SLAVE_ECC_CFG, SDX55_SLAVE_APPSS, SDX55_SLAVE_AUDIO, SDX55_SLAVE_AOSS, SDX55_SLAVE_PRNG, SDX55_SLAVE_CRYPTO_0_CFG, SDX55_SLAVE_TCU, SDX55_SLAVE_CLK_CTL, SDX55_SLAVE_IMEM_CFG); -DEFINE_QNODE(qnm_memnoc_pcie, SDX55_MASTER_MEM_NOC_PCIE_SNOC, 1, 8, SDX55_SLAVE_PCIE_0); -DEFINE_QNODE(qxm_crypto, SDX55_MASTER_CRYPTO_CORE_0, 1, 8, SDX55_SLAVE_AOSS, SDX55_SLAVE_ANOC_SNOC, SDX55_SLAVE_AOP); -DEFINE_QNODE(xm_emac, SDX55_MASTER_EMAC, 1, 8, SDX55_SLAVE_ANOC_SNOC); -DEFINE_QNODE(xm_ipa2pcie_slv, SDX55_MASTER_IPA_PCIE, 1, 8, SDX55_SLAVE_PCIE_0); -DEFINE_QNODE(xm_pcie, SDX55_MASTER_PCIE, 1, 8, SDX55_SLAVE_ANOC_SNOC); -DEFINE_QNODE(xm_qdss_etr, SDX55_MASTER_QDSS_ETR, 1, 8, SDX55_SLAVE_SNOC_CFG, SDX55_SLAVE_EMAC_CFG, SDX55_SLAVE_USB3, SDX55_SLAVE_AOSS, SDX55_SLAVE_SPMI_FETCHER, SDX55_SLAVE_QDSS_CFG, SDX55_SLAVE_PDM, SDX55_SLAVE_SNOC_MEM_NOC_GC, SDX55_SLAVE_TCSR, SDX55_SLAVE_CNOC_DDRSS, SDX55_SLAVE_SPMI_VGI_COEX, SDX55_SLAVE_QPIC, SDX55_SLAVE_OCIMEM, SDX55_SLAVE_IPA_CFG, SDX55_SLAVE_USB3_PHY_CFG, SDX55_SLAVE_AOP, SDX55_SLAVE_BLSP_1, SDX55_SLAVE_SDCC_1, SDX55_SLAVE_CNOC_MSS, SDX55_SLAVE_PCIE_PARF, SDX55_SLAVE_ECC_CFG, SDX55_SLAVE_AUDIO, SDX55_SLAVE_AOSS, SDX55_SLAVE_PRNG, SDX55_SLAVE_CRYPTO_0_CFG, SDX55_SLAVE_TCU, SDX55_SLAVE_CLK_CTL, SDX55_SLAVE_IMEM_CFG); -DEFINE_QNODE(xm_sdc1, SDX55_MASTER_SDCC_1, 1, 8, SDX55_SLAVE_AOSS, SDX55_SLAVE_IPA_CFG, SDX55_SLAVE_ANOC_SNOC, SDX55_SLAVE_AOP, SDX55_SLAVE_AUDIO); -DEFINE_QNODE(xm_usb3, SDX55_MASTER_USB3, 1, 8, SDX55_SLAVE_ANOC_SNOC); -DEFINE_QNODE(ebi, SDX55_SLAVE_EBI_CH0, 1, 4); -DEFINE_QNODE(qns_llcc, SDX55_SLAVE_LLCC, 1, 16, SDX55_SLAVE_EBI_CH0); -DEFINE_QNODE(qns_memnoc_snoc, SDX55_SLAVE_MEM_NOC_SNOC, 1, 8, SDX55_MASTER_MEM_NOC_SNOC); -DEFINE_QNODE(qns_sys_pcie, SDX55_SLAVE_MEM_NOC_PCIE_SNOC, 1, 8, SDX55_MASTER_MEM_NOC_PCIE_SNOC); -DEFINE_QNODE(qhs_aop, SDX55_SLAVE_AOP, 1, 4); -DEFINE_QNODE(qhs_aoss, SDX55_SLAVE_AOSS, 1, 4); -DEFINE_QNODE(qhs_apss, SDX55_SLAVE_APPSS, 1, 4); -DEFINE_QNODE(qhs_audio, SDX55_SLAVE_AUDIO, 1, 4); -DEFINE_QNODE(qhs_blsp1, SDX55_SLAVE_BLSP_1, 1, 4); -DEFINE_QNODE(qhs_clk_ctl, SDX55_SLAVE_CLK_CTL, 1, 4); -DEFINE_QNODE(qhs_crypto0_cfg, SDX55_SLAVE_CRYPTO_0_CFG, 1, 4); -DEFINE_QNODE(qhs_ddrss_cfg, SDX55_SLAVE_CNOC_DDRSS, 1, 4); -DEFINE_QNODE(qhs_ecc_cfg, SDX55_SLAVE_ECC_CFG, 1, 4); -DEFINE_QNODE(qhs_emac_cfg, SDX55_SLAVE_EMAC_CFG, 1, 4); -DEFINE_QNODE(qhs_imem_cfg, SDX55_SLAVE_IMEM_CFG, 1, 4); -DEFINE_QNODE(qhs_ipa, SDX55_SLAVE_IPA_CFG, 1, 4); -DEFINE_QNODE(qhs_mss_cfg, SDX55_SLAVE_CNOC_MSS, 1, 4); -DEFINE_QNODE(qhs_pcie_parf, SDX55_SLAVE_PCIE_PARF, 1, 4); -DEFINE_QNODE(qhs_pdm, SDX55_SLAVE_PDM, 1, 4); -DEFINE_QNODE(qhs_prng, SDX55_SLAVE_PRNG, 1, 4); -DEFINE_QNODE(qhs_qdss_cfg, SDX55_SLAVE_QDSS_CFG, 1, 4); -DEFINE_QNODE(qhs_qpic, SDX55_SLAVE_QPIC, 1, 4); -DEFINE_QNODE(qhs_sdc1, SDX55_SLAVE_SDCC_1, 1, 4); -DEFINE_QNODE(qhs_snoc_cfg, SDX55_SLAVE_SNOC_CFG, 1, 4, SDX55_MASTER_SNOC_CFG); -DEFINE_QNODE(qhs_spmi_fetcher, SDX55_SLAVE_SPMI_FETCHER, 1, 4); -DEFINE_QNODE(qhs_spmi_vgi_coex, SDX55_SLAVE_SPMI_VGI_COEX, 1, 4); -DEFINE_QNODE(qhs_tcsr, SDX55_SLAVE_TCSR, 1, 4); -DEFINE_QNODE(qhs_tlmm, SDX55_SLAVE_TLMM, 1, 4); -DEFINE_QNODE(qhs_usb3, SDX55_SLAVE_USB3, 1, 4); -DEFINE_QNODE(qhs_usb3_phy, SDX55_SLAVE_USB3_PHY_CFG, 1, 4); -DEFINE_QNODE(qns_aggre_noc, SDX55_SLAVE_ANOC_SNOC, 1, 8, SDX55_MASTER_ANOC_SNOC); -DEFINE_QNODE(qns_snoc_memnoc, SDX55_SLAVE_SNOC_MEM_NOC_GC, 1, 8, SDX55_MASTER_SNOC_GC_MEM_NOC); -DEFINE_QNODE(qxs_imem, SDX55_SLAVE_OCIMEM, 1, 8); -DEFINE_QNODE(srvc_snoc, SDX55_SLAVE_SERVICE_SNOC, 1, 4); -DEFINE_QNODE(xs_pcie, SDX55_SLAVE_PCIE_0, 1, 8); -DEFINE_QNODE(xs_qdss_stm, SDX55_SLAVE_QDSS_STM, 1, 4); -DEFINE_QNODE(xs_sys_tcu_cfg, SDX55_SLAVE_TCU, 1, 8); +static struct qcom_icc_node llcc_mc = { + .name = "llcc_mc", + .id = SDX55_MASTER_LLCC, + .channels = 4, + .buswidth = 4, + .num_links = 1, + .links = { SDX55_SLAVE_EBI_CH0 }, +}; -DEFINE_QBCM(bcm_mc0, "MC0", true, &ebi); -DEFINE_QBCM(bcm_sh0, "SH0", true, &qns_llcc); -DEFINE_QBCM(bcm_ce0, "CE0", false, &qxm_crypto); -DEFINE_QBCM(bcm_pn0, "PN0", false, &qhm_snoc_cfg); -DEFINE_QBCM(bcm_sh3, "SH3", false, &xm_apps_rdwr); -DEFINE_QBCM(bcm_sh4, "SH4", false, &qns_memnoc_snoc, &qns_sys_pcie); -DEFINE_QBCM(bcm_sn0, "SN0", true, &qns_snoc_memnoc); -DEFINE_QBCM(bcm_sn1, "SN1", false, &qxs_imem); -DEFINE_QBCM(bcm_pn1, "PN1", false, &xm_sdc1); -DEFINE_QBCM(bcm_pn2, "PN2", false, &qhm_audio, &qhm_spmi_fetcher1); -DEFINE_QBCM(bcm_sn3, "SN3", false, &xs_qdss_stm); -DEFINE_QBCM(bcm_pn3, "PN3", false, &qhm_blsp1, &qhm_qpic); -DEFINE_QBCM(bcm_sn4, "SN4", false, &xs_sys_tcu_cfg); -DEFINE_QBCM(bcm_pn5, "PN5", false, &qxm_crypto); -DEFINE_QBCM(bcm_sn6, "SN6", false, &xs_pcie); -DEFINE_QBCM(bcm_sn7, "SN7", false, &qnm_aggre_noc, &xm_emac, &xm_emac, &xm_usb3, - &qns_aggre_noc); -DEFINE_QBCM(bcm_sn8, "SN8", false, &qhm_qdss_bam, &xm_qdss_etr); -DEFINE_QBCM(bcm_sn9, "SN9", false, &qnm_memnoc); -DEFINE_QBCM(bcm_sn10, "SN10", false, &qnm_memnoc_pcie); -DEFINE_QBCM(bcm_sn11, "SN11", false, &qnm_ipa, &xm_ipa2pcie_slv); +static struct qcom_icc_node acm_tcu = { + .name = "acm_tcu", + .id = SDX55_MASTER_TCU_0, + .channels = 1, + .buswidth = 8, + .num_links = 3, + .links = { SDX55_SLAVE_LLCC, + SDX55_SLAVE_MEM_NOC_SNOC, + SDX55_SLAVE_MEM_NOC_PCIE_SNOC + }, +}; + +static struct qcom_icc_node qnm_snoc_gc = { + .name = "qnm_snoc_gc", + .id = SDX55_MASTER_SNOC_GC_MEM_NOC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDX55_SLAVE_LLCC }, +}; + +static struct qcom_icc_node xm_apps_rdwr = { + .name = "xm_apps_rdwr", + .id = SDX55_MASTER_AMPSS_M0, + .channels = 1, + .buswidth = 16, + .num_links = 3, + .links = { SDX55_SLAVE_LLCC, + SDX55_SLAVE_MEM_NOC_SNOC, + SDX55_SLAVE_MEM_NOC_PCIE_SNOC + }, +}; + +static struct qcom_icc_node qhm_audio = { + .name = "qhm_audio", + .id = SDX55_MASTER_AUDIO, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDX55_SLAVE_ANOC_SNOC }, +}; + +static struct qcom_icc_node qhm_blsp1 = { + .name = "qhm_blsp1", + .id = SDX55_MASTER_BLSP_1, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDX55_SLAVE_ANOC_SNOC }, +}; + +static struct qcom_icc_node qhm_qdss_bam = { + .name = "qhm_qdss_bam", + .id = SDX55_MASTER_QDSS_BAM, + .channels = 1, + .buswidth = 4, + .num_links = 28, + .links = { SDX55_SLAVE_SNOC_CFG, + SDX55_SLAVE_EMAC_CFG, + SDX55_SLAVE_USB3, + SDX55_SLAVE_TLMM, + SDX55_SLAVE_SPMI_FETCHER, + SDX55_SLAVE_QDSS_CFG, + SDX55_SLAVE_PDM, + SDX55_SLAVE_SNOC_MEM_NOC_GC, + SDX55_SLAVE_TCSR, + SDX55_SLAVE_CNOC_DDRSS, + SDX55_SLAVE_SPMI_VGI_COEX, + SDX55_SLAVE_QPIC, + SDX55_SLAVE_OCIMEM, + SDX55_SLAVE_IPA_CFG, + SDX55_SLAVE_USB3_PHY_CFG, + SDX55_SLAVE_AOP, + SDX55_SLAVE_BLSP_1, + SDX55_SLAVE_SDCC_1, + SDX55_SLAVE_CNOC_MSS, + SDX55_SLAVE_PCIE_PARF, + SDX55_SLAVE_ECC_CFG, + SDX55_SLAVE_AUDIO, + SDX55_SLAVE_AOSS, + SDX55_SLAVE_PRNG, + SDX55_SLAVE_CRYPTO_0_CFG, + SDX55_SLAVE_TCU, + SDX55_SLAVE_CLK_CTL, + SDX55_SLAVE_IMEM_CFG + }, +}; + +static struct qcom_icc_node qhm_qpic = { + .name = "qhm_qpic", + .id = SDX55_MASTER_QPIC, + .channels = 1, + .buswidth = 4, + .num_links = 5, + .links = { SDX55_SLAVE_AOSS, + SDX55_SLAVE_IPA_CFG, + SDX55_SLAVE_ANOC_SNOC, + SDX55_SLAVE_AOP, + SDX55_SLAVE_AUDIO + }, +}; + +static struct qcom_icc_node qhm_snoc_cfg = { + .name = "qhm_snoc_cfg", + .id = SDX55_MASTER_SNOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDX55_SLAVE_SERVICE_SNOC }, +}; + +static struct qcom_icc_node qhm_spmi_fetcher1 = { + .name = "qhm_spmi_fetcher1", + .id = SDX55_MASTER_SPMI_FETCHER, + .channels = 1, + .buswidth = 4, + .num_links = 3, + .links = { SDX55_SLAVE_AOSS, + SDX55_SLAVE_ANOC_SNOC, + SDX55_SLAVE_AOP + }, +}; + +static struct qcom_icc_node qnm_aggre_noc = { + .name = "qnm_aggre_noc", + .id = SDX55_MASTER_ANOC_SNOC, + .channels = 1, + .buswidth = 8, + .num_links = 30, + .links = { SDX55_SLAVE_PCIE_0, + SDX55_SLAVE_SNOC_CFG, + SDX55_SLAVE_SDCC_1, + SDX55_SLAVE_TLMM, + SDX55_SLAVE_SPMI_FETCHER, + SDX55_SLAVE_QDSS_CFG, + SDX55_SLAVE_PDM, + SDX55_SLAVE_SNOC_MEM_NOC_GC, + SDX55_SLAVE_TCSR, + SDX55_SLAVE_CNOC_DDRSS, + SDX55_SLAVE_SPMI_VGI_COEX, + SDX55_SLAVE_QDSS_STM, + SDX55_SLAVE_QPIC, + SDX55_SLAVE_OCIMEM, + SDX55_SLAVE_IPA_CFG, + SDX55_SLAVE_USB3_PHY_CFG, + SDX55_SLAVE_AOP, + SDX55_SLAVE_BLSP_1, + SDX55_SLAVE_USB3, + SDX55_SLAVE_CNOC_MSS, + SDX55_SLAVE_PCIE_PARF, + SDX55_SLAVE_ECC_CFG, + SDX55_SLAVE_APPSS, + SDX55_SLAVE_AUDIO, + SDX55_SLAVE_AOSS, + SDX55_SLAVE_PRNG, + SDX55_SLAVE_CRYPTO_0_CFG, + SDX55_SLAVE_TCU, + SDX55_SLAVE_CLK_CTL, + SDX55_SLAVE_IMEM_CFG + }, +}; + +static struct qcom_icc_node qnm_ipa = { + .name = "qnm_ipa", + .id = SDX55_MASTER_IPA, + .channels = 1, + .buswidth = 8, + .num_links = 27, + .links = { SDX55_SLAVE_SNOC_CFG, + SDX55_SLAVE_EMAC_CFG, + SDX55_SLAVE_USB3, + SDX55_SLAVE_AOSS, + SDX55_SLAVE_SPMI_FETCHER, + SDX55_SLAVE_QDSS_CFG, + SDX55_SLAVE_PDM, + SDX55_SLAVE_SNOC_MEM_NOC_GC, + SDX55_SLAVE_TCSR, + SDX55_SLAVE_CNOC_DDRSS, + SDX55_SLAVE_QDSS_STM, + SDX55_SLAVE_QPIC, + SDX55_SLAVE_OCIMEM, + SDX55_SLAVE_IPA_CFG, + SDX55_SLAVE_USB3_PHY_CFG, + SDX55_SLAVE_AOP, + SDX55_SLAVE_BLSP_1, + SDX55_SLAVE_SDCC_1, + SDX55_SLAVE_CNOC_MSS, + SDX55_SLAVE_PCIE_PARF, + SDX55_SLAVE_ECC_CFG, + SDX55_SLAVE_AUDIO, + SDX55_SLAVE_TLMM, + SDX55_SLAVE_PRNG, + SDX55_SLAVE_CRYPTO_0_CFG, + SDX55_SLAVE_CLK_CTL, + SDX55_SLAVE_IMEM_CFG + }, +}; + +static struct qcom_icc_node qnm_memnoc = { + .name = "qnm_memnoc", + .id = SDX55_MASTER_MEM_NOC_SNOC, + .channels = 1, + .buswidth = 8, + .num_links = 29, + .links = { SDX55_SLAVE_SNOC_CFG, + SDX55_SLAVE_EMAC_CFG, + SDX55_SLAVE_USB3, + SDX55_SLAVE_TLMM, + SDX55_SLAVE_SPMI_FETCHER, + SDX55_SLAVE_QDSS_CFG, + SDX55_SLAVE_PDM, + SDX55_SLAVE_TCSR, + SDX55_SLAVE_CNOC_DDRSS, + SDX55_SLAVE_SPMI_VGI_COEX, + SDX55_SLAVE_QDSS_STM, + SDX55_SLAVE_QPIC, + SDX55_SLAVE_OCIMEM, + SDX55_SLAVE_IPA_CFG, + SDX55_SLAVE_USB3_PHY_CFG, + SDX55_SLAVE_AOP, + SDX55_SLAVE_BLSP_1, + SDX55_SLAVE_SDCC_1, + SDX55_SLAVE_CNOC_MSS, + SDX55_SLAVE_PCIE_PARF, + SDX55_SLAVE_ECC_CFG, + SDX55_SLAVE_APPSS, + SDX55_SLAVE_AUDIO, + SDX55_SLAVE_AOSS, + SDX55_SLAVE_PRNG, + SDX55_SLAVE_CRYPTO_0_CFG, + SDX55_SLAVE_TCU, + SDX55_SLAVE_CLK_CTL, + SDX55_SLAVE_IMEM_CFG + }, +}; + +static struct qcom_icc_node qnm_memnoc_pcie = { + .name = "qnm_memnoc_pcie", + .id = SDX55_MASTER_MEM_NOC_PCIE_SNOC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDX55_SLAVE_PCIE_0 }, +}; + +static struct qcom_icc_node qxm_crypto = { + .name = "qxm_crypto", + .id = SDX55_MASTER_CRYPTO_CORE_0, + .channels = 1, + .buswidth = 8, + .num_links = 3, + .links = { SDX55_SLAVE_AOSS, + SDX55_SLAVE_ANOC_SNOC, + SDX55_SLAVE_AOP + }, +}; + +static struct qcom_icc_node xm_emac = { + .name = "xm_emac", + .id = SDX55_MASTER_EMAC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDX55_SLAVE_ANOC_SNOC }, +}; + +static struct qcom_icc_node xm_ipa2pcie_slv = { + .name = "xm_ipa2pcie_slv", + .id = SDX55_MASTER_IPA_PCIE, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDX55_SLAVE_PCIE_0 }, +}; + +static struct qcom_icc_node xm_pcie = { + .name = "xm_pcie", + .id = SDX55_MASTER_PCIE, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDX55_SLAVE_ANOC_SNOC }, +}; + +static struct qcom_icc_node xm_qdss_etr = { + .name = "xm_qdss_etr", + .id = SDX55_MASTER_QDSS_ETR, + .channels = 1, + .buswidth = 8, + .num_links = 28, + .links = { SDX55_SLAVE_SNOC_CFG, + SDX55_SLAVE_EMAC_CFG, + SDX55_SLAVE_USB3, + SDX55_SLAVE_AOSS, + SDX55_SLAVE_SPMI_FETCHER, + SDX55_SLAVE_QDSS_CFG, + SDX55_SLAVE_PDM, + SDX55_SLAVE_SNOC_MEM_NOC_GC, + SDX55_SLAVE_TCSR, + SDX55_SLAVE_CNOC_DDRSS, + SDX55_SLAVE_SPMI_VGI_COEX, + SDX55_SLAVE_QPIC, + SDX55_SLAVE_OCIMEM, + SDX55_SLAVE_IPA_CFG, + SDX55_SLAVE_USB3_PHY_CFG, + SDX55_SLAVE_AOP, + SDX55_SLAVE_BLSP_1, + SDX55_SLAVE_SDCC_1, + SDX55_SLAVE_CNOC_MSS, + SDX55_SLAVE_PCIE_PARF, + SDX55_SLAVE_ECC_CFG, + SDX55_SLAVE_AUDIO, + SDX55_SLAVE_AOSS, + SDX55_SLAVE_PRNG, + SDX55_SLAVE_CRYPTO_0_CFG, + SDX55_SLAVE_TCU, + SDX55_SLAVE_CLK_CTL, + SDX55_SLAVE_IMEM_CFG + }, +}; + +static struct qcom_icc_node xm_sdc1 = { + .name = "xm_sdc1", + .id = SDX55_MASTER_SDCC_1, + .channels = 1, + .buswidth = 8, + .num_links = 5, + .links = { SDX55_SLAVE_AOSS, + SDX55_SLAVE_IPA_CFG, + SDX55_SLAVE_ANOC_SNOC, + SDX55_SLAVE_AOP, + SDX55_SLAVE_AUDIO + }, +}; + +static struct qcom_icc_node xm_usb3 = { + .name = "xm_usb3", + .id = SDX55_MASTER_USB3, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDX55_SLAVE_ANOC_SNOC }, +}; + +static struct qcom_icc_node ebi = { + .name = "ebi", + .id = SDX55_SLAVE_EBI_CH0, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_llcc = { + .name = "qns_llcc", + .id = SDX55_SLAVE_LLCC, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SDX55_SLAVE_EBI_CH0 }, +}; + +static struct qcom_icc_node qns_memnoc_snoc = { + .name = "qns_memnoc_snoc", + .id = SDX55_SLAVE_MEM_NOC_SNOC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDX55_MASTER_MEM_NOC_SNOC }, +}; + +static struct qcom_icc_node qns_sys_pcie = { + .name = "qns_sys_pcie", + .id = SDX55_SLAVE_MEM_NOC_PCIE_SNOC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDX55_MASTER_MEM_NOC_PCIE_SNOC }, +}; + +static struct qcom_icc_node qhs_aop = { + .name = "qhs_aop", + .id = SDX55_SLAVE_AOP, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_aoss = { + .name = "qhs_aoss", + .id = SDX55_SLAVE_AOSS, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_apss = { + .name = "qhs_apss", + .id = SDX55_SLAVE_APPSS, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_audio = { + .name = "qhs_audio", + .id = SDX55_SLAVE_AUDIO, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_blsp1 = { + .name = "qhs_blsp1", + .id = SDX55_SLAVE_BLSP_1, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_clk_ctl = { + .name = "qhs_clk_ctl", + .id = SDX55_SLAVE_CLK_CTL, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_crypto0_cfg = { + .name = "qhs_crypto0_cfg", + .id = SDX55_SLAVE_CRYPTO_0_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_ddrss_cfg = { + .name = "qhs_ddrss_cfg", + .id = SDX55_SLAVE_CNOC_DDRSS, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_ecc_cfg = { + .name = "qhs_ecc_cfg", + .id = SDX55_SLAVE_ECC_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_emac_cfg = { + .name = "qhs_emac_cfg", + .id = SDX55_SLAVE_EMAC_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_imem_cfg = { + .name = "qhs_imem_cfg", + .id = SDX55_SLAVE_IMEM_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_ipa = { + .name = "qhs_ipa", + .id = SDX55_SLAVE_IPA_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_mss_cfg = { + .name = "qhs_mss_cfg", + .id = SDX55_SLAVE_CNOC_MSS, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_pcie_parf = { + .name = "qhs_pcie_parf", + .id = SDX55_SLAVE_PCIE_PARF, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_pdm = { + .name = "qhs_pdm", + .id = SDX55_SLAVE_PDM, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_prng = { + .name = "qhs_prng", + .id = SDX55_SLAVE_PRNG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_qdss_cfg = { + .name = "qhs_qdss_cfg", + .id = SDX55_SLAVE_QDSS_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_qpic = { + .name = "qhs_qpic", + .id = SDX55_SLAVE_QPIC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_sdc1 = { + .name = "qhs_sdc1", + .id = SDX55_SLAVE_SDCC_1, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_snoc_cfg = { + .name = "qhs_snoc_cfg", + .id = SDX55_SLAVE_SNOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDX55_MASTER_SNOC_CFG }, +}; + +static struct qcom_icc_node qhs_spmi_fetcher = { + .name = "qhs_spmi_fetcher", + .id = SDX55_SLAVE_SPMI_FETCHER, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_spmi_vgi_coex = { + .name = "qhs_spmi_vgi_coex", + .id = SDX55_SLAVE_SPMI_VGI_COEX, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_tcsr = { + .name = "qhs_tcsr", + .id = SDX55_SLAVE_TCSR, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_tlmm = { + .name = "qhs_tlmm", + .id = SDX55_SLAVE_TLMM, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_usb3 = { + .name = "qhs_usb3", + .id = SDX55_SLAVE_USB3, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_usb3_phy = { + .name = "qhs_usb3_phy", + .id = SDX55_SLAVE_USB3_PHY_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_aggre_noc = { + .name = "qns_aggre_noc", + .id = SDX55_SLAVE_ANOC_SNOC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDX55_MASTER_ANOC_SNOC }, +}; + +static struct qcom_icc_node qns_snoc_memnoc = { + .name = "qns_snoc_memnoc", + .id = SDX55_SLAVE_SNOC_MEM_NOC_GC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDX55_MASTER_SNOC_GC_MEM_NOC }, +}; + +static struct qcom_icc_node qxs_imem = { + .name = "qxs_imem", + .id = SDX55_SLAVE_OCIMEM, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node srvc_snoc = { + .name = "srvc_snoc", + .id = SDX55_SLAVE_SERVICE_SNOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node xs_pcie = { + .name = "xs_pcie", + .id = SDX55_SLAVE_PCIE_0, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node xs_qdss_stm = { + .name = "xs_qdss_stm", + .id = SDX55_SLAVE_QDSS_STM, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node xs_sys_tcu_cfg = { + .name = "xs_sys_tcu_cfg", + .id = SDX55_SLAVE_TCU, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_bcm bcm_mc0 = { + .name = "MC0", + .keepalive = true, + .num_nodes = 1, + .nodes = { &ebi }, +}; + +static struct qcom_icc_bcm bcm_sh0 = { + .name = "SH0", + .keepalive = true, + .num_nodes = 1, + .nodes = { &qns_llcc }, +}; + +static struct qcom_icc_bcm bcm_ce0 = { + .name = "CE0", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qxm_crypto }, +}; + +static struct qcom_icc_bcm bcm_pn0 = { + .name = "PN0", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qhm_snoc_cfg }, +}; + +static struct qcom_icc_bcm bcm_sh3 = { + .name = "SH3", + .keepalive = false, + .num_nodes = 1, + .nodes = { &xm_apps_rdwr }, +}; + +static struct qcom_icc_bcm bcm_sh4 = { + .name = "SH4", + .keepalive = false, + .num_nodes = 2, + .nodes = { &qns_memnoc_snoc, &qns_sys_pcie }, +}; + +static struct qcom_icc_bcm bcm_sn0 = { + .name = "SN0", + .keepalive = true, + .num_nodes = 1, + .nodes = { &qns_snoc_memnoc }, +}; + +static struct qcom_icc_bcm bcm_sn1 = { + .name = "SN1", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qxs_imem }, +}; + +static struct qcom_icc_bcm bcm_pn1 = { + .name = "PN1", + .keepalive = false, + .num_nodes = 1, + .nodes = { &xm_sdc1 }, +}; + +static struct qcom_icc_bcm bcm_pn2 = { + .name = "PN2", + .keepalive = false, + .num_nodes = 2, + .nodes = { &qhm_audio, &qhm_spmi_fetcher1 }, +}; + +static struct qcom_icc_bcm bcm_sn3 = { + .name = "SN3", + .keepalive = false, + .num_nodes = 1, + .nodes = { &xs_qdss_stm }, +}; + +static struct qcom_icc_bcm bcm_pn3 = { + .name = "PN3", + .keepalive = false, + .num_nodes = 2, + .nodes = { &qhm_blsp1, &qhm_qpic }, +}; + +static struct qcom_icc_bcm bcm_sn4 = { + .name = "SN4", + .keepalive = false, + .num_nodes = 1, + .nodes = { &xs_sys_tcu_cfg }, +}; + +static struct qcom_icc_bcm bcm_pn5 = { + .name = "PN5", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qxm_crypto }, +}; + +static struct qcom_icc_bcm bcm_sn6 = { + .name = "SN6", + .keepalive = false, + .num_nodes = 1, + .nodes = { &xs_pcie }, +}; + +static struct qcom_icc_bcm bcm_sn7 = { + .name = "SN7", + .keepalive = false, + .num_nodes = 5, + .nodes = { &qnm_aggre_noc, &xm_emac, &xm_emac, &xm_usb3, &qns_aggre_noc }, +}; + +static struct qcom_icc_bcm bcm_sn8 = { + .name = "SN8", + .keepalive = false, + .num_nodes = 2, + .nodes = { &qhm_qdss_bam, &xm_qdss_etr }, +}; + +static struct qcom_icc_bcm bcm_sn9 = { + .name = "SN9", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qnm_memnoc }, +}; + +static struct qcom_icc_bcm bcm_sn10 = { + .name = "SN10", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qnm_memnoc_pcie }, +}; + +static struct qcom_icc_bcm bcm_sn11 = { + .name = "SN11", + .keepalive = false, + .num_nodes = 2, + .nodes = { &qnm_ipa, &xm_ipa2pcie_slv }, +}; static struct qcom_icc_bcm * const mc_virt_bcms[] = { &bcm_mc0, diff --git a/drivers/interconnect/qcom/sdx65.c b/drivers/interconnect/qcom/sdx65.c index b16d31d53e9b..d3a6c6c148e5 100644 --- a/drivers/interconnect/qcom/sdx65.c +++ b/drivers/interconnect/qcom/sdx65.c @@ -6,90 +6,769 @@ #include #include #include +#include #include -#include +#include #include #include "bcm-voter.h" #include "icc-rpmh.h" #include "sdx65.h" -DEFINE_QNODE(llcc_mc, SDX65_MASTER_LLCC, 1, 4, SDX65_SLAVE_EBI1); -DEFINE_QNODE(acm_tcu, SDX65_MASTER_TCU_0, 1, 8, SDX65_SLAVE_LLCC, SDX65_SLAVE_MEM_NOC_SNOC, SDX65_SLAVE_MEM_NOC_PCIE_SNOC); -DEFINE_QNODE(qnm_snoc_gc, SDX65_MASTER_SNOC_GC_MEM_NOC, 1, 16, SDX65_SLAVE_LLCC); -DEFINE_QNODE(xm_apps_rdwr, SDX65_MASTER_APPSS_PROC, 1, 16, SDX65_SLAVE_LLCC, SDX65_SLAVE_MEM_NOC_SNOC, SDX65_SLAVE_MEM_NOC_PCIE_SNOC); -DEFINE_QNODE(qhm_audio, SDX65_MASTER_AUDIO, 1, 4, SDX65_SLAVE_ANOC_SNOC); -DEFINE_QNODE(qhm_blsp1, SDX65_MASTER_BLSP_1, 1, 4, SDX65_SLAVE_ANOC_SNOC); -DEFINE_QNODE(qhm_qdss_bam, SDX65_MASTER_QDSS_BAM, 1, 4, SDX65_SLAVE_AOSS, SDX65_SLAVE_AUDIO, SDX65_SLAVE_BLSP_1, SDX65_SLAVE_CLK_CTL, SDX65_SLAVE_CRYPTO_0_CFG, SDX65_SLAVE_CNOC_DDRSS, SDX65_SLAVE_ECC_CFG, SDX65_SLAVE_IMEM_CFG, SDX65_SLAVE_IPA_CFG, SDX65_SLAVE_CNOC_MSS, SDX65_SLAVE_PCIE_PARF, SDX65_SLAVE_PDM, SDX65_SLAVE_PRNG, SDX65_SLAVE_QDSS_CFG, SDX65_SLAVE_QPIC, SDX65_SLAVE_SDCC_1, SDX65_SLAVE_SNOC_CFG, SDX65_SLAVE_SPMI_FETCHER, SDX65_SLAVE_SPMI_VGI_COEX, SDX65_SLAVE_TCSR, SDX65_SLAVE_TLMM, SDX65_SLAVE_USB3, SDX65_SLAVE_USB3_PHY_CFG, SDX65_SLAVE_SNOC_MEM_NOC_GC, SDX65_SLAVE_IMEM, SDX65_SLAVE_TCU); -DEFINE_QNODE(qhm_qpic, SDX65_MASTER_QPIC, 1, 4, SDX65_SLAVE_AOSS, SDX65_SLAVE_AUDIO, SDX65_SLAVE_IPA_CFG, SDX65_SLAVE_ANOC_SNOC); -DEFINE_QNODE(qhm_snoc_cfg, SDX65_MASTER_SNOC_CFG, 1, 4, SDX65_SLAVE_SERVICE_SNOC); -DEFINE_QNODE(qhm_spmi_fetcher1, SDX65_MASTER_SPMI_FETCHER, 1, 4, SDX65_SLAVE_AOSS, SDX65_SLAVE_ANOC_SNOC); -DEFINE_QNODE(qnm_aggre_noc, SDX65_MASTER_ANOC_SNOC, 1, 8, SDX65_SLAVE_AOSS, SDX65_SLAVE_APPSS, SDX65_SLAVE_AUDIO, SDX65_SLAVE_BLSP_1, SDX65_SLAVE_CLK_CTL, SDX65_SLAVE_CRYPTO_0_CFG, SDX65_SLAVE_CNOC_DDRSS, SDX65_SLAVE_ECC_CFG, SDX65_SLAVE_IMEM_CFG, SDX65_SLAVE_IPA_CFG, SDX65_SLAVE_CNOC_MSS, SDX65_SLAVE_PCIE_PARF, SDX65_SLAVE_PDM, SDX65_SLAVE_PRNG, SDX65_SLAVE_QDSS_CFG, SDX65_SLAVE_QPIC, SDX65_SLAVE_SDCC_1, SDX65_SLAVE_SNOC_CFG, SDX65_SLAVE_SPMI_FETCHER, SDX65_SLAVE_SPMI_VGI_COEX, SDX65_SLAVE_TCSR, SDX65_SLAVE_TLMM, SDX65_SLAVE_USB3, SDX65_SLAVE_USB3_PHY_CFG, SDX65_SLAVE_SNOC_MEM_NOC_GC, SDX65_SLAVE_IMEM, SDX65_SLAVE_PCIE_0, SDX65_SLAVE_QDSS_STM, SDX65_SLAVE_TCU); -DEFINE_QNODE(qnm_ipa, SDX65_MASTER_IPA, 1, 8, SDX65_SLAVE_AOSS, SDX65_SLAVE_AUDIO, SDX65_SLAVE_BLSP_1, SDX65_SLAVE_CLK_CTL, SDX65_SLAVE_CRYPTO_0_CFG, SDX65_SLAVE_CNOC_DDRSS, SDX65_SLAVE_ECC_CFG, SDX65_SLAVE_IMEM_CFG, SDX65_SLAVE_IPA_CFG, SDX65_SLAVE_CNOC_MSS, SDX65_SLAVE_PCIE_PARF, SDX65_SLAVE_PDM, SDX65_SLAVE_PRNG, SDX65_SLAVE_QDSS_CFG, SDX65_SLAVE_QPIC, SDX65_SLAVE_SDCC_1, SDX65_SLAVE_SNOC_CFG, SDX65_SLAVE_SPMI_FETCHER, SDX65_SLAVE_TCSR, SDX65_SLAVE_TLMM, SDX65_SLAVE_USB3, SDX65_SLAVE_USB3_PHY_CFG, SDX65_SLAVE_SNOC_MEM_NOC_GC, SDX65_SLAVE_IMEM, SDX65_SLAVE_PCIE_0, SDX65_SLAVE_QDSS_STM); -DEFINE_QNODE(qnm_memnoc, SDX65_MASTER_MEM_NOC_SNOC, 1, 8, SDX65_SLAVE_AOSS, SDX65_SLAVE_APPSS, SDX65_SLAVE_AUDIO, SDX65_SLAVE_BLSP_1, SDX65_SLAVE_CLK_CTL, SDX65_SLAVE_CRYPTO_0_CFG, SDX65_SLAVE_CNOC_DDRSS, SDX65_SLAVE_ECC_CFG, SDX65_SLAVE_IMEM_CFG, SDX65_SLAVE_IPA_CFG, SDX65_SLAVE_CNOC_MSS, SDX65_SLAVE_PCIE_PARF, SDX65_SLAVE_PDM, SDX65_SLAVE_PRNG, SDX65_SLAVE_QDSS_CFG, SDX65_SLAVE_QPIC, SDX65_SLAVE_SDCC_1, SDX65_SLAVE_SNOC_CFG, SDX65_SLAVE_SPMI_FETCHER, SDX65_SLAVE_SPMI_VGI_COEX, SDX65_SLAVE_TCSR, SDX65_SLAVE_TLMM, SDX65_SLAVE_USB3, SDX65_SLAVE_USB3_PHY_CFG, SDX65_SLAVE_IMEM, SDX65_SLAVE_QDSS_STM, SDX65_SLAVE_TCU); -DEFINE_QNODE(qnm_memnoc_pcie, SDX65_MASTER_MEM_NOC_PCIE_SNOC, 1, 8, SDX65_SLAVE_PCIE_0); -DEFINE_QNODE(qxm_crypto, SDX65_MASTER_CRYPTO, 1, 8, SDX65_SLAVE_AOSS, SDX65_SLAVE_ANOC_SNOC); -DEFINE_QNODE(xm_ipa2pcie_slv, SDX65_MASTER_IPA_PCIE, 1, 8, SDX65_SLAVE_PCIE_0); -DEFINE_QNODE(xm_pcie, SDX65_MASTER_PCIE_0, 1, 8, SDX65_SLAVE_ANOC_SNOC); -DEFINE_QNODE(xm_qdss_etr, SDX65_MASTER_QDSS_ETR, 1, 8, SDX65_SLAVE_AOSS, SDX65_SLAVE_AUDIO, SDX65_SLAVE_BLSP_1, SDX65_SLAVE_CLK_CTL, SDX65_SLAVE_CRYPTO_0_CFG, SDX65_SLAVE_CNOC_DDRSS, SDX65_SLAVE_ECC_CFG, SDX65_SLAVE_IMEM_CFG, SDX65_SLAVE_IPA_CFG, SDX65_SLAVE_CNOC_MSS, SDX65_SLAVE_PCIE_PARF, SDX65_SLAVE_PDM, SDX65_SLAVE_PRNG, SDX65_SLAVE_QDSS_CFG, SDX65_SLAVE_QPIC, SDX65_SLAVE_SDCC_1, SDX65_SLAVE_SNOC_CFG, SDX65_SLAVE_SPMI_FETCHER, SDX65_SLAVE_SPMI_VGI_COEX, SDX65_SLAVE_TCSR, SDX65_SLAVE_TLMM, SDX65_SLAVE_USB3, SDX65_SLAVE_USB3_PHY_CFG, SDX65_SLAVE_SNOC_MEM_NOC_GC, SDX65_SLAVE_IMEM, SDX65_SLAVE_TCU); -DEFINE_QNODE(xm_sdc1, SDX65_MASTER_SDCC_1, 1, 8, SDX65_SLAVE_AOSS, SDX65_SLAVE_AUDIO, SDX65_SLAVE_IPA_CFG, SDX65_SLAVE_ANOC_SNOC); -DEFINE_QNODE(xm_usb3, SDX65_MASTER_USB3, 1, 8, SDX65_SLAVE_ANOC_SNOC); -DEFINE_QNODE(ebi, SDX65_SLAVE_EBI1, 1, 4); -DEFINE_QNODE(qns_llcc, SDX65_SLAVE_LLCC, 1, 16, SDX65_MASTER_LLCC); -DEFINE_QNODE(qns_memnoc_snoc, SDX65_SLAVE_MEM_NOC_SNOC, 1, 8, SDX65_MASTER_MEM_NOC_SNOC); -DEFINE_QNODE(qns_sys_pcie, SDX65_SLAVE_MEM_NOC_PCIE_SNOC, 1, 8, SDX65_MASTER_MEM_NOC_PCIE_SNOC); -DEFINE_QNODE(qhs_aoss, SDX65_SLAVE_AOSS, 1, 4); -DEFINE_QNODE(qhs_apss, SDX65_SLAVE_APPSS, 1, 4); -DEFINE_QNODE(qhs_audio, SDX65_SLAVE_AUDIO, 1, 4); -DEFINE_QNODE(qhs_blsp1, SDX65_SLAVE_BLSP_1, 1, 4); -DEFINE_QNODE(qhs_clk_ctl, SDX65_SLAVE_CLK_CTL, 1, 4); -DEFINE_QNODE(qhs_crypto0_cfg, SDX65_SLAVE_CRYPTO_0_CFG, 1, 4); -DEFINE_QNODE(qhs_ddrss_cfg, SDX65_SLAVE_CNOC_DDRSS, 1, 4); -DEFINE_QNODE(qhs_ecc_cfg, SDX65_SLAVE_ECC_CFG, 1, 4); -DEFINE_QNODE(qhs_imem_cfg, SDX65_SLAVE_IMEM_CFG, 1, 4); -DEFINE_QNODE(qhs_ipa, SDX65_SLAVE_IPA_CFG, 1, 4); -DEFINE_QNODE(qhs_mss_cfg, SDX65_SLAVE_CNOC_MSS, 1, 4); -DEFINE_QNODE(qhs_pcie_parf, SDX65_SLAVE_PCIE_PARF, 1, 4); -DEFINE_QNODE(qhs_pdm, SDX65_SLAVE_PDM, 1, 4); -DEFINE_QNODE(qhs_prng, SDX65_SLAVE_PRNG, 1, 4); -DEFINE_QNODE(qhs_qdss_cfg, SDX65_SLAVE_QDSS_CFG, 1, 4); -DEFINE_QNODE(qhs_qpic, SDX65_SLAVE_QPIC, 1, 4); -DEFINE_QNODE(qhs_sdc1, SDX65_SLAVE_SDCC_1, 1, 4); -DEFINE_QNODE(qhs_snoc_cfg, SDX65_SLAVE_SNOC_CFG, 1, 4, SDX65_MASTER_SNOC_CFG); -DEFINE_QNODE(qhs_spmi_fetcher, SDX65_SLAVE_SPMI_FETCHER, 1, 4); -DEFINE_QNODE(qhs_spmi_vgi_coex, SDX65_SLAVE_SPMI_VGI_COEX, 1, 4); -DEFINE_QNODE(qhs_tcsr, SDX65_SLAVE_TCSR, 1, 4); -DEFINE_QNODE(qhs_tlmm, SDX65_SLAVE_TLMM, 1, 4); -DEFINE_QNODE(qhs_usb3, SDX65_SLAVE_USB3, 1, 4); -DEFINE_QNODE(qhs_usb3_phy, SDX65_SLAVE_USB3_PHY_CFG, 1, 4); -DEFINE_QNODE(qns_aggre_noc, SDX65_SLAVE_ANOC_SNOC, 1, 8, SDX65_MASTER_ANOC_SNOC); -DEFINE_QNODE(qns_snoc_memnoc, SDX65_SLAVE_SNOC_MEM_NOC_GC, 1, 16, SDX65_MASTER_SNOC_GC_MEM_NOC); -DEFINE_QNODE(qxs_imem, SDX65_SLAVE_IMEM, 1, 8); -DEFINE_QNODE(srvc_snoc, SDX65_SLAVE_SERVICE_SNOC, 1, 4); -DEFINE_QNODE(xs_pcie, SDX65_SLAVE_PCIE_0, 1, 8); -DEFINE_QNODE(xs_qdss_stm, SDX65_SLAVE_QDSS_STM, 1, 4); -DEFINE_QNODE(xs_sys_tcu_cfg, SDX65_SLAVE_TCU, 1, 8); +static struct qcom_icc_node llcc_mc = { + .name = "llcc_mc", + .id = SDX65_MASTER_LLCC, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDX65_SLAVE_EBI1 }, +}; -DEFINE_QBCM(bcm_ce0, "CE0", false, &qxm_crypto); -DEFINE_QBCM(bcm_mc0, "MC0", true, &ebi); -DEFINE_QBCM(bcm_pn0, "PN0", true, &qhm_snoc_cfg, &qhs_aoss, &qhs_apss, &qhs_audio, &qhs_blsp1, &qhs_clk_ctl, &qhs_crypto0_cfg, &qhs_ddrss_cfg, &qhs_ecc_cfg, &qhs_imem_cfg, &qhs_ipa, &qhs_mss_cfg, &qhs_pcie_parf, &qhs_pdm, &qhs_prng, &qhs_qdss_cfg, &qhs_qpic, &qhs_sdc1, &qhs_snoc_cfg, &qhs_spmi_fetcher, &qhs_spmi_vgi_coex, &qhs_tcsr, &qhs_tlmm, &qhs_usb3, &qhs_usb3_phy, &srvc_snoc); -DEFINE_QBCM(bcm_pn1, "PN1", false, &xm_sdc1); -DEFINE_QBCM(bcm_pn2, "PN2", false, &qhm_audio, &qhm_spmi_fetcher1); -DEFINE_QBCM(bcm_pn3, "PN3", false, &qhm_blsp1, &qhm_qpic); -DEFINE_QBCM(bcm_pn4, "PN4", false, &qxm_crypto); -DEFINE_QBCM(bcm_sh0, "SH0", true, &qns_llcc); -DEFINE_QBCM(bcm_sh1, "SH1", false, &qns_memnoc_snoc); -DEFINE_QBCM(bcm_sh3, "SH3", false, &xm_apps_rdwr); -DEFINE_QBCM(bcm_sn0, "SN0", true, &qns_snoc_memnoc); -DEFINE_QBCM(bcm_sn1, "SN1", false, &qxs_imem); -DEFINE_QBCM(bcm_sn2, "SN2", false, &xs_qdss_stm); -DEFINE_QBCM(bcm_sn3, "SN3", false, &xs_sys_tcu_cfg); -DEFINE_QBCM(bcm_sn5, "SN5", false, &xs_pcie); -DEFINE_QBCM(bcm_sn6, "SN6", false, &qhm_qdss_bam, &xm_qdss_etr); -DEFINE_QBCM(bcm_sn7, "SN7", false, &qnm_aggre_noc, &xm_pcie, &xm_usb3, &qns_aggre_noc); -DEFINE_QBCM(bcm_sn8, "SN8", false, &qnm_memnoc); -DEFINE_QBCM(bcm_sn9, "SN9", false, &qnm_memnoc_pcie); -DEFINE_QBCM(bcm_sn10, "SN10", false, &qnm_ipa, &xm_ipa2pcie_slv); +static struct qcom_icc_node acm_tcu = { + .name = "acm_tcu", + .id = SDX65_MASTER_TCU_0, + .channels = 1, + .buswidth = 8, + .num_links = 3, + .links = { SDX65_SLAVE_LLCC, + SDX65_SLAVE_MEM_NOC_SNOC, + SDX65_SLAVE_MEM_NOC_PCIE_SNOC + }, +}; + +static struct qcom_icc_node qnm_snoc_gc = { + .name = "qnm_snoc_gc", + .id = SDX65_MASTER_SNOC_GC_MEM_NOC, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SDX65_SLAVE_LLCC }, +}; + +static struct qcom_icc_node xm_apps_rdwr = { + .name = "xm_apps_rdwr", + .id = SDX65_MASTER_APPSS_PROC, + .channels = 1, + .buswidth = 16, + .num_links = 3, + .links = { SDX65_SLAVE_LLCC, + SDX65_SLAVE_MEM_NOC_SNOC, + SDX65_SLAVE_MEM_NOC_PCIE_SNOC + }, +}; + +static struct qcom_icc_node qhm_audio = { + .name = "qhm_audio", + .id = SDX65_MASTER_AUDIO, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDX65_SLAVE_ANOC_SNOC }, +}; + +static struct qcom_icc_node qhm_blsp1 = { + .name = "qhm_blsp1", + .id = SDX65_MASTER_BLSP_1, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDX65_SLAVE_ANOC_SNOC }, +}; + +static struct qcom_icc_node qhm_qdss_bam = { + .name = "qhm_qdss_bam", + .id = SDX65_MASTER_QDSS_BAM, + .channels = 1, + .buswidth = 4, + .num_links = 26, + .links = { SDX65_SLAVE_AOSS, + SDX65_SLAVE_AUDIO, + SDX65_SLAVE_BLSP_1, + SDX65_SLAVE_CLK_CTL, + SDX65_SLAVE_CRYPTO_0_CFG, + SDX65_SLAVE_CNOC_DDRSS, + SDX65_SLAVE_ECC_CFG, + SDX65_SLAVE_IMEM_CFG, + SDX65_SLAVE_IPA_CFG, + SDX65_SLAVE_CNOC_MSS, + SDX65_SLAVE_PCIE_PARF, + SDX65_SLAVE_PDM, + SDX65_SLAVE_PRNG, + SDX65_SLAVE_QDSS_CFG, + SDX65_SLAVE_QPIC, + SDX65_SLAVE_SDCC_1, + SDX65_SLAVE_SNOC_CFG, + SDX65_SLAVE_SPMI_FETCHER, + SDX65_SLAVE_SPMI_VGI_COEX, + SDX65_SLAVE_TCSR, + SDX65_SLAVE_TLMM, + SDX65_SLAVE_USB3, + SDX65_SLAVE_USB3_PHY_CFG, + SDX65_SLAVE_SNOC_MEM_NOC_GC, + SDX65_SLAVE_IMEM, + SDX65_SLAVE_TCU + }, +}; + +static struct qcom_icc_node qhm_qpic = { + .name = "qhm_qpic", + .id = SDX65_MASTER_QPIC, + .channels = 1, + .buswidth = 4, + .num_links = 4, + .links = { SDX65_SLAVE_AOSS, + SDX65_SLAVE_AUDIO, + SDX65_SLAVE_IPA_CFG, + SDX65_SLAVE_ANOC_SNOC + }, +}; + +static struct qcom_icc_node qhm_snoc_cfg = { + .name = "qhm_snoc_cfg", + .id = SDX65_MASTER_SNOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDX65_SLAVE_SERVICE_SNOC }, +}; + +static struct qcom_icc_node qhm_spmi_fetcher1 = { + .name = "qhm_spmi_fetcher1", + .id = SDX65_MASTER_SPMI_FETCHER, + .channels = 1, + .buswidth = 4, + .num_links = 2, + .links = { SDX65_SLAVE_AOSS, + SDX65_SLAVE_ANOC_SNOC + }, +}; + +static struct qcom_icc_node qnm_aggre_noc = { + .name = "qnm_aggre_noc", + .id = SDX65_MASTER_ANOC_SNOC, + .channels = 1, + .buswidth = 8, + .num_links = 29, + .links = { SDX65_SLAVE_AOSS, + SDX65_SLAVE_APPSS, + SDX65_SLAVE_AUDIO, + SDX65_SLAVE_BLSP_1, + SDX65_SLAVE_CLK_CTL, + SDX65_SLAVE_CRYPTO_0_CFG, + SDX65_SLAVE_CNOC_DDRSS, + SDX65_SLAVE_ECC_CFG, + SDX65_SLAVE_IMEM_CFG, + SDX65_SLAVE_IPA_CFG, + SDX65_SLAVE_CNOC_MSS, + SDX65_SLAVE_PCIE_PARF, + SDX65_SLAVE_PDM, + SDX65_SLAVE_PRNG, + SDX65_SLAVE_QDSS_CFG, + SDX65_SLAVE_QPIC, + SDX65_SLAVE_SDCC_1, + SDX65_SLAVE_SNOC_CFG, + SDX65_SLAVE_SPMI_FETCHER, + SDX65_SLAVE_SPMI_VGI_COEX, + SDX65_SLAVE_TCSR, + SDX65_SLAVE_TLMM, + SDX65_SLAVE_USB3, + SDX65_SLAVE_USB3_PHY_CFG, + SDX65_SLAVE_SNOC_MEM_NOC_GC, + SDX65_SLAVE_IMEM, + SDX65_SLAVE_PCIE_0, + SDX65_SLAVE_QDSS_STM, + SDX65_SLAVE_TCU + }, +}; + +static struct qcom_icc_node qnm_ipa = { + .name = "qnm_ipa", + .id = SDX65_MASTER_IPA, + .channels = 1, + .buswidth = 8, + .num_links = 26, + .links = { SDX65_SLAVE_AOSS, + SDX65_SLAVE_AUDIO, + SDX65_SLAVE_BLSP_1, + SDX65_SLAVE_CLK_CTL, + SDX65_SLAVE_CRYPTO_0_CFG, + SDX65_SLAVE_CNOC_DDRSS, + SDX65_SLAVE_ECC_CFG, + SDX65_SLAVE_IMEM_CFG, + SDX65_SLAVE_IPA_CFG, + SDX65_SLAVE_CNOC_MSS, + SDX65_SLAVE_PCIE_PARF, + SDX65_SLAVE_PDM, + SDX65_SLAVE_PRNG, + SDX65_SLAVE_QDSS_CFG, + SDX65_SLAVE_QPIC, + SDX65_SLAVE_SDCC_1, + SDX65_SLAVE_SNOC_CFG, + SDX65_SLAVE_SPMI_FETCHER, + SDX65_SLAVE_TCSR, + SDX65_SLAVE_TLMM, + SDX65_SLAVE_USB3, + SDX65_SLAVE_USB3_PHY_CFG, + SDX65_SLAVE_SNOC_MEM_NOC_GC, + SDX65_SLAVE_IMEM, + SDX65_SLAVE_PCIE_0, + SDX65_SLAVE_QDSS_STM + }, +}; + +static struct qcom_icc_node qnm_memnoc = { + .name = "qnm_memnoc", + .id = SDX65_MASTER_MEM_NOC_SNOC, + .channels = 1, + .buswidth = 8, + .num_links = 27, + .links = { SDX65_SLAVE_AOSS, + SDX65_SLAVE_APPSS, + SDX65_SLAVE_AUDIO, + SDX65_SLAVE_BLSP_1, + SDX65_SLAVE_CLK_CTL, + SDX65_SLAVE_CRYPTO_0_CFG, + SDX65_SLAVE_CNOC_DDRSS, + SDX65_SLAVE_ECC_CFG, + SDX65_SLAVE_IMEM_CFG, + SDX65_SLAVE_IPA_CFG, + SDX65_SLAVE_CNOC_MSS, + SDX65_SLAVE_PCIE_PARF, + SDX65_SLAVE_PDM, + SDX65_SLAVE_PRNG, + SDX65_SLAVE_QDSS_CFG, + SDX65_SLAVE_QPIC, + SDX65_SLAVE_SDCC_1, + SDX65_SLAVE_SNOC_CFG, + SDX65_SLAVE_SPMI_FETCHER, + SDX65_SLAVE_SPMI_VGI_COEX, + SDX65_SLAVE_TCSR, + SDX65_SLAVE_TLMM, + SDX65_SLAVE_USB3, + SDX65_SLAVE_USB3_PHY_CFG, + SDX65_SLAVE_IMEM, + SDX65_SLAVE_QDSS_STM, + SDX65_SLAVE_TCU + }, +}; + +static struct qcom_icc_node qnm_memnoc_pcie = { + .name = "qnm_memnoc_pcie", + .id = SDX65_MASTER_MEM_NOC_PCIE_SNOC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDX65_SLAVE_PCIE_0 }, +}; + +static struct qcom_icc_node qxm_crypto = { + .name = "qxm_crypto", + .id = SDX65_MASTER_CRYPTO, + .channels = 1, + .buswidth = 8, + .num_links = 2, + .links = { SDX65_SLAVE_AOSS, + SDX65_SLAVE_ANOC_SNOC + }, +}; + +static struct qcom_icc_node xm_ipa2pcie_slv = { + .name = "xm_ipa2pcie_slv", + .id = SDX65_MASTER_IPA_PCIE, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDX65_SLAVE_PCIE_0 }, +}; + +static struct qcom_icc_node xm_pcie = { + .name = "xm_pcie", + .id = SDX65_MASTER_PCIE_0, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDX65_SLAVE_ANOC_SNOC }, +}; + +static struct qcom_icc_node xm_qdss_etr = { + .name = "xm_qdss_etr", + .id = SDX65_MASTER_QDSS_ETR, + .channels = 1, + .buswidth = 8, + .num_links = 26, + .links = { SDX65_SLAVE_AOSS, + SDX65_SLAVE_AUDIO, + SDX65_SLAVE_BLSP_1, + SDX65_SLAVE_CLK_CTL, + SDX65_SLAVE_CRYPTO_0_CFG, + SDX65_SLAVE_CNOC_DDRSS, + SDX65_SLAVE_ECC_CFG, + SDX65_SLAVE_IMEM_CFG, + SDX65_SLAVE_IPA_CFG, + SDX65_SLAVE_CNOC_MSS, + SDX65_SLAVE_PCIE_PARF, + SDX65_SLAVE_PDM, + SDX65_SLAVE_PRNG, + SDX65_SLAVE_QDSS_CFG, + SDX65_SLAVE_QPIC, + SDX65_SLAVE_SDCC_1, + SDX65_SLAVE_SNOC_CFG, + SDX65_SLAVE_SPMI_FETCHER, + SDX65_SLAVE_SPMI_VGI_COEX, + SDX65_SLAVE_TCSR, + SDX65_SLAVE_TLMM, + SDX65_SLAVE_USB3, + SDX65_SLAVE_USB3_PHY_CFG, + SDX65_SLAVE_SNOC_MEM_NOC_GC, + SDX65_SLAVE_IMEM, + SDX65_SLAVE_TCU + }, +}; + +static struct qcom_icc_node xm_sdc1 = { + .name = "xm_sdc1", + .id = SDX65_MASTER_SDCC_1, + .channels = 1, + .buswidth = 8, + .num_links = 4, + .links = { SDX65_SLAVE_AOSS, + SDX65_SLAVE_AUDIO, + SDX65_SLAVE_IPA_CFG, + SDX65_SLAVE_ANOC_SNOC + }, +}; + +static struct qcom_icc_node xm_usb3 = { + .name = "xm_usb3", + .id = SDX65_MASTER_USB3, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDX65_SLAVE_ANOC_SNOC }, +}; + +static struct qcom_icc_node ebi = { + .name = "ebi", + .id = SDX65_SLAVE_EBI1, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_llcc = { + .name = "qns_llcc", + .id = SDX65_SLAVE_LLCC, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SDX65_MASTER_LLCC }, +}; + +static struct qcom_icc_node qns_memnoc_snoc = { + .name = "qns_memnoc_snoc", + .id = SDX65_SLAVE_MEM_NOC_SNOC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDX65_MASTER_MEM_NOC_SNOC }, +}; + +static struct qcom_icc_node qns_sys_pcie = { + .name = "qns_sys_pcie", + .id = SDX65_SLAVE_MEM_NOC_PCIE_SNOC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDX65_MASTER_MEM_NOC_PCIE_SNOC }, +}; + +static struct qcom_icc_node qhs_aoss = { + .name = "qhs_aoss", + .id = SDX65_SLAVE_AOSS, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_apss = { + .name = "qhs_apss", + .id = SDX65_SLAVE_APPSS, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_audio = { + .name = "qhs_audio", + .id = SDX65_SLAVE_AUDIO, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_blsp1 = { + .name = "qhs_blsp1", + .id = SDX65_SLAVE_BLSP_1, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_clk_ctl = { + .name = "qhs_clk_ctl", + .id = SDX65_SLAVE_CLK_CTL, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_crypto0_cfg = { + .name = "qhs_crypto0_cfg", + .id = SDX65_SLAVE_CRYPTO_0_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_ddrss_cfg = { + .name = "qhs_ddrss_cfg", + .id = SDX65_SLAVE_CNOC_DDRSS, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_ecc_cfg = { + .name = "qhs_ecc_cfg", + .id = SDX65_SLAVE_ECC_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_imem_cfg = { + .name = "qhs_imem_cfg", + .id = SDX65_SLAVE_IMEM_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_ipa = { + .name = "qhs_ipa", + .id = SDX65_SLAVE_IPA_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_mss_cfg = { + .name = "qhs_mss_cfg", + .id = SDX65_SLAVE_CNOC_MSS, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_pcie_parf = { + .name = "qhs_pcie_parf", + .id = SDX65_SLAVE_PCIE_PARF, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_pdm = { + .name = "qhs_pdm", + .id = SDX65_SLAVE_PDM, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_prng = { + .name = "qhs_prng", + .id = SDX65_SLAVE_PRNG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_qdss_cfg = { + .name = "qhs_qdss_cfg", + .id = SDX65_SLAVE_QDSS_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_qpic = { + .name = "qhs_qpic", + .id = SDX65_SLAVE_QPIC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_sdc1 = { + .name = "qhs_sdc1", + .id = SDX65_SLAVE_SDCC_1, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_snoc_cfg = { + .name = "qhs_snoc_cfg", + .id = SDX65_SLAVE_SNOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SDX65_MASTER_SNOC_CFG }, +}; + +static struct qcom_icc_node qhs_spmi_fetcher = { + .name = "qhs_spmi_fetcher", + .id = SDX65_SLAVE_SPMI_FETCHER, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_spmi_vgi_coex = { + .name = "qhs_spmi_vgi_coex", + .id = SDX65_SLAVE_SPMI_VGI_COEX, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_tcsr = { + .name = "qhs_tcsr", + .id = SDX65_SLAVE_TCSR, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_tlmm = { + .name = "qhs_tlmm", + .id = SDX65_SLAVE_TLMM, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_usb3 = { + .name = "qhs_usb3", + .id = SDX65_SLAVE_USB3, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_usb3_phy = { + .name = "qhs_usb3_phy", + .id = SDX65_SLAVE_USB3_PHY_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_aggre_noc = { + .name = "qns_aggre_noc", + .id = SDX65_SLAVE_ANOC_SNOC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SDX65_MASTER_ANOC_SNOC }, +}; + +static struct qcom_icc_node qns_snoc_memnoc = { + .name = "qns_snoc_memnoc", + .id = SDX65_SLAVE_SNOC_MEM_NOC_GC, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SDX65_MASTER_SNOC_GC_MEM_NOC }, +}; + +static struct qcom_icc_node qxs_imem = { + .name = "qxs_imem", + .id = SDX65_SLAVE_IMEM, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node srvc_snoc = { + .name = "srvc_snoc", + .id = SDX65_SLAVE_SERVICE_SNOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node xs_pcie = { + .name = "xs_pcie", + .id = SDX65_SLAVE_PCIE_0, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node xs_qdss_stm = { + .name = "xs_qdss_stm", + .id = SDX65_SLAVE_QDSS_STM, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node xs_sys_tcu_cfg = { + .name = "xs_sys_tcu_cfg", + .id = SDX65_SLAVE_TCU, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_bcm bcm_ce0 = { + .name = "CE0", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qxm_crypto }, +}; + +static struct qcom_icc_bcm bcm_mc0 = { + .name = "MC0", + .keepalive = true, + .num_nodes = 1, + .nodes = { &ebi }, +}; + +static struct qcom_icc_bcm bcm_pn0 = { + .name = "PN0", + .keepalive = true, + .num_nodes = 26, + .nodes = { &qhm_snoc_cfg, + &qhs_aoss, + &qhs_apss, + &qhs_audio, + &qhs_blsp1, + &qhs_clk_ctl, + &qhs_crypto0_cfg, + &qhs_ddrss_cfg, + &qhs_ecc_cfg, + &qhs_imem_cfg, + &qhs_ipa, + &qhs_mss_cfg, + &qhs_pcie_parf, + &qhs_pdm, + &qhs_prng, + &qhs_qdss_cfg, + &qhs_qpic, + &qhs_sdc1, + &qhs_snoc_cfg, + &qhs_spmi_fetcher, + &qhs_spmi_vgi_coex, + &qhs_tcsr, + &qhs_tlmm, + &qhs_usb3, + &qhs_usb3_phy, + &srvc_snoc + }, +}; + +static struct qcom_icc_bcm bcm_pn1 = { + .name = "PN1", + .keepalive = false, + .num_nodes = 1, + .nodes = { &xm_sdc1 }, +}; + +static struct qcom_icc_bcm bcm_pn2 = { + .name = "PN2", + .keepalive = false, + .num_nodes = 2, + .nodes = { &qhm_audio, &qhm_spmi_fetcher1 }, +}; + +static struct qcom_icc_bcm bcm_pn3 = { + .name = "PN3", + .keepalive = false, + .num_nodes = 2, + .nodes = { &qhm_blsp1, &qhm_qpic }, +}; + +static struct qcom_icc_bcm bcm_pn4 = { + .name = "PN4", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qxm_crypto }, +}; + +static struct qcom_icc_bcm bcm_sh0 = { + .name = "SH0", + .keepalive = true, + .num_nodes = 1, + .nodes = { &qns_llcc }, +}; + +static struct qcom_icc_bcm bcm_sh1 = { + .name = "SH1", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qns_memnoc_snoc }, +}; + +static struct qcom_icc_bcm bcm_sh3 = { + .name = "SH3", + .keepalive = false, + .num_nodes = 1, + .nodes = { &xm_apps_rdwr }, +}; + +static struct qcom_icc_bcm bcm_sn0 = { + .name = "SN0", + .keepalive = true, + .num_nodes = 1, + .nodes = { &qns_snoc_memnoc }, +}; + +static struct qcom_icc_bcm bcm_sn1 = { + .name = "SN1", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qxs_imem }, +}; + +static struct qcom_icc_bcm bcm_sn2 = { + .name = "SN2", + .keepalive = false, + .num_nodes = 1, + .nodes = { &xs_qdss_stm }, +}; + +static struct qcom_icc_bcm bcm_sn3 = { + .name = "SN3", + .keepalive = false, + .num_nodes = 1, + .nodes = { &xs_sys_tcu_cfg }, +}; + +static struct qcom_icc_bcm bcm_sn5 = { + .name = "SN5", + .keepalive = false, + .num_nodes = 1, + .nodes = { &xs_pcie }, +}; + +static struct qcom_icc_bcm bcm_sn6 = { + .name = "SN6", + .keepalive = false, + .num_nodes = 2, + .nodes = { &qhm_qdss_bam, &xm_qdss_etr }, +}; + +static struct qcom_icc_bcm bcm_sn7 = { + .name = "SN7", + .keepalive = false, + .num_nodes = 4, + .nodes = { &qnm_aggre_noc, &xm_pcie, &xm_usb3, &qns_aggre_noc }, +}; + +static struct qcom_icc_bcm bcm_sn8 = { + .name = "SN8", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qnm_memnoc }, +}; + +static struct qcom_icc_bcm bcm_sn9 = { + .name = "SN9", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qnm_memnoc_pcie }, +}; + +static struct qcom_icc_bcm bcm_sn10 = { + .name = "SN10", + .keepalive = false, + .num_nodes = 2, + .nodes = { &qnm_ipa, &xm_ipa2pcie_slv }, +}; static struct qcom_icc_bcm * const mc_virt_bcms[] = { &bcm_mc0, diff --git a/drivers/interconnect/qcom/sm6350.c b/drivers/interconnect/qcom/sm6350.c index a3d46e59444e..49aed492e9b8 100644 --- a/drivers/interconnect/qcom/sm6350.c +++ b/drivers/interconnect/qcom/sm6350.c @@ -6,167 +6,1388 @@ #include #include #include +#include #include -#include +#include #include #include "bcm-voter.h" #include "icc-rpmh.h" #include "sm6350.h" -DEFINE_QNODE(qhm_a1noc_cfg, SM6350_MASTER_A1NOC_CFG, 1, 4, SM6350_SLAVE_SERVICE_A1NOC); -DEFINE_QNODE(qhm_qup_0, SM6350_MASTER_QUP_0, 1, 4, SM6350_A1NOC_SNOC_SLV); -DEFINE_QNODE(xm_emmc, SM6350_MASTER_EMMC, 1, 8, SM6350_A1NOC_SNOC_SLV); -DEFINE_QNODE(xm_ufs_mem, SM6350_MASTER_UFS_MEM, 1, 8, SM6350_A1NOC_SNOC_SLV); -DEFINE_QNODE(qhm_a2noc_cfg, SM6350_MASTER_A2NOC_CFG, 1, 4, SM6350_SLAVE_SERVICE_A2NOC); -DEFINE_QNODE(qhm_qdss_bam, SM6350_MASTER_QDSS_BAM, 1, 4, SM6350_A2NOC_SNOC_SLV); -DEFINE_QNODE(qhm_qup_1, SM6350_MASTER_QUP_1, 1, 4, SM6350_A2NOC_SNOC_SLV); -DEFINE_QNODE(qxm_crypto, SM6350_MASTER_CRYPTO_CORE_0, 1, 8, SM6350_A2NOC_SNOC_SLV); -DEFINE_QNODE(qxm_ipa, SM6350_MASTER_IPA, 1, 8, SM6350_A2NOC_SNOC_SLV); -DEFINE_QNODE(xm_qdss_etr, SM6350_MASTER_QDSS_ETR, 1, 8, SM6350_A2NOC_SNOC_SLV); -DEFINE_QNODE(xm_sdc2, SM6350_MASTER_SDCC_2, 1, 8, SM6350_A2NOC_SNOC_SLV); -DEFINE_QNODE(xm_usb3_0, SM6350_MASTER_USB3, 1, 8, SM6350_A2NOC_SNOC_SLV); -DEFINE_QNODE(qxm_camnoc_hf0_uncomp, SM6350_MASTER_CAMNOC_HF0_UNCOMP, 2, 32, SM6350_SLAVE_CAMNOC_UNCOMP); -DEFINE_QNODE(qxm_camnoc_icp_uncomp, SM6350_MASTER_CAMNOC_ICP_UNCOMP, 1, 32, SM6350_SLAVE_CAMNOC_UNCOMP); -DEFINE_QNODE(qxm_camnoc_sf_uncomp, SM6350_MASTER_CAMNOC_SF_UNCOMP, 1, 32, SM6350_SLAVE_CAMNOC_UNCOMP); -DEFINE_QNODE(qup0_core_master, SM6350_MASTER_QUP_CORE_0, 1, 4, SM6350_SLAVE_QUP_CORE_0); -DEFINE_QNODE(qup1_core_master, SM6350_MASTER_QUP_CORE_1, 1, 4, SM6350_SLAVE_QUP_CORE_1); -DEFINE_QNODE(qnm_npu, SM6350_MASTER_NPU, 2, 32, SM6350_SLAVE_CDSP_GEM_NOC); -DEFINE_QNODE(qxm_npu_dsp, SM6350_MASTER_NPU_PROC, 1, 8, SM6350_SLAVE_CDSP_GEM_NOC); -DEFINE_QNODE(qnm_snoc, SM6350_SNOC_CNOC_MAS, 1, 8, SM6350_SLAVE_CAMERA_CFG, SM6350_SLAVE_SDCC_2, SM6350_SLAVE_CNOC_MNOC_CFG, SM6350_SLAVE_UFS_MEM_CFG, SM6350_SLAVE_QM_CFG, SM6350_SLAVE_SNOC_CFG, SM6350_SLAVE_QM_MPU_CFG, SM6350_SLAVE_GLM, SM6350_SLAVE_PDM, SM6350_SLAVE_CAMERA_NRT_THROTTLE_CFG, SM6350_SLAVE_A2NOC_CFG, SM6350_SLAVE_QDSS_CFG, SM6350_SLAVE_VSENSE_CTRL_CFG, SM6350_SLAVE_CAMERA_RT_THROTTLE_CFG, SM6350_SLAVE_DISPLAY_CFG, SM6350_SLAVE_TCSR, SM6350_SLAVE_DCC_CFG, SM6350_SLAVE_CNOC_DDRSS, SM6350_SLAVE_DISPLAY_THROTTLE_CFG, SM6350_SLAVE_NPU_CFG, SM6350_SLAVE_AHB2PHY, SM6350_SLAVE_GRAPHICS_3D_CFG, SM6350_SLAVE_BOOT_ROM, SM6350_SLAVE_VENUS_CFG, SM6350_SLAVE_IPA_CFG, SM6350_SLAVE_SECURITY, SM6350_SLAVE_IMEM_CFG, SM6350_SLAVE_CNOC_MSS, SM6350_SLAVE_SERVICE_CNOC, SM6350_SLAVE_USB3, SM6350_SLAVE_VENUS_THROTTLE_CFG, SM6350_SLAVE_RBCPR_CX_CFG, SM6350_SLAVE_A1NOC_CFG, SM6350_SLAVE_AOSS, SM6350_SLAVE_PRNG, SM6350_SLAVE_EMMC_CFG, SM6350_SLAVE_CRYPTO_0_CFG, SM6350_SLAVE_PIMEM_CFG, SM6350_SLAVE_RBCPR_MX_CFG, SM6350_SLAVE_QUP_0, SM6350_SLAVE_QUP_1, SM6350_SLAVE_CLK_CTL); -DEFINE_QNODE(xm_qdss_dap, SM6350_MASTER_QDSS_DAP, 1, 8, SM6350_SLAVE_CAMERA_CFG, SM6350_SLAVE_SDCC_2, SM6350_SLAVE_CNOC_MNOC_CFG, SM6350_SLAVE_UFS_MEM_CFG, SM6350_SLAVE_QM_CFG, SM6350_SLAVE_SNOC_CFG, SM6350_SLAVE_QM_MPU_CFG, SM6350_SLAVE_GLM, SM6350_SLAVE_PDM, SM6350_SLAVE_CAMERA_NRT_THROTTLE_CFG, SM6350_SLAVE_A2NOC_CFG, SM6350_SLAVE_QDSS_CFG, SM6350_SLAVE_VSENSE_CTRL_CFG, SM6350_SLAVE_CAMERA_RT_THROTTLE_CFG, SM6350_SLAVE_DISPLAY_CFG, SM6350_SLAVE_TCSR, SM6350_SLAVE_DCC_CFG, SM6350_SLAVE_CNOC_DDRSS, SM6350_SLAVE_DISPLAY_THROTTLE_CFG, SM6350_SLAVE_NPU_CFG, SM6350_SLAVE_AHB2PHY, SM6350_SLAVE_GRAPHICS_3D_CFG, SM6350_SLAVE_BOOT_ROM, SM6350_SLAVE_VENUS_CFG, SM6350_SLAVE_IPA_CFG, SM6350_SLAVE_SECURITY, SM6350_SLAVE_IMEM_CFG, SM6350_SLAVE_CNOC_MSS, SM6350_SLAVE_SERVICE_CNOC, SM6350_SLAVE_USB3, SM6350_SLAVE_VENUS_THROTTLE_CFG, SM6350_SLAVE_RBCPR_CX_CFG, SM6350_SLAVE_A1NOC_CFG, SM6350_SLAVE_AOSS, SM6350_SLAVE_PRNG, SM6350_SLAVE_EMMC_CFG, SM6350_SLAVE_CRYPTO_0_CFG, SM6350_SLAVE_PIMEM_CFG, SM6350_SLAVE_RBCPR_MX_CFG, SM6350_SLAVE_QUP_0, SM6350_SLAVE_QUP_1, SM6350_SLAVE_CLK_CTL); -DEFINE_QNODE(qhm_cnoc_dc_noc, SM6350_MASTER_CNOC_DC_NOC, 1, 4, SM6350_SLAVE_LLCC_CFG, SM6350_SLAVE_GEM_NOC_CFG); -DEFINE_QNODE(acm_apps, SM6350_MASTER_AMPSS_M0, 1, 16, SM6350_SLAVE_LLCC, SM6350_SLAVE_GEM_NOC_SNOC); -DEFINE_QNODE(acm_sys_tcu, SM6350_MASTER_SYS_TCU, 1, 8, SM6350_SLAVE_LLCC, SM6350_SLAVE_GEM_NOC_SNOC); -DEFINE_QNODE(qhm_gemnoc_cfg, SM6350_MASTER_GEM_NOC_CFG, 1, 4, SM6350_SLAVE_MCDMA_MS_MPU_CFG, SM6350_SLAVE_SERVICE_GEM_NOC, SM6350_SLAVE_MSS_PROC_MS_MPU_CFG); -DEFINE_QNODE(qnm_cmpnoc, SM6350_MASTER_COMPUTE_NOC, 1, 32, SM6350_SLAVE_LLCC, SM6350_SLAVE_GEM_NOC_SNOC); -DEFINE_QNODE(qnm_mnoc_hf, SM6350_MASTER_MNOC_HF_MEM_NOC, 1, 32, SM6350_SLAVE_LLCC, SM6350_SLAVE_GEM_NOC_SNOC); -DEFINE_QNODE(qnm_mnoc_sf, SM6350_MASTER_MNOC_SF_MEM_NOC, 1, 32, SM6350_SLAVE_LLCC, SM6350_SLAVE_GEM_NOC_SNOC); -DEFINE_QNODE(qnm_snoc_gc, SM6350_MASTER_SNOC_GC_MEM_NOC, 1, 8, SM6350_SLAVE_LLCC); -DEFINE_QNODE(qnm_snoc_sf, SM6350_MASTER_SNOC_SF_MEM_NOC, 1, 16, SM6350_SLAVE_LLCC); -DEFINE_QNODE(qxm_gpu, SM6350_MASTER_GRAPHICS_3D, 2, 32, SM6350_SLAVE_LLCC, SM6350_SLAVE_GEM_NOC_SNOC); -DEFINE_QNODE(llcc_mc, SM6350_MASTER_LLCC, 2, 4, SM6350_SLAVE_EBI_CH0); -DEFINE_QNODE(qhm_mnoc_cfg, SM6350_MASTER_CNOC_MNOC_CFG, 1, 4, SM6350_SLAVE_SERVICE_MNOC); -DEFINE_QNODE(qnm_video0, SM6350_MASTER_VIDEO_P0, 1, 32, SM6350_SLAVE_MNOC_SF_MEM_NOC); -DEFINE_QNODE(qnm_video_cvp, SM6350_MASTER_VIDEO_PROC, 1, 8, SM6350_SLAVE_MNOC_SF_MEM_NOC); -DEFINE_QNODE(qxm_camnoc_hf, SM6350_MASTER_CAMNOC_HF, 2, 32, SM6350_SLAVE_MNOC_HF_MEM_NOC); -DEFINE_QNODE(qxm_camnoc_icp, SM6350_MASTER_CAMNOC_ICP, 1, 8, SM6350_SLAVE_MNOC_SF_MEM_NOC); -DEFINE_QNODE(qxm_camnoc_sf, SM6350_MASTER_CAMNOC_SF, 1, 32, SM6350_SLAVE_MNOC_SF_MEM_NOC); -DEFINE_QNODE(qxm_mdp0, SM6350_MASTER_MDP_PORT0, 1, 32, SM6350_SLAVE_MNOC_HF_MEM_NOC); -DEFINE_QNODE(amm_npu_sys, SM6350_MASTER_NPU_SYS, 2, 32, SM6350_SLAVE_NPU_COMPUTE_NOC); -DEFINE_QNODE(qhm_npu_cfg, SM6350_MASTER_NPU_NOC_CFG, 1, 4, SM6350_SLAVE_SERVICE_NPU_NOC, SM6350_SLAVE_ISENSE_CFG, SM6350_SLAVE_NPU_LLM_CFG, SM6350_SLAVE_NPU_INT_DMA_BWMON_CFG, SM6350_SLAVE_NPU_CP, SM6350_SLAVE_NPU_TCM, SM6350_SLAVE_NPU_CAL_DP0, SM6350_SLAVE_NPU_DPM); -DEFINE_QNODE(qhm_snoc_cfg, SM6350_MASTER_SNOC_CFG, 1, 4, SM6350_SLAVE_SERVICE_SNOC); -DEFINE_QNODE(qnm_aggre1_noc, SM6350_A1NOC_SNOC_MAS, 1, 16, SM6350_SLAVE_SNOC_GEM_NOC_SF, SM6350_SLAVE_PIMEM, SM6350_SLAVE_OCIMEM, SM6350_SLAVE_APPSS, SM6350_SNOC_CNOC_SLV, SM6350_SLAVE_QDSS_STM); -DEFINE_QNODE(qnm_aggre2_noc, SM6350_A2NOC_SNOC_MAS, 1, 16, SM6350_SLAVE_SNOC_GEM_NOC_SF, SM6350_SLAVE_PIMEM, SM6350_SLAVE_OCIMEM, SM6350_SLAVE_APPSS, SM6350_SNOC_CNOC_SLV, SM6350_SLAVE_TCU, SM6350_SLAVE_QDSS_STM); -DEFINE_QNODE(qnm_gemnoc, SM6350_MASTER_GEM_NOC_SNOC, 1, 8, SM6350_SLAVE_PIMEM, SM6350_SLAVE_OCIMEM, SM6350_SLAVE_APPSS, SM6350_SNOC_CNOC_SLV, SM6350_SLAVE_TCU, SM6350_SLAVE_QDSS_STM); -DEFINE_QNODE(qxm_pimem, SM6350_MASTER_PIMEM, 1, 8, SM6350_SLAVE_SNOC_GEM_NOC_GC, SM6350_SLAVE_OCIMEM); -DEFINE_QNODE(xm_gic, SM6350_MASTER_GIC, 1, 8, SM6350_SLAVE_SNOC_GEM_NOC_GC); -DEFINE_QNODE(qns_a1noc_snoc, SM6350_A1NOC_SNOC_SLV, 1, 16, SM6350_A1NOC_SNOC_MAS); -DEFINE_QNODE(srvc_aggre1_noc, SM6350_SLAVE_SERVICE_A1NOC, 1, 4); -DEFINE_QNODE(qns_a2noc_snoc, SM6350_A2NOC_SNOC_SLV, 1, 16, SM6350_A2NOC_SNOC_MAS); -DEFINE_QNODE(srvc_aggre2_noc, SM6350_SLAVE_SERVICE_A2NOC, 1, 4); -DEFINE_QNODE(qns_camnoc_uncomp, SM6350_SLAVE_CAMNOC_UNCOMP, 1, 32); -DEFINE_QNODE(qup0_core_slave, SM6350_SLAVE_QUP_CORE_0, 1, 4); -DEFINE_QNODE(qup1_core_slave, SM6350_SLAVE_QUP_CORE_1, 1, 4); -DEFINE_QNODE(qns_cdsp_gemnoc, SM6350_SLAVE_CDSP_GEM_NOC, 1, 32, SM6350_MASTER_COMPUTE_NOC); -DEFINE_QNODE(qhs_a1_noc_cfg, SM6350_SLAVE_A1NOC_CFG, 1, 4, SM6350_MASTER_A1NOC_CFG); -DEFINE_QNODE(qhs_a2_noc_cfg, SM6350_SLAVE_A2NOC_CFG, 1, 4, SM6350_MASTER_A2NOC_CFG); -DEFINE_QNODE(qhs_ahb2phy0, SM6350_SLAVE_AHB2PHY, 1, 4); -DEFINE_QNODE(qhs_ahb2phy2, SM6350_SLAVE_AHB2PHY_2, 1, 4); -DEFINE_QNODE(qhs_aoss, SM6350_SLAVE_AOSS, 1, 4); -DEFINE_QNODE(qhs_boot_rom, SM6350_SLAVE_BOOT_ROM, 1, 4); -DEFINE_QNODE(qhs_camera_cfg, SM6350_SLAVE_CAMERA_CFG, 1, 4); -DEFINE_QNODE(qhs_camera_nrt_thrott_cfg, SM6350_SLAVE_CAMERA_NRT_THROTTLE_CFG, 1, 4); -DEFINE_QNODE(qhs_camera_rt_throttle_cfg, SM6350_SLAVE_CAMERA_RT_THROTTLE_CFG, 1, 4); -DEFINE_QNODE(qhs_clk_ctl, SM6350_SLAVE_CLK_CTL, 1, 4); -DEFINE_QNODE(qhs_cpr_cx, SM6350_SLAVE_RBCPR_CX_CFG, 1, 4); -DEFINE_QNODE(qhs_cpr_mx, SM6350_SLAVE_RBCPR_MX_CFG, 1, 4); -DEFINE_QNODE(qhs_crypto0_cfg, SM6350_SLAVE_CRYPTO_0_CFG, 1, 4); -DEFINE_QNODE(qhs_dcc_cfg, SM6350_SLAVE_DCC_CFG, 1, 4); -DEFINE_QNODE(qhs_ddrss_cfg, SM6350_SLAVE_CNOC_DDRSS, 1, 4, SM6350_MASTER_CNOC_DC_NOC); -DEFINE_QNODE(qhs_display_cfg, SM6350_SLAVE_DISPLAY_CFG, 1, 4); -DEFINE_QNODE(qhs_display_throttle_cfg, SM6350_SLAVE_DISPLAY_THROTTLE_CFG, 1, 4); -DEFINE_QNODE(qhs_emmc_cfg, SM6350_SLAVE_EMMC_CFG, 1, 4); -DEFINE_QNODE(qhs_glm, SM6350_SLAVE_GLM, 1, 4); -DEFINE_QNODE(qhs_gpuss_cfg, SM6350_SLAVE_GRAPHICS_3D_CFG, 1, 8); -DEFINE_QNODE(qhs_imem_cfg, SM6350_SLAVE_IMEM_CFG, 1, 4); -DEFINE_QNODE(qhs_ipa, SM6350_SLAVE_IPA_CFG, 1, 4); -DEFINE_QNODE(qhs_mnoc_cfg, SM6350_SLAVE_CNOC_MNOC_CFG, 1, 4, SM6350_MASTER_CNOC_MNOC_CFG); -DEFINE_QNODE(qhs_mss_cfg, SM6350_SLAVE_CNOC_MSS, 1, 4); -DEFINE_QNODE(qhs_npu_cfg, SM6350_SLAVE_NPU_CFG, 1, 4, SM6350_MASTER_NPU_NOC_CFG); -DEFINE_QNODE(qhs_pdm, SM6350_SLAVE_PDM, 1, 4); -DEFINE_QNODE(qhs_pimem_cfg, SM6350_SLAVE_PIMEM_CFG, 1, 4); -DEFINE_QNODE(qhs_prng, SM6350_SLAVE_PRNG, 1, 4); -DEFINE_QNODE(qhs_qdss_cfg, SM6350_SLAVE_QDSS_CFG, 1, 4); -DEFINE_QNODE(qhs_qm_cfg, SM6350_SLAVE_QM_CFG, 1, 4); -DEFINE_QNODE(qhs_qm_mpu_cfg, SM6350_SLAVE_QM_MPU_CFG, 1, 4); -DEFINE_QNODE(qhs_qup0, SM6350_SLAVE_QUP_0, 1, 4); -DEFINE_QNODE(qhs_qup1, SM6350_SLAVE_QUP_1, 1, 4); -DEFINE_QNODE(qhs_sdc2, SM6350_SLAVE_SDCC_2, 1, 4); -DEFINE_QNODE(qhs_security, SM6350_SLAVE_SECURITY, 1, 4); -DEFINE_QNODE(qhs_snoc_cfg, SM6350_SLAVE_SNOC_CFG, 1, 4, SM6350_MASTER_SNOC_CFG); -DEFINE_QNODE(qhs_tcsr, SM6350_SLAVE_TCSR, 1, 4); -DEFINE_QNODE(qhs_ufs_mem_cfg, SM6350_SLAVE_UFS_MEM_CFG, 1, 4); -DEFINE_QNODE(qhs_usb3_0, SM6350_SLAVE_USB3, 1, 4); -DEFINE_QNODE(qhs_venus_cfg, SM6350_SLAVE_VENUS_CFG, 1, 4); -DEFINE_QNODE(qhs_venus_throttle_cfg, SM6350_SLAVE_VENUS_THROTTLE_CFG, 1, 4); -DEFINE_QNODE(qhs_vsense_ctrl_cfg, SM6350_SLAVE_VSENSE_CTRL_CFG, 1, 4); -DEFINE_QNODE(srvc_cnoc, SM6350_SLAVE_SERVICE_CNOC, 1, 4); -DEFINE_QNODE(qhs_gemnoc, SM6350_SLAVE_GEM_NOC_CFG, 1, 4, SM6350_MASTER_GEM_NOC_CFG); -DEFINE_QNODE(qhs_llcc, SM6350_SLAVE_LLCC_CFG, 1, 4); -DEFINE_QNODE(qhs_mcdma_ms_mpu_cfg, SM6350_SLAVE_MCDMA_MS_MPU_CFG, 1, 4); -DEFINE_QNODE(qhs_mdsp_ms_mpu_cfg, SM6350_SLAVE_MSS_PROC_MS_MPU_CFG, 1, 4); -DEFINE_QNODE(qns_gem_noc_snoc, SM6350_SLAVE_GEM_NOC_SNOC, 1, 8, SM6350_MASTER_GEM_NOC_SNOC); -DEFINE_QNODE(qns_llcc, SM6350_SLAVE_LLCC, 1, 16, SM6350_MASTER_LLCC); -DEFINE_QNODE(srvc_gemnoc, SM6350_SLAVE_SERVICE_GEM_NOC, 1, 4); -DEFINE_QNODE(ebi, SM6350_SLAVE_EBI_CH0, 2, 4); -DEFINE_QNODE(qns_mem_noc_hf, SM6350_SLAVE_MNOC_HF_MEM_NOC, 1, 32, SM6350_MASTER_MNOC_HF_MEM_NOC); -DEFINE_QNODE(qns_mem_noc_sf, SM6350_SLAVE_MNOC_SF_MEM_NOC, 1, 32, SM6350_MASTER_MNOC_SF_MEM_NOC); -DEFINE_QNODE(srvc_mnoc, SM6350_SLAVE_SERVICE_MNOC, 1, 4); -DEFINE_QNODE(qhs_cal_dp0, SM6350_SLAVE_NPU_CAL_DP0, 1, 4); -DEFINE_QNODE(qhs_cp, SM6350_SLAVE_NPU_CP, 1, 4); -DEFINE_QNODE(qhs_dma_bwmon, SM6350_SLAVE_NPU_INT_DMA_BWMON_CFG, 1, 4); -DEFINE_QNODE(qhs_dpm, SM6350_SLAVE_NPU_DPM, 1, 4); -DEFINE_QNODE(qhs_isense, SM6350_SLAVE_ISENSE_CFG, 1, 4); -DEFINE_QNODE(qhs_llm, SM6350_SLAVE_NPU_LLM_CFG, 1, 4); -DEFINE_QNODE(qhs_tcm, SM6350_SLAVE_NPU_TCM, 1, 4); -DEFINE_QNODE(qns_npu_sys, SM6350_SLAVE_NPU_COMPUTE_NOC, 2, 32); -DEFINE_QNODE(srvc_noc, SM6350_SLAVE_SERVICE_NPU_NOC, 1, 4); -DEFINE_QNODE(qhs_apss, SM6350_SLAVE_APPSS, 1, 8); -DEFINE_QNODE(qns_cnoc, SM6350_SNOC_CNOC_SLV, 1, 8, SM6350_SNOC_CNOC_MAS); -DEFINE_QNODE(qns_gemnoc_gc, SM6350_SLAVE_SNOC_GEM_NOC_GC, 1, 8, SM6350_MASTER_SNOC_GC_MEM_NOC); -DEFINE_QNODE(qns_gemnoc_sf, SM6350_SLAVE_SNOC_GEM_NOC_SF, 1, 16, SM6350_MASTER_SNOC_SF_MEM_NOC); -DEFINE_QNODE(qxs_imem, SM6350_SLAVE_OCIMEM, 1, 8); -DEFINE_QNODE(qxs_pimem, SM6350_SLAVE_PIMEM, 1, 8); -DEFINE_QNODE(srvc_snoc, SM6350_SLAVE_SERVICE_SNOC, 1, 4); -DEFINE_QNODE(xs_qdss_stm, SM6350_SLAVE_QDSS_STM, 1, 4); -DEFINE_QNODE(xs_sys_tcu_cfg, SM6350_SLAVE_TCU, 1, 8); +static struct qcom_icc_node qhm_a1noc_cfg = { + .name = "qhm_a1noc_cfg", + .id = SM6350_MASTER_A1NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM6350_SLAVE_SERVICE_A1NOC }, +}; -DEFINE_QBCM(bcm_acv, "ACV", false, &ebi); -DEFINE_QBCM(bcm_ce0, "CE0", false, &qxm_crypto); -DEFINE_QBCM(bcm_cn0, "CN0", true, &qnm_snoc, &xm_qdss_dap, &qhs_a1_noc_cfg, &qhs_a2_noc_cfg, &qhs_ahb2phy0, &qhs_aoss, &qhs_boot_rom, &qhs_camera_cfg, &qhs_camera_nrt_thrott_cfg, &qhs_camera_rt_throttle_cfg, &qhs_clk_ctl, &qhs_cpr_cx, &qhs_cpr_mx, &qhs_crypto0_cfg, &qhs_dcc_cfg, &qhs_ddrss_cfg, &qhs_display_cfg, &qhs_display_throttle_cfg, &qhs_glm, &qhs_gpuss_cfg, &qhs_imem_cfg, &qhs_ipa, &qhs_mnoc_cfg, &qhs_mss_cfg, &qhs_npu_cfg, &qhs_pimem_cfg, &qhs_prng, &qhs_qdss_cfg, &qhs_qm_cfg, &qhs_qm_mpu_cfg, &qhs_qup0, &qhs_qup1, &qhs_security, &qhs_snoc_cfg, &qhs_tcsr, &qhs_ufs_mem_cfg, &qhs_usb3_0, &qhs_venus_cfg, &qhs_venus_throttle_cfg, &qhs_vsense_ctrl_cfg, &srvc_cnoc); -DEFINE_QBCM(bcm_cn1, "CN1", false, &xm_emmc, &xm_sdc2, &qhs_ahb2phy2, &qhs_emmc_cfg, &qhs_pdm, &qhs_sdc2); -DEFINE_QBCM(bcm_co0, "CO0", false, &qns_cdsp_gemnoc); -DEFINE_QBCM(bcm_co2, "CO2", false, &qnm_npu); -DEFINE_QBCM(bcm_co3, "CO3", false, &qxm_npu_dsp); -DEFINE_QBCM(bcm_mc0, "MC0", true, &ebi); -DEFINE_QBCM(bcm_mm0, "MM0", true, &qns_mem_noc_hf); -DEFINE_QBCM(bcm_mm1, "MM1", true, &qxm_camnoc_hf0_uncomp, &qxm_camnoc_icp_uncomp, &qxm_camnoc_sf_uncomp, &qxm_camnoc_hf, &qxm_mdp0); -DEFINE_QBCM(bcm_mm2, "MM2", false, &qns_mem_noc_sf); -DEFINE_QBCM(bcm_mm3, "MM3", false, &qhm_mnoc_cfg, &qnm_video0, &qnm_video_cvp, &qxm_camnoc_sf); -DEFINE_QBCM(bcm_qup0, "QUP0", false, &qup0_core_master, &qup1_core_master, &qup0_core_slave, &qup1_core_slave); -DEFINE_QBCM(bcm_sh0, "SH0", true, &qns_llcc); -DEFINE_QBCM(bcm_sh2, "SH2", false, &acm_sys_tcu); -DEFINE_QBCM(bcm_sh3, "SH3", false, &qnm_cmpnoc); -DEFINE_QBCM(bcm_sh4, "SH4", false, &acm_apps); -DEFINE_QBCM(bcm_sn0, "SN0", true, &qns_gemnoc_sf); -DEFINE_QBCM(bcm_sn1, "SN1", false, &qxs_imem); -DEFINE_QBCM(bcm_sn2, "SN2", false, &qns_gemnoc_gc); -DEFINE_QBCM(bcm_sn3, "SN3", false, &qxs_pimem); -DEFINE_QBCM(bcm_sn4, "SN4", false, &xs_qdss_stm); -DEFINE_QBCM(bcm_sn5, "SN5", false, &qnm_aggre1_noc); -DEFINE_QBCM(bcm_sn6, "SN6", false, &qnm_aggre2_noc); -DEFINE_QBCM(bcm_sn10, "SN10", false, &qnm_gemnoc); +static struct qcom_icc_node qhm_qup_0 = { + .name = "qhm_qup_0", + .id = SM6350_MASTER_QUP_0, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM6350_A1NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node xm_emmc = { + .name = "xm_emmc", + .id = SM6350_MASTER_EMMC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM6350_A1NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node xm_ufs_mem = { + .name = "xm_ufs_mem", + .id = SM6350_MASTER_UFS_MEM, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM6350_A1NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node qhm_a2noc_cfg = { + .name = "qhm_a2noc_cfg", + .id = SM6350_MASTER_A2NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM6350_SLAVE_SERVICE_A2NOC }, +}; + +static struct qcom_icc_node qhm_qdss_bam = { + .name = "qhm_qdss_bam", + .id = SM6350_MASTER_QDSS_BAM, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM6350_A2NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node qhm_qup_1 = { + .name = "qhm_qup_1", + .id = SM6350_MASTER_QUP_1, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM6350_A2NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node qxm_crypto = { + .name = "qxm_crypto", + .id = SM6350_MASTER_CRYPTO_CORE_0, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM6350_A2NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node qxm_ipa = { + .name = "qxm_ipa", + .id = SM6350_MASTER_IPA, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM6350_A2NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node xm_qdss_etr = { + .name = "xm_qdss_etr", + .id = SM6350_MASTER_QDSS_ETR, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM6350_A2NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node xm_sdc2 = { + .name = "xm_sdc2", + .id = SM6350_MASTER_SDCC_2, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM6350_A2NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node xm_usb3_0 = { + .name = "xm_usb3_0", + .id = SM6350_MASTER_USB3, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM6350_A2NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node qxm_camnoc_hf0_uncomp = { + .name = "qxm_camnoc_hf0_uncomp", + .id = SM6350_MASTER_CAMNOC_HF0_UNCOMP, + .channels = 2, + .buswidth = 32, + .num_links = 1, + .links = { SM6350_SLAVE_CAMNOC_UNCOMP }, +}; + +static struct qcom_icc_node qxm_camnoc_icp_uncomp = { + .name = "qxm_camnoc_icp_uncomp", + .id = SM6350_MASTER_CAMNOC_ICP_UNCOMP, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SM6350_SLAVE_CAMNOC_UNCOMP }, +}; + +static struct qcom_icc_node qxm_camnoc_sf_uncomp = { + .name = "qxm_camnoc_sf_uncomp", + .id = SM6350_MASTER_CAMNOC_SF_UNCOMP, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SM6350_SLAVE_CAMNOC_UNCOMP }, +}; + +static struct qcom_icc_node qup0_core_master = { + .name = "qup0_core_master", + .id = SM6350_MASTER_QUP_CORE_0, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM6350_SLAVE_QUP_CORE_0 }, +}; + +static struct qcom_icc_node qup1_core_master = { + .name = "qup1_core_master", + .id = SM6350_MASTER_QUP_CORE_1, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM6350_SLAVE_QUP_CORE_1 }, +}; + +static struct qcom_icc_node qnm_npu = { + .name = "qnm_npu", + .id = SM6350_MASTER_NPU, + .channels = 2, + .buswidth = 32, + .num_links = 1, + .links = { SM6350_SLAVE_CDSP_GEM_NOC }, +}; + +static struct qcom_icc_node qxm_npu_dsp = { + .name = "qxm_npu_dsp", + .id = SM6350_MASTER_NPU_PROC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM6350_SLAVE_CDSP_GEM_NOC }, +}; + +static struct qcom_icc_node qnm_snoc = { + .name = "qnm_snoc", + .id = SM6350_SNOC_CNOC_MAS, + .channels = 1, + .buswidth = 8, + .num_links = 42, + .links = { SM6350_SLAVE_CAMERA_CFG, + SM6350_SLAVE_SDCC_2, + SM6350_SLAVE_CNOC_MNOC_CFG, + SM6350_SLAVE_UFS_MEM_CFG, + SM6350_SLAVE_QM_CFG, + SM6350_SLAVE_SNOC_CFG, + SM6350_SLAVE_QM_MPU_CFG, + SM6350_SLAVE_GLM, + SM6350_SLAVE_PDM, + SM6350_SLAVE_CAMERA_NRT_THROTTLE_CFG, + SM6350_SLAVE_A2NOC_CFG, + SM6350_SLAVE_QDSS_CFG, + SM6350_SLAVE_VSENSE_CTRL_CFG, + SM6350_SLAVE_CAMERA_RT_THROTTLE_CFG, + SM6350_SLAVE_DISPLAY_CFG, + SM6350_SLAVE_TCSR, + SM6350_SLAVE_DCC_CFG, + SM6350_SLAVE_CNOC_DDRSS, + SM6350_SLAVE_DISPLAY_THROTTLE_CFG, + SM6350_SLAVE_NPU_CFG, + SM6350_SLAVE_AHB2PHY, + SM6350_SLAVE_GRAPHICS_3D_CFG, + SM6350_SLAVE_BOOT_ROM, + SM6350_SLAVE_VENUS_CFG, + SM6350_SLAVE_IPA_CFG, + SM6350_SLAVE_SECURITY, + SM6350_SLAVE_IMEM_CFG, + SM6350_SLAVE_CNOC_MSS, + SM6350_SLAVE_SERVICE_CNOC, + SM6350_SLAVE_USB3, + SM6350_SLAVE_VENUS_THROTTLE_CFG, + SM6350_SLAVE_RBCPR_CX_CFG, + SM6350_SLAVE_A1NOC_CFG, + SM6350_SLAVE_AOSS, + SM6350_SLAVE_PRNG, + SM6350_SLAVE_EMMC_CFG, + SM6350_SLAVE_CRYPTO_0_CFG, + SM6350_SLAVE_PIMEM_CFG, + SM6350_SLAVE_RBCPR_MX_CFG, + SM6350_SLAVE_QUP_0, + SM6350_SLAVE_QUP_1, + SM6350_SLAVE_CLK_CTL + }, +}; + +static struct qcom_icc_node xm_qdss_dap = { + .name = "xm_qdss_dap", + .id = SM6350_MASTER_QDSS_DAP, + .channels = 1, + .buswidth = 8, + .num_links = 42, + .links = { SM6350_SLAVE_CAMERA_CFG, + SM6350_SLAVE_SDCC_2, + SM6350_SLAVE_CNOC_MNOC_CFG, + SM6350_SLAVE_UFS_MEM_CFG, + SM6350_SLAVE_QM_CFG, + SM6350_SLAVE_SNOC_CFG, + SM6350_SLAVE_QM_MPU_CFG, + SM6350_SLAVE_GLM, + SM6350_SLAVE_PDM, + SM6350_SLAVE_CAMERA_NRT_THROTTLE_CFG, + SM6350_SLAVE_A2NOC_CFG, + SM6350_SLAVE_QDSS_CFG, + SM6350_SLAVE_VSENSE_CTRL_CFG, + SM6350_SLAVE_CAMERA_RT_THROTTLE_CFG, + SM6350_SLAVE_DISPLAY_CFG, + SM6350_SLAVE_TCSR, + SM6350_SLAVE_DCC_CFG, + SM6350_SLAVE_CNOC_DDRSS, + SM6350_SLAVE_DISPLAY_THROTTLE_CFG, + SM6350_SLAVE_NPU_CFG, + SM6350_SLAVE_AHB2PHY, + SM6350_SLAVE_GRAPHICS_3D_CFG, + SM6350_SLAVE_BOOT_ROM, + SM6350_SLAVE_VENUS_CFG, + SM6350_SLAVE_IPA_CFG, + SM6350_SLAVE_SECURITY, + SM6350_SLAVE_IMEM_CFG, + SM6350_SLAVE_CNOC_MSS, + SM6350_SLAVE_SERVICE_CNOC, + SM6350_SLAVE_USB3, + SM6350_SLAVE_VENUS_THROTTLE_CFG, + SM6350_SLAVE_RBCPR_CX_CFG, + SM6350_SLAVE_A1NOC_CFG, + SM6350_SLAVE_AOSS, + SM6350_SLAVE_PRNG, + SM6350_SLAVE_EMMC_CFG, + SM6350_SLAVE_CRYPTO_0_CFG, + SM6350_SLAVE_PIMEM_CFG, + SM6350_SLAVE_RBCPR_MX_CFG, + SM6350_SLAVE_QUP_0, + SM6350_SLAVE_QUP_1, + SM6350_SLAVE_CLK_CTL + }, +}; + +static struct qcom_icc_node qhm_cnoc_dc_noc = { + .name = "qhm_cnoc_dc_noc", + .id = SM6350_MASTER_CNOC_DC_NOC, + .channels = 1, + .buswidth = 4, + .num_links = 2, + .links = { SM6350_SLAVE_LLCC_CFG, + SM6350_SLAVE_GEM_NOC_CFG + }, +}; + +static struct qcom_icc_node acm_apps = { + .name = "acm_apps", + .id = SM6350_MASTER_AMPSS_M0, + .channels = 1, + .buswidth = 16, + .num_links = 2, + .links = { SM6350_SLAVE_LLCC, + SM6350_SLAVE_GEM_NOC_SNOC + }, +}; + +static struct qcom_icc_node acm_sys_tcu = { + .name = "acm_sys_tcu", + .id = SM6350_MASTER_SYS_TCU, + .channels = 1, + .buswidth = 8, + .num_links = 2, + .links = { SM6350_SLAVE_LLCC, + SM6350_SLAVE_GEM_NOC_SNOC + }, +}; + +static struct qcom_icc_node qhm_gemnoc_cfg = { + .name = "qhm_gemnoc_cfg", + .id = SM6350_MASTER_GEM_NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 3, + .links = { SM6350_SLAVE_MCDMA_MS_MPU_CFG, + SM6350_SLAVE_SERVICE_GEM_NOC, + SM6350_SLAVE_MSS_PROC_MS_MPU_CFG + }, +}; + +static struct qcom_icc_node qnm_cmpnoc = { + .name = "qnm_cmpnoc", + .id = SM6350_MASTER_COMPUTE_NOC, + .channels = 1, + .buswidth = 32, + .num_links = 2, + .links = { SM6350_SLAVE_LLCC, + SM6350_SLAVE_GEM_NOC_SNOC + }, +}; + +static struct qcom_icc_node qnm_mnoc_hf = { + .name = "qnm_mnoc_hf", + .id = SM6350_MASTER_MNOC_HF_MEM_NOC, + .channels = 1, + .buswidth = 32, + .num_links = 2, + .links = { SM6350_SLAVE_LLCC, + SM6350_SLAVE_GEM_NOC_SNOC + }, +}; + +static struct qcom_icc_node qnm_mnoc_sf = { + .name = "qnm_mnoc_sf", + .id = SM6350_MASTER_MNOC_SF_MEM_NOC, + .channels = 1, + .buswidth = 32, + .num_links = 2, + .links = { SM6350_SLAVE_LLCC, + SM6350_SLAVE_GEM_NOC_SNOC + }, +}; + +static struct qcom_icc_node qnm_snoc_gc = { + .name = "qnm_snoc_gc", + .id = SM6350_MASTER_SNOC_GC_MEM_NOC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM6350_SLAVE_LLCC }, +}; + +static struct qcom_icc_node qnm_snoc_sf = { + .name = "qnm_snoc_sf", + .id = SM6350_MASTER_SNOC_SF_MEM_NOC, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SM6350_SLAVE_LLCC }, +}; + +static struct qcom_icc_node qxm_gpu = { + .name = "qxm_gpu", + .id = SM6350_MASTER_GRAPHICS_3D, + .channels = 2, + .buswidth = 32, + .num_links = 2, + .links = { SM6350_SLAVE_LLCC, + SM6350_SLAVE_GEM_NOC_SNOC + }, +}; + +static struct qcom_icc_node llcc_mc = { + .name = "llcc_mc", + .id = SM6350_MASTER_LLCC, + .channels = 2, + .buswidth = 4, + .num_links = 1, + .links = { SM6350_SLAVE_EBI_CH0 }, +}; + +static struct qcom_icc_node qhm_mnoc_cfg = { + .name = "qhm_mnoc_cfg", + .id = SM6350_MASTER_CNOC_MNOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM6350_SLAVE_SERVICE_MNOC }, +}; + +static struct qcom_icc_node qnm_video0 = { + .name = "qnm_video0", + .id = SM6350_MASTER_VIDEO_P0, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SM6350_SLAVE_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qnm_video_cvp = { + .name = "qnm_video_cvp", + .id = SM6350_MASTER_VIDEO_PROC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM6350_SLAVE_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qxm_camnoc_hf = { + .name = "qxm_camnoc_hf", + .id = SM6350_MASTER_CAMNOC_HF, + .channels = 2, + .buswidth = 32, + .num_links = 1, + .links = { SM6350_SLAVE_MNOC_HF_MEM_NOC }, +}; + +static struct qcom_icc_node qxm_camnoc_icp = { + .name = "qxm_camnoc_icp", + .id = SM6350_MASTER_CAMNOC_ICP, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM6350_SLAVE_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qxm_camnoc_sf = { + .name = "qxm_camnoc_sf", + .id = SM6350_MASTER_CAMNOC_SF, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SM6350_SLAVE_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qxm_mdp0 = { + .name = "qxm_mdp0", + .id = SM6350_MASTER_MDP_PORT0, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SM6350_SLAVE_MNOC_HF_MEM_NOC }, +}; + +static struct qcom_icc_node amm_npu_sys = { + .name = "amm_npu_sys", + .id = SM6350_MASTER_NPU_SYS, + .channels = 2, + .buswidth = 32, + .num_links = 1, + .links = { SM6350_SLAVE_NPU_COMPUTE_NOC }, +}; + +static struct qcom_icc_node qhm_npu_cfg = { + .name = "qhm_npu_cfg", + .id = SM6350_MASTER_NPU_NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 8, + .links = { SM6350_SLAVE_SERVICE_NPU_NOC, + SM6350_SLAVE_ISENSE_CFG, + SM6350_SLAVE_NPU_LLM_CFG, + SM6350_SLAVE_NPU_INT_DMA_BWMON_CFG, + SM6350_SLAVE_NPU_CP, + SM6350_SLAVE_NPU_TCM, + SM6350_SLAVE_NPU_CAL_DP0, + SM6350_SLAVE_NPU_DPM + }, +}; + +static struct qcom_icc_node qhm_snoc_cfg = { + .name = "qhm_snoc_cfg", + .id = SM6350_MASTER_SNOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM6350_SLAVE_SERVICE_SNOC }, +}; + +static struct qcom_icc_node qnm_aggre1_noc = { + .name = "qnm_aggre1_noc", + .id = SM6350_A1NOC_SNOC_MAS, + .channels = 1, + .buswidth = 16, + .num_links = 6, + .links = { SM6350_SLAVE_SNOC_GEM_NOC_SF, + SM6350_SLAVE_PIMEM, + SM6350_SLAVE_OCIMEM, + SM6350_SLAVE_APPSS, + SM6350_SNOC_CNOC_SLV, + SM6350_SLAVE_QDSS_STM + }, +}; + +static struct qcom_icc_node qnm_aggre2_noc = { + .name = "qnm_aggre2_noc", + .id = SM6350_A2NOC_SNOC_MAS, + .channels = 1, + .buswidth = 16, + .num_links = 7, + .links = { SM6350_SLAVE_SNOC_GEM_NOC_SF, + SM6350_SLAVE_PIMEM, + SM6350_SLAVE_OCIMEM, + SM6350_SLAVE_APPSS, + SM6350_SNOC_CNOC_SLV, + SM6350_SLAVE_TCU, + SM6350_SLAVE_QDSS_STM + }, +}; + +static struct qcom_icc_node qnm_gemnoc = { + .name = "qnm_gemnoc", + .id = SM6350_MASTER_GEM_NOC_SNOC, + .channels = 1, + .buswidth = 8, + .num_links = 6, + .links = { SM6350_SLAVE_PIMEM, + SM6350_SLAVE_OCIMEM, + SM6350_SLAVE_APPSS, + SM6350_SNOC_CNOC_SLV, + SM6350_SLAVE_TCU, + SM6350_SLAVE_QDSS_STM + }, +}; + +static struct qcom_icc_node qxm_pimem = { + .name = "qxm_pimem", + .id = SM6350_MASTER_PIMEM, + .channels = 1, + .buswidth = 8, + .num_links = 2, + .links = { SM6350_SLAVE_SNOC_GEM_NOC_GC, + SM6350_SLAVE_OCIMEM + }, +}; + +static struct qcom_icc_node xm_gic = { + .name = "xm_gic", + .id = SM6350_MASTER_GIC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM6350_SLAVE_SNOC_GEM_NOC_GC }, +}; + +static struct qcom_icc_node qns_a1noc_snoc = { + .name = "qns_a1noc_snoc", + .id = SM6350_A1NOC_SNOC_SLV, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SM6350_A1NOC_SNOC_MAS }, +}; + +static struct qcom_icc_node srvc_aggre1_noc = { + .name = "srvc_aggre1_noc", + .id = SM6350_SLAVE_SERVICE_A1NOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_a2noc_snoc = { + .name = "qns_a2noc_snoc", + .id = SM6350_A2NOC_SNOC_SLV, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SM6350_A2NOC_SNOC_MAS }, +}; + +static struct qcom_icc_node srvc_aggre2_noc = { + .name = "srvc_aggre2_noc", + .id = SM6350_SLAVE_SERVICE_A2NOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_camnoc_uncomp = { + .name = "qns_camnoc_uncomp", + .id = SM6350_SLAVE_CAMNOC_UNCOMP, + .channels = 1, + .buswidth = 32, +}; + +static struct qcom_icc_node qup0_core_slave = { + .name = "qup0_core_slave", + .id = SM6350_SLAVE_QUP_CORE_0, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qup1_core_slave = { + .name = "qup1_core_slave", + .id = SM6350_SLAVE_QUP_CORE_1, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_cdsp_gemnoc = { + .name = "qns_cdsp_gemnoc", + .id = SM6350_SLAVE_CDSP_GEM_NOC, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SM6350_MASTER_COMPUTE_NOC }, +}; + +static struct qcom_icc_node qhs_a1_noc_cfg = { + .name = "qhs_a1_noc_cfg", + .id = SM6350_SLAVE_A1NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM6350_MASTER_A1NOC_CFG }, +}; + +static struct qcom_icc_node qhs_a2_noc_cfg = { + .name = "qhs_a2_noc_cfg", + .id = SM6350_SLAVE_A2NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM6350_MASTER_A2NOC_CFG }, +}; + +static struct qcom_icc_node qhs_ahb2phy0 = { + .name = "qhs_ahb2phy0", + .id = SM6350_SLAVE_AHB2PHY, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_ahb2phy2 = { + .name = "qhs_ahb2phy2", + .id = SM6350_SLAVE_AHB2PHY_2, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_aoss = { + .name = "qhs_aoss", + .id = SM6350_SLAVE_AOSS, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_boot_rom = { + .name = "qhs_boot_rom", + .id = SM6350_SLAVE_BOOT_ROM, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_camera_cfg = { + .name = "qhs_camera_cfg", + .id = SM6350_SLAVE_CAMERA_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_camera_nrt_thrott_cfg = { + .name = "qhs_camera_nrt_thrott_cfg", + .id = SM6350_SLAVE_CAMERA_NRT_THROTTLE_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_camera_rt_throttle_cfg = { + .name = "qhs_camera_rt_throttle_cfg", + .id = SM6350_SLAVE_CAMERA_RT_THROTTLE_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_clk_ctl = { + .name = "qhs_clk_ctl", + .id = SM6350_SLAVE_CLK_CTL, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_cpr_cx = { + .name = "qhs_cpr_cx", + .id = SM6350_SLAVE_RBCPR_CX_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_cpr_mx = { + .name = "qhs_cpr_mx", + .id = SM6350_SLAVE_RBCPR_MX_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_crypto0_cfg = { + .name = "qhs_crypto0_cfg", + .id = SM6350_SLAVE_CRYPTO_0_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_dcc_cfg = { + .name = "qhs_dcc_cfg", + .id = SM6350_SLAVE_DCC_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_ddrss_cfg = { + .name = "qhs_ddrss_cfg", + .id = SM6350_SLAVE_CNOC_DDRSS, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM6350_MASTER_CNOC_DC_NOC }, +}; + +static struct qcom_icc_node qhs_display_cfg = { + .name = "qhs_display_cfg", + .id = SM6350_SLAVE_DISPLAY_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_display_throttle_cfg = { + .name = "qhs_display_throttle_cfg", + .id = SM6350_SLAVE_DISPLAY_THROTTLE_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_emmc_cfg = { + .name = "qhs_emmc_cfg", + .id = SM6350_SLAVE_EMMC_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_glm = { + .name = "qhs_glm", + .id = SM6350_SLAVE_GLM, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_gpuss_cfg = { + .name = "qhs_gpuss_cfg", + .id = SM6350_SLAVE_GRAPHICS_3D_CFG, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node qhs_imem_cfg = { + .name = "qhs_imem_cfg", + .id = SM6350_SLAVE_IMEM_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_ipa = { + .name = "qhs_ipa", + .id = SM6350_SLAVE_IPA_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_mnoc_cfg = { + .name = "qhs_mnoc_cfg", + .id = SM6350_SLAVE_CNOC_MNOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM6350_MASTER_CNOC_MNOC_CFG }, +}; + +static struct qcom_icc_node qhs_mss_cfg = { + .name = "qhs_mss_cfg", + .id = SM6350_SLAVE_CNOC_MSS, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_npu_cfg = { + .name = "qhs_npu_cfg", + .id = SM6350_SLAVE_NPU_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM6350_MASTER_NPU_NOC_CFG }, +}; + +static struct qcom_icc_node qhs_pdm = { + .name = "qhs_pdm", + .id = SM6350_SLAVE_PDM, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_pimem_cfg = { + .name = "qhs_pimem_cfg", + .id = SM6350_SLAVE_PIMEM_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_prng = { + .name = "qhs_prng", + .id = SM6350_SLAVE_PRNG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_qdss_cfg = { + .name = "qhs_qdss_cfg", + .id = SM6350_SLAVE_QDSS_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_qm_cfg = { + .name = "qhs_qm_cfg", + .id = SM6350_SLAVE_QM_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_qm_mpu_cfg = { + .name = "qhs_qm_mpu_cfg", + .id = SM6350_SLAVE_QM_MPU_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_qup0 = { + .name = "qhs_qup0", + .id = SM6350_SLAVE_QUP_0, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_qup1 = { + .name = "qhs_qup1", + .id = SM6350_SLAVE_QUP_1, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_sdc2 = { + .name = "qhs_sdc2", + .id = SM6350_SLAVE_SDCC_2, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_security = { + .name = "qhs_security", + .id = SM6350_SLAVE_SECURITY, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_snoc_cfg = { + .name = "qhs_snoc_cfg", + .id = SM6350_SLAVE_SNOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM6350_MASTER_SNOC_CFG }, +}; + +static struct qcom_icc_node qhs_tcsr = { + .name = "qhs_tcsr", + .id = SM6350_SLAVE_TCSR, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_ufs_mem_cfg = { + .name = "qhs_ufs_mem_cfg", + .id = SM6350_SLAVE_UFS_MEM_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_usb3_0 = { + .name = "qhs_usb3_0", + .id = SM6350_SLAVE_USB3, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_venus_cfg = { + .name = "qhs_venus_cfg", + .id = SM6350_SLAVE_VENUS_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_venus_throttle_cfg = { + .name = "qhs_venus_throttle_cfg", + .id = SM6350_SLAVE_VENUS_THROTTLE_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_vsense_ctrl_cfg = { + .name = "qhs_vsense_ctrl_cfg", + .id = SM6350_SLAVE_VSENSE_CTRL_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node srvc_cnoc = { + .name = "srvc_cnoc", + .id = SM6350_SLAVE_SERVICE_CNOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_gemnoc = { + .name = "qhs_gemnoc", + .id = SM6350_SLAVE_GEM_NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM6350_MASTER_GEM_NOC_CFG }, +}; + +static struct qcom_icc_node qhs_llcc = { + .name = "qhs_llcc", + .id = SM6350_SLAVE_LLCC_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_mcdma_ms_mpu_cfg = { + .name = "qhs_mcdma_ms_mpu_cfg", + .id = SM6350_SLAVE_MCDMA_MS_MPU_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_mdsp_ms_mpu_cfg = { + .name = "qhs_mdsp_ms_mpu_cfg", + .id = SM6350_SLAVE_MSS_PROC_MS_MPU_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_gem_noc_snoc = { + .name = "qns_gem_noc_snoc", + .id = SM6350_SLAVE_GEM_NOC_SNOC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM6350_MASTER_GEM_NOC_SNOC }, +}; + +static struct qcom_icc_node qns_llcc = { + .name = "qns_llcc", + .id = SM6350_SLAVE_LLCC, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SM6350_MASTER_LLCC }, +}; + +static struct qcom_icc_node srvc_gemnoc = { + .name = "srvc_gemnoc", + .id = SM6350_SLAVE_SERVICE_GEM_NOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node ebi = { + .name = "ebi", + .id = SM6350_SLAVE_EBI_CH0, + .channels = 2, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_mem_noc_hf = { + .name = "qns_mem_noc_hf", + .id = SM6350_SLAVE_MNOC_HF_MEM_NOC, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SM6350_MASTER_MNOC_HF_MEM_NOC }, +}; + +static struct qcom_icc_node qns_mem_noc_sf = { + .name = "qns_mem_noc_sf", + .id = SM6350_SLAVE_MNOC_SF_MEM_NOC, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SM6350_MASTER_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node srvc_mnoc = { + .name = "srvc_mnoc", + .id = SM6350_SLAVE_SERVICE_MNOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_cal_dp0 = { + .name = "qhs_cal_dp0", + .id = SM6350_SLAVE_NPU_CAL_DP0, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_cp = { + .name = "qhs_cp", + .id = SM6350_SLAVE_NPU_CP, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_dma_bwmon = { + .name = "qhs_dma_bwmon", + .id = SM6350_SLAVE_NPU_INT_DMA_BWMON_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_dpm = { + .name = "qhs_dpm", + .id = SM6350_SLAVE_NPU_DPM, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_isense = { + .name = "qhs_isense", + .id = SM6350_SLAVE_ISENSE_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_llm = { + .name = "qhs_llm", + .id = SM6350_SLAVE_NPU_LLM_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_tcm = { + .name = "qhs_tcm", + .id = SM6350_SLAVE_NPU_TCM, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_npu_sys = { + .name = "qns_npu_sys", + .id = SM6350_SLAVE_NPU_COMPUTE_NOC, + .channels = 2, + .buswidth = 32, +}; + +static struct qcom_icc_node srvc_noc = { + .name = "srvc_noc", + .id = SM6350_SLAVE_SERVICE_NPU_NOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_apss = { + .name = "qhs_apss", + .id = SM6350_SLAVE_APPSS, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node qns_cnoc = { + .name = "qns_cnoc", + .id = SM6350_SNOC_CNOC_SLV, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM6350_SNOC_CNOC_MAS }, +}; + +static struct qcom_icc_node qns_gemnoc_gc = { + .name = "qns_gemnoc_gc", + .id = SM6350_SLAVE_SNOC_GEM_NOC_GC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM6350_MASTER_SNOC_GC_MEM_NOC }, +}; + +static struct qcom_icc_node qns_gemnoc_sf = { + .name = "qns_gemnoc_sf", + .id = SM6350_SLAVE_SNOC_GEM_NOC_SF, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SM6350_MASTER_SNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qxs_imem = { + .name = "qxs_imem", + .id = SM6350_SLAVE_OCIMEM, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node qxs_pimem = { + .name = "qxs_pimem", + .id = SM6350_SLAVE_PIMEM, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node srvc_snoc = { + .name = "srvc_snoc", + .id = SM6350_SLAVE_SERVICE_SNOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node xs_qdss_stm = { + .name = "xs_qdss_stm", + .id = SM6350_SLAVE_QDSS_STM, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node xs_sys_tcu_cfg = { + .name = "xs_sys_tcu_cfg", + .id = SM6350_SLAVE_TCU, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_bcm bcm_acv = { + .name = "ACV", + .keepalive = false, + .num_nodes = 1, + .nodes = { &ebi }, +}; + +static struct qcom_icc_bcm bcm_ce0 = { + .name = "CE0", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qxm_crypto }, +}; + +static struct qcom_icc_bcm bcm_cn0 = { + .name = "CN0", + .keepalive = true, + .num_nodes = 41, + .nodes = { &qnm_snoc, + &xm_qdss_dap, + &qhs_a1_noc_cfg, + &qhs_a2_noc_cfg, + &qhs_ahb2phy0, + &qhs_aoss, + &qhs_boot_rom, + &qhs_camera_cfg, + &qhs_camera_nrt_thrott_cfg, + &qhs_camera_rt_throttle_cfg, + &qhs_clk_ctl, + &qhs_cpr_cx, + &qhs_cpr_mx, + &qhs_crypto0_cfg, + &qhs_dcc_cfg, + &qhs_ddrss_cfg, + &qhs_display_cfg, + &qhs_display_throttle_cfg, + &qhs_glm, + &qhs_gpuss_cfg, + &qhs_imem_cfg, + &qhs_ipa, + &qhs_mnoc_cfg, + &qhs_mss_cfg, + &qhs_npu_cfg, + &qhs_pimem_cfg, + &qhs_prng, + &qhs_qdss_cfg, + &qhs_qm_cfg, + &qhs_qm_mpu_cfg, + &qhs_qup0, + &qhs_qup1, + &qhs_security, + &qhs_snoc_cfg, + &qhs_tcsr, + &qhs_ufs_mem_cfg, + &qhs_usb3_0, + &qhs_venus_cfg, + &qhs_venus_throttle_cfg, + &qhs_vsense_ctrl_cfg, + &srvc_cnoc + }, +}; + +static struct qcom_icc_bcm bcm_cn1 = { + .name = "CN1", + .keepalive = false, + .num_nodes = 6, + .nodes = { &xm_emmc, + &xm_sdc2, + &qhs_ahb2phy2, + &qhs_emmc_cfg, + &qhs_pdm, + &qhs_sdc2 + }, +}; + +static struct qcom_icc_bcm bcm_co0 = { + .name = "CO0", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qns_cdsp_gemnoc }, +}; + +static struct qcom_icc_bcm bcm_co2 = { + .name = "CO2", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qnm_npu }, +}; + +static struct qcom_icc_bcm bcm_co3 = { + .name = "CO3", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qxm_npu_dsp }, +}; + +static struct qcom_icc_bcm bcm_mc0 = { + .name = "MC0", + .keepalive = true, + .num_nodes = 1, + .nodes = { &ebi }, +}; + +static struct qcom_icc_bcm bcm_mm0 = { + .name = "MM0", + .keepalive = true, + .num_nodes = 1, + .nodes = { &qns_mem_noc_hf }, +}; + +static struct qcom_icc_bcm bcm_mm1 = { + .name = "MM1", + .keepalive = true, + .num_nodes = 5, + .nodes = { &qxm_camnoc_hf0_uncomp, + &qxm_camnoc_icp_uncomp, + &qxm_camnoc_sf_uncomp, + &qxm_camnoc_hf, + &qxm_mdp0 + }, +}; + +static struct qcom_icc_bcm bcm_mm2 = { + .name = "MM2", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qns_mem_noc_sf }, +}; + +static struct qcom_icc_bcm bcm_mm3 = { + .name = "MM3", + .keepalive = false, + .num_nodes = 4, + .nodes = { &qhm_mnoc_cfg, &qnm_video0, &qnm_video_cvp, &qxm_camnoc_sf }, +}; + +static struct qcom_icc_bcm bcm_qup0 = { + .name = "QUP0", + .keepalive = false, + .num_nodes = 4, + .nodes = { &qup0_core_master, &qup1_core_master, &qup0_core_slave, &qup1_core_slave }, +}; + +static struct qcom_icc_bcm bcm_sh0 = { + .name = "SH0", + .keepalive = true, + .num_nodes = 1, + .nodes = { &qns_llcc }, +}; + +static struct qcom_icc_bcm bcm_sh2 = { + .name = "SH2", + .keepalive = false, + .num_nodes = 1, + .nodes = { &acm_sys_tcu }, +}; + +static struct qcom_icc_bcm bcm_sh3 = { + .name = "SH3", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qnm_cmpnoc }, +}; + +static struct qcom_icc_bcm bcm_sh4 = { + .name = "SH4", + .keepalive = false, + .num_nodes = 1, + .nodes = { &acm_apps }, +}; + +static struct qcom_icc_bcm bcm_sn0 = { + .name = "SN0", + .keepalive = true, + .num_nodes = 1, + .nodes = { &qns_gemnoc_sf }, +}; + +static struct qcom_icc_bcm bcm_sn1 = { + .name = "SN1", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qxs_imem }, +}; + +static struct qcom_icc_bcm bcm_sn2 = { + .name = "SN2", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qns_gemnoc_gc }, +}; + +static struct qcom_icc_bcm bcm_sn3 = { + .name = "SN3", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qxs_pimem }, +}; + +static struct qcom_icc_bcm bcm_sn4 = { + .name = "SN4", + .keepalive = false, + .num_nodes = 1, + .nodes = { &xs_qdss_stm }, +}; + +static struct qcom_icc_bcm bcm_sn5 = { + .name = "SN5", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qnm_aggre1_noc }, +}; + +static struct qcom_icc_bcm bcm_sn6 = { + .name = "SN6", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qnm_aggre2_noc }, +}; + +static struct qcom_icc_bcm bcm_sn10 = { + .name = "SN10", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qnm_gemnoc }, +}; static struct qcom_icc_bcm * const aggre1_noc_bcms[] = { &bcm_cn1, diff --git a/drivers/interconnect/qcom/sm8150.c b/drivers/interconnect/qcom/sm8150.c index c5ab29322164..c7c9cf7f746b 100644 --- a/drivers/interconnect/qcom/sm8150.c +++ b/drivers/interconnect/qcom/sm8150.c @@ -7,181 +7,1534 @@ #include #include #include +#include #include -#include +#include #include #include "bcm-voter.h" #include "icc-rpmh.h" #include "sm8150.h" -DEFINE_QNODE(qhm_a1noc_cfg, SM8150_MASTER_A1NOC_CFG, 1, 4, SM8150_SLAVE_SERVICE_A1NOC); -DEFINE_QNODE(qhm_qup0, SM8150_MASTER_QUP_0, 1, 4, SM8150_A1NOC_SNOC_SLV); -DEFINE_QNODE(xm_emac, SM8150_MASTER_EMAC, 1, 8, SM8150_A1NOC_SNOC_SLV); -DEFINE_QNODE(xm_ufs_mem, SM8150_MASTER_UFS_MEM, 1, 8, SM8150_A1NOC_SNOC_SLV); -DEFINE_QNODE(xm_usb3_0, SM8150_MASTER_USB3, 1, 8, SM8150_A1NOC_SNOC_SLV); -DEFINE_QNODE(xm_usb3_1, SM8150_MASTER_USB3_1, 1, 8, SM8150_A1NOC_SNOC_SLV); -DEFINE_QNODE(qhm_a2noc_cfg, SM8150_MASTER_A2NOC_CFG, 1, 4, SM8150_SLAVE_SERVICE_A2NOC); -DEFINE_QNODE(qhm_qdss_bam, SM8150_MASTER_QDSS_BAM, 1, 4, SM8150_A2NOC_SNOC_SLV); -DEFINE_QNODE(qhm_qspi, SM8150_MASTER_QSPI, 1, 4, SM8150_A2NOC_SNOC_SLV); -DEFINE_QNODE(qhm_qup1, SM8150_MASTER_QUP_1, 1, 4, SM8150_A2NOC_SNOC_SLV); -DEFINE_QNODE(qhm_qup2, SM8150_MASTER_QUP_2, 1, 4, SM8150_A2NOC_SNOC_SLV); -DEFINE_QNODE(qhm_sensorss_ahb, SM8150_MASTER_SENSORS_AHB, 1, 4, SM8150_A2NOC_SNOC_SLV); -DEFINE_QNODE(qhm_tsif, SM8150_MASTER_TSIF, 1, 4, SM8150_A2NOC_SNOC_SLV); -DEFINE_QNODE(qnm_cnoc, SM8150_MASTER_CNOC_A2NOC, 1, 8, SM8150_A2NOC_SNOC_SLV); -DEFINE_QNODE(qxm_crypto, SM8150_MASTER_CRYPTO_CORE_0, 1, 8, SM8150_A2NOC_SNOC_SLV); -DEFINE_QNODE(qxm_ipa, SM8150_MASTER_IPA, 1, 8, SM8150_A2NOC_SNOC_SLV); -DEFINE_QNODE(xm_pcie3_0, SM8150_MASTER_PCIE, 1, 8, SM8150_SLAVE_ANOC_PCIE_GEM_NOC); -DEFINE_QNODE(xm_pcie3_1, SM8150_MASTER_PCIE_1, 1, 8, SM8150_SLAVE_ANOC_PCIE_GEM_NOC); -DEFINE_QNODE(xm_qdss_etr, SM8150_MASTER_QDSS_ETR, 1, 8, SM8150_A2NOC_SNOC_SLV); -DEFINE_QNODE(xm_sdc2, SM8150_MASTER_SDCC_2, 1, 8, SM8150_A2NOC_SNOC_SLV); -DEFINE_QNODE(xm_sdc4, SM8150_MASTER_SDCC_4, 1, 8, SM8150_A2NOC_SNOC_SLV); -DEFINE_QNODE(qxm_camnoc_hf0_uncomp, SM8150_MASTER_CAMNOC_HF0_UNCOMP, 1, 32, SM8150_SLAVE_CAMNOC_UNCOMP); -DEFINE_QNODE(qxm_camnoc_hf1_uncomp, SM8150_MASTER_CAMNOC_HF1_UNCOMP, 1, 32, SM8150_SLAVE_CAMNOC_UNCOMP); -DEFINE_QNODE(qxm_camnoc_sf_uncomp, SM8150_MASTER_CAMNOC_SF_UNCOMP, 1, 32, SM8150_SLAVE_CAMNOC_UNCOMP); -DEFINE_QNODE(qnm_npu, SM8150_MASTER_NPU, 1, 32, SM8150_SLAVE_CDSP_MEM_NOC); -DEFINE_QNODE(qhm_spdm, SM8150_MASTER_SPDM, 1, 4, SM8150_SLAVE_CNOC_A2NOC); -DEFINE_QNODE(qnm_snoc, SM8150_SNOC_CNOC_MAS, 1, 8, SM8150_SLAVE_TLMM_SOUTH, SM8150_SLAVE_CDSP_CFG, SM8150_SLAVE_SPSS_CFG, SM8150_SLAVE_CAMERA_CFG, SM8150_SLAVE_SDCC_4, SM8150_SLAVE_SDCC_2, SM8150_SLAVE_CNOC_MNOC_CFG, SM8150_SLAVE_EMAC_CFG, SM8150_SLAVE_UFS_MEM_CFG, SM8150_SLAVE_TLMM_EAST, SM8150_SLAVE_SSC_CFG, SM8150_SLAVE_SNOC_CFG, SM8150_SLAVE_NORTH_PHY_CFG, SM8150_SLAVE_QUP_0, SM8150_SLAVE_GLM, SM8150_SLAVE_PCIE_1_CFG, SM8150_SLAVE_A2NOC_CFG, SM8150_SLAVE_QDSS_CFG, SM8150_SLAVE_DISPLAY_CFG, SM8150_SLAVE_TCSR, SM8150_SLAVE_CNOC_DDRSS, SM8150_SLAVE_RBCPR_MMCX_CFG, SM8150_SLAVE_NPU_CFG, SM8150_SLAVE_PCIE_0_CFG, SM8150_SLAVE_GRAPHICS_3D_CFG, SM8150_SLAVE_VENUS_CFG, SM8150_SLAVE_TSIF, SM8150_SLAVE_IPA_CFG, SM8150_SLAVE_CLK_CTL, SM8150_SLAVE_AOP, SM8150_SLAVE_QUP_1, SM8150_SLAVE_AHB2PHY_SOUTH, SM8150_SLAVE_USB3_1, SM8150_SLAVE_SERVICE_CNOC, SM8150_SLAVE_UFS_CARD_CFG, SM8150_SLAVE_QUP_2, SM8150_SLAVE_RBCPR_CX_CFG, SM8150_SLAVE_TLMM_WEST, SM8150_SLAVE_A1NOC_CFG, SM8150_SLAVE_AOSS, SM8150_SLAVE_PRNG, SM8150_SLAVE_VSENSE_CTRL_CFG, SM8150_SLAVE_QSPI, SM8150_SLAVE_USB3, SM8150_SLAVE_SPDM_WRAPPER, SM8150_SLAVE_CRYPTO_0_CFG, SM8150_SLAVE_PIMEM_CFG, SM8150_SLAVE_TLMM_NORTH, SM8150_SLAVE_RBCPR_MX_CFG, SM8150_SLAVE_IMEM_CFG); -DEFINE_QNODE(xm_qdss_dap, SM8150_MASTER_QDSS_DAP, 1, 8, SM8150_SLAVE_TLMM_SOUTH, SM8150_SLAVE_CDSP_CFG, SM8150_SLAVE_SPSS_CFG, SM8150_SLAVE_CAMERA_CFG, SM8150_SLAVE_SDCC_4, SM8150_SLAVE_SDCC_2, SM8150_SLAVE_CNOC_MNOC_CFG, SM8150_SLAVE_EMAC_CFG, SM8150_SLAVE_UFS_MEM_CFG, SM8150_SLAVE_TLMM_EAST, SM8150_SLAVE_SSC_CFG, SM8150_SLAVE_SNOC_CFG, SM8150_SLAVE_NORTH_PHY_CFG, SM8150_SLAVE_QUP_0, SM8150_SLAVE_GLM, SM8150_SLAVE_PCIE_1_CFG, SM8150_SLAVE_A2NOC_CFG, SM8150_SLAVE_QDSS_CFG, SM8150_SLAVE_DISPLAY_CFG, SM8150_SLAVE_TCSR, SM8150_SLAVE_CNOC_DDRSS, SM8150_SLAVE_CNOC_A2NOC, SM8150_SLAVE_RBCPR_MMCX_CFG, SM8150_SLAVE_NPU_CFG, SM8150_SLAVE_PCIE_0_CFG, SM8150_SLAVE_GRAPHICS_3D_CFG, SM8150_SLAVE_VENUS_CFG, SM8150_SLAVE_TSIF, SM8150_SLAVE_IPA_CFG, SM8150_SLAVE_CLK_CTL, SM8150_SLAVE_AOP, SM8150_SLAVE_QUP_1, SM8150_SLAVE_AHB2PHY_SOUTH, SM8150_SLAVE_USB3_1, SM8150_SLAVE_SERVICE_CNOC, SM8150_SLAVE_UFS_CARD_CFG, SM8150_SLAVE_QUP_2, SM8150_SLAVE_RBCPR_CX_CFG, SM8150_SLAVE_TLMM_WEST, SM8150_SLAVE_A1NOC_CFG, SM8150_SLAVE_AOSS, SM8150_SLAVE_PRNG, SM8150_SLAVE_VSENSE_CTRL_CFG, SM8150_SLAVE_QSPI, SM8150_SLAVE_USB3, SM8150_SLAVE_SPDM_WRAPPER, SM8150_SLAVE_CRYPTO_0_CFG, SM8150_SLAVE_PIMEM_CFG, SM8150_SLAVE_TLMM_NORTH, SM8150_SLAVE_RBCPR_MX_CFG, SM8150_SLAVE_IMEM_CFG); -DEFINE_QNODE(qhm_cnoc_dc_noc, SM8150_MASTER_CNOC_DC_NOC, 1, 4, SM8150_SLAVE_GEM_NOC_CFG, SM8150_SLAVE_LLCC_CFG); -DEFINE_QNODE(acm_apps, SM8150_MASTER_AMPSS_M0, 2, 32, SM8150_SLAVE_ECC, SM8150_SLAVE_LLCC, SM8150_SLAVE_GEM_NOC_SNOC); -DEFINE_QNODE(acm_gpu_tcu, SM8150_MASTER_GPU_TCU, 1, 8, SM8150_SLAVE_LLCC, SM8150_SLAVE_GEM_NOC_SNOC); -DEFINE_QNODE(acm_sys_tcu, SM8150_MASTER_SYS_TCU, 1, 8, SM8150_SLAVE_LLCC, SM8150_SLAVE_GEM_NOC_SNOC); -DEFINE_QNODE(qhm_gemnoc_cfg, SM8150_MASTER_GEM_NOC_CFG, 1, 4, SM8150_SLAVE_SERVICE_GEM_NOC, SM8150_SLAVE_MSS_PROC_MS_MPU_CFG); -DEFINE_QNODE(qnm_cmpnoc, SM8150_MASTER_COMPUTE_NOC, 2, 32, SM8150_SLAVE_ECC, SM8150_SLAVE_LLCC, SM8150_SLAVE_GEM_NOC_SNOC); -DEFINE_QNODE(qnm_gpu, SM8150_MASTER_GRAPHICS_3D, 2, 32, SM8150_SLAVE_LLCC, SM8150_SLAVE_GEM_NOC_SNOC); -DEFINE_QNODE(qnm_mnoc_hf, SM8150_MASTER_MNOC_HF_MEM_NOC, 2, 32, SM8150_SLAVE_LLCC); -DEFINE_QNODE(qnm_mnoc_sf, SM8150_MASTER_MNOC_SF_MEM_NOC, 1, 32, SM8150_SLAVE_LLCC, SM8150_SLAVE_GEM_NOC_SNOC); -DEFINE_QNODE(qnm_pcie, SM8150_MASTER_GEM_NOC_PCIE_SNOC, 1, 16, SM8150_SLAVE_LLCC, SM8150_SLAVE_GEM_NOC_SNOC); -DEFINE_QNODE(qnm_snoc_gc, SM8150_MASTER_SNOC_GC_MEM_NOC, 1, 8, SM8150_SLAVE_LLCC); -DEFINE_QNODE(qnm_snoc_sf, SM8150_MASTER_SNOC_SF_MEM_NOC, 1, 16, SM8150_SLAVE_LLCC); -DEFINE_QNODE(qxm_ecc, SM8150_MASTER_ECC, 2, 32, SM8150_SLAVE_LLCC); -DEFINE_QNODE(llcc_mc, SM8150_MASTER_LLCC, 4, 4, SM8150_SLAVE_EBI_CH0); -DEFINE_QNODE(qhm_mnoc_cfg, SM8150_MASTER_CNOC_MNOC_CFG, 1, 4, SM8150_SLAVE_SERVICE_MNOC); -DEFINE_QNODE(qxm_camnoc_hf0, SM8150_MASTER_CAMNOC_HF0, 1, 32, SM8150_SLAVE_MNOC_HF_MEM_NOC); -DEFINE_QNODE(qxm_camnoc_hf1, SM8150_MASTER_CAMNOC_HF1, 1, 32, SM8150_SLAVE_MNOC_HF_MEM_NOC); -DEFINE_QNODE(qxm_camnoc_sf, SM8150_MASTER_CAMNOC_SF, 1, 32, SM8150_SLAVE_MNOC_SF_MEM_NOC); -DEFINE_QNODE(qxm_mdp0, SM8150_MASTER_MDP_PORT0, 1, 32, SM8150_SLAVE_MNOC_HF_MEM_NOC); -DEFINE_QNODE(qxm_mdp1, SM8150_MASTER_MDP_PORT1, 1, 32, SM8150_SLAVE_MNOC_HF_MEM_NOC); -DEFINE_QNODE(qxm_rot, SM8150_MASTER_ROTATOR, 1, 32, SM8150_SLAVE_MNOC_SF_MEM_NOC); -DEFINE_QNODE(qxm_venus0, SM8150_MASTER_VIDEO_P0, 1, 32, SM8150_SLAVE_MNOC_SF_MEM_NOC); -DEFINE_QNODE(qxm_venus1, SM8150_MASTER_VIDEO_P1, 1, 32, SM8150_SLAVE_MNOC_SF_MEM_NOC); -DEFINE_QNODE(qxm_venus_arm9, SM8150_MASTER_VIDEO_PROC, 1, 8, SM8150_SLAVE_MNOC_SF_MEM_NOC); -DEFINE_QNODE(qhm_snoc_cfg, SM8150_MASTER_SNOC_CFG, 1, 4, SM8150_SLAVE_SERVICE_SNOC); -DEFINE_QNODE(qnm_aggre1_noc, SM8150_A1NOC_SNOC_MAS, 1, 16, SM8150_SLAVE_SNOC_GEM_NOC_SF, SM8150_SLAVE_PIMEM, SM8150_SLAVE_OCIMEM, SM8150_SLAVE_APPSS, SM8150_SNOC_CNOC_SLV, SM8150_SLAVE_QDSS_STM); -DEFINE_QNODE(qnm_aggre2_noc, SM8150_A2NOC_SNOC_MAS, 1, 16, SM8150_SLAVE_SNOC_GEM_NOC_SF, SM8150_SLAVE_PIMEM, SM8150_SLAVE_OCIMEM, SM8150_SLAVE_APPSS, SM8150_SNOC_CNOC_SLV, SM8150_SLAVE_PCIE_0, SM8150_SLAVE_PCIE_1, SM8150_SLAVE_TCU, SM8150_SLAVE_QDSS_STM); -DEFINE_QNODE(qnm_gemnoc, SM8150_MASTER_GEM_NOC_SNOC, 1, 8, SM8150_SLAVE_PIMEM, SM8150_SLAVE_OCIMEM, SM8150_SLAVE_APPSS, SM8150_SNOC_CNOC_SLV, SM8150_SLAVE_TCU, SM8150_SLAVE_QDSS_STM); -DEFINE_QNODE(qxm_pimem, SM8150_MASTER_PIMEM, 1, 8, SM8150_SLAVE_SNOC_GEM_NOC_GC, SM8150_SLAVE_OCIMEM); -DEFINE_QNODE(xm_gic, SM8150_MASTER_GIC, 1, 8, SM8150_SLAVE_SNOC_GEM_NOC_GC, SM8150_SLAVE_OCIMEM); -DEFINE_QNODE(qns_a1noc_snoc, SM8150_A1NOC_SNOC_SLV, 1, 16, SM8150_A1NOC_SNOC_MAS); -DEFINE_QNODE(srvc_aggre1_noc, SM8150_SLAVE_SERVICE_A1NOC, 1, 4); -DEFINE_QNODE(qns_a2noc_snoc, SM8150_A2NOC_SNOC_SLV, 1, 16, SM8150_A2NOC_SNOC_MAS); -DEFINE_QNODE(qns_pcie_mem_noc, SM8150_SLAVE_ANOC_PCIE_GEM_NOC, 1, 16, SM8150_MASTER_GEM_NOC_PCIE_SNOC); -DEFINE_QNODE(srvc_aggre2_noc, SM8150_SLAVE_SERVICE_A2NOC, 1, 4); -DEFINE_QNODE(qns_camnoc_uncomp, SM8150_SLAVE_CAMNOC_UNCOMP, 1, 32); -DEFINE_QNODE(qns_cdsp_mem_noc, SM8150_SLAVE_CDSP_MEM_NOC, 2, 32, SM8150_MASTER_COMPUTE_NOC); -DEFINE_QNODE(qhs_a1_noc_cfg, SM8150_SLAVE_A1NOC_CFG, 1, 4, SM8150_MASTER_A1NOC_CFG); -DEFINE_QNODE(qhs_a2_noc_cfg, SM8150_SLAVE_A2NOC_CFG, 1, 4, SM8150_MASTER_A2NOC_CFG); -DEFINE_QNODE(qhs_ahb2phy_south, SM8150_SLAVE_AHB2PHY_SOUTH, 1, 4); -DEFINE_QNODE(qhs_aop, SM8150_SLAVE_AOP, 1, 4); -DEFINE_QNODE(qhs_aoss, SM8150_SLAVE_AOSS, 1, 4); -DEFINE_QNODE(qhs_camera_cfg, SM8150_SLAVE_CAMERA_CFG, 1, 4); -DEFINE_QNODE(qhs_clk_ctl, SM8150_SLAVE_CLK_CTL, 1, 4); -DEFINE_QNODE(qhs_compute_dsp, SM8150_SLAVE_CDSP_CFG, 1, 4); -DEFINE_QNODE(qhs_cpr_cx, SM8150_SLAVE_RBCPR_CX_CFG, 1, 4); -DEFINE_QNODE(qhs_cpr_mmcx, SM8150_SLAVE_RBCPR_MMCX_CFG, 1, 4); -DEFINE_QNODE(qhs_cpr_mx, SM8150_SLAVE_RBCPR_MX_CFG, 1, 4); -DEFINE_QNODE(qhs_crypto0_cfg, SM8150_SLAVE_CRYPTO_0_CFG, 1, 4); -DEFINE_QNODE(qhs_ddrss_cfg, SM8150_SLAVE_CNOC_DDRSS, 1, 4, SM8150_MASTER_CNOC_DC_NOC); -DEFINE_QNODE(qhs_display_cfg, SM8150_SLAVE_DISPLAY_CFG, 1, 4); -DEFINE_QNODE(qhs_emac_cfg, SM8150_SLAVE_EMAC_CFG, 1, 4); -DEFINE_QNODE(qhs_glm, SM8150_SLAVE_GLM, 1, 4); -DEFINE_QNODE(qhs_gpuss_cfg, SM8150_SLAVE_GRAPHICS_3D_CFG, 1, 8); -DEFINE_QNODE(qhs_imem_cfg, SM8150_SLAVE_IMEM_CFG, 1, 4); -DEFINE_QNODE(qhs_ipa, SM8150_SLAVE_IPA_CFG, 1, 4); -DEFINE_QNODE(qhs_mnoc_cfg, SM8150_SLAVE_CNOC_MNOC_CFG, 1, 4, SM8150_MASTER_CNOC_MNOC_CFG); -DEFINE_QNODE(qhs_npu_cfg, SM8150_SLAVE_NPU_CFG, 1, 4); -DEFINE_QNODE(qhs_pcie0_cfg, SM8150_SLAVE_PCIE_0_CFG, 1, 4); -DEFINE_QNODE(qhs_pcie1_cfg, SM8150_SLAVE_PCIE_1_CFG, 1, 4); -DEFINE_QNODE(qhs_phy_refgen_north, SM8150_SLAVE_NORTH_PHY_CFG, 1, 4); -DEFINE_QNODE(qhs_pimem_cfg, SM8150_SLAVE_PIMEM_CFG, 1, 4); -DEFINE_QNODE(qhs_prng, SM8150_SLAVE_PRNG, 1, 4); -DEFINE_QNODE(qhs_qdss_cfg, SM8150_SLAVE_QDSS_CFG, 1, 4); -DEFINE_QNODE(qhs_qspi, SM8150_SLAVE_QSPI, 1, 4); -DEFINE_QNODE(qhs_qupv3_east, SM8150_SLAVE_QUP_2, 1, 4); -DEFINE_QNODE(qhs_qupv3_north, SM8150_SLAVE_QUP_1, 1, 4); -DEFINE_QNODE(qhs_qupv3_south, SM8150_SLAVE_QUP_0, 1, 4); -DEFINE_QNODE(qhs_sdc2, SM8150_SLAVE_SDCC_2, 1, 4); -DEFINE_QNODE(qhs_sdc4, SM8150_SLAVE_SDCC_4, 1, 4); -DEFINE_QNODE(qhs_snoc_cfg, SM8150_SLAVE_SNOC_CFG, 1, 4, SM8150_MASTER_SNOC_CFG); -DEFINE_QNODE(qhs_spdm, SM8150_SLAVE_SPDM_WRAPPER, 1, 4); -DEFINE_QNODE(qhs_spss_cfg, SM8150_SLAVE_SPSS_CFG, 1, 4); -DEFINE_QNODE(qhs_ssc_cfg, SM8150_SLAVE_SSC_CFG, 1, 4); -DEFINE_QNODE(qhs_tcsr, SM8150_SLAVE_TCSR, 1, 4); -DEFINE_QNODE(qhs_tlmm_east, SM8150_SLAVE_TLMM_EAST, 1, 4); -DEFINE_QNODE(qhs_tlmm_north, SM8150_SLAVE_TLMM_NORTH, 1, 4); -DEFINE_QNODE(qhs_tlmm_south, SM8150_SLAVE_TLMM_SOUTH, 1, 4); -DEFINE_QNODE(qhs_tlmm_west, SM8150_SLAVE_TLMM_WEST, 1, 4); -DEFINE_QNODE(qhs_tsif, SM8150_SLAVE_TSIF, 1, 4); -DEFINE_QNODE(qhs_ufs_card_cfg, SM8150_SLAVE_UFS_CARD_CFG, 1, 4); -DEFINE_QNODE(qhs_ufs_mem_cfg, SM8150_SLAVE_UFS_MEM_CFG, 1, 4); -DEFINE_QNODE(qhs_usb3_0, SM8150_SLAVE_USB3, 1, 4); -DEFINE_QNODE(qhs_usb3_1, SM8150_SLAVE_USB3_1, 1, 4); -DEFINE_QNODE(qhs_venus_cfg, SM8150_SLAVE_VENUS_CFG, 1, 4); -DEFINE_QNODE(qhs_vsense_ctrl_cfg, SM8150_SLAVE_VSENSE_CTRL_CFG, 1, 4); -DEFINE_QNODE(qns_cnoc_a2noc, SM8150_SLAVE_CNOC_A2NOC, 1, 8, SM8150_MASTER_CNOC_A2NOC); -DEFINE_QNODE(srvc_cnoc, SM8150_SLAVE_SERVICE_CNOC, 1, 4); -DEFINE_QNODE(qhs_llcc, SM8150_SLAVE_LLCC_CFG, 1, 4); -DEFINE_QNODE(qhs_memnoc, SM8150_SLAVE_GEM_NOC_CFG, 1, 4, SM8150_MASTER_GEM_NOC_CFG); -DEFINE_QNODE(qhs_mdsp_ms_mpu_cfg, SM8150_SLAVE_MSS_PROC_MS_MPU_CFG, 1, 4); -DEFINE_QNODE(qns_ecc, SM8150_SLAVE_ECC, 1, 32); -DEFINE_QNODE(qns_gem_noc_snoc, SM8150_SLAVE_GEM_NOC_SNOC, 1, 8, SM8150_MASTER_GEM_NOC_SNOC); -DEFINE_QNODE(qns_llcc, SM8150_SLAVE_LLCC, 4, 16, SM8150_MASTER_LLCC); -DEFINE_QNODE(srvc_gemnoc, SM8150_SLAVE_SERVICE_GEM_NOC, 1, 4); -DEFINE_QNODE(ebi, SM8150_SLAVE_EBI_CH0, 4, 4); -DEFINE_QNODE(qns2_mem_noc, SM8150_SLAVE_MNOC_SF_MEM_NOC, 1, 32, SM8150_MASTER_MNOC_SF_MEM_NOC); -DEFINE_QNODE(qns_mem_noc_hf, SM8150_SLAVE_MNOC_HF_MEM_NOC, 2, 32, SM8150_MASTER_MNOC_HF_MEM_NOC); -DEFINE_QNODE(srvc_mnoc, SM8150_SLAVE_SERVICE_MNOC, 1, 4); -DEFINE_QNODE(qhs_apss, SM8150_SLAVE_APPSS, 1, 8); -DEFINE_QNODE(qns_cnoc, SM8150_SNOC_CNOC_SLV, 1, 8, SM8150_SNOC_CNOC_MAS); -DEFINE_QNODE(qns_gemnoc_gc, SM8150_SLAVE_SNOC_GEM_NOC_GC, 1, 8, SM8150_MASTER_SNOC_GC_MEM_NOC); -DEFINE_QNODE(qns_gemnoc_sf, SM8150_SLAVE_SNOC_GEM_NOC_SF, 1, 16, SM8150_MASTER_SNOC_SF_MEM_NOC); -DEFINE_QNODE(qxs_imem, SM8150_SLAVE_OCIMEM, 1, 8); -DEFINE_QNODE(qxs_pimem, SM8150_SLAVE_PIMEM, 1, 8); -DEFINE_QNODE(srvc_snoc, SM8150_SLAVE_SERVICE_SNOC, 1, 4); -DEFINE_QNODE(xs_pcie_0, SM8150_SLAVE_PCIE_0, 1, 8); -DEFINE_QNODE(xs_pcie_1, SM8150_SLAVE_PCIE_1, 1, 8); -DEFINE_QNODE(xs_qdss_stm, SM8150_SLAVE_QDSS_STM, 1, 4); -DEFINE_QNODE(xs_sys_tcu_cfg, SM8150_SLAVE_TCU, 1, 8); +static struct qcom_icc_node qhm_a1noc_cfg = { + .name = "qhm_a1noc_cfg", + .id = SM8150_MASTER_A1NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8150_SLAVE_SERVICE_A1NOC }, +}; -DEFINE_QBCM(bcm_acv, "ACV", false, &ebi); -DEFINE_QBCM(bcm_mc0, "MC0", true, &ebi); -DEFINE_QBCM(bcm_sh0, "SH0", true, &qns_llcc); -DEFINE_QBCM(bcm_mm0, "MM0", true, &qns_mem_noc_hf); -DEFINE_QBCM(bcm_mm1, "MM1", false, &qxm_camnoc_hf0_uncomp, &qxm_camnoc_hf1_uncomp, &qxm_camnoc_sf_uncomp, &qxm_camnoc_hf0, &qxm_camnoc_hf1, &qxm_mdp0, &qxm_mdp1); -DEFINE_QBCM(bcm_sh2, "SH2", false, &qns_gem_noc_snoc); -DEFINE_QBCM(bcm_mm2, "MM2", false, &qxm_camnoc_sf, &qns2_mem_noc); -DEFINE_QBCM(bcm_sh3, "SH3", false, &acm_gpu_tcu, &acm_sys_tcu); -DEFINE_QBCM(bcm_mm3, "MM3", false, &qxm_rot, &qxm_venus0, &qxm_venus1, &qxm_venus_arm9); -DEFINE_QBCM(bcm_sh4, "SH4", false, &qnm_cmpnoc); -DEFINE_QBCM(bcm_sh5, "SH5", false, &acm_apps); -DEFINE_QBCM(bcm_sn0, "SN0", true, &qns_gemnoc_sf); -DEFINE_QBCM(bcm_co0, "CO0", false, &qns_cdsp_mem_noc); -DEFINE_QBCM(bcm_ce0, "CE0", false, &qxm_crypto); -DEFINE_QBCM(bcm_sn1, "SN1", false, &qxs_imem); -DEFINE_QBCM(bcm_co1, "CO1", false, &qnm_npu); -DEFINE_QBCM(bcm_cn0, "CN0", true, &qhm_spdm, &qnm_snoc, &qhs_a1_noc_cfg, &qhs_a2_noc_cfg, &qhs_ahb2phy_south, &qhs_aop, &qhs_aoss, &qhs_camera_cfg, &qhs_clk_ctl, &qhs_compute_dsp, &qhs_cpr_cx, &qhs_cpr_mmcx, &qhs_cpr_mx, &qhs_crypto0_cfg, &qhs_ddrss_cfg, &qhs_display_cfg, &qhs_emac_cfg, &qhs_glm, &qhs_gpuss_cfg, &qhs_imem_cfg, &qhs_ipa, &qhs_mnoc_cfg, &qhs_npu_cfg, &qhs_pcie0_cfg, &qhs_pcie1_cfg, &qhs_phy_refgen_north, &qhs_pimem_cfg, &qhs_prng, &qhs_qdss_cfg, &qhs_qspi, &qhs_qupv3_east, &qhs_qupv3_north, &qhs_qupv3_south, &qhs_sdc2, &qhs_sdc4, &qhs_snoc_cfg, &qhs_spdm, &qhs_spss_cfg, &qhs_ssc_cfg, &qhs_tcsr, &qhs_tlmm_east, &qhs_tlmm_north, &qhs_tlmm_south, &qhs_tlmm_west, &qhs_tsif, &qhs_ufs_card_cfg, &qhs_ufs_mem_cfg, &qhs_usb3_0, &qhs_usb3_1, &qhs_venus_cfg, &qhs_vsense_ctrl_cfg, &qns_cnoc_a2noc, &srvc_cnoc); -DEFINE_QBCM(bcm_qup0, "QUP0", false, &qhm_qup0, &qhm_qup1, &qhm_qup2); -DEFINE_QBCM(bcm_sn2, "SN2", false, &qns_gemnoc_gc); -DEFINE_QBCM(bcm_sn3, "SN3", false, &srvc_aggre1_noc, &srvc_aggre2_noc, &qns_cnoc); -DEFINE_QBCM(bcm_sn4, "SN4", false, &qxs_pimem); -DEFINE_QBCM(bcm_sn5, "SN5", false, &xs_qdss_stm); -DEFINE_QBCM(bcm_sn8, "SN8", false, &xs_pcie_0, &xs_pcie_1); -DEFINE_QBCM(bcm_sn9, "SN9", false, &qnm_aggre1_noc); -DEFINE_QBCM(bcm_sn11, "SN11", false, &qnm_aggre2_noc); -DEFINE_QBCM(bcm_sn12, "SN12", false, &qxm_pimem, &xm_gic); -DEFINE_QBCM(bcm_sn14, "SN14", false, &qns_pcie_mem_noc); -DEFINE_QBCM(bcm_sn15, "SN15", false, &qnm_gemnoc); +static struct qcom_icc_node qhm_qup0 = { + .name = "qhm_qup0", + .id = SM8150_MASTER_QUP_0, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8150_A1NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node xm_emac = { + .name = "xm_emac", + .id = SM8150_MASTER_EMAC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8150_A1NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node xm_ufs_mem = { + .name = "xm_ufs_mem", + .id = SM8150_MASTER_UFS_MEM, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8150_A1NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node xm_usb3_0 = { + .name = "xm_usb3_0", + .id = SM8150_MASTER_USB3, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8150_A1NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node xm_usb3_1 = { + .name = "xm_usb3_1", + .id = SM8150_MASTER_USB3_1, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8150_A1NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node qhm_a2noc_cfg = { + .name = "qhm_a2noc_cfg", + .id = SM8150_MASTER_A2NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8150_SLAVE_SERVICE_A2NOC }, +}; + +static struct qcom_icc_node qhm_qdss_bam = { + .name = "qhm_qdss_bam", + .id = SM8150_MASTER_QDSS_BAM, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8150_A2NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node qhm_qspi = { + .name = "qhm_qspi", + .id = SM8150_MASTER_QSPI, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8150_A2NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node qhm_qup1 = { + .name = "qhm_qup1", + .id = SM8150_MASTER_QUP_1, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8150_A2NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node qhm_qup2 = { + .name = "qhm_qup2", + .id = SM8150_MASTER_QUP_2, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8150_A2NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node qhm_sensorss_ahb = { + .name = "qhm_sensorss_ahb", + .id = SM8150_MASTER_SENSORS_AHB, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8150_A2NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node qhm_tsif = { + .name = "qhm_tsif", + .id = SM8150_MASTER_TSIF, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8150_A2NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node qnm_cnoc = { + .name = "qnm_cnoc", + .id = SM8150_MASTER_CNOC_A2NOC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8150_A2NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node qxm_crypto = { + .name = "qxm_crypto", + .id = SM8150_MASTER_CRYPTO_CORE_0, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8150_A2NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node qxm_ipa = { + .name = "qxm_ipa", + .id = SM8150_MASTER_IPA, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8150_A2NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node xm_pcie3_0 = { + .name = "xm_pcie3_0", + .id = SM8150_MASTER_PCIE, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8150_SLAVE_ANOC_PCIE_GEM_NOC }, +}; + +static struct qcom_icc_node xm_pcie3_1 = { + .name = "xm_pcie3_1", + .id = SM8150_MASTER_PCIE_1, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8150_SLAVE_ANOC_PCIE_GEM_NOC }, +}; + +static struct qcom_icc_node xm_qdss_etr = { + .name = "xm_qdss_etr", + .id = SM8150_MASTER_QDSS_ETR, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8150_A2NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node xm_sdc2 = { + .name = "xm_sdc2", + .id = SM8150_MASTER_SDCC_2, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8150_A2NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node xm_sdc4 = { + .name = "xm_sdc4", + .id = SM8150_MASTER_SDCC_4, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8150_A2NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node qxm_camnoc_hf0_uncomp = { + .name = "qxm_camnoc_hf0_uncomp", + .id = SM8150_MASTER_CAMNOC_HF0_UNCOMP, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SM8150_SLAVE_CAMNOC_UNCOMP }, +}; + +static struct qcom_icc_node qxm_camnoc_hf1_uncomp = { + .name = "qxm_camnoc_hf1_uncomp", + .id = SM8150_MASTER_CAMNOC_HF1_UNCOMP, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SM8150_SLAVE_CAMNOC_UNCOMP }, +}; + +static struct qcom_icc_node qxm_camnoc_sf_uncomp = { + .name = "qxm_camnoc_sf_uncomp", + .id = SM8150_MASTER_CAMNOC_SF_UNCOMP, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SM8150_SLAVE_CAMNOC_UNCOMP }, +}; + +static struct qcom_icc_node qnm_npu = { + .name = "qnm_npu", + .id = SM8150_MASTER_NPU, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SM8150_SLAVE_CDSP_MEM_NOC }, +}; + +static struct qcom_icc_node qhm_spdm = { + .name = "qhm_spdm", + .id = SM8150_MASTER_SPDM, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8150_SLAVE_CNOC_A2NOC }, +}; + +static struct qcom_icc_node qnm_snoc = { + .name = "qnm_snoc", + .id = SM8150_SNOC_CNOC_MAS, + .channels = 1, + .buswidth = 8, + .num_links = 50, + .links = { SM8150_SLAVE_TLMM_SOUTH, + SM8150_SLAVE_CDSP_CFG, + SM8150_SLAVE_SPSS_CFG, + SM8150_SLAVE_CAMERA_CFG, + SM8150_SLAVE_SDCC_4, + SM8150_SLAVE_SDCC_2, + SM8150_SLAVE_CNOC_MNOC_CFG, + SM8150_SLAVE_EMAC_CFG, + SM8150_SLAVE_UFS_MEM_CFG, + SM8150_SLAVE_TLMM_EAST, + SM8150_SLAVE_SSC_CFG, + SM8150_SLAVE_SNOC_CFG, + SM8150_SLAVE_NORTH_PHY_CFG, + SM8150_SLAVE_QUP_0, + SM8150_SLAVE_GLM, + SM8150_SLAVE_PCIE_1_CFG, + SM8150_SLAVE_A2NOC_CFG, + SM8150_SLAVE_QDSS_CFG, + SM8150_SLAVE_DISPLAY_CFG, + SM8150_SLAVE_TCSR, + SM8150_SLAVE_CNOC_DDRSS, + SM8150_SLAVE_RBCPR_MMCX_CFG, + SM8150_SLAVE_NPU_CFG, + SM8150_SLAVE_PCIE_0_CFG, + SM8150_SLAVE_GRAPHICS_3D_CFG, + SM8150_SLAVE_VENUS_CFG, + SM8150_SLAVE_TSIF, + SM8150_SLAVE_IPA_CFG, + SM8150_SLAVE_CLK_CTL, + SM8150_SLAVE_AOP, + SM8150_SLAVE_QUP_1, + SM8150_SLAVE_AHB2PHY_SOUTH, + SM8150_SLAVE_USB3_1, + SM8150_SLAVE_SERVICE_CNOC, + SM8150_SLAVE_UFS_CARD_CFG, + SM8150_SLAVE_QUP_2, + SM8150_SLAVE_RBCPR_CX_CFG, + SM8150_SLAVE_TLMM_WEST, + SM8150_SLAVE_A1NOC_CFG, + SM8150_SLAVE_AOSS, + SM8150_SLAVE_PRNG, + SM8150_SLAVE_VSENSE_CTRL_CFG, + SM8150_SLAVE_QSPI, + SM8150_SLAVE_USB3, + SM8150_SLAVE_SPDM_WRAPPER, + SM8150_SLAVE_CRYPTO_0_CFG, + SM8150_SLAVE_PIMEM_CFG, + SM8150_SLAVE_TLMM_NORTH, + SM8150_SLAVE_RBCPR_MX_CFG, + SM8150_SLAVE_IMEM_CFG + }, +}; + +static struct qcom_icc_node xm_qdss_dap = { + .name = "xm_qdss_dap", + .id = SM8150_MASTER_QDSS_DAP, + .channels = 1, + .buswidth = 8, + .num_links = 51, + .links = { SM8150_SLAVE_TLMM_SOUTH, + SM8150_SLAVE_CDSP_CFG, + SM8150_SLAVE_SPSS_CFG, + SM8150_SLAVE_CAMERA_CFG, + SM8150_SLAVE_SDCC_4, + SM8150_SLAVE_SDCC_2, + SM8150_SLAVE_CNOC_MNOC_CFG, + SM8150_SLAVE_EMAC_CFG, + SM8150_SLAVE_UFS_MEM_CFG, + SM8150_SLAVE_TLMM_EAST, + SM8150_SLAVE_SSC_CFG, + SM8150_SLAVE_SNOC_CFG, + SM8150_SLAVE_NORTH_PHY_CFG, + SM8150_SLAVE_QUP_0, + SM8150_SLAVE_GLM, + SM8150_SLAVE_PCIE_1_CFG, + SM8150_SLAVE_A2NOC_CFG, + SM8150_SLAVE_QDSS_CFG, + SM8150_SLAVE_DISPLAY_CFG, + SM8150_SLAVE_TCSR, + SM8150_SLAVE_CNOC_DDRSS, + SM8150_SLAVE_CNOC_A2NOC, + SM8150_SLAVE_RBCPR_MMCX_CFG, + SM8150_SLAVE_NPU_CFG, + SM8150_SLAVE_PCIE_0_CFG, + SM8150_SLAVE_GRAPHICS_3D_CFG, + SM8150_SLAVE_VENUS_CFG, + SM8150_SLAVE_TSIF, + SM8150_SLAVE_IPA_CFG, + SM8150_SLAVE_CLK_CTL, + SM8150_SLAVE_AOP, + SM8150_SLAVE_QUP_1, + SM8150_SLAVE_AHB2PHY_SOUTH, + SM8150_SLAVE_USB3_1, + SM8150_SLAVE_SERVICE_CNOC, + SM8150_SLAVE_UFS_CARD_CFG, + SM8150_SLAVE_QUP_2, + SM8150_SLAVE_RBCPR_CX_CFG, + SM8150_SLAVE_TLMM_WEST, + SM8150_SLAVE_A1NOC_CFG, + SM8150_SLAVE_AOSS, + SM8150_SLAVE_PRNG, + SM8150_SLAVE_VSENSE_CTRL_CFG, + SM8150_SLAVE_QSPI, + SM8150_SLAVE_USB3, + SM8150_SLAVE_SPDM_WRAPPER, + SM8150_SLAVE_CRYPTO_0_CFG, + SM8150_SLAVE_PIMEM_CFG, + SM8150_SLAVE_TLMM_NORTH, + SM8150_SLAVE_RBCPR_MX_CFG, + SM8150_SLAVE_IMEM_CFG + }, +}; + +static struct qcom_icc_node qhm_cnoc_dc_noc = { + .name = "qhm_cnoc_dc_noc", + .id = SM8150_MASTER_CNOC_DC_NOC, + .channels = 1, + .buswidth = 4, + .num_links = 2, + .links = { SM8150_SLAVE_GEM_NOC_CFG, + SM8150_SLAVE_LLCC_CFG + }, +}; + +static struct qcom_icc_node acm_apps = { + .name = "acm_apps", + .id = SM8150_MASTER_AMPSS_M0, + .channels = 2, + .buswidth = 32, + .num_links = 3, + .links = { SM8150_SLAVE_ECC, + SM8150_SLAVE_LLCC, + SM8150_SLAVE_GEM_NOC_SNOC + }, +}; + +static struct qcom_icc_node acm_gpu_tcu = { + .name = "acm_gpu_tcu", + .id = SM8150_MASTER_GPU_TCU, + .channels = 1, + .buswidth = 8, + .num_links = 2, + .links = { SM8150_SLAVE_LLCC, + SM8150_SLAVE_GEM_NOC_SNOC + }, +}; + +static struct qcom_icc_node acm_sys_tcu = { + .name = "acm_sys_tcu", + .id = SM8150_MASTER_SYS_TCU, + .channels = 1, + .buswidth = 8, + .num_links = 2, + .links = { SM8150_SLAVE_LLCC, + SM8150_SLAVE_GEM_NOC_SNOC + }, +}; + +static struct qcom_icc_node qhm_gemnoc_cfg = { + .name = "qhm_gemnoc_cfg", + .id = SM8150_MASTER_GEM_NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 2, + .links = { SM8150_SLAVE_SERVICE_GEM_NOC, + SM8150_SLAVE_MSS_PROC_MS_MPU_CFG + }, +}; + +static struct qcom_icc_node qnm_cmpnoc = { + .name = "qnm_cmpnoc", + .id = SM8150_MASTER_COMPUTE_NOC, + .channels = 2, + .buswidth = 32, + .num_links = 3, + .links = { SM8150_SLAVE_ECC, + SM8150_SLAVE_LLCC, + SM8150_SLAVE_GEM_NOC_SNOC + }, +}; + +static struct qcom_icc_node qnm_gpu = { + .name = "qnm_gpu", + .id = SM8150_MASTER_GRAPHICS_3D, + .channels = 2, + .buswidth = 32, + .num_links = 2, + .links = { SM8150_SLAVE_LLCC, + SM8150_SLAVE_GEM_NOC_SNOC + }, +}; + +static struct qcom_icc_node qnm_mnoc_hf = { + .name = "qnm_mnoc_hf", + .id = SM8150_MASTER_MNOC_HF_MEM_NOC, + .channels = 2, + .buswidth = 32, + .num_links = 1, + .links = { SM8150_SLAVE_LLCC }, +}; + +static struct qcom_icc_node qnm_mnoc_sf = { + .name = "qnm_mnoc_sf", + .id = SM8150_MASTER_MNOC_SF_MEM_NOC, + .channels = 1, + .buswidth = 32, + .num_links = 2, + .links = { SM8150_SLAVE_LLCC, + SM8150_SLAVE_GEM_NOC_SNOC + }, +}; + +static struct qcom_icc_node qnm_pcie = { + .name = "qnm_pcie", + .id = SM8150_MASTER_GEM_NOC_PCIE_SNOC, + .channels = 1, + .buswidth = 16, + .num_links = 2, + .links = { SM8150_SLAVE_LLCC, + SM8150_SLAVE_GEM_NOC_SNOC + }, +}; + +static struct qcom_icc_node qnm_snoc_gc = { + .name = "qnm_snoc_gc", + .id = SM8150_MASTER_SNOC_GC_MEM_NOC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8150_SLAVE_LLCC }, +}; + +static struct qcom_icc_node qnm_snoc_sf = { + .name = "qnm_snoc_sf", + .id = SM8150_MASTER_SNOC_SF_MEM_NOC, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SM8150_SLAVE_LLCC }, +}; + +static struct qcom_icc_node qxm_ecc = { + .name = "qxm_ecc", + .id = SM8150_MASTER_ECC, + .channels = 2, + .buswidth = 32, + .num_links = 1, + .links = { SM8150_SLAVE_LLCC }, +}; + +static struct qcom_icc_node llcc_mc = { + .name = "llcc_mc", + .id = SM8150_MASTER_LLCC, + .channels = 4, + .buswidth = 4, + .num_links = 1, + .links = { SM8150_SLAVE_EBI_CH0 }, +}; + +static struct qcom_icc_node qhm_mnoc_cfg = { + .name = "qhm_mnoc_cfg", + .id = SM8150_MASTER_CNOC_MNOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8150_SLAVE_SERVICE_MNOC }, +}; + +static struct qcom_icc_node qxm_camnoc_hf0 = { + .name = "qxm_camnoc_hf0", + .id = SM8150_MASTER_CAMNOC_HF0, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SM8150_SLAVE_MNOC_HF_MEM_NOC }, +}; + +static struct qcom_icc_node qxm_camnoc_hf1 = { + .name = "qxm_camnoc_hf1", + .id = SM8150_MASTER_CAMNOC_HF1, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SM8150_SLAVE_MNOC_HF_MEM_NOC }, +}; + +static struct qcom_icc_node qxm_camnoc_sf = { + .name = "qxm_camnoc_sf", + .id = SM8150_MASTER_CAMNOC_SF, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SM8150_SLAVE_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qxm_mdp0 = { + .name = "qxm_mdp0", + .id = SM8150_MASTER_MDP_PORT0, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SM8150_SLAVE_MNOC_HF_MEM_NOC }, +}; + +static struct qcom_icc_node qxm_mdp1 = { + .name = "qxm_mdp1", + .id = SM8150_MASTER_MDP_PORT1, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SM8150_SLAVE_MNOC_HF_MEM_NOC }, +}; + +static struct qcom_icc_node qxm_rot = { + .name = "qxm_rot", + .id = SM8150_MASTER_ROTATOR, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SM8150_SLAVE_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qxm_venus0 = { + .name = "qxm_venus0", + .id = SM8150_MASTER_VIDEO_P0, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SM8150_SLAVE_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qxm_venus1 = { + .name = "qxm_venus1", + .id = SM8150_MASTER_VIDEO_P1, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SM8150_SLAVE_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qxm_venus_arm9 = { + .name = "qxm_venus_arm9", + .id = SM8150_MASTER_VIDEO_PROC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8150_SLAVE_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qhm_snoc_cfg = { + .name = "qhm_snoc_cfg", + .id = SM8150_MASTER_SNOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8150_SLAVE_SERVICE_SNOC }, +}; + +static struct qcom_icc_node qnm_aggre1_noc = { + .name = "qnm_aggre1_noc", + .id = SM8150_A1NOC_SNOC_MAS, + .channels = 1, + .buswidth = 16, + .num_links = 6, + .links = { SM8150_SLAVE_SNOC_GEM_NOC_SF, + SM8150_SLAVE_PIMEM, + SM8150_SLAVE_OCIMEM, + SM8150_SLAVE_APPSS, + SM8150_SNOC_CNOC_SLV, + SM8150_SLAVE_QDSS_STM + }, +}; + +static struct qcom_icc_node qnm_aggre2_noc = { + .name = "qnm_aggre2_noc", + .id = SM8150_A2NOC_SNOC_MAS, + .channels = 1, + .buswidth = 16, + .num_links = 9, + .links = { SM8150_SLAVE_SNOC_GEM_NOC_SF, + SM8150_SLAVE_PIMEM, + SM8150_SLAVE_OCIMEM, + SM8150_SLAVE_APPSS, + SM8150_SNOC_CNOC_SLV, + SM8150_SLAVE_PCIE_0, + SM8150_SLAVE_PCIE_1, + SM8150_SLAVE_TCU, + SM8150_SLAVE_QDSS_STM + }, +}; + +static struct qcom_icc_node qnm_gemnoc = { + .name = "qnm_gemnoc", + .id = SM8150_MASTER_GEM_NOC_SNOC, + .channels = 1, + .buswidth = 8, + .num_links = 6, + .links = { SM8150_SLAVE_PIMEM, + SM8150_SLAVE_OCIMEM, + SM8150_SLAVE_APPSS, + SM8150_SNOC_CNOC_SLV, + SM8150_SLAVE_TCU, + SM8150_SLAVE_QDSS_STM + }, +}; + +static struct qcom_icc_node qxm_pimem = { + .name = "qxm_pimem", + .id = SM8150_MASTER_PIMEM, + .channels = 1, + .buswidth = 8, + .num_links = 2, + .links = { SM8150_SLAVE_SNOC_GEM_NOC_GC, + SM8150_SLAVE_OCIMEM + }, +}; + +static struct qcom_icc_node xm_gic = { + .name = "xm_gic", + .id = SM8150_MASTER_GIC, + .channels = 1, + .buswidth = 8, + .num_links = 2, + .links = { SM8150_SLAVE_SNOC_GEM_NOC_GC, + SM8150_SLAVE_OCIMEM + }, +}; + +static struct qcom_icc_node qns_a1noc_snoc = { + .name = "qns_a1noc_snoc", + .id = SM8150_A1NOC_SNOC_SLV, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SM8150_A1NOC_SNOC_MAS }, +}; + +static struct qcom_icc_node srvc_aggre1_noc = { + .name = "srvc_aggre1_noc", + .id = SM8150_SLAVE_SERVICE_A1NOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_a2noc_snoc = { + .name = "qns_a2noc_snoc", + .id = SM8150_A2NOC_SNOC_SLV, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SM8150_A2NOC_SNOC_MAS }, +}; + +static struct qcom_icc_node qns_pcie_mem_noc = { + .name = "qns_pcie_mem_noc", + .id = SM8150_SLAVE_ANOC_PCIE_GEM_NOC, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SM8150_MASTER_GEM_NOC_PCIE_SNOC }, +}; + +static struct qcom_icc_node srvc_aggre2_noc = { + .name = "srvc_aggre2_noc", + .id = SM8150_SLAVE_SERVICE_A2NOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_camnoc_uncomp = { + .name = "qns_camnoc_uncomp", + .id = SM8150_SLAVE_CAMNOC_UNCOMP, + .channels = 1, + .buswidth = 32, +}; + +static struct qcom_icc_node qns_cdsp_mem_noc = { + .name = "qns_cdsp_mem_noc", + .id = SM8150_SLAVE_CDSP_MEM_NOC, + .channels = 2, + .buswidth = 32, + .num_links = 1, + .links = { SM8150_MASTER_COMPUTE_NOC }, +}; + +static struct qcom_icc_node qhs_a1_noc_cfg = { + .name = "qhs_a1_noc_cfg", + .id = SM8150_SLAVE_A1NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8150_MASTER_A1NOC_CFG }, +}; + +static struct qcom_icc_node qhs_a2_noc_cfg = { + .name = "qhs_a2_noc_cfg", + .id = SM8150_SLAVE_A2NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8150_MASTER_A2NOC_CFG }, +}; + +static struct qcom_icc_node qhs_ahb2phy_south = { + .name = "qhs_ahb2phy_south", + .id = SM8150_SLAVE_AHB2PHY_SOUTH, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_aop = { + .name = "qhs_aop", + .id = SM8150_SLAVE_AOP, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_aoss = { + .name = "qhs_aoss", + .id = SM8150_SLAVE_AOSS, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_camera_cfg = { + .name = "qhs_camera_cfg", + .id = SM8150_SLAVE_CAMERA_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_clk_ctl = { + .name = "qhs_clk_ctl", + .id = SM8150_SLAVE_CLK_CTL, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_compute_dsp = { + .name = "qhs_compute_dsp", + .id = SM8150_SLAVE_CDSP_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_cpr_cx = { + .name = "qhs_cpr_cx", + .id = SM8150_SLAVE_RBCPR_CX_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_cpr_mmcx = { + .name = "qhs_cpr_mmcx", + .id = SM8150_SLAVE_RBCPR_MMCX_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_cpr_mx = { + .name = "qhs_cpr_mx", + .id = SM8150_SLAVE_RBCPR_MX_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_crypto0_cfg = { + .name = "qhs_crypto0_cfg", + .id = SM8150_SLAVE_CRYPTO_0_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_ddrss_cfg = { + .name = "qhs_ddrss_cfg", + .id = SM8150_SLAVE_CNOC_DDRSS, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8150_MASTER_CNOC_DC_NOC }, +}; + +static struct qcom_icc_node qhs_display_cfg = { + .name = "qhs_display_cfg", + .id = SM8150_SLAVE_DISPLAY_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_emac_cfg = { + .name = "qhs_emac_cfg", + .id = SM8150_SLAVE_EMAC_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_glm = { + .name = "qhs_glm", + .id = SM8150_SLAVE_GLM, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_gpuss_cfg = { + .name = "qhs_gpuss_cfg", + .id = SM8150_SLAVE_GRAPHICS_3D_CFG, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node qhs_imem_cfg = { + .name = "qhs_imem_cfg", + .id = SM8150_SLAVE_IMEM_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_ipa = { + .name = "qhs_ipa", + .id = SM8150_SLAVE_IPA_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_mnoc_cfg = { + .name = "qhs_mnoc_cfg", + .id = SM8150_SLAVE_CNOC_MNOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8150_MASTER_CNOC_MNOC_CFG }, +}; + +static struct qcom_icc_node qhs_npu_cfg = { + .name = "qhs_npu_cfg", + .id = SM8150_SLAVE_NPU_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_pcie0_cfg = { + .name = "qhs_pcie0_cfg", + .id = SM8150_SLAVE_PCIE_0_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_pcie1_cfg = { + .name = "qhs_pcie1_cfg", + .id = SM8150_SLAVE_PCIE_1_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_phy_refgen_north = { + .name = "qhs_phy_refgen_north", + .id = SM8150_SLAVE_NORTH_PHY_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_pimem_cfg = { + .name = "qhs_pimem_cfg", + .id = SM8150_SLAVE_PIMEM_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_prng = { + .name = "qhs_prng", + .id = SM8150_SLAVE_PRNG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_qdss_cfg = { + .name = "qhs_qdss_cfg", + .id = SM8150_SLAVE_QDSS_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_qspi = { + .name = "qhs_qspi", + .id = SM8150_SLAVE_QSPI, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_qupv3_east = { + .name = "qhs_qupv3_east", + .id = SM8150_SLAVE_QUP_2, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_qupv3_north = { + .name = "qhs_qupv3_north", + .id = SM8150_SLAVE_QUP_1, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_qupv3_south = { + .name = "qhs_qupv3_south", + .id = SM8150_SLAVE_QUP_0, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_sdc2 = { + .name = "qhs_sdc2", + .id = SM8150_SLAVE_SDCC_2, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_sdc4 = { + .name = "qhs_sdc4", + .id = SM8150_SLAVE_SDCC_4, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_snoc_cfg = { + .name = "qhs_snoc_cfg", + .id = SM8150_SLAVE_SNOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8150_MASTER_SNOC_CFG }, +}; + +static struct qcom_icc_node qhs_spdm = { + .name = "qhs_spdm", + .id = SM8150_SLAVE_SPDM_WRAPPER, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_spss_cfg = { + .name = "qhs_spss_cfg", + .id = SM8150_SLAVE_SPSS_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_ssc_cfg = { + .name = "qhs_ssc_cfg", + .id = SM8150_SLAVE_SSC_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_tcsr = { + .name = "qhs_tcsr", + .id = SM8150_SLAVE_TCSR, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_tlmm_east = { + .name = "qhs_tlmm_east", + .id = SM8150_SLAVE_TLMM_EAST, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_tlmm_north = { + .name = "qhs_tlmm_north", + .id = SM8150_SLAVE_TLMM_NORTH, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_tlmm_south = { + .name = "qhs_tlmm_south", + .id = SM8150_SLAVE_TLMM_SOUTH, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_tlmm_west = { + .name = "qhs_tlmm_west", + .id = SM8150_SLAVE_TLMM_WEST, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_tsif = { + .name = "qhs_tsif", + .id = SM8150_SLAVE_TSIF, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_ufs_card_cfg = { + .name = "qhs_ufs_card_cfg", + .id = SM8150_SLAVE_UFS_CARD_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_ufs_mem_cfg = { + .name = "qhs_ufs_mem_cfg", + .id = SM8150_SLAVE_UFS_MEM_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_usb3_0 = { + .name = "qhs_usb3_0", + .id = SM8150_SLAVE_USB3, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_usb3_1 = { + .name = "qhs_usb3_1", + .id = SM8150_SLAVE_USB3_1, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_venus_cfg = { + .name = "qhs_venus_cfg", + .id = SM8150_SLAVE_VENUS_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_vsense_ctrl_cfg = { + .name = "qhs_vsense_ctrl_cfg", + .id = SM8150_SLAVE_VSENSE_CTRL_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_cnoc_a2noc = { + .name = "qns_cnoc_a2noc", + .id = SM8150_SLAVE_CNOC_A2NOC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8150_MASTER_CNOC_A2NOC }, +}; + +static struct qcom_icc_node srvc_cnoc = { + .name = "srvc_cnoc", + .id = SM8150_SLAVE_SERVICE_CNOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_llcc = { + .name = "qhs_llcc", + .id = SM8150_SLAVE_LLCC_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_memnoc = { + .name = "qhs_memnoc", + .id = SM8150_SLAVE_GEM_NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8150_MASTER_GEM_NOC_CFG }, +}; + +static struct qcom_icc_node qhs_mdsp_ms_mpu_cfg = { + .name = "qhs_mdsp_ms_mpu_cfg", + .id = SM8150_SLAVE_MSS_PROC_MS_MPU_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_ecc = { + .name = "qns_ecc", + .id = SM8150_SLAVE_ECC, + .channels = 1, + .buswidth = 32, +}; + +static struct qcom_icc_node qns_gem_noc_snoc = { + .name = "qns_gem_noc_snoc", + .id = SM8150_SLAVE_GEM_NOC_SNOC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8150_MASTER_GEM_NOC_SNOC }, +}; + +static struct qcom_icc_node qns_llcc = { + .name = "qns_llcc", + .id = SM8150_SLAVE_LLCC, + .channels = 4, + .buswidth = 16, + .num_links = 1, + .links = { SM8150_MASTER_LLCC }, +}; + +static struct qcom_icc_node srvc_gemnoc = { + .name = "srvc_gemnoc", + .id = SM8150_SLAVE_SERVICE_GEM_NOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node ebi = { + .name = "ebi", + .id = SM8150_SLAVE_EBI_CH0, + .channels = 4, + .buswidth = 4, +}; + +static struct qcom_icc_node qns2_mem_noc = { + .name = "qns2_mem_noc", + .id = SM8150_SLAVE_MNOC_SF_MEM_NOC, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SM8150_MASTER_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qns_mem_noc_hf = { + .name = "qns_mem_noc_hf", + .id = SM8150_SLAVE_MNOC_HF_MEM_NOC, + .channels = 2, + .buswidth = 32, + .num_links = 1, + .links = { SM8150_MASTER_MNOC_HF_MEM_NOC }, +}; + +static struct qcom_icc_node srvc_mnoc = { + .name = "srvc_mnoc", + .id = SM8150_SLAVE_SERVICE_MNOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_apss = { + .name = "qhs_apss", + .id = SM8150_SLAVE_APPSS, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node qns_cnoc = { + .name = "qns_cnoc", + .id = SM8150_SNOC_CNOC_SLV, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8150_SNOC_CNOC_MAS }, +}; + +static struct qcom_icc_node qns_gemnoc_gc = { + .name = "qns_gemnoc_gc", + .id = SM8150_SLAVE_SNOC_GEM_NOC_GC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8150_MASTER_SNOC_GC_MEM_NOC }, +}; + +static struct qcom_icc_node qns_gemnoc_sf = { + .name = "qns_gemnoc_sf", + .id = SM8150_SLAVE_SNOC_GEM_NOC_SF, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SM8150_MASTER_SNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qxs_imem = { + .name = "qxs_imem", + .id = SM8150_SLAVE_OCIMEM, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node qxs_pimem = { + .name = "qxs_pimem", + .id = SM8150_SLAVE_PIMEM, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node srvc_snoc = { + .name = "srvc_snoc", + .id = SM8150_SLAVE_SERVICE_SNOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node xs_pcie_0 = { + .name = "xs_pcie_0", + .id = SM8150_SLAVE_PCIE_0, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node xs_pcie_1 = { + .name = "xs_pcie_1", + .id = SM8150_SLAVE_PCIE_1, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node xs_qdss_stm = { + .name = "xs_qdss_stm", + .id = SM8150_SLAVE_QDSS_STM, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node xs_sys_tcu_cfg = { + .name = "xs_sys_tcu_cfg", + .id = SM8150_SLAVE_TCU, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_bcm bcm_acv = { + .name = "ACV", + .keepalive = false, + .num_nodes = 1, + .nodes = { &ebi }, +}; + +static struct qcom_icc_bcm bcm_mc0 = { + .name = "MC0", + .keepalive = true, + .num_nodes = 1, + .nodes = { &ebi }, +}; + +static struct qcom_icc_bcm bcm_sh0 = { + .name = "SH0", + .keepalive = true, + .num_nodes = 1, + .nodes = { &qns_llcc }, +}; + +static struct qcom_icc_bcm bcm_mm0 = { + .name = "MM0", + .keepalive = true, + .num_nodes = 1, + .nodes = { &qns_mem_noc_hf }, +}; + +static struct qcom_icc_bcm bcm_mm1 = { + .name = "MM1", + .keepalive = false, + .num_nodes = 7, + .nodes = { &qxm_camnoc_hf0_uncomp, + &qxm_camnoc_hf1_uncomp, + &qxm_camnoc_sf_uncomp, + &qxm_camnoc_hf0, + &qxm_camnoc_hf1, + &qxm_mdp0, + &qxm_mdp1 + }, +}; + +static struct qcom_icc_bcm bcm_sh2 = { + .name = "SH2", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qns_gem_noc_snoc }, +}; + +static struct qcom_icc_bcm bcm_mm2 = { + .name = "MM2", + .keepalive = false, + .num_nodes = 2, + .nodes = { &qxm_camnoc_sf, &qns2_mem_noc }, +}; + +static struct qcom_icc_bcm bcm_sh3 = { + .name = "SH3", + .keepalive = false, + .num_nodes = 2, + .nodes = { &acm_gpu_tcu, &acm_sys_tcu }, +}; + +static struct qcom_icc_bcm bcm_mm3 = { + .name = "MM3", + .keepalive = false, + .num_nodes = 4, + .nodes = { &qxm_rot, &qxm_venus0, &qxm_venus1, &qxm_venus_arm9 }, +}; + +static struct qcom_icc_bcm bcm_sh4 = { + .name = "SH4", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qnm_cmpnoc }, +}; + +static struct qcom_icc_bcm bcm_sh5 = { + .name = "SH5", + .keepalive = false, + .num_nodes = 1, + .nodes = { &acm_apps }, +}; + +static struct qcom_icc_bcm bcm_sn0 = { + .name = "SN0", + .keepalive = true, + .num_nodes = 1, + .nodes = { &qns_gemnoc_sf }, +}; + +static struct qcom_icc_bcm bcm_co0 = { + .name = "CO0", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qns_cdsp_mem_noc }, +}; + +static struct qcom_icc_bcm bcm_ce0 = { + .name = "CE0", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qxm_crypto }, +}; + +static struct qcom_icc_bcm bcm_sn1 = { + .name = "SN1", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qxs_imem }, +}; + +static struct qcom_icc_bcm bcm_co1 = { + .name = "CO1", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qnm_npu }, +}; + +static struct qcom_icc_bcm bcm_cn0 = { + .name = "CN0", + .keepalive = true, + .num_nodes = 53, + .nodes = { &qhm_spdm, + &qnm_snoc, + &qhs_a1_noc_cfg, + &qhs_a2_noc_cfg, + &qhs_ahb2phy_south, + &qhs_aop, + &qhs_aoss, + &qhs_camera_cfg, + &qhs_clk_ctl, + &qhs_compute_dsp, + &qhs_cpr_cx, + &qhs_cpr_mmcx, + &qhs_cpr_mx, + &qhs_crypto0_cfg, + &qhs_ddrss_cfg, + &qhs_display_cfg, + &qhs_emac_cfg, + &qhs_glm, + &qhs_gpuss_cfg, + &qhs_imem_cfg, + &qhs_ipa, + &qhs_mnoc_cfg, + &qhs_npu_cfg, + &qhs_pcie0_cfg, + &qhs_pcie1_cfg, + &qhs_phy_refgen_north, + &qhs_pimem_cfg, + &qhs_prng, + &qhs_qdss_cfg, + &qhs_qspi, + &qhs_qupv3_east, + &qhs_qupv3_north, + &qhs_qupv3_south, + &qhs_sdc2, + &qhs_sdc4, + &qhs_snoc_cfg, + &qhs_spdm, + &qhs_spss_cfg, + &qhs_ssc_cfg, + &qhs_tcsr, + &qhs_tlmm_east, + &qhs_tlmm_north, + &qhs_tlmm_south, + &qhs_tlmm_west, + &qhs_tsif, + &qhs_ufs_card_cfg, + &qhs_ufs_mem_cfg, + &qhs_usb3_0, + &qhs_usb3_1, + &qhs_venus_cfg, + &qhs_vsense_ctrl_cfg, + &qns_cnoc_a2noc, + &srvc_cnoc + }, +}; + +static struct qcom_icc_bcm bcm_qup0 = { + .name = "QUP0", + .keepalive = false, + .num_nodes = 3, + .nodes = { &qhm_qup0, &qhm_qup1, &qhm_qup2 }, +}; + +static struct qcom_icc_bcm bcm_sn2 = { + .name = "SN2", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qns_gemnoc_gc }, +}; + +static struct qcom_icc_bcm bcm_sn3 = { + .name = "SN3", + .keepalive = false, + .num_nodes = 3, + .nodes = { &srvc_aggre1_noc, &srvc_aggre2_noc, &qns_cnoc }, +}; + +static struct qcom_icc_bcm bcm_sn4 = { + .name = "SN4", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qxs_pimem }, +}; + +static struct qcom_icc_bcm bcm_sn5 = { + .name = "SN5", + .keepalive = false, + .num_nodes = 1, + .nodes = { &xs_qdss_stm }, +}; + +static struct qcom_icc_bcm bcm_sn8 = { + .name = "SN8", + .keepalive = false, + .num_nodes = 2, + .nodes = { &xs_pcie_0, &xs_pcie_1 }, +}; + +static struct qcom_icc_bcm bcm_sn9 = { + .name = "SN9", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qnm_aggre1_noc }, +}; + +static struct qcom_icc_bcm bcm_sn11 = { + .name = "SN11", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qnm_aggre2_noc }, +}; + +static struct qcom_icc_bcm bcm_sn12 = { + .name = "SN12", + .keepalive = false, + .num_nodes = 2, + .nodes = { &qxm_pimem, &xm_gic }, +}; + +static struct qcom_icc_bcm bcm_sn14 = { + .name = "SN14", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qns_pcie_mem_noc }, +}; + +static struct qcom_icc_bcm bcm_sn15 = { + .name = "SN15", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qnm_gemnoc }, +}; static struct qcom_icc_bcm * const aggre1_noc_bcms[] = { &bcm_qup0, diff --git a/drivers/interconnect/qcom/sm8250.c b/drivers/interconnect/qcom/sm8250.c index e3bb008cb219..d4a4ecef11f0 100644 --- a/drivers/interconnect/qcom/sm8250.c +++ b/drivers/interconnect/qcom/sm8250.c @@ -7,193 +7,1636 @@ #include #include #include +#include #include -#include +#include #include #include "bcm-voter.h" #include "icc-rpmh.h" #include "sm8250.h" -DEFINE_QNODE(qhm_a1noc_cfg, SM8250_MASTER_A1NOC_CFG, 1, 4, SM8250_SLAVE_SERVICE_A1NOC); -DEFINE_QNODE(qhm_qspi, SM8250_MASTER_QSPI_0, 1, 4, SM8250_A1NOC_SNOC_SLV); -DEFINE_QNODE(qhm_qup1, SM8250_MASTER_QUP_1, 1, 4, SM8250_A1NOC_SNOC_SLV); -DEFINE_QNODE(qhm_qup2, SM8250_MASTER_QUP_2, 1, 4, SM8250_A1NOC_SNOC_SLV); -DEFINE_QNODE(qhm_tsif, SM8250_MASTER_TSIF, 1, 4, SM8250_A1NOC_SNOC_SLV); -DEFINE_QNODE(xm_pcie3_modem, SM8250_MASTER_PCIE_2, 1, 8, SM8250_SLAVE_ANOC_PCIE_GEM_NOC_1); -DEFINE_QNODE(xm_sdc4, SM8250_MASTER_SDCC_4, 1, 8, SM8250_A1NOC_SNOC_SLV); -DEFINE_QNODE(xm_ufs_mem, SM8250_MASTER_UFS_MEM, 1, 8, SM8250_A1NOC_SNOC_SLV); -DEFINE_QNODE(xm_usb3_0, SM8250_MASTER_USB3, 1, 8, SM8250_A1NOC_SNOC_SLV); -DEFINE_QNODE(xm_usb3_1, SM8250_MASTER_USB3_1, 1, 8, SM8250_A1NOC_SNOC_SLV); -DEFINE_QNODE(qhm_a2noc_cfg, SM8250_MASTER_A2NOC_CFG, 1, 4, SM8250_SLAVE_SERVICE_A2NOC); -DEFINE_QNODE(qhm_qdss_bam, SM8250_MASTER_QDSS_BAM, 1, 4, SM8250_A2NOC_SNOC_SLV); -DEFINE_QNODE(qhm_qup0, SM8250_MASTER_QUP_0, 1, 4, SM8250_A2NOC_SNOC_SLV); -DEFINE_QNODE(qnm_cnoc, SM8250_MASTER_CNOC_A2NOC, 1, 8, SM8250_A2NOC_SNOC_SLV); -DEFINE_QNODE(qxm_crypto, SM8250_MASTER_CRYPTO_CORE_0, 1, 8, SM8250_A2NOC_SNOC_SLV); -DEFINE_QNODE(qxm_ipa, SM8250_MASTER_IPA, 1, 8, SM8250_A2NOC_SNOC_SLV); -DEFINE_QNODE(xm_pcie3_0, SM8250_MASTER_PCIE, 1, 8, SM8250_SLAVE_ANOC_PCIE_GEM_NOC); -DEFINE_QNODE(xm_pcie3_1, SM8250_MASTER_PCIE_1, 1, 8, SM8250_SLAVE_ANOC_PCIE_GEM_NOC); -DEFINE_QNODE(xm_qdss_etr, SM8250_MASTER_QDSS_ETR, 1, 8, SM8250_A2NOC_SNOC_SLV); -DEFINE_QNODE(xm_sdc2, SM8250_MASTER_SDCC_2, 1, 8, SM8250_A2NOC_SNOC_SLV); -DEFINE_QNODE(xm_ufs_card, SM8250_MASTER_UFS_CARD, 1, 8, SM8250_A2NOC_SNOC_SLV); -DEFINE_QNODE(qnm_npu, SM8250_MASTER_NPU, 2, 32, SM8250_SLAVE_CDSP_MEM_NOC); -DEFINE_QNODE(qnm_snoc, SM8250_SNOC_CNOC_MAS, 1, 8, SM8250_SLAVE_CDSP_CFG, SM8250_SLAVE_CAMERA_CFG, SM8250_SLAVE_TLMM_SOUTH, SM8250_SLAVE_TLMM_NORTH, SM8250_SLAVE_SDCC_4, SM8250_SLAVE_TLMM_WEST, SM8250_SLAVE_SDCC_2, SM8250_SLAVE_CNOC_MNOC_CFG, SM8250_SLAVE_UFS_MEM_CFG, SM8250_SLAVE_SNOC_CFG, SM8250_SLAVE_PDM, SM8250_SLAVE_CX_RDPM, SM8250_SLAVE_PCIE_1_CFG, SM8250_SLAVE_A2NOC_CFG, SM8250_SLAVE_QDSS_CFG, SM8250_SLAVE_DISPLAY_CFG, SM8250_SLAVE_PCIE_2_CFG, SM8250_SLAVE_TCSR, SM8250_SLAVE_DCC_CFG, SM8250_SLAVE_CNOC_DDRSS, SM8250_SLAVE_IPC_ROUTER_CFG, SM8250_SLAVE_PCIE_0_CFG, SM8250_SLAVE_RBCPR_MMCX_CFG, SM8250_SLAVE_NPU_CFG, SM8250_SLAVE_AHB2PHY_SOUTH, SM8250_SLAVE_AHB2PHY_NORTH, SM8250_SLAVE_GRAPHICS_3D_CFG, SM8250_SLAVE_VENUS_CFG, SM8250_SLAVE_TSIF, SM8250_SLAVE_IPA_CFG, SM8250_SLAVE_IMEM_CFG, SM8250_SLAVE_USB3, SM8250_SLAVE_SERVICE_CNOC, SM8250_SLAVE_UFS_CARD_CFG, SM8250_SLAVE_USB3_1, SM8250_SLAVE_LPASS, SM8250_SLAVE_RBCPR_CX_CFG, SM8250_SLAVE_A1NOC_CFG, SM8250_SLAVE_AOSS, SM8250_SLAVE_PRNG, SM8250_SLAVE_VSENSE_CTRL_CFG, SM8250_SLAVE_QSPI_0, SM8250_SLAVE_CRYPTO_0_CFG, SM8250_SLAVE_PIMEM_CFG, SM8250_SLAVE_RBCPR_MX_CFG, SM8250_SLAVE_QUP_0, SM8250_SLAVE_QUP_1, SM8250_SLAVE_QUP_2, SM8250_SLAVE_CLK_CTL); -DEFINE_QNODE(xm_qdss_dap, SM8250_MASTER_QDSS_DAP, 1, 8, SM8250_SLAVE_CDSP_CFG, SM8250_SLAVE_CAMERA_CFG, SM8250_SLAVE_TLMM_SOUTH, SM8250_SLAVE_TLMM_NORTH, SM8250_SLAVE_SDCC_4, SM8250_SLAVE_TLMM_WEST, SM8250_SLAVE_SDCC_2, SM8250_SLAVE_CNOC_MNOC_CFG, SM8250_SLAVE_UFS_MEM_CFG, SM8250_SLAVE_SNOC_CFG, SM8250_SLAVE_PDM, SM8250_SLAVE_CX_RDPM, SM8250_SLAVE_PCIE_1_CFG, SM8250_SLAVE_A2NOC_CFG, SM8250_SLAVE_QDSS_CFG, SM8250_SLAVE_DISPLAY_CFG, SM8250_SLAVE_PCIE_2_CFG, SM8250_SLAVE_TCSR, SM8250_SLAVE_DCC_CFG, SM8250_SLAVE_CNOC_DDRSS, SM8250_SLAVE_IPC_ROUTER_CFG, SM8250_SLAVE_CNOC_A2NOC, SM8250_SLAVE_PCIE_0_CFG, SM8250_SLAVE_RBCPR_MMCX_CFG, SM8250_SLAVE_NPU_CFG, SM8250_SLAVE_AHB2PHY_SOUTH, SM8250_SLAVE_AHB2PHY_NORTH, SM8250_SLAVE_GRAPHICS_3D_CFG, SM8250_SLAVE_VENUS_CFG, SM8250_SLAVE_TSIF, SM8250_SLAVE_IPA_CFG, SM8250_SLAVE_IMEM_CFG, SM8250_SLAVE_USB3, SM8250_SLAVE_SERVICE_CNOC, SM8250_SLAVE_UFS_CARD_CFG, SM8250_SLAVE_USB3_1, SM8250_SLAVE_LPASS, SM8250_SLAVE_RBCPR_CX_CFG, SM8250_SLAVE_A1NOC_CFG, SM8250_SLAVE_AOSS, SM8250_SLAVE_PRNG, SM8250_SLAVE_VSENSE_CTRL_CFG, SM8250_SLAVE_QSPI_0, SM8250_SLAVE_CRYPTO_0_CFG, SM8250_SLAVE_PIMEM_CFG, SM8250_SLAVE_RBCPR_MX_CFG, SM8250_SLAVE_QUP_0, SM8250_SLAVE_QUP_1, SM8250_SLAVE_QUP_2, SM8250_SLAVE_CLK_CTL); -DEFINE_QNODE(qhm_cnoc_dc_noc, SM8250_MASTER_CNOC_DC_NOC, 1, 4, SM8250_SLAVE_GEM_NOC_CFG, SM8250_SLAVE_LLCC_CFG); -DEFINE_QNODE(alm_gpu_tcu, SM8250_MASTER_GPU_TCU, 1, 8, SM8250_SLAVE_LLCC, SM8250_SLAVE_GEM_NOC_SNOC); -DEFINE_QNODE(alm_sys_tcu, SM8250_MASTER_SYS_TCU, 1, 8, SM8250_SLAVE_LLCC, SM8250_SLAVE_GEM_NOC_SNOC); -DEFINE_QNODE(chm_apps, SM8250_MASTER_AMPSS_M0, 2, 32, SM8250_SLAVE_LLCC, SM8250_SLAVE_GEM_NOC_SNOC, SM8250_SLAVE_MEM_NOC_PCIE_SNOC); -DEFINE_QNODE(qhm_gemnoc_cfg, SM8250_MASTER_GEM_NOC_CFG, 1, 4, SM8250_SLAVE_SERVICE_GEM_NOC_2, SM8250_SLAVE_SERVICE_GEM_NOC_1, SM8250_SLAVE_SERVICE_GEM_NOC); -DEFINE_QNODE(qnm_cmpnoc, SM8250_MASTER_COMPUTE_NOC, 2, 32, SM8250_SLAVE_LLCC, SM8250_SLAVE_GEM_NOC_SNOC); -DEFINE_QNODE(qnm_gpu, SM8250_MASTER_GRAPHICS_3D, 2, 32, SM8250_SLAVE_LLCC, SM8250_SLAVE_GEM_NOC_SNOC); -DEFINE_QNODE(qnm_mnoc_hf, SM8250_MASTER_MNOC_HF_MEM_NOC, 2, 32, SM8250_SLAVE_LLCC); -DEFINE_QNODE(qnm_mnoc_sf, SM8250_MASTER_MNOC_SF_MEM_NOC, 2, 32, SM8250_SLAVE_LLCC, SM8250_SLAVE_GEM_NOC_SNOC); -DEFINE_QNODE(qnm_pcie, SM8250_MASTER_ANOC_PCIE_GEM_NOC, 1, 16, SM8250_SLAVE_LLCC, SM8250_SLAVE_GEM_NOC_SNOC); -DEFINE_QNODE(qnm_snoc_gc, SM8250_MASTER_SNOC_GC_MEM_NOC, 1, 8, SM8250_SLAVE_LLCC); -DEFINE_QNODE(qnm_snoc_sf, SM8250_MASTER_SNOC_SF_MEM_NOC, 1, 16, SM8250_SLAVE_LLCC, SM8250_SLAVE_GEM_NOC_SNOC, SM8250_SLAVE_MEM_NOC_PCIE_SNOC); -DEFINE_QNODE(llcc_mc, SM8250_MASTER_LLCC, 4, 4, SM8250_SLAVE_EBI_CH0); -DEFINE_QNODE(qhm_mnoc_cfg, SM8250_MASTER_CNOC_MNOC_CFG, 1, 4, SM8250_SLAVE_SERVICE_MNOC); -DEFINE_QNODE(qnm_camnoc_hf, SM8250_MASTER_CAMNOC_HF, 2, 32, SM8250_SLAVE_MNOC_HF_MEM_NOC); -DEFINE_QNODE(qnm_camnoc_icp, SM8250_MASTER_CAMNOC_ICP, 1, 8, SM8250_SLAVE_MNOC_SF_MEM_NOC); -DEFINE_QNODE(qnm_camnoc_sf, SM8250_MASTER_CAMNOC_SF, 2, 32, SM8250_SLAVE_MNOC_SF_MEM_NOC); -DEFINE_QNODE(qnm_video0, SM8250_MASTER_VIDEO_P0, 1, 32, SM8250_SLAVE_MNOC_SF_MEM_NOC); -DEFINE_QNODE(qnm_video1, SM8250_MASTER_VIDEO_P1, 1, 32, SM8250_SLAVE_MNOC_SF_MEM_NOC); -DEFINE_QNODE(qnm_video_cvp, SM8250_MASTER_VIDEO_PROC, 1, 32, SM8250_SLAVE_MNOC_SF_MEM_NOC); -DEFINE_QNODE(qxm_mdp0, SM8250_MASTER_MDP_PORT0, 1, 32, SM8250_SLAVE_MNOC_HF_MEM_NOC); -DEFINE_QNODE(qxm_mdp1, SM8250_MASTER_MDP_PORT1, 1, 32, SM8250_SLAVE_MNOC_HF_MEM_NOC); -DEFINE_QNODE(qxm_rot, SM8250_MASTER_ROTATOR, 1, 32, SM8250_SLAVE_MNOC_SF_MEM_NOC); -DEFINE_QNODE(amm_npu_sys, SM8250_MASTER_NPU_SYS, 4, 32, SM8250_SLAVE_NPU_COMPUTE_NOC); -DEFINE_QNODE(amm_npu_sys_cdp_w, SM8250_MASTER_NPU_CDP, 2, 16, SM8250_SLAVE_NPU_COMPUTE_NOC); -DEFINE_QNODE(qhm_cfg, SM8250_MASTER_NPU_NOC_CFG, 1, 4, SM8250_SLAVE_SERVICE_NPU_NOC, SM8250_SLAVE_ISENSE_CFG, SM8250_SLAVE_NPU_LLM_CFG, SM8250_SLAVE_NPU_INT_DMA_BWMON_CFG, SM8250_SLAVE_NPU_CP, SM8250_SLAVE_NPU_TCM, SM8250_SLAVE_NPU_CAL_DP0, SM8250_SLAVE_NPU_CAL_DP1, SM8250_SLAVE_NPU_DPM); -DEFINE_QNODE(qhm_snoc_cfg, SM8250_MASTER_SNOC_CFG, 1, 4, SM8250_SLAVE_SERVICE_SNOC); -DEFINE_QNODE(qnm_aggre1_noc, SM8250_A1NOC_SNOC_MAS, 1, 16, SM8250_SLAVE_SNOC_GEM_NOC_SF); -DEFINE_QNODE(qnm_aggre2_noc, SM8250_A2NOC_SNOC_MAS, 1, 16, SM8250_SLAVE_SNOC_GEM_NOC_SF); -DEFINE_QNODE(qnm_gemnoc, SM8250_MASTER_GEM_NOC_SNOC, 1, 16, SM8250_SLAVE_PIMEM, SM8250_SLAVE_OCIMEM, SM8250_SLAVE_APPSS, SM8250_SNOC_CNOC_SLV, SM8250_SLAVE_TCU, SM8250_SLAVE_QDSS_STM); -DEFINE_QNODE(qnm_gemnoc_pcie, SM8250_MASTER_GEM_NOC_PCIE_SNOC, 1, 8, SM8250_SLAVE_PCIE_2, SM8250_SLAVE_PCIE_0, SM8250_SLAVE_PCIE_1); -DEFINE_QNODE(qxm_pimem, SM8250_MASTER_PIMEM, 1, 8, SM8250_SLAVE_SNOC_GEM_NOC_GC); -DEFINE_QNODE(xm_gic, SM8250_MASTER_GIC, 1, 8, SM8250_SLAVE_SNOC_GEM_NOC_GC); -DEFINE_QNODE(qns_a1noc_snoc, SM8250_A1NOC_SNOC_SLV, 1, 16, SM8250_A1NOC_SNOC_MAS); -DEFINE_QNODE(qns_pcie_modem_mem_noc, SM8250_SLAVE_ANOC_PCIE_GEM_NOC_1, 1, 16, SM8250_MASTER_ANOC_PCIE_GEM_NOC); -DEFINE_QNODE(srvc_aggre1_noc, SM8250_SLAVE_SERVICE_A1NOC, 1, 4); -DEFINE_QNODE(qns_a2noc_snoc, SM8250_A2NOC_SNOC_SLV, 1, 16, SM8250_A2NOC_SNOC_MAS); -DEFINE_QNODE(qns_pcie_mem_noc, SM8250_SLAVE_ANOC_PCIE_GEM_NOC, 1, 16, SM8250_MASTER_ANOC_PCIE_GEM_NOC); -DEFINE_QNODE(srvc_aggre2_noc, SM8250_SLAVE_SERVICE_A2NOC, 1, 4); -DEFINE_QNODE(qns_cdsp_mem_noc, SM8250_SLAVE_CDSP_MEM_NOC, 2, 32, SM8250_MASTER_COMPUTE_NOC); -DEFINE_QNODE(qhs_a1_noc_cfg, SM8250_SLAVE_A1NOC_CFG, 1, 4, SM8250_MASTER_A1NOC_CFG); -DEFINE_QNODE(qhs_a2_noc_cfg, SM8250_SLAVE_A2NOC_CFG, 1, 4, SM8250_MASTER_A2NOC_CFG); -DEFINE_QNODE(qhs_ahb2phy0, SM8250_SLAVE_AHB2PHY_SOUTH, 1, 4); -DEFINE_QNODE(qhs_ahb2phy1, SM8250_SLAVE_AHB2PHY_NORTH, 1, 4); -DEFINE_QNODE(qhs_aoss, SM8250_SLAVE_AOSS, 1, 4); -DEFINE_QNODE(qhs_camera_cfg, SM8250_SLAVE_CAMERA_CFG, 1, 4); -DEFINE_QNODE(qhs_clk_ctl, SM8250_SLAVE_CLK_CTL, 1, 4); -DEFINE_QNODE(qhs_compute_dsp, SM8250_SLAVE_CDSP_CFG, 1, 4); -DEFINE_QNODE(qhs_cpr_cx, SM8250_SLAVE_RBCPR_CX_CFG, 1, 4); -DEFINE_QNODE(qhs_cpr_mmcx, SM8250_SLAVE_RBCPR_MMCX_CFG, 1, 4); -DEFINE_QNODE(qhs_cpr_mx, SM8250_SLAVE_RBCPR_MX_CFG, 1, 4); -DEFINE_QNODE(qhs_crypto0_cfg, SM8250_SLAVE_CRYPTO_0_CFG, 1, 4); -DEFINE_QNODE(qhs_cx_rdpm, SM8250_SLAVE_CX_RDPM, 1, 4); -DEFINE_QNODE(qhs_dcc_cfg, SM8250_SLAVE_DCC_CFG, 1, 4); -DEFINE_QNODE(qhs_ddrss_cfg, SM8250_SLAVE_CNOC_DDRSS, 1, 4, SM8250_MASTER_CNOC_DC_NOC); -DEFINE_QNODE(qhs_display_cfg, SM8250_SLAVE_DISPLAY_CFG, 1, 4); -DEFINE_QNODE(qhs_gpuss_cfg, SM8250_SLAVE_GRAPHICS_3D_CFG, 1, 8); -DEFINE_QNODE(qhs_imem_cfg, SM8250_SLAVE_IMEM_CFG, 1, 4); -DEFINE_QNODE(qhs_ipa, SM8250_SLAVE_IPA_CFG, 1, 4); -DEFINE_QNODE(qhs_ipc_router, SM8250_SLAVE_IPC_ROUTER_CFG, 1, 4); -DEFINE_QNODE(qhs_lpass_cfg, SM8250_SLAVE_LPASS, 1, 4); -DEFINE_QNODE(qhs_mnoc_cfg, SM8250_SLAVE_CNOC_MNOC_CFG, 1, 4, SM8250_MASTER_CNOC_MNOC_CFG); -DEFINE_QNODE(qhs_npu_cfg, SM8250_SLAVE_NPU_CFG, 1, 4, SM8250_MASTER_NPU_NOC_CFG); -DEFINE_QNODE(qhs_pcie0_cfg, SM8250_SLAVE_PCIE_0_CFG, 1, 4); -DEFINE_QNODE(qhs_pcie1_cfg, SM8250_SLAVE_PCIE_1_CFG, 1, 4); -DEFINE_QNODE(qhs_pcie_modem_cfg, SM8250_SLAVE_PCIE_2_CFG, 1, 4); -DEFINE_QNODE(qhs_pdm, SM8250_SLAVE_PDM, 1, 4); -DEFINE_QNODE(qhs_pimem_cfg, SM8250_SLAVE_PIMEM_CFG, 1, 4); -DEFINE_QNODE(qhs_prng, SM8250_SLAVE_PRNG, 1, 4); -DEFINE_QNODE(qhs_qdss_cfg, SM8250_SLAVE_QDSS_CFG, 1, 4); -DEFINE_QNODE(qhs_qspi, SM8250_SLAVE_QSPI_0, 1, 4); -DEFINE_QNODE(qhs_qup0, SM8250_SLAVE_QUP_0, 1, 4); -DEFINE_QNODE(qhs_qup1, SM8250_SLAVE_QUP_1, 1, 4); -DEFINE_QNODE(qhs_qup2, SM8250_SLAVE_QUP_2, 1, 4); -DEFINE_QNODE(qhs_sdc2, SM8250_SLAVE_SDCC_2, 1, 4); -DEFINE_QNODE(qhs_sdc4, SM8250_SLAVE_SDCC_4, 1, 4); -DEFINE_QNODE(qhs_snoc_cfg, SM8250_SLAVE_SNOC_CFG, 1, 4, SM8250_MASTER_SNOC_CFG); -DEFINE_QNODE(qhs_tcsr, SM8250_SLAVE_TCSR, 1, 4); -DEFINE_QNODE(qhs_tlmm0, SM8250_SLAVE_TLMM_NORTH, 1, 4); -DEFINE_QNODE(qhs_tlmm1, SM8250_SLAVE_TLMM_SOUTH, 1, 4); -DEFINE_QNODE(qhs_tlmm2, SM8250_SLAVE_TLMM_WEST, 1, 4); -DEFINE_QNODE(qhs_tsif, SM8250_SLAVE_TSIF, 1, 4); -DEFINE_QNODE(qhs_ufs_card_cfg, SM8250_SLAVE_UFS_CARD_CFG, 1, 4); -DEFINE_QNODE(qhs_ufs_mem_cfg, SM8250_SLAVE_UFS_MEM_CFG, 1, 4); -DEFINE_QNODE(qhs_usb3_0, SM8250_SLAVE_USB3, 1, 4); -DEFINE_QNODE(qhs_usb3_1, SM8250_SLAVE_USB3_1, 1, 4); -DEFINE_QNODE(qhs_venus_cfg, SM8250_SLAVE_VENUS_CFG, 1, 4); -DEFINE_QNODE(qhs_vsense_ctrl_cfg, SM8250_SLAVE_VSENSE_CTRL_CFG, 1, 4); -DEFINE_QNODE(qns_cnoc_a2noc, SM8250_SLAVE_CNOC_A2NOC, 1, 8, SM8250_MASTER_CNOC_A2NOC); -DEFINE_QNODE(srvc_cnoc, SM8250_SLAVE_SERVICE_CNOC, 1, 4); -DEFINE_QNODE(qhs_llcc, SM8250_SLAVE_LLCC_CFG, 1, 4); -DEFINE_QNODE(qhs_memnoc, SM8250_SLAVE_GEM_NOC_CFG, 1, 4, SM8250_MASTER_GEM_NOC_CFG); -DEFINE_QNODE(qns_gem_noc_snoc, SM8250_SLAVE_GEM_NOC_SNOC, 1, 16, SM8250_MASTER_GEM_NOC_SNOC); -DEFINE_QNODE(qns_llcc, SM8250_SLAVE_LLCC, 4, 16, SM8250_MASTER_LLCC); -DEFINE_QNODE(qns_sys_pcie, SM8250_SLAVE_MEM_NOC_PCIE_SNOC, 1, 8, SM8250_MASTER_GEM_NOC_PCIE_SNOC); -DEFINE_QNODE(srvc_even_gemnoc, SM8250_SLAVE_SERVICE_GEM_NOC_1, 1, 4); -DEFINE_QNODE(srvc_odd_gemnoc, SM8250_SLAVE_SERVICE_GEM_NOC_2, 1, 4); -DEFINE_QNODE(srvc_sys_gemnoc, SM8250_SLAVE_SERVICE_GEM_NOC, 1, 4); -DEFINE_QNODE(ebi, SM8250_SLAVE_EBI_CH0, 4, 4); -DEFINE_QNODE(qns_mem_noc_hf, SM8250_SLAVE_MNOC_HF_MEM_NOC, 2, 32, SM8250_MASTER_MNOC_HF_MEM_NOC); -DEFINE_QNODE(qns_mem_noc_sf, SM8250_SLAVE_MNOC_SF_MEM_NOC, 2, 32, SM8250_MASTER_MNOC_SF_MEM_NOC); -DEFINE_QNODE(srvc_mnoc, SM8250_SLAVE_SERVICE_MNOC, 1, 4); -DEFINE_QNODE(qhs_cal_dp0, SM8250_SLAVE_NPU_CAL_DP0, 1, 4); -DEFINE_QNODE(qhs_cal_dp1, SM8250_SLAVE_NPU_CAL_DP1, 1, 4); -DEFINE_QNODE(qhs_cp, SM8250_SLAVE_NPU_CP, 1, 4); -DEFINE_QNODE(qhs_dma_bwmon, SM8250_SLAVE_NPU_INT_DMA_BWMON_CFG, 1, 4); -DEFINE_QNODE(qhs_dpm, SM8250_SLAVE_NPU_DPM, 1, 4); -DEFINE_QNODE(qhs_isense, SM8250_SLAVE_ISENSE_CFG, 1, 4); -DEFINE_QNODE(qhs_llm, SM8250_SLAVE_NPU_LLM_CFG, 1, 4); -DEFINE_QNODE(qhs_tcm, SM8250_SLAVE_NPU_TCM, 1, 4); -DEFINE_QNODE(qns_npu_sys, SM8250_SLAVE_NPU_COMPUTE_NOC, 2, 32); -DEFINE_QNODE(srvc_noc, SM8250_SLAVE_SERVICE_NPU_NOC, 1, 4); -DEFINE_QNODE(qhs_apss, SM8250_SLAVE_APPSS, 1, 8); -DEFINE_QNODE(qns_cnoc, SM8250_SNOC_CNOC_SLV, 1, 8, SM8250_SNOC_CNOC_MAS); -DEFINE_QNODE(qns_gemnoc_gc, SM8250_SLAVE_SNOC_GEM_NOC_GC, 1, 8, SM8250_MASTER_SNOC_GC_MEM_NOC); -DEFINE_QNODE(qns_gemnoc_sf, SM8250_SLAVE_SNOC_GEM_NOC_SF, 1, 16, SM8250_MASTER_SNOC_SF_MEM_NOC); -DEFINE_QNODE(qxs_imem, SM8250_SLAVE_OCIMEM, 1, 8); -DEFINE_QNODE(qxs_pimem, SM8250_SLAVE_PIMEM, 1, 8); -DEFINE_QNODE(srvc_snoc, SM8250_SLAVE_SERVICE_SNOC, 1, 4); -DEFINE_QNODE(xs_pcie_0, SM8250_SLAVE_PCIE_0, 1, 8); -DEFINE_QNODE(xs_pcie_1, SM8250_SLAVE_PCIE_1, 1, 8); -DEFINE_QNODE(xs_pcie_modem, SM8250_SLAVE_PCIE_2, 1, 8); -DEFINE_QNODE(xs_qdss_stm, SM8250_SLAVE_QDSS_STM, 1, 4); -DEFINE_QNODE(xs_sys_tcu_cfg, SM8250_SLAVE_TCU, 1, 8); +static struct qcom_icc_node qhm_a1noc_cfg = { + .name = "qhm_a1noc_cfg", + .id = SM8250_MASTER_A1NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8250_SLAVE_SERVICE_A1NOC }, +}; -DEFINE_QBCM(bcm_acv, "ACV", false, &ebi); -DEFINE_QBCM(bcm_mc0, "MC0", true, &ebi); -DEFINE_QBCM(bcm_sh0, "SH0", true, &qns_llcc); -DEFINE_QBCM(bcm_mm0, "MM0", true, &qns_mem_noc_hf); -DEFINE_QBCM(bcm_ce0, "CE0", false, &qxm_crypto); -DEFINE_QBCM(bcm_mm1, "MM1", false, &qnm_camnoc_hf, &qxm_mdp0, &qxm_mdp1); -DEFINE_QBCM(bcm_sh2, "SH2", false, &alm_gpu_tcu, &alm_sys_tcu); -DEFINE_QBCM(bcm_mm2, "MM2", false, &qns_mem_noc_sf); -DEFINE_QBCM(bcm_qup0, "QUP0", false, &qhm_qup1, &qhm_qup2, &qhm_qup0); -DEFINE_QBCM(bcm_sh3, "SH3", false, &qnm_cmpnoc); -DEFINE_QBCM(bcm_mm3, "MM3", false, &qnm_camnoc_icp, &qnm_camnoc_sf, &qnm_video0, &qnm_video1, &qnm_video_cvp); -DEFINE_QBCM(bcm_sh4, "SH4", false, &chm_apps); -DEFINE_QBCM(bcm_sn0, "SN0", true, &qns_gemnoc_sf); -DEFINE_QBCM(bcm_co0, "CO0", false, &qns_cdsp_mem_noc); -DEFINE_QBCM(bcm_cn0, "CN0", true, &qnm_snoc, &xm_qdss_dap, &qhs_a1_noc_cfg, &qhs_a2_noc_cfg, &qhs_ahb2phy0, &qhs_ahb2phy1, &qhs_aoss, &qhs_camera_cfg, &qhs_clk_ctl, &qhs_compute_dsp, &qhs_cpr_cx, &qhs_cpr_mmcx, &qhs_cpr_mx, &qhs_crypto0_cfg, &qhs_cx_rdpm, &qhs_dcc_cfg, &qhs_ddrss_cfg, &qhs_display_cfg, &qhs_gpuss_cfg, &qhs_imem_cfg, &qhs_ipa, &qhs_ipc_router, &qhs_lpass_cfg, &qhs_mnoc_cfg, &qhs_npu_cfg, &qhs_pcie0_cfg, &qhs_pcie1_cfg, &qhs_pcie_modem_cfg, &qhs_pdm, &qhs_pimem_cfg, &qhs_prng, &qhs_qdss_cfg, &qhs_qspi, &qhs_qup0, &qhs_qup1, &qhs_qup2, &qhs_sdc2, &qhs_sdc4, &qhs_snoc_cfg, &qhs_tcsr, &qhs_tlmm0, &qhs_tlmm1, &qhs_tlmm2, &qhs_tsif, &qhs_ufs_card_cfg, &qhs_ufs_mem_cfg, &qhs_usb3_0, &qhs_usb3_1, &qhs_venus_cfg, &qhs_vsense_ctrl_cfg, &qns_cnoc_a2noc, &srvc_cnoc); -DEFINE_QBCM(bcm_sn1, "SN1", false, &qxs_imem); -DEFINE_QBCM(bcm_sn2, "SN2", false, &qns_gemnoc_gc); -DEFINE_QBCM(bcm_co2, "CO2", false, &qnm_npu); -DEFINE_QBCM(bcm_sn3, "SN3", false, &qxs_pimem); -DEFINE_QBCM(bcm_sn4, "SN4", false, &xs_qdss_stm); -DEFINE_QBCM(bcm_sn5, "SN5", false, &xs_pcie_modem); -DEFINE_QBCM(bcm_sn6, "SN6", false, &xs_pcie_0, &xs_pcie_1); -DEFINE_QBCM(bcm_sn7, "SN7", false, &qnm_aggre1_noc); -DEFINE_QBCM(bcm_sn8, "SN8", false, &qnm_aggre2_noc); -DEFINE_QBCM(bcm_sn9, "SN9", false, &qnm_gemnoc_pcie); -DEFINE_QBCM(bcm_sn11, "SN11", false, &qnm_gemnoc); -DEFINE_QBCM(bcm_sn12, "SN12", false, &qns_pcie_modem_mem_noc, &qns_pcie_mem_noc); +static struct qcom_icc_node qhm_qspi = { + .name = "qhm_qspi", + .id = SM8250_MASTER_QSPI_0, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8250_A1NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node qhm_qup1 = { + .name = "qhm_qup1", + .id = SM8250_MASTER_QUP_1, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8250_A1NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node qhm_qup2 = { + .name = "qhm_qup2", + .id = SM8250_MASTER_QUP_2, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8250_A1NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node qhm_tsif = { + .name = "qhm_tsif", + .id = SM8250_MASTER_TSIF, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8250_A1NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node xm_pcie3_modem = { + .name = "xm_pcie3_modem", + .id = SM8250_MASTER_PCIE_2, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8250_SLAVE_ANOC_PCIE_GEM_NOC_1 }, +}; + +static struct qcom_icc_node xm_sdc4 = { + .name = "xm_sdc4", + .id = SM8250_MASTER_SDCC_4, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8250_A1NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node xm_ufs_mem = { + .name = "xm_ufs_mem", + .id = SM8250_MASTER_UFS_MEM, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8250_A1NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node xm_usb3_0 = { + .name = "xm_usb3_0", + .id = SM8250_MASTER_USB3, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8250_A1NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node xm_usb3_1 = { + .name = "xm_usb3_1", + .id = SM8250_MASTER_USB3_1, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8250_A1NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node qhm_a2noc_cfg = { + .name = "qhm_a2noc_cfg", + .id = SM8250_MASTER_A2NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8250_SLAVE_SERVICE_A2NOC }, +}; + +static struct qcom_icc_node qhm_qdss_bam = { + .name = "qhm_qdss_bam", + .id = SM8250_MASTER_QDSS_BAM, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8250_A2NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node qhm_qup0 = { + .name = "qhm_qup0", + .id = SM8250_MASTER_QUP_0, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8250_A2NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node qnm_cnoc = { + .name = "qnm_cnoc", + .id = SM8250_MASTER_CNOC_A2NOC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8250_A2NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node qxm_crypto = { + .name = "qxm_crypto", + .id = SM8250_MASTER_CRYPTO_CORE_0, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8250_A2NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node qxm_ipa = { + .name = "qxm_ipa", + .id = SM8250_MASTER_IPA, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8250_A2NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node xm_pcie3_0 = { + .name = "xm_pcie3_0", + .id = SM8250_MASTER_PCIE, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8250_SLAVE_ANOC_PCIE_GEM_NOC }, +}; + +static struct qcom_icc_node xm_pcie3_1 = { + .name = "xm_pcie3_1", + .id = SM8250_MASTER_PCIE_1, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8250_SLAVE_ANOC_PCIE_GEM_NOC }, +}; + +static struct qcom_icc_node xm_qdss_etr = { + .name = "xm_qdss_etr", + .id = SM8250_MASTER_QDSS_ETR, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8250_A2NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node xm_sdc2 = { + .name = "xm_sdc2", + .id = SM8250_MASTER_SDCC_2, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8250_A2NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node xm_ufs_card = { + .name = "xm_ufs_card", + .id = SM8250_MASTER_UFS_CARD, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8250_A2NOC_SNOC_SLV }, +}; + +static struct qcom_icc_node qnm_npu = { + .name = "qnm_npu", + .id = SM8250_MASTER_NPU, + .channels = 2, + .buswidth = 32, + .num_links = 1, + .links = { SM8250_SLAVE_CDSP_MEM_NOC }, +}; + +static struct qcom_icc_node qnm_snoc = { + .name = "qnm_snoc", + .id = SM8250_SNOC_CNOC_MAS, + .channels = 1, + .buswidth = 8, + .num_links = 49, + .links = { SM8250_SLAVE_CDSP_CFG, + SM8250_SLAVE_CAMERA_CFG, + SM8250_SLAVE_TLMM_SOUTH, + SM8250_SLAVE_TLMM_NORTH, + SM8250_SLAVE_SDCC_4, + SM8250_SLAVE_TLMM_WEST, + SM8250_SLAVE_SDCC_2, + SM8250_SLAVE_CNOC_MNOC_CFG, + SM8250_SLAVE_UFS_MEM_CFG, + SM8250_SLAVE_SNOC_CFG, + SM8250_SLAVE_PDM, + SM8250_SLAVE_CX_RDPM, + SM8250_SLAVE_PCIE_1_CFG, + SM8250_SLAVE_A2NOC_CFG, + SM8250_SLAVE_QDSS_CFG, + SM8250_SLAVE_DISPLAY_CFG, + SM8250_SLAVE_PCIE_2_CFG, + SM8250_SLAVE_TCSR, + SM8250_SLAVE_DCC_CFG, + SM8250_SLAVE_CNOC_DDRSS, + SM8250_SLAVE_IPC_ROUTER_CFG, + SM8250_SLAVE_PCIE_0_CFG, + SM8250_SLAVE_RBCPR_MMCX_CFG, + SM8250_SLAVE_NPU_CFG, + SM8250_SLAVE_AHB2PHY_SOUTH, + SM8250_SLAVE_AHB2PHY_NORTH, + SM8250_SLAVE_GRAPHICS_3D_CFG, + SM8250_SLAVE_VENUS_CFG, + SM8250_SLAVE_TSIF, + SM8250_SLAVE_IPA_CFG, + SM8250_SLAVE_IMEM_CFG, + SM8250_SLAVE_USB3, + SM8250_SLAVE_SERVICE_CNOC, + SM8250_SLAVE_UFS_CARD_CFG, + SM8250_SLAVE_USB3_1, + SM8250_SLAVE_LPASS, + SM8250_SLAVE_RBCPR_CX_CFG, + SM8250_SLAVE_A1NOC_CFG, + SM8250_SLAVE_AOSS, + SM8250_SLAVE_PRNG, + SM8250_SLAVE_VSENSE_CTRL_CFG, + SM8250_SLAVE_QSPI_0, + SM8250_SLAVE_CRYPTO_0_CFG, + SM8250_SLAVE_PIMEM_CFG, + SM8250_SLAVE_RBCPR_MX_CFG, + SM8250_SLAVE_QUP_0, + SM8250_SLAVE_QUP_1, + SM8250_SLAVE_QUP_2, + SM8250_SLAVE_CLK_CTL + }, +}; + +static struct qcom_icc_node xm_qdss_dap = { + .name = "xm_qdss_dap", + .id = SM8250_MASTER_QDSS_DAP, + .channels = 1, + .buswidth = 8, + .num_links = 50, + .links = { SM8250_SLAVE_CDSP_CFG, + SM8250_SLAVE_CAMERA_CFG, + SM8250_SLAVE_TLMM_SOUTH, + SM8250_SLAVE_TLMM_NORTH, + SM8250_SLAVE_SDCC_4, + SM8250_SLAVE_TLMM_WEST, + SM8250_SLAVE_SDCC_2, + SM8250_SLAVE_CNOC_MNOC_CFG, + SM8250_SLAVE_UFS_MEM_CFG, + SM8250_SLAVE_SNOC_CFG, + SM8250_SLAVE_PDM, + SM8250_SLAVE_CX_RDPM, + SM8250_SLAVE_PCIE_1_CFG, + SM8250_SLAVE_A2NOC_CFG, + SM8250_SLAVE_QDSS_CFG, + SM8250_SLAVE_DISPLAY_CFG, + SM8250_SLAVE_PCIE_2_CFG, + SM8250_SLAVE_TCSR, + SM8250_SLAVE_DCC_CFG, + SM8250_SLAVE_CNOC_DDRSS, + SM8250_SLAVE_IPC_ROUTER_CFG, + SM8250_SLAVE_CNOC_A2NOC, + SM8250_SLAVE_PCIE_0_CFG, + SM8250_SLAVE_RBCPR_MMCX_CFG, + SM8250_SLAVE_NPU_CFG, + SM8250_SLAVE_AHB2PHY_SOUTH, + SM8250_SLAVE_AHB2PHY_NORTH, + SM8250_SLAVE_GRAPHICS_3D_CFG, + SM8250_SLAVE_VENUS_CFG, + SM8250_SLAVE_TSIF, + SM8250_SLAVE_IPA_CFG, + SM8250_SLAVE_IMEM_CFG, + SM8250_SLAVE_USB3, + SM8250_SLAVE_SERVICE_CNOC, + SM8250_SLAVE_UFS_CARD_CFG, + SM8250_SLAVE_USB3_1, + SM8250_SLAVE_LPASS, + SM8250_SLAVE_RBCPR_CX_CFG, + SM8250_SLAVE_A1NOC_CFG, + SM8250_SLAVE_AOSS, + SM8250_SLAVE_PRNG, + SM8250_SLAVE_VSENSE_CTRL_CFG, + SM8250_SLAVE_QSPI_0, + SM8250_SLAVE_CRYPTO_0_CFG, + SM8250_SLAVE_PIMEM_CFG, + SM8250_SLAVE_RBCPR_MX_CFG, + SM8250_SLAVE_QUP_0, + SM8250_SLAVE_QUP_1, + SM8250_SLAVE_QUP_2, + SM8250_SLAVE_CLK_CTL + }, +}; + +static struct qcom_icc_node qhm_cnoc_dc_noc = { + .name = "qhm_cnoc_dc_noc", + .id = SM8250_MASTER_CNOC_DC_NOC, + .channels = 1, + .buswidth = 4, + .num_links = 2, + .links = { SM8250_SLAVE_GEM_NOC_CFG, + SM8250_SLAVE_LLCC_CFG + }, +}; + +static struct qcom_icc_node alm_gpu_tcu = { + .name = "alm_gpu_tcu", + .id = SM8250_MASTER_GPU_TCU, + .channels = 1, + .buswidth = 8, + .num_links = 2, + .links = { SM8250_SLAVE_LLCC, + SM8250_SLAVE_GEM_NOC_SNOC + }, +}; + +static struct qcom_icc_node alm_sys_tcu = { + .name = "alm_sys_tcu", + .id = SM8250_MASTER_SYS_TCU, + .channels = 1, + .buswidth = 8, + .num_links = 2, + .links = { SM8250_SLAVE_LLCC, + SM8250_SLAVE_GEM_NOC_SNOC + }, +}; + +static struct qcom_icc_node chm_apps = { + .name = "chm_apps", + .id = SM8250_MASTER_AMPSS_M0, + .channels = 2, + .buswidth = 32, + .num_links = 3, + .links = { SM8250_SLAVE_LLCC, + SM8250_SLAVE_GEM_NOC_SNOC, + SM8250_SLAVE_MEM_NOC_PCIE_SNOC + }, +}; + +static struct qcom_icc_node qhm_gemnoc_cfg = { + .name = "qhm_gemnoc_cfg", + .id = SM8250_MASTER_GEM_NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 3, + .links = { SM8250_SLAVE_SERVICE_GEM_NOC_2, + SM8250_SLAVE_SERVICE_GEM_NOC_1, + SM8250_SLAVE_SERVICE_GEM_NOC + }, +}; + +static struct qcom_icc_node qnm_cmpnoc = { + .name = "qnm_cmpnoc", + .id = SM8250_MASTER_COMPUTE_NOC, + .channels = 2, + .buswidth = 32, + .num_links = 2, + .links = { SM8250_SLAVE_LLCC, + SM8250_SLAVE_GEM_NOC_SNOC + }, +}; + +static struct qcom_icc_node qnm_gpu = { + .name = "qnm_gpu", + .id = SM8250_MASTER_GRAPHICS_3D, + .channels = 2, + .buswidth = 32, + .num_links = 2, + .links = { SM8250_SLAVE_LLCC, + SM8250_SLAVE_GEM_NOC_SNOC }, +}; + +static struct qcom_icc_node qnm_mnoc_hf = { + .name = "qnm_mnoc_hf", + .id = SM8250_MASTER_MNOC_HF_MEM_NOC, + .channels = 2, + .buswidth = 32, + .num_links = 1, + .links = { SM8250_SLAVE_LLCC }, +}; + +static struct qcom_icc_node qnm_mnoc_sf = { + .name = "qnm_mnoc_sf", + .id = SM8250_MASTER_MNOC_SF_MEM_NOC, + .channels = 2, + .buswidth = 32, + .num_links = 2, + .links = { SM8250_SLAVE_LLCC, + SM8250_SLAVE_GEM_NOC_SNOC + }, +}; + +static struct qcom_icc_node qnm_pcie = { + .name = "qnm_pcie", + .id = SM8250_MASTER_ANOC_PCIE_GEM_NOC, + .channels = 1, + .buswidth = 16, + .num_links = 2, + .links = { SM8250_SLAVE_LLCC, + SM8250_SLAVE_GEM_NOC_SNOC + }, +}; + +static struct qcom_icc_node qnm_snoc_gc = { + .name = "qnm_snoc_gc", + .id = SM8250_MASTER_SNOC_GC_MEM_NOC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8250_SLAVE_LLCC }, +}; + +static struct qcom_icc_node qnm_snoc_sf = { + .name = "qnm_snoc_sf", + .id = SM8250_MASTER_SNOC_SF_MEM_NOC, + .channels = 1, + .buswidth = 16, + .num_links = 3, + .links = { SM8250_SLAVE_LLCC, + SM8250_SLAVE_GEM_NOC_SNOC, + SM8250_SLAVE_MEM_NOC_PCIE_SNOC + }, +}; + +static struct qcom_icc_node llcc_mc = { + .name = "llcc_mc", + .id = SM8250_MASTER_LLCC, + .channels = 4, + .buswidth = 4, + .num_links = 1, + .links = { SM8250_SLAVE_EBI_CH0 }, +}; + +static struct qcom_icc_node qhm_mnoc_cfg = { + .name = "qhm_mnoc_cfg", + .id = SM8250_MASTER_CNOC_MNOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8250_SLAVE_SERVICE_MNOC }, +}; + +static struct qcom_icc_node qnm_camnoc_hf = { + .name = "qnm_camnoc_hf", + .id = SM8250_MASTER_CAMNOC_HF, + .channels = 2, + .buswidth = 32, + .num_links = 1, + .links = { SM8250_SLAVE_MNOC_HF_MEM_NOC }, +}; + +static struct qcom_icc_node qnm_camnoc_icp = { + .name = "qnm_camnoc_icp", + .id = SM8250_MASTER_CAMNOC_ICP, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8250_SLAVE_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qnm_camnoc_sf = { + .name = "qnm_camnoc_sf", + .id = SM8250_MASTER_CAMNOC_SF, + .channels = 2, + .buswidth = 32, + .num_links = 1, + .links = { SM8250_SLAVE_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qnm_video0 = { + .name = "qnm_video0", + .id = SM8250_MASTER_VIDEO_P0, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SM8250_SLAVE_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qnm_video1 = { + .name = "qnm_video1", + .id = SM8250_MASTER_VIDEO_P1, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SM8250_SLAVE_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qnm_video_cvp = { + .name = "qnm_video_cvp", + .id = SM8250_MASTER_VIDEO_PROC, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SM8250_SLAVE_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qxm_mdp0 = { + .name = "qxm_mdp0", + .id = SM8250_MASTER_MDP_PORT0, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SM8250_SLAVE_MNOC_HF_MEM_NOC }, +}; + +static struct qcom_icc_node qxm_mdp1 = { + .name = "qxm_mdp1", + .id = SM8250_MASTER_MDP_PORT1, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SM8250_SLAVE_MNOC_HF_MEM_NOC }, +}; + +static struct qcom_icc_node qxm_rot = { + .name = "qxm_rot", + .id = SM8250_MASTER_ROTATOR, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SM8250_SLAVE_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node amm_npu_sys = { + .name = "amm_npu_sys", + .id = SM8250_MASTER_NPU_SYS, + .channels = 4, + .buswidth = 32, + .num_links = 1, + .links = { SM8250_SLAVE_NPU_COMPUTE_NOC }, +}; + +static struct qcom_icc_node amm_npu_sys_cdp_w = { + .name = "amm_npu_sys_cdp_w", + .id = SM8250_MASTER_NPU_CDP, + .channels = 2, + .buswidth = 16, + .num_links = 1, + .links = { SM8250_SLAVE_NPU_COMPUTE_NOC }, +}; + +static struct qcom_icc_node qhm_cfg = { + .name = "qhm_cfg", + .id = SM8250_MASTER_NPU_NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 9, + .links = { SM8250_SLAVE_SERVICE_NPU_NOC, + SM8250_SLAVE_ISENSE_CFG, + SM8250_SLAVE_NPU_LLM_CFG, + SM8250_SLAVE_NPU_INT_DMA_BWMON_CFG, + SM8250_SLAVE_NPU_CP, + SM8250_SLAVE_NPU_TCM, + SM8250_SLAVE_NPU_CAL_DP0, + SM8250_SLAVE_NPU_CAL_DP1, + SM8250_SLAVE_NPU_DPM + }, +}; + +static struct qcom_icc_node qhm_snoc_cfg = { + .name = "qhm_snoc_cfg", + .id = SM8250_MASTER_SNOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8250_SLAVE_SERVICE_SNOC }, +}; + +static struct qcom_icc_node qnm_aggre1_noc = { + .name = "qnm_aggre1_noc", + .id = SM8250_A1NOC_SNOC_MAS, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SM8250_SLAVE_SNOC_GEM_NOC_SF }, +}; + +static struct qcom_icc_node qnm_aggre2_noc = { + .name = "qnm_aggre2_noc", + .id = SM8250_A2NOC_SNOC_MAS, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SM8250_SLAVE_SNOC_GEM_NOC_SF }, +}; + +static struct qcom_icc_node qnm_gemnoc = { + .name = "qnm_gemnoc", + .id = SM8250_MASTER_GEM_NOC_SNOC, + .channels = 1, + .buswidth = 16, + .num_links = 6, + .links = { SM8250_SLAVE_PIMEM, + SM8250_SLAVE_OCIMEM, + SM8250_SLAVE_APPSS, + SM8250_SNOC_CNOC_SLV, + SM8250_SLAVE_TCU, + SM8250_SLAVE_QDSS_STM + }, +}; + +static struct qcom_icc_node qnm_gemnoc_pcie = { + .name = "qnm_gemnoc_pcie", + .id = SM8250_MASTER_GEM_NOC_PCIE_SNOC, + .channels = 1, + .buswidth = 8, + .num_links = 3, + .links = { SM8250_SLAVE_PCIE_2, + SM8250_SLAVE_PCIE_0, + SM8250_SLAVE_PCIE_1 + }, +}; + +static struct qcom_icc_node qxm_pimem = { + .name = "qxm_pimem", + .id = SM8250_MASTER_PIMEM, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8250_SLAVE_SNOC_GEM_NOC_GC }, +}; + +static struct qcom_icc_node xm_gic = { + .name = "xm_gic", + .id = SM8250_MASTER_GIC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8250_SLAVE_SNOC_GEM_NOC_GC }, +}; + +static struct qcom_icc_node qns_a1noc_snoc = { + .name = "qns_a1noc_snoc", + .id = SM8250_A1NOC_SNOC_SLV, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SM8250_A1NOC_SNOC_MAS }, +}; + +static struct qcom_icc_node qns_pcie_modem_mem_noc = { + .name = "qns_pcie_modem_mem_noc", + .id = SM8250_SLAVE_ANOC_PCIE_GEM_NOC_1, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SM8250_MASTER_ANOC_PCIE_GEM_NOC }, +}; + +static struct qcom_icc_node srvc_aggre1_noc = { + .name = "srvc_aggre1_noc", + .id = SM8250_SLAVE_SERVICE_A1NOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_a2noc_snoc = { + .name = "qns_a2noc_snoc", + .id = SM8250_A2NOC_SNOC_SLV, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SM8250_A2NOC_SNOC_MAS }, +}; + +static struct qcom_icc_node qns_pcie_mem_noc = { + .name = "qns_pcie_mem_noc", + .id = SM8250_SLAVE_ANOC_PCIE_GEM_NOC, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SM8250_MASTER_ANOC_PCIE_GEM_NOC }, +}; + +static struct qcom_icc_node srvc_aggre2_noc = { + .name = "srvc_aggre2_noc", + .id = SM8250_SLAVE_SERVICE_A2NOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_cdsp_mem_noc = { + .name = "qns_cdsp_mem_noc", + .id = SM8250_SLAVE_CDSP_MEM_NOC, + .channels = 2, + .buswidth = 32, + .num_links = 1, + .links = { SM8250_MASTER_COMPUTE_NOC }, +}; + +static struct qcom_icc_node qhs_a1_noc_cfg = { + .name = "qhs_a1_noc_cfg", + .id = SM8250_SLAVE_A1NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8250_MASTER_A1NOC_CFG }, +}; + +static struct qcom_icc_node qhs_a2_noc_cfg = { + .name = "qhs_a2_noc_cfg", + .id = SM8250_SLAVE_A2NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8250_MASTER_A2NOC_CFG }, +}; + +static struct qcom_icc_node qhs_ahb2phy0 = { + .name = "qhs_ahb2phy0", + .id = SM8250_SLAVE_AHB2PHY_SOUTH, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_ahb2phy1 = { + .name = "qhs_ahb2phy1", + .id = SM8250_SLAVE_AHB2PHY_NORTH, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_aoss = { + .name = "qhs_aoss", + .id = SM8250_SLAVE_AOSS, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_camera_cfg = { + .name = "qhs_camera_cfg", + .id = SM8250_SLAVE_CAMERA_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_clk_ctl = { + .name = "qhs_clk_ctl", + .id = SM8250_SLAVE_CLK_CTL, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_compute_dsp = { + .name = "qhs_compute_dsp", + .id = SM8250_SLAVE_CDSP_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_cpr_cx = { + .name = "qhs_cpr_cx", + .id = SM8250_SLAVE_RBCPR_CX_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_cpr_mmcx = { + .name = "qhs_cpr_mmcx", + .id = SM8250_SLAVE_RBCPR_MMCX_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_cpr_mx = { + .name = "qhs_cpr_mx", + .id = SM8250_SLAVE_RBCPR_MX_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_crypto0_cfg = { + .name = "qhs_crypto0_cfg", + .id = SM8250_SLAVE_CRYPTO_0_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_cx_rdpm = { + .name = "qhs_cx_rdpm", + .id = SM8250_SLAVE_CX_RDPM, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_dcc_cfg = { + .name = "qhs_dcc_cfg", + .id = SM8250_SLAVE_DCC_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_ddrss_cfg = { + .name = "qhs_ddrss_cfg", + .id = SM8250_SLAVE_CNOC_DDRSS, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8250_MASTER_CNOC_DC_NOC }, +}; + +static struct qcom_icc_node qhs_display_cfg = { + .name = "qhs_display_cfg", + .id = SM8250_SLAVE_DISPLAY_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_gpuss_cfg = { + .name = "qhs_gpuss_cfg", + .id = SM8250_SLAVE_GRAPHICS_3D_CFG, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node qhs_imem_cfg = { + .name = "qhs_imem_cfg", + .id = SM8250_SLAVE_IMEM_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_ipa = { + .name = "qhs_ipa", + .id = SM8250_SLAVE_IPA_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_ipc_router = { + .name = "qhs_ipc_router", + .id = SM8250_SLAVE_IPC_ROUTER_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_lpass_cfg = { + .name = "qhs_lpass_cfg", + .id = SM8250_SLAVE_LPASS, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_mnoc_cfg = { + .name = "qhs_mnoc_cfg", + .id = SM8250_SLAVE_CNOC_MNOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8250_MASTER_CNOC_MNOC_CFG }, +}; + +static struct qcom_icc_node qhs_npu_cfg = { + .name = "qhs_npu_cfg", + .id = SM8250_SLAVE_NPU_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8250_MASTER_NPU_NOC_CFG }, +}; + +static struct qcom_icc_node qhs_pcie0_cfg = { + .name = "qhs_pcie0_cfg", + .id = SM8250_SLAVE_PCIE_0_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_pcie1_cfg = { + .name = "qhs_pcie1_cfg", + .id = SM8250_SLAVE_PCIE_1_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_pcie_modem_cfg = { + .name = "qhs_pcie_modem_cfg", + .id = SM8250_SLAVE_PCIE_2_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_pdm = { + .name = "qhs_pdm", + .id = SM8250_SLAVE_PDM, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_pimem_cfg = { + .name = "qhs_pimem_cfg", + .id = SM8250_SLAVE_PIMEM_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_prng = { + .name = "qhs_prng", + .id = SM8250_SLAVE_PRNG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_qdss_cfg = { + .name = "qhs_qdss_cfg", + .id = SM8250_SLAVE_QDSS_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_qspi = { + .name = "qhs_qspi", + .id = SM8250_SLAVE_QSPI_0, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_qup0 = { + .name = "qhs_qup0", + .id = SM8250_SLAVE_QUP_0, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_qup1 = { + .name = "qhs_qup1", + .id = SM8250_SLAVE_QUP_1, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_qup2 = { + .name = "qhs_qup2", + .id = SM8250_SLAVE_QUP_2, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_sdc2 = { + .name = "qhs_sdc2", + .id = SM8250_SLAVE_SDCC_2, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_sdc4 = { + .name = "qhs_sdc4", + .id = SM8250_SLAVE_SDCC_4, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_snoc_cfg = { + .name = "qhs_snoc_cfg", + .id = SM8250_SLAVE_SNOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8250_MASTER_SNOC_CFG }, +}; + +static struct qcom_icc_node qhs_tcsr = { + .name = "qhs_tcsr", + .id = SM8250_SLAVE_TCSR, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_tlmm0 = { + .name = "qhs_tlmm0", + .id = SM8250_SLAVE_TLMM_NORTH, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_tlmm1 = { + .name = "qhs_tlmm1", + .id = SM8250_SLAVE_TLMM_SOUTH, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_tlmm2 = { + .name = "qhs_tlmm2", + .id = SM8250_SLAVE_TLMM_WEST, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_tsif = { + .name = "qhs_tsif", + .id = SM8250_SLAVE_TSIF, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_ufs_card_cfg = { + .name = "qhs_ufs_card_cfg", + .id = SM8250_SLAVE_UFS_CARD_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_ufs_mem_cfg = { + .name = "qhs_ufs_mem_cfg", + .id = SM8250_SLAVE_UFS_MEM_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_usb3_0 = { + .name = "qhs_usb3_0", + .id = SM8250_SLAVE_USB3, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_usb3_1 = { + .name = "qhs_usb3_1", + .id = SM8250_SLAVE_USB3_1, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_venus_cfg = { + .name = "qhs_venus_cfg", + .id = SM8250_SLAVE_VENUS_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_vsense_ctrl_cfg = { + .name = "qhs_vsense_ctrl_cfg", + .id = SM8250_SLAVE_VSENSE_CTRL_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_cnoc_a2noc = { + .name = "qns_cnoc_a2noc", + .id = SM8250_SLAVE_CNOC_A2NOC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8250_MASTER_CNOC_A2NOC }, +}; + +static struct qcom_icc_node srvc_cnoc = { + .name = "srvc_cnoc", + .id = SM8250_SLAVE_SERVICE_CNOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_llcc = { + .name = "qhs_llcc", + .id = SM8250_SLAVE_LLCC_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_memnoc = { + .name = "qhs_memnoc", + .id = SM8250_SLAVE_GEM_NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8250_MASTER_GEM_NOC_CFG }, +}; + +static struct qcom_icc_node qns_gem_noc_snoc = { + .name = "qns_gem_noc_snoc", + .id = SM8250_SLAVE_GEM_NOC_SNOC, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SM8250_MASTER_GEM_NOC_SNOC }, +}; + +static struct qcom_icc_node qns_llcc = { + .name = "qns_llcc", + .id = SM8250_SLAVE_LLCC, + .channels = 4, + .buswidth = 16, + .num_links = 1, + .links = { SM8250_MASTER_LLCC }, +}; + +static struct qcom_icc_node qns_sys_pcie = { + .name = "qns_sys_pcie", + .id = SM8250_SLAVE_MEM_NOC_PCIE_SNOC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8250_MASTER_GEM_NOC_PCIE_SNOC }, +}; + +static struct qcom_icc_node srvc_even_gemnoc = { + .name = "srvc_even_gemnoc", + .id = SM8250_SLAVE_SERVICE_GEM_NOC_1, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node srvc_odd_gemnoc = { + .name = "srvc_odd_gemnoc", + .id = SM8250_SLAVE_SERVICE_GEM_NOC_2, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node srvc_sys_gemnoc = { + .name = "srvc_sys_gemnoc", + .id = SM8250_SLAVE_SERVICE_GEM_NOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node ebi = { + .name = "ebi", + .id = SM8250_SLAVE_EBI_CH0, + .channels = 4, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_mem_noc_hf = { + .name = "qns_mem_noc_hf", + .id = SM8250_SLAVE_MNOC_HF_MEM_NOC, + .channels = 2, + .buswidth = 32, + .num_links = 1, + .links = { SM8250_MASTER_MNOC_HF_MEM_NOC }, +}; + +static struct qcom_icc_node qns_mem_noc_sf = { + .name = "qns_mem_noc_sf", + .id = SM8250_SLAVE_MNOC_SF_MEM_NOC, + .channels = 2, + .buswidth = 32, + .num_links = 1, + .links = { SM8250_MASTER_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node srvc_mnoc = { + .name = "srvc_mnoc", + .id = SM8250_SLAVE_SERVICE_MNOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_cal_dp0 = { + .name = "qhs_cal_dp0", + .id = SM8250_SLAVE_NPU_CAL_DP0, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_cal_dp1 = { + .name = "qhs_cal_dp1", + .id = SM8250_SLAVE_NPU_CAL_DP1, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_cp = { + .name = "qhs_cp", + .id = SM8250_SLAVE_NPU_CP, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_dma_bwmon = { + .name = "qhs_dma_bwmon", + .id = SM8250_SLAVE_NPU_INT_DMA_BWMON_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_dpm = { + .name = "qhs_dpm", + .id = SM8250_SLAVE_NPU_DPM, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_isense = { + .name = "qhs_isense", + .id = SM8250_SLAVE_ISENSE_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_llm = { + .name = "qhs_llm", + .id = SM8250_SLAVE_NPU_LLM_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_tcm = { + .name = "qhs_tcm", + .id = SM8250_SLAVE_NPU_TCM, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_npu_sys = { + .name = "qns_npu_sys", + .id = SM8250_SLAVE_NPU_COMPUTE_NOC, + .channels = 2, + .buswidth = 32, +}; + +static struct qcom_icc_node srvc_noc = { + .name = "srvc_noc", + .id = SM8250_SLAVE_SERVICE_NPU_NOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_apss = { + .name = "qhs_apss", + .id = SM8250_SLAVE_APPSS, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node qns_cnoc = { + .name = "qns_cnoc", + .id = SM8250_SNOC_CNOC_SLV, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8250_SNOC_CNOC_MAS }, +}; + +static struct qcom_icc_node qns_gemnoc_gc = { + .name = "qns_gemnoc_gc", + .id = SM8250_SLAVE_SNOC_GEM_NOC_GC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8250_MASTER_SNOC_GC_MEM_NOC }, +}; + +static struct qcom_icc_node qns_gemnoc_sf = { + .name = "qns_gemnoc_sf", + .id = SM8250_SLAVE_SNOC_GEM_NOC_SF, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SM8250_MASTER_SNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qxs_imem = { + .name = "qxs_imem", + .id = SM8250_SLAVE_OCIMEM, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node qxs_pimem = { + .name = "qxs_pimem", + .id = SM8250_SLAVE_PIMEM, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node srvc_snoc = { + .name = "srvc_snoc", + .id = SM8250_SLAVE_SERVICE_SNOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node xs_pcie_0 = { + .name = "xs_pcie_0", + .id = SM8250_SLAVE_PCIE_0, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node xs_pcie_1 = { + .name = "xs_pcie_1", + .id = SM8250_SLAVE_PCIE_1, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node xs_pcie_modem = { + .name = "xs_pcie_modem", + .id = SM8250_SLAVE_PCIE_2, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node xs_qdss_stm = { + .name = "xs_qdss_stm", + .id = SM8250_SLAVE_QDSS_STM, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node xs_sys_tcu_cfg = { + .name = "xs_sys_tcu_cfg", + .id = SM8250_SLAVE_TCU, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node qup0_core_master = { + .name = "qup0_core_master", + .id = SM8250_MASTER_QUP_CORE_0, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8250_SLAVE_QUP_CORE_0 }, +}; + +static struct qcom_icc_node qup1_core_master = { + .name = "qup1_core_master", + .id = SM8250_MASTER_QUP_CORE_1, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8250_SLAVE_QUP_CORE_1 }, +}; + +static struct qcom_icc_node qup2_core_master = { + .name = "qup2_core_master", + .id = SM8250_MASTER_QUP_CORE_2, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8250_SLAVE_QUP_CORE_2 }, +}; + +static struct qcom_icc_node qup0_core_slave = { + .name = "qup0_core_slave", + .id = SM8250_SLAVE_QUP_CORE_0, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qup1_core_slave = { + .name = "qup1_core_slave", + .id = SM8250_SLAVE_QUP_CORE_1, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qup2_core_slave = { + .name = "qup2_core_slave", + .id = SM8250_SLAVE_QUP_CORE_2, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_bcm bcm_acv = { + .name = "ACV", + .keepalive = false, + .num_nodes = 1, + .nodes = { &ebi }, +}; + +static struct qcom_icc_bcm bcm_mc0 = { + .name = "MC0", + .keepalive = true, + .num_nodes = 1, + .nodes = { &ebi }, +}; + +static struct qcom_icc_bcm bcm_sh0 = { + .name = "SH0", + .keepalive = true, + .num_nodes = 1, + .nodes = { &qns_llcc }, +}; + +static struct qcom_icc_bcm bcm_mm0 = { + .name = "MM0", + .keepalive = true, + .num_nodes = 1, + .nodes = { &qns_mem_noc_hf }, +}; + +static struct qcom_icc_bcm bcm_ce0 = { + .name = "CE0", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qxm_crypto }, +}; + +static struct qcom_icc_bcm bcm_mm1 = { + .name = "MM1", + .keepalive = false, + .num_nodes = 3, + .nodes = { &qnm_camnoc_hf, &qxm_mdp0, &qxm_mdp1 }, +}; + +static struct qcom_icc_bcm bcm_sh2 = { + .name = "SH2", + .keepalive = false, + .num_nodes = 2, + .nodes = { &alm_gpu_tcu, &alm_sys_tcu }, +}; + +static struct qcom_icc_bcm bcm_mm2 = { + .name = "MM2", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qns_mem_noc_sf }, +}; + +static struct qcom_icc_bcm bcm_qup0 = { + .name = "QUP0", + .keepalive = false, + .num_nodes = 3, + .nodes = { &qup0_core_master, &qup1_core_master, &qup2_core_master }, +}; + +static struct qcom_icc_bcm bcm_sh3 = { + .name = "SH3", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qnm_cmpnoc }, +}; + +static struct qcom_icc_bcm bcm_mm3 = { + .name = "MM3", + .keepalive = false, + .num_nodes = 5, + .nodes = { &qnm_camnoc_icp, &qnm_camnoc_sf, &qnm_video0, &qnm_video1, &qnm_video_cvp }, +}; + +static struct qcom_icc_bcm bcm_sh4 = { + .name = "SH4", + .keepalive = false, + .num_nodes = 1, + .nodes = { &chm_apps }, +}; + +static struct qcom_icc_bcm bcm_sn0 = { + .name = "SN0", + .keepalive = true, + .num_nodes = 1, + .nodes = { &qns_gemnoc_sf }, +}; + +static struct qcom_icc_bcm bcm_co0 = { + .name = "CO0", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qns_cdsp_mem_noc }, +}; + +static struct qcom_icc_bcm bcm_cn0 = { + .name = "CN0", + .keepalive = true, + .num_nodes = 52, + .nodes = { &qnm_snoc, + &xm_qdss_dap, + &qhs_a1_noc_cfg, + &qhs_a2_noc_cfg, + &qhs_ahb2phy0, + &qhs_ahb2phy1, + &qhs_aoss, + &qhs_camera_cfg, + &qhs_clk_ctl, + &qhs_compute_dsp, + &qhs_cpr_cx, + &qhs_cpr_mmcx, + &qhs_cpr_mx, + &qhs_crypto0_cfg, + &qhs_cx_rdpm, + &qhs_dcc_cfg, + &qhs_ddrss_cfg, + &qhs_display_cfg, + &qhs_gpuss_cfg, + &qhs_imem_cfg, + &qhs_ipa, + &qhs_ipc_router, + &qhs_lpass_cfg, + &qhs_mnoc_cfg, + &qhs_npu_cfg, + &qhs_pcie0_cfg, + &qhs_pcie1_cfg, + &qhs_pcie_modem_cfg, + &qhs_pdm, + &qhs_pimem_cfg, + &qhs_prng, + &qhs_qdss_cfg, + &qhs_qspi, + &qhs_qup0, + &qhs_qup1, + &qhs_qup2, + &qhs_sdc2, + &qhs_sdc4, + &qhs_snoc_cfg, + &qhs_tcsr, + &qhs_tlmm0, + &qhs_tlmm1, + &qhs_tlmm2, + &qhs_tsif, + &qhs_ufs_card_cfg, + &qhs_ufs_mem_cfg, + &qhs_usb3_0, + &qhs_usb3_1, + &qhs_venus_cfg, + &qhs_vsense_ctrl_cfg, + &qns_cnoc_a2noc, + &srvc_cnoc + }, +}; + +static struct qcom_icc_bcm bcm_sn1 = { + .name = "SN1", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qxs_imem }, +}; + +static struct qcom_icc_bcm bcm_sn2 = { + .name = "SN2", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qns_gemnoc_gc }, +}; + +static struct qcom_icc_bcm bcm_co2 = { + .name = "CO2", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qnm_npu }, +}; + +static struct qcom_icc_bcm bcm_sn3 = { + .name = "SN3", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qxs_pimem }, +}; + +static struct qcom_icc_bcm bcm_sn4 = { + .name = "SN4", + .keepalive = false, + .num_nodes = 1, + .nodes = { &xs_qdss_stm }, +}; + +static struct qcom_icc_bcm bcm_sn5 = { + .name = "SN5", + .keepalive = false, + .num_nodes = 1, + .nodes = { &xs_pcie_modem }, +}; + +static struct qcom_icc_bcm bcm_sn6 = { + .name = "SN6", + .keepalive = false, + .num_nodes = 2, + .nodes = { &xs_pcie_0, &xs_pcie_1 }, +}; + +static struct qcom_icc_bcm bcm_sn7 = { + .name = "SN7", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qnm_aggre1_noc }, +}; + +static struct qcom_icc_bcm bcm_sn8 = { + .name = "SN8", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qnm_aggre2_noc }, +}; + +static struct qcom_icc_bcm bcm_sn9 = { + .name = "SN9", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qnm_gemnoc_pcie }, +}; + +static struct qcom_icc_bcm bcm_sn11 = { + .name = "SN11", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qnm_gemnoc }, +}; + +static struct qcom_icc_bcm bcm_sn12 = { + .name = "SN12", + .keepalive = false, + .num_nodes = 2, + .nodes = { &qns_pcie_modem_mem_noc, &qns_pcie_mem_noc }, +}; static struct qcom_icc_bcm * const aggre1_noc_bcms[] = { - &bcm_qup0, &bcm_sn12, }; @@ -222,10 +1665,29 @@ static const struct qcom_icc_desc sm8250_aggre1_noc = { static struct qcom_icc_bcm * const aggre2_noc_bcms[] = { &bcm_ce0, - &bcm_qup0, &bcm_sn12, }; +static struct qcom_icc_bcm * const qup_virt_bcms[] = { + &bcm_qup0, +}; + +static struct qcom_icc_node *qup_virt_nodes[] = { + [MASTER_QUP_CORE_0] = &qup0_core_master, + [MASTER_QUP_CORE_1] = &qup1_core_master, + [MASTER_QUP_CORE_2] = &qup2_core_master, + [SLAVE_QUP_CORE_0] = &qup0_core_slave, + [SLAVE_QUP_CORE_1] = &qup1_core_slave, + [SLAVE_QUP_CORE_2] = &qup2_core_slave, +}; + +static const struct qcom_icc_desc sm8250_qup_virt = { + .nodes = qup_virt_nodes, + .num_nodes = ARRAY_SIZE(qup_virt_nodes), + .bcms = qup_virt_bcms, + .num_bcms = ARRAY_SIZE(qup_virt_bcms), +}; + static struct qcom_icc_node * const aggre2_noc_nodes[] = { [MASTER_A2NOC_CFG] = &qhm_a2noc_cfg, [MASTER_QDSS_BAM] = &qhm_qdss_bam, @@ -518,6 +1980,8 @@ static const struct of_device_id qnoc_of_match[] = { .data = &sm8250_mmss_noc}, { .compatible = "qcom,sm8250-npu-noc", .data = &sm8250_npu_noc}, + { .compatible = "qcom,sm8250-qup-virt", + .data = &sm8250_qup_virt }, { .compatible = "qcom,sm8250-system-noc", .data = &sm8250_system_noc}, { } diff --git a/drivers/interconnect/qcom/sm8250.h b/drivers/interconnect/qcom/sm8250.h index 209ab195f21f..032665093c5b 100644 --- a/drivers/interconnect/qcom/sm8250.h +++ b/drivers/interconnect/qcom/sm8250.h @@ -158,5 +158,11 @@ #define SM8250_SLAVE_VSENSE_CTRL_CFG 147 #define SM8250_SNOC_CNOC_MAS 148 #define SM8250_SNOC_CNOC_SLV 149 +#define SM8250_MASTER_QUP_CORE_0 150 +#define SM8250_MASTER_QUP_CORE_1 151 +#define SM8250_MASTER_QUP_CORE_2 152 +#define SM8250_SLAVE_QUP_CORE_0 153 +#define SM8250_SLAVE_QUP_CORE_1 154 +#define SM8250_SLAVE_QUP_CORE_2 155 #endif diff --git a/drivers/interconnect/qcom/sm8350.c b/drivers/interconnect/qcom/sm8350.c index 5398e7c8d826..bdf75839e6d1 100644 --- a/drivers/interconnect/qcom/sm8350.c +++ b/drivers/interconnect/qcom/sm8350.c @@ -7,196 +7,1629 @@ #include #include -#include +#include +#include #include #include "bcm-voter.h" #include "icc-rpmh.h" #include "sm8350.h" -DEFINE_QNODE(qhm_qspi, SM8350_MASTER_QSPI_0, 1, 4, SM8350_SLAVE_A1NOC_SNOC); -DEFINE_QNODE(qhm_qup0, SM8350_MASTER_QUP_0, 1, 4, SM8350_SLAVE_A2NOC_SNOC); -DEFINE_QNODE(qhm_qup1, SM8350_MASTER_QUP_1, 1, 4, SM8350_SLAVE_A1NOC_SNOC); -DEFINE_QNODE(qhm_qup2, SM8350_MASTER_QUP_2, 1, 4, SM8350_SLAVE_A2NOC_SNOC); -DEFINE_QNODE(qnm_a1noc_cfg, SM8350_MASTER_A1NOC_CFG, 1, 4, SM8350_SLAVE_SERVICE_A1NOC); -DEFINE_QNODE(xm_sdc4, SM8350_MASTER_SDCC_4, 1, 8, SM8350_SLAVE_A1NOC_SNOC); -DEFINE_QNODE(xm_ufs_mem, SM8350_MASTER_UFS_MEM, 1, 8, SM8350_SLAVE_A1NOC_SNOC); -DEFINE_QNODE(xm_usb3_0, SM8350_MASTER_USB3_0, 1, 8, SM8350_SLAVE_A1NOC_SNOC); -DEFINE_QNODE(xm_usb3_1, SM8350_MASTER_USB3_1, 1, 8, SM8350_SLAVE_A1NOC_SNOC); -DEFINE_QNODE(qhm_qdss_bam, SM8350_MASTER_QDSS_BAM, 1, 4, SM8350_SLAVE_A2NOC_SNOC); -DEFINE_QNODE(qnm_a2noc_cfg, SM8350_MASTER_A2NOC_CFG, 1, 4, SM8350_SLAVE_SERVICE_A2NOC); -DEFINE_QNODE(qxm_crypto, SM8350_MASTER_CRYPTO, 1, 8, SM8350_SLAVE_A2NOC_SNOC); -DEFINE_QNODE(qxm_ipa, SM8350_MASTER_IPA, 1, 8, SM8350_SLAVE_A2NOC_SNOC); -DEFINE_QNODE(xm_pcie3_0, SM8350_MASTER_PCIE_0, 1, 8, SM8350_SLAVE_ANOC_PCIE_GEM_NOC); -DEFINE_QNODE(xm_pcie3_1, SM8350_MASTER_PCIE_1, 1, 8, SM8350_SLAVE_ANOC_PCIE_GEM_NOC); -DEFINE_QNODE(xm_qdss_etr, SM8350_MASTER_QDSS_ETR, 1, 8, SM8350_SLAVE_A2NOC_SNOC); -DEFINE_QNODE(xm_sdc2, SM8350_MASTER_SDCC_2, 1, 8, SM8350_SLAVE_A2NOC_SNOC); -DEFINE_QNODE(xm_ufs_card, SM8350_MASTER_UFS_CARD, 1, 8, SM8350_SLAVE_A2NOC_SNOC); -DEFINE_QNODE(qnm_gemnoc_cnoc, SM8350_MASTER_GEM_NOC_CNOC, 1, 16, SM8350_SLAVE_AHB2PHY_SOUTH, SM8350_SLAVE_AHB2PHY_NORTH, SM8350_SLAVE_AOSS, SM8350_SLAVE_APPSS, SM8350_SLAVE_CAMERA_CFG, SM8350_SLAVE_CLK_CTL, SM8350_SLAVE_CDSP_CFG, SM8350_SLAVE_RBCPR_CX_CFG, SM8350_SLAVE_RBCPR_MMCX_CFG, SM8350_SLAVE_RBCPR_MX_CFG, SM8350_SLAVE_CRYPTO_0_CFG, SM8350_SLAVE_CX_RDPM, SM8350_SLAVE_DCC_CFG, SM8350_SLAVE_DISPLAY_CFG, SM8350_SLAVE_GFX3D_CFG, SM8350_SLAVE_HWKM, SM8350_SLAVE_IMEM_CFG, SM8350_SLAVE_IPA_CFG, SM8350_SLAVE_IPC_ROUTER_CFG, SM8350_SLAVE_LPASS, SM8350_SLAVE_CNOC_MSS, SM8350_SLAVE_MX_RDPM, SM8350_SLAVE_PCIE_0_CFG, SM8350_SLAVE_PCIE_1_CFG, SM8350_SLAVE_PDM, SM8350_SLAVE_PIMEM_CFG, SM8350_SLAVE_PKA_WRAPPER_CFG, SM8350_SLAVE_PMU_WRAPPER_CFG, SM8350_SLAVE_QDSS_CFG, SM8350_SLAVE_QSPI_0, SM8350_SLAVE_QUP_0, SM8350_SLAVE_QUP_1, SM8350_SLAVE_QUP_2, SM8350_SLAVE_SDCC_2, SM8350_SLAVE_SDCC_4, SM8350_SLAVE_SECURITY, SM8350_SLAVE_SPSS_CFG, SM8350_SLAVE_TCSR, SM8350_SLAVE_TLMM, SM8350_SLAVE_UFS_CARD_CFG, SM8350_SLAVE_UFS_MEM_CFG, SM8350_SLAVE_USB3_0, SM8350_SLAVE_USB3_1, SM8350_SLAVE_VENUS_CFG, SM8350_SLAVE_VSENSE_CTRL_CFG, SM8350_SLAVE_A1NOC_CFG, SM8350_SLAVE_A2NOC_CFG, SM8350_SLAVE_DDRSS_CFG, SM8350_SLAVE_CNOC_MNOC_CFG, SM8350_SLAVE_SNOC_CFG, SM8350_SLAVE_BOOT_IMEM, SM8350_SLAVE_IMEM, SM8350_SLAVE_PIMEM, SM8350_SLAVE_SERVICE_CNOC, SM8350_SLAVE_QDSS_STM, SM8350_SLAVE_TCU); -DEFINE_QNODE(qnm_gemnoc_pcie, SM8350_MASTER_GEM_NOC_PCIE_SNOC, 1, 8, SM8350_SLAVE_PCIE_0, SM8350_SLAVE_PCIE_1); -DEFINE_QNODE(xm_qdss_dap, SM8350_MASTER_QDSS_DAP, 1, 8, SM8350_SLAVE_AHB2PHY_SOUTH, SM8350_SLAVE_AHB2PHY_NORTH, SM8350_SLAVE_AOSS, SM8350_SLAVE_APPSS, SM8350_SLAVE_CAMERA_CFG, SM8350_SLAVE_CLK_CTL, SM8350_SLAVE_CDSP_CFG, SM8350_SLAVE_RBCPR_CX_CFG, SM8350_SLAVE_RBCPR_MMCX_CFG, SM8350_SLAVE_RBCPR_MX_CFG, SM8350_SLAVE_CRYPTO_0_CFG, SM8350_SLAVE_CX_RDPM, SM8350_SLAVE_DCC_CFG, SM8350_SLAVE_DISPLAY_CFG, SM8350_SLAVE_GFX3D_CFG, SM8350_SLAVE_HWKM, SM8350_SLAVE_IMEM_CFG, SM8350_SLAVE_IPA_CFG, SM8350_SLAVE_IPC_ROUTER_CFG, SM8350_SLAVE_LPASS, SM8350_SLAVE_CNOC_MSS, SM8350_SLAVE_MX_RDPM, SM8350_SLAVE_PCIE_0_CFG, SM8350_SLAVE_PCIE_1_CFG, SM8350_SLAVE_PDM, SM8350_SLAVE_PIMEM_CFG, SM8350_SLAVE_PKA_WRAPPER_CFG, SM8350_SLAVE_PMU_WRAPPER_CFG, SM8350_SLAVE_QDSS_CFG, SM8350_SLAVE_QSPI_0, SM8350_SLAVE_QUP_0, SM8350_SLAVE_QUP_1, SM8350_SLAVE_QUP_2, SM8350_SLAVE_SDCC_2, SM8350_SLAVE_SDCC_4, SM8350_SLAVE_SECURITY, SM8350_SLAVE_SPSS_CFG, SM8350_SLAVE_TCSR, SM8350_SLAVE_TLMM, SM8350_SLAVE_UFS_CARD_CFG, SM8350_SLAVE_UFS_MEM_CFG, SM8350_SLAVE_USB3_0, SM8350_SLAVE_USB3_1, SM8350_SLAVE_VENUS_CFG, SM8350_SLAVE_VSENSE_CTRL_CFG, SM8350_SLAVE_A1NOC_CFG, SM8350_SLAVE_A2NOC_CFG, SM8350_SLAVE_DDRSS_CFG, SM8350_SLAVE_CNOC_MNOC_CFG, SM8350_SLAVE_SNOC_CFG, SM8350_SLAVE_BOOT_IMEM, SM8350_SLAVE_IMEM, SM8350_SLAVE_PIMEM, SM8350_SLAVE_SERVICE_CNOC, SM8350_SLAVE_QDSS_STM, SM8350_SLAVE_TCU); -DEFINE_QNODE(qnm_cnoc_dc_noc, SM8350_MASTER_CNOC_DC_NOC, 1, 4, SM8350_SLAVE_LLCC_CFG, SM8350_SLAVE_GEM_NOC_CFG); -DEFINE_QNODE(alm_gpu_tcu, SM8350_MASTER_GPU_TCU, 1, 8, SM8350_SLAVE_GEM_NOC_CNOC, SM8350_SLAVE_LLCC); -DEFINE_QNODE(alm_sys_tcu, SM8350_MASTER_SYS_TCU, 1, 8, SM8350_SLAVE_GEM_NOC_CNOC, SM8350_SLAVE_LLCC); -DEFINE_QNODE(chm_apps, SM8350_MASTER_APPSS_PROC, 2, 32, SM8350_SLAVE_GEM_NOC_CNOC, SM8350_SLAVE_LLCC, SM8350_SLAVE_MEM_NOC_PCIE_SNOC); -DEFINE_QNODE(qnm_cmpnoc, SM8350_MASTER_COMPUTE_NOC, 2, 32, SM8350_SLAVE_GEM_NOC_CNOC, SM8350_SLAVE_LLCC); -DEFINE_QNODE(qnm_gemnoc_cfg, SM8350_MASTER_GEM_NOC_CFG, 1, 4, SM8350_SLAVE_MSS_PROC_MS_MPU_CFG, SM8350_SLAVE_MCDMA_MS_MPU_CFG, SM8350_SLAVE_SERVICE_GEM_NOC_1, SM8350_SLAVE_SERVICE_GEM_NOC_2, SM8350_SLAVE_SERVICE_GEM_NOC); -DEFINE_QNODE(qnm_gpu, SM8350_MASTER_GFX3D, 2, 32, SM8350_SLAVE_GEM_NOC_CNOC, SM8350_SLAVE_LLCC); -DEFINE_QNODE(qnm_mnoc_hf, SM8350_MASTER_MNOC_HF_MEM_NOC, 2, 32, SM8350_SLAVE_LLCC); -DEFINE_QNODE(qnm_mnoc_sf, SM8350_MASTER_MNOC_SF_MEM_NOC, 2, 32, SM8350_SLAVE_GEM_NOC_CNOC, SM8350_SLAVE_LLCC); -DEFINE_QNODE(qnm_pcie, SM8350_MASTER_ANOC_PCIE_GEM_NOC, 1, 16, SM8350_SLAVE_GEM_NOC_CNOC, SM8350_SLAVE_LLCC); -DEFINE_QNODE(qnm_snoc_gc, SM8350_MASTER_SNOC_GC_MEM_NOC, 1, 8, SM8350_SLAVE_LLCC); -DEFINE_QNODE(qnm_snoc_sf, SM8350_MASTER_SNOC_SF_MEM_NOC, 1, 16, SM8350_SLAVE_GEM_NOC_CNOC, SM8350_SLAVE_LLCC, SM8350_SLAVE_MEM_NOC_PCIE_SNOC); -DEFINE_QNODE(qhm_config_noc, SM8350_MASTER_CNOC_LPASS_AG_NOC, 1, 4, SM8350_SLAVE_LPASS_CORE_CFG, SM8350_SLAVE_LPASS_LPI_CFG, SM8350_SLAVE_LPASS_MPU_CFG, SM8350_SLAVE_LPASS_TOP_CFG, SM8350_SLAVE_SERVICES_LPASS_AML_NOC, SM8350_SLAVE_SERVICE_LPASS_AG_NOC); -DEFINE_QNODE(llcc_mc, SM8350_MASTER_LLCC, 4, 4, SM8350_SLAVE_EBI1); -DEFINE_QNODE(qnm_camnoc_hf, SM8350_MASTER_CAMNOC_HF, 2, 32, SM8350_SLAVE_MNOC_HF_MEM_NOC); -DEFINE_QNODE(qnm_camnoc_icp, SM8350_MASTER_CAMNOC_ICP, 1, 8, SM8350_SLAVE_MNOC_SF_MEM_NOC); -DEFINE_QNODE(qnm_camnoc_sf, SM8350_MASTER_CAMNOC_SF, 2, 32, SM8350_SLAVE_MNOC_SF_MEM_NOC); -DEFINE_QNODE(qnm_mnoc_cfg, SM8350_MASTER_CNOC_MNOC_CFG, 1, 4, SM8350_SLAVE_SERVICE_MNOC); -DEFINE_QNODE(qnm_video0, SM8350_MASTER_VIDEO_P0, 1, 32, SM8350_SLAVE_MNOC_SF_MEM_NOC); -DEFINE_QNODE(qnm_video1, SM8350_MASTER_VIDEO_P1, 1, 32, SM8350_SLAVE_MNOC_SF_MEM_NOC); -DEFINE_QNODE(qnm_video_cvp, SM8350_MASTER_VIDEO_PROC, 1, 32, SM8350_SLAVE_MNOC_SF_MEM_NOC); -DEFINE_QNODE(qxm_mdp0, SM8350_MASTER_MDP0, 1, 32, SM8350_SLAVE_MNOC_HF_MEM_NOC); -DEFINE_QNODE(qxm_mdp1, SM8350_MASTER_MDP1, 1, 32, SM8350_SLAVE_MNOC_HF_MEM_NOC); -DEFINE_QNODE(qxm_rot, SM8350_MASTER_ROTATOR, 1, 32, SM8350_SLAVE_MNOC_SF_MEM_NOC); -DEFINE_QNODE(qhm_nsp_noc_config, SM8350_MASTER_CDSP_NOC_CFG, 1, 4, SM8350_SLAVE_SERVICE_NSP_NOC); -DEFINE_QNODE(qxm_nsp, SM8350_MASTER_CDSP_PROC, 2, 32, SM8350_SLAVE_CDSP_MEM_NOC); -DEFINE_QNODE(qnm_aggre1_noc, SM8350_MASTER_A1NOC_SNOC, 1, 16, SM8350_SLAVE_SNOC_GEM_NOC_SF); -DEFINE_QNODE(qnm_aggre2_noc, SM8350_MASTER_A2NOC_SNOC, 1, 16, SM8350_SLAVE_SNOC_GEM_NOC_SF); -DEFINE_QNODE(qnm_snoc_cfg, SM8350_MASTER_SNOC_CFG, 1, 4, SM8350_SLAVE_SERVICE_SNOC); -DEFINE_QNODE(qxm_pimem, SM8350_MASTER_PIMEM, 1, 8, SM8350_SLAVE_SNOC_GEM_NOC_GC); -DEFINE_QNODE(xm_gic, SM8350_MASTER_GIC, 1, 8, SM8350_SLAVE_SNOC_GEM_NOC_GC); -DEFINE_QNODE(qnm_mnoc_hf_disp, SM8350_MASTER_MNOC_HF_MEM_NOC_DISP, 2, 32, SM8350_SLAVE_LLCC_DISP); -DEFINE_QNODE(qnm_mnoc_sf_disp, SM8350_MASTER_MNOC_SF_MEM_NOC_DISP, 2, 32, SM8350_SLAVE_LLCC_DISP); -DEFINE_QNODE(llcc_mc_disp, SM8350_MASTER_LLCC_DISP, 4, 4, SM8350_SLAVE_EBI1_DISP); -DEFINE_QNODE(qxm_mdp0_disp, SM8350_MASTER_MDP0_DISP, 1, 32, SM8350_SLAVE_MNOC_HF_MEM_NOC_DISP); -DEFINE_QNODE(qxm_mdp1_disp, SM8350_MASTER_MDP1_DISP, 1, 32, SM8350_SLAVE_MNOC_HF_MEM_NOC_DISP); -DEFINE_QNODE(qxm_rot_disp, SM8350_MASTER_ROTATOR_DISP, 1, 32, SM8350_SLAVE_MNOC_SF_MEM_NOC_DISP); -DEFINE_QNODE(qns_a1noc_snoc, SM8350_SLAVE_A1NOC_SNOC, 1, 16, SM8350_MASTER_A1NOC_SNOC); -DEFINE_QNODE(srvc_aggre1_noc, SM8350_SLAVE_SERVICE_A1NOC, 1, 4); -DEFINE_QNODE(qns_a2noc_snoc, SM8350_SLAVE_A2NOC_SNOC, 1, 16, SM8350_MASTER_A2NOC_SNOC); -DEFINE_QNODE(qns_pcie_mem_noc, SM8350_SLAVE_ANOC_PCIE_GEM_NOC, 1, 16, SM8350_MASTER_ANOC_PCIE_GEM_NOC); -DEFINE_QNODE(srvc_aggre2_noc, SM8350_SLAVE_SERVICE_A2NOC, 1, 4); -DEFINE_QNODE(qhs_ahb2phy0, SM8350_SLAVE_AHB2PHY_SOUTH, 1, 4); -DEFINE_QNODE(qhs_ahb2phy1, SM8350_SLAVE_AHB2PHY_NORTH, 1, 4); -DEFINE_QNODE(qhs_aoss, SM8350_SLAVE_AOSS, 1, 4); -DEFINE_QNODE(qhs_apss, SM8350_SLAVE_APPSS, 1, 8); -DEFINE_QNODE(qhs_camera_cfg, SM8350_SLAVE_CAMERA_CFG, 1, 4); -DEFINE_QNODE(qhs_clk_ctl, SM8350_SLAVE_CLK_CTL, 1, 4); -DEFINE_QNODE(qhs_compute_cfg, SM8350_SLAVE_CDSP_CFG, 1, 4); -DEFINE_QNODE(qhs_cpr_cx, SM8350_SLAVE_RBCPR_CX_CFG, 1, 4); -DEFINE_QNODE(qhs_cpr_mmcx, SM8350_SLAVE_RBCPR_MMCX_CFG, 1, 4); -DEFINE_QNODE(qhs_cpr_mx, SM8350_SLAVE_RBCPR_MX_CFG, 1, 4); -DEFINE_QNODE(qhs_crypto0_cfg, SM8350_SLAVE_CRYPTO_0_CFG, 1, 4); -DEFINE_QNODE(qhs_cx_rdpm, SM8350_SLAVE_CX_RDPM, 1, 4); -DEFINE_QNODE(qhs_dcc_cfg, SM8350_SLAVE_DCC_CFG, 1, 4); -DEFINE_QNODE(qhs_display_cfg, SM8350_SLAVE_DISPLAY_CFG, 1, 4); -DEFINE_QNODE(qhs_gpuss_cfg, SM8350_SLAVE_GFX3D_CFG, 1, 8); -DEFINE_QNODE(qhs_hwkm, SM8350_SLAVE_HWKM, 1, 4); -DEFINE_QNODE(qhs_imem_cfg, SM8350_SLAVE_IMEM_CFG, 1, 4); -DEFINE_QNODE(qhs_ipa, SM8350_SLAVE_IPA_CFG, 1, 4); -DEFINE_QNODE(qhs_ipc_router, SM8350_SLAVE_IPC_ROUTER_CFG, 1, 4); -DEFINE_QNODE(qhs_lpass_cfg, SM8350_SLAVE_LPASS, 1, 4, SM8350_MASTER_CNOC_LPASS_AG_NOC); -DEFINE_QNODE(qhs_mss_cfg, SM8350_SLAVE_CNOC_MSS, 1, 4); -DEFINE_QNODE(qhs_mx_rdpm, SM8350_SLAVE_MX_RDPM, 1, 4); -DEFINE_QNODE(qhs_pcie0_cfg, SM8350_SLAVE_PCIE_0_CFG, 1, 4); -DEFINE_QNODE(qhs_pcie1_cfg, SM8350_SLAVE_PCIE_1_CFG, 1, 4); -DEFINE_QNODE(qhs_pdm, SM8350_SLAVE_PDM, 1, 4); -DEFINE_QNODE(qhs_pimem_cfg, SM8350_SLAVE_PIMEM_CFG, 1, 4); -DEFINE_QNODE(qhs_pka_wrapper_cfg, SM8350_SLAVE_PKA_WRAPPER_CFG, 1, 4); -DEFINE_QNODE(qhs_pmu_wrapper_cfg, SM8350_SLAVE_PMU_WRAPPER_CFG, 1, 4); -DEFINE_QNODE(qhs_qdss_cfg, SM8350_SLAVE_QDSS_CFG, 1, 4); -DEFINE_QNODE(qhs_qspi, SM8350_SLAVE_QSPI_0, 1, 4); -DEFINE_QNODE(qhs_qup0, SM8350_SLAVE_QUP_0, 1, 4); -DEFINE_QNODE(qhs_qup1, SM8350_SLAVE_QUP_1, 1, 4); -DEFINE_QNODE(qhs_qup2, SM8350_SLAVE_QUP_2, 1, 4); -DEFINE_QNODE(qhs_sdc2, SM8350_SLAVE_SDCC_2, 1, 4); -DEFINE_QNODE(qhs_sdc4, SM8350_SLAVE_SDCC_4, 1, 4); -DEFINE_QNODE(qhs_security, SM8350_SLAVE_SECURITY, 1, 4); -DEFINE_QNODE(qhs_spss_cfg, SM8350_SLAVE_SPSS_CFG, 1, 4); -DEFINE_QNODE(qhs_tcsr, SM8350_SLAVE_TCSR, 1, 4); -DEFINE_QNODE(qhs_tlmm, SM8350_SLAVE_TLMM, 1, 4); -DEFINE_QNODE(qhs_ufs_card_cfg, SM8350_SLAVE_UFS_CARD_CFG, 1, 4); -DEFINE_QNODE(qhs_ufs_mem_cfg, SM8350_SLAVE_UFS_MEM_CFG, 1, 4); -DEFINE_QNODE(qhs_usb3_0, SM8350_SLAVE_USB3_0, 1, 4); -DEFINE_QNODE(qhs_usb3_1, SM8350_SLAVE_USB3_1, 1, 4); -DEFINE_QNODE(qhs_venus_cfg, SM8350_SLAVE_VENUS_CFG, 1, 4); -DEFINE_QNODE(qhs_vsense_ctrl_cfg, SM8350_SLAVE_VSENSE_CTRL_CFG, 1, 4); -DEFINE_QNODE(qns_a1_noc_cfg, SM8350_SLAVE_A1NOC_CFG, 1, 4); -DEFINE_QNODE(qns_a2_noc_cfg, SM8350_SLAVE_A2NOC_CFG, 1, 4); -DEFINE_QNODE(qns_ddrss_cfg, SM8350_SLAVE_DDRSS_CFG, 1, 4); -DEFINE_QNODE(qns_mnoc_cfg, SM8350_SLAVE_CNOC_MNOC_CFG, 1, 4); -DEFINE_QNODE(qns_snoc_cfg, SM8350_SLAVE_SNOC_CFG, 1, 4); -DEFINE_QNODE(qxs_boot_imem, SM8350_SLAVE_BOOT_IMEM, 1, 8); -DEFINE_QNODE(qxs_imem, SM8350_SLAVE_IMEM, 1, 8); -DEFINE_QNODE(qxs_pimem, SM8350_SLAVE_PIMEM, 1, 8); -DEFINE_QNODE(srvc_cnoc, SM8350_SLAVE_SERVICE_CNOC, 1, 4); -DEFINE_QNODE(xs_pcie_0, SM8350_SLAVE_PCIE_0, 1, 8); -DEFINE_QNODE(xs_pcie_1, SM8350_SLAVE_PCIE_1, 1, 8); -DEFINE_QNODE(xs_qdss_stm, SM8350_SLAVE_QDSS_STM, 1, 4); -DEFINE_QNODE(xs_sys_tcu_cfg, SM8350_SLAVE_TCU, 1, 8); -DEFINE_QNODE(qhs_llcc, SM8350_SLAVE_LLCC_CFG, 1, 4); -DEFINE_QNODE(qns_gemnoc, SM8350_SLAVE_GEM_NOC_CFG, 1, 4); -DEFINE_QNODE(qhs_mdsp_ms_mpu_cfg, SM8350_SLAVE_MSS_PROC_MS_MPU_CFG, 1, 4); -DEFINE_QNODE(qhs_modem_ms_mpu_cfg, SM8350_SLAVE_MCDMA_MS_MPU_CFG, 1, 4); -DEFINE_QNODE(qns_gem_noc_cnoc, SM8350_SLAVE_GEM_NOC_CNOC, 1, 16, SM8350_MASTER_GEM_NOC_CNOC); -DEFINE_QNODE(qns_llcc, SM8350_SLAVE_LLCC, 4, 16, SM8350_MASTER_LLCC); -DEFINE_QNODE(qns_pcie, SM8350_SLAVE_MEM_NOC_PCIE_SNOC, 1, 8); -DEFINE_QNODE(srvc_even_gemnoc, SM8350_SLAVE_SERVICE_GEM_NOC_1, 1, 4); -DEFINE_QNODE(srvc_odd_gemnoc, SM8350_SLAVE_SERVICE_GEM_NOC_2, 1, 4); -DEFINE_QNODE(srvc_sys_gemnoc, SM8350_SLAVE_SERVICE_GEM_NOC, 1, 4); -DEFINE_QNODE(qhs_lpass_core, SM8350_SLAVE_LPASS_CORE_CFG, 1, 4); -DEFINE_QNODE(qhs_lpass_lpi, SM8350_SLAVE_LPASS_LPI_CFG, 1, 4); -DEFINE_QNODE(qhs_lpass_mpu, SM8350_SLAVE_LPASS_MPU_CFG, 1, 4); -DEFINE_QNODE(qhs_lpass_top, SM8350_SLAVE_LPASS_TOP_CFG, 1, 4); -DEFINE_QNODE(srvc_niu_aml_noc, SM8350_SLAVE_SERVICES_LPASS_AML_NOC, 1, 4); -DEFINE_QNODE(srvc_niu_lpass_agnoc, SM8350_SLAVE_SERVICE_LPASS_AG_NOC, 1, 4); -DEFINE_QNODE(ebi, SM8350_SLAVE_EBI1, 4, 4); -DEFINE_QNODE(qns_mem_noc_hf, SM8350_SLAVE_MNOC_HF_MEM_NOC, 2, 32, SM8350_MASTER_MNOC_HF_MEM_NOC); -DEFINE_QNODE(qns_mem_noc_sf, SM8350_SLAVE_MNOC_SF_MEM_NOC, 2, 32, SM8350_MASTER_MNOC_SF_MEM_NOC); -DEFINE_QNODE(srvc_mnoc, SM8350_SLAVE_SERVICE_MNOC, 1, 4); -DEFINE_QNODE(qns_nsp_gemnoc, SM8350_SLAVE_CDSP_MEM_NOC, 2, 32, SM8350_MASTER_COMPUTE_NOC); -DEFINE_QNODE(service_nsp_noc, SM8350_SLAVE_SERVICE_NSP_NOC, 1, 4); -DEFINE_QNODE(qns_gemnoc_gc, SM8350_SLAVE_SNOC_GEM_NOC_GC, 1, 8, SM8350_MASTER_SNOC_GC_MEM_NOC); -DEFINE_QNODE(qns_gemnoc_sf, SM8350_SLAVE_SNOC_GEM_NOC_SF, 1, 16, SM8350_MASTER_SNOC_SF_MEM_NOC); -DEFINE_QNODE(srvc_snoc, SM8350_SLAVE_SERVICE_SNOC, 1, 4); -DEFINE_QNODE(qns_llcc_disp, SM8350_SLAVE_LLCC_DISP, 4, 16, SM8350_MASTER_LLCC_DISP); -DEFINE_QNODE(ebi_disp, SM8350_SLAVE_EBI1_DISP, 4, 4); -DEFINE_QNODE(qns_mem_noc_hf_disp, SM8350_SLAVE_MNOC_HF_MEM_NOC_DISP, 2, 32, SM8350_MASTER_MNOC_HF_MEM_NOC_DISP); -DEFINE_QNODE(qns_mem_noc_sf_disp, SM8350_SLAVE_MNOC_SF_MEM_NOC_DISP, 2, 32, SM8350_MASTER_MNOC_SF_MEM_NOC_DISP); +static struct qcom_icc_node qhm_qspi = { + .name = "qhm_qspi", + .id = SM8350_MASTER_QSPI_0, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8350_SLAVE_A1NOC_SNOC }, +}; -DEFINE_QBCM(bcm_acv, "ACV", false, &ebi); -DEFINE_QBCM(bcm_ce0, "CE0", false, &qxm_crypto); -DEFINE_QBCM(bcm_cn0, "CN0", true, &qnm_gemnoc_cnoc, &qnm_gemnoc_pcie); -DEFINE_QBCM(bcm_cn1, "CN1", false, &xm_qdss_dap, &qhs_ahb2phy0, &qhs_ahb2phy1, &qhs_aoss, &qhs_apss, &qhs_camera_cfg, &qhs_clk_ctl, &qhs_compute_cfg, &qhs_cpr_cx, &qhs_cpr_mmcx, &qhs_cpr_mx, &qhs_crypto0_cfg, &qhs_cx_rdpm, &qhs_dcc_cfg, &qhs_display_cfg, &qhs_gpuss_cfg, &qhs_hwkm, &qhs_imem_cfg, &qhs_ipa, &qhs_ipc_router, &qhs_mss_cfg, &qhs_mx_rdpm, &qhs_pcie0_cfg, &qhs_pcie1_cfg, &qhs_pimem_cfg, &qhs_pka_wrapper_cfg, &qhs_pmu_wrapper_cfg, &qhs_qdss_cfg, &qhs_qup0, &qhs_qup1, &qhs_qup2, &qhs_security, &qhs_spss_cfg, &qhs_tcsr, &qhs_tlmm, &qhs_ufs_card_cfg, &qhs_ufs_mem_cfg, &qhs_usb3_0, &qhs_usb3_1, &qhs_venus_cfg, &qhs_vsense_ctrl_cfg, &qns_a1_noc_cfg, &qns_a2_noc_cfg, &qns_ddrss_cfg, &qns_mnoc_cfg, &qns_snoc_cfg, &srvc_cnoc); -DEFINE_QBCM(bcm_cn2, "CN2", false, &qhs_lpass_cfg, &qhs_pdm, &qhs_qspi, &qhs_sdc2, &qhs_sdc4); -DEFINE_QBCM(bcm_co0, "CO0", false, &qns_nsp_gemnoc); -DEFINE_QBCM(bcm_co3, "CO3", false, &qxm_nsp); -DEFINE_QBCM(bcm_mc0, "MC0", true, &ebi); -DEFINE_QBCM(bcm_mm0, "MM0", true, &qns_mem_noc_hf); -DEFINE_QBCM(bcm_mm1, "MM1", false, &qnm_camnoc_hf, &qxm_mdp0, &qxm_mdp1); -DEFINE_QBCM(bcm_mm4, "MM4", false, &qns_mem_noc_sf); -DEFINE_QBCM(bcm_mm5, "MM5", false, &qnm_camnoc_icp, &qnm_camnoc_sf, &qnm_video0, &qnm_video1, &qnm_video_cvp, &qxm_rot); -DEFINE_QBCM(bcm_sh0, "SH0", true, &qns_llcc); -DEFINE_QBCM(bcm_sh2, "SH2", false, &alm_gpu_tcu, &alm_sys_tcu); -DEFINE_QBCM(bcm_sh3, "SH3", false, &qnm_cmpnoc); -DEFINE_QBCM(bcm_sh4, "SH4", false, &chm_apps); -DEFINE_QBCM(bcm_sn0, "SN0", true, &qns_gemnoc_sf); -DEFINE_QBCM(bcm_sn2, "SN2", false, &qns_gemnoc_gc); -DEFINE_QBCM(bcm_sn3, "SN3", false, &qxs_pimem); -DEFINE_QBCM(bcm_sn4, "SN4", false, &xs_qdss_stm); -DEFINE_QBCM(bcm_sn5, "SN5", false, &xm_pcie3_0); -DEFINE_QBCM(bcm_sn6, "SN6", false, &xm_pcie3_1); -DEFINE_QBCM(bcm_sn7, "SN7", false, &qnm_aggre1_noc); -DEFINE_QBCM(bcm_sn8, "SN8", false, &qnm_aggre2_noc); -DEFINE_QBCM(bcm_sn14, "SN14", false, &qns_pcie_mem_noc); -DEFINE_QBCM(bcm_acv_disp, "ACV", false, &ebi_disp); -DEFINE_QBCM(bcm_mc0_disp, "MC0", false, &ebi_disp); -DEFINE_QBCM(bcm_mm0_disp, "MM0", false, &qns_mem_noc_hf_disp); -DEFINE_QBCM(bcm_mm1_disp, "MM1", false, &qxm_mdp0_disp, &qxm_mdp1_disp); -DEFINE_QBCM(bcm_mm4_disp, "MM4", false, &qns_mem_noc_sf_disp); -DEFINE_QBCM(bcm_mm5_disp, "MM5", false, &qxm_rot_disp); -DEFINE_QBCM(bcm_sh0_disp, "SH0", false, &qns_llcc_disp); +static struct qcom_icc_node qhm_qup0 = { + .name = "qhm_qup0", + .id = SM8350_MASTER_QUP_0, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8350_SLAVE_A2NOC_SNOC }, +}; + +static struct qcom_icc_node qhm_qup1 = { + .name = "qhm_qup1", + .id = SM8350_MASTER_QUP_1, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8350_SLAVE_A1NOC_SNOC }, +}; + +static struct qcom_icc_node qhm_qup2 = { + .name = "qhm_qup2", + .id = SM8350_MASTER_QUP_2, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8350_SLAVE_A2NOC_SNOC }, +}; + +static struct qcom_icc_node qnm_a1noc_cfg = { + .name = "qnm_a1noc_cfg", + .id = SM8350_MASTER_A1NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8350_SLAVE_SERVICE_A1NOC }, +}; + +static struct qcom_icc_node xm_sdc4 = { + .name = "xm_sdc4", + .id = SM8350_MASTER_SDCC_4, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8350_SLAVE_A1NOC_SNOC }, +}; + +static struct qcom_icc_node xm_ufs_mem = { + .name = "xm_ufs_mem", + .id = SM8350_MASTER_UFS_MEM, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8350_SLAVE_A1NOC_SNOC }, +}; + +static struct qcom_icc_node xm_usb3_0 = { + .name = "xm_usb3_0", + .id = SM8350_MASTER_USB3_0, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8350_SLAVE_A1NOC_SNOC }, +}; + +static struct qcom_icc_node xm_usb3_1 = { + .name = "xm_usb3_1", + .id = SM8350_MASTER_USB3_1, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8350_SLAVE_A1NOC_SNOC }, +}; + +static struct qcom_icc_node qhm_qdss_bam = { + .name = "qhm_qdss_bam", + .id = SM8350_MASTER_QDSS_BAM, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8350_SLAVE_A2NOC_SNOC }, +}; + +static struct qcom_icc_node qnm_a2noc_cfg = { + .name = "qnm_a2noc_cfg", + .id = SM8350_MASTER_A2NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8350_SLAVE_SERVICE_A2NOC }, +}; + +static struct qcom_icc_node qxm_crypto = { + .name = "qxm_crypto", + .id = SM8350_MASTER_CRYPTO, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8350_SLAVE_A2NOC_SNOC }, +}; + +static struct qcom_icc_node qxm_ipa = { + .name = "qxm_ipa", + .id = SM8350_MASTER_IPA, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8350_SLAVE_A2NOC_SNOC }, +}; + +static struct qcom_icc_node xm_pcie3_0 = { + .name = "xm_pcie3_0", + .id = SM8350_MASTER_PCIE_0, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8350_SLAVE_ANOC_PCIE_GEM_NOC }, +}; + +static struct qcom_icc_node xm_pcie3_1 = { + .name = "xm_pcie3_1", + .id = SM8350_MASTER_PCIE_1, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8350_SLAVE_ANOC_PCIE_GEM_NOC }, +}; + +static struct qcom_icc_node xm_qdss_etr = { + .name = "xm_qdss_etr", + .id = SM8350_MASTER_QDSS_ETR, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8350_SLAVE_A2NOC_SNOC }, +}; + +static struct qcom_icc_node xm_sdc2 = { + .name = "xm_sdc2", + .id = SM8350_MASTER_SDCC_2, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8350_SLAVE_A2NOC_SNOC }, +}; + +static struct qcom_icc_node xm_ufs_card = { + .name = "xm_ufs_card", + .id = SM8350_MASTER_UFS_CARD, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8350_SLAVE_A2NOC_SNOC }, +}; + +static struct qcom_icc_node qnm_gemnoc_cnoc = { + .name = "qnm_gemnoc_cnoc", + .id = SM8350_MASTER_GEM_NOC_CNOC, + .channels = 1, + .buswidth = 16, + .num_links = 56, + .links = { SM8350_SLAVE_AHB2PHY_SOUTH, + SM8350_SLAVE_AHB2PHY_NORTH, + SM8350_SLAVE_AOSS, + SM8350_SLAVE_APPSS, + SM8350_SLAVE_CAMERA_CFG, + SM8350_SLAVE_CLK_CTL, + SM8350_SLAVE_CDSP_CFG, + SM8350_SLAVE_RBCPR_CX_CFG, + SM8350_SLAVE_RBCPR_MMCX_CFG, + SM8350_SLAVE_RBCPR_MX_CFG, + SM8350_SLAVE_CRYPTO_0_CFG, + SM8350_SLAVE_CX_RDPM, + SM8350_SLAVE_DCC_CFG, + SM8350_SLAVE_DISPLAY_CFG, + SM8350_SLAVE_GFX3D_CFG, + SM8350_SLAVE_HWKM, + SM8350_SLAVE_IMEM_CFG, + SM8350_SLAVE_IPA_CFG, + SM8350_SLAVE_IPC_ROUTER_CFG, + SM8350_SLAVE_LPASS, + SM8350_SLAVE_CNOC_MSS, + SM8350_SLAVE_MX_RDPM, + SM8350_SLAVE_PCIE_0_CFG, + SM8350_SLAVE_PCIE_1_CFG, + SM8350_SLAVE_PDM, + SM8350_SLAVE_PIMEM_CFG, + SM8350_SLAVE_PKA_WRAPPER_CFG, + SM8350_SLAVE_PMU_WRAPPER_CFG, + SM8350_SLAVE_QDSS_CFG, + SM8350_SLAVE_QSPI_0, + SM8350_SLAVE_QUP_0, + SM8350_SLAVE_QUP_1, + SM8350_SLAVE_QUP_2, + SM8350_SLAVE_SDCC_2, + SM8350_SLAVE_SDCC_4, + SM8350_SLAVE_SECURITY, + SM8350_SLAVE_SPSS_CFG, + SM8350_SLAVE_TCSR, + SM8350_SLAVE_TLMM, + SM8350_SLAVE_UFS_CARD_CFG, + SM8350_SLAVE_UFS_MEM_CFG, + SM8350_SLAVE_USB3_0, + SM8350_SLAVE_USB3_1, + SM8350_SLAVE_VENUS_CFG, + SM8350_SLAVE_VSENSE_CTRL_CFG, + SM8350_SLAVE_A1NOC_CFG, + SM8350_SLAVE_A2NOC_CFG, + SM8350_SLAVE_DDRSS_CFG, + SM8350_SLAVE_CNOC_MNOC_CFG, + SM8350_SLAVE_SNOC_CFG, + SM8350_SLAVE_BOOT_IMEM, + SM8350_SLAVE_IMEM, + SM8350_SLAVE_PIMEM, + SM8350_SLAVE_SERVICE_CNOC, + SM8350_SLAVE_QDSS_STM, + SM8350_SLAVE_TCU + }, +}; + +static struct qcom_icc_node qnm_gemnoc_pcie = { + .name = "qnm_gemnoc_pcie", + .id = SM8350_MASTER_GEM_NOC_PCIE_SNOC, + .channels = 1, + .buswidth = 8, + .num_links = 2, + .links = { SM8350_SLAVE_PCIE_0, + SM8350_SLAVE_PCIE_1 + }, +}; + +static struct qcom_icc_node xm_qdss_dap = { + .name = "xm_qdss_dap", + .id = SM8350_MASTER_QDSS_DAP, + .channels = 1, + .buswidth = 8, + .num_links = 56, + .links = { SM8350_SLAVE_AHB2PHY_SOUTH, + SM8350_SLAVE_AHB2PHY_NORTH, + SM8350_SLAVE_AOSS, + SM8350_SLAVE_APPSS, + SM8350_SLAVE_CAMERA_CFG, + SM8350_SLAVE_CLK_CTL, + SM8350_SLAVE_CDSP_CFG, + SM8350_SLAVE_RBCPR_CX_CFG, + SM8350_SLAVE_RBCPR_MMCX_CFG, + SM8350_SLAVE_RBCPR_MX_CFG, + SM8350_SLAVE_CRYPTO_0_CFG, + SM8350_SLAVE_CX_RDPM, + SM8350_SLAVE_DCC_CFG, + SM8350_SLAVE_DISPLAY_CFG, + SM8350_SLAVE_GFX3D_CFG, + SM8350_SLAVE_HWKM, + SM8350_SLAVE_IMEM_CFG, + SM8350_SLAVE_IPA_CFG, + SM8350_SLAVE_IPC_ROUTER_CFG, + SM8350_SLAVE_LPASS, + SM8350_SLAVE_CNOC_MSS, + SM8350_SLAVE_MX_RDPM, + SM8350_SLAVE_PCIE_0_CFG, + SM8350_SLAVE_PCIE_1_CFG, + SM8350_SLAVE_PDM, + SM8350_SLAVE_PIMEM_CFG, + SM8350_SLAVE_PKA_WRAPPER_CFG, + SM8350_SLAVE_PMU_WRAPPER_CFG, + SM8350_SLAVE_QDSS_CFG, + SM8350_SLAVE_QSPI_0, + SM8350_SLAVE_QUP_0, + SM8350_SLAVE_QUP_1, + SM8350_SLAVE_QUP_2, + SM8350_SLAVE_SDCC_2, + SM8350_SLAVE_SDCC_4, + SM8350_SLAVE_SECURITY, + SM8350_SLAVE_SPSS_CFG, + SM8350_SLAVE_TCSR, + SM8350_SLAVE_TLMM, + SM8350_SLAVE_UFS_CARD_CFG, + SM8350_SLAVE_UFS_MEM_CFG, + SM8350_SLAVE_USB3_0, + SM8350_SLAVE_USB3_1, + SM8350_SLAVE_VENUS_CFG, + SM8350_SLAVE_VSENSE_CTRL_CFG, + SM8350_SLAVE_A1NOC_CFG, + SM8350_SLAVE_A2NOC_CFG, + SM8350_SLAVE_DDRSS_CFG, + SM8350_SLAVE_CNOC_MNOC_CFG, + SM8350_SLAVE_SNOC_CFG, + SM8350_SLAVE_BOOT_IMEM, + SM8350_SLAVE_IMEM, + SM8350_SLAVE_PIMEM, + SM8350_SLAVE_SERVICE_CNOC, + SM8350_SLAVE_QDSS_STM, + SM8350_SLAVE_TCU + }, +}; + +static struct qcom_icc_node qnm_cnoc_dc_noc = { + .name = "qnm_cnoc_dc_noc", + .id = SM8350_MASTER_CNOC_DC_NOC, + .channels = 1, + .buswidth = 4, + .num_links = 2, + .links = { SM8350_SLAVE_LLCC_CFG, + SM8350_SLAVE_GEM_NOC_CFG + }, +}; + +static struct qcom_icc_node alm_gpu_tcu = { + .name = "alm_gpu_tcu", + .id = SM8350_MASTER_GPU_TCU, + .channels = 1, + .buswidth = 8, + .num_links = 2, + .links = { SM8350_SLAVE_GEM_NOC_CNOC, + SM8350_SLAVE_LLCC + }, +}; + +static struct qcom_icc_node alm_sys_tcu = { + .name = "alm_sys_tcu", + .id = SM8350_MASTER_SYS_TCU, + .channels = 1, + .buswidth = 8, + .num_links = 2, + .links = { SM8350_SLAVE_GEM_NOC_CNOC, + SM8350_SLAVE_LLCC + }, +}; + +static struct qcom_icc_node chm_apps = { + .name = "chm_apps", + .id = SM8350_MASTER_APPSS_PROC, + .channels = 2, + .buswidth = 32, + .num_links = 3, + .links = { SM8350_SLAVE_GEM_NOC_CNOC, + SM8350_SLAVE_LLCC, + SM8350_SLAVE_MEM_NOC_PCIE_SNOC + }, +}; + +static struct qcom_icc_node qnm_cmpnoc = { + .name = "qnm_cmpnoc", + .id = SM8350_MASTER_COMPUTE_NOC, + .channels = 2, + .buswidth = 32, + .num_links = 2, + .links = { SM8350_SLAVE_GEM_NOC_CNOC, + SM8350_SLAVE_LLCC + }, +}; + +static struct qcom_icc_node qnm_gemnoc_cfg = { + .name = "qnm_gemnoc_cfg", + .id = SM8350_MASTER_GEM_NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 5, + .links = { SM8350_SLAVE_MSS_PROC_MS_MPU_CFG, + SM8350_SLAVE_MCDMA_MS_MPU_CFG, + SM8350_SLAVE_SERVICE_GEM_NOC_1, + SM8350_SLAVE_SERVICE_GEM_NOC_2, + SM8350_SLAVE_SERVICE_GEM_NOC + }, +}; + +static struct qcom_icc_node qnm_gpu = { + .name = "qnm_gpu", + .id = SM8350_MASTER_GFX3D, + .channels = 2, + .buswidth = 32, + .num_links = 2, + .links = { SM8350_SLAVE_GEM_NOC_CNOC, + SM8350_SLAVE_LLCC + }, +}; + +static struct qcom_icc_node qnm_mnoc_hf = { + .name = "qnm_mnoc_hf", + .id = SM8350_MASTER_MNOC_HF_MEM_NOC, + .channels = 2, + .buswidth = 32, + .num_links = 1, + .links = { SM8350_SLAVE_LLCC }, +}; + +static struct qcom_icc_node qnm_mnoc_sf = { + .name = "qnm_mnoc_sf", + .id = SM8350_MASTER_MNOC_SF_MEM_NOC, + .channels = 2, + .buswidth = 32, + .num_links = 2, + .links = { SM8350_SLAVE_GEM_NOC_CNOC, + SM8350_SLAVE_LLCC + }, +}; + +static struct qcom_icc_node qnm_pcie = { + .name = "qnm_pcie", + .id = SM8350_MASTER_ANOC_PCIE_GEM_NOC, + .channels = 1, + .buswidth = 16, + .num_links = 2, + .links = { SM8350_SLAVE_GEM_NOC_CNOC, + SM8350_SLAVE_LLCC + }, +}; + +static struct qcom_icc_node qnm_snoc_gc = { + .name = "qnm_snoc_gc", + .id = SM8350_MASTER_SNOC_GC_MEM_NOC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8350_SLAVE_LLCC }, +}; + +static struct qcom_icc_node qnm_snoc_sf = { + .name = "qnm_snoc_sf", + .id = SM8350_MASTER_SNOC_SF_MEM_NOC, + .channels = 1, + .buswidth = 16, + .num_links = 3, + .links = { SM8350_SLAVE_GEM_NOC_CNOC, + SM8350_SLAVE_LLCC, + SM8350_SLAVE_MEM_NOC_PCIE_SNOC + }, +}; + +static struct qcom_icc_node qhm_config_noc = { + .name = "qhm_config_noc", + .id = SM8350_MASTER_CNOC_LPASS_AG_NOC, + .channels = 1, + .buswidth = 4, + .num_links = 6, + .links = { SM8350_SLAVE_LPASS_CORE_CFG, + SM8350_SLAVE_LPASS_LPI_CFG, + SM8350_SLAVE_LPASS_MPU_CFG, + SM8350_SLAVE_LPASS_TOP_CFG, + SM8350_SLAVE_SERVICES_LPASS_AML_NOC, + SM8350_SLAVE_SERVICE_LPASS_AG_NOC + }, +}; + +static struct qcom_icc_node llcc_mc = { + .name = "llcc_mc", + .id = SM8350_MASTER_LLCC, + .channels = 4, + .buswidth = 4, + .num_links = 1, + .links = { SM8350_SLAVE_EBI1 }, +}; + +static struct qcom_icc_node qnm_camnoc_hf = { + .name = "qnm_camnoc_hf", + .id = SM8350_MASTER_CAMNOC_HF, + .channels = 2, + .buswidth = 32, + .num_links = 1, + .links = { SM8350_SLAVE_MNOC_HF_MEM_NOC }, +}; + +static struct qcom_icc_node qnm_camnoc_icp = { + .name = "qnm_camnoc_icp", + .id = SM8350_MASTER_CAMNOC_ICP, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8350_SLAVE_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qnm_camnoc_sf = { + .name = "qnm_camnoc_sf", + .id = SM8350_MASTER_CAMNOC_SF, + .channels = 2, + .buswidth = 32, + .num_links = 1, + .links = { SM8350_SLAVE_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qnm_mnoc_cfg = { + .name = "qnm_mnoc_cfg", + .id = SM8350_MASTER_CNOC_MNOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8350_SLAVE_SERVICE_MNOC }, +}; + +static struct qcom_icc_node qnm_video0 = { + .name = "qnm_video0", + .id = SM8350_MASTER_VIDEO_P0, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SM8350_SLAVE_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qnm_video1 = { + .name = "qnm_video1", + .id = SM8350_MASTER_VIDEO_P1, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SM8350_SLAVE_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qnm_video_cvp = { + .name = "qnm_video_cvp", + .id = SM8350_MASTER_VIDEO_PROC, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SM8350_SLAVE_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qxm_mdp0 = { + .name = "qxm_mdp0", + .id = SM8350_MASTER_MDP0, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SM8350_SLAVE_MNOC_HF_MEM_NOC }, +}; + +static struct qcom_icc_node qxm_mdp1 = { + .name = "qxm_mdp1", + .id = SM8350_MASTER_MDP1, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SM8350_SLAVE_MNOC_HF_MEM_NOC }, +}; + +static struct qcom_icc_node qxm_rot = { + .name = "qxm_rot", + .id = SM8350_MASTER_ROTATOR, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SM8350_SLAVE_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node qhm_nsp_noc_config = { + .name = "qhm_nsp_noc_config", + .id = SM8350_MASTER_CDSP_NOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8350_SLAVE_SERVICE_NSP_NOC }, +}; + +static struct qcom_icc_node qxm_nsp = { + .name = "qxm_nsp", + .id = SM8350_MASTER_CDSP_PROC, + .channels = 2, + .buswidth = 32, + .num_links = 1, + .links = { SM8350_SLAVE_CDSP_MEM_NOC }, +}; + +static struct qcom_icc_node qnm_aggre1_noc = { + .name = "qnm_aggre1_noc", + .id = SM8350_MASTER_A1NOC_SNOC, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SM8350_SLAVE_SNOC_GEM_NOC_SF }, +}; + +static struct qcom_icc_node qnm_aggre2_noc = { + .name = "qnm_aggre2_noc", + .id = SM8350_MASTER_A2NOC_SNOC, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SM8350_SLAVE_SNOC_GEM_NOC_SF }, +}; + +static struct qcom_icc_node qnm_snoc_cfg = { + .name = "qnm_snoc_cfg", + .id = SM8350_MASTER_SNOC_CFG, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8350_SLAVE_SERVICE_SNOC }, +}; + +static struct qcom_icc_node qxm_pimem = { + .name = "qxm_pimem", + .id = SM8350_MASTER_PIMEM, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8350_SLAVE_SNOC_GEM_NOC_GC }, +}; + +static struct qcom_icc_node xm_gic = { + .name = "xm_gic", + .id = SM8350_MASTER_GIC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8350_SLAVE_SNOC_GEM_NOC_GC }, +}; + +static struct qcom_icc_node qnm_mnoc_hf_disp = { + .name = "qnm_mnoc_hf_disp", + .id = SM8350_MASTER_MNOC_HF_MEM_NOC_DISP, + .channels = 2, + .buswidth = 32, + .num_links = 1, + .links = { SM8350_SLAVE_LLCC_DISP }, +}; + +static struct qcom_icc_node qnm_mnoc_sf_disp = { + .name = "qnm_mnoc_sf_disp", + .id = SM8350_MASTER_MNOC_SF_MEM_NOC_DISP, + .channels = 2, + .buswidth = 32, + .num_links = 1, + .links = { SM8350_SLAVE_LLCC_DISP }, +}; + +static struct qcom_icc_node llcc_mc_disp = { + .name = "llcc_mc_disp", + .id = SM8350_MASTER_LLCC_DISP, + .channels = 4, + .buswidth = 4, + .num_links = 1, + .links = { SM8350_SLAVE_EBI1_DISP }, +}; + +static struct qcom_icc_node qxm_mdp0_disp = { + .name = "qxm_mdp0_disp", + .id = SM8350_MASTER_MDP0_DISP, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SM8350_SLAVE_MNOC_HF_MEM_NOC_DISP }, +}; + +static struct qcom_icc_node qxm_mdp1_disp = { + .name = "qxm_mdp1_disp", + .id = SM8350_MASTER_MDP1_DISP, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SM8350_SLAVE_MNOC_HF_MEM_NOC_DISP }, +}; + +static struct qcom_icc_node qxm_rot_disp = { + .name = "qxm_rot_disp", + .id = SM8350_MASTER_ROTATOR_DISP, + .channels = 1, + .buswidth = 32, + .num_links = 1, + .links = { SM8350_SLAVE_MNOC_SF_MEM_NOC_DISP }, +}; + +static struct qcom_icc_node qns_a1noc_snoc = { + .name = "qns_a1noc_snoc", + .id = SM8350_SLAVE_A1NOC_SNOC, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SM8350_MASTER_A1NOC_SNOC }, +}; + +static struct qcom_icc_node srvc_aggre1_noc = { + .name = "srvc_aggre1_noc", + .id = SM8350_SLAVE_SERVICE_A1NOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_a2noc_snoc = { + .name = "qns_a2noc_snoc", + .id = SM8350_SLAVE_A2NOC_SNOC, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SM8350_MASTER_A2NOC_SNOC }, +}; + +static struct qcom_icc_node qns_pcie_mem_noc = { + .name = "qns_pcie_mem_noc", + .id = SM8350_SLAVE_ANOC_PCIE_GEM_NOC, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SM8350_MASTER_ANOC_PCIE_GEM_NOC }, +}; + +static struct qcom_icc_node srvc_aggre2_noc = { + .name = "srvc_aggre2_noc", + .id = SM8350_SLAVE_SERVICE_A2NOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_ahb2phy0 = { + .name = "qhs_ahb2phy0", + .id = SM8350_SLAVE_AHB2PHY_SOUTH, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_ahb2phy1 = { + .name = "qhs_ahb2phy1", + .id = SM8350_SLAVE_AHB2PHY_NORTH, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_aoss = { + .name = "qhs_aoss", + .id = SM8350_SLAVE_AOSS, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_apss = { + .name = "qhs_apss", + .id = SM8350_SLAVE_APPSS, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node qhs_camera_cfg = { + .name = "qhs_camera_cfg", + .id = SM8350_SLAVE_CAMERA_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_clk_ctl = { + .name = "qhs_clk_ctl", + .id = SM8350_SLAVE_CLK_CTL, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_compute_cfg = { + .name = "qhs_compute_cfg", + .id = SM8350_SLAVE_CDSP_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_cpr_cx = { + .name = "qhs_cpr_cx", + .id = SM8350_SLAVE_RBCPR_CX_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_cpr_mmcx = { + .name = "qhs_cpr_mmcx", + .id = SM8350_SLAVE_RBCPR_MMCX_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_cpr_mx = { + .name = "qhs_cpr_mx", + .id = SM8350_SLAVE_RBCPR_MX_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_crypto0_cfg = { + .name = "qhs_crypto0_cfg", + .id = SM8350_SLAVE_CRYPTO_0_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_cx_rdpm = { + .name = "qhs_cx_rdpm", + .id = SM8350_SLAVE_CX_RDPM, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_dcc_cfg = { + .name = "qhs_dcc_cfg", + .id = SM8350_SLAVE_DCC_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_display_cfg = { + .name = "qhs_display_cfg", + .id = SM8350_SLAVE_DISPLAY_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_gpuss_cfg = { + .name = "qhs_gpuss_cfg", + .id = SM8350_SLAVE_GFX3D_CFG, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node qhs_hwkm = { + .name = "qhs_hwkm", + .id = SM8350_SLAVE_HWKM, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_imem_cfg = { + .name = "qhs_imem_cfg", + .id = SM8350_SLAVE_IMEM_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_ipa = { + .name = "qhs_ipa", + .id = SM8350_SLAVE_IPA_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_ipc_router = { + .name = "qhs_ipc_router", + .id = SM8350_SLAVE_IPC_ROUTER_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_lpass_cfg = { + .name = "qhs_lpass_cfg", + .id = SM8350_SLAVE_LPASS, + .channels = 1, + .buswidth = 4, + .num_links = 1, + .links = { SM8350_MASTER_CNOC_LPASS_AG_NOC }, +}; + +static struct qcom_icc_node qhs_mss_cfg = { + .name = "qhs_mss_cfg", + .id = SM8350_SLAVE_CNOC_MSS, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_mx_rdpm = { + .name = "qhs_mx_rdpm", + .id = SM8350_SLAVE_MX_RDPM, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_pcie0_cfg = { + .name = "qhs_pcie0_cfg", + .id = SM8350_SLAVE_PCIE_0_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_pcie1_cfg = { + .name = "qhs_pcie1_cfg", + .id = SM8350_SLAVE_PCIE_1_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_pdm = { + .name = "qhs_pdm", + .id = SM8350_SLAVE_PDM, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_pimem_cfg = { + .name = "qhs_pimem_cfg", + .id = SM8350_SLAVE_PIMEM_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_pka_wrapper_cfg = { + .name = "qhs_pka_wrapper_cfg", + .id = SM8350_SLAVE_PKA_WRAPPER_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_pmu_wrapper_cfg = { + .name = "qhs_pmu_wrapper_cfg", + .id = SM8350_SLAVE_PMU_WRAPPER_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_qdss_cfg = { + .name = "qhs_qdss_cfg", + .id = SM8350_SLAVE_QDSS_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_qspi = { + .name = "qhs_qspi", + .id = SM8350_SLAVE_QSPI_0, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_qup0 = { + .name = "qhs_qup0", + .id = SM8350_SLAVE_QUP_0, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_qup1 = { + .name = "qhs_qup1", + .id = SM8350_SLAVE_QUP_1, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_qup2 = { + .name = "qhs_qup2", + .id = SM8350_SLAVE_QUP_2, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_sdc2 = { + .name = "qhs_sdc2", + .id = SM8350_SLAVE_SDCC_2, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_sdc4 = { + .name = "qhs_sdc4", + .id = SM8350_SLAVE_SDCC_4, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_security = { + .name = "qhs_security", + .id = SM8350_SLAVE_SECURITY, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_spss_cfg = { + .name = "qhs_spss_cfg", + .id = SM8350_SLAVE_SPSS_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_tcsr = { + .name = "qhs_tcsr", + .id = SM8350_SLAVE_TCSR, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_tlmm = { + .name = "qhs_tlmm", + .id = SM8350_SLAVE_TLMM, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_ufs_card_cfg = { + .name = "qhs_ufs_card_cfg", + .id = SM8350_SLAVE_UFS_CARD_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_ufs_mem_cfg = { + .name = "qhs_ufs_mem_cfg", + .id = SM8350_SLAVE_UFS_MEM_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_usb3_0 = { + .name = "qhs_usb3_0", + .id = SM8350_SLAVE_USB3_0, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_usb3_1 = { + .name = "qhs_usb3_1", + .id = SM8350_SLAVE_USB3_1, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_venus_cfg = { + .name = "qhs_venus_cfg", + .id = SM8350_SLAVE_VENUS_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_vsense_ctrl_cfg = { + .name = "qhs_vsense_ctrl_cfg", + .id = SM8350_SLAVE_VSENSE_CTRL_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_a1_noc_cfg = { + .name = "qns_a1_noc_cfg", + .id = SM8350_SLAVE_A1NOC_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_a2_noc_cfg = { + .name = "qns_a2_noc_cfg", + .id = SM8350_SLAVE_A2NOC_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_ddrss_cfg = { + .name = "qns_ddrss_cfg", + .id = SM8350_SLAVE_DDRSS_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_mnoc_cfg = { + .name = "qns_mnoc_cfg", + .id = SM8350_SLAVE_CNOC_MNOC_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_snoc_cfg = { + .name = "qns_snoc_cfg", + .id = SM8350_SLAVE_SNOC_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qxs_boot_imem = { + .name = "qxs_boot_imem", + .id = SM8350_SLAVE_BOOT_IMEM, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node qxs_imem = { + .name = "qxs_imem", + .id = SM8350_SLAVE_IMEM, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node qxs_pimem = { + .name = "qxs_pimem", + .id = SM8350_SLAVE_PIMEM, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node srvc_cnoc = { + .name = "srvc_cnoc", + .id = SM8350_SLAVE_SERVICE_CNOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node xs_pcie_0 = { + .name = "xs_pcie_0", + .id = SM8350_SLAVE_PCIE_0, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node xs_pcie_1 = { + .name = "xs_pcie_1", + .id = SM8350_SLAVE_PCIE_1, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node xs_qdss_stm = { + .name = "xs_qdss_stm", + .id = SM8350_SLAVE_QDSS_STM, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node xs_sys_tcu_cfg = { + .name = "xs_sys_tcu_cfg", + .id = SM8350_SLAVE_TCU, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node qhs_llcc = { + .name = "qhs_llcc", + .id = SM8350_SLAVE_LLCC_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_gemnoc = { + .name = "qns_gemnoc", + .id = SM8350_SLAVE_GEM_NOC_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_mdsp_ms_mpu_cfg = { + .name = "qhs_mdsp_ms_mpu_cfg", + .id = SM8350_SLAVE_MSS_PROC_MS_MPU_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_modem_ms_mpu_cfg = { + .name = "qhs_modem_ms_mpu_cfg", + .id = SM8350_SLAVE_MCDMA_MS_MPU_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_gem_noc_cnoc = { + .name = "qns_gem_noc_cnoc", + .id = SM8350_SLAVE_GEM_NOC_CNOC, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SM8350_MASTER_GEM_NOC_CNOC }, +}; + +static struct qcom_icc_node qns_llcc = { + .name = "qns_llcc", + .id = SM8350_SLAVE_LLCC, + .channels = 4, + .buswidth = 16, + .num_links = 1, + .links = { SM8350_MASTER_LLCC }, +}; + +static struct qcom_icc_node qns_pcie = { + .name = "qns_pcie", + .id = SM8350_SLAVE_MEM_NOC_PCIE_SNOC, + .channels = 1, + .buswidth = 8, +}; + +static struct qcom_icc_node srvc_even_gemnoc = { + .name = "srvc_even_gemnoc", + .id = SM8350_SLAVE_SERVICE_GEM_NOC_1, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node srvc_odd_gemnoc = { + .name = "srvc_odd_gemnoc", + .id = SM8350_SLAVE_SERVICE_GEM_NOC_2, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node srvc_sys_gemnoc = { + .name = "srvc_sys_gemnoc", + .id = SM8350_SLAVE_SERVICE_GEM_NOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_lpass_core = { + .name = "qhs_lpass_core", + .id = SM8350_SLAVE_LPASS_CORE_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_lpass_lpi = { + .name = "qhs_lpass_lpi", + .id = SM8350_SLAVE_LPASS_LPI_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_lpass_mpu = { + .name = "qhs_lpass_mpu", + .id = SM8350_SLAVE_LPASS_MPU_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qhs_lpass_top = { + .name = "qhs_lpass_top", + .id = SM8350_SLAVE_LPASS_TOP_CFG, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node srvc_niu_aml_noc = { + .name = "srvc_niu_aml_noc", + .id = SM8350_SLAVE_SERVICES_LPASS_AML_NOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node srvc_niu_lpass_agnoc = { + .name = "srvc_niu_lpass_agnoc", + .id = SM8350_SLAVE_SERVICE_LPASS_AG_NOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node ebi = { + .name = "ebi", + .id = SM8350_SLAVE_EBI1, + .channels = 4, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_mem_noc_hf = { + .name = "qns_mem_noc_hf", + .id = SM8350_SLAVE_MNOC_HF_MEM_NOC, + .channels = 2, + .buswidth = 32, + .num_links = 1, + .links = { SM8350_MASTER_MNOC_HF_MEM_NOC }, +}; + +static struct qcom_icc_node qns_mem_noc_sf = { + .name = "qns_mem_noc_sf", + .id = SM8350_SLAVE_MNOC_SF_MEM_NOC, + .channels = 2, + .buswidth = 32, + .num_links = 1, + .links = { SM8350_MASTER_MNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node srvc_mnoc = { + .name = "srvc_mnoc", + .id = SM8350_SLAVE_SERVICE_MNOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_nsp_gemnoc = { + .name = "qns_nsp_gemnoc", + .id = SM8350_SLAVE_CDSP_MEM_NOC, + .channels = 2, + .buswidth = 32, + .num_links = 1, + .links = { SM8350_MASTER_COMPUTE_NOC }, +}; + +static struct qcom_icc_node service_nsp_noc = { + .name = "service_nsp_noc", + .id = SM8350_SLAVE_SERVICE_NSP_NOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_gemnoc_gc = { + .name = "qns_gemnoc_gc", + .id = SM8350_SLAVE_SNOC_GEM_NOC_GC, + .channels = 1, + .buswidth = 8, + .num_links = 1, + .links = { SM8350_MASTER_SNOC_GC_MEM_NOC }, +}; + +static struct qcom_icc_node qns_gemnoc_sf = { + .name = "qns_gemnoc_sf", + .id = SM8350_SLAVE_SNOC_GEM_NOC_SF, + .channels = 1, + .buswidth = 16, + .num_links = 1, + .links = { SM8350_MASTER_SNOC_SF_MEM_NOC }, +}; + +static struct qcom_icc_node srvc_snoc = { + .name = "srvc_snoc", + .id = SM8350_SLAVE_SERVICE_SNOC, + .channels = 1, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_llcc_disp = { + .name = "qns_llcc_disp", + .id = SM8350_SLAVE_LLCC_DISP, + .channels = 4, + .buswidth = 16, + .num_links = 1, + .links = { SM8350_MASTER_LLCC_DISP }, +}; + +static struct qcom_icc_node ebi_disp = { + .name = "ebi_disp", + .id = SM8350_SLAVE_EBI1_DISP, + .channels = 4, + .buswidth = 4, +}; + +static struct qcom_icc_node qns_mem_noc_hf_disp = { + .name = "qns_mem_noc_hf_disp", + .id = SM8350_SLAVE_MNOC_HF_MEM_NOC_DISP, + .channels = 2, + .buswidth = 32, + .num_links = 1, + .links = { SM8350_MASTER_MNOC_HF_MEM_NOC_DISP }, +}; + +static struct qcom_icc_node qns_mem_noc_sf_disp = { + .name = "qns_mem_noc_sf_disp", + .id = SM8350_SLAVE_MNOC_SF_MEM_NOC_DISP, + .channels = 2, + .buswidth = 32, + .num_links = 1, + .links = { SM8350_MASTER_MNOC_SF_MEM_NOC_DISP }, +}; + +static struct qcom_icc_bcm bcm_acv = { + .name = "ACV", + .keepalive = false, + .num_nodes = 1, + .nodes = { &ebi }, +}; + +static struct qcom_icc_bcm bcm_ce0 = { + .name = "CE0", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qxm_crypto }, +}; + +static struct qcom_icc_bcm bcm_cn0 = { + .name = "CN0", + .keepalive = true, + .num_nodes = 2, + .nodes = { &qnm_gemnoc_cnoc, &qnm_gemnoc_pcie }, +}; + +static struct qcom_icc_bcm bcm_cn1 = { + .name = "CN1", + .keepalive = false, + .num_nodes = 47, + .nodes = { &xm_qdss_dap, + &qhs_ahb2phy0, + &qhs_ahb2phy1, + &qhs_aoss, + &qhs_apss, + &qhs_camera_cfg, + &qhs_clk_ctl, + &qhs_compute_cfg, + &qhs_cpr_cx, + &qhs_cpr_mmcx, + &qhs_cpr_mx, + &qhs_crypto0_cfg, + &qhs_cx_rdpm, + &qhs_dcc_cfg, + &qhs_display_cfg, + &qhs_gpuss_cfg, + &qhs_hwkm, + &qhs_imem_cfg, + &qhs_ipa, + &qhs_ipc_router, + &qhs_mss_cfg, + &qhs_mx_rdpm, + &qhs_pcie0_cfg, + &qhs_pcie1_cfg, + &qhs_pimem_cfg, + &qhs_pka_wrapper_cfg, + &qhs_pmu_wrapper_cfg, + &qhs_qdss_cfg, + &qhs_qup0, + &qhs_qup1, + &qhs_qup2, + &qhs_security, + &qhs_spss_cfg, + &qhs_tcsr, + &qhs_tlmm, + &qhs_ufs_card_cfg, + &qhs_ufs_mem_cfg, + &qhs_usb3_0, + &qhs_usb3_1, + &qhs_venus_cfg, + &qhs_vsense_ctrl_cfg, + &qns_a1_noc_cfg, + &qns_a2_noc_cfg, + &qns_ddrss_cfg, + &qns_mnoc_cfg, + &qns_snoc_cfg, + &srvc_cnoc + }, +}; + +static struct qcom_icc_bcm bcm_cn2 = { + .name = "CN2", + .keepalive = false, + .num_nodes = 5, + .nodes = { &qhs_lpass_cfg, &qhs_pdm, &qhs_qspi, &qhs_sdc2, &qhs_sdc4 }, +}; + +static struct qcom_icc_bcm bcm_co0 = { + .name = "CO0", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qns_nsp_gemnoc }, +}; + +static struct qcom_icc_bcm bcm_co3 = { + .name = "CO3", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qxm_nsp }, +}; + +static struct qcom_icc_bcm bcm_mc0 = { + .name = "MC0", + .keepalive = true, + .num_nodes = 1, + .nodes = { &ebi }, +}; + +static struct qcom_icc_bcm bcm_mm0 = { + .name = "MM0", + .keepalive = true, + .num_nodes = 1, + .nodes = { &qns_mem_noc_hf }, +}; + +static struct qcom_icc_bcm bcm_mm1 = { + .name = "MM1", + .keepalive = false, + .num_nodes = 3, + .nodes = { &qnm_camnoc_hf, &qxm_mdp0, &qxm_mdp1 }, +}; + +static struct qcom_icc_bcm bcm_mm4 = { + .name = "MM4", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qns_mem_noc_sf }, +}; + +static struct qcom_icc_bcm bcm_mm5 = { + .name = "MM5", + .keepalive = false, + .num_nodes = 6, + .nodes = { &qnm_camnoc_icp, + &qnm_camnoc_sf, + &qnm_video0, + &qnm_video1, + &qnm_video_cvp, + &qxm_rot + }, +}; + +static struct qcom_icc_bcm bcm_sh0 = { + .name = "SH0", + .keepalive = true, + .num_nodes = 1, + .nodes = { &qns_llcc }, +}; + +static struct qcom_icc_bcm bcm_sh2 = { + .name = "SH2", + .keepalive = false, + .num_nodes = 2, + .nodes = { &alm_gpu_tcu, &alm_sys_tcu }, +}; + +static struct qcom_icc_bcm bcm_sh3 = { + .name = "SH3", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qnm_cmpnoc }, +}; + +static struct qcom_icc_bcm bcm_sh4 = { + .name = "SH4", + .keepalive = false, + .num_nodes = 1, + .nodes = { &chm_apps }, +}; + +static struct qcom_icc_bcm bcm_sn0 = { + .name = "SN0", + .keepalive = true, + .num_nodes = 1, + .nodes = { &qns_gemnoc_sf }, +}; + +static struct qcom_icc_bcm bcm_sn2 = { + .name = "SN2", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qns_gemnoc_gc }, +}; + +static struct qcom_icc_bcm bcm_sn3 = { + .name = "SN3", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qxs_pimem }, +}; + +static struct qcom_icc_bcm bcm_sn4 = { + .name = "SN4", + .keepalive = false, + .num_nodes = 1, + .nodes = { &xs_qdss_stm }, +}; + +static struct qcom_icc_bcm bcm_sn5 = { + .name = "SN5", + .keepalive = false, + .num_nodes = 1, + .nodes = { &xm_pcie3_0 }, +}; + +static struct qcom_icc_bcm bcm_sn6 = { + .name = "SN6", + .keepalive = false, + .num_nodes = 1, + .nodes = { &xm_pcie3_1 }, +}; + +static struct qcom_icc_bcm bcm_sn7 = { + .name = "SN7", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qnm_aggre1_noc }, +}; + +static struct qcom_icc_bcm bcm_sn8 = { + .name = "SN8", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qnm_aggre2_noc }, +}; + +static struct qcom_icc_bcm bcm_sn14 = { + .name = "SN14", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qns_pcie_mem_noc }, +}; + +static struct qcom_icc_bcm bcm_acv_disp = { + .name = "ACV", + .keepalive = false, + .num_nodes = 1, + .nodes = { &ebi_disp }, +}; + +static struct qcom_icc_bcm bcm_mc0_disp = { + .name = "MC0", + .keepalive = false, + .num_nodes = 1, + .nodes = { &ebi_disp }, +}; + +static struct qcom_icc_bcm bcm_mm0_disp = { + .name = "MM0", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qns_mem_noc_hf_disp }, +}; + +static struct qcom_icc_bcm bcm_mm1_disp = { + .name = "MM1", + .keepalive = false, + .num_nodes = 2, + .nodes = { &qxm_mdp0_disp, &qxm_mdp1_disp }, +}; + +static struct qcom_icc_bcm bcm_mm4_disp = { + .name = "MM4", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qns_mem_noc_sf_disp }, +}; + +static struct qcom_icc_bcm bcm_mm5_disp = { + .name = "MM5", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qxm_rot_disp }, +}; + +static struct qcom_icc_bcm bcm_sh0_disp = { + .name = "SH0", + .keepalive = false, + .num_nodes = 1, + .nodes = { &qns_llcc_disp }, +}; static struct qcom_icc_bcm * const aggre1_noc_bcms[] = { }; diff --git a/drivers/interconnect/qcom/sm8450.c b/drivers/interconnect/qcom/sm8450.c index e64c214b4020..eb7e17df32ba 100644 --- a/drivers/interconnect/qcom/sm8450.c +++ b/drivers/interconnect/qcom/sm8450.c @@ -8,7 +8,9 @@ #include #include #include -#include +#include +#include +#include #include #include "bcm-voter.h" @@ -1886,6 +1888,7 @@ static struct platform_driver qnoc_driver = { .driver = { .name = "qnoc-sm8450", .of_match_table = qnoc_of_match, + .sync_state = icc_sync_state, }, }; diff --git a/drivers/interconnect/qcom/sm8550.c b/drivers/interconnect/qcom/sm8550.c index 0864ed285375..a10c8b6549ee 100644 --- a/drivers/interconnect/qcom/sm8550.c +++ b/drivers/interconnect/qcom/sm8550.c @@ -10,7 +10,9 @@ #include #include #include -#include +#include +#include +#include #include #include "bcm-voter.h" diff --git a/drivers/interconnect/qcom/smd-rpm.c b/drivers/interconnect/qcom/smd-rpm.c index 24bc994e1a12..16a145a3c914 100644 --- a/drivers/interconnect/qcom/smd-rpm.c +++ b/drivers/interconnect/qcom/smd-rpm.c @@ -8,8 +8,6 @@ #include #include -#include -#include #include #include diff --git a/drivers/ipack/devices/ipoctal.c b/drivers/ipack/devices/ipoctal.c index a01c15812b70..da308be6c487 100644 --- a/drivers/ipack/devices/ipoctal.c +++ b/drivers/ipack/devices/ipoctal.c @@ -437,8 +437,7 @@ err_put_driver: } static inline int ipoctal_copy_write_buffer(struct ipoctal_channel *channel, - const unsigned char *buf, - int count) + const u8 *buf, int count) { unsigned long flags; int i; @@ -459,8 +458,8 @@ static inline int ipoctal_copy_write_buffer(struct ipoctal_channel *channel, return i; } -static int ipoctal_write_tty(struct tty_struct *tty, - const unsigned char *buf, int count) +static ssize_t ipoctal_write_tty(struct tty_struct *tty, const u8 *buf, + size_t count) { struct ipoctal_channel *channel = tty->driver_data; unsigned int char_copied; diff --git a/drivers/isdn/capi/capi.c b/drivers/isdn/capi/capi.c index 45a4043c5042..2f3789515445 100644 --- a/drivers/isdn/capi/capi.c +++ b/drivers/isdn/capi/capi.c @@ -1077,13 +1077,13 @@ static void capinc_tty_close(struct tty_struct *tty, struct file *filp) tty_port_close(&mp->port, tty, filp); } -static int capinc_tty_write(struct tty_struct *tty, - const unsigned char *buf, int count) +static ssize_t capinc_tty_write(struct tty_struct *tty, const u8 *buf, + size_t count) { struct capiminor *mp = tty->driver_data; struct sk_buff *skb; - pr_debug("capinc_tty_write(count=%d)\n", count); + pr_debug("capinc_tty_write(count=%zu)\n", count); spin_lock_bh(&mp->outlock); skb = mp->outskb; @@ -1112,7 +1112,7 @@ static int capinc_tty_write(struct tty_struct *tty, return count; } -static int capinc_tty_put_char(struct tty_struct *tty, unsigned char ch) +static int capinc_tty_put_char(struct tty_struct *tty, u8 ch) { struct capiminor *mp = tty->driver_data; bool invoke_send = false; diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 49fd1687b554..62bb6318216a 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -512,6 +512,7 @@ config HISI_HIKEY_USB config OPEN_DICE tristate "Open Profile for DICE driver" depends on OF_RESERVED_MEM + depends on HAS_IOMEM help This driver exposes a DICE reserved memory region to userspace via a character device. The memory region contains Compound Device diff --git a/drivers/misc/atmel-ssc.c b/drivers/misc/atmel-ssc.c index 7f9f562d6433..ee590c4a1537 100644 --- a/drivers/misc/atmel-ssc.c +++ b/drivers/misc/atmel-ssc.c @@ -212,8 +212,7 @@ static int ssc_probe(struct platform_device *pdev) of_property_read_bool(np, "atmel,clk-from-rk-pin"); } - regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); - ssc->regs = devm_ioremap_resource(&pdev->dev, regs); + ssc->regs = devm_platform_get_and_ioremap_resource(pdev, 0, ®s); if (IS_ERR(ssc->regs)) return PTR_ERR(ssc->regs); diff --git a/drivers/misc/bcm-vk/bcm_vk.h b/drivers/misc/bcm-vk/bcm_vk.h index 25d51222eedf..386884c2a263 100644 --- a/drivers/misc/bcm-vk/bcm_vk.h +++ b/drivers/misc/bcm-vk/bcm_vk.h @@ -340,7 +340,7 @@ struct bcm_vk_proc_mon_info { }; struct bcm_vk_hb_ctrl { - struct timer_list timer; + struct delayed_work work; u32 last_uptime; u32 lost_cnt; }; diff --git a/drivers/misc/bcm-vk/bcm_vk_msg.c b/drivers/misc/bcm-vk/bcm_vk_msg.c index 3c081504f38c..e17d81231ea6 100644 --- a/drivers/misc/bcm-vk/bcm_vk_msg.c +++ b/drivers/misc/bcm-vk/bcm_vk_msg.c @@ -137,11 +137,11 @@ void bcm_vk_set_host_alert(struct bcm_vk *vk, u32 bit_mask) #define BCM_VK_HB_TIMER_VALUE (BCM_VK_HB_TIMER_S * HZ) #define BCM_VK_HB_LOST_MAX (27 / BCM_VK_HB_TIMER_S) -static void bcm_vk_hb_poll(struct timer_list *t) +static void bcm_vk_hb_poll(struct work_struct *work) { u32 uptime_s; - struct bcm_vk_hb_ctrl *hb = container_of(t, struct bcm_vk_hb_ctrl, - timer); + struct bcm_vk_hb_ctrl *hb = container_of(to_delayed_work(work), struct bcm_vk_hb_ctrl, + work); struct bcm_vk *vk = container_of(hb, struct bcm_vk, hb_ctrl); if (bcm_vk_drv_access_ok(vk) && hb_mon_is_on()) { @@ -177,22 +177,22 @@ static void bcm_vk_hb_poll(struct timer_list *t) bcm_vk_set_host_alert(vk, ERR_LOG_HOST_HB_FAIL); } /* re-arm timer */ - mod_timer(&hb->timer, jiffies + BCM_VK_HB_TIMER_VALUE); + schedule_delayed_work(&hb->work, BCM_VK_HB_TIMER_VALUE); } void bcm_vk_hb_init(struct bcm_vk *vk) { struct bcm_vk_hb_ctrl *hb = &vk->hb_ctrl; - timer_setup(&hb->timer, bcm_vk_hb_poll, 0); - mod_timer(&hb->timer, jiffies + BCM_VK_HB_TIMER_VALUE); + INIT_DELAYED_WORK(&hb->work, bcm_vk_hb_poll); + schedule_delayed_work(&hb->work, BCM_VK_HB_TIMER_VALUE); } void bcm_vk_hb_deinit(struct bcm_vk *vk) { struct bcm_vk_hb_ctrl *hb = &vk->hb_ctrl; - del_timer(&hb->timer); + cancel_delayed_work_sync(&hb->work); } static void bcm_vk_msgid_bitmap_clear(struct bcm_vk *vk, diff --git a/drivers/misc/bcm-vk/bcm_vk_tty.c b/drivers/misc/bcm-vk/bcm_vk_tty.c index 6669625ba4c8..2bce835ca43e 100644 --- a/drivers/misc/bcm-vk/bcm_vk_tty.c +++ b/drivers/misc/bcm-vk/bcm_vk_tty.c @@ -186,9 +186,8 @@ static void bcm_vk_tty_doorbell(struct bcm_vk *vk, u32 db_val) VK_BAR0_REGSEG_DB_BASE + VK_BAR0_REGSEG_TTY_DB_OFFSET); } -static int bcm_vk_tty_write(struct tty_struct *tty, - const unsigned char *buffer, - int count) +static ssize_t bcm_vk_tty_write(struct tty_struct *tty, const u8 *buffer, + size_t count) { int index; struct bcm_vk *vk; diff --git a/drivers/misc/cxl/base.c b/drivers/misc/cxl/base.c index cc0caf9192dc..b054562c046e 100644 --- a/drivers/misc/cxl/base.c +++ b/drivers/misc/cxl/base.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include "cxl.h" diff --git a/drivers/misc/eeprom/idt_89hpesx.c b/drivers/misc/eeprom/idt_89hpesx.c index 740c06382b83..1d1f30b5c426 100644 --- a/drivers/misc/eeprom/idt_89hpesx.c +++ b/drivers/misc/eeprom/idt_89hpesx.c @@ -913,15 +913,9 @@ static ssize_t idt_dbgfs_csr_write(struct file *filep, const char __user *ubuf, return 0; /* Copy data from User-space */ - buf = kmalloc(count + 1, GFP_KERNEL); - if (!buf) - return -ENOMEM; - - if (copy_from_user(buf, ubuf, count)) { - ret = -EFAULT; - goto free_buf; - } - buf[count] = 0; + buf = memdup_user_nul(ubuf, count); + if (IS_ERR(buf)) + return PTR_ERR(buf); /* Find position of colon in the buffer */ colon_ch = strnchr(buf, count, ':'); @@ -1294,14 +1288,15 @@ static int idt_create_sysfs_files(struct idt_89hpesx_dev *pdev) return 0; } - /* Allocate memory for attribute file */ - pdev->ee_file = devm_kmalloc(dev, sizeof(*pdev->ee_file), GFP_KERNEL); + /* + * Allocate memory for attribute file and copy the declared EEPROM attr + * structure to change some of fields + */ + pdev->ee_file = devm_kmemdup(dev, &bin_attr_eeprom, + sizeof(*pdev->ee_file), GFP_KERNEL); if (!pdev->ee_file) return -ENOMEM; - /* Copy the declared EEPROM attr structure to change some of fields */ - memcpy(pdev->ee_file, &bin_attr_eeprom, sizeof(*pdev->ee_file)); - /* In case of read-only EEPROM get rid of write ability */ if (pdev->eero) { pdev->ee_file->attr.mode &= ~0200; diff --git a/drivers/misc/fastrpc.c b/drivers/misc/fastrpc.c index 9666d28037e1..a66b7c111cd5 100644 --- a/drivers/misc/fastrpc.c +++ b/drivers/misc/fastrpc.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -756,6 +757,7 @@ static int fastrpc_map_create(struct fastrpc_user *fl, int fd, { struct fastrpc_session_ctx *sess = fl->sctx; struct fastrpc_map *map = NULL; + struct sg_table *table; int err = 0; if (!fastrpc_map_lookup(fl, fd, ppmap, true)) @@ -783,11 +785,12 @@ static int fastrpc_map_create(struct fastrpc_user *fl, int fd, goto attach_err; } - map->table = dma_buf_map_attachment_unlocked(map->attach, DMA_BIDIRECTIONAL); - if (IS_ERR(map->table)) { - err = PTR_ERR(map->table); + table = dma_buf_map_attachment_unlocked(map->attach, DMA_BIDIRECTIONAL); + if (IS_ERR(table)) { + err = PTR_ERR(table); goto map_err; } + map->table = table; if (attr & FASTRPC_ATTR_SECUREMAP) { map->phys = sg_phys(map->table->sgl); @@ -1322,13 +1325,18 @@ static int fastrpc_init_create_static_process(struct fastrpc_user *fl, return 0; err_invoke: if (fl->cctx->vmcount) { - struct qcom_scm_vmperm perm; + u64 src_perms = 0; + struct qcom_scm_vmperm dst_perms; + u32 i; - perm.vmid = QCOM_SCM_VMID_HLOS; - perm.perm = QCOM_SCM_PERM_RWX; + for (i = 0; i < fl->cctx->vmcount; i++) + src_perms |= BIT(fl->cctx->vmperms[i].vmid); + + dst_perms.vmid = QCOM_SCM_VMID_HLOS; + dst_perms.perm = QCOM_SCM_PERM_RWX; err = qcom_scm_assign_mem(fl->cctx->remote_heap->phys, (u64)fl->cctx->remote_heap->size, - &fl->cctx->perms, &perm, 1); + &src_perms, &dst_perms, 1); if (err) dev_err(fl->sctx->dev, "Failed to assign memory phys 0x%llx size 0x%llx err %d", fl->cctx->remote_heap->phys, fl->cctx->remote_heap->size, err); @@ -1866,7 +1874,11 @@ static int fastrpc_req_mmap(struct fastrpc_user *fl, char __user *argp) return -EINVAL; } - err = fastrpc_buf_alloc(fl, fl->sctx->dev, req.size, &buf); + if (req.flags == ADSP_MMAP_REMOTE_HEAP_ADDR) + err = fastrpc_remote_heap_alloc(fl, dev, req.size, &buf); + else + err = fastrpc_buf_alloc(fl, dev, req.size, &buf); + if (err) { dev_err(dev, "failed to allocate buffer\n"); return err; @@ -1905,12 +1917,8 @@ static int fastrpc_req_mmap(struct fastrpc_user *fl, char __user *argp) /* Add memory to static PD pool, protection thru hypervisor */ if (req.flags == ADSP_MMAP_REMOTE_HEAP_ADDR && fl->cctx->vmcount) { - struct qcom_scm_vmperm perm; - - perm.vmid = QCOM_SCM_VMID_HLOS; - perm.perm = QCOM_SCM_PERM_RWX; - err = qcom_scm_assign_mem(buf->phys, buf->size, - &fl->cctx->perms, &perm, 1); + err = qcom_scm_assign_mem(buf->phys, (u64)buf->size, + &fl->cctx->perms, fl->cctx->vmperms, fl->cctx->vmcount); if (err) { dev_err(fl->sctx->dev, "Failed to assign memory phys 0x%llx size 0x%llx err %d", buf->phys, buf->size, err); diff --git a/drivers/misc/genwqe/card_base.c b/drivers/misc/genwqe/card_base.c index b03010810b89..224a7e97cbea 100644 --- a/drivers/misc/genwqe/card_base.c +++ b/drivers/misc/genwqe/card_base.c @@ -42,7 +42,7 @@ MODULE_VERSION(DRV_VERSION); MODULE_LICENSE("GPL"); static char genwqe_driver_name[] = GENWQE_DEVNAME; -static struct class *class_genwqe; + static struct dentry *debugfs_genwqe; static struct genwqe_dev *genwqe_devices[GENWQE_CARD_NO_MAX]; @@ -104,6 +104,26 @@ static const struct pci_device_id genwqe_device_table[] = { MODULE_DEVICE_TABLE(pci, genwqe_device_table); +/** + * genwqe_devnode() - Set default access mode for genwqe devices. + * @dev: Pointer to device (unused) + * @mode: Carrier to pass-back given mode (permissions) + * + * Default mode should be rw for everybody. Do not change default + * device name. + */ +static char *genwqe_devnode(const struct device *dev, umode_t *mode) +{ + if (mode) + *mode = 0666; + return NULL; +} + +static const struct class class_genwqe = { + .name = GENWQE_DEVNAME, + .devnode = genwqe_devnode, +}; + /** * genwqe_dev_alloc() - Create and prepare a new card descriptor * @@ -126,7 +146,7 @@ static struct genwqe_dev *genwqe_dev_alloc(void) return ERR_PTR(-ENOMEM); cd->card_idx = i; - cd->class_genwqe = class_genwqe; + cd->class_genwqe = &class_genwqe; cd->debugfs_genwqe = debugfs_genwqe; /* @@ -1339,21 +1359,6 @@ static struct pci_driver genwqe_driver = { .err_handler = &genwqe_err_handler, }; -/** - * genwqe_devnode() - Set default access mode for genwqe devices. - * @dev: Pointer to device (unused) - * @mode: Carrier to pass-back given mode (permissions) - * - * Default mode should be rw for everybody. Do not change default - * device name. - */ -static char *genwqe_devnode(const struct device *dev, umode_t *mode) -{ - if (mode) - *mode = 0666; - return NULL; -} - /** * genwqe_init_module() - Driver registration and initialization */ @@ -1361,14 +1366,12 @@ static int __init genwqe_init_module(void) { int rc; - class_genwqe = class_create(GENWQE_DEVNAME); - if (IS_ERR(class_genwqe)) { + rc = class_register(&class_genwqe); + if (rc) { pr_err("[%s] create class failed\n", __func__); return -ENOMEM; } - class_genwqe->devnode = genwqe_devnode; - debugfs_genwqe = debugfs_create_dir(GENWQE_DEVNAME, NULL); rc = pci_register_driver(&genwqe_driver); @@ -1381,7 +1384,7 @@ static int __init genwqe_init_module(void) err_out0: debugfs_remove(debugfs_genwqe); - class_destroy(class_genwqe); + class_unregister(&class_genwqe); return rc; } @@ -1392,7 +1395,7 @@ static void __exit genwqe_exit_module(void) { pci_unregister_driver(&genwqe_driver); debugfs_remove(debugfs_genwqe); - class_destroy(class_genwqe); + class_unregister(&class_genwqe); } module_init(genwqe_init_module); diff --git a/drivers/misc/genwqe/card_base.h b/drivers/misc/genwqe/card_base.h index 0e902977d35f..d700266f2cd0 100644 --- a/drivers/misc/genwqe/card_base.h +++ b/drivers/misc/genwqe/card_base.h @@ -289,7 +289,7 @@ struct genwqe_dev { /* char device */ dev_t devnum_genwqe; /* major/minor num card */ - struct class *class_genwqe; /* reference to class object */ + const struct class *class_genwqe; /* reference to class object */ struct device *dev; /* for device creation */ struct cdev cdev_genwqe; /* char device for card */ diff --git a/drivers/misc/hi6421v600-irq.c b/drivers/misc/hi6421v600-irq.c index caa3de37698b..b075d803a2c2 100644 --- a/drivers/misc/hi6421v600-irq.c +++ b/drivers/misc/hi6421v600-irq.c @@ -244,10 +244,8 @@ static int hi6421v600_irq_probe(struct platform_device *pdev) pmic_pdev = container_of(pmic_dev, struct platform_device, dev); priv->irq = platform_get_irq(pmic_pdev, 0); - if (priv->irq < 0) { - dev_err(dev, "Error %d when getting IRQs\n", priv->irq); + if (priv->irq < 0) return priv->irq; - } platform_set_drvdata(pdev, priv); diff --git a/drivers/misc/hpilo.c b/drivers/misc/hpilo.c index 2fde8d63c5fe..f1b74d3f8958 100644 --- a/drivers/misc/hpilo.c +++ b/drivers/misc/hpilo.c @@ -25,7 +25,9 @@ #include #include "hpilo.h" -static struct class *ilo_class; +static const struct class ilo_class = { + .name = "iLO", +}; static unsigned int ilo_major; static unsigned int max_ccb = 16; static char ilo_hwdev[MAX_ILO_DEV]; @@ -746,7 +748,7 @@ static void ilo_remove(struct pci_dev *pdev) minor = MINOR(ilo_hw->cdev.dev); for (i = minor; i < minor + max_ccb; i++) - device_destroy(ilo_class, MKDEV(ilo_major, i)); + device_destroy(&ilo_class, MKDEV(ilo_major, i)); cdev_del(&ilo_hw->cdev); ilo_disable_interrupts(ilo_hw); @@ -839,7 +841,7 @@ static int ilo_probe(struct pci_dev *pdev, for (minor = 0 ; minor < max_ccb; minor++) { struct device *dev; - dev = device_create(ilo_class, &pdev->dev, + dev = device_create(&ilo_class, &pdev->dev, MKDEV(ilo_major, minor), NULL, "hpilo!d%dccb%d", devnum, minor); if (IS_ERR(dev)) @@ -882,11 +884,9 @@ static int __init ilo_init(void) int error; dev_t dev; - ilo_class = class_create("iLO"); - if (IS_ERR(ilo_class)) { - error = PTR_ERR(ilo_class); + error = class_register(&ilo_class); + if (error) goto out; - } error = alloc_chrdev_region(&dev, 0, MAX_OPEN, ILO_NAME); if (error) @@ -902,7 +902,7 @@ static int __init ilo_init(void) chr_remove: unregister_chrdev_region(dev, MAX_OPEN); class_destroy: - class_destroy(ilo_class); + class_unregister(&ilo_class); out: return error; } @@ -911,7 +911,7 @@ static void __exit ilo_exit(void) { pci_unregister_driver(&ilo_driver); unregister_chrdev_region(MKDEV(ilo_major, 0), MAX_OPEN); - class_destroy(ilo_class); + class_unregister(&ilo_class); } MODULE_VERSION("1.5.0"); diff --git a/drivers/misc/lis3lv02d/lis3lv02d.c b/drivers/misc/lis3lv02d/lis3lv02d.c index 299d316f1bda..49868a45c0ad 100644 --- a/drivers/misc/lis3lv02d/lis3lv02d.c +++ b/drivers/misc/lis3lv02d/lis3lv02d.c @@ -26,7 +26,7 @@ #include #include #include -#include +#include #include "lis3lv02d.h" #define DRIVER_NAME "lis3lv02d" diff --git a/drivers/misc/mchp_pci1xxxx/Kconfig b/drivers/misc/mchp_pci1xxxx/Kconfig index 4abb47de7219..64e457581fb4 100644 --- a/drivers/misc/mchp_pci1xxxx/Kconfig +++ b/drivers/misc/mchp_pci1xxxx/Kconfig @@ -2,6 +2,7 @@ config GP_PCI1XXXX tristate "Microchip PCI1XXXX PCIe to GPIO Expander + OTP/EEPROM manager" depends on PCI depends on GPIOLIB + depends on NVMEM_SYSFS select GPIOLIB_IRQCHIP select AUXILIARY_BUS help diff --git a/drivers/misc/mchp_pci1xxxx/Makefile b/drivers/misc/mchp_pci1xxxx/Makefile index fc4615cfe28b..ae31251dab37 100644 --- a/drivers/misc/mchp_pci1xxxx/Makefile +++ b/drivers/misc/mchp_pci1xxxx/Makefile @@ -1 +1 @@ -obj-$(CONFIG_GP_PCI1XXXX) := mchp_pci1xxxx_gp.o mchp_pci1xxxx_gpio.o +obj-$(CONFIG_GP_PCI1XXXX) := mchp_pci1xxxx_gp.o mchp_pci1xxxx_gpio.o mchp_pci1xxxx_otpe2p.o diff --git a/drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_otpe2p.c b/drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_otpe2p.c new file mode 100644 index 000000000000..16695cb5e69c --- /dev/null +++ b/drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_otpe2p.c @@ -0,0 +1,443 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (C) 2022-2023 Microchip Technology Inc. +// PCI1xxxx OTP/EEPROM driver + +#include +#include +#include +#include +#include + +#include "mchp_pci1xxxx_gp.h" + +#define AUX_DRIVER_NAME "PCI1xxxxOTPE2P" +#define EEPROM_NAME "pci1xxxx_eeprom" +#define OTP_NAME "pci1xxxx_otp" + +#define PERI_PF3_SYSTEM_REG_ADDR_BASE 0x2000 +#define PERI_PF3_SYSTEM_REG_LENGTH 0x4000 + +#define EEPROM_SIZE_BYTES 8192 +#define OTP_SIZE_BYTES 8192 + +#define CONFIG_REG_ADDR_BASE 0 +#define EEPROM_REG_ADDR_BASE 0x0E00 +#define OTP_REG_ADDR_BASE 0x1000 + +#define MMAP_OTP_OFFSET(x) (OTP_REG_ADDR_BASE + (x)) +#define MMAP_EEPROM_OFFSET(x) (EEPROM_REG_ADDR_BASE + (x)) +#define MMAP_CFG_OFFSET(x) (CONFIG_REG_ADDR_BASE + (x)) + +#define EEPROM_CMD_REG 0x00 +#define EEPROM_DATA_REG 0x04 + +#define EEPROM_CMD_EPC_WRITE (BIT(29) | BIT(28)) +#define EEPROM_CMD_EPC_TIMEOUT_BIT BIT(17) +#define EEPROM_CMD_EPC_BUSY_BIT BIT(31) + +#define STATUS_READ_DELAY_US 1 +#define STATUS_READ_TIMEOUT_US 20000 + +#define OTP_ADDR_HIGH_OFFSET 0x04 +#define OTP_ADDR_LOW_OFFSET 0x08 +#define OTP_PRGM_DATA_OFFSET 0x10 +#define OTP_PRGM_MODE_OFFSET 0x14 +#define OTP_RD_DATA_OFFSET 0x18 +#define OTP_FUNC_CMD_OFFSET 0x20 +#define OTP_CMD_GO_OFFSET 0x28 +#define OTP_PASS_FAIL_OFFSET 0x2C +#define OTP_STATUS_OFFSET 0x30 + +#define OTP_FUNC_RD_BIT BIT(0) +#define OTP_FUNC_PGM_BIT BIT(1) +#define OTP_CMD_GO_BIT BIT(0) +#define OTP_STATUS_BUSY_BIT BIT(0) +#define OTP_PGM_MODE_BYTE_BIT BIT(0) +#define OTP_FAIL_BIT BIT(0) + +#define OTP_PWR_DN_BIT BIT(0) +#define OTP_PWR_DN_OFFSET 0x00 + +#define CFG_SYS_LOCK_OFFSET 0xA0 +#define CFG_SYS_LOCK_PF3 BIT(5) + +#define BYTE_LOW (GENMASK(7, 0)) +#define BYTE_HIGH (GENMASK(12, 8)) + +struct pci1xxxx_otp_eeprom_device { + struct auxiliary_device *pdev; + void __iomem *reg_base; + struct nvmem_config nvmem_config_eeprom; + struct nvmem_device *nvmem_eeprom; + struct nvmem_config nvmem_config_otp; + struct nvmem_device *nvmem_otp; +}; + +static int set_sys_lock(struct pci1xxxx_otp_eeprom_device *priv) +{ + void __iomem *sys_lock = priv->reg_base + + MMAP_CFG_OFFSET(CFG_SYS_LOCK_OFFSET); + u8 data; + + writel(CFG_SYS_LOCK_PF3, sys_lock); + data = readl(sys_lock); + if (data != CFG_SYS_LOCK_PF3) + return -EPERM; + + return 0; +} + +static void release_sys_lock(struct pci1xxxx_otp_eeprom_device *priv) +{ + void __iomem *sys_lock = priv->reg_base + + MMAP_CFG_OFFSET(CFG_SYS_LOCK_OFFSET); + writel(0, sys_lock); +} + +static bool is_eeprom_responsive(struct pci1xxxx_otp_eeprom_device *priv) +{ + void __iomem *rb = priv->reg_base; + u32 regval; + int ret; + + writel(EEPROM_CMD_EPC_TIMEOUT_BIT, + rb + MMAP_EEPROM_OFFSET(EEPROM_CMD_REG)); + writel(EEPROM_CMD_EPC_BUSY_BIT, + rb + MMAP_EEPROM_OFFSET(EEPROM_CMD_REG)); + + /* Wait for the EPC_BUSY bit to get cleared or timeout bit to get set*/ + ret = read_poll_timeout(readl, regval, !(regval & EEPROM_CMD_EPC_BUSY_BIT), + STATUS_READ_DELAY_US, STATUS_READ_TIMEOUT_US, + true, rb + MMAP_EEPROM_OFFSET(EEPROM_CMD_REG)); + + /* Return failure if either of software or hardware timeouts happen */ + if (ret < 0 || (!ret && (regval & EEPROM_CMD_EPC_TIMEOUT_BIT))) + return false; + + return true; +} + +static int pci1xxxx_eeprom_read(void *priv_t, unsigned int off, + void *buf_t, size_t count) +{ + struct pci1xxxx_otp_eeprom_device *priv = priv_t; + void __iomem *rb = priv->reg_base; + char *buf = buf_t; + u32 regval; + u32 byte; + int ret; + + if (off >= priv->nvmem_config_eeprom.size) + return -EFAULT; + + if ((off + count) > priv->nvmem_config_eeprom.size) + count = priv->nvmem_config_eeprom.size - off; + + ret = set_sys_lock(priv); + if (ret) + return ret; + + for (byte = 0; byte < count; byte++) { + writel(EEPROM_CMD_EPC_BUSY_BIT | (off + byte), rb + + MMAP_EEPROM_OFFSET(EEPROM_CMD_REG)); + + ret = read_poll_timeout(readl, regval, + !(regval & EEPROM_CMD_EPC_BUSY_BIT), + STATUS_READ_DELAY_US, + STATUS_READ_TIMEOUT_US, true, + rb + MMAP_EEPROM_OFFSET(EEPROM_CMD_REG)); + if (ret < 0 || (!ret && (regval & EEPROM_CMD_EPC_TIMEOUT_BIT))) { + ret = -EIO; + goto error; + } + + buf[byte] = readl(rb + MMAP_EEPROM_OFFSET(EEPROM_DATA_REG)); + } + ret = byte; +error: + release_sys_lock(priv); + return ret; +} + +static int pci1xxxx_eeprom_write(void *priv_t, unsigned int off, + void *value_t, size_t count) +{ + struct pci1xxxx_otp_eeprom_device *priv = priv_t; + void __iomem *rb = priv->reg_base; + char *value = value_t; + u32 regval; + u32 byte; + int ret; + + if (off >= priv->nvmem_config_eeprom.size) + return -EFAULT; + + if ((off + count) > priv->nvmem_config_eeprom.size) + count = priv->nvmem_config_eeprom.size - off; + + ret = set_sys_lock(priv); + if (ret) + return ret; + + for (byte = 0; byte < count; byte++) { + writel(*(value + byte), rb + MMAP_EEPROM_OFFSET(EEPROM_DATA_REG)); + regval = EEPROM_CMD_EPC_TIMEOUT_BIT | EEPROM_CMD_EPC_WRITE | + (off + byte); + writel(regval, rb + MMAP_EEPROM_OFFSET(EEPROM_CMD_REG)); + writel(EEPROM_CMD_EPC_BUSY_BIT | regval, + rb + MMAP_EEPROM_OFFSET(EEPROM_CMD_REG)); + + ret = read_poll_timeout(readl, regval, + !(regval & EEPROM_CMD_EPC_BUSY_BIT), + STATUS_READ_DELAY_US, + STATUS_READ_TIMEOUT_US, true, + rb + MMAP_EEPROM_OFFSET(EEPROM_CMD_REG)); + if (ret < 0 || (!ret && (regval & EEPROM_CMD_EPC_TIMEOUT_BIT))) { + ret = -EIO; + goto error; + } + } + ret = byte; +error: + release_sys_lock(priv); + return ret; +} + +static void otp_device_set_address(struct pci1xxxx_otp_eeprom_device *priv, + u16 address) +{ + u16 lo, hi; + + lo = address & BYTE_LOW; + hi = (address & BYTE_HIGH) >> 8; + writew(lo, priv->reg_base + MMAP_OTP_OFFSET(OTP_ADDR_LOW_OFFSET)); + writew(hi, priv->reg_base + MMAP_OTP_OFFSET(OTP_ADDR_HIGH_OFFSET)); +} + +static int pci1xxxx_otp_read(void *priv_t, unsigned int off, + void *buf_t, size_t count) +{ + struct pci1xxxx_otp_eeprom_device *priv = priv_t; + void __iomem *rb = priv->reg_base; + char *buf = buf_t; + u32 regval; + u32 byte; + int ret; + u8 data; + + if (off >= priv->nvmem_config_otp.size) + return -EFAULT; + + if ((off + count) > priv->nvmem_config_otp.size) + count = priv->nvmem_config_otp.size - off; + + ret = set_sys_lock(priv); + if (ret) + return ret; + + for (byte = 0; byte < count; byte++) { + otp_device_set_address(priv, (u16)(off + byte)); + data = readl(rb + MMAP_OTP_OFFSET(OTP_FUNC_CMD_OFFSET)); + writel(data | OTP_FUNC_RD_BIT, + rb + MMAP_OTP_OFFSET(OTP_FUNC_CMD_OFFSET)); + data = readl(rb + MMAP_OTP_OFFSET(OTP_CMD_GO_OFFSET)); + writel(data | OTP_CMD_GO_BIT, + rb + MMAP_OTP_OFFSET(OTP_CMD_GO_OFFSET)); + + ret = read_poll_timeout(readl, regval, + !(regval & OTP_STATUS_BUSY_BIT), + STATUS_READ_DELAY_US, + STATUS_READ_TIMEOUT_US, true, + rb + MMAP_OTP_OFFSET(OTP_STATUS_OFFSET)); + + data = readl(rb + MMAP_OTP_OFFSET(OTP_PASS_FAIL_OFFSET)); + if (ret < 0 || data & OTP_FAIL_BIT) { + ret = -EIO; + goto error; + } + + buf[byte] = readl(rb + MMAP_OTP_OFFSET(OTP_RD_DATA_OFFSET)); + } + ret = byte; +error: + release_sys_lock(priv); + return ret; +} + +static int pci1xxxx_otp_write(void *priv_t, unsigned int off, + void *value_t, size_t count) +{ + struct pci1xxxx_otp_eeprom_device *priv = priv_t; + void __iomem *rb = priv->reg_base; + char *value = value_t; + u32 regval; + u32 byte; + int ret; + u8 data; + + if (off >= priv->nvmem_config_otp.size) + return -EFAULT; + + if ((off + count) > priv->nvmem_config_otp.size) + count = priv->nvmem_config_otp.size - off; + + ret = set_sys_lock(priv); + if (ret) + return ret; + + for (byte = 0; byte < count; byte++) { + otp_device_set_address(priv, (u16)(off + byte)); + + /* + * Set OTP_PGM_MODE_BYTE command bit in OTP_PRGM_MODE register + * to enable Byte programming + */ + data = readl(rb + MMAP_OTP_OFFSET(OTP_PRGM_MODE_OFFSET)); + writel(data | OTP_PGM_MODE_BYTE_BIT, + rb + MMAP_OTP_OFFSET(OTP_PRGM_MODE_OFFSET)); + writel(*(value + byte), rb + MMAP_OTP_OFFSET(OTP_PRGM_DATA_OFFSET)); + data = readl(rb + MMAP_OTP_OFFSET(OTP_FUNC_CMD_OFFSET)); + writel(data | OTP_FUNC_PGM_BIT, + rb + MMAP_OTP_OFFSET(OTP_FUNC_CMD_OFFSET)); + data = readl(rb + MMAP_OTP_OFFSET(OTP_CMD_GO_OFFSET)); + writel(data | OTP_CMD_GO_BIT, + rb + MMAP_OTP_OFFSET(OTP_CMD_GO_OFFSET)); + + ret = read_poll_timeout(readl, regval, + !(regval & OTP_STATUS_BUSY_BIT), + STATUS_READ_DELAY_US, + STATUS_READ_TIMEOUT_US, true, + rb + MMAP_OTP_OFFSET(OTP_STATUS_OFFSET)); + + data = readl(rb + MMAP_OTP_OFFSET(OTP_PASS_FAIL_OFFSET)); + if (ret < 0 || data & OTP_FAIL_BIT) { + ret = -EIO; + goto error; + } + } + ret = byte; +error: + release_sys_lock(priv); + return ret; +} + +static int pci1xxxx_otp_eeprom_probe(struct auxiliary_device *aux_dev, + const struct auxiliary_device_id *id) +{ + struct auxiliary_device_wrapper *aux_dev_wrapper; + struct pci1xxxx_otp_eeprom_device *priv; + struct gp_aux_data_type *pdata; + int ret; + u8 data; + + aux_dev_wrapper = container_of(aux_dev, struct auxiliary_device_wrapper, + aux_dev); + pdata = &aux_dev_wrapper->gp_aux_data; + if (!pdata) + return -EINVAL; + + priv = devm_kzalloc(&aux_dev->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->pdev = aux_dev; + + if (!devm_request_mem_region(&aux_dev->dev, pdata->region_start + + PERI_PF3_SYSTEM_REG_ADDR_BASE, + PERI_PF3_SYSTEM_REG_LENGTH, + aux_dev->name)) + return -ENOMEM; + + priv->reg_base = devm_ioremap(&aux_dev->dev, pdata->region_start + + PERI_PF3_SYSTEM_REG_ADDR_BASE, + PERI_PF3_SYSTEM_REG_LENGTH); + if (!priv->reg_base) + return -ENOMEM; + + ret = set_sys_lock(priv); + if (ret) + return ret; + + /* Set OTP_PWR_DN to 0 to make OTP Operational */ + data = readl(priv->reg_base + MMAP_OTP_OFFSET(OTP_PWR_DN_OFFSET)); + writel(data & ~OTP_PWR_DN_BIT, + priv->reg_base + MMAP_OTP_OFFSET(OTP_PWR_DN_OFFSET)); + + dev_set_drvdata(&aux_dev->dev, priv); + + if (is_eeprom_responsive(priv)) { + priv->nvmem_config_eeprom.type = NVMEM_TYPE_EEPROM; + priv->nvmem_config_eeprom.name = EEPROM_NAME; + priv->nvmem_config_eeprom.dev = &aux_dev->dev; + priv->nvmem_config_eeprom.owner = THIS_MODULE; + priv->nvmem_config_eeprom.reg_read = pci1xxxx_eeprom_read; + priv->nvmem_config_eeprom.reg_write = pci1xxxx_eeprom_write; + priv->nvmem_config_eeprom.priv = priv; + priv->nvmem_config_eeprom.stride = 1; + priv->nvmem_config_eeprom.word_size = 1; + priv->nvmem_config_eeprom.size = EEPROM_SIZE_BYTES; + + priv->nvmem_eeprom = devm_nvmem_register(&aux_dev->dev, + &priv->nvmem_config_eeprom); + if (IS_ERR(priv->nvmem_eeprom)) + return PTR_ERR(priv->nvmem_eeprom); + } + + release_sys_lock(priv); + + priv->nvmem_config_otp.type = NVMEM_TYPE_OTP; + priv->nvmem_config_otp.name = OTP_NAME; + priv->nvmem_config_otp.dev = &aux_dev->dev; + priv->nvmem_config_otp.owner = THIS_MODULE; + priv->nvmem_config_otp.reg_read = pci1xxxx_otp_read; + priv->nvmem_config_otp.reg_write = pci1xxxx_otp_write; + priv->nvmem_config_otp.priv = priv; + priv->nvmem_config_otp.stride = 1; + priv->nvmem_config_otp.word_size = 1; + priv->nvmem_config_otp.size = OTP_SIZE_BYTES; + + priv->nvmem_otp = devm_nvmem_register(&aux_dev->dev, + &priv->nvmem_config_otp); + if (IS_ERR(priv->nvmem_otp)) + return PTR_ERR(priv->nvmem_otp); + + return ret; +} + +static void pci1xxxx_otp_eeprom_remove(struct auxiliary_device *aux_dev) +{ + struct pci1xxxx_otp_eeprom_device *priv; + void __iomem *sys_lock; + + priv = dev_get_drvdata(&aux_dev->dev); + sys_lock = priv->reg_base + MMAP_CFG_OFFSET(CFG_SYS_LOCK_OFFSET); + writel(CFG_SYS_LOCK_PF3, sys_lock); + + /* Shut down OTP */ + writel(OTP_PWR_DN_BIT, + priv->reg_base + MMAP_OTP_OFFSET(OTP_PWR_DN_OFFSET)); + + writel(0, sys_lock); +} + +static const struct auxiliary_device_id pci1xxxx_otp_eeprom_auxiliary_id_table[] = { + {.name = "mchp_pci1xxxx_gp.gp_otp_e2p"}, + {}, +}; +MODULE_DEVICE_TABLE(auxiliary, pci1xxxx_otp_eeprom_auxiliary_id_table); + +static struct auxiliary_driver pci1xxxx_otp_eeprom_driver = { + .driver = { + .name = AUX_DRIVER_NAME, + }, + .probe = pci1xxxx_otp_eeprom_probe, + .remove = pci1xxxx_otp_eeprom_remove, + .id_table = pci1xxxx_otp_eeprom_auxiliary_id_table +}; +module_auxiliary_driver(pci1xxxx_otp_eeprom_driver); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Kumaravel Thiagarajan "); +MODULE_AUTHOR("Tharun Kumar P "); +MODULE_AUTHOR("Vaibhaav Ram T.L "); +MODULE_DESCRIPTION("Microchip Technology Inc. PCI1xxxx OTP EEPROM Programmer"); diff --git a/drivers/misc/mei/bus-fixup.c b/drivers/misc/mei/bus-fixup.c index b8b716faf192..2733070acf39 100644 --- a/drivers/misc/mei/bus-fixup.c +++ b/drivers/misc/mei/bus-fixup.c @@ -184,6 +184,7 @@ static int mei_fwver(struct mei_cl_device *cldev) cldev->bus->fw_ver[i].hotfix = fwver->ver[i].hotfix; cldev->bus->fw_ver[i].buildno = fwver->ver[i].buildno; } + cldev->bus->fw_ver_received = 1; return ret; } @@ -237,8 +238,11 @@ static void mei_gsc_mkhi_ver(struct mei_cl_device *cldev) { int ret; - /* No need to enable the client if nothing is needed from it */ - if (!cldev->bus->fw_f_fw_ver_supported) + /* + * No need to enable the client if nothing is needed from it. + * No need to fill in version if it is already filled in by the fix address client. + */ + if (!cldev->bus->fw_f_fw_ver_supported || cldev->bus->fw_ver_received) return; ret = mei_cldev_enable(cldev); @@ -555,8 +559,8 @@ static struct mei_fixup { MEI_FIXUP(MEI_UUID_NFC_HCI, mei_nfc), MEI_FIXUP(MEI_UUID_WD, mei_wd), MEI_FIXUP(MEI_UUID_MKHIF_FIX, mei_mkhi_fix), - MEI_FIXUP(MEI_UUID_IGSC_MKHI, mei_gsc_mkhi_ver), MEI_FIXUP(MEI_UUID_IGSC_MKHI_FIX, mei_gsc_mkhi_fix_ver), + MEI_FIXUP(MEI_UUID_IGSC_MKHI, mei_gsc_mkhi_ver), MEI_FIXUP(MEI_UUID_HDCP, whitelist), MEI_FIXUP(MEI_UUID_ANY, vt_support), MEI_FIXUP(MEI_UUID_PAVP, pxp_is_ready), diff --git a/drivers/misc/mei/bus.c b/drivers/misc/mei/bus.c index 33ec6424dfee..2e65ce6bdec7 100644 --- a/drivers/misc/mei/bus.c +++ b/drivers/misc/mei/bus.c @@ -1329,6 +1329,7 @@ static struct mei_cl_device *mei_cl_bus_dev_alloc(struct mei_device *bus, mei_cl_bus_set_name(cldev); cldev->is_added = 0; INIT_LIST_HEAD(&cldev->bus_list); + device_enable_async_suspend(&cldev->dev); return cldev; } diff --git a/drivers/misc/mei/gsc-me.c b/drivers/misc/mei/gsc-me.c index e63cabd0818d..6be8f1cc052c 100644 --- a/drivers/misc/mei/gsc-me.c +++ b/drivers/misc/mei/gsc-me.c @@ -312,4 +312,5 @@ module_auxiliary_driver(mei_gsc_driver); MODULE_AUTHOR("Intel Corporation"); MODULE_ALIAS("auxiliary:i915.mei-gsc"); MODULE_ALIAS("auxiliary:i915.mei-gscfi"); +MODULE_DESCRIPTION("Intel(R) Graphics System Controller"); MODULE_LICENSE("GPL"); diff --git a/drivers/misc/mei/init.c b/drivers/misc/mei/init.c index bac8852aad51..c35e005b26be 100644 --- a/drivers/misc/mei/init.c +++ b/drivers/misc/mei/init.c @@ -142,6 +142,9 @@ int mei_reset(struct mei_device *dev) mei_hbm_reset(dev); + /* clean stale FW version */ + dev->fw_ver_received = 0; + memset(dev->rd_msg_hdr, 0, sizeof(dev->rd_msg_hdr)); if (ret) { @@ -157,7 +160,10 @@ int mei_reset(struct mei_device *dev) ret = mei_hw_start(dev); if (ret) { - dev_err(dev->dev, "hw_start failed ret = %d\n", ret); + char fw_sts_str[MEI_FW_STATUS_STR_SZ]; + + mei_fw_status_str(dev, fw_sts_str, MEI_FW_STATUS_STR_SZ); + dev_err(dev->dev, "hw_start failed ret = %d fw status = %s\n", ret, fw_sts_str); return ret; } diff --git a/drivers/misc/mei/main.c b/drivers/misc/mei/main.c index 51876da3fd65..bb4e9eabda97 100644 --- a/drivers/misc/mei/main.c +++ b/drivers/misc/mei/main.c @@ -27,7 +27,10 @@ #include "mei_dev.h" #include "client.h" -static struct class *mei_class; +static const struct class mei_class = { + .name = "mei", +}; + static dev_t mei_devt; #define MEI_MAX_DEVS MINORMASK static DEFINE_MUTEX(mei_minor_lock); @@ -1115,7 +1118,7 @@ void mei_set_devstate(struct mei_device *dev, enum mei_dev_state state) dev->dev_state = state; - clsdev = class_find_device_by_devt(mei_class, dev->cdev.dev); + clsdev = class_find_device_by_devt(&mei_class, dev->cdev.dev); if (clsdev) { sysfs_notify(&clsdev->kobj, NULL, "dev_state"); put_device(clsdev); @@ -1232,7 +1235,7 @@ int mei_register(struct mei_device *dev, struct device *parent) goto err_dev_add; } - clsdev = device_create_with_groups(mei_class, parent, devno, + clsdev = device_create_with_groups(&mei_class, parent, devno, dev, mei_groups, "mei%d", dev->minor); @@ -1264,7 +1267,7 @@ void mei_deregister(struct mei_device *dev) mei_dbgfs_deregister(dev); - device_destroy(mei_class, devno); + device_destroy(&mei_class, devno); mei_minor_free(dev); } @@ -1274,12 +1277,9 @@ static int __init mei_init(void) { int ret; - mei_class = class_create("mei"); - if (IS_ERR(mei_class)) { - pr_err("couldn't create class\n"); - ret = PTR_ERR(mei_class); - goto err; - } + ret = class_register(&mei_class); + if (ret) + return ret; ret = alloc_chrdev_region(&mei_devt, 0, MEI_MAX_DEVS, "mei"); if (ret < 0) { @@ -1298,15 +1298,14 @@ static int __init mei_init(void) err_chrdev: unregister_chrdev_region(mei_devt, MEI_MAX_DEVS); err_class: - class_destroy(mei_class); -err: + class_unregister(&mei_class); return ret; } static void __exit mei_exit(void) { unregister_chrdev_region(mei_devt, MEI_MAX_DEVS); - class_destroy(mei_class); + class_unregister(&mei_class); mei_cl_bus_exit(); } diff --git a/drivers/misc/mei/mei_dev.h b/drivers/misc/mei/mei_dev.h index 895011b7a0bf..cdf8a2edf0b3 100644 --- a/drivers/misc/mei/mei_dev.h +++ b/drivers/misc/mei/mei_dev.h @@ -512,6 +512,7 @@ struct mei_dev_timeouts { * @fw_ver : FW versions * * @fw_f_fw_ver_supported : fw feature: fw version supported + * @fw_ver_received : fw version received * * @me_clients_rwsem: rw lock over me_clients list * @me_clients : list of FW clients @@ -604,6 +605,7 @@ struct mei_device { struct mei_fw_version fw_ver[MEI_MAX_FW_VER_BLOCKS]; unsigned int fw_f_fw_ver_supported:1; + unsigned int fw_ver_received:1; struct rw_semaphore me_clients_rwsem; struct list_head me_clients; diff --git a/drivers/misc/mei/pxp/mei_pxp.c b/drivers/misc/mei/pxp/mei_pxp.c index 3bf560bbdee0..2dcb9169e404 100644 --- a/drivers/misc/mei/pxp/mei_pxp.c +++ b/drivers/misc/mei/pxp/mei_pxp.c @@ -40,8 +40,7 @@ mei_pxp_send_message(struct device *dev, const void *message, size_t size) cldev = to_mei_cl_device(dev); - /* temporary drop const qualifier till the API is fixed */ - byte = mei_cldev_send(cldev, (u8 *)message, size); + byte = mei_cldev_send(cldev, message, size); if (byte < 0) { dev_dbg(dev, "mei_cldev_send failed. %zd\n", byte); return byte; diff --git a/drivers/misc/qcom-coincell.c b/drivers/misc/qcom-coincell.c index 54d4f6ee8888..3c57f7429147 100644 --- a/drivers/misc/qcom-coincell.c +++ b/drivers/misc/qcom-coincell.c @@ -8,7 +8,6 @@ #include #include #include -#include #include struct qcom_coincell { diff --git a/drivers/misc/sram.c b/drivers/misc/sram.c index 61209739dc43..e248c0a8882f 100644 --- a/drivers/misc/sram.c +++ b/drivers/misc/sram.c @@ -10,8 +10,8 @@ #include #include #include +#include #include -#include #include #include #include diff --git a/drivers/misc/ti-st/st_core.c b/drivers/misc/ti-st/st_core.c index 01d2257deea4..c1a134bd8ba7 100644 --- a/drivers/misc/ti-st/st_core.c +++ b/drivers/misc/ti-st/st_core.c @@ -16,14 +16,12 @@ #include -extern void st_kim_recv(void *, const unsigned char *, long); -void st_int_recv(void *, const unsigned char *, long); /* * function pointer pointing to either, * st_kim_recv during registration to receive fw download responses * st_int_recv after registration to receive proto stack responses */ -static void (*st_recv) (void *, const unsigned char *, long); +static void (*st_recv)(void *disc_data, const u8 *ptr, size_t count); /********************************************************************/ static void add_channel_to_table(struct st_data_s *st_gdata, @@ -225,10 +223,8 @@ static inline void st_wakeup_ack(struct st_data_s *st_gdata, * HCI-Events, ACL, SCO, 4 types of HCI-LL PM packets * CH-8 packets from FM, CH-9 packets from GPS cores. */ -void st_int_recv(void *disc_data, - const unsigned char *data, long count) +static void st_int_recv(void *disc_data, const u8 *ptr, size_t count) { - char *ptr; struct st_proto_s *proto; unsigned short payload_len = 0; int len = 0; @@ -237,14 +233,12 @@ void st_int_recv(void *disc_data, struct st_data_s *st_gdata = (struct st_data_s *)disc_data; unsigned long flags; - ptr = (char *)data; - /* tty_receive sent null ? */ - if (unlikely(ptr == NULL) || (st_gdata == NULL)) { + if (st_gdata == NULL) { pr_err(" received null from TTY "); return; } - pr_debug("count %ld rx_state %ld" + pr_debug("count %zu rx_state %ld" "rx_count %ld", count, st_gdata->rx_state, st_gdata->rx_count); @@ -796,8 +790,8 @@ static void st_tty_close(struct tty_struct *tty) pr_debug("%s: done ", __func__); } -static void st_tty_receive(struct tty_struct *tty, const unsigned char *data, - const char *tty_flags, int count) +static void st_tty_receive(struct tty_struct *tty, const u8 *data, + const u8 *tty_flags, size_t count) { #ifdef VERBOSE print_hex_dump(KERN_DEBUG, ">in>", DUMP_PREFIX_NONE, diff --git a/drivers/misc/ti-st/st_kim.c b/drivers/misc/ti-st/st_kim.c index f2f6cab97c08..fe682e0553b2 100644 --- a/drivers/misc/ti-st/st_kim.c +++ b/drivers/misc/ti-st/st_kim.c @@ -127,21 +127,14 @@ static inline int kim_check_data_len(struct kim_data_s *kim_gdata, int len) * have been observed to come in bursts of different * tty_receive and hence the logic */ -static void kim_int_recv(struct kim_data_s *kim_gdata, - const unsigned char *data, long count) +static void kim_int_recv(struct kim_data_s *kim_gdata, const u8 *ptr, + size_t count) { - const unsigned char *ptr; int len = 0; unsigned char *plen; pr_debug("%s", __func__); /* Decode received bytes here */ - ptr = data; - if (unlikely(ptr == NULL)) { - pr_err(" received null from TTY "); - return; - } - while (count) { if (kim_gdata->rx_count) { len = min_t(unsigned int, kim_gdata->rx_count, count); @@ -424,7 +417,7 @@ static long download_firmware(struct kim_data_s *kim_gdata) * 1. response to read local version * 2. during send/recv's of firmware download */ -void st_kim_recv(void *disc_data, const unsigned char *data, long count) +void st_kim_recv(void *disc_data, const u8 *data, size_t count) { struct st_data_s *st_gdata = (struct st_data_s *)disc_data; struct kim_data_s *kim_gdata = st_gdata->kim_data; diff --git a/drivers/misc/tps6594-esm.c b/drivers/misc/tps6594-esm.c index 05e2c151e632..b4d67a1a24e4 100644 --- a/drivers/misc/tps6594-esm.c +++ b/drivers/misc/tps6594-esm.c @@ -56,8 +56,7 @@ static int tps6594_esm_probe(struct platform_device *pdev) for (i = 0; i < pdev->num_resources; i++) { irq = platform_get_irq_byname(pdev, pdev->resource[i].name); if (irq < 0) - return dev_err_probe(dev, irq, "Failed to get %s irq\n", - pdev->resource[i].name); + return irq; ret = devm_request_threaded_irq(dev, irq, NULL, tps6594_esm_isr, IRQF_ONESHOT, @@ -82,7 +81,7 @@ static int tps6594_esm_probe(struct platform_device *pdev) return 0; } -static int tps6594_esm_remove(struct platform_device *pdev) +static void tps6594_esm_remove(struct platform_device *pdev) { struct tps6594 *tps = dev_get_drvdata(pdev->dev.parent); struct device *dev = &pdev->dev; @@ -103,8 +102,6 @@ static int tps6594_esm_remove(struct platform_device *pdev) out: pm_runtime_put_sync(dev); pm_runtime_disable(dev); - - return ret; } static int tps6594_esm_suspend(struct device *dev) @@ -138,7 +135,7 @@ static struct platform_driver tps6594_esm_driver = { .pm = pm_sleep_ptr(&tps6594_esm_pm_ops), }, .probe = tps6594_esm_probe, - .remove = tps6594_esm_remove, + .remove_new = tps6594_esm_remove, }; module_platform_driver(tps6594_esm_driver); diff --git a/drivers/misc/tps6594-pfsm.c b/drivers/misc/tps6594-pfsm.c index 5223d1580807..88dcac814892 100644 --- a/drivers/misc/tps6594-pfsm.c +++ b/drivers/misc/tps6594-pfsm.c @@ -266,8 +266,7 @@ static int tps6594_pfsm_probe(struct platform_device *pdev) for (i = 0 ; i < pdev->num_resources ; i++) { irq = platform_get_irq_byname(pdev, pdev->resource[i].name); if (irq < 0) - return dev_err_probe(dev, irq, "Failed to get %s irq\n", - pdev->resource[i].name); + return irq; ret = devm_request_threaded_irq(dev, irq, NULL, tps6594_pfsm_isr, IRQF_ONESHOT, @@ -281,13 +280,11 @@ static int tps6594_pfsm_probe(struct platform_device *pdev) return misc_register(&pfsm->miscdev); } -static int tps6594_pfsm_remove(struct platform_device *pdev) +static void tps6594_pfsm_remove(struct platform_device *pdev) { struct tps6594_pfsm *pfsm = platform_get_drvdata(pdev); misc_deregister(&pfsm->miscdev); - - return 0; } static struct platform_driver tps6594_pfsm_driver = { @@ -295,7 +292,7 @@ static struct platform_driver tps6594_pfsm_driver = { .name = "tps6594-pfsm", }, .probe = tps6594_pfsm_probe, - .remove = tps6594_pfsm_remove, + .remove_new = tps6594_pfsm_remove, }; module_platform_driver(tps6594_pfsm_driver); diff --git a/drivers/misc/vcpu_stall_detector.c b/drivers/misc/vcpu_stall_detector.c index 53b5506080e1..6479c962da1a 100644 --- a/drivers/misc/vcpu_stall_detector.c +++ b/drivers/misc/vcpu_stall_detector.c @@ -13,7 +13,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/misc/xilinx_sdfec.c b/drivers/misc/xilinx_sdfec.c index 270ff4c5971a..94a0ee19bf20 100644 --- a/drivers/misc/xilinx_sdfec.c +++ b/drivers/misc/xilinx_sdfec.c @@ -15,7 +15,8 @@ #include #include #include -#include +#include +#include #include #include #include @@ -1347,7 +1348,6 @@ static int xsdfec_probe(struct platform_device *pdev) { struct xsdfec_dev *xsdfec; struct device *dev; - struct resource *res; int err; bool irq_enabled = true; @@ -1363,8 +1363,7 @@ static int xsdfec_probe(struct platform_device *pdev) return err; dev = xsdfec->dev; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - xsdfec->regs = devm_ioremap_resource(dev, res); + xsdfec->regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(xsdfec->regs)) { err = PTR_ERR(xsdfec->regs); goto err_xsdfec_dev; diff --git a/drivers/misc/xilinx_tmr_inject.c b/drivers/misc/xilinx_tmr_inject.c index d96f6d7cd109..9fc5835bfebc 100644 --- a/drivers/misc/xilinx_tmr_inject.c +++ b/drivers/misc/xilinx_tmr_inject.c @@ -11,7 +11,8 @@ #include #include -#include +#include +#include #include /* TMR Inject Register offsets */ diff --git a/drivers/misc/xilinx_tmr_manager.c b/drivers/misc/xilinx_tmr_manager.c index 0ef55e06d3a0..03912a90fd95 100644 --- a/drivers/misc/xilinx_tmr_manager.c +++ b/drivers/misc/xilinx_tmr_manager.c @@ -15,7 +15,8 @@ #include #include -#include +#include +#include /* TMR Manager Register offsets */ #define XTMR_MANAGER_CR_OFFSET 0x0 @@ -170,8 +171,7 @@ static int xtmr_manager_probe(struct platform_device *pdev) if (!xtmr_manager) return -ENOMEM; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - xtmr_manager->regs = devm_ioremap_resource(&pdev->dev, res); + xtmr_manager->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(xtmr_manager->regs)) return PTR_ERR(xtmr_manager->regs); diff --git a/drivers/mmc/core/sdio_uart.c b/drivers/mmc/core/sdio_uart.c index aa659758563f..ef38dcd3a887 100644 --- a/drivers/mmc/core/sdio_uart.c +++ b/drivers/mmc/core/sdio_uart.c @@ -760,8 +760,8 @@ static void sdio_uart_hangup(struct tty_struct *tty) tty_port_hangup(&port->port); } -static int sdio_uart_write(struct tty_struct *tty, const unsigned char *buf, - int count) +static ssize_t sdio_uart_write(struct tty_struct *tty, const u8 *buf, + size_t count) { struct sdio_uart_port *port = tty->driver_data; int ret; diff --git a/drivers/net/caif/caif_serial.c b/drivers/net/caif/caif_serial.c index 688075859ae4..ed3a589def6b 100644 --- a/drivers/net/caif/caif_serial.c +++ b/drivers/net/caif/caif_serial.c @@ -159,7 +159,7 @@ static inline void debugfs_tx(struct ser_device *ser, const u8 *data, int size) #endif static void ldisc_receive(struct tty_struct *tty, const u8 *data, - const char *flags, int count) + const u8 *flags, size_t count) { struct sk_buff *skb = NULL; struct ser_device *ser; diff --git a/drivers/net/can/can327.c b/drivers/net/can/can327.c index dc7192ecb001..24af63961030 100644 --- a/drivers/net/can/can327.c +++ b/drivers/net/can/can327.c @@ -885,10 +885,10 @@ static bool can327_is_valid_rx_char(u8 c) * This will not be re-entered while running, but other ldisc * functions may be called in parallel. */ -static void can327_ldisc_rx(struct tty_struct *tty, const unsigned char *cp, - const char *fp, int count) +static void can327_ldisc_rx(struct tty_struct *tty, const u8 *cp, + const u8 *fp, size_t count) { - struct can327 *elm = (struct can327 *)tty->disc_data; + struct can327 *elm = tty->disc_data; size_t first_new_char_idx; if (elm->uart_side_failure) @@ -901,15 +901,17 @@ static void can327_ldisc_rx(struct tty_struct *tty, const unsigned char *cp, */ first_new_char_idx = elm->rxfill; - while (count-- && elm->rxfill < CAN327_SIZE_RXBUF) { + while (count--) { + if (elm->rxfill >= CAN327_SIZE_RXBUF) { + netdev_err(elm->dev, + "Receive buffer overflowed. Bad chip or wiring? count = %zu", + count); + goto uart_failure; + } if (fp && *fp++) { netdev_err(elm->dev, "Error in received character stream. Check your wiring."); - - can327_uart_side_failure(elm); - - spin_unlock_bh(&elm->lock); - return; + goto uart_failure; } /* Ignore NUL characters, which the PIC microcontroller may @@ -925,10 +927,7 @@ static void can327_ldisc_rx(struct tty_struct *tty, const unsigned char *cp, netdev_err(elm->dev, "Received illegal character %02x.\n", *cp); - can327_uart_side_failure(elm); - - spin_unlock_bh(&elm->lock); - return; + goto uart_failure; } elm->rxbuf[elm->rxfill++] = *cp; @@ -937,19 +936,13 @@ static void can327_ldisc_rx(struct tty_struct *tty, const unsigned char *cp, cp++; } - if (count >= 0) { - netdev_err(elm->dev, - "Receive buffer overflowed. Bad chip or wiring? count = %i", - count); - - can327_uart_side_failure(elm); - - spin_unlock_bh(&elm->lock); - return; - } - can327_parse_rxbuf(elm, first_new_char_idx); spin_unlock_bh(&elm->lock); + + return; +uart_failure: + can327_uart_side_failure(elm); + spin_unlock_bh(&elm->lock); } /* Write out remaining transmit buffer. @@ -990,7 +983,7 @@ static void can327_ldisc_tx_worker(struct work_struct *work) /* Called by the driver when there's room for more data. */ static void can327_ldisc_tx_wakeup(struct tty_struct *tty) { - struct can327 *elm = (struct can327 *)tty->disc_data; + struct can327 *elm = tty->disc_data; schedule_work(&elm->tx_work); } @@ -1067,7 +1060,7 @@ static int can327_ldisc_open(struct tty_struct *tty) */ static void can327_ldisc_close(struct tty_struct *tty) { - struct can327 *elm = (struct can327 *)tty->disc_data; + struct can327 *elm = tty->disc_data; /* unregister_netdev() calls .ndo_stop() so we don't have to. */ unregister_candev(elm->dev); @@ -1092,7 +1085,7 @@ static void can327_ldisc_close(struct tty_struct *tty) static int can327_ldisc_ioctl(struct tty_struct *tty, unsigned int cmd, unsigned long arg) { - struct can327 *elm = (struct can327 *)tty->disc_data; + struct can327 *elm = tty->disc_data; unsigned int tmp; switch (cmd) { diff --git a/drivers/net/can/sja1000/ems_pci.c b/drivers/net/can/sja1000/ems_pci.c index ac86640998a8..5bca719d61f5 100644 --- a/drivers/net/can/sja1000/ems_pci.c +++ b/drivers/net/can/sja1000/ems_pci.c @@ -108,11 +108,6 @@ struct ems_pci_card { #define EMS_PCI_BASE_SIZE 4096 /* size of controller area */ -#ifndef PCI_VENDOR_ID_ASIX -#define PCI_VENDOR_ID_ASIX 0x125b -#define PCI_DEVICE_ID_ASIX_9110 0x9110 -#define PCI_SUBVENDOR_ID_ASIX 0xa000 -#endif #define PCI_SUBDEVICE_ID_EMS 0x4010 static const struct pci_device_id ems_pci_tbl[] = { @@ -123,7 +118,7 @@ static const struct pci_device_id ems_pci_tbl[] = { /* CPC-104P v2 */ {PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9030, PCI_VENDOR_ID_PLX, 0x4002}, /* CPC-PCIe v3 */ - {PCI_VENDOR_ID_ASIX, PCI_DEVICE_ID_ASIX_9110, PCI_SUBVENDOR_ID_ASIX, PCI_SUBDEVICE_ID_EMS}, + {PCI_VENDOR_ID_ASIX, PCI_DEVICE_ID_ASIX_AX99100_LB, 0xa000, PCI_SUBDEVICE_ID_EMS}, {0,} }; MODULE_DEVICE_TABLE(pci, ems_pci_tbl); diff --git a/drivers/net/can/slcan/slcan-core.c b/drivers/net/can/slcan/slcan-core.c index f4db77007c13..24c6622d36bd 100644 --- a/drivers/net/can/slcan/slcan-core.c +++ b/drivers/net/can/slcan/slcan-core.c @@ -583,7 +583,7 @@ static void slcan_transmit(struct work_struct *work) */ static void slcan_write_wakeup(struct tty_struct *tty) { - struct slcan *sl = (struct slcan *)tty->disc_data; + struct slcan *sl = tty->disc_data; schedule_work(&sl->tx_work); } @@ -774,11 +774,10 @@ static const struct net_device_ops slcan_netdev_ops = { * be re-entered while running but other ldisc functions may be called * in parallel */ -static void slcan_receive_buf(struct tty_struct *tty, - const unsigned char *cp, const char *fp, - int count) +static void slcan_receive_buf(struct tty_struct *tty, const u8 *cp, + const u8 *fp, size_t count) { - struct slcan *sl = (struct slcan *)tty->disc_data; + struct slcan *sl = tty->disc_data; if (!netif_running(sl->dev)) return; @@ -862,7 +861,7 @@ static int slcan_open(struct tty_struct *tty) */ static void slcan_close(struct tty_struct *tty) { - struct slcan *sl = (struct slcan *)tty->disc_data; + struct slcan *sl = tty->disc_data; unregister_candev(sl->dev); @@ -886,7 +885,7 @@ static void slcan_close(struct tty_struct *tty) static int slcan_ioctl(struct tty_struct *tty, unsigned int cmd, unsigned long arg) { - struct slcan *sl = (struct slcan *)tty->disc_data; + struct slcan *sl = tty->disc_data; unsigned int tmp; switch (cmd) { diff --git a/drivers/net/hamradio/6pack.c b/drivers/net/hamradio/6pack.c index 9fb567524220..6ed38a3cdd73 100644 --- a/drivers/net/hamradio/6pack.c +++ b/drivers/net/hamradio/6pack.c @@ -427,8 +427,8 @@ out: * a block of 6pack data has been received, which can now be decapsulated * and sent on to some IP layer for further processing. */ -static void sixpack_receive_buf(struct tty_struct *tty, - const unsigned char *cp, const char *fp, int count) +static void sixpack_receive_buf(struct tty_struct *tty, const u8 *cp, + const u8 *fp, size_t count) { struct sixpack *sp; int count1; diff --git a/drivers/net/hamradio/mkiss.c b/drivers/net/hamradio/mkiss.c index c251e04ae047..5f38a002bd9e 100644 --- a/drivers/net/hamradio/mkiss.c +++ b/drivers/net/hamradio/mkiss.c @@ -874,8 +874,8 @@ static int mkiss_ioctl(struct tty_struct *tty, unsigned int cmd, * a block of data has been received, which can now be decapsulated * and sent on to the AX.25 layer for further processing. */ -static void mkiss_receive_buf(struct tty_struct *tty, const unsigned char *cp, - const char *fp, int count) +static void mkiss_receive_buf(struct tty_struct *tty, const u8 *cp, + const u8 *fp, size_t count) { struct mkiss *ax = mkiss_get(tty); diff --git a/drivers/net/mctp/mctp-serial.c b/drivers/net/mctp/mctp-serial.c index 9f9eaf896047..5bf6fdff701c 100644 --- a/drivers/net/mctp/mctp-serial.c +++ b/drivers/net/mctp/mctp-serial.c @@ -390,9 +390,8 @@ static void mctp_serial_push(struct mctp_serial *dev, unsigned char c) } } -static void mctp_serial_tty_receive_buf(struct tty_struct *tty, - const unsigned char *c, - const char *f, int len) +static void mctp_serial_tty_receive_buf(struct tty_struct *tty, const u8 *c, + const u8 *f, size_t len) { struct mctp_serial *dev = tty->disc_data; int i; diff --git a/drivers/net/ppp/ppp_async.c b/drivers/net/ppp/ppp_async.c index 15a179631903..fbaaa8c102a1 100644 --- a/drivers/net/ppp/ppp_async.c +++ b/drivers/net/ppp/ppp_async.c @@ -98,7 +98,7 @@ static int ppp_async_send(struct ppp_channel *chan, struct sk_buff *skb); static int ppp_async_push(struct asyncppp *ap); static void ppp_async_flush_output(struct asyncppp *ap); static void ppp_async_input(struct asyncppp *ap, const unsigned char *buf, - const char *flags, int count); + const u8 *flags, int count); static int ppp_async_ioctl(struct ppp_channel *chan, unsigned int cmd, unsigned long arg); static void ppp_async_process(struct tasklet_struct *t); @@ -257,9 +257,8 @@ static void ppp_asynctty_hangup(struct tty_struct *tty) * Pppd reads and writes packets via /dev/ppp instead. */ static ssize_t -ppp_asynctty_read(struct tty_struct *tty, struct file *file, - unsigned char *buf, size_t count, - void **cookie, unsigned long offset) +ppp_asynctty_read(struct tty_struct *tty, struct file *file, u8 *buf, + size_t count, void **cookie, unsigned long offset) { return -EAGAIN; } @@ -269,8 +268,8 @@ ppp_asynctty_read(struct tty_struct *tty, struct file *file, * from the ppp generic stuff. */ static ssize_t -ppp_asynctty_write(struct tty_struct *tty, struct file *file, - const unsigned char *buf, size_t count) +ppp_asynctty_write(struct tty_struct *tty, struct file *file, const u8 *buf, + size_t count) { return -EAGAIN; } @@ -328,17 +327,10 @@ ppp_asynctty_ioctl(struct tty_struct *tty, unsigned int cmd, unsigned long arg) return err; } -/* No kernel lock - fine */ -static __poll_t -ppp_asynctty_poll(struct tty_struct *tty, struct file *file, poll_table *wait) -{ - return 0; -} - /* May sleep, don't call from interrupt level or with interrupts disabled */ static void -ppp_asynctty_receive(struct tty_struct *tty, const unsigned char *buf, - const char *cflags, int count) +ppp_asynctty_receive(struct tty_struct *tty, const u8 *buf, const u8 *cflags, + size_t count) { struct asyncppp *ap = ap_get(tty); unsigned long flags; @@ -378,7 +370,6 @@ static struct tty_ldisc_ops ppp_ldisc = { .read = ppp_asynctty_read, .write = ppp_asynctty_write, .ioctl = ppp_asynctty_ioctl, - .poll = ppp_asynctty_poll, .receive_buf = ppp_asynctty_receive, .write_wakeup = ppp_asynctty_wakeup, }; @@ -827,8 +818,7 @@ process_input_packet(struct asyncppp *ap) other ldisc functions but will not be re-entered */ static void -ppp_async_input(struct asyncppp *ap, const unsigned char *buf, - const char *flags, int count) +ppp_async_input(struct asyncppp *ap, const u8 *buf, const u8 *flags, int count) { struct sk_buff *skb; int c, i, j, n, s, f; diff --git a/drivers/net/ppp/ppp_synctty.c b/drivers/net/ppp/ppp_synctty.c index 18283b7b94bc..ebcdffdf4f0e 100644 --- a/drivers/net/ppp/ppp_synctty.c +++ b/drivers/net/ppp/ppp_synctty.c @@ -93,8 +93,8 @@ static int ppp_sync_ioctl(struct ppp_channel *chan, unsigned int cmd, static void ppp_sync_process(struct tasklet_struct *t); static int ppp_sync_push(struct syncppp *ap); static void ppp_sync_flush_output(struct syncppp *ap); -static void ppp_sync_input(struct syncppp *ap, const unsigned char *buf, - const char *flags, int count); +static void ppp_sync_input(struct syncppp *ap, const u8 *buf, const u8 *flags, + int count); static const struct ppp_channel_ops sync_ops = { .start_xmit = ppp_sync_send, @@ -255,8 +255,7 @@ static void ppp_sync_hangup(struct tty_struct *tty) * Pppd reads and writes packets via /dev/ppp instead. */ static ssize_t -ppp_sync_read(struct tty_struct *tty, struct file *file, - unsigned char *buf, size_t count, +ppp_sync_read(struct tty_struct *tty, struct file *file, u8 *buf, size_t count, void **cookie, unsigned long offset) { return -EAGAIN; @@ -267,8 +266,8 @@ ppp_sync_read(struct tty_struct *tty, struct file *file, * from the ppp generic stuff. */ static ssize_t -ppp_sync_write(struct tty_struct *tty, struct file *file, - const unsigned char *buf, size_t count) +ppp_sync_write(struct tty_struct *tty, struct file *file, const u8 *buf, + size_t count) { return -EAGAIN; } @@ -321,17 +320,10 @@ ppp_synctty_ioctl(struct tty_struct *tty, unsigned int cmd, unsigned long arg) return err; } -/* No kernel lock - fine */ -static __poll_t -ppp_sync_poll(struct tty_struct *tty, struct file *file, poll_table *wait) -{ - return 0; -} - /* May sleep, don't call from interrupt level or with interrupts disabled */ static void -ppp_sync_receive(struct tty_struct *tty, const unsigned char *buf, - const char *cflags, int count) +ppp_sync_receive(struct tty_struct *tty, const u8 *buf, const u8 *cflags, + size_t count) { struct syncppp *ap = sp_get(tty); unsigned long flags; @@ -371,7 +363,6 @@ static struct tty_ldisc_ops ppp_sync_ldisc = { .read = ppp_sync_read, .write = ppp_sync_write, .ioctl = ppp_synctty_ioctl, - .poll = ppp_sync_poll, .receive_buf = ppp_sync_receive, .write_wakeup = ppp_sync_wakeup, }; @@ -663,8 +654,7 @@ ppp_sync_flush_output(struct syncppp *ap) * frame is considered to be in error and is tossed. */ static void -ppp_sync_input(struct syncppp *ap, const unsigned char *buf, - const char *flags, int count) +ppp_sync_input(struct syncppp *ap, const u8 *buf, const u8 *flags, int count) { struct sk_buff *skb; unsigned char *p; diff --git a/drivers/net/slip/slip.c b/drivers/net/slip/slip.c index 6865d32270e5..e4280e37fec9 100644 --- a/drivers/net/slip/slip.c +++ b/drivers/net/slip/slip.c @@ -685,8 +685,8 @@ static void sl_setup(struct net_device *dev) * in parallel */ -static void slip_receive_buf(struct tty_struct *tty, const unsigned char *cp, - const char *fp, int count) +static void slip_receive_buf(struct tty_struct *tty, const u8 *cp, const u8 *fp, + size_t count) { struct slip *sl = tty->disc_data; diff --git a/drivers/net/usb/hso.c b/drivers/net/usb/hso.c index ce1f6081d582..83b8452220ec 100644 --- a/drivers/net/usb/hso.c +++ b/drivers/net/usb/hso.c @@ -1322,11 +1322,10 @@ static void hso_serial_close(struct tty_struct *tty, struct file *filp) } /* close the requested serial port */ -static int hso_serial_write(struct tty_struct *tty, const unsigned char *buf, - int count) +static ssize_t hso_serial_write(struct tty_struct *tty, const u8 *buf, + size_t count) { struct hso_serial *serial = tty->driver_data; - int space, tx_bytes; unsigned long flags; /* sanity check */ @@ -1337,21 +1336,16 @@ static int hso_serial_write(struct tty_struct *tty, const unsigned char *buf, spin_lock_irqsave(&serial->serial_lock, flags); - space = serial->tx_data_length - serial->tx_buffer_count; - tx_bytes = (count < space) ? count : space; + count = min_t(size_t, serial->tx_data_length - serial->tx_buffer_count, + count); + memcpy(serial->tx_buffer + serial->tx_buffer_count, buf, count); + serial->tx_buffer_count += count; - if (!tx_bytes) - goto out; - - memcpy(serial->tx_buffer + serial->tx_buffer_count, buf, tx_bytes); - serial->tx_buffer_count += tx_bytes; - -out: spin_unlock_irqrestore(&serial->serial_lock, flags); hso_kick_transmit(serial); /* done */ - return tx_bytes; + return count; } /* how much room is there for writing */ diff --git a/drivers/net/wireless/mediatek/mt76/usb.c b/drivers/net/wireless/mediatek/mt76/usb.c index 5e5c7bf51174..1584665fe3cb 100644 --- a/drivers/net/wireless/mediatek/mt76/usb.c +++ b/drivers/net/wireless/mediatek/mt76/usb.c @@ -286,8 +286,7 @@ static bool mt76u_check_sg(struct mt76_dev *dev) struct usb_device *udev = interface_to_usbdev(uintf); return (!disable_usb_sg && udev->bus->sg_tablesize > 0 && - (udev->bus->no_sg_constraint || - udev->speed == USB_SPEED_WIRELESS)); + udev->bus->no_sg_constraint); } static int diff --git a/drivers/nvmem/Kconfig b/drivers/nvmem/Kconfig index da9befa3d6c4..5bc9c4874fe3 100644 --- a/drivers/nvmem/Kconfig +++ b/drivers/nvmem/Kconfig @@ -226,6 +226,19 @@ config NVMEM_QCOM_QFPROM This driver can also be built as a module. If so, the module will be called nvmem_qfprom. +config NVMEM_QCOM_SEC_QFPROM + tristate "QCOM SECURE QFPROM Support" + depends on ARCH_QCOM || COMPILE_TEST + depends on HAS_IOMEM + depends on OF + select QCOM_SCM + help + Say y here to enable secure QFPROM support. The secure QFPROM provides access + functions for QFPROM data to rest of the drivers via nvmem interface. + + This driver can also be built as a module. If so, the module will be called + nvmem_sec_qfprom. + config NVMEM_RAVE_SP_EEPROM tristate "Rave SP EEPROM Support" depends on RAVE_SP_CORE @@ -247,7 +260,7 @@ config NVMEM_ROCKCHIP_EFUSE depends on ARCH_ROCKCHIP || COMPILE_TEST depends on HAS_IOMEM help - This is a simple drive to dump specified values of Rockchip SoC + This is a simple driver to dump specified values of Rockchip SoC from eFuse, such as cpu-leakage. This driver can also be built as a module. If so, the module @@ -258,8 +271,8 @@ config NVMEM_ROCKCHIP_OTP depends on ARCH_ROCKCHIP || COMPILE_TEST depends on HAS_IOMEM help - This is a simple drive to dump specified values of Rockchip SoC - from otp, such as cpu-leakage. + This is a simple driver to dump specified values of Rockchip SoC + from OTP, such as cpu-leakage. This driver can also be built as a module. If so, the module will be called nvmem_rockchip_otp. @@ -392,4 +405,16 @@ config NVMEM_ZYNQMP If sure, say yes. If unsure, say no. +config NVMEM_QORIQ_EFUSE + tristate "NXP QorIQ eFuse support" + depends on PPC_85xx || COMPILE_TEST + depends on HAS_IOMEM + help + This driver provides read support for the eFuses (SFP) on NXP QorIQ + series SoC's. This includes secure boot settings, the globally unique + NXP ID 'FUIDR' and the OEM unique ID 'OUIDR'. + + This driver can also be built as a module. If so, the module + will be called nvmem_qoriq_efuse. + endif diff --git a/drivers/nvmem/Makefile b/drivers/nvmem/Makefile index cc23ce4ffb1f..423baf089515 100644 --- a/drivers/nvmem/Makefile +++ b/drivers/nvmem/Makefile @@ -46,6 +46,8 @@ obj-$(CONFIG_NVMEM_NINTENDO_OTP) += nvmem-nintendo-otp.o nvmem-nintendo-otp-y := nintendo-otp.o obj-$(CONFIG_NVMEM_QCOM_QFPROM) += nvmem_qfprom.o nvmem_qfprom-y := qfprom.o +obj-$(CONFIG_NVMEM_QCOM_SEC_QFPROM) += nvmem_sec_qfprom.o +nvmem_sec_qfprom-y := sec-qfprom.o obj-$(CONFIG_NVMEM_RAVE_SP_EEPROM) += nvmem-rave-sp-eeprom.o nvmem-rave-sp-eeprom-y := rave-sp-eeprom.o obj-$(CONFIG_NVMEM_RMEM) += nvmem-rmem.o @@ -77,3 +79,5 @@ obj-$(CONFIG_NVMEM_VF610_OCOTP) += nvmem-vf610-ocotp.o nvmem-vf610-ocotp-y := vf610-ocotp.o obj-$(CONFIG_NVMEM_ZYNQMP) += nvmem_zynqmp_nvmem.o nvmem_zynqmp_nvmem-y := zynqmp_nvmem.o +obj-$(CONFIG_NVMEM_QORIQ_EFUSE) += nvmem-qoriq-efuse.o +nvmem-qoriq-efuse-y := qoriq-efuse.o diff --git a/drivers/nvmem/bcm-ocotp.c b/drivers/nvmem/bcm-ocotp.c index 0c1fa0c4feb2..2490f44caa40 100644 --- a/drivers/nvmem/bcm-ocotp.c +++ b/drivers/nvmem/bcm-ocotp.c @@ -8,7 +8,6 @@ #include #include #include -#include #include /* diff --git a/drivers/nvmem/brcm_nvram.c b/drivers/nvmem/brcm_nvram.c index 4567c597c87f..9737104f3b76 100644 --- a/drivers/nvmem/brcm_nvram.c +++ b/drivers/nvmem/brcm_nvram.c @@ -159,8 +159,7 @@ static int brcm_nvram_probe(struct platform_device *pdev) return -ENOMEM; priv->dev = dev; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - priv->base = devm_ioremap_resource(dev, res); + priv->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(priv->base)) return PTR_ERR(priv->base); diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c index 3f8c7718412b..eaf6a3fe8ca6 100644 --- a/drivers/nvmem/core.c +++ b/drivers/nvmem/core.c @@ -17,7 +17,6 @@ #include #include #include -#include #include struct nvmem_device { @@ -772,12 +771,16 @@ int __nvmem_layout_register(struct nvmem_layout *layout, struct module *owner) list_add(&layout->node, &nvmem_layouts); spin_unlock(&nvmem_layout_lock); + blocking_notifier_call_chain(&nvmem_notifier, NVMEM_LAYOUT_ADD, layout); + return 0; } EXPORT_SYMBOL_GPL(__nvmem_layout_register); void nvmem_layout_unregister(struct nvmem_layout *layout) { + blocking_notifier_call_chain(&nvmem_notifier, NVMEM_LAYOUT_REMOVE, layout); + spin_lock(&nvmem_layout_lock); list_del(&layout->node); spin_unlock(&nvmem_layout_lock); @@ -786,10 +789,10 @@ EXPORT_SYMBOL_GPL(nvmem_layout_unregister); static struct nvmem_layout *nvmem_layout_get(struct nvmem_device *nvmem) { - struct device_node *layout_np, *np = nvmem->dev.of_node; + struct device_node *layout_np; struct nvmem_layout *l, *layout = ERR_PTR(-EPROBE_DEFER); - layout_np = of_get_child_by_name(np, "nvmem-layout"); + layout_np = of_nvmem_layout_get_container(nvmem); if (!layout_np) return NULL; @@ -998,12 +1001,6 @@ struct nvmem_device *nvmem_register(const struct nvmem_config *config) if (rval) goto err_remove_cells; - dev_dbg(&nvmem->dev, "Registering nvmem device %s\n", config->name); - - rval = device_add(&nvmem->dev); - if (rval) - goto err_remove_cells; - rval = nvmem_add_cells_from_fixed_layout(nvmem); if (rval) goto err_remove_cells; @@ -1012,6 +1009,12 @@ struct nvmem_device *nvmem_register(const struct nvmem_config *config) if (rval) goto err_remove_cells; + dev_dbg(&nvmem->dev, "Registering nvmem device %s\n", config->name); + + rval = device_add(&nvmem->dev); + if (rval) + goto err_remove_cells; + blocking_notifier_call_chain(&nvmem_notifier, NVMEM_ADD, nvmem); return nvmem; diff --git a/drivers/nvmem/imx-iim.c b/drivers/nvmem/imx-iim.c index c86339a7f583..f13bbd164086 100644 --- a/drivers/nvmem/imx-iim.c +++ b/drivers/nvmem/imx-iim.c @@ -14,7 +14,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/nvmem/imx-ocotp-ele.c b/drivers/nvmem/imx-ocotp-ele.c index f1cbbc9afeb8..cf920542f939 100644 --- a/drivers/nvmem/imx-ocotp-ele.c +++ b/drivers/nvmem/imx-ocotp-ele.c @@ -9,7 +9,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/nvmem/imx-ocotp-scu.c b/drivers/nvmem/imx-ocotp-scu.c index 399e1eb8b4c1..c38d9c1c3f48 100644 --- a/drivers/nvmem/imx-ocotp-scu.c +++ b/drivers/nvmem/imx-ocotp-scu.c @@ -11,7 +11,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/nvmem/imx-ocotp.c b/drivers/nvmem/imx-ocotp.c index ab556c011f3e..a223d9537f22 100644 --- a/drivers/nvmem/imx-ocotp.c +++ b/drivers/nvmem/imx-ocotp.c @@ -20,7 +20,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/nvmem/lpc18xx_otp.c b/drivers/nvmem/lpc18xx_otp.c index 16c92ea85d49..adc9948e7b2e 100644 --- a/drivers/nvmem/lpc18xx_otp.c +++ b/drivers/nvmem/lpc18xx_otp.c @@ -14,7 +14,6 @@ #include #include #include -#include #include #include @@ -68,14 +67,12 @@ static int lpc18xx_otp_probe(struct platform_device *pdev) { struct nvmem_device *nvmem; struct lpc18xx_otp *otp; - struct resource *res; otp = devm_kzalloc(&pdev->dev, sizeof(*otp), GFP_KERNEL); if (!otp) return -ENOMEM; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - otp->base = devm_ioremap_resource(&pdev->dev, res); + otp->base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(otp->base)) return PTR_ERR(otp->base); diff --git a/drivers/nvmem/meson-mx-efuse.c b/drivers/nvmem/meson-mx-efuse.c index 13eb14316f46..d6d7aeda31f9 100644 --- a/drivers/nvmem/meson-mx-efuse.c +++ b/drivers/nvmem/meson-mx-efuse.c @@ -14,7 +14,6 @@ #include #include #include -#include #include #include #include @@ -194,7 +193,6 @@ static int meson_mx_efuse_probe(struct platform_device *pdev) { const struct meson_mx_efuse_platform_data *drvdata; struct meson_mx_efuse *efuse; - struct resource *res; drvdata = of_device_get_match_data(&pdev->dev); if (!drvdata) @@ -204,8 +202,7 @@ static int meson_mx_efuse_probe(struct platform_device *pdev) if (!efuse) return -ENOMEM; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - efuse->base = devm_ioremap_resource(&pdev->dev, res); + efuse->base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(efuse->base)) return PTR_ERR(efuse->base); diff --git a/drivers/nvmem/qcom-spmi-sdam.c b/drivers/nvmem/qcom-spmi-sdam.c index f822790db49e..70f2d4f2efbf 100644 --- a/drivers/nvmem/qcom-spmi-sdam.c +++ b/drivers/nvmem/qcom-spmi-sdam.c @@ -6,8 +6,8 @@ #include #include #include -#include #include +#include #include #define SDAM_MEM_START 0x40 diff --git a/drivers/nvmem/qfprom.c b/drivers/nvmem/qfprom.c index c1e893c8a247..14814cba2dd6 100644 --- a/drivers/nvmem/qfprom.c +++ b/drivers/nvmem/qfprom.c @@ -374,8 +374,7 @@ static int qfprom_probe(struct platform_device *pdev) return -ENOMEM; /* The corrected section is always provided */ - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - priv->qfpcorrected = devm_ioremap_resource(dev, res); + priv->qfpcorrected = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(priv->qfpcorrected)) return PTR_ERR(priv->qfpcorrected); @@ -402,12 +401,10 @@ static int qfprom_probe(struct platform_device *pdev) priv->qfpraw = devm_ioremap_resource(dev, res); if (IS_ERR(priv->qfpraw)) return PTR_ERR(priv->qfpraw); - res = platform_get_resource(pdev, IORESOURCE_MEM, 2); - priv->qfpconf = devm_ioremap_resource(dev, res); + priv->qfpconf = devm_platform_ioremap_resource(pdev, 2); if (IS_ERR(priv->qfpconf)) return PTR_ERR(priv->qfpconf); - res = platform_get_resource(pdev, IORESOURCE_MEM, 3); - priv->qfpsecurity = devm_ioremap_resource(dev, res); + priv->qfpsecurity = devm_platform_ioremap_resource(pdev, 3); if (IS_ERR(priv->qfpsecurity)) return PTR_ERR(priv->qfpsecurity); @@ -427,12 +424,8 @@ static int qfprom_probe(struct platform_device *pdev) return PTR_ERR(priv->vcc); priv->secclk = devm_clk_get(dev, "core"); - if (IS_ERR(priv->secclk)) { - ret = PTR_ERR(priv->secclk); - if (ret != -EPROBE_DEFER) - dev_err(dev, "Error getting clock: %d\n", ret); - return ret; - } + if (IS_ERR(priv->secclk)) + return dev_err_probe(dev, PTR_ERR(priv->secclk), "Error getting clock\n"); /* Only enable writing if we have SoC data. */ if (priv->soc_data) diff --git a/drivers/nvmem/qoriq-efuse.c b/drivers/nvmem/qoriq-efuse.c new file mode 100644 index 000000000000..e7fd04d6dd94 --- /dev/null +++ b/drivers/nvmem/qoriq-efuse.c @@ -0,0 +1,78 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2023 Westermo Network Technologies AB + */ + +#include +#include +#include +#include +#include +#include + +struct qoriq_efuse_priv { + void __iomem *base; +}; + +static int qoriq_efuse_read(void *context, unsigned int offset, void *val, + size_t bytes) +{ + struct qoriq_efuse_priv *priv = context; + + /* .stride = 4 so offset is guaranteed to be aligned */ + __ioread32_copy(val, priv->base + offset, bytes / 4); + + /* Ignore trailing bytes (there shouldn't be any) */ + + return 0; +} + +static int qoriq_efuse_probe(struct platform_device *pdev) +{ + struct nvmem_config config = { + .dev = &pdev->dev, + .read_only = true, + .reg_read = qoriq_efuse_read, + .stride = sizeof(u32), + .word_size = sizeof(u32), + .name = "qoriq_efuse_read", + .id = NVMEM_DEVID_AUTO, + .root_only = true, + }; + struct qoriq_efuse_priv *priv; + struct nvmem_device *nvmem; + struct resource *res; + + priv = devm_kzalloc(config.dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); + if (IS_ERR(priv->base)) + return PTR_ERR(priv->base); + + config.size = resource_size(res); + config.priv = priv; + nvmem = devm_nvmem_register(config.dev, &config); + + return PTR_ERR_OR_ZERO(nvmem); +} + +static const struct of_device_id qoriq_efuse_of_match[] = { + { .compatible = "fsl,t1023-sfp", }, + {/* sentinel */}, +}; +MODULE_DEVICE_TABLE(of, qoriq_efuse_of_match); + +static struct platform_driver qoriq_efuse_driver = { + .probe = qoriq_efuse_probe, + .driver = { + .name = "qoriq-efuse", + .of_match_table = qoriq_efuse_of_match, + }, +}; +module_platform_driver(qoriq_efuse_driver); + +MODULE_AUTHOR("Richard Alpe "); +MODULE_DESCRIPTION("NXP QorIQ Security Fuse Processor (SFP) Reader"); +MODULE_LICENSE("GPL"); diff --git a/drivers/nvmem/rave-sp-eeprom.c b/drivers/nvmem/rave-sp-eeprom.c index c456011b75e8..df6a1c594b78 100644 --- a/drivers/nvmem/rave-sp-eeprom.c +++ b/drivers/nvmem/rave-sp-eeprom.c @@ -10,7 +10,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/nvmem/rockchip-efuse.c b/drivers/nvmem/rockchip-efuse.c index e4579de5d014..4004c5bece42 100644 --- a/drivers/nvmem/rockchip-efuse.c +++ b/drivers/nvmem/rockchip-efuse.c @@ -267,8 +267,7 @@ static int rockchip_efuse_probe(struct platform_device *pdev) if (!efuse) return -ENOMEM; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - efuse->base = devm_ioremap_resource(dev, res); + efuse->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(efuse->base)) return PTR_ERR(efuse->base); diff --git a/drivers/nvmem/sc27xx-efuse.c b/drivers/nvmem/sc27xx-efuse.c index c825fc902d10..2210da40dfbd 100644 --- a/drivers/nvmem/sc27xx-efuse.c +++ b/drivers/nvmem/sc27xx-efuse.c @@ -4,7 +4,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/nvmem/sec-qfprom.c b/drivers/nvmem/sec-qfprom.c new file mode 100644 index 000000000000..e48c2dc0c44b --- /dev/null +++ b/drivers/nvmem/sec-qfprom.c @@ -0,0 +1,96 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include +#include +#include +#include +#include + +/** + * struct sec_qfprom - structure holding secure qfprom attributes + * + * @base: starting physical address for secure qfprom corrected address space. + * @dev: qfprom device structure. + */ +struct sec_qfprom { + phys_addr_t base; + struct device *dev; +}; + +static int sec_qfprom_reg_read(void *context, unsigned int reg, void *_val, size_t bytes) +{ + struct sec_qfprom *priv = context; + unsigned int i; + u8 *val = _val; + u32 read_val; + u8 *tmp; + + for (i = 0; i < bytes; i++, reg++) { + if (i == 0 || reg % 4 == 0) { + if (qcom_scm_io_readl(priv->base + (reg & ~3), &read_val)) { + dev_err(priv->dev, "Couldn't access fuse register\n"); + return -EINVAL; + } + tmp = (u8 *)&read_val; + } + + val[i] = tmp[reg & 3]; + } + + return 0; +} + +static int sec_qfprom_probe(struct platform_device *pdev) +{ + struct nvmem_config econfig = { + .name = "sec-qfprom", + .stride = 1, + .word_size = 1, + .id = NVMEM_DEVID_AUTO, + .reg_read = sec_qfprom_reg_read, + }; + struct device *dev = &pdev->dev; + struct nvmem_device *nvmem; + struct sec_qfprom *priv; + struct resource *res; + + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) + return -EINVAL; + + priv->base = res->start; + + econfig.size = resource_size(res); + econfig.dev = dev; + econfig.priv = priv; + + priv->dev = dev; + + nvmem = devm_nvmem_register(dev, &econfig); + + return PTR_ERR_OR_ZERO(nvmem); +} + +static const struct of_device_id sec_qfprom_of_match[] = { + { .compatible = "qcom,sec-qfprom" }, + {/* sentinel */}, +}; +MODULE_DEVICE_TABLE(of, sec_qfprom_of_match); + +static struct platform_driver qfprom_driver = { + .probe = sec_qfprom_probe, + .driver = { + .name = "qcom_sec_qfprom", + .of_match_table = sec_qfprom_of_match, + }, +}; +module_platform_driver(qfprom_driver); +MODULE_DESCRIPTION("Qualcomm Secure QFPROM driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/nvmem/snvs_lpgpr.c b/drivers/nvmem/snvs_lpgpr.c index 4692aa985bd6..89c27112320f 100644 --- a/drivers/nvmem/snvs_lpgpr.c +++ b/drivers/nvmem/snvs_lpgpr.c @@ -7,7 +7,8 @@ #include #include #include -#include +#include +#include #include #define IMX6Q_SNVS_HPLR 0x00 diff --git a/drivers/nvmem/sprd-efuse.c b/drivers/nvmem/sprd-efuse.c index 4f1fcbfec394..7e6e31db4baa 100644 --- a/drivers/nvmem/sprd-efuse.c +++ b/drivers/nvmem/sprd-efuse.c @@ -7,7 +7,7 @@ #include #include #include -#include +#include #include #define SPRD_EFUSE_ENABLE 0x20 diff --git a/drivers/nvmem/stm32-romem.c b/drivers/nvmem/stm32-romem.c index 38d0bf557129..0f84044bd1ad 100644 --- a/drivers/nvmem/stm32-romem.c +++ b/drivers/nvmem/stm32-romem.c @@ -196,8 +196,7 @@ static int stm32_romem_probe(struct platform_device *pdev) if (!priv) return -ENOMEM; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - priv->base = devm_ioremap_resource(dev, res); + priv->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(priv->base)) return PTR_ERR(priv->base); diff --git a/drivers/nvmem/sunplus-ocotp.c b/drivers/nvmem/sunplus-ocotp.c index f85350b17d67..f3a18aa0a6c7 100644 --- a/drivers/nvmem/sunplus-ocotp.c +++ b/drivers/nvmem/sunplus-ocotp.c @@ -13,8 +13,8 @@ #include #include #include +#include #include -#include #include /* diff --git a/drivers/nvmem/sunxi_sid.c b/drivers/nvmem/sunxi_sid.c index a970f1741cc6..5d364d85347f 100644 --- a/drivers/nvmem/sunxi_sid.c +++ b/drivers/nvmem/sunxi_sid.c @@ -12,7 +12,6 @@ #include #include #include -#include #include #include #include @@ -125,7 +124,6 @@ static int sun8i_sid_read_by_reg(void *context, unsigned int offset, static int sunxi_sid_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; - struct resource *res; struct nvmem_config *nvmem_cfg; struct nvmem_device *nvmem; struct sunxi_sid *sid; @@ -142,8 +140,7 @@ static int sunxi_sid_probe(struct platform_device *pdev) return -EINVAL; sid->value_offset = cfg->value_offset; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - sid->base = devm_ioremap_resource(dev, res); + sid->base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(sid->base)) return PTR_ERR(sid->base); diff --git a/drivers/nvmem/u-boot-env.c b/drivers/nvmem/u-boot-env.c index ee9fd9989b6e..c4ae94af4af7 100644 --- a/drivers/nvmem/u-boot-env.c +++ b/drivers/nvmem/u-boot-env.c @@ -11,7 +11,7 @@ #include #include #include -#include +#include #include #include @@ -47,7 +47,7 @@ struct u_boot_env_image_broadcom { __le32 magic; __le32 len; __le32 crc32; - uint8_t data[0]; + DECLARE_FLEX_ARRAY(uint8_t, data); } __packed; static int u_boot_env_read(void *context, unsigned int offset, void *val, diff --git a/drivers/nvmem/uniphier-efuse.c b/drivers/nvmem/uniphier-efuse.c index aca910b3b6f8..0a1dbb80537e 100644 --- a/drivers/nvmem/uniphier-efuse.c +++ b/drivers/nvmem/uniphier-efuse.c @@ -41,8 +41,7 @@ static int uniphier_efuse_probe(struct platform_device *pdev) if (!priv) return -ENOMEM; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - priv->base = devm_ioremap_resource(dev, res); + priv->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(priv->base)) return PTR_ERR(priv->base); diff --git a/drivers/parport/parport_pc.c b/drivers/parport/parport_pc.c index 3bacbaf16f42..1f236aaf7867 100644 --- a/drivers/parport/parport_pc.c +++ b/drivers/parport/parport_pc.c @@ -2655,6 +2655,7 @@ enum parport_pc_pci_cards { netmos_9815, netmos_9901, netmos_9865, + asix_ax99100, quatech_sppxp100, wch_ch382l, }; @@ -2733,6 +2734,7 @@ static struct parport_pc_pci { /* netmos_9815 */ { 2, { { 0, 1 }, { 2, 3 }, } }, /* netmos_9901 */ { 1, { { 0, -1 }, } }, /* netmos_9865 */ { 1, { { 0, -1 }, } }, + /* asix_ax99100 */ { 1, { { 0, 1 }, } }, /* quatech_sppxp100 */ { 1, { { 0, 1 }, } }, /* wch_ch382l */ { 1, { { 2, -1 }, } }, }; @@ -2823,6 +2825,9 @@ static const struct pci_device_id parport_pc_pci_tbl[] = { 0xA000, 0x1000, 0, 0, netmos_9865 }, { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9865, 0xA000, 0x2000, 0, 0, netmos_9865 }, + /* ASIX AX99100 PCIe to Multi I/O Controller */ + { PCI_VENDOR_ID_ASIX, PCI_DEVICE_ID_ASIX_AX99100, + 0xA000, 0x2000, 0, 0, asix_ax99100 }, /* Quatech SPPXP-100 Parallel port PCI ExpressCard */ { PCI_VENDOR_ID_QUATECH, PCI_DEVICE_ID_QUATECH_SPPXP_100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, quatech_sppxp100 }, diff --git a/drivers/pcmcia/Kconfig b/drivers/pcmcia/Kconfig index e72419d7e72e..dddb235dd020 100644 --- a/drivers/pcmcia/Kconfig +++ b/drivers/pcmcia/Kconfig @@ -19,6 +19,7 @@ if PCCARD config PCMCIA tristate "16-bit PCMCIA support" + depends on HAS_IOMEM select CRC32 default y help diff --git a/drivers/peci/controller/Kconfig b/drivers/peci/controller/Kconfig index 2fc5e2abb74a..4f9c245ad042 100644 --- a/drivers/peci/controller/Kconfig +++ b/drivers/peci/controller/Kconfig @@ -16,3 +16,19 @@ config PECI_ASPEED This driver can also be built as a module. If so, the module will be called peci-aspeed. + +config PECI_NPCM + tristate "Nuvoton NPCM PECI support" + depends on ARCH_NPCM || COMPILE_TEST + depends on OF + select REGMAP_MMIO + help + This option enables PECI controller driver for Nuvoton NPCM7XX + and NPCM8XX SoCs. It allows BMC to discover devices connected + to it and communicate with them using PECI protocol. + + Say Y here if you want support for the Platform Environment Control + Interface (PECI) bus adapter driver on the Nuvoton NPCM SoCs. + + This support is also available as a module. If so, the module + will be called peci-npcm. diff --git a/drivers/peci/controller/Makefile b/drivers/peci/controller/Makefile index 022c28ef1bf0..e247449bb423 100644 --- a/drivers/peci/controller/Makefile +++ b/drivers/peci/controller/Makefile @@ -1,3 +1,4 @@ # SPDX-License-Identifier: GPL-2.0-only obj-$(CONFIG_PECI_ASPEED) += peci-aspeed.o +obj-$(CONFIG_PECI_NPCM) += peci-npcm.o diff --git a/drivers/peci/controller/peci-aspeed.c b/drivers/peci/controller/peci-aspeed.c index 731c5d8f75c6..7fdc25afcf2f 100644 --- a/drivers/peci/controller/peci-aspeed.c +++ b/drivers/peci/controller/peci-aspeed.c @@ -468,7 +468,7 @@ static void aspeed_peci_property_setup(struct aspeed_peci *priv) ASPEED_PECI_CMD_TIMEOUT_MS_DEFAULT, &priv->cmd_timeout_ms); } -static struct peci_controller_ops aspeed_ops = { +static const struct peci_controller_ops aspeed_ops = { .xfer = aspeed_peci_xfer, }; diff --git a/drivers/peci/controller/peci-npcm.c b/drivers/peci/controller/peci-npcm.c new file mode 100644 index 000000000000..ec613d35c796 --- /dev/null +++ b/drivers/peci/controller/peci-npcm.c @@ -0,0 +1,298 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (c) 2019 Nuvoton Technology corporation + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* NPCM GCR module */ +#define NPCM_INTCR3_OFFSET 0x9C +#define NPCM_INTCR3_PECIVSEL BIT(19) + +/* NPCM PECI Registers */ +#define NPCM_PECI_CTL_STS 0x00 +#define NPCM_PECI_RD_LENGTH 0x04 +#define NPCM_PECI_ADDR 0x08 +#define NPCM_PECI_CMD 0x0C +#define NPCM_PECI_CTL2 0x10 +#define NPCM_PECI_WR_LENGTH 0x1C +#define NPCM_PECI_PDDR 0x2C +#define NPCM_PECI_DAT_INOUT(n) (0x100 + ((n) * 4)) + +#define NPCM_PECI_MAX_REG 0x200 + +/* NPCM_PECI_CTL_STS - 0x00 : Control Register */ +#define NPCM_PECI_CTRL_DONE_INT_EN BIT(6) +#define NPCM_PECI_CTRL_ABRT_ERR BIT(4) +#define NPCM_PECI_CTRL_CRC_ERR BIT(3) +#define NPCM_PECI_CTRL_DONE BIT(1) +#define NPCM_PECI_CTRL_START_BUSY BIT(0) + +/* NPCM_PECI_RD_LENGTH - 0x04 : Command Register */ +#define NPCM_PECI_RD_LEN_MASK GENMASK(6, 0) + +/* NPCM_PECI_CMD - 0x10 : Command Register */ +#define NPCM_PECI_CTL2_MASK GENMASK(7, 6) + +/* NPCM_PECI_WR_LENGTH - 0x1C : Command Register */ +#define NPCM_PECI_WR_LEN_MASK GENMASK(6, 0) + +/* NPCM_PECI_PDDR - 0x2C : Command Register */ +#define NPCM_PECI_PDDR_MASK GENMASK(4, 0) + +#define NPCM_PECI_INT_MASK (NPCM_PECI_CTRL_ABRT_ERR | \ + NPCM_PECI_CTRL_CRC_ERR | \ + NPCM_PECI_CTRL_DONE) + +#define NPCM_PECI_IDLE_CHECK_TIMEOUT_USEC (50 * USEC_PER_MSEC) +#define NPCM_PECI_IDLE_CHECK_INTERVAL_USEC (10 * USEC_PER_MSEC) +#define NPCM_PECI_CMD_TIMEOUT_MS_DEFAULT 1000 +#define NPCM_PECI_CMD_TIMEOUT_MS_MAX 60000 +#define NPCM_PECI_HOST_NEG_BIT_RATE_DEFAULT 15 +#define NPCM_PECI_PULL_DOWN_DEFAULT 0 + +struct npcm_peci { + u32 cmd_timeout_ms; + struct completion xfer_complete; + struct regmap *regmap; + u32 status; + spinlock_t lock; /* to sync completion status handling */ + struct peci_controller *controller; + struct device *dev; + struct clk *clk; + int irq; +}; + +static int npcm_peci_xfer(struct peci_controller *controller, u8 addr, struct peci_request *req) +{ + struct npcm_peci *priv = dev_get_drvdata(controller->dev.parent); + unsigned long timeout = msecs_to_jiffies(priv->cmd_timeout_ms); + unsigned int msg_rd; + u32 cmd_sts; + int i, ret; + + /* Check command sts and bus idle state */ + ret = regmap_read_poll_timeout(priv->regmap, NPCM_PECI_CTL_STS, cmd_sts, + !(cmd_sts & NPCM_PECI_CTRL_START_BUSY), + NPCM_PECI_IDLE_CHECK_INTERVAL_USEC, + NPCM_PECI_IDLE_CHECK_TIMEOUT_USEC); + if (ret) + return ret; /* -ETIMEDOUT */ + + spin_lock_irq(&priv->lock); + reinit_completion(&priv->xfer_complete); + + regmap_write(priv->regmap, NPCM_PECI_ADDR, addr); + regmap_write(priv->regmap, NPCM_PECI_RD_LENGTH, NPCM_PECI_WR_LEN_MASK & req->rx.len); + regmap_write(priv->regmap, NPCM_PECI_WR_LENGTH, NPCM_PECI_WR_LEN_MASK & req->tx.len); + + if (req->tx.len) { + regmap_write(priv->regmap, NPCM_PECI_CMD, req->tx.buf[0]); + + for (i = 0; i < (req->tx.len - 1); i++) + regmap_write(priv->regmap, NPCM_PECI_DAT_INOUT(i), req->tx.buf[i + 1]); + } + +#if IS_ENABLED(CONFIG_DYNAMIC_DEBUG) + dev_dbg(priv->dev, "addr : %#02x, tx.len : %#02x, rx.len : %#02x\n", + addr, req->tx.len, req->rx.len); + print_hex_dump_bytes("TX : ", DUMP_PREFIX_NONE, req->tx.buf, req->tx.len); +#endif + + priv->status = 0; + regmap_update_bits(priv->regmap, NPCM_PECI_CTL_STS, NPCM_PECI_CTRL_START_BUSY, + NPCM_PECI_CTRL_START_BUSY); + + spin_unlock_irq(&priv->lock); + + ret = wait_for_completion_interruptible_timeout(&priv->xfer_complete, timeout); + if (ret < 0) + return ret; + + if (ret == 0) { + dev_dbg(priv->dev, "timeout waiting for a response\n"); + return -ETIMEDOUT; + } + + spin_lock_irq(&priv->lock); + + if (priv->status != NPCM_PECI_CTRL_DONE) { + spin_unlock_irq(&priv->lock); + dev_dbg(priv->dev, "no valid response, status: %#02x\n", priv->status); + return -EIO; + } + + regmap_write(priv->regmap, NPCM_PECI_CMD, 0); + + for (i = 0; i < req->rx.len; i++) { + regmap_read(priv->regmap, NPCM_PECI_DAT_INOUT(i), &msg_rd); + req->rx.buf[i] = (u8)msg_rd; + } + + spin_unlock_irq(&priv->lock); + +#if IS_ENABLED(CONFIG_DYNAMIC_DEBUG) + print_hex_dump_bytes("RX : ", DUMP_PREFIX_NONE, req->rx.buf, req->rx.len); +#endif + return 0; +} + +static irqreturn_t npcm_peci_irq_handler(int irq, void *arg) +{ + struct npcm_peci *priv = arg; + u32 status_ack = 0; + u32 status; + + spin_lock(&priv->lock); + regmap_read(priv->regmap, NPCM_PECI_CTL_STS, &status); + priv->status |= (status & NPCM_PECI_INT_MASK); + + if (status & NPCM_PECI_CTRL_CRC_ERR) + status_ack |= NPCM_PECI_CTRL_CRC_ERR; + + if (status & NPCM_PECI_CTRL_ABRT_ERR) + status_ack |= NPCM_PECI_CTRL_ABRT_ERR; + + /* + * All commands should be ended up with a NPCM_PECI_CTRL_DONE + * bit set even in an error case. + */ + if (status & NPCM_PECI_CTRL_DONE) { + status_ack |= NPCM_PECI_CTRL_DONE; + complete(&priv->xfer_complete); + } + + regmap_write_bits(priv->regmap, NPCM_PECI_CTL_STS, NPCM_PECI_INT_MASK, status_ack); + + spin_unlock(&priv->lock); + return IRQ_HANDLED; +} + +static int npcm_peci_init_ctrl(struct npcm_peci *priv) +{ + u32 cmd_sts; + int ret; + + priv->clk = devm_clk_get_enabled(priv->dev, NULL); + if (IS_ERR(priv->clk)) { + dev_err(priv->dev, "failed to get ref clock\n"); + return PTR_ERR(priv->clk); + } + + ret = device_property_read_u32(priv->dev, "cmd-timeout-ms", &priv->cmd_timeout_ms); + if (ret) { + priv->cmd_timeout_ms = NPCM_PECI_CMD_TIMEOUT_MS_DEFAULT; + } else if (priv->cmd_timeout_ms > NPCM_PECI_CMD_TIMEOUT_MS_MAX || + priv->cmd_timeout_ms == 0) { + dev_warn(priv->dev, "invalid cmd-timeout-ms: %u, falling back to: %u\n", + priv->cmd_timeout_ms, NPCM_PECI_CMD_TIMEOUT_MS_DEFAULT); + + priv->cmd_timeout_ms = NPCM_PECI_CMD_TIMEOUT_MS_DEFAULT; + } + + regmap_update_bits(priv->regmap, NPCM_PECI_CTL2, NPCM_PECI_CTL2_MASK, + NPCM_PECI_PULL_DOWN_DEFAULT << 6); + + regmap_update_bits(priv->regmap, NPCM_PECI_PDDR, NPCM_PECI_PDDR_MASK, + NPCM_PECI_HOST_NEG_BIT_RATE_DEFAULT); + + ret = regmap_read_poll_timeout(priv->regmap, NPCM_PECI_CTL_STS, cmd_sts, + !(cmd_sts & NPCM_PECI_CTRL_START_BUSY), + NPCM_PECI_IDLE_CHECK_INTERVAL_USEC, + NPCM_PECI_IDLE_CHECK_TIMEOUT_USEC); + if (ret) + return ret; /* -ETIMEDOUT */ + + /* PECI interrupt enable */ + regmap_update_bits(priv->regmap, NPCM_PECI_CTL_STS, NPCM_PECI_CTRL_DONE_INT_EN, + NPCM_PECI_CTRL_DONE_INT_EN); + + return 0; +} + +static const struct regmap_config npcm_peci_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = NPCM_PECI_MAX_REG, + .fast_io = true, +}; + +static struct peci_controller_ops npcm_ops = { + .xfer = npcm_peci_xfer, +}; + +static int npcm_peci_probe(struct platform_device *pdev) +{ + struct peci_controller *controller; + struct npcm_peci *priv; + void __iomem *base; + int ret; + + priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->dev = &pdev->dev; + dev_set_drvdata(&pdev->dev, priv); + + base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(base)) + return PTR_ERR(base); + + priv->regmap = devm_regmap_init_mmio(&pdev->dev, base, &npcm_peci_regmap_config); + if (IS_ERR(priv->regmap)) + return PTR_ERR(priv->regmap); + + priv->irq = platform_get_irq(pdev, 0); + if (priv->irq < 0) + return priv->irq; + + ret = devm_request_irq(&pdev->dev, priv->irq, npcm_peci_irq_handler, + 0, "peci-npcm-irq", priv); + if (ret) + return ret; + + init_completion(&priv->xfer_complete); + spin_lock_init(&priv->lock); + + ret = npcm_peci_init_ctrl(priv); + if (ret) + return ret; + + controller = devm_peci_controller_add(priv->dev, &npcm_ops); + if (IS_ERR(controller)) + return dev_err_probe(priv->dev, PTR_ERR(controller), + "failed to add npcm peci controller\n"); + + priv->controller = controller; + + return 0; +} + +static const struct of_device_id npcm_peci_of_table[] = { + { .compatible = "nuvoton,npcm750-peci", }, + { .compatible = "nuvoton,npcm845-peci", }, + { } +}; +MODULE_DEVICE_TABLE(of, npcm_peci_of_table); + +static struct platform_driver npcm_peci_driver = { + .probe = npcm_peci_probe, + .driver = { + .name = KBUILD_MODNAME, + .of_match_table = npcm_peci_of_table, + }, +}; +module_platform_driver(npcm_peci_driver); + +MODULE_AUTHOR("Tomer Maimon "); +MODULE_DESCRIPTION("NPCM PECI driver"); +MODULE_LICENSE("GPL"); +MODULE_IMPORT_NS(PECI); diff --git a/drivers/peci/core.c b/drivers/peci/core.c index 9c8cf07e51c7..0f83a9c6093b 100644 --- a/drivers/peci/core.c +++ b/drivers/peci/core.c @@ -44,7 +44,7 @@ int peci_controller_scan_devices(struct peci_controller *controller) } static struct peci_controller *peci_controller_alloc(struct device *dev, - struct peci_controller_ops *ops) + const struct peci_controller_ops *ops) { struct peci_controller *controller; int ret; @@ -113,7 +113,7 @@ static void unregister_controller(void *_controller) * Return: Pointer to the newly allocated controller or ERR_PTR() in case of failure. */ struct peci_controller *devm_peci_controller_add(struct device *dev, - struct peci_controller_ops *ops) + const struct peci_controller_ops *ops) { struct peci_controller *controller; int ret; diff --git a/drivers/peci/cpu.c b/drivers/peci/cpu.c index de4a7b3e5966..bd990acd92b8 100644 --- a/drivers/peci/cpu.c +++ b/drivers/peci/cpu.c @@ -323,6 +323,11 @@ static const struct peci_device_id peci_cpu_device_ids[] = { .model = INTEL_FAM6_ICELAKE_D, .data = "icxd", }, + { /* Sapphire Rapids Xeon */ + .family = 6, + .model = INTEL_FAM6_SAPPHIRERAPIDS_X, + .data = "spr", + }, { } }; MODULE_DEVICE_TABLE(peci, peci_cpu_device_ids); diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index 8dba9596408f..aac670b90589 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -87,6 +87,7 @@ source "drivers/phy/motorola/Kconfig" source "drivers/phy/mscc/Kconfig" source "drivers/phy/qualcomm/Kconfig" source "drivers/phy/ralink/Kconfig" +source "drivers/phy/realtek/Kconfig" source "drivers/phy/renesas/Kconfig" source "drivers/phy/rockchip/Kconfig" source "drivers/phy/samsung/Kconfig" diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile index 54f312c10a40..ba7c100b14fc 100644 --- a/drivers/phy/Makefile +++ b/drivers/phy/Makefile @@ -26,6 +26,7 @@ obj-y += allwinner/ \ mscc/ \ qualcomm/ \ ralink/ \ + realtek/ \ renesas/ \ rockchip/ \ samsung/ \ diff --git a/drivers/phy/realtek/Kconfig b/drivers/phy/realtek/Kconfig new file mode 100644 index 000000000000..650e20ed69af --- /dev/null +++ b/drivers/phy/realtek/Kconfig @@ -0,0 +1,27 @@ +# SPDX-License-Identifier: GPL-2.0 +# +# Phy drivers for Realtek platforms +# +config PHY_RTK_RTD_USB2PHY + tristate "Realtek RTD USB2 PHY Transceiver Driver" + depends on USB_SUPPORT + select GENERIC_PHY + select USB_PHY + select USB_COMMON + help + Enable this to support Realtek SoC USB2 phy transceiver. + The DHC (digital home center) RTD series SoCs used the Synopsys + DWC3 USB IP. This driver will do the PHY initialization + of the parameters. + +config PHY_RTK_RTD_USB3PHY + tristate "Realtek RTD USB3 PHY Transceiver Driver" + depends on USB_SUPPORT + select GENERIC_PHY + select USB_PHY + select USB_COMMON + help + Enable this to support Realtek SoC USB3 phy transceiver. + The DHC (digital home center) RTD series SoCs used the Synopsys + DWC3 USB IP. This driver will do the PHY initialization + of the parameters. diff --git a/drivers/phy/realtek/Makefile b/drivers/phy/realtek/Makefile new file mode 100644 index 000000000000..ed7b47ff8a26 --- /dev/null +++ b/drivers/phy/realtek/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0 +obj-$(CONFIG_PHY_RTK_RTD_USB2PHY) += phy-rtk-usb2.o +obj-$(CONFIG_PHY_RTK_RTD_USB3PHY) += phy-rtk-usb3.o diff --git a/drivers/phy/realtek/phy-rtk-usb2.c b/drivers/phy/realtek/phy-rtk-usb2.c new file mode 100644 index 000000000000..5e7ee060b404 --- /dev/null +++ b/drivers/phy/realtek/phy-rtk-usb2.c @@ -0,0 +1,1331 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * phy-rtk-usb2.c RTK usb2.0 PHY driver + * + * Copyright (C) 2023 Realtek Semiconductor Corporation + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* GUSB2PHYACCn register */ +#define PHY_NEW_REG_REQ BIT(25) +#define PHY_VSTS_BUSY BIT(23) +#define PHY_VCTRL_SHIFT 8 +#define PHY_REG_DATA_MASK 0xff + +#define GET_LOW_NIBBLE(addr) ((addr) & 0x0f) +#define GET_HIGH_NIBBLE(addr) (((addr) & 0xf0) >> 4) + +#define EFUS_USB_DC_CAL_RATE 2 +#define EFUS_USB_DC_CAL_MAX 7 + +#define EFUS_USB_DC_DIS_RATE 1 +#define EFUS_USB_DC_DIS_MAX 7 + +#define MAX_PHY_DATA_SIZE 20 +#define OFFEST_PHY_READ 0x20 + +#define MAX_USB_PHY_NUM 4 +#define MAX_USB_PHY_PAGE0_DATA_SIZE 16 +#define MAX_USB_PHY_PAGE1_DATA_SIZE 16 +#define MAX_USB_PHY_PAGE2_DATA_SIZE 8 + +#define SET_PAGE_OFFSET 0xf4 +#define SET_PAGE_0 0x9b +#define SET_PAGE_1 0xbb +#define SET_PAGE_2 0xdb + +#define PAGE_START 0xe0 +#define PAGE0_0XE4 0xe4 +#define PAGE0_0XE6 0xe6 +#define PAGE0_0XE7 0xe7 +#define PAGE1_0XE0 0xe0 +#define PAGE1_0XE2 0xe2 + +#define SENSITIVITY_CTRL (BIT(4) | BIT(5) | BIT(6)) +#define ENABLE_AUTO_SENSITIVITY_CALIBRATION BIT(2) +#define DEFAULT_DC_DRIVING_VALUE (0x8) +#define DEFAULT_DC_DISCONNECTION_VALUE (0x6) +#define HS_CLK_SELECT BIT(6) + +struct phy_reg { + void __iomem *reg_wrap_vstatus; + void __iomem *reg_gusb2phyacc0; + int vstatus_index; +}; + +struct phy_data { + u8 addr; + u8 data; +}; + +struct phy_cfg { + int page0_size; + struct phy_data page0[MAX_USB_PHY_PAGE0_DATA_SIZE]; + int page1_size; + struct phy_data page1[MAX_USB_PHY_PAGE1_DATA_SIZE]; + int page2_size; + struct phy_data page2[MAX_USB_PHY_PAGE2_DATA_SIZE]; + + int num_phy; + + bool check_efuse; + int check_efuse_version; +#define CHECK_EFUSE_V1 1 +#define CHECK_EFUSE_V2 2 + int efuse_dc_driving_rate; + int efuse_dc_disconnect_rate; + int dc_driving_mask; + int dc_disconnect_mask; + bool usb_dc_disconnect_at_page0; + int driving_updated_for_dev_dis; + + bool do_toggle; + bool do_toggle_driving; + bool use_default_parameter; + bool is_double_sensitivity_mode; +}; + +struct phy_parameter { + struct phy_reg phy_reg; + + /* Get from efuse */ + s8 efuse_usb_dc_cal; + s8 efuse_usb_dc_dis; + + /* Get from dts */ + bool inverse_hstx_sync_clock; + u32 driving_level; + s32 driving_level_compensate; + s32 disconnection_compensate; +}; + +struct rtk_phy { + struct usb_phy phy; + struct device *dev; + + struct phy_cfg *phy_cfg; + int num_phy; + struct phy_parameter *phy_parameter; + + struct dentry *debug_dir; +}; + +/* mapping 0xE0 to 0 ... 0xE7 to 7, 0xF0 to 8 ,,, 0xF7 to 15 */ +static inline int page_addr_to_array_index(u8 addr) +{ + return (int)((((addr) - PAGE_START) & 0x7) + + ((((addr) - PAGE_START) & 0x10) >> 1)); +} + +static inline u8 array_index_to_page_addr(int index) +{ + return ((((index) + PAGE_START) & 0x7) + + ((((index) & 0x8) << 1) + PAGE_START)); +} + +#define PHY_IO_TIMEOUT_USEC (50000) +#define PHY_IO_DELAY_US (100) + +static inline int utmi_wait_register(void __iomem *reg, u32 mask, u32 result) +{ + int ret; + unsigned int val; + + ret = read_poll_timeout(readl, val, ((val & mask) == result), + PHY_IO_DELAY_US, PHY_IO_TIMEOUT_USEC, false, reg); + if (ret) { + pr_err("%s can't program USB phy\n", __func__); + return -ETIMEDOUT; + } + + return 0; +} + +static char rtk_phy_read(struct phy_reg *phy_reg, char addr) +{ + void __iomem *reg_gusb2phyacc0 = phy_reg->reg_gusb2phyacc0; + unsigned int val; + int ret = 0; + + addr -= OFFEST_PHY_READ; + + /* polling until VBusy == 0 */ + ret = utmi_wait_register(reg_gusb2phyacc0, PHY_VSTS_BUSY, 0); + if (ret) + return (char)ret; + + /* VCtrl = low nibble of addr, and set PHY_NEW_REG_REQ */ + val = PHY_NEW_REG_REQ | (GET_LOW_NIBBLE(addr) << PHY_VCTRL_SHIFT); + writel(val, reg_gusb2phyacc0); + ret = utmi_wait_register(reg_gusb2phyacc0, PHY_VSTS_BUSY, 0); + if (ret) + return (char)ret; + + /* VCtrl = high nibble of addr, and set PHY_NEW_REG_REQ */ + val = PHY_NEW_REG_REQ | (GET_HIGH_NIBBLE(addr) << PHY_VCTRL_SHIFT); + writel(val, reg_gusb2phyacc0); + ret = utmi_wait_register(reg_gusb2phyacc0, PHY_VSTS_BUSY, 0); + if (ret) + return (char)ret; + + val = readl(reg_gusb2phyacc0); + + return (char)(val & PHY_REG_DATA_MASK); +} + +static int rtk_phy_write(struct phy_reg *phy_reg, char addr, char data) +{ + unsigned int val; + void __iomem *reg_wrap_vstatus = phy_reg->reg_wrap_vstatus; + void __iomem *reg_gusb2phyacc0 = phy_reg->reg_gusb2phyacc0; + int shift_bits = phy_reg->vstatus_index * 8; + int ret = 0; + + /* write data to VStatusOut2 (data output to phy) */ + writel((u32)data << shift_bits, reg_wrap_vstatus); + + ret = utmi_wait_register(reg_gusb2phyacc0, PHY_VSTS_BUSY, 0); + if (ret) + return ret; + + /* VCtrl = low nibble of addr, set PHY_NEW_REG_REQ */ + val = PHY_NEW_REG_REQ | (GET_LOW_NIBBLE(addr) << PHY_VCTRL_SHIFT); + + writel(val, reg_gusb2phyacc0); + ret = utmi_wait_register(reg_gusb2phyacc0, PHY_VSTS_BUSY, 0); + if (ret) + return ret; + + /* VCtrl = high nibble of addr, set PHY_NEW_REG_REQ */ + val = PHY_NEW_REG_REQ | (GET_HIGH_NIBBLE(addr) << PHY_VCTRL_SHIFT); + + writel(val, reg_gusb2phyacc0); + ret = utmi_wait_register(reg_gusb2phyacc0, PHY_VSTS_BUSY, 0); + if (ret) + return ret; + + return 0; +} + +static int rtk_phy_set_page(struct phy_reg *phy_reg, int page) +{ + switch (page) { + case 0: + return rtk_phy_write(phy_reg, SET_PAGE_OFFSET, SET_PAGE_0); + case 1: + return rtk_phy_write(phy_reg, SET_PAGE_OFFSET, SET_PAGE_1); + case 2: + return rtk_phy_write(phy_reg, SET_PAGE_OFFSET, SET_PAGE_2); + default: + pr_err("%s error page=%d\n", __func__, page); + } + + return -EINVAL; +} + +static u8 __updated_dc_disconnect_level_page0_0xe4(struct phy_cfg *phy_cfg, + struct phy_parameter *phy_parameter, u8 data) +{ + u8 ret; + s32 val; + s32 dc_disconnect_mask = phy_cfg->dc_disconnect_mask; + int offset = 4; + + val = (s32)((data >> offset) & dc_disconnect_mask) + + phy_parameter->efuse_usb_dc_dis + + phy_parameter->disconnection_compensate; + + if (val > dc_disconnect_mask) + val = dc_disconnect_mask; + else if (val < 0) + val = 0; + + ret = (data & (~(dc_disconnect_mask << offset))) | + (val & dc_disconnect_mask) << offset; + + return ret; +} + +/* updated disconnect level at page0 */ +static void update_dc_disconnect_level_at_page0(struct rtk_phy *rtk_phy, + struct phy_parameter *phy_parameter, bool update) +{ + struct phy_cfg *phy_cfg; + struct phy_reg *phy_reg; + struct phy_data *phy_data_page; + struct phy_data *phy_data; + u8 addr, data; + int offset = 4; + s32 dc_disconnect_mask; + int i; + + phy_cfg = rtk_phy->phy_cfg; + phy_reg = &phy_parameter->phy_reg; + + /* Set page 0 */ + phy_data_page = phy_cfg->page0; + rtk_phy_set_page(phy_reg, 0); + + i = page_addr_to_array_index(PAGE0_0XE4); + phy_data = phy_data_page + i; + if (!phy_data->addr) { + phy_data->addr = PAGE0_0XE4; + phy_data->data = rtk_phy_read(phy_reg, PAGE0_0XE4); + } + + addr = phy_data->addr; + data = phy_data->data; + dc_disconnect_mask = phy_cfg->dc_disconnect_mask; + + if (update) + data = __updated_dc_disconnect_level_page0_0xe4(phy_cfg, phy_parameter, data); + else + data = (data & ~(dc_disconnect_mask << offset)) | + (DEFAULT_DC_DISCONNECTION_VALUE << offset); + + if (rtk_phy_write(phy_reg, addr, data)) + dev_err(rtk_phy->dev, + "%s: Error to set page1 parameter addr=0x%x value=0x%x\n", + __func__, addr, data); +} + +static u8 __updated_dc_disconnect_level_page1_0xe2(struct phy_cfg *phy_cfg, + struct phy_parameter *phy_parameter, u8 data) +{ + u8 ret; + s32 val; + s32 dc_disconnect_mask = phy_cfg->dc_disconnect_mask; + + if (phy_cfg->check_efuse_version == CHECK_EFUSE_V1) { + val = (s32)(data & dc_disconnect_mask) + + phy_parameter->efuse_usb_dc_dis + + phy_parameter->disconnection_compensate; + } else { /* for CHECK_EFUSE_V2 or no efuse */ + if (phy_parameter->efuse_usb_dc_dis) + val = (s32)(phy_parameter->efuse_usb_dc_dis + + phy_parameter->disconnection_compensate); + else + val = (s32)((data & dc_disconnect_mask) + + phy_parameter->disconnection_compensate); + } + + if (val > dc_disconnect_mask) + val = dc_disconnect_mask; + else if (val < 0) + val = 0; + + ret = (data & (~dc_disconnect_mask)) | (val & dc_disconnect_mask); + + return ret; +} + +/* updated disconnect level at page1 */ +static void update_dc_disconnect_level_at_page1(struct rtk_phy *rtk_phy, + struct phy_parameter *phy_parameter, bool update) +{ + struct phy_cfg *phy_cfg; + struct phy_data *phy_data_page; + struct phy_data *phy_data; + struct phy_reg *phy_reg; + u8 addr, data; + s32 dc_disconnect_mask; + int i; + + phy_cfg = rtk_phy->phy_cfg; + phy_reg = &phy_parameter->phy_reg; + + /* Set page 1 */ + phy_data_page = phy_cfg->page1; + rtk_phy_set_page(phy_reg, 1); + + i = page_addr_to_array_index(PAGE1_0XE2); + phy_data = phy_data_page + i; + if (!phy_data->addr) { + phy_data->addr = PAGE1_0XE2; + phy_data->data = rtk_phy_read(phy_reg, PAGE1_0XE2); + } + + addr = phy_data->addr; + data = phy_data->data; + dc_disconnect_mask = phy_cfg->dc_disconnect_mask; + + if (update) + data = __updated_dc_disconnect_level_page1_0xe2(phy_cfg, phy_parameter, data); + else + data = (data & ~dc_disconnect_mask) | DEFAULT_DC_DISCONNECTION_VALUE; + + if (rtk_phy_write(phy_reg, addr, data)) + dev_err(rtk_phy->dev, + "%s: Error to set page1 parameter addr=0x%x value=0x%x\n", + __func__, addr, data); +} + +static void update_dc_disconnect_level(struct rtk_phy *rtk_phy, + struct phy_parameter *phy_parameter, bool update) +{ + struct phy_cfg *phy_cfg = rtk_phy->phy_cfg; + + if (phy_cfg->usb_dc_disconnect_at_page0) + update_dc_disconnect_level_at_page0(rtk_phy, phy_parameter, update); + else + update_dc_disconnect_level_at_page1(rtk_phy, phy_parameter, update); +} + +static u8 __update_dc_driving_page0_0xe4(struct phy_cfg *phy_cfg, + struct phy_parameter *phy_parameter, u8 data) +{ + s32 driving_level_compensate = phy_parameter->driving_level_compensate; + s32 dc_driving_mask = phy_cfg->dc_driving_mask; + s32 val; + u8 ret; + + if (phy_cfg->check_efuse_version == CHECK_EFUSE_V1) { + val = (s32)(data & dc_driving_mask) + driving_level_compensate + + phy_parameter->efuse_usb_dc_cal; + } else { /* for CHECK_EFUSE_V2 or no efuse */ + if (phy_parameter->efuse_usb_dc_cal) + val = (s32)((phy_parameter->efuse_usb_dc_cal & dc_driving_mask) + + driving_level_compensate); + else + val = (s32)(data & dc_driving_mask); + } + + if (val > dc_driving_mask) + val = dc_driving_mask; + else if (val < 0) + val = 0; + + ret = (data & (~dc_driving_mask)) | (val & dc_driving_mask); + + return ret; +} + +static void update_dc_driving_level(struct rtk_phy *rtk_phy, + struct phy_parameter *phy_parameter) +{ + struct phy_cfg *phy_cfg; + struct phy_reg *phy_reg; + + phy_reg = &phy_parameter->phy_reg; + phy_cfg = rtk_phy->phy_cfg; + if (!phy_cfg->page0[4].addr) { + rtk_phy_set_page(phy_reg, 0); + phy_cfg->page0[4].addr = PAGE0_0XE4; + phy_cfg->page0[4].data = rtk_phy_read(phy_reg, PAGE0_0XE4); + } + + if (phy_parameter->driving_level != DEFAULT_DC_DRIVING_VALUE) { + u32 dc_driving_mask; + u8 driving_level; + u8 data; + + data = phy_cfg->page0[4].data; + dc_driving_mask = phy_cfg->dc_driving_mask; + driving_level = data & dc_driving_mask; + + dev_dbg(rtk_phy->dev, "%s driving_level=%d => dts driving_level=%d\n", + __func__, driving_level, phy_parameter->driving_level); + + phy_cfg->page0[4].data = (data & (~dc_driving_mask)) | + (phy_parameter->driving_level & dc_driving_mask); + } + + phy_cfg->page0[4].data = __update_dc_driving_page0_0xe4(phy_cfg, + phy_parameter, + phy_cfg->page0[4].data); +} + +static void update_hs_clk_select(struct rtk_phy *rtk_phy, + struct phy_parameter *phy_parameter) +{ + struct phy_cfg *phy_cfg; + struct phy_reg *phy_reg; + + phy_cfg = rtk_phy->phy_cfg; + phy_reg = &phy_parameter->phy_reg; + + if (phy_parameter->inverse_hstx_sync_clock) { + if (!phy_cfg->page0[6].addr) { + rtk_phy_set_page(phy_reg, 0); + phy_cfg->page0[6].addr = PAGE0_0XE6; + phy_cfg->page0[6].data = rtk_phy_read(phy_reg, PAGE0_0XE6); + } + + phy_cfg->page0[6].data = phy_cfg->page0[6].data | HS_CLK_SELECT; + } +} + +static void do_rtk_phy_toggle(struct rtk_phy *rtk_phy, + int index, bool connect) +{ + struct phy_parameter *phy_parameter; + struct phy_cfg *phy_cfg; + struct phy_reg *phy_reg; + struct phy_data *phy_data_page; + u8 addr, data; + int i; + + phy_cfg = rtk_phy->phy_cfg; + phy_parameter = &((struct phy_parameter *)rtk_phy->phy_parameter)[index]; + phy_reg = &phy_parameter->phy_reg; + + if (!phy_cfg->do_toggle) + goto out; + + if (phy_cfg->is_double_sensitivity_mode) + goto do_toggle_driving; + + /* Set page 0 */ + rtk_phy_set_page(phy_reg, 0); + + addr = PAGE0_0XE7; + data = rtk_phy_read(phy_reg, addr); + + if (connect) + rtk_phy_write(phy_reg, addr, data & (~SENSITIVITY_CTRL)); + else + rtk_phy_write(phy_reg, addr, data | (SENSITIVITY_CTRL)); + +do_toggle_driving: + + if (!phy_cfg->do_toggle_driving) + goto do_toggle; + + /* Page 0 addr 0xE4 driving capability */ + + /* Set page 0 */ + phy_data_page = phy_cfg->page0; + rtk_phy_set_page(phy_reg, 0); + + i = page_addr_to_array_index(PAGE0_0XE4); + addr = phy_data_page[i].addr; + data = phy_data_page[i].data; + + if (connect) { + rtk_phy_write(phy_reg, addr, data); + } else { + u8 value; + s32 tmp; + s32 driving_updated = + phy_cfg->driving_updated_for_dev_dis; + s32 dc_driving_mask = phy_cfg->dc_driving_mask; + + tmp = (s32)(data & dc_driving_mask) + driving_updated; + + if (tmp > dc_driving_mask) + tmp = dc_driving_mask; + else if (tmp < 0) + tmp = 0; + + value = (data & (~dc_driving_mask)) | (tmp & dc_driving_mask); + + rtk_phy_write(phy_reg, addr, value); + } + +do_toggle: + /* restore dc disconnect level before toggle */ + update_dc_disconnect_level(rtk_phy, phy_parameter, false); + + /* Set page 1 */ + rtk_phy_set_page(phy_reg, 1); + + addr = PAGE1_0XE0; + data = rtk_phy_read(phy_reg, addr); + + rtk_phy_write(phy_reg, addr, data & + (~ENABLE_AUTO_SENSITIVITY_CALIBRATION)); + mdelay(1); + rtk_phy_write(phy_reg, addr, data | + (ENABLE_AUTO_SENSITIVITY_CALIBRATION)); + + /* update dc disconnect level after toggle */ + update_dc_disconnect_level(rtk_phy, phy_parameter, true); + +out: + return; +} + +static int do_rtk_phy_init(struct rtk_phy *rtk_phy, int index) +{ + struct phy_parameter *phy_parameter; + struct phy_cfg *phy_cfg; + struct phy_data *phy_data_page; + struct phy_reg *phy_reg; + int i; + + phy_cfg = rtk_phy->phy_cfg; + phy_parameter = &((struct phy_parameter *)rtk_phy->phy_parameter)[index]; + phy_reg = &phy_parameter->phy_reg; + + if (phy_cfg->use_default_parameter) { + dev_dbg(rtk_phy->dev, "%s phy#%d use default parameter\n", + __func__, index); + goto do_toggle; + } + + /* Set page 0 */ + phy_data_page = phy_cfg->page0; + rtk_phy_set_page(phy_reg, 0); + + for (i = 0; i < phy_cfg->page0_size; i++) { + struct phy_data *phy_data = phy_data_page + i; + u8 addr = phy_data->addr; + u8 data = phy_data->data; + + if (!addr) + continue; + + if (rtk_phy_write(phy_reg, addr, data)) { + dev_err(rtk_phy->dev, + "%s: Error to set page0 parameter addr=0x%x value=0x%x\n", + __func__, addr, data); + return -EINVAL; + } + } + + /* Set page 1 */ + phy_data_page = phy_cfg->page1; + rtk_phy_set_page(phy_reg, 1); + + for (i = 0; i < phy_cfg->page1_size; i++) { + struct phy_data *phy_data = phy_data_page + i; + u8 addr = phy_data->addr; + u8 data = phy_data->data; + + if (!addr) + continue; + + if (rtk_phy_write(phy_reg, addr, data)) { + dev_err(rtk_phy->dev, + "%s: Error to set page1 parameter addr=0x%x value=0x%x\n", + __func__, addr, data); + return -EINVAL; + } + } + + if (phy_cfg->page2_size == 0) + goto do_toggle; + + /* Set page 2 */ + phy_data_page = phy_cfg->page2; + rtk_phy_set_page(phy_reg, 2); + + for (i = 0; i < phy_cfg->page2_size; i++) { + struct phy_data *phy_data = phy_data_page + i; + u8 addr = phy_data->addr; + u8 data = phy_data->data; + + if (!addr) + continue; + + if (rtk_phy_write(phy_reg, addr, data)) { + dev_err(rtk_phy->dev, + "%s: Error to set page2 parameter addr=0x%x value=0x%x\n", + __func__, addr, data); + return -EINVAL; + } + } + +do_toggle: + do_rtk_phy_toggle(rtk_phy, index, false); + + return 0; +} + +static int rtk_phy_init(struct phy *phy) +{ + struct rtk_phy *rtk_phy = phy_get_drvdata(phy); + unsigned long phy_init_time = jiffies; + int i, ret = 0; + + if (!rtk_phy) + return -EINVAL; + + for (i = 0; i < rtk_phy->num_phy; i++) + ret = do_rtk_phy_init(rtk_phy, i); + + dev_dbg(rtk_phy->dev, "Initialized RTK USB 2.0 PHY (take %dms)\n", + jiffies_to_msecs(jiffies - phy_init_time)); + return ret; +} + +static int rtk_phy_exit(struct phy *phy) +{ + return 0; +} + +static const struct phy_ops ops = { + .init = rtk_phy_init, + .exit = rtk_phy_exit, + .owner = THIS_MODULE, +}; + +static void rtk_phy_toggle(struct usb_phy *usb2_phy, bool connect, int port) +{ + int index = port; + struct rtk_phy *rtk_phy = NULL; + + rtk_phy = dev_get_drvdata(usb2_phy->dev); + + if (index > rtk_phy->num_phy) { + dev_err(rtk_phy->dev, "%s: The port=%d is not in usb phy (num_phy=%d)\n", + __func__, index, rtk_phy->num_phy); + return; + } + + do_rtk_phy_toggle(rtk_phy, index, connect); +} + +static int rtk_phy_notify_port_status(struct usb_phy *x, int port, + u16 portstatus, u16 portchange) +{ + bool connect = false; + + pr_debug("%s port=%d portstatus=0x%x portchange=0x%x\n", + __func__, port, (int)portstatus, (int)portchange); + if (portstatus & USB_PORT_STAT_CONNECTION) + connect = true; + + if (portchange & USB_PORT_STAT_C_CONNECTION) + rtk_phy_toggle(x, connect, port); + + return 0; +} + +#ifdef CONFIG_DEBUG_FS +static struct dentry *create_phy_debug_root(void) +{ + struct dentry *phy_debug_root; + + phy_debug_root = debugfs_lookup("phy", usb_debug_root); + if (!phy_debug_root) + phy_debug_root = debugfs_create_dir("phy", usb_debug_root); + + return phy_debug_root; +} + +static int rtk_usb2_parameter_show(struct seq_file *s, void *unused) +{ + struct rtk_phy *rtk_phy = s->private; + struct phy_cfg *phy_cfg; + int i, index; + + phy_cfg = rtk_phy->phy_cfg; + + seq_puts(s, "Property:\n"); + seq_printf(s, " check_efuse: %s\n", + phy_cfg->check_efuse ? "Enable" : "Disable"); + seq_printf(s, " check_efuse_version: %d\n", + phy_cfg->check_efuse_version); + seq_printf(s, " efuse_dc_driving_rate: %d\n", + phy_cfg->efuse_dc_driving_rate); + seq_printf(s, " dc_driving_mask: 0x%x\n", + phy_cfg->dc_driving_mask); + seq_printf(s, " efuse_dc_disconnect_rate: %d\n", + phy_cfg->efuse_dc_disconnect_rate); + seq_printf(s, " dc_disconnect_mask: 0x%x\n", + phy_cfg->dc_disconnect_mask); + seq_printf(s, " usb_dc_disconnect_at_page0: %s\n", + phy_cfg->usb_dc_disconnect_at_page0 ? "true" : "false"); + seq_printf(s, " do_toggle: %s\n", + phy_cfg->do_toggle ? "Enable" : "Disable"); + seq_printf(s, " do_toggle_driving: %s\n", + phy_cfg->do_toggle_driving ? "Enable" : "Disable"); + seq_printf(s, " driving_updated_for_dev_dis: 0x%x\n", + phy_cfg->driving_updated_for_dev_dis); + seq_printf(s, " use_default_parameter: %s\n", + phy_cfg->use_default_parameter ? "Enable" : "Disable"); + seq_printf(s, " is_double_sensitivity_mode: %s\n", + phy_cfg->is_double_sensitivity_mode ? "Enable" : "Disable"); + + for (index = 0; index < rtk_phy->num_phy; index++) { + struct phy_parameter *phy_parameter; + struct phy_reg *phy_reg; + struct phy_data *phy_data_page; + + phy_parameter = &((struct phy_parameter *)rtk_phy->phy_parameter)[index]; + phy_reg = &phy_parameter->phy_reg; + + seq_printf(s, "PHY %d:\n", index); + + seq_puts(s, "Page 0:\n"); + /* Set page 0 */ + phy_data_page = phy_cfg->page0; + rtk_phy_set_page(phy_reg, 0); + + for (i = 0; i < phy_cfg->page0_size; i++) { + struct phy_data *phy_data = phy_data_page + i; + u8 addr = array_index_to_page_addr(i); + u8 data = phy_data->data; + u8 value = rtk_phy_read(phy_reg, addr); + + if (phy_data->addr) + seq_printf(s, " Page 0: addr=0x%x data=0x%02x ==> read value=0x%02x\n", + addr, data, value); + else + seq_printf(s, " Page 0: addr=0x%x data=none ==> read value=0x%02x\n", + addr, value); + } + + seq_puts(s, "Page 1:\n"); + /* Set page 1 */ + phy_data_page = phy_cfg->page1; + rtk_phy_set_page(phy_reg, 1); + + for (i = 0; i < phy_cfg->page1_size; i++) { + struct phy_data *phy_data = phy_data_page + i; + u8 addr = array_index_to_page_addr(i); + u8 data = phy_data->data; + u8 value = rtk_phy_read(phy_reg, addr); + + if (phy_data->addr) + seq_printf(s, " Page 1: addr=0x%x data=0x%02x ==> read value=0x%02x\n", + addr, data, value); + else + seq_printf(s, " Page 1: addr=0x%x data=none ==> read value=0x%02x\n", + addr, value); + } + + if (phy_cfg->page2_size == 0) + goto out; + + seq_puts(s, "Page 2:\n"); + /* Set page 2 */ + phy_data_page = phy_cfg->page2; + rtk_phy_set_page(phy_reg, 2); + + for (i = 0; i < phy_cfg->page2_size; i++) { + struct phy_data *phy_data = phy_data_page + i; + u8 addr = array_index_to_page_addr(i); + u8 data = phy_data->data; + u8 value = rtk_phy_read(phy_reg, addr); + + if (phy_data->addr) + seq_printf(s, " Page 2: addr=0x%x data=0x%02x ==> read value=0x%02x\n", + addr, data, value); + else + seq_printf(s, " Page 2: addr=0x%x data=none ==> read value=0x%02x\n", + addr, value); + } + +out: + seq_puts(s, "PHY Property:\n"); + seq_printf(s, " efuse_usb_dc_cal: %d\n", + (int)phy_parameter->efuse_usb_dc_cal); + seq_printf(s, " efuse_usb_dc_dis: %d\n", + (int)phy_parameter->efuse_usb_dc_dis); + seq_printf(s, " inverse_hstx_sync_clock: %s\n", + phy_parameter->inverse_hstx_sync_clock ? "Enable" : "Disable"); + seq_printf(s, " driving_level: %d\n", + phy_parameter->driving_level); + seq_printf(s, " driving_level_compensate: %d\n", + phy_parameter->driving_level_compensate); + seq_printf(s, " disconnection_compensate: %d\n", + phy_parameter->disconnection_compensate); + } + + return 0; +} +DEFINE_SHOW_ATTRIBUTE(rtk_usb2_parameter); + +static inline void create_debug_files(struct rtk_phy *rtk_phy) +{ + struct dentry *phy_debug_root = NULL; + + phy_debug_root = create_phy_debug_root(); + if (!phy_debug_root) + return; + + rtk_phy->debug_dir = debugfs_create_dir(dev_name(rtk_phy->dev), + phy_debug_root); + if (!rtk_phy->debug_dir) + return; + + if (!debugfs_create_file("parameter", 0444, rtk_phy->debug_dir, rtk_phy, + &rtk_usb2_parameter_fops)) + goto file_error; + + return; + +file_error: + debugfs_remove_recursive(rtk_phy->debug_dir); +} + +static inline void remove_debug_files(struct rtk_phy *rtk_phy) +{ + debugfs_remove_recursive(rtk_phy->debug_dir); +} +#else +static inline void create_debug_files(struct rtk_phy *rtk_phy) { } +static inline void remove_debug_files(struct rtk_phy *rtk_phy) { } +#endif /* CONFIG_DEBUG_FS */ + +static int get_phy_data_by_efuse(struct rtk_phy *rtk_phy, + struct phy_parameter *phy_parameter, int index) +{ + struct phy_cfg *phy_cfg = rtk_phy->phy_cfg; + u8 value = 0; + struct nvmem_cell *cell; + struct soc_device_attribute rtk_soc_groot[] = { + { .family = "Realtek Groot",}, + { /* empty */ } }; + + if (!phy_cfg->check_efuse) + goto out; + + /* Read efuse for usb dc cal */ + cell = nvmem_cell_get(rtk_phy->dev, "usb-dc-cal"); + if (IS_ERR(cell)) { + dev_dbg(rtk_phy->dev, "%s no usb-dc-cal: %ld\n", + __func__, PTR_ERR(cell)); + } else { + unsigned char *buf; + size_t buf_size; + + buf = nvmem_cell_read(cell, &buf_size); + if (!IS_ERR(buf)) { + value = buf[0] & phy_cfg->dc_driving_mask; + kfree(buf); + } + nvmem_cell_put(cell); + } + + if (phy_cfg->check_efuse_version == CHECK_EFUSE_V1) { + int rate = phy_cfg->efuse_dc_driving_rate; + + if (value <= EFUS_USB_DC_CAL_MAX) + phy_parameter->efuse_usb_dc_cal = (int8_t)(value * rate); + else + phy_parameter->efuse_usb_dc_cal = -(int8_t) + ((EFUS_USB_DC_CAL_MAX & value) * rate); + + if (soc_device_match(rtk_soc_groot)) { + dev_dbg(rtk_phy->dev, "For groot IC we need a workaround to adjust efuse_usb_dc_cal\n"); + + /* We don't multiple dc_cal_rate=2 for positive dc cal compensate */ + if (value <= EFUS_USB_DC_CAL_MAX) + phy_parameter->efuse_usb_dc_cal = (int8_t)(value); + + /* We set max dc cal compensate is 0x8 if otp is 0x7 */ + if (value == 0x7) + phy_parameter->efuse_usb_dc_cal = (int8_t)(value + 1); + } + } else { /* for CHECK_EFUSE_V2 */ + phy_parameter->efuse_usb_dc_cal = value & phy_cfg->dc_driving_mask; + } + + /* Read efuse for usb dc disconnect level */ + value = 0; + cell = nvmem_cell_get(rtk_phy->dev, "usb-dc-dis"); + if (IS_ERR(cell)) { + dev_dbg(rtk_phy->dev, "%s no usb-dc-dis: %ld\n", + __func__, PTR_ERR(cell)); + } else { + unsigned char *buf; + size_t buf_size; + + buf = nvmem_cell_read(cell, &buf_size); + if (!IS_ERR(buf)) { + value = buf[0] & phy_cfg->dc_disconnect_mask; + kfree(buf); + } + nvmem_cell_put(cell); + } + + if (phy_cfg->check_efuse_version == CHECK_EFUSE_V1) { + int rate = phy_cfg->efuse_dc_disconnect_rate; + + if (value <= EFUS_USB_DC_DIS_MAX) + phy_parameter->efuse_usb_dc_dis = (int8_t)(value * rate); + else + phy_parameter->efuse_usb_dc_dis = -(int8_t) + ((EFUS_USB_DC_DIS_MAX & value) * rate); + } else { /* for CHECK_EFUSE_V2 */ + phy_parameter->efuse_usb_dc_dis = value & phy_cfg->dc_disconnect_mask; + } + +out: + return 0; +} + +static int parse_phy_data(struct rtk_phy *rtk_phy) +{ + struct device *dev = rtk_phy->dev; + struct device_node *np = dev->of_node; + struct phy_parameter *phy_parameter; + int ret = 0; + int index; + + rtk_phy->phy_parameter = devm_kzalloc(dev, sizeof(struct phy_parameter) * + rtk_phy->num_phy, GFP_KERNEL); + if (!rtk_phy->phy_parameter) + return -ENOMEM; + + for (index = 0; index < rtk_phy->num_phy; index++) { + phy_parameter = &((struct phy_parameter *)rtk_phy->phy_parameter)[index]; + + phy_parameter->phy_reg.reg_wrap_vstatus = of_iomap(np, 0); + phy_parameter->phy_reg.reg_gusb2phyacc0 = of_iomap(np, 1) + index; + phy_parameter->phy_reg.vstatus_index = index; + + if (of_property_read_bool(np, "realtek,inverse-hstx-sync-clock")) + phy_parameter->inverse_hstx_sync_clock = true; + else + phy_parameter->inverse_hstx_sync_clock = false; + + if (of_property_read_u32_index(np, "realtek,driving-level", + index, &phy_parameter->driving_level)) + phy_parameter->driving_level = DEFAULT_DC_DRIVING_VALUE; + + if (of_property_read_u32_index(np, "realtek,driving-level-compensate", + index, &phy_parameter->driving_level_compensate)) + phy_parameter->driving_level_compensate = 0; + + if (of_property_read_u32_index(np, "realtek,disconnection-compensate", + index, &phy_parameter->disconnection_compensate)) + phy_parameter->disconnection_compensate = 0; + + get_phy_data_by_efuse(rtk_phy, phy_parameter, index); + + update_dc_driving_level(rtk_phy, phy_parameter); + + update_hs_clk_select(rtk_phy, phy_parameter); + } + + return ret; +} + +static int rtk_usb2phy_probe(struct platform_device *pdev) +{ + struct rtk_phy *rtk_phy; + struct device *dev = &pdev->dev; + struct phy *generic_phy; + struct phy_provider *phy_provider; + const struct phy_cfg *phy_cfg; + int ret = 0; + + phy_cfg = of_device_get_match_data(dev); + if (!phy_cfg) { + dev_err(dev, "phy config are not assigned!\n"); + return -EINVAL; + } + + rtk_phy = devm_kzalloc(dev, sizeof(*rtk_phy), GFP_KERNEL); + if (!rtk_phy) + return -ENOMEM; + + rtk_phy->dev = &pdev->dev; + rtk_phy->phy.dev = rtk_phy->dev; + rtk_phy->phy.label = "rtk-usb2phy"; + rtk_phy->phy.notify_port_status = rtk_phy_notify_port_status; + + rtk_phy->phy_cfg = devm_kzalloc(dev, sizeof(*phy_cfg), GFP_KERNEL); + + memcpy(rtk_phy->phy_cfg, phy_cfg, sizeof(*phy_cfg)); + + rtk_phy->num_phy = phy_cfg->num_phy; + + ret = parse_phy_data(rtk_phy); + if (ret) + goto err; + + platform_set_drvdata(pdev, rtk_phy); + + generic_phy = devm_phy_create(rtk_phy->dev, NULL, &ops); + if (IS_ERR(generic_phy)) + return PTR_ERR(generic_phy); + + phy_set_drvdata(generic_phy, rtk_phy); + + phy_provider = devm_of_phy_provider_register(rtk_phy->dev, + of_phy_simple_xlate); + if (IS_ERR(phy_provider)) + return PTR_ERR(phy_provider); + + ret = usb_add_phy_dev(&rtk_phy->phy); + if (ret) + goto err; + + create_debug_files(rtk_phy); + +err: + return ret; +} + +static void rtk_usb2phy_remove(struct platform_device *pdev) +{ + struct rtk_phy *rtk_phy = platform_get_drvdata(pdev); + + remove_debug_files(rtk_phy); + + usb_remove_phy(&rtk_phy->phy); +} + +static const struct phy_cfg rtd1295_phy_cfg = { + .page0_size = MAX_USB_PHY_PAGE0_DATA_SIZE, + .page0 = { [0] = {0xe0, 0x90}, + [3] = {0xe3, 0x3a}, + [4] = {0xe4, 0x68}, + [6] = {0xe6, 0x91}, + [13] = {0xf5, 0x81}, + [15] = {0xf7, 0x02}, }, + .page1_size = 8, + .page1 = { /* default parameter */ }, + .page2_size = 0, + .page2 = { /* no parameter */ }, + .num_phy = 1, + .check_efuse = false, + .check_efuse_version = CHECK_EFUSE_V1, + .efuse_dc_driving_rate = 1, + .dc_driving_mask = 0xf, + .efuse_dc_disconnect_rate = EFUS_USB_DC_DIS_RATE, + .dc_disconnect_mask = 0xf, + .usb_dc_disconnect_at_page0 = true, + .do_toggle = true, + .do_toggle_driving = false, + .driving_updated_for_dev_dis = 0xf, + .use_default_parameter = false, + .is_double_sensitivity_mode = false, +}; + +static const struct phy_cfg rtd1395_phy_cfg = { + .page0_size = MAX_USB_PHY_PAGE0_DATA_SIZE, + .page0 = { [4] = {0xe4, 0xac}, + [13] = {0xf5, 0x00}, + [15] = {0xf7, 0x02}, }, + .page1_size = 8, + .page1 = { /* default parameter */ }, + .page2_size = 0, + .page2 = { /* no parameter */ }, + .num_phy = 1, + .check_efuse = false, + .check_efuse_version = CHECK_EFUSE_V1, + .efuse_dc_driving_rate = 1, + .dc_driving_mask = 0xf, + .efuse_dc_disconnect_rate = EFUS_USB_DC_DIS_RATE, + .dc_disconnect_mask = 0xf, + .usb_dc_disconnect_at_page0 = true, + .do_toggle = true, + .do_toggle_driving = false, + .driving_updated_for_dev_dis = 0xf, + .use_default_parameter = false, + .is_double_sensitivity_mode = false, +}; + +static const struct phy_cfg rtd1395_phy_cfg_2port = { + .page0_size = MAX_USB_PHY_PAGE0_DATA_SIZE, + .page0 = { [4] = {0xe4, 0xac}, + [13] = {0xf5, 0x00}, + [15] = {0xf7, 0x02}, }, + .page1_size = 8, + .page1 = { /* default parameter */ }, + .page2_size = 0, + .page2 = { /* no parameter */ }, + .num_phy = 2, + .check_efuse = false, + .check_efuse_version = CHECK_EFUSE_V1, + .efuse_dc_driving_rate = 1, + .dc_driving_mask = 0xf, + .efuse_dc_disconnect_rate = EFUS_USB_DC_DIS_RATE, + .dc_disconnect_mask = 0xf, + .usb_dc_disconnect_at_page0 = true, + .do_toggle = true, + .do_toggle_driving = false, + .driving_updated_for_dev_dis = 0xf, + .use_default_parameter = false, + .is_double_sensitivity_mode = false, +}; + +static const struct phy_cfg rtd1619_phy_cfg = { + .page0_size = MAX_USB_PHY_PAGE0_DATA_SIZE, + .page0 = { [4] = {0xe4, 0x68}, }, + .page1_size = 8, + .page1 = { /* default parameter */ }, + .page2_size = 0, + .page2 = { /* no parameter */ }, + .num_phy = 1, + .check_efuse = true, + .check_efuse_version = CHECK_EFUSE_V1, + .efuse_dc_driving_rate = 1, + .dc_driving_mask = 0xf, + .efuse_dc_disconnect_rate = EFUS_USB_DC_DIS_RATE, + .dc_disconnect_mask = 0xf, + .usb_dc_disconnect_at_page0 = true, + .do_toggle = true, + .do_toggle_driving = false, + .driving_updated_for_dev_dis = 0xf, + .use_default_parameter = false, + .is_double_sensitivity_mode = false, +}; + +static const struct phy_cfg rtd1319_phy_cfg = { + .page0_size = MAX_USB_PHY_PAGE0_DATA_SIZE, + .page0 = { [0] = {0xe0, 0x18}, + [4] = {0xe4, 0x6a}, + [7] = {0xe7, 0x71}, + [13] = {0xf5, 0x15}, + [15] = {0xf7, 0x32}, }, + .page1_size = 8, + .page1 = { [3] = {0xe3, 0x44}, }, + .page2_size = MAX_USB_PHY_PAGE2_DATA_SIZE, + .page2 = { [0] = {0xe0, 0x01}, }, + .num_phy = 1, + .check_efuse = true, + .check_efuse_version = CHECK_EFUSE_V1, + .efuse_dc_driving_rate = 1, + .dc_driving_mask = 0xf, + .efuse_dc_disconnect_rate = EFUS_USB_DC_DIS_RATE, + .dc_disconnect_mask = 0xf, + .usb_dc_disconnect_at_page0 = true, + .do_toggle = true, + .do_toggle_driving = true, + .driving_updated_for_dev_dis = 0xf, + .use_default_parameter = false, + .is_double_sensitivity_mode = true, +}; + +static const struct phy_cfg rtd1312c_phy_cfg = { + .page0_size = MAX_USB_PHY_PAGE0_DATA_SIZE, + .page0 = { [0] = {0xe0, 0x14}, + [4] = {0xe4, 0x67}, + [5] = {0xe5, 0x55}, }, + .page1_size = 8, + .page1 = { [3] = {0xe3, 0x23}, + [6] = {0xe6, 0x58}, }, + .page2_size = MAX_USB_PHY_PAGE2_DATA_SIZE, + .page2 = { /* default parameter */ }, + .num_phy = 1, + .check_efuse = true, + .check_efuse_version = CHECK_EFUSE_V1, + .efuse_dc_driving_rate = 1, + .dc_driving_mask = 0xf, + .efuse_dc_disconnect_rate = EFUS_USB_DC_DIS_RATE, + .dc_disconnect_mask = 0xf, + .usb_dc_disconnect_at_page0 = true, + .do_toggle = true, + .do_toggle_driving = true, + .driving_updated_for_dev_dis = 0xf, + .use_default_parameter = false, + .is_double_sensitivity_mode = true, +}; + +static const struct phy_cfg rtd1619b_phy_cfg = { + .page0_size = MAX_USB_PHY_PAGE0_DATA_SIZE, + .page0 = { [0] = {0xe0, 0xa3}, + [4] = {0xe4, 0x88}, + [5] = {0xe5, 0x4f}, + [6] = {0xe6, 0x02}, }, + .page1_size = 8, + .page1 = { [3] = {0xe3, 0x64}, }, + .page2_size = MAX_USB_PHY_PAGE2_DATA_SIZE, + .page2 = { [7] = {0xe7, 0x45}, }, + .num_phy = 1, + .check_efuse = true, + .check_efuse_version = CHECK_EFUSE_V1, + .efuse_dc_driving_rate = EFUS_USB_DC_CAL_RATE, + .dc_driving_mask = 0x1f, + .efuse_dc_disconnect_rate = EFUS_USB_DC_DIS_RATE, + .dc_disconnect_mask = 0xf, + .usb_dc_disconnect_at_page0 = false, + .do_toggle = true, + .do_toggle_driving = true, + .driving_updated_for_dev_dis = 0x8, + .use_default_parameter = false, + .is_double_sensitivity_mode = true, +}; + +static const struct phy_cfg rtd1319d_phy_cfg = { + .page0_size = MAX_USB_PHY_PAGE0_DATA_SIZE, + .page0 = { [0] = {0xe0, 0xa3}, + [4] = {0xe4, 0x8e}, + [5] = {0xe5, 0x4f}, + [6] = {0xe6, 0x02}, }, + .page1_size = MAX_USB_PHY_PAGE1_DATA_SIZE, + .page1 = { [14] = {0xf5, 0x1}, }, + .page2_size = MAX_USB_PHY_PAGE2_DATA_SIZE, + .page2 = { [7] = {0xe7, 0x44}, }, + .check_efuse = true, + .num_phy = 1, + .check_efuse_version = CHECK_EFUSE_V1, + .efuse_dc_driving_rate = EFUS_USB_DC_CAL_RATE, + .dc_driving_mask = 0x1f, + .efuse_dc_disconnect_rate = EFUS_USB_DC_DIS_RATE, + .dc_disconnect_mask = 0xf, + .usb_dc_disconnect_at_page0 = false, + .do_toggle = true, + .do_toggle_driving = false, + .driving_updated_for_dev_dis = 0x8, + .use_default_parameter = false, + .is_double_sensitivity_mode = true, +}; + +static const struct phy_cfg rtd1315e_phy_cfg = { + .page0_size = MAX_USB_PHY_PAGE0_DATA_SIZE, + .page0 = { [0] = {0xe0, 0xa3}, + [4] = {0xe4, 0x8c}, + [5] = {0xe5, 0x4f}, + [6] = {0xe6, 0x02}, }, + .page1_size = MAX_USB_PHY_PAGE1_DATA_SIZE, + .page1 = { [3] = {0xe3, 0x7f}, + [14] = {0xf5, 0x01}, }, + .page2_size = MAX_USB_PHY_PAGE2_DATA_SIZE, + .page2 = { [7] = {0xe7, 0x44}, }, + .num_phy = 1, + .check_efuse = true, + .check_efuse_version = CHECK_EFUSE_V2, + .efuse_dc_driving_rate = EFUS_USB_DC_CAL_RATE, + .dc_driving_mask = 0x1f, + .efuse_dc_disconnect_rate = EFUS_USB_DC_DIS_RATE, + .dc_disconnect_mask = 0xf, + .usb_dc_disconnect_at_page0 = false, + .do_toggle = true, + .do_toggle_driving = false, + .driving_updated_for_dev_dis = 0x8, + .use_default_parameter = false, + .is_double_sensitivity_mode = true, +}; + +static const struct of_device_id usbphy_rtk_dt_match[] = { + { .compatible = "realtek,rtd1295-usb2phy", .data = &rtd1295_phy_cfg }, + { .compatible = "realtek,rtd1312c-usb2phy", .data = &rtd1312c_phy_cfg }, + { .compatible = "realtek,rtd1315e-usb2phy", .data = &rtd1315e_phy_cfg }, + { .compatible = "realtek,rtd1319-usb2phy", .data = &rtd1319_phy_cfg }, + { .compatible = "realtek,rtd1319d-usb2phy", .data = &rtd1319d_phy_cfg }, + { .compatible = "realtek,rtd1395-usb2phy", .data = &rtd1395_phy_cfg }, + { .compatible = "realtek,rtd1395-usb2phy-2port", .data = &rtd1395_phy_cfg_2port }, + { .compatible = "realtek,rtd1619-usb2phy", .data = &rtd1619_phy_cfg }, + { .compatible = "realtek,rtd1619b-usb2phy", .data = &rtd1619b_phy_cfg }, + {}, +}; +MODULE_DEVICE_TABLE(of, usbphy_rtk_dt_match); + +static struct platform_driver rtk_usb2phy_driver = { + .probe = rtk_usb2phy_probe, + .remove_new = rtk_usb2phy_remove, + .driver = { + .name = "rtk-usb2phy", + .of_match_table = usbphy_rtk_dt_match, + }, +}; + +module_platform_driver(rtk_usb2phy_driver); + +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform: rtk-usb2phy"); +MODULE_AUTHOR("Stanley Chang "); +MODULE_DESCRIPTION("Realtek usb 2.0 phy driver"); diff --git a/drivers/phy/realtek/phy-rtk-usb3.c b/drivers/phy/realtek/phy-rtk-usb3.c new file mode 100644 index 000000000000..7881f908aade --- /dev/null +++ b/drivers/phy/realtek/phy-rtk-usb3.c @@ -0,0 +1,767 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * phy-rtk-usb3.c RTK usb3.0 phy driver + * + * copyright (c) 2023 realtek semiconductor corporation + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define USB_MDIO_CTRL_PHY_BUSY BIT(7) +#define USB_MDIO_CTRL_PHY_WRITE BIT(0) +#define USB_MDIO_CTRL_PHY_ADDR_SHIFT 8 +#define USB_MDIO_CTRL_PHY_DATA_SHIFT 16 + +#define MAX_USB_PHY_DATA_SIZE 0x30 +#define PHY_ADDR_0X09 0x09 +#define PHY_ADDR_0X0B 0x0b +#define PHY_ADDR_0X0D 0x0d +#define PHY_ADDR_0X10 0x10 +#define PHY_ADDR_0X1F 0x1f +#define PHY_ADDR_0X20 0x20 +#define PHY_ADDR_0X21 0x21 +#define PHY_ADDR_0X30 0x30 + +#define REG_0X09_FORCE_CALIBRATION BIT(9) +#define REG_0X0B_RX_OFFSET_RANGE_MASK 0xc +#define REG_0X0D_RX_DEBUG_TEST_EN BIT(6) +#define REG_0X10_DEBUG_MODE_SETTING 0x3c0 +#define REG_0X10_DEBUG_MODE_SETTING_MASK 0x3f8 +#define REG_0X1F_RX_OFFSET_CODE_MASK 0x1e + +#define USB_U3_TX_LFPS_SWING_TRIM_SHIFT 4 +#define USB_U3_TX_LFPS_SWING_TRIM_MASK 0xf +#define AMPLITUDE_CONTROL_COARSE_MASK 0xff +#define AMPLITUDE_CONTROL_FINE_MASK 0xffff +#define AMPLITUDE_CONTROL_COARSE_DEFAULT 0xff +#define AMPLITUDE_CONTROL_FINE_DEFAULT 0xffff + +#define PHY_ADDR_MAP_ARRAY_INDEX(addr) (addr) +#define ARRAY_INDEX_MAP_PHY_ADDR(index) (index) + +struct phy_reg { + void __iomem *reg_mdio_ctl; +}; + +struct phy_data { + u8 addr; + u16 data; +}; + +struct phy_cfg { + int param_size; + struct phy_data param[MAX_USB_PHY_DATA_SIZE]; + + bool check_efuse; + bool do_toggle; + bool do_toggle_once; + bool use_default_parameter; + bool check_rx_front_end_offset; +}; + +struct phy_parameter { + struct phy_reg phy_reg; + + /* Get from efuse */ + u8 efuse_usb_u3_tx_lfps_swing_trim; + + /* Get from dts */ + u32 amplitude_control_coarse; + u32 amplitude_control_fine; +}; + +struct rtk_phy { + struct usb_phy phy; + struct device *dev; + + struct phy_cfg *phy_cfg; + int num_phy; + struct phy_parameter *phy_parameter; + + struct dentry *debug_dir; +}; + +#define PHY_IO_TIMEOUT_USEC (50000) +#define PHY_IO_DELAY_US (100) + +static inline int utmi_wait_register(void __iomem *reg, u32 mask, u32 result) +{ + int ret; + unsigned int val; + + ret = read_poll_timeout(readl, val, ((val & mask) == result), + PHY_IO_DELAY_US, PHY_IO_TIMEOUT_USEC, false, reg); + if (ret) { + pr_err("%s can't program USB phy\n", __func__); + return -ETIMEDOUT; + } + + return 0; +} + +static int rtk_phy3_wait_vbusy(struct phy_reg *phy_reg) +{ + return utmi_wait_register(phy_reg->reg_mdio_ctl, USB_MDIO_CTRL_PHY_BUSY, 0); +} + +static u16 rtk_phy_read(struct phy_reg *phy_reg, char addr) +{ + unsigned int tmp; + u32 value; + + tmp = (addr << USB_MDIO_CTRL_PHY_ADDR_SHIFT); + + writel(tmp, phy_reg->reg_mdio_ctl); + + rtk_phy3_wait_vbusy(phy_reg); + + value = readl(phy_reg->reg_mdio_ctl); + value = value >> USB_MDIO_CTRL_PHY_DATA_SHIFT; + + return (u16)value; +} + +static int rtk_phy_write(struct phy_reg *phy_reg, char addr, u16 data) +{ + unsigned int val; + + val = USB_MDIO_CTRL_PHY_WRITE | + (addr << USB_MDIO_CTRL_PHY_ADDR_SHIFT) | + (data << USB_MDIO_CTRL_PHY_DATA_SHIFT); + + writel(val, phy_reg->reg_mdio_ctl); + + rtk_phy3_wait_vbusy(phy_reg); + + return 0; +} + +static void do_rtk_usb3_phy_toggle(struct rtk_phy *rtk_phy, int index, bool connect) +{ + struct phy_cfg *phy_cfg = rtk_phy->phy_cfg; + struct phy_reg *phy_reg; + struct phy_parameter *phy_parameter; + struct phy_data *phy_data; + u8 addr; + u16 data; + int i; + + phy_parameter = &((struct phy_parameter *)rtk_phy->phy_parameter)[index]; + phy_reg = &phy_parameter->phy_reg; + + if (!phy_cfg->do_toggle) + return; + + i = PHY_ADDR_MAP_ARRAY_INDEX(PHY_ADDR_0X09); + phy_data = phy_cfg->param + i; + addr = phy_data->addr; + data = phy_data->data; + + if (!addr && !data) { + addr = PHY_ADDR_0X09; + data = rtk_phy_read(phy_reg, addr); + phy_data->addr = addr; + phy_data->data = data; + } + + rtk_phy_write(phy_reg, addr, data & (~REG_0X09_FORCE_CALIBRATION)); + mdelay(1); + rtk_phy_write(phy_reg, addr, data | REG_0X09_FORCE_CALIBRATION); +} + +static int do_rtk_phy_init(struct rtk_phy *rtk_phy, int index) +{ + struct phy_cfg *phy_cfg; + struct phy_reg *phy_reg; + struct phy_parameter *phy_parameter; + int i = 0; + + phy_cfg = rtk_phy->phy_cfg; + phy_parameter = &((struct phy_parameter *)rtk_phy->phy_parameter)[index]; + phy_reg = &phy_parameter->phy_reg; + + if (phy_cfg->use_default_parameter) + goto do_toggle; + + for (i = 0; i < phy_cfg->param_size; i++) { + struct phy_data *phy_data = phy_cfg->param + i; + u8 addr = phy_data->addr; + u16 data = phy_data->data; + + if (!addr && !data) + continue; + + rtk_phy_write(phy_reg, addr, data); + } + +do_toggle: + if (phy_cfg->do_toggle_once) + phy_cfg->do_toggle = true; + + do_rtk_usb3_phy_toggle(rtk_phy, index, false); + + if (phy_cfg->do_toggle_once) { + u16 check_value = 0; + int count = 10; + u16 value_0x0d, value_0x10; + + /* Enable Debug mode by set 0x0D and 0x10 */ + value_0x0d = rtk_phy_read(phy_reg, PHY_ADDR_0X0D); + value_0x10 = rtk_phy_read(phy_reg, PHY_ADDR_0X10); + + rtk_phy_write(phy_reg, PHY_ADDR_0X0D, + value_0x0d | REG_0X0D_RX_DEBUG_TEST_EN); + rtk_phy_write(phy_reg, PHY_ADDR_0X10, + (value_0x10 & ~REG_0X10_DEBUG_MODE_SETTING_MASK) | + REG_0X10_DEBUG_MODE_SETTING); + + check_value = rtk_phy_read(phy_reg, PHY_ADDR_0X30); + + while (!(check_value & BIT(15))) { + check_value = rtk_phy_read(phy_reg, PHY_ADDR_0X30); + mdelay(1); + if (count-- < 0) + break; + } + + if (!(check_value & BIT(15))) + dev_info(rtk_phy->dev, "toggle fail addr=0x%02x, data=0x%04x\n", + PHY_ADDR_0X30, check_value); + + /* Disable Debug mode by set 0x0D and 0x10 to default*/ + rtk_phy_write(phy_reg, PHY_ADDR_0X0D, value_0x0d); + rtk_phy_write(phy_reg, PHY_ADDR_0X10, value_0x10); + + phy_cfg->do_toggle = false; + } + + if (phy_cfg->check_rx_front_end_offset) { + u16 rx_offset_code, rx_offset_range; + u16 code_mask = REG_0X1F_RX_OFFSET_CODE_MASK; + u16 range_mask = REG_0X0B_RX_OFFSET_RANGE_MASK; + bool do_update = false; + + rx_offset_code = rtk_phy_read(phy_reg, PHY_ADDR_0X1F); + if (((rx_offset_code & code_mask) == 0x0) || + ((rx_offset_code & code_mask) == code_mask)) + do_update = true; + + rx_offset_range = rtk_phy_read(phy_reg, PHY_ADDR_0X0B); + if (((rx_offset_range & range_mask) == range_mask) && do_update) { + dev_warn(rtk_phy->dev, "Don't update rx_offset_range (rx_offset_code=0x%x, rx_offset_range=0x%x)\n", + rx_offset_code, rx_offset_range); + do_update = false; + } + + if (do_update) { + u16 tmp1, tmp2; + + tmp1 = rx_offset_range & (~range_mask); + tmp2 = rx_offset_range & range_mask; + tmp2 += (1 << 2); + rx_offset_range = tmp1 | (tmp2 & range_mask); + rtk_phy_write(phy_reg, PHY_ADDR_0X0B, rx_offset_range); + goto do_toggle; + } + } + + return 0; +} + +static int rtk_phy_init(struct phy *phy) +{ + struct rtk_phy *rtk_phy = phy_get_drvdata(phy); + int ret = 0; + int i; + unsigned long phy_init_time = jiffies; + + for (i = 0; i < rtk_phy->num_phy; i++) + ret = do_rtk_phy_init(rtk_phy, i); + + dev_dbg(rtk_phy->dev, "Initialized RTK USB 3.0 PHY (take %dms)\n", + jiffies_to_msecs(jiffies - phy_init_time)); + + return ret; +} + +static int rtk_phy_exit(struct phy *phy) +{ + return 0; +} + +static const struct phy_ops ops = { + .init = rtk_phy_init, + .exit = rtk_phy_exit, + .owner = THIS_MODULE, +}; + +static void rtk_phy_toggle(struct usb_phy *usb3_phy, bool connect, int port) +{ + int index = port; + struct rtk_phy *rtk_phy = NULL; + + rtk_phy = dev_get_drvdata(usb3_phy->dev); + + if (index > rtk_phy->num_phy) { + dev_err(rtk_phy->dev, "%s: The port=%d is not in usb phy (num_phy=%d)\n", + __func__, index, rtk_phy->num_phy); + return; + } + + do_rtk_usb3_phy_toggle(rtk_phy, index, connect); +} + +static int rtk_phy_notify_port_status(struct usb_phy *x, int port, + u16 portstatus, u16 portchange) +{ + bool connect = false; + + pr_debug("%s port=%d portstatus=0x%x portchange=0x%x\n", + __func__, port, (int)portstatus, (int)portchange); + if (portstatus & USB_PORT_STAT_CONNECTION) + connect = true; + + if (portchange & USB_PORT_STAT_C_CONNECTION) + rtk_phy_toggle(x, connect, port); + + return 0; +} + +#ifdef CONFIG_DEBUG_FS +static struct dentry *create_phy_debug_root(void) +{ + struct dentry *phy_debug_root; + + phy_debug_root = debugfs_lookup("phy", usb_debug_root); + if (!phy_debug_root) + phy_debug_root = debugfs_create_dir("phy", usb_debug_root); + + return phy_debug_root; +} + +static int rtk_usb3_parameter_show(struct seq_file *s, void *unused) +{ + struct rtk_phy *rtk_phy = s->private; + struct phy_cfg *phy_cfg; + int i, index; + + phy_cfg = rtk_phy->phy_cfg; + + seq_puts(s, "Property:\n"); + seq_printf(s, " check_efuse: %s\n", + phy_cfg->check_efuse ? "Enable" : "Disable"); + seq_printf(s, " do_toggle: %s\n", + phy_cfg->do_toggle ? "Enable" : "Disable"); + seq_printf(s, " do_toggle_once: %s\n", + phy_cfg->do_toggle_once ? "Enable" : "Disable"); + seq_printf(s, " use_default_parameter: %s\n", + phy_cfg->use_default_parameter ? "Enable" : "Disable"); + + for (index = 0; index < rtk_phy->num_phy; index++) { + struct phy_reg *phy_reg; + struct phy_parameter *phy_parameter; + + phy_parameter = &((struct phy_parameter *)rtk_phy->phy_parameter)[index]; + phy_reg = &phy_parameter->phy_reg; + + seq_printf(s, "PHY %d:\n", index); + + for (i = 0; i < phy_cfg->param_size; i++) { + struct phy_data *phy_data = phy_cfg->param + i; + u8 addr = ARRAY_INDEX_MAP_PHY_ADDR(i); + u16 data = phy_data->data; + + if (!phy_data->addr && !data) + seq_printf(s, " addr = 0x%02x, data = none ==> read value = 0x%04x\n", + addr, rtk_phy_read(phy_reg, addr)); + else + seq_printf(s, " addr = 0x%02x, data = 0x%04x ==> read value = 0x%04x\n", + addr, data, rtk_phy_read(phy_reg, addr)); + } + + seq_puts(s, "PHY Property:\n"); + seq_printf(s, " efuse_usb_u3_tx_lfps_swing_trim: 0x%x\n", + (int)phy_parameter->efuse_usb_u3_tx_lfps_swing_trim); + seq_printf(s, " amplitude_control_coarse: 0x%x\n", + (int)phy_parameter->amplitude_control_coarse); + seq_printf(s, " amplitude_control_fine: 0x%x\n", + (int)phy_parameter->amplitude_control_fine); + } + + return 0; +} +DEFINE_SHOW_ATTRIBUTE(rtk_usb3_parameter); + +static inline void create_debug_files(struct rtk_phy *rtk_phy) +{ + struct dentry *phy_debug_root = NULL; + + phy_debug_root = create_phy_debug_root(); + + if (!phy_debug_root) + return; + + rtk_phy->debug_dir = debugfs_create_dir(dev_name(rtk_phy->dev), phy_debug_root); + if (!rtk_phy->debug_dir) + return; + + if (!debugfs_create_file("parameter", 0444, rtk_phy->debug_dir, rtk_phy, + &rtk_usb3_parameter_fops)) + goto file_error; + + return; + +file_error: + debugfs_remove_recursive(rtk_phy->debug_dir); +} + +static inline void remove_debug_files(struct rtk_phy *rtk_phy) +{ + debugfs_remove_recursive(rtk_phy->debug_dir); +} +#else +static inline void create_debug_files(struct rtk_phy *rtk_phy) { } +static inline void remove_debug_files(struct rtk_phy *rtk_phy) { } +#endif /* CONFIG_DEBUG_FS */ + +static int get_phy_data_by_efuse(struct rtk_phy *rtk_phy, + struct phy_parameter *phy_parameter, int index) +{ + struct phy_cfg *phy_cfg = rtk_phy->phy_cfg; + u8 value = 0; + struct nvmem_cell *cell; + + if (!phy_cfg->check_efuse) + goto out; + + cell = nvmem_cell_get(rtk_phy->dev, "usb_u3_tx_lfps_swing_trim"); + if (IS_ERR(cell)) { + dev_dbg(rtk_phy->dev, "%s no usb_u3_tx_lfps_swing_trim: %ld\n", + __func__, PTR_ERR(cell)); + } else { + unsigned char *buf; + size_t buf_size; + + buf = nvmem_cell_read(cell, &buf_size); + if (!IS_ERR(buf)) { + value = buf[0] & USB_U3_TX_LFPS_SWING_TRIM_MASK; + kfree(buf); + } + nvmem_cell_put(cell); + } + + if (value > 0 && value < 0x8) + phy_parameter->efuse_usb_u3_tx_lfps_swing_trim = 0x8; + else + phy_parameter->efuse_usb_u3_tx_lfps_swing_trim = (u8)value; + +out: + return 0; +} + +static void update_amplitude_control_value(struct rtk_phy *rtk_phy, + struct phy_parameter *phy_parameter) +{ + struct phy_cfg *phy_cfg; + struct phy_reg *phy_reg; + + phy_reg = &phy_parameter->phy_reg; + phy_cfg = rtk_phy->phy_cfg; + + if (phy_parameter->amplitude_control_coarse != AMPLITUDE_CONTROL_COARSE_DEFAULT) { + u16 val_mask = AMPLITUDE_CONTROL_COARSE_MASK; + u16 data; + + if (!phy_cfg->param[PHY_ADDR_0X20].addr && !phy_cfg->param[PHY_ADDR_0X20].data) { + phy_cfg->param[PHY_ADDR_0X20].addr = PHY_ADDR_0X20; + data = rtk_phy_read(phy_reg, PHY_ADDR_0X20); + } else { + data = phy_cfg->param[PHY_ADDR_0X20].data; + } + + data &= (~val_mask); + data |= (phy_parameter->amplitude_control_coarse & val_mask); + + phy_cfg->param[PHY_ADDR_0X20].data = data; + } + + if (phy_parameter->efuse_usb_u3_tx_lfps_swing_trim) { + u8 efuse_val = phy_parameter->efuse_usb_u3_tx_lfps_swing_trim; + u16 val_mask = USB_U3_TX_LFPS_SWING_TRIM_MASK; + int val_shift = USB_U3_TX_LFPS_SWING_TRIM_SHIFT; + u16 data; + + if (!phy_cfg->param[PHY_ADDR_0X20].addr && !phy_cfg->param[PHY_ADDR_0X20].data) { + phy_cfg->param[PHY_ADDR_0X20].addr = PHY_ADDR_0X20; + data = rtk_phy_read(phy_reg, PHY_ADDR_0X20); + } else { + data = phy_cfg->param[PHY_ADDR_0X20].data; + } + + data &= ~(val_mask << val_shift); + data |= ((efuse_val & val_mask) << val_shift); + + phy_cfg->param[PHY_ADDR_0X20].data = data; + } + + if (phy_parameter->amplitude_control_fine != AMPLITUDE_CONTROL_FINE_DEFAULT) { + u16 val_mask = AMPLITUDE_CONTROL_FINE_MASK; + + if (!phy_cfg->param[PHY_ADDR_0X21].addr && !phy_cfg->param[PHY_ADDR_0X21].data) + phy_cfg->param[PHY_ADDR_0X21].addr = PHY_ADDR_0X21; + + phy_cfg->param[PHY_ADDR_0X21].data = + phy_parameter->amplitude_control_fine & val_mask; + } +} + +static int parse_phy_data(struct rtk_phy *rtk_phy) +{ + struct device *dev = rtk_phy->dev; + struct phy_parameter *phy_parameter; + int ret = 0; + int index; + + rtk_phy->phy_parameter = devm_kzalloc(dev, sizeof(struct phy_parameter) * + rtk_phy->num_phy, GFP_KERNEL); + if (!rtk_phy->phy_parameter) + return -ENOMEM; + + for (index = 0; index < rtk_phy->num_phy; index++) { + phy_parameter = &((struct phy_parameter *)rtk_phy->phy_parameter)[index]; + + phy_parameter->phy_reg.reg_mdio_ctl = of_iomap(dev->of_node, 0) + index; + + /* Amplitude control address 0x20 bit 0 to bit 7 */ + if (of_property_read_u32(dev->of_node, "realtek,amplitude-control-coarse-tuning", + &phy_parameter->amplitude_control_coarse)) + phy_parameter->amplitude_control_coarse = AMPLITUDE_CONTROL_COARSE_DEFAULT; + + /* Amplitude control address 0x21 bit 0 to bit 16 */ + if (of_property_read_u32(dev->of_node, "realtek,amplitude-control-fine-tuning", + &phy_parameter->amplitude_control_fine)) + phy_parameter->amplitude_control_fine = AMPLITUDE_CONTROL_FINE_DEFAULT; + + get_phy_data_by_efuse(rtk_phy, phy_parameter, index); + + update_amplitude_control_value(rtk_phy, phy_parameter); + } + + return ret; +} + +static int rtk_usb3phy_probe(struct platform_device *pdev) +{ + struct rtk_phy *rtk_phy; + struct device *dev = &pdev->dev; + struct phy *generic_phy; + struct phy_provider *phy_provider; + const struct phy_cfg *phy_cfg; + int ret; + + phy_cfg = of_device_get_match_data(dev); + if (!phy_cfg) { + dev_err(dev, "phy config are not assigned!\n"); + return -EINVAL; + } + + rtk_phy = devm_kzalloc(dev, sizeof(*rtk_phy), GFP_KERNEL); + if (!rtk_phy) + return -ENOMEM; + + rtk_phy->dev = &pdev->dev; + rtk_phy->phy.dev = rtk_phy->dev; + rtk_phy->phy.label = "rtk-usb3phy"; + rtk_phy->phy.notify_port_status = rtk_phy_notify_port_status; + + rtk_phy->phy_cfg = devm_kzalloc(dev, sizeof(*phy_cfg), GFP_KERNEL); + + memcpy(rtk_phy->phy_cfg, phy_cfg, sizeof(*phy_cfg)); + + rtk_phy->num_phy = 1; + + ret = parse_phy_data(rtk_phy); + if (ret) + goto err; + + platform_set_drvdata(pdev, rtk_phy); + + generic_phy = devm_phy_create(rtk_phy->dev, NULL, &ops); + if (IS_ERR(generic_phy)) + return PTR_ERR(generic_phy); + + phy_set_drvdata(generic_phy, rtk_phy); + + phy_provider = devm_of_phy_provider_register(rtk_phy->dev, of_phy_simple_xlate); + if (IS_ERR(phy_provider)) + return PTR_ERR(phy_provider); + + ret = usb_add_phy_dev(&rtk_phy->phy); + if (ret) + goto err; + + create_debug_files(rtk_phy); + +err: + return ret; +} + +static void rtk_usb3phy_remove(struct platform_device *pdev) +{ + struct rtk_phy *rtk_phy = platform_get_drvdata(pdev); + + remove_debug_files(rtk_phy); + + usb_remove_phy(&rtk_phy->phy); +} + +static const struct phy_cfg rtd1295_phy_cfg = { + .param_size = MAX_USB_PHY_DATA_SIZE, + .param = { [0] = {0x01, 0x4008}, [1] = {0x01, 0xe046}, + [2] = {0x02, 0x6046}, [3] = {0x03, 0x2779}, + [4] = {0x04, 0x72f5}, [5] = {0x05, 0x2ad3}, + [6] = {0x06, 0x000e}, [7] = {0x07, 0x2e00}, + [8] = {0x08, 0x3591}, [9] = {0x09, 0x525c}, + [10] = {0x0a, 0xa600}, [11] = {0x0b, 0xa904}, + [12] = {0x0c, 0xc000}, [13] = {0x0d, 0xef1c}, + [14] = {0x0e, 0x2000}, [15] = {0x0f, 0x0000}, + [16] = {0x10, 0x000c}, [17] = {0x11, 0x4c00}, + [18] = {0x12, 0xfc00}, [19] = {0x13, 0x0c81}, + [20] = {0x14, 0xde01}, [21] = {0x15, 0x0000}, + [22] = {0x16, 0x0000}, [23] = {0x17, 0x0000}, + [24] = {0x18, 0x0000}, [25] = {0x19, 0x4004}, + [26] = {0x1a, 0x1260}, [27] = {0x1b, 0xff00}, + [28] = {0x1c, 0xcb00}, [29] = {0x1d, 0xa03f}, + [30] = {0x1e, 0xc2e0}, [31] = {0x1f, 0x2807}, + [32] = {0x20, 0x947a}, [33] = {0x21, 0x88aa}, + [34] = {0x22, 0x0057}, [35] = {0x23, 0xab66}, + [36] = {0x24, 0x0800}, [37] = {0x25, 0x0000}, + [38] = {0x26, 0x040a}, [39] = {0x27, 0x01d6}, + [40] = {0x28, 0xf8c2}, [41] = {0x29, 0x3080}, + [42] = {0x2a, 0x3082}, [43] = {0x2b, 0x2078}, + [44] = {0x2c, 0xffff}, [45] = {0x2d, 0xffff}, + [46] = {0x2e, 0x0000}, [47] = {0x2f, 0x0040}, }, + .check_efuse = false, + .do_toggle = true, + .do_toggle_once = false, + .use_default_parameter = false, + .check_rx_front_end_offset = false, +}; + +static const struct phy_cfg rtd1619_phy_cfg = { + .param_size = MAX_USB_PHY_DATA_SIZE, + .param = { [8] = {0x08, 0x3591}, + [38] = {0x26, 0x840b}, + [40] = {0x28, 0xf842}, }, + .check_efuse = false, + .do_toggle = true, + .do_toggle_once = false, + .use_default_parameter = false, + .check_rx_front_end_offset = false, +}; + +static const struct phy_cfg rtd1319_phy_cfg = { + .param_size = MAX_USB_PHY_DATA_SIZE, + .param = { [1] = {0x01, 0xac86}, + [6] = {0x06, 0x0003}, + [9] = {0x09, 0x924c}, + [10] = {0x0a, 0xa608}, + [11] = {0x0b, 0xb905}, + [14] = {0x0e, 0x2010}, + [32] = {0x20, 0x705a}, + [33] = {0x21, 0xf645}, + [34] = {0x22, 0x0013}, + [35] = {0x23, 0xcb66}, + [41] = {0x29, 0xff00}, }, + .check_efuse = true, + .do_toggle = true, + .do_toggle_once = false, + .use_default_parameter = false, + .check_rx_front_end_offset = false, +}; + +static const struct phy_cfg rtd1619b_phy_cfg = { + .param_size = MAX_USB_PHY_DATA_SIZE, + .param = { [1] = {0x01, 0xac8c}, + [6] = {0x06, 0x0017}, + [9] = {0x09, 0x724c}, + [10] = {0x0a, 0xb610}, + [11] = {0x0b, 0xb90d}, + [13] = {0x0d, 0xef2a}, + [15] = {0x0f, 0x9050}, + [16] = {0x10, 0x000c}, + [32] = {0x20, 0x70ff}, + [34] = {0x22, 0x0013}, + [35] = {0x23, 0xdb66}, + [38] = {0x26, 0x8609}, + [41] = {0x29, 0xff13}, + [42] = {0x2a, 0x3070}, }, + .check_efuse = true, + .do_toggle = false, + .do_toggle_once = true, + .use_default_parameter = false, + .check_rx_front_end_offset = false, +}; + +static const struct phy_cfg rtd1319d_phy_cfg = { + .param_size = MAX_USB_PHY_DATA_SIZE, + .param = { [1] = {0x01, 0xac89}, + [4] = {0x04, 0xf2f5}, + [6] = {0x06, 0x0017}, + [9] = {0x09, 0x424c}, + [10] = {0x0a, 0x9610}, + [11] = {0x0b, 0x9901}, + [12] = {0x0c, 0xf000}, + [13] = {0x0d, 0xef2a}, + [14] = {0x0e, 0x1000}, + [15] = {0x0f, 0x9050}, + [32] = {0x20, 0x7077}, + [35] = {0x23, 0x0b62}, + [37] = {0x25, 0x10ec}, + [42] = {0x2a, 0x3070}, }, + .check_efuse = true, + .do_toggle = false, + .do_toggle_once = true, + .use_default_parameter = false, + .check_rx_front_end_offset = true, +}; + +static const struct of_device_id usbphy_rtk_dt_match[] = { + { .compatible = "realtek,rtd1295-usb3phy", .data = &rtd1295_phy_cfg }, + { .compatible = "realtek,rtd1319-usb3phy", .data = &rtd1319_phy_cfg }, + { .compatible = "realtek,rtd1319d-usb3phy", .data = &rtd1319d_phy_cfg }, + { .compatible = "realtek,rtd1619-usb3phy", .data = &rtd1619_phy_cfg }, + { .compatible = "realtek,rtd1619b-usb3phy", .data = &rtd1619b_phy_cfg }, + {}, +}; +MODULE_DEVICE_TABLE(of, usbphy_rtk_dt_match); + +static struct platform_driver rtk_usb3phy_driver = { + .probe = rtk_usb3phy_probe, + .remove_new = rtk_usb3phy_remove, + .driver = { + .name = "rtk-usb3phy", + .of_match_table = usbphy_rtk_dt_match, + }, +}; + +module_platform_driver(rtk_usb3phy_driver); + +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform: rtk-usb3phy"); +MODULE_AUTHOR("Stanley Chang "); +MODULE_DESCRIPTION("Realtek usb 3.0 phy driver"); diff --git a/drivers/platform/chrome/cros_ec_typec.c b/drivers/platform/chrome/cros_ec_typec.c index 25f9767c28e8..d0b4d3fc40ed 100644 --- a/drivers/platform/chrome/cros_ec_typec.c +++ b/drivers/platform/chrome/cros_ec_typec.c @@ -406,6 +406,27 @@ static int cros_typec_usb_safe_state(struct cros_typec_port *port) return ret; } +/** + * cros_typec_get_cable_vdo() - Get Cable VDO of the connected cable + * @port: Type-C port data + * @svid: Standard or Vendor ID to match + * + * Returns the Cable VDO if match is found and returns 0 if match is not found. + */ +static int cros_typec_get_cable_vdo(struct cros_typec_port *port, u16 svid) +{ + struct list_head *head = &port->plug_mode_list; + struct cros_typec_altmode_node *node; + u32 ret = 0; + + list_for_each_entry(node, head, list) { + if (node->amode->svid == svid) + return node->amode->vdo; + } + + return ret; +} + /* * Spoof the VDOs that were likely communicated by the partner for TBT alt * mode. @@ -432,6 +453,9 @@ static int cros_typec_enable_tbt(struct cros_typec_data *typec, /* Cable Discover Mode VDO */ data.cable_mode = TBT_MODE; + + data.cable_mode |= cros_typec_get_cable_vdo(port, USB_TYPEC_TBT_SID); + data.cable_mode |= TBT_SET_CABLE_SPEED(pd_ctrl->cable_speed); if (pd_ctrl->control_flags & USB_PD_CTRL_OPTICAL_CABLE) @@ -522,8 +546,10 @@ static int cros_typec_enable_usb4(struct cros_typec_data *typec, /* Cable Type */ if (pd_ctrl->control_flags & USB_PD_CTRL_OPTICAL_CABLE) data.eudo |= EUDO_CABLE_TYPE_OPTICAL << EUDO_CABLE_TYPE_SHIFT; - else if (pd_ctrl->control_flags & USB_PD_CTRL_ACTIVE_CABLE) + else if (cros_typec_get_cable_vdo(port, USB_TYPEC_TBT_SID) & TBT_CABLE_RETIMER) data.eudo |= EUDO_CABLE_TYPE_RE_TIMER << EUDO_CABLE_TYPE_SHIFT; + else if (pd_ctrl->control_flags & USB_PD_CTRL_ACTIVE_CABLE) + data.eudo |= EUDO_CABLE_TYPE_RE_DRIVER << EUDO_CABLE_TYPE_SHIFT; data.active_link_training = !!(pd_ctrl->control_flags & USB_PD_CTRL_ACTIVE_LINK_UNIDIR); diff --git a/drivers/s390/char/con3215.c b/drivers/s390/char/con3215.c index a1fef666c9b0..99361618c31f 100644 --- a/drivers/s390/char/con3215.c +++ b/drivers/s390/char/con3215.c @@ -1021,8 +1021,8 @@ static unsigned int tty3215_write_room(struct tty_struct *tty) /* * String write routine for 3215 ttys */ -static int tty3215_write(struct tty_struct *tty, - const unsigned char *buf, int count) +static ssize_t tty3215_write(struct tty_struct *tty, const u8 *buf, + size_t count) { handle_write(tty->driver_data, buf, count); return count; @@ -1031,7 +1031,7 @@ static int tty3215_write(struct tty_struct *tty, /* * Put character routine for 3215 ttys */ -static int tty3215_put_char(struct tty_struct *tty, unsigned char ch) +static int tty3215_put_char(struct tty_struct *tty, u8 ch) { struct raw3215_info *raw = tty->driver_data; diff --git a/drivers/s390/char/con3270.c b/drivers/s390/char/con3270.c index d9983550062d..363315fa1666 100644 --- a/drivers/s390/char/con3270.c +++ b/drivers/s390/char/con3270.c @@ -1803,8 +1803,8 @@ static void tty3270_do_write(struct tty3270 *tp, struct tty_struct *tty, /* * String write routine for 3270 ttys */ -static int tty3270_write(struct tty_struct *tty, - const unsigned char *buf, int count) +static ssize_t tty3270_write(struct tty_struct *tty, const u8 *buf, + size_t count) { struct tty3270 *tp; @@ -1822,7 +1822,7 @@ static int tty3270_write(struct tty_struct *tty, /* * Put single characters to the ttys character buffer */ -static int tty3270_put_char(struct tty_struct *tty, unsigned char ch) +static int tty3270_put_char(struct tty_struct *tty, u8 ch) { struct tty3270 *tp; diff --git a/drivers/s390/char/sclp_tty.c b/drivers/s390/char/sclp_tty.c index 971fbb52740b..892c18d2f87e 100644 --- a/drivers/s390/char/sclp_tty.c +++ b/drivers/s390/char/sclp_tty.c @@ -48,7 +48,7 @@ static struct sclp_buffer *sclp_ttybuf; static struct timer_list sclp_tty_timer; static struct tty_port sclp_port; -static unsigned char sclp_tty_chars[SCLP_TTY_BUF_SIZE]; +static u8 sclp_tty_chars[SCLP_TTY_BUF_SIZE]; static unsigned short int sclp_tty_chars_count; struct tty_driver *sclp_tty_driver; @@ -168,7 +168,7 @@ sclp_tty_timeout(struct timer_list *unused) /* * Write a string to the sclp tty. */ -static int sclp_tty_write_string(const unsigned char *str, int count, int may_fail) +static int sclp_tty_write_string(const u8 *str, int count, int may_fail) { unsigned long flags; void *page; @@ -229,8 +229,8 @@ out: * tty device. The characters may come from user space or kernel space. This * routine will return the number of characters actually accepted for writing. */ -static int -sclp_tty_write(struct tty_struct *tty, const unsigned char *buf, int count) +static ssize_t +sclp_tty_write(struct tty_struct *tty, const u8 *buf, size_t count) { if (sclp_tty_chars_count > 0) { sclp_tty_write_string(sclp_tty_chars, sclp_tty_chars_count, 0); @@ -250,7 +250,7 @@ sclp_tty_write(struct tty_struct *tty, const unsigned char *buf, int count) * sclp_write() without final '\n' - will be written. */ static int -sclp_tty_put_char(struct tty_struct *tty, unsigned char ch) +sclp_tty_put_char(struct tty_struct *tty, u8 ch) { sclp_tty_chars[sclp_tty_chars_count++] = ch; if (ch == '\n' || sclp_tty_chars_count >= SCLP_TTY_BUF_SIZE) { diff --git a/drivers/s390/char/sclp_vt220.c b/drivers/s390/char/sclp_vt220.c index a32f34a1c6d2..218ae604f737 100644 --- a/drivers/s390/char/sclp_vt220.c +++ b/drivers/s390/char/sclp_vt220.c @@ -462,8 +462,8 @@ out: * user space or kernel space. This routine will return the * number of characters actually accepted for writing. */ -static int -sclp_vt220_write(struct tty_struct *tty, const unsigned char *buf, int count) +static ssize_t +sclp_vt220_write(struct tty_struct *tty, const u8 *buf, size_t count) { return __sclp_vt220_write(buf, count, 1, 0, 1); } @@ -579,7 +579,7 @@ sclp_vt220_close(struct tty_struct *tty, struct file *filp) * done stuffing characters into the driver. */ static int -sclp_vt220_put_char(struct tty_struct *tty, unsigned char ch) +sclp_vt220_put_char(struct tty_struct *tty, u8 ch) { return __sclp_vt220_write(&ch, 1, 0, 0, 1); } diff --git a/drivers/staging/axis-fifo/axis-fifo.c b/drivers/staging/axis-fifo/axis-fifo.c index 98db47cb4fa4..727b956aa231 100644 --- a/drivers/staging/axis-fifo/axis-fifo.c +++ b/drivers/staging/axis-fifo/axis-fifo.c @@ -15,6 +15,8 @@ */ #include +#include +#include #include #include #include @@ -32,10 +34,6 @@ #include #include -#include -#include -#include - /* ---------------------------- * driver parameters * ---------------------------- @@ -839,16 +837,8 @@ static int axis_fifo_probe(struct platform_device *pdev) * ---------------------------- */ - /* get iospace for the device */ - r_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!r_mem) { - dev_err(fifo->dt_device, "invalid address\n"); - rc = -ENODEV; - goto err_initial; - } - - /* request physical memory */ - fifo->base_addr = devm_ioremap_resource(fifo->dt_device, r_mem); + /* get iospace for the device and request physical memory */ + fifo->base_addr = devm_platform_get_and_ioremap_resource(pdev, 0, &r_mem); if (IS_ERR(fifo->base_addr)) { rc = PTR_ERR(fifo->base_addr); goto err_initial; diff --git a/drivers/staging/fieldbus/anybuss/arcx-anybus.c b/drivers/staging/fieldbus/anybuss/arcx-anybus.c index f135b9f52c8d..6f69758a8b27 100644 --- a/drivers/staging/fieldbus/anybuss/arcx-anybus.c +++ b/drivers/staging/fieldbus/anybuss/arcx-anybus.c @@ -156,8 +156,8 @@ create_anybus_host(struct platform_device *pdev, int idx) if (IS_ERR(ops.regmap)) return ERR_CAST(ops.regmap); ops.irq = platform_get_irq(pdev, idx); - if (ops.irq <= 0) - return ERR_PTR(-EINVAL); + if (ops.irq < 0) + return ERR_PTR(ops.irq); return devm_anybuss_host_common_probe(&pdev->dev, &ops); } @@ -343,7 +343,7 @@ static struct platform_driver controller_driver = { .remove_new = controller_remove, .driver = { .name = "arcx-anybus-controller", - .of_match_table = of_match_ptr(controller_of_match), + .of_match_table = controller_of_match, }, }; diff --git a/drivers/staging/gdm724x/gdm_tty.c b/drivers/staging/gdm724x/gdm_tty.c index e1a84d6020f4..32b2e817ff04 100644 --- a/drivers/staging/gdm724x/gdm_tty.c +++ b/drivers/staging/gdm724x/gdm_tty.c @@ -149,22 +149,17 @@ static void gdm_tty_send_complete(void *arg) tty_port_tty_wakeup(&gdm->port); } -static int gdm_tty_write(struct tty_struct *tty, const unsigned char *buf, - int len) +static ssize_t gdm_tty_write(struct tty_struct *tty, const u8 *buf, size_t len) { struct gdm *gdm = tty->driver_data; - int remain = len; - int sent_len = 0; - int sending_len = 0; + size_t remain = len; + size_t sent_len = 0; if (!gdm_tty_ready(gdm)) return -ENODEV; - if (!len) - return 0; - - while (1) { - sending_len = min(MUX_TX_MAX_SIZE, remain); + while (remain) { + size_t sending_len = min_t(size_t, MUX_TX_MAX_SIZE, remain); gdm->tty_dev->send_func(gdm->tty_dev->priv_dev, (void *)(buf + sent_len), sending_len, @@ -173,8 +168,6 @@ static int gdm_tty_write(struct tty_struct *tty, const unsigned char *buf, gdm); sent_len += sending_len; remain -= sending_len; - if (remain <= 0) - break; } return len; diff --git a/drivers/staging/greybus/arche-platform.c b/drivers/staging/greybus/arche-platform.c index ebe835f25d13..891b75327d7f 100644 --- a/drivers/staging/greybus/arche-platform.c +++ b/drivers/staging/greybus/arche-platform.c @@ -20,6 +20,7 @@ #include #include #include +#include #include "arche_platform.h" #if IS_ENABLED(CONFIG_USB_HSIC_USB3613) diff --git a/drivers/staging/greybus/fw-core.c b/drivers/staging/greybus/fw-core.c index 57bebf24636b..0fb15a60412f 100644 --- a/drivers/staging/greybus/fw-core.c +++ b/drivers/staging/greybus/fw-core.c @@ -89,7 +89,7 @@ static int gb_fw_core_probe(struct gb_bundle *bundle, } connection = gb_connection_create(bundle, cport_id, - gb_fw_mgmt_request_handler); + gb_fw_mgmt_request_handler); if (IS_ERR(connection)) { ret = PTR_ERR(connection); dev_err(&bundle->dev, @@ -110,7 +110,7 @@ static int gb_fw_core_probe(struct gb_bundle *bundle, } connection = gb_connection_create(bundle, cport_id, - gb_fw_download_request_handler); + gb_fw_download_request_handler); if (IS_ERR(connection)) { dev_err(&bundle->dev, "failed to create download connection (%ld)\n", PTR_ERR(connection)); diff --git a/drivers/staging/greybus/pwm.c b/drivers/staging/greybus/pwm.c index 88da1d796f13..f569d371a007 100644 --- a/drivers/staging/greybus/pwm.c +++ b/drivers/staging/greybus/pwm.c @@ -19,7 +19,6 @@ struct gb_pwm_chip { u8 pwm_max; /* max pwm number */ struct pwm_chip chip; - struct pwm_chip *pwm; }; static inline struct gb_pwm_chip *pwm_chip_to_gb_pwm_chip(struct pwm_chip *chip) diff --git a/drivers/staging/greybus/uart.c b/drivers/staging/greybus/uart.c index 20a34599859f..999ce613dca8 100644 --- a/drivers/staging/greybus/uart.c +++ b/drivers/staging/greybus/uart.c @@ -427,8 +427,7 @@ static void gb_tty_hangup(struct tty_struct *tty) tty_port_hangup(&gb_tty->port); } -static int gb_tty_write(struct tty_struct *tty, const unsigned char *buf, - int count) +static ssize_t gb_tty_write(struct tty_struct *tty, const u8 *buf, size_t count) { struct gb_tty *gb_tty = tty->driver_data; diff --git a/drivers/staging/media/imx/imx-media-capture.c b/drivers/staging/media/imx/imx-media-capture.c index 4364df27c6d2..4846078315ff 100644 --- a/drivers/staging/media/imx/imx-media-capture.c +++ b/drivers/staging/media/imx/imx-media-capture.c @@ -7,7 +7,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/staging/media/imx/imx-media-dev-common.c b/drivers/staging/media/imx/imx-media-dev-common.c index 991820a8500f..7b7cbec08326 100644 --- a/drivers/staging/media/imx/imx-media-dev-common.c +++ b/drivers/staging/media/imx/imx-media-dev-common.c @@ -6,8 +6,6 @@ * Copyright (c) 2016 Mentor Graphics Inc. */ -#include -#include #include #include #include diff --git a/drivers/staging/media/imx/imx8mq-mipi-csi2.c b/drivers/staging/media/imx/imx8mq-mipi-csi2.c index ca2efcc21efe..c84b6dceece2 100644 --- a/drivers/staging/media/imx/imx8mq-mipi-csi2.c +++ b/drivers/staging/media/imx/imx8mq-mipi-csi2.c @@ -17,7 +17,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/staging/media/meson/vdec/esparser.c b/drivers/staging/media/meson/vdec/esparser.c index 7b15fc54efe4..4632346f04a9 100644 --- a/drivers/staging/media/meson/vdec/esparser.c +++ b/drivers/staging/media/meson/vdec/esparser.c @@ -11,7 +11,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/staging/media/meson/vdec/vdec.c b/drivers/staging/media/meson/vdec/vdec.c index 5ca4b1200831..219185aaa588 100644 --- a/drivers/staging/media/meson/vdec/vdec.c +++ b/drivers/staging/media/meson/vdec/vdec.c @@ -4,7 +4,7 @@ * Author: Maxime Jourdan */ -#include +#include #include #include #include diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_hw.c b/drivers/staging/media/sunxi/cedrus/cedrus_hw.c index fa86a658fdc6..b696bf884cbd 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus_hw.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus_hw.c @@ -14,8 +14,8 @@ */ #include +#include #include -#include #include #include #include diff --git a/drivers/staging/media/sunxi/sun6i-isp/sun6i_isp.c b/drivers/staging/media/sunxi/sun6i-isp/sun6i_isp.c index 0dc75adbd9d8..8337dc487047 100644 --- a/drivers/staging/media/sunxi/sun6i-isp/sun6i_isp.c +++ b/drivers/staging/media/sunxi/sun6i-isp/sun6i_isp.c @@ -10,7 +10,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/staging/media/tegra-video/csi.c b/drivers/staging/media/tegra-video/csi.c index 052172017b3b..e79657920dc8 100644 --- a/drivers/staging/media/tegra-video/csi.c +++ b/drivers/staging/media/tegra-video/csi.c @@ -10,7 +10,6 @@ #include #include #include -#include #include #include diff --git a/drivers/staging/media/tegra-video/vi.c b/drivers/staging/media/tegra-video/vi.c index 79284c3b6cae..4add037537a2 100644 --- a/drivers/staging/media/tegra-video/vi.c +++ b/drivers/staging/media/tegra-video/vi.c @@ -11,8 +11,8 @@ #include #include #include -#include #include +#include #include #include #include diff --git a/drivers/staging/media/tegra-video/vip.c b/drivers/staging/media/tegra-video/vip.c index a1ab886acc18..4cf3fde7e034 100644 --- a/drivers/staging/media/tegra-video/vip.c +++ b/drivers/staging/media/tegra-video/vip.c @@ -13,7 +13,6 @@ #include #include #include -#include #include #include diff --git a/drivers/staging/most/dim2/dim2.c b/drivers/staging/most/dim2/dim2.c index 44d3252d4612..ed6a9cc88541 100644 --- a/drivers/staging/most/dim2/dim2.c +++ b/drivers/staging/most/dim2/dim2.c @@ -8,7 +8,6 @@ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt #include -#include #include #include #include @@ -21,6 +20,7 @@ #include #include #include +#include #include "hal.h" #include "errors.h" #include "sysfs.h" diff --git a/drivers/staging/pi433/pi433_if.c b/drivers/staging/pi433/pi433_if.c index 220e157d4a5e..58887619b83f 100644 --- a/drivers/staging/pi433/pi433_if.c +++ b/drivers/staging/pi433/pi433_if.c @@ -31,7 +31,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c b/drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c index e5925899402c..58e90b7772ef 100644 --- a/drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c +++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c @@ -59,10 +59,6 @@ static void _rtl92e_update_msr(struct net_device *dev) if (priv->rtllib->link_state == MAC80211_LINKED) msr |= MSR_LINK_ADHOC; break; - case IW_MODE_MASTER: - if (priv->rtllib->link_state == MAC80211_LINKED) - msr |= MSR_LINK_MASTER; - break; default: break; } @@ -419,10 +415,7 @@ static void _rtl92e_read_eeprom_info(struct net_device *dev) rtl92e_init_adaptive_rate(dev); - if (priv->reg_chnl_plan == 0xf) - priv->chnl_plan = priv->eeprom_chnl_plan; - else - priv->chnl_plan = priv->reg_chnl_plan; + priv->chnl_plan = priv->eeprom_chnl_plan; switch (priv->eeprom_customer_id) { case EEPROM_CID_NetCore: @@ -1915,7 +1908,7 @@ void rtl92e_enable_tx(struct net_device *dev) rtl92e_writel(dev, TX_DESC_BASE[i], priv->tx_ring[i].dma); } -void rtl92e_ack_irq(struct net_device *dev, u32 *p_inta, u32 *p_intb) +void rtl92e_ack_irq(struct net_device *dev, u32 *p_inta) { *p_inta = rtl92e_readl(dev, ISR); rtl92e_writel(dev, ISR, *p_inta); diff --git a/drivers/staging/rtl8192e/rtl8192e/r8192E_dev.h b/drivers/staging/rtl8192e/rtl8192e/r8192E_dev.h index fa3b71dbb091..11366fda4ec3 100644 --- a/drivers/staging/rtl8192e/rtl8192e/r8192E_dev.h +++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_dev.h @@ -13,7 +13,7 @@ bool rtl92e_is_halfn_supported_by_ap(struct net_device *dev); bool rtl92e_get_nmode_support_by_sec(struct net_device *dev); bool rtl92e_is_tx_stuck(struct net_device *dev); bool rtl92e_is_rx_stuck(struct net_device *dev); -void rtl92e_ack_irq(struct net_device *dev, u32 *p_inta, u32 *p_intb); +void rtl92e_ack_irq(struct net_device *dev, u32 *p_inta); void rtl92e_enable_rx(struct net_device *dev); void rtl92e_enable_tx(struct net_device *dev); void rtl92e_enable_irq(struct net_device *dev); diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_cam.c b/drivers/staging/rtl8192e/rtl8192e/rtl_cam.c index 6d9e5c27017d..944cc73fb2b6 100644 --- a/drivers/staging/rtl8192e/rtl8192e/rtl_cam.c +++ b/drivers/staging/rtl8192e/rtl8192e/rtl_cam.c @@ -49,8 +49,7 @@ void rtl92e_enable_hw_security_config(struct net_device *dev) } void rtl92e_set_swcam(struct net_device *dev, u8 EntryNo, u8 KeyIndex, - u16 KeyType, const u8 *MacAddr, u8 DefaultKey, - u32 *KeyContent, u8 is_mesh) + u16 KeyType, const u8 *MacAddr, u32 *KeyContent) { struct r8192_priv *priv = rtllib_priv(dev); struct rtllib_device *ieee = priv->rtllib; @@ -58,14 +57,12 @@ void rtl92e_set_swcam(struct net_device *dev, u8 EntryNo, u8 KeyIndex, if (EntryNo >= TOTAL_CAM_ENTRY) return; - if (!is_mesh) { - ieee->swcamtable[EntryNo].bused = true; - ieee->swcamtable[EntryNo].key_index = KeyIndex; - ieee->swcamtable[EntryNo].key_type = KeyType; - memcpy(ieee->swcamtable[EntryNo].macaddr, MacAddr, 6); - ieee->swcamtable[EntryNo].useDK = DefaultKey; - memcpy(ieee->swcamtable[EntryNo].key_buf, (u8 *)KeyContent, 16); - } + ieee->swcamtable[EntryNo].bused = true; + ieee->swcamtable[EntryNo].key_index = KeyIndex; + ieee->swcamtable[EntryNo].key_type = KeyType; + memcpy(ieee->swcamtable[EntryNo].macaddr, MacAddr, 6); + ieee->swcamtable[EntryNo].useDK = 0; + memcpy(ieee->swcamtable[EntryNo].key_buf, (u8 *)KeyContent, 16); } void rtl92e_set_key(struct net_device *dev, u8 EntryNo, u8 KeyIndex, diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_cam.h b/drivers/staging/rtl8192e/rtl8192e/rtl_cam.h index 1ebd92e27441..bd33ef105107 100644 --- a/drivers/staging/rtl8192e/rtl8192e/rtl_cam.h +++ b/drivers/staging/rtl8192e/rtl8192e/rtl_cam.h @@ -19,8 +19,7 @@ void rtl92e_set_key(struct net_device *dev, u8 EntryNo, u8 KeyIndex, u16 KeyType, const u8 *MacAddr, u8 DefaultKey, u32 *KeyContent); void rtl92e_set_swcam(struct net_device *dev, u8 EntryNo, u8 KeyIndex, - u16 KeyType, const u8 *MacAddr, u8 DefaultKey, - u32 *KeyContent, u8 is_mesh); + u16 KeyType, const u8 *MacAddr, u32 *KeyContent); void rtl92e_cam_restore(struct net_device *dev); #endif diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_core.c b/drivers/staging/rtl8192e/rtl8192e/rtl_core.c index 4447489a16ea..50eb8f3494ec 100644 --- a/drivers/staging/rtl8192e/rtl8192e/rtl_core.c +++ b/drivers/staging/rtl8192e/rtl8192e/rtl_core.c @@ -618,8 +618,6 @@ static int _rtl92e_sta_up(struct net_device *dev, bool is_silent_reset) (&priv->rtllib->pwr_save_ctrl); bool init_status; - priv->bdisable_nic = false; - priv->up = 1; priv->rtllib->ieee_up = 1; @@ -760,13 +758,11 @@ static void _rtl92e_init_priv_variable(struct net_device *dev) priv->up_first_time = 1; priv->blinked_ingpio = false; priv->being_init_adapter = false; - priv->bdisable_nic = false; priv->txringcount = 64; priv->rxbuffersize = 9100; priv->rxringcount = MAX_RX_COUNT; priv->irq_enabled = 0; priv->chan = 1; - priv->reg_chnl_plan = 0xf; priv->rtllib->mode = WIRELESS_MODE_AUTO; priv->rtllib->iw_mode = IW_MODE_INFRA; priv->rtllib->net_promiscuous_md = false; @@ -778,7 +774,6 @@ static void _rtl92e_init_priv_variable(struct net_device *dev) priv->retry_data = DEFAULT_RETRY_DATA; priv->rtllib->rts = DEFAULT_RTS_THRESHOLD; priv->rtllib->rate = 110; - priv->rtllib->short_slot = 1; priv->promisc = (dev->flags & IFF_PROMISC) ? 1 : 0; priv->bcck_in_ch14 = false; priv->cck_present_attn = 0; @@ -804,15 +799,9 @@ static void _rtl92e_init_priv_variable(struct net_device *dev) priv->rtllib->iw_mode = IW_MODE_INFRA; priv->rtllib->active_scan = 1; priv->rtllib->be_scan_inprogress = false; - priv->rtllib->modulation = RTLLIB_CCK_MODULATION | - RTLLIB_OFDM_MODULATION; - priv->rtllib->host_encrypt = 1; - priv->rtllib->host_decrypt = 1; priv->rtllib->fts = DEFAULT_FRAG_THRESHOLD; - priv->card_type = PCI; - priv->fw_info = vzalloc(sizeof(struct rt_firmware)); if (!priv->fw_info) netdev_err(dev, @@ -1504,12 +1493,6 @@ static short _rtl92e_tx(struct net_device *dev, struct sk_buff *skb) int idx; u32 fwinfo_size = 0; - if (priv->bdisable_nic) { - netdev_warn(dev, "%s: Nic is disabled! Can't tx packet.\n", - __func__); - return skb->len; - } - priv->rtllib->bAwakePktSent = true; fwinfo_size = sizeof(struct tx_fwinfo_8190pci); @@ -1990,16 +1973,13 @@ static irqreturn_t _rtl92e_irq(int irq, void *netdev) struct r8192_priv *priv = rtllib_priv(dev); unsigned long flags; u32 inta; - u32 intb; - - intb = 0; if (priv->irq_enabled == 0) goto done; spin_lock_irqsave(&priv->irq_th_lock, flags); - rtl92e_ack_irq(dev, &inta, &intb); + rtl92e_ack_irq(dev, &inta); if (!inta) { spin_unlock_irqrestore(&priv->irq_th_lock, flags); @@ -2251,20 +2231,17 @@ bool rtl92e_enable_nic(struct net_device *dev) if (!priv->up) { netdev_warn(dev, "%s(): Driver is already down!\n", __func__); - priv->bdisable_nic = false; return false; } init_status = rtl92e_start_adapter(dev); if (!init_status) { netdev_warn(dev, "%s(): Initialization failed!\n", __func__); - priv->bdisable_nic = false; return false; } RT_CLEAR_PS_LEVEL(psc, RT_RF_OFF_LEVL_HALT_NIC); rtl92e_irq_enable(dev); - priv->bdisable_nic = false; return init_status; } diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_core.h b/drivers/staging/rtl8192e/rtl8192e/rtl_core.h index ec9e454299a8..fa82a0667813 100644 --- a/drivers/staging/rtl8192e/rtl8192e/rtl_core.h +++ b/drivers/staging/rtl8192e/rtl8192e/rtl_core.h @@ -259,12 +259,6 @@ struct r8192_priv { u8 polling_timer_on; /**********************************************************/ - - enum card_type { - PCI, MINIPCI, - CARDBUS, USB - } card_type; - struct work_struct qos_activate; short promisc; @@ -322,13 +316,11 @@ struct r8192_priv { bool tx_pwr_data_read_from_eeprom; - u16 reg_chnl_plan; u16 chnl_plan; u8 hw_rf_off_action; bool rf_change_in_progress; bool set_rf_pwr_state_in_progress; - bool bdisable_nic; u8 cck_pwr_enl; u16 tssi_13dBm; diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c b/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c index 37c275cac40b..dbf765d601b3 100644 --- a/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c +++ b/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c @@ -277,8 +277,8 @@ static void _rtl92e_dm_check_rate_adaptive(struct net_device *dev) struct r8192_priv *priv = rtllib_priv(dev); struct rt_hi_throughput *ht_info = priv->rtllib->ht_info; struct rate_adaptive *pra = &priv->rate_adaptive; - u32 currentRATR, targetRATR = 0; - u32 LowRSSIThreshForRA = 0, HighRSSIThreshForRA = 0; + u32 current_ratr, target_ratr = 0; + u32 low_rssi_thresh_for_ra = 0, high_rssi_thresh_for_ra = 0; bool bshort_gi_enabled = false; static u8 ping_rssi_state; @@ -319,30 +319,30 @@ static void _rtl92e_dm_check_rate_adaptive(struct net_device *dev) ((bshort_gi_enabled) ? BIT31 : 0); if (pra->ratr_state == DM_RATR_STA_HIGH) { - HighRSSIThreshForRA = pra->high2low_rssi_thresh_for_ra; - LowRSSIThreshForRA = (priv->current_chnl_bw != HT_CHANNEL_WIDTH_20) ? + high_rssi_thresh_for_ra = pra->high2low_rssi_thresh_for_ra; + low_rssi_thresh_for_ra = (priv->current_chnl_bw != HT_CHANNEL_WIDTH_20) ? (pra->low_rssi_thresh_for_ra40M) : (pra->low_rssi_thresh_for_ra20M); } else if (pra->ratr_state == DM_RATR_STA_LOW) { - HighRSSIThreshForRA = pra->high_rssi_thresh_for_ra; - LowRSSIThreshForRA = (priv->current_chnl_bw != HT_CHANNEL_WIDTH_20) ? + high_rssi_thresh_for_ra = pra->high_rssi_thresh_for_ra; + low_rssi_thresh_for_ra = (priv->current_chnl_bw != HT_CHANNEL_WIDTH_20) ? (pra->low2high_rssi_thresh_for_ra40M) : (pra->low2high_rssi_thresh_for_ra20M); } else { - HighRSSIThreshForRA = pra->high_rssi_thresh_for_ra; - LowRSSIThreshForRA = (priv->current_chnl_bw != HT_CHANNEL_WIDTH_20) ? + high_rssi_thresh_for_ra = pra->high_rssi_thresh_for_ra; + low_rssi_thresh_for_ra = (priv->current_chnl_bw != HT_CHANNEL_WIDTH_20) ? (pra->low_rssi_thresh_for_ra40M) : (pra->low_rssi_thresh_for_ra20M); } if (priv->undecorated_smoothed_pwdb >= - (long)HighRSSIThreshForRA) { + (long)high_rssi_thresh_for_ra) { pra->ratr_state = DM_RATR_STA_HIGH; - targetRATR = pra->upper_rssi_threshold_ratr; + target_ratr = pra->upper_rssi_threshold_ratr; } else if (priv->undecorated_smoothed_pwdb >= - (long)LowRSSIThreshForRA) { + (long)low_rssi_thresh_for_ra) { pra->ratr_state = DM_RATR_STA_MIDDLE; - targetRATR = pra->middle_rssi_threshold_ratr; + target_ratr = pra->middle_rssi_threshold_ratr; } else { pra->ratr_state = DM_RATR_STA_LOW; - targetRATR = pra->low_rssi_threshold_ratr; + target_ratr = pra->low_rssi_threshold_ratr; } if (pra->ping_rssi_enable) { @@ -352,7 +352,7 @@ static void _rtl92e_dm_check_rate_adaptive(struct net_device *dev) (long)pra->ping_rssi_thresh_for_ra) || ping_rssi_state) { pra->ratr_state = DM_RATR_STA_LOW; - targetRATR = pra->ping_rssi_ratr; + target_ratr = pra->ping_rssi_ratr; ping_rssi_state = 1; } } else { @@ -361,18 +361,18 @@ static void _rtl92e_dm_check_rate_adaptive(struct net_device *dev) } if (priv->rtllib->GetHalfNmodeSupportByAPsHandler(dev)) - targetRATR &= 0xf00fffff; + target_ratr &= 0xf00fffff; - currentRATR = rtl92e_readl(dev, RATR0); - if (targetRATR != currentRATR) { + current_ratr = rtl92e_readl(dev, RATR0); + if (target_ratr != current_ratr) { u32 ratr_value; - ratr_value = targetRATR; + ratr_value = target_ratr; ratr_value &= ~(RATE_ALL_OFDM_2SS); rtl92e_writel(dev, RATR0, ratr_value); rtl92e_writeb(dev, UFWP, 1); - pra->last_ratr = targetRATR; + pra->last_ratr = target_ratr; } } else { diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_ps.c b/drivers/staging/rtl8192e/rtl8192e/rtl_ps.c index 1c49d5da68eb..598bfc0ff3d1 100644 --- a/drivers/staging/rtl8192e/rtl8192e/rtl_ps.c +++ b/drivers/staging/rtl8192e/rtl8192e/rtl_ps.c @@ -118,8 +118,7 @@ void rtl92e_ips_enter(struct net_device *dev) rt_state = priv->rtllib->rf_power_state; if (rt_state == rf_on && !psc->bSwRfProcessing && - (priv->rtllib->link_state != MAC80211_LINKED) && - (priv->rtllib->iw_mode != IW_MODE_MASTER)) { + (priv->rtllib->link_state != MAC80211_LINKED)) { psc->eInactivePowerState = rf_off; _rtl92e_ps_update_rf_state(dev); } @@ -210,8 +209,7 @@ void rtl92e_leisure_ps_enter(struct net_device *dev) if (!((priv->rtllib->iw_mode == IW_MODE_INFRA) && (priv->rtllib->link_state == MAC80211_LINKED)) - || (priv->rtllib->iw_mode == IW_MODE_ADHOC) || - (priv->rtllib->iw_mode == IW_MODE_MASTER)) + || (priv->rtllib->iw_mode == IW_MODE_ADHOC)) return; if (psc->bLeisurePs) { diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_wx.c b/drivers/staging/rtl8192e/rtl8192e/rtl_wx.c index 88975dc804c6..189798852568 100644 --- a/drivers/staging/rtl8192e/rtl8192e/rtl_wx.c +++ b/drivers/staging/rtl8192e/rtl8192e/rtl_wx.c @@ -428,7 +428,7 @@ static int _rtl92e_wx_set_scan(struct net_device *dev, ieee->ScanOperationBackupHandler(ieee->dev, SCAN_OPT_BACKUP); - rtllib_start_scan_syncro(priv->rtllib, 0); + rtllib_start_scan_syncro(priv->rtllib); ieee->ScanOperationBackupHandler(ieee->dev, SCAN_OPT_RESTORE); } @@ -712,7 +712,7 @@ static int _rtl92e_wx_set_enc(struct net_device *dev, rtl92e_set_key(dev, key_idx, key_idx, KEY_TYPE_WEP104, zero_addr[key_idx], 0, hwkey); rtl92e_set_swcam(dev, key_idx, key_idx, KEY_TYPE_WEP104, - zero_addr[key_idx], 0, hwkey, 0); + zero_addr[key_idx], hwkey); } else { netdev_info(dev, "wrong type in WEP, not WEP40 and WEP104\n"); @@ -857,21 +857,19 @@ static int _rtl92e_wx_set_encode_ext(struct net_device *dev, if (ext->key_len == 13) ieee->pairwise_key_type = alg = KEY_TYPE_WEP104; rtl92e_set_key(dev, idx, idx, alg, zero, 0, key); - rtl92e_set_swcam(dev, idx, idx, alg, zero, 0, key, 0); + rtl92e_set_swcam(dev, idx, idx, alg, zero, key); } else if (group) { ieee->group_key_type = alg; rtl92e_set_key(dev, idx, idx, alg, broadcast_addr, 0, key); - rtl92e_set_swcam(dev, idx, idx, alg, broadcast_addr, 0, - key, 0); + rtl92e_set_swcam(dev, idx, idx, alg, broadcast_addr, key); } else { if ((ieee->pairwise_key_type == KEY_TYPE_CCMP) && ieee->ht_info->bCurrentHTSupport) rtl92e_writeb(dev, 0x173, 1); rtl92e_set_key(dev, 4, idx, alg, (u8 *)ieee->ap_mac_addr, 0, key); - rtl92e_set_swcam(dev, 4, idx, alg, - (u8 *)ieee->ap_mac_addr, 0, key, 0); + rtl92e_set_swcam(dev, 4, idx, alg, (u8 *)ieee->ap_mac_addr, key); } } diff --git a/drivers/staging/rtl8192e/rtl819x_BAProc.c b/drivers/staging/rtl8192e/rtl819x_BAProc.c index acc19514bca6..0e3372868f97 100644 --- a/drivers/staging/rtl8192e/rtl819x_BAProc.c +++ b/drivers/staging/rtl8192e/rtl819x_BAProc.c @@ -10,51 +10,51 @@ #include "rtllib.h" #include "rtl819x_BA.h" -static void ActivateBAEntry(struct ba_record *pBA, u16 Time) +static void activate_ba_entry(struct ba_record *pBA, u16 Time) { pBA->b_valid = true; if (Time != 0) mod_timer(&pBA->timer, jiffies + msecs_to_jiffies(Time)); } -static void DeActivateBAEntry(struct rtllib_device *ieee, struct ba_record *pBA) +static void deactivate_ba_entry(struct rtllib_device *ieee, struct ba_record *pBA) { pBA->b_valid = false; del_timer_sync(&pBA->timer); } -static u8 TxTsDeleteBA(struct rtllib_device *ieee, struct tx_ts_record *pTxTs) +static u8 tx_ts_delete_ba(struct rtllib_device *ieee, struct tx_ts_record *pTxTs) { struct ba_record *pAdmittedBa = &pTxTs->TxAdmittedBARecord; struct ba_record *pPendingBa = &pTxTs->TxPendingBARecord; u8 bSendDELBA = false; if (pPendingBa->b_valid) { - DeActivateBAEntry(ieee, pPendingBa); + deactivate_ba_entry(ieee, pPendingBa); bSendDELBA = true; } if (pAdmittedBa->b_valid) { - DeActivateBAEntry(ieee, pAdmittedBa); + deactivate_ba_entry(ieee, pAdmittedBa); bSendDELBA = true; } return bSendDELBA; } -static u8 RxTsDeleteBA(struct rtllib_device *ieee, struct rx_ts_record *pRxTs) +static u8 rx_ts_delete_ba(struct rtllib_device *ieee, struct rx_ts_record *pRxTs) { struct ba_record *pBa = &pRxTs->rx_admitted_ba_record; u8 bSendDELBA = false; if (pBa->b_valid) { - DeActivateBAEntry(ieee, pBa); + deactivate_ba_entry(ieee, pBa); bSendDELBA = true; } return bSendDELBA; } -void ResetBaEntry(struct ba_record *pBA) +void rtllib_reset_ba_entry(struct ba_record *pBA) { pBA->b_valid = false; pBA->ba_param_set.short_data = 0; @@ -270,7 +270,7 @@ int rtllib_rx_ADDBAReq(struct rtllib_device *ieee, struct sk_buff *skb) rtllib_FlushRxTsPendingPkts(ieee, pTS); - DeActivateBAEntry(ieee, pBA); + deactivate_ba_entry(ieee, pBA); pBA->dialog_token = *pDialogToken; pBA->ba_param_set = *pBaParamSet; pBA->ba_timeout_value = *pBaTimeoutVal; @@ -282,7 +282,7 @@ int rtllib_rx_ADDBAReq(struct rtllib_device *ieee, struct sk_buff *skb) else pBA->ba_param_set.field.buffer_size = 32; - ActivateBAEntry(pBA, 0); + activate_ba_entry(pBA, 0); rtllib_send_ADDBARsp(ieee, dst, pBA, ADDBA_STATUS_SUCCESS); return 0; @@ -363,13 +363,13 @@ int rtllib_rx_ADDBARsp(struct rtllib_device *ieee, struct sk_buff *skb) netdev_dbg(ieee->dev, "%s(): Recv ADDBA Rsp. BA is admitted! Status code:%X\n", __func__, *pStatusCode); - DeActivateBAEntry(ieee, pPendingBA); + deactivate_ba_entry(ieee, pPendingBA); } if (*pStatusCode == ADDBA_STATUS_SUCCESS) { if (pBaParamSet->field.ba_policy == BA_POLICY_DELAYED) { pTS->bAddBaReqDelayed = true; - DeActivateBAEntry(ieee, pAdmittedBA); + deactivate_ba_entry(ieee, pAdmittedBA); ReasonCode = DELBA_REASON_END_BA; goto OnADDBARsp_Reject; } @@ -378,8 +378,8 @@ int rtllib_rx_ADDBARsp(struct rtllib_device *ieee, struct sk_buff *skb) pAdmittedBA->ba_timeout_value = *pBaTimeoutVal; pAdmittedBA->ba_start_seq_ctrl = pPendingBA->ba_start_seq_ctrl; pAdmittedBA->ba_param_set = *pBaParamSet; - DeActivateBAEntry(ieee, pAdmittedBA); - ActivateBAEntry(pAdmittedBA, *pBaTimeoutVal); + deactivate_ba_entry(ieee, pAdmittedBA); + activate_ba_entry(pAdmittedBA, *pBaTimeoutVal); } else { pTS->bAddBaReqDelayed = true; pTS->bDisable_AddBa = true; @@ -441,7 +441,7 @@ int rtllib_rx_DELBA(struct rtllib_device *ieee, struct sk_buff *skb) return -1; } - RxTsDeleteBA(ieee, pRxTs); + rx_ts_delete_ba(ieee, pRxTs); } else { struct tx_ts_record *pTxTs; @@ -456,20 +456,20 @@ int rtllib_rx_DELBA(struct rtllib_device *ieee, struct sk_buff *skb) pTxTs->bAddBaReqInProgress = false; pTxTs->bAddBaReqDelayed = false; del_timer_sync(&pTxTs->TsAddBaTimer); - TxTsDeleteBA(ieee, pTxTs); + tx_ts_delete_ba(ieee, pTxTs); } return 0; } -void TsInitAddBA(struct rtllib_device *ieee, struct tx_ts_record *pTS, - u8 Policy, u8 bOverwritePending) +void rtllib_ts_init_add_ba(struct rtllib_device *ieee, struct tx_ts_record *pTS, + u8 Policy, u8 bOverwritePending) { struct ba_record *pBA = &pTS->TxPendingBARecord; if (pBA->b_valid && !bOverwritePending) return; - DeActivateBAEntry(ieee, pBA); + deactivate_ba_entry(ieee, pBA); pBA->dialog_token++; pBA->ba_param_set.field.amsdu_support = 0; @@ -479,20 +479,20 @@ void TsInitAddBA(struct rtllib_device *ieee, struct tx_ts_record *pTS, pBA->ba_timeout_value = 0; pBA->ba_start_seq_ctrl.field.seq_num = (pTS->TxCurSeq + 3) % 4096; - ActivateBAEntry(pBA, BA_SETUP_TIMEOUT); + activate_ba_entry(pBA, BA_SETUP_TIMEOUT); rtllib_send_ADDBAReq(ieee, pTS->TsCommonInfo.Addr, pBA); } -void TsInitDelBA(struct rtllib_device *ieee, - struct ts_common_info *pTsCommonInfo, - enum tr_select TxRxSelect) +void rtllib_ts_init_del_ba(struct rtllib_device *ieee, + struct ts_common_info *pTsCommonInfo, + enum tr_select TxRxSelect) { if (TxRxSelect == TX_DIR) { struct tx_ts_record *pTxTs = (struct tx_ts_record *)pTsCommonInfo; - if (TxTsDeleteBA(ieee, pTxTs)) + if (tx_ts_delete_ba(ieee, pTxTs)) rtllib_send_DELBA(ieee, pTsCommonInfo->Addr, (pTxTs->TxAdmittedBARecord.b_valid) ? (&pTxTs->TxAdmittedBARecord) : @@ -501,14 +501,14 @@ void TsInitDelBA(struct rtllib_device *ieee, } else if (TxRxSelect == RX_DIR) { struct rx_ts_record *pRxTs = (struct rx_ts_record *)pTsCommonInfo; - if (RxTsDeleteBA(ieee, pRxTs)) + if (rx_ts_delete_ba(ieee, pRxTs)) rtllib_send_DELBA(ieee, pTsCommonInfo->Addr, &pRxTs->rx_admitted_ba_record, TxRxSelect, DELBA_REASON_END_BA); } } -void BaSetupTimeOut(struct timer_list *t) +void rtllib_ba_setup_timeout(struct timer_list *t) { struct tx_ts_record *pTxTs = from_timer(pTxTs, t, TxPendingBARecord.timer); @@ -518,26 +518,26 @@ void BaSetupTimeOut(struct timer_list *t) pTxTs->TxPendingBARecord.b_valid = false; } -void TxBaInactTimeout(struct timer_list *t) +void rtllib_tx_ba_inact_timeout(struct timer_list *t) { struct tx_ts_record *pTxTs = from_timer(pTxTs, t, TxAdmittedBARecord.timer); struct rtllib_device *ieee = container_of(pTxTs, struct rtllib_device, TxTsRecord[pTxTs->num]); - TxTsDeleteBA(ieee, pTxTs); + tx_ts_delete_ba(ieee, pTxTs); rtllib_send_DELBA(ieee, pTxTs->TsCommonInfo.Addr, &pTxTs->TxAdmittedBARecord, TX_DIR, DELBA_REASON_TIMEOUT); } -void RxBaInactTimeout(struct timer_list *t) +void rtllib_rx_ba_inact_timeout(struct timer_list *t) { struct rx_ts_record *pRxTs = from_timer(pRxTs, t, rx_admitted_ba_record.timer); struct rtllib_device *ieee = container_of(pRxTs, struct rtllib_device, RxTsRecord[pRxTs->num]); - RxTsDeleteBA(ieee, pRxTs); + rx_ts_delete_ba(ieee, pRxTs); rtllib_send_DELBA(ieee, pRxTs->ts_common_info.Addr, &pRxTs->rx_admitted_ba_record, RX_DIR, DELBA_REASON_TIMEOUT); diff --git a/drivers/staging/rtl8192e/rtl819x_HTProc.c b/drivers/staging/rtl8192e/rtl819x_HTProc.c index f9fa3f2bb728..f19feea46158 100644 --- a/drivers/staging/rtl8192e/rtl819x_HTProc.c +++ b/drivers/staging/rtl8192e/rtl819x_HTProc.c @@ -363,8 +363,7 @@ void HTConstructInfoElement(struct rtllib_device *ieee, u8 *posHTInfo, } memset(posHTInfo, 0, *len); - if ((ieee->iw_mode == IW_MODE_ADHOC) || - (ieee->iw_mode == IW_MODE_MASTER)) { + if (ieee->iw_mode == IW_MODE_ADHOC) { pHTInfoEle->ControlChl = ieee->current_network.channel; pHTInfoEle->ExtChlOffset = ((!pHT->bRegBW40MHz) ? HT_EXTCHNL_OFFSET_NO_EXT : diff --git a/drivers/staging/rtl8192e/rtl819x_TS.h b/drivers/staging/rtl8192e/rtl819x_TS.h index 37760d0bc35d..0e851d4221a7 100644 --- a/drivers/staging/rtl8192e/rtl819x_TS.h +++ b/drivers/staging/rtl8192e/rtl819x_TS.h @@ -19,8 +19,6 @@ enum tr_select { struct ts_common_info { struct list_head List; - struct timer_list SetupTimer; - struct timer_list InactTimer; u8 Addr[ETH_ALEN]; union tspec_body TSpec; union qos_tclas TClass[TCLAS_NUM]; diff --git a/drivers/staging/rtl8192e/rtl819x_TSProc.c b/drivers/staging/rtl8192e/rtl819x_TSProc.c index c61fdf73c572..419ff72f2ba7 100644 --- a/drivers/staging/rtl8192e/rtl819x_TSProc.c +++ b/drivers/staging/rtl8192e/rtl819x_TSProc.c @@ -8,14 +8,6 @@ #include #include "rtl819x_TS.h" -static void TsSetupTimeOut(struct timer_list *unused) -{ -} - -static void TsInactTimeout(struct timer_list *unused) -{ -} - static void RxPktPendingTimeout(struct timer_list *t) { struct rx_ts_record *pRxTs = from_timer(pRxTs, t, @@ -96,7 +88,7 @@ static void TsAddBaProcess(struct timer_list *t) struct rtllib_device *ieee = container_of(pTxTs, struct rtllib_device, TxTsRecord[num]); - TsInitAddBA(ieee, pTxTs, BA_POLICY_IMMEDIATE, false); + rtllib_ts_init_add_ba(ieee, pTxTs, BA_POLICY_IMMEDIATE, false); netdev_dbg(ieee->dev, "%s(): ADDBA Req is started\n", __func__); } @@ -117,8 +109,8 @@ static void ResetTxTsEntry(struct tx_ts_record *pTS) pTS->bAddBaReqDelayed = false; pTS->bUsingBa = false; pTS->bDisable_AddBa = false; - ResetBaEntry(&pTS->TxAdmittedBARecord); - ResetBaEntry(&pTS->TxPendingBARecord); + rtllib_reset_ba_entry(&pTS->TxAdmittedBARecord); + rtllib_reset_ba_entry(&pTS->TxPendingBARecord); } static void ResetRxTsEntry(struct rx_ts_record *pTS) @@ -126,7 +118,7 @@ static void ResetRxTsEntry(struct rx_ts_record *pTS) ResetTsCommonInfo(&pTS->ts_common_info); pTS->rx_indicate_seq = 0xffff; pTS->rx_timeout_indicate_seq = 0xffff; - ResetBaEntry(&pTS->rx_admitted_ba_record); + rtllib_reset_ba_entry(&pTS->rx_admitted_ba_record); } void TSInitialize(struct rtllib_device *ieee) @@ -142,18 +134,12 @@ void TSInitialize(struct rtllib_device *ieee) for (count = 0; count < TOTAL_TS_NUM; count++) { pTxTS->num = count; - timer_setup(&pTxTS->TsCommonInfo.SetupTimer, TsSetupTimeOut, - 0); - - timer_setup(&pTxTS->TsCommonInfo.InactTimer, TsInactTimeout, - 0); - timer_setup(&pTxTS->TsAddBaTimer, TsAddBaProcess, 0); - timer_setup(&pTxTS->TxPendingBARecord.timer, BaSetupTimeOut, + timer_setup(&pTxTS->TxPendingBARecord.timer, rtllib_ba_setup_timeout, 0); timer_setup(&pTxTS->TxAdmittedBARecord.timer, - TxBaInactTimeout, 0); + rtllib_tx_ba_inact_timeout, 0); ResetTxTsEntry(pTxTS); list_add_tail(&pTxTS->TsCommonInfo.List, @@ -167,15 +153,8 @@ void TSInitialize(struct rtllib_device *ieee) for (count = 0; count < TOTAL_TS_NUM; count++) { pRxTS->num = count; INIT_LIST_HEAD(&pRxTS->rx_pending_pkt_list); - - timer_setup(&pRxTS->ts_common_info.SetupTimer, TsSetupTimeOut, - 0); - - timer_setup(&pRxTS->ts_common_info.InactTimer, TsInactTimeout, - 0); - timer_setup(&pRxTS->rx_admitted_ba_record.timer, - RxBaInactTimeout, 0); + rtllib_rx_ba_inact_timeout, 0); timer_setup(&pRxTS->rx_pkt_pending_timer, RxPktPendingTimeout, 0); @@ -194,17 +173,6 @@ void TSInitialize(struct rtllib_device *ieee) } } -static void AdmitTS(struct rtllib_device *ieee, - struct ts_common_info *pTsCommonInfo, u32 InactTime) -{ - del_timer_sync(&pTsCommonInfo->SetupTimer); - del_timer_sync(&pTsCommonInfo->InactTimer); - - if (InactTime != 0) - mod_timer(&pTsCommonInfo->InactTimer, jiffies + - msecs_to_jiffies(InactTime)); -} - static struct ts_common_info *SearchAdmitTRStream(struct rtllib_device *ieee, u8 *Addr, u8 TID, enum tr_select TxRxSelect) @@ -214,15 +182,7 @@ static struct ts_common_info *SearchAdmitTRStream(struct rtllib_device *ieee, struct list_head *psearch_list; struct ts_common_info *pRet = NULL; - if (ieee->iw_mode == IW_MODE_MASTER) { - if (TxRxSelect == TX_DIR) { - search_dir[DIR_DOWN] = true; - search_dir[DIR_BI_DIR] = true; - } else { - search_dir[DIR_UP] = true; - search_dir[DIR_BI_DIR] = true; - } - } else if (ieee->iw_mode == IW_MODE_ADHOC) { + if (ieee->iw_mode == IW_MODE_ADHOC) { if (TxRxSelect == TX_DIR) search_dir[DIR_UP] = true; else @@ -343,9 +303,7 @@ bool GetTs(struct rtllib_device *ieee, struct ts_common_info **ppTS, (&ieee->Tx_TS_Admit_List) : (&ieee->Rx_TS_Admit_List); - Dir = (ieee->iw_mode == IW_MODE_MASTER) ? - ((TxRxSelect == TX_DIR) ? DIR_DOWN : DIR_UP) : - ((TxRxSelect == TX_DIR) ? DIR_UP : DIR_DOWN); + Dir = ((TxRxSelect == TX_DIR) ? DIR_UP : DIR_DOWN); if (!list_empty(pUnusedList)) { (*ppTS) = list_entry(pUnusedList->next, @@ -379,7 +337,6 @@ bool GetTs(struct rtllib_device *ieee, struct ts_common_info **ppTS, pTSInfo->field.ucSchedule = 0; MakeTSEntry(*ppTS, Addr, &TSpec, NULL, 0, 0); - AdmitTS(ieee, *ppTS, 0); list_add_tail(&((*ppTS)->List), pAddmitList); return true; @@ -394,9 +351,7 @@ bool GetTs(struct rtllib_device *ieee, struct ts_common_info **ppTS, static void RemoveTsEntry(struct rtllib_device *ieee, struct ts_common_info *pTs, enum tr_select TxRxSelect) { - del_timer_sync(&pTs->SetupTimer); - del_timer_sync(&pTs->InactTimer); - TsInitDelBA(ieee, pTs, TxRxSelect); + rtllib_ts_init_del_ba(ieee, pTs, TxRxSelect); if (TxRxSelect == RX_DIR) { struct rx_reorder_entry *pRxReorderEntry; diff --git a/drivers/staging/rtl8192e/rtllib.h b/drivers/staging/rtl8192e/rtllib.h index e3ce4431d460..bfa4dbf94d60 100644 --- a/drivers/staging/rtl8192e/rtllib.h +++ b/drivers/staging/rtl8192e/rtllib.h @@ -89,10 +89,6 @@ static inline void *netdev_priv_rsl(struct net_device *dev) #define HIGH_QUEUE 7 #define BEACON_QUEUE 8 -#ifndef IW_MODE_MESH -#define IW_MODE_MESH 7 -#endif - #define IE_CISCO_FLAG_POSITION 0x08 #define SUPPORT_CKIP_MIC 0x08 #define SUPPORT_CKIP_PK 0x10 @@ -818,7 +814,7 @@ struct rtllib_txb { u16 reserved; __le16 frag_size; __le16 payload_size; - struct sk_buff *fragments[]; + struct sk_buff *fragments[] __counted_by(nr_frags); }; #define MAX_SUBFRAME_COUNT 64 @@ -1440,10 +1436,6 @@ struct rtllib_device { * WEP key changes */ - /* If the host performs {en,de}cryption, then set to 1 */ - int host_encrypt; - int host_decrypt; - int ieee802_1x; /* is IEEE 802.1X used */ /* WPA data */ @@ -1490,9 +1482,7 @@ struct rtllib_device { enum rtl_link_state link_state; - int short_slot; int mode; /* A, B, G */ - int modulation; /* CCK, OFDM */ /* used for forcing the ibss workqueue to terminate * without wait for the syncro scan to terminate @@ -1893,7 +1883,7 @@ void rtllib_disassociate(struct rtllib_device *ieee); void rtllib_stop_scan(struct rtllib_device *ieee); bool rtllib_act_scanning(struct rtllib_device *ieee, bool sync_scan); void rtllib_stop_scan_syncro(struct rtllib_device *ieee); -void rtllib_start_scan_syncro(struct rtllib_device *ieee, u8 is_mesh); +void rtllib_start_scan_syncro(struct rtllib_device *ieee); void rtllib_sta_ps_send_null_frame(struct rtllib_device *ieee, short pwr); void rtllib_sta_ps_send_pspoll_frame(struct rtllib_device *ieee); void rtllib_start_protocol(struct rtllib_device *ieee); @@ -2008,15 +1998,15 @@ u16 TxCountToDataRate(struct rtllib_device *ieee, u8 nDataRate); int rtllib_rx_ADDBAReq(struct rtllib_device *ieee, struct sk_buff *skb); int rtllib_rx_ADDBARsp(struct rtllib_device *ieee, struct sk_buff *skb); int rtllib_rx_DELBA(struct rtllib_device *ieee, struct sk_buff *skb); -void TsInitAddBA(struct rtllib_device *ieee, struct tx_ts_record *pTS, - u8 Policy, u8 bOverwritePending); -void TsInitDelBA(struct rtllib_device *ieee, - struct ts_common_info *pTsCommonInfo, - enum tr_select TxRxSelect); -void BaSetupTimeOut(struct timer_list *t); -void TxBaInactTimeout(struct timer_list *t); -void RxBaInactTimeout(struct timer_list *t); -void ResetBaEntry(struct ba_record *pBA); +void rtllib_ts_init_add_ba(struct rtllib_device *ieee, struct tx_ts_record *pTS, + u8 Policy, u8 bOverwritePending); +void rtllib_ts_init_del_ba(struct rtllib_device *ieee, + struct ts_common_info *pTsCommonInfo, + enum tr_select TxRxSelect); +void rtllib_ba_setup_timeout(struct timer_list *t); +void rtllib_tx_ba_inact_timeout(struct timer_list *t); +void rtllib_rx_ba_inact_timeout(struct timer_list *t); +void rtllib_reset_ba_entry(struct ba_record *pBA); bool GetTs(struct rtllib_device *ieee, struct ts_common_info **ppTS, u8 *Addr, u8 TID, enum tr_select TxRxSelect, bool bAddNewTs); void TSInitialize(struct rtllib_device *ieee); diff --git a/drivers/staging/rtl8192e/rtllib_module.c b/drivers/staging/rtl8192e/rtllib_module.c index d6a4d6b4ec57..2416e0c60255 100644 --- a/drivers/staging/rtl8192e/rtllib_module.c +++ b/drivers/staging/rtl8192e/rtllib_module.c @@ -97,9 +97,6 @@ struct net_device *alloc_rtllib(int sizeof_priv) ieee->scan_age = DEFAULT_MAX_SCAN_AGE; ieee->open_wep = 1; - /* Default to enabling full open WEP with host based encrypt/decrypt */ - ieee->host_encrypt = 1; - ieee->host_decrypt = 1; ieee->ieee802_1x = 1; /* Default to supporting 802.1x */ ieee->rtllib_ap_sec_type = rtllib_ap_sec_type; diff --git a/drivers/staging/rtl8192e/rtllib_rx.c b/drivers/staging/rtl8192e/rtllib_rx.c index 91dd3c373aef..40e7bbb17c0d 100644 --- a/drivers/staging/rtl8192e/rtllib_rx.c +++ b/drivers/staging/rtl8192e/rtllib_rx.c @@ -1013,17 +1013,15 @@ static int rtllib_rx_data_filter(struct rtllib_device *ieee, u16 fc, } } - if (ieee->iw_mode != IW_MODE_MESH) { - /* packets from our adapter are dropped (echo) */ - if (!memcmp(src, ieee->dev->dev_addr, ETH_ALEN)) - return -1; + /* packets from our adapter are dropped (echo) */ + if (!memcmp(src, ieee->dev->dev_addr, ETH_ALEN)) + return -1; - /* {broad,multi}cast packets to our BSS go through */ - if (is_multicast_ether_addr(dst)) { - if (memcmp(bssid, ieee->current_network.bssid, - ETH_ALEN)) - return -1; - } + /* {broad,multi}cast packets to our BSS go through */ + if (is_multicast_ether_addr(dst)) { + if (memcmp(bssid, ieee->current_network.bssid, + ETH_ALEN)) + return -1; } return 0; } @@ -1035,29 +1033,27 @@ static int rtllib_rx_get_crypt(struct rtllib_device *ieee, struct sk_buff *skb, u16 fc = le16_to_cpu(hdr->frame_ctl); int idx = 0; - if (ieee->host_decrypt) { - if (skb->len >= hdrlen + 3) - idx = skb->data[hdrlen + 3] >> 6; + if (skb->len >= hdrlen + 3) + idx = skb->data[hdrlen + 3] >> 6; - *crypt = ieee->crypt_info.crypt[idx]; - /* allow NULL decrypt to indicate an station specific override - * for default encryption + *crypt = ieee->crypt_info.crypt[idx]; + /* allow NULL decrypt to indicate an station specific override + * for default encryption + */ + if (*crypt && ((*crypt)->ops == NULL || + (*crypt)->ops->decrypt_mpdu == NULL)) + *crypt = NULL; + + if (!*crypt && (fc & RTLLIB_FCTL_WEP)) { + /* This seems to be triggered by some (multicast?) + * frames from other than current BSS, so just drop the + * frames silently instead of filling system log with + * these reports. */ - if (*crypt && ((*crypt)->ops == NULL || - (*crypt)->ops->decrypt_mpdu == NULL)) - *crypt = NULL; - - if (!*crypt && (fc & RTLLIB_FCTL_WEP)) { - /* This seems to be triggered by some (multicast?) - * frames from other than current BSS, so just drop the - * frames silently instead of filling system log with - * these reports. - */ - netdev_dbg(ieee->dev, - "Decryption failed (not set) (SA= %pM)\n", - hdr->addr2); - return -1; - } + netdev_dbg(ieee->dev, + "Decryption failed (not set) (SA= %pM)\n", + hdr->addr2); + return -1; } return 0; @@ -1083,7 +1079,7 @@ static int rtllib_rx_decrypt(struct rtllib_device *ieee, struct sk_buff *skb, ieee->need_sw_enc = 0; keyidx = rtllib_rx_frame_decrypt(ieee, skb, crypt); - if (ieee->host_decrypt && (fc & RTLLIB_FCTL_WEP) && (keyidx < 0)) { + if ((fc & RTLLIB_FCTL_WEP) && (keyidx < 0)) { netdev_info(ieee->dev, "%s: decrypt frame error\n", __func__); return -1; } @@ -1147,7 +1143,7 @@ static int rtllib_rx_decrypt(struct rtllib_device *ieee, struct sk_buff *skb, /* skb: hdr + (possible reassembled) full MSDU payload; possibly still * encrypted/authenticated */ - if (ieee->host_decrypt && (fc & RTLLIB_FCTL_WEP) && + if ((fc & RTLLIB_FCTL_WEP) && rtllib_rx_frame_decrypt_msdu(ieee, skb, keyidx, crypt)) { netdev_info(ieee->dev, "%s: ==>decrypt msdu error\n", __func__); return -1; @@ -1447,12 +1443,6 @@ static int rtllib_rx_InfraAdhoc(struct rtllib_device *ieee, struct sk_buff *skb, return 0; } -static int rtllib_rx_Master(struct rtllib_device *ieee, struct sk_buff *skb, - struct rtllib_rx_stats *rx_stats) -{ - return 0; -} - static int rtllib_rx_Monitor(struct rtllib_device *ieee, struct sk_buff *skb, struct rtllib_rx_stats *rx_stats) { @@ -1481,12 +1471,6 @@ static int rtllib_rx_Monitor(struct rtllib_device *ieee, struct sk_buff *skb, return 1; } -static int rtllib_rx_Mesh(struct rtllib_device *ieee, struct sk_buff *skb, - struct rtllib_rx_stats *rx_stats) -{ - return 0; -} - /* All received frames are sent to this function. @skb contains the frame in * IEEE 802.11 format, i.e., in the format it was sent over air. * This function is called only as a tasklet (software IRQ). @@ -1510,16 +1494,9 @@ int rtllib_rx(struct rtllib_device *ieee, struct sk_buff *skb, case IW_MODE_INFRA: ret = rtllib_rx_InfraAdhoc(ieee, skb, rx_stats); break; - case IW_MODE_MASTER: - case IW_MODE_REPEAT: - ret = rtllib_rx_Master(ieee, skb, rx_stats); - break; case IW_MODE_MONITOR: ret = rtllib_rx_Monitor(ieee, skb, rx_stats); break; - case IW_MODE_MESH: - ret = rtllib_rx_Mesh(ieee, skb, rx_stats); - break; default: netdev_info(ieee->dev, "%s: ERR iw mode!!!\n", __func__); break; @@ -2698,8 +2675,7 @@ static void rtllib_rx_mgt(struct rtllib_device *ieee, netdev_dbg(ieee->dev, "received PROBE REQUEST (%d)\n", WLAN_FC_GET_STYPE(le16_to_cpu(header->frame_ctl))); if ((ieee->softmac_features & IEEE_SOFTMAC_PROBERS) && - ((ieee->iw_mode == IW_MODE_ADHOC || - ieee->iw_mode == IW_MODE_MASTER) && + (ieee->iw_mode == IW_MODE_ADHOC && ieee->link_state == MAC80211_LINKED)) rtllib_rx_probe_rq(ieee, skb); break; diff --git a/drivers/staging/rtl8192e/rtllib_softmac.c b/drivers/staging/rtl8192e/rtllib_softmac.c index 425d4acbcdf0..de1702491191 100644 --- a/drivers/staging/rtl8192e/rtllib_softmac.c +++ b/drivers/staging/rtl8192e/rtllib_softmac.c @@ -35,12 +35,8 @@ static unsigned int rtllib_MFIE_rate_len(struct rtllib_device *ieee) { unsigned int rate_len = 0; - if (ieee->modulation & RTLLIB_CCK_MODULATION) - rate_len = RTLLIB_CCK_RATE_LEN + 2; - - if (ieee->modulation & RTLLIB_OFDM_MODULATION) - - rate_len += RTLLIB_OFDM_RATE_LEN + 2; + rate_len = RTLLIB_CCK_RATE_LEN + 2; + rate_len += RTLLIB_OFDM_RATE_LEN + 2; return rate_len; } @@ -53,14 +49,12 @@ static void rtllib_MFIE_Brate(struct rtllib_device *ieee, u8 **tag_p) { u8 *tag = *tag_p; - if (ieee->modulation & RTLLIB_CCK_MODULATION) { - *tag++ = MFIE_TYPE_RATES; - *tag++ = 4; - *tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_CCK_RATE_1MB; - *tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_CCK_RATE_2MB; - *tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_CCK_RATE_5MB; - *tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_CCK_RATE_11MB; - } + *tag++ = MFIE_TYPE_RATES; + *tag++ = 4; + *tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_CCK_RATE_1MB; + *tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_CCK_RATE_2MB; + *tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_CCK_RATE_5MB; + *tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_CCK_RATE_11MB; /* We may add an option for custom rates that specific HW * might support @@ -72,18 +66,17 @@ static void rtllib_MFIE_Grate(struct rtllib_device *ieee, u8 **tag_p) { u8 *tag = *tag_p; - if (ieee->modulation & RTLLIB_OFDM_MODULATION) { - *tag++ = MFIE_TYPE_RATES_EX; - *tag++ = 8; - *tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_6MB; - *tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_9MB; - *tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_12MB; - *tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_18MB; - *tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_24MB; - *tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_36MB; - *tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_48MB; - *tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_54MB; - } + *tag++ = MFIE_TYPE_RATES_EX; + *tag++ = 8; + *tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_6MB; + *tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_9MB; + *tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_12MB; + *tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_18MB; + *tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_24MB; + *tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_36MB; + *tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_48MB; + *tag++ = RTLLIB_BASIC_RATE_MASK | RTLLIB_OFDM_RATE_54MB; + /* We may add an option for custom rates that specific HW might * support */ @@ -456,7 +449,7 @@ void rtllib_DisableIntelPromiscuousMode(struct net_device *dev, } EXPORT_SYMBOL(rtllib_DisableIntelPromiscuousMode); -static void rtllib_send_probe(struct rtllib_device *ieee, u8 is_mesh) +static void rtllib_send_probe(struct rtllib_device *ieee) { struct sk_buff *skb; @@ -467,12 +460,12 @@ static void rtllib_send_probe(struct rtllib_device *ieee, u8 is_mesh) } } -static void rtllib_send_probe_requests(struct rtllib_device *ieee, u8 is_mesh) +static void rtllib_send_probe_requests(struct rtllib_device *ieee) { if (ieee->active_scan && (ieee->softmac_features & IEEE_SOFTMAC_PROBERQ)) { - rtllib_send_probe(ieee, 0); - rtllib_send_probe(ieee, 0); + rtllib_send_probe(ieee); + rtllib_send_probe(ieee); } } @@ -485,7 +478,7 @@ static void rtllib_update_active_chan_map(struct rtllib_device *ieee) /* this performs syncro scan blocking the caller until all channels * in the allowed channel map has been checked. */ -static void rtllib_softmac_scan_syncro(struct rtllib_device *ieee, u8 is_mesh) +static void rtllib_softmac_scan_syncro(struct rtllib_device *ieee) { union iwreq_data wrqu; short ch = 0; @@ -532,7 +525,7 @@ static void rtllib_softmac_scan_syncro(struct rtllib_device *ieee, u8 is_mesh) ieee->set_chan(ieee->dev, ch); if (ieee->active_channel_map[ch] == 1) - rtllib_send_probe_requests(ieee, 0); + rtllib_send_probe_requests(ieee); /* this prevent excessive time wait when we * need to wait for a syncro scan to end.. @@ -594,7 +587,7 @@ static void rtllib_softmac_scan_wq(void *data) ieee->set_chan(ieee->dev, ieee->current_network.channel); if (ieee->active_channel_map[ieee->current_network.channel] == 1) - rtllib_send_probe_requests(ieee, 0); + rtllib_send_probe_requests(ieee); schedule_delayed_work(&ieee->softmac_scan_wq, msecs_to_jiffies(RTLLIB_SOFTMAC_SCAN_TIME)); @@ -714,7 +707,7 @@ static void rtllib_start_scan(struct rtllib_device *ieee) } /* called with wx_mutex held */ -void rtllib_start_scan_syncro(struct rtllib_device *ieee, u8 is_mesh) +void rtllib_start_scan_syncro(struct rtllib_device *ieee) { if (IS_DOT11D_ENABLE(ieee)) { if (IS_COUNTRY_IE_VALID(ieee)) @@ -722,7 +715,7 @@ void rtllib_start_scan_syncro(struct rtllib_device *ieee, u8 is_mesh) } ieee->sync_scan_hurryup = 0; if (ieee->softmac_features & IEEE_SOFTMAC_SCAN) - rtllib_softmac_scan_syncro(ieee, is_mesh); + rtllib_softmac_scan_syncro(ieee); } EXPORT_SYMBOL(rtllib_start_scan_syncro); @@ -814,7 +807,7 @@ static struct sk_buff *rtllib_probe_resp(struct rtllib_device *ieee, } crypt = ieee->crypt_info.crypt[ieee->crypt_info.tx_keyidx]; - encrypt = ieee->host_encrypt && crypt && crypt->ops && + encrypt = crypt && crypt->ops && ((strcmp(crypt->ops->name, "R-WEP") == 0 || wpa_ie_len)); if (ieee->ht_info->bCurrentHTSupport) { tmp_ht_cap_buf = (u8 *)&(ieee->ht_info->SelfHTCap); @@ -859,8 +852,7 @@ static struct sk_buff *rtllib_probe_resp(struct rtllib_device *ieee, cpu_to_le16(ieee->current_network.capability & WLAN_CAPABILITY_SHORT_PREAMBLE); - if (ieee->short_slot && (ieee->current_network.capability & - WLAN_CAPABILITY_SHORT_SLOT_TIME)) + if (ieee->current_network.capability & WLAN_CAPABILITY_SHORT_SLOT_TIME) beacon_buf->capability |= cpu_to_le16(WLAN_CAPABILITY_SHORT_SLOT_TIME); @@ -917,91 +909,6 @@ static struct sk_buff *rtllib_probe_resp(struct rtllib_device *ieee, return skb; } -static struct sk_buff *rtllib_assoc_resp(struct rtllib_device *ieee, u8 *dest) -{ - struct sk_buff *skb; - u8 *tag; - - struct lib80211_crypt_data *crypt; - struct rtllib_assoc_response_frame *assoc; - short encrypt; - - unsigned int rate_len = rtllib_MFIE_rate_len(ieee); - int len = sizeof(struct rtllib_assoc_response_frame) + rate_len + - ieee->tx_headroom; - - skb = dev_alloc_skb(len); - - if (!skb) - return NULL; - - skb_reserve(skb, ieee->tx_headroom); - - assoc = skb_put(skb, sizeof(struct rtllib_assoc_response_frame)); - - assoc->header.frame_ctl = cpu_to_le16(RTLLIB_STYPE_ASSOC_RESP); - ether_addr_copy(assoc->header.addr1, dest); - ether_addr_copy(assoc->header.addr3, ieee->dev->dev_addr); - ether_addr_copy(assoc->header.addr2, ieee->dev->dev_addr); - assoc->capability = cpu_to_le16(ieee->iw_mode == IW_MODE_MASTER ? - WLAN_CAPABILITY_ESS : WLAN_CAPABILITY_IBSS); - - if (ieee->short_slot) - assoc->capability |= - cpu_to_le16(WLAN_CAPABILITY_SHORT_SLOT_TIME); - - if (ieee->host_encrypt) - crypt = ieee->crypt_info.crypt[ieee->crypt_info.tx_keyidx]; - else - crypt = NULL; - - encrypt = (crypt && crypt->ops); - - if (encrypt) - assoc->capability |= cpu_to_le16(WLAN_CAPABILITY_PRIVACY); - - assoc->status = 0; - assoc->aid = cpu_to_le16(ieee->assoc_id); - if (ieee->assoc_id == 0x2007) - ieee->assoc_id = 0; - else - ieee->assoc_id++; - - tag = skb_put(skb, rate_len); - rtllib_MFIE_Brate(ieee, &tag); - rtllib_MFIE_Grate(ieee, &tag); - - return skb; -} - -static struct sk_buff *rtllib_auth_resp(struct rtllib_device *ieee, int status, - u8 *dest) -{ - struct sk_buff *skb = NULL; - struct rtllib_authentication *auth; - int len = ieee->tx_headroom + sizeof(struct rtllib_authentication) + 1; - - skb = dev_alloc_skb(len); - if (!skb) - return NULL; - - skb->len = sizeof(struct rtllib_authentication); - - skb_reserve(skb, ieee->tx_headroom); - - auth = skb_put(skb, sizeof(struct rtllib_authentication)); - - auth->status = cpu_to_le16(status); - auth->transaction = cpu_to_le16(2); - auth->algorithm = cpu_to_le16(WLAN_AUTH_OPEN); - - ether_addr_copy(auth->header.addr3, ieee->dev->dev_addr); - ether_addr_copy(auth->header.addr2, ieee->dev->dev_addr); - ether_addr_copy(auth->header.addr1, dest); - auth->header.frame_ctl = cpu_to_le16(RTLLIB_STYPE_AUTH); - return skb; -} - static struct sk_buff *rtllib_null_func(struct rtllib_device *ieee, short pwr) { struct sk_buff *skb; @@ -1049,22 +956,6 @@ static struct sk_buff *rtllib_pspoll_func(struct rtllib_device *ieee) return skb; } -static void rtllib_resp_to_assoc_rq(struct rtllib_device *ieee, u8 *dest) -{ - struct sk_buff *buf = rtllib_assoc_resp(ieee, dest); - - if (buf) - softmac_mgmt_xmit(buf, ieee); -} - -static void rtllib_resp_to_auth(struct rtllib_device *ieee, int s, u8 *dest) -{ - struct sk_buff *buf = rtllib_auth_resp(ieee, s, dest); - - if (buf) - softmac_mgmt_xmit(buf, ieee); -} - static void rtllib_resp_to_probe(struct rtllib_device *ieee, u8 *dest) { struct sk_buff *buf = rtllib_probe_resp(ieee, dest); @@ -1122,7 +1013,7 @@ rtllib_association_req(struct rtllib_network *beacon, crypt = ieee->crypt_info.crypt[ieee->crypt_info.tx_keyidx]; if (crypt != NULL) - encrypt = ieee->host_encrypt && crypt && crypt->ops && + encrypt = crypt && crypt->ops && ((strcmp(crypt->ops->name, "R-WEP") == 0 || wpa_ie_len)); else @@ -1200,8 +1091,7 @@ rtllib_association_req(struct rtllib_network *beacon, if (beacon->capability & WLAN_CAPABILITY_SHORT_PREAMBLE) hdr->capability |= cpu_to_le16(WLAN_CAPABILITY_SHORT_PREAMBLE); - if (ieee->short_slot && - (beacon->capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)) + if (beacon->capability & WLAN_CAPABILITY_SHORT_SLOT_TIME) hdr->capability |= cpu_to_le16(WLAN_CAPABILITY_SHORT_SLOT_TIME); hdr->listen_interval = cpu_to_le16(beacon->listen_interval); @@ -1465,8 +1355,7 @@ static void rtllib_associate_complete_wq(void *data) netif_carrier_on(ieee->dev); ieee->is_roaming = false; - if (rtllib_is_54g(&ieee->current_network) && - (ieee->modulation & RTLLIB_OFDM_MODULATION)) { + if (rtllib_is_54g(&ieee->current_network)) { ieee->rate = 108; netdev_info(ieee->dev, "Using G rates:%d\n", ieee->rate); } else { @@ -1652,9 +1541,7 @@ inline void rtllib_softmac_new_net(struct rtllib_device *ieee, schedule_delayed_work( &ieee->associate_procedure_wq, 0); } else { - if (rtllib_is_54g(&ieee->current_network) && - (ieee->modulation & - RTLLIB_OFDM_MODULATION)) { + if (rtllib_is_54g(&ieee->current_network)) { ieee->rate = 108; ieee->set_wireless_mode(ieee->dev, WIRELESS_MODE_G); netdev_info(ieee->dev, @@ -1726,25 +1613,6 @@ static inline int auth_parse(struct net_device *dev, struct sk_buff *skb, return 0; } -static int auth_rq_parse(struct net_device *dev, struct sk_buff *skb, u8 *dest) -{ - struct rtllib_authentication *a; - - if (skb->len < (sizeof(struct rtllib_authentication) - - sizeof(struct rtllib_info_element))) { - netdev_dbg(dev, "invalid len in auth request: %d\n", skb->len); - return -1; - } - a = (struct rtllib_authentication *)skb->data; - - ether_addr_copy(dest, a->header.addr2); - - if (le16_to_cpu(a->algorithm) != WLAN_AUTH_OPEN) - return WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG; - - return WLAN_STATUS_SUCCESS; -} - static short probe_rq_parse(struct rtllib_device *ieee, struct sk_buff *skb, u8 *src) { @@ -1791,23 +1659,6 @@ static short probe_rq_parse(struct rtllib_device *ieee, struct sk_buff *skb, return !strncmp(ssid, ieee->current_network.ssid, ssidlen); } -static int assoc_rq_parse(struct net_device *dev, struct sk_buff *skb, u8 *dest) -{ - struct rtllib_assoc_request_frame *a; - - if (skb->len < (sizeof(struct rtllib_assoc_request_frame) - - sizeof(struct rtllib_info_element))) { - netdev_dbg(dev, "invalid len in auth request:%d\n", skb->len); - return -1; - } - - a = (struct rtllib_assoc_request_frame *)skb->data; - - ether_addr_copy(dest, a->header.addr2); - - return 0; -} - static inline u16 assoc_parse(struct rtllib_device *ieee, struct sk_buff *skb, int *aid) { @@ -1848,31 +1699,6 @@ void rtllib_rx_probe_rq(struct rtllib_device *ieee, struct sk_buff *skb) } } -static inline void rtllib_rx_auth_rq(struct rtllib_device *ieee, - struct sk_buff *skb) -{ - u8 dest[ETH_ALEN]; - int status; - - ieee->softmac_stats.rx_auth_rq++; - - status = auth_rq_parse(ieee->dev, skb, dest); - if (status != -1) - rtllib_resp_to_auth(ieee, status, dest); -} - -static inline void rtllib_rx_assoc_rq(struct rtllib_device *ieee, - struct sk_buff *skb) -{ - u8 dest[ETH_ALEN]; - - ieee->softmac_stats.rx_ass_rq++; - if (assoc_rq_parse(ieee->dev, skb, dest) != -1) - rtllib_resp_to_assoc_rq(ieee, dest); - - netdev_info(ieee->dev, "New client associated: %pM\n", dest); -} - void rtllib_sta_ps_send_null_frame(struct rtllib_device *ieee, short pwr) { struct sk_buff *buf = rtllib_null_func(ieee, pwr); @@ -2265,8 +2091,6 @@ rtllib_rx_auth(struct rtllib_device *ieee, struct sk_buff *skb, netdev_dbg(ieee->dev, "Received authentication response"); rtllib_rx_auth_resp(ieee, skb); - } else if (ieee->iw_mode == IW_MODE_MASTER) { - rtllib_rx_auth_rq(ieee, skb); } } return 0; @@ -2326,9 +2150,6 @@ inline int rtllib_rx_frame_softmac(struct rtllib_device *ieee, break; case RTLLIB_STYPE_ASSOC_REQ: case RTLLIB_STYPE_REASSOC_REQ: - if ((ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) && - ieee->iw_mode == IW_MODE_MASTER) - rtllib_rx_assoc_rq(ieee, skb); break; case RTLLIB_STYPE_AUTH: rtllib_rx_auth(ieee, skb, rx_stats); @@ -2442,30 +2263,6 @@ void rtllib_wake_all_queues(struct rtllib_device *ieee) netif_tx_wake_all_queues(ieee->dev); } -/* called in user context only */ -static void rtllib_start_master_bss(struct rtllib_device *ieee) -{ - ieee->assoc_id = 1; - - if (ieee->current_network.ssid_len == 0) { - strncpy(ieee->current_network.ssid, - RTLLIB_DEFAULT_TX_ESSID, - IW_ESSID_MAX_SIZE); - - ieee->current_network.ssid_len = - strlen(RTLLIB_DEFAULT_TX_ESSID); - ieee->ssid_set = 1; - } - - ether_addr_copy(ieee->current_network.bssid, ieee->dev->dev_addr); - - ieee->set_chan(ieee->dev, ieee->current_network.channel); - ieee->link_state = MAC80211_LINKED; - ieee->link_change(ieee->dev); - notify_wx_assoc_event(ieee); - netif_carrier_on(ieee->dev); -} - static void rtllib_start_monitor_mode(struct rtllib_device *ieee) { /* reset hardware status */ @@ -2517,7 +2314,7 @@ static void rtllib_start_ibss_wq(void *data) * associated. */ if (ieee->link_state == MAC80211_NOLINK) - rtllib_start_scan_syncro(ieee, 0); + rtllib_start_scan_syncro(ieee); /* the network definitively is not here.. create a new cell */ if (ieee->link_state == MAC80211_NOLINK) { @@ -2526,47 +2323,34 @@ static void rtllib_start_ibss_wq(void *data) if (!ieee->wap_set) eth_random_addr(ieee->current_network.bssid); - if (ieee->modulation & RTLLIB_CCK_MODULATION) { - ieee->current_network.rates_len = 4; + ieee->current_network.rates_len = 4; + ieee->current_network.rates[0] = + RTLLIB_BASIC_RATE_MASK | RTLLIB_CCK_RATE_1MB; + ieee->current_network.rates[1] = + RTLLIB_BASIC_RATE_MASK | RTLLIB_CCK_RATE_2MB; + ieee->current_network.rates[2] = + RTLLIB_BASIC_RATE_MASK | RTLLIB_CCK_RATE_5MB; + ieee->current_network.rates[3] = + RTLLIB_BASIC_RATE_MASK | RTLLIB_CCK_RATE_11MB; - ieee->current_network.rates[0] = - RTLLIB_BASIC_RATE_MASK | RTLLIB_CCK_RATE_1MB; - ieee->current_network.rates[1] = - RTLLIB_BASIC_RATE_MASK | RTLLIB_CCK_RATE_2MB; - ieee->current_network.rates[2] = - RTLLIB_BASIC_RATE_MASK | RTLLIB_CCK_RATE_5MB; - ieee->current_network.rates[3] = - RTLLIB_BASIC_RATE_MASK | RTLLIB_CCK_RATE_11MB; - - } else { - ieee->current_network.rates_len = 0; - } - - if (ieee->modulation & RTLLIB_OFDM_MODULATION) { - ieee->current_network.rates_ex_len = 8; - - ieee->current_network.rates_ex[0] = - RTLLIB_OFDM_RATE_6MB; - ieee->current_network.rates_ex[1] = - RTLLIB_OFDM_RATE_9MB; - ieee->current_network.rates_ex[2] = - RTLLIB_OFDM_RATE_12MB; - ieee->current_network.rates_ex[3] = - RTLLIB_OFDM_RATE_18MB; - ieee->current_network.rates_ex[4] = - RTLLIB_OFDM_RATE_24MB; - ieee->current_network.rates_ex[5] = - RTLLIB_OFDM_RATE_36MB; - ieee->current_network.rates_ex[6] = - RTLLIB_OFDM_RATE_48MB; - ieee->current_network.rates_ex[7] = - RTLLIB_OFDM_RATE_54MB; - - ieee->rate = 108; - } else { - ieee->current_network.rates_ex_len = 0; - ieee->rate = 22; - } + ieee->current_network.rates_ex_len = 8; + ieee->current_network.rates_ex[0] = + RTLLIB_OFDM_RATE_6MB; + ieee->current_network.rates_ex[1] = + RTLLIB_OFDM_RATE_9MB; + ieee->current_network.rates_ex[2] = + RTLLIB_OFDM_RATE_12MB; + ieee->current_network.rates_ex[3] = + RTLLIB_OFDM_RATE_18MB; + ieee->current_network.rates_ex[4] = + RTLLIB_OFDM_RATE_24MB; + ieee->current_network.rates_ex[5] = + RTLLIB_OFDM_RATE_36MB; + ieee->current_network.rates_ex[6] = + RTLLIB_OFDM_RATE_48MB; + ieee->current_network.rates_ex[7] = + RTLLIB_OFDM_RATE_54MB; + ieee->rate = 108; ieee->current_network.qos_data.supported = 0; ieee->set_wireless_mode(ieee->dev, WIRELESS_MODE_G); @@ -2837,9 +2621,6 @@ void rtllib_start_protocol(struct rtllib_device *ieee) case IW_MODE_ADHOC: rtllib_start_ibss(ieee); break; - case IW_MODE_MASTER: - rtllib_start_master_bss(ieee); - break; case IW_MODE_MONITOR: rtllib_start_monitor_mode(ieee); break; @@ -3018,8 +2799,7 @@ u8 rtllib_ap_sec_type(struct rtllib_device *ieee) crypt = ieee->crypt_info.crypt[ieee->crypt_info.tx_keyidx]; encrypt = (ieee->current_network.capability & WLAN_CAPABILITY_PRIVACY) - || (ieee->host_encrypt && crypt && crypt->ops && - (strcmp(crypt->ops->name, "R-WEP") == 0)); + || (crypt && crypt->ops && (strcmp(crypt->ops->name, "R-WEP") == 0)); /* simply judge */ if (encrypt && (wpa_ie_len == 0)) { diff --git a/drivers/staging/rtl8192e/rtllib_softmac_wx.c b/drivers/staging/rtl8192e/rtllib_softmac_wx.c index 2de63d1f2009..0b690f0ffeef 100644 --- a/drivers/staging/rtl8192e/rtllib_softmac_wx.c +++ b/drivers/staging/rtl8192e/rtllib_softmac_wx.c @@ -51,8 +51,7 @@ int rtllib_wx_set_freq(struct rtllib_device *ieee, struct iw_request_info *a, ieee->current_network.channel = fwrq->m; ieee->set_chan(ieee->dev, ieee->current_network.channel); - if (ieee->iw_mode == IW_MODE_ADHOC || - ieee->iw_mode == IW_MODE_MASTER) + if (ieee->iw_mode == IW_MODE_ADHOC) if (ieee->link_state == MAC80211_LINKED) { rtllib_stop_send_beacons(ieee); rtllib_start_send_beacons(ieee); @@ -125,10 +124,6 @@ int rtllib_wx_set_wap(struct rtllib_device *ieee, mutex_lock(&ieee->wx_mutex); /* use ifconfig hw ether */ - if (ieee->iw_mode == IW_MODE_MASTER) { - ret = -1; - goto out; - } if (temp->sa_family != ARPHRD_ETHER) { ret = -EINVAL; @@ -310,7 +305,7 @@ void rtllib_wx_sync_scan_wq(void *data) mutex_lock(&ieee->wx_mutex); if (!(ieee->softmac_features & IEEE_SOFTMAC_SCAN)) { - rtllib_start_scan_syncro(ieee, 0); + rtllib_start_scan_syncro(ieee); goto out; } @@ -339,7 +334,7 @@ void rtllib_wx_sync_scan_wq(void *data) HT_EXTCHNL_OFFSET_NO_EXT); } - rtllib_start_scan_syncro(ieee, 0); + rtllib_start_scan_syncro(ieee); if (b40M) { if (chan_offset == HT_EXTCHNL_OFFSET_UPPER) @@ -366,7 +361,7 @@ void rtllib_wx_sync_scan_wq(void *data) ieee->link_detect_info.NumRecvBcnInPeriod = 1; ieee->link_detect_info.NumRecvDataInPeriod = 1; } - if (ieee->iw_mode == IW_MODE_ADHOC || ieee->iw_mode == IW_MODE_MASTER) + if (ieee->iw_mode == IW_MODE_ADHOC) rtllib_start_send_beacons(ieee); rtllib_wake_all_queues(ieee); @@ -487,11 +482,9 @@ EXPORT_SYMBOL(rtllib_wx_set_rawtx); int rtllib_wx_get_name(struct rtllib_device *ieee, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) { - const char *b = ieee->modulation & RTLLIB_CCK_MODULATION ? "b" : ""; - const char *g = ieee->modulation & RTLLIB_OFDM_MODULATION ? "g" : ""; const char *n = ieee->mode & (WIRELESS_MODE_N_24G) ? "n" : ""; - scnprintf(wrqu->name, sizeof(wrqu->name), "802.11%s%s%s", b, g, n); + scnprintf(wrqu->name, sizeof(wrqu->name), "802.11bg%s", n); return 0; } EXPORT_SYMBOL(rtllib_wx_get_name); diff --git a/drivers/staging/rtl8192e/rtllib_tx.c b/drivers/staging/rtl8192e/rtllib_tx.c index ec038ef806c3..4199aee930f0 100644 --- a/drivers/staging/rtl8192e/rtllib_tx.c +++ b/drivers/staging/rtl8192e/rtllib_tx.c @@ -463,8 +463,6 @@ static void rtllib_query_protectionmode(struct rtllib_device *ieee, } if (ieee->current_network.capability & WLAN_CAPABILITY_SHORT_PREAMBLE) tcb_desc->bUseShortPreamble = true; - if (ieee->iw_mode == IW_MODE_MASTER) - goto NO_PROTECTION; return; NO_PROTECTION: tcb_desc->bRTSEnable = false; @@ -635,8 +633,7 @@ static int rtllib_xmit_inter(struct sk_buff *skb, struct net_device *dev) skb->priority = rtllib_classify(skb, IsAmsdu); crypt = ieee->crypt_info.crypt[ieee->crypt_info.tx_keyidx]; - encrypt = !(ether_type == ETH_P_PAE && ieee->ieee802_1x) && - ieee->host_encrypt && crypt && crypt->ops; + encrypt = !(ether_type == ETH_P_PAE && ieee->ieee802_1x) && crypt && crypt->ops; if (!encrypt && ieee->ieee802_1x && ieee->drop_unencrypted && ether_type != ETH_P_PAE) { stats->tx_dropped++; diff --git a/drivers/staging/rtl8192u/ieee80211/ieee80211_rx.c b/drivers/staging/rtl8192u/ieee80211/ieee80211_rx.c index ca09367005e1..5da8ac401df0 100644 --- a/drivers/staging/rtl8192u/ieee80211/ieee80211_rx.c +++ b/drivers/staging/rtl8192u/ieee80211/ieee80211_rx.c @@ -1121,10 +1121,12 @@ int ieee80211_rx(struct ieee80211_device *ieee, struct sk_buff *skb, /* skb: hdr + (possibly fragmented, possibly encrypted) payload */ - if (ieee->host_decrypt && (fc & IEEE80211_FCTL_WEP) && - (keyidx = ieee80211_rx_frame_decrypt(ieee, skb, crypt)) < 0) { - netdev_dbg(ieee->dev, "decrypt frame error\n"); - goto rx_dropped; + if (ieee->host_decrypt && (fc & IEEE80211_FCTL_WEP)) { + keyidx = ieee80211_rx_frame_decrypt(ieee, skb, crypt); + if (keyidx < 0) { + netdev_dbg(ieee->dev, "decrypt frame error\n"); + goto rx_dropped; + } } diff --git a/drivers/staging/rtl8712/os_intfs.c b/drivers/staging/rtl8712/os_intfs.c index a2f3645be0cc..b18e6d9c832b 100644 --- a/drivers/staging/rtl8712/os_intfs.c +++ b/drivers/staging/rtl8712/os_intfs.c @@ -327,6 +327,7 @@ int r8712_init_drv_sw(struct _adapter *padapter) mp871xinit(padapter); init_default_value(padapter); r8712_InitSwLeds(padapter); + mutex_init(&padapter->mutex_start); return 0; diff --git a/drivers/staging/rtl8712/usb_intf.c b/drivers/staging/rtl8712/usb_intf.c index 37364d3101e2..df05213f922f 100644 --- a/drivers/staging/rtl8712/usb_intf.c +++ b/drivers/staging/rtl8712/usb_intf.c @@ -567,7 +567,6 @@ static int r871xu_drv_init(struct usb_interface *pusb_intf, if (rtl871x_load_fw(padapter)) goto deinit_drv_sw; init_completion(&padapter->rx_filter_ready); - mutex_init(&padapter->mutex_start); return 0; deinit_drv_sw: diff --git a/drivers/staging/rtl8723bs/core/rtw_ap.c b/drivers/staging/rtl8723bs/core/rtw_ap.c index d30d6e6bcd07..e4063713fecc 100644 --- a/drivers/staging/rtl8723bs/core/rtw_ap.c +++ b/drivers/staging/rtl8723bs/core/rtw_ap.c @@ -1238,7 +1238,6 @@ void rtw_acl_remove_sta(struct adapter *padapter, u8 *addr) struct sta_priv *pstapriv = &padapter->stapriv; struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; struct __queue *pacl_node_q = &pacl_list->acl_node_q; - u8 baddr[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; /* Baddr is used for clearing acl_list */ spin_lock_bh(&(pacl_node_q->lock)); @@ -1248,7 +1247,7 @@ void rtw_acl_remove_sta(struct adapter *padapter, u8 *addr) if ( !memcmp(paclnode->addr, addr, ETH_ALEN) || - !memcmp(baddr, addr, ETH_ALEN) + is_broadcast_ether_addr(addr) ) { if (paclnode->valid) { paclnode->valid = false; diff --git a/drivers/staging/rtl8723bs/core/rtw_mlme.c b/drivers/staging/rtl8723bs/core/rtw_mlme.c index 7e2c61c75150..b221913733fb 100644 --- a/drivers/staging/rtl8723bs/core/rtw_mlme.c +++ b/drivers/staging/rtl8723bs/core/rtw_mlme.c @@ -226,9 +226,8 @@ struct wlan_network *_rtw_find_network(struct __queue *scanned_queue, u8 *addr) { struct list_head *phead, *plist; struct wlan_network *pnetwork = NULL; - u8 zero_addr[ETH_ALEN] = {0, 0, 0, 0, 0, 0}; - if (!memcmp(zero_addr, addr, ETH_ALEN)) { + if (is_zero_ether_addr(addr)) { pnetwork = NULL; goto exit; } @@ -2513,7 +2512,7 @@ void rtw_issue_addbareq_cmd(struct adapter *padapter, struct xmit_frame *pxmitfr struct sta_info *psta; struct ht_priv *phtpriv; struct pkt_attrib *pattrib = &pxmitframe->attrib; - s32 bmcst = IS_MCAST(pattrib->ra); + s32 bmcst = is_multicast_ether_addr(pattrib->ra); /* if (bmcst || (padapter->mlmepriv.LinkDetectInfo.bTxBusyTraffic == false)) */ if (bmcst || (padapter->mlmepriv.LinkDetectInfo.NumTxOkInPeriod < 100)) diff --git a/drivers/staging/rtl8723bs/core/rtw_mlme_ext.c b/drivers/staging/rtl8723bs/core/rtw_mlme_ext.c index 1148c9829890..985683767a40 100644 --- a/drivers/staging/rtl8723bs/core/rtw_mlme_ext.c +++ b/drivers/staging/rtl8723bs/core/rtw_mlme_ext.c @@ -421,13 +421,12 @@ void free_mlme_ext_priv(struct mlme_ext_priv *pmlmeext) static void _mgt_dispatcher(struct adapter *padapter, struct mlme_handler *ptable, union recv_frame *precv_frame) { - u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; u8 *pframe = precv_frame->u.hdr.rx_data; if (ptable->func) { /* receive the frames that ra(a1) is my address or ra(a1) is bc address. */ if (memcmp(GetAddr1Ptr(pframe), myid(&padapter->eeprompriv), ETH_ALEN) && - memcmp(GetAddr1Ptr(pframe), bc_addr, ETH_ALEN)) + !is_broadcast_ether_addr(GetAddr1Ptr(pframe))) return; ptable->func(padapter, precv_frame); @@ -439,7 +438,6 @@ void mgt_dispatcher(struct adapter *padapter, union recv_frame *precv_frame) int index; struct mlme_handler *ptable; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; u8 *pframe = precv_frame->u.hdr.rx_data; struct sta_info *psta = rtw_get_stainfo(&padapter->stapriv, GetAddr2Ptr(pframe)); struct dvobj_priv *psdpriv = padapter->dvobj; @@ -450,7 +448,7 @@ void mgt_dispatcher(struct adapter *padapter, union recv_frame *precv_frame) /* receive the frames that ra(a1) is my address or ra(a1) is bc address. */ if (memcmp(GetAddr1Ptr(pframe), myid(&padapter->eeprompriv), ETH_ALEN) && - memcmp(GetAddr1Ptr(pframe), bc_addr, ETH_ALEN)) { + !is_broadcast_ether_addr(GetAddr1Ptr(pframe))) { return; } diff --git a/drivers/staging/rtl8723bs/core/rtw_recv.c b/drivers/staging/rtl8723bs/core/rtw_recv.c index 7c7b6495965f..0eadc23a7d54 100644 --- a/drivers/staging/rtl8723bs/core/rtw_recv.c +++ b/drivers/staging/rtl8723bs/core/rtw_recv.c @@ -317,7 +317,7 @@ static signed int recvframe_chkmic(struct adapter *adapter, union recv_frame *p if (prxattrib->encrypt == _TKIP_) { /* calculate mic code */ if (stainfo) { - if (IS_MCAST(prxattrib->ra)) { + if (is_multicast_ether_addr(prxattrib->ra)) { /* mickey =&psecuritypriv->dot118021XGrprxmickey.skey[0]; */ /* iv = precvframe->u.hdr.rx_data+prxattrib->hdrlen; */ /* rxdata_key_idx =(((iv[3])>>6)&0x3) ; */ @@ -352,18 +352,18 @@ static signed int recvframe_chkmic(struct adapter *adapter, union recv_frame *p if (bmic_err == true) { /* double check key_index for some timing issue , */ /* cannot compare with psecuritypriv->dot118021XGrpKeyid also cause timing issue */ - if ((IS_MCAST(prxattrib->ra) == true) && (prxattrib->key_index != pmlmeinfo->key_index)) + if ((is_multicast_ether_addr(prxattrib->ra) == true) && (prxattrib->key_index != pmlmeinfo->key_index)) brpt_micerror = false; if (prxattrib->bdecrypted && brpt_micerror) - rtw_handle_tkip_mic_err(adapter, (u8)IS_MCAST(prxattrib->ra)); + rtw_handle_tkip_mic_err(adapter, (u8)is_multicast_ether_addr(prxattrib->ra)); res = _FAIL; } else { /* mic checked ok */ if (!psecuritypriv->bcheck_grpkey && - IS_MCAST(prxattrib->ra)) + is_multicast_ether_addr(prxattrib->ra)) psecuritypriv->bcheck_grpkey = true; } } @@ -625,7 +625,7 @@ static void count_rx_stats(struct adapter *padapter, union recv_frame *prframe, padapter->mlmepriv.LinkDetectInfo.NumRxOkInPeriod++; - if ((!MacAddr_isBcst(pattrib->dst)) && (!IS_MCAST(pattrib->dst))) + if ((!is_broadcast_ether_addr(pattrib->dst)) && (!is_multicast_ether_addr(pattrib->dst))) padapter->mlmepriv.LinkDetectInfo.NumRxUnicastOkInPeriod++; if (sta) @@ -654,7 +654,7 @@ static signed int sta2sta_data_frame(struct adapter *adapter, union recv_frame * u8 *mybssid = get_bssid(pmlmepriv); u8 *myhwaddr = myid(&adapter->eeprompriv); u8 *sta_addr = NULL; - signed int bmcast = IS_MCAST(pattrib->dst); + signed int bmcast = is_multicast_ether_addr(pattrib->dst); if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == true) || (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == true)) { @@ -670,9 +670,9 @@ static signed int sta2sta_data_frame(struct adapter *adapter, union recv_frame * goto exit; } - if (!memcmp(pattrib->bssid, "\x0\x0\x0\x0\x0\x0", ETH_ALEN) || - !memcmp(mybssid, "\x0\x0\x0\x0\x0\x0", ETH_ALEN) || - (memcmp(pattrib->bssid, mybssid, ETH_ALEN))) { + if (is_zero_ether_addr(pattrib->bssid) || + is_zero_ether_addr(mybssid) || + (memcmp(pattrib->bssid, mybssid, ETH_ALEN))) { ret = _FAIL; goto exit; } @@ -690,7 +690,7 @@ static signed int sta2sta_data_frame(struct adapter *adapter, union recv_frame * } else if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == true) { if (bmcast) { /* For AP mode, if DA == MCAST, then BSSID should be also MCAST */ - if (!IS_MCAST(pattrib->bssid)) { + if (!is_multicast_ether_addr(pattrib->bssid)) { ret = _FAIL; goto exit; } @@ -741,7 +741,7 @@ static signed int ap2sta_data_frame(struct adapter *adapter, union recv_frame *p struct mlme_priv *pmlmepriv = &adapter->mlmepriv; u8 *mybssid = get_bssid(pmlmepriv); u8 *myhwaddr = myid(&adapter->eeprompriv); - signed int bmcast = IS_MCAST(pattrib->dst); + signed int bmcast = is_multicast_ether_addr(pattrib->dst); if ((check_fwstate(pmlmepriv, WIFI_STATION_STATE) == true) && (check_fwstate(pmlmepriv, _FW_LINKED) == true || @@ -762,9 +762,9 @@ static signed int ap2sta_data_frame(struct adapter *adapter, union recv_frame *p /* check BSSID */ - if (!memcmp(pattrib->bssid, "\x0\x0\x0\x0\x0\x0", ETH_ALEN) || - !memcmp(mybssid, "\x0\x0\x0\x0\x0\x0", ETH_ALEN) || - (memcmp(pattrib->bssid, mybssid, ETH_ALEN))) { + if (is_zero_ether_addr(pattrib->bssid) || + is_zero_ether_addr(mybssid) || + (memcmp(pattrib->bssid, mybssid, ETH_ALEN))) { if (!bmcast) issue_deauth(adapter, pattrib->bssid, WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA); @@ -1329,7 +1329,7 @@ static signed int validate_recv_data_frame(struct adapter *adapter, union recv_f } if (pattrib->privacy) { - GET_ENCRY_ALGO(psecuritypriv, psta, pattrib->encrypt, IS_MCAST(pattrib->ra)); + GET_ENCRY_ALGO(psecuritypriv, psta, pattrib->encrypt, is_multicast_ether_addr(pattrib->ra)); SET_ICE_IV_LEN(pattrib->iv_len, pattrib->icv_len, pattrib->encrypt); } else { @@ -1354,7 +1354,7 @@ static signed int validate_80211w_mgmt(struct adapter *adapter, union recv_frame if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) && check_fwstate(pmlmepriv, _FW_LINKED) && adapter->securitypriv.binstallBIPkey == true) { /* unicast management frame decrypt */ - if (pattrib->privacy && !(IS_MCAST(GetAddr1Ptr(ptr))) && + if (pattrib->privacy && !(is_multicast_ether_addr(GetAddr1Ptr(ptr))) && (subtype == WIFI_DEAUTH || subtype == WIFI_DISASSOC || subtype == WIFI_ACTION)) { u8 *mgmt_DATA; u32 data_len = 0; @@ -1381,7 +1381,7 @@ static signed int validate_80211w_mgmt(struct adapter *adapter, union recv_frame kfree(mgmt_DATA); if (!precv_frame) goto validate_80211w_fail; - } else if (IS_MCAST(GetAddr1Ptr(ptr)) && + } else if (is_multicast_ether_addr(GetAddr1Ptr(ptr)) && (subtype == WIFI_DEAUTH || subtype == WIFI_DISASSOC)) { signed int BIP_ret = _SUCCESS; /* verify BIP MME IE of broadcast/multicast de-auth/disassoc packet */ @@ -2041,7 +2041,7 @@ static int recv_func(struct adapter *padapter, union recv_frame *rframe) /* check if need to enqueue into uc_swdec_pending_queue*/ if (check_fwstate(mlmepriv, WIFI_STATION_STATE) && - !IS_MCAST(prxattrib->ra) && prxattrib->encrypt > 0 && + !is_multicast_ether_addr(prxattrib->ra) && prxattrib->encrypt > 0 && (prxattrib->bdecrypted == 0 || psecuritypriv->sw_decrypt == true) && psecuritypriv->ndisauthtype == Ndis802_11AuthModeWPAPSK && !psecuritypriv->busetkipkey) { diff --git a/drivers/staging/rtl8723bs/core/rtw_security.c b/drivers/staging/rtl8723bs/core/rtw_security.c index ac731415f733..7ecdaa2eeaf3 100644 --- a/drivers/staging/rtl8723bs/core/rtw_security.c +++ b/drivers/staging/rtl8723bs/core/rtw_security.c @@ -486,7 +486,7 @@ u32 rtw_tkip_encrypt(struct adapter *padapter, u8 *pxmitframe) if (pattrib->encrypt == _TKIP_) { { - if (IS_MCAST(pattrib->ra)) + if (is_multicast_ether_addr(pattrib->ra)) prwskey = psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey; else prwskey = pattrib->dot118021x_UncstKey.skey; @@ -554,7 +554,7 @@ u32 rtw_tkip_decrypt(struct adapter *padapter, u8 *precvframe) if (prxattrib->encrypt == _TKIP_) { stainfo = rtw_get_stainfo(&padapter->stapriv, &prxattrib->ta[0]); if (stainfo) { - if (IS_MCAST(prxattrib->ra)) { + if (is_multicast_ether_addr(prxattrib->ra)) { static unsigned long start; static u32 no_gkey_bc_cnt; static u32 no_gkey_mc_cnt; @@ -1051,7 +1051,7 @@ u32 rtw_aes_encrypt(struct adapter *padapter, u8 *pxmitframe) /* 4 start to encrypt each fragment */ if (pattrib->encrypt == _AES_) { - if (IS_MCAST(pattrib->ra)) + if (is_multicast_ether_addr(pattrib->ra)) prwskey = psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey; else prwskey = pattrib->dot118021x_UncstKey.skey; @@ -1305,7 +1305,7 @@ u32 rtw_aes_decrypt(struct adapter *padapter, u8 *precvframe) if (prxattrib->encrypt == _AES_) { stainfo = rtw_get_stainfo(&padapter->stapriv, &prxattrib->ta[0]); if (stainfo) { - if (IS_MCAST(prxattrib->ra)) { + if (is_multicast_ether_addr(prxattrib->ra)) { static unsigned long start; static u32 no_gkey_bc_cnt; static u32 no_gkey_mc_cnt; diff --git a/drivers/staging/rtl8723bs/core/rtw_sta_mgt.c b/drivers/staging/rtl8723bs/core/rtw_sta_mgt.c index c7de81f21bec..1593980d2c6a 100644 --- a/drivers/staging/rtl8723bs/core/rtw_sta_mgt.c +++ b/drivers/staging/rtl8723bs/core/rtw_sta_mgt.c @@ -471,7 +471,7 @@ struct sta_info *rtw_get_stainfo(struct sta_priv *pstapriv, u8 *hwaddr) if (!hwaddr) return NULL; - if (IS_MCAST(hwaddr)) + if (is_multicast_ether_addr(hwaddr)) addr = bc_addr; else addr = hwaddr; diff --git a/drivers/staging/rtl8723bs/core/rtw_wlan_util.c b/drivers/staging/rtl8723bs/core/rtw_wlan_util.c index ba39c8b1a9ae..7fac9ca3e9a0 100644 --- a/drivers/staging/rtl8723bs/core/rtw_wlan_util.c +++ b/drivers/staging/rtl8723bs/core/rtw_wlan_util.c @@ -1779,10 +1779,9 @@ void adaptive_early_32k(struct mlme_ext_priv *pmlmeext, u8 *pframe, uint len) void rtw_alloc_macid(struct adapter *padapter, struct sta_info *psta) { int i; - u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter); - if (!memcmp(psta->hwaddr, bc_addr, ETH_ALEN)) + if (is_broadcast_ether_addr(psta->hwaddr)) return; if (!memcmp(psta->hwaddr, myid(&padapter->eeprompriv), ETH_ALEN)) { @@ -1807,10 +1806,9 @@ void rtw_alloc_macid(struct adapter *padapter, struct sta_info *psta) void rtw_release_macid(struct adapter *padapter, struct sta_info *psta) { - u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter); - if (!memcmp(psta->hwaddr, bc_addr, ETH_ALEN)) + if (is_broadcast_ether_addr(psta->hwaddr)) return; if (!memcmp(psta->hwaddr, myid(&padapter->eeprompriv), ETH_ALEN)) diff --git a/drivers/staging/rtl8723bs/core/rtw_xmit.c b/drivers/staging/rtl8723bs/core/rtw_xmit.c index a22512633d1b..b1965ec0181f 100644 --- a/drivers/staging/rtl8723bs/core/rtw_xmit.c +++ b/drivers/staging/rtl8723bs/core/rtw_xmit.c @@ -473,7 +473,7 @@ static s32 update_attrib_sec_info(struct adapter *padapter, struct pkt_attrib *p signed int res = _SUCCESS; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct security_priv *psecuritypriv = &padapter->securitypriv; - signed int bmcast = IS_MCAST(pattrib->ra); + signed int bmcast = is_multicast_ether_addr(pattrib->ra); memset(pattrib->dot118021x_UncstKey.skey, 0, 16); memset(pattrib->dot11tkiptxmickey.skey, 0, 16); @@ -691,7 +691,7 @@ static s32 update_attrib(struct adapter *padapter, struct sk_buff *pkt, struct p else if (pattrib->dhcp_pkt == 1) rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_SPECIAL_PACKET, 1); - bmcast = IS_MCAST(pattrib->ra); + bmcast = is_multicast_ether_addr(pattrib->ra); /* get sta_info */ if (bmcast) { @@ -765,7 +765,7 @@ static s32 xmitframe_addmic(struct adapter *padapter, struct xmit_frame *pxmitfr struct xmit_priv *pxmitpriv = &padapter->xmitpriv; u8 priority[4] = {0x0, 0x0, 0x0, 0x0}; u8 hw_hdr_offset = 0; - signed int bmcst = IS_MCAST(pattrib->ra); + signed int bmcst = is_multicast_ether_addr(pattrib->ra); hw_hdr_offset = TXDESC_OFFSET; @@ -1035,7 +1035,7 @@ s32 rtw_xmitframe_coalesce(struct adapter *padapter, struct sk_buff *pkt, struct u8 *pbuf_start; - s32 bmcst = IS_MCAST(pattrib->ra); + s32 bmcst = is_multicast_ether_addr(pattrib->ra); s32 res = _SUCCESS; if (!pxmitframe->buf_addr) @@ -1143,7 +1143,7 @@ s32 rtw_mgmt_xmitframe_coalesce(struct adapter *padapter, struct sk_buff *pkt, s u8 subtype; struct sta_info *psta = NULL; struct pkt_attrib *pattrib = &pxmitframe->attrib; - s32 bmcst = IS_MCAST(pattrib->ra); + s32 bmcst = is_multicast_ether_addr(pattrib->ra); u8 *BIP_AAD = NULL; u8 *MGMT_body = NULL; @@ -2016,7 +2016,7 @@ signed int xmitframe_enqueue_for_sleeping_sta(struct adapter *padapter, struct x struct sta_priv *pstapriv = &padapter->stapriv; struct pkt_attrib *pattrib = &pxmitframe->attrib; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - signed int bmcst = IS_MCAST(pattrib->ra); + signed int bmcst = is_multicast_ether_addr(pattrib->ra); bool update_tim = false; if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == false) diff --git a/drivers/staging/rtl8723bs/hal/hal_intf.c b/drivers/staging/rtl8723bs/hal/hal_intf.c index 6bb0ff8d7c78..7e3db8d3c910 100644 --- a/drivers/staging/rtl8723bs/hal/hal_intf.c +++ b/drivers/staging/rtl8723bs/hal/hal_intf.c @@ -217,7 +217,7 @@ s32 rtw_hal_mgnt_xmit(struct adapter *padapter, struct xmit_frame *pmgntframe) /* memcpy(pmgntframe->attrib.ra, pwlanhdr->addr1, ETH_ALEN); */ if (padapter->securitypriv.binstallBIPkey == true) { - if (IS_MCAST(pmgntframe->attrib.ra)) { + if (is_multicast_ether_addr(pmgntframe->attrib.ra)) { pmgntframe->attrib.encrypt = _BIP_; /* pmgntframe->attrib.bswenc = true; */ } else { diff --git a/drivers/staging/rtl8723bs/hal/odm.c b/drivers/staging/rtl8723bs/hal/odm.c index 31f65d817899..ea3b4cd32360 100644 --- a/drivers/staging/rtl8723bs/hal/odm.c +++ b/drivers/staging/rtl8723bs/hal/odm.c @@ -429,7 +429,7 @@ static void odm_RefreshRateAdaptiveMaskCE(struct dm_odm_t *pDM_Odm) PSTA_INFO_T pstat = pDM_Odm->pODM_StaInfo[i]; if (IS_STA_VALID(pstat)) { - if (IS_MCAST(pstat->hwaddr)) /* if (psta->mac_id == 1) */ + if (is_multicast_ether_addr(pstat->hwaddr)) /* if (psta->mac_id == 1) */ continue; if (true == ODM_RAStateCheck(pDM_Odm, pstat->rssi_stat.UndecoratedSmoothedPWDB, false, &pstat->rssi_level)) { @@ -576,7 +576,7 @@ static void odm_RSSIMonitorCheckCE(struct dm_odm_t *pDM_Odm) for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { psta = pDM_Odm->pODM_StaInfo[i]; if (IS_STA_VALID(psta)) { - if (IS_MCAST(psta->hwaddr)) /* if (psta->mac_id == 1) */ + if (is_multicast_ether_addr(psta->hwaddr)) /* if (psta->mac_id == 1) */ continue; if (psta->rssi_stat.UndecoratedSmoothedPWDB == (-1)) diff --git a/drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c b/drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c index 1e9e1089032b..c5219a4a4919 100644 --- a/drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c +++ b/drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c @@ -2609,7 +2609,7 @@ static void rtl8723b_fill_default_txdesc( pmlmeinfo = &(pmlmeext->mlmext_info); pattrib = &pxmitframe->attrib; - bmcst = IS_MCAST(pattrib->ra); + bmcst = is_multicast_ether_addr(pattrib->ra); ptxdesc = (struct txdesc_8723b *)pbuf; diff --git a/drivers/staging/rtl8723bs/include/wifi.h b/drivers/staging/rtl8723bs/include/wifi.h index f03e26818d45..53f9411fcc4c 100644 --- a/drivers/staging/rtl8723bs/include/wifi.h +++ b/drivers/staging/rtl8723bs/include/wifi.h @@ -211,21 +211,6 @@ enum { #define GetAddr4Ptr(pbuf) ((unsigned char *)((size_t)(pbuf) + 24)) -#define MacAddr_isBcst(addr) \ - (\ - ((addr[0] == 0xff) && (addr[1] == 0xff) && \ - (addr[2] == 0xff) && (addr[3] == 0xff) && \ - (addr[4] == 0xff) && (addr[5] == 0xff)) ? true : false \ -) - -static inline int IS_MCAST(unsigned char *da) -{ - if ((*da) & 0x01) - return true; - else - return false; -} - static inline unsigned char *rtl8723bs_get_ra(unsigned char *pframe) { unsigned char *ra; diff --git a/drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c b/drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c index 2ae7843abdf7..af155fca39b8 100644 --- a/drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c +++ b/drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c @@ -95,14 +95,14 @@ static struct ieee80211_channel rtw_2ghz_channels[] = { static void rtw_2g_channels_init(struct ieee80211_channel *channels) { memcpy((void *)channels, (void *)rtw_2ghz_channels, - sizeof(struct ieee80211_channel)*RTW_2G_CHANNELS_NUM + sizeof(struct ieee80211_channel) * RTW_2G_CHANNELS_NUM ); } static void rtw_2g_rates_init(struct ieee80211_rate *rates) { memcpy(rates, rtw_g_rates, - sizeof(struct ieee80211_rate)*RTW_G_RATES_NUM + sizeof(struct ieee80211_rate) * RTW_G_RATES_NUM ); } @@ -126,8 +126,8 @@ static struct ieee80211_supported_band *rtw_spt_band_alloc( if (!spt_band) goto exit; - spt_band->channels = (struct ieee80211_channel *)(((u8 *)spt_band)+sizeof(struct ieee80211_supported_band)); - spt_band->bitrates = (struct ieee80211_rate *)(((u8 *)spt_band->channels)+sizeof(struct ieee80211_channel)*n_channels); + spt_band->channels = (struct ieee80211_channel *)(((u8 *)spt_band) + sizeof(struct ieee80211_supported_band)); + spt_band->bitrates = (struct ieee80211_rate *)(((u8 *)spt_band->channels) + sizeof(struct ieee80211_channel) * n_channels); spt_band->band = band; spt_band->n_channels = n_channels; spt_band->n_bitrates = n_bitrates; @@ -247,10 +247,10 @@ struct cfg80211_bss *rtw_cfg80211_inform_bss(struct adapter *padapter, struct wl u32 wpsielen = 0; u8 *wpsie = NULL; - wpsie = rtw_get_wps_ie(pnetwork->network.ies+_FIXED_IE_LENGTH_, pnetwork->network.ie_length-_FIXED_IE_LENGTH_, NULL, &wpsielen); + wpsie = rtw_get_wps_ie(pnetwork->network.ies + _FIXED_IE_LENGTH_, pnetwork->network.ie_length - _FIXED_IE_LENGTH_, NULL, &wpsielen); if (wpsie && wpsielen > 0) - psr = rtw_get_wps_attr_content(wpsie, wpsielen, WPS_ATTR_SELECTED_REGISTRAR, (u8 *)(&sr), NULL); + psr = rtw_get_wps_attr_content(wpsie, wpsielen, WPS_ATTR_SELECTED_REGISTRAR, (u8 *)(&sr), NULL); if (sr != 0) { /* it means under processing WPS */ @@ -266,7 +266,6 @@ struct cfg80211_bss *rtw_cfg80211_inform_bss(struct adapter *padapter, struct wl } /* spin_unlock_bh(&pwdev_priv->scan_req_lock); */ - channel = pnetwork->network.configuration.ds_config; freq = rtw_ieee80211_channel_to_frequency(channel, NL80211_BAND_2GHZ); @@ -276,10 +275,10 @@ struct cfg80211_bss *rtw_cfg80211_inform_bss(struct adapter *padapter, struct wl /* We've set wiphy's signal_type as CFG80211_SIGNAL_TYPE_MBM: signal strength in mBm (100*dBm) */ if (check_fwstate(pmlmepriv, _FW_LINKED) == true && - is_same_network(&pmlmepriv->cur_network.network, &pnetwork->network, 0)) { - notify_signal = 100*translate_percentage_to_dbm(padapter->recvpriv.signal_strength);/* dbm */ + is_same_network(&pmlmepriv->cur_network.network, &pnetwork->network, 0)) { + notify_signal = 100 * translate_percentage_to_dbm(padapter->recvpriv.signal_strength);/* dbm */ } else { - notify_signal = 100*translate_percentage_to_dbm(pnetwork->network.phy_info.signal_strength);/* dbm */ + notify_signal = 100 * translate_percentage_to_dbm(pnetwork->network.phy_info.signal_strength);/* dbm */ } buf = kzalloc(MAX_BSSINFO_LEN, GFP_ATOMIC); @@ -314,7 +313,7 @@ struct cfg80211_bss *rtw_cfg80211_inform_bss(struct adapter *padapter, struct wl *((__le64 *)pbuf) = cpu_to_le64(notify_timestamp); bss = cfg80211_inform_bss_frame(wiphy, notify_channel, (struct ieee80211_mgmt *)buf, - len, notify_signal, GFP_ATOMIC); + len, notify_signal, GFP_ATOMIC); if (unlikely(!bss)) goto exit; @@ -346,9 +345,9 @@ int rtw_cfg80211_check_bss(struct adapter *padapter) notify_channel = ieee80211_get_channel(padapter->rtw_wdev->wiphy, freq); bss = cfg80211_get_bss(padapter->rtw_wdev->wiphy, notify_channel, - pnetwork->mac_address, pnetwork->ssid.ssid, - pnetwork->ssid.ssid_length, - IEEE80211_BSS_TYPE_ANY, IEEE80211_PRIVACY_ANY); + pnetwork->mac_address, pnetwork->ssid.ssid, + pnetwork->ssid.ssid_length, + IEEE80211_BSS_TYPE_ANY, IEEE80211_PRIVACY_ANY); cfg80211_put_bss(padapter->rtw_wdev->wiphy, bss); @@ -449,20 +448,20 @@ check_bss: roam_info.links[0].channel = notify_channel; roam_info.links[0].bssid = cur_network->network.mac_address; roam_info.req_ie = - pmlmepriv->assoc_req+sizeof(struct ieee80211_hdr_3addr)+2; + pmlmepriv->assoc_req + sizeof(struct ieee80211_hdr_3addr) + 2; roam_info.req_ie_len = - pmlmepriv->assoc_req_len-sizeof(struct ieee80211_hdr_3addr)-2; + pmlmepriv->assoc_req_len - sizeof(struct ieee80211_hdr_3addr) - 2; roam_info.resp_ie = - pmlmepriv->assoc_rsp+sizeof(struct ieee80211_hdr_3addr)+6; + pmlmepriv->assoc_rsp + sizeof(struct ieee80211_hdr_3addr) + 6; roam_info.resp_ie_len = - pmlmepriv->assoc_rsp_len-sizeof(struct ieee80211_hdr_3addr)-6; + pmlmepriv->assoc_rsp_len - sizeof(struct ieee80211_hdr_3addr) - 6; cfg80211_roamed(padapter->pnetdev, &roam_info, GFP_ATOMIC); } else { cfg80211_connect_result(padapter->pnetdev, cur_network->network.mac_address - , pmlmepriv->assoc_req+sizeof(struct ieee80211_hdr_3addr)+2 - , pmlmepriv->assoc_req_len-sizeof(struct ieee80211_hdr_3addr)-2 - , pmlmepriv->assoc_rsp+sizeof(struct ieee80211_hdr_3addr)+6 - , pmlmepriv->assoc_rsp_len-sizeof(struct ieee80211_hdr_3addr)-6 + , pmlmepriv->assoc_req + sizeof(struct ieee80211_hdr_3addr) + 2 + , pmlmepriv->assoc_req_len - sizeof(struct ieee80211_hdr_3addr) - 2 + , pmlmepriv->assoc_rsp + sizeof(struct ieee80211_hdr_3addr) + 6 + , pmlmepriv->assoc_rsp_len - sizeof(struct ieee80211_hdr_3addr) - 6 , WLAN_STATUS_SUCCESS, GFP_ATOMIC); } } @@ -487,7 +486,7 @@ void rtw_cfg80211_indicate_disconnect(struct adapter *padapter) NULL, 0, true, GFP_ATOMIC); } else { cfg80211_connect_result(padapter->pnetdev, NULL, NULL, 0, NULL, 0, - WLAN_STATUS_UNSPECIFIED_FAILURE, GFP_ATOMIC/*GFP_KERNEL*/); + WLAN_STATUS_UNSPECIFIED_FAILURE, GFP_ATOMIC/*GFP_KERNEL*/); } } } @@ -708,7 +707,7 @@ static int rtw_cfg80211_set_encryption(struct net_device *dev, struct ieee_param param->u.crypt.err = 0; param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0'; - if (param_len < (u32) ((u8 *) param->u.crypt.key - (u8 *) param) + param->u.crypt.key_len) { + if (param_len < (u32)((u8 *)param->u.crypt.key - (u8 *)param) + param->u.crypt.key_len) { ret = -EINVAL; goto exit; } @@ -778,7 +777,7 @@ static int rtw_cfg80211_set_encryption(struct net_device *dev, struct ieee_param psta->ieee8021x_blocked = false; if ((padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption2Enabled) || - (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption3Enabled)) { + (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption3Enabled)) { psta->dot118021XPrivacy = padapter->securitypriv.dot11PrivacyAlgrthm; } @@ -827,7 +826,7 @@ static int rtw_cfg80211_set_encryption(struct net_device *dev, struct ieee_param pbcmc_sta->ieee8021x_blocked = false; if ((padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption2Enabled) || - (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption3Enabled)) { + (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption3Enabled)) { pbcmc_sta->dot118021XPrivacy = padapter->securitypriv.dot11PrivacyAlgrthm; } } @@ -945,9 +944,9 @@ static int cfg80211_rtw_del_key(struct wiphy *wiphy, struct net_device *ndev, } static int cfg80211_rtw_set_default_key(struct wiphy *wiphy, - struct net_device *ndev, int link_id, u8 key_index - , bool unicast, bool multicast - ) + struct net_device *ndev, int link_id, + u8 key_index, bool unicast, + bool multicast) { struct adapter *padapter = rtw_netdev_priv(ndev); struct security_priv *psecuritypriv = &padapter->securitypriv; @@ -1019,10 +1018,10 @@ static int cfg80211_rtw_get_station(struct wiphy *wiphy, } /* for Ad-Hoc/AP mode */ - if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) - || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) - || check_fwstate(pmlmepriv, WIFI_AP_STATE)) - && check_fwstate(pmlmepriv, _FW_LINKED)) { + if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) || + check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) || + check_fwstate(pmlmepriv, WIFI_AP_STATE)) && + check_fwstate(pmlmepriv, _FW_LINKED)) { /* TODO: should acquire station info... */ } @@ -1122,9 +1121,10 @@ void rtw_cfg80211_unlink_bss(struct adapter *padapter, struct wlan_network *pnet struct wlan_bssid_ex *select_network = &pnetwork->network; bss = cfg80211_get_bss(wiphy, NULL/*notify_channel*/, - select_network->mac_address, select_network->ssid.ssid, - select_network->ssid.ssid_length, IEEE80211_BSS_TYPE_ANY, - IEEE80211_PRIVACY_ANY); + select_network->mac_address, + select_network->ssid.ssid, + select_network->ssid.ssid_length, + IEEE80211_BSS_TYPE_ANY, IEEE80211_PRIVACY_ANY); if (bss) { cfg80211_unlink_bss(wiphy, bss); @@ -1219,7 +1219,7 @@ static int cfg80211_rtw_scan(struct wiphy *wiphy spin_unlock_bh(&pwdev_priv->scan_req_lock); if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == true) { - if (check_fwstate(pmlmepriv, WIFI_UNDER_WPS|_FW_UNDER_SURVEY|_FW_UNDER_LINKING) == true) { + if (check_fwstate(pmlmepriv, WIFI_UNDER_WPS | _FW_UNDER_SURVEY | _FW_UNDER_LINKING) == true) { need_indicate_scan_done = true; goto check_need_indicate_scan_done; } @@ -1273,7 +1273,7 @@ static int cfg80211_rtw_scan(struct wiphy *wiphy } /* parsing channels, n_channels */ - memset(ch, 0, sizeof(struct rtw_ieee80211_channel)*RTW_CHANNEL_SCAN_AMOUNT); + memset(ch, 0, sizeof(struct rtw_ieee80211_channel) * RTW_CHANNEL_SCAN_AMOUNT); for (i = 0; i < request->n_channels && i < RTW_CHANNEL_SCAN_AMOUNT; i++) { ch[i].hw_value = request->channels[i]->hw_value; ch[i].flags = request->channels[i]->flags; @@ -1287,7 +1287,7 @@ static int cfg80211_rtw_scan(struct wiphy *wiphy } else if (request->n_channels <= 4) { for (j = request->n_channels - 1; j >= 0; j--) for (i = 0; i < survey_times; i++) - memcpy(&ch[j*survey_times+i], &ch[j], sizeof(struct rtw_ieee80211_channel)); + memcpy(&ch[j * survey_times + i], &ch[j], sizeof(struct rtw_ieee80211_channel)); _status = rtw_sitesurvey_cmd(padapter, ssid, RTW_SSID_SCAN_AMOUNT, ch, survey_times * request->n_channels); } else { _status = rtw_sitesurvey_cmd(padapter, ssid, RTW_SSID_SCAN_AMOUNT, NULL, 0); @@ -1329,7 +1329,7 @@ static int rtw_cfg80211_set_wpa_version(struct security_priv *psecuritypriv, u32 } static int rtw_cfg80211_set_auth_type(struct security_priv *psecuritypriv, - enum nl80211_auth_type sme_auth_type) + enum nl80211_auth_type sme_auth_type) { switch (sme_auth_type) { case NL80211_AUTHTYPE_AUTOMATIC: @@ -1436,7 +1436,7 @@ static int rtw_cfg80211_set_wpa_ie(struct adapter *padapter, u8 *pie, size_t iel goto exit; } - if (ielen > MAX_WPA_IE_LEN+MAX_WPS_IE_LEN+MAX_P2P_IE_LEN) { + if (ielen > MAX_WPA_IE_LEN + MAX_WPS_IE_LEN + MAX_P2P_IE_LEN) { ret = -EINVAL; goto exit; } @@ -1456,19 +1456,19 @@ static int rtw_cfg80211_set_wpa_ie(struct adapter *padapter, u8 *pie, size_t iel pwpa = rtw_get_wpa_ie(buf, &wpa_ielen, ielen); if (pwpa && wpa_ielen > 0) { - if (rtw_parse_wpa_ie(pwpa, wpa_ielen+2, &group_cipher, &pairwise_cipher, NULL) == _SUCCESS) { + if (rtw_parse_wpa_ie(pwpa, wpa_ielen + 2, &group_cipher, &pairwise_cipher, NULL) == _SUCCESS) { padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeWPAPSK; - memcpy(padapter->securitypriv.supplicant_ie, &pwpa[0], wpa_ielen+2); + memcpy(padapter->securitypriv.supplicant_ie, &pwpa[0], wpa_ielen + 2); } } pwpa2 = rtw_get_wpa2_ie(buf, &wpa2_ielen, ielen); if (pwpa2 && wpa2_ielen > 0) { - if (rtw_parse_wpa2_ie(pwpa2, wpa2_ielen+2, &group_cipher, &pairwise_cipher, NULL) == _SUCCESS) { + if (rtw_parse_wpa2_ie(pwpa2, wpa2_ielen + 2, &group_cipher, &pairwise_cipher, NULL) == _SUCCESS) { padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeWPA2PSK; - memcpy(padapter->securitypriv.supplicant_ie, &pwpa2[0], wpa2_ielen+2); + memcpy(padapter->securitypriv.supplicant_ie, &pwpa2[0], wpa2_ielen + 2); } } @@ -1634,7 +1634,7 @@ leave_ibss: } static int cfg80211_rtw_connect(struct wiphy *wiphy, struct net_device *ndev, - struct cfg80211_connect_params *sme) + struct cfg80211_connect_params *sme) { int ret = 0; enum ndis_802_11_authentication_mode authmode; @@ -1709,7 +1709,7 @@ static int cfg80211_rtw_connect(struct wiphy *wiphy, struct net_device *ndev, /* For WEP Shared auth */ if ((psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_Shared || - psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_Auto) && sme->key) { + psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_Auto) && sme->key) { u32 wep_key_idx, wep_key_len, wep_total_len; struct ndis_802_11_wep *pwep = NULL; @@ -1807,15 +1807,14 @@ static int cfg80211_rtw_disconnect(struct wiphy *wiphy, struct net_device *ndev, } static int cfg80211_rtw_set_txpower(struct wiphy *wiphy, - struct wireless_dev *wdev, - enum nl80211_tx_power_setting type, int mbm) + struct wireless_dev *wdev, + enum nl80211_tx_power_setting type, int mbm) { return 0; } static int cfg80211_rtw_get_txpower(struct wiphy *wiphy, - struct wireless_dev *wdev, - int *dbm) + struct wireless_dev *wdev, int *dbm) { *dbm = (12); @@ -1851,9 +1850,8 @@ static int cfg80211_rtw_set_pmksa(struct wiphy *wiphy, u8 index, blInserted = false; struct adapter *padapter = rtw_netdev_priv(ndev); struct security_priv *psecuritypriv = &padapter->securitypriv; - u8 strZeroMacAddress[ETH_ALEN] = { 0x00 }; - if (!memcmp((u8 *)pmksa->bssid, strZeroMacAddress, ETH_ALEN)) + if (is_zero_ether_addr((u8 *)pmksa->bssid)) return -EINVAL; blInserted = false; @@ -1863,7 +1861,7 @@ static int cfg80211_rtw_set_pmksa(struct wiphy *wiphy, if (!memcmp(psecuritypriv->PMKIDList[index].Bssid, (u8 *)pmksa->bssid, ETH_ALEN)) { memcpy(psecuritypriv->PMKIDList[index].PMKID, (u8 *)pmksa->pmkid, WLAN_PMKID_LEN); psecuritypriv->PMKIDList[index].bUsed = true; - psecuritypriv->PMKIDIndex = index+1; + psecuritypriv->PMKIDIndex = index + 1; blInserted = true; break; } @@ -2064,8 +2062,8 @@ static netdev_tx_t rtw_cfg80211_monitor_if_xmit_entry(struct sk_buff *skb, struc _rtw_xmit_entry(skb, padapter->pnetdev); return NETDEV_TX_OK; - } else if ((frame_control & (IEEE80211_FCTL_FTYPE|IEEE80211_FCTL_STYPE)) == - (IEEE80211_FTYPE_MGMT|IEEE80211_STYPE_ACTION)) { + } else if ((frame_control & (IEEE80211_FCTL_FTYPE | IEEE80211_FCTL_STYPE)) == + (IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_ACTION)) { /* only for action frames */ struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; @@ -2174,7 +2172,7 @@ static int rtw_cfg80211_add_monitor_if(struct adapter *padapter, char *name, str goto out; *ndev = pwdev_priv->pmon_ndev = mon_ndev; - memcpy(pwdev_priv->ifname_mon, name, IFNAMSIZ+1); + memcpy(pwdev_priv->ifname_mon, name, IFNAMSIZ + 1); out: if (ret && mon_wdev) { @@ -2228,7 +2226,7 @@ static struct wireless_dev * } static int cfg80211_rtw_del_virtual_intf(struct wiphy *wiphy, - struct wireless_dev *wdev + struct wireless_dev *wdev ) { struct net_device *ndev = wdev_to_ndev(wdev); @@ -2268,14 +2266,14 @@ static int rtw_add_beacon(struct adapter *adapter, const u8 *head, size_t head_l if (head_len < 24) return -EINVAL; - pbuf = rtw_zmalloc(head_len+tail_len); + pbuf = rtw_zmalloc(head_len + tail_len); if (!pbuf) return -ENOMEM; - memcpy(pbuf, (void *)head+24, head_len-24);/* 24 =beacon header len. */ - memcpy(pbuf+head_len-24, (void *)tail, tail_len); + memcpy(pbuf, (void *)head + 24, head_len - 24);/* 24 =beacon header len. */ + memcpy(pbuf + head_len - 24, (void *)tail, tail_len); - len = head_len+tail_len-24; + len = head_len + tail_len - 24; /* check wps ie if inclued */ rtw_get_wps_ie(pbuf + _FIXED_IE_LENGTH_, len - _FIXED_IE_LENGTH_, NULL, &wps_ielen); @@ -2295,13 +2293,14 @@ static int rtw_add_beacon(struct adapter *adapter, const u8 *head, size_t head_l } static int cfg80211_rtw_start_ap(struct wiphy *wiphy, struct net_device *ndev, - struct cfg80211_ap_settings *settings) + struct cfg80211_ap_settings *settings) { int ret = 0; struct adapter *adapter = rtw_netdev_priv(ndev); - ret = rtw_add_beacon(adapter, settings->beacon.head, settings->beacon.head_len, - settings->beacon.tail, settings->beacon.tail_len); + ret = rtw_add_beacon(adapter, settings->beacon.head, + settings->beacon.head_len, settings->beacon.tail, + settings->beacon.tail_len); adapter->mlmeextpriv.mlmext_info.hidden_ssid_mode = settings->hidden_ssid; @@ -2318,8 +2317,9 @@ static int cfg80211_rtw_start_ap(struct wiphy *wiphy, struct net_device *ndev, return ret; } -static int cfg80211_rtw_change_beacon(struct wiphy *wiphy, struct net_device *ndev, - struct cfg80211_beacon_data *info) +static int cfg80211_rtw_change_beacon(struct wiphy *wiphy, + struct net_device *ndev, + struct cfg80211_beacon_data *info) { struct adapter *adapter = rtw_netdev_priv(ndev); @@ -2332,9 +2332,10 @@ static int cfg80211_rtw_stop_ap(struct wiphy *wiphy, struct net_device *ndev, return 0; } -static int cfg80211_rtw_add_station(struct wiphy *wiphy, struct net_device *ndev, - const u8 *mac, - struct station_parameters *params) +static int cfg80211_rtw_add_station(struct wiphy *wiphy, + struct net_device *ndev, + const u8 *mac, + struct station_parameters *params) { return 0; } @@ -2396,8 +2397,10 @@ static int cfg80211_rtw_del_station(struct wiphy *wiphy, struct net_device *ndev return ret; } -static int cfg80211_rtw_change_station(struct wiphy *wiphy, struct net_device *ndev, - const u8 *mac, struct station_parameters *params) +static int cfg80211_rtw_change_station(struct wiphy *wiphy, + struct net_device *ndev, + const u8 *mac, + struct station_parameters *params) { return 0; } @@ -2422,8 +2425,10 @@ static struct sta_info *rtw_sta_info_get_by_idx(const int idx, struct sta_priv * return psta; } -static int cfg80211_rtw_dump_station(struct wiphy *wiphy, struct net_device *ndev, - int idx, u8 *mac, struct station_info *sinfo) +static int cfg80211_rtw_dump_station(struct wiphy *wiphy, + struct net_device *ndev, + int idx, u8 *mac, + struct station_info *sinfo) { int ret = 0; struct adapter *padapter = rtw_netdev_priv(ndev); @@ -2445,8 +2450,9 @@ exit: return ret; } -static int cfg80211_rtw_change_bss(struct wiphy *wiphy, struct net_device *ndev, - struct bss_parameters *params) +static int cfg80211_rtw_change_bss(struct wiphy *wiphy, + struct net_device *ndev, + struct bss_parameters *params) { return 0; } @@ -2529,10 +2535,9 @@ exit: return ret; } -static int cfg80211_rtw_mgmt_tx(struct wiphy *wiphy, - struct wireless_dev *wdev, - struct cfg80211_mgmt_tx_params *params, - u64 *cookie) +static int cfg80211_rtw_mgmt_tx(struct wiphy *wiphy, struct wireless_dev *wdev, + struct cfg80211_mgmt_tx_params *params, + u64 *cookie) { struct net_device *ndev = wdev_to_ndev(wdev); struct ieee80211_channel *chan = params->chan; @@ -2558,7 +2563,7 @@ static int cfg80211_rtw_mgmt_tx(struct wiphy *wiphy, pwdev_priv = adapter_wdev_data(padapter); /* cookie generation */ - *cookie = (unsigned long) buf; + *cookie = (unsigned long)buf; /* indicate ack before issue frame to avoid racing with rsp frame */ rtw_cfg80211_mgmt_tx_status(padapter, *cookie, buf, len, ack, GFP_KERNEL); diff --git a/drivers/staging/rtl8723bs/os_dep/ioctl_linux.c b/drivers/staging/rtl8723bs/os_dep/ioctl_linux.c index 40a3157fb735..c81b30f1f1b0 100644 --- a/drivers/staging/rtl8723bs/os_dep/ioctl_linux.c +++ b/drivers/staging/rtl8723bs/os_dep/ioctl_linux.c @@ -13,7 +13,7 @@ #include #include -#define RTL_IOCTL_WPA_SUPPLICANT (SIOCIWFIRSTPRIV+30) +#define RTL_IOCTL_WPA_SUPPLICANT (SIOCIWFIRSTPRIV + 30) static int wpa_set_auth_algs(struct net_device *dev, u32 value) { @@ -40,7 +40,6 @@ static int wpa_set_auth_algs(struct net_device *dev, u32 value) } return ret; - } static int wpa_set_encryption(struct net_device *dev, struct ieee_param *param, u32 param_len) @@ -80,7 +79,6 @@ static int wpa_set_encryption(struct net_device *dev, struct ieee_param *param, } if (strcmp(param->u.crypt.alg, "WEP") == 0) { - padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; padapter->securitypriv.dot11PrivacyAlgrthm = _WEP40_; padapter->securitypriv.dot118021XGrpPrivacy = _WEP40_; @@ -127,7 +125,7 @@ static int wpa_set_encryption(struct net_device *dev, struct ieee_param *param, goto exit; } - memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), pwep->key_material, pwep->key_length); + memcpy(&psecuritypriv->dot11DefKey[wep_key_idx].skey[0], pwep->key_material, pwep->key_length); psecuritypriv->dot11DefKeylen[wep_key_idx] = pwep->key_length; rtw_set_key(padapter, psecuritypriv, wep_key_idx, 0, true); } @@ -149,7 +147,7 @@ static int wpa_set_encryption(struct net_device *dev, struct ieee_param *param, psta->ieee8021x_blocked = false; if ((padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption2Enabled) || - (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption3Enabled)) { + (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption3Enabled)) { psta->dot118021XPrivacy = padapter->securitypriv.dot11PrivacyAlgrthm; } @@ -158,8 +156,8 @@ static int wpa_set_encryption(struct net_device *dev, struct ieee_param *param, if (strcmp(param->u.crypt.alg, "TKIP") == 0) { /* set mic key */ /* DEBUG_ERR(("\nset key length :param->u.crypt.key_len =%d\n", param->u.crypt.key_len)); */ - memcpy(psta->dot11tkiptxmickey.skey, &(param->u.crypt.key[16]), 8); - memcpy(psta->dot11tkiprxmickey.skey, &(param->u.crypt.key[24]), 8); + memcpy(psta->dot11tkiptxmickey.skey, ¶m->u.crypt.key[16], 8); + memcpy(psta->dot11tkiprxmickey.skey, ¶m->u.crypt.key[24], 8); padapter->securitypriv.busetkipkey = false; /* _set_timer(&padapter->securitypriv.tkip_timer, 50); */ @@ -171,8 +169,8 @@ static int wpa_set_encryption(struct net_device *dev, struct ieee_param *param, memcpy(padapter->securitypriv.dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len)); /* only TKIP group key need to install this */ if (param->u.crypt.key_len > 16) { - memcpy(padapter->securitypriv.dot118021XGrptxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[16]), 8); - memcpy(padapter->securitypriv.dot118021XGrprxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[24]), 8); + memcpy(padapter->securitypriv.dot118021XGrptxmickey[param->u.crypt.idx].skey, ¶m->u.crypt.key[16], 8); + memcpy(padapter->securitypriv.dot118021XGrprxmickey[param->u.crypt.idx].skey, ¶m->u.crypt.key[24], 8); } padapter->securitypriv.binstallGrpkey = true; @@ -202,7 +200,7 @@ static int wpa_set_encryption(struct net_device *dev, struct ieee_param *param, pbcmc_sta->ieee8021x_blocked = false; if ((padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption2Enabled) || - (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption3Enabled)) { + (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption3Enabled)) { pbcmc_sta->dot118021XPrivacy = padapter->securitypriv.dot11PrivacyAlgrthm; } } @@ -317,18 +315,18 @@ static int rtw_set_wpa_ie(struct adapter *padapter, char *pie, unsigned short ie while (cnt < ielen) { eid = buf[cnt]; - if ((eid == WLAN_EID_VENDOR_SPECIFIC) && (!memcmp(&buf[cnt+2], wps_oui, 4))) { - padapter->securitypriv.wps_ie_len = ((buf[cnt+1]+2) < MAX_WPS_IE_LEN) ? (buf[cnt+1]+2):MAX_WPS_IE_LEN; + if ((eid == WLAN_EID_VENDOR_SPECIFIC) && (!memcmp(&buf[cnt + 2], wps_oui, 4))) { + padapter->securitypriv.wps_ie_len = ((buf[cnt + 1] + 2) < MAX_WPS_IE_LEN) ? (buf[cnt + 1] + 2) : MAX_WPS_IE_LEN; memcpy(padapter->securitypriv.wps_ie, &buf[cnt], padapter->securitypriv.wps_ie_len); set_fwstate(&padapter->mlmepriv, WIFI_UNDER_WPS); - cnt += buf[cnt+1]+2; + cnt += buf[cnt + 1] + 2; break; } else { - cnt += buf[cnt+1]+2; /* goto next */ + cnt += buf[cnt + 1] + 2; /* goto next */ } } } @@ -336,8 +334,8 @@ static int rtw_set_wpa_ie(struct adapter *padapter, char *pie, unsigned short ie /* TKIP and AES disallow multicast packets until installing group key */ if (padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_ || - padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_WTMIC_ || - padapter->securitypriv.dot11PrivacyAlgrthm == _AES_) + padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_WTMIC_ || + padapter->securitypriv.dot11PrivacyAlgrthm == _AES_) /* WPS open need to enable multicast */ /* check_fwstate(&padapter->mlmepriv, WIFI_UNDER_WPS) == true) */ rtw_hal_set_hwreg(padapter, HW_VAR_OFF_RCR_AM, null_addr); @@ -361,7 +359,7 @@ static int wpa_set_param(struct net_device *dev, u8 name, u32 value) /* ret = ieee80211_wpa_enable(ieee, value); */ - switch ((value)&0xff) { + switch ((value) & 0xff) { case 1: /* WPA */ padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeWPAPSK; /* WPA_PSK */ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption2Enabled; @@ -392,7 +390,6 @@ static int wpa_set_param(struct net_device *dev, u8 name, u32 value) * be set. */ break; - } case IEEE_PARAM_PRIVACY_INVOKED: @@ -426,17 +423,12 @@ static int wpa_set_param(struct net_device *dev, u8 name, u32 value) default: - - ret = -EOPNOTSUPP; - break; - } return ret; - } static int wpa_mlme(struct net_device *dev, u32 command, u32 reason) @@ -465,7 +457,6 @@ static int wpa_mlme(struct net_device *dev, u32 command, u32 reason) } return ret; - } static int wpa_supplicant_ioctl(struct net_device *dev, struct iw_point *p) @@ -488,7 +479,6 @@ static int wpa_supplicant_ioctl(struct net_device *dev, struct iw_point *p) } switch (param->cmd) { - case IEEE_CMD_SET_WPA_PARAM: ret = wpa_set_param(dev, param->u.wpa_param.name, param->u.wpa_param.value); break; @@ -509,7 +499,6 @@ static int wpa_supplicant_ioctl(struct net_device *dev, struct iw_point *p) default: ret = -EOPNOTSUPP; break; - } if (ret == 0 && copy_to_user(p->pointer, param, p->length)) @@ -529,7 +518,7 @@ static int rtw_set_encryption(struct net_device *dev, struct ieee_param *param, struct sta_info *psta = NULL, *pbcmc_sta = NULL; struct adapter *padapter = rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct security_priv *psecuritypriv = &(padapter->securitypriv); + struct security_priv *psecuritypriv = &padapter->securitypriv; struct sta_priv *pstapriv = &padapter->stapriv; char *txkey = padapter->securitypriv.dot118021XGrptxmickey[param->u.crypt.idx].skey; char *rxkey = padapter->securitypriv.dot118021XGrprxmickey[param->u.crypt.idx].skey; @@ -570,7 +559,6 @@ static int rtw_set_encryption(struct net_device *dev, struct ieee_param *param, goto exit; } - if (strcmp(param->u.crypt.alg, "WEP") == 0 && !psta) { wep_key_idx = param->u.crypt.idx; wep_key_len = param->u.crypt.key_len; @@ -580,7 +568,6 @@ static int rtw_set_encryption(struct net_device *dev, struct ieee_param *param, goto exit; } - if (wep_key_len > 0) { wep_key_len = wep_key_len <= 5 ? 5 : 13; wep_total_len = wep_key_len + FIELD_OFFSET(struct ndis_802_11_wep, key_material); @@ -591,7 +578,6 @@ static int rtw_set_encryption(struct net_device *dev, struct ieee_param *param, pwep->key_length = wep_key_len; pwep->length = wep_total_len; - } pwep->key_index = wep_key_idx; @@ -609,10 +595,9 @@ static int rtw_set_encryption(struct net_device *dev, struct ieee_param *param, psecuritypriv->dot118021XGrpPrivacy = _WEP104_; } - psecuritypriv->dot11PrivacyKeyIndex = wep_key_idx; - memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), pwep->key_material, pwep->key_length); + memcpy(&psecuritypriv->dot11DefKey[wep_key_idx].skey[0], pwep->key_material, pwep->key_length); psecuritypriv->dot11DefKeylen[wep_key_idx] = pwep->key_length; @@ -621,7 +606,7 @@ static int rtw_set_encryption(struct net_device *dev, struct ieee_param *param, /* don't update "psecuritypriv->dot11PrivacyAlgrthm" and */ /* psecuritypriv->dot11PrivacyKeyIndex =keyid", but can rtw_set_key to cam */ - memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), pwep->key_material, pwep->key_length); + memcpy(&psecuritypriv->dot11DefKey[wep_key_idx].skey[0], pwep->key_material, pwep->key_length); psecuritypriv->dot11DefKeylen[wep_key_idx] = pwep->key_length; @@ -629,10 +614,8 @@ static int rtw_set_encryption(struct net_device *dev, struct ieee_param *param, } goto exit; - } - if (!psta && check_fwstate(pmlmepriv, WIFI_AP_STATE)) { /* group key */ if (param->u.crypt.set_tx == 1) { if (strcmp(param->u.crypt.alg, "WEP") == 0) { @@ -640,7 +623,7 @@ static int rtw_set_encryption(struct net_device *dev, struct ieee_param *param, psecuritypriv->dot118021XGrpPrivacy = _WEP40_; if (param->u.crypt.key_len == 13) - psecuritypriv->dot118021XGrpPrivacy = _WEP104_; + psecuritypriv->dot118021XGrpPrivacy = _WEP104_; } else if (strcmp(param->u.crypt.alg, "TKIP") == 0) { psecuritypriv->dot118021XGrpPrivacy = _TKIP_; @@ -649,13 +632,12 @@ static int rtw_set_encryption(struct net_device *dev, struct ieee_param *param, /* DEBUG_ERR("set key length :param->u.crypt.key_len =%d\n", param->u.crypt.key_len); */ /* set mic key */ - memcpy(txkey, &(param->u.crypt.key[16]), 8); - memcpy(psecuritypriv->dot118021XGrprxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[24]), 8); + memcpy(txkey, ¶m->u.crypt.key[16], 8); + memcpy(psecuritypriv->dot118021XGrprxmickey[param->u.crypt.idx].skey, ¶m->u.crypt.key[24], 8); psecuritypriv->busetkipkey = true; - } - else if (strcmp(param->u.crypt.alg, "CCMP") == 0) { + } else if (strcmp(param->u.crypt.alg, "CCMP") == 0) { psecuritypriv->dot118021XGrpPrivacy = _AES_; memcpy(grpkey, param->u.crypt.key, (param->u.crypt.key_len > 16 ? 16 : param->u.crypt.key_len)); @@ -679,7 +661,6 @@ static int rtw_set_encryption(struct net_device *dev, struct ieee_param *param, } goto exit; - } if (psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X && psta) { /* psk/802_1x */ @@ -696,13 +677,12 @@ static int rtw_set_encryption(struct net_device *dev, struct ieee_param *param, /* DEBUG_ERR("set key length :param->u.crypt.key_len =%d\n", param->u.crypt.key_len); */ /* set mic key */ - memcpy(psta->dot11tkiptxmickey.skey, &(param->u.crypt.key[16]), 8); - memcpy(psta->dot11tkiprxmickey.skey, &(param->u.crypt.key[24]), 8); + memcpy(psta->dot11tkiptxmickey.skey, ¶m->u.crypt.key[16], 8); + memcpy(psta->dot11tkiprxmickey.skey, ¶m->u.crypt.key[24], 8); psecuritypriv->busetkipkey = true; } else if (strcmp(param->u.crypt.alg, "CCMP") == 0) { - psta->dot118021XPrivacy = _AES_; } else { psta->dot118021XPrivacy = _NO_PRIVACY_; @@ -726,8 +706,8 @@ static int rtw_set_encryption(struct net_device *dev, struct ieee_param *param, /* DEBUG_ERR("set key length :param->u.crypt.key_len =%d\n", param->u.crypt.key_len); */ /* set mic key */ - memcpy(txkey, &(param->u.crypt.key[16]), 8); - memcpy(rxkey, &(param->u.crypt.key[24]), 8); + memcpy(txkey, ¶m->u.crypt.key[16], 8); + memcpy(rxkey, ¶m->u.crypt.key[24], 8); psecuritypriv->busetkipkey = true; @@ -760,14 +740,13 @@ exit: kfree(pwep); return ret; - } static int rtw_set_beacon(struct net_device *dev, struct ieee_param *param, int len) { int ret = 0; struct adapter *padapter = rtw_netdev_priv(dev); - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct sta_priv *pstapriv = &padapter->stapriv; unsigned char *pbuf = param->u.bcn_ie.buf; @@ -779,15 +758,12 @@ static int rtw_set_beacon(struct net_device *dev, struct ieee_param *param, int if ((pstapriv->max_num_sta > NUM_STA) || (pstapriv->max_num_sta <= 0)) pstapriv->max_num_sta = NUM_STA; - - if (rtw_check_beacon_data(padapter, pbuf, (len-12-2)) == _SUCCESS)/* 12 = param header, 2:no packed */ + if (rtw_check_beacon_data(padapter, pbuf, (len - 12 - 2)) == _SUCCESS)/* 12 = param header, 2:no packed */ ret = 0; else ret = -EINVAL; - return ret; - } static void rtw_hostapd_sta_flush(struct net_device *dev) @@ -808,10 +784,10 @@ static int rtw_add_sta(struct net_device *dev, struct ieee_param *param) int ret = 0; struct sta_info *psta = NULL; struct adapter *padapter = rtw_netdev_priv(dev); - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct sta_priv *pstapriv = &padapter->stapriv; - if (check_fwstate(pmlmepriv, (_FW_LINKED|WIFI_AP_STATE)) != true) + if (check_fwstate(pmlmepriv, (_FW_LINKED | WIFI_AP_STATE)) != true) return -EINVAL; if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && @@ -838,9 +814,8 @@ static int rtw_add_sta(struct net_device *dev, struct ieee_param *param) memcpy(psta->bssrateset, param->u.add_sta.tx_supp_rates, 16); - /* check wmm cap. */ - if (WLAN_STA_WME&flags) + if (WLAN_STA_WME & flags) psta->qos_option = 1; else psta->qos_option = 0; @@ -849,7 +824,7 @@ static int rtw_add_sta(struct net_device *dev, struct ieee_param *param) psta->qos_option = 0; /* chec 802.11n ht cap. */ - if (WLAN_STA_HT&flags) { + if (WLAN_STA_HT & flags) { psta->htpriv.ht_option = true; psta->qos_option = 1; memcpy((void *)&psta->htpriv.ht_cap, (void *)¶m->u.add_sta.ht_cap, sizeof(struct ieee80211_ht_cap)); @@ -857,18 +832,16 @@ static int rtw_add_sta(struct net_device *dev, struct ieee_param *param) psta->htpriv.ht_option = false; } - if (pmlmepriv->htpriv.ht_option == false) + if (!pmlmepriv->htpriv.ht_option) psta->htpriv.ht_option = false; update_sta_info_apmode(padapter, psta); - } else { ret = -ENOMEM; } return ret; - } static int rtw_del_sta(struct net_device *dev, struct ieee_param *param) @@ -876,10 +849,10 @@ static int rtw_del_sta(struct net_device *dev, struct ieee_param *param) int ret = 0; struct sta_info *psta = NULL; struct adapter *padapter = rtw_netdev_priv(dev); - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct sta_priv *pstapriv = &padapter->stapriv; - if (check_fwstate(pmlmepriv, (_FW_LINKED|WIFI_AP_STATE)) != true) + if (check_fwstate(pmlmepriv, (_FW_LINKED | WIFI_AP_STATE)) != true) return -EINVAL; if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && @@ -897,18 +870,15 @@ static int rtw_del_sta(struct net_device *dev, struct ieee_param *param) list_del_init(&psta->asoc_list); pstapriv->asoc_list_cnt--; updated = ap_free_sta(padapter, psta, true, WLAN_REASON_DEAUTH_LEAVING); - } spin_unlock_bh(&pstapriv->asoc_list_lock); associated_clients_update(padapter, updated); psta = NULL; - } return ret; - } static int rtw_ioctl_get_sta_data(struct net_device *dev, struct ieee_param *param, int len) @@ -916,12 +886,12 @@ static int rtw_ioctl_get_sta_data(struct net_device *dev, struct ieee_param *par int ret = 0; struct sta_info *psta = NULL; struct adapter *padapter = rtw_netdev_priv(dev); - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct sta_priv *pstapriv = &padapter->stapriv; struct ieee_param_ex *param_ex = (struct ieee_param_ex *)param; struct sta_data *psta_data = (struct sta_data *)param_ex->data; - if (check_fwstate(pmlmepriv, (_FW_LINKED|WIFI_AP_STATE)) != true) + if (check_fwstate(pmlmepriv, (_FW_LINKED | WIFI_AP_STATE)) != true) return -EINVAL; if (param_ex->sta_addr[0] == 0xff && param_ex->sta_addr[1] == 0xff && @@ -963,13 +933,11 @@ static int rtw_ioctl_get_sta_data(struct net_device *dev, struct ieee_param *par psta_data->tx_bytes = psta->sta_stats.tx_bytes; psta_data->tx_drops = psta->sta_stats.tx_drops; - } else { ret = -1; } return ret; - } static int rtw_get_sta_wpaie(struct net_device *dev, struct ieee_param *param) @@ -977,10 +945,10 @@ static int rtw_get_sta_wpaie(struct net_device *dev, struct ieee_param *param) int ret = 0; struct sta_info *psta = NULL; struct adapter *padapter = rtw_netdev_priv(dev); - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct sta_priv *pstapriv = &padapter->stapriv; - if (check_fwstate(pmlmepriv, (_FW_LINKED|WIFI_AP_STATE)) != true) + if (check_fwstate(pmlmepriv, (_FW_LINKED | WIFI_AP_STATE)) != true) return -EINVAL; if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && @@ -997,7 +965,7 @@ static int rtw_get_sta_wpaie(struct net_device *dev, struct ieee_param *param) wpa_ie_len = psta->wpa_ie[1]; - copy_len = ((wpa_ie_len+2) > sizeof(psta->wpa_ie)) ? (sizeof(psta->wpa_ie)):(wpa_ie_len+2); + copy_len = ((wpa_ie_len + 2) > sizeof(psta->wpa_ie)) ? (sizeof(psta->wpa_ie)) : (wpa_ie_len + 2); param->u.wpa_ie.len = copy_len; @@ -1008,7 +976,6 @@ static int rtw_get_sta_wpaie(struct net_device *dev, struct ieee_param *param) } return ret; - } static int rtw_set_wps_beacon(struct net_device *dev, struct ieee_param *param, int len) @@ -1016,15 +983,14 @@ static int rtw_set_wps_beacon(struct net_device *dev, struct ieee_param *param, int ret = 0; unsigned char wps_oui[4] = {0x0, 0x50, 0xf2, 0x04}; struct adapter *padapter = rtw_netdev_priv(dev); - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; int ie_len; if (check_fwstate(pmlmepriv, WIFI_AP_STATE) != true) return -EINVAL; - ie_len = len-12-2;/* 12 = param header, 2:no packed */ - + ie_len = len - 12 - 2;/* 12 = param header, 2:no packed */ kfree(pmlmepriv->wps_beacon_ie); pmlmepriv->wps_beacon_ie = NULL; @@ -1042,23 +1008,20 @@ static int rtw_set_wps_beacon(struct net_device *dev, struct ieee_param *param, pmlmeext->bstart_bss = true; } - return ret; - } static int rtw_set_wps_probe_resp(struct net_device *dev, struct ieee_param *param, int len) { int ret = 0; struct adapter *padapter = rtw_netdev_priv(dev); - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; int ie_len; if (check_fwstate(pmlmepriv, WIFI_AP_STATE) != true) return -EINVAL; - ie_len = len-12-2;/* 12 = param header, 2:no packed */ - + ie_len = len - 12 - 2;/* 12 = param header, 2:no packed */ kfree(pmlmepriv->wps_probe_resp_ie); pmlmepriv->wps_probe_resp_ie = NULL; @@ -1072,23 +1035,20 @@ static int rtw_set_wps_probe_resp(struct net_device *dev, struct ieee_param *par memcpy(pmlmepriv->wps_probe_resp_ie, param->u.bcn_ie.buf, ie_len); } - return ret; - } static int rtw_set_wps_assoc_resp(struct net_device *dev, struct ieee_param *param, int len) { int ret = 0; struct adapter *padapter = rtw_netdev_priv(dev); - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; int ie_len; if (check_fwstate(pmlmepriv, WIFI_AP_STATE) != true) return -EINVAL; - ie_len = len-12-2;/* 12 = param header, 2:no packed */ - + ie_len = len - 12 - 2;/* 12 = param header, 2:no packed */ kfree(pmlmepriv->wps_assoc_resp_ie); pmlmepriv->wps_assoc_resp_ie = NULL; @@ -1102,18 +1062,16 @@ static int rtw_set_wps_assoc_resp(struct net_device *dev, struct ieee_param *par memcpy(pmlmepriv->wps_assoc_resp_ie, param->u.bcn_ie.buf, ie_len); } - return ret; - } static int rtw_set_hidden_ssid(struct net_device *dev, struct ieee_param *param, int len) { int ret = 0; struct adapter *adapter = rtw_netdev_priv(dev); - struct mlme_priv *mlmepriv = &(adapter->mlmepriv); - struct mlme_ext_priv *mlmeext = &(adapter->mlmeextpriv); - struct mlme_ext_info *mlmeinfo = &(mlmeext->mlmext_info); + struct mlme_priv *mlmepriv = &adapter->mlmepriv; + struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv; + struct mlme_ext_info *mlmeinfo = &mlmeext->mlmext_info; int ie_len; u8 *ssid_ie; char ssid[NDIS_802_11_LENGTH_SSID + 1]; @@ -1128,14 +1086,14 @@ static int rtw_set_hidden_ssid(struct net_device *dev, struct ieee_param *param, mlmeinfo->hidden_ssid_mode = ignore_broadcast_ssid = param->u.bcn_ie.reserved[1]; - ie_len = len-12-2;/* 12 = param header, 2:no packed */ + ie_len = len - 12 - 2;/* 12 = param header, 2:no packed */ ssid_ie = rtw_get_ie(param->u.bcn_ie.buf, WLAN_EID_SSID, &ssid_len, ie_len); if (ssid_ie && ssid_len > 0 && ssid_len <= NDIS_802_11_LENGTH_SSID) { struct wlan_bssid_ex *pbss_network = &mlmepriv->cur_network.network; struct wlan_bssid_ex *pbss_network_ext = &mlmeinfo->network; - memcpy(ssid, ssid_ie+2, ssid_len); + memcpy(ssid, ssid_ie + 2, ssid_len); ssid[ssid_len] = 0x0; memcpy(pbss_network->ssid.ssid, (void *)ssid, ssid_len); @@ -1150,7 +1108,7 @@ static int rtw_set_hidden_ssid(struct net_device *dev, struct ieee_param *param, static int rtw_ioctl_acl_remove_sta(struct net_device *dev, struct ieee_param *param, int len) { struct adapter *padapter = rtw_netdev_priv(dev); - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; if (check_fwstate(pmlmepriv, WIFI_AP_STATE) != true) return -EINVAL; @@ -1163,13 +1121,12 @@ static int rtw_ioctl_acl_remove_sta(struct net_device *dev, struct ieee_param *p rtw_acl_remove_sta(padapter, param->sta_addr); return 0; - } static int rtw_ioctl_acl_add_sta(struct net_device *dev, struct ieee_param *param, int len) { struct adapter *padapter = rtw_netdev_priv(dev); - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; if (check_fwstate(pmlmepriv, WIFI_AP_STATE) != true) return -EINVAL; @@ -1181,14 +1138,13 @@ static int rtw_ioctl_acl_add_sta(struct net_device *dev, struct ieee_param *para } return rtw_acl_add_sta(padapter, param->sta_addr); - } static int rtw_ioctl_set_macaddr_acl(struct net_device *dev, struct ieee_param *param, int len) { int ret = 0; struct adapter *padapter = rtw_netdev_priv(dev); - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; if (check_fwstate(pmlmepriv, WIFI_AP_STATE) != true) return -EINVAL; @@ -1205,9 +1161,9 @@ static int rtw_hostapd_ioctl(struct net_device *dev, struct iw_point *p) struct adapter *padapter = rtw_netdev_priv(dev); /* - * this function is expect to call in master mode, which allows no power saving - * so, we just check hw_init_completed - */ + * this function is expect to call in master mode, which allows no power saving + * so, we just check hw_init_completed + */ if (!padapter->hw_init_completed) return -EPERM; @@ -1312,7 +1268,6 @@ static int rtw_hostapd_ioctl(struct net_device *dev, struct iw_point *p) default: ret = -EOPNOTSUPP; break; - } if (ret == 0 && copy_to_user(p->pointer, param, p->length)) diff --git a/drivers/staging/rtl8723bs/os_dep/recv_linux.c b/drivers/staging/rtl8723bs/os_dep/recv_linux.c index 88a69c7ca8f2..4d28b300b235 100644 --- a/drivers/staging/rtl8723bs/os_dep/recv_linux.c +++ b/drivers/staging/rtl8723bs/os_dep/recv_linux.c @@ -101,7 +101,7 @@ void rtw_os_recv_indicate_pkt(struct adapter *padapter, struct sk_buff *pkt, str struct sk_buff *pskb2 = NULL; struct sta_info *psta = NULL; struct sta_priv *pstapriv = &padapter->stapriv; - int bmcast = IS_MCAST(pattrib->dst); + int bmcast = is_multicast_ether_addr(pattrib->dst); if (memcmp(pattrib->dst, myid(&padapter->eeprompriv), ETH_ALEN)) { if (bmcast) { diff --git a/drivers/staging/rts5208/sd.c b/drivers/staging/rts5208/sd.c index 4b7122add51a..74c4f476b3a4 100644 --- a/drivers/staging/rts5208/sd.c +++ b/drivers/staging/rts5208/sd.c @@ -4501,8 +4501,7 @@ int sd_execute_write_data(struct scsi_cmnd *srb, struct rtsx_chip *chip) sd_card->sd_lock_notify = 1; if (sd_lock_state && (sd_card->sd_lock_status & SD_LOCK_1BIT_MODE)) { - sd_card->sd_lock_status |= ( - SD_UNLOCK_POW_ON | SD_SDR_RST); + sd_card->sd_lock_status |= (SD_UNLOCK_POW_ON | SD_SDR_RST); if (CHK_SD(sd_card)) { retval = reset_sd(chip); if (retval != STATUS_SUCCESS) { diff --git a/drivers/staging/sm750fb/ddk750_dvi.c b/drivers/staging/sm750fb/ddk750_dvi.c index e0c7ff3352bf..8b81e8642f9e 100644 --- a/drivers/staging/sm750fb/ddk750_dvi.c +++ b/drivers/staging/sm750fb/ddk750_dvi.c @@ -14,7 +14,7 @@ static struct dvi_ctrl_device dcft_supported_dvi_controller[] = { #ifdef DVI_CTRL_SII164 { - .init = sii164InitChip, + .init = sii164_init_chip, .get_vendor_id = sii164_get_vendor_id, .get_device_id = sii164GetDeviceID, #ifdef SII164_FULL_FUNCTIONS diff --git a/drivers/staging/sm750fb/ddk750_sii164.c b/drivers/staging/sm750fb/ddk750_sii164.c index 3da1796cd7aa..2532b60245ac 100644 --- a/drivers/staging/sm750fb/ddk750_sii164.c +++ b/drivers/staging/sm750fb/ddk750_sii164.c @@ -72,7 +72,7 @@ unsigned short sii164GetDeviceID(void) */ /* - * sii164InitChip + * sii164_init_chip * This function initialize and detect the DVI controller chip. * * Input: @@ -118,16 +118,16 @@ unsigned short sii164GetDeviceID(void) * 0 - Success * -1 - Fail. */ -long sii164InitChip(unsigned char edge_select, - unsigned char bus_select, - unsigned char dual_edge_clk_select, - unsigned char hsync_enable, - unsigned char vsync_enable, - unsigned char deskew_enable, - unsigned char deskew_setting, - unsigned char continuous_sync_enable, - unsigned char pll_filter_enable, - unsigned char pll_filter_value) +long sii164_init_chip(unsigned char edge_select, + unsigned char bus_select, + unsigned char dual_edge_clk_select, + unsigned char hsync_enable, + unsigned char vsync_enable, + unsigned char deskew_enable, + unsigned char deskew_setting, + unsigned char continuous_sync_enable, + unsigned char pll_filter_enable, + unsigned char pll_filter_value) { unsigned char config; diff --git a/drivers/staging/sm750fb/ddk750_sii164.h b/drivers/staging/sm750fb/ddk750_sii164.h index ca330f6a43e2..71a7c1cb42c4 100644 --- a/drivers/staging/sm750fb/ddk750_sii164.h +++ b/drivers/staging/sm750fb/ddk750_sii164.h @@ -16,16 +16,16 @@ enum sii164_hot_plug_mode { }; /* Silicon Image SiI164 chip prototype */ -long sii164InitChip(unsigned char edgeSelect, - unsigned char busSelect, - unsigned char dualEdgeClkSelect, - unsigned char hsyncEnable, - unsigned char vsyncEnable, - unsigned char deskewEnable, - unsigned char deskewSetting, - unsigned char continuousSyncEnable, - unsigned char pllFilterEnable, - unsigned char pllFilterValue); +long sii164_init_chip(unsigned char edgeSelect, + unsigned char busSelect, + unsigned char dualEdgeClkSelect, + unsigned char hsyncEnable, + unsigned char vsyncEnable, + unsigned char deskewEnable, + unsigned char deskewSetting, + unsigned char continuousSyncEnable, + unsigned char pllFilterEnable, + unsigned char pllFilterValue); unsigned short sii164_get_vendor_id(void); unsigned short sii164GetDeviceID(void); diff --git a/drivers/staging/vme_user/vme.c b/drivers/staging/vme_user/vme.c index b5555683a069..d0366dd3f2b1 100644 --- a/drivers/staging/vme_user/vme.c +++ b/drivers/staging/vme_user/vme.c @@ -79,7 +79,7 @@ static struct vme_bridge *find_bridge(struct vme_resource *resource) * Return: Virtual address of allocation on success, NULL on failure. */ void *vme_alloc_consistent(struct vme_resource *resource, size_t size, - dma_addr_t *dma) + dma_addr_t *dma) { struct vme_bridge *bridge; @@ -119,7 +119,7 @@ EXPORT_SYMBOL(vme_alloc_consistent); * Free previously allocated block of contiguous memory. */ void vme_free_consistent(struct vme_resource *resource, size_t size, - void *vaddr, dma_addr_t dma) + void *vaddr, dma_addr_t dma) { struct vme_bridge *bridge; @@ -169,14 +169,14 @@ size_t vme_get_size(struct vme_resource *resource) switch (resource->type) { case VME_MASTER: retval = vme_master_get(resource, &enabled, &base, &size, - &aspace, &cycle, &dwidth); + &aspace, &cycle, &dwidth); if (retval) return 0; return size; case VME_SLAVE: retval = vme_slave_get(resource, &enabled, &base, &size, - &buf_base, &aspace, &cycle); + &buf_base, &aspace, &cycle); if (retval) return 0; @@ -279,7 +279,7 @@ static u32 vme_get_aspace(int am) * Return: Pointer to VME resource on success, NULL on failure. */ struct vme_resource *vme_slave_request(struct vme_dev *vdev, u32 address, - u32 cycle) + u32 cycle) { struct vme_bridge *bridge; struct list_head *slave_pos = NULL; @@ -296,7 +296,7 @@ struct vme_resource *vme_slave_request(struct vme_dev *vdev, u32 address, /* Loop through slave resources */ list_for_each(slave_pos, &bridge->slave_resources) { slave_image = list_entry(slave_pos, - struct vme_slave_resource, list); + struct vme_slave_resource, list); if (!slave_image) { printk(KERN_ERR "Registered NULL Slave resource\n"); @@ -306,9 +306,8 @@ struct vme_resource *vme_slave_request(struct vme_dev *vdev, u32 address, /* Find an unlocked and compatible image */ mutex_lock(&slave_image->mtx); if (((slave_image->address_attr & address) == address) && - ((slave_image->cycle_attr & cycle) == cycle) && - (slave_image->locked == 0)) { - + ((slave_image->cycle_attr & cycle) == cycle) && + (slave_image->locked == 0)) { slave_image->locked = 1; mutex_unlock(&slave_image->mtx); allocated_image = slave_image; @@ -359,8 +358,8 @@ EXPORT_SYMBOL(vme_slave_request); * returned. */ int vme_slave_set(struct vme_resource *resource, int enabled, - unsigned long long vme_base, unsigned long long size, - dma_addr_t buf_base, u32 aspace, u32 cycle) + unsigned long long vme_base, unsigned long long size, + dma_addr_t buf_base, u32 aspace, u32 cycle) { struct vme_bridge *bridge = find_bridge(resource); struct vme_slave_resource *image; @@ -379,7 +378,7 @@ int vme_slave_set(struct vme_resource *resource, int enabled, } if (!(((image->address_attr & aspace) == aspace) && - ((image->cycle_attr & cycle) == cycle))) { + ((image->cycle_attr & cycle) == cycle))) { printk(KERN_ERR "Invalid attributes\n"); return -EINVAL; } @@ -409,8 +408,8 @@ EXPORT_SYMBOL(vme_slave_set); * device or if an invalid resource has been provided. */ int vme_slave_get(struct vme_resource *resource, int *enabled, - unsigned long long *vme_base, unsigned long long *size, - dma_addr_t *buf_base, u32 *aspace, u32 *cycle) + unsigned long long *vme_base, unsigned long long *size, + dma_addr_t *buf_base, u32 *aspace, u32 *cycle) { struct vme_bridge *bridge = find_bridge(resource); struct vme_slave_resource *image; @@ -448,7 +447,7 @@ void vme_slave_free(struct vme_resource *resource) } slave_image = list_entry(resource->entry, struct vme_slave_resource, - list); + list); if (!slave_image) { printk(KERN_ERR "Can't find slave resource\n"); return; @@ -480,7 +479,7 @@ EXPORT_SYMBOL(vme_slave_free); * Return: Pointer to VME resource on success, NULL on failure. */ struct vme_resource *vme_master_request(struct vme_dev *vdev, u32 address, - u32 cycle, u32 dwidth) + u32 cycle, u32 dwidth) { struct vme_bridge *bridge; struct list_head *master_pos = NULL; @@ -497,7 +496,7 @@ struct vme_resource *vme_master_request(struct vme_dev *vdev, u32 address, /* Loop through master resources */ list_for_each(master_pos, &bridge->master_resources) { master_image = list_entry(master_pos, - struct vme_master_resource, list); + struct vme_master_resource, list); if (!master_image) { printk(KERN_WARNING "Registered NULL master resource\n"); @@ -507,10 +506,9 @@ struct vme_resource *vme_master_request(struct vme_dev *vdev, u32 address, /* Find an unlocked and compatible image */ spin_lock(&master_image->lock); if (((master_image->address_attr & address) == address) && - ((master_image->cycle_attr & cycle) == cycle) && - ((master_image->width_attr & dwidth) == dwidth) && - (master_image->locked == 0)) { - + ((master_image->cycle_attr & cycle) == cycle) && + ((master_image->width_attr & dwidth) == dwidth) && + (master_image->locked == 0)) { master_image->locked = 1; spin_unlock(&master_image->lock); allocated_image = master_image; @@ -563,8 +561,8 @@ EXPORT_SYMBOL(vme_master_request); * returned. */ int vme_master_set(struct vme_resource *resource, int enabled, - unsigned long long vme_base, unsigned long long size, u32 aspace, - u32 cycle, u32 dwidth) + unsigned long long vme_base, unsigned long long size, + u32 aspace, u32 cycle, u32 dwidth) { struct vme_bridge *bridge = find_bridge(resource); struct vme_master_resource *image; @@ -583,8 +581,8 @@ int vme_master_set(struct vme_resource *resource, int enabled, } if (!(((image->address_attr & aspace) == aspace) && - ((image->cycle_attr & cycle) == cycle) && - ((image->width_attr & dwidth) == dwidth))) { + ((image->cycle_attr & cycle) == cycle) && + ((image->width_attr & dwidth) == dwidth))) { printk(KERN_WARNING "Invalid attributes\n"); return -EINVAL; } @@ -614,8 +612,8 @@ EXPORT_SYMBOL(vme_master_set); * device or if an invalid resource has been provided. */ int vme_master_get(struct vme_resource *resource, int *enabled, - unsigned long long *vme_base, unsigned long long *size, u32 *aspace, - u32 *cycle, u32 *dwidth) + unsigned long long *vme_base, unsigned long long *size, + u32 *aspace, u32 *cycle, u32 *dwidth) { struct vme_bridge *bridge = find_bridge(resource); struct vme_master_resource *image; @@ -653,7 +651,7 @@ EXPORT_SYMBOL(vme_master_get); * returned. */ ssize_t vme_master_read(struct vme_resource *resource, void *buf, size_t count, - loff_t offset) + loff_t offset) { struct vme_bridge *bridge = find_bridge(resource); struct vme_master_resource *image; @@ -682,7 +680,6 @@ ssize_t vme_master_read(struct vme_resource *resource, void *buf, size_t count, count = length - offset; return bridge->master_read(image, buf, count, offset); - } EXPORT_SYMBOL(vme_master_read); @@ -702,7 +699,7 @@ EXPORT_SYMBOL(vme_master_read); * returned. */ ssize_t vme_master_write(struct vme_resource *resource, void *buf, - size_t count, loff_t offset) + size_t count, loff_t offset) { struct vme_bridge *bridge = find_bridge(resource); struct vme_master_resource *image; @@ -754,7 +751,7 @@ EXPORT_SYMBOL(vme_master_write); * errors may also be returned. */ unsigned int vme_master_rmw(struct vme_resource *resource, unsigned int mask, - unsigned int compare, unsigned int swap, loff_t offset) + unsigned int compare, unsigned int swap, loff_t offset) { struct vme_bridge *bridge = find_bridge(resource); struct vme_master_resource *image; @@ -828,7 +825,7 @@ void vme_master_free(struct vme_resource *resource) } master_image = list_entry(resource->entry, struct vme_master_resource, - list); + list); if (!master_image) { printk(KERN_ERR "Can't find master resource\n"); return; @@ -877,7 +874,7 @@ struct vme_resource *vme_dma_request(struct vme_dev *vdev, u32 route) /* Loop through DMA resources */ list_for_each(dma_pos, &bridge->dma_resources) { dma_ctrlr = list_entry(dma_pos, - struct vme_dma_resource, list); + struct vme_dma_resource, list); if (!dma_ctrlr) { printk(KERN_ERR "Registered NULL DMA resource\n"); continue; @@ -886,8 +883,7 @@ struct vme_resource *vme_dma_request(struct vme_dev *vdev, u32 route) /* Find an unlocked and compatible controller */ mutex_lock(&dma_ctrlr->mtx); if (((dma_ctrlr->route_attr & route) == route) && - (dma_ctrlr->locked == 0)) { - + (dma_ctrlr->locked == 0)) { dma_ctrlr->locked = 1; mutex_unlock(&dma_ctrlr->mtx); allocated_ctrlr = dma_ctrlr; @@ -1045,7 +1041,7 @@ EXPORT_SYMBOL(vme_dma_pci_attribute); * Return: Pointer to VME DMA attribute, NULL on failure. */ struct vme_dma_attr *vme_dma_vme_attribute(unsigned long long address, - u32 aspace, u32 cycle, u32 dwidth) + u32 aspace, u32 cycle, u32 dwidth) { struct vme_dma_attr *attributes; struct vme_dma_vme *vme_attr; @@ -1107,7 +1103,7 @@ EXPORT_SYMBOL(vme_dma_free_attribute); * Hardware specific errors also possible. */ int vme_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src, - struct vme_dma_attr *dest, size_t count) + struct vme_dma_attr *dest, size_t count) { struct vme_bridge *bridge = list->parent->parent; int retval; @@ -1271,9 +1267,8 @@ void vme_bus_error_handler(struct vme_bridge *bridge, } EXPORT_SYMBOL(vme_bus_error_handler); -struct vme_error_handler *vme_register_error_handler( - struct vme_bridge *bridge, u32 aspace, - unsigned long long address, size_t len) +struct vme_error_handler *vme_register_error_handler(struct vme_bridge *bridge, u32 aspace, + unsigned long long address, size_t len) { struct vme_error_handler *handler; @@ -1331,8 +1326,8 @@ EXPORT_SYMBOL(vme_irq_handler); * already in use. Hardware specific errors also possible. */ int vme_irq_request(struct vme_dev *vdev, int level, int statid, - void (*callback)(int, int, void *), - void *priv_data) + void (*callback)(int, int, void *), + void *priv_data) { struct vme_bridge *bridge; @@ -1479,7 +1474,7 @@ struct vme_resource *vme_lm_request(struct vme_dev *vdev) /* Loop through LM resources */ list_for_each(lm_pos, &bridge->lm_resources) { lm = list_entry(lm_pos, - struct vme_lm_resource, list); + struct vme_lm_resource, list); if (!lm) { printk(KERN_ERR "Registered NULL Location Monitor resource\n"); continue; @@ -1561,7 +1556,7 @@ EXPORT_SYMBOL(vme_lm_count); * errors may also be returned. */ int vme_lm_set(struct vme_resource *resource, unsigned long long lm_base, - u32 aspace, u32 cycle) + u32 aspace, u32 cycle) { struct vme_bridge *bridge = find_bridge(resource); struct vme_lm_resource *lm; @@ -1597,7 +1592,7 @@ EXPORT_SYMBOL(vme_lm_set); * errors may also be returned. */ int vme_lm_get(struct vme_resource *resource, unsigned long long *lm_base, - u32 *aspace, u32 *cycle) + u32 *aspace, u32 *cycle) { struct vme_bridge *bridge = find_bridge(resource); struct vme_lm_resource *lm; @@ -1634,7 +1629,7 @@ EXPORT_SYMBOL(vme_lm_get); * errors may also be returned. */ int vme_lm_attach(struct vme_resource *resource, int monitor, - void (*callback)(void *), void *data) + void (*callback)(void *), void *data) { struct vme_bridge *bridge = find_bridge(resource); struct vme_lm_resource *lm; @@ -1841,7 +1836,8 @@ EXPORT_SYMBOL(vme_unregister_bridge); /* - Driver Registration --------------------------------------------------- */ static int __vme_register_driver_bus(struct vme_driver *drv, - struct vme_bridge *bridge, unsigned int ndevs) + struct vme_bridge *bridge, + unsigned int ndevs) { int err; unsigned int i; @@ -1861,7 +1857,7 @@ static int __vme_register_driver_bus(struct vme_driver *drv, vdev->dev.parent = bridge->parent; vdev->dev.bus = &vme_bus_type; dev_set_name(&vdev->dev, "%s.%u-%u", drv->name, bridge->num, - vdev->num); + vdev->num); err = device_register(&vdev->dev); if (err) diff --git a/drivers/staging/vme_user/vme_bridge.h b/drivers/staging/vme_user/vme_bridge.h index 11df0a5e7f7b..9bdc41bb6602 100644 --- a/drivers/staging/vme_user/vme_bridge.h +++ b/drivers/staging/vme_user/vme_bridge.h @@ -128,28 +128,24 @@ struct vme_bridge { struct mutex irq_mtx; /* Slave Functions */ - int (*slave_get)(struct vme_slave_resource *, int *, - unsigned long long *, unsigned long long *, dma_addr_t *, - u32 *, u32 *); + int (*slave_get)(struct vme_slave_resource *, int *, unsigned long long *, + unsigned long long *, dma_addr_t *, u32 *, u32 *); int (*slave_set)(struct vme_slave_resource *, int, unsigned long long, - unsigned long long, dma_addr_t, u32, u32); + unsigned long long, dma_addr_t, u32, u32); /* Master Functions */ - int (*master_get)(struct vme_master_resource *, int *, - unsigned long long *, unsigned long long *, u32 *, u32 *, - u32 *); - int (*master_set)(struct vme_master_resource *, int, - unsigned long long, unsigned long long, u32, u32, u32); - ssize_t (*master_read)(struct vme_master_resource *, void *, size_t, - loff_t); - ssize_t (*master_write)(struct vme_master_resource *, void *, size_t, - loff_t); + int (*master_get)(struct vme_master_resource *, int *, unsigned long long *, + unsigned long long *, u32 *, u32 *, u32 *); + int (*master_set)(struct vme_master_resource *, int, unsigned long long, + unsigned long long, u32, u32, u32); + ssize_t (*master_read)(struct vme_master_resource *, void *, size_t, loff_t); + ssize_t (*master_write)(struct vme_master_resource *, void *, size_t, loff_t); unsigned int (*master_rmw)(struct vme_master_resource *, unsigned int, - unsigned int, unsigned int, loff_t); + unsigned int, unsigned int, loff_t); /* DMA Functions */ int (*dma_list_add)(struct vme_dma_list *, struct vme_dma_attr *, - struct vme_dma_attr *, size_t); + struct vme_dma_attr *, size_t); int (*dma_list_exec)(struct vme_dma_list *); int (*dma_list_empty)(struct vme_dma_list *); @@ -159,32 +155,26 @@ struct vme_bridge { /* Location monitor functions */ int (*lm_set)(struct vme_lm_resource *, unsigned long long, u32, u32); - int (*lm_get)(struct vme_lm_resource *, unsigned long long *, u32 *, - u32 *); - int (*lm_attach)(struct vme_lm_resource *, int, - void (*callback)(void *), void *); + int (*lm_get)(struct vme_lm_resource *, unsigned long long *, u32 *, u32 *); + int (*lm_attach)(struct vme_lm_resource *, int, void (*callback)(void *), void *); int (*lm_detach)(struct vme_lm_resource *, int); /* CR/CSR space functions */ int (*slot_get)(struct vme_bridge *); /* Bridge parent interface */ - void *(*alloc_consistent)(struct device *dev, size_t size, - dma_addr_t *dma); - void (*free_consistent)(struct device *dev, size_t size, - void *vaddr, dma_addr_t dma); + void *(*alloc_consistent)(struct device *dev, size_t size, dma_addr_t *dma); + void (*free_consistent)(struct device *dev, size_t size, void *vaddr, dma_addr_t dma); }; -void vme_bus_error_handler(struct vme_bridge *bridge, - unsigned long long address, int am); +void vme_bus_error_handler(struct vme_bridge *bridge, unsigned long long address, int am); void vme_irq_handler(struct vme_bridge *, int, int); struct vme_bridge *vme_init_bridge(struct vme_bridge *); int vme_register_bridge(struct vme_bridge *); void vme_unregister_bridge(struct vme_bridge *); -struct vme_error_handler *vme_register_error_handler( - struct vme_bridge *bridge, u32 aspace, - unsigned long long address, size_t len); +struct vme_error_handler *vme_register_error_handler(struct vme_bridge *bridge, u32 aspace, + unsigned long long address, size_t len); void vme_unregister_error_handler(struct vme_error_handler *handler); #endif /* _VME_BRIDGE_H_ */ diff --git a/drivers/staging/vt6655/baseband.c b/drivers/staging/vt6655/baseband.c index 0e135af8316b..696d4dd03aa2 100644 --- a/drivers/staging/vt6655/baseband.c +++ b/drivers/staging/vt6655/baseband.c @@ -499,7 +499,7 @@ static const unsigned char by_vt3253_init_tab_rfmd[CB_VT3253_INIT_FOR_RFMD][2] = }; #define CB_VT3253B0_INIT_FOR_RFMD 256 -static const unsigned char byVT3253B0_RFMD[CB_VT3253B0_INIT_FOR_RFMD][2] = { +static const unsigned char vt3253b0_rfmd[CB_VT3253B0_INIT_FOR_RFMD][2] = { {0x00, 0x31}, {0x01, 0x00}, {0x02, 0x00}, @@ -2005,8 +2005,8 @@ bool bb_vt3253_init(struct vnt_private *priv) } else { for (ii = 0; ii < CB_VT3253B0_INIT_FOR_RFMD; ii++) result &= bb_write_embedded(priv, - byVT3253B0_RFMD[ii][0], - byVT3253B0_RFMD[ii][1]); + vt3253b0_rfmd[ii][0], + vt3253b0_rfmd[ii][1]); for (ii = 0; ii < CB_VT3253B0_AGC_FOR_RFMD2959; ii++) result &= bb_write_embedded(priv, diff --git a/drivers/staging/vt6655/srom.c b/drivers/staging/vt6655/srom.c index ee5ca4db74dc..1b89d401a7eb 100644 --- a/drivers/staging/vt6655/srom.c +++ b/drivers/staging/vt6655/srom.c @@ -49,7 +49,7 @@ * Parameters: * In: * iobase - I/O base address - * byContntOffset - address of EEPROM + * contnt_offset - address of EEPROM * Out: * none * @@ -57,7 +57,7 @@ * */ unsigned char SROMbyReadEmbedded(void __iomem *iobase, - unsigned char byContntOffset) + unsigned char contnt_offset) { unsigned short wDelay, wNoACK; unsigned char byWait; @@ -70,7 +70,7 @@ unsigned char SROMbyReadEmbedded(void __iomem *iobase, iowrite8(byOrg & (~I2MCFG_NORETRY), iobase + MAC_REG_I2MCFG); for (wNoACK = 0; wNoACK < W_MAX_I2CRETRY; wNoACK++) { iowrite8(EEP_I2C_DEV_ID, iobase + MAC_REG_I2MTGID); - iowrite8(byContntOffset, iobase + MAC_REG_I2MTGAD); + iowrite8(contnt_offset, iobase + MAC_REG_I2MTGAD); /* issue read command */ iowrite8(I2MCSR_EEMR, iobase + MAC_REG_I2MCSR); diff --git a/drivers/thunderbolt/acpi.c b/drivers/thunderbolt/acpi.c index 38fefd0e5268..c9b6bb46111c 100644 --- a/drivers/thunderbolt/acpi.c +++ b/drivers/thunderbolt/acpi.c @@ -12,7 +12,7 @@ #include "tb.h" static acpi_status tb_acpi_add_link(acpi_handle handle, u32 level, void *data, - void **return_value) + void **ret) { struct acpi_device *adev = acpi_fetch_acpi_dev(handle); struct fwnode_handle *fwnode; @@ -84,6 +84,7 @@ static acpi_status tb_acpi_add_link(acpi_handle handle, u32 level, void *data, if (link) { dev_dbg(&nhi->pdev->dev, "created link from %s\n", dev_name(&pdev->dev)); + *(bool *)ret = true; } else { dev_warn(&nhi->pdev->dev, "device link creation from %s failed\n", dev_name(&pdev->dev)); @@ -104,22 +105,29 @@ out_put: * Goes over ACPI namespace finding tunneled ports that reference to * @nhi ACPI node. For each reference a device link is added. The link * is automatically removed by the driver core. + * + * Returns %true if at least one link was created. */ -void tb_acpi_add_links(struct tb_nhi *nhi) +bool tb_acpi_add_links(struct tb_nhi *nhi) { acpi_status status; + bool ret = false; if (!has_acpi_companion(&nhi->pdev->dev)) - return; + return false; /* * Find all devices that have usb4-host-controller interface * property that references to this NHI. */ status = acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT, 32, - tb_acpi_add_link, NULL, nhi, NULL); - if (ACPI_FAILURE(status)) + tb_acpi_add_link, NULL, nhi, (void **)&ret); + if (ACPI_FAILURE(status)) { dev_warn(&nhi->pdev->dev, "failed to enumerate tunneled ports\n"); + return false; + } + + return ret; } /** diff --git a/drivers/thunderbolt/switch.c b/drivers/thunderbolt/switch.c index 7ea63bb31714..43171cc1cc2d 100644 --- a/drivers/thunderbolt/switch.c +++ b/drivers/thunderbolt/switch.c @@ -2188,46 +2188,47 @@ struct device_type tb_switch_type = { static int tb_switch_get_generation(struct tb_switch *sw) { - switch (sw->config.device_id) { - case PCI_DEVICE_ID_INTEL_LIGHT_RIDGE: - case PCI_DEVICE_ID_INTEL_EAGLE_RIDGE: - case PCI_DEVICE_ID_INTEL_LIGHT_PEAK: - case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_2C: - case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C: - case PCI_DEVICE_ID_INTEL_PORT_RIDGE: - case PCI_DEVICE_ID_INTEL_REDWOOD_RIDGE_2C_BRIDGE: - case PCI_DEVICE_ID_INTEL_REDWOOD_RIDGE_4C_BRIDGE: - return 1; + if (tb_switch_is_usb4(sw)) + return 4; - case PCI_DEVICE_ID_INTEL_WIN_RIDGE_2C_BRIDGE: - case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_BRIDGE: - case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_BRIDGE: - return 2; + if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) { + switch (sw->config.device_id) { + case PCI_DEVICE_ID_INTEL_LIGHT_RIDGE: + case PCI_DEVICE_ID_INTEL_EAGLE_RIDGE: + case PCI_DEVICE_ID_INTEL_LIGHT_PEAK: + case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_2C: + case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C: + case PCI_DEVICE_ID_INTEL_PORT_RIDGE: + case PCI_DEVICE_ID_INTEL_REDWOOD_RIDGE_2C_BRIDGE: + case PCI_DEVICE_ID_INTEL_REDWOOD_RIDGE_4C_BRIDGE: + return 1; - case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_BRIDGE: - case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_BRIDGE: - case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_4C_BRIDGE: - case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_BRIDGE: - case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_BRIDGE: - case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_BRIDGE: - case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_BRIDGE: - case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_BRIDGE: - case PCI_DEVICE_ID_INTEL_ICL_NHI0: - case PCI_DEVICE_ID_INTEL_ICL_NHI1: - return 3; + case PCI_DEVICE_ID_INTEL_WIN_RIDGE_2C_BRIDGE: + case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_BRIDGE: + case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_BRIDGE: + return 2; - default: - if (tb_switch_is_usb4(sw)) - return 4; - - /* - * For unknown switches assume generation to be 1 to be - * on the safe side. - */ - tb_sw_warn(sw, "unsupported switch device id %#x\n", - sw->config.device_id); - return 1; + case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_BRIDGE: + case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_BRIDGE: + case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_4C_BRIDGE: + case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_BRIDGE: + case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_BRIDGE: + case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_BRIDGE: + case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_BRIDGE: + case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_BRIDGE: + case PCI_DEVICE_ID_INTEL_ICL_NHI0: + case PCI_DEVICE_ID_INTEL_ICL_NHI1: + return 3; + } } + + /* + * For unknown switches assume generation to be 1 to be on the + * safe side. + */ + tb_sw_warn(sw, "unsupported switch device id %#x\n", + sw->config.device_id); + return 1; } static bool tb_switch_exceeds_max_depth(const struct tb_switch *sw, int depth) diff --git a/drivers/thunderbolt/tb.c b/drivers/thunderbolt/tb.c index 3fb4553a6442..dd0a1ef8cf12 100644 --- a/drivers/thunderbolt/tb.c +++ b/drivers/thunderbolt/tb.c @@ -2368,12 +2368,13 @@ static const struct tb_cm_ops tb_cm_ops = { * downstream ports and the NHI so that the device core will make sure * NHI is resumed first before the rest. */ -static void tb_apple_add_links(struct tb_nhi *nhi) +static bool tb_apple_add_links(struct tb_nhi *nhi) { struct pci_dev *upstream, *pdev; + bool ret; if (!x86_apple_machine) - return; + return false; switch (nhi->pdev->device) { case PCI_DEVICE_ID_INTEL_LIGHT_RIDGE: @@ -2382,26 +2383,27 @@ static void tb_apple_add_links(struct tb_nhi *nhi) case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_NHI: break; default: - return; + return false; } upstream = pci_upstream_bridge(nhi->pdev); while (upstream) { if (!pci_is_pcie(upstream)) - return; + return false; if (pci_pcie_type(upstream) == PCI_EXP_TYPE_UPSTREAM) break; upstream = pci_upstream_bridge(upstream); } if (!upstream) - return; + return false; /* * For each hotplug downstream port, create add device link * back to NHI so that PCIe tunnels can be re-established after * sleep. */ + ret = false; for_each_pci_bridge(pdev, upstream->subordinate) { const struct device_link *link; @@ -2417,11 +2419,14 @@ static void tb_apple_add_links(struct tb_nhi *nhi) if (link) { dev_dbg(&nhi->pdev->dev, "created link from %s\n", dev_name(&pdev->dev)); + ret = true; } else { dev_warn(&nhi->pdev->dev, "device link creation from %s failed\n", dev_name(&pdev->dev)); } } + + return ret; } struct tb *tb_probe(struct tb_nhi *nhi) @@ -2448,8 +2453,13 @@ struct tb *tb_probe(struct tb_nhi *nhi) tb_dbg(tb, "using software connection manager\n"); - tb_apple_add_links(nhi); - tb_acpi_add_links(nhi); + /* + * Device links are needed to make sure we establish tunnels + * before the PCIe/USB stack is resumed so complain here if we + * found them missing. + */ + if (!tb_apple_add_links(nhi) && !tb_acpi_add_links(nhi)) + tb_warn(tb, "device links to tunneled native ports are missing!\n"); return tb; } diff --git a/drivers/thunderbolt/tb.h b/drivers/thunderbolt/tb.h index 57a9b272cb94..d2a55ad2fd3e 100644 --- a/drivers/thunderbolt/tb.h +++ b/drivers/thunderbolt/tb.h @@ -1333,7 +1333,7 @@ static inline bool usb4_port_device_is_offline(const struct usb4_port *usb4) void tb_check_quirks(struct tb_switch *sw); #ifdef CONFIG_ACPI -void tb_acpi_add_links(struct tb_nhi *nhi); +bool tb_acpi_add_links(struct tb_nhi *nhi); bool tb_acpi_is_native(void); bool tb_acpi_may_tunnel_usb3(void); @@ -1346,7 +1346,7 @@ void tb_acpi_exit(void); int tb_acpi_power_on_retimers(struct tb_port *port); int tb_acpi_power_off_retimers(struct tb_port *port); #else -static inline void tb_acpi_add_links(struct tb_nhi *nhi) { } +static inline bool tb_acpi_add_links(struct tb_nhi *nhi) { return false; } static inline bool tb_acpi_is_native(void) { return true; } static inline bool tb_acpi_may_tunnel_usb3(void) { return true; } diff --git a/drivers/thunderbolt/tmu.c b/drivers/thunderbolt/tmu.c index 0dfd1e083994..747f88703d5c 100644 --- a/drivers/thunderbolt/tmu.c +++ b/drivers/thunderbolt/tmu.c @@ -19,7 +19,7 @@ static const unsigned int tmu_rates[] = { [TB_SWITCH_TMU_MODE_MEDRES_ENHANCED_UNI] = 16, }; -const struct { +static const struct { unsigned int freq_meas_window; unsigned int avg_const; unsigned int delta_avg_const; diff --git a/drivers/tty/Kconfig b/drivers/tty/Kconfig index 069de553127c..5646dc6242cd 100644 --- a/drivers/tty/Kconfig +++ b/drivers/tty/Kconfig @@ -239,6 +239,7 @@ config MOXA_SMARTIO config SYNCLINK_GT tristate "SyncLink GT/AC support" depends on SERIAL_NONSTANDARD && PCI + depends on BROKEN help Support for SyncLink GT and SyncLink AC families of synchronous and asynchronous serial adapters diff --git a/drivers/tty/amiserial.c b/drivers/tty/amiserial.c index c06ad0a0744b..785558c65ae8 100644 --- a/drivers/tty/amiserial.c +++ b/drivers/tty/amiserial.c @@ -696,7 +696,7 @@ static void change_speed(struct tty_struct *tty, struct serial_state *info, local_irq_restore(flags); } -static int rs_put_char(struct tty_struct *tty, unsigned char ch) +static int rs_put_char(struct tty_struct *tty, u8 ch) { struct serial_state *info; unsigned long flags; @@ -741,7 +741,7 @@ static void rs_flush_chars(struct tty_struct *tty) local_irq_restore(flags); } -static int rs_write(struct tty_struct * tty, const unsigned char *buf, int count) +static ssize_t rs_write(struct tty_struct * tty, const u8 *buf, size_t count) { int c, ret = 0; struct serial_state *info = tty->driver_data; diff --git a/drivers/tty/ehv_bytechan.c b/drivers/tty/ehv_bytechan.c index 8595483f4697..a067628e01c8 100644 --- a/drivers/tty/ehv_bytechan.c +++ b/drivers/tty/ehv_bytechan.c @@ -466,8 +466,8 @@ static irqreturn_t ehv_bc_tty_tx_isr(int irq, void *data) * ehv_bc_tty_write_room() will never lie, so the tty layer will never send us * too much data. */ -static int ehv_bc_tty_write(struct tty_struct *ttys, const unsigned char *s, - int count) +static ssize_t ehv_bc_tty_write(struct tty_struct *ttys, const u8 *s, + size_t count) { struct ehv_bc_data *bc = ttys->driver_data; unsigned long flags; diff --git a/drivers/tty/goldfish.c b/drivers/tty/goldfish.c index d02de3f0326f..4591f940b7a1 100644 --- a/drivers/tty/goldfish.c +++ b/drivers/tty/goldfish.c @@ -125,8 +125,7 @@ static void goldfish_tty_rw(struct goldfish_tty *qtty, } } -static void goldfish_tty_do_write(int line, const char *buf, - unsigned int count) +static void goldfish_tty_do_write(int line, const u8 *buf, unsigned int count) { struct goldfish_tty *qtty = &goldfish_ttys[line]; unsigned long address = (unsigned long)(void *)buf; @@ -186,8 +185,8 @@ static void goldfish_tty_hangup(struct tty_struct *tty) tty_port_hangup(tty->port); } -static int goldfish_tty_write(struct tty_struct *tty, const unsigned char *buf, - int count) +static ssize_t goldfish_tty_write(struct tty_struct *tty, const u8 *buf, + size_t count) { goldfish_tty_do_write(tty->index, buf, count); return count; diff --git a/drivers/tty/hvc/hvc_console.c b/drivers/tty/hvc/hvc_console.c index 10c10cfdf92a..959fae54ca39 100644 --- a/drivers/tty/hvc/hvc_console.c +++ b/drivers/tty/hvc/hvc_console.c @@ -496,11 +496,11 @@ static int hvc_push(struct hvc_struct *hp) return n; } -static int hvc_write(struct tty_struct *tty, const unsigned char *buf, int count) +static ssize_t hvc_write(struct tty_struct *tty, const u8 *buf, size_t count) { struct hvc_struct *hp = tty->driver_data; unsigned long flags; - int rsize, written = 0; + size_t rsize, written = 0; /* This write was probably executed during a tty close. */ if (!hp) diff --git a/drivers/tty/hvc/hvc_opal.c b/drivers/tty/hvc/hvc_opal.c index 794c7b18aa06..992e199e0ea8 100644 --- a/drivers/tty/hvc/hvc_opal.c +++ b/drivers/tty/hvc/hvc_opal.c @@ -14,7 +14,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/tty/hvc/hvcs.c b/drivers/tty/hvc/hvcs.c index 1de1a09bf82d..d29fdfe9d93d 100644 --- a/drivers/tty/hvc/hvcs.c +++ b/drivers/tty/hvc/hvcs.c @@ -1257,15 +1257,14 @@ static void hvcs_hangup(struct tty_struct * tty) * tty_hangup will allow hvcs_write time to complete execution before it * terminates our device. */ -static int hvcs_write(struct tty_struct *tty, - const unsigned char *buf, int count) +static ssize_t hvcs_write(struct tty_struct *tty, const u8 *buf, size_t count) { struct hvcs_struct *hvcsd = tty->driver_data; unsigned int unit_address; const unsigned char *charbuf; unsigned long flags; - int total_sent = 0; - int tosend = 0; + size_t total_sent = 0; + size_t tosend = 0; int result = 0; /* @@ -1300,7 +1299,8 @@ static int hvcs_write(struct tty_struct *tty, unit_address = hvcsd->vdev->unit_address; while (count > 0) { - tosend = min(count, (HVCS_BUFF_LEN - hvcsd->chars_in_buffer)); + tosend = min_t(size_t, count, + (HVCS_BUFF_LEN - hvcsd->chars_in_buffer)); /* * No more space, this probably means that the last call to * hvcs_write() didn't succeed and the buffer was filled up. diff --git a/drivers/tty/hvc/hvsi.c b/drivers/tty/hvc/hvsi.c index a200d01eceed..a94068bce76f 100644 --- a/drivers/tty/hvc/hvsi.c +++ b/drivers/tty/hvc/hvsi.c @@ -904,14 +904,13 @@ static unsigned int hvsi_chars_in_buffer(struct tty_struct *tty) return hp->n_outbuf; } -static int hvsi_write(struct tty_struct *tty, - const unsigned char *buf, int count) +static ssize_t hvsi_write(struct tty_struct *tty, const u8 *source, + size_t count) { struct hvsi_struct *hp = tty->driver_data; - const char *source = buf; unsigned long flags; - int total = 0; - int origcount = count; + size_t total = 0; + size_t origcount = count; spin_lock_irqsave(&hp->lock, flags); @@ -929,7 +928,7 @@ static int hvsi_write(struct tty_struct *tty, * will see there is no room in outbuf and return. */ while ((count > 0) && (hvsi_write_room(tty) > 0)) { - int chunksize = min_t(int, count, hvsi_write_room(tty)); + size_t chunksize = min_t(size_t, count, hvsi_write_room(tty)); BUG_ON(hp->n_outbuf < 0); memcpy(hp->outbuf + hp->n_outbuf, source, chunksize); @@ -953,8 +952,8 @@ out: spin_unlock_irqrestore(&hp->lock, flags); if (total != origcount) - pr_debug("%s: wanted %i, only wrote %i\n", __func__, origcount, - total); + pr_debug("%s: wanted %zu, only wrote %zu\n", __func__, + origcount, total); return total; } diff --git a/drivers/tty/ipwireless/hardware.c b/drivers/tty/ipwireless/hardware.c index f5d3e68f5750..001ec318a918 100644 --- a/drivers/tty/ipwireless/hardware.c +++ b/drivers/tty/ipwireless/hardware.c @@ -1292,7 +1292,7 @@ static void *alloc_ctrl_packet(int header_size, } int ipwireless_send_packet(struct ipw_hardware *hw, unsigned int channel_idx, - const unsigned char *data, unsigned int length, + const u8 *data, unsigned int length, void (*callback) (void *cb, unsigned int length), void *callback_data) { diff --git a/drivers/tty/ipwireless/tty.c b/drivers/tty/ipwireless/tty.c index 9edd5ae17580..b6de40815fb9 100644 --- a/drivers/tty/ipwireless/tty.c +++ b/drivers/tty/ipwireless/tty.c @@ -186,8 +186,8 @@ static void ipw_write_packet_sent_callback(void *callback_data, tty->tx_bytes_queued -= packet_length; } -static int ipw_write(struct tty_struct *linux_tty, - const unsigned char *buf, int count) +static ssize_t ipw_write(struct tty_struct *linux_tty, const u8 *buf, + size_t count) { struct ipw_tty *tty = linux_tty->driver_data; int room, ret; diff --git a/drivers/tty/mips_ejtag_fdc.c b/drivers/tty/mips_ejtag_fdc.c index e81701a66429..369ec71c24ef 100644 --- a/drivers/tty/mips_ejtag_fdc.c +++ b/drivers/tty/mips_ejtag_fdc.c @@ -796,8 +796,8 @@ static void mips_ejtag_fdc_tty_hangup(struct tty_struct *tty) tty_port_hangup(tty->port); } -static int mips_ejtag_fdc_tty_write(struct tty_struct *tty, - const unsigned char *buf, int total) +static ssize_t mips_ejtag_fdc_tty_write(struct tty_struct *tty, const u8 *buf, + size_t total) { int count, block; struct mips_ejtag_fdc_tty_port *dport = tty->driver_data; @@ -816,7 +816,7 @@ static int mips_ejtag_fdc_tty_write(struct tty_struct *tty, */ spin_lock(&dport->xmit_lock); /* Work out how many bytes we can write to the xmit buffer */ - total = min(total, (int)(priv->xmit_size - dport->xmit_cnt)); + total = min_t(size_t, total, priv->xmit_size - dport->xmit_cnt); atomic_add(total, &priv->xmit_total); dport->xmit_cnt += total; /* Write the actual bytes (may need splitting if it wraps) */ diff --git a/drivers/tty/moxa.c b/drivers/tty/moxa.c index 42fa4c878b2e..bf3f87ba3a92 100644 --- a/drivers/tty/moxa.c +++ b/drivers/tty/moxa.c @@ -487,7 +487,7 @@ module_param(ttymajor, int, 0); */ static int moxa_open(struct tty_struct *, struct file *); static void moxa_close(struct tty_struct *, struct file *); -static int moxa_write(struct tty_struct *, const unsigned char *, int); +static ssize_t moxa_write(struct tty_struct *, const u8 *, size_t); static unsigned int moxa_write_room(struct tty_struct *); static void moxa_flush_buffer(struct tty_struct *); static unsigned int moxa_chars_in_buffer(struct tty_struct *); @@ -1499,8 +1499,7 @@ static void moxa_close(struct tty_struct *tty, struct file *filp) tty_port_close(&ch->port, tty, filp); } -static int moxa_write(struct tty_struct *tty, - const unsigned char *buf, int count) +static ssize_t moxa_write(struct tty_struct *tty, const u8 *buf, size_t count) { struct moxa_port *ch = tty->driver_data; unsigned long flags; @@ -2164,8 +2163,7 @@ static int MoxaPortLineStatus(struct moxa_port *port) return val; } -static int MoxaPortWriteData(struct tty_struct *tty, - const unsigned char *buffer, int len) +static int MoxaPortWriteData(struct tty_struct *tty, const u8 *buffer, int len) { struct moxa_port *port = tty->driver_data; void __iomem *baseAddr, *ofsAddr, *ofs; diff --git a/drivers/tty/mxser.c b/drivers/tty/mxser.c index 10855e66fda1..10aa4ed38793 100644 --- a/drivers/tty/mxser.c +++ b/drivers/tty/mxser.c @@ -901,7 +901,7 @@ static void mxser_close(struct tty_struct *tty, struct file *filp) tty_port_close(tty->port, tty, filp); } -static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count) +static ssize_t mxser_write(struct tty_struct *tty, const u8 *buf, size_t count) { struct mxser_port *info = tty->driver_data; unsigned long flags; @@ -920,7 +920,7 @@ static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int cou return written; } -static int mxser_put_char(struct tty_struct *tty, unsigned char ch) +static int mxser_put_char(struct tty_struct *tty, u8 ch) { struct mxser_port *info = tty->driver_data; unsigned long flags; diff --git a/drivers/tty/n_gsm.c b/drivers/tty/n_gsm.c index 739f522cb893..b3550ff9c494 100644 --- a/drivers/tty/n_gsm.c +++ b/drivers/tty/n_gsm.c @@ -339,6 +339,7 @@ struct gsm_mux { unsigned long bad_fcs; unsigned long malformed; unsigned long io_error; + unsigned long open_error; unsigned long bad_size; unsigned long unsupported; }; @@ -1450,15 +1451,16 @@ static int gsm_control_command(struct gsm_mux *gsm, int cmd, const u8 *data, int dlen) { struct gsm_msg *msg; + struct gsm_dlci *dlci = gsm->dlci[0]; - msg = gsm_data_alloc(gsm, 0, dlen + 2, gsm->dlci[0]->ftype); + msg = gsm_data_alloc(gsm, 0, dlen + 2, dlci->ftype); if (msg == NULL) return -ENOMEM; msg->data[0] = (cmd << 1) | CR | EA; /* Set C/R */ msg->data[1] = (dlen << 1) | EA; memcpy(msg->data + 2, data, dlen); - gsm_data_queue(gsm->dlci[0], msg); + gsm_data_queue(dlci, msg); return 0; } @@ -1477,14 +1479,15 @@ static void gsm_control_reply(struct gsm_mux *gsm, int cmd, const u8 *data, int dlen) { struct gsm_msg *msg; + struct gsm_dlci *dlci = gsm->dlci[0]; - msg = gsm_data_alloc(gsm, 0, dlen + 2, gsm->dlci[0]->ftype); + msg = gsm_data_alloc(gsm, 0, dlen + 2, dlci->ftype); if (msg == NULL) return; msg->data[0] = (cmd & 0xFE) << 1 | EA; /* Clear C/R */ msg->data[1] = (dlen << 1) | EA; memcpy(msg->data + 2, data, dlen); - gsm_data_queue(gsm->dlci[0], msg); + gsm_data_queue(dlci, msg); } /** @@ -1589,6 +1592,7 @@ static int gsm_process_negotiation(struct gsm_mux *gsm, unsigned int addr, if (debug & DBG_ERRORS) pr_info("%s unsupported I frame request in PN\n", __func__); + gsm->unsupported++; return -EINVAL; default: if (debug & DBG_ERRORS) @@ -1730,25 +1734,32 @@ static void gsm_control_negotiation(struct gsm_mux *gsm, unsigned int cr, struct gsm_dlci *dlci; struct gsm_dlci_param_bits *params; - if (dlen < sizeof(struct gsm_dlci_param_bits)) + if (dlen < sizeof(struct gsm_dlci_param_bits)) { + gsm->open_error++; return; + } /* Invalid DLCI? */ params = (struct gsm_dlci_param_bits *)data; addr = FIELD_GET(PN_D_FIELD_DLCI, params->d_bits); - if (addr == 0 || addr >= NUM_DLCI || !gsm->dlci[addr]) + if (addr == 0 || addr >= NUM_DLCI || !gsm->dlci[addr]) { + gsm->open_error++; return; + } dlci = gsm->dlci[addr]; /* Too late for parameter negotiation? */ - if ((!cr && dlci->state == DLCI_OPENING) || dlci->state == DLCI_OPEN) + if ((!cr && dlci->state == DLCI_OPENING) || dlci->state == DLCI_OPEN) { + gsm->open_error++; return; + } /* Process the received parameters */ if (gsm_process_negotiation(gsm, addr, cr, params) != 0) { /* Negotiation failed. Close the link. */ if (debug & DBG_ERRORS) pr_info("%s PN failed\n", __func__); + gsm->open_error++; gsm_dlci_close(dlci); return; } @@ -1768,6 +1779,7 @@ static void gsm_control_negotiation(struct gsm_mux *gsm, unsigned int cr, } else { if (debug & DBG_ERRORS) pr_info("%s PN in invalid state\n", __func__); + gsm->open_error++; } } @@ -1888,6 +1900,8 @@ static void gsm_control_message(struct gsm_mux *gsm, unsigned int command, /* Optional unsupported commands */ case CMD_RPN: /* Remote port negotiation */ case CMD_SNC: /* Service negotiation command */ + gsm->unsupported++; + fallthrough; default: /* Reply to bad commands with an NSC */ buf[0] = command; @@ -2221,6 +2235,7 @@ static void gsm_dlci_t1(struct timer_list *t) dlci->retries--; mod_timer(&dlci->t1, jiffies + gsm->t1 * HZ / 100); } else { + gsm->open_error++; gsm_dlci_begin_close(dlci); /* prevent half open link */ } break; @@ -2236,6 +2251,7 @@ static void gsm_dlci_t1(struct timer_list *t) dlci->mode = DLCI_MODE_ADM; gsm_dlci_open(dlci); } else { + gsm->open_error++; gsm_dlci_begin_close(dlci); /* prevent half open link */ } @@ -2444,8 +2460,10 @@ static void gsm_dlci_command(struct gsm_dlci *dlci, const u8 *data, int len) data += dlen; /* Malformed command? */ - if (clen > len) + if (clen > len) { + dlci->gsm->malformed++; return; + } if (command & 1) gsm_control_message(dlci->gsm, command, data, clen); @@ -2532,6 +2550,8 @@ static int gsm_dlci_config(struct gsm_dlci *dlci, struct gsm_dlci_config *dc, in return -EINVAL; if (dc->k > 7) return -EINVAL; + if (dc->flags & ~GSM_FL_RESTART) /* allow future extensions */ + return -EINVAL; /* * See what is needed for reconfiguration @@ -2546,6 +2566,8 @@ static int gsm_dlci_config(struct gsm_dlci *dlci, struct gsm_dlci_config *dc, in /* Requires care */ if (dc->priority != dlci->prio) need_restart = true; + if (dc->flags & GSM_FL_RESTART) + need_restart = true; if ((open && gsm->wait_config) || need_restart) need_open = true; @@ -2753,12 +2775,16 @@ static void gsm_queue(struct gsm_mux *gsm) switch (gsm->control) { case SABM|PF: - if (cr == 1) + if (cr == 1) { + gsm->open_error++; goto invalid; + } if (dlci == NULL) dlci = gsm_dlci_alloc(gsm, address); - if (dlci == NULL) + if (dlci == NULL) { + gsm->open_error++; return; + } if (dlci->dead) gsm_response(gsm, address, DM|PF); else { @@ -3276,7 +3302,6 @@ static void gsm_copy_config_values(struct gsm_mux *gsm, static int gsm_config(struct gsm_mux *gsm, struct gsm_config *c) { - int ret = 0; int need_close = 0; int need_restart = 0; @@ -3355,7 +3380,7 @@ static int gsm_config(struct gsm_mux *gsm, struct gsm_config *c) * and removing from the mux array */ if (gsm->dead) { - ret = gsm_activate_mux(gsm); + int ret = gsm_activate_mux(gsm); if (ret) return ret; if (gsm->initiator) @@ -3374,6 +3399,7 @@ static void gsm_copy_config_ext_values(struct gsm_mux *gsm, static int gsm_config_ext(struct gsm_mux *gsm, struct gsm_config_ext *ce) { + bool need_restart = false; unsigned int i; /* @@ -3383,6 +3409,20 @@ static int gsm_config_ext(struct gsm_mux *gsm, struct gsm_config_ext *ce) for (i = 0; i < ARRAY_SIZE(ce->reserved); i++) if (ce->reserved[i]) return -EINVAL; + if (ce->flags & ~GSM_FL_RESTART) + return -EINVAL; + + /* Requires care */ + if (ce->flags & GSM_FL_RESTART) + need_restart = true; + + /* + * Close down what is needed, restart and initiate the new + * configuration. On the first time there is no DLCI[0] + * and closing or cleaning up is not necessary. + */ + if (need_restart) + gsm_cleanup_mux(gsm, true); /* * Setup the new configuration values @@ -3390,6 +3430,14 @@ static int gsm_config_ext(struct gsm_mux *gsm, struct gsm_config_ext *ce) gsm->wait_config = ce->wait_config ? true : false; gsm->keep_alive = ce->keep_alive; + if (gsm->dead) { + int ret = gsm_activate_mux(gsm); + if (ret) + return ret; + if (gsm->initiator) + gsm_dlci_begin_open(gsm->dlci[0]); + } + return 0; } @@ -3490,8 +3538,8 @@ static void gsmld_detach_gsm(struct tty_struct *tty, struct gsm_mux *gsm) gsm->tty = NULL; } -static void gsmld_receive_buf(struct tty_struct *tty, const unsigned char *cp, - const char *fp, int count) +static void gsmld_receive_buf(struct tty_struct *tty, const u8 *cp, + const u8 *fp, size_t count) { struct gsm_mux *gsm = tty->disc_data; char flags = TTY_NORMAL; @@ -3577,6 +3625,9 @@ static int gsmld_open(struct tty_struct *tty) { struct gsm_mux *gsm; + if (!capable(CAP_NET_ADMIN)) + return -EPERM; + if (tty->ops->write == NULL) return -EINVAL; @@ -3636,9 +3687,8 @@ static void gsmld_write_wakeup(struct tty_struct *tty) * This code must be sure never to sleep through a hangup. */ -static ssize_t gsmld_read(struct tty_struct *tty, struct file *file, - unsigned char *buf, size_t nr, - void **cookie, unsigned long offset) +static ssize_t gsmld_read(struct tty_struct *tty, struct file *file, u8 *buf, + size_t nr, void **cookie, unsigned long offset) { return -EOPNOTSUPP; } @@ -3658,7 +3708,7 @@ static ssize_t gsmld_read(struct tty_struct *tty, struct file *file, */ static ssize_t gsmld_write(struct tty_struct *tty, struct file *file, - const unsigned char *buf, size_t nr) + const u8 *buf, size_t nr) { struct gsm_mux *gsm = tty->disc_data; unsigned long flags; @@ -4254,8 +4304,7 @@ static void gsmtty_hangup(struct tty_struct *tty) gsm_dlci_begin_close(dlci); } -static int gsmtty_write(struct tty_struct *tty, const unsigned char *buf, - int len) +static ssize_t gsmtty_write(struct tty_struct *tty, const u8 *buf, size_t len) { int sent; struct gsm_dlci *dlci = tty->driver_data; diff --git a/drivers/tty/n_hdlc.c b/drivers/tty/n_hdlc.c index 46b09bfb6f3a..a670419efe79 100644 --- a/drivers/tty/n_hdlc.c +++ b/drivers/tty/n_hdlc.c @@ -369,13 +369,13 @@ static void n_hdlc_tty_wakeup(struct tty_struct *tty) * Called by tty low level driver when receive data is available. Data is * interpreted as one HDLC frame. */ -static void n_hdlc_tty_receive(struct tty_struct *tty, const __u8 *data, - const char *flags, int count) +static void n_hdlc_tty_receive(struct tty_struct *tty, const u8 *data, + const u8 *flags, size_t count) { register struct n_hdlc *n_hdlc = tty->disc_data; register struct n_hdlc_buf *buf; - pr_debug("%s() called count=%d\n", __func__, count); + pr_debug("%s() called count=%zu\n", __func__, count); if (count > maxframe) { pr_debug("rx count>maxframesize, data discarded\n"); @@ -425,8 +425,8 @@ static void n_hdlc_tty_receive(struct tty_struct *tty, const __u8 *data, * Returns the number of bytes returned or error code. */ static ssize_t n_hdlc_tty_read(struct tty_struct *tty, struct file *file, - __u8 *kbuf, size_t nr, - void **cookie, unsigned long offset) + u8 *kbuf, size_t nr, void **cookie, + unsigned long offset) { struct n_hdlc *n_hdlc = tty->disc_data; int ret = 0; @@ -518,7 +518,7 @@ done_with_rbuf: * Returns the number of bytes written (or error code). */ static ssize_t n_hdlc_tty_write(struct tty_struct *tty, struct file *file, - const unsigned char *data, size_t count) + const u8 *data, size_t count) { struct n_hdlc *n_hdlc = tty->disc_data; int error = 0; diff --git a/drivers/tty/n_null.c b/drivers/tty/n_null.c index f913b665af72..5a429d923eb3 100644 --- a/drivers/tty/n_null.c +++ b/drivers/tty/n_null.c @@ -10,43 +10,24 @@ * Copyright (C) Intel 2017 */ -static int n_null_open(struct tty_struct *tty) -{ - return 0; -} - -static void n_null_close(struct tty_struct *tty) -{ -} - -static ssize_t n_null_read(struct tty_struct *tty, struct file *file, - unsigned char *buf, size_t nr, - void **cookie, unsigned long offset) +static ssize_t n_null_read(struct tty_struct *tty, struct file *file, u8 *buf, + size_t nr, void **cookie, unsigned long offset) { return -EOPNOTSUPP; } static ssize_t n_null_write(struct tty_struct *tty, struct file *file, - const unsigned char *buf, size_t nr) + const u8 *buf, size_t nr) { return -EOPNOTSUPP; } -static void n_null_receivebuf(struct tty_struct *tty, - const unsigned char *cp, const char *fp, - int cnt) -{ -} - static struct tty_ldisc_ops null_ldisc = { .owner = THIS_MODULE, .num = N_NULL, .name = "n_null", - .open = n_null_open, - .close = n_null_close, .read = n_null_read, .write = n_null_write, - .receive_buf = n_null_receivebuf }; static int __init n_null_init(void) diff --git a/drivers/tty/n_tty.c b/drivers/tty/n_tty.c index 552e8a741562..6c9a408d67cd 100644 --- a/drivers/tty/n_tty.c +++ b/drivers/tty/n_tty.c @@ -99,7 +99,7 @@ struct n_tty_data { /* private to n_tty_receive_overrun (single-threaded) */ unsigned long overrun_time; - int num_overrun; + unsigned int num_overrun; /* non-atomic */ bool no_room; @@ -109,9 +109,9 @@ struct n_tty_data { unsigned char push:1; /* shared by producer and consumer */ - char read_buf[N_TTY_BUF_SIZE]; + u8 read_buf[N_TTY_BUF_SIZE]; DECLARE_BITMAP(read_flags, N_TTY_BUF_SIZE); - unsigned char echo_buf[N_TTY_BUF_SIZE]; + u8 echo_buf[N_TTY_BUF_SIZE]; /* consumer-published */ size_t read_tail; @@ -136,38 +136,36 @@ static inline size_t read_cnt(struct n_tty_data *ldata) return ldata->read_head - ldata->read_tail; } -static inline unsigned char read_buf(struct n_tty_data *ldata, size_t i) +static inline u8 read_buf(struct n_tty_data *ldata, size_t i) { - return ldata->read_buf[i & (N_TTY_BUF_SIZE - 1)]; + return ldata->read_buf[MASK(i)]; } -static inline unsigned char *read_buf_addr(struct n_tty_data *ldata, size_t i) +static inline u8 *read_buf_addr(struct n_tty_data *ldata, size_t i) { - return &ldata->read_buf[i & (N_TTY_BUF_SIZE - 1)]; + return &ldata->read_buf[MASK(i)]; } -static inline unsigned char echo_buf(struct n_tty_data *ldata, size_t i) +static inline u8 echo_buf(struct n_tty_data *ldata, size_t i) { smp_rmb(); /* Matches smp_wmb() in add_echo_byte(). */ - return ldata->echo_buf[i & (N_TTY_BUF_SIZE - 1)]; + return ldata->echo_buf[MASK(i)]; } -static inline unsigned char *echo_buf_addr(struct n_tty_data *ldata, size_t i) +static inline u8 *echo_buf_addr(struct n_tty_data *ldata, size_t i) { - return &ldata->echo_buf[i & (N_TTY_BUF_SIZE - 1)]; + return &ldata->echo_buf[MASK(i)]; } /* If we are not echoing the data, perhaps this is a secret so erase it */ -static void zero_buffer(struct tty_struct *tty, u8 *buffer, int size) +static void zero_buffer(const struct tty_struct *tty, u8 *buffer, size_t size) { - bool icanon = !!L_ICANON(tty); - bool no_echo = !L_ECHO(tty); - - if (icanon && no_echo) - memset(buffer, 0x00, size); + if (L_ICANON(tty) && !L_ECHO(tty)) + memset(buffer, 0, size); } -static void tty_copy(struct tty_struct *tty, void *to, size_t tail, size_t n) +static void tty_copy(const struct tty_struct *tty, void *to, size_t tail, + size_t n) { struct n_tty_data *ldata = tty->disc_data; size_t size = N_TTY_BUF_SIZE - tail; @@ -198,7 +196,7 @@ static void tty_copy(struct tty_struct *tty, void *to, size_t tail, size_t n) * * n_tty_read()/consumer path: * holds non-exclusive %termios_rwsem */ -static void n_tty_kick_worker(struct tty_struct *tty) +static void n_tty_kick_worker(const struct tty_struct *tty) { struct n_tty_data *ldata = tty->disc_data; @@ -218,16 +216,12 @@ static void n_tty_kick_worker(struct tty_struct *tty) } } -static ssize_t chars_in_buffer(struct tty_struct *tty) +static ssize_t chars_in_buffer(const struct tty_struct *tty) { - struct n_tty_data *ldata = tty->disc_data; - ssize_t n = 0; + const struct n_tty_data *ldata = tty->disc_data; + size_t head = ldata->icanon ? ldata->canon_head : ldata->commit_head; - if (!ldata->icanon) - n = ldata->commit_head - ldata->read_tail; - else - n = ldata->canon_head - ldata->read_tail; - return n; + return head - ldata->read_tail; } /** @@ -309,7 +303,7 @@ static void n_tty_check_unthrottle(struct tty_struct *tty) * * n_tty_receive_buf()/producer path: * caller holds non-exclusive %termios_rwsem */ -static inline void put_tty_queue(unsigned char c, struct n_tty_data *ldata) +static inline void put_tty_queue(u8 c, struct n_tty_data *ldata) { *read_buf_addr(ldata, ldata->read_head) = c; ldata->read_head++; @@ -383,7 +377,7 @@ static void n_tty_flush_buffer(struct tty_struct *tty) * character. We use this to correctly compute the on-screen size of the * character when printing. */ -static inline int is_utf8_continuation(unsigned char c) +static inline int is_utf8_continuation(u8 c) { return (c & 0xc0) == 0x80; } @@ -396,7 +390,7 @@ static inline int is_utf8_continuation(unsigned char c) * Returns: true if the utf8 character @c is a multibyte continuation character * and the terminal is in unicode mode. */ -static inline int is_continuation(unsigned char c, struct tty_struct *tty) +static inline int is_continuation(u8 c, const struct tty_struct *tty) { return I_IUTF8(tty) && is_utf8_continuation(c); } @@ -420,7 +414,7 @@ static inline int is_continuation(unsigned char c, struct tty_struct *tty) * Locking: should be called under the %output_lock to protect the column state * and space left in the buffer. */ -static int do_output_char(unsigned char c, struct tty_struct *tty, int space) +static int do_output_char(u8 c, struct tty_struct *tty, int space) { struct n_tty_data *ldata = tty->disc_data; int spaces; @@ -494,7 +488,7 @@ static int do_output_char(unsigned char c, struct tty_struct *tty, int space) * Locking: %output_lock to protect column state and space left (also, this is *called from n_tty_write() under the tty layer write lock). */ -static int process_output(unsigned char c, struct tty_struct *tty) +static int process_output(u8 c, struct tty_struct *tty) { struct n_tty_data *ldata = tty->disc_data; int space, retval; @@ -530,12 +524,12 @@ static int process_output(unsigned char c, struct tty_struct *tty) * called from n_tty_write() under the tty layer write lock). */ static ssize_t process_output_block(struct tty_struct *tty, - const unsigned char *buf, unsigned int nr) + const u8 *buf, unsigned int nr) { struct n_tty_data *ldata = tty->disc_data; int space; int i; - const unsigned char *cp; + const u8 *cp; mutex_lock(&ldata->output_lock); @@ -548,7 +542,7 @@ static ssize_t process_output_block(struct tty_struct *tty, nr = space; for (i = 0, cp = buf; i < nr; i++, cp++) { - unsigned char c = *cp; + u8 c = *cp; switch (c) { case '\n': @@ -588,6 +582,100 @@ break_out: return i; } +static int n_tty_process_echo_ops(struct tty_struct *tty, size_t *tail, + int space) +{ + struct n_tty_data *ldata = tty->disc_data; + u8 op; + + /* + * Since add_echo_byte() is called without holding output_lock, we + * might see only portion of multi-byte operation. + */ + if (MASK(ldata->echo_commit) == MASK(*tail + 1)) + return -ENODATA; + + /* + * If the buffer byte is the start of a multi-byte operation, get the + * next byte, which is either the op code or a control character value. + */ + op = echo_buf(ldata, *tail + 1); + + switch (op) { + case ECHO_OP_ERASE_TAB: { + unsigned int num_chars, num_bs; + + if (MASK(ldata->echo_commit) == MASK(*tail + 2)) + return -ENODATA; + + num_chars = echo_buf(ldata, *tail + 2); + + /* + * Determine how many columns to go back in order to erase the + * tab. This depends on the number of columns used by other + * characters within the tab area. If this (modulo 8) count is + * from the start of input rather than from a previous tab, we + * offset by canon column. Otherwise, tab spacing is normal. + */ + if (!(num_chars & 0x80)) + num_chars += ldata->canon_column; + num_bs = 8 - (num_chars & 7); + + if (num_bs > space) + return -ENOSPC; + + space -= num_bs; + while (num_bs--) { + tty_put_char(tty, '\b'); + if (ldata->column > 0) + ldata->column--; + } + *tail += 3; + break; + } + case ECHO_OP_SET_CANON_COL: + ldata->canon_column = ldata->column; + *tail += 2; + break; + + case ECHO_OP_MOVE_BACK_COL: + if (ldata->column > 0) + ldata->column--; + *tail += 2; + break; + + case ECHO_OP_START: + /* This is an escaped echo op start code */ + if (!space) + return -ENOSPC; + + tty_put_char(tty, ECHO_OP_START); + ldata->column++; + space--; + *tail += 2; + break; + + default: + /* + * If the op is not a special byte code, it is a ctrl char + * tagged to be echoed as "^X" (where X is the letter + * representing the control char). Note that we must ensure + * there is enough space for the whole ctrl pair. + */ + if (space < 2) + return -ENOSPC; + + tty_put_char(tty, '^'); + tty_put_char(tty, op ^ 0100); + ldata->column += 2; + space -= 2; + *tail += 2; + break; + } + + return space; +} + /** * __process_echoes - write pending echo characters * @tty: terminal device @@ -615,7 +703,7 @@ static size_t __process_echoes(struct tty_struct *tty) struct n_tty_data *ldata = tty->disc_data; int space, old_space; size_t tail; - unsigned char c; + u8 c; old_space = space = tty_write_room(tty); @@ -623,104 +711,12 @@ static size_t __process_echoes(struct tty_struct *tty) while (MASK(ldata->echo_commit) != MASK(tail)) { c = echo_buf(ldata, tail); if (c == ECHO_OP_START) { - unsigned char op; - bool space_left = true; - - /* - * Since add_echo_byte() is called without holding - * output_lock, we might see only portion of multi-byte - * operation. - */ - if (MASK(ldata->echo_commit) == MASK(tail + 1)) + int ret = n_tty_process_echo_ops(tty, &tail, space); + if (ret == -ENODATA) goto not_yet_stored; - /* - * If the buffer byte is the start of a multi-byte - * operation, get the next byte, which is either the - * op code or a control character value. - */ - op = echo_buf(ldata, tail + 1); - - switch (op) { - case ECHO_OP_ERASE_TAB: { - unsigned int num_chars, num_bs; - - if (MASK(ldata->echo_commit) == MASK(tail + 2)) - goto not_yet_stored; - num_chars = echo_buf(ldata, tail + 2); - - /* - * Determine how many columns to go back - * in order to erase the tab. - * This depends on the number of columns - * used by other characters within the tab - * area. If this (modulo 8) count is from - * the start of input rather than from a - * previous tab, we offset by canon column. - * Otherwise, tab spacing is normal. - */ - if (!(num_chars & 0x80)) - num_chars += ldata->canon_column; - num_bs = 8 - (num_chars & 7); - - if (num_bs > space) { - space_left = false; - break; - } - space -= num_bs; - while (num_bs--) { - tty_put_char(tty, '\b'); - if (ldata->column > 0) - ldata->column--; - } - tail += 3; - break; - } - case ECHO_OP_SET_CANON_COL: - ldata->canon_column = ldata->column; - tail += 2; - break; - - case ECHO_OP_MOVE_BACK_COL: - if (ldata->column > 0) - ldata->column--; - tail += 2; - break; - - case ECHO_OP_START: - /* This is an escaped echo op start code */ - if (!space) { - space_left = false; - break; - } - tty_put_char(tty, ECHO_OP_START); - ldata->column++; - space--; - tail += 2; - break; - - default: - /* - * If the op is not a special byte code, - * it is a ctrl char tagged to be echoed - * as "^X" (where X is the letter - * representing the control char). - * Note that we must ensure there is - * enough space for the whole ctrl pair. - * - */ - if (space < 2) { - space_left = false; - break; - } - tty_put_char(tty, '^'); - tty_put_char(tty, op ^ 0100); - ldata->column += 2; - space -= 2; - tail += 2; - } - - if (!space_left) + if (ret < 0) break; + space = ret; } else { if (O_OPOST(tty)) { int retval = do_output_char(c, tty, space); @@ -824,7 +820,7 @@ static void flush_echoes(struct tty_struct *tty) * * Add a character or operation byte to the echo buffer. */ -static inline void add_echo_byte(unsigned char c, struct n_tty_data *ldata) +static inline void add_echo_byte(u8 c, struct n_tty_data *ldata) { *echo_buf_addr(ldata, ldata->echo_head) = c; smp_wmb(); /* Matches smp_rmb() in echo_buf(). */ @@ -895,7 +891,7 @@ static void echo_erase_tab(unsigned int num_chars, int after_tab, * * This variant does not treat control characters specially. */ -static void echo_char_raw(unsigned char c, struct n_tty_data *ldata) +static void echo_char_raw(u8 c, struct n_tty_data *ldata) { if (c == ECHO_OP_START) { add_echo_byte(ECHO_OP_START, ldata); @@ -916,7 +912,7 @@ static void echo_char_raw(unsigned char c, struct n_tty_data *ldata) * This variant tags control characters to be echoed as "^X" (where X is the * letter representing the control char). */ -static void echo_char(unsigned char c, struct tty_struct *tty) +static void echo_char(u8 c, const struct tty_struct *tty) { struct n_tty_data *ldata = tty->disc_data; @@ -954,7 +950,7 @@ static inline void finish_erasing(struct n_tty_data *ldata) * Locking: n_tty_receive_buf()/producer path: * caller holds non-exclusive %termios_rwsem */ -static void eraser(unsigned char c, struct tty_struct *tty) +static void eraser(u8 c, const struct tty_struct *tty) { struct n_tty_data *ldata = tty->disc_data; enum { ERASE, WERASE, KILL } kill_type; @@ -1170,14 +1166,13 @@ static void n_tty_receive_break(struct tty_struct *tty) * Called from the receive_buf path so single threaded. Does not need locking * as num_overrun and overrun_time are function private. */ -static void n_tty_receive_overrun(struct tty_struct *tty) +static void n_tty_receive_overrun(const struct tty_struct *tty) { struct n_tty_data *ldata = tty->disc_data; ldata->num_overrun++; - if (time_after(jiffies, ldata->overrun_time + HZ) || - time_after(ldata->overrun_time, jiffies)) { - tty_warn(tty, "%d input overrun(s)\n", ldata->num_overrun); + if (time_is_before_jiffies(ldata->overrun_time + HZ)) { + tty_warn(tty, "%u input overrun(s)\n", ldata->num_overrun); ldata->overrun_time = jiffies; ldata->num_overrun = 0; } @@ -1194,7 +1189,8 @@ static void n_tty_receive_overrun(struct tty_struct *tty) * Locking: n_tty_receive_buf()/producer path: * caller holds non-exclusive %termios_rwsem */ -static void n_tty_receive_parity_error(struct tty_struct *tty, unsigned char c) +static void n_tty_receive_parity_error(const struct tty_struct *tty, + u8 c) { struct n_tty_data *ldata = tty->disc_data; @@ -1212,7 +1208,7 @@ static void n_tty_receive_parity_error(struct tty_struct *tty, unsigned char c) } static void -n_tty_receive_signal_char(struct tty_struct *tty, int signal, unsigned char c) +n_tty_receive_signal_char(struct tty_struct *tty, int signal, u8 c) { isig(signal, tty); if (I_IXON(tty)) @@ -1224,7 +1220,7 @@ n_tty_receive_signal_char(struct tty_struct *tty, int signal, unsigned char c) process_echoes(tty); } -static bool n_tty_is_char_flow_ctrl(struct tty_struct *tty, unsigned char c) +static bool n_tty_is_char_flow_ctrl(struct tty_struct *tty, u8 c) { return c == START_CHAR(tty) || c == STOP_CHAR(tty); } @@ -1244,7 +1240,7 @@ static bool n_tty_is_char_flow_ctrl(struct tty_struct *tty, unsigned char c) * Returns true if @c is consumed as flow-control character, the character * must not be treated as normal character. */ -static bool n_tty_receive_char_flow_ctrl(struct tty_struct *tty, unsigned char c, +static bool n_tty_receive_char_flow_ctrl(struct tty_struct *tty, u8 c, bool lookahead_done) { if (!n_tty_is_char_flow_ctrl(tty, c)) @@ -1264,7 +1260,103 @@ static bool n_tty_receive_char_flow_ctrl(struct tty_struct *tty, unsigned char c return true; } -static void n_tty_receive_char_special(struct tty_struct *tty, unsigned char c, +static void n_tty_receive_handle_newline(struct tty_struct *tty, u8 c) +{ + struct n_tty_data *ldata = tty->disc_data; + + set_bit(MASK(ldata->read_head), ldata->read_flags); + put_tty_queue(c, ldata); + smp_store_release(&ldata->canon_head, ldata->read_head); + kill_fasync(&tty->fasync, SIGIO, POLL_IN); + wake_up_interruptible_poll(&tty->read_wait, EPOLLIN | EPOLLRDNORM); +} + +static bool n_tty_receive_char_canon(struct tty_struct *tty, u8 c) +{ + struct n_tty_data *ldata = tty->disc_data; + + if (c == ERASE_CHAR(tty) || c == KILL_CHAR(tty) || + (c == WERASE_CHAR(tty) && L_IEXTEN(tty))) { + eraser(c, tty); + commit_echoes(tty); + + return true; + } + + if (c == LNEXT_CHAR(tty) && L_IEXTEN(tty)) { + ldata->lnext = 1; + if (L_ECHO(tty)) { + finish_erasing(ldata); + if (L_ECHOCTL(tty)) { + echo_char_raw('^', ldata); + echo_char_raw('\b', ldata); + commit_echoes(tty); + } + } + + return true; + } + + if (c == REPRINT_CHAR(tty) && L_ECHO(tty) && L_IEXTEN(tty)) { + size_t tail = ldata->canon_head; + + finish_erasing(ldata); + echo_char(c, tty); + echo_char_raw('\n', ldata); + while (MASK(tail) != MASK(ldata->read_head)) { + echo_char(read_buf(ldata, tail), tty); + tail++; + } + commit_echoes(tty); + + return true; + } + + if (c == '\n') { + if (L_ECHO(tty) || L_ECHONL(tty)) { + echo_char_raw('\n', ldata); + commit_echoes(tty); + } + n_tty_receive_handle_newline(tty, c); + + return true; + } + + if (c == EOF_CHAR(tty)) { + c = __DISABLED_CHAR; + n_tty_receive_handle_newline(tty, c); + + return true; + } + + if ((c == EOL_CHAR(tty)) || + (c == EOL2_CHAR(tty) && L_IEXTEN(tty))) { + /* + * XXX are EOL_CHAR and EOL2_CHAR echoed?!? + */ + if (L_ECHO(tty)) { + /* Record the column of first canon char. */ + if (ldata->canon_head == ldata->read_head) + echo_set_canon_col(ldata); + echo_char(c, tty); + commit_echoes(tty); + } + /* + * XXX does PARMRK doubling happen for + * EOL_CHAR and EOL2_CHAR? + */ + if (c == '\377' && I_PARMRK(tty)) + put_tty_queue(c, ldata); + + n_tty_receive_handle_newline(tty, c); + + return true; + } + + return false; +} + +static void n_tty_receive_char_special(struct tty_struct *tty, u8 c, bool lookahead_done) { struct n_tty_data *ldata = tty->disc_data; @@ -1298,77 +1390,8 @@ static void n_tty_receive_char_special(struct tty_struct *tty, unsigned char c, } else if (c == '\n' && I_INLCR(tty)) c = '\r'; - if (ldata->icanon) { - if (c == ERASE_CHAR(tty) || c == KILL_CHAR(tty) || - (c == WERASE_CHAR(tty) && L_IEXTEN(tty))) { - eraser(c, tty); - commit_echoes(tty); - return; - } - if (c == LNEXT_CHAR(tty) && L_IEXTEN(tty)) { - ldata->lnext = 1; - if (L_ECHO(tty)) { - finish_erasing(ldata); - if (L_ECHOCTL(tty)) { - echo_char_raw('^', ldata); - echo_char_raw('\b', ldata); - commit_echoes(tty); - } - } - return; - } - if (c == REPRINT_CHAR(tty) && L_ECHO(tty) && L_IEXTEN(tty)) { - size_t tail = ldata->canon_head; - - finish_erasing(ldata); - echo_char(c, tty); - echo_char_raw('\n', ldata); - while (MASK(tail) != MASK(ldata->read_head)) { - echo_char(read_buf(ldata, tail), tty); - tail++; - } - commit_echoes(tty); - return; - } - if (c == '\n') { - if (L_ECHO(tty) || L_ECHONL(tty)) { - echo_char_raw('\n', ldata); - commit_echoes(tty); - } - goto handle_newline; - } - if (c == EOF_CHAR(tty)) { - c = __DISABLED_CHAR; - goto handle_newline; - } - if ((c == EOL_CHAR(tty)) || - (c == EOL2_CHAR(tty) && L_IEXTEN(tty))) { - /* - * XXX are EOL_CHAR and EOL2_CHAR echoed?!? - */ - if (L_ECHO(tty)) { - /* Record the column of first canon char. */ - if (ldata->canon_head == ldata->read_head) - echo_set_canon_col(ldata); - echo_char(c, tty); - commit_echoes(tty); - } - /* - * XXX does PARMRK doubling happen for - * EOL_CHAR and EOL2_CHAR? - */ - if (c == (unsigned char) '\377' && I_PARMRK(tty)) - put_tty_queue(c, ldata); - -handle_newline: - set_bit(ldata->read_head & (N_TTY_BUF_SIZE - 1), ldata->read_flags); - put_tty_queue(c, ldata); - smp_store_release(&ldata->canon_head, ldata->read_head); - kill_fasync(&tty->fasync, SIGIO, POLL_IN); - wake_up_interruptible_poll(&tty->read_wait, EPOLLIN | EPOLLRDNORM); - return; - } - } + if (ldata->icanon && n_tty_receive_char_canon(tty, c)) + return; if (L_ECHO(tty)) { finish_erasing(ldata); @@ -1384,7 +1407,7 @@ handle_newline: } /* PARMRK doubling check */ - if (c == (unsigned char) '\377' && I_PARMRK(tty)) + if (c == '\377' && I_PARMRK(tty)) put_tty_queue(c, ldata); put_tty_queue(c, ldata); @@ -1402,7 +1425,7 @@ handle_newline: * caller holds non-exclusive %termios_rwsem * publishes canon_head if canonical mode is active */ -static void n_tty_receive_char(struct tty_struct *tty, unsigned char c) +static void n_tty_receive_char(struct tty_struct *tty, u8 c) { struct n_tty_data *ldata = tty->disc_data; @@ -1419,12 +1442,12 @@ static void n_tty_receive_char(struct tty_struct *tty, unsigned char c) commit_echoes(tty); } /* PARMRK doubling check */ - if (c == (unsigned char) '\377' && I_PARMRK(tty)) + if (c == '\377' && I_PARMRK(tty)) put_tty_queue(c, ldata); put_tty_queue(c, ldata); } -static void n_tty_receive_char_closing(struct tty_struct *tty, unsigned char c, +static void n_tty_receive_char_closing(struct tty_struct *tty, u8 c, bool lookahead_done) { if (I_ISTRIP(tty)) @@ -1444,7 +1467,7 @@ static void n_tty_receive_char_closing(struct tty_struct *tty, unsigned char c, } static void -n_tty_receive_char_flagged(struct tty_struct *tty, unsigned char c, char flag) +n_tty_receive_char_flagged(struct tty_struct *tty, u8 c, u8 flag) { switch (flag) { case TTY_BREAK: @@ -1458,13 +1481,13 @@ n_tty_receive_char_flagged(struct tty_struct *tty, unsigned char c, char flag) n_tty_receive_overrun(tty); break; default: - tty_err(tty, "unknown flag %d\n", flag); + tty_err(tty, "unknown flag %u\n", flag); break; } } static void -n_tty_receive_char_lnext(struct tty_struct *tty, unsigned char c, char flag) +n_tty_receive_char_lnext(struct tty_struct *tty, u8 c, u8 flag) { struct n_tty_data *ldata = tty->disc_data; @@ -1480,11 +1503,11 @@ n_tty_receive_char_lnext(struct tty_struct *tty, unsigned char c, char flag) } /* Caller must ensure count > 0 */ -static void n_tty_lookahead_flow_ctrl(struct tty_struct *tty, const unsigned char *cp, - const unsigned char *fp, unsigned int count) +static void n_tty_lookahead_flow_ctrl(struct tty_struct *tty, const u8 *cp, + const u8 *fp, size_t count) { struct n_tty_data *ldata = tty->disc_data; - unsigned char flag = TTY_NORMAL; + u8 flag = TTY_NORMAL; ldata->lookahead_count += count; @@ -1501,31 +1524,30 @@ static void n_tty_lookahead_flow_ctrl(struct tty_struct *tty, const unsigned cha } static void -n_tty_receive_buf_real_raw(struct tty_struct *tty, const unsigned char *cp, - const char *fp, int count) +n_tty_receive_buf_real_raw(const struct tty_struct *tty, const u8 *cp, + size_t count) { struct n_tty_data *ldata = tty->disc_data; - size_t n, head; - head = ldata->read_head & (N_TTY_BUF_SIZE - 1); - n = min_t(size_t, count, N_TTY_BUF_SIZE - head); - memcpy(read_buf_addr(ldata, head), cp, n); - ldata->read_head += n; - cp += n; - count -= n; + /* handle buffer wrap-around by a loop */ + for (unsigned int i = 0; i < 2; i++) { + size_t head = MASK(ldata->read_head); + size_t n = min(count, N_TTY_BUF_SIZE - head); - head = ldata->read_head & (N_TTY_BUF_SIZE - 1); - n = min_t(size_t, count, N_TTY_BUF_SIZE - head); - memcpy(read_buf_addr(ldata, head), cp, n); - ldata->read_head += n; + memcpy(read_buf_addr(ldata, head), cp, n); + + ldata->read_head += n; + cp += n; + count -= n; + } } static void -n_tty_receive_buf_raw(struct tty_struct *tty, const unsigned char *cp, - const char *fp, int count) +n_tty_receive_buf_raw(struct tty_struct *tty, const u8 *cp, const u8 *fp, + size_t count) { struct n_tty_data *ldata = tty->disc_data; - char flag = TTY_NORMAL; + u8 flag = TTY_NORMAL; while (count--) { if (fp) @@ -1538,10 +1560,10 @@ n_tty_receive_buf_raw(struct tty_struct *tty, const unsigned char *cp, } static void -n_tty_receive_buf_closing(struct tty_struct *tty, const unsigned char *cp, - const char *fp, int count, bool lookahead_done) +n_tty_receive_buf_closing(struct tty_struct *tty, const u8 *cp, const u8 *fp, + size_t count, bool lookahead_done) { - char flag = TTY_NORMAL; + u8 flag = TTY_NORMAL; while (count--) { if (fp) @@ -1551,14 +1573,15 @@ n_tty_receive_buf_closing(struct tty_struct *tty, const unsigned char *cp, } } -static void n_tty_receive_buf_standard(struct tty_struct *tty, - const unsigned char *cp, const char *fp, int count, bool lookahead_done) +static void n_tty_receive_buf_standard(struct tty_struct *tty, const u8 *cp, + const u8 *fp, size_t count, + bool lookahead_done) { struct n_tty_data *ldata = tty->disc_data; - char flag = TTY_NORMAL; + u8 flag = TTY_NORMAL; while (count--) { - unsigned char c = *cp++; + u8 c = *cp++; if (fp) flag = *fp++; @@ -1589,15 +1612,15 @@ static void n_tty_receive_buf_standard(struct tty_struct *tty, } } -static void __receive_buf(struct tty_struct *tty, const unsigned char *cp, - const char *fp, int count) +static void __receive_buf(struct tty_struct *tty, const u8 *cp, const u8 *fp, + size_t count) { struct n_tty_data *ldata = tty->disc_data; bool preops = I_ISTRIP(tty) || (I_IUCLC(tty) && L_IEXTEN(tty)); - size_t la_count = min_t(size_t, ldata->lookahead_count, count); + size_t la_count = min(ldata->lookahead_count, count); if (ldata->real_raw) - n_tty_receive_buf_real_raw(tty, cp, fp, count); + n_tty_receive_buf_real_raw(tty, cp, count); else if (ldata->raw || (L_EXTPROC(tty) && !preops)) n_tty_receive_buf_raw(tty, cp, fp, count); else if (tty->closing && !L_EXTPROC(tty)) { @@ -1663,12 +1686,13 @@ static void __receive_buf(struct tty_struct *tty, const unsigned char *cp, * claims non-exclusive %termios_rwsem * publishes commit_head or canon_head */ -static int -n_tty_receive_buf_common(struct tty_struct *tty, const unsigned char *cp, - const char *fp, int count, int flow) +static size_t +n_tty_receive_buf_common(struct tty_struct *tty, const u8 *cp, const u8 *fp, + size_t count, bool flow) { struct n_tty_data *ldata = tty->disc_data; - int room, n, rcvd = 0, overflow; + size_t n, rcvd = 0; + int room, overflow; down_read(&tty->termios_rwsem); @@ -1701,7 +1725,7 @@ n_tty_receive_buf_common(struct tty_struct *tty, const unsigned char *cp, } else overflow = 0; - n = min(count, room); + n = min_t(size_t, count, room); if (!n) break; @@ -1744,16 +1768,16 @@ n_tty_receive_buf_common(struct tty_struct *tty, const unsigned char *cp, return rcvd; } -static void n_tty_receive_buf(struct tty_struct *tty, const unsigned char *cp, - const char *fp, int count) +static void n_tty_receive_buf(struct tty_struct *tty, const u8 *cp, + const u8 *fp, size_t count) { - n_tty_receive_buf_common(tty, cp, fp, count, 0); + n_tty_receive_buf_common(tty, cp, fp, count, false); } -static int n_tty_receive_buf2(struct tty_struct *tty, const unsigned char *cp, - const char *fp, int count) +static size_t n_tty_receive_buf2(struct tty_struct *tty, const u8 *cp, + const u8 *fp, size_t count) { - return n_tty_receive_buf_common(tty, cp, fp, count, 1); + return n_tty_receive_buf_common(tty, cp, fp, count, true); } /** @@ -1779,8 +1803,7 @@ static void n_tty_set_termios(struct tty_struct *tty, const struct ktermios *old ldata->canon_head = ldata->read_tail; ldata->push = 0; } else { - set_bit((ldata->read_head - 1) & (N_TTY_BUF_SIZE - 1), - ldata->read_flags); + set_bit(MASK(ldata->read_head - 1), ldata->read_flags); ldata->canon_head = ldata->read_head; ldata->push = 1; } @@ -1903,9 +1926,9 @@ static int n_tty_open(struct tty_struct *tty) return 0; } -static inline int input_available_p(struct tty_struct *tty, int poll) +static inline int input_available_p(const struct tty_struct *tty, int poll) { - struct n_tty_data *ldata = tty->disc_data; + const struct n_tty_data *ldata = tty->disc_data; int amt = poll && !TIME_CHAR(tty) && MIN_CHAR(tty) ? MIN_CHAR(tty) : 1; if (ldata->icanon && !L_EXTPROC(tty)) @@ -1932,21 +1955,20 @@ static inline int input_available_p(struct tty_struct *tty, int poll) * caller holds non-exclusive %termios_rwsem; * read_tail published */ -static bool copy_from_read_buf(struct tty_struct *tty, - unsigned char **kbp, - size_t *nr) +static bool copy_from_read_buf(const struct tty_struct *tty, u8 **kbp, + size_t *nr) { struct n_tty_data *ldata = tty->disc_data; size_t n; bool is_eof; size_t head = smp_load_acquire(&ldata->commit_head); - size_t tail = ldata->read_tail & (N_TTY_BUF_SIZE - 1); + size_t tail = MASK(ldata->read_tail); n = min(head - ldata->read_tail, N_TTY_BUF_SIZE - tail); n = min(*nr, n); if (n) { - unsigned char *from = read_buf_addr(ldata, tail); + u8 *from = read_buf_addr(ldata, tail); memcpy(*kbp, from, n); is_eof = n == 1 && *from == EOF_CHAR(tty); tty_audit_add_data(tty, from, n); @@ -1987,8 +2009,7 @@ static bool copy_from_read_buf(struct tty_struct *tty, * caller holds non-exclusive %termios_rwsem; * read_tail published */ -static bool canon_copy_from_read_buf(struct tty_struct *tty, - unsigned char **kbp, +static bool canon_copy_from_read_buf(const struct tty_struct *tty, u8 **kbp, size_t *nr) { struct n_tty_data *ldata = tty->disc_data; @@ -2004,7 +2025,7 @@ static bool canon_copy_from_read_buf(struct tty_struct *tty, canon_head = smp_load_acquire(&ldata->canon_head); n = min(*nr, canon_head - ldata->read_tail); - tail = ldata->read_tail & (N_TTY_BUF_SIZE - 1); + tail = MASK(ldata->read_tail); size = min_t(size_t, tail + n, N_TTY_BUF_SIZE); n_tty_trace("%s: nr:%zu tail:%zu n:%zu size:%zu\n", @@ -2056,9 +2077,8 @@ static bool canon_copy_from_read_buf(struct tty_struct *tty, * EOF (special EOL character that's a __DISABLED_CHAR) * in the stream, silently eat the EOF. */ -static void canon_skip_eof(struct tty_struct *tty) +static void canon_skip_eof(struct n_tty_data *ldata) { - struct n_tty_data *ldata = tty->disc_data; size_t tail, canon_head; canon_head = smp_load_acquire(&ldata->canon_head); @@ -2128,12 +2148,11 @@ static int job_control(struct tty_struct *tty, struct file *file) * claims non-exclusive termios_rwsem; * publishes read_tail */ -static ssize_t n_tty_read(struct tty_struct *tty, struct file *file, - unsigned char *kbuf, size_t nr, - void **cookie, unsigned long offset) +static ssize_t n_tty_read(struct tty_struct *tty, struct file *file, u8 *kbuf, + size_t nr, void **cookie, unsigned long offset) { struct n_tty_data *ldata = tty->disc_data; - unsigned char *kb = kbuf; + u8 *kb = kbuf; DEFINE_WAIT_FUNC(wait, woken_wake_function); int c; int minimum, time; @@ -2156,7 +2175,7 @@ static ssize_t n_tty_read(struct tty_struct *tty, struct file *file, * releasing the lock and returning done. */ if (!nr) - canon_skip_eof(tty); + canon_skip_eof(ldata); else if (canon_copy_from_read_buf(tty, &kb, &nr)) return kb - kbuf; } else { @@ -2209,7 +2228,7 @@ static ssize_t n_tty_read(struct tty_struct *tty, struct file *file, while (nr) { /* First test for status change. */ if (packet && tty->link->ctrl.pktstatus) { - unsigned char cs; + u8 cs; if (kb != kbuf) break; spin_lock_irq(&tty->link->ctrl.lock); @@ -2332,12 +2351,11 @@ more_to_be_read: */ static ssize_t n_tty_write(struct tty_struct *tty, struct file *file, - const unsigned char *buf, size_t nr) + const u8 *buf, size_t nr) { - const unsigned char *b = buf; + const u8 *b = buf; DEFINE_WAIT_FUNC(wait, woken_wake_function); - int c; - ssize_t retval = 0; + ssize_t num, retval = 0; /* Job control check -- must be done at start (POSIX.1 7.1.1.4). */ if (L_TOSTOP(tty) && file->f_op->write_iter != redirected_tty_write) { @@ -2363,7 +2381,7 @@ static ssize_t n_tty_write(struct tty_struct *tty, struct file *file, } if (O_OPOST(tty)) { while (nr > 0) { - ssize_t num = process_output_block(tty, b, nr); + num = process_output_block(tty, b, nr); if (num < 0) { if (num == -EAGAIN) break; @@ -2374,8 +2392,7 @@ static ssize_t n_tty_write(struct tty_struct *tty, struct file *file, nr -= num; if (nr == 0) break; - c = *b; - if (process_output(c, tty) < 0) + if (process_output(*b, tty) < 0) break; b++; nr--; } @@ -2386,16 +2403,16 @@ static ssize_t n_tty_write(struct tty_struct *tty, struct file *file, while (nr > 0) { mutex_lock(&ldata->output_lock); - c = tty->ops->write(tty, b, nr); + num = tty->ops->write(tty, b, nr); mutex_unlock(&ldata->output_lock); - if (c < 0) { - retval = c; + if (num < 0) { + retval = num; goto break_out; } - if (!c) + if (!num) break; - b += c; - nr -= c; + b += num; + nr -= num; } } if (!nr) @@ -2470,7 +2487,7 @@ static unsigned long inq_canon(struct n_tty_data *ldata) nr = head - tail; /* Skip EOF-chars.. */ while (MASK(head) != MASK(tail)) { - if (test_bit(tail & (N_TTY_BUF_SIZE - 1), ldata->read_flags) && + if (test_bit(MASK(tail), ldata->read_flags) && read_buf(ldata, tail) == __DISABLED_CHAR) nr--; tail++; diff --git a/drivers/tty/nozomi.c b/drivers/tty/nozomi.c index 0454c78deee6..02cd40147b3a 100644 --- a/drivers/tty/nozomi.c +++ b/drivers/tty/nozomi.c @@ -1599,8 +1599,8 @@ static void ntty_hangup(struct tty_struct *tty) * called when the userspace process writes to the tty (/dev/noz*). * Data is inserted into a fifo, which is then read and transferred to the modem. */ -static int ntty_write(struct tty_struct *tty, const unsigned char *buffer, - int count) +static ssize_t ntty_write(struct tty_struct *tty, const u8 *buffer, + size_t count) { int rval = -EINVAL; struct nozomi *dc = get_dc_by_tty(tty); @@ -1610,7 +1610,7 @@ static int ntty_write(struct tty_struct *tty, const unsigned char *buffer, if (!dc || !port) return -ENODEV; - rval = kfifo_in(&port->fifo_ul, (unsigned char *)buffer, count); + rval = kfifo_in(&port->fifo_ul, buffer, count); spin_lock_irqsave(&dc->spin_mutex, flags); /* CTS is only valid on the modem channel */ diff --git a/drivers/tty/pty.c b/drivers/tty/pty.c index 2b1c8ab99dba..df08f13052ff 100644 --- a/drivers/tty/pty.c +++ b/drivers/tty/pty.c @@ -108,7 +108,7 @@ static void pty_unthrottle(struct tty_struct *tty) * the other side of the pty/tty pair. */ -static int pty_write(struct tty_struct *tty, const unsigned char *buf, int c) +static ssize_t pty_write(struct tty_struct *tty, const u8 *buf, size_t c) { struct tty_struct *to = tty->link; diff --git a/drivers/tty/rpmsg_tty.c b/drivers/tty/rpmsg_tty.c index 29db413bbc03..60a2915f5cfe 100644 --- a/drivers/tty/rpmsg_tty.c +++ b/drivers/tty/rpmsg_tty.c @@ -73,7 +73,8 @@ static void rpmsg_tty_close(struct tty_struct *tty, struct file *filp) return tty_port_close(tty->port, tty, filp); } -static int rpmsg_tty_write(struct tty_struct *tty, const u8 *buf, int len) +static ssize_t rpmsg_tty_write(struct tty_struct *tty, const u8 *buf, + size_t len) { struct rpmsg_tty_port *cport = tty->driver_data; struct rpmsg_device *rpdev; @@ -86,7 +87,7 @@ static int rpmsg_tty_write(struct tty_struct *tty, const u8 *buf, int len) if (msg_max_size < 0) return msg_max_size; - msg_size = min(len, msg_max_size); + msg_size = min_t(unsigned int, len, msg_max_size); /* * Use rpmsg_trysend instead of rpmsg_send to send the message so the caller is not diff --git a/drivers/tty/serdev/serdev-ttyport.c b/drivers/tty/serdev/serdev-ttyport.c index 8033ef19669c..e3856814ce77 100644 --- a/drivers/tty/serdev/serdev-ttyport.c +++ b/drivers/tty/serdev/serdev-ttyport.c @@ -22,8 +22,8 @@ struct serport { * Callback functions from the tty port. */ -static int ttyport_receive_buf(struct tty_port *port, const unsigned char *cp, - const unsigned char *fp, size_t count) +static size_t ttyport_receive_buf(struct tty_port *port, const u8 *cp, + const u8 *fp, size_t count) { struct serdev_controller *ctrl = port->client_data; struct serport *serport = serdev_controller_get_drvdata(ctrl); diff --git a/drivers/tty/serial/21285.c b/drivers/tty/serial/21285.c index 185462fd959c..d756fcc884cb 100644 --- a/drivers/tty/serial/21285.c +++ b/drivers/tty/serial/21285.c @@ -117,7 +117,8 @@ static void serial21285_stop_rx(struct uart_port *port) static irqreturn_t serial21285_rx_chars(int irq, void *dev_id) { struct uart_port *port = dev_id; - unsigned int status, ch, flag, rxs, max_count = 256; + unsigned int status, rxs, max_count = 256; + u8 ch, flag; status = *CSR_UARTFLG; while (!(status & 0x10) && max_count--) { diff --git a/drivers/tty/serial/8250/8250_bcm7271.c b/drivers/tty/serial/8250/8250_bcm7271.c index d4b05d7ad9e8..aa5aff046756 100644 --- a/drivers/tty/serial/8250/8250_bcm7271.c +++ b/drivers/tty/serial/8250/8250_bcm7271.c @@ -1042,7 +1042,7 @@ static int brcmuart_probe(struct platform_device *pdev) dev_dbg(dev, "DMA is %senabled\n", priv->dma_enabled ? "" : "not "); memset(&up, 0, sizeof(up)); - up.port.type = PORT_16550A; + up.port.type = PORT_BCM7271; up.port.uartclk = clk_rate; up.port.dev = dev; up.port.mapbase = mapbase; @@ -1056,8 +1056,6 @@ static int brcmuart_probe(struct platform_device *pdev) | UPF_FIXED_PORT | UPF_FIXED_TYPE; up.port.dev = dev; up.port.private_data = priv; - up.capabilities = UART_CAP_FIFO | UART_CAP_AFE; - up.port.fifosize = 32; /* Check for a fixed line number */ ret = of_alias_get_id(np, "serial"); diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index 7db51781289e..f4cafca1a7da 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -523,7 +523,10 @@ static int dw8250_probe(struct platform_device *pdev) if (!regs) return dev_err_probe(dev, -EINVAL, "no registers defined\n"); - irq = platform_get_irq(pdev, 0); + irq = platform_get_irq_optional(pdev, 0); + /* no interrupt -> fall back to polling */ + if (irq == -ENXIO) + irq = 0; if (irq < 0) return irq; diff --git a/drivers/tty/serial/8250/8250_early.c b/drivers/tty/serial/8250/8250_early.c index 4299a8bd83d9..9837a27739fd 100644 --- a/drivers/tty/serial/8250/8250_early.c +++ b/drivers/tty/serial/8250/8250_early.c @@ -27,7 +27,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/tty/serial/8250/8250_ingenic.c b/drivers/tty/serial/8250/8250_ingenic.c index 617b8ce60d6b..4c4c4da73ad0 100644 --- a/drivers/tty/serial/8250/8250_ingenic.c +++ b/drivers/tty/serial/8250/8250_ingenic.c @@ -13,7 +13,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/tty/serial/8250/8250_men_mcb.c b/drivers/tty/serial/8250/8250_men_mcb.c index f46ca13ff4aa..dc9e093b1cb3 100644 --- a/drivers/tty/serial/8250/8250_men_mcb.c +++ b/drivers/tty/serial/8250/8250_men_mcb.c @@ -12,11 +12,42 @@ #define MEN_UART_ID_Z057 0x39 #define MEN_UART_ID_Z125 0x7d -#define MEN_UART_MEM_SIZE 0x10 +/* + * IP Cores Z025 and Z057 can have up to 4 UART + * The UARTs available are stored in a global + * register saved in physical address + 0x40 + * Is saved as follows: + * + * 7 0 + * +------+-------+-------+-------+-------+-------+-------+-------+ + * |UART4 | UART3 | UART2 | UART1 | U4irq | U3irq | U2irq | U1irq | + * +------+-------+-------+-------+-------+-------+-------+-------+ + */ +#define MEN_UART1_MASK 0x01 +#define MEN_UART2_MASK 0x02 +#define MEN_UART3_MASK 0x04 +#define MEN_UART4_MASK 0x08 + +#define MEN_Z125_UARTS_AVAILABLE 0x01 + +#define MEN_Z025_MAX_UARTS 4 +#define MEN_UART_MEM_SIZE 0x10 +#define MEM_UART_REGISTER_SIZE 0x01 +#define MEN_Z025_REGISTER_OFFSET 0x40 + +#define MEN_UART1_OFFSET 0 +#define MEN_UART2_OFFSET (MEN_UART1_OFFSET + MEN_UART_MEM_SIZE) +#define MEN_UART3_OFFSET (MEN_UART2_OFFSET + MEN_UART_MEM_SIZE) +#define MEN_UART4_OFFSET (MEN_UART3_OFFSET + MEN_UART_MEM_SIZE) + +#define MEN_READ_REGISTER(addr) readb(addr) + +#define MAX_PORTS 4 struct serial_8250_men_mcb_data { - struct uart_8250_port uart; - int line; + int num_ports; + int line[MAX_PORTS]; + unsigned int offset[MAX_PORTS]; }; /* @@ -37,10 +68,10 @@ static u32 men_lookup_uartclk(struct mcb_device *mdev) clkval = 1041666; else if (strncmp(mdev->bus->name, "F216", 4) == 0) clkval = 1843200; - else if (strncmp(mdev->bus->name, "G215", 4) == 0) - clkval = 1843200; else if (strncmp(mdev->bus->name, "F210", 4) == 0) clkval = 115200; + else if (strstr(mdev->bus->name, "215")) + clkval = 1843200; else dev_info(&mdev->dev, "board not detected, using default uartclk\n"); @@ -50,16 +81,98 @@ static u32 men_lookup_uartclk(struct mcb_device *mdev) return clkval; } -static int get_num_ports(struct mcb_device *mdev, - void __iomem *membase) +static int read_uarts_available_from_register(struct resource *mem_res, + u8 *uarts_available) +{ + void __iomem *mem; + int reg_value; + + if (!request_mem_region(mem_res->start + MEN_Z025_REGISTER_OFFSET, + MEM_UART_REGISTER_SIZE, KBUILD_MODNAME)) { + return -EBUSY; + } + + mem = ioremap(mem_res->start + MEN_Z025_REGISTER_OFFSET, + MEM_UART_REGISTER_SIZE); + if (!mem) { + release_mem_region(mem_res->start + MEN_Z025_REGISTER_OFFSET, + MEM_UART_REGISTER_SIZE); + return -ENOMEM; + } + + reg_value = MEN_READ_REGISTER(mem); + + iounmap(mem); + + release_mem_region(mem_res->start + MEN_Z025_REGISTER_OFFSET, + MEM_UART_REGISTER_SIZE); + + *uarts_available = reg_value >> 4; + + return 0; +} + +static int read_serial_data(struct mcb_device *mdev, + struct resource *mem_res, + struct serial_8250_men_mcb_data *serial_data) +{ + u8 uarts_available; + int count = 0; + int mask; + int res; + int i; + + res = read_uarts_available_from_register(mem_res, &uarts_available); + if (res < 0) + return res; + + for (i = 0; i < MAX_PORTS; i++) { + mask = 0x1 << i; + switch (uarts_available & mask) { + case MEN_UART1_MASK: + serial_data->offset[count] = MEN_UART1_OFFSET; + count++; + break; + case MEN_UART2_MASK: + serial_data->offset[count] = MEN_UART2_OFFSET; + count++; + break; + case MEN_UART3_MASK: + serial_data->offset[count] = MEN_UART3_OFFSET; + count++; + break; + case MEN_UART4_MASK: + serial_data->offset[count] = MEN_UART4_OFFSET; + count++; + break; + default: + return -EINVAL; + } + } + + if (count <= 0 || count > MAX_PORTS) { + dev_err(&mdev->dev, "unexpected number of ports: %u\n", + count); + return -ENODEV; + } + + serial_data->num_ports = count; + + return 0; +} + +static int init_serial_data(struct mcb_device *mdev, + struct resource *mem_res, + struct serial_8250_men_mcb_data *serial_data) { switch (mdev->id) { case MEN_UART_ID_Z125: - return 1U; + serial_data->num_ports = 1; + serial_data->offset[0] = 0; + return 0; case MEN_UART_ID_Z025: - return readb(membase) >> 4; case MEN_UART_ID_Z057: - return 4U; + return read_serial_data(mdev, mem_res, serial_data); default: dev_err(&mdev->dev, "no supported device!\n"); return -ENODEV; @@ -69,62 +182,54 @@ static int get_num_ports(struct mcb_device *mdev, static int serial_8250_men_mcb_probe(struct mcb_device *mdev, const struct mcb_device_id *id) { + struct uart_8250_port uart; struct serial_8250_men_mcb_data *data; struct resource *mem; - int num_ports; int i; - void __iomem *membase; + int res; mem = mcb_get_resource(mdev, IORESOURCE_MEM); if (mem == NULL) return -ENXIO; - membase = devm_ioremap_resource(&mdev->dev, mem); - if (IS_ERR(membase)) - return PTR_ERR_OR_ZERO(membase); - num_ports = get_num_ports(mdev, membase); - - dev_dbg(&mdev->dev, "found a 16z%03u with %u ports\n", - mdev->id, num_ports); - - if (num_ports <= 0 || num_ports > 4) { - dev_err(&mdev->dev, "unexpected number of ports: %u\n", - num_ports); - return -ENODEV; - } - - data = devm_kcalloc(&mdev->dev, num_ports, + data = devm_kzalloc(&mdev->dev, sizeof(struct serial_8250_men_mcb_data), GFP_KERNEL); if (!data) return -ENOMEM; + res = init_serial_data(mdev, mem, data); + if (res < 0) + return res; + + dev_dbg(&mdev->dev, "found a 16z%03u with %u ports\n", + mdev->id, data->num_ports); + mcb_set_drvdata(mdev, data); - for (i = 0; i < num_ports; i++) { - data[i].uart.port.dev = mdev->dma_dev; - spin_lock_init(&data[i].uart.port.lock); + for (i = 0; i < data->num_ports; i++) { + memset(&uart, 0, sizeof(struct uart_8250_port)); + spin_lock_init(&uart.port.lock); - data[i].uart.port.type = PORT_16550; - data[i].uart.port.flags = UPF_SKIP_TEST | UPF_SHARE_IRQ - | UPF_FIXED_TYPE; - data[i].uart.port.iotype = UPIO_MEM; - data[i].uart.port.uartclk = men_lookup_uartclk(mdev); - data[i].uart.port.regshift = 0; - data[i].uart.port.irq = mcb_get_irq(mdev); - data[i].uart.port.membase = membase; - data[i].uart.port.fifosize = 60; - data[i].uart.port.mapbase = (unsigned long) mem->start - + i * MEN_UART_MEM_SIZE; - data[i].uart.port.iobase = data[i].uart.port.mapbase; + uart.port.flags = UPF_SKIP_TEST | + UPF_SHARE_IRQ | + UPF_BOOT_AUTOCONF | + UPF_IOREMAP; + uart.port.iotype = UPIO_MEM; + uart.port.uartclk = men_lookup_uartclk(mdev); + uart.port.irq = mcb_get_irq(mdev); + uart.port.mapbase = (unsigned long) mem->start + + data->offset[i]; /* ok, register the port */ - data[i].line = serial8250_register_8250_port(&data[i].uart); - if (data[i].line < 0) { + res = serial8250_register_8250_port(&uart); + if (res < 0) { dev_err(&mdev->dev, "unable to register UART port\n"); - return data[i].line; + return res; } - dev_info(&mdev->dev, "found MCB UART: ttyS%d\n", data[i].line); + + data->line[i] = res; + dev_info(&mdev->dev, "found MCB UART: ttyS%d\n", data->line[i]); } return 0; @@ -132,20 +237,14 @@ static int serial_8250_men_mcb_probe(struct mcb_device *mdev, static void serial_8250_men_mcb_remove(struct mcb_device *mdev) { - int num_ports, i; + int i; struct serial_8250_men_mcb_data *data = mcb_get_drvdata(mdev); if (!data) return; - num_ports = get_num_ports(mdev, data[0].uart.port.membase); - if (num_ports <= 0 || num_ports > 4) { - dev_err(&mdev->dev, "error retrieving number of ports!\n"); - return; - } - - for (i = 0; i < num_ports; i++) - serial8250_unregister_port(data[i].line); + for (i = 0; i < data->num_ports; i++) + serial8250_unregister_port(data->line[i]); } static const struct mcb_device_id serial_8250_men_mcb_ids[] = { @@ -159,7 +258,6 @@ MODULE_DEVICE_TABLE(mcb, serial_8250_men_mcb_ids); static struct mcb_driver mcb_driver = { .driver = { .name = "8250_men_mcb", - .owner = THIS_MODULE, }, .probe = serial_8250_men_mcb_probe, .remove = serial_8250_men_mcb_remove, diff --git a/drivers/tty/serial/8250/8250_omap.c b/drivers/tty/serial/8250/8250_omap.c index d48a82f1634e..26dd089d8e82 100644 --- a/drivers/tty/serial/8250/8250_omap.c +++ b/drivers/tty/serial/8250/8250_omap.c @@ -18,7 +18,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/tty/serial/8250/8250_pci.c b/drivers/tty/serial/8250/8250_pci.c index d2d547b5da95..62a9bd30b4db 100644 --- a/drivers/tty/serial/8250/8250_pci.c +++ b/drivers/tty/serial/8250/8250_pci.c @@ -67,6 +67,8 @@ static const struct pci_device_id pci_use_msi[] = { 0xA000, 0x1000) }, { PCI_DEVICE_SUB(PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9922, 0xA000, 0x1000) }, + { PCI_DEVICE_SUB(PCI_VENDOR_ID_ASIX, PCI_DEVICE_ID_ASIX_AX99100, + 0xA000, 0x1000) }, { PCI_DEVICE_SUB(PCI_VENDOR_ID_HP_3PAR, PCI_DEVICE_ID_HPE_PCI_SERIAL, PCI_ANY_ID, PCI_ANY_ID) }, { } @@ -5557,6 +5559,14 @@ static const struct pci_device_id serial_pci_tbl[] = { { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9865, 0xA000, 0x3004, 0, 0, pbn_b0_bt_4_115200 }, + + /* + * ASIX AX99100 PCIe to Multi I/O Controller + */ + { PCI_VENDOR_ID_ASIX, PCI_DEVICE_ID_ASIX_AX99100, + 0xA000, 0x1000, + 0, 0, pbn_b0_1_115200 }, + /* Intel CE4100 */ { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CE4100_UART, PCI_ANY_ID, PCI_ANY_ID, 0, 0, diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/8250_port.c index 483bb552cdc4..fb891b67968f 100644 --- a/drivers/tty/serial/8250/8250_port.c +++ b/drivers/tty/serial/8250/8250_port.c @@ -322,6 +322,14 @@ static const struct serial8250_config uart_config[] = { .rxtrig_bytes = {2, 66, 130, 194}, .flags = UART_CAP_FIFO, }, + [PORT_BCM7271] = { + .name = "Broadcom BCM7271 UART", + .fifo_size = 32, + .tx_loadsz = 32, + .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01, + .rxtrig_bytes = {1, 8, 16, 30}, + .flags = UART_CAP_FIFO | UART_CAP_AFE, + }, }; /* Uart divisor latch read */ @@ -1703,8 +1711,7 @@ static void serial8250_enable_ms(struct uart_port *port) void serial8250_read_char(struct uart_8250_port *up, u16 lsr) { struct uart_port *port = &up->port; - unsigned char ch; - char flag = TTY_NORMAL; + u8 ch, flag = TTY_NORMAL; if (likely(lsr & UART_LSR_DR)) ch = serial_in(up, UART_RX); diff --git a/drivers/tty/serial/8250/8250_pxa.c b/drivers/tty/serial/8250/8250_pxa.c index 28b341f602c6..a5b3ea27fc90 100644 --- a/drivers/tty/serial/8250/8250_pxa.c +++ b/drivers/tty/serial/8250/8250_pxa.c @@ -183,6 +183,7 @@ static int __init early_serial_pxa_setup(struct earlycon_device *device, return early_serial8250_setup(device, NULL); } OF_EARLYCON_DECLARE(early_pxa, "mrvl,pxa-uart", early_serial_pxa_setup); +OF_EARLYCON_DECLARE(mmp, "mrvl,mmp-uart", early_serial_pxa_setup); #endif MODULE_AUTHOR("Sergei Ianovich"); diff --git a/drivers/tty/serial/Makefile b/drivers/tty/serial/Makefile index d4123469583d..138abbc89738 100644 --- a/drivers/tty/serial/Makefile +++ b/drivers/tty/serial/Makefile @@ -41,7 +41,7 @@ obj-$(CONFIG_SERIAL_HS_LPC32XX) += lpc32xx_hs.o obj-$(CONFIG_SERIAL_DZ) += dz.o obj-$(CONFIG_SERIAL_ZS) += zs.o obj-$(CONFIG_SERIAL_SH_SCI) += sh-sci.o -obj-$(CONFIG_SERIAL_CPM) += cpm_uart/ +obj-$(CONFIG_SERIAL_CPM) += cpm_uart.o obj-$(CONFIG_SERIAL_IMX) += imx.o obj-$(CONFIG_SERIAL_IMX_EARLYCON) += imx_earlycon.o obj-$(CONFIG_SERIAL_MPC52xx) += mpc52xx_uart.o diff --git a/drivers/tty/serial/altera_jtaguart.c b/drivers/tty/serial/altera_jtaguart.c index 9f843d1cee40..5fab4c978891 100644 --- a/drivers/tty/serial/altera_jtaguart.c +++ b/drivers/tty/serial/altera_jtaguart.c @@ -110,8 +110,8 @@ static void altera_jtaguart_set_termios(struct uart_port *port, static void altera_jtaguart_rx_chars(struct uart_port *port) { - unsigned char ch; - unsigned long status; + u32 status; + u8 ch; while ((status = readl(port->membase + ALTERA_JTAGUART_DATA_REG)) & ALTERA_JTAGUART_DATA_RVALID_MSK) { diff --git a/drivers/tty/serial/altera_uart.c b/drivers/tty/serial/altera_uart.c index 9ce3d24af536..a9c41942190c 100644 --- a/drivers/tty/serial/altera_uart.c +++ b/drivers/tty/serial/altera_uart.c @@ -201,8 +201,8 @@ static void altera_uart_set_termios(struct uart_port *port, static void altera_uart_rx_chars(struct uart_port *port) { - unsigned char ch, flag; unsigned short status; + u8 ch, flag; while ((status = altera_uart_readl(port, ALTERA_UART_STATUS_REG)) & ALTERA_UART_STATUS_RRDY_MSK) { diff --git a/drivers/tty/serial/amba-pl010.c b/drivers/tty/serial/amba-pl010.c index a98fae2ca422..b5a7404cbacb 100644 --- a/drivers/tty/serial/amba-pl010.c +++ b/drivers/tty/serial/amba-pl010.c @@ -112,7 +112,8 @@ static void pl010_enable_ms(struct uart_port *port) static void pl010_rx_chars(struct uart_port *port) { - unsigned int status, ch, flag, rsr, max_count = 256; + unsigned int status, rsr, max_count = 256; + u8 ch, flag; status = readb(port->membase + UART01x_FR); while (UART_RX_DATA(status) && max_count--) { diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c index c5c3f4674459..3dc9b0fcab1c 100644 --- a/drivers/tty/serial/amba-pl011.c +++ b/drivers/tty/serial/amba-pl011.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -36,7 +37,6 @@ #include #include #include -#include #include #include #include @@ -307,9 +307,10 @@ static void pl011_write(unsigned int val, const struct uart_amba_port *uap, */ static int pl011_fifo_to_tty(struct uart_amba_port *uap) { - unsigned int ch, flag, fifotaken; + unsigned int ch, fifotaken; int sysrq; u16 status; + u8 flag; for (fifotaken = 0; fifotaken != 256; fifotaken++) { status = pl011_read(uap, REG_FR); diff --git a/drivers/tty/serial/apbuart.c b/drivers/tty/serial/apbuart.c index 915ee4b0d594..d7658f380838 100644 --- a/drivers/tty/serial/apbuart.c +++ b/drivers/tty/serial/apbuart.c @@ -22,9 +22,6 @@ #include #include #include -#include -#include -#include #include #include #include @@ -70,8 +67,9 @@ static void apbuart_stop_rx(struct uart_port *port) static void apbuart_rx_chars(struct uart_port *port) { - unsigned int status, ch, rsr, flag; + unsigned int status, rsr; unsigned int max_chars = port->fifosize; + u8 ch, flag; status = UART_GET_STATUS(port); diff --git a/drivers/tty/serial/ar933x_uart.c b/drivers/tty/serial/ar933x_uart.c index 4c3d04c6826a..924c1a89347c 100644 --- a/drivers/tty/serial/ar933x_uart.c +++ b/drivers/tty/serial/ar933x_uart.c @@ -749,8 +749,7 @@ static int ar933x_uart_probe(struct platform_device *pdev) port = &up->port; - mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - port->membase = devm_ioremap_resource(&pdev->dev, mem_res); + port->membase = devm_platform_get_and_ioremap_resource(pdev, 0, &mem_res); if (IS_ERR(port->membase)) return PTR_ERR(port->membase); diff --git a/drivers/tty/serial/arc_uart.c b/drivers/tty/serial/arc_uart.c index 4b2512eef577..ad4ae19b6ce3 100644 --- a/drivers/tty/serial/arc_uart.c +++ b/drivers/tty/serial/arc_uart.c @@ -195,8 +195,6 @@ static void arc_serial_start_tx(struct uart_port *port) static void arc_serial_rx_chars(struct uart_port *port, unsigned int status) { - unsigned int ch, flg = 0; - /* * UART has 4 deep RX-FIFO. Driver's recongnition of this fact * is very subtle. Here's how ... @@ -207,24 +205,23 @@ static void arc_serial_rx_chars(struct uart_port *port, unsigned int status) * controller, which is indeed the Rx-FIFO. */ do { + u8 ch, flg = TTY_NORMAL; + /* * This could be an Rx Intr for err (no data), * so check err and clear that Intr first */ - if (unlikely(status & (RXOERR | RXFERR))) { - if (status & RXOERR) { - port->icount.overrun++; - flg = TTY_OVERRUN; - UART_CLR_STATUS(port, RXOERR); - } + if (status & RXOERR) { + port->icount.overrun++; + flg = TTY_OVERRUN; + UART_CLR_STATUS(port, RXOERR); + } - if (status & RXFERR) { - port->icount.frame++; - flg = TTY_FRAME; - UART_CLR_STATUS(port, RXFERR); - } - } else - flg = TTY_NORMAL; + if (status & RXFERR) { + port->icount.frame++; + flg = TTY_FRAME; + UART_CLR_STATUS(port, RXFERR); + } if (status & RXEMPTY) continue; diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c index 3467a875641a..88cdafa5ac54 100644 --- a/drivers/tty/serial/atmel_serial.c +++ b/drivers/tty/serial/atmel_serial.c @@ -21,7 +21,6 @@ #include #include #include -#include #include #include #include @@ -1516,8 +1515,8 @@ static void atmel_rx_from_ring(struct uart_port *port) { struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); struct circ_buf *ring = &atmel_port->rx_ring; - unsigned int flg; unsigned int status; + u8 flg; while (ring->head != ring->tail) { struct atmel_uart_char c; diff --git a/drivers/tty/serial/bcm63xx_uart.c b/drivers/tty/serial/bcm63xx_uart.c index 55e82d0bf92d..0dd8cceb837c 100644 --- a/drivers/tty/serial/bcm63xx_uart.c +++ b/drivers/tty/serial/bcm63xx_uart.c @@ -832,14 +832,10 @@ static int bcm_uart_probe(struct platform_device *pdev) return -EBUSY; memset(port, 0, sizeof(*port)); - res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res_mem) - return -ENODEV; - - port->mapbase = res_mem->start; - port->membase = devm_ioremap_resource(&pdev->dev, res_mem); + port->membase = devm_platform_get_and_ioremap_resource(pdev, 0, &res_mem); if (IS_ERR(port->membase)) return PTR_ERR(port->membase); + port->mapbase = res_mem->start; ret = platform_get_irq(pdev, 0); if (ret < 0) diff --git a/drivers/tty/serial/clps711x.c b/drivers/tty/serial/clps711x.c index e49bc4019b50..55d19937efbd 100644 --- a/drivers/tty/serial/clps711x.c +++ b/drivers/tty/serial/clps711x.c @@ -92,8 +92,9 @@ static irqreturn_t uart_clps711x_int_rx(int irq, void *dev_id) { struct uart_port *port = dev_id; struct clps711x_port *s = dev_get_drvdata(port->dev); - unsigned int status, flg; + unsigned int status; u16 ch; + u8 flg; for (;;) { u32 sysflg = 0; @@ -450,8 +451,7 @@ static int uart_clps711x_probe(struct platform_device *pdev) if (IS_ERR(uart_clk)) return PTR_ERR(uart_clk); - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - s->port.membase = devm_ioremap_resource(&pdev->dev, res); + s->port.membase = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(s->port.membase)) return PTR_ERR(s->port.membase); diff --git a/drivers/tty/serial/cpm_uart/cpm_uart_core.c b/drivers/tty/serial/cpm_uart.c similarity index 90% rename from drivers/tty/serial/cpm_uart/cpm_uart_core.c rename to drivers/tty/serial/cpm_uart.c index 66afa9bea6bf..626423022d62 100644 --- a/drivers/tty/serial/cpm_uart/cpm_uart_core.c +++ b/drivers/tty/serial/cpm_uart.c @@ -26,17 +26,17 @@ #include #include #include -#include #include #include #include #include #include +#include + #include #include #include -#include #include #include @@ -48,14 +48,17 @@ /**************************************************************/ static int cpm_uart_tx_pump(struct uart_port *port); -static void cpm_uart_init_smc(struct uart_cpm_port *pinfo); -static void cpm_uart_init_scc(struct uart_cpm_port *pinfo); static void cpm_uart_initbd(struct uart_cpm_port *pinfo); /**************************************************************/ #define HW_BUF_SPD_THRESHOLD 2400 +static void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd) +{ + cpm_command(port->command, cmd); +} + /* * Check, if transmit buffers are processed */ @@ -605,7 +608,7 @@ static void cpm_uart_set_termios(struct uart_port *port, if (pinfo->clk) clk_set_rate(pinfo->clk, baud); else - cpm_set_brg(pinfo->brg - 1, baud); + cpm_setbrg(pinfo->brg - 1, baud); spin_unlock_irqrestore(&port->lock, flags); } @@ -771,7 +774,8 @@ static void cpm_uart_init_scc(struct uart_cpm_port *pinfo) * parameter ram. */ - cpm_set_scc_fcr(sup); + out_8(&sup->scc_genscc.scc_rfcr, CPMFCR_GBL | CPMFCR_EB); + out_8(&sup->scc_genscc.scc_tfcr, CPMFCR_GBL | CPMFCR_EB); out_be16(&sup->scc_genscc.scc_mrblr, pinfo->rx_fifosize); out_be16(&sup->scc_maxidl, 0x10); @@ -842,7 +846,8 @@ static void cpm_uart_init_smc(struct uart_cpm_port *pinfo) /* Set up the uart parameters in the * parameter ram. */ - cpm_set_smc_fcr(up); + out_8(&up->smc_rfcr, CPMFCR_GBL | CPMFCR_EB); + out_8(&up->smc_tfcr, CPMFCR_GBL | CPMFCR_EB); /* Using idle character time requires some additional tuning. */ out_be16(&up->smc_mrblr, pinfo->rx_fifosize); @@ -863,6 +868,78 @@ static void cpm_uart_init_smc(struct uart_cpm_port *pinfo) setbits16(&sp->smc_smcmr, SMCMR_REN | SMCMR_TEN); } +/* + * Allocate DP-Ram and memory buffers. We need to allocate a transmit and + * receive buffer descriptors from dual port ram, and a character + * buffer area from host mem. If we are allocating for the console we need + * to do it from bootmem + */ +static int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con) +{ + int dpmemsz, memsz; + u8 __iomem *dp_mem; + unsigned long dp_offset; + u8 *mem_addr; + dma_addr_t dma_addr = 0; + + pr_debug("CPM uart[%d]:allocbuf\n", pinfo->port.line); + + dpmemsz = sizeof(cbd_t) * (pinfo->rx_nrfifos + pinfo->tx_nrfifos); + dp_offset = cpm_muram_alloc(dpmemsz, 8); + if (IS_ERR_VALUE(dp_offset)) { + pr_err("%s: could not allocate buffer descriptors\n", __func__); + return -ENOMEM; + } + + dp_mem = cpm_muram_addr(dp_offset); + + memsz = L1_CACHE_ALIGN(pinfo->rx_nrfifos * pinfo->rx_fifosize) + + L1_CACHE_ALIGN(pinfo->tx_nrfifos * pinfo->tx_fifosize); + if (IS_ENABLED(CONFIG_CPM1) && is_con) { + /* was hostalloc but changed cause it blows away the */ + /* large tlb mapping when pinning the kernel area */ + mem_addr = (u8 __force *)cpm_muram_addr(cpm_muram_alloc(memsz, 8)); + dma_addr = cpm_muram_dma((void __iomem *)mem_addr); + } else if (is_con) { + mem_addr = kzalloc(memsz, GFP_NOWAIT); + dma_addr = virt_to_bus(mem_addr); + } else { + mem_addr = dma_alloc_coherent(pinfo->port.dev, memsz, &dma_addr, + GFP_KERNEL); + } + + if (!mem_addr) { + cpm_muram_free(dp_offset); + pr_err("%s: could not allocate coherent memory\n", __func__); + return -ENOMEM; + } + + pinfo->dp_addr = dp_offset; + pinfo->mem_addr = mem_addr; + pinfo->dma_addr = dma_addr; + pinfo->mem_size = memsz; + + pinfo->rx_buf = mem_addr; + pinfo->tx_buf = pinfo->rx_buf + L1_CACHE_ALIGN(pinfo->rx_nrfifos + * pinfo->rx_fifosize); + + pinfo->rx_bd_base = (cbd_t __iomem *)dp_mem; + pinfo->tx_bd_base = pinfo->rx_bd_base + pinfo->rx_nrfifos; + + return 0; +} + +static void cpm_uart_freebuf(struct uart_cpm_port *pinfo) +{ + dma_free_coherent(pinfo->port.dev, L1_CACHE_ALIGN(pinfo->rx_nrfifos * + pinfo->rx_fifosize) + + L1_CACHE_ALIGN(pinfo->tx_nrfifos * + pinfo->tx_fifosize), (void __force *)pinfo->mem_addr, + pinfo->dma_addr); + + cpm_muram_free(pinfo->dp_addr); +} + /* * Initialize port. This is called from early_console stuff * so we have to be careful here ! @@ -1128,7 +1205,55 @@ static const struct uart_ops cpm_uart_pops = { #endif }; -struct uart_cpm_port cpm_uart_ports[UART_NR]; +static struct uart_cpm_port cpm_uart_ports[UART_NR]; + +static void __iomem *cpm_uart_map_pram(struct uart_cpm_port *port, + struct device_node *np) +{ + void __iomem *pram; + unsigned long offset; + struct resource res; + resource_size_t len; + + /* Don't remap parameter RAM if it has already been initialized + * during console setup. + */ + if (IS_SMC(port) && port->smcup) + return port->smcup; + else if (!IS_SMC(port) && port->sccup) + return port->sccup; + + if (of_address_to_resource(np, 1, &res)) + return NULL; + + len = resource_size(&res); + pram = ioremap(res.start, len); + if (!pram) + return NULL; + + if (!IS_ENABLED(CONFIG_CPM2) || !IS_SMC(port)) + return pram; + + if (len != 2) { + pr_warn("cpm_uart[%d]: device tree references " + "SMC pram, using boot loader/wrapper pram mapping. " + "Please fix your device tree to reference the pram " + "base register instead.\n", + port->port.line); + return pram; + } + + offset = cpm_muram_alloc(64, 64); + out_be16(pram, offset); + iounmap(pram); + return cpm_muram_addr(offset); +} + +static void cpm_uart_unmap_pram(struct uart_cpm_port *port, void __iomem *pram) +{ + if (!IS_ENABLED(CONFIG_CPM2) || !IS_SMC(port)) + iounmap(pram); +} static int cpm_uart_init_port(struct device_node *np, struct uart_cpm_port *pinfo) @@ -1255,19 +1380,14 @@ static void cpm_uart_console_write(struct console *co, const char *s, { struct uart_cpm_port *pinfo = &cpm_uart_ports[co->index]; unsigned long flags; - int nolock = oops_in_progress; - if (unlikely(nolock)) { + if (unlikely(oops_in_progress)) { local_irq_save(flags); - } else { - spin_lock_irqsave(&pinfo->port.lock, flags); - } - - cpm_uart_early_write(pinfo, s, count, true); - - if (unlikely(nolock)) { + cpm_uart_early_write(pinfo, s, count, true); local_irq_restore(flags); } else { + spin_lock_irqsave(&pinfo->port.lock, flags); + cpm_uart_early_write(pinfo, s, count, true); spin_unlock_irqrestore(&pinfo->port.lock, flags); } } @@ -1319,7 +1439,8 @@ static int __init cpm_uart_console_setup(struct console *co, char *options) if (options) { uart_parse_options(options, &baud, &parity, &bits, &flow); } else { - if ((baud = uart_baudrate()) == -1) + baud = get_baudrate(); + if (baud == -1) baud = 9600; } diff --git a/drivers/tty/serial/cpm_uart/cpm_uart.h b/drivers/tty/serial/cpm_uart.h similarity index 64% rename from drivers/tty/serial/cpm_uart/cpm_uart.h rename to drivers/tty/serial/cpm_uart.h index 46c03ed71c31..37bb6e976e03 100644 --- a/drivers/tty/serial/cpm_uart/cpm_uart.h +++ b/drivers/tty/serial/cpm_uart.h @@ -11,41 +11,31 @@ #define CPM_UART_H #include -#include struct gpio_desc; #if defined(CONFIG_CPM2) -#include "cpm_uart_cpm2.h" +#include "asm/cpm2.h" #elif defined(CONFIG_CPM1) -#include "cpm_uart_cpm1.h" +#include "asm/cpm1.h" #endif +#define DPRAM_BASE ((u8 __iomem *)cpm_muram_addr(0)) + #define SERIAL_CPM_MAJOR 204 #define SERIAL_CPM_MINOR 46 #define IS_SMC(pinfo) (pinfo->flags & FLAG_SMC) -#define IS_DISCARDING(pinfo) (pinfo->flags & FLAG_DISCARDING) -#define FLAG_DISCARDING 0x00000004 /* when set, don't discard */ #define FLAG_SMC 0x00000002 #define FLAG_CONSOLE 0x00000001 -#define UART_SMC1 fsid_smc1_uart -#define UART_SMC2 fsid_smc2_uart -#define UART_SCC1 fsid_scc1_uart -#define UART_SCC2 fsid_scc2_uart -#define UART_SCC3 fsid_scc3_uart -#define UART_SCC4 fsid_scc4_uart - -#define UART_NR fs_uart_nr +#define UART_NR 6 #define RX_NUM_FIFO 4 #define RX_BUF_SIZE 32 #define TX_NUM_FIFO 4 #define TX_BUF_SIZE 32 -#define SCC_WAIT_CLOSING 100 - #define GPIO_CTS 0 #define GPIO_RTS 1 #define GPIO_DCD 2 @@ -85,24 +75,6 @@ struct uart_cpm_port { struct gpio_desc *gpios[NUM_GPIOS]; }; -extern struct uart_cpm_port cpm_uart_ports[UART_NR]; - -/* these are located in their respective files */ -void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd); -void __iomem *cpm_uart_map_pram(struct uart_cpm_port *port, - struct device_node *np); -void cpm_uart_unmap_pram(struct uart_cpm_port *port, void __iomem *pram); -int cpm_uart_init_portdesc(void); -int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con); -void cpm_uart_freebuf(struct uart_cpm_port *pinfo); - -void smc1_lineif(struct uart_cpm_port *pinfo); -void smc2_lineif(struct uart_cpm_port *pinfo); -void scc1_lineif(struct uart_cpm_port *pinfo); -void scc2_lineif(struct uart_cpm_port *pinfo); -void scc3_lineif(struct uart_cpm_port *pinfo); -void scc4_lineif(struct uart_cpm_port *pinfo); - /* virtual to phys transtalion */ diff --git a/drivers/tty/serial/cpm_uart/Makefile b/drivers/tty/serial/cpm_uart/Makefile deleted file mode 100644 index 3f3a6ed02ed4..000000000000 --- a/drivers/tty/serial/cpm_uart/Makefile +++ /dev/null @@ -1,12 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -# -# Makefile for the Motorola 8xx FEC ethernet controller -# - -obj-$(CONFIG_SERIAL_CPM) += cpm_uart.o - -# Select the correct platform objects. -cpm_uart-objs-$(CONFIG_CPM2) += cpm_uart_cpm2.o -cpm_uart-objs-$(CONFIG_CPM1) += cpm_uart_cpm1.o - -cpm_uart-objs := cpm_uart_core.o $(cpm_uart-objs-y) diff --git a/drivers/tty/serial/cpm_uart/cpm_uart_cpm1.c b/drivers/tty/serial/cpm_uart/cpm_uart_cpm1.c deleted file mode 100644 index 56fc527015cb..000000000000 --- a/drivers/tty/serial/cpm_uart/cpm_uart_cpm1.c +++ /dev/null @@ -1,122 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Driver for CPM (SCC/SMC) serial ports; CPM1 definitions - * - * Maintainer: Kumar Gala (galak@kernel.crashing.org) (CPM2) - * Pantelis Antoniou (panto@intracom.gr) (CPM1) - * - * Copyright (C) 2004 Freescale Semiconductor, Inc. - * (C) 2004 Intracom, S.A. - * (C) 2006 MontaVista Software, Inc. - * Vitaly Bordug - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include - -#include -#include - -#include "cpm_uart.h" - -/**************************************************************/ - -void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd) -{ - cpm_command(port->command, cmd); -} - -void __iomem *cpm_uart_map_pram(struct uart_cpm_port *port, - struct device_node *np) -{ - return of_iomap(np, 1); -} - -void cpm_uart_unmap_pram(struct uart_cpm_port *port, void __iomem *pram) -{ - iounmap(pram); -} - -/* - * Allocate DP-Ram and memory buffers. We need to allocate a transmit and - * receive buffer descriptors from dual port ram, and a character - * buffer area from host mem. If we are allocating for the console we need - * to do it from bootmem - */ -int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con) -{ - int dpmemsz, memsz; - u8 *dp_mem; - unsigned long dp_offset; - u8 *mem_addr; - dma_addr_t dma_addr = 0; - - pr_debug("CPM uart[%d]:allocbuf\n", pinfo->port.line); - - dpmemsz = sizeof(cbd_t) * (pinfo->rx_nrfifos + pinfo->tx_nrfifos); - dp_offset = cpm_dpalloc(dpmemsz, 8); - if (IS_ERR_VALUE(dp_offset)) { - printk(KERN_ERR - "cpm_uart_cpm1.c: could not allocate buffer descriptors\n"); - return -ENOMEM; - } - dp_mem = cpm_dpram_addr(dp_offset); - - memsz = L1_CACHE_ALIGN(pinfo->rx_nrfifos * pinfo->rx_fifosize) + - L1_CACHE_ALIGN(pinfo->tx_nrfifos * pinfo->tx_fifosize); - if (is_con) { - /* was hostalloc but changed cause it blows away the */ - /* large tlb mapping when pinning the kernel area */ - mem_addr = (u8 *) cpm_dpram_addr(cpm_dpalloc(memsz, 8)); - dma_addr = (u32)cpm_dpram_phys(mem_addr); - } else - mem_addr = dma_alloc_coherent(pinfo->port.dev, memsz, &dma_addr, - GFP_KERNEL); - - if (mem_addr == NULL) { - cpm_dpfree(dp_offset); - printk(KERN_ERR - "cpm_uart_cpm1.c: could not allocate coherent memory\n"); - return -ENOMEM; - } - - pinfo->dp_addr = dp_offset; - pinfo->mem_addr = mem_addr; /* virtual address*/ - pinfo->dma_addr = dma_addr; /* physical address*/ - pinfo->mem_size = memsz; - - pinfo->rx_buf = mem_addr; - pinfo->tx_buf = pinfo->rx_buf + L1_CACHE_ALIGN(pinfo->rx_nrfifos - * pinfo->rx_fifosize); - - pinfo->rx_bd_base = (cbd_t __iomem __force *)dp_mem; - pinfo->tx_bd_base = pinfo->rx_bd_base + pinfo->rx_nrfifos; - - return 0; -} - -void cpm_uart_freebuf(struct uart_cpm_port *pinfo) -{ - dma_free_coherent(pinfo->port.dev, L1_CACHE_ALIGN(pinfo->rx_nrfifos * - pinfo->rx_fifosize) + - L1_CACHE_ALIGN(pinfo->tx_nrfifos * - pinfo->tx_fifosize), pinfo->mem_addr, - pinfo->dma_addr); - - cpm_dpfree(pinfo->dp_addr); -} diff --git a/drivers/tty/serial/cpm_uart/cpm_uart_cpm1.h b/drivers/tty/serial/cpm_uart/cpm_uart_cpm1.h deleted file mode 100644 index 18ec0849918a..000000000000 --- a/drivers/tty/serial/cpm_uart/cpm_uart_cpm1.h +++ /dev/null @@ -1,33 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Driver for CPM (SCC/SMC) serial ports - * - * definitions for cpm1 - * - */ - -#ifndef CPM_UART_CPM1_H -#define CPM_UART_CPM1_H - -#include - -static inline void cpm_set_brg(int brg, int baud) -{ - cpm_setbrg(brg, baud); -} - -static inline void cpm_set_scc_fcr(scc_uart_t __iomem * sup) -{ - out_8(&sup->scc_genscc.scc_rfcr, SMC_EB); - out_8(&sup->scc_genscc.scc_tfcr, SMC_EB); -} - -static inline void cpm_set_smc_fcr(smc_uart_t __iomem * up) -{ - out_8(&up->smc_rfcr, SMC_EB); - out_8(&up->smc_tfcr, SMC_EB); -} - -#define DPRAM_BASE ((u8 __iomem __force *)cpm_dpram_addr(0)) - -#endif diff --git a/drivers/tty/serial/cpm_uart/cpm_uart_cpm2.c b/drivers/tty/serial/cpm_uart/cpm_uart_cpm2.c deleted file mode 100644 index 108af254e8f3..000000000000 --- a/drivers/tty/serial/cpm_uart/cpm_uart_cpm2.c +++ /dev/null @@ -1,156 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Driver for CPM (SCC/SMC) serial ports; CPM2 definitions - * - * Maintainer: Kumar Gala (galak@kernel.crashing.org) (CPM2) - * Pantelis Antoniou (panto@intracom.gr) (CPM1) - * - * Copyright (C) 2004 Freescale Semiconductor, Inc. - * (C) 2004 Intracom, S.A. - * (C) 2006 MontaVista Software, Inc. - * Vitaly Bordug - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include - -#include "cpm_uart.h" - -/**************************************************************/ - -void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd) -{ - cpm_command(port->command, cmd); -} - -void __iomem *cpm_uart_map_pram(struct uart_cpm_port *port, - struct device_node *np) -{ - void __iomem *pram; - unsigned long offset; - struct resource res; - resource_size_t len; - - /* Don't remap parameter RAM if it has already been initialized - * during console setup. - */ - if (IS_SMC(port) && port->smcup) - return port->smcup; - else if (!IS_SMC(port) && port->sccup) - return port->sccup; - - if (of_address_to_resource(np, 1, &res)) - return NULL; - - len = resource_size(&res); - pram = ioremap(res.start, len); - if (!pram) - return NULL; - - if (!IS_SMC(port)) - return pram; - - if (len != 2) { - printk(KERN_WARNING "cpm_uart[%d]: device tree references " - "SMC pram, using boot loader/wrapper pram mapping. " - "Please fix your device tree to reference the pram " - "base register instead.\n", - port->port.line); - return pram; - } - - offset = cpm_dpalloc(PROFF_SMC_SIZE, 64); - out_be16(pram, offset); - iounmap(pram); - return cpm_muram_addr(offset); -} - -void cpm_uart_unmap_pram(struct uart_cpm_port *port, void __iomem *pram) -{ - if (!IS_SMC(port)) - iounmap(pram); -} - -/* - * Allocate DP-Ram and memory buffers. We need to allocate a transmit and - * receive buffer descriptors from dual port ram, and a character - * buffer area from host mem. If we are allocating for the console we need - * to do it from bootmem - */ -int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con) -{ - int dpmemsz, memsz; - u8 __iomem *dp_mem; - unsigned long dp_offset; - u8 *mem_addr; - dma_addr_t dma_addr = 0; - - pr_debug("CPM uart[%d]:allocbuf\n", pinfo->port.line); - - dpmemsz = sizeof(cbd_t) * (pinfo->rx_nrfifos + pinfo->tx_nrfifos); - dp_offset = cpm_dpalloc(dpmemsz, 8); - if (IS_ERR_VALUE(dp_offset)) { - printk(KERN_ERR - "cpm_uart_cpm.c: could not allocate buffer descriptors\n"); - return -ENOMEM; - } - - dp_mem = cpm_dpram_addr(dp_offset); - - memsz = L1_CACHE_ALIGN(pinfo->rx_nrfifos * pinfo->rx_fifosize) + - L1_CACHE_ALIGN(pinfo->tx_nrfifos * pinfo->tx_fifosize); - if (is_con) { - mem_addr = kzalloc(memsz, GFP_NOWAIT); - dma_addr = virt_to_bus(mem_addr); - } - else - mem_addr = dma_alloc_coherent(pinfo->port.dev, memsz, &dma_addr, - GFP_KERNEL); - - if (mem_addr == NULL) { - cpm_dpfree(dp_offset); - printk(KERN_ERR - "cpm_uart_cpm.c: could not allocate coherent memory\n"); - return -ENOMEM; - } - - pinfo->dp_addr = dp_offset; - pinfo->mem_addr = mem_addr; - pinfo->dma_addr = dma_addr; - pinfo->mem_size = memsz; - - pinfo->rx_buf = mem_addr; - pinfo->tx_buf = pinfo->rx_buf + L1_CACHE_ALIGN(pinfo->rx_nrfifos - * pinfo->rx_fifosize); - - pinfo->rx_bd_base = (cbd_t __iomem *)dp_mem; - pinfo->tx_bd_base = pinfo->rx_bd_base + pinfo->rx_nrfifos; - - return 0; -} - -void cpm_uart_freebuf(struct uart_cpm_port *pinfo) -{ - dma_free_coherent(pinfo->port.dev, L1_CACHE_ALIGN(pinfo->rx_nrfifos * - pinfo->rx_fifosize) + - L1_CACHE_ALIGN(pinfo->tx_nrfifos * - pinfo->tx_fifosize), (void __force *)pinfo->mem_addr, - pinfo->dma_addr); - - cpm_dpfree(pinfo->dp_addr); -} diff --git a/drivers/tty/serial/cpm_uart/cpm_uart_cpm2.h b/drivers/tty/serial/cpm_uart/cpm_uart_cpm2.h deleted file mode 100644 index 051a8509c3e5..000000000000 --- a/drivers/tty/serial/cpm_uart/cpm_uart_cpm2.h +++ /dev/null @@ -1,33 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Driver for CPM (SCC/SMC) serial ports - * - * definitions for cpm2 - * - */ - -#ifndef CPM_UART_CPM2_H -#define CPM_UART_CPM2_H - -#include - -static inline void cpm_set_brg(int brg, int baud) -{ - cpm_setbrg(brg, baud); -} - -static inline void cpm_set_scc_fcr(scc_uart_t __iomem *sup) -{ - out_8(&sup->scc_genscc.scc_rfcr, CPMFCR_GBL | CPMFCR_EB); - out_8(&sup->scc_genscc.scc_tfcr, CPMFCR_GBL | CPMFCR_EB); -} - -static inline void cpm_set_smc_fcr(smc_uart_t __iomem *up) -{ - out_8(&up->smc_rfcr, CPMFCR_GBL | CPMFCR_EB); - out_8(&up->smc_tfcr, CPMFCR_GBL | CPMFCR_EB); -} - -#define DPRAM_BASE ((u8 __iomem __force *)cpm_dpram_addr(0)) - -#endif diff --git a/drivers/tty/serial/digicolor-usart.c b/drivers/tty/serial/digicolor-usart.c index ed197705f7ee..128b5479e813 100644 --- a/drivers/tty/serial/digicolor-usart.c +++ b/drivers/tty/serial/digicolor-usart.c @@ -136,8 +136,7 @@ static void digicolor_uart_rx(struct uart_port *port) spin_lock_irqsave(&port->lock, flags); while (1) { - u8 status, ch; - unsigned int ch_flag; + u8 status, ch, ch_flag; if (digicolor_uart_rx_empty(port)) break; diff --git a/drivers/tty/serial/dz.c b/drivers/tty/serial/dz.c index 6b7ed7f2f3ca..667f52e83277 100644 --- a/drivers/tty/serial/dz.c +++ b/drivers/tty/serial/dz.c @@ -181,8 +181,8 @@ static inline void dz_receive_chars(struct dz_mux *mux) struct dz_port *dport = &mux->dport[0]; struct uart_icount *icount; int lines_rx[DZ_NB_PORT] = { [0 ... DZ_NB_PORT - 1] = 0 }; - unsigned char ch, flag; u16 status; + u8 ch, flag; int i; while ((status = dz_in(dport, DZ_RBUF)) & DZ_DVAL) { diff --git a/drivers/tty/serial/fsl_linflexuart.c b/drivers/tty/serial/fsl_linflexuart.c index 6fc21b6684e6..249cb380c3c6 100644 --- a/drivers/tty/serial/fsl_linflexuart.c +++ b/drivers/tty/serial/fsl_linflexuart.c @@ -11,7 +11,7 @@ #include #include #include -#include +#include #include #include #include @@ -827,14 +827,10 @@ static int linflex_probe(struct platform_device *pdev) sport->line = ret; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) - return -ENODEV; - - sport->mapbase = res->start; - sport->membase = devm_ioremap_resource(&pdev->dev, res); + sport->membase = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(sport->membase)) return PTR_ERR(sport->membase); + sport->mapbase = res->start; sport->dev = &pdev->dev; sport->type = PORT_LINFLEXUART; diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c index c569a08b5b19..f72e1340b47d 100644 --- a/drivers/tty/serial/fsl_lpuart.c +++ b/drivers/tty/serial/fsl_lpuart.c @@ -18,9 +18,9 @@ #include #include #include -#include #include #include +#include #include #include #include @@ -288,6 +288,7 @@ struct lpuart_port { wait_queue_head_t dma_wait; bool is_cs7; /* Set to true when character size is 7 */ /* and the parity is enabled */ + bool dma_idle_int; }; struct lpuart_soc_data { @@ -1064,26 +1065,6 @@ static irqreturn_t lpuart_int(int irq, void *dev_id) return IRQ_HANDLED; } -static irqreturn_t lpuart32_int(int irq, void *dev_id) -{ - struct lpuart_port *sport = dev_id; - unsigned long sts, rxcount; - - sts = lpuart32_read(&sport->port, UARTSTAT); - rxcount = lpuart32_read(&sport->port, UARTWATER); - rxcount = rxcount >> UARTWATER_RXCNT_OFF; - - if ((sts & UARTSTAT_RDRF || rxcount > 0) && !sport->lpuart_dma_rx_use) - lpuart32_rxint(sport); - - if ((sts & UARTSTAT_TDRE) && !sport->lpuart_dma_tx_use) - lpuart32_txint(sport); - - lpuart32_write(&sport->port, sts, UARTSTAT); - return IRQ_HANDLED; -} - - static inline void lpuart_handle_sysrq_chars(struct uart_port *port, unsigned char *p, int count) { @@ -1266,7 +1247,8 @@ exit: spin_unlock_irqrestore(&sport->port.lock, flags); tty_flip_buffer_push(port); - mod_timer(&sport->lpuart_timer, jiffies + sport->dma_rx_timeout); + if (!sport->dma_idle_int) + mod_timer(&sport->lpuart_timer, jiffies + sport->dma_rx_timeout); } static void lpuart_dma_rx_complete(void *arg) @@ -1276,6 +1258,50 @@ static void lpuart_dma_rx_complete(void *arg) lpuart_copy_rx_to_tty(sport); } +static void lpuart32_dma_idleint(struct lpuart_port *sport) +{ + enum dma_status dmastat; + struct dma_chan *chan = sport->dma_rx_chan; + struct circ_buf *ring = &sport->rx_ring; + struct dma_tx_state state; + int count = 0; + + dmastat = dmaengine_tx_status(chan, sport->dma_rx_cookie, &state); + if (dmastat == DMA_ERROR) { + dev_err(sport->port.dev, "Rx DMA transfer failed!\n"); + return; + } + + ring->head = sport->rx_sgl.length - state.residue; + count = CIRC_CNT(ring->head, ring->tail, sport->rx_sgl.length); + + /* Check if new data received before copying */ + if (count) + lpuart_copy_rx_to_tty(sport); +} + +static irqreturn_t lpuart32_int(int irq, void *dev_id) +{ + struct lpuart_port *sport = dev_id; + unsigned long sts, rxcount; + + sts = lpuart32_read(&sport->port, UARTSTAT); + rxcount = lpuart32_read(&sport->port, UARTWATER); + rxcount = rxcount >> UARTWATER_RXCNT_OFF; + + if ((sts & UARTSTAT_RDRF || rxcount > 0) && !sport->lpuart_dma_rx_use) + lpuart32_rxint(sport); + + if ((sts & UARTSTAT_TDRE) && !sport->lpuart_dma_tx_use) + lpuart32_txint(sport); + + if ((sts & UARTSTAT_IDLE) && sport->lpuart_dma_rx_use && sport->dma_idle_int) + lpuart32_dma_idleint(sport); + + lpuart32_write(&sport->port, sts, UARTSTAT); + return IRQ_HANDLED; +} + /* * Timer function to simulate the hardware EOP (End Of Package) event. * The timer callback is to check for new RX data and copy to TTY buffer. @@ -1392,6 +1418,12 @@ static inline int lpuart_start_rx_dma(struct lpuart_port *sport) unsigned long temp = lpuart32_read(&sport->port, UARTBAUD); lpuart32_write(&sport->port, temp | UARTBAUD_RDMAE, UARTBAUD); + + if (sport->dma_idle_int) { + unsigned long ctrl = lpuart32_read(&sport->port, UARTCTRL); + + lpuart32_write(&sport->port, ctrl | UARTCTRL_ILIE, UARTCTRL); + } } else { writeb(readb(sport->port.membase + UARTCR5) | UARTCR5_RDMAS, sport->port.membase + UARTCR5); @@ -1407,7 +1439,9 @@ static void lpuart_dma_rx_free(struct uart_port *port) struct dma_chan *chan = sport->dma_rx_chan; dmaengine_terminate_sync(chan); - del_timer_sync(&sport->lpuart_timer); + if (!sport->dma_idle_int) + del_timer_sync(&sport->lpuart_timer); + dma_unmap_sg(chan->device->dev, &sport->rx_sgl, 1, DMA_FROM_DEVICE); kfree(sport->rx_ring.buf); sport->rx_ring.tail = 0; @@ -1669,6 +1703,9 @@ static void lpuart32_setup_watermark_enable(struct lpuart_port *sport) static void rx_dma_timer_init(struct lpuart_port *sport) { + if (sport->dma_idle_int) + return; + timer_setup(&sport->lpuart_timer, lpuart_timer_func, 0); sport->lpuart_timer.expires = jiffies + sport->dma_rx_timeout; add_timer(&sport->lpuart_timer); @@ -2811,8 +2848,7 @@ static int lpuart_probe(struct platform_device *pdev) if (!sport) return -ENOMEM; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - sport->port.membase = devm_ioremap_resource(&pdev->dev, res); + sport->port.membase = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(sport->port.membase)) return PTR_ERR(sport->port.membase); @@ -2822,6 +2858,8 @@ static int lpuart_probe(struct platform_device *pdev) sport->port.type = PORT_LPUART; sport->devtype = sdata->devtype; sport->rx_watermark = sdata->rx_watermark; + sport->dma_idle_int = is_imx7ulp_lpuart(sport) || is_imx8ulp_lpuart(sport) || + is_imx8qxp_lpuart(sport); ret = platform_get_irq(pdev, 0); if (ret < 0) return ret; diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c index 7341d060f85c..13cb78340709 100644 --- a/drivers/tty/serial/imx.c +++ b/drivers/tty/serial/imx.c @@ -25,7 +25,6 @@ #include #include #include -#include #include #include @@ -2276,8 +2275,7 @@ static int imx_uart_probe(struct platform_device *pdev) return -EINVAL; } - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - base = devm_ioremap_resource(&pdev->dev, res); + base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(base)) return PTR_ERR(base); diff --git a/drivers/tty/serial/ip22zilog.c b/drivers/tty/serial/ip22zilog.c index b1f27e168135..845ff706bc59 100644 --- a/drivers/tty/serial/ip22zilog.c +++ b/drivers/tty/serial/ip22zilog.c @@ -248,8 +248,8 @@ static void ip22zilog_maybe_update_regs(struct uart_ip22zilog_port *up, static bool ip22zilog_receive_chars(struct uart_ip22zilog_port *up, struct zilog_channel *channel) { - unsigned char ch, flag; unsigned int r1; + u8 ch, flag; bool push = up->port.state != NULL; for (;;) { diff --git a/drivers/tty/serial/kgdb_nmi.c b/drivers/tty/serial/kgdb_nmi.c index 55c3c9db7462..e93850f6447a 100644 --- a/drivers/tty/serial/kgdb_nmi.c +++ b/drivers/tty/serial/kgdb_nmi.c @@ -304,7 +304,8 @@ static unsigned int kgdb_nmi_tty_write_room(struct tty_struct *tty) return 2048; } -static int kgdb_nmi_tty_write(struct tty_struct *tty, const unchar *buf, int c) +static ssize_t kgdb_nmi_tty_write(struct tty_struct *tty, const u8 *buf, + size_t c) { int i; diff --git a/drivers/tty/serial/lantiq.c b/drivers/tty/serial/lantiq.c index bcaa479608d8..3adb60c683f7 100644 --- a/drivers/tty/serial/lantiq.c +++ b/drivers/tty/serial/lantiq.c @@ -17,7 +17,8 @@ #include #include #include -#include +#include +#include #include #include #include diff --git a/drivers/tty/serial/liteuart.c b/drivers/tty/serial/liteuart.c index 80de3a42b67b..d881cdd2a58f 100644 --- a/drivers/tty/serial/liteuart.c +++ b/drivers/tty/serial/liteuart.c @@ -11,8 +11,7 @@ #include #include #include -#include -#include +#include #include #include #include diff --git a/drivers/tty/serial/ma35d1_serial.c b/drivers/tty/serial/ma35d1_serial.c index 2604b4d9fb78..465b1def9e11 100644 --- a/drivers/tty/serial/ma35d1_serial.c +++ b/drivers/tty/serial/ma35d1_serial.c @@ -8,7 +8,7 @@ #include #include #include -#include +#include #include #include #include @@ -788,7 +788,6 @@ static struct platform_driver ma35d1serial_driver = { .resume = ma35d1serial_resume, .driver = { .name = "ma35d1-uart", - .owner = THIS_MODULE, .of_match_table = of_match_ptr(ma35d1_serial_of_match), }, }; diff --git a/drivers/tty/serial/max3100.c b/drivers/tty/serial/max3100.c index 86dcbff8faa3..5efb2b593be3 100644 --- a/drivers/tty/serial/max3100.c +++ b/drivers/tty/serial/max3100.c @@ -215,8 +215,9 @@ static int max3100_sr(struct max3100_port *s, u16 tx, u16 *rx) static int max3100_handlerx(struct max3100_port *s, u16 rx) { - unsigned int ch, flg, status = 0; + unsigned int status = 0; int ret = 0, cts; + u8 ch, flg; if (rx & MAX3100_R && s->rx_enabled) { dev_dbg(&s->spi->dev, "%s\n", __func__); diff --git a/drivers/tty/serial/max310x.c b/drivers/tty/serial/max310x.c index 997e39449766..db3204d2a305 100644 --- a/drivers/tty/serial/max310x.c +++ b/drivers/tty/serial/max310x.c @@ -669,7 +669,8 @@ static void max310x_batch_read(struct uart_port *port, u8 *rxbuf, unsigned int l static void max310x_handle_rx(struct uart_port *port, unsigned int rxlen) { struct max310x_one *one = to_max310x_port(port); - unsigned int sts, ch, flag, i; + unsigned int sts, i; + u8 ch, flag; if (port->read_status_mask == MAX310X_LSR_RXOVR_BIT) { /* We are just reading, happily ignoring any error conditions. @@ -1368,6 +1369,11 @@ static int max310x_probe(struct device *dev, const struct max310x_devtype *devty s->p[i].port.flags = UPF_FIXED_TYPE | UPF_LOW_LATENCY; s->p[i].port.iotype = UPIO_PORT; s->p[i].port.iobase = i; + /* + * Use all ones as membase to make sure uart_configure_port() in + * serial_core.c does not abort for SPI/I2C devices where the + * membase address is not applicable. + */ s->p[i].port.membase = (void __iomem *)~0; s->p[i].port.uartclk = uartclk; s->p[i].port.rs485_config = max310x_rs485_config; @@ -1399,7 +1405,7 @@ static int max310x_probe(struct device *dev, const struct max310x_devtype *devty } #ifdef CONFIG_GPIOLIB - /* Setup GPIO cotroller */ + /* Setup GPIO controller */ s->gpio.owner = THIS_MODULE; s->gpio.parent = dev; s->gpio.label = devtype->name; diff --git a/drivers/tty/serial/mcf.c b/drivers/tty/serial/mcf.c index 3239babe12a4..1666ce012e5e 100644 --- a/drivers/tty/serial/mcf.c +++ b/drivers/tty/serial/mcf.c @@ -281,7 +281,7 @@ static void mcf_set_termios(struct uart_port *port, struct ktermios *termios, static void mcf_rx_chars(struct mcf_uart *pp) { struct uart_port *port = &pp->port; - unsigned char status, ch, flag; + u8 status, ch, flag; while ((status = readb(port->membase + MCFUART_USR)) & MCFUART_USR_RXREADY) { ch = readb(port->membase + MCFUART_URB); diff --git a/drivers/tty/serial/meson_uart.c b/drivers/tty/serial/meson_uart.c index 2501db5a7aaf..790d910dafa5 100644 --- a/drivers/tty/serial/meson_uart.c +++ b/drivers/tty/serial/meson_uart.c @@ -72,16 +72,17 @@ #define AML_UART_PORT_NUM 12 #define AML_UART_PORT_OFFSET 6 -#define AML_UART_DEV_NAME "ttyAML" #define AML_UART_POLL_USEC 5 #define AML_UART_TIMEOUT_USEC 10000 -static struct uart_driver meson_uart_driver; +static struct uart_driver meson_uart_driver_ttyAML; +static struct uart_driver meson_uart_driver_ttyS; static struct uart_port *meson_ports[AML_UART_PORT_NUM]; struct meson_uart_data { + struct uart_driver *uart_driver; bool has_xtal_div2; }; @@ -611,21 +612,19 @@ static int meson_serial_console_setup(struct console *co, char *options) return uart_set_options(port, co, baud, parity, bits, flow); } -static struct console meson_serial_console = { - .name = AML_UART_DEV_NAME, - .write = meson_serial_console_write, - .device = uart_console_device, - .setup = meson_serial_console_setup, - .flags = CON_PRINTBUFFER, - .index = -1, - .data = &meson_uart_driver, -}; +#define MESON_SERIAL_CONSOLE(_devname) \ + static struct console meson_serial_console_##_devname = { \ + .name = __stringify(_devname), \ + .write = meson_serial_console_write, \ + .device = uart_console_device, \ + .setup = meson_serial_console_setup, \ + .flags = CON_PRINTBUFFER, \ + .index = -1, \ + .data = &meson_uart_driver_##_devname, \ + } -static int __init meson_serial_console_init(void) -{ - register_console(&meson_serial_console); - return 0; -} +MESON_SERIAL_CONSOLE(ttyAML); +MESON_SERIAL_CONSOLE(ttyS); static void meson_serial_early_console_write(struct console *co, const char *s, @@ -650,21 +649,22 @@ meson_serial_early_console_setup(struct earlycon_device *device, const char *opt OF_EARLYCON_DECLARE(meson, "amlogic,meson-ao-uart", meson_serial_early_console_setup); -#define MESON_SERIAL_CONSOLE (&meson_serial_console) +#define MESON_SERIAL_CONSOLE_PTR(_devname) (&meson_serial_console_##_devname) #else -static int __init meson_serial_console_init(void) { - return 0; -} -#define MESON_SERIAL_CONSOLE NULL +#define MESON_SERIAL_CONSOLE_PTR(_devname) (NULL) #endif -static struct uart_driver meson_uart_driver = { - .owner = THIS_MODULE, - .driver_name = "meson_uart", - .dev_name = AML_UART_DEV_NAME, - .nr = AML_UART_PORT_NUM, - .cons = MESON_SERIAL_CONSOLE, -}; +#define MESON_UART_DRIVER(_devname) \ + static struct uart_driver meson_uart_driver_##_devname = { \ + .owner = THIS_MODULE, \ + .driver_name = "meson_uart", \ + .dev_name = __stringify(_devname), \ + .nr = AML_UART_PORT_NUM, \ + .cons = MESON_SERIAL_CONSOLE_PTR(_devname), \ + } + +MESON_UART_DRIVER(ttyAML); +MESON_UART_DRIVER(ttyS); static int meson_uart_probe_clocks(struct platform_device *pdev, struct uart_port *port) @@ -690,8 +690,16 @@ static int meson_uart_probe_clocks(struct platform_device *pdev, return 0; } +static struct uart_driver *meson_uart_current(const struct meson_uart_data *pd) +{ + return (pd && pd->uart_driver) ? + pd->uart_driver : &meson_uart_driver_ttyAML; +} + static int meson_uart_probe(struct platform_device *pdev) { + const struct meson_uart_data *priv_data; + struct uart_driver *uart_driver; struct resource *res_mem; struct uart_port *port; u32 fifosize = 64; /* Default is 64, 128 for EE UART_0 */ @@ -726,8 +734,8 @@ static int meson_uart_probe(struct platform_device *pdev) of_property_read_u32(pdev->dev.of_node, "fifo-size", &fifosize); if (meson_ports[pdev->id]) { - dev_err(&pdev->dev, "port %d already allocated\n", pdev->id); - return -EBUSY; + return dev_err_probe(&pdev->dev, -EBUSY, + "port %d already allocated\n", pdev->id); } port = devm_kzalloc(&pdev->dev, sizeof(struct uart_port), GFP_KERNEL); @@ -738,6 +746,17 @@ static int meson_uart_probe(struct platform_device *pdev) if (ret) return ret; + priv_data = device_get_match_data(&pdev->dev); + + uart_driver = meson_uart_current(priv_data); + + if (!uart_driver->state) { + ret = uart_register_driver(uart_driver); + if (ret) + return dev_err_probe(&pdev->dev, ret, + "can't register uart driver\n"); + } + port->iotype = UPIO_MEM; port->mapbase = res_mem->start; port->mapsize = resource_size(res_mem); @@ -750,7 +769,7 @@ static int meson_uart_probe(struct platform_device *pdev) port->x_char = 0; port->ops = &meson_uart_ops; port->fifosize = fifosize; - port->private_data = (void *)device_get_match_data(&pdev->dev); + port->private_data = (void *)priv_data; meson_ports[pdev->id] = port; platform_set_drvdata(pdev, port); @@ -761,7 +780,7 @@ static int meson_uart_probe(struct platform_device *pdev) meson_uart_release_port(port); } - ret = uart_add_one_port(&meson_uart_driver, port); + ret = uart_add_one_port(uart_driver, port); if (ret) meson_ports[pdev->id] = NULL; @@ -770,12 +789,21 @@ static int meson_uart_probe(struct platform_device *pdev) static int meson_uart_remove(struct platform_device *pdev) { + struct uart_driver *uart_driver; struct uart_port *port; port = platform_get_drvdata(pdev); - uart_remove_one_port(&meson_uart_driver, port); + uart_driver = meson_uart_current(port->private_data); + uart_remove_one_port(uart_driver, port); meson_ports[pdev->id] = NULL; + for (int id = 0; id < AML_UART_PORT_NUM; id++) + if (meson_ports[id]) + return 0; + + /* No more available uart ports, unregister uart driver */ + uart_unregister_driver(uart_driver); + return 0; } @@ -783,6 +811,16 @@ static struct meson_uart_data meson_g12a_uart_data = { .has_xtal_div2 = true, }; +static struct meson_uart_data meson_a1_uart_data = { + .uart_driver = &meson_uart_driver_ttyS, + .has_xtal_div2 = false, +}; + +static struct meson_uart_data meson_s4_uart_data = { + .uart_driver = &meson_uart_driver_ttyS, + .has_xtal_div2 = true, +}; + static const struct of_device_id meson_uart_dt_match[] = { { .compatible = "amlogic,meson6-uart" }, { .compatible = "amlogic,meson8-uart" }, @@ -794,7 +832,11 @@ static const struct of_device_id meson_uart_dt_match[] = { }, { .compatible = "amlogic,meson-s4-uart", - .data = (void *)&meson_g12a_uart_data, + .data = (void *)&meson_s4_uart_data, + }, + { + .compatible = "amlogic,meson-a1-uart", + .data = (void *)&meson_a1_uart_data, }, { /* sentinel */ }, }; @@ -809,33 +851,7 @@ static struct platform_driver meson_uart_platform_driver = { }, }; -static int __init meson_uart_init(void) -{ - int ret; - - ret = meson_serial_console_init(); - if (ret) - return ret; - - ret = uart_register_driver(&meson_uart_driver); - if (ret) - return ret; - - ret = platform_driver_register(&meson_uart_platform_driver); - if (ret) - uart_unregister_driver(&meson_uart_driver); - - return ret; -} - -static void __exit meson_uart_exit(void) -{ - platform_driver_unregister(&meson_uart_platform_driver); - uart_unregister_driver(&meson_uart_driver); -} - -module_init(meson_uart_init); -module_exit(meson_uart_exit); +module_platform_driver(meson_uart_platform_driver); MODULE_AUTHOR("Carlo Caione "); MODULE_DESCRIPTION("Amlogic Meson serial port driver"); diff --git a/drivers/tty/serial/milbeaut_usio.c b/drivers/tty/serial/milbeaut_usio.c index 44988a2941b8..70a910085e93 100644 --- a/drivers/tty/serial/milbeaut_usio.c +++ b/drivers/tty/serial/milbeaut_usio.c @@ -148,8 +148,7 @@ static void mlb_usio_enable_ms(struct uart_port *port) static void mlb_usio_rx_chars(struct uart_port *port) { struct tty_port *ttyport = &port->state->port; - unsigned long flag = 0; - char ch = 0; + u8 flag = 0, ch = 0; u8 status; int max_count = 2; diff --git a/drivers/tty/serial/mpc52xx_uart.c b/drivers/tty/serial/mpc52xx_uart.c index 384ca195e3d5..916507b8f31d 100644 --- a/drivers/tty/serial/mpc52xx_uart.c +++ b/drivers/tty/serial/mpc52xx_uart.c @@ -40,7 +40,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/tty/serial/mps2-uart.c b/drivers/tty/serial/mps2-uart.c index 860d161fa594..ea5a7911cb15 100644 --- a/drivers/tty/serial/mps2-uart.c +++ b/drivers/tty/serial/mps2-uart.c @@ -16,7 +16,6 @@ #include #include #include -#include #include #include #include @@ -539,8 +538,7 @@ static int mps2_init_port(struct platform_device *pdev, struct resource *res; int ret; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - mps_port->port.membase = devm_ioremap_resource(&pdev->dev, res); + mps_port->port.membase = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(mps_port->port.membase)) return PTR_ERR(mps_port->port.membase); diff --git a/drivers/tty/serial/mvebu-uart.c b/drivers/tty/serial/mvebu-uart.c index 31f739c7a08b..ea924e9b913b 100644 --- a/drivers/tty/serial/mvebu-uart.c +++ b/drivers/tty/serial/mvebu-uart.c @@ -876,18 +876,13 @@ static int uart_num_counter; static int mvebu_uart_probe(struct platform_device *pdev) { - struct resource *reg = platform_get_resource(pdev, IORESOURCE_MEM, 0); const struct of_device_id *match = of_match_device(mvebu_uart_of_match, &pdev->dev); struct uart_port *port; struct mvebu_uart *mvuart; + struct resource *reg; int id, irq; - if (!reg) { - dev_err(&pdev->dev, "no registers defined\n"); - return -EINVAL; - } - /* Assume that all UART ports have a DT alias or none has */ id = of_alias_get_id(pdev->dev.of_node, "serial"); if (!pdev->dev.of_node || id < 0) @@ -922,11 +917,11 @@ static int mvebu_uart_probe(struct platform_device *pdev) */ port->irq = 0; port->irqflags = 0; - port->mapbase = reg->start; - port->membase = devm_ioremap_resource(&pdev->dev, reg); + port->membase = devm_platform_get_and_ioremap_resource(pdev, 0, ®); if (IS_ERR(port->membase)) return PTR_ERR(port->membase); + port->mapbase = reg->start; mvuart = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_uart), GFP_KERNEL); diff --git a/drivers/tty/serial/mxs-auart.c b/drivers/tty/serial/mxs-auart.c index a368f4293967..8eeecf8ad359 100644 --- a/drivers/tty/serial/mxs-auart.c +++ b/drivers/tty/serial/mxs-auart.c @@ -30,7 +30,7 @@ #include #include #include -#include +#include #include #include @@ -616,9 +616,8 @@ static void mxs_auart_tx_chars(struct mxs_auart_port *s) static void mxs_auart_rx_char(struct mxs_auart_port *s) { - int flag; u32 stat; - u8 c; + u8 c, flag; c = mxs_read(s, REG_DATA); stat = mxs_read(s, REG_STAT); diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c index 9be63a1f1f0c..0ead88c5a19a 100644 --- a/drivers/tty/serial/omap-serial.c +++ b/drivers/tty/serial/omap-serial.c @@ -437,7 +437,7 @@ static unsigned int check_modem_status(struct uart_omap_port *up) static void serial_omap_rlsi(struct uart_omap_port *up, unsigned int lsr) { - unsigned int flag; + u8 flag; /* * Read one data character out to avoid stalling the receiver according @@ -493,8 +493,7 @@ static void serial_omap_rlsi(struct uart_omap_port *up, unsigned int lsr) static void serial_omap_rdi(struct uart_omap_port *up, unsigned int lsr) { - unsigned char ch = 0; - unsigned int flag; + u8 ch; if (!(lsr & UART_LSR_DR)) return; @@ -507,13 +506,12 @@ static void serial_omap_rdi(struct uart_omap_port *up, unsigned int lsr) return; } - flag = TTY_NORMAL; up->port.icount.rx++; if (uart_handle_sysrq_char(&up->port, ch)) return; - uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag); + uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, TTY_NORMAL); } /** @@ -1568,8 +1566,7 @@ static int serial_omap_probe(struct platform_device *pdev) if (!up) return -ENOMEM; - mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); - base = devm_ioremap_resource(&pdev->dev, mem); + base = devm_platform_get_and_ioremap_resource(pdev, 0, &mem); if (IS_ERR(base)) return PTR_ERR(base); diff --git a/drivers/tty/serial/pic32_uart.c b/drivers/tty/serial/pic32_uart.c index 196a4e678451..e308d5022b3f 100644 --- a/drivers/tty/serial/pic32_uart.c +++ b/drivers/tty/serial/pic32_uart.c @@ -11,7 +11,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/tty/serial/pxa.c b/drivers/tty/serial/pxa.c index 444fa4b654ac..73c60f5ea027 100644 --- a/drivers/tty/serial/pxa.c +++ b/drivers/tty/serial/pxa.c @@ -90,7 +90,7 @@ static void serial_pxa_stop_rx(struct uart_port *port) static inline void receive_chars(struct uart_pxa_port *up, int *status) { - unsigned int ch, flag; + u8 ch, flag; int max_count = 256; do { diff --git a/drivers/tty/serial/qcom_geni_serial.c b/drivers/tty/serial/qcom_geni_serial.c index daaf2a64e7f1..b8aa4c1293ba 100644 --- a/drivers/tty/serial/qcom_geni_serial.c +++ b/drivers/tty/serial/qcom_geni_serial.c @@ -11,7 +11,6 @@ #include #include #include -#include #include #include #include @@ -126,6 +125,7 @@ struct qcom_geni_serial_port { dma_addr_t rx_dma_addr; bool setup; unsigned int baud; + unsigned long clk_rate; void *rx_buf; u32 loopback; bool brk; @@ -591,7 +591,6 @@ static void qcom_geni_serial_stop_tx_dma(struct uart_port *uport) { struct qcom_geni_serial_port *port = to_dev_port(uport); bool done; - u32 m_irq_en; if (!qcom_geni_serial_main_active(uport)) return; @@ -603,12 +602,10 @@ static void qcom_geni_serial_stop_tx_dma(struct uart_port *uport) port->tx_remaining = 0; } - m_irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN); - writel(m_irq_en, uport->membase + SE_GENI_M_IRQ_EN); geni_se_cancel_m_cmd(&port->se); - done = qcom_geni_serial_poll_bit(uport, SE_GENI_S_IRQ_STATUS, - S_CMD_CANCEL_EN, true); + done = qcom_geni_serial_poll_bit(uport, SE_GENI_M_IRQ_STATUS, + M_CMD_CANCEL_EN, true); if (!done) { geni_se_abort_m_cmd(&port->se); done = qcom_geni_serial_poll_bit(uport, SE_GENI_M_IRQ_STATUS, @@ -1245,10 +1242,11 @@ static void qcom_geni_serial_set_termios(struct uart_port *uport, goto out_restart_rx; } - dev_dbg(port->se.dev, "desired_rate-%u, clk_rate-%lu, clk_div-%u\n", + dev_dbg(port->se.dev, "desired_rate = %u, clk_rate = %lu, clk_div = %u\n", baud * sampling_rate, clk_rate, clk_div); uport->uartclk = clk_rate; + port->clk_rate = clk_rate; dev_pm_opp_set_rate(uport->dev, clk_rate); ser_clk_cfg = SER_CLK_EN; ser_clk_cfg |= clk_div << CLK_DIV_SHFT; @@ -1513,10 +1511,13 @@ static void qcom_geni_serial_pm(struct uart_port *uport, if (new_state == UART_PM_STATE_ON && old_state == UART_PM_STATE_OFF) { geni_icc_enable(&port->se); + if (port->clk_rate) + dev_pm_opp_set_rate(uport->dev, port->clk_rate); geni_se_resources_on(&port->se); } else if (new_state == UART_PM_STATE_OFF && old_state == UART_PM_STATE_ON) { geni_se_resources_off(&port->se); + dev_pm_opp_set_rate(uport->dev, 0); geni_icc_disable(&port->se); } } @@ -1750,7 +1751,7 @@ static int qcom_geni_serial_sys_hib_resume(struct device *dev) private_data = uport->private_data; if (uart_console(uport)) { - geni_icc_set_tag(&port->se, 0x7); + geni_icc_set_tag(&port->se, QCOM_ICC_TAG_ALWAYS); geni_icc_set_bw(&port->se); ret = uart_resume_port(private_data->drv, uport); /* diff --git a/drivers/tty/serial/rp2.c b/drivers/tty/serial/rp2.c index 749b873a5d99..de220ac8ca54 100644 --- a/drivers/tty/serial/rp2.c +++ b/drivers/tty/serial/rp2.c @@ -401,14 +401,14 @@ static void rp2_rx_chars(struct rp2_uart_port *up) for (; bytes != 0; bytes--) { u32 byte = readw(up->base + RP2_DATA_BYTE) | RP2_DUMMY_READ; - char ch = byte & 0xff; + u8 ch = byte & 0xff; if (likely(!(byte & RP2_DATA_BYTE_EXCEPTION_MASK))) { if (!uart_handle_sysrq_char(&up->port, ch)) uart_insert_char(&up->port, byte, 0, ch, TTY_NORMAL); } else { - char flag = TTY_NORMAL; + u8 flag = TTY_NORMAL; if (byte & RP2_DATA_BYTE_BREAK_m) flag = TTY_BREAK; diff --git a/drivers/tty/serial/sa1100.c b/drivers/tty/serial/sa1100.c index 55107bbc00ce..ad011f1e2f4d 100644 --- a/drivers/tty/serial/sa1100.c +++ b/drivers/tty/serial/sa1100.c @@ -180,7 +180,8 @@ static void sa1100_enable_ms(struct uart_port *port) static void sa1100_rx_chars(struct sa1100_port *sport) { - unsigned int status, ch, flg; + unsigned int status; + u8 ch, flg; status = UTSR1_TO_SM(UART_GET_UTSR1(sport)) | UTSR0_TO_SM(UART_GET_UTSR0(sport)); diff --git a/drivers/tty/serial/samsung_tty.c b/drivers/tty/serial/samsung_tty.c index b29e9dfd81a6..07fb8a9dac63 100644 --- a/drivers/tty/serial/samsung_tty.c +++ b/drivers/tty/serial/samsung_tty.c @@ -759,9 +759,10 @@ finish: static void s3c24xx_serial_rx_drain_fifo(struct s3c24xx_uart_port *ourport) { struct uart_port *port = &ourport->port; - unsigned int ufcon, ch, flag, ufstat, uerstat; + unsigned int ufcon, ufstat, uerstat; unsigned int fifocnt = 0; int max_count = port->fifosize; + u8 ch, flag; while (max_count-- > 0) { /* @@ -2273,9 +2274,8 @@ static int s3c24xx_serial_resume_noirq(struct device *dev) } static const struct dev_pm_ops s3c24xx_serial_pm_ops = { - .suspend = s3c24xx_serial_suspend, - .resume = s3c24xx_serial_resume, - .resume_noirq = s3c24xx_serial_resume_noirq, + SET_SYSTEM_SLEEP_PM_OPS(s3c24xx_serial_suspend, s3c24xx_serial_resume) + SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(NULL, s3c24xx_serial_resume_noirq) }; #define SERIAL_SAMSUNG_PM_OPS (&s3c24xx_serial_pm_ops) diff --git a/drivers/tty/serial/sb1250-duart.c b/drivers/tty/serial/sb1250-duart.c index b6de0dc51f29..f3cd69346482 100644 --- a/drivers/tty/serial/sb1250-duart.c +++ b/drivers/tty/serial/sb1250-duart.c @@ -331,8 +331,9 @@ static void sbd_receive_chars(struct sbd_port *sport) { struct uart_port *uport = &sport->port; struct uart_icount *icount; - unsigned int status, ch, flag; + unsigned int status; int count; + u8 ch, flag; for (count = 16; count; count--) { status = read_sbdchn(sport, R_DUART_STATUS); diff --git a/drivers/tty/serial/sc16is7xx.c b/drivers/tty/serial/sc16is7xx.c index 2e7e7c409cf2..f61d98e09dc3 100644 --- a/drivers/tty/serial/sc16is7xx.c +++ b/drivers/tty/serial/sc16is7xx.c @@ -236,7 +236,8 @@ /* IOControl register bits (Only 750/760) */ #define SC16IS7XX_IOCONTROL_LATCH_BIT (1 << 0) /* Enable input latching */ -#define SC16IS7XX_IOCONTROL_MODEM_BIT (1 << 1) /* Enable GPIO[7:4] as modem pins */ +#define SC16IS7XX_IOCONTROL_MODEM_A_BIT (1 << 1) /* Enable GPIO[7:4] as modem A pins */ +#define SC16IS7XX_IOCONTROL_MODEM_B_BIT (1 << 2) /* Enable GPIO[3:0] as modem B pins */ #define SC16IS7XX_IOCONTROL_SRESET_BIT (1 << 3) /* Software Reset */ /* EFCR register bits */ @@ -301,12 +302,12 @@ /* Misc definitions */ #define SC16IS7XX_FIFO_SIZE (64) #define SC16IS7XX_REG_SHIFT 2 +#define SC16IS7XX_GPIOS_PER_BANK 4 struct sc16is7xx_devtype { char name[10]; int nr_gpio; int nr_uart; - int has_mctrl; }; #define SC16IS7XX_RECONF_MD (1 << 0) @@ -336,7 +337,9 @@ struct sc16is7xx_port { struct clk *clk; #ifdef CONFIG_GPIOLIB struct gpio_chip gpio; + unsigned long gpio_valid_mask; #endif + u8 mctrl_mask; unsigned char buf[SC16IS7XX_FIFO_SIZE]; struct kthread_worker kworker; struct task_struct *kworker_task; @@ -447,35 +450,30 @@ static const struct sc16is7xx_devtype sc16is74x_devtype = { .name = "SC16IS74X", .nr_gpio = 0, .nr_uart = 1, - .has_mctrl = 0, }; static const struct sc16is7xx_devtype sc16is750_devtype = { .name = "SC16IS750", - .nr_gpio = 4, + .nr_gpio = 8, .nr_uart = 1, - .has_mctrl = 1, }; static const struct sc16is7xx_devtype sc16is752_devtype = { .name = "SC16IS752", - .nr_gpio = 0, + .nr_gpio = 8, .nr_uart = 2, - .has_mctrl = 1, }; static const struct sc16is7xx_devtype sc16is760_devtype = { .name = "SC16IS760", - .nr_gpio = 4, + .nr_gpio = 8, .nr_uart = 1, - .has_mctrl = 1, }; static const struct sc16is7xx_devtype sc16is762_devtype = { .name = "SC16IS762", - .nr_gpio = 0, + .nr_gpio = 8, .nr_uart = 2, - .has_mctrl = 1, }; static bool sc16is7xx_regmap_volatile(struct device *dev, unsigned int reg) @@ -488,6 +486,7 @@ static bool sc16is7xx_regmap_volatile(struct device *dev, unsigned int reg) case SC16IS7XX_TXLVL_REG: case SC16IS7XX_RXLVL_REG: case SC16IS7XX_IOSTATE_REG: + case SC16IS7XX_IOCONTROL_REG: return true; default: break; @@ -578,8 +577,9 @@ static void sc16is7xx_handle_rx(struct uart_port *port, unsigned int rxlen, unsigned int iir) { struct sc16is7xx_port *s = dev_get_drvdata(port->dev); - unsigned int lsr = 0, ch, flag, bytes_read, i; + unsigned int lsr = 0, bytes_read, i; bool read_lsr = (iir == SC16IS7XX_IIR_RLSE_SRC) ? true : false; + u8 ch, flag; if (unlikely(rxlen >= sizeof(s->buf))) { dev_warn_ratelimited(port->dev, @@ -1342,14 +1342,113 @@ static int sc16is7xx_gpio_direction_output(struct gpio_chip *chip, state |= BIT(offset); else state &= ~BIT(offset); - sc16is7xx_port_write(port, SC16IS7XX_IOSTATE_REG, state); + + /* + * If we write IOSTATE first, and then IODIR, the output value is not + * transferred to the corresponding I/O pin. + * The datasheet states that each register bit will be transferred to + * the corresponding I/O pin programmed as output when writing to + * IOSTATE. Therefore, configure direction first with IODIR, and then + * set value after with IOSTATE. + */ sc16is7xx_port_update(port, SC16IS7XX_IODIR_REG, BIT(offset), BIT(offset)); + sc16is7xx_port_write(port, SC16IS7XX_IOSTATE_REG, state); return 0; } + +static int sc16is7xx_gpio_init_valid_mask(struct gpio_chip *chip, + unsigned long *valid_mask, + unsigned int ngpios) +{ + struct sc16is7xx_port *s = gpiochip_get_data(chip); + + *valid_mask = s->gpio_valid_mask; + + return 0; +} + +static int sc16is7xx_setup_gpio_chip(struct sc16is7xx_port *s) +{ + struct device *dev = s->p[0].port.dev; + + if (!s->devtype->nr_gpio) + return 0; + + switch (s->mctrl_mask) { + case 0: + s->gpio_valid_mask = GENMASK(7, 0); + break; + case SC16IS7XX_IOCONTROL_MODEM_A_BIT: + s->gpio_valid_mask = GENMASK(3, 0); + break; + case SC16IS7XX_IOCONTROL_MODEM_B_BIT: + s->gpio_valid_mask = GENMASK(7, 4); + break; + default: + break; + } + + if (s->gpio_valid_mask == 0) + return 0; + + s->gpio.owner = THIS_MODULE; + s->gpio.parent = dev; + s->gpio.label = dev_name(dev); + s->gpio.init_valid_mask = sc16is7xx_gpio_init_valid_mask; + s->gpio.direction_input = sc16is7xx_gpio_direction_input; + s->gpio.get = sc16is7xx_gpio_get; + s->gpio.direction_output = sc16is7xx_gpio_direction_output; + s->gpio.set = sc16is7xx_gpio_set; + s->gpio.base = -1; + s->gpio.ngpio = s->devtype->nr_gpio; + s->gpio.can_sleep = 1; + + return gpiochip_add_data(&s->gpio, s); +} #endif +/* + * Configure ports designated to operate as modem control lines. + */ +static int sc16is7xx_setup_mctrl_ports(struct sc16is7xx_port *s) +{ + int i; + int ret; + int count; + u32 mctrl_port[2]; + struct device *dev = s->p[0].port.dev; + + count = device_property_count_u32(dev, "nxp,modem-control-line-ports"); + if (count < 0 || count > ARRAY_SIZE(mctrl_port)) + return 0; + + ret = device_property_read_u32_array(dev, "nxp,modem-control-line-ports", + mctrl_port, count); + if (ret) + return ret; + + s->mctrl_mask = 0; + + for (i = 0; i < count; i++) { + /* Use GPIO lines as modem control lines */ + if (mctrl_port[i] == 0) + s->mctrl_mask |= SC16IS7XX_IOCONTROL_MODEM_A_BIT; + else if (mctrl_port[i] == 1) + s->mctrl_mask |= SC16IS7XX_IOCONTROL_MODEM_B_BIT; + } + + if (s->mctrl_mask) + regmap_update_bits( + s->regmap, + SC16IS7XX_IOCONTROL_REG << SC16IS7XX_REG_SHIFT, + SC16IS7XX_IOCONTROL_MODEM_A_BIT | + SC16IS7XX_IOCONTROL_MODEM_B_BIT, s->mctrl_mask); + + return 0; +} + static const struct serial_rs485 sc16is7xx_rs485_supported = { .flags = SER_RS485_ENABLED | SER_RS485_RTS_AFTER_SEND, .delay_rts_before_send = 1, @@ -1436,6 +1535,12 @@ static int sc16is7xx_probe(struct device *dev, s->p[i].port.fifosize = SC16IS7XX_FIFO_SIZE; s->p[i].port.flags = UPF_FIXED_TYPE | UPF_LOW_LATENCY; s->p[i].port.iobase = i; + /* + * Use all ones as membase to make sure uart_configure_port() in + * serial_core.c does not abort for SPI/I2C devices where the + * membase address is not applicable. + */ + s->p[i].port.membase = (void __iomem *)~0; s->p[i].port.iotype = UPIO_PORT; s->p[i].port.uartclk = freq; s->p[i].port.rs485_config = sc16is7xx_config_rs485; @@ -1449,6 +1554,10 @@ static int sc16is7xx_probe(struct device *dev, goto out_ports; } + ret = uart_get_rs485_mode(&s->p[i].port); + if (ret) + goto out_ports; + /* Disable all interrupts */ sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_IER_REG, 0); /* Disable TX/RX */ @@ -1456,12 +1565,6 @@ static int sc16is7xx_probe(struct device *dev, SC16IS7XX_EFCR_RXDISABLE_BIT | SC16IS7XX_EFCR_TXDISABLE_BIT); - /* Use GPIO lines as modem status registers */ - if (devtype->has_mctrl) - sc16is7xx_port_write(&s->p[i].port, - SC16IS7XX_IOCONTROL_REG, - SC16IS7XX_IOCONTROL_MODEM_BIT); - /* Initialize kthread work structs */ kthread_init_work(&s->p[i].tx_work, sc16is7xx_tx_proc); kthread_init_work(&s->p[i].reg_work, sc16is7xx_reg_proc); @@ -1499,23 +1602,14 @@ static int sc16is7xx_probe(struct device *dev, s->p[u].irda_mode = true; } + ret = sc16is7xx_setup_mctrl_ports(s); + if (ret) + goto out_ports; + #ifdef CONFIG_GPIOLIB - if (devtype->nr_gpio) { - /* Setup GPIO cotroller */ - s->gpio.owner = THIS_MODULE; - s->gpio.parent = dev; - s->gpio.label = dev_name(dev); - s->gpio.direction_input = sc16is7xx_gpio_direction_input; - s->gpio.get = sc16is7xx_gpio_get; - s->gpio.direction_output = sc16is7xx_gpio_direction_output; - s->gpio.set = sc16is7xx_gpio_set; - s->gpio.base = -1; - s->gpio.ngpio = devtype->nr_gpio; - s->gpio.can_sleep = 1; - ret = gpiochip_add_data(&s->gpio, s); - if (ret) - goto out_thread; - } + ret = sc16is7xx_setup_gpio_chip(s); + if (ret) + goto out_ports; #endif /* @@ -1538,10 +1632,8 @@ static int sc16is7xx_probe(struct device *dev, return 0; #ifdef CONFIG_GPIOLIB - if (devtype->nr_gpio) + if (s->gpio_valid_mask) gpiochip_remove(&s->gpio); - -out_thread: #endif out_ports: @@ -1564,7 +1656,7 @@ static void sc16is7xx_remove(struct device *dev) int i; #ifdef CONFIG_GPIOLIB - if (s->devtype->nr_gpio) + if (s->gpio_valid_mask) gpiochip_remove(&s->gpio); #endif diff --git a/drivers/tty/serial/sccnxp.c b/drivers/tty/serial/sccnxp.c index 4f2fc5f7bb19..2be2c1098025 100644 --- a/drivers/tty/serial/sccnxp.c +++ b/drivers/tty/serial/sccnxp.c @@ -383,8 +383,7 @@ static void sccnxp_set_bit(struct uart_port *port, int sig, int state) static void sccnxp_handle_rx(struct uart_port *port) { - u8 sr; - unsigned int ch, flag; + u8 sr, ch, flag; for (;;) { sr = sccnxp_port_read(port, SCCNXP_SR_REG); @@ -880,14 +879,14 @@ MODULE_DEVICE_TABLE(platform, sccnxp_id_table); static int sccnxp_probe(struct platform_device *pdev) { - struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); struct sccnxp_pdata *pdata = dev_get_platdata(&pdev->dev); + struct resource *res; int i, ret, uartclk; struct sccnxp_port *s; void __iomem *membase; struct clk *clk; - membase = devm_ioremap_resource(&pdev->dev, res); + membase = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(membase)) return PTR_ERR(membase); diff --git a/drivers/tty/serial/serial-tegra.c b/drivers/tty/serial/serial-tegra.c index 1cf08b33456c..d4ec943cb8e9 100644 --- a/drivers/tty/serial/serial-tegra.c +++ b/drivers/tty/serial/serial-tegra.c @@ -20,7 +20,6 @@ #include #include #include -#include #include #include #include @@ -434,10 +433,10 @@ static int tegra_set_baudrate(struct tegra_uart_port *tup, unsigned int baud) return 0; } -static char tegra_uart_decode_rx_error(struct tegra_uart_port *tup, +static u8 tegra_uart_decode_rx_error(struct tegra_uart_port *tup, unsigned long lsr) { - char flag = TTY_NORMAL; + u8 flag = TTY_NORMAL; if (unlikely(lsr & TEGRA_UART_LSR_ANY)) { if (lsr & UART_LSR_OE) { @@ -642,9 +641,8 @@ static void tegra_uart_handle_rx_pio(struct tegra_uart_port *tup, struct tty_port *port) { do { - char flag = TTY_NORMAL; unsigned long lsr = 0; - unsigned char ch; + u8 ch, flag = TTY_NORMAL; lsr = tegra_uart_read(tup, UART_LSR); if (!(lsr & UART_LSR_DR)) @@ -998,7 +996,11 @@ static int tegra_uart_hw_init(struct tegra_uart_port *tup) tup->ier_shadow = 0; tup->current_baud = 0; - clk_prepare_enable(tup->uart_clk); + ret = clk_prepare_enable(tup->uart_clk); + if (ret) { + dev_err(tup->uport.dev, "could not enable clk\n"); + return ret; + } /* Reset the UART controller to clear all previous status.*/ reset_control_assert(tup->rst); @@ -1579,22 +1581,15 @@ static int tegra_uart_probe(struct platform_device *pdev) tup->cdata = cdata; platform_set_drvdata(pdev, tup); - resource = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!resource) { - dev_err(&pdev->dev, "No IO memory resource\n"); - return -ENODEV; - } - u->mapbase = resource->start; - u->membase = devm_ioremap_resource(&pdev->dev, resource); + u->membase = devm_platform_get_and_ioremap_resource(pdev, 0, &resource); if (IS_ERR(u->membase)) return PTR_ERR(u->membase); + u->mapbase = resource->start; tup->uart_clk = devm_clk_get(&pdev->dev, NULL); - if (IS_ERR(tup->uart_clk)) { - dev_err(&pdev->dev, "Couldn't get the clock\n"); - return PTR_ERR(tup->uart_clk); - } + if (IS_ERR(tup->uart_clk)) + return dev_err_probe(&pdev->dev, PTR_ERR(tup->uart_clk), "Couldn't get the clock"); tup->rst = devm_reset_control_get_exclusive(&pdev->dev, "serial"); if (IS_ERR(tup->rst)) { diff --git a/drivers/tty/serial/serial_core.c b/drivers/tty/serial/serial_core.c index 831d033611e6..7bdc21d5e13b 100644 --- a/drivers/tty/serial/serial_core.c +++ b/drivers/tty/serial/serial_core.c @@ -133,9 +133,8 @@ static void uart_stop(struct tty_struct *tty) uart_port_unlock(port, flags); } -static void __uart_start(struct tty_struct *tty) +static void __uart_start(struct uart_state *state) { - struct uart_state *state = tty->driver_data; struct uart_port *port = state->uart_port; struct serial_port_device *port_dev; int err; @@ -170,7 +169,7 @@ static void uart_start(struct tty_struct *tty) unsigned long flags; port = uart_port_lock(state, flags); - __uart_start(tty); + __uart_start(state); uart_port_unlock(port, flags); } @@ -239,7 +238,7 @@ static void uart_change_line_settings(struct tty_struct *tty, struct uart_state if (!old_hw_stopped) uport->ops->stop_tx(uport); else - __uart_start(tty); + __uart_start(state); } spin_unlock_irq(&uport->lock); } @@ -552,7 +551,7 @@ uart_get_divisor(struct uart_port *port, unsigned int baud) } EXPORT_SYMBOL(uart_get_divisor); -static int uart_put_char(struct tty_struct *tty, unsigned char c) +static int uart_put_char(struct tty_struct *tty, u8 c) { struct uart_state *state = tty->driver_data; struct uart_port *port; @@ -581,8 +580,7 @@ static void uart_flush_chars(struct tty_struct *tty) uart_start(tty); } -static int uart_write(struct tty_struct *tty, - const unsigned char *buf, int count) +static ssize_t uart_write(struct tty_struct *tty, const u8 *buf, size_t count) { struct uart_state *state = tty->driver_data; struct uart_port *port; @@ -594,10 +592,8 @@ static int uart_write(struct tty_struct *tty, * This means you called this function _after_ the port was * closed. No cookie for you. */ - if (!state) { - WARN_ON(1); + if (WARN_ON(!state)) return -EL3HLT; - } port = uart_port_lock(state, flags); circ = &state->xmit; @@ -619,7 +615,7 @@ static int uart_write(struct tty_struct *tty, ret += c; } - __uart_start(tty); + __uart_start(state); uart_port_unlock(port, flags); return ret; } @@ -660,10 +656,8 @@ static void uart_flush_buffer(struct tty_struct *tty) * This means you called this function _after_ the port was * closed. No cookie for you. */ - if (!state) { - WARN_ON(1); + if (WARN_ON(!state)) return; - } pr_debug("uart_flush_buffer(%d) called\n", tty->index); @@ -3486,7 +3480,7 @@ EXPORT_SYMBOL_GPL(uart_handle_cts_change); * @flag: flag for the character (see TTY_NORMAL and friends) */ void uart_insert_char(struct uart_port *port, unsigned int status, - unsigned int overrun, unsigned int ch, unsigned int flag) + unsigned int overrun, u8 ch, u8 flag) { struct tty_port *tport = &port->state->port; @@ -3505,7 +3499,7 @@ void uart_insert_char(struct uart_port *port, unsigned int status, EXPORT_SYMBOL_GPL(uart_insert_char); #ifdef CONFIG_MAGIC_SYSRQ_SERIAL -static const char sysrq_toggle_seq[] = CONFIG_MAGIC_SYSRQ_SERIAL_SEQUENCE; +static const u8 sysrq_toggle_seq[] = CONFIG_MAGIC_SYSRQ_SERIAL_SEQUENCE; static void uart_sysrq_on(struct work_struct *w) { @@ -3528,7 +3522,7 @@ static DECLARE_WORK(sysrq_enable_work, uart_sysrq_on); * Returns: %false if @ch is out of enabling sequence and should be * handled some other way, %true if @ch was consumed. */ -bool uart_try_toggle_sysrq(struct uart_port *port, unsigned int ch) +bool uart_try_toggle_sysrq(struct uart_port *port, u8 ch) { int sysrq_toggle_seq_len = strlen(sysrq_toggle_seq); diff --git a/drivers/tty/serial/serial_txx9.c b/drivers/tty/serial/serial_txx9.c index eab387b01e36..be08fb6f749c 100644 --- a/drivers/tty/serial/serial_txx9.c +++ b/drivers/tty/serial/serial_txx9.c @@ -246,11 +246,10 @@ static void serial_txx9_initialize(struct uart_port *up) static inline void receive_chars(struct uart_port *up, unsigned int *status) { - unsigned char ch; unsigned int disr = *status; int max_count = 256; - char flag; unsigned int next_ignore_status_mask; + u8 ch, flag; do { ch = sio_in(up, TXX9_SIRFIFO); diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c index 8b7a42e05d6d..a560b729fa3b 100644 --- a/drivers/tty/serial/sh-sci.c +++ b/drivers/tty/serial/sh-sci.c @@ -35,7 +35,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/tty/serial/sifive.c b/drivers/tty/serial/sifive.c index a19db49327e2..d195c5de52e7 100644 --- a/drivers/tty/serial/sifive.c +++ b/drivers/tty/serial/sifive.c @@ -402,9 +402,9 @@ static char __ssp_receive_char(struct sifive_serial_port *ssp, char *is_empty) */ static void __ssp_receive_chars(struct sifive_serial_port *ssp) { - unsigned char ch; char is_empty; int c; + u8 ch; for (c = SIFIVE_RX_FIFO_DEPTH; c > 0; --c) { ch = __ssp_receive_char(ssp, &is_empty); @@ -917,12 +917,9 @@ static int sifive_serial_probe(struct platform_device *pdev) if (irq < 0) return -EPROBE_DEFER; - mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); - base = devm_ioremap_resource(&pdev->dev, mem); - if (IS_ERR(base)) { - dev_err(&pdev->dev, "could not acquire device memory\n"); + base = devm_platform_get_and_ioremap_resource(pdev, 0, &mem); + if (IS_ERR(base)) return PTR_ERR(base); - } clk = devm_clk_get_enabled(&pdev->dev, NULL); if (IS_ERR(clk)) { @@ -1022,6 +1019,23 @@ static int sifive_serial_remove(struct platform_device *dev) return 0; } +static int sifive_serial_suspend(struct device *dev) +{ + struct sifive_serial_port *ssp = dev_get_drvdata(dev); + + return uart_suspend_port(&sifive_serial_uart_driver, &ssp->port); +} + +static int sifive_serial_resume(struct device *dev) +{ + struct sifive_serial_port *ssp = dev_get_drvdata(dev); + + return uart_resume_port(&sifive_serial_uart_driver, &ssp->port); +} + +DEFINE_SIMPLE_DEV_PM_OPS(sifive_uart_pm_ops, sifive_serial_suspend, + sifive_serial_resume); + static const struct of_device_id sifive_serial_of_match[] = { { .compatible = "sifive,fu540-c000-uart0" }, { .compatible = "sifive,uart0" }, @@ -1034,7 +1048,8 @@ static struct platform_driver sifive_serial_platform_driver = { .remove = sifive_serial_remove, .driver = { .name = SIFIVE_SERIAL_NAME, - .of_match_table = of_match_ptr(sifive_serial_of_match), + .pm = pm_sleep_ptr(&sifive_uart_pm_ops), + .of_match_table = sifive_serial_of_match, }, }; diff --git a/drivers/tty/serial/sprd_serial.c b/drivers/tty/serial/sprd_serial.c index b58f51296ace..f328fa57231f 100644 --- a/drivers/tty/serial/sprd_serial.c +++ b/drivers/tty/serial/sprd_serial.c @@ -364,7 +364,7 @@ static void sprd_rx_free_buf(struct sprd_uart_port *sp) if (sp->rx_dma.virt) dma_free_coherent(sp->port.dev, SPRD_UART_RX_SIZE, sp->rx_dma.virt, sp->rx_dma.phys_addr); - + sp->rx_dma.virt = NULL; } static int sprd_rx_dma_config(struct uart_port *port, u32 burst) @@ -558,7 +558,7 @@ static void sprd_break_ctl(struct uart_port *port, int break_state) } static int handle_lsr_errors(struct uart_port *port, - unsigned int *flag, + u8 *flag, unsigned int *lsr) { int ret = 0; @@ -594,7 +594,8 @@ static inline void sprd_rx(struct uart_port *port) struct sprd_uart_port *sp = container_of(port, struct sprd_uart_port, port); struct tty_port *tty = &port->state->port; - unsigned int ch, flag, lsr, max_count = SPRD_TIMEOUT; + unsigned int lsr, max_count = SPRD_TIMEOUT; + u8 ch, flag; if (sp->rx_dma.enable) { sprd_uart_dma_irq(port); @@ -1106,7 +1107,7 @@ static bool sprd_uart_is_console(struct uart_port *uport) static int sprd_clk_init(struct uart_port *uport) { struct clk *clk_uart, *clk_parent; - struct sprd_uart_port *u = sprd_port[uport->line]; + struct sprd_uart_port *u = container_of(uport, struct sprd_uart_port, port); clk_uart = devm_clk_get(uport->dev, "uart"); if (IS_ERR(clk_uart)) { @@ -1149,22 +1150,22 @@ static int sprd_probe(struct platform_device *pdev) { struct resource *res; struct uart_port *up; + struct sprd_uart_port *sport; int irq; int index; int ret; index = of_alias_get_id(pdev->dev.of_node, "serial"); - if (index < 0 || index >= ARRAY_SIZE(sprd_port)) { + if (index < 0 || index >= UART_NR_MAX) { dev_err(&pdev->dev, "got a wrong serial alias id %d\n", index); return -EINVAL; } - sprd_port[index] = devm_kzalloc(&pdev->dev, sizeof(*sprd_port[index]), - GFP_KERNEL); - if (!sprd_port[index]) + sport = devm_kzalloc(&pdev->dev, sizeof(*sport), GFP_KERNEL); + if (!sport) return -ENOMEM; - up = &sprd_port[index]->port; + up = &sport->port; up->dev = &pdev->dev; up->line = index; up->type = PORT_SPRD; @@ -1179,8 +1180,7 @@ static int sprd_probe(struct platform_device *pdev) if (ret) return ret; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - up->membase = devm_ioremap_resource(&pdev->dev, res); + up->membase = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(up->membase)) return PTR_ERR(up->membase); @@ -1195,7 +1195,7 @@ static int sprd_probe(struct platform_device *pdev) * Allocate one dma buffer to prepare for receive transfer, in case * memory allocation failure at runtime. */ - ret = sprd_rx_alloc_buf(sprd_port[index]); + ret = sprd_rx_alloc_buf(sport); if (ret) return ret; @@ -1203,17 +1203,27 @@ static int sprd_probe(struct platform_device *pdev) ret = uart_register_driver(&sprd_uart_driver); if (ret < 0) { pr_err("Failed to register SPRD-UART driver\n"); - return ret; + goto free_rx_buf; } } + sprd_ports_num++; + sprd_port[index] = sport; ret = uart_add_one_port(&sprd_uart_driver, up); if (ret) - sprd_remove(pdev); + goto clean_port; platform_set_drvdata(pdev, up); + return 0; + +clean_port: + sprd_port[index] = NULL; + if (--sprd_ports_num == 0) + uart_unregister_driver(&sprd_uart_driver); +free_rx_buf: + sprd_rx_free_buf(sport); return ret; } diff --git a/drivers/tty/serial/st-asc.c b/drivers/tty/serial/st-asc.c index aa471c9c24d9..92b9f6894006 100644 --- a/drivers/tty/serial/st-asc.c +++ b/drivers/tty/serial/st-asc.c @@ -250,7 +250,7 @@ static void asc_receive_chars(struct uart_port *port) struct tty_port *tport = &port->state->port; unsigned long status, mode; unsigned long c = 0; - char flag; + u8 flag; bool ignore_pe = false; /* @@ -691,8 +691,7 @@ static int asc_init_port(struct asc_port *ascport, port->irq = platform_get_irq(pdev, 0); port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_ST_ASC_CONSOLE); - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - port->membase = devm_ioremap_resource(&pdev->dev, res); + port->membase = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(port->membase)) return PTR_ERR(port->membase); port->mapbase = res->start; @@ -704,7 +703,9 @@ static int asc_init_port(struct asc_port *ascport, if (WARN_ON(IS_ERR(ascport->clk))) return -EINVAL; /* ensure that clk rate is correct by enabling the clk */ - clk_prepare_enable(ascport->clk); + ret = clk_prepare_enable(ascport->clk); + if (ret) + return ret; ascport->port.uartclk = clk_get_rate(ascport->clk); WARN_ON(ascport->port.uartclk == 0); clk_disable_unprepare(ascport->clk); diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c index e9e11a259621..5e9cf0c48813 100644 --- a/drivers/tty/serial/stm32-usart.c +++ b/drivers/tty/serial/stm32-usart.c @@ -289,15 +289,57 @@ static int stm32_usart_init_rs485(struct uart_port *port, return uart_get_rs485_mode(port); } -static bool stm32_usart_rx_dma_enabled(struct uart_port *port) +static bool stm32_usart_rx_dma_started(struct stm32_port *stm32_port) { - struct stm32_port *stm32_port = to_stm32_port(port); - const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; + return stm32_port->rx_ch ? stm32_port->rx_dma_busy : false; +} - if (!stm32_port->rx_ch) - return false; +static void stm32_usart_rx_dma_terminate(struct stm32_port *stm32_port) +{ + dmaengine_terminate_async(stm32_port->rx_ch); + stm32_port->rx_dma_busy = false; +} - return !!(readl_relaxed(port->membase + ofs->cr3) & USART_CR3_DMAR); +static int stm32_usart_dma_pause_resume(struct stm32_port *stm32_port, + struct dma_chan *chan, + enum dma_status expected_status, + int dmaengine_pause_or_resume(struct dma_chan *), + bool stm32_usart_xx_dma_started(struct stm32_port *), + void stm32_usart_xx_dma_terminate(struct stm32_port *)) +{ + struct uart_port *port = &stm32_port->port; + enum dma_status dma_status; + int ret; + + if (!stm32_usart_xx_dma_started(stm32_port)) + return -EPERM; + + dma_status = dmaengine_tx_status(chan, chan->cookie, NULL); + if (dma_status != expected_status) + return -EAGAIN; + + ret = dmaengine_pause_or_resume(chan); + if (ret) { + dev_err(port->dev, "DMA failed with error code: %d\n", ret); + stm32_usart_xx_dma_terminate(stm32_port); + } + return ret; +} + +static int stm32_usart_rx_dma_pause(struct stm32_port *stm32_port) +{ + return stm32_usart_dma_pause_resume(stm32_port, stm32_port->rx_ch, + DMA_IN_PROGRESS, dmaengine_pause, + stm32_usart_rx_dma_started, + stm32_usart_rx_dma_terminate); +} + +static int stm32_usart_rx_dma_resume(struct stm32_port *stm32_port) +{ + return stm32_usart_dma_pause_resume(stm32_port, stm32_port->rx_ch, + DMA_PAUSED, dmaengine_resume, + stm32_usart_rx_dma_started, + stm32_usart_rx_dma_terminate); } /* Return true when data is pending (in pio mode), and false when no data is pending. */ @@ -310,7 +352,7 @@ static bool stm32_usart_pending_rx_pio(struct uart_port *port, u32 *sr) /* Get pending characters in RDR or FIFO */ if (*sr & USART_SR_RXNE) { /* Get all pending characters from the RDR or the FIFO when using interrupts */ - if (!stm32_usart_rx_dma_enabled(port)) + if (!stm32_usart_rx_dma_started(stm32_port)) return true; /* Handle only RX data errors when using DMA */ @@ -321,7 +363,7 @@ static bool stm32_usart_pending_rx_pio(struct uart_port *port, u32 *sr) return false; } -static unsigned long stm32_usart_get_char_pio(struct uart_port *port) +static u8 stm32_usart_get_char_pio(struct uart_port *port) { struct stm32_port *stm32_port = to_stm32_port(port); const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; @@ -338,10 +380,9 @@ static unsigned int stm32_usart_receive_chars_pio(struct uart_port *port) { struct stm32_port *stm32_port = to_stm32_port(port); const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; - unsigned long c; unsigned int size = 0; u32 sr; - char flag; + u8 c, flag; while (stm32_usart_pending_rx_pio(port, &sr)) { sr |= USART_SR_DUMMY_RX; @@ -456,11 +497,12 @@ static unsigned int stm32_usart_receive_chars(struct uart_port *port, bool force u32 sr; unsigned int size = 0; - if (stm32_usart_rx_dma_enabled(port) || force_dma_flush) { + if (stm32_usart_rx_dma_started(stm32_port) || force_dma_flush) { rx_dma_status = dmaengine_tx_status(stm32_port->rx_ch, stm32_port->rx_ch->cookie, &stm32_port->rx_dma_state); - if (rx_dma_status == DMA_IN_PROGRESS) { + if (rx_dma_status == DMA_IN_PROGRESS || + rx_dma_status == DMA_PAUSED) { /* Empty DMA buffer */ size = stm32_usart_receive_chars_dma(port); sr = readl_relaxed(port->membase + ofs->isr); @@ -476,8 +518,7 @@ static unsigned int stm32_usart_receive_chars(struct uart_port *port, bool force } } else { /* Disable RX DMA */ - dmaengine_terminate_async(stm32_port->rx_ch); - stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_DMAR); + stm32_usart_rx_dma_terminate(stm32_port); /* Fall back to interrupt mode */ dev_dbg(port->dev, "DMA error, fallback to irq mode\n"); size = stm32_usart_receive_chars_pio(port); @@ -489,6 +530,76 @@ static unsigned int stm32_usart_receive_chars(struct uart_port *port, bool force return size; } +static void stm32_usart_rx_dma_complete(void *arg) +{ + struct uart_port *port = arg; + struct tty_port *tport = &port->state->port; + unsigned int size; + unsigned long flags; + + spin_lock_irqsave(&port->lock, flags); + size = stm32_usart_receive_chars(port, false); + uart_unlock_and_check_sysrq_irqrestore(port, flags); + if (size) + tty_flip_buffer_push(tport); +} + +static int stm32_usart_rx_dma_start_or_resume(struct uart_port *port) +{ + struct stm32_port *stm32_port = to_stm32_port(port); + struct dma_async_tx_descriptor *desc; + enum dma_status rx_dma_status; + int ret; + + if (stm32_port->throttled) + return 0; + + if (stm32_port->rx_dma_busy) { + rx_dma_status = dmaengine_tx_status(stm32_port->rx_ch, + stm32_port->rx_ch->cookie, + NULL); + if (rx_dma_status == DMA_IN_PROGRESS) + return 0; + + if (rx_dma_status == DMA_PAUSED && !stm32_usart_rx_dma_resume(stm32_port)) + return 0; + + dev_err(port->dev, "DMA failed : status error.\n"); + stm32_usart_rx_dma_terminate(stm32_port); + } + + stm32_port->rx_dma_busy = true; + + stm32_port->last_res = RX_BUF_L; + /* Prepare a DMA cyclic transaction */ + desc = dmaengine_prep_dma_cyclic(stm32_port->rx_ch, + stm32_port->rx_dma_buf, + RX_BUF_L, RX_BUF_P, + DMA_DEV_TO_MEM, + DMA_PREP_INTERRUPT); + if (!desc) { + dev_err(port->dev, "rx dma prep cyclic failed\n"); + stm32_port->rx_dma_busy = false; + return -ENODEV; + } + + desc->callback = stm32_usart_rx_dma_complete; + desc->callback_param = port; + + /* Push current DMA transaction in the pending queue */ + ret = dma_submit_error(dmaengine_submit(desc)); + if (ret) { + dmaengine_terminate_sync(stm32_port->rx_ch); + stm32_port->rx_dma_busy = false; + return ret; + } + + /* Issue pending DMA requests */ + dma_async_issue_pending(stm32_port->rx_ch); + + return 0; +} + static void stm32_usart_tx_dma_terminate(struct stm32_port *stm32_port) { dmaengine_terminate_async(stm32_port->tx_ch); @@ -507,21 +618,28 @@ static bool stm32_usart_tx_dma_started(struct stm32_port *stm32_port) return stm32_port->tx_dma_busy; } -static bool stm32_usart_tx_dma_enabled(struct stm32_port *stm32_port) +static int stm32_usart_tx_dma_pause(struct stm32_port *stm32_port) { - const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; + return stm32_usart_dma_pause_resume(stm32_port, stm32_port->tx_ch, + DMA_IN_PROGRESS, dmaengine_pause, + stm32_usart_tx_dma_started, + stm32_usart_tx_dma_terminate); +} - return !!(readl_relaxed(stm32_port->port.membase + ofs->cr3) & USART_CR3_DMAT); +static int stm32_usart_tx_dma_resume(struct stm32_port *stm32_port) +{ + return stm32_usart_dma_pause_resume(stm32_port, stm32_port->tx_ch, + DMA_PAUSED, dmaengine_resume, + stm32_usart_tx_dma_started, + stm32_usart_tx_dma_terminate); } static void stm32_usart_tx_dma_complete(void *arg) { struct uart_port *port = arg; struct stm32_port *stm32port = to_stm32_port(port); - const struct stm32_usart_offsets *ofs = &stm32port->info->ofs; unsigned long flags; - stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_DMAT); stm32_usart_tx_dma_terminate(stm32port); /* Let's see if we have pending data to send */ @@ -553,20 +671,6 @@ static void stm32_usart_tc_interrupt_enable(struct uart_port *port) stm32_usart_set_bits(port, ofs->cr1, USART_CR1_TCIE); } -static void stm32_usart_rx_dma_complete(void *arg) -{ - struct uart_port *port = arg; - struct tty_port *tport = &port->state->port; - unsigned int size; - unsigned long flags; - - spin_lock_irqsave(&port->lock, flags); - size = stm32_usart_receive_chars(port, false); - uart_unlock_and_check_sysrq_irqrestore(port, flags); - if (size) - tty_flip_buffer_push(tport); -} - static void stm32_usart_tx_interrupt_disable(struct uart_port *port) { struct stm32_port *stm32_port = to_stm32_port(port); @@ -592,9 +696,6 @@ static void stm32_usart_transmit_chars_pio(struct uart_port *port) const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; struct circ_buf *xmit = &port->state->xmit; - if (stm32_usart_tx_dma_enabled(stm32_port)) - stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_DMAT); - while (!uart_circ_empty(xmit)) { /* Check that TDR is empty before filling FIFO */ if (!(readl_relaxed(port->membase + ofs->isr) & USART_SR_TXE)) @@ -613,14 +714,15 @@ static void stm32_usart_transmit_chars_pio(struct uart_port *port) static void stm32_usart_transmit_chars_dma(struct uart_port *port) { struct stm32_port *stm32port = to_stm32_port(port); - const struct stm32_usart_offsets *ofs = &stm32port->info->ofs; struct circ_buf *xmit = &port->state->xmit; struct dma_async_tx_descriptor *desc = NULL; unsigned int count; + int ret; if (stm32_usart_tx_dma_started(stm32port)) { - if (!stm32_usart_tx_dma_enabled(stm32port)) - stm32_usart_set_bits(port, ofs->cr3, USART_CR3_DMAT); + ret = stm32_usart_tx_dma_resume(stm32port); + if (ret < 0 && ret != -EAGAIN) + goto fallback_err; return; } @@ -665,8 +767,10 @@ static void stm32_usart_transmit_chars_dma(struct uart_port *port) desc->callback_param = port; /* Push current DMA TX transaction in the pending queue */ - if (dma_submit_error(dmaengine_submit(desc))) { - /* dma no yet started, safe to free resources */ + /* DMA no yet started, safe to free resources */ + ret = dma_submit_error(dmaengine_submit(desc)); + if (ret) { + dev_err(port->dev, "DMA failed with error code: %d\n", ret); stm32_usart_tx_dma_terminate(stm32port); goto fallback_err; } @@ -674,8 +778,6 @@ static void stm32_usart_transmit_chars_dma(struct uart_port *port) /* Issue pending DMA TX requests */ dma_async_issue_pending(stm32port->tx_ch); - stm32_usart_set_bits(port, ofs->cr3, USART_CR3_DMAT); - uart_xmit_advance(port, count); return; @@ -701,9 +803,8 @@ static void stm32_usart_transmit_chars(struct uart_port *port) } if (port->x_char) { - if (stm32_usart_tx_dma_started(stm32_port) && - stm32_usart_tx_dma_enabled(stm32_port)) - stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_DMAT); + /* dma terminate may have been called in case of dma pause failure */ + stm32_usart_tx_dma_pause(stm32_port); /* Check that TDR is empty before filling FIFO */ ret = @@ -717,8 +818,9 @@ static void stm32_usart_transmit_chars(struct uart_port *port) writel_relaxed(port->x_char, port->membase + ofs->tdr); port->x_char = 0; port->icount.tx++; - if (stm32_usart_tx_dma_started(stm32_port)) - stm32_usart_set_bits(port, ofs->cr3, USART_CR3_DMAT); + + /* dma terminate may have been called in case of dma resume failure */ + stm32_usart_tx_dma_resume(stm32_port); return; } @@ -785,8 +887,8 @@ static irqreturn_t stm32_usart_interrupt(int irq, void *ptr) * line has been masked by HW and rx data are stacking in FIFO. */ if (!stm32_port->throttled) { - if (((sr & USART_SR_RXNE) && !stm32_usart_rx_dma_enabled(port)) || - ((sr & USART_SR_ERR_MASK) && stm32_usart_rx_dma_enabled(port))) { + if (((sr & USART_SR_RXNE) && !stm32_usart_rx_dma_started(stm32_port)) || + ((sr & USART_SR_ERR_MASK) && stm32_usart_rx_dma_started(stm32_port))) { spin_lock(&port->lock); size = stm32_usart_receive_chars(port, false); uart_unlock_and_check_sysrq(port); @@ -802,7 +904,7 @@ static irqreturn_t stm32_usart_interrupt(int irq, void *ptr) } /* Receiver timeout irq for DMA RX */ - if (stm32_usart_rx_dma_enabled(port) && !stm32_port->throttled) { + if (stm32_usart_rx_dma_started(stm32_port) && !stm32_port->throttled) { spin_lock(&port->lock); size = stm32_usart_receive_chars(port, false); uart_unlock_and_check_sysrq(port); @@ -851,11 +953,11 @@ static void stm32_usart_disable_ms(struct uart_port *port) static void stm32_usart_stop_tx(struct uart_port *port) { struct stm32_port *stm32_port = to_stm32_port(port); - const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; stm32_usart_tx_interrupt_disable(port); - if (stm32_usart_tx_dma_started(stm32_port) && stm32_usart_tx_dma_enabled(stm32_port)) - stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_DMAT); + + /* dma terminate may have been called in case of dma pause failure */ + stm32_usart_tx_dma_pause(stm32_port); stm32_usart_rs485_rts_disable(port); } @@ -879,12 +981,9 @@ static void stm32_usart_start_tx(struct uart_port *port) static void stm32_usart_flush_buffer(struct uart_port *port) { struct stm32_port *stm32_port = to_stm32_port(port); - const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; - if (stm32_port->tx_ch) { + if (stm32_port->tx_ch) stm32_usart_tx_dma_terminate(stm32_port); - stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_DMAT); - } } /* Throttle the remote when input buffer is about to overflow. */ @@ -897,11 +996,10 @@ static void stm32_usart_throttle(struct uart_port *port) spin_lock_irqsave(&port->lock, flags); /* - * Disable DMA request line if enabled, so the RX data gets queued into the FIFO. + * Pause DMA transfer, so the RX data gets queued into the FIFO. * Hardware flow control is triggered when RX FIFO is full. */ - if (stm32_usart_rx_dma_enabled(port)) - stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_DMAR); + stm32_usart_rx_dma_pause(stm32_port); stm32_usart_clr_bits(port, ofs->cr1, stm32_port->cr1_irq); if (stm32_port->cr3_irq) @@ -923,14 +1021,15 @@ static void stm32_usart_unthrottle(struct uart_port *port) if (stm32_port->cr3_irq) stm32_usart_set_bits(port, ofs->cr3, stm32_port->cr3_irq); + stm32_port->throttled = false; + /* - * Switch back to DMA mode (re-enable DMA request line). + * Switch back to DMA mode (resume DMA). * Hardware flow control is stopped when FIFO is not full any more. */ if (stm32_port->rx_ch) - stm32_usart_set_bits(port, ofs->cr3, USART_CR3_DMAR); + stm32_usart_rx_dma_start_or_resume(port); - stm32_port->throttled = false; spin_unlock_irqrestore(&port->lock, flags); } @@ -941,8 +1040,7 @@ static void stm32_usart_stop_rx(struct uart_port *port) const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; /* Disable DMA request line. */ - if (stm32_port->rx_ch) - stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_DMAR); + stm32_usart_rx_dma_pause(stm32_port); stm32_usart_clr_bits(port, ofs->cr1, stm32_port->cr1_irq); if (stm32_port->cr3_irq) @@ -954,48 +1052,6 @@ static void stm32_usart_break_ctl(struct uart_port *port, int break_state) { } -static int stm32_usart_start_rx_dma_cyclic(struct uart_port *port) -{ - struct stm32_port *stm32_port = to_stm32_port(port); - const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; - struct dma_async_tx_descriptor *desc; - int ret; - - stm32_port->last_res = RX_BUF_L; - /* Prepare a DMA cyclic transaction */ - desc = dmaengine_prep_dma_cyclic(stm32_port->rx_ch, - stm32_port->rx_dma_buf, - RX_BUF_L, RX_BUF_P, - DMA_DEV_TO_MEM, - DMA_PREP_INTERRUPT); - if (!desc) { - dev_err(port->dev, "rx dma prep cyclic failed\n"); - return -ENODEV; - } - - desc->callback = stm32_usart_rx_dma_complete; - desc->callback_param = port; - - /* Push current DMA transaction in the pending queue */ - ret = dma_submit_error(dmaengine_submit(desc)); - if (ret) { - dmaengine_terminate_sync(stm32_port->rx_ch); - return ret; - } - - /* Issue pending DMA requests */ - dma_async_issue_pending(stm32_port->rx_ch); - - /* - * DMA request line not re-enabled at resume when port is throttled. - * It will be re-enabled by unthrottle ops. - */ - if (!stm32_port->throttled) - stm32_usart_set_bits(port, ofs->cr3, USART_CR3_DMAR); - - return 0; -} - static int stm32_usart_startup(struct uart_port *port) { struct stm32_port *stm32_port = to_stm32_port(port); @@ -1021,7 +1077,7 @@ static int stm32_usart_startup(struct uart_port *port) writel_relaxed(USART_RQR_RXFRQ, port->membase + ofs->rqr); if (stm32_port->rx_ch) { - ret = stm32_usart_start_rx_dma_cyclic(port); + ret = stm32_usart_rx_dma_start_or_resume(port); if (ret) { free_irq(port->irq, port); return ret; @@ -1043,12 +1099,12 @@ static void stm32_usart_shutdown(struct uart_port *port) u32 val, isr; int ret; - if (stm32_usart_tx_dma_enabled(stm32_port)) - stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_DMAT); - if (stm32_usart_tx_dma_started(stm32_port)) stm32_usart_tx_dma_terminate(stm32_port); + if (stm32_port->tx_ch) + stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_DMAT); + /* Disable modem control interrupts */ stm32_usart_disable_ms(port); @@ -1067,8 +1123,10 @@ static void stm32_usart_shutdown(struct uart_port *port) dev_err(port->dev, "Transmission is not complete\n"); /* Disable RX DMA. */ - if (stm32_port->rx_ch) - dmaengine_terminate_async(stm32_port->rx_ch); + if (stm32_port->rx_ch) { + stm32_usart_rx_dma_terminate(stm32_port); + dmaengine_synchronize(stm32_port->rx_ch); + } /* flush RX & TX FIFO */ if (ofs->rqr != UNDEF_REG) @@ -1259,6 +1317,9 @@ static void stm32_usart_set_termios(struct uart_port *port, cr3 |= USART_CR3_DDRE; } + if (stm32_port->tx_ch) + cr3 |= USART_CR3_DMAT; + if (rs485conf->flags & SER_RS485_ENABLED) { stm32_usart_config_reg_rs485(&cr1, &cr3, rs485conf->delay_rts_before_send, @@ -1765,11 +1826,6 @@ static int stm32_usart_serial_remove(struct platform_device *pdev) pm_runtime_put_noidle(&pdev->dev); stm32_usart_clr_bits(port, ofs->cr1, USART_CR1_PEIE); - cr3 = readl_relaxed(port->membase + ofs->cr3); - cr3 &= ~USART_CR3_EIE; - cr3 &= ~USART_CR3_DMAR; - cr3 &= ~USART_CR3_DDRE; - writel_relaxed(cr3, port->membase + ofs->cr3); if (stm32_port->tx_ch) { stm32_usart_of_dma_tx_remove(stm32_port, pdev); @@ -1781,7 +1837,12 @@ static int stm32_usart_serial_remove(struct platform_device *pdev) dma_release_channel(stm32_port->rx_ch); } - stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_DMAT); + cr3 = readl_relaxed(port->membase + ofs->cr3); + cr3 &= ~USART_CR3_EIE; + cr3 &= ~USART_CR3_DMAR; + cr3 &= ~USART_CR3_DMAT; + cr3 &= ~USART_CR3_DDRE; + writel_relaxed(cr3, port->membase + ofs->cr3); if (stm32_port->wakeup_src) { dev_pm_clear_wake_irq(&pdev->dev); @@ -1953,7 +2014,7 @@ static int __maybe_unused stm32_usart_serial_en_wakeup(struct uart_port *port, const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; struct tty_port *tport = &port->state->port; int ret; - unsigned int size; + unsigned int size = 0; unsigned long flags; if (!stm32_port->wakeup_src || !tty_port_initialized(tport)) @@ -1975,11 +2036,10 @@ static int __maybe_unused stm32_usart_serial_en_wakeup(struct uart_port *port, */ if (stm32_port->rx_ch) { spin_lock_irqsave(&port->lock, flags); - /* Avoid race with RX IRQ when DMAR is cleared */ - stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_DMAR); /* Poll data from DMA RX buffer if any */ - size = stm32_usart_receive_chars(port, true); - dmaengine_terminate_async(stm32_port->rx_ch); + if (!stm32_usart_rx_dma_pause(stm32_port)) + size += stm32_usart_receive_chars(port, true); + stm32_usart_rx_dma_terminate(stm32_port); uart_unlock_and_check_sysrq_irqrestore(port, flags); if (size) tty_flip_buffer_push(tport); @@ -1989,7 +2049,7 @@ static int __maybe_unused stm32_usart_serial_en_wakeup(struct uart_port *port, stm32_usart_receive_chars(port, false); } else { if (stm32_port->rx_ch) { - ret = stm32_usart_start_rx_dma_cyclic(port); + ret = stm32_usart_rx_dma_start_or_resume(port); if (ret) return ret; } diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h index 903285b5aea7..f59f831b2a10 100644 --- a/drivers/tty/serial/stm32-usart.h +++ b/drivers/tty/serial/stm32-usart.h @@ -199,6 +199,7 @@ struct stm32_port { u32 cr3_irq; /* USART_CR3_RXFTIE */ int last_res; bool tx_dma_busy; /* dma tx transaction in progress */ + bool rx_dma_busy; /* dma rx transaction in progress */ bool throttled; /* port throttled */ bool hw_flow_control; bool swap; /* swap RX & TX pins */ diff --git a/drivers/tty/serial/sunhv.c b/drivers/tty/serial/sunhv.c index 7d38c33ef506..c671d674bce4 100644 --- a/drivers/tty/serial/sunhv.c +++ b/drivers/tty/serial/sunhv.c @@ -17,11 +17,11 @@ #include #include #include -#include +#include +#include #include #include -#include #include #include diff --git a/drivers/tty/serial/sunplus-uart.c b/drivers/tty/serial/sunplus-uart.c index 727942c43c45..3aacd5eb414c 100644 --- a/drivers/tty/serial/sunplus-uart.c +++ b/drivers/tty/serial/sunplus-uart.c @@ -231,7 +231,7 @@ static void transmit_chars(struct uart_port *port) static void receive_chars(struct uart_port *port) { unsigned int lsr = readl(port->membase + SUP_UART_LSR); - unsigned int ch, flag; + u8 ch, flag; do { ch = readl(port->membase + SUP_UART_DATA); diff --git a/drivers/tty/serial/sunsab.c b/drivers/tty/serial/sunsab.c index 48b39fdb0397..40eeaf835bba 100644 --- a/drivers/tty/serial/sunsab.c +++ b/drivers/tty/serial/sunsab.c @@ -33,7 +33,8 @@ #include #include #include -#include +#include +#include #include #include diff --git a/drivers/tty/serial/sunsu.c b/drivers/tty/serial/sunsu.c index fed052a0b931..58a4342ad0f9 100644 --- a/drivers/tty/serial/sunsu.c +++ b/drivers/tty/serial/sunsu.c @@ -37,11 +37,11 @@ #include #include #include -#include +#include +#include #include #include -#include #include #include diff --git a/drivers/tty/serial/sunzilog.c b/drivers/tty/serial/sunzilog.c index 0fbeb3dbd843..c8c71c56264c 100644 --- a/drivers/tty/serial/sunzilog.c +++ b/drivers/tty/serial/sunzilog.c @@ -33,11 +33,11 @@ #include #endif #include -#include +#include +#include #include #include -#include #include #include diff --git a/drivers/tty/serial/tegra-tcu.c b/drivers/tty/serial/tegra-tcu.c index 23500b342da7..65069daf36ec 100644 --- a/drivers/tty/serial/tegra-tcu.c +++ b/drivers/tty/serial/tegra-tcu.c @@ -7,7 +7,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/tty/serial/uartlite.c b/drivers/tty/serial/uartlite.c index 679574893ebe..b225a78f6175 100644 --- a/drivers/tty/serial/uartlite.c +++ b/drivers/tty/serial/uartlite.c @@ -20,9 +20,6 @@ #include #include #include -#include -#include -#include #include #include diff --git a/drivers/tty/serial/ucc_uart.c b/drivers/tty/serial/ucc_uart.c index 0a370b9ea70b..b06661b80f41 100644 --- a/drivers/tty/serial/ucc_uart.c +++ b/drivers/tty/serial/ucc_uart.c @@ -17,18 +17,18 @@ */ #include +#include #include #include #include #include #include #include +#include #include #include -#include #include -#include #include #include diff --git a/drivers/tty/serial/vt8500_serial.c b/drivers/tty/serial/vt8500_serial.c index cc9157df732f..c5d5c2765119 100644 --- a/drivers/tty/serial/vt8500_serial.c +++ b/drivers/tty/serial/vt8500_serial.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -21,7 +22,6 @@ #include #include #include -#include #include /* @@ -611,10 +611,6 @@ static int vt8500_serial_probe(struct platform_device *pdev) if (!flags) return -EINVAL; - mmres = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!mmres) - return -ENODEV; - irq = platform_get_irq(pdev, 0); if (irq < 0) return irq; @@ -647,7 +643,7 @@ static int vt8500_serial_probe(struct platform_device *pdev) if (!vt8500_port) return -ENOMEM; - vt8500_port->uart.membase = devm_ioremap_resource(&pdev->dev, mmres); + vt8500_port->uart.membase = devm_platform_get_and_ioremap_resource(pdev, 0, &mmres); if (IS_ERR(vt8500_port->uart.membase)) return PTR_ERR(vt8500_port->uart.membase); diff --git a/drivers/tty/serial/xilinx_uartps.c b/drivers/tty/serial/xilinx_uartps.c index 20a751663ef9..2e5e86a00a77 100644 --- a/drivers/tty/serial/xilinx_uartps.c +++ b/drivers/tty/serial/xilinx_uartps.c @@ -1562,8 +1562,8 @@ static int cdns_uart_probe(struct platform_device *pdev) } irq = platform_get_irq(pdev, 0); - if (irq <= 0) { - rc = -ENXIO; + if (irq < 0) { + rc = irq; goto err_out_clk_disable; } diff --git a/drivers/tty/serial/zs.c b/drivers/tty/serial/zs.c index 730c648e32ff..65ca4da6e368 100644 --- a/drivers/tty/serial/zs.c +++ b/drivers/tty/serial/zs.c @@ -539,8 +539,9 @@ static void zs_receive_chars(struct zs_port *zport) struct uart_port *uport = &zport->port; struct zs_scc *scc = zport->scc; struct uart_icount *icount; - unsigned int avail, status, ch, flag; + unsigned int avail, status; int count; + u8 ch, flag; for (count = 16; count; count--) { spin_lock(&scc->zlock); diff --git a/drivers/tty/synclink_gt.c b/drivers/tty/synclink_gt.c index 16e469e581ec..8112d9d5a0d8 100644 --- a/drivers/tty/synclink_gt.c +++ b/drivers/tty/synclink_gt.c @@ -87,18 +87,17 @@ /* * module identification */ -static char *driver_name = "SyncLink GT"; -static char *slgt_driver_name = "synclink_gt"; -static char *tty_dev_prefix = "ttySLG"; +static const char driver_name[] = "SyncLink GT"; +static const char tty_dev_prefix[] = "ttySLG"; MODULE_LICENSE("GPL"); #define MAX_DEVICES 32 static const struct pci_device_id pci_table[] = { - {PCI_VENDOR_ID_MICROGATE, SYNCLINK_GT_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, - {PCI_VENDOR_ID_MICROGATE, SYNCLINK_GT2_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, - {PCI_VENDOR_ID_MICROGATE, SYNCLINK_GT4_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, - {PCI_VENDOR_ID_MICROGATE, SYNCLINK_AC_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, - {0,}, /* terminate list */ + { PCI_VDEVICE(MICROGATE, SYNCLINK_GT_DEVICE_ID) }, + { PCI_VDEVICE(MICROGATE, SYNCLINK_GT2_DEVICE_ID) }, + { PCI_VDEVICE(MICROGATE, SYNCLINK_GT4_DEVICE_ID) }, + { PCI_VDEVICE(MICROGATE, SYNCLINK_AC_DEVICE_ID) }, + { 0 }, /* terminate list */ }; MODULE_DEVICE_TABLE(pci, pci_table); @@ -323,7 +322,7 @@ struct slgt_info { }; -static MGSL_PARAMS default_params = { +static const MGSL_PARAMS default_params = { .mode = MGSL_MODE_HDLC, .loopback = 0, .flags = HDLC_FLAG_UNDERRUN_ABORT15, @@ -432,7 +431,7 @@ static void tx_set_idle(struct slgt_info *info); static unsigned int tbuf_bytes(struct slgt_info *info); static void reset_tbufs(struct slgt_info *info); static void tdma_reset(struct slgt_info *info); -static bool tx_load(struct slgt_info *info, const char *buf, unsigned int count); +static bool tx_load(struct slgt_info *info, const u8 *buf, unsigned int count); static void get_gtsignals(struct slgt_info *info); static void set_gtsignals(struct slgt_info *info); @@ -746,8 +745,7 @@ static void update_tx_timer(struct slgt_info *info) } } -static int write(struct tty_struct *tty, - const unsigned char *buf, int count) +static ssize_t write(struct tty_struct *tty, const u8 *buf, size_t count) { int ret = 0; struct slgt_info *info = tty->driver_data; @@ -756,7 +754,7 @@ static int write(struct tty_struct *tty, if (sanity_check(info, tty->name, "write")) return -EIO; - DBGINFO(("%s write count=%d\n", info->device_name, count)); + DBGINFO(("%s write count=%zu\n", info->device_name, count)); if (!info->tx_buf || (count > info->max_frame_size)) return -EIO; @@ -782,7 +780,7 @@ cleanup: return ret; } -static int put_char(struct tty_struct *tty, unsigned char ch) +static int put_char(struct tty_struct *tty, u8 ch) { struct slgt_info *info = tty->driver_data; unsigned long flags; @@ -790,7 +788,7 @@ static int put_char(struct tty_struct *tty, unsigned char ch) if (sanity_check(info, tty->name, "put_char")) return 0; - DBGINFO(("%s put_char(%d)\n", info->device_name, ch)); + DBGINFO(("%s put_char(%u)\n", info->device_name, ch)); if (!info->tx_buf) return 0; spin_lock_irqsave(&info->lock,flags); @@ -1088,12 +1086,13 @@ static long get_params32(struct slgt_info *info, struct MGSL_PARAMS32 __user *us static long set_params32(struct slgt_info *info, struct MGSL_PARAMS32 __user *new_params) { struct MGSL_PARAMS32 tmp_params; + unsigned long flags; DBGINFO(("%s set_params32\n", info->device_name)); if (copy_from_user(&tmp_params, new_params, sizeof(struct MGSL_PARAMS32))) return -EFAULT; - spin_lock(&info->lock); + spin_lock_irqsave(&info->lock, flags); if (tmp_params.mode == MGSL_MODE_BASE_CLOCK) { info->base_clock = tmp_params.clock_speed; } else { @@ -1111,7 +1110,7 @@ static long set_params32(struct slgt_info *info, struct MGSL_PARAMS32 __user *ne info->params.stop_bits = tmp_params.stop_bits; info->params.parity = tmp_params.parity; } - spin_unlock(&info->lock); + spin_unlock_irqrestore(&info->lock, flags); program_hw(info); @@ -3629,8 +3628,6 @@ static void slgt_cleanup(void) struct slgt_info *info; struct slgt_info *tmp; - printk(KERN_INFO "unload %s\n", driver_name); - if (serial_driver) { for (info=slgt_device_list ; info != NULL ; info=info->next_device) tty_unregister_device(serial_driver, info->line); @@ -3672,8 +3669,6 @@ static int __init slgt_init(void) { int rc; - printk(KERN_INFO "%s\n", driver_name); - serial_driver = tty_alloc_driver(MAX_DEVICES, TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV); if (IS_ERR(serial_driver)) { @@ -3683,7 +3678,7 @@ static int __init slgt_init(void) /* Initialize the tty_driver structure */ - serial_driver->driver_name = slgt_driver_name; + serial_driver->driver_name = "synclink_gt"; serial_driver->name = tty_dev_prefix; serial_driver->major = ttymajor; serial_driver->minor_start = 64; @@ -3702,9 +3697,6 @@ static int __init slgt_init(void) goto error; } - printk(KERN_INFO "%s, tty major#%d\n", - driver_name, serial_driver->major); - slgt_device_count = 0; if ((rc = pci_register_driver(&pci_driver)) < 0) { printk("%s pci_register_driver error=%d\n", driver_name, rc); @@ -3712,9 +3704,6 @@ static int __init slgt_init(void) } pci_registered = true; - if (!slgt_device_list) - printk("%s no devices found\n",driver_name); - return 0; error: @@ -3734,47 +3723,47 @@ module_exit(slgt_exit); * register access routines */ -#define CALC_REGADDR() \ - unsigned long reg_addr = ((unsigned long)info->reg_addr) + addr; \ - if (addr >= 0x80) \ - reg_addr += (info->port_num) * 32; \ - else if (addr >= 0x40) \ - reg_addr += (info->port_num) * 16; +static inline void __iomem *calc_regaddr(struct slgt_info *info, + unsigned int addr) +{ + void __iomem *reg_addr = info->reg_addr + addr; + + if (addr >= 0x80) + reg_addr += info->port_num * 32; + else if (addr >= 0x40) + reg_addr += info->port_num * 16; + + return reg_addr; +} static __u8 rd_reg8(struct slgt_info *info, unsigned int addr) { - CALC_REGADDR(); - return readb((void __iomem *)reg_addr); + return readb(calc_regaddr(info, addr)); } static void wr_reg8(struct slgt_info *info, unsigned int addr, __u8 value) { - CALC_REGADDR(); - writeb(value, (void __iomem *)reg_addr); + writeb(value, calc_regaddr(info, addr)); } static __u16 rd_reg16(struct slgt_info *info, unsigned int addr) { - CALC_REGADDR(); - return readw((void __iomem *)reg_addr); + return readw(calc_regaddr(info, addr)); } static void wr_reg16(struct slgt_info *info, unsigned int addr, __u16 value) { - CALC_REGADDR(); - writew(value, (void __iomem *)reg_addr); + writew(value, calc_regaddr(info, addr)); } static __u32 rd_reg32(struct slgt_info *info, unsigned int addr) { - CALC_REGADDR(); - return readl((void __iomem *)reg_addr); + return readl(calc_regaddr(info, addr)); } static void wr_reg32(struct slgt_info *info, unsigned int addr, __u32 value) { - CALC_REGADDR(); - writel(value, (void __iomem *)reg_addr); + writel(value, calc_regaddr(info, addr)); } static void rdma_reset(struct slgt_info *info) @@ -4777,7 +4766,7 @@ static unsigned int tbuf_bytes(struct slgt_info *info) * load data into transmit DMA buffer ring and start transmitter if needed * return true if data accepted, otherwise false (buffers full) */ -static bool tx_load(struct slgt_info *info, const char *buf, unsigned int size) +static bool tx_load(struct slgt_info *info, const u8 *buf, unsigned int size) { unsigned short count; unsigned int i; diff --git a/drivers/tty/sysrq.c b/drivers/tty/sysrq.c index 2d0d307c0618..5353531c2cab 100644 --- a/drivers/tty/sysrq.c +++ b/drivers/tty/sysrq.c @@ -100,14 +100,13 @@ static int __init sysrq_always_enabled_setup(char *str) __setup("sysrq_always_enabled", sysrq_always_enabled_setup); -static void sysrq_handle_loglevel(int key) +static void sysrq_handle_loglevel(u8 key) { - int i; + u8 loglevel = key - '0'; - i = key - '0'; console_loglevel = CONSOLE_LOGLEVEL_DEFAULT; - pr_info("Loglevel set to %d\n", i); - console_loglevel = i; + pr_info("Loglevel set to %u\n", loglevel); + console_loglevel = loglevel; } static const struct sysrq_key_op sysrq_loglevel_op = { .handler = sysrq_handle_loglevel, @@ -117,7 +116,7 @@ static const struct sysrq_key_op sysrq_loglevel_op = { }; #ifdef CONFIG_VT -static void sysrq_handle_SAK(int key) +static void sysrq_handle_SAK(u8 key) { struct work_struct *SAK_work = &vc_cons[fg_console].SAK_work; @@ -134,7 +133,7 @@ static const struct sysrq_key_op sysrq_SAK_op = { #endif #ifdef CONFIG_VT -static void sysrq_handle_unraw(int key) +static void sysrq_handle_unraw(u8 key) { vt_reset_unicode(fg_console); } @@ -149,7 +148,7 @@ static const struct sysrq_key_op sysrq_unraw_op = { #define sysrq_unraw_op (*(const struct sysrq_key_op *)NULL) #endif /* CONFIG_VT */ -static void sysrq_handle_crash(int key) +static void sysrq_handle_crash(u8 key) { /* release the RCU read lock before crashing */ rcu_read_unlock(); @@ -165,7 +164,7 @@ static const struct sysrq_key_op sysrq_crash_op = { .enable_mask = SYSRQ_ENABLE_DUMP, }; -static void sysrq_handle_reboot(int key) +static void sysrq_handle_reboot(u8 key) { lockdep_off(); local_irq_enable(); @@ -180,7 +179,7 @@ static const struct sysrq_key_op sysrq_reboot_op = { const struct sysrq_key_op *__sysrq_reboot_op = &sysrq_reboot_op; -static void sysrq_handle_sync(int key) +static void sysrq_handle_sync(u8 key) { emergency_sync(); } @@ -191,7 +190,7 @@ static const struct sysrq_key_op sysrq_sync_op = { .enable_mask = SYSRQ_ENABLE_SYNC, }; -static void sysrq_handle_show_timers(int key) +static void sysrq_handle_show_timers(u8 key) { sysrq_timer_list_show(); } @@ -202,7 +201,7 @@ static const struct sysrq_key_op sysrq_show_timers_op = { .action_msg = "Show clockevent devices & pending hrtimers (no others)", }; -static void sysrq_handle_mountro(int key) +static void sysrq_handle_mountro(u8 key) { emergency_remount(); } @@ -214,7 +213,7 @@ static const struct sysrq_key_op sysrq_mountro_op = { }; #ifdef CONFIG_LOCKDEP -static void sysrq_handle_showlocks(int key) +static void sysrq_handle_showlocks(u8 key) { debug_show_all_locks(); } @@ -254,7 +253,7 @@ static void sysrq_showregs_othercpus(struct work_struct *dummy) static DECLARE_WORK(sysrq_showallcpus, sysrq_showregs_othercpus); -static void sysrq_handle_showallcpus(int key) +static void sysrq_handle_showallcpus(u8 key) { /* * Fall back to the workqueue based printing if the @@ -287,7 +286,7 @@ static const struct sysrq_key_op sysrq_showallcpus_op = { #define sysrq_showallcpus_op (*(const struct sysrq_key_op *)NULL) #endif -static void sysrq_handle_showregs(int key) +static void sysrq_handle_showregs(u8 key) { struct pt_regs *regs = NULL; @@ -304,7 +303,7 @@ static const struct sysrq_key_op sysrq_showregs_op = { .enable_mask = SYSRQ_ENABLE_DUMP, }; -static void sysrq_handle_showstate(int key) +static void sysrq_handle_showstate(u8 key) { show_state(); show_all_workqueues(); @@ -316,7 +315,7 @@ static const struct sysrq_key_op sysrq_showstate_op = { .enable_mask = SYSRQ_ENABLE_DUMP, }; -static void sysrq_handle_showstate_blocked(int key) +static void sysrq_handle_showstate_blocked(u8 key) { show_state_filter(TASK_UNINTERRUPTIBLE); } @@ -330,7 +329,7 @@ static const struct sysrq_key_op sysrq_showstate_blocked_op = { #ifdef CONFIG_TRACING #include -static void sysrq_ftrace_dump(int key) +static void sysrq_ftrace_dump(u8 key) { ftrace_dump(DUMP_ALL); } @@ -344,7 +343,7 @@ static const struct sysrq_key_op sysrq_ftrace_dump_op = { #define sysrq_ftrace_dump_op (*(const struct sysrq_key_op *)NULL) #endif -static void sysrq_handle_showmem(int key) +static void sysrq_handle_showmem(u8 key) { show_mem(); } @@ -374,7 +373,7 @@ static void send_sig_all(int sig) read_unlock(&tasklist_lock); } -static void sysrq_handle_term(int key) +static void sysrq_handle_term(u8 key) { send_sig_all(SIGTERM); console_loglevel = CONSOLE_LOGLEVEL_DEBUG; @@ -405,7 +404,7 @@ static void moom_callback(struct work_struct *ignored) static DECLARE_WORK(moom_work, moom_callback); -static void sysrq_handle_moom(int key) +static void sysrq_handle_moom(u8 key) { schedule_work(&moom_work); } @@ -417,7 +416,7 @@ static const struct sysrq_key_op sysrq_moom_op = { }; #ifdef CONFIG_BLOCK -static void sysrq_handle_thaw(int key) +static void sysrq_handle_thaw(u8 key) { emergency_thaw_all(); } @@ -431,7 +430,7 @@ static const struct sysrq_key_op sysrq_thaw_op = { #define sysrq_thaw_op (*(const struct sysrq_key_op *)NULL) #endif -static void sysrq_handle_kill(int key) +static void sysrq_handle_kill(u8 key) { send_sig_all(SIGKILL); console_loglevel = CONSOLE_LOGLEVEL_DEBUG; @@ -443,7 +442,7 @@ static const struct sysrq_key_op sysrq_kill_op = { .enable_mask = SYSRQ_ENABLE_SIGNAL, }; -static void sysrq_handle_unrt(int key) +static void sysrq_handle_unrt(u8 key) { normalize_rt_tasks(); } @@ -535,25 +534,24 @@ static const struct sysrq_key_op *sysrq_key_table[62] = { }; /* key2index calculation, -1 on invalid index */ -static int sysrq_key_table_key2index(int key) +static int sysrq_key_table_key2index(u8 key) { - int retval; - - if ((key >= '0') && (key <= '9')) - retval = key - '0'; - else if ((key >= 'a') && (key <= 'z')) - retval = key + 10 - 'a'; - else if ((key >= 'A') && (key <= 'Z')) - retval = key + 36 - 'A'; - else - retval = -1; - return retval; + switch (key) { + case '0' ... '9': + return key - '0'; + case 'a' ... 'z': + return key - 'a' + 10; + case 'A' ... 'Z': + return key - 'A' + 10 + 26; + default: + return -1; + } } /* * get and put functions for the table, exposed to modules. */ -static const struct sysrq_key_op *__sysrq_get_key_op(int key) +static const struct sysrq_key_op *__sysrq_get_key_op(u8 key) { const struct sysrq_key_op *op_p = NULL; int i; @@ -565,7 +563,7 @@ static const struct sysrq_key_op *__sysrq_get_key_op(int key) return op_p; } -static void __sysrq_put_key_op(int key, const struct sysrq_key_op *op_p) +static void __sysrq_put_key_op(u8 key, const struct sysrq_key_op *op_p) { int i = sysrq_key_table_key2index(key); @@ -573,7 +571,7 @@ static void __sysrq_put_key_op(int key, const struct sysrq_key_op *op_p) sysrq_key_table[i] = op_p; } -void __handle_sysrq(int key, bool check_mask) +void __handle_sysrq(u8 key, bool check_mask) { const struct sysrq_key_op *op_p; int orig_log_level; @@ -632,7 +630,7 @@ void __handle_sysrq(int key, bool check_mask) suppress_printk = orig_suppress_printk; } -void handle_sysrq(int key) +void handle_sysrq(u8 key) { if (sysrq_on()) __handle_sysrq(key, true); @@ -1116,7 +1114,7 @@ int sysrq_toggle_support(int enable_mask) } EXPORT_SYMBOL_GPL(sysrq_toggle_support); -static int __sysrq_swap_key_ops(int key, const struct sysrq_key_op *insert_op_p, +static int __sysrq_swap_key_ops(u8 key, const struct sysrq_key_op *insert_op_p, const struct sysrq_key_op *remove_op_p) { int retval; @@ -1140,13 +1138,13 @@ static int __sysrq_swap_key_ops(int key, const struct sysrq_key_op *insert_op_p, return retval; } -int register_sysrq_key(int key, const struct sysrq_key_op *op_p) +int register_sysrq_key(u8 key, const struct sysrq_key_op *op_p) { return __sysrq_swap_key_ops(key, op_p, NULL); } EXPORT_SYMBOL(register_sysrq_key); -int unregister_sysrq_key(int key, const struct sysrq_key_op *op_p) +int unregister_sysrq_key(u8 key, const struct sysrq_key_op *op_p) { return __sysrq_swap_key_ops(key, NULL, op_p); } diff --git a/drivers/tty/tty.h b/drivers/tty/tty.h index 89769a1f1f97..50862f98273e 100644 --- a/drivers/tty/tty.h +++ b/drivers/tty/tty.h @@ -63,7 +63,7 @@ int tty_check_change(struct tty_struct *tty); void __stop_tty(struct tty_struct *tty); void __start_tty(struct tty_struct *tty); void tty_write_unlock(struct tty_struct *tty); -int tty_write_lock(struct tty_struct *tty, int ndelay); +int tty_write_lock(struct tty_struct *tty, bool ndelay); void tty_vhangup_session(struct tty_struct *tty); void tty_open_proc_set_tty(struct file *filp, struct tty_struct *tty); int tty_signal_session_leader(struct tty_struct *tty, int exit_session); @@ -101,13 +101,13 @@ extern int tty_ldisc_autoload; #ifdef CONFIG_AUDIT void tty_audit_add_data(const struct tty_struct *tty, const void *data, size_t size); -void tty_audit_tiocsti(const struct tty_struct *tty, char ch); +void tty_audit_tiocsti(const struct tty_struct *tty, u8 ch); #else static inline void tty_audit_add_data(const struct tty_struct *tty, const void *data, size_t size) { } -static inline void tty_audit_tiocsti(const struct tty_struct *tty, char ch) +static inline void tty_audit_tiocsti(const struct tty_struct *tty, u8 ch) { } #endif @@ -115,6 +115,6 @@ static inline void tty_audit_tiocsti(const struct tty_struct *tty, char ch) ssize_t redirected_tty_write(struct kiocb *, struct iov_iter *); int tty_insert_flip_string_and_push_buffer(struct tty_port *port, - const unsigned char *chars, size_t cnt); + const u8 *chars, size_t cnt); #endif diff --git a/drivers/tty/tty_audit.c b/drivers/tty/tty_audit.c index 24d010589379..1d81eeefb068 100644 --- a/drivers/tty/tty_audit.c +++ b/drivers/tty/tty_audit.c @@ -17,7 +17,7 @@ struct tty_audit_buf { dev_t dev; /* The TTY which the data is from */ bool icanon; size_t valid; - unsigned char *data; /* Allocated size N_TTY_BUF_SIZE */ + u8 *data; /* Allocated size N_TTY_BUF_SIZE */ }; static struct tty_audit_buf *tty_audit_buf_ref(void) @@ -59,7 +59,7 @@ static void tty_audit_buf_free(struct tty_audit_buf *buf) } static void tty_audit_log(const char *description, dev_t dev, - const unsigned char *data, size_t size) + const u8 *data, size_t size) { struct audit_buffer *ab; pid_t pid = task_pid_nr(current); @@ -134,7 +134,7 @@ void tty_audit_fork(struct signal_struct *sig) /* * tty_audit_tiocsti - Log TIOCSTI */ -void tty_audit_tiocsti(const struct tty_struct *tty, char ch) +void tty_audit_tiocsti(const struct tty_struct *tty, u8 ch) { dev_t dev; diff --git a/drivers/tty/tty_buffer.c b/drivers/tty/tty_buffer.c index 2df86ed90574..5f6d0cf67571 100644 --- a/drivers/tty/tty_buffer.c +++ b/drivers/tty/tty_buffer.c @@ -177,8 +177,7 @@ static struct tty_buffer *tty_buffer_alloc(struct tty_port *port, size_t size) */ if (atomic_read(&port->buf.mem_used) > port->buf.mem_limit) return NULL; - p = kmalloc(sizeof(struct tty_buffer) + 2 * size, - GFP_ATOMIC | __GFP_NOWARN); + p = kmalloc(struct_size(p, data, 2 * size), GFP_ATOMIC | __GFP_NOWARN); if (p == NULL) return NULL; @@ -263,38 +262,32 @@ static int __tty_buffer_request_room(struct tty_port *port, size_t size, bool flags) { struct tty_bufhead *buf = &port->buf; - struct tty_buffer *b, *n; - int left, change; + struct tty_buffer *n, *b = buf->tail; + size_t left = (b->flags ? 1 : 2) * b->size - b->used; + bool change = !b->flags && flags; - b = buf->tail; - if (!b->flags) - left = 2 * b->size - b->used; - else - left = b->size - b->used; + if (!change && left >= size) + return size; + + /* This is the slow path - looking for new buffers to use */ + n = tty_buffer_alloc(port, size); + if (n == NULL) + return change ? 0 : left; + + n->flags = flags; + buf->tail = n; + /* + * Paired w/ acquire in flush_to_ldisc() and lookahead_bufs() + * ensures they see all buffer data. + */ + smp_store_release(&b->commit, b->used); + /* + * Paired w/ acquire in flush_to_ldisc() and lookahead_bufs() + * ensures the latest commit value can be read before the head + * is advanced to the next buffer. + */ + smp_store_release(&b->next, n); - change = !b->flags && flags; - if (change || left < size) { - /* This is the slow path - looking for new buffers to use */ - n = tty_buffer_alloc(port, size); - if (n != NULL) { - n->flags = flags; - buf->tail = n; - /* - * Paired w/ acquire in flush_to_ldisc() and lookahead_bufs() - * ensures they see all buffer data. - */ - smp_store_release(&b->commit, b->used); - /* - * Paired w/ acquire in flush_to_ldisc() and lookahead_bufs() - * ensures the latest commit value can be read before the head - * is advanced to the next buffer. - */ - smp_store_release(&b->next, n); - } else if (change) - size = 0; - else - size = left; - } return size; } @@ -304,108 +297,45 @@ int tty_buffer_request_room(struct tty_port *port, size_t size) } EXPORT_SYMBOL_GPL(tty_buffer_request_room); -/** - * tty_insert_flip_string_fixed_flag - add characters to the tty buffer - * @port: tty port - * @chars: characters - * @flag: flag value for each character - * @size: size - * - * Queue a series of bytes to the tty buffering. All the characters passed are - * marked with the supplied flag. - * - * Returns: the number added. - */ -int tty_insert_flip_string_fixed_flag(struct tty_port *port, - const unsigned char *chars, char flag, size_t size) +size_t __tty_insert_flip_string_flags(struct tty_port *port, const u8 *chars, + const u8 *flags, bool mutable_flags, + size_t size) { - int copied = 0; - bool flags = flag != TTY_NORMAL; + bool need_flags = mutable_flags || flags[0] != TTY_NORMAL; + size_t copied = 0; do { - int goal = min_t(size_t, size - copied, TTY_BUFFER_PAGE); - int space = __tty_buffer_request_room(port, goal, flags); + size_t goal = min_t(size_t, size - copied, TTY_BUFFER_PAGE); + size_t space = __tty_buffer_request_room(port, goal, need_flags); struct tty_buffer *tb = port->buf.tail; if (unlikely(space == 0)) break; + memcpy(char_buf_ptr(tb, tb->used), chars, space); - if (tb->flags) - memset(flag_buf_ptr(tb, tb->used), flag, space); + + if (mutable_flags) { + memcpy(flag_buf_ptr(tb, tb->used), flags, space); + flags += space; + } else if (tb->flags) { + memset(flag_buf_ptr(tb, tb->used), flags[0], space); + } else { + /* tb->flags should be available once requested */ + WARN_ON_ONCE(need_flags); + } + tb->used += space; copied += space; chars += space; + /* There is a small chance that we need to split the data over * several buffers. If this is the case we must loop. */ } while (unlikely(size > copied)); + return copied; } -EXPORT_SYMBOL(tty_insert_flip_string_fixed_flag); - -/** - * tty_insert_flip_string_flags - add characters to the tty buffer - * @port: tty port - * @chars: characters - * @flags: flag bytes - * @size: size - * - * Queue a series of bytes to the tty buffering. For each character the flags - * array indicates the status of the character. - * - * Returns: the number added. - */ -int tty_insert_flip_string_flags(struct tty_port *port, - const unsigned char *chars, const char *flags, size_t size) -{ - int copied = 0; - - do { - int goal = min_t(size_t, size - copied, TTY_BUFFER_PAGE); - int space = tty_buffer_request_room(port, goal); - struct tty_buffer *tb = port->buf.tail; - - if (unlikely(space == 0)) - break; - memcpy(char_buf_ptr(tb, tb->used), chars, space); - memcpy(flag_buf_ptr(tb, tb->used), flags, space); - tb->used += space; - copied += space; - chars += space; - flags += space; - /* There is a small chance that we need to split the data over - * several buffers. If this is the case we must loop. - */ - } while (unlikely(size > copied)); - return copied; -} -EXPORT_SYMBOL(tty_insert_flip_string_flags); - -/** - * __tty_insert_flip_char - add one character to the tty buffer - * @port: tty port - * @ch: character - * @flag: flag byte - * - * Queue a single byte @ch to the tty buffering, with an optional flag. This is - * the slow path of tty_insert_flip_char(). - */ -int __tty_insert_flip_char(struct tty_port *port, unsigned char ch, char flag) -{ - struct tty_buffer *tb; - bool flags = flag != TTY_NORMAL; - - if (!__tty_buffer_request_room(port, 1, flags)) - return 0; - - tb = port->buf.tail; - if (tb->flags) - *flag_buf_ptr(tb, tb->used) = flag; - *char_buf_ptr(tb, tb->used++) = ch; - - return 1; -} -EXPORT_SYMBOL(__tty_insert_flip_char); +EXPORT_SYMBOL(__tty_insert_flip_string_flags); /** * tty_prepare_flip_string - make room for characters @@ -421,10 +351,9 @@ EXPORT_SYMBOL(__tty_insert_flip_char); * Returns: the length available and buffer pointer (@chars) to the space which * is now allocated and accounted for as ready for normal characters. */ -int tty_prepare_flip_string(struct tty_port *port, unsigned char **chars, - size_t size) +size_t tty_prepare_flip_string(struct tty_port *port, u8 **chars, size_t size) { - int space = __tty_buffer_request_room(port, size, false); + size_t space = __tty_buffer_request_room(port, size, false); if (likely(space)) { struct tty_buffer *tb = port->buf.tail; @@ -434,6 +363,7 @@ int tty_prepare_flip_string(struct tty_port *port, unsigned char **chars, memset(flag_buf_ptr(tb, tb->used), TTY_NORMAL, space); tb->used += space; } + return space; } EXPORT_SYMBOL_GPL(tty_prepare_flip_string); @@ -450,13 +380,13 @@ EXPORT_SYMBOL_GPL(tty_prepare_flip_string); * * Returns: the number of bytes processed. */ -int tty_ldisc_receive_buf(struct tty_ldisc *ld, const unsigned char *p, - const char *f, int count) +size_t tty_ldisc_receive_buf(struct tty_ldisc *ld, const u8 *p, const u8 *f, + size_t count) { if (ld->ops->receive_buf2) count = ld->ops->receive_buf2(ld->tty, p, f, count); else { - count = min_t(int, count, ld->tty->receive_room); + count = min_t(size_t, count, ld->tty->receive_room); if (count && ld->ops->receive_buf) ld->ops->receive_buf(ld->tty, p, f, count); } @@ -489,7 +419,7 @@ static void lookahead_bufs(struct tty_port *port, struct tty_buffer *head) } if (port->client_ops->lookahead_buf) { - unsigned char *p, *f = NULL; + u8 *p, *f = NULL; p = char_buf_ptr(head, head->lookahead); if (head->flags) @@ -502,12 +432,12 @@ static void lookahead_bufs(struct tty_port *port, struct tty_buffer *head) } } -static int -receive_buf(struct tty_port *port, struct tty_buffer *head, int count) +static size_t +receive_buf(struct tty_port *port, struct tty_buffer *head, size_t count) { - unsigned char *p = char_buf_ptr(head, head->read); - const char *f = NULL; - int n; + u8 *p = char_buf_ptr(head, head->read); + const u8 *f = NULL; + size_t n; if (head->flags) f = flag_buf_ptr(head, head->read); @@ -539,7 +469,7 @@ static void flush_to_ldisc(struct work_struct *work) while (1) { struct tty_buffer *head = buf->head; struct tty_buffer *next; - int count, rcvd; + size_t count, rcvd; /* Ldisc or user is trying to gain exclusive access */ if (atomic_read(&buf->priority)) @@ -620,7 +550,7 @@ EXPORT_SYMBOL(tty_flip_buffer_push); * Returns: the number added. */ int tty_insert_flip_string_and_push_buffer(struct tty_port *port, - const unsigned char *chars, size_t size) + const u8 *chars, size_t size) { struct tty_bufhead *buf = &port->buf; unsigned long flags; diff --git a/drivers/tty/tty_io.c b/drivers/tty/tty_io.c index 27d8e3a1aace..8a94e5a43c6d 100644 --- a/drivers/tty/tty_io.c +++ b/drivers/tty/tty_io.c @@ -270,7 +270,7 @@ static int tty_paranoia_check(struct tty_struct *tty, struct inode *inode, } /* Caller must hold tty_lock */ -static int check_tty_count(struct tty_struct *tty, const char *routine) +static void check_tty_count(struct tty_struct *tty, const char *routine) { #ifdef CHECK_TTY_COUNT struct list_head *p; @@ -290,10 +290,8 @@ static int check_tty_count(struct tty_struct *tty, const char *routine) if (tty->count != (count + kopen_count)) { tty_warn(tty, "%s: tty->count(%d) != (#fd's(%d) + #kopen's(%d))\n", routine, tty->count, count, kopen_count); - return (count + kopen_count); } #endif - return 0; } /** @@ -845,19 +843,18 @@ static void tty_update_time(struct tty_struct *tty, bool mtime) * data or clears the cookie. The cookie may be something that the * ldisc maintains state for and needs to free. */ -static int iterate_tty_read(struct tty_ldisc *ld, struct tty_struct *tty, - struct file *file, struct iov_iter *to) +static ssize_t iterate_tty_read(struct tty_ldisc *ld, struct tty_struct *tty, + struct file *file, struct iov_iter *to) { - int retval = 0; void *cookie = NULL; unsigned long offset = 0; char kernel_buf[64]; - size_t count = iov_iter_count(to); + ssize_t retval = 0; + size_t copied, count = iov_iter_count(to); do { - int size, copied; + ssize_t size = min(count, sizeof(kernel_buf)); - size = count > sizeof(kernel_buf) ? sizeof(kernel_buf) : count; size = ld->ops->read(tty, file, kernel_buf, size, &cookie, offset); if (!size) break; @@ -914,11 +911,11 @@ static int iterate_tty_read(struct tty_ldisc *ld, struct tty_struct *tty, */ static ssize_t tty_read(struct kiocb *iocb, struct iov_iter *to) { - int i; struct file *file = iocb->ki_filp; struct inode *inode = file_inode(file); struct tty_struct *tty = file_tty(file); struct tty_ldisc *ld; + ssize_t ret; if (tty_paranoia_check(tty, inode, "tty_read")) return -EIO; @@ -931,15 +928,15 @@ static ssize_t tty_read(struct kiocb *iocb, struct iov_iter *to) ld = tty_ldisc_ref_wait(tty); if (!ld) return hung_up_tty_read(iocb, to); - i = -EIO; + ret = -EIO; if (ld->ops->read) - i = iterate_tty_read(ld, tty, file, to); + ret = iterate_tty_read(ld, tty, file, to); tty_ldisc_deref(ld); - if (i > 0) + if (ret > 0) tty_update_time(tty, false); - return i; + return ret; } void tty_write_unlock(struct tty_struct *tty) @@ -948,7 +945,7 @@ void tty_write_unlock(struct tty_struct *tty) wake_up_interruptible_poll(&tty->write_wait, EPOLLOUT); } -int tty_write_lock(struct tty_struct *tty, int ndelay) +int tty_write_lock(struct tty_struct *tty, bool ndelay) { if (!mutex_trylock(&tty->atomic_write_lock)) { if (ndelay) @@ -963,15 +960,11 @@ int tty_write_lock(struct tty_struct *tty, int ndelay) * Split writes up in sane blocksizes to avoid * denial-of-service type attacks */ -static inline ssize_t do_tty_write( - ssize_t (*write)(struct tty_struct *, struct file *, const unsigned char *, size_t), - struct tty_struct *tty, - struct file *file, - struct iov_iter *from) +static ssize_t iterate_tty_write(struct tty_ldisc *ld, struct tty_struct *tty, + struct file *file, struct iov_iter *from) { - size_t count = iov_iter_count(from); + size_t chunk, count = iov_iter_count(from); ssize_t ret, written = 0; - unsigned int chunk; ret = tty_write_lock(tty, file->f_flags & O_NDELAY); if (ret < 0) @@ -1015,16 +1008,13 @@ static inline ssize_t do_tty_write( /* Do the write .. */ for (;;) { - size_t size = count; - - if (size > chunk) - size = chunk; + size_t size = min(chunk, count); ret = -EFAULT; if (copy_from_iter(tty->write_buf, size, from) != size) break; - ret = write(tty, file, tty->write_buf, size); + ret = ld->ops->write(tty, file, tty->write_buf, size); if (ret <= 0) break; @@ -1095,7 +1085,7 @@ static ssize_t file_tty_write(struct file *file, struct kiocb *iocb, struct iov_ if (!ld->ops->write) ret = -EIO; else - ret = do_tty_write(ld->ops->write, tty, file, from); + ret = iterate_tty_write(ld, tty, file, from); tty_ldisc_deref(ld); return ret; } @@ -1162,7 +1152,7 @@ int tty_send_xchar(struct tty_struct *tty, char ch) return 0; } - if (tty_write_lock(tty, 0) < 0) + if (tty_write_lock(tty, false) < 0) return -ERESTARTSYS; down_read(&tty->termios_rwsem); @@ -2488,7 +2478,7 @@ static int send_break(struct tty_struct *tty, unsigned int duration) retval = tty->ops->break_ctl(tty, duration); else { /* Do the work ourselves */ - if (tty_write_lock(tty, 0) < 0) + if (tty_write_lock(tty, false) < 0) return -EINTR; retval = tty->ops->break_ctl(tty, -1); if (retval) diff --git a/drivers/tty/tty_ioctl.c b/drivers/tty/tty_ioctl.c index 2e88b414cf95..7958bf6d27c4 100644 --- a/drivers/tty/tty_ioctl.c +++ b/drivers/tty/tty_ioctl.c @@ -28,14 +28,6 @@ #include #include -#undef TTY_DEBUG_WAIT_UNTIL_SENT - -#ifdef TTY_DEBUG_WAIT_UNTIL_SENT -# define tty_debug_wait_until_sent(tty, f, args...) tty_debug(tty, f, ##args) -#else -# define tty_debug_wait_until_sent(tty, f, args...) do {} while (0) -#endif - #undef DEBUG /* @@ -198,8 +190,6 @@ int tty_unthrottle_safe(struct tty_struct *tty) void tty_wait_until_sent(struct tty_struct *tty, long timeout) { - tty_debug_wait_until_sent(tty, "wait until sent, timeout=%ld\n", timeout); - if (!timeout) timeout = MAX_SCHEDULE_TIMEOUT; @@ -507,7 +497,7 @@ retry_write_wait: if (retval < 0) return retval; - if (tty_write_lock(tty, 0) < 0) + if (tty_write_lock(tty, false) < 0) goto retry_write_wait; /* Racing writer? */ @@ -747,17 +737,17 @@ static int set_ltchars(struct tty_struct *tty, struct ltchars __user *ltchars) /** * tty_change_softcar - carrier change ioctl helper * @tty: tty to update - * @arg: enable/disable CLOCAL + * @enable: enable/disable CLOCAL * * Perform a change to the CLOCAL state and call into the driver * layer to make it visible. All done with the termios rwsem */ -static int tty_change_softcar(struct tty_struct *tty, int arg) +static int tty_change_softcar(struct tty_struct *tty, bool enable) { int ret = 0; - int bit = arg ? CLOCAL : 0; struct ktermios old; + tcflag_t bit = enable ? CLOCAL : 0; down_write(&tty->termios_rwsem); old = tty->termios; diff --git a/drivers/tty/tty_port.c b/drivers/tty/tty_port.c index a788a6bf487d..624d104bd145 100644 --- a/drivers/tty/tty_port.c +++ b/drivers/tty/tty_port.c @@ -20,47 +20,45 @@ #include #include "tty.h" -static int tty_port_default_receive_buf(struct tty_port *port, - const unsigned char *p, - const unsigned char *f, size_t count) +static size_t tty_port_default_receive_buf(struct tty_port *port, const u8 *p, + const u8 *f, size_t count) { - int ret; struct tty_struct *tty; - struct tty_ldisc *disc; + struct tty_ldisc *ld; tty = READ_ONCE(port->itty); if (!tty) return 0; - disc = tty_ldisc_ref(tty); - if (!disc) + ld = tty_ldisc_ref(tty); + if (!ld) return 0; - ret = tty_ldisc_receive_buf(disc, p, (char *)f, count); + count = tty_ldisc_receive_buf(ld, p, f, count); - tty_ldisc_deref(disc); + tty_ldisc_deref(ld); - return ret; + return count; } -static void tty_port_default_lookahead_buf(struct tty_port *port, const unsigned char *p, - const unsigned char *f, unsigned int count) +static void tty_port_default_lookahead_buf(struct tty_port *port, const u8 *p, + const u8 *f, size_t count) { struct tty_struct *tty; - struct tty_ldisc *disc; + struct tty_ldisc *ld; tty = READ_ONCE(port->itty); if (!tty) return; - disc = tty_ldisc_ref(tty); - if (!disc) + ld = tty_ldisc_ref(tty); + if (!ld) return; - if (disc->ops->lookahead_buf) - disc->ops->lookahead_buf(disc->tty, p, f, count); + if (ld->ops->lookahead_buf) + ld->ops->lookahead_buf(ld->tty, p, f, count); - tty_ldisc_deref(disc); + tty_ldisc_deref(ld); } static void tty_port_default_wakeup(struct tty_port *port) diff --git a/drivers/tty/ttynull.c b/drivers/tty/ttynull.c index 1d4438472442..e4c4273993bc 100644 --- a/drivers/tty/ttynull.c +++ b/drivers/tty/ttynull.c @@ -29,8 +29,8 @@ static void ttynull_hangup(struct tty_struct *tty) tty_port_hangup(&ttynull_port); } -static int ttynull_write(struct tty_struct *tty, const unsigned char *buf, - int count) +static ssize_t ttynull_write(struct tty_struct *tty, const u8 *buf, + size_t count) { return count; } diff --git a/drivers/tty/vcc.c b/drivers/tty/vcc.c index 34ba6e54789a..a39ed981bfd3 100644 --- a/drivers/tty/vcc.c +++ b/drivers/tty/vcc.c @@ -36,7 +36,7 @@ struct vcc_port { * and guarantee that any characters that the driver accepts will * be eventually sent, either immediately or later. */ - int chars_in_buffer; + size_t chars_in_buffer; struct vio_vcc buffer; struct timer_list rx_timer; @@ -385,7 +385,7 @@ static void vcc_tx_timer(struct timer_list *t) struct vcc_port *port = from_timer(port, t, tx_timer); struct vio_vcc *pkt; unsigned long flags; - int tosend = 0; + size_t tosend = 0; int rv; spin_lock_irqsave(&port->lock, flags); @@ -804,14 +804,13 @@ static void vcc_hangup(struct tty_struct *tty) tty_port_hangup(tty->port); } -static int vcc_write(struct tty_struct *tty, const unsigned char *buf, - int count) +static ssize_t vcc_write(struct tty_struct *tty, const u8 *buf, size_t count) { struct vcc_port *port; struct vio_vcc *pkt; unsigned long flags; - int total_sent = 0; - int tosend = 0; + size_t total_sent = 0; + size_t tosend = 0; int rv = -EINVAL; port = vcc_get_ne(tty->index); @@ -827,7 +826,8 @@ static int vcc_write(struct tty_struct *tty, const unsigned char *buf, while (count > 0) { /* Minimum of data to write and space available */ - tosend = min(count, (VCC_BUFF_LEN - port->chars_in_buffer)); + tosend = min_t(size_t, count, + (VCC_BUFF_LEN - port->chars_in_buffer)); if (!tosend) break; @@ -847,7 +847,7 @@ static int vcc_write(struct tty_struct *tty, const unsigned char *buf, * hypervisor actually took it because we have it buffered. */ rv = ldc_write(port->vio.lp, pkt, (VIO_TAG_SIZE + tosend)); - vccdbg("VCC: write: ldc_write(%d)=%d\n", + vccdbg("VCC: write: ldc_write(%zu)=%d\n", (VIO_TAG_SIZE + tosend), rv); total_sent += tosend; @@ -864,7 +864,7 @@ static int vcc_write(struct tty_struct *tty, const unsigned char *buf, vcc_put(port, false); - vccdbg("VCC: write: total=%d rv=%d", total_sent, rv); + vccdbg("VCC: write: total=%zu rv=%d", total_sent, rv); return total_sent ? total_sent : rv; } diff --git a/drivers/tty/vt/selection.c b/drivers/tty/vt/selection.c index 6ef22f01cc51..8967c3a0d916 100644 --- a/drivers/tty/vt/selection.c +++ b/drivers/tty/vt/selection.c @@ -376,7 +376,7 @@ int paste_selection(struct tty_struct *tty) { struct vc_data *vc = tty->driver_data; int pasted = 0; - unsigned int count; + size_t count; struct tty_ldisc *ld; DECLARE_WAITQUEUE(wait, current); int ret = 0; diff --git a/drivers/tty/vt/vt.c b/drivers/tty/vt/vt.c index 1e8e57b45688..5c47f77804f0 100644 --- a/drivers/tty/vt/vt.c +++ b/drivers/tty/vt/vt.c @@ -140,8 +140,7 @@ EXPORT_SYMBOL(vc_cons); static const struct consw *con_driver_map[MAX_NR_CONSOLES]; static int con_open(struct tty_struct *, struct file *); -static void vc_init(struct vc_data *vc, unsigned int rows, - unsigned int cols, int do_clear); +static void vc_init(struct vc_data *vc, int do_clear); static void gotoxy(struct vc_data *vc, int new_x, int new_y); static void save_cur(struct vc_data *vc); static void reset_terminal(struct vc_data *vc, int do_clear); @@ -1103,7 +1102,7 @@ int vc_allocate(unsigned int currcons) /* return 0 on success */ if (global_cursor_default == -1) global_cursor_default = 1; - vc_init(vc, vc->vc_rows, vc->vc_cols, 1); + vc_init(vc, 1); vcs_make_sysfs(currcons); atomic_notifier_call_chain(&vt_notifier_list, VT_ALLOCATE, ¶m); @@ -2846,7 +2845,7 @@ static int vc_con_write_normal(struct vc_data *vc, int tc, int c, } /* acquires console_lock */ -static int do_con_write(struct tty_struct *tty, const unsigned char *buf, int count) +static int do_con_write(struct tty_struct *tty, const u8 *buf, int count) { struct vc_draw_region draw = { .x = -1, @@ -3239,7 +3238,7 @@ int tioclinux(struct tty_struct *tty, unsigned long arg) * /dev/ttyN handling */ -static int con_write(struct tty_struct *tty, const unsigned char *buf, int count) +static ssize_t con_write(struct tty_struct *tty, const u8 *buf, size_t count) { int retval; @@ -3249,7 +3248,7 @@ static int con_write(struct tty_struct *tty, const unsigned char *buf, int count return retval; } -static int con_put_char(struct tty_struct *tty, unsigned char ch) +static int con_put_char(struct tty_struct *tty, u8 ch) { return do_con_write(tty, &ch, 1); } @@ -3398,16 +3397,10 @@ module_param_named(color, default_color, int, S_IRUGO | S_IWUSR); module_param_named(italic, default_italic_color, int, S_IRUGO | S_IWUSR); module_param_named(underline, default_underline_color, int, S_IRUGO | S_IWUSR); -static void vc_init(struct vc_data *vc, unsigned int rows, - unsigned int cols, int do_clear) +static void vc_init(struct vc_data *vc, int do_clear) { int j, k ; - vc->vc_cols = cols; - vc->vc_rows = rows; - vc->vc_size_row = cols << 1; - vc->vc_screenbuf_size = vc->vc_rows * vc->vc_size_row; - set_origin(vc); vc->vc_pos = vc->vc_origin; reset_vc(vc); @@ -3475,8 +3468,7 @@ static int __init con_init(void) visual_init(vc, currcons, 1); /* Assuming vc->vc_{cols,rows,screenbuf_size} are sane here. */ vc->vc_screenbuf = kzalloc(vc->vc_screenbuf_size, GFP_NOWAIT); - vc_init(vc, vc->vc_rows, vc->vc_cols, - currcons || !vc->vc_sw->con_save_screen); + vc_init(vc, currcons || !vc->vc_sw->con_save_screen); } currcons = fg_console = 0; master_display_fg = vc = vc_cons[currcons].d; diff --git a/drivers/uio/uio_pruss.c b/drivers/uio/uio_pruss.c index 83966dbd3bbf..77e2dc404885 100644 --- a/drivers/uio/uio_pruss.c +++ b/drivers/uio/uio_pruss.c @@ -175,8 +175,12 @@ static int pruss_probe(struct platform_device *pdev) goto err_free_ddr_vaddr; } + ret = platform_get_irq(pdev, 0); + if (ret < 0) + goto err_unmap; + + gdev->hostirq_start = ret; gdev->pintc_base = pdata->pintc_base; - gdev->hostirq_start = platform_get_irq(pdev, 0); for (cnt = 0, p = gdev->info; cnt < MAX_PRUSS_EVT; cnt++, p++) { p->mem[0].addr = regs_prussio->start; @@ -211,6 +215,7 @@ err_unloop: for (i = 0, p = gdev->info; i < cnt; i++, p++) { uio_unregister_device(p); } +err_unmap: iounmap(gdev->prussio_vaddr); err_free_ddr_vaddr: dma_free_coherent(dev, extram_pool_sz, gdev->ddr_vaddr, diff --git a/drivers/usb/cdns3/cdns3-gadget.c b/drivers/usb/cdns3/cdns3-gadget.c index aa0111b365bb..11a5b3437c32 100644 --- a/drivers/usb/cdns3/cdns3-gadget.c +++ b/drivers/usb/cdns3/cdns3-gadget.c @@ -61,6 +61,7 @@ #include #include #include +#include #include "core.h" #include "gadget-export.h" diff --git a/drivers/usb/cdns3/cdns3-plat.c b/drivers/usb/cdns3/cdns3-plat.c index 884e2301237f..2c1aca84f226 100644 --- a/drivers/usb/cdns3/cdns3-plat.c +++ b/drivers/usb/cdns3/cdns3-plat.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include @@ -255,9 +256,10 @@ static int cdns3_controller_resume(struct device *dev, pm_message_t msg) cdns3_set_platform_suspend(cdns->dev, false, false); spin_lock_irqsave(&cdns->lock, flags); - cdns_resume(cdns, !PMSG_IS_AUTO(msg)); + cdns_resume(cdns); cdns->in_lpm = false; spin_unlock_irqrestore(&cdns->lock, flags); + cdns_set_active(cdns, !PMSG_IS_AUTO(msg)); if (cdns->wakeup_pending) { cdns->wakeup_pending = false; enable_irq(cdns->wakeup_irq); diff --git a/drivers/usb/cdns3/cdns3-starfive.c b/drivers/usb/cdns3/cdns3-starfive.c index fc1f003b145d..a7265b86e427 100644 --- a/drivers/usb/cdns3/cdns3-starfive.c +++ b/drivers/usb/cdns3/cdns3-starfive.c @@ -166,7 +166,7 @@ static int cdns_starfive_remove_core(struct device *dev, void *c) return 0; } -static int cdns_starfive_remove(struct platform_device *pdev) +static void cdns_starfive_remove(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct cdns_starfive *data = dev_get_drvdata(dev); @@ -178,8 +178,6 @@ static int cdns_starfive_remove(struct platform_device *pdev) pm_runtime_put_noidle(dev); cdns_clk_rst_deinit(data); platform_set_drvdata(pdev, NULL); - - return 0; } #ifdef CONFIG_PM @@ -232,7 +230,7 @@ MODULE_DEVICE_TABLE(of, cdns_starfive_of_match); static struct platform_driver cdns_starfive_driver = { .probe = cdns_starfive_probe, - .remove = cdns_starfive_remove, + .remove_new = cdns_starfive_remove, .driver = { .name = "cdns3-starfive", .of_match_table = cdns_starfive_of_match, diff --git a/drivers/usb/cdns3/cdns3-ti.c b/drivers/usb/cdns3/cdns3-ti.c index 81b9132e3aaa..5945c4b1e11f 100644 --- a/drivers/usb/cdns3/cdns3-ti.c +++ b/drivers/usb/cdns3/cdns3-ti.c @@ -15,6 +15,7 @@ #include #include #include +#include /* USB Wrapper register offsets */ #define USBSS_PID 0x0 diff --git a/drivers/usb/cdns3/cdnsp-pci.c b/drivers/usb/cdns3/cdnsp-pci.c index 7b151f5af3cc..0725668ffea4 100644 --- a/drivers/usb/cdns3/cdnsp-pci.c +++ b/drivers/usb/cdns3/cdnsp-pci.c @@ -208,8 +208,9 @@ static int __maybe_unused cdnsp_pci_resume(struct device *dev) int ret; spin_lock_irqsave(&cdns->lock, flags); - ret = cdns_resume(cdns, 1); + ret = cdns_resume(cdns); spin_unlock_irqrestore(&cdns->lock, flags); + cdns_set_active(cdns, 1); return ret; } diff --git a/drivers/usb/cdns3/core.c b/drivers/usb/cdns3/core.c index dbcdf3b24b47..33548771a0d3 100644 --- a/drivers/usb/cdns3/core.c +++ b/drivers/usb/cdns3/core.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -522,9 +523,8 @@ int cdns_suspend(struct cdns *cdns) } EXPORT_SYMBOL_GPL(cdns_suspend); -int cdns_resume(struct cdns *cdns, u8 set_active) +int cdns_resume(struct cdns *cdns) { - struct device *dev = cdns->dev; enum usb_role real_role; bool role_changed = false; int ret = 0; @@ -556,15 +556,23 @@ int cdns_resume(struct cdns *cdns, u8 set_active) if (cdns->roles[cdns->role]->resume) cdns->roles[cdns->role]->resume(cdns, cdns_power_is_lost(cdns)); + return 0; +} +EXPORT_SYMBOL_GPL(cdns_resume); + +void cdns_set_active(struct cdns *cdns, u8 set_active) +{ + struct device *dev = cdns->dev; + if (set_active) { pm_runtime_disable(dev); pm_runtime_set_active(dev); pm_runtime_enable(dev); } - return 0; + return; } -EXPORT_SYMBOL_GPL(cdns_resume); +EXPORT_SYMBOL_GPL(cdns_set_active); #endif /* CONFIG_PM_SLEEP */ MODULE_AUTHOR("Peter Chen "); diff --git a/drivers/usb/cdns3/core.h b/drivers/usb/cdns3/core.h index 2d332a788871..4a4dbc2c1561 100644 --- a/drivers/usb/cdns3/core.h +++ b/drivers/usb/cdns3/core.h @@ -125,10 +125,13 @@ int cdns_init(struct cdns *cdns); int cdns_remove(struct cdns *cdns); #ifdef CONFIG_PM_SLEEP -int cdns_resume(struct cdns *cdns, u8 set_active); +int cdns_resume(struct cdns *cdns); int cdns_suspend(struct cdns *cdns); +void cdns_set_active(struct cdns *cdns, u8 set_active); #else /* CONFIG_PM_SLEEP */ -static inline int cdns_resume(struct cdns *cdns, u8 set_active) +static inline int cdns_resume(struct cdns *cdns) +{ return 0; } +static inline int cdns_set_active(struct cdns *cdns, u8 set_active) { return 0; } static inline int cdns_suspend(struct cdns *cdns) { return 0; } diff --git a/drivers/usb/cdns3/drd.c b/drivers/usb/cdns3/drd.c index d00ff98dffab..04b6d12f2b9a 100644 --- a/drivers/usb/cdns3/drd.c +++ b/drivers/usb/cdns3/drd.c @@ -196,6 +196,7 @@ int cdns_drd_host_on(struct cdns *cdns) if (ret) dev_err(cdns->dev, "timeout waiting for xhci_ready\n"); + phy_set_mode(cdns->usb2_phy, PHY_MODE_USB_HOST); phy_set_mode(cdns->usb3_phy, PHY_MODE_USB_HOST); return ret; } @@ -216,6 +217,7 @@ void cdns_drd_host_off(struct cdns *cdns) readl_poll_timeout_atomic(&cdns->otg_regs->state, val, !(val & OTGSTATE_HOST_STATE_MASK), 1, 2000000); + phy_set_mode(cdns->usb2_phy, PHY_MODE_INVALID); phy_set_mode(cdns->usb3_phy, PHY_MODE_INVALID); } @@ -248,6 +250,7 @@ int cdns_drd_gadget_on(struct cdns *cdns) return ret; } + phy_set_mode(cdns->usb2_phy, PHY_MODE_USB_DEVICE); phy_set_mode(cdns->usb3_phy, PHY_MODE_USB_DEVICE); return 0; } @@ -273,6 +276,7 @@ void cdns_drd_gadget_off(struct cdns *cdns) readl_poll_timeout_atomic(&cdns->otg_regs->state, val, !(val & OTGSTATE_DEV_STATE_MASK), 1, 2000000); + phy_set_mode(cdns->usb2_phy, PHY_MODE_INVALID); phy_set_mode(cdns->usb3_phy, PHY_MODE_INVALID); } EXPORT_SYMBOL_GPL(cdns_drd_gadget_off); diff --git a/drivers/usb/chipidea/ci.h b/drivers/usb/chipidea/ci.h index f210b7489fd5..d9bb3d3f026e 100644 --- a/drivers/usb/chipidea/ci.h +++ b/drivers/usb/chipidea/ci.h @@ -257,6 +257,7 @@ struct ci_hdrc { bool id_event; bool b_sess_valid_event; bool imx28_write_fix; + bool has_portsc_pec_bug; bool supports_runtime_pm; bool in_lpm; bool wakeup_int; @@ -281,8 +282,19 @@ static inline int ci_role_start(struct ci_hdrc *ci, enum ci_role role) return -ENXIO; ret = ci->roles[role]->start(ci); - if (!ret) - ci->role = role; + if (ret) + return ret; + + ci->role = role; + + if (ci->usb_phy) { + if (role == CI_ROLE_HOST) + usb_phy_set_event(ci->usb_phy, USB_EVENT_ID); + else + /* in device mode but vbus is invalid*/ + usb_phy_set_event(ci->usb_phy, USB_EVENT_NONE); + } + return ret; } @@ -296,6 +308,9 @@ static inline void ci_role_stop(struct ci_hdrc *ci) ci->role = CI_ROLE_END; ci->roles[role]->stop(ci); + + if (ci->usb_phy) + usb_phy_set_event(ci->usb_phy, USB_EVENT_NONE); } static inline enum usb_role ci_role_to_usb_role(struct ci_hdrc *ci) diff --git a/drivers/usb/chipidea/ci_hdrc_imx.c b/drivers/usb/chipidea/ci_hdrc_imx.c index 336ef6dd8e7d..e28bb2f2612d 100644 --- a/drivers/usb/chipidea/ci_hdrc_imx.c +++ b/drivers/usb/chipidea/ci_hdrc_imx.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include @@ -67,11 +68,13 @@ static const struct ci_hdrc_imx_platform_flag imx7d_usb_data = { static const struct ci_hdrc_imx_platform_flag imx7ulp_usb_data = { .flags = CI_HDRC_SUPPORTS_RUNTIME_PM | + CI_HDRC_HAS_PORTSC_PEC_MISSED | CI_HDRC_PMQOS, }; static const struct ci_hdrc_imx_platform_flag imx8ulp_usb_data = { - .flags = CI_HDRC_SUPPORTS_RUNTIME_PM, + .flags = CI_HDRC_SUPPORTS_RUNTIME_PM | + CI_HDRC_HAS_PORTSC_PEC_MISSED, }; static const struct of_device_id ci_hdrc_imx_dt_ids[] = { @@ -175,10 +178,15 @@ static struct imx_usbmisc_data *usbmisc_get_init_data(struct device *dev) if (of_usb_get_phy_mode(np) == USBPHY_INTERFACE_MODE_ULPI) data->ulpi = 1; - of_property_read_u32(np, "samsung,picophy-pre-emp-curr-control", - &data->emp_curr_control); - of_property_read_u32(np, "samsung,picophy-dc-vol-level-adjust", - &data->dc_vol_level_adjust); + if (of_property_read_u32(np, "samsung,picophy-pre-emp-curr-control", + &data->emp_curr_control)) + data->emp_curr_control = -1; + if (of_property_read_u32(np, "samsung,picophy-dc-vol-level-adjust", + &data->dc_vol_level_adjust)) + data->dc_vol_level_adjust = -1; + if (of_property_read_u32(np, "fsl,picophy-rise-fall-time-adjust", + &data->rise_fall_time_adjust)) + data->rise_fall_time_adjust = -1; return data; } diff --git a/drivers/usb/chipidea/ci_hdrc_imx.h b/drivers/usb/chipidea/ci_hdrc_imx.h index 7135b9a5d913..88b8da79d518 100644 --- a/drivers/usb/chipidea/ci_hdrc_imx.h +++ b/drivers/usb/chipidea/ci_hdrc_imx.h @@ -28,6 +28,7 @@ struct imx_usbmisc_data { enum usb_dr_mode available_role; /* runtime usb dr mode */ int emp_curr_control; int dc_vol_level_adjust; + int rise_fall_time_adjust; }; int imx_usbmisc_init(struct imx_usbmisc_data *data); diff --git a/drivers/usb/chipidea/ci_hdrc_tegra.c b/drivers/usb/chipidea/ci_hdrc_tegra.c index ca36d11a69ea..8e78bf643e25 100644 --- a/drivers/usb/chipidea/ci_hdrc_tegra.c +++ b/drivers/usb/chipidea/ci_hdrc_tegra.c @@ -6,7 +6,8 @@ #include #include #include -#include +#include +#include #include #include diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c index 51994d655b82..7ac39a281b8c 100644 --- a/drivers/usb/chipidea/core.c +++ b/drivers/usb/chipidea/core.c @@ -1028,8 +1028,7 @@ static int ci_hdrc_probe(struct platform_device *pdev) return -ENODEV; } - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - base = devm_ioremap_resource(dev, res); + base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(base)) return PTR_ERR(base); @@ -1045,6 +1044,8 @@ static int ci_hdrc_probe(struct platform_device *pdev) CI_HDRC_IMX28_WRITE_FIX); ci->supports_runtime_pm = !!(ci->platdata->flags & CI_HDRC_SUPPORTS_RUNTIME_PM); + ci->has_portsc_pec_bug = !!(ci->platdata->flags & + CI_HDRC_HAS_PORTSC_PEC_MISSED); platform_set_drvdata(pdev, ci); ret = hw_device_init(ci, base); diff --git a/drivers/usb/chipidea/host.c b/drivers/usb/chipidea/host.c index ebe7400243b1..08af26b762a2 100644 --- a/drivers/usb/chipidea/host.c +++ b/drivers/usb/chipidea/host.c @@ -151,6 +151,7 @@ static int host_start(struct ci_hdrc *ci) ehci->has_hostpc = ci->hw_bank.lpm; ehci->has_tdi_phy_lpm = ci->hw_bank.lpm; ehci->imx28_write_fix = ci->imx28_write_fix; + ehci->has_ci_pec_bug = ci->has_portsc_pec_bug; priv = (struct ehci_ci_priv *)ehci->priv; priv->reg_vbus = NULL; diff --git a/drivers/usb/chipidea/udc.c b/drivers/usb/chipidea/udc.c index 54c09245ad05..0b7bd3c643c3 100644 --- a/drivers/usb/chipidea/udc.c +++ b/drivers/usb/chipidea/udc.c @@ -1463,7 +1463,7 @@ static int ep_disable(struct usb_ep *ep) */ static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags) { - struct ci_hw_req *hwreq = NULL; + struct ci_hw_req *hwreq; if (ep == NULL) return NULL; @@ -1718,6 +1718,13 @@ static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active) ret = ci->platdata->notify_event(ci, CI_HDRC_CONTROLLER_VBUS_EVENT); + if (ci->usb_phy) { + if (is_active) + usb_phy_set_event(ci->usb_phy, USB_EVENT_VBUS); + else + usb_phy_set_event(ci->usb_phy, USB_EVENT_NONE); + } + if (ci->driver) ci_hdrc_gadget_connect(_gadget, is_active); @@ -2034,6 +2041,9 @@ static irqreturn_t udc_irq(struct ci_hdrc *ci) if (USBi_PCI & intr) { ci->gadget.speed = hw_port_is_high_speed(ci) ? USB_SPEED_HIGH : USB_SPEED_FULL; + if (ci->usb_phy) + usb_phy_set_event(ci->usb_phy, + USB_EVENT_ENUMERATED); if (ci->suspended) { if (ci->driver->resume) { spin_unlock(&ci->lock); diff --git a/drivers/usb/chipidea/usbmisc_imx.c b/drivers/usb/chipidea/usbmisc_imx.c index 9ee9621e2ccc..173c78afd502 100644 --- a/drivers/usb/chipidea/usbmisc_imx.c +++ b/drivers/usb/chipidea/usbmisc_imx.c @@ -4,10 +4,11 @@ */ #include -#include +#include #include #include #include +#include #include #include "ci_hdrc_imx.h" @@ -130,6 +131,8 @@ #define MX7D_USB_OTG_PHY_CFG1 0x30 #define TXPREEMPAMPTUNE0_BIT 28 #define TXPREEMPAMPTUNE0_MASK (3 << 28) +#define TXRISETUNE0_BIT 24 +#define TXRISETUNE0_MASK (3 << 24) #define TXVREFTUNE0_BIT 20 #define TXVREFTUNE0_MASK (0xf << 20) @@ -659,18 +662,27 @@ static int usbmisc_imx7d_init(struct imx_usbmisc_data *data) usbmisc->base + MX7D_USBNC_USB_CTRL2); /* PHY tuning for signal quality */ reg = readl(usbmisc->base + MX7D_USB_OTG_PHY_CFG1); - if (data->emp_curr_control && data->emp_curr_control <= + if (data->emp_curr_control >= 0 && + data->emp_curr_control <= (TXPREEMPAMPTUNE0_MASK >> TXPREEMPAMPTUNE0_BIT)) { reg &= ~TXPREEMPAMPTUNE0_MASK; reg |= (data->emp_curr_control << TXPREEMPAMPTUNE0_BIT); } - if (data->dc_vol_level_adjust && data->dc_vol_level_adjust <= + if (data->dc_vol_level_adjust >= 0 && + data->dc_vol_level_adjust <= (TXVREFTUNE0_MASK >> TXVREFTUNE0_BIT)) { reg &= ~TXVREFTUNE0_MASK; reg |= (data->dc_vol_level_adjust << TXVREFTUNE0_BIT); } + if (data->rise_fall_time_adjust >= 0 && + data->rise_fall_time_adjust <= + (TXRISETUNE0_MASK >> TXRISETUNE0_BIT)) { + reg &= ~TXRISETUNE0_MASK; + reg |= (data->rise_fall_time_adjust << TXRISETUNE0_BIT); + } + writel(reg, usbmisc->base + MX7D_USB_OTG_PHY_CFG1); } diff --git a/drivers/usb/class/cdc-acm.c b/drivers/usb/class/cdc-acm.c index 11da5fb284d0..a1f4e1ead97f 100644 --- a/drivers/usb/class/cdc-acm.c +++ b/drivers/usb/class/cdc-acm.c @@ -28,6 +28,7 @@ #include #include #include +#include #include #include #include @@ -318,6 +319,16 @@ static void acm_process_notification(struct acm *acm, unsigned char *buf) } difference = acm->ctrlin ^ newctrl; + + if ((difference & USB_CDC_SERIAL_STATE_DCD) && acm->port.tty) { + struct tty_ldisc *ld = tty_ldisc_ref(acm->port.tty); + if (ld) { + if (ld->ops->dcd_change) + ld->ops->dcd_change(acm->port.tty, newctrl & USB_CDC_SERIAL_STATE_DCD); + tty_ldisc_deref(ld); + } + } + spin_lock_irqsave(&acm->read_lock, flags); acm->ctrlin = newctrl; acm->oldcount = acm->iocount; @@ -789,8 +800,8 @@ static void acm_tty_close(struct tty_struct *tty, struct file *filp) tty_port_close(&acm->port, tty, filp); } -static int acm_tty_write(struct tty_struct *tty, - const unsigned char *buf, int count) +static ssize_t acm_tty_write(struct tty_struct *tty, const u8 *buf, + size_t count) { struct acm *acm = tty->driver_data; int stat; @@ -801,7 +812,7 @@ static int acm_tty_write(struct tty_struct *tty, if (!count) return 0; - dev_vdbg(&acm->data->dev, "%d bytes from tty layer\n", count); + dev_vdbg(&acm->data->dev, "%zu bytes from tty layer\n", count); spin_lock_irqsave(&acm->write_lock, flags); wbn = acm_wb_alloc(acm); @@ -818,7 +829,7 @@ static int acm_tty_write(struct tty_struct *tty, } count = (count > acm->writesize) ? acm->writesize : count; - dev_vdbg(&acm->data->dev, "writing %d bytes\n", count); + dev_vdbg(&acm->data->dev, "writing %zu bytes\n", count); memcpy(wb->buf, buf, count); wb->len = count; @@ -853,6 +864,19 @@ static unsigned int acm_tty_write_room(struct tty_struct *tty) return acm_wb_is_avail(acm) ? acm->writesize : 0; } +static void acm_tty_flush_buffer(struct tty_struct *tty) +{ + struct acm *acm = tty->driver_data; + unsigned long flags; + int i; + + spin_lock_irqsave(&acm->write_lock, flags); + for (i = 0; i < ACM_NW; i++) + if (acm->wb[i].use) + usb_unlink_urb(acm->wb[i].urb); + spin_unlock_irqrestore(&acm->write_lock, flags); +} + static unsigned int acm_tty_chars_in_buffer(struct tty_struct *tty) { struct acm *acm = tty->driver_data; @@ -2016,6 +2040,7 @@ static const struct tty_operations acm_ops = { .hangup = acm_tty_hangup, .write = acm_tty_write, .write_room = acm_tty_write_room, + .flush_buffer = acm_tty_flush_buffer, .ioctl = acm_tty_ioctl, .throttle = acm_tty_throttle, .unthrottle = acm_tty_unthrottle, diff --git a/drivers/usb/common/common.c b/drivers/usb/common/common.c index c9bdeb4ddcb5..b84efae26e15 100644 --- a/drivers/usb/common/common.c +++ b/drivers/usb/common/common.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include diff --git a/drivers/usb/core/config.c b/drivers/usb/core/config.c index 725b8dbcfe5f..b19e38d5fd10 100644 --- a/drivers/usb/core/config.c +++ b/drivers/usb/core/config.c @@ -1051,9 +1051,6 @@ int usb_get_bos_descriptor(struct usb_device *dev) } switch (cap_type) { - case USB_CAP_TYPE_WIRELESS_USB: - /* Wireless USB cap descriptor is handled by wusb */ - break; case USB_CAP_TYPE_EXT: dev->bos->ext_cap = (struct usb_ext_cap_descriptor *)buffer; diff --git a/drivers/usb/core/devices.c b/drivers/usb/core/devices.c index 2c14a9636056..a247da73f34d 100644 --- a/drivers/usb/core/devices.c +++ b/drivers/usb/core/devices.c @@ -424,7 +424,6 @@ static ssize_t usb_device_dump(char __user **buffer, size_t *nbytes, case USB_SPEED_UNKNOWN: /* usb 1.1 root hub code */ case USB_SPEED_FULL: speed = "12"; break; - case USB_SPEED_WIRELESS: /* Wireless has no real fixed speed */ case USB_SPEED_HIGH: speed = "480"; break; case USB_SPEED_SUPER: diff --git a/drivers/usb/core/file.c b/drivers/usb/core/file.c index c4ed3310e069..a88ced93b5e7 100644 --- a/drivers/usb/core/file.c +++ b/drivers/usb/core/file.c @@ -29,7 +29,6 @@ #define MAX_USB_MINORS 256 static const struct file_operations *usb_minors[MAX_USB_MINORS]; static DECLARE_RWSEM(minor_rwsem); -static DEFINE_MUTEX(init_usb_class_mutex); static int usb_open(struct inode *inode, struct file *file) { @@ -57,11 +56,6 @@ static const struct file_operations usb_fops = { .llseek = noop_llseek, }; -static struct usb_class { - struct kref kref; - struct class *class; -} *usb_class; - static char *usb_devnode(const struct device *dev, umode_t *mode) { struct usb_class_driver *drv; @@ -72,50 +66,10 @@ static char *usb_devnode(const struct device *dev, umode_t *mode) return drv->devnode(dev, mode); } -static int init_usb_class(void) -{ - int result = 0; - - if (usb_class != NULL) { - kref_get(&usb_class->kref); - goto exit; - } - - usb_class = kmalloc(sizeof(*usb_class), GFP_KERNEL); - if (!usb_class) { - result = -ENOMEM; - goto exit; - } - - kref_init(&usb_class->kref); - usb_class->class = class_create("usbmisc"); - if (IS_ERR(usb_class->class)) { - result = PTR_ERR(usb_class->class); - printk(KERN_ERR "class_create failed for usb devices\n"); - kfree(usb_class); - usb_class = NULL; - goto exit; - } - usb_class->class->devnode = usb_devnode; - -exit: - return result; -} - -static void release_usb_class(struct kref *kref) -{ - /* Ok, we cheat as we know we only have one usb_class */ - class_destroy(usb_class->class); - kfree(usb_class); - usb_class = NULL; -} - -static void destroy_usb_class(void) -{ - mutex_lock(&init_usb_class_mutex); - kref_put(&usb_class->kref, release_usb_class); - mutex_unlock(&init_usb_class_mutex); -} +const struct class usbmisc_class = { + .name = "usbmisc", + .devnode = usb_devnode, +}; int usb_major_init(void) { @@ -156,7 +110,7 @@ void usb_major_cleanup(void) int usb_register_dev(struct usb_interface *intf, struct usb_class_driver *class_driver) { - int retval; + int retval = 0; int minor_base = class_driver->minor_base; int minor; char name[20]; @@ -175,13 +129,6 @@ int usb_register_dev(struct usb_interface *intf, if (intf->minor >= 0) return -EADDRINUSE; - mutex_lock(&init_usb_class_mutex); - retval = init_usb_class(); - mutex_unlock(&init_usb_class_mutex); - - if (retval) - return retval; - dev_dbg(&intf->dev, "looking for a minor, starting at %d\n", minor_base); down_write(&minor_rwsem); @@ -200,7 +147,7 @@ int usb_register_dev(struct usb_interface *intf, /* create a usb class device for this usb interface */ snprintf(name, sizeof(name), class_driver->name, minor - minor_base); - intf->usb_dev = device_create(usb_class->class, &intf->dev, + intf->usb_dev = device_create(&usbmisc_class, &intf->dev, MKDEV(USB_MAJOR, minor), class_driver, "%s", kbasename(name)); if (IS_ERR(intf->usb_dev)) { @@ -234,7 +181,7 @@ void usb_deregister_dev(struct usb_interface *intf, return; dev_dbg(&intf->dev, "removing %d minor\n", intf->minor); - device_destroy(usb_class->class, MKDEV(USB_MAJOR, intf->minor)); + device_destroy(&usbmisc_class, MKDEV(USB_MAJOR, intf->minor)); down_write(&minor_rwsem); usb_minors[intf->minor] = NULL; @@ -242,6 +189,5 @@ void usb_deregister_dev(struct usb_interface *intf, intf->usb_dev = NULL; intf->minor = -1; - destroy_usb_class(); } EXPORT_SYMBOL_GPL(usb_deregister_dev); diff --git a/drivers/usb/core/hcd.c b/drivers/usb/core/hcd.c index 8300baedafd2..12b6dfeaf658 100644 --- a/drivers/usb/core/hcd.c +++ b/drivers/usb/core/hcd.c @@ -156,27 +156,6 @@ static const u8 usb3_rh_dev_descriptor[18] = { 0x01 /* __u8 bNumConfigurations; */ }; -/* usb 2.5 (wireless USB 1.0) root hub device descriptor */ -static const u8 usb25_rh_dev_descriptor[18] = { - 0x12, /* __u8 bLength; */ - USB_DT_DEVICE, /* __u8 bDescriptorType; Device */ - 0x50, 0x02, /* __le16 bcdUSB; v2.5 */ - - 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */ - 0x00, /* __u8 bDeviceSubClass; */ - 0x00, /* __u8 bDeviceProtocol; [ usb 2.0 no TT ] */ - 0xFF, /* __u8 bMaxPacketSize0; always 0xFF (WUSB Spec 7.4.1). */ - - 0x6b, 0x1d, /* __le16 idVendor; Linux Foundation 0x1d6b */ - 0x02, 0x00, /* __le16 idProduct; device 0x0002 */ - KERNEL_VER, KERNEL_REL, /* __le16 bcdDevice */ - - 0x03, /* __u8 iManufacturer; */ - 0x02, /* __u8 iProduct; */ - 0x01, /* __u8 iSerialNumber; */ - 0x01 /* __u8 bNumConfigurations; */ -}; - /* usb 2.0 root hub device descriptor */ static const u8 usb2_rh_dev_descriptor[18] = { 0x12, /* __u8 bLength; */ @@ -368,7 +347,7 @@ static const u8 ss_rh_config_descriptor[] = { }; /* authorized_default behaviour: - * -1 is authorized for all devices except wireless (old behaviour) + * -1 is authorized for all devices (leftover from wireless USB) * 0 is unauthorized for all devices * 1 is authorized for all devices * 2 is authorized for internal devices @@ -383,7 +362,7 @@ module_param(authorized_default, int, S_IRUGO|S_IWUSR); MODULE_PARM_DESC(authorized_default, "Default USB device authorization: 0 is not authorized, 1 is " "authorized, 2 is authorized for internal devices, -1 is " - "authorized except for wireless USB (default, old behaviour)"); + "authorized (default, same as 1)"); /*-------------------------------------------------------------------------*/ /** @@ -578,9 +557,6 @@ static int rh_call_control (struct usb_hcd *hcd, struct urb *urb) case HCD_USB3: bufp = usb3_rh_dev_descriptor; break; - case HCD_USB25: - bufp = usb25_rh_dev_descriptor; - break; case HCD_USB2: bufp = usb2_rh_dev_descriptor; break; @@ -602,7 +578,6 @@ static int rh_call_control (struct usb_hcd *hcd, struct urb *urb) bufp = ss_rh_config_descriptor; len = sizeof ss_rh_config_descriptor; break; - case HCD_USB25: case HCD_USB2: bufp = hs_rh_config_descriptor; len = sizeof hs_rh_config_descriptor; @@ -983,6 +958,7 @@ static int register_root_hub(struct usb_hcd *hcd) { struct device *parent_dev = hcd->self.controller; struct usb_device *usb_dev = hcd->self.root_hub; + struct usb_device_descriptor *descr; const int devnum = 1; int retval; @@ -994,13 +970,16 @@ static int register_root_hub(struct usb_hcd *hcd) mutex_lock(&usb_bus_idr_lock); usb_dev->ep0.desc.wMaxPacketSize = cpu_to_le16(64); - retval = usb_get_device_descriptor(usb_dev, USB_DT_DEVICE_SIZE); - if (retval != sizeof usb_dev->descriptor) { + descr = usb_get_device_descriptor(usb_dev); + if (IS_ERR(descr)) { + retval = PTR_ERR(descr); mutex_unlock(&usb_bus_idr_lock); dev_dbg (parent_dev, "can't read %s device descriptor %d\n", dev_name(&usb_dev->dev), retval); - return (retval < 0) ? retval : -EMSGSIZE; + return retval; } + usb_dev->descriptor = *descr; + kfree(descr); if (le16_to_cpu(usb_dev->descriptor.bcdUSB) >= 0x0201) { retval = usb_get_bos_descriptor(usb_dev); @@ -2844,18 +2823,14 @@ int usb_add_hcd(struct usb_hcd *hcd, hcd->dev_policy = USB_DEVICE_AUTHORIZE_NONE; break; - case USB_AUTHORIZE_ALL: - hcd->dev_policy = USB_DEVICE_AUTHORIZE_ALL; - break; - case USB_AUTHORIZE_INTERNAL: hcd->dev_policy = USB_DEVICE_AUTHORIZE_INTERNAL; break; + case USB_AUTHORIZE_ALL: case USB_AUTHORIZE_WIRED: default: - hcd->dev_policy = hcd->wireless ? - USB_DEVICE_AUTHORIZE_NONE : USB_DEVICE_AUTHORIZE_ALL; + hcd->dev_policy = USB_DEVICE_AUTHORIZE_ALL; break; } @@ -2899,9 +2874,6 @@ int usb_add_hcd(struct usb_hcd *hcd, case HCD_USB2: rhdev->speed = USB_SPEED_HIGH; break; - case HCD_USB25: - rhdev->speed = USB_SPEED_WIRELESS; - break; case HCD_USB3: rhdev->speed = USB_SPEED_SUPER; break; diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c index a739403a9e45..3c54b218301c 100644 --- a/drivers/usb/core/hub.c +++ b/drivers/usb/core/hub.c @@ -614,6 +614,29 @@ static int hub_ext_port_status(struct usb_hub *hub, int port1, int type, ret = 0; } mutex_unlock(&hub->status_mutex); + + /* + * There is no need to lock status_mutex here, because status_mutex + * protects hub->status, and the phy driver only checks the port + * status without changing the status. + */ + if (!ret) { + struct usb_device *hdev = hub->hdev; + + /* + * Only roothub will be notified of port state changes, + * since the USB PHY only cares about changes at the next + * level. + */ + if (is_root_hub(hdev)) { + struct usb_hcd *hcd = bus_to_hcd(hdev->bus); + + if (hcd->usb_phy) + usb_phy_notify_port_status(hcd->usb_phy, + port1 - 1, *status, *change); + } + } + return ret; } @@ -2117,22 +2140,6 @@ EXPORT_SYMBOL_GPL(usb_set_device_state); * USB-3.0 buses the address is assigned by the controller hardware * and it usually is not the same as the device number. * - * WUSB devices are simple: they have no hubs behind, so the mapping - * device <-> virtual port number becomes 1:1. Why? to simplify the - * life of the device connection logic in - * drivers/usb/wusbcore/devconnect.c. When we do the initial secret - * handshake we need to assign a temporary address in the unauthorized - * space. For simplicity we use the first virtual port number found to - * be free [drivers/usb/wusbcore/devconnect.c:wusbhc_devconnect_ack()] - * and that becomes it's address [X < 128] or its unauthorized address - * [X | 0x80]. - * - * We add 1 as an offset to the one-based USB-stack port number - * (zero-based wusb virtual port index) for two reasons: (a) dev addr - * 0 is reserved by USB for default address; (b) Linux's USB stack - * uses always #1 for the root hub of the controller. So USB stack's - * port #1, which is wusb virtual-port #0 has address #2. - * * Devices connected under xHCI are not as simple. The host controller * supports virtualization, so the hardware assigns device addresses and * the HCD must setup data structures before issuing a set address @@ -2145,19 +2152,13 @@ static void choose_devnum(struct usb_device *udev) /* be safe when more hub events are proceed in parallel */ mutex_lock(&bus->devnum_next_mutex); - if (udev->wusb) { - devnum = udev->portnum + 1; - BUG_ON(test_bit(devnum, bus->devmap.devicemap)); - } else { - /* Try to allocate the next devnum beginning at - * bus->devnum_next. */ - devnum = find_next_zero_bit(bus->devmap.devicemap, 128, - bus->devnum_next); - if (devnum >= 128) - devnum = find_next_zero_bit(bus->devmap.devicemap, - 128, 1); - bus->devnum_next = (devnum >= 127 ? 1 : devnum + 1); - } + + /* Try to allocate the next devnum beginning at bus->devnum_next. */ + devnum = find_next_zero_bit(bus->devmap.devicemap, 128, + bus->devnum_next); + if (devnum >= 128) + devnum = find_next_zero_bit(bus->devmap.devicemap, 128, 1); + bus->devnum_next = (devnum >= 127 ? 1 : devnum + 1); if (devnum < 128) { set_bit(devnum, bus->devmap.devicemap); udev->devnum = devnum; @@ -2175,9 +2176,7 @@ static void release_devnum(struct usb_device *udev) static void update_devnum(struct usb_device *udev, int devnum) { - /* The address for a WUSB device is managed by wusbcore. */ - if (!udev->wusb) - udev->devnum = devnum; + udev->devnum = devnum; if (!udev->devaddr) udev->devaddr = (u8)devnum; } @@ -2670,15 +2669,6 @@ int usb_authorize_device(struct usb_device *usb_dev) goto error_autoresume; } - if (usb_dev->wusb) { - result = usb_get_device_descriptor(usb_dev, sizeof(usb_dev->descriptor)); - if (result < 0) { - dev_err(&usb_dev->dev, "can't re-read device descriptor for " - "authorization: %d\n", result); - goto error_device_descriptor; - } - } - usb_dev->authorized = 1; /* Choose and set the configuration. This registers the interfaces * with the driver core and lets interface drivers bind to them. @@ -2695,7 +2685,6 @@ int usb_authorize_device(struct usb_device *usb_dev) } dev_info(&usb_dev->dev, "authorized to connect\n"); -error_device_descriptor: usb_autosuspend_device(usb_dev); error_autoresume: out_authorized: @@ -2778,17 +2767,6 @@ out: return USB_SSP_GEN_UNKNOWN; } -/* Returns 1 if @hub is a WUSB root hub, 0 otherwise */ -static unsigned hub_is_wusb(struct usb_hub *hub) -{ - struct usb_hcd *hcd; - if (hub->hdev->parent != NULL) /* not a root hub? */ - return 0; - hcd = bus_to_hcd(hub->hdev->bus); - return hcd->wireless; -} - - #ifdef CONFIG_USB_FEW_INIT_RETRIES #define PORT_RESET_TRIES 2 #define SET_ADDRESS_TRIES 1 @@ -2941,9 +2919,7 @@ static int hub_port_wait_reset(struct usb_hub *hub, int port1, udev->tx_lanes = 1; udev->ssp_rate = USB_SSP_GEN_UNKNOWN; } - if (hub_is_wusb(hub)) - udev->speed = USB_SPEED_WIRELESS; - else if (udev->ssp_rate != USB_SSP_GEN_UNKNOWN) + if (udev->ssp_rate != USB_SSP_GEN_UNKNOWN) udev->speed = USB_SPEED_SUPER_PLUS; else if (hub_is_superspeed(hub->hdev)) udev->speed = USB_SPEED_SUPER; @@ -4718,6 +4694,67 @@ static int hub_enable_device(struct usb_device *udev) return hcd->driver->enable_device(hcd, udev); } +/* + * Get the bMaxPacketSize0 value during initialization by reading the + * device's device descriptor. Since we don't already know this value, + * the transfer is unsafe and it ignores I/O errors, only testing for + * reasonable received values. + * + * For "old scheme" initialization, size will be 8 so we read just the + * start of the device descriptor, which should work okay regardless of + * the actual bMaxPacketSize0 value. For "new scheme" initialization, + * size will be 64 (and buf will point to a sufficiently large buffer), + * which might not be kosher according to the USB spec but it's what + * Windows does and what many devices expect. + * + * Returns: bMaxPacketSize0 or a negative error code. + */ +static int get_bMaxPacketSize0(struct usb_device *udev, + struct usb_device_descriptor *buf, int size, bool first_time) +{ + int i, rc; + + /* + * Retry on all errors; some devices are flakey. + * 255 is for WUSB devices, we actually need to use + * 512 (WUSB1.0[4.8.1]). + */ + for (i = 0; i < GET_MAXPACKET0_TRIES; ++i) { + /* Start with invalid values in case the transfer fails */ + buf->bDescriptorType = buf->bMaxPacketSize0 = 0; + rc = usb_control_msg(udev, usb_rcvaddr0pipe(), + USB_REQ_GET_DESCRIPTOR, USB_DIR_IN, + USB_DT_DEVICE << 8, 0, + buf, size, + initial_descriptor_timeout); + switch (buf->bMaxPacketSize0) { + case 8: case 16: case 32: case 64: case 9: + if (buf->bDescriptorType == USB_DT_DEVICE) { + rc = buf->bMaxPacketSize0; + break; + } + fallthrough; + default: + if (rc >= 0) + rc = -EPROTO; + break; + } + + /* + * Some devices time out if they are powered on + * when already connected. They need a second + * reset, so return early. But only on the first + * attempt, lest we get into a time-out/reset loop. + */ + if (rc > 0 || (rc == -ETIMEDOUT && first_time && + udev->speed > USB_SPEED_FULL)) + break; + } + return rc; +} + +#define GET_DESCRIPTOR_BUFSIZE 64 + /* Reset device, (re)assign address, get device descriptor. * Device connection must be stable, no more debouncing needed. * Returns device in USB_STATE_ADDRESS, except on error. @@ -4727,10 +4764,17 @@ static int hub_enable_device(struct usb_device *udev) * the port lock. For a newly detected device that is not accessible * through any global pointers, it's not necessary to lock the device, * but it is still necessary to lock the port. + * + * For a newly detected device, @dev_descr must be NULL. The device + * descriptor retrieved from the device will then be stored in + * @udev->descriptor. For an already existing device, @dev_descr + * must be non-NULL. The device descriptor will be stored there, + * not in @udev->descriptor, because descriptors for registered + * devices are meant to be immutable. */ static int hub_port_init(struct usb_hub *hub, struct usb_device *udev, int port1, - int retry_counter) + int retry_counter, struct usb_device_descriptor *dev_descr) { struct usb_device *hdev = hub->hdev; struct usb_hcd *hcd = bus_to_hcd(hdev->bus); @@ -4742,6 +4786,13 @@ hub_port_init(struct usb_hub *hub, struct usb_device *udev, int port1, int devnum = udev->devnum; const char *driver_name; bool do_new_scheme; + const bool initial = !dev_descr; + int maxp0; + struct usb_device_descriptor *buf, *descr; + + buf = kmalloc(GET_DESCRIPTOR_BUFSIZE, GFP_NOIO); + if (!buf) + return -ENOMEM; /* root hub ports have a slightly longer reset period * (from USB 2.0 spec, section 7.1.7.5) @@ -4774,38 +4825,34 @@ hub_port_init(struct usb_hub *hub, struct usb_device *udev, int port1, } oldspeed = udev->speed; - /* USB 2.0 section 5.5.3 talks about ep0 maxpacket ... - * it's fixed size except for full speed devices. - * For Wireless USB devices, ep0 max packet is always 512 (tho - * reported as 0xff in the device descriptor). WUSB1.0[4.8.1]. - */ - switch (udev->speed) { - case USB_SPEED_SUPER_PLUS: - case USB_SPEED_SUPER: - case USB_SPEED_WIRELESS: /* fixed at 512 */ - udev->ep0.desc.wMaxPacketSize = cpu_to_le16(512); - break; - case USB_SPEED_HIGH: /* fixed at 64 */ - udev->ep0.desc.wMaxPacketSize = cpu_to_le16(64); - break; - case USB_SPEED_FULL: /* 8, 16, 32, or 64 */ - /* to determine the ep0 maxpacket size, try to read - * the device descriptor to get bMaxPacketSize0 and - * then correct our initial guess. + if (initial) { + /* USB 2.0 section 5.5.3 talks about ep0 maxpacket ... + * it's fixed size except for full speed devices. */ - udev->ep0.desc.wMaxPacketSize = cpu_to_le16(64); - break; - case USB_SPEED_LOW: /* fixed at 8 */ - udev->ep0.desc.wMaxPacketSize = cpu_to_le16(8); - break; - default: - goto fail; + switch (udev->speed) { + case USB_SPEED_SUPER_PLUS: + case USB_SPEED_SUPER: + udev->ep0.desc.wMaxPacketSize = cpu_to_le16(512); + break; + case USB_SPEED_HIGH: /* fixed at 64 */ + udev->ep0.desc.wMaxPacketSize = cpu_to_le16(64); + break; + case USB_SPEED_FULL: /* 8, 16, 32, or 64 */ + /* to determine the ep0 maxpacket size, try to read + * the device descriptor to get bMaxPacketSize0 and + * then correct our initial guess. + */ + udev->ep0.desc.wMaxPacketSize = cpu_to_le16(64); + break; + case USB_SPEED_LOW: /* fixed at 8 */ + udev->ep0.desc.wMaxPacketSize = cpu_to_le16(8); + break; + default: + goto fail; + } } - if (udev->speed == USB_SPEED_WIRELESS) - speed = "variable speed Wireless"; - else - speed = usb_speed_string(udev->speed); + speed = usb_speed_string(udev->speed); /* * The controller driver may be NULL if the controller device @@ -4822,22 +4869,24 @@ hub_port_init(struct usb_hub *hub, struct usb_device *udev, int port1, if (udev->speed < USB_SPEED_SUPER) dev_info(&udev->dev, "%s %s USB device number %d using %s\n", - (udev->config) ? "reset" : "new", speed, + (initial ? "new" : "reset"), speed, devnum, driver_name); - /* Set up TT records, if needed */ - if (hdev->tt) { - udev->tt = hdev->tt; - udev->ttport = hdev->ttport; - } else if (udev->speed != USB_SPEED_HIGH - && hdev->speed == USB_SPEED_HIGH) { - if (!hub->tt.hub) { - dev_err(&udev->dev, "parent hub has no TT\n"); - retval = -EINVAL; - goto fail; + if (initial) { + /* Set up TT records, if needed */ + if (hdev->tt) { + udev->tt = hdev->tt; + udev->ttport = hdev->ttport; + } else if (udev->speed != USB_SPEED_HIGH + && hdev->speed == USB_SPEED_HIGH) { + if (!hub->tt.hub) { + dev_err(&udev->dev, "parent hub has no TT\n"); + retval = -EINVAL; + goto fail; + } + udev->tt = &hub->tt; + udev->ttport = port1; } - udev->tt = &hub->tt; - udev->ttport = port1; } /* Why interleave GET_DESCRIPTOR and SET_ADDRESS this way? @@ -4861,9 +4910,6 @@ hub_port_init(struct usb_hub *hub, struct usb_device *udev, int port1, } if (do_new_scheme) { - struct usb_device_descriptor *buf; - int r = 0; - retval = hub_enable_device(udev); if (retval < 0) { dev_err(&udev->dev, @@ -4872,53 +4918,15 @@ hub_port_init(struct usb_hub *hub, struct usb_device *udev, int port1, goto fail; } -#define GET_DESCRIPTOR_BUFSIZE 64 - buf = kmalloc(GET_DESCRIPTOR_BUFSIZE, GFP_NOIO); - if (!buf) { - retval = -ENOMEM; - continue; + maxp0 = get_bMaxPacketSize0(udev, buf, + GET_DESCRIPTOR_BUFSIZE, retries == 0); + if (maxp0 > 0 && !initial && + maxp0 != udev->descriptor.bMaxPacketSize0) { + dev_err(&udev->dev, "device reset changed ep0 maxpacket size!\n"); + retval = -ENODEV; + goto fail; } - /* Retry on all errors; some devices are flakey. - * 255 is for WUSB devices, we actually need to use - * 512 (WUSB1.0[4.8.1]). - */ - for (operations = 0; operations < GET_MAXPACKET0_TRIES; - ++operations) { - buf->bMaxPacketSize0 = 0; - r = usb_control_msg(udev, usb_rcvaddr0pipe(), - USB_REQ_GET_DESCRIPTOR, USB_DIR_IN, - USB_DT_DEVICE << 8, 0, - buf, GET_DESCRIPTOR_BUFSIZE, - initial_descriptor_timeout); - switch (buf->bMaxPacketSize0) { - case 8: case 16: case 32: case 64: case 255: - if (buf->bDescriptorType == - USB_DT_DEVICE) { - r = 0; - break; - } - fallthrough; - default: - if (r == 0) - r = -EPROTO; - break; - } - /* - * Some devices time out if they are powered on - * when already connected. They need a second - * reset. But only on the first attempt, - * lest we get into a time out/reset loop - */ - if (r == 0 || (r == -ETIMEDOUT && - retries == 0 && - udev->speed > USB_SPEED_FULL)) - break; - } - udev->descriptor.bMaxPacketSize0 = - buf->bMaxPacketSize0; - kfree(buf); - retval = hub_port_reset(hub, port1, udev, delay, false); if (retval < 0) /* error or disconnect */ goto fail; @@ -4928,71 +4936,68 @@ hub_port_init(struct usb_hub *hub, struct usb_device *udev, int port1, retval = -ENODEV; goto fail; } - if (r) { - if (r != -ENODEV) + if (maxp0 < 0) { + if (maxp0 != -ENODEV) dev_err(&udev->dev, "device descriptor read/64, error %d\n", - r); - retval = -EMSGSIZE; + maxp0); + retval = maxp0; continue; } -#undef GET_DESCRIPTOR_BUFSIZE + } + + for (operations = 0; operations < SET_ADDRESS_TRIES; ++operations) { + retval = hub_set_address(udev, devnum); + if (retval >= 0) + break; + msleep(200); + } + if (retval < 0) { + if (retval != -ENODEV) + dev_err(&udev->dev, "device not accepting address %d, error %d\n", + devnum, retval); + goto fail; + } + if (udev->speed >= USB_SPEED_SUPER) { + devnum = udev->devnum; + dev_info(&udev->dev, + "%s SuperSpeed%s%s USB device number %d using %s\n", + (udev->config) ? "reset" : "new", + (udev->speed == USB_SPEED_SUPER_PLUS) ? + " Plus" : "", + (udev->ssp_rate == USB_SSP_GEN_2x2) ? + " Gen 2x2" : + (udev->ssp_rate == USB_SSP_GEN_2x1) ? + " Gen 2x1" : + (udev->ssp_rate == USB_SSP_GEN_1x2) ? + " Gen 1x2" : "", + devnum, driver_name); } /* - * If device is WUSB, we already assigned an - * unauthorized address in the Connect Ack sequence; - * authorization will assign the final address. + * cope with hardware quirkiness: + * - let SET_ADDRESS settle, some device hardware wants it + * - read ep0 maxpacket even for high and low speed, */ - if (udev->wusb == 0) { - for (operations = 0; operations < SET_ADDRESS_TRIES; ++operations) { - retval = hub_set_address(udev, devnum); - if (retval >= 0) - break; - msleep(200); - } - if (retval < 0) { - if (retval != -ENODEV) - dev_err(&udev->dev, "device not accepting address %d, error %d\n", - devnum, retval); - goto fail; - } - if (udev->speed >= USB_SPEED_SUPER) { - devnum = udev->devnum; - dev_info(&udev->dev, - "%s SuperSpeed%s%s USB device number %d using %s\n", - (udev->config) ? "reset" : "new", - (udev->speed == USB_SPEED_SUPER_PLUS) ? - " Plus" : "", - (udev->ssp_rate == USB_SSP_GEN_2x2) ? - " Gen 2x2" : - (udev->ssp_rate == USB_SSP_GEN_2x1) ? - " Gen 2x1" : - (udev->ssp_rate == USB_SSP_GEN_1x2) ? - " Gen 1x2" : "", - devnum, driver_name); - } + msleep(10); - /* cope with hardware quirkiness: - * - let SET_ADDRESS settle, some device hardware wants it - * - read ep0 maxpacket even for high and low speed, - */ - msleep(10); - if (do_new_scheme) - break; - } + if (do_new_scheme) + break; - retval = usb_get_device_descriptor(udev, 8); - if (retval < 8) { + maxp0 = get_bMaxPacketSize0(udev, buf, 8, retries == 0); + if (maxp0 < 0) { + retval = maxp0; if (retval != -ENODEV) dev_err(&udev->dev, "device descriptor read/8, error %d\n", retval); - if (retval >= 0) - retval = -EMSGSIZE; } else { u32 delay; - retval = 0; + if (!initial && maxp0 != udev->descriptor.bMaxPacketSize0) { + dev_err(&udev->dev, "device reset changed ep0 maxpacket size!\n"); + retval = -ENODEV; + goto fail; + } delay = udev->parent->hub_delay; udev->hub_delay = min_t(u32, delay, @@ -5010,6 +5015,51 @@ hub_port_init(struct usb_hub *hub, struct usb_device *udev, int port1, if (retval) goto fail; + /* + * Check the ep0 maxpacket guess and correct it if necessary. + * maxp0 is the value stored in the device descriptor; + * i is the value it encodes (logarithmic for SuperSpeed or greater). + */ + i = maxp0; + if (udev->speed >= USB_SPEED_SUPER) { + if (maxp0 <= 16) + i = 1 << maxp0; + else + i = 0; /* Invalid */ + } + if (usb_endpoint_maxp(&udev->ep0.desc) == i) { + ; /* Initial ep0 maxpacket guess is right */ + } else if ((udev->speed == USB_SPEED_FULL || + udev->speed == USB_SPEED_HIGH) && + (i == 8 || i == 16 || i == 32 || i == 64)) { + /* Initial guess is wrong; use the descriptor's value */ + if (udev->speed == USB_SPEED_FULL) + dev_dbg(&udev->dev, "ep0 maxpacket = %d\n", i); + else + dev_warn(&udev->dev, "Using ep0 maxpacket: %d\n", i); + udev->ep0.desc.wMaxPacketSize = cpu_to_le16(i); + usb_ep0_reinit(udev); + } else { + /* Initial guess is wrong and descriptor's value is invalid */ + dev_err(&udev->dev, "Invalid ep0 maxpacket: %d\n", maxp0); + retval = -EMSGSIZE; + goto fail; + } + + descr = usb_get_device_descriptor(udev); + if (IS_ERR(descr)) { + retval = PTR_ERR(descr); + if (retval != -ENODEV) + dev_err(&udev->dev, "device descriptor read/all, error %d\n", + retval); + goto fail; + } + if (initial) + udev->descriptor = *descr; + else + *dev_descr = *descr; + kfree(descr); + /* * Some superspeed devices have finished the link training process * and attached to a superspeed hub port, but the device descriptor @@ -5018,47 +5068,15 @@ hub_port_init(struct usb_hub *hub, struct usb_device *udev, int port1, */ if ((udev->speed >= USB_SPEED_SUPER) && (le16_to_cpu(udev->descriptor.bcdUSB) < 0x0300)) { - dev_err(&udev->dev, "got a wrong device descriptor, " - "warm reset device\n"); - hub_port_reset(hub, port1, udev, - HUB_BH_RESET_TIME, true); + dev_err(&udev->dev, "got a wrong device descriptor, warm reset device\n"); + hub_port_reset(hub, port1, udev, HUB_BH_RESET_TIME, true); retval = -EINVAL; goto fail; } - if (udev->descriptor.bMaxPacketSize0 == 0xff || - udev->speed >= USB_SPEED_SUPER) - i = 512; - else - i = udev->descriptor.bMaxPacketSize0; - if (usb_endpoint_maxp(&udev->ep0.desc) != i) { - if (udev->speed == USB_SPEED_LOW || - !(i == 8 || i == 16 || i == 32 || i == 64)) { - dev_err(&udev->dev, "Invalid ep0 maxpacket: %d\n", i); - retval = -EMSGSIZE; - goto fail; - } - if (udev->speed == USB_SPEED_FULL) - dev_dbg(&udev->dev, "ep0 maxpacket = %d\n", i); - else - dev_warn(&udev->dev, "Using ep0 maxpacket: %d\n", i); - udev->ep0.desc.wMaxPacketSize = cpu_to_le16(i); - usb_ep0_reinit(udev); - } - - retval = usb_get_device_descriptor(udev, USB_DT_DEVICE_SIZE); - if (retval < (signed)sizeof(udev->descriptor)) { - if (retval != -ENODEV) - dev_err(&udev->dev, "device descriptor read/all, error %d\n", - retval); - if (retval >= 0) - retval = -ENOMSG; - goto fail; - } - usb_detect_quirks(udev); - if (udev->wusb == 0 && le16_to_cpu(udev->descriptor.bcdUSB) >= 0x0201) { + if (le16_to_cpu(udev->descriptor.bcdUSB) >= 0x0201) { retval = usb_get_bos_descriptor(udev); if (!retval) { udev->lpm_capable = usb_device_supports_lpm(udev); @@ -5078,6 +5096,7 @@ fail: hub_port_disable(hub, port1, 0); update_devnum(udev, devnum); /* for disconnect processing */ } + kfree(buf); return retval; } @@ -5158,7 +5177,7 @@ hub_power_remaining(struct usb_hub *hub) static int descriptors_changed(struct usb_device *udev, - struct usb_device_descriptor *old_device_descriptor, + struct usb_device_descriptor *new_device_descriptor, struct usb_host_bos *old_bos) { int changed = 0; @@ -5169,8 +5188,8 @@ static int descriptors_changed(struct usb_device *udev, int length; char *buf; - if (memcmp(&udev->descriptor, old_device_descriptor, - sizeof(*old_device_descriptor)) != 0) + if (memcmp(&udev->descriptor, new_device_descriptor, + sizeof(*new_device_descriptor)) != 0) return 1; if ((old_bos && !udev->bos) || (!old_bos && udev->bos)) @@ -5333,7 +5352,6 @@ static void hub_port_connect(struct usb_hub *hub, int port1, u16 portstatus, usb_set_device_state(udev, USB_STATE_POWERED); udev->bus_mA = hub->mA_per_port; udev->level = hdev->level + 1; - udev->wusb = hub_is_wusb(hub); /* Devices connected to SuperSpeed hubs are USB 3.0 or later */ if (hub_is_superspeed(hub->hdev)) @@ -5348,7 +5366,7 @@ static void hub_port_connect(struct usb_hub *hub, int port1, u16 portstatus, } /* reset (non-USB 3.0 devices) and get descriptor */ - status = hub_port_init(hub, udev, port1, i); + status = hub_port_init(hub, udev, port1, i, NULL); if (status < 0) goto loop; @@ -5495,9 +5513,8 @@ static void hub_port_connect_change(struct usb_hub *hub, int port1, { struct usb_port *port_dev = hub->ports[port1 - 1]; struct usb_device *udev = port_dev->child; - struct usb_device_descriptor descriptor; + struct usb_device_descriptor *descr; int status = -ENODEV; - int retval; dev_dbg(&port_dev->dev, "status %04x, change %04x, %s\n", portstatus, portchange, portspeed(hub, portstatus)); @@ -5524,23 +5541,20 @@ static void hub_port_connect_change(struct usb_hub *hub, int port1, * changed device descriptors before resuscitating the * device. */ - descriptor = udev->descriptor; - retval = usb_get_device_descriptor(udev, - sizeof(udev->descriptor)); - if (retval < 0) { + descr = usb_get_device_descriptor(udev); + if (IS_ERR(descr)) { dev_dbg(&udev->dev, - "can't read device descriptor %d\n", - retval); + "can't read device descriptor %ld\n", + PTR_ERR(descr)); } else { - if (descriptors_changed(udev, &descriptor, + if (descriptors_changed(udev, descr, udev->bos)) { dev_dbg(&udev->dev, "device descriptor has changed\n"); - /* for disconnect() calls */ - udev->descriptor = descriptor; } else { status = 0; /* Nothing to do */ } + kfree(descr); } #ifdef CONFIG_PM } else if (udev->state == USB_STATE_SUSPENDED && @@ -5982,7 +5996,7 @@ static int usb_reset_and_verify_device(struct usb_device *udev) struct usb_device *parent_hdev = udev->parent; struct usb_hub *parent_hub; struct usb_hcd *hcd = bus_to_hcd(udev->bus); - struct usb_device_descriptor descriptor = udev->descriptor; + struct usb_device_descriptor descriptor; struct usb_host_bos *bos; int i, j, ret = 0; int port1 = udev->portnum; @@ -6018,7 +6032,7 @@ static int usb_reset_and_verify_device(struct usb_device *udev) /* ep0 maxpacket size may change; let the HCD know about it. * Other endpoints will be handled by re-enumeration. */ usb_ep0_reinit(udev); - ret = hub_port_init(parent_hub, udev, port1, i); + ret = hub_port_init(parent_hub, udev, port1, i, &descriptor); if (ret >= 0 || ret == -ENOTCONN || ret == -ENODEV) break; } @@ -6030,7 +6044,6 @@ static int usb_reset_and_verify_device(struct usb_device *udev) /* Device might have changed firmware (DFU or similar) */ if (descriptors_changed(udev, &descriptor, bos)) { dev_info(&udev->dev, "device firmware changed\n"); - udev->descriptor = descriptor; /* for disconnect() calls */ goto re_enumerate; } diff --git a/drivers/usb/core/ledtrig-usbport.c b/drivers/usb/core/ledtrig-usbport.c index ba371a24ff78..85c999f71ad7 100644 --- a/drivers/usb/core/ledtrig-usbport.c +++ b/drivers/usb/core/ledtrig-usbport.c @@ -350,18 +350,7 @@ static struct led_trigger usbport_led_trigger = { .deactivate = usbport_trig_deactivate, }; -static int __init usbport_trig_init(void) -{ - return led_trigger_register(&usbport_led_trigger); -} - -static void __exit usbport_trig_exit(void) -{ - led_trigger_unregister(&usbport_led_trigger); -} - -module_init(usbport_trig_init); -module_exit(usbport_trig_exit); +module_led_trigger(usbport_led_trigger); MODULE_AUTHOR("RafaÅ‚ MiÅ‚ecki "); MODULE_DESCRIPTION("USB port trigger"); diff --git a/drivers/usb/core/message.c b/drivers/usb/core/message.c index b5811620f1de..077dfe48d01c 100644 --- a/drivers/usb/core/message.c +++ b/drivers/usb/core/message.c @@ -9,6 +9,7 @@ #include /* for scatterlist macros */ #include #include +#include #include #include #include @@ -1040,40 +1041,35 @@ char *usb_cache_string(struct usb_device *udev, int index) EXPORT_SYMBOL_GPL(usb_cache_string); /* - * usb_get_device_descriptor - (re)reads the device descriptor (usbcore) - * @dev: the device whose device descriptor is being updated - * @size: how much of the descriptor to read + * usb_get_device_descriptor - read the device descriptor + * @udev: the device whose device descriptor should be read * * Context: task context, might sleep. * - * Updates the copy of the device descriptor stored in the device structure, - * which dedicates space for this purpose. - * * Not exported, only for use by the core. If drivers really want to read * the device descriptor directly, they can call usb_get_descriptor() with * type = USB_DT_DEVICE and index = 0. * - * This call is synchronous, and may not be used in an interrupt context. - * - * Return: The number of bytes received on success, or else the status code - * returned by the underlying usb_control_msg() call. + * Returns: a pointer to a dynamically allocated usb_device_descriptor + * structure (which the caller must deallocate), or an ERR_PTR value. */ -int usb_get_device_descriptor(struct usb_device *dev, unsigned int size) +struct usb_device_descriptor *usb_get_device_descriptor(struct usb_device *udev) { struct usb_device_descriptor *desc; int ret; - if (size > sizeof(*desc)) - return -EINVAL; desc = kmalloc(sizeof(*desc), GFP_NOIO); if (!desc) - return -ENOMEM; + return ERR_PTR(-ENOMEM); + + ret = usb_get_descriptor(udev, USB_DT_DEVICE, 0, desc, sizeof(*desc)); + if (ret == sizeof(*desc)) + return desc; - ret = usb_get_descriptor(dev, USB_DT_DEVICE, 0, desc, size); if (ret >= 0) - memcpy(&dev->descriptor, desc, size); + ret = -EMSGSIZE; kfree(desc); - return ret; + return ERR_PTR(ret); } /* diff --git a/drivers/usb/core/of.c b/drivers/usb/core/of.c index 617e92569b2c..db4ccf9ce3d9 100644 --- a/drivers/usb/core/of.c +++ b/drivers/usb/core/of.c @@ -8,7 +8,6 @@ */ #include -#include #include /** diff --git a/drivers/usb/core/sysfs.c b/drivers/usb/core/sysfs.c index 323dc02becbe..5d21718afb05 100644 --- a/drivers/usb/core/sysfs.c +++ b/drivers/usb/core/sysfs.c @@ -161,9 +161,6 @@ static ssize_t speed_show(struct device *dev, struct device_attribute *attr, case USB_SPEED_HIGH: speed = "480"; break; - case USB_SPEED_WIRELESS: - speed = "480"; - break; case USB_SPEED_SUPER: speed = "5000"; break; diff --git a/drivers/usb/core/urb.c b/drivers/usb/core/urb.c index 9f3c54032556..7576920e2d5a 100644 --- a/drivers/usb/core/urb.c +++ b/drivers/usb/core/urb.c @@ -480,8 +480,7 @@ int usb_submit_urb(struct urb *urb, gfp_t mem_flags) urb->iso_frame_desc[n].status = -EXDEV; urb->iso_frame_desc[n].actual_length = 0; } - } else if (urb->num_sgs && !urb->dev->bus->no_sg_constraint && - dev->speed != USB_SPEED_WIRELESS) { + } else if (urb->num_sgs && !urb->dev->bus->no_sg_constraint) { struct scatterlist *sg; int i; @@ -540,17 +539,9 @@ int usb_submit_urb(struct urb *urb, gfp_t mem_flags) case USB_ENDPOINT_XFER_ISOC: case USB_ENDPOINT_XFER_INT: /* too small? */ - switch (dev->speed) { - case USB_SPEED_WIRELESS: - if ((urb->interval < 6) - && (xfertype == USB_ENDPOINT_XFER_INT)) - return -EINVAL; - fallthrough; - default: - if (urb->interval <= 0) - return -EINVAL; - break; - } + if (urb->interval <= 0) + return -EINVAL; + /* too big? */ switch (dev->speed) { case USB_SPEED_SUPER_PLUS: @@ -560,10 +551,6 @@ int usb_submit_urb(struct urb *urb, gfp_t mem_flags) return -EINVAL; max = 1 << 15; break; - case USB_SPEED_WIRELESS: - if (urb->interval > 16) - return -EINVAL; - break; case USB_SPEED_HIGH: /* units are microframes */ /* NOTE usb handles 2^15 */ if (urb->interval > (1024 * 8)) @@ -587,10 +574,8 @@ int usb_submit_urb(struct urb *urb, gfp_t mem_flags) default: return -EINVAL; } - if (dev->speed != USB_SPEED_WIRELESS) { - /* Round down to a power of 2, no more than max */ - urb->interval = min(max, 1 << ilog2(urb->interval)); - } + /* Round down to a power of 2, no more than max */ + urb->interval = min(max, 1 << ilog2(urb->interval)); } return usb_hcd_submit_urb(urb, mem_flags); diff --git a/drivers/usb/core/usb.c b/drivers/usb/core/usb.c index 901ec732321c..2a938cf47ccd 100644 --- a/drivers/usb/core/usb.c +++ b/drivers/usb/core/usb.c @@ -25,6 +25,7 @@ #include #include +#include #include #include #include @@ -601,14 +602,6 @@ struct device_type usb_device_type = { #endif }; - -/* Returns 1 if @usb_bus is WUSB, 0 otherwise */ -static unsigned usb_bus_is_wusb(struct usb_bus *bus) -{ - struct usb_hcd *hcd = bus_to_hcd(bus); - return hcd->wireless; -} - static bool usb_dev_authorized(struct usb_device *dev, struct usb_hcd *hcd) { struct usb_hub *hub; @@ -652,7 +645,6 @@ struct usb_device *usb_alloc_dev(struct usb_device *parent, { struct usb_device *dev; struct usb_hcd *usb_hcd = bus_to_hcd(bus); - unsigned root_hub = 0; unsigned raw_port = port1; dev = kzalloc(sizeof(*dev), GFP_KERNEL); @@ -702,7 +694,6 @@ struct usb_device *usb_alloc_dev(struct usb_device *parent, dev->dev.parent = bus->controller; device_set_of_node_from_dev(&dev->dev, bus->sysdev); dev_set_name(&dev->dev, "usb%d", bus->busnum); - root_hub = 1; } else { /* match any labeling on the hubs; it's one-based */ if (parent->devpath[0] == '0') { @@ -748,9 +739,6 @@ struct usb_device *usb_alloc_dev(struct usb_device *parent, #endif dev->authorized = usb_dev_authorized(dev, usb_hcd); - if (!root_hub) - dev->wusb = usb_bus_is_wusb(bus) ? 1 : 0; - return dev; } EXPORT_SYMBOL_GPL(usb_alloc_dev); @@ -1101,6 +1089,9 @@ static int __init usb_init(void) retval = usb_major_init(); if (retval) goto major_init_failed; + retval = class_register(&usbmisc_class); + if (retval) + goto class_register_failed; retval = usb_register(&usbfs_driver); if (retval) goto driver_register_failed; @@ -1120,6 +1111,8 @@ hub_init_failed: usb_devio_init_failed: usb_deregister(&usbfs_driver); driver_register_failed: + class_unregister(&usbmisc_class); +class_register_failed: usb_major_cleanup(); major_init_failed: bus_unregister_notifier(&usb_bus_type, &usb_bus_nb); @@ -1147,6 +1140,7 @@ static void __exit usb_exit(void) usb_deregister(&usbfs_driver); usb_devio_cleanup(); usb_hub_cleanup(); + class_unregister(&usbmisc_class); bus_unregister_notifier(&usb_bus_type, &usb_bus_nb); bus_unregister(&usb_bus_type); usb_acpi_unregister(); diff --git a/drivers/usb/core/usb.h b/drivers/usb/core/usb.h index ffe3f6818e9c..60363153fc3f 100644 --- a/drivers/usb/core/usb.h +++ b/drivers/usb/core/usb.h @@ -43,8 +43,8 @@ extern bool usb_endpoint_is_ignored(struct usb_device *udev, struct usb_endpoint_descriptor *epd); extern int usb_remove_device(struct usb_device *udev); -extern int usb_get_device_descriptor(struct usb_device *dev, - unsigned int size); +extern struct usb_device_descriptor *usb_get_device_descriptor( + struct usb_device *udev); extern int usb_set_isoch_delay(struct usb_device *dev); extern int usb_get_bos_descriptor(struct usb_device *dev); extern void usb_release_bos_descriptor(struct usb_device *dev); @@ -141,6 +141,7 @@ static inline int usb_disable_usb2_hardware_lpm(struct usb_device *udev) #endif +extern const struct class usbmisc_class; extern const struct bus_type usb_bus_type; extern struct mutex usb_port_peer_mutex; extern struct device_type usb_device_type; diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h index 0bb4c0c845bf..c92a1da46a01 100644 --- a/drivers/usb/dwc2/core.h +++ b/drivers/usb/dwc2/core.h @@ -1330,6 +1330,7 @@ irqreturn_t dwc2_handle_common_intr(int irq, void *dev); /* The device ID match table */ extern const struct of_device_id dwc2_of_match_table[]; extern const struct acpi_device_id dwc2_acpi_match[]; +extern const struct pci_device_id dwc2_pci_ids[]; int dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg); int dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg); diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c index 8b15742d9e8a..b517a7216de2 100644 --- a/drivers/usb/dwc2/gadget.c +++ b/drivers/usb/dwc2/gadget.c @@ -22,7 +22,6 @@ #include #include #include -#include #include #include diff --git a/drivers/usb/dwc2/hcd_intr.c b/drivers/usb/dwc2/hcd_intr.c index c9740caa5974..0144ca8350c3 100644 --- a/drivers/usb/dwc2/hcd_intr.c +++ b/drivers/usb/dwc2/hcd_intr.c @@ -2203,11 +2203,13 @@ static void dwc2_hc_intr(struct dwc2_hsotg *hsotg) irqreturn_t dwc2_handle_hcd_intr(struct dwc2_hsotg *hsotg) { u32 gintsts, dbg_gintsts; - irqreturn_t retval = IRQ_NONE; + irqreturn_t retval = IRQ_HANDLED; if (!dwc2_is_controller_alive(hsotg)) { dev_warn(hsotg->dev, "Controller is dead\n"); return retval; + } else { + retval = IRQ_NONE; } spin_lock(&hsotg->lock); diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c index 4c7c3dd15f9b..93f52e371cdd 100644 --- a/drivers/usb/dwc2/params.c +++ b/drivers/usb/dwc2/params.c @@ -7,9 +7,14 @@ #include #include #include +#include +#include #include "core.h" +#define PCI_PRODUCT_ID_HAPS_HSOTG 0xabc0 +#define PCI_DEVICE_ID_LOONGSON_DWC2 0x7a04 + static void dwc2_set_bcm_params(struct dwc2_hsotg *hsotg) { struct dwc2_core_params *p = &hsotg->params; @@ -55,6 +60,14 @@ static void dwc2_set_jz4775_params(struct dwc2_hsotg *hsotg) !device_property_read_bool(hsotg->dev, "disable-over-current"); } +static void dwc2_set_loongson_params(struct dwc2_hsotg *hsotg) +{ + struct dwc2_core_params *p = &hsotg->params; + + p->phy_utmi_width = 8; + p->power_down = DWC2_POWER_DOWN_PARAM_PARTIAL; +} + static void dwc2_set_x1600_params(struct dwc2_hsotg *hsotg) { struct dwc2_core_params *p = &hsotg->params; @@ -302,6 +315,23 @@ const struct acpi_device_id dwc2_acpi_match[] = { }; MODULE_DEVICE_TABLE(acpi, dwc2_acpi_match); +const struct pci_device_id dwc2_pci_ids[] = { + { + PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS, PCI_PRODUCT_ID_HAPS_HSOTG), + }, + { + PCI_DEVICE(PCI_VENDOR_ID_STMICRO, + PCI_DEVICE_ID_STMICRO_USB_OTG), + }, + { + PCI_DEVICE(PCI_VENDOR_ID_LOONGSON, PCI_DEVICE_ID_LOONGSON_DWC2), + .driver_data = (unsigned long)dwc2_set_loongson_params, + }, + { /* end: all zeroes */ } +}; +MODULE_DEVICE_TABLE(pci, dwc2_pci_ids); +EXPORT_SYMBOL_GPL(dwc2_pci_ids); + static void dwc2_set_param_otg_cap(struct dwc2_hsotg *hsotg) { switch (hsotg->hw_params.op_mode) { @@ -948,13 +978,20 @@ int dwc2_init_params(struct dwc2_hsotg *hsotg) if (match && match->data) { set_params = match->data; set_params(hsotg); - } else { + } else if (!match) { const struct acpi_device_id *amatch; + const struct pci_device_id *pmatch = NULL; amatch = acpi_match_device(dwc2_acpi_match, hsotg->dev); if (amatch && amatch->driver_data) { set_params = (set_params_cb)amatch->driver_data; set_params(hsotg); + } else if (!amatch) + pmatch = pci_match_id(dwc2_pci_ids, to_pci_dev(hsotg->dev->parent)); + + if (pmatch && pmatch->driver_data) { + set_params = (set_params_cb)pmatch->driver_data; + set_params(hsotg); } } diff --git a/drivers/usb/dwc2/pci.c b/drivers/usb/dwc2/pci.c index b7306ed8be4c..f3a1e4232a31 100644 --- a/drivers/usb/dwc2/pci.c +++ b/drivers/usb/dwc2/pci.c @@ -24,7 +24,7 @@ #include #include -#define PCI_PRODUCT_ID_HAPS_HSOTG 0xabc0 +#include "core.h" static const char dwc2_driver_name[] = "dwc2-pci"; @@ -122,18 +122,6 @@ err: return ret; } -static const struct pci_device_id dwc2_pci_ids[] = { - { - PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS, PCI_PRODUCT_ID_HAPS_HSOTG), - }, - { - PCI_DEVICE(PCI_VENDOR_ID_STMICRO, - PCI_DEVICE_ID_STMICRO_USB_OTG), - }, - { /* end: all zeroes */ } -}; -MODULE_DEVICE_TABLE(pci, dwc2_pci_ids); - static struct pci_driver dwc2_pci_driver = { .name = dwc2_driver_name, .id_table = dwc2_pci_ids, diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c index 0a806f80217e..b1d48019e944 100644 --- a/drivers/usb/dwc2/platform.c +++ b/drivers/usb/dwc2/platform.c @@ -11,7 +11,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig index be954a9abbe0..98efcbb76c88 100644 --- a/drivers/usb/dwc3/Kconfig +++ b/drivers/usb/dwc3/Kconfig @@ -168,4 +168,14 @@ config USB_DWC3_AM62 The Designware Core USB3 IP is programmed to operate in in USB 2.0 mode only. Say 'Y' or 'M' here if you have one such device + +config USB_DWC3_OCTEON + tristate "Cavium Octeon Platforms" + depends on CAVIUM_OCTEON_SOC || COMPILE_TEST + default USB_DWC3 + help + Support Cavium Octeon platforms with DesignWare Core USB3 IP. + Only the host mode is currently supported. + Say 'Y' or 'M' here if you have one such device. + endif diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile index 9f66bd82b639..fe1493d4bbe5 100644 --- a/drivers/usb/dwc3/Makefile +++ b/drivers/usb/dwc3/Makefile @@ -54,3 +54,4 @@ obj-$(CONFIG_USB_DWC3_ST) += dwc3-st.o obj-$(CONFIG_USB_DWC3_QCOM) += dwc3-qcom.o obj-$(CONFIG_USB_DWC3_IMX8MP) += dwc3-imx8mp.o obj-$(CONFIG_USB_DWC3_XILINX) += dwc3-xilinx.o +obj-$(CONFIG_USB_DWC3_OCTEON) += dwc3-octeon.o diff --git a/drivers/usb/dwc3/dwc3-am62.c b/drivers/usb/dwc3/dwc3-am62.c index 1755f2f848c5..90a587bc29b7 100644 --- a/drivers/usb/dwc3/dwc3-am62.c +++ b/drivers/usb/dwc3/dwc3-am62.c @@ -102,7 +102,7 @@ #define DWC3_AM62_AUTOSUSPEND_DELAY 100 -struct dwc3_data { +struct dwc3_am62 { struct device *dev; void __iomem *usbss; struct clk *usb2_refclk; @@ -129,19 +129,19 @@ static const int dwc3_ti_rate_table[] = { /* in KHZ */ 52000, }; -static inline u32 dwc3_ti_readl(struct dwc3_data *data, u32 offset) +static inline u32 dwc3_ti_readl(struct dwc3_am62 *am62, u32 offset) { - return readl((data->usbss) + offset); + return readl((am62->usbss) + offset); } -static inline void dwc3_ti_writel(struct dwc3_data *data, u32 offset, u32 value) +static inline void dwc3_ti_writel(struct dwc3_am62 *am62, u32 offset, u32 value) { - writel(value, (data->usbss) + offset); + writel(value, (am62->usbss) + offset); } -static int phy_syscon_pll_refclk(struct dwc3_data *data) +static int phy_syscon_pll_refclk(struct dwc3_am62 *am62) { - struct device *dev = data->dev; + struct device *dev = am62->dev; struct device_node *node = dev->of_node; struct of_phandle_args args; struct regmap *syscon; @@ -153,16 +153,16 @@ static int phy_syscon_pll_refclk(struct dwc3_data *data) return PTR_ERR(syscon); } - data->syscon = syscon; + am62->syscon = syscon; ret = of_parse_phandle_with_fixed_args(node, "ti,syscon-phy-pll-refclk", 1, 0, &args); if (ret) return ret; - data->offset = args.args[0]; + am62->offset = args.args[0]; - ret = regmap_update_bits(data->syscon, data->offset, PHY_PLL_REFCLK_MASK, data->rate_code); + ret = regmap_update_bits(am62->syscon, am62->offset, PHY_PLL_REFCLK_MASK, am62->rate_code); if (ret) { dev_err(dev, "failed to set phy pll reference clock rate\n"); return ret; @@ -175,32 +175,32 @@ static int dwc3_ti_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct device_node *node = pdev->dev.of_node; - struct dwc3_data *data; + struct dwc3_am62 *am62; int i, ret; unsigned long rate; u32 reg; - data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); - if (!data) + am62 = devm_kzalloc(dev, sizeof(*am62), GFP_KERNEL); + if (!am62) return -ENOMEM; - data->dev = dev; - platform_set_drvdata(pdev, data); + am62->dev = dev; + platform_set_drvdata(pdev, am62); - data->usbss = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(data->usbss)) { + am62->usbss = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(am62->usbss)) { dev_err(dev, "can't map IOMEM resource\n"); - return PTR_ERR(data->usbss); + return PTR_ERR(am62->usbss); } - data->usb2_refclk = devm_clk_get(dev, "ref"); - if (IS_ERR(data->usb2_refclk)) { + am62->usb2_refclk = devm_clk_get(dev, "ref"); + if (IS_ERR(am62->usb2_refclk)) { dev_err(dev, "can't get usb2_refclk\n"); - return PTR_ERR(data->usb2_refclk); + return PTR_ERR(am62->usb2_refclk); } /* Calculate the rate code */ - rate = clk_get_rate(data->usb2_refclk); + rate = clk_get_rate(am62->usb2_refclk); rate /= 1000; // To KHz for (i = 0; i < ARRAY_SIZE(dwc3_ti_rate_table); i++) { if (dwc3_ti_rate_table[i] == rate) @@ -212,20 +212,20 @@ static int dwc3_ti_probe(struct platform_device *pdev) return -EINVAL; } - data->rate_code = i; + am62->rate_code = i; /* Read the syscon property and set the rate code */ - ret = phy_syscon_pll_refclk(data); + ret = phy_syscon_pll_refclk(am62); if (ret) return ret; /* VBUS divider select */ - data->vbus_divider = device_property_read_bool(dev, "ti,vbus-divider"); - reg = dwc3_ti_readl(data, USBSS_PHY_CONFIG); - if (data->vbus_divider) + am62->vbus_divider = device_property_read_bool(dev, "ti,vbus-divider"); + reg = dwc3_ti_readl(am62, USBSS_PHY_CONFIG); + if (am62->vbus_divider) reg |= 1 << USBSS_PHY_VBUS_SEL_SHIFT; - dwc3_ti_writel(data, USBSS_PHY_CONFIG, reg); + dwc3_ti_writel(am62, USBSS_PHY_CONFIG, reg); pm_runtime_set_active(dev); pm_runtime_enable(dev); @@ -233,7 +233,7 @@ static int dwc3_ti_probe(struct platform_device *pdev) * Don't ignore its dependencies with its children */ pm_suspend_ignore_children(dev, false); - clk_prepare_enable(data->usb2_refclk); + clk_prepare_enable(am62->usb2_refclk); pm_runtime_get_noresume(dev); ret = of_platform_populate(node, NULL, NULL, dev); @@ -243,9 +243,9 @@ static int dwc3_ti_probe(struct platform_device *pdev) } /* Set mode valid bit to indicate role is valid */ - reg = dwc3_ti_readl(data, USBSS_MODE_CONTROL); + reg = dwc3_ti_readl(am62, USBSS_MODE_CONTROL); reg |= USBSS_MODE_VALID; - dwc3_ti_writel(data, USBSS_MODE_CONTROL, reg); + dwc3_ti_writel(am62, USBSS_MODE_CONTROL, reg); /* Device has capability to wakeup system from sleep */ device_set_wakeup_capable(dev, true); @@ -261,7 +261,7 @@ static int dwc3_ti_probe(struct platform_device *pdev) return 0; err_pm_disable: - clk_disable_unprepare(data->usb2_refclk); + clk_disable_unprepare(am62->usb2_refclk); pm_runtime_disable(dev); pm_runtime_set_suspended(dev); return ret; @@ -278,36 +278,34 @@ static int dwc3_ti_remove_core(struct device *dev, void *c) static void dwc3_ti_remove(struct platform_device *pdev) { struct device *dev = &pdev->dev; - struct dwc3_data *data = platform_get_drvdata(pdev); + struct dwc3_am62 *am62 = platform_get_drvdata(pdev); u32 reg; device_for_each_child(dev, NULL, dwc3_ti_remove_core); /* Clear mode valid bit */ - reg = dwc3_ti_readl(data, USBSS_MODE_CONTROL); + reg = dwc3_ti_readl(am62, USBSS_MODE_CONTROL); reg &= ~USBSS_MODE_VALID; - dwc3_ti_writel(data, USBSS_MODE_CONTROL, reg); + dwc3_ti_writel(am62, USBSS_MODE_CONTROL, reg); pm_runtime_put_sync(dev); - clk_disable_unprepare(data->usb2_refclk); + clk_disable_unprepare(am62->usb2_refclk); pm_runtime_disable(dev); pm_runtime_set_suspended(dev); - - platform_set_drvdata(pdev, NULL); } #ifdef CONFIG_PM static int dwc3_ti_suspend_common(struct device *dev) { - struct dwc3_data *data = dev_get_drvdata(dev); + struct dwc3_am62 *am62 = dev_get_drvdata(dev); u32 reg, current_prtcap_dir; if (device_may_wakeup(dev)) { - reg = dwc3_ti_readl(data, USBSS_CORE_STAT); + reg = dwc3_ti_readl(am62, USBSS_CORE_STAT); current_prtcap_dir = (reg & USBSS_CORE_OPERATIONAL_MODE_MASK) >> USBSS_CORE_OPERATIONAL_MODE_SHIFT; /* Set wakeup config enable bits */ - reg = dwc3_ti_readl(data, USBSS_WAKEUP_CONFIG); + reg = dwc3_ti_readl(am62, USBSS_WAKEUP_CONFIG); if (current_prtcap_dir == DWC3_GCTL_PRTCAP_HOST) { reg = USBSS_WAKEUP_CFG_LINESTATE_EN | USBSS_WAKEUP_CFG_OVERCURRENT_EN; } else { @@ -317,30 +315,30 @@ static int dwc3_ti_suspend_common(struct device *dev) * and in U2/L3 state else it causes spurious wake-up. */ } - dwc3_ti_writel(data, USBSS_WAKEUP_CONFIG, reg); + dwc3_ti_writel(am62, USBSS_WAKEUP_CONFIG, reg); /* clear wakeup status so we know what caused the wake up */ - dwc3_ti_writel(data, USBSS_WAKEUP_STAT, USBSS_WAKEUP_STAT_CLR); + dwc3_ti_writel(am62, USBSS_WAKEUP_STAT, USBSS_WAKEUP_STAT_CLR); } - clk_disable_unprepare(data->usb2_refclk); + clk_disable_unprepare(am62->usb2_refclk); return 0; } static int dwc3_ti_resume_common(struct device *dev) { - struct dwc3_data *data = dev_get_drvdata(dev); + struct dwc3_am62 *am62 = dev_get_drvdata(dev); u32 reg; - clk_prepare_enable(data->usb2_refclk); + clk_prepare_enable(am62->usb2_refclk); if (device_may_wakeup(dev)) { /* Clear wakeup config enable bits */ - dwc3_ti_writel(data, USBSS_WAKEUP_CONFIG, USBSS_WAKEUP_CFG_NONE); + dwc3_ti_writel(am62, USBSS_WAKEUP_CONFIG, USBSS_WAKEUP_CFG_NONE); } - reg = dwc3_ti_readl(data, USBSS_WAKEUP_STAT); - data->wakeup_stat = reg; + reg = dwc3_ti_readl(am62, USBSS_WAKEUP_STAT); + am62->wakeup_stat = reg; return 0; } diff --git a/drivers/usb/dwc3/dwc3-exynos.c b/drivers/usb/dwc3/dwc3-exynos.c index f882dd647340..5d365ca51771 100644 --- a/drivers/usb/dwc3/dwc3-exynos.c +++ b/drivers/usb/dwc3/dwc3-exynos.c @@ -163,6 +163,12 @@ static const struct dwc3_exynos_driverdata exynos7_drvdata = { .suspend_clk_idx = 1, }; +static const struct dwc3_exynos_driverdata exynos850_drvdata = { + .clk_names = { "bus_early", "ref" }, + .num_clks = 2, + .suspend_clk_idx = -1, +}; + static const struct of_device_id exynos_dwc3_match[] = { { .compatible = "samsung,exynos5250-dwusb3", @@ -173,6 +179,9 @@ static const struct of_device_id exynos_dwc3_match[] = { }, { .compatible = "samsung,exynos7-dwusb3", .data = &exynos7_drvdata, + }, { + .compatible = "samsung,exynos850-dwusb3", + .data = &exynos850_drvdata, }, { } }; diff --git a/drivers/usb/dwc3/dwc3-imx8mp.c b/drivers/usb/dwc3/dwc3-imx8mp.c index 8b9a3bb587bf..a1e15f2fffdb 100644 --- a/drivers/usb/dwc3/dwc3-imx8mp.c +++ b/drivers/usb/dwc3/dwc3-imx8mp.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -279,7 +280,6 @@ static void dwc3_imx8mp_remove(struct platform_device *pdev) pm_runtime_disable(dev); pm_runtime_put_noidle(dev); - platform_set_drvdata(pdev, NULL); } static int __maybe_unused dwc3_imx8mp_suspend(struct dwc3_imx8mp *dwc3_imx, diff --git a/drivers/usb/dwc3/dwc3-keystone.c b/drivers/usb/dwc3/dwc3-keystone.c index 0a09aedc2573..8899348b6276 100644 --- a/drivers/usb/dwc3/dwc3-keystone.c +++ b/drivers/usb/dwc3/dwc3-keystone.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -196,8 +197,6 @@ static void kdwc3_remove(struct platform_device *pdev) phy_power_off(kdwc->usb3_phy); phy_exit(kdwc->usb3_phy); phy_pm_runtime_put_sync(kdwc->usb3_phy); - - platform_set_drvdata(pdev, NULL); } static const struct of_device_id kdwc3_of_match[] = { diff --git a/drivers/usb/dwc3/dwc3-meson-g12a.c b/drivers/usb/dwc3/dwc3-meson-g12a.c index e99c7489dba0..2c07c038b584 100644 --- a/drivers/usb/dwc3/dwc3-meson-g12a.c +++ b/drivers/usb/dwc3/dwc3-meson-g12a.c @@ -926,6 +926,12 @@ static int __maybe_unused dwc3_meson_g12a_resume(struct device *dev) return ret; } + if (priv->drvdata->usb_post_init) { + ret = priv->drvdata->usb_post_init(priv); + if (ret) + return ret; + } + return 0; } diff --git a/arch/mips/cavium-octeon/octeon-usb.c b/drivers/usb/dwc3/dwc3-octeon.c similarity index 61% rename from arch/mips/cavium-octeon/octeon-usb.c rename to drivers/usb/dwc3/dwc3-octeon.c index 2add435ad038..ff01f2c17452 100644 --- a/arch/mips/cavium-octeon/octeon-usb.c +++ b/drivers/usb/dwc3/dwc3-octeon.c @@ -1,11 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0 /* - * XHCI HCD glue for Cavium Octeon III SOCs. + * DWC3 glue for Cavium Octeon III SOCs. * * Copyright (C) 2010-2017 Cavium Networks - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. + * Copyright (C) 2023 RACOM s.r.o. */ #include @@ -24,9 +22,9 @@ /* BIST fast-clear mode select. A BIST run with this bit set * clears all entries in USBH RAMs to 0x0. */ -# define USBDRD_UCTL_CTL_CLEAR_BIST BIT(63) +# define USBDRD_UCTL_CTL_CLEAR_BIST BIT_ULL(63) /* 1 = Start BIST and cleared by hardware */ -# define USBDRD_UCTL_CTL_START_BIST BIT(62) +# define USBDRD_UCTL_CTL_START_BIST BIT_ULL(62) /* Reference clock select for SuperSpeed and HighSpeed PLLs: * 0x0 = Both PLLs use DLMC_REF_CLK0 for reference clock * 0x1 = Both PLLs use DLMC_REF_CLK1 for reference clock @@ -35,32 +33,32 @@ * 0x3 = SuperSpeed PLL uses DLMC_REF_CLK1 for reference clock & * HighSpeed PLL uses PLL_REF_CLK for reference clck */ -# define USBDRD_UCTL_CTL_REF_CLK_SEL GENMASK(61, 60) +# define USBDRD_UCTL_CTL_REF_CLK_SEL GENMASK_ULL(61, 60) /* 1 = Spread-spectrum clock enable, 0 = SS clock disable */ -# define USBDRD_UCTL_CTL_SSC_EN BIT(59) +# define USBDRD_UCTL_CTL_SSC_EN BIT_ULL(59) /* Spread-spectrum clock modulation range: * 0x0 = -4980 ppm downspread * 0x1 = -4492 ppm downspread * 0x2 = -4003 ppm downspread * 0x3 - 0x7 = Reserved */ -# define USBDRD_UCTL_CTL_SSC_RANGE GENMASK(58, 56) +# define USBDRD_UCTL_CTL_SSC_RANGE GENMASK_ULL(58, 56) /* Enable non-standard oscillator frequencies: * [55:53] = modules -1 * [52:47] = 2's complement push amount, 0 = Feature disabled */ -# define USBDRD_UCTL_CTL_SSC_REF_CLK_SEL GENMASK(55, 47) +# define USBDRD_UCTL_CTL_SSC_REF_CLK_SEL GENMASK_ULL(55, 47) /* Reference clock multiplier for non-standard frequencies: * 0x19 = 100MHz on DLMC_REF_CLK* if REF_CLK_SEL = 0x0 or 0x1 * 0x28 = 125MHz on DLMC_REF_CLK* if REF_CLK_SEL = 0x0 or 0x1 * 0x32 = 50MHz on DLMC_REF_CLK* if REF_CLK_SEL = 0x0 or 0x1 * Other Values = Reserved */ -# define USBDRD_UCTL_CTL_MPLL_MULTIPLIER GENMASK(46, 40) +# define USBDRD_UCTL_CTL_MPLL_MULTIPLIER GENMASK_ULL(46, 40) /* Enable reference clock to prescaler for SuperSpeed functionality. * Should always be set to "1" */ -# define USBDRD_UCTL_CTL_REF_SSP_EN BIT(39) +# define USBDRD_UCTL_CTL_REF_SSP_EN BIT_ULL(39) /* Divide the reference clock by 2 before entering the * REF_CLK_FSEL divider: * If REF_CLK_SEL = 0x0 or 0x1, then only 0x0 is legal @@ -68,21 +66,21 @@ * 0x1 = DLMC_REF_CLK* is 125MHz * 0x0 = DLMC_REF_CLK* is another supported frequency */ -# define USBDRD_UCTL_CTL_REF_CLK_DIV2 BIT(38) +# define USBDRD_UCTL_CTL_REF_CLK_DIV2 BIT_ULL(38) /* Select reference clock freqnuency for both PLL blocks: * 0x27 = REF_CLK_SEL is 0x0 or 0x1 * 0x07 = REF_CLK_SEL is 0x2 or 0x3 */ -# define USBDRD_UCTL_CTL_REF_CLK_FSEL GENMASK(37, 32) +# define USBDRD_UCTL_CTL_REF_CLK_FSEL GENMASK_ULL(37, 32) /* Controller clock enable. */ -# define USBDRD_UCTL_CTL_H_CLK_EN BIT(30) +# define USBDRD_UCTL_CTL_H_CLK_EN BIT_ULL(30) /* Select bypass input to controller clock divider: * 0x0 = Use divided coprocessor clock from H_CLKDIV * 0x1 = Use clock from GPIO pins */ -# define USBDRD_UCTL_CTL_H_CLK_BYP_SEL BIT(29) +# define USBDRD_UCTL_CTL_H_CLK_BYP_SEL BIT_ULL(29) /* Reset controller clock divider. */ -# define USBDRD_UCTL_CTL_H_CLKDIV_RST BIT(28) +# define USBDRD_UCTL_CTL_H_CLKDIV_RST BIT_ULL(28) /* Clock divider select: * 0x0 = divide by 1 * 0x1 = divide by 2 @@ -93,29 +91,29 @@ * 0x6 = divide by 24 * 0x7 = divide by 32 */ -# define USBDRD_UCTL_CTL_H_CLKDIV_SEL GENMASK(26, 24) +# define USBDRD_UCTL_CTL_H_CLKDIV_SEL GENMASK_ULL(26, 24) /* USB3 port permanently attached: 0x0 = No, 0x1 = Yes */ -# define USBDRD_UCTL_CTL_USB3_PORT_PERM_ATTACH BIT(21) +# define USBDRD_UCTL_CTL_USB3_PORT_PERM_ATTACH BIT_ULL(21) /* USB2 port permanently attached: 0x0 = No, 0x1 = Yes */ -# define USBDRD_UCTL_CTL_USB2_PORT_PERM_ATTACH BIT(20) +# define USBDRD_UCTL_CTL_USB2_PORT_PERM_ATTACH BIT_ULL(20) /* Disable SuperSpeed PHY: 0x0 = No, 0x1 = Yes */ -# define USBDRD_UCTL_CTL_USB3_PORT_DISABLE BIT(18) +# define USBDRD_UCTL_CTL_USB3_PORT_DISABLE BIT_ULL(18) /* Disable HighSpeed PHY: 0x0 = No, 0x1 = Yes */ -# define USBDRD_UCTL_CTL_USB2_PORT_DISABLE BIT(16) +# define USBDRD_UCTL_CTL_USB2_PORT_DISABLE BIT_ULL(16) /* Enable PHY SuperSpeed block power: 0x0 = No, 0x1 = Yes */ -# define USBDRD_UCTL_CTL_SS_POWER_EN BIT(14) +# define USBDRD_UCTL_CTL_SS_POWER_EN BIT_ULL(14) /* Enable PHY HighSpeed block power: 0x0 = No, 0x1 = Yes */ -# define USBDRD_UCTL_CTL_HS_POWER_EN BIT(12) +# define USBDRD_UCTL_CTL_HS_POWER_EN BIT_ULL(12) /* Enable USB UCTL interface clock: 0xx = No, 0x1 = Yes */ -# define USBDRD_UCTL_CTL_CSCLK_EN BIT(4) +# define USBDRD_UCTL_CTL_CSCLK_EN BIT_ULL(4) /* Controller mode: 0x0 = Host, 0x1 = Device */ -# define USBDRD_UCTL_CTL_DRD_MODE BIT(3) +# define USBDRD_UCTL_CTL_DRD_MODE BIT_ULL(3) /* PHY reset */ -# define USBDRD_UCTL_CTL_UPHY_RST BIT(2) +# define USBDRD_UCTL_CTL_UPHY_RST BIT_ULL(2) /* Software reset UAHC */ -# define USBDRD_UCTL_CTL_UAHC_RST BIT(1) +# define USBDRD_UCTL_CTL_UAHC_RST BIT_ULL(1) /* Software resets UCTL */ -# define USBDRD_UCTL_CTL_UCTL_RST BIT(0) +# define USBDRD_UCTL_CTL_UCTL_RST BIT_ULL(0) #define USBDRD_UCTL_BIST_STATUS 0x08 #define USBDRD_UCTL_SPARE0 0x10 @@ -130,64 +128,69 @@ */ #define USBDRD_UCTL_HOST_CFG 0xe0 /* Indicates minimum value of all received BELT values */ -# define USBDRD_UCTL_HOST_CFG_HOST_CURRENT_BELT GENMASK(59, 48) +# define USBDRD_UCTL_HOST_CFG_HOST_CURRENT_BELT GENMASK_ULL(59, 48) /* HS jitter adjustment */ -# define USBDRD_UCTL_HOST_CFG_FLA GENMASK(37, 32) +# define USBDRD_UCTL_HOST_CFG_FLA GENMASK_ULL(37, 32) /* Bus-master enable: 0x0 = Disabled (stall DMAs), 0x1 = enabled */ -# define USBDRD_UCTL_HOST_CFG_BME BIT(28) +# define USBDRD_UCTL_HOST_CFG_BME BIT_ULL(28) /* Overcurrent protection enable: 0x0 = unavailable, 0x1 = available */ -# define USBDRD_UCTL_HOST_OCI_EN BIT(27) +# define USBDRD_UCTL_HOST_OCI_EN BIT_ULL(27) /* Overcurrent sene selection: * 0x0 = Overcurrent indication from off-chip is active-low * 0x1 = Overcurrent indication from off-chip is active-high */ -# define USBDRD_UCTL_HOST_OCI_ACTIVE_HIGH_EN BIT(26) +# define USBDRD_UCTL_HOST_OCI_ACTIVE_HIGH_EN BIT_ULL(26) /* Port power control enable: 0x0 = unavailable, 0x1 = available */ -# define USBDRD_UCTL_HOST_PPC_EN BIT(25) +# define USBDRD_UCTL_HOST_PPC_EN BIT_ULL(25) /* Port power control sense selection: * 0x0 = Port power to off-chip is active-low * 0x1 = Port power to off-chip is active-high */ -# define USBDRD_UCTL_HOST_PPC_ACTIVE_HIGH_EN BIT(24) +# define USBDRD_UCTL_HOST_PPC_ACTIVE_HIGH_EN BIT_ULL(24) /* * UCTL Shim Features Register */ #define USBDRD_UCTL_SHIM_CFG 0xe8 /* Out-of-bound UAHC register access: 0 = read, 1 = write */ -# define USBDRD_UCTL_SHIM_CFG_XS_NCB_OOB_WRN BIT(63) +# define USBDRD_UCTL_SHIM_CFG_XS_NCB_OOB_WRN BIT_ULL(63) /* SRCID error log for out-of-bound UAHC register access: * [59:58] = chipID * [57] = Request source: 0 = core, 1 = NCB-device * [56:51] = Core/NCB-device number, [56] always 0 for NCB devices * [50:48] = SubID */ -# define USBDRD_UCTL_SHIM_CFG_XS_NCB_OOB_OSRC GENMASK(59, 48) +# define USBDRD_UCTL_SHIM_CFG_XS_NCB_OOB_OSRC GENMASK_ULL(59, 48) /* Error log for bad UAHC DMA access: 0 = Read log, 1 = Write log */ -# define USBDRD_UCTL_SHIM_CFG_XM_BAD_DMA_WRN BIT(47) +# define USBDRD_UCTL_SHIM_CFG_XM_BAD_DMA_WRN BIT_ULL(47) /* Encoded error type for bad UAHC DMA */ -# define USBDRD_UCTL_SHIM_CFG_XM_BAD_DMA_TYPE GENMASK(43, 40) +# define USBDRD_UCTL_SHIM_CFG_XM_BAD_DMA_TYPE GENMASK_ULL(43, 40) /* Select the IOI read command used by DMA accesses */ -# define USBDRD_UCTL_SHIM_CFG_DMA_READ_CMD BIT(12) +# define USBDRD_UCTL_SHIM_CFG_DMA_READ_CMD BIT_ULL(12) /* Select endian format for DMA accesses to the L2C: * 0x0 = Little endian * 0x1 = Big endian * 0x2 = Reserved * 0x3 = Reserved */ -# define USBDRD_UCTL_SHIM_CFG_DMA_ENDIAN_MODE GENMASK(9, 8) +# define USBDRD_UCTL_SHIM_CFG_DMA_ENDIAN_MODE GENMASK_ULL(9, 8) /* Select endian format for IOI CSR access to UAHC: * 0x0 = Little endian * 0x1 = Big endian * 0x2 = Reserved * 0x3 = Reserved */ -# define USBDRD_UCTL_SHIM_CFG_CSR_ENDIAN_MODE GENMASK(1, 0) +# define USBDRD_UCTL_SHIM_CFG_CSR_ENDIAN_MODE GENMASK_ULL(1, 0) #define USBDRD_UCTL_ECC 0xf0 #define USBDRD_UCTL_SPARE1 0xf8 -static DEFINE_MUTEX(dwc3_octeon_clocks_mutex); +struct dwc3_octeon { + struct device *dev; + void __iomem *base; +}; + +#define DWC3_GPIO_POWER_NONE (-1) #ifdef CONFIG_CAVIUM_OCTEON_SOC #include @@ -233,6 +236,11 @@ static inline uint64_t dwc3_octeon_readq(void __iomem *addr) static inline void dwc3_octeon_writeq(void __iomem *base, uint64_t val) { } static inline void dwc3_octeon_config_gpio(int index, int gpio) { } + +static uint64_t octeon_get_io_clock_rate(void) +{ + return 150000000; +} #endif static int dwc3_octeon_get_divider(void) @@ -243,115 +251,22 @@ static int dwc3_octeon_get_divider(void) while (div < ARRAY_SIZE(clk_div)) { uint64_t rate = octeon_get_io_clock_rate() / clk_div[div]; if (rate <= 300000000 && rate >= 150000000) - break; + return div; div++; } - return div; + return -EINVAL; } -static int dwc3_octeon_config_power(struct device *dev, void __iomem *base) +static int dwc3_octeon_setup(struct dwc3_octeon *octeon, + int ref_clk_sel, int ref_clk_fsel, int mpll_mul, + int power_gpio, int power_active_low) { - uint32_t gpio_pwr[3]; - int gpio, len, power_active_low; - struct device_node *node = dev->of_node; u64 val; - void __iomem *uctl_host_cfg_reg = base + USBDRD_UCTL_HOST_CFG; - - if (of_find_property(node, "power", &len) != NULL) { - if (len == 12) { - of_property_read_u32_array(node, "power", gpio_pwr, 3); - power_active_low = gpio_pwr[2] & 0x01; - gpio = gpio_pwr[1]; - } else if (len == 8) { - of_property_read_u32_array(node, "power", gpio_pwr, 2); - power_active_low = 0; - gpio = gpio_pwr[1]; - } else { - dev_err(dev, "invalid power configuration\n"); - return -EINVAL; - } - dwc3_octeon_config_gpio(((u64)base >> 24) & 1, gpio); - - /* Enable XHCI power control and set if active high or low. */ - val = dwc3_octeon_readq(uctl_host_cfg_reg); - val |= USBDRD_UCTL_HOST_PPC_EN; - if (power_active_low) - val &= ~USBDRD_UCTL_HOST_PPC_ACTIVE_HIGH_EN; - else - val |= USBDRD_UCTL_HOST_PPC_ACTIVE_HIGH_EN; - dwc3_octeon_writeq(uctl_host_cfg_reg, val); - } else { - /* Disable XHCI power control and set if active high. */ - val = dwc3_octeon_readq(uctl_host_cfg_reg); - val &= ~USBDRD_UCTL_HOST_PPC_EN; - val &= ~USBDRD_UCTL_HOST_PPC_ACTIVE_HIGH_EN; - dwc3_octeon_writeq(uctl_host_cfg_reg, val); - dev_info(dev, "power control disabled\n"); - } - return 0; -} - -static int dwc3_octeon_clocks_start(struct device *dev, void __iomem *base) -{ - int i, div, mpll_mul, ref_clk_fsel, ref_clk_sel = 2; - u32 clock_rate; - u64 val; - void __iomem *uctl_ctl_reg = base + USBDRD_UCTL_CTL; - - if (dev->of_node) { - const char *ss_clock_type; - const char *hs_clock_type; - - i = of_property_read_u32(dev->of_node, - "refclk-frequency", &clock_rate); - if (i) { - dev_err(dev, "No UCTL \"refclk-frequency\"\n"); - return -EINVAL; - } - i = of_property_read_string(dev->of_node, - "refclk-type-ss", &ss_clock_type); - if (i) { - dev_err(dev, "No UCTL \"refclk-type-ss\"\n"); - return -EINVAL; - } - i = of_property_read_string(dev->of_node, - "refclk-type-hs", &hs_clock_type); - if (i) { - dev_err(dev, "No UCTL \"refclk-type-hs\"\n"); - return -EINVAL; - } - if (strcmp("dlmc_ref_clk0", ss_clock_type) == 0) { - if (strcmp(hs_clock_type, "dlmc_ref_clk0") == 0) - ref_clk_sel = 0; - else if (strcmp(hs_clock_type, "pll_ref_clk") == 0) - ref_clk_sel = 2; - else - dev_warn(dev, "Invalid HS clock type %s, using pll_ref_clk instead\n", - hs_clock_type); - } else if (strcmp(ss_clock_type, "dlmc_ref_clk1") == 0) { - if (strcmp(hs_clock_type, "dlmc_ref_clk1") == 0) - ref_clk_sel = 1; - else if (strcmp(hs_clock_type, "pll_ref_clk") == 0) - ref_clk_sel = 3; - else { - dev_warn(dev, "Invalid HS clock type %s, using pll_ref_clk instead\n", - hs_clock_type); - ref_clk_sel = 3; - } - } else - dev_warn(dev, "Invalid SS clock type %s, using dlmc_ref_clk0 instead\n", - ss_clock_type); - - if ((ref_clk_sel == 0 || ref_clk_sel == 1) && - (clock_rate != 100000000)) - dev_warn(dev, "Invalid UCTL clock rate of %u, using 100000000 instead\n", - clock_rate); - - } else { - dev_err(dev, "No USB UCTL device node\n"); - return -EINVAL; - } + int div; + struct device *dev = octeon->dev; + void __iomem *uctl_ctl_reg = octeon->base + USBDRD_UCTL_CTL; + void __iomem *uctl_host_cfg_reg = octeon->base + USBDRD_UCTL_HOST_CFG; /* * Step 1: Wait for all voltages to be stable...that surely @@ -374,6 +289,10 @@ static int dwc3_octeon_clocks_start(struct device *dev, void __iomem *base) /* Step 4b: Select controller clock frequency. */ div = dwc3_octeon_get_divider(); + if (div < 0) { + dev_err(dev, "clock divider invalid\n"); + return div; + } val = dwc3_octeon_readq(uctl_ctl_reg); val &= ~USBDRD_UCTL_CTL_H_CLKDIV_SEL; val |= FIELD_PREP(USBDRD_UCTL_CTL_H_CLKDIV_SEL, div); @@ -382,8 +301,8 @@ static int dwc3_octeon_clocks_start(struct device *dev, void __iomem *base) val = dwc3_octeon_readq(uctl_ctl_reg); if ((div != FIELD_GET(USBDRD_UCTL_CTL_H_CLKDIV_SEL, val)) || (!(FIELD_GET(USBDRD_UCTL_CTL_H_CLK_EN, val)))) { - dev_err(dev, "dwc3 controller clock init failure.\n"); - return -EINVAL; + dev_err(dev, "clock init failure (UCTL_CTL=%016llx)\n", val); + return -EINVAL; } /* Step 4c: Deassert the controller clock divider reset. */ @@ -396,24 +315,6 @@ static int dwc3_octeon_clocks_start(struct device *dev, void __iomem *base) val &= ~USBDRD_UCTL_CTL_REF_CLK_SEL; val |= FIELD_PREP(USBDRD_UCTL_CTL_REF_CLK_SEL, ref_clk_sel); - ref_clk_fsel = 0x07; - switch (clock_rate) { - default: - dev_warn(dev, "Invalid ref_clk %u, using 100000000 instead\n", - clock_rate); - fallthrough; - case 100000000: - mpll_mul = 0x19; - if (ref_clk_sel < 2) - ref_clk_fsel = 0x27; - break; - case 50000000: - mpll_mul = 0x32; - break; - case 125000000: - mpll_mul = 0x28; - break; - } val &= ~USBDRD_UCTL_CTL_REF_CLK_FSEL; val |= FIELD_PREP(USBDRD_UCTL_CTL_REF_CLK_FSEL, ref_clk_fsel); @@ -444,9 +345,22 @@ static int dwc3_octeon_clocks_start(struct device *dev, void __iomem *base) /* Step 8b: Wait 10 controller-clock cycles. */ udelay(10); - /* Steo 8c: Setup power-power control. */ - if (dwc3_octeon_config_power(dev, base)) - return -EINVAL; + /* Step 8c: Setup power control. */ + val = dwc3_octeon_readq(uctl_host_cfg_reg); + val |= USBDRD_UCTL_HOST_PPC_EN; + if (power_gpio == DWC3_GPIO_POWER_NONE) { + val &= ~USBDRD_UCTL_HOST_PPC_EN; + } else { + val |= USBDRD_UCTL_HOST_PPC_EN; + dwc3_octeon_config_gpio(((__force uintptr_t)octeon->base >> 24) & 1, + power_gpio); + dev_dbg(dev, "power control is using gpio%d\n", power_gpio); + } + if (power_active_low) + val &= ~USBDRD_UCTL_HOST_PPC_ACTIVE_HIGH_EN; + else + val |= USBDRD_UCTL_HOST_PPC_ACTIVE_HIGH_EN; + dwc3_octeon_writeq(uctl_host_cfg_reg, val); /* Step 8d: Deassert UAHC reset signal. */ val = dwc3_octeon_readq(uctl_ctl_reg); @@ -469,10 +383,10 @@ static int dwc3_octeon_clocks_start(struct device *dev, void __iomem *base) return 0; } -static void __init dwc3_octeon_set_endian_mode(void __iomem *base) +static void dwc3_octeon_set_endian_mode(struct dwc3_octeon *octeon) { u64 val; - void __iomem *uctl_shim_cfg_reg = base + USBDRD_UCTL_SHIM_CFG; + void __iomem *uctl_shim_cfg_reg = octeon->base + USBDRD_UCTL_SHIM_CFG; val = dwc3_octeon_readq(uctl_shim_cfg_reg); val &= ~USBDRD_UCTL_SHIM_CFG_DMA_ENDIAN_MODE; @@ -484,68 +398,146 @@ static void __init dwc3_octeon_set_endian_mode(void __iomem *base) dwc3_octeon_writeq(uctl_shim_cfg_reg, val); } -static void __init dwc3_octeon_phy_reset(void __iomem *base) +static void dwc3_octeon_phy_reset(struct dwc3_octeon *octeon) { u64 val; - void __iomem *uctl_ctl_reg = base + USBDRD_UCTL_CTL; + void __iomem *uctl_ctl_reg = octeon->base + USBDRD_UCTL_CTL; val = dwc3_octeon_readq(uctl_ctl_reg); val &= ~USBDRD_UCTL_CTL_UPHY_RST; dwc3_octeon_writeq(uctl_ctl_reg, val); } -static int __init dwc3_octeon_device_init(void) +static int dwc3_octeon_probe(struct platform_device *pdev) { - const char compat_node_name[] = "cavium,octeon-7130-usb-uctl"; - struct platform_device *pdev; - struct device_node *node; - struct resource *res; - void __iomem *base; + struct device *dev = &pdev->dev; + struct device_node *node = dev->of_node; + struct dwc3_octeon *octeon; + const char *hs_clock_type, *ss_clock_type; + int ref_clk_sel, ref_clk_fsel, mpll_mul; + int power_active_low, power_gpio; + int err, len; + u32 clock_rate; - /* - * There should only be three universal controllers, "uctl" - * in the device tree. Two USB and a SATA, which we ignore. - */ - node = NULL; - do { - node = of_find_node_by_name(node, "uctl"); - if (!node) - return -ENODEV; + if (of_property_read_u32(node, "refclk-frequency", &clock_rate)) { + dev_err(dev, "No UCTL \"refclk-frequency\"\n"); + return -EINVAL; + } + if (of_property_read_string(node, "refclk-type-ss", &ss_clock_type)) { + dev_err(dev, "No UCTL \"refclk-type-ss\"\n"); + return -EINVAL; + } + if (of_property_read_string(node, "refclk-type-hs", &hs_clock_type)) { + dev_err(dev, "No UCTL \"refclk-type-hs\"\n"); + return -EINVAL; + } - if (of_device_is_compatible(node, compat_node_name)) { - pdev = of_find_device_by_node(node); - if (!pdev) - return -ENODEV; - - /* - * The code below maps in the registers necessary for - * setting up the clocks and reseting PHYs. We must - * release the resources so the dwc3 subsystem doesn't - * know the difference. - */ - base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); - if (IS_ERR(base)) { - put_device(&pdev->dev); - return PTR_ERR(base); - } - - mutex_lock(&dwc3_octeon_clocks_mutex); - if (dwc3_octeon_clocks_start(&pdev->dev, base) == 0) - dev_info(&pdev->dev, "clocks initialized.\n"); - dwc3_octeon_set_endian_mode(base); - dwc3_octeon_phy_reset(base); - mutex_unlock(&dwc3_octeon_clocks_mutex); - devm_iounmap(&pdev->dev, base); - devm_release_mem_region(&pdev->dev, res->start, - resource_size(res)); - put_device(&pdev->dev); + ref_clk_sel = 2; + if (strcmp("dlmc_ref_clk0", ss_clock_type) == 0) { + if (strcmp(hs_clock_type, "dlmc_ref_clk0") == 0) + ref_clk_sel = 0; + else if (strcmp(hs_clock_type, "pll_ref_clk")) + dev_warn(dev, "Invalid HS clock type %s, using pll_ref_clk instead\n", + hs_clock_type); + } else if (strcmp(ss_clock_type, "dlmc_ref_clk1") == 0) { + if (strcmp(hs_clock_type, "dlmc_ref_clk1") == 0) { + ref_clk_sel = 1; + } else { + ref_clk_sel = 3; + if (strcmp(hs_clock_type, "pll_ref_clk")) + dev_warn(dev, "Invalid HS clock type %s, using pll_ref_clk instead\n", + hs_clock_type); } - } while (node != NULL); + } else { + dev_warn(dev, "Invalid SS clock type %s, using dlmc_ref_clk0 instead\n", + ss_clock_type); + } - return 0; + ref_clk_fsel = 0x07; + switch (clock_rate) { + default: + dev_warn(dev, "Invalid ref_clk %u, using 100000000 instead\n", + clock_rate); + fallthrough; + case 100000000: + mpll_mul = 0x19; + if (ref_clk_sel < 2) + ref_clk_fsel = 0x27; + break; + case 50000000: + mpll_mul = 0x32; + break; + case 125000000: + mpll_mul = 0x28; + break; + } + + power_gpio = DWC3_GPIO_POWER_NONE; + power_active_low = 0; + if (of_find_property(node, "power", &len)) { + u32 gpio_pwr[3]; + + switch (len) { + case 8: + of_property_read_u32_array(node, "power", gpio_pwr, 2); + break; + case 12: + of_property_read_u32_array(node, "power", gpio_pwr, 3); + power_active_low = gpio_pwr[2] & 0x01; + break; + default: + dev_err(dev, "invalid power configuration\n"); + return -EINVAL; + } + power_gpio = gpio_pwr[1]; + } + + octeon = devm_kzalloc(dev, sizeof(*octeon), GFP_KERNEL); + if (!octeon) + return -ENOMEM; + + octeon->dev = dev; + octeon->base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(octeon->base)) + return PTR_ERR(octeon->base); + + err = dwc3_octeon_setup(octeon, ref_clk_sel, ref_clk_fsel, mpll_mul, + power_gpio, power_active_low); + if (err) + return err; + + dwc3_octeon_set_endian_mode(octeon); + dwc3_octeon_phy_reset(octeon); + + platform_set_drvdata(pdev, octeon); + + return of_platform_populate(node, NULL, NULL, dev); } -device_initcall(dwc3_octeon_device_init); -MODULE_AUTHOR("David Daney "); +static void dwc3_octeon_remove(struct platform_device *pdev) +{ + struct dwc3_octeon *octeon = platform_get_drvdata(pdev); + + of_platform_depopulate(octeon->dev); +} + +static const struct of_device_id dwc3_octeon_of_match[] = { + { .compatible = "cavium,octeon-7130-usb-uctl" }, + { }, +}; +MODULE_DEVICE_TABLE(of, dwc3_octeon_of_match); + +static struct platform_driver dwc3_octeon_driver = { + .probe = dwc3_octeon_probe, + .remove_new = dwc3_octeon_remove, + .driver = { + .name = "dwc3-octeon", + .of_match_table = dwc3_octeon_of_match, + }, +}; +module_platform_driver(dwc3_octeon_driver); + +MODULE_ALIAS("platform:dwc3-octeon"); +MODULE_AUTHOR("Ladislav Michl "); MODULE_LICENSE("GPL"); -MODULE_DESCRIPTION("USB driver for OCTEON III SoC"); +MODULE_DESCRIPTION("DesignWare USB3 OCTEON III Glue Layer"); diff --git a/drivers/usb/dwc3/dwc3-of-simple.c b/drivers/usb/dwc3/dwc3-of-simple.c index 7e6ad8fe61a5..d1539fc9eabd 100644 --- a/drivers/usb/dwc3/dwc3-of-simple.c +++ b/drivers/usb/dwc3/dwc3-of-simple.c @@ -170,7 +170,6 @@ static const struct dev_pm_ops dwc3_of_simple_dev_pm_ops = { static const struct of_device_id of_dwc3_simple_match[] = { { .compatible = "rockchip,rk3399-dwc3" }, - { .compatible = "cavium,octeon-7130-usb-uctl" }, { .compatible = "sprd,sc9860-dwc3" }, { .compatible = "allwinner,sun50i-h6-dwc3" }, { .compatible = "hisilicon,hi3670-dwc3" }, diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig index 151737d11f9b..b1ebe750f379 100644 --- a/drivers/usb/gadget/Kconfig +++ b/drivers/usb/gadget/Kconfig @@ -208,6 +208,9 @@ config USB_F_UVC config USB_F_MIDI tristate +config USB_F_MIDI2 + tristate + config USB_F_HID tristate @@ -467,6 +470,21 @@ config USB_CONFIGFS_F_MIDI connections can then be made on the gadget system, using ALSA's aconnect utility etc. +config USB_CONFIGFS_F_MIDI2 + bool "MIDI 2.0 function" + depends on USB_CONFIGFS + depends on SND + select USB_LIBCOMPOSITE + select SND_UMP + select SND_UMP_LEGACY_RAWMIDI + select USB_F_MIDI2 + help + The MIDI 2.0 function driver provides the generic emulated + USB MIDI 2.0 interface, looped back to ALSA UMP rawmidi + device on the gadget host. It supports UMP 1.1 spec and + responds UMP Stream messages for UMP Endpoint and Function + Block information / configuration. + config USB_CONFIGFS_F_HID bool "HID function" depends on USB_CONFIGFS diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c index dd9b90481b4c..0ace45b66a31 100644 --- a/drivers/usb/gadget/composite.c +++ b/drivers/usb/gadget/composite.c @@ -170,33 +170,27 @@ int config_ep_by_speed_and_alt(struct usb_gadget *g, /* select desired speed */ switch (g->speed) { case USB_SPEED_SUPER_PLUS: - if (gadget_is_superspeed_plus(g)) { - if (f->ssp_descriptors) { - speed_desc = f->ssp_descriptors; - want_comp_desc = 1; - break; - } - incomplete_desc = true; + if (f->ssp_descriptors) { + speed_desc = f->ssp_descriptors; + want_comp_desc = 1; + break; } + incomplete_desc = true; fallthrough; case USB_SPEED_SUPER: - if (gadget_is_superspeed(g)) { - if (f->ss_descriptors) { - speed_desc = f->ss_descriptors; - want_comp_desc = 1; - break; - } - incomplete_desc = true; + if (f->ss_descriptors) { + speed_desc = f->ss_descriptors; + want_comp_desc = 1; + break; } + incomplete_desc = true; fallthrough; case USB_SPEED_HIGH: - if (gadget_is_dualspeed(g)) { - if (f->hs_descriptors) { - speed_desc = f->hs_descriptors; - break; - } - incomplete_desc = true; + if (f->hs_descriptors) { + speed_desc = f->hs_descriptors; + break; } + incomplete_desc = true; fallthrough; default: speed_desc = f->fs_descriptors; diff --git a/drivers/usb/gadget/config.c b/drivers/usb/gadget/config.c index 05507606b2b4..b1f625245713 100644 --- a/drivers/usb/gadget/config.c +++ b/drivers/usb/gadget/config.c @@ -162,8 +162,6 @@ int usb_assign_descriptors(struct usb_function *f, struct usb_descriptor_header **ss, struct usb_descriptor_header **ssp) { - struct usb_gadget *g = f->config->cdev->gadget; - /* super-speed-plus descriptor falls back to super-speed one, * if such a descriptor was provided, thus avoiding a NULL * pointer dereference if a 5gbps capable gadget is used with @@ -177,17 +175,17 @@ int usb_assign_descriptors(struct usb_function *f, if (!f->fs_descriptors) goto err; } - if (hs && gadget_is_dualspeed(g)) { + if (hs) { f->hs_descriptors = usb_copy_descriptors(hs); if (!f->hs_descriptors) goto err; } - if (ss && gadget_is_superspeed(g)) { + if (ss) { f->ss_descriptors = usb_copy_descriptors(ss); if (!f->ss_descriptors) goto err; } - if (ssp && gadget_is_superspeed_plus(g)) { + if (ssp) { f->ssp_descriptors = usb_copy_descriptors(ssp); if (!f->ssp_descriptors) goto err; diff --git a/drivers/usb/gadget/function/Makefile b/drivers/usb/gadget/function/Makefile index dd33a1243342..4996b1b69c79 100644 --- a/drivers/usb/gadget/function/Makefile +++ b/drivers/usb/gadget/function/Makefile @@ -44,6 +44,8 @@ usb_f_uvc-y := f_uvc.o uvc_queue.o uvc_v4l2.o uvc_video.o uvc_configfs.o obj-$(CONFIG_USB_F_UVC) += usb_f_uvc.o usb_f_midi-y := f_midi.o obj-$(CONFIG_USB_F_MIDI) += usb_f_midi.o +usb_f_midi2-y := f_midi2.o +obj-$(CONFIG_USB_F_MIDI2) += usb_f_midi2.o usb_f_hid-y := f_hid.o obj-$(CONFIG_USB_F_HID) += usb_f_hid.o usb_f_printer-y := f_printer.o diff --git a/drivers/usb/gadget/function/f_acm.c b/drivers/usb/gadget/function/f_acm.c index cb523f118f04..f616059c5e1e 100644 --- a/drivers/usb/gadget/function/f_acm.c +++ b/drivers/usb/gadget/function/f_acm.c @@ -691,10 +691,8 @@ acm_bind(struct usb_configuration *c, struct usb_function *f) goto fail; dev_dbg(&cdev->gadget->dev, - "acm ttyGS%d: %s speed IN/%s OUT/%s NOTIFY/%s\n", + "acm ttyGS%d: IN/%s OUT/%s NOTIFY/%s\n", acm->port_num, - gadget_is_superspeed(c->cdev->gadget) ? "super" : - gadget_is_dualspeed(c->cdev->gadget) ? "dual" : "full", acm->port.in->name, acm->port.out->name, acm->notify->name); return 0; diff --git a/drivers/usb/gadget/function/f_ecm.c b/drivers/usb/gadget/function/f_ecm.c index c6e63ad77a40..f55f60639e42 100644 --- a/drivers/usb/gadget/function/f_ecm.c +++ b/drivers/usb/gadget/function/f_ecm.c @@ -65,17 +65,6 @@ static inline struct f_ecm *func_to_ecm(struct usb_function *f) return container_of(f, struct f_ecm, port.func); } -/* peak (theoretical) bulk transfer rate in bits-per-second */ -static inline unsigned ecm_bitrate(struct usb_gadget *g) -{ - if (gadget_is_superspeed(g) && g->speed == USB_SPEED_SUPER) - return 13 * 1024 * 8 * 1000 * 8; - else if (gadget_is_dualspeed(g) && g->speed == USB_SPEED_HIGH) - return 13 * 512 * 8 * 1000 * 8; - else - return 19 * 64 * 1 * 1000 * 8; -} - /*-------------------------------------------------------------------------*/ /* @@ -411,10 +400,10 @@ static void ecm_do_notify(struct f_ecm *ecm) /* SPEED_CHANGE data is up/down speeds in bits/sec */ data = req->buf + sizeof *event; - data[0] = cpu_to_le32(ecm_bitrate(cdev->gadget)); + data[0] = cpu_to_le32(gether_bitrate(cdev->gadget)); data[1] = data[0]; - DBG(cdev, "notify speed %d\n", ecm_bitrate(cdev->gadget)); + DBG(cdev, "notify speed %d\n", gether_bitrate(cdev->gadget)); ecm->notify_state = ECM_NOTIFY_NONE; break; } @@ -799,9 +788,7 @@ ecm_bind(struct usb_configuration *c, struct usb_function *f) ecm->port.open = ecm_open; ecm->port.close = ecm_close; - DBG(cdev, "CDC Ethernet: %s speed IN/%s OUT/%s NOTIFY/%s\n", - gadget_is_superspeed(c->cdev->gadget) ? "super" : - gadget_is_dualspeed(c->cdev->gadget) ? "dual" : "full", + DBG(cdev, "CDC Ethernet: IN/%s OUT/%s NOTIFY/%s\n", ecm->port.in_ep->name, ecm->port.out_ep->name, ecm->notify->name); return 0; diff --git a/drivers/usb/gadget/function/f_eem.c b/drivers/usb/gadget/function/f_eem.c index 5d38f29bda72..3b445bd88498 100644 --- a/drivers/usb/gadget/function/f_eem.c +++ b/drivers/usb/gadget/function/f_eem.c @@ -311,9 +311,7 @@ static int eem_bind(struct usb_configuration *c, struct usb_function *f) if (status) goto fail; - DBG(cdev, "CDC Ethernet (EEM): %s speed IN/%s OUT/%s\n", - gadget_is_superspeed(c->cdev->gadget) ? "super" : - gadget_is_dualspeed(c->cdev->gadget) ? "dual" : "full", + DBG(cdev, "CDC Ethernet (EEM): IN/%s OUT/%s\n", eem->port.in_ep->name, eem->port.out_ep->name); return 0; diff --git a/drivers/usb/gadget/function/f_loopback.c b/drivers/usb/gadget/function/f_loopback.c index ae41f556eb75..17ac6ace0cff 100644 --- a/drivers/usb/gadget/function/f_loopback.c +++ b/drivers/usb/gadget/function/f_loopback.c @@ -211,9 +211,7 @@ autoconf_fail: if (ret) return ret; - DBG(cdev, "%s speed %s: IN/%s, OUT/%s\n", - (gadget_is_superspeed(c->cdev->gadget) ? "super" : - (gadget_is_dualspeed(c->cdev->gadget) ? "dual" : "full")), + DBG(cdev, "%s: IN/%s, OUT/%s\n", f->name, loop->in_ep->name, loop->out_ep->name); return 0; } diff --git a/drivers/usb/gadget/function/f_mass_storage.c b/drivers/usb/gadget/function/f_mass_storage.c index da07e45ae6df..722a3ab2b337 100644 --- a/drivers/usb/gadget/function/f_mass_storage.c +++ b/drivers/usb/gadget/function/f_mass_storage.c @@ -927,7 +927,7 @@ static void invalidate_sub(struct fsg_lun *curlun) { struct file *filp = curlun->filp; struct inode *inode = file_inode(filp); - unsigned long rc; + unsigned long __maybe_unused rc; rc = invalidate_mapping_pages(inode->i_mapping, 0, -1); VLDBG(curlun, "invalidate_mapping_pages -> %ld\n", rc); diff --git a/drivers/usb/gadget/function/f_midi.c b/drivers/usb/gadget/function/f_midi.c index 9511b2218a63..638225a53e2b 100644 --- a/drivers/usb/gadget/function/f_midi.c +++ b/drivers/usb/gadget/function/f_midi.c @@ -1023,40 +1023,30 @@ static int f_midi_bind(struct usb_configuration *c, struct usb_function *f) if (!f->fs_descriptors) goto fail_f_midi; - if (gadget_is_dualspeed(c->cdev->gadget)) { - bulk_in_desc.wMaxPacketSize = cpu_to_le16(512); - bulk_out_desc.wMaxPacketSize = cpu_to_le16(512); - f->hs_descriptors = usb_copy_descriptors(midi_function); - if (!f->hs_descriptors) - goto fail_f_midi; - } + bulk_in_desc.wMaxPacketSize = cpu_to_le16(512); + bulk_out_desc.wMaxPacketSize = cpu_to_le16(512); + f->hs_descriptors = usb_copy_descriptors(midi_function); + if (!f->hs_descriptors) + goto fail_f_midi; - if (gadget_is_superspeed(c->cdev->gadget)) { - bulk_in_desc.wMaxPacketSize = cpu_to_le16(1024); - bulk_out_desc.wMaxPacketSize = cpu_to_le16(1024); - i = endpoint_descriptor_index; - midi_function[i++] = (struct usb_descriptor_header *) - &bulk_out_desc; - midi_function[i++] = (struct usb_descriptor_header *) - &bulk_out_ss_comp_desc; - midi_function[i++] = (struct usb_descriptor_header *) - &ms_out_desc; - midi_function[i++] = (struct usb_descriptor_header *) - &bulk_in_desc; - midi_function[i++] = (struct usb_descriptor_header *) - &bulk_in_ss_comp_desc; - midi_function[i++] = (struct usb_descriptor_header *) - &ms_in_desc; - f->ss_descriptors = usb_copy_descriptors(midi_function); - if (!f->ss_descriptors) - goto fail_f_midi; - - if (gadget_is_superspeed_plus(c->cdev->gadget)) { - f->ssp_descriptors = usb_copy_descriptors(midi_function); - if (!f->ssp_descriptors) - goto fail_f_midi; - } - } + bulk_in_desc.wMaxPacketSize = cpu_to_le16(1024); + bulk_out_desc.wMaxPacketSize = cpu_to_le16(1024); + i = endpoint_descriptor_index; + midi_function[i++] = (struct usb_descriptor_header *) + &bulk_out_desc; + midi_function[i++] = (struct usb_descriptor_header *) + &bulk_out_ss_comp_desc; + midi_function[i++] = (struct usb_descriptor_header *) + &ms_out_desc; + midi_function[i++] = (struct usb_descriptor_header *) + &bulk_in_desc; + midi_function[i++] = (struct usb_descriptor_header *) + &bulk_in_ss_comp_desc; + midi_function[i++] = (struct usb_descriptor_header *) + &ms_in_desc; + f->ss_descriptors = usb_copy_descriptors(midi_function); + if (!f->ss_descriptors) + goto fail_f_midi; kfree(midi_function); diff --git a/drivers/usb/gadget/function/f_midi2.c b/drivers/usb/gadget/function/f_midi2.c new file mode 100644 index 000000000000..ec8cd7c7bbfc --- /dev/null +++ b/drivers/usb/gadget/function/f_midi2.c @@ -0,0 +1,2871 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * f_midi2.c -- USB MIDI 2.0 class function driver + */ + +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "u_f.h" +#include "u_midi2.h" + +struct f_midi2; +struct f_midi2_ep; +struct f_midi2_usb_ep; + +/* Context for each USB request */ +struct f_midi2_req_ctx { + struct f_midi2_usb_ep *usb_ep; /* belonging USB EP */ + unsigned int index; /* array index: 0-31 */ + struct usb_request *req; /* assigned request */ +}; + +/* Resources for a USB Endpoint */ +struct f_midi2_usb_ep { + struct f_midi2 *card; /* belonging card */ + struct f_midi2_ep *ep; /* belonging UMP EP (optional) */ + struct usb_ep *usb_ep; /* assigned USB EP */ + void (*complete)(struct usb_ep *usb_ep, struct usb_request *req); + unsigned long free_reqs; /* bitmap for unused requests */ + unsigned int num_reqs; /* number of allocated requests */ + struct f_midi2_req_ctx *reqs; /* request context array */ +}; + +/* Resources for UMP Function Block (and USB Group Terminal Block) */ +struct f_midi2_block { + struct f_midi2_block_info info; /* FB info, copied from configfs */ + struct snd_ump_block *fb; /* assigned FB */ + unsigned int gtb_id; /* assigned GTB id */ + unsigned int string_id; /* assigned string id */ +}; + +/* Temporary buffer for altset 0 MIDI 1.0 handling */ +struct f_midi2_midi1_port { + unsigned int pending; /* pending bytes on the input buffer */ + u8 buf[32]; /* raw MIDI 1.0 byte input */ + u8 state; /* running status */ + u8 data[2]; /* rendered USB MIDI 1.0 packet data */ +}; + +/* MIDI 1.0 message states */ +enum { + STATE_INITIAL = 0, /* pseudo state */ + STATE_1PARAM, + STATE_2PARAM_1, + STATE_2PARAM_2, + STATE_SYSEX_0, + STATE_SYSEX_1, + STATE_SYSEX_2, + STATE_REAL_TIME, + STATE_FINISHED, /* pseudo state */ +}; + +/* Resources for UMP Endpoint */ +struct f_midi2_ep { + struct snd_ump_endpoint *ump; /* assigned UMP EP */ + struct f_midi2 *card; /* belonging MIDI 2.0 device */ + + struct f_midi2_ep_info info; /* UMP EP info, copied from configfs */ + unsigned int num_blks; /* number of FBs */ + struct f_midi2_block blks[SNDRV_UMP_MAX_BLOCKS]; /* UMP FBs */ + + struct f_midi2_usb_ep ep_in; /* USB MIDI EP-in */ + struct f_midi2_usb_ep ep_out; /* USB MIDI EP-out */ + + u8 in_group_to_cable[SNDRV_UMP_MAX_GROUPS]; /* map to cable; 1-based! */ +}; + +/* indices for USB strings */ +enum { + STR_IFACE = 0, + STR_GTB1 = 1, +}; + +/* 1-based GTB id to string id */ +#define gtb_to_str_id(id) (STR_GTB1 + (id) - 1) + +/* mapping from MIDI 1.0 cable to UMP group */ +struct midi1_cable_mapping { + struct f_midi2_ep *ep; + unsigned char block; + unsigned char group; +}; + +/* operation mode */ +enum { + MIDI_OP_MODE_UNSET, /* no altset set yet */ + MIDI_OP_MODE_MIDI1, /* MIDI 1.0 (altset 0) is used */ + MIDI_OP_MODE_MIDI2, /* MIDI 2.0 (altset 1) is used */ +}; + +/* Resources for MIDI 2.0 Device */ +struct f_midi2 { + struct usb_function func; + struct usb_gadget *gadget; + struct snd_card *card; + + /* MIDI 1.0 in/out USB EPs */ + struct f_midi2_usb_ep midi1_ep_in; + struct f_midi2_usb_ep midi1_ep_out; + + /* number of MIDI 1.0 I/O cables */ + unsigned int num_midi1_in; + unsigned int num_midi1_out; + + /* conversion for MIDI 1.0 EP-in */ + struct f_midi2_midi1_port midi1_port[MAX_CABLES]; + /* conversion for MIDI 1.0 EP-out */ + struct ump_cvt_to_ump midi1_ump_cvt; + /* mapping between cables and UMP groups */ + struct midi1_cable_mapping in_cable_mapping[MAX_CABLES]; + struct midi1_cable_mapping out_cable_mapping[MAX_CABLES]; + + int midi_if; /* USB MIDI interface number */ + int operation_mode; /* current operation mode */ + + spinlock_t queue_lock; + + struct f_midi2_card_info info; /* card info, copied from configfs */ + + unsigned int num_eps; + struct f_midi2_ep midi2_eps[MAX_UMP_EPS]; + + unsigned int total_blocks; /* total number of blocks of all EPs */ + struct usb_string *string_defs; + struct usb_string *strings; +}; + +#define func_to_midi2(f) container_of(f, struct f_midi2, func) + +/* get EP name string */ +static const char *ump_ep_name(const struct f_midi2_ep *ep) +{ + return ep->info.ep_name ? ep->info.ep_name : "MIDI 2.0 Gadget"; +} + +/* get EP product ID string */ +static const char *ump_product_id(const struct f_midi2_ep *ep) +{ + return ep->info.product_id ? ep->info.product_id : "Unique Product ID"; +} + +/* get FB name string */ +static const char *ump_fb_name(const struct f_midi2_block_info *info) +{ + return info->name ? info->name : "MIDI 2.0 Gadget I/O"; +} + +/* + * USB Descriptor Definitions + */ +/* GTB header descriptor */ +static struct usb_ms20_gr_trm_block_header_descriptor gtb_header_desc = { + .bLength = sizeof(gtb_header_desc), + .bDescriptorType = USB_DT_CS_GR_TRM_BLOCK, + .bDescriptorSubtype = USB_MS_GR_TRM_BLOCK_HEADER, + .wTotalLength = __cpu_to_le16(0x12), // to be filled +}; + +/* GTB descriptor template: most items are replaced dynamically */ +static struct usb_ms20_gr_trm_block_descriptor gtb_desc = { + .bLength = sizeof(gtb_desc), + .bDescriptorType = USB_DT_CS_GR_TRM_BLOCK, + .bDescriptorSubtype = USB_MS_GR_TRM_BLOCK, + .bGrpTrmBlkID = 0x01, + .bGrpTrmBlkType = USB_MS_GR_TRM_BLOCK_TYPE_BIDIRECTIONAL, + .nGroupTrm = 0x00, + .nNumGroupTrm = 1, + .iBlockItem = 0, + .bMIDIProtocol = USB_MS_MIDI_PROTO_1_0_64, + .wMaxInputBandwidth = 0, + .wMaxOutputBandwidth = 0, +}; + +DECLARE_USB_MIDI_OUT_JACK_DESCRIPTOR(1); +DECLARE_USB_MS_ENDPOINT_DESCRIPTOR(16); +DECLARE_UAC_AC_HEADER_DESCRIPTOR(1); +DECLARE_USB_MS20_ENDPOINT_DESCRIPTOR(32); + +#define EP_MAX_PACKET_INT 8 + +/* Audio Control Interface */ +static struct usb_interface_descriptor midi2_audio_if_desc = { + .bLength = USB_DT_INTERFACE_SIZE, + .bDescriptorType = USB_DT_INTERFACE, + .bInterfaceNumber = 0, // to be filled + .bNumEndpoints = 0, + .bInterfaceClass = USB_CLASS_AUDIO, + .bInterfaceSubClass = USB_SUBCLASS_AUDIOCONTROL, + .bInterfaceProtocol = 0, + .iInterface = 0, +}; + +static struct uac1_ac_header_descriptor_1 midi2_audio_class_desc = { + .bLength = 0x09, + .bDescriptorType = USB_DT_CS_INTERFACE, + .bDescriptorSubtype = 0x01, + .bcdADC = __cpu_to_le16(0x0100), + .wTotalLength = __cpu_to_le16(0x0009), + .bInCollection = 0x01, + .baInterfaceNr = { 0x01 }, // to be filled +}; + +/* MIDI 1.0 Streaming Interface (altset 0) */ +static struct usb_interface_descriptor midi2_midi1_if_desc = { + .bLength = USB_DT_INTERFACE_SIZE, + .bDescriptorType = USB_DT_INTERFACE, + .bInterfaceNumber = 0, // to be filled + .bAlternateSetting = 0, + .bNumEndpoints = 2, // to be filled + .bInterfaceClass = USB_CLASS_AUDIO, + .bInterfaceSubClass = USB_SUBCLASS_MIDISTREAMING, + .bInterfaceProtocol = 0, + .iInterface = 0, // to be filled +}; + +static struct usb_ms_header_descriptor midi2_midi1_class_desc = { + .bLength = 0x07, + .bDescriptorType = USB_DT_CS_INTERFACE, + .bDescriptorSubtype = USB_MS_HEADER, + .bcdMSC = __cpu_to_le16(0x0100), + .wTotalLength = __cpu_to_le16(0x41), // to be calculated +}; + +/* MIDI 1.0 EP OUT */ +static struct usb_endpoint_descriptor midi2_midi1_ep_out_desc = { + .bLength = USB_DT_ENDPOINT_AUDIO_SIZE, + .bDescriptorType = USB_DT_ENDPOINT, + .bEndpointAddress = USB_DIR_OUT | 0, // set up dynamically + .bmAttributes = USB_ENDPOINT_XFER_BULK, +}; + +static struct usb_ss_ep_comp_descriptor midi2_midi1_ep_out_ss_comp_desc = { + .bLength = sizeof(midi2_midi1_ep_out_ss_comp_desc), + .bDescriptorType = USB_DT_SS_ENDPOINT_COMP, +}; + +static struct usb_ms_endpoint_descriptor_16 midi2_midi1_ep_out_class_desc = { + .bLength = 0x05, // to be filled + .bDescriptorType = USB_DT_CS_ENDPOINT, + .bDescriptorSubtype = USB_MS_GENERAL, + .bNumEmbMIDIJack = 1, + .baAssocJackID = { 0x01 }, +}; + +/* MIDI 1.0 EP IN */ +static struct usb_endpoint_descriptor midi2_midi1_ep_in_desc = { + .bLength = USB_DT_ENDPOINT_AUDIO_SIZE, + .bDescriptorType = USB_DT_ENDPOINT, + .bEndpointAddress = USB_DIR_IN | 0, // set up dynamically + .bmAttributes = USB_ENDPOINT_XFER_BULK, +}; + +static struct usb_ss_ep_comp_descriptor midi2_midi1_ep_in_ss_comp_desc = { + .bLength = sizeof(midi2_midi1_ep_in_ss_comp_desc), + .bDescriptorType = USB_DT_SS_ENDPOINT_COMP, +}; + +static struct usb_ms_endpoint_descriptor_16 midi2_midi1_ep_in_class_desc = { + .bLength = 0x05, // to be filled + .bDescriptorType = USB_DT_CS_ENDPOINT, + .bDescriptorSubtype = USB_MS_GENERAL, + .bNumEmbMIDIJack = 1, + .baAssocJackID = { 0x03 }, +}; + +/* MIDI 2.0 Streaming Interface (altset 1) */ +static struct usb_interface_descriptor midi2_midi2_if_desc = { + .bLength = USB_DT_INTERFACE_SIZE, + .bDescriptorType = USB_DT_INTERFACE, + .bInterfaceNumber = 0, // to be filled + .bAlternateSetting = 1, + .bNumEndpoints = 2, // to be filled + .bInterfaceClass = USB_CLASS_AUDIO, + .bInterfaceSubClass = USB_SUBCLASS_MIDISTREAMING, + .bInterfaceProtocol = 0, + .iInterface = 0, // to be filled +}; + +static struct usb_ms_header_descriptor midi2_midi2_class_desc = { + .bLength = 0x07, + .bDescriptorType = USB_DT_CS_INTERFACE, + .bDescriptorSubtype = USB_MS_HEADER, + .bcdMSC = __cpu_to_le16(0x0200), + .wTotalLength = __cpu_to_le16(0x07), +}; + +/* MIDI 2.0 EP OUT */ +static struct usb_endpoint_descriptor midi2_midi2_ep_out_desc[MAX_UMP_EPS]; + +static struct usb_ss_ep_comp_descriptor midi2_midi2_ep_out_ss_comp_desc = { + .bLength = sizeof(midi2_midi1_ep_out_ss_comp_desc), + .bDescriptorType = USB_DT_SS_ENDPOINT_COMP, +}; + +static struct usb_ms20_endpoint_descriptor_32 midi2_midi2_ep_out_class_desc[MAX_UMP_EPS]; + +/* MIDI 2.0 EP IN */ +static struct usb_endpoint_descriptor midi2_midi2_ep_in_desc[MAX_UMP_EPS]; + +static struct usb_ss_ep_comp_descriptor midi2_midi2_ep_in_ss_comp_desc = { + .bLength = sizeof(midi2_midi2_ep_in_ss_comp_desc), + .bDescriptorType = USB_DT_SS_ENDPOINT_COMP, +}; + +static struct usb_ms20_endpoint_descriptor_32 midi2_midi2_ep_in_class_desc[MAX_UMP_EPS]; + +/* Arrays of descriptors to be created */ +static void *midi2_audio_descs[] = { + &midi2_audio_if_desc, + &midi2_audio_class_desc, + NULL +}; + +static void *midi2_midi1_descs[] = { + &midi2_midi1_if_desc, + &midi2_midi1_class_desc, + NULL +}; + +static void *midi2_midi1_ep_out_descs[] = { + &midi2_midi1_ep_out_desc, + &midi2_midi1_ep_out_class_desc, + NULL +}; + +static void *midi2_midi1_ep_in_descs[] = { + &midi2_midi1_ep_in_desc, + &midi2_midi1_ep_in_class_desc, + NULL +}; + +static void *midi2_midi1_ep_out_ss_descs[] = { + &midi2_midi1_ep_out_desc, + &midi2_midi1_ep_out_ss_comp_desc, + &midi2_midi1_ep_out_class_desc, + NULL +}; + +static void *midi2_midi1_ep_in_ss_descs[] = { + &midi2_midi1_ep_in_desc, + &midi2_midi1_ep_in_ss_comp_desc, + &midi2_midi1_ep_in_class_desc, + NULL +}; + +static void *midi2_midi2_descs[] = { + &midi2_midi2_if_desc, + &midi2_midi2_class_desc, + NULL +}; + +/* + * USB request handling + */ + +/* get an empty request for the given EP */ +static struct usb_request *get_empty_request(struct f_midi2_usb_ep *usb_ep) +{ + struct usb_request *req = NULL; + unsigned long flags; + int index; + + spin_lock_irqsave(&usb_ep->card->queue_lock, flags); + if (!usb_ep->free_reqs) + goto unlock; + index = find_first_bit(&usb_ep->free_reqs, usb_ep->num_reqs); + if (index >= usb_ep->num_reqs) + goto unlock; + req = usb_ep->reqs[index].req; + if (!req) + goto unlock; + clear_bit(index, &usb_ep->free_reqs); + req->length = 0; + unlock: + spin_unlock_irqrestore(&usb_ep->card->queue_lock, flags); + return req; +} + +/* put the empty request back */ +static void put_empty_request(struct usb_request *req) +{ + struct f_midi2_req_ctx *ctx = req->context; + unsigned long flags; + + spin_lock_irqsave(&ctx->usb_ep->card->queue_lock, flags); + set_bit(ctx->index, &ctx->usb_ep->free_reqs); + spin_unlock_irqrestore(&ctx->usb_ep->card->queue_lock, flags); +} + +/* + * UMP v1.1 Stream message handling + */ + +/* queue a request to UMP EP; request is either queued or freed after this */ +static int queue_request_ep_raw(struct usb_request *req) +{ + struct f_midi2_req_ctx *ctx = req->context; + int err; + + req->complete = ctx->usb_ep->complete; + err = usb_ep_queue(ctx->usb_ep->usb_ep, req, GFP_ATOMIC); + if (err) { + put_empty_request(req); + return err; + } + return 0; +} + +/* queue a request with endianness conversion */ +static int queue_request_ep_in(struct usb_request *req) +{ + /* UMP packets have to be converted to little-endian */ + cpu_to_le32_array((u32 *)req->buf, req->length >> 2); + return queue_request_ep_raw(req); +} + +/* reply a UMP packet via EP-in */ +static int reply_ep_in(struct f_midi2_ep *ep, const void *buf, int len) +{ + struct f_midi2_usb_ep *usb_ep = &ep->ep_in; + struct usb_request *req; + + req = get_empty_request(usb_ep); + if (!req) + return -ENOSPC; + + req->length = len; + memcpy(req->buf, buf, len); + return queue_request_ep_in(req); +} + +/* reply a UMP stream EP info */ +static void reply_ump_stream_ep_info(struct f_midi2_ep *ep) +{ + struct snd_ump_stream_msg_ep_info rep = { + .type = UMP_MSG_TYPE_STREAM, + .status = UMP_STREAM_MSG_STATUS_EP_INFO, + .ump_version_major = 0x01, + .ump_version_minor = 0x01, + .num_function_blocks = ep->num_blks, + .static_function_block = !!ep->card->info.static_block, + .protocol = (UMP_STREAM_MSG_EP_INFO_CAP_MIDI1 | + UMP_STREAM_MSG_EP_INFO_CAP_MIDI2) >> 8, + }; + + reply_ep_in(ep, &rep, sizeof(rep)); +} + +/* reply a UMP EP device info */ +static void reply_ump_stream_ep_device(struct f_midi2_ep *ep) +{ + struct snd_ump_stream_msg_devince_info rep = { + .type = UMP_MSG_TYPE_STREAM, + .status = UMP_STREAM_MSG_STATUS_DEVICE_INFO, + .manufacture_id = ep->info.manufacturer, + .family_lsb = ep->info.family & 0xff, + .family_msb = (ep->info.family >> 8) & 0xff, + .model_lsb = ep->info.model & 0xff, + .model_msb = (ep->info.model >> 8) & 0xff, + .sw_revision = ep->info.sw_revision, + }; + + reply_ep_in(ep, &rep, sizeof(rep)); +} + +#define UMP_STREAM_PKT_BYTES 16 /* UMP stream packet size = 16 bytes*/ +#define UMP_STREAM_EP_STR_OFF 2 /* offset of name string for EP info */ +#define UMP_STREAM_FB_STR_OFF 3 /* offset of name string for FB info */ + +/* Helper to replay a string */ +static void reply_ump_stream_string(struct f_midi2_ep *ep, const u8 *name, + unsigned int type, unsigned int extra, + unsigned int start_ofs) +{ + struct f_midi2_usb_ep *usb_ep = &ep->ep_in; + struct f_midi2 *midi2 = ep->card; + struct usb_request *req; + unsigned int pos; + u32 *buf; + + if (!*name) + return; + req = get_empty_request(usb_ep); + if (!req) + return; + + buf = (u32 *)req->buf; + pos = start_ofs; + for (;;) { + if (pos == start_ofs) { + memset(buf, 0, UMP_STREAM_PKT_BYTES); + buf[0] = ump_stream_compose(type, 0) | extra; + } + buf[pos / 4] |= *name++ << ((3 - (pos % 4)) * 8); + if (!*name) { + if (req->length) + buf[0] |= UMP_STREAM_MSG_FORMAT_END << 26; + req->length += UMP_STREAM_PKT_BYTES; + break; + } + if (++pos == UMP_STREAM_PKT_BYTES) { + if (!req->length) + buf[0] |= UMP_STREAM_MSG_FORMAT_START << 26; + else + buf[0] |= UMP_STREAM_MSG_FORMAT_CONTINUE << 26; + req->length += UMP_STREAM_PKT_BYTES; + if (midi2->info.req_buf_size - req->length < UMP_STREAM_PKT_BYTES) + break; + buf += 4; + pos = start_ofs; + } + } + + if (req->length) + queue_request_ep_in(req); + else + put_empty_request(req); +} + +/* Reply a UMP EP name string */ +static void reply_ump_stream_ep_name(struct f_midi2_ep *ep) +{ + reply_ump_stream_string(ep, ump_ep_name(ep), + UMP_STREAM_MSG_STATUS_EP_NAME, 0, + UMP_STREAM_EP_STR_OFF); +} + +/* Reply a UMP EP product ID string */ +static void reply_ump_stream_ep_pid(struct f_midi2_ep *ep) +{ + reply_ump_stream_string(ep, ump_product_id(ep), + UMP_STREAM_MSG_STATUS_PRODUCT_ID, 0, + UMP_STREAM_EP_STR_OFF); +} + +/* Reply a UMP EP stream config */ +static void reply_ump_stream_ep_config(struct f_midi2_ep *ep) +{ + struct snd_ump_stream_msg_stream_cfg rep = { + .type = UMP_MSG_TYPE_STREAM, + .status = UMP_STREAM_MSG_STATUS_STREAM_CFG, + }; + + if ((ep->info.protocol & SNDRV_UMP_EP_INFO_PROTO_MIDI_MASK) == + SNDRV_UMP_EP_INFO_PROTO_MIDI2) + rep.protocol = UMP_STREAM_MSG_EP_INFO_CAP_MIDI2 >> 8; + else + rep.protocol = UMP_STREAM_MSG_EP_INFO_CAP_MIDI1 >> 8; + + reply_ep_in(ep, &rep, sizeof(rep)); +} + +/* Reply a UMP FB info */ +static void reply_ump_stream_fb_info(struct f_midi2_ep *ep, int blk) +{ + struct f_midi2_block_info *b = &ep->blks[blk].info; + struct snd_ump_stream_msg_fb_info rep = { + .type = UMP_MSG_TYPE_STREAM, + .status = UMP_STREAM_MSG_STATUS_FB_INFO, + .active = !!b->active, + .function_block_id = blk, + .ui_hint = b->ui_hint, + .midi_10 = b->is_midi1, + .direction = b->direction, + .first_group = b->first_group, + .num_groups = b->num_groups, + .midi_ci_version = b->midi_ci_version, + .sysex8_streams = b->sysex8_streams, + }; + + reply_ep_in(ep, &rep, sizeof(rep)); +} + +/* Reply a FB name string */ +static void reply_ump_stream_fb_name(struct f_midi2_ep *ep, unsigned int blk) +{ + reply_ump_stream_string(ep, ump_fb_name(&ep->blks[blk].info), + UMP_STREAM_MSG_STATUS_FB_NAME, blk << 8, + UMP_STREAM_FB_STR_OFF); +} + +/* Process a UMP Stream message */ +static void process_ump_stream_msg(struct f_midi2_ep *ep, const u32 *data) +{ + struct f_midi2 *midi2 = ep->card; + unsigned int format, status, blk; + + format = ump_stream_message_format(*data); + status = ump_stream_message_status(*data); + switch (status) { + case UMP_STREAM_MSG_STATUS_EP_DISCOVERY: + if (format) + return; // invalid + if (data[1] & UMP_STREAM_MSG_REQUEST_EP_INFO) + reply_ump_stream_ep_info(ep); + if (data[1] & UMP_STREAM_MSG_REQUEST_DEVICE_INFO) + reply_ump_stream_ep_device(ep); + if (data[1] & UMP_STREAM_MSG_REQUEST_EP_NAME) + reply_ump_stream_ep_name(ep); + if (data[1] & UMP_STREAM_MSG_REQUEST_PRODUCT_ID) + reply_ump_stream_ep_pid(ep); + if (data[1] & UMP_STREAM_MSG_REQUEST_STREAM_CFG) + reply_ump_stream_ep_config(ep); + return; + case UMP_STREAM_MSG_STATUS_STREAM_CFG_REQUEST: + if (*data & UMP_STREAM_MSG_EP_INFO_CAP_MIDI2) { + ep->info.protocol = SNDRV_UMP_EP_INFO_PROTO_MIDI2; + DBG(midi2, "Switching Protocol to MIDI2\n"); + } else { + ep->info.protocol = SNDRV_UMP_EP_INFO_PROTO_MIDI1; + DBG(midi2, "Switching Protocol to MIDI1\n"); + } + snd_ump_switch_protocol(ep->ump, ep->info.protocol); + reply_ump_stream_ep_config(ep); + return; + case UMP_STREAM_MSG_STATUS_FB_DISCOVERY: + if (format) + return; // invalid + blk = (*data >> 8) & 0xff; + if (blk >= ep->num_blks) + return; + if (*data & UMP_STREAM_MSG_REQUEST_FB_INFO) + reply_ump_stream_fb_info(ep, blk); + if (*data & UMP_STREAM_MSG_REQUEST_FB_NAME) + reply_ump_stream_fb_name(ep, blk); + return; + } +} + +/* Process UMP messages included in a USB request */ +static void process_ump(struct f_midi2_ep *ep, const struct usb_request *req) +{ + const u32 *data = (u32 *)req->buf; + int len = req->actual >> 2; + const u32 *in_buf = ep->ump->input_buf; + + for (; len > 0; len--, data++) { + if (snd_ump_receive_ump_val(ep->ump, *data) <= 0) + continue; + if (ump_message_type(*in_buf) == UMP_MSG_TYPE_STREAM) + process_ump_stream_msg(ep, in_buf); + } +} + +/* + * MIDI 2.0 UMP USB request handling + */ + +/* complete handler for UMP EP-out requests */ +static void f_midi2_ep_out_complete(struct usb_ep *usb_ep, + struct usb_request *req) +{ + struct f_midi2_req_ctx *ctx = req->context; + struct f_midi2_ep *ep = ctx->usb_ep->ep; + struct f_midi2 *midi2 = ep->card; + int status = req->status; + + if (status) { + DBG(midi2, "%s complete error %d: %d/%d\n", + usb_ep->name, status, req->actual, req->length); + goto error; + } + + /* convert to UMP packet in native endianness */ + le32_to_cpu_array((u32 *)req->buf, req->actual >> 2); + + if (midi2->info.process_ump) + process_ump(ep, req); + + snd_ump_receive(ep->ump, req->buf, req->actual & ~3); + + if (midi2->operation_mode != MIDI_OP_MODE_MIDI2) + goto error; + + if (queue_request_ep_raw(req)) + goto error; + return; + + error: + put_empty_request(req); +} + +/* Transmit UMP packets received from user-space to the gadget */ +static void process_ump_transmit(struct f_midi2_ep *ep) +{ + struct f_midi2_usb_ep *usb_ep = &ep->ep_in; + struct f_midi2 *midi2 = ep->card; + struct usb_request *req; + int len; + + if (!usb_ep->usb_ep->enabled) + return; + + for (;;) { + req = get_empty_request(usb_ep); + if (!req) + break; + len = snd_ump_transmit(ep->ump, (u32 *)req->buf, + midi2->info.req_buf_size); + if (len <= 0) { + put_empty_request(req); + break; + } + + req->length = len; + if (queue_request_ep_in(req) < 0) + break; + } +} + +/* Complete handler for UMP EP-in requests */ +static void f_midi2_ep_in_complete(struct usb_ep *usb_ep, + struct usb_request *req) +{ + struct f_midi2_req_ctx *ctx = req->context; + struct f_midi2_ep *ep = ctx->usb_ep->ep; + struct f_midi2 *midi2 = ep->card; + int status = req->status; + + put_empty_request(req); + + if (status) { + DBG(midi2, "%s complete error %d: %d/%d\n", + usb_ep->name, status, req->actual, req->length); + return; + } + + process_ump_transmit(ep); +} + +/* + * MIDI1 (altset 0) USB request handling + */ + +/* process one MIDI byte -- copied from f_midi.c + * + * fill the packet or request if needed + * returns true if the request became empty (queued) + */ +static bool process_midi1_byte(struct f_midi2 *midi2, u8 cable, u8 b, + struct usb_request **req_p) +{ + struct f_midi2_midi1_port *port = &midi2->midi1_port[cable]; + u8 p[4] = { cable << 4, 0, 0, 0 }; + int next_state = STATE_INITIAL; + struct usb_request *req = *req_p; + + switch (b) { + case 0xf8 ... 0xff: + /* System Real-Time Messages */ + p[0] |= 0x0f; + p[1] = b; + next_state = port->state; + port->state = STATE_REAL_TIME; + break; + + case 0xf7: + /* End of SysEx */ + switch (port->state) { + case STATE_SYSEX_0: + p[0] |= 0x05; + p[1] = 0xf7; + next_state = STATE_FINISHED; + break; + case STATE_SYSEX_1: + p[0] |= 0x06; + p[1] = port->data[0]; + p[2] = 0xf7; + next_state = STATE_FINISHED; + break; + case STATE_SYSEX_2: + p[0] |= 0x07; + p[1] = port->data[0]; + p[2] = port->data[1]; + p[3] = 0xf7; + next_state = STATE_FINISHED; + break; + default: + /* Ignore byte */ + next_state = port->state; + port->state = STATE_INITIAL; + } + break; + + case 0xf0 ... 0xf6: + /* System Common Messages */ + port->data[0] = port->data[1] = 0; + port->state = STATE_INITIAL; + switch (b) { + case 0xf0: + port->data[0] = b; + port->data[1] = 0; + next_state = STATE_SYSEX_1; + break; + case 0xf1: + case 0xf3: + port->data[0] = b; + next_state = STATE_1PARAM; + break; + case 0xf2: + port->data[0] = b; + next_state = STATE_2PARAM_1; + break; + case 0xf4: + case 0xf5: + next_state = STATE_INITIAL; + break; + case 0xf6: + p[0] |= 0x05; + p[1] = 0xf6; + next_state = STATE_FINISHED; + break; + } + break; + + case 0x80 ... 0xef: + /* + * Channel Voice Messages, Channel Mode Messages + * and Control Change Messages. + */ + port->data[0] = b; + port->data[1] = 0; + port->state = STATE_INITIAL; + if (b >= 0xc0 && b <= 0xdf) + next_state = STATE_1PARAM; + else + next_state = STATE_2PARAM_1; + break; + + case 0x00 ... 0x7f: + /* Message parameters */ + switch (port->state) { + case STATE_1PARAM: + if (port->data[0] < 0xf0) + p[0] |= port->data[0] >> 4; + else + p[0] |= 0x02; + + p[1] = port->data[0]; + p[2] = b; + /* This is to allow Running State Messages */ + next_state = STATE_1PARAM; + break; + case STATE_2PARAM_1: + port->data[1] = b; + next_state = STATE_2PARAM_2; + break; + case STATE_2PARAM_2: + if (port->data[0] < 0xf0) + p[0] |= port->data[0] >> 4; + else + p[0] |= 0x03; + + p[1] = port->data[0]; + p[2] = port->data[1]; + p[3] = b; + /* This is to allow Running State Messages */ + next_state = STATE_2PARAM_1; + break; + case STATE_SYSEX_0: + port->data[0] = b; + next_state = STATE_SYSEX_1; + break; + case STATE_SYSEX_1: + port->data[1] = b; + next_state = STATE_SYSEX_2; + break; + case STATE_SYSEX_2: + p[0] |= 0x04; + p[1] = port->data[0]; + p[2] = port->data[1]; + p[3] = b; + next_state = STATE_SYSEX_0; + break; + } + break; + } + + /* States where we have to write into the USB request */ + if (next_state == STATE_FINISHED || + port->state == STATE_SYSEX_2 || + port->state == STATE_1PARAM || + port->state == STATE_2PARAM_2 || + port->state == STATE_REAL_TIME) { + memcpy(req->buf + req->length, p, sizeof(p)); + req->length += sizeof(p); + + if (next_state == STATE_FINISHED) { + next_state = STATE_INITIAL; + port->data[0] = port->data[1] = 0; + } + + if (midi2->info.req_buf_size - req->length <= 4) { + queue_request_ep_raw(req); + *req_p = NULL; + return true; + } + } + + port->state = next_state; + return false; +} + +/* process all pending MIDI bytes in the internal buffer; + * returns true if the request gets empty + * returns false if all have been processed + */ +static bool process_midi1_pending_buf(struct f_midi2 *midi2, + struct usb_request **req_p) +{ + unsigned int cable, c; + + for (cable = 0; cable < midi2->num_midi1_in; cable++) { + struct f_midi2_midi1_port *port = &midi2->midi1_port[cable]; + + if (!port->pending) + continue; + for (c = 0; c < port->pending; c++) { + if (process_midi1_byte(midi2, cable, port->buf[c], + req_p)) { + port->pending -= c; + if (port->pending) + memmove(port->buf, port->buf + c, + port->pending); + return true; + } + } + port->pending = 0; + } + + return false; +} + +/* fill the MIDI bytes onto the temporary buffer + */ +static void fill_midi1_pending_buf(struct f_midi2 *midi2, u8 cable, u8 *buf, + unsigned int size) +{ + struct f_midi2_midi1_port *port = &midi2->midi1_port[cable]; + + if (port->pending + size > sizeof(port->buf)) + return; + memcpy(port->buf + port->pending, buf, size); + port->pending += size; +} + +/* try to process data given from the associated UMP stream */ +static void process_midi1_transmit(struct f_midi2 *midi2) +{ + struct f_midi2_usb_ep *usb_ep = &midi2->midi1_ep_in; + struct f_midi2_ep *ep = &midi2->midi2_eps[0]; + struct usb_request *req = NULL; + /* 12 is the largest outcome (4 MIDI1 cmds) for a single UMP packet */ + unsigned char outbuf[12]; + unsigned char group, cable; + int len, size; + u32 ump; + + if (!usb_ep->usb_ep || !usb_ep->usb_ep->enabled) + return; + + for (;;) { + if (!req) { + req = get_empty_request(usb_ep); + if (!req) + break; + } + + if (process_midi1_pending_buf(midi2, &req)) + continue; + + len = snd_ump_transmit(ep->ump, &ump, 4); + if (len <= 0) + break; + if (snd_ump_receive_ump_val(ep->ump, ump) <= 0) + continue; + size = snd_ump_convert_from_ump(ep->ump->input_buf, outbuf, + &group); + if (size <= 0) + continue; + cable = ep->in_group_to_cable[group]; + if (!cable) + continue; + cable--; /* to 0-base */ + fill_midi1_pending_buf(midi2, cable, outbuf, size); + } + + if (req) { + if (req->length) + queue_request_ep_raw(req); + else + put_empty_request(req); + } +} + +/* complete handler for MIDI1 EP-in requests */ +static void f_midi2_midi1_ep_in_complete(struct usb_ep *usb_ep, + struct usb_request *req) +{ + struct f_midi2_req_ctx *ctx = req->context; + struct f_midi2 *midi2 = ctx->usb_ep->card; + int status = req->status; + + put_empty_request(req); + + if (status) { + DBG(midi2, "%s complete error %d: %d/%d\n", + usb_ep->name, status, req->actual, req->length); + return; + } + + process_midi1_transmit(midi2); +} + +/* complete handler for MIDI1 EP-out requests */ +static void f_midi2_midi1_ep_out_complete(struct usb_ep *usb_ep, + struct usb_request *req) +{ + struct f_midi2_req_ctx *ctx = req->context; + struct f_midi2 *midi2 = ctx->usb_ep->card; + struct f_midi2_ep *ep; + struct ump_cvt_to_ump *cvt = &midi2->midi1_ump_cvt; + static const u8 midi1_packet_bytes[16] = { + 0, 0, 2, 3, 3, 1, 2, 3, 3, 3, 3, 3, 2, 2, 3, 1 + }; + unsigned int group, cable, bytes, c, len; + int status = req->status; + const u8 *buf = req->buf; + + if (status) { + DBG(midi2, "%s complete error %d: %d/%d\n", + usb_ep->name, status, req->actual, req->length); + goto error; + } + + len = req->actual >> 2; + for (; len; len--, buf += 4) { + cable = *buf >> 4; + ep = midi2->out_cable_mapping[cable].ep; + if (!ep) + continue; + group = midi2->out_cable_mapping[cable].group; + bytes = midi1_packet_bytes[*buf & 0x0f]; + for (c = 0; c < bytes; c++) { + snd_ump_convert_to_ump(cvt, group, ep->info.protocol, + buf[c + 1]); + if (cvt->ump_bytes) { + snd_ump_receive(ep->ump, cvt->ump, + cvt->ump_bytes); + cvt->ump_bytes = 0; + } + } + } + + if (midi2->operation_mode != MIDI_OP_MODE_MIDI1) + goto error; + + if (queue_request_ep_raw(req)) + goto error; + return; + + error: + put_empty_request(req); +} + +/* + * Common EP handling helpers + */ + +/* Start MIDI EP */ +static int f_midi2_start_ep(struct f_midi2_usb_ep *usb_ep, + struct usb_function *fn) +{ + int err; + + if (!usb_ep->usb_ep) + return 0; + + usb_ep_disable(usb_ep->usb_ep); + err = config_ep_by_speed(usb_ep->card->gadget, fn, usb_ep->usb_ep); + if (err) + return err; + return usb_ep_enable(usb_ep->usb_ep); +} + +/* Drop pending requests */ +static void f_midi2_drop_reqs(struct f_midi2_usb_ep *usb_ep) +{ + int i; + + if (!usb_ep->usb_ep || !usb_ep->num_reqs) + return; + + for (i = 0; i < usb_ep->num_reqs; i++) { + if (!test_bit(i, &usb_ep->free_reqs) && usb_ep->reqs[i].req) { + usb_ep_dequeue(usb_ep->usb_ep, usb_ep->reqs[i].req); + set_bit(i, &usb_ep->free_reqs); + } + } +} + +/* Allocate requests for the given EP */ +static int f_midi2_alloc_ep_reqs(struct f_midi2_usb_ep *usb_ep) +{ + struct f_midi2 *midi2 = usb_ep->card; + int i; + + if (!usb_ep->usb_ep) + return 0; + if (!usb_ep->reqs) + return -EINVAL; + + for (i = 0; i < midi2->info.num_reqs; i++) { + if (usb_ep->reqs[i].req) + continue; + usb_ep->reqs[i].req = alloc_ep_req(usb_ep->usb_ep, + midi2->info.req_buf_size); + if (!usb_ep->reqs[i].req) + return -ENOMEM; + usb_ep->reqs[i].req->context = &usb_ep->reqs[i]; + } + return 0; +} + +/* Free allocated requests */ +static void f_midi2_free_ep_reqs(struct f_midi2_usb_ep *usb_ep) +{ + struct f_midi2 *midi2 = usb_ep->card; + int i; + + for (i = 0; i < midi2->info.num_reqs; i++) { + if (!usb_ep->reqs[i].req) + continue; + free_ep_req(usb_ep->usb_ep, usb_ep->reqs[i].req); + usb_ep->reqs[i].req = NULL; + } +} + +/* Initialize EP */ +static int f_midi2_init_ep(struct f_midi2 *midi2, struct f_midi2_ep *ep, + struct f_midi2_usb_ep *usb_ep, + void *desc, + void (*complete)(struct usb_ep *usb_ep, + struct usb_request *req)) +{ + int i; + + usb_ep->card = midi2; + usb_ep->ep = ep; + usb_ep->usb_ep = usb_ep_autoconfig(midi2->gadget, desc); + if (!usb_ep->usb_ep) + return -ENODEV; + usb_ep->complete = complete; + + usb_ep->reqs = kcalloc(midi2->info.num_reqs, sizeof(*usb_ep->reqs), + GFP_KERNEL); + if (!usb_ep->reqs) + return -ENOMEM; + for (i = 0; i < midi2->info.num_reqs; i++) { + usb_ep->reqs[i].index = i; + usb_ep->reqs[i].usb_ep = usb_ep; + set_bit(i, &usb_ep->free_reqs); + usb_ep->num_reqs++; + } + + return 0; +} + +/* Free EP */ +static void f_midi2_free_ep(struct f_midi2_usb_ep *usb_ep) +{ + f_midi2_drop_reqs(usb_ep); + + f_midi2_free_ep_reqs(usb_ep); + + kfree(usb_ep->reqs); + usb_ep->num_reqs = 0; + usb_ep->free_reqs = 0; + usb_ep->reqs = NULL; +} + +/* Queue requests for EP-out at start */ +static void f_midi2_queue_out_reqs(struct f_midi2_usb_ep *usb_ep) +{ + int i, err; + + if (!usb_ep->usb_ep) + return; + + for (i = 0; i < usb_ep->num_reqs; i++) { + if (!test_bit(i, &usb_ep->free_reqs) || !usb_ep->reqs[i].req) + continue; + usb_ep->reqs[i].req->complete = usb_ep->complete; + err = usb_ep_queue(usb_ep->usb_ep, usb_ep->reqs[i].req, + GFP_ATOMIC); + if (!err) + clear_bit(i, &usb_ep->free_reqs); + } +} + +/* + * Gadget Function callbacks + */ + +/* stop both IN and OUT EPs */ +static void f_midi2_stop_eps(struct f_midi2_usb_ep *ep_in, + struct f_midi2_usb_ep *ep_out) +{ + f_midi2_drop_reqs(ep_in); + f_midi2_drop_reqs(ep_out); + f_midi2_free_ep_reqs(ep_in); + f_midi2_free_ep_reqs(ep_out); +} + +/* start/queue both IN and OUT EPs */ +static int f_midi2_start_eps(struct f_midi2_usb_ep *ep_in, + struct f_midi2_usb_ep *ep_out, + struct usb_function *fn) +{ + int err; + + err = f_midi2_start_ep(ep_in, fn); + if (err) + return err; + err = f_midi2_start_ep(ep_out, fn); + if (err) + return err; + + err = f_midi2_alloc_ep_reqs(ep_in); + if (err) + return err; + err = f_midi2_alloc_ep_reqs(ep_out); + if (err) + return err; + + f_midi2_queue_out_reqs(ep_out); + return 0; +} + +/* gadget function set_alt callback */ +static int f_midi2_set_alt(struct usb_function *fn, unsigned int intf, + unsigned int alt) +{ + struct f_midi2 *midi2 = func_to_midi2(fn); + struct f_midi2_ep *ep; + int i, op_mode, err; + + if (intf != midi2->midi_if || alt > 1) + return 0; + + if (alt == 0) + op_mode = MIDI_OP_MODE_MIDI1; + else if (alt == 1) + op_mode = MIDI_OP_MODE_MIDI2; + else + op_mode = MIDI_OP_MODE_UNSET; + + if (midi2->operation_mode == op_mode) + return 0; + + midi2->operation_mode = op_mode; + + if (op_mode != MIDI_OP_MODE_MIDI1) + f_midi2_stop_eps(&midi2->midi1_ep_in, &midi2->midi1_ep_out); + + if (op_mode != MIDI_OP_MODE_MIDI2) { + for (i = 0; i < midi2->num_eps; i++) { + ep = &midi2->midi2_eps[i]; + f_midi2_stop_eps(&ep->ep_in, &ep->ep_out); + } + } + + if (op_mode == MIDI_OP_MODE_MIDI1) + return f_midi2_start_eps(&midi2->midi1_ep_in, + &midi2->midi1_ep_out, fn); + + if (op_mode == MIDI_OP_MODE_MIDI2) { + for (i = 0; i < midi2->num_eps; i++) { + ep = &midi2->midi2_eps[i]; + + err = f_midi2_start_eps(&ep->ep_in, &ep->ep_out, fn); + if (err) + return err; + } + } + + return 0; +} + +/* gadget function get_alt callback */ +static int f_midi2_get_alt(struct usb_function *fn, unsigned int intf) +{ + struct f_midi2 *midi2 = func_to_midi2(fn); + + if (intf == midi2->midi_if && + midi2->operation_mode == MIDI_OP_MODE_MIDI2) + return 1; + return 0; +} + +/* convert UMP direction to USB MIDI 2.0 direction */ +static unsigned int ump_to_usb_dir(unsigned int ump_dir) +{ + switch (ump_dir) { + case SNDRV_UMP_DIR_INPUT: + return USB_MS_GR_TRM_BLOCK_TYPE_INPUT_ONLY; + case SNDRV_UMP_DIR_OUTPUT: + return USB_MS_GR_TRM_BLOCK_TYPE_OUTPUT_ONLY; + default: + return USB_MS_GR_TRM_BLOCK_TYPE_BIDIRECTIONAL; + } +} + +/* assign GTB descriptors (for the given request) */ +static void assign_block_descriptors(struct f_midi2 *midi2, + struct usb_request *req, + int max_len) +{ + struct usb_ms20_gr_trm_block_header_descriptor header; + struct usb_ms20_gr_trm_block_descriptor *desc; + struct f_midi2_block_info *b; + struct f_midi2_ep *ep; + int i, blk, len; + char *data; + + len = sizeof(gtb_header_desc) + sizeof(gtb_desc) * midi2->total_blocks; + if (WARN_ON(len > midi2->info.req_buf_size)) + return; + + header = gtb_header_desc; + header.wTotalLength = cpu_to_le16(len); + if (max_len < len) { + len = min_t(int, len, sizeof(header)); + memcpy(req->buf, &header, len); + req->length = len; + req->zero = len < max_len; + return; + } + + memcpy(req->buf, &header, sizeof(header)); + data = req->buf + sizeof(header); + for (i = 0; i < midi2->num_eps; i++) { + ep = &midi2->midi2_eps[i]; + for (blk = 0; blk < ep->num_blks; blk++) { + b = &ep->blks[blk].info; + desc = (struct usb_ms20_gr_trm_block_descriptor *)data; + + *desc = gtb_desc; + desc->bGrpTrmBlkID = ep->blks[blk].gtb_id; + desc->bGrpTrmBlkType = ump_to_usb_dir(b->direction); + desc->nGroupTrm = b->first_group; + desc->nNumGroupTrm = b->num_groups; + desc->iBlockItem = ep->blks[blk].string_id; + + if (ep->info.protocol & SNDRV_UMP_EP_INFO_PROTO_MIDI2) + desc->bMIDIProtocol = USB_MS_MIDI_PROTO_2_0; + else + desc->bMIDIProtocol = USB_MS_MIDI_PROTO_1_0_128; + + if (b->is_midi1 == 2) { + desc->wMaxInputBandwidth = cpu_to_le16(1); + desc->wMaxOutputBandwidth = cpu_to_le16(1); + } + + data += sizeof(*desc); + } + } + + req->length = len; + req->zero = len < max_len; +} + +/* gadget function setup callback: handle GTB requests */ +static int f_midi2_setup(struct usb_function *fn, + const struct usb_ctrlrequest *ctrl) +{ + struct f_midi2 *midi2 = func_to_midi2(fn); + struct usb_composite_dev *cdev = fn->config->cdev; + struct usb_request *req = cdev->req; + u16 value, length; + + if ((ctrl->bRequestType & USB_TYPE_MASK) != USB_TYPE_STANDARD || + ctrl->bRequest != USB_REQ_GET_DESCRIPTOR) + return -EOPNOTSUPP; + + value = le16_to_cpu(ctrl->wValue); + length = le16_to_cpu(ctrl->wLength); + + if ((value >> 8) != USB_DT_CS_GR_TRM_BLOCK) + return -EOPNOTSUPP; + + /* handle only altset 1 */ + if ((value & 0xff) != 1) + return -EOPNOTSUPP; + + assign_block_descriptors(midi2, req, length); + return usb_ep_queue(cdev->gadget->ep0, req, GFP_ATOMIC); +} + +/* gadget function disable callback */ +static void f_midi2_disable(struct usb_function *fn) +{ + struct f_midi2 *midi2 = func_to_midi2(fn); + + midi2->operation_mode = MIDI_OP_MODE_UNSET; +} + +/* + * ALSA UMP ops: most of them are NOPs, only trigger for write is needed + */ +static int f_midi2_ump_open(struct snd_ump_endpoint *ump, int dir) +{ + return 0; +} + +static void f_midi2_ump_close(struct snd_ump_endpoint *ump, int dir) +{ +} + +static void f_midi2_ump_trigger(struct snd_ump_endpoint *ump, int dir, int up) +{ + struct f_midi2_ep *ep = ump->private_data; + struct f_midi2 *midi2 = ep->card; + + if (up && dir == SNDRV_RAWMIDI_STREAM_OUTPUT) { + switch (midi2->operation_mode) { + case MIDI_OP_MODE_MIDI1: + process_midi1_transmit(midi2); + break; + case MIDI_OP_MODE_MIDI2: + process_ump_transmit(ep); + break; + } + } +} + +static void f_midi2_ump_drain(struct snd_ump_endpoint *ump, int dir) +{ +} + +static const struct snd_ump_ops f_midi2_ump_ops = { + .open = f_midi2_ump_open, + .close = f_midi2_ump_close, + .trigger = f_midi2_ump_trigger, + .drain = f_midi2_ump_drain, +}; + +/* + * "Operation Mode" control element + */ +static int f_midi2_operation_mode_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->count = 1; + uinfo->value.integer.min = MIDI_OP_MODE_UNSET; + uinfo->value.integer.max = MIDI_OP_MODE_MIDI2; + return 0; +} + +static int f_midi2_operation_mode_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct f_midi2 *midi2 = snd_kcontrol_chip(kcontrol); + + ucontrol->value.integer.value[0] = midi2->operation_mode; + return 0; +} + +static const struct snd_kcontrol_new operation_mode_ctl = { + .iface = SNDRV_CTL_ELEM_IFACE_RAWMIDI, + .name = "Operation Mode", + .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, + .info = f_midi2_operation_mode_info, + .get = f_midi2_operation_mode_get, +}; + +/* + * ALSA UMP instance creation / deletion + */ +static void f_midi2_free_card(struct f_midi2 *midi2) +{ + if (midi2->card) { + snd_card_free_when_closed(midi2->card); + midi2->card = NULL; + } +} + +/* use a reverse direction for the gadget host */ +static int reverse_dir(int dir) +{ + if (!dir || dir == SNDRV_UMP_DIR_BIDIRECTION) + return dir; + return (dir == SNDRV_UMP_DIR_OUTPUT) ? + SNDRV_UMP_DIR_INPUT : SNDRV_UMP_DIR_OUTPUT; +} + +static int f_midi2_create_card(struct f_midi2 *midi2) +{ + struct snd_card *card; + struct snd_ump_endpoint *ump; + struct f_midi2_ep *ep; + int i, id, blk, err; + __be32 sw; + + err = snd_card_new(&midi2->gadget->dev, -1, NULL, THIS_MODULE, 0, + &card); + if (err < 0) + return err; + midi2->card = card; + + strcpy(card->driver, "f_midi2"); + strcpy(card->shortname, "MIDI 2.0 Gadget"); + strcpy(card->longname, "MIDI 2.0 Gadget"); + + id = 0; + for (i = 0; i < midi2->num_eps; i++) { + ep = &midi2->midi2_eps[i]; + err = snd_ump_endpoint_new(card, "MIDI 2.0 Gadget", id, + 1, 1, &ump); + if (err < 0) + goto error; + id++; + + ep->ump = ump; + ump->no_process_stream = true; + ump->private_data = ep; + ump->ops = &f_midi2_ump_ops; + if (midi2->info.static_block) + ump->info.flags |= SNDRV_UMP_EP_INFO_STATIC_BLOCKS; + ump->info.protocol_caps = (ep->info.protocol_caps & 3) << 8; + ump->info.protocol = (ep->info.protocol & 3) << 8; + ump->info.version = 0x0101; + ump->info.family_id = ep->info.family; + ump->info.model_id = ep->info.model; + ump->info.manufacturer_id = ep->info.manufacturer & 0xffffff; + sw = cpu_to_be32(ep->info.sw_revision); + memcpy(ump->info.sw_revision, &sw, 4); + + strscpy(ump->info.name, ump_ep_name(ep), + sizeof(ump->info.name)); + strscpy(ump->info.product_id, ump_product_id(ep), + sizeof(ump->info.product_id)); + strscpy(ump->core.name, ump->info.name, sizeof(ump->core.name)); + + for (blk = 0; blk < ep->num_blks; blk++) { + const struct f_midi2_block_info *b = &ep->blks[blk].info; + struct snd_ump_block *fb; + + err = snd_ump_block_new(ump, blk, + reverse_dir(b->direction), + b->first_group, b->num_groups, + &ep->blks[blk].fb); + if (err < 0) + goto error; + fb = ep->blks[blk].fb; + fb->info.active = !!b->active; + fb->info.midi_ci_version = b->midi_ci_version; + fb->info.ui_hint = reverse_dir(b->ui_hint); + fb->info.sysex8_streams = b->sysex8_streams; + fb->info.flags |= b->is_midi1; + strscpy(fb->info.name, ump_fb_name(b), + sizeof(fb->info.name)); + } + } + + for (i = 0; i < midi2->num_eps; i++) { + err = snd_ump_attach_legacy_rawmidi(midi2->midi2_eps[i].ump, + "Legacy MIDI", id); + if (err < 0) + goto error; + id++; + } + + err = snd_ctl_add(card, snd_ctl_new1(&operation_mode_ctl, midi2)); + if (err < 0) + goto error; + + err = snd_card_register(card); + if (err < 0) + goto error; + + return 0; + + error: + f_midi2_free_card(midi2); + return err; +} + +/* + * Creation of USB descriptors + */ +struct f_midi2_usb_config { + struct usb_descriptor_header **list; + unsigned int size; + unsigned int alloc; + + /* MIDI 1.0 jacks */ + unsigned char jack_in, jack_out, jack_id; + struct usb_midi_in_jack_descriptor jack_ins[MAX_CABLES]; + struct usb_midi_out_jack_descriptor_1 jack_outs[MAX_CABLES]; +}; + +static int append_config(struct f_midi2_usb_config *config, void *d) +{ + unsigned int size; + void *buf; + + if (config->size + 2 >= config->alloc) { + size = config->size + 16; + buf = krealloc(config->list, size * sizeof(void *), GFP_KERNEL); + if (!buf) + return -ENOMEM; + config->list = buf; + config->alloc = size; + } + + config->list[config->size] = d; + config->size++; + config->list[config->size] = NULL; + return 0; +} + +static int append_configs(struct f_midi2_usb_config *config, void **d) +{ + int err; + + for (; *d; d++) { + err = append_config(config, *d); + if (err) + return err; + } + return 0; +} + +static int append_midi1_in_jack(struct f_midi2 *midi2, + struct f_midi2_usb_config *config, + struct midi1_cable_mapping *map, + unsigned int type) +{ + struct usb_midi_in_jack_descriptor *jack = + &config->jack_ins[config->jack_in++]; + int id = ++config->jack_id; + int err; + + jack->bLength = 0x06; + jack->bDescriptorType = USB_DT_CS_INTERFACE; + jack->bDescriptorSubtype = USB_MS_MIDI_IN_JACK; + jack->bJackType = type; + jack->bJackID = id; + /* use the corresponding block name as jack name */ + if (map->ep) + jack->iJack = map->ep->blks[map->block].string_id; + + err = append_config(config, jack); + if (err < 0) + return err; + return id; +} + +static int append_midi1_out_jack(struct f_midi2 *midi2, + struct f_midi2_usb_config *config, + struct midi1_cable_mapping *map, + unsigned int type, unsigned int source) +{ + struct usb_midi_out_jack_descriptor_1 *jack = + &config->jack_outs[config->jack_out++]; + int id = ++config->jack_id; + int err; + + jack->bLength = 0x09; + jack->bDescriptorType = USB_DT_CS_INTERFACE; + jack->bDescriptorSubtype = USB_MS_MIDI_OUT_JACK; + jack->bJackType = type; + jack->bJackID = id; + jack->bNrInputPins = 1; + jack->pins[0].baSourceID = source; + jack->pins[0].baSourcePin = 0x01; + /* use the corresponding block name as jack name */ + if (map->ep) + jack->iJack = map->ep->blks[map->block].string_id; + + err = append_config(config, jack); + if (err < 0) + return err; + return id; +} + +static int f_midi2_create_usb_configs(struct f_midi2 *midi2, + struct f_midi2_usb_config *config, + int speed) +{ + void **midi1_in_eps, **midi1_out_eps; + int i, jack, total; + int err; + + switch (speed) { + default: + case USB_SPEED_HIGH: + midi2_midi1_ep_out_desc.wMaxPacketSize = cpu_to_le16(512); + midi2_midi1_ep_in_desc.wMaxPacketSize = cpu_to_le16(512); + for (i = 0; i < midi2->num_eps; i++) + midi2_midi2_ep_out_desc[i].wMaxPacketSize = + cpu_to_le16(512); + fallthrough; + case USB_SPEED_FULL: + midi1_in_eps = midi2_midi1_ep_in_descs; + midi1_out_eps = midi2_midi1_ep_out_descs; + break; + case USB_SPEED_SUPER: + midi2_midi1_ep_out_desc.wMaxPacketSize = cpu_to_le16(1024); + midi2_midi1_ep_in_desc.wMaxPacketSize = cpu_to_le16(1024); + for (i = 0; i < midi2->num_eps; i++) + midi2_midi2_ep_out_desc[i].wMaxPacketSize = + cpu_to_le16(1024); + midi1_in_eps = midi2_midi1_ep_in_ss_descs; + midi1_out_eps = midi2_midi1_ep_out_ss_descs; + break; + } + + err = append_configs(config, midi2_audio_descs); + if (err < 0) + return err; + + if (midi2->num_midi1_in && midi2->num_midi1_out) + midi2_midi1_if_desc.bNumEndpoints = 2; + else + midi2_midi1_if_desc.bNumEndpoints = 1; + + err = append_configs(config, midi2_midi1_descs); + if (err < 0) + return err; + + total = USB_DT_MS_HEADER_SIZE; + if (midi2->num_midi1_out) { + midi2_midi1_ep_out_class_desc.bLength = + USB_DT_MS_ENDPOINT_SIZE(midi2->num_midi1_out); + total += midi2_midi1_ep_out_class_desc.bLength; + midi2_midi1_ep_out_class_desc.bNumEmbMIDIJack = + midi2->num_midi1_out; + total += midi2->num_midi1_out * + (USB_DT_MIDI_IN_SIZE + USB_DT_MIDI_OUT_SIZE(1)); + for (i = 0; i < midi2->num_midi1_out; i++) { + jack = append_midi1_in_jack(midi2, config, + &midi2->in_cable_mapping[i], + USB_MS_EMBEDDED); + if (jack < 0) + return jack; + midi2_midi1_ep_out_class_desc.baAssocJackID[i] = jack; + jack = append_midi1_out_jack(midi2, config, + &midi2->in_cable_mapping[i], + USB_MS_EXTERNAL, jack); + if (jack < 0) + return jack; + } + } + + if (midi2->num_midi1_in) { + midi2_midi1_ep_in_class_desc.bLength = + USB_DT_MS_ENDPOINT_SIZE(midi2->num_midi1_in); + total += midi2_midi1_ep_in_class_desc.bLength; + midi2_midi1_ep_in_class_desc.bNumEmbMIDIJack = + midi2->num_midi1_in; + total += midi2->num_midi1_in * + (USB_DT_MIDI_IN_SIZE + USB_DT_MIDI_OUT_SIZE(1)); + for (i = 0; i < midi2->num_midi1_in; i++) { + jack = append_midi1_in_jack(midi2, config, + &midi2->out_cable_mapping[i], + USB_MS_EXTERNAL); + if (jack < 0) + return jack; + jack = append_midi1_out_jack(midi2, config, + &midi2->out_cable_mapping[i], + USB_MS_EMBEDDED, jack); + if (jack < 0) + return jack; + midi2_midi1_ep_in_class_desc.baAssocJackID[i] = jack; + } + } + + midi2_midi1_class_desc.wTotalLength = cpu_to_le16(total); + + if (midi2->num_midi1_out) { + err = append_configs(config, midi1_out_eps); + if (err < 0) + return err; + } + if (midi2->num_midi1_in) { + err = append_configs(config, midi1_in_eps); + if (err < 0) + return err; + } + + err = append_configs(config, midi2_midi2_descs); + if (err < 0) + return err; + + for (i = 0; i < midi2->num_eps; i++) { + err = append_config(config, &midi2_midi2_ep_out_desc[i]); + if (err < 0) + return err; + if (speed == USB_SPEED_SUPER || speed == USB_SPEED_SUPER_PLUS) { + err = append_config(config, &midi2_midi2_ep_out_ss_comp_desc); + if (err < 0) + return err; + } + err = append_config(config, &midi2_midi2_ep_out_class_desc[i]); + if (err < 0) + return err; + err = append_config(config, &midi2_midi2_ep_in_desc[i]); + if (err < 0) + return err; + if (speed == USB_SPEED_SUPER || speed == USB_SPEED_SUPER_PLUS) { + err = append_config(config, &midi2_midi2_ep_in_ss_comp_desc); + if (err < 0) + return err; + } + err = append_config(config, &midi2_midi2_ep_in_class_desc[i]); + if (err < 0) + return err; + } + + return 0; +} + +static void f_midi2_free_usb_configs(struct f_midi2_usb_config *config) +{ + kfree(config->list); + memset(config, 0, sizeof(*config)); +} + +/* as we use the static descriptors for simplicity, serialize bind call */ +static DEFINE_MUTEX(f_midi2_desc_mutex); + +/* fill MIDI2 EP class-specific descriptor */ +static void fill_midi2_class_desc(struct f_midi2_ep *ep, + struct usb_ms20_endpoint_descriptor_32 *cdesc) +{ + int blk; + + cdesc->bLength = USB_DT_MS20_ENDPOINT_SIZE(ep->num_blks); + cdesc->bDescriptorType = USB_DT_CS_ENDPOINT; + cdesc->bDescriptorSubtype = USB_MS_GENERAL_2_0; + cdesc->bNumGrpTrmBlock = ep->num_blks; + for (blk = 0; blk < ep->num_blks; blk++) + cdesc->baAssoGrpTrmBlkID[blk] = ep->blks[blk].gtb_id; +} + +/* initialize MIDI2 EP-in */ +static int f_midi2_init_midi2_ep_in(struct f_midi2 *midi2, int index) +{ + struct f_midi2_ep *ep = &midi2->midi2_eps[index]; + struct usb_endpoint_descriptor *desc = &midi2_midi2_ep_in_desc[index]; + + desc->bLength = USB_DT_ENDPOINT_SIZE; + desc->bDescriptorType = USB_DT_ENDPOINT; + desc->bEndpointAddress = USB_DIR_IN; + desc->bmAttributes = USB_ENDPOINT_XFER_INT; + desc->wMaxPacketSize = cpu_to_le16(EP_MAX_PACKET_INT); + desc->bInterval = 1; + + fill_midi2_class_desc(ep, &midi2_midi2_ep_in_class_desc[index]); + + return f_midi2_init_ep(midi2, ep, &ep->ep_in, desc, + f_midi2_ep_in_complete); +} + +/* initialize MIDI2 EP-out */ +static int f_midi2_init_midi2_ep_out(struct f_midi2 *midi2, int index) +{ + struct f_midi2_ep *ep = &midi2->midi2_eps[index]; + struct usb_endpoint_descriptor *desc = &midi2_midi2_ep_out_desc[index]; + + desc->bLength = USB_DT_ENDPOINT_SIZE; + desc->bDescriptorType = USB_DT_ENDPOINT; + desc->bEndpointAddress = USB_DIR_OUT; + desc->bmAttributes = USB_ENDPOINT_XFER_BULK; + + fill_midi2_class_desc(ep, &midi2_midi2_ep_out_class_desc[index]); + + return f_midi2_init_ep(midi2, ep, &ep->ep_out, desc, + f_midi2_ep_out_complete); +} + +/* gadget function bind callback */ +static int f_midi2_bind(struct usb_configuration *c, struct usb_function *f) +{ + struct usb_composite_dev *cdev = c->cdev; + struct f_midi2 *midi2 = func_to_midi2(f); + struct f_midi2_ep *ep; + struct f_midi2_usb_config config = {}; + struct usb_gadget_strings string_fn = { + .language = 0x0409, /* en-us */ + .strings = midi2->string_defs, + }; + struct usb_gadget_strings *strings[] = { + &string_fn, + NULL, + }; + int i, blk, status; + + midi2->gadget = cdev->gadget; + midi2->operation_mode = MIDI_OP_MODE_UNSET; + + status = f_midi2_create_card(midi2); + if (status < 0) + goto fail_register; + + /* maybe allocate device-global string ID */ + midi2->strings = usb_gstrings_attach(c->cdev, strings, + midi2->total_blocks + 1); + if (IS_ERR(midi2->strings)) { + status = PTR_ERR(midi2->strings); + goto fail_string; + } + + mutex_lock(&f_midi2_desc_mutex); + midi2_midi1_if_desc.iInterface = midi2->strings[STR_IFACE].id; + midi2_midi2_if_desc.iInterface = midi2->strings[STR_IFACE].id; + for (i = 0; i < midi2->num_eps; i++) { + ep = &midi2->midi2_eps[i]; + for (blk = 0; blk < ep->num_blks; blk++) + ep->blks[blk].string_id = + midi2->strings[gtb_to_str_id(ep->blks[blk].gtb_id)].id; + } + + midi2_midi2_if_desc.bNumEndpoints = midi2->num_eps * 2; + + /* audio interface */ + status = usb_interface_id(c, f); + if (status < 0) + goto fail; + midi2_audio_if_desc.bInterfaceNumber = status; + + /* MIDI streaming */ + status = usb_interface_id(c, f); + if (status < 0) + goto fail; + midi2->midi_if = status; + midi2_midi1_if_desc.bInterfaceNumber = status; + midi2_midi2_if_desc.bInterfaceNumber = status; + midi2_audio_class_desc.baInterfaceNr[0] = status; + + /* allocate instance-specific endpoints */ + if (midi2->midi2_eps[0].blks[0].info.direction != SNDRV_UMP_DIR_OUTPUT) { + status = f_midi2_init_ep(midi2, NULL, &midi2->midi1_ep_in, + &midi2_midi1_ep_in_desc, + f_midi2_midi1_ep_in_complete); + if (status) + goto fail; + } + + if (midi2->midi2_eps[0].blks[0].info.direction != SNDRV_UMP_DIR_INPUT) { + status = f_midi2_init_ep(midi2, NULL, &midi2->midi1_ep_out, + &midi2_midi1_ep_out_desc, + f_midi2_midi1_ep_out_complete); + if (status) + goto fail; + } + + for (i = 0; i < midi2->num_eps; i++) { + status = f_midi2_init_midi2_ep_in(midi2, i); + if (status) + goto fail; + status = f_midi2_init_midi2_ep_out(midi2, i); + if (status) + goto fail; + } + + status = f_midi2_create_usb_configs(midi2, &config, USB_SPEED_FULL); + if (status < 0) + goto fail; + f->fs_descriptors = usb_copy_descriptors(config.list); + if (!f->fs_descriptors) { + status = -ENOMEM; + goto fail; + } + f_midi2_free_usb_configs(&config); + + status = f_midi2_create_usb_configs(midi2, &config, USB_SPEED_HIGH); + if (status < 0) + goto fail; + f->hs_descriptors = usb_copy_descriptors(config.list); + if (!f->hs_descriptors) { + status = -ENOMEM; + goto fail; + } + f_midi2_free_usb_configs(&config); + + status = f_midi2_create_usb_configs(midi2, &config, USB_SPEED_SUPER); + if (status < 0) + goto fail; + f->ss_descriptors = usb_copy_descriptors(config.list); + if (!f->ss_descriptors) { + status = -ENOMEM; + goto fail; + } + f_midi2_free_usb_configs(&config); + + mutex_unlock(&f_midi2_desc_mutex); + return 0; + +fail: + f_midi2_free_usb_configs(&config); + mutex_unlock(&f_midi2_desc_mutex); + usb_free_all_descriptors(f); +fail_string: + f_midi2_free_card(midi2); +fail_register: + ERROR(midi2, "%s: can't bind, err %d\n", f->name, status); + return status; +} + +/* gadget function unbind callback */ +static void f_midi2_unbind(struct usb_configuration *c, struct usb_function *f) +{ + struct f_midi2 *midi2 = func_to_midi2(f); + int i; + + f_midi2_free_card(midi2); + + f_midi2_free_ep(&midi2->midi1_ep_in); + f_midi2_free_ep(&midi2->midi1_ep_out); + for (i = 0; i < midi2->num_eps; i++) { + f_midi2_free_ep(&midi2->midi2_eps[i].ep_in); + f_midi2_free_ep(&midi2->midi2_eps[i].ep_out); + } + + usb_free_all_descriptors(f); +} + +/* + * ConfigFS interface + */ + +/* type conversion helpers */ +static inline struct f_midi2_opts *to_f_midi2_opts(struct config_item *item) +{ + return container_of(to_config_group(item), struct f_midi2_opts, + func_inst.group); +} + +static inline struct f_midi2_ep_opts * +to_f_midi2_ep_opts(struct config_item *item) +{ + return container_of(to_config_group(item), struct f_midi2_ep_opts, + group); +} + +static inline struct f_midi2_block_opts * +to_f_midi2_block_opts(struct config_item *item) +{ + return container_of(to_config_group(item), struct f_midi2_block_opts, + group); +} + +/* trim the string to be usable for EP and FB name strings */ +static void make_name_string(char *s) +{ + char *p; + + p = strchr(s, '\n'); + if (p) + *p = 0; + + p = s + strlen(s); + for (; p > s && isspace(*p); p--) + *p = 0; +} + +/* configfs helpers: generic show/store for unisnged int */ +static ssize_t f_midi2_opts_uint_show(struct f_midi2_opts *opts, + u32 val, const char *format, char *page) +{ + int result; + + mutex_lock(&opts->lock); + result = sprintf(page, format, val); + mutex_unlock(&opts->lock); + return result; +} + +static ssize_t f_midi2_opts_uint_store(struct f_midi2_opts *opts, + u32 *valp, u32 minval, u32 maxval, + const char *page, size_t len) +{ + int ret; + u32 val; + + mutex_lock(&opts->lock); + if (opts->refcnt) { + ret = -EBUSY; + goto end; + } + + ret = kstrtou32(page, 0, &val); + if (ret) + goto end; + if (val < minval || val > maxval) { + ret = -EINVAL; + goto end; + } + + *valp = val; + ret = len; + +end: + mutex_unlock(&opts->lock); + return ret; +} + +/* generic store for bool */ +static ssize_t f_midi2_opts_bool_store(struct f_midi2_opts *opts, + bool *valp, const char *page, size_t len) +{ + int ret; + bool val; + + mutex_lock(&opts->lock); + if (opts->refcnt) { + ret = -EBUSY; + goto end; + } + + ret = kstrtobool(page, &val); + if (ret) + goto end; + *valp = val; + ret = len; + +end: + mutex_unlock(&opts->lock); + return ret; +} + +/* generic show/store for string */ +static ssize_t f_midi2_opts_str_show(struct f_midi2_opts *opts, + const char *str, char *page) +{ + int result = 0; + + mutex_lock(&opts->lock); + if (str) + result = scnprintf(page, PAGE_SIZE, "%s\n", str); + mutex_unlock(&opts->lock); + return result; +} + +static ssize_t f_midi2_opts_str_store(struct f_midi2_opts *opts, + const char **strp, size_t maxlen, + const char *page, size_t len) +{ + char *c; + int ret; + + mutex_lock(&opts->lock); + if (opts->refcnt) { + ret = -EBUSY; + goto end; + } + + c = kstrndup(page, min(len, maxlen), GFP_KERNEL); + if (!c) { + ret = -ENOMEM; + goto end; + } + + kfree(*strp); + make_name_string(c); + *strp = c; + ret = len; + +end: + mutex_unlock(&opts->lock); + return ret; +} + +/* + * Definitions for UMP Block config + */ + +/* define an uint option for block */ +#define F_MIDI2_BLOCK_OPT(name, format, minval, maxval) \ +static ssize_t f_midi2_block_opts_##name##_show(struct config_item *item,\ + char *page) \ +{ \ + struct f_midi2_block_opts *opts = to_f_midi2_block_opts(item); \ + return f_midi2_opts_uint_show(opts->ep->opts, opts->info.name, \ + format "\n", page); \ +} \ + \ +static ssize_t f_midi2_block_opts_##name##_store(struct config_item *item,\ + const char *page, size_t len) \ +{ \ + struct f_midi2_block_opts *opts = to_f_midi2_block_opts(item); \ + return f_midi2_opts_uint_store(opts->ep->opts, &opts->info.name,\ + minval, maxval, page, len); \ +} \ + \ +CONFIGFS_ATTR(f_midi2_block_opts_, name) + +/* define a boolean option for block */ +#define F_MIDI2_BLOCK_BOOL_OPT(name) \ +static ssize_t f_midi2_block_opts_##name##_show(struct config_item *item,\ + char *page) \ +{ \ + struct f_midi2_block_opts *opts = to_f_midi2_block_opts(item); \ + return f_midi2_opts_uint_show(opts->ep->opts, opts->info.name, \ + "%u\n", page); \ +} \ + \ +static ssize_t f_midi2_block_opts_##name##_store(struct config_item *item,\ + const char *page, size_t len) \ +{ \ + struct f_midi2_block_opts *opts = to_f_midi2_block_opts(item); \ + return f_midi2_opts_bool_store(opts->ep->opts, &opts->info.name,\ + page, len); \ +} \ + \ +CONFIGFS_ATTR(f_midi2_block_opts_, name) + +F_MIDI2_BLOCK_OPT(direction, "0x%x", 1, 3); +F_MIDI2_BLOCK_OPT(first_group, "0x%x", 0, 15); +F_MIDI2_BLOCK_OPT(num_groups, "0x%x", 1, 16); +F_MIDI2_BLOCK_OPT(midi1_first_group, "0x%x", 0, 15); +F_MIDI2_BLOCK_OPT(midi1_num_groups, "0x%x", 0, 16); +F_MIDI2_BLOCK_OPT(ui_hint, "0x%x", 0, 3); +F_MIDI2_BLOCK_OPT(midi_ci_version, "%u", 0, 1); +F_MIDI2_BLOCK_OPT(sysex8_streams, "%u", 0, 255); +F_MIDI2_BLOCK_OPT(is_midi1, "%u", 0, 2); +F_MIDI2_BLOCK_BOOL_OPT(active); + +static ssize_t f_midi2_block_opts_name_show(struct config_item *item, + char *page) +{ + struct f_midi2_block_opts *opts = to_f_midi2_block_opts(item); + + return f_midi2_opts_str_show(opts->ep->opts, opts->info.name, page); +} + +static ssize_t f_midi2_block_opts_name_store(struct config_item *item, + const char *page, size_t len) +{ + struct f_midi2_block_opts *opts = to_f_midi2_block_opts(item); + + return f_midi2_opts_str_store(opts->ep->opts, &opts->info.name, 128, + page, len); +} + +CONFIGFS_ATTR(f_midi2_block_opts_, name); + +static struct configfs_attribute *f_midi2_block_attrs[] = { + &f_midi2_block_opts_attr_direction, + &f_midi2_block_opts_attr_first_group, + &f_midi2_block_opts_attr_num_groups, + &f_midi2_block_opts_attr_midi1_first_group, + &f_midi2_block_opts_attr_midi1_num_groups, + &f_midi2_block_opts_attr_ui_hint, + &f_midi2_block_opts_attr_midi_ci_version, + &f_midi2_block_opts_attr_sysex8_streams, + &f_midi2_block_opts_attr_is_midi1, + &f_midi2_block_opts_attr_active, + &f_midi2_block_opts_attr_name, + NULL, +}; + +static void f_midi2_block_opts_release(struct config_item *item) +{ + struct f_midi2_block_opts *opts = to_f_midi2_block_opts(item); + + kfree(opts->info.name); + kfree(opts); +} + +static struct configfs_item_operations f_midi2_block_item_ops = { + .release = f_midi2_block_opts_release, +}; + +static const struct config_item_type f_midi2_block_type = { + .ct_item_ops = &f_midi2_block_item_ops, + .ct_attrs = f_midi2_block_attrs, + .ct_owner = THIS_MODULE, +}; + +/* create a f_midi2_block_opts instance for the given block number */ +static int f_midi2_block_opts_create(struct f_midi2_ep_opts *ep_opts, + unsigned int blk, + struct f_midi2_block_opts **block_p) +{ + struct f_midi2_block_opts *block_opts; + int ret = 0; + + mutex_lock(&ep_opts->opts->lock); + if (ep_opts->opts->refcnt || ep_opts->blks[blk]) { + ret = -EBUSY; + goto out; + } + + block_opts = kzalloc(sizeof(*block_opts), GFP_KERNEL); + if (!block_opts) { + ret = -ENOMEM; + goto out; + } + + block_opts->ep = ep_opts; + block_opts->id = blk; + + /* set up the default values */ + block_opts->info.direction = SNDRV_UMP_DIR_BIDIRECTION; + block_opts->info.first_group = 0; + block_opts->info.num_groups = 1; + block_opts->info.ui_hint = SNDRV_UMP_BLOCK_UI_HINT_BOTH; + block_opts->info.active = 1; + + ep_opts->blks[blk] = block_opts; + *block_p = block_opts; + + out: + mutex_unlock(&ep_opts->opts->lock); + return ret; +} + +/* make_group callback for a block */ +static struct config_group * +f_midi2_opts_block_make(struct config_group *group, const char *name) +{ + struct f_midi2_ep_opts *ep_opts; + struct f_midi2_block_opts *block_opts; + unsigned int blk; + int ret; + + if (strncmp(name, "block.", 6)) + return ERR_PTR(-EINVAL); + ret = kstrtouint(name + 6, 10, &blk); + if (ret) + return ERR_PTR(ret); + + ep_opts = to_f_midi2_ep_opts(&group->cg_item); + + if (blk >= SNDRV_UMP_MAX_BLOCKS) + return ERR_PTR(-EINVAL); + if (ep_opts->blks[blk]) + return ERR_PTR(-EBUSY); + ret = f_midi2_block_opts_create(ep_opts, blk, &block_opts); + if (ret) + return ERR_PTR(ret); + + config_group_init_type_name(&block_opts->group, name, + &f_midi2_block_type); + return &block_opts->group; +} + +/* drop_item callback for a block */ +static void +f_midi2_opts_block_drop(struct config_group *group, struct config_item *item) +{ + struct f_midi2_block_opts *block_opts = to_f_midi2_block_opts(item); + + mutex_lock(&block_opts->ep->opts->lock); + block_opts->ep->blks[block_opts->id] = NULL; + mutex_unlock(&block_opts->ep->opts->lock); + config_item_put(item); +} + +/* + * Definitions for UMP Endpoint config + */ + +/* define an uint option for EP */ +#define F_MIDI2_EP_OPT(name, format, minval, maxval) \ +static ssize_t f_midi2_ep_opts_##name##_show(struct config_item *item, \ + char *page) \ +{ \ + struct f_midi2_ep_opts *opts = to_f_midi2_ep_opts(item); \ + return f_midi2_opts_uint_show(opts->opts, opts->info.name, \ + format "\n", page); \ +} \ + \ +static ssize_t f_midi2_ep_opts_##name##_store(struct config_item *item, \ + const char *page, size_t len)\ +{ \ + struct f_midi2_ep_opts *opts = to_f_midi2_ep_opts(item); \ + return f_midi2_opts_uint_store(opts->opts, &opts->info.name, \ + minval, maxval, page, len); \ +} \ + \ +CONFIGFS_ATTR(f_midi2_ep_opts_, name) + +/* define a string option for EP */ +#define F_MIDI2_EP_STR_OPT(name, maxlen) \ +static ssize_t f_midi2_ep_opts_##name##_show(struct config_item *item, \ + char *page) \ +{ \ + struct f_midi2_ep_opts *opts = to_f_midi2_ep_opts(item); \ + return f_midi2_opts_str_show(opts->opts, opts->info.name, page);\ +} \ + \ +static ssize_t f_midi2_ep_opts_##name##_store(struct config_item *item, \ + const char *page, size_t len) \ +{ \ + struct f_midi2_ep_opts *opts = to_f_midi2_ep_opts(item); \ + return f_midi2_opts_str_store(opts->opts, &opts->info.name, maxlen,\ + page, len); \ +} \ + \ +CONFIGFS_ATTR(f_midi2_ep_opts_, name) + +F_MIDI2_EP_OPT(protocol, "0x%x", 1, 2); +F_MIDI2_EP_OPT(protocol_caps, "0x%x", 1, 3); +F_MIDI2_EP_OPT(manufacturer, "0x%x", 0, 0xffffff); +F_MIDI2_EP_OPT(family, "0x%x", 0, 0xffff); +F_MIDI2_EP_OPT(model, "0x%x", 0, 0xffff); +F_MIDI2_EP_OPT(sw_revision, "0x%x", 0, 0xffffffff); +F_MIDI2_EP_STR_OPT(ep_name, 128); +F_MIDI2_EP_STR_OPT(product_id, 128); + +static struct configfs_attribute *f_midi2_ep_attrs[] = { + &f_midi2_ep_opts_attr_protocol, + &f_midi2_ep_opts_attr_protocol_caps, + &f_midi2_ep_opts_attr_ep_name, + &f_midi2_ep_opts_attr_product_id, + &f_midi2_ep_opts_attr_manufacturer, + &f_midi2_ep_opts_attr_family, + &f_midi2_ep_opts_attr_model, + &f_midi2_ep_opts_attr_sw_revision, + NULL, +}; + +static void f_midi2_ep_opts_release(struct config_item *item) +{ + struct f_midi2_ep_opts *opts = to_f_midi2_ep_opts(item); + + kfree(opts->info.ep_name); + kfree(opts->info.product_id); + kfree(opts); +} + +static struct configfs_item_operations f_midi2_ep_item_ops = { + .release = f_midi2_ep_opts_release, +}; + +static struct configfs_group_operations f_midi2_ep_group_ops = { + .make_group = f_midi2_opts_block_make, + .drop_item = f_midi2_opts_block_drop, +}; + +static const struct config_item_type f_midi2_ep_type = { + .ct_item_ops = &f_midi2_ep_item_ops, + .ct_group_ops = &f_midi2_ep_group_ops, + .ct_attrs = f_midi2_ep_attrs, + .ct_owner = THIS_MODULE, +}; + +/* create a f_midi2_ep_opts instance */ +static int f_midi2_ep_opts_create(struct f_midi2_opts *opts, + unsigned int index, + struct f_midi2_ep_opts **ep_p) +{ + struct f_midi2_ep_opts *ep_opts; + + ep_opts = kzalloc(sizeof(*ep_opts), GFP_KERNEL); + if (!ep_opts) + return -ENOMEM; + + ep_opts->opts = opts; + ep_opts->index = index; + + /* set up the default values */ + ep_opts->info.protocol = 2; + ep_opts->info.protocol_caps = 3; + + opts->eps[index] = ep_opts; + *ep_p = ep_opts; + return 0; +} + +/* make_group callback for an EP */ +static struct config_group * +f_midi2_opts_ep_make(struct config_group *group, const char *name) +{ + struct f_midi2_opts *opts; + struct f_midi2_ep_opts *ep_opts; + unsigned int index; + int ret; + + if (strncmp(name, "ep.", 3)) + return ERR_PTR(-EINVAL); + ret = kstrtouint(name + 3, 10, &index); + if (ret) + return ERR_PTR(ret); + + opts = to_f_midi2_opts(&group->cg_item); + if (index >= MAX_UMP_EPS) + return ERR_PTR(-EINVAL); + if (opts->eps[index]) + return ERR_PTR(-EBUSY); + ret = f_midi2_ep_opts_create(opts, index, &ep_opts); + if (ret) + return ERR_PTR(ret); + + config_group_init_type_name(&ep_opts->group, name, &f_midi2_ep_type); + return &ep_opts->group; +} + +/* drop_item callback for an EP */ +static void +f_midi2_opts_ep_drop(struct config_group *group, struct config_item *item) +{ + struct f_midi2_ep_opts *ep_opts = to_f_midi2_ep_opts(item); + + mutex_lock(&ep_opts->opts->lock); + ep_opts->opts->eps[ep_opts->index] = NULL; + mutex_unlock(&ep_opts->opts->lock); + config_item_put(item); +} + +/* + * Definitions for card config + */ + +/* define a bool option for card */ +#define F_MIDI2_BOOL_OPT(name) \ +static ssize_t f_midi2_opts_##name##_show(struct config_item *item, \ + char *page) \ +{ \ + struct f_midi2_opts *opts = to_f_midi2_opts(item); \ + return f_midi2_opts_uint_show(opts, opts->info.name, \ + "%u\n", page); \ +} \ + \ +static ssize_t f_midi2_opts_##name##_store(struct config_item *item, \ + const char *page, size_t len) \ +{ \ + struct f_midi2_opts *opts = to_f_midi2_opts(item); \ + return f_midi2_opts_bool_store(opts, &opts->info.name, \ + page, len); \ +} \ + \ +CONFIGFS_ATTR(f_midi2_opts_, name) + +F_MIDI2_BOOL_OPT(process_ump); +F_MIDI2_BOOL_OPT(static_block); + +static ssize_t f_midi2_opts_iface_name_show(struct config_item *item, + char *page) +{ + struct f_midi2_opts *opts = to_f_midi2_opts(item); + + return f_midi2_opts_str_show(opts, opts->info.iface_name, page); +} + +static ssize_t f_midi2_opts_iface_name_store(struct config_item *item, + const char *page, size_t len) +{ + struct f_midi2_opts *opts = to_f_midi2_opts(item); + + return f_midi2_opts_str_store(opts, &opts->info.iface_name, 128, + page, len); +} + +CONFIGFS_ATTR(f_midi2_opts_, iface_name); + +static struct configfs_attribute *f_midi2_attrs[] = { + &f_midi2_opts_attr_process_ump, + &f_midi2_opts_attr_static_block, + &f_midi2_opts_attr_iface_name, + NULL +}; + +static void f_midi2_opts_release(struct config_item *item) +{ + struct f_midi2_opts *opts = to_f_midi2_opts(item); + + usb_put_function_instance(&opts->func_inst); +} + +static struct configfs_item_operations f_midi2_item_ops = { + .release = f_midi2_opts_release, +}; + +static struct configfs_group_operations f_midi2_group_ops = { + .make_group = f_midi2_opts_ep_make, + .drop_item = f_midi2_opts_ep_drop, +}; + +static const struct config_item_type f_midi2_func_type = { + .ct_item_ops = &f_midi2_item_ops, + .ct_group_ops = &f_midi2_group_ops, + .ct_attrs = f_midi2_attrs, + .ct_owner = THIS_MODULE, +}; + +static void f_midi2_free_inst(struct usb_function_instance *f) +{ + struct f_midi2_opts *opts; + + opts = container_of(f, struct f_midi2_opts, func_inst); + + kfree(opts->info.iface_name); + kfree(opts); +} + +/* gadget alloc_inst */ +static struct usb_function_instance *f_midi2_alloc_inst(void) +{ + struct f_midi2_opts *opts; + struct f_midi2_ep_opts *ep_opts; + struct f_midi2_block_opts *block_opts; + int ret; + + opts = kzalloc(sizeof(*opts), GFP_KERNEL); + if (!opts) + return ERR_PTR(-ENOMEM); + + mutex_init(&opts->lock); + opts->func_inst.free_func_inst = f_midi2_free_inst; + opts->info.process_ump = true; + opts->info.static_block = true; + opts->info.num_reqs = 32; + opts->info.req_buf_size = 512; + + /* create the default ep */ + ret = f_midi2_ep_opts_create(opts, 0, &ep_opts); + if (ret) { + kfree(opts); + return ERR_PTR(ret); + } + + /* create the default block */ + ret = f_midi2_block_opts_create(ep_opts, 0, &block_opts); + if (ret) { + kfree(ep_opts); + kfree(opts); + return ERR_PTR(ret); + } + + /* set up the default MIDI1 (that is mandatory) */ + block_opts->info.midi1_num_groups = 1; + + config_group_init_type_name(&opts->func_inst.group, "", + &f_midi2_func_type); + + config_group_init_type_name(&ep_opts->group, "ep.0", + &f_midi2_ep_type); + configfs_add_default_group(&ep_opts->group, &opts->func_inst.group); + + config_group_init_type_name(&block_opts->group, "block.0", + &f_midi2_block_type); + configfs_add_default_group(&block_opts->group, &ep_opts->group); + + return &opts->func_inst; +} + +static void do_f_midi2_free(struct f_midi2 *midi2, struct f_midi2_opts *opts) +{ + mutex_lock(&opts->lock); + --opts->refcnt; + mutex_unlock(&opts->lock); + kfree(midi2->string_defs); + kfree(midi2); +} + +static void f_midi2_free(struct usb_function *f) +{ + do_f_midi2_free(func_to_midi2(f), + container_of(f->fi, struct f_midi2_opts, func_inst)); +} + +/* verify the parameters set up via configfs; + * return the number of EPs or a negative error + */ +static int verify_parameters(struct f_midi2_opts *opts) +{ + int i, j, num_eps, num_blks; + struct f_midi2_ep_info *ep; + struct f_midi2_block_info *bp; + + for (num_eps = 0; num_eps < MAX_UMP_EPS && opts->eps[num_eps]; + num_eps++) + ; + if (!num_eps) { + pr_err("f_midi2: No EP is defined\n"); + return -EINVAL; + } + + num_blks = 0; + for (i = 0; i < num_eps; i++) { + ep = &opts->eps[i]->info; + if (!(ep->protocol_caps & ep->protocol)) { + pr_err("f_midi2: Invalid protocol 0x%x (caps 0x%x) for EP %d\n", + ep->protocol, ep->protocol_caps, i); + return -EINVAL; + } + + for (j = 0; j < SNDRV_UMP_MAX_BLOCKS && opts->eps[i]->blks[j]; + j++, num_blks++) { + bp = &opts->eps[i]->blks[j]->info; + if (bp->first_group + bp->num_groups > SNDRV_UMP_MAX_GROUPS) { + pr_err("f_midi2: Invalid group definitions for block %d:%d\n", + i, j); + return -EINVAL; + } + + if (bp->midi1_num_groups) { + if (bp->midi1_first_group < bp->first_group || + bp->midi1_first_group + bp->midi1_num_groups > + bp->first_group + bp->num_groups) { + pr_err("f_midi2: Invalid MIDI1 group definitions for block %d:%d\n", + i, j); + return -EINVAL; + } + } + } + } + if (!num_blks) { + pr_err("f_midi2: No block is defined\n"); + return -EINVAL; + } + + return num_eps; +} + +/* fill mapping between MIDI 1.0 cable and UMP EP/group */ +static void fill_midi1_cable_mapping(struct f_midi2 *midi2, + struct f_midi2_ep *ep, + int blk) +{ + const struct f_midi2_block_info *binfo = &ep->blks[blk].info; + struct midi1_cable_mapping *map; + int i, group; + + if (!binfo->midi1_num_groups) + return; + if (binfo->direction != SNDRV_UMP_DIR_OUTPUT) { + group = binfo->midi1_first_group; + map = midi2->in_cable_mapping + midi2->num_midi1_in; + for (i = 0; i < binfo->midi1_num_groups; i++, group++, map++) { + if (midi2->num_midi1_in >= MAX_CABLES) + break; + map->ep = ep; + map->block = blk; + map->group = group; + midi2->num_midi1_in++; + /* store 1-based cable number */ + ep->in_group_to_cable[group] = midi2->num_midi1_in; + } + } + + if (binfo->direction != SNDRV_UMP_DIR_INPUT) { + group = binfo->midi1_first_group; + map = midi2->out_cable_mapping + midi2->num_midi1_out; + for (i = 0; i < binfo->midi1_num_groups; i++, group++, map++) { + if (midi2->num_midi1_out >= MAX_CABLES) + break; + map->ep = ep; + map->block = blk; + map->group = group; + midi2->num_midi1_out++; + } + } +} + +/* gadget alloc callback */ +static struct usb_function *f_midi2_alloc(struct usb_function_instance *fi) +{ + struct f_midi2 *midi2; + struct f_midi2_opts *opts; + struct f_midi2_ep *ep; + struct f_midi2_block *bp; + int i, num_eps, blk; + + midi2 = kzalloc(sizeof(*midi2), GFP_KERNEL); + if (!midi2) + return ERR_PTR(-ENOMEM); + + opts = container_of(fi, struct f_midi2_opts, func_inst); + mutex_lock(&opts->lock); + num_eps = verify_parameters(opts); + if (num_eps < 0) { + mutex_unlock(&opts->lock); + kfree(midi2); + return ERR_PTR(num_eps); + } + ++opts->refcnt; + mutex_unlock(&opts->lock); + + spin_lock_init(&midi2->queue_lock); + + midi2->func.name = "midi2_func"; + midi2->func.bind = f_midi2_bind; + midi2->func.unbind = f_midi2_unbind; + midi2->func.get_alt = f_midi2_get_alt; + midi2->func.set_alt = f_midi2_set_alt; + midi2->func.setup = f_midi2_setup; + midi2->func.disable = f_midi2_disable; + midi2->func.free_func = f_midi2_free; + + midi2->info = opts->info; + midi2->num_eps = num_eps; + + for (i = 0; i < num_eps; i++) { + ep = &midi2->midi2_eps[i]; + ep->info = opts->eps[i]->info; + ep->card = midi2; + for (blk = 0; blk < SNDRV_UMP_MAX_BLOCKS && + opts->eps[i]->blks[blk]; blk++) { + bp = &ep->blks[blk]; + ep->num_blks++; + bp->info = opts->eps[i]->blks[blk]->info; + bp->gtb_id = ++midi2->total_blocks; + } + } + + midi2->string_defs = kcalloc(midi2->total_blocks + 1, + sizeof(*midi2->string_defs), GFP_KERNEL); + if (!midi2->string_defs) { + do_f_midi2_free(midi2, opts); + return ERR_PTR(-ENOMEM); + } + + if (opts->info.iface_name && *opts->info.iface_name) + midi2->string_defs[STR_IFACE].s = opts->info.iface_name; + else + midi2->string_defs[STR_IFACE].s = ump_ep_name(&midi2->midi2_eps[0]); + + for (i = 0; i < midi2->num_eps; i++) { + ep = &midi2->midi2_eps[i]; + for (blk = 0; blk < ep->num_blks; blk++) { + bp = &ep->blks[blk]; + midi2->string_defs[gtb_to_str_id(bp->gtb_id)].s = + ump_fb_name(&bp->info); + + fill_midi1_cable_mapping(midi2, ep, blk); + } + } + + if (!midi2->num_midi1_in && !midi2->num_midi1_out) { + pr_err("f_midi2: MIDI1 definition is missing\n"); + do_f_midi2_free(midi2, opts); + return ERR_PTR(-EINVAL); + } + + return &midi2->func; +} + +DECLARE_USB_FUNCTION_INIT(midi2, f_midi2_alloc_inst, f_midi2_alloc); + +MODULE_LICENSE("GPL"); diff --git a/drivers/usb/gadget/function/f_ncm.c b/drivers/usb/gadget/function/f_ncm.c index 424bb3b666db..feccf4c8cc4f 100644 --- a/drivers/usb/gadget/function/f_ncm.c +++ b/drivers/usb/gadget/function/f_ncm.c @@ -80,21 +80,6 @@ static inline struct f_ncm *func_to_ncm(struct usb_function *f) return container_of(f, struct f_ncm, port.func); } -/* peak (theoretical) bulk transfer rate in bits-per-second */ -static inline unsigned ncm_bitrate(struct usb_gadget *g) -{ - if (!g) - return 0; - else if (gadget_is_superspeed(g) && g->speed >= USB_SPEED_SUPER_PLUS) - return 4250000000U; - else if (gadget_is_superspeed(g) && g->speed == USB_SPEED_SUPER) - return 3750000000U; - else if (gadget_is_dualspeed(g) && g->speed == USB_SPEED_HIGH) - return 13 * 512 * 8 * 1000 * 8; - else - return 19 * 64 * 1 * 1000 * 8; -} - /*-------------------------------------------------------------------------*/ /* @@ -576,10 +561,10 @@ static void ncm_do_notify(struct f_ncm *ncm) /* SPEED_CHANGE data is up/down speeds in bits/sec */ data = req->buf + sizeof *event; - data[0] = cpu_to_le32(ncm_bitrate(cdev->gadget)); + data[0] = cpu_to_le32(gether_bitrate(cdev->gadget)); data[1] = data[0]; - DBG(cdev, "notify speed %u\n", ncm_bitrate(cdev->gadget)); + DBG(cdev, "notify speed %u\n", gether_bitrate(cdev->gadget)); ncm->notify_state = NCM_NOTIFY_CONNECT; break; } @@ -1544,9 +1529,7 @@ static int ncm_bind(struct usb_configuration *c, struct usb_function *f) hrtimer_init(&ncm->task_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL_SOFT); ncm->task_timer.function = ncm_tx_timeout; - DBG(cdev, "CDC Network: %s speed IN/%s OUT/%s NOTIFY/%s\n", - gadget_is_superspeed(c->cdev->gadget) ? "super" : - gadget_is_dualspeed(c->cdev->gadget) ? "dual" : "full", + DBG(cdev, "CDC Network: IN/%s OUT/%s NOTIFY/%s\n", ncm->port.in_ep->name, ncm->port.out_ep->name, ncm->notify->name); return 0; diff --git a/drivers/usb/gadget/function/f_obex.c b/drivers/usb/gadget/function/f_obex.c index ab26d84ed95e..dcb093210305 100644 --- a/drivers/usb/gadget/function/f_obex.c +++ b/drivers/usb/gadget/function/f_obex.c @@ -365,9 +365,8 @@ static int obex_bind(struct usb_configuration *c, struct usb_function *f) if (status) goto fail; - dev_dbg(&cdev->gadget->dev, "obex ttyGS%d: %s speed IN/%s OUT/%s\n", + dev_dbg(&cdev->gadget->dev, "obex ttyGS%d: IN/%s OUT/%s\n", obex->port_num, - gadget_is_dualspeed(c->cdev->gadget) ? "dual" : "full", obex->port.in->name, obex->port.out->name); return 0; diff --git a/drivers/usb/gadget/function/f_rndis.c b/drivers/usb/gadget/function/f_rndis.c index ee95e8f5f9d4..b47f99d17ee9 100644 --- a/drivers/usb/gadget/function/f_rndis.c +++ b/drivers/usb/gadget/function/f_rndis.c @@ -84,19 +84,6 @@ static inline struct f_rndis *func_to_rndis(struct usb_function *f) return container_of(f, struct f_rndis, port.func); } -/* peak (theoretical) bulk transfer rate in bits-per-second */ -static unsigned int bitrate(struct usb_gadget *g) -{ - if (gadget_is_superspeed(g) && g->speed >= USB_SPEED_SUPER_PLUS) - return 4250000000U; - if (gadget_is_superspeed(g) && g->speed == USB_SPEED_SUPER) - return 3750000000U; - else if (gadget_is_dualspeed(g) && g->speed == USB_SPEED_HIGH) - return 13 * 512 * 8 * 1000 * 8; - else - return 19 * 64 * 1 * 1000 * 8; -} - /*-------------------------------------------------------------------------*/ /* @@ -640,7 +627,7 @@ static void rndis_open(struct gether *geth) DBG(cdev, "%s\n", __func__); rndis_set_param_medium(rndis->params, RNDIS_MEDIUM_802_3, - bitrate(cdev->gadget) / 100); + gether_bitrate(cdev->gadget) / 100); rndis_signal_connect(rndis->params); } @@ -811,9 +798,7 @@ rndis_bind(struct usb_configuration *c, struct usb_function *f) * until we're activated via set_alt(). */ - DBG(cdev, "RNDIS: %s speed IN/%s OUT/%s NOTIFY/%s\n", - gadget_is_superspeed(c->cdev->gadget) ? "super" : - gadget_is_dualspeed(c->cdev->gadget) ? "dual" : "full", + DBG(cdev, "RNDIS: IN/%s OUT/%s NOTIFY/%s\n", rndis->port.in_ep->name, rndis->port.out_ep->name, rndis->notify->name); return 0; diff --git a/drivers/usb/gadget/function/f_serial.c b/drivers/usb/gadget/function/f_serial.c index a9480b9e312e..65c50092aea2 100644 --- a/drivers/usb/gadget/function/f_serial.c +++ b/drivers/usb/gadget/function/f_serial.c @@ -236,10 +236,8 @@ static int gser_bind(struct usb_configuration *c, struct usb_function *f) gser_ss_function, gser_ss_function); if (status) goto fail; - dev_dbg(&cdev->gadget->dev, "generic ttyGS%d: %s speed IN/%s OUT/%s\n", + dev_dbg(&cdev->gadget->dev, "generic ttyGS%d: IN/%s OUT/%s\n", gser->port_num, - gadget_is_superspeed(c->cdev->gadget) ? "super" : - gadget_is_dualspeed(c->cdev->gadget) ? "dual" : "full", gser->port.in->name, gser->port.out->name); return 0; diff --git a/drivers/usb/gadget/function/f_sourcesink.c b/drivers/usb/gadget/function/f_sourcesink.c index 6803cd60cc6d..2edbd9b510d6 100644 --- a/drivers/usb/gadget/function/f_sourcesink.c +++ b/drivers/usb/gadget/function/f_sourcesink.c @@ -436,9 +436,7 @@ no_iso: if (ret) return ret; - DBG(cdev, "%s speed %s: IN/%s, OUT/%s, ISO-IN/%s, ISO-OUT/%s\n", - (gadget_is_superspeed(c->cdev->gadget) ? "super" : - (gadget_is_dualspeed(c->cdev->gadget) ? "dual" : "full")), + DBG(cdev, "%s: IN/%s, OUT/%s, ISO-IN/%s, ISO-OUT/%s\n", f->name, ss->in_ep->name, ss->out_ep->name, ss->iso_in_ep ? ss->iso_in_ep->name : "", ss->iso_out_ep ? ss->iso_out_ep->name : ""); diff --git a/drivers/usb/gadget/function/f_subset.c b/drivers/usb/gadget/function/f_subset.c index 51c1cae162d9..8ae9689ef2a0 100644 --- a/drivers/usb/gadget/function/f_subset.c +++ b/drivers/usb/gadget/function/f_subset.c @@ -367,9 +367,7 @@ geth_bind(struct usb_configuration *c, struct usb_function *f) * until we're activated via set_alt(). */ - DBG(cdev, "CDC Subset: %s speed IN/%s OUT/%s\n", - gadget_is_superspeed(c->cdev->gadget) ? "super" : - gadget_is_dualspeed(c->cdev->gadget) ? "dual" : "full", + DBG(cdev, "CDC Subset: IN/%s OUT/%s\n", geth->port.in_ep->name, geth->port.out_ep->name); return 0; diff --git a/drivers/usb/gadget/function/f_uvc.c b/drivers/usb/gadget/function/f_uvc.c index 5e919fb65833..faa398109431 100644 --- a/drivers/usb/gadget/function/f_uvc.c +++ b/drivers/usb/gadget/function/f_uvc.c @@ -719,21 +719,13 @@ uvc_function_bind(struct usb_configuration *c, struct usb_function *f) } uvc->enable_interrupt_ep = opts->enable_interrupt_ep; - if (gadget_is_superspeed(c->cdev->gadget)) - ep = usb_ep_autoconfig_ss(cdev->gadget, &uvc_ss_streaming_ep, - &uvc_ss_streaming_comp); - else if (gadget_is_dualspeed(cdev->gadget)) - ep = usb_ep_autoconfig(cdev->gadget, &uvc_hs_streaming_ep); - else - ep = usb_ep_autoconfig(cdev->gadget, &uvc_fs_streaming_ep); - + ep = usb_ep_autoconfig(cdev->gadget, &uvc_fs_streaming_ep); if (!ep) { uvcg_info(f, "Unable to allocate streaming EP\n"); goto error; } uvc->video.ep = ep; - uvc_fs_streaming_ep.bEndpointAddress = uvc->video.ep->address; uvc_hs_streaming_ep.bEndpointAddress = uvc->video.ep->address; uvc_ss_streaming_ep.bEndpointAddress = uvc->video.ep->address; @@ -788,21 +780,19 @@ uvc_function_bind(struct usb_configuration *c, struct usb_function *f) f->fs_descriptors = NULL; goto error; } - if (gadget_is_dualspeed(cdev->gadget)) { - f->hs_descriptors = uvc_copy_descriptors(uvc, USB_SPEED_HIGH); - if (IS_ERR(f->hs_descriptors)) { - ret = PTR_ERR(f->hs_descriptors); - f->hs_descriptors = NULL; - goto error; - } + + f->hs_descriptors = uvc_copy_descriptors(uvc, USB_SPEED_HIGH); + if (IS_ERR(f->hs_descriptors)) { + ret = PTR_ERR(f->hs_descriptors); + f->hs_descriptors = NULL; + goto error; } - if (gadget_is_superspeed(c->cdev->gadget)) { - f->ss_descriptors = uvc_copy_descriptors(uvc, USB_SPEED_SUPER); - if (IS_ERR(f->ss_descriptors)) { - ret = PTR_ERR(f->ss_descriptors); - f->ss_descriptors = NULL; - goto error; - } + + f->ss_descriptors = uvc_copy_descriptors(uvc, USB_SPEED_SUPER); + if (IS_ERR(f->ss_descriptors)) { + ret = PTR_ERR(f->ss_descriptors); + f->ss_descriptors = NULL; + goto error; } /* Preallocate control endpoint request. */ diff --git a/drivers/usb/gadget/function/u_ether.c b/drivers/usb/gadget/function/u_ether.c index a366abb45623..4bb0553da658 100644 --- a/drivers/usb/gadget/function/u_ether.c +++ b/drivers/usb/gadget/function/u_ether.c @@ -93,11 +93,10 @@ struct eth_dev { #define DEFAULT_QLEN 2 /* double buffering by default */ -/* for dual-speed hardware, use deeper queues at high/super speed */ +/* use deeper queues at high/super speed */ static inline int qlen(struct usb_gadget *gadget, unsigned qmult) { - if (gadget_is_dualspeed(gadget) && (gadget->speed == USB_SPEED_HIGH || - gadget->speed >= USB_SPEED_SUPER)) + if (gadget->speed == USB_SPEED_HIGH || gadget->speed >= USB_SPEED_SUPER) return qmult * DEFAULT_QLEN; else return DEFAULT_QLEN; diff --git a/drivers/usb/gadget/function/u_ether.h b/drivers/usb/gadget/function/u_ether.h index 851ee10d6e63..34be220cef77 100644 --- a/drivers/usb/gadget/function/u_ether.h +++ b/drivers/usb/gadget/function/u_ether.h @@ -279,4 +279,17 @@ static inline bool can_support_ecm(struct usb_gadget *gadget) return true; } +/* peak (theoretical) bulk transfer rate in bits-per-second */ +static inline unsigned int gether_bitrate(struct usb_gadget *g) +{ + if (g->speed >= USB_SPEED_SUPER_PLUS) + return 4250000000U; + if (g->speed == USB_SPEED_SUPER) + return 3750000000U; + else if (g->speed == USB_SPEED_HIGH) + return 13 * 512 * 8 * 1000 * 8; + else + return 19 * 64 * 1 * 1000 * 8; +} + #endif /* __U_ETHER_H */ diff --git a/drivers/usb/gadget/function/u_midi2.h b/drivers/usb/gadget/function/u_midi2.h new file mode 100644 index 000000000000..4e7adb41dfb7 --- /dev/null +++ b/drivers/usb/gadget/function/u_midi2.h @@ -0,0 +1,81 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Utility definitions for MIDI 2.0 function + */ + +#ifndef U_MIDI2_H +#define U_MIDI2_H + +#include +#include + +struct f_midi2_opts; +struct f_midi2_ep_opts; +struct f_midi2_block_opts; + +/* UMP Function Block info */ +struct f_midi2_block_info { + unsigned int direction; /* FB direction: 1-3 */ + unsigned int first_group; /* first UMP group: 0-15 */ + unsigned int num_groups; /* number of UMP groups: 1-16 */ + unsigned int midi1_first_group; /* first UMP group for MIDI 1.0 */ + unsigned int midi1_num_groups; /* number of UMP groups for MIDI 1.0 */ + unsigned int ui_hint; /* UI-hint: 0-3 */ + unsigned int midi_ci_version; /* MIDI-CI version: 0-255 */ + unsigned int sysex8_streams; /* number of sysex8 streams: 0-255 */ + unsigned int is_midi1; /* MIDI 1.0 port: 0-2 */ + bool active; /* FB active flag: bool */ + const char *name; /* FB name */ +}; + +/* UMP Endpoint info */ +struct f_midi2_ep_info { + unsigned int protocol_caps; /* protocol capabilities: 1-3 */ + unsigned int protocol; /* default protocol: 1-2 */ + unsigned int manufacturer; /* manufacturer id: 0-0xffffff */ + unsigned int family; /* device family id: 0-0xffff */ + unsigned int model; /* device model id: 0x-0xffff */ + unsigned int sw_revision; /* software revision: 32bit */ + + const char *ep_name; /* Endpoint name */ + const char *product_id; /* Product ID */ +}; + +struct f_midi2_card_info { + bool process_ump; /* process UMP stream: bool */ + bool static_block; /* static FBs: bool */ + unsigned int req_buf_size; /* request buffer size */ + unsigned int num_reqs; /* number of requests */ + const char *iface_name; /* interface name */ +}; + +struct f_midi2_block_opts { + struct config_group group; + unsigned int id; + struct f_midi2_block_info info; + struct f_midi2_ep_opts *ep; +}; + +struct f_midi2_ep_opts { + struct config_group group; + unsigned int index; + struct f_midi2_ep_info info; + struct f_midi2_block_opts *blks[SNDRV_UMP_MAX_BLOCKS]; + struct f_midi2_opts *opts; +}; + +#define MAX_UMP_EPS 4 +#define MAX_CABLES 16 + +struct f_midi2_opts { + struct usb_function_instance func_inst; + struct mutex lock; + int refcnt; + + struct f_midi2_card_info info; + + unsigned int num_eps; + struct f_midi2_ep_opts *eps[MAX_UMP_EPS]; +}; + +#endif /* U_MIDI2_H */ diff --git a/drivers/usb/gadget/function/u_phonet.h b/drivers/usb/gadget/function/u_phonet.h index c53233b37192..ff62ca22c40d 100644 --- a/drivers/usb/gadget/function/u_phonet.h +++ b/drivers/usb/gadget/function/u_phonet.h @@ -20,7 +20,6 @@ struct f_phonet_opts { struct net_device *gphonet_setup_default(void); void gphonet_set_gadget(struct net_device *net, struct usb_gadget *g); int gphonet_register_netdev(struct net_device *net); -int phonet_bind_config(struct usb_configuration *c, struct net_device *dev); void gphonet_cleanup(struct net_device *dev); #endif /* __U_PHONET_H */ diff --git a/drivers/usb/gadget/function/u_serial.c b/drivers/usb/gadget/function/u_serial.c index 1115396b46a0..a92eb6d90976 100644 --- a/drivers/usb/gadget/function/u_serial.c +++ b/drivers/usb/gadget/function/u_serial.c @@ -734,12 +734,12 @@ exit: spin_unlock_irq(&port->port_lock); } -static int gs_write(struct tty_struct *tty, const unsigned char *buf, int count) +static ssize_t gs_write(struct tty_struct *tty, const u8 *buf, size_t count) { struct gs_port *port = tty->driver_data; unsigned long flags; - pr_vdebug("gs_write: ttyGS%d (%p) writing %d bytes\n", + pr_vdebug("gs_write: ttyGS%d (%p) writing %zu bytes\n", port->port_num, tty, count); spin_lock_irqsave(&port->port_lock, flags); @@ -753,7 +753,7 @@ static int gs_write(struct tty_struct *tty, const unsigned char *buf, int count) return count; } -static int gs_put_char(struct tty_struct *tty, unsigned char ch) +static int gs_put_char(struct tty_struct *tty, u8 ch) { struct gs_port *port = tty->driver_data; unsigned long flags; diff --git a/drivers/usb/gadget/function/u_serial.h b/drivers/usb/gadget/function/u_serial.h index 102a7323a1fd..901d99310bc4 100644 --- a/drivers/usb/gadget/function/u_serial.h +++ b/drivers/usb/gadget/function/u_serial.h @@ -71,8 +71,4 @@ void gserial_disconnect(struct gserial *); void gserial_suspend(struct gserial *p); void gserial_resume(struct gserial *p); -/* functions are bound to configurations by a config or gadget driver */ -int gser_bind_config(struct usb_configuration *c, u8 port_num); -int obex_bind_config(struct usb_configuration *c, u8 port_num); - #endif /* __U_SERIAL_H */ diff --git a/drivers/usb/gadget/function/uvc.h b/drivers/usb/gadget/function/uvc.h index 100475b1363e..6751de8b63ad 100644 --- a/drivers/usb/gadget/function/uvc.h +++ b/drivers/usb/gadget/function/uvc.h @@ -178,8 +178,6 @@ struct uvc_file_handle { */ extern void uvc_function_setup_continue(struct uvc_device *uvc); -extern void uvc_endpoint_stream(struct uvc_device *dev); - extern void uvc_function_connect(struct uvc_device *uvc); extern void uvc_function_disconnect(struct uvc_device *uvc); diff --git a/drivers/usb/gadget/udc/aspeed-vhub/core.c b/drivers/usb/gadget/udc/aspeed-vhub/core.c index 16f2db8c4a2b..f60a019bb173 100644 --- a/drivers/usb/gadget/udc/aspeed-vhub/core.c +++ b/drivers/usb/gadget/udc/aspeed-vhub/core.c @@ -328,8 +328,7 @@ static int ast_vhub_probe(struct platform_device *pdev) vhub->port_irq_mask = GENMASK(VHUB_IRQ_DEV1_BIT + vhub->max_ports - 1, VHUB_IRQ_DEV1_BIT); - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - vhub->regs = devm_ioremap_resource(&pdev->dev, res); + vhub->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(vhub->regs)) { dev_err(&pdev->dev, "Failed to map resources\n"); return PTR_ERR(vhub->regs); diff --git a/drivers/usb/gadget/udc/aspeed_udc.c b/drivers/usb/gadget/udc/aspeed_udc.c index 01968e2167f9..2ef89a442f50 100644 --- a/drivers/usb/gadget/udc/aspeed_udc.c +++ b/drivers/usb/gadget/udc/aspeed_udc.c @@ -1468,7 +1468,6 @@ static int ast_udc_probe(struct platform_device *pdev) enum usb_device_speed max_speed; struct device *dev = &pdev->dev; struct ast_udc_dev *udc; - struct resource *res; int rc; udc = devm_kzalloc(&pdev->dev, sizeof(struct ast_udc_dev), GFP_KERNEL); @@ -1484,8 +1483,7 @@ static int ast_udc_probe(struct platform_device *pdev) udc->gadget.name = "aspeed-udc"; udc->gadget.dev.init_name = "gadget"; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - udc->reg = devm_ioremap_resource(&pdev->dev, res); + udc->reg = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(udc->reg)) { dev_err(&pdev->dev, "Failed to map resources\n"); return PTR_ERR(udc->reg); diff --git a/drivers/usb/gadget/udc/atmel_usba_udc.c b/drivers/usb/gadget/udc/atmel_usba_udc.c index 6c0ed3fa5eb1..02b1bef5e22e 100644 --- a/drivers/usb/gadget/udc/atmel_usba_udc.c +++ b/drivers/usb/gadget/udc/atmel_usba_udc.c @@ -2285,15 +2285,13 @@ static int usba_udc_probe(struct platform_device *pdev) udc->gadget = usba_gadget_template; INIT_LIST_HEAD(&udc->gadget.ep_list); - res = platform_get_resource(pdev, IORESOURCE_MEM, CTRL_IOMEM_ID); - udc->regs = devm_ioremap_resource(&pdev->dev, res); + udc->regs = devm_platform_get_and_ioremap_resource(pdev, CTRL_IOMEM_ID, &res); if (IS_ERR(udc->regs)) return PTR_ERR(udc->regs); dev_info(&pdev->dev, "MMIO registers at %pR mapped at %p\n", res, udc->regs); - res = platform_get_resource(pdev, IORESOURCE_MEM, FIFO_IOMEM_ID); - udc->fifo = devm_ioremap_resource(&pdev->dev, res); + udc->fifo = devm_platform_get_and_ioremap_resource(pdev, FIFO_IOMEM_ID, &res); if (IS_ERR(udc->fifo)) return PTR_ERR(udc->fifo); dev_info(&pdev->dev, "FIFO at %pR mapped at %p\n", res, udc->fifo); diff --git a/drivers/usb/gadget/udc/core.c b/drivers/usb/gadget/udc/core.c index 7d49d8a0b00c..7166d1117742 100644 --- a/drivers/usb/gadget/udc/core.c +++ b/drivers/usb/gadget/udc/core.c @@ -40,6 +40,7 @@ static const struct bus_type gadget_bus_type; * @allow_connect: Indicates whether UDC is allowed to be pulled up. * Set/cleared by gadget_(un)bind_driver() after gadget driver is bound or * unbound. + * @vbus_work: work routine to handle VBUS status change notifications. * @connect_lock: protects udc->started, gadget->connect, * gadget->allow_connect and gadget->deactivate. The routines * usb_gadget_connect_locked(), usb_gadget_disconnect_locked(), diff --git a/drivers/usb/gadget/udc/fsl_qe_udc.c b/drivers/usb/gadget/udc/fsl_qe_udc.c index 9c5dc1c1a68e..4aae86b47edf 100644 --- a/drivers/usb/gadget/udc/fsl_qe_udc.c +++ b/drivers/usb/gadget/udc/fsl_qe_udc.c @@ -1959,6 +1959,8 @@ static void ch9getstatus(struct qe_udc *udc, u8 request_type, u16 value, } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_ENDPOINT) { /* Get endpoint status */ int pipe = index & USB_ENDPOINT_NUMBER_MASK; + if (pipe >= USB_MAX_ENDPOINTS) + goto stall; struct qe_ep *target_ep = &udc->eps[pipe]; u16 usep; diff --git a/drivers/usb/gadget/udc/fsl_udc_core.c b/drivers/usb/gadget/udc/fsl_udc_core.c index a67873a074b7..ee5705d336e3 100644 --- a/drivers/usb/gadget/udc/fsl_udc_core.c +++ b/drivers/usb/gadget/udc/fsl_udc_core.c @@ -36,7 +36,6 @@ #include #include #include -#include #include #include @@ -672,7 +671,7 @@ static int fsl_ep_disable(struct usb_ep *_ep) static struct usb_request * fsl_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags) { - struct fsl_req *req = NULL; + struct fsl_req *req; req = kzalloc(sizeof *req, gfp_flags); if (!req) diff --git a/drivers/usb/gadget/udc/gr_udc.c b/drivers/usb/gadget/udc/gr_udc.c index 09762559912d..c6dfa7cccc11 100644 --- a/drivers/usb/gadget/udc/gr_udc.c +++ b/drivers/usb/gadget/udc/gr_udc.c @@ -23,6 +23,7 @@ #include #include +#include #include #include #include @@ -36,9 +37,7 @@ #include #include #include -#include -#include -#include +#include #include @@ -2137,15 +2136,15 @@ static int gr_probe(struct platform_device *pdev) return PTR_ERR(regs); dev->irq = platform_get_irq(pdev, 0); - if (dev->irq <= 0) - return -ENODEV; + if (dev->irq < 0) + return dev->irq; /* Some core configurations has separate irqs for IN and OUT events */ dev->irqi = platform_get_irq(pdev, 1); if (dev->irqi > 0) { dev->irqo = platform_get_irq(pdev, 2); - if (dev->irqo <= 0) - return -ENODEV; + if (dev->irqo < 0) + return dev->irqo; } else { dev->irqi = 0; } diff --git a/drivers/usb/gadget/udc/max3420_udc.c b/drivers/usb/gadget/udc/max3420_udc.c index 12c519f32bf7..2d57786d3db7 100644 --- a/drivers/usb/gadget/udc/max3420_udc.c +++ b/drivers/usb/gadget/udc/max3420_udc.c @@ -19,9 +19,7 @@ #include #include #include -#include -#include -#include +#include #include #include #include diff --git a/drivers/usb/gadget/udc/mv_u3d_core.c b/drivers/usb/gadget/udc/mv_u3d_core.c index 3473048a85f5..2a421f0ff931 100644 --- a/drivers/usb/gadget/udc/mv_u3d_core.c +++ b/drivers/usb/gadget/udc/mv_u3d_core.c @@ -665,7 +665,7 @@ static int mv_u3d_ep_disable(struct usb_ep *_ep) static struct usb_request * mv_u3d_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags) { - struct mv_u3d_req *req = NULL; + struct mv_u3d_req *req; req = kzalloc(sizeof *req, gfp_flags); if (!req) @@ -1779,7 +1779,7 @@ static void mv_u3d_remove(struct platform_device *dev) static int mv_u3d_probe(struct platform_device *dev) { - struct mv_u3d *u3d = NULL; + struct mv_u3d *u3d; struct mv_usb_platform_data *pdata = dev_get_platdata(&dev->dev); int retval = 0; struct resource *r; diff --git a/drivers/usb/gadget/udc/mv_udc_core.c b/drivers/usb/gadget/udc/mv_udc_core.c index 79db74e2040b..d888dcda2bc8 100644 --- a/drivers/usb/gadget/udc/mv_udc_core.c +++ b/drivers/usb/gadget/udc/mv_udc_core.c @@ -595,7 +595,7 @@ static int mv_ep_disable(struct usb_ep *_ep) static struct usb_request * mv_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags) { - struct mv_req *req = NULL; + struct mv_req *req; req = kzalloc(sizeof *req, gfp_flags); if (!req) diff --git a/drivers/usb/gadget/udc/pxa27x_udc.c b/drivers/usb/gadget/udc/pxa27x_udc.c index c4e1d957f913..61424cfd2e1c 100644 --- a/drivers/usb/gadget/udc/pxa27x_udc.c +++ b/drivers/usb/gadget/udc/pxa27x_udc.c @@ -23,7 +23,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/usb/gadget/udc/renesas_usb3.c b/drivers/usb/gadget/udc/renesas_usb3.c index 59bb25de2015..3b01734ce1b7 100644 --- a/drivers/usb/gadget/udc/renesas_usb3.c +++ b/drivers/usb/gadget/udc/renesas_usb3.c @@ -14,7 +14,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/usb/gadget/udc/renesas_usbf.c b/drivers/usb/gadget/udc/renesas_usbf.c index 6cd0af83e91e..657f265ac7cc 100644 --- a/drivers/usb/gadget/udc/renesas_usbf.c +++ b/drivers/usb/gadget/udc/renesas_usbf.c @@ -12,10 +12,9 @@ #include #include #include +#include #include -#include -#include -#include +#include #include #include #include @@ -3379,7 +3378,6 @@ MODULE_DEVICE_TABLE(of, usbf_match); static struct platform_driver udc_driver = { .driver = { .name = "usbf_renesas", - .owner = THIS_MODULE, .of_match_table = usbf_match, }, .probe = usbf_probe, diff --git a/drivers/usb/gadget/udc/snps_udc_plat.c b/drivers/usb/gadget/udc/snps_udc_plat.c index 0ed685db149d..547af2ed9e5e 100644 --- a/drivers/usb/gadget/udc/snps_udc_plat.c +++ b/drivers/usb/gadget/udc/snps_udc_plat.c @@ -112,8 +112,7 @@ static int udc_plat_probe(struct platform_device *pdev) spin_lock_init(&udc->lock); udc->dev = dev; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - udc->virt_addr = devm_ioremap_resource(dev, res); + udc->virt_addr = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(udc->virt_addr)) return PTR_ERR(udc->virt_addr); @@ -301,7 +300,6 @@ static const struct dev_pm_ops udc_plat_pm_ops = { }; #endif -#if defined(CONFIG_OF) static const struct of_device_id of_udc_match[] = { { .compatible = "brcm,ns2-udc", }, { .compatible = "brcm,cygnus-udc", }, @@ -309,14 +307,13 @@ static const struct of_device_id of_udc_match[] = { { } }; MODULE_DEVICE_TABLE(of, of_udc_match); -#endif static struct platform_driver udc_plat_driver = { .probe = udc_plat_probe, .remove_new = udc_plat_remove, .driver = { .name = "snps-udc-plat", - .of_match_table = of_match_ptr(of_udc_match), + .of_match_table = of_udc_match, #ifdef CONFIG_PM_SLEEP .pm = &udc_plat_pm_ops, #endif diff --git a/drivers/usb/gadget/udc/tegra-xudc.c b/drivers/usb/gadget/udc/tegra-xudc.c index df6028f7b273..cb85168fd00c 100644 --- a/drivers/usb/gadget/udc/tegra-xudc.c +++ b/drivers/usb/gadget/udc/tegra-xudc.c @@ -16,7 +16,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/usb/gadget/udc/udc-xilinx.c b/drivers/usb/gadget/udc/udc-xilinx.c index a4a7b90a97e7..56b8286a8009 100644 --- a/drivers/usb/gadget/udc/udc-xilinx.c +++ b/drivers/usb/gadget/udc/udc-xilinx.c @@ -18,10 +18,8 @@ #include #include #include -#include -#include -#include -#include +#include +#include #include #include #include @@ -1617,13 +1615,13 @@ static void xudc_getstatus(struct xusb_udc *udc) case USB_RECIP_INTERFACE: break; case USB_RECIP_ENDPOINT: - epnum = udc->setup.wIndex & USB_ENDPOINT_NUMBER_MASK; + epnum = le16_to_cpu(udc->setup.wIndex) & USB_ENDPOINT_NUMBER_MASK; if (epnum >= XUSB_MAX_ENDPOINTS) goto stall; target_ep = &udc->ep[epnum]; epcfgreg = udc->read_fn(udc->addr + target_ep->offset); halt = epcfgreg & XUSB_EP_CFG_STALL_MASK; - if (udc->setup.wIndex & USB_DIR_IN) { + if (le16_to_cpu(udc->setup.wIndex) & USB_DIR_IN) { if (!target_ep->is_in) goto stall; } else { @@ -1638,7 +1636,7 @@ static void xudc_getstatus(struct xusb_udc *udc) } req->usb_req.length = 2; - *(u16 *)req->usb_req.buf = cpu_to_le16(status); + *(__le16 *)req->usb_req.buf = cpu_to_le16(status); ret = __xudc_ep0_queue(ep0, req); if (ret == 0) return; @@ -1666,7 +1664,7 @@ static void xudc_set_clear_feature(struct xusb_udc *udc) switch (udc->setup.bRequestType) { case USB_RECIP_DEVICE: - switch (udc->setup.wValue) { + switch (le16_to_cpu(udc->setup.wValue)) { case USB_DEVICE_TEST_MODE: /* * The Test Mode will be executed @@ -1686,13 +1684,15 @@ static void xudc_set_clear_feature(struct xusb_udc *udc) break; case USB_RECIP_ENDPOINT: if (!udc->setup.wValue) { - endpoint = udc->setup.wIndex & USB_ENDPOINT_NUMBER_MASK; + endpoint = le16_to_cpu(udc->setup.wIndex) & + USB_ENDPOINT_NUMBER_MASK; if (endpoint >= XUSB_MAX_ENDPOINTS) { xudc_ep0_stall(udc); return; } target_ep = &udc->ep[endpoint]; - outinbit = udc->setup.wIndex & USB_ENDPOINT_DIR_MASK; + outinbit = le16_to_cpu(udc->setup.wIndex) & + USB_ENDPOINT_DIR_MASK; outinbit = outinbit >> 7; /* Make sure direction matches.*/ @@ -1755,9 +1755,9 @@ static void xudc_handle_setup(struct xusb_udc *udc) memcpy(&setup, ep0rambase, 8); udc->setup = setup; - udc->setup.wValue = cpu_to_le16(setup.wValue); - udc->setup.wIndex = cpu_to_le16(setup.wIndex); - udc->setup.wLength = cpu_to_le16(setup.wLength); + udc->setup.wValue = cpu_to_le16((u16 __force)setup.wValue); + udc->setup.wIndex = cpu_to_le16((u16 __force)setup.wIndex); + udc->setup.wLength = cpu_to_le16((u16 __force)setup.wLength); /* Clear previous requests */ xudc_nuke(ep0, -ECONNRESET); @@ -1869,7 +1869,7 @@ static void xudc_ep0_in(struct xusb_udc *udc) u16 count = 0; u16 length; u8 *ep0rambase; - u8 test_mode = udc->setup.wIndex >> 8; + u8 test_mode = le16_to_cpu(udc->setup.wIndex) >> 8; req = list_first_entry(&ep0->queue, struct xusb_req, queue); bytes_to_tx = req->usb_req.length - req->usb_req.actual; @@ -1880,12 +1880,12 @@ static void xudc_ep0_in(struct xusb_udc *udc) case USB_REQ_SET_ADDRESS: /* Set the address of the device.*/ udc->write_fn(udc->addr, XUSB_ADDRESS_OFFSET, - udc->setup.wValue); + le16_to_cpu(udc->setup.wValue)); break; case USB_REQ_SET_FEATURE: if (udc->setup.bRequestType == USB_RECIP_DEVICE) { - if (udc->setup.wValue == + if (le16_to_cpu(udc->setup.wValue) == USB_DEVICE_TEST_MODE) udc->write_fn(udc->addr, XUSB_TESTMODE_OFFSET, @@ -2080,8 +2080,7 @@ static int xudc_probe(struct platform_device *pdev) udc->req->usb_req.buf = buff; /* Map the registers */ - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - udc->addr = devm_ioremap_resource(&pdev->dev, res); + udc->addr = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(udc->addr)) return PTR_ERR(udc->addr); diff --git a/drivers/usb/host/ehci-atmel.c b/drivers/usb/host/ehci-atmel.c index 61808c51e702..6a6e1c510b28 100644 --- a/drivers/usb/host/ehci-atmel.c +++ b/drivers/usb/host/ehci-atmel.c @@ -102,8 +102,8 @@ static int ehci_atmel_drv_probe(struct platform_device *pdev) pr_debug("Initializing Atmel-SoC USB Host Controller\n"); irq = platform_get_irq(pdev, 0); - if (irq <= 0) { - retval = -ENODEV; + if (irq < 0) { + retval = irq; goto fail_create_hcd; } @@ -122,8 +122,7 @@ static int ehci_atmel_drv_probe(struct platform_device *pdev) } atmel_ehci = hcd_to_atmel_ehci_priv(hcd); - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - hcd->regs = devm_ioremap_resource(&pdev->dev, res); + hcd->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(hcd->regs)) { retval = PTR_ERR(hcd->regs); goto fail_request_resource; diff --git a/drivers/usb/host/ehci-brcm.c b/drivers/usb/host/ehci-brcm.c index 0362a082abb4..77e42c739c58 100644 --- a/drivers/usb/host/ehci-brcm.c +++ b/drivers/usb/host/ehci-brcm.c @@ -140,8 +140,8 @@ static int ehci_brcm_probe(struct platform_device *pdev) return err; irq = platform_get_irq(pdev, 0); - if (irq <= 0) - return irq ? irq : -EINVAL; + if (irq < 0) + return irq; /* Hook the hub control routine to work around a bug */ ehci_brcm_hc_driver.hub_control = ehci_brcm_hub_control; diff --git a/drivers/usb/host/ehci-exynos.c b/drivers/usb/host/ehci-exynos.c index 20f8c0ec6810..f644b131cc0b 100644 --- a/drivers/usb/host/ehci-exynos.c +++ b/drivers/usb/host/ehci-exynos.c @@ -173,8 +173,7 @@ static int exynos_ehci_probe(struct platform_device *pdev) if (err) goto fail_clk; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - hcd->regs = devm_ioremap_resource(&pdev->dev, res); + hcd->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(hcd->regs)) { err = PTR_ERR(hcd->regs); goto fail_io; diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c index 81d60a695510..5b1ce394a417 100644 --- a/drivers/usb/host/ehci-fsl.c +++ b/drivers/usb/host/ehci-fsl.c @@ -22,7 +22,7 @@ #include #include #include -#include +#include #include #include "ehci.h" @@ -87,8 +87,7 @@ static int fsl_ehci_drv_probe(struct platform_device *pdev) goto err1; } - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - hcd->regs = devm_ioremap_resource(&pdev->dev, res); + hcd->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(hcd->regs)) { retval = PTR_ERR(hcd->regs); goto err2; diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index a1930db0da1c..802bfafb1012 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -755,10 +755,14 @@ restart: /* normal [4.15.1.2] or error [4.15.1.1] completion */ if (likely ((status & (STS_INT|STS_ERR)) != 0)) { - if (likely ((status & STS_ERR) == 0)) + if (likely ((status & STS_ERR) == 0)) { INCR(ehci->stats.normal); - else + } else { + /* Force to check port status */ + if (ehci->has_ci_pec_bug) + status |= STS_PCD; INCR(ehci->stats.error); + } bh = 1; } diff --git a/drivers/usb/host/ehci-hub.c b/drivers/usb/host/ehci-hub.c index efe30e3be22f..1aee392e8492 100644 --- a/drivers/usb/host/ehci-hub.c +++ b/drivers/usb/host/ehci-hub.c @@ -674,7 +674,8 @@ ehci_hub_status_data (struct usb_hcd *hcd, char *buf) if ((temp & mask) != 0 || test_bit(i, &ehci->port_c_suspend) || (ehci->reset_done[i] && time_after_eq( - jiffies, ehci->reset_done[i]))) { + jiffies, ehci->reset_done[i])) + || ehci_has_ci_pec_bug(ehci, temp)) { if (i < 7) buf [0] |= 1 << (i + 1); else @@ -875,6 +876,13 @@ int ehci_hub_control( if (temp & PORT_PEC) status |= USB_PORT_STAT_C_ENABLE << 16; + if (ehci_has_ci_pec_bug(ehci, temp)) { + status |= USB_PORT_STAT_C_ENABLE << 16; + ehci_info(ehci, + "PE is cleared by HW port:%d PORTSC:%08x\n", + wIndex + 1, temp); + } + if ((temp & PORT_OCC) && (!ignore_oc && !ehci->spurious_oc)){ status |= USB_PORT_STAT_C_OVERCURRENT << 16; diff --git a/drivers/usb/host/ehci-mv.c b/drivers/usb/host/ehci-mv.c index 9320cf0e5bc7..2f1fc7eb8b72 100644 --- a/drivers/usb/host/ehci-mv.c +++ b/drivers/usb/host/ehci-mv.c @@ -142,8 +142,7 @@ static int mv_ehci_probe(struct platform_device *pdev) goto err_put_hcd; } - r = platform_get_resource(pdev, IORESOURCE_MEM, 0); - ehci_mv->base = devm_ioremap_resource(&pdev->dev, r); + ehci_mv->base = devm_platform_get_and_ioremap_resource(pdev, 0, &r); if (IS_ERR(ehci_mv->base)) { retval = PTR_ERR(ehci_mv->base); goto err_put_hcd; diff --git a/drivers/usb/host/ehci-npcm7xx.c b/drivers/usb/host/ehci-npcm7xx.c index ad79ce63afcf..3d3317a1a0b3 100644 --- a/drivers/usb/host/ehci-npcm7xx.c +++ b/drivers/usb/host/ehci-npcm7xx.c @@ -53,7 +53,7 @@ static int npcm7xx_ehci_hcd_drv_probe(struct platform_device *pdev) int irq; int retval; - dev_dbg(&pdev->dev, "initializing npcm7xx ehci USB Controller\n"); + dev_dbg(&pdev->dev, "initializing npcm7xx ehci USB Controller\n"); if (usb_disabled()) return -ENODEV; @@ -79,8 +79,7 @@ static int npcm7xx_ehci_hcd_drv_probe(struct platform_device *pdev) goto fail; } - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - hcd->regs = devm_ioremap_resource(&pdev->dev, res); + hcd->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(hcd->regs)) { retval = PTR_ERR(hcd->regs); goto err_put_hcd; diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c index cb6509a735ac..b24f371a46f3 100644 --- a/drivers/usb/host/ehci-omap.c +++ b/drivers/usb/host/ehci-omap.c @@ -113,8 +113,7 @@ static int ehci_hcd_omap_probe(struct platform_device *pdev) if (irq < 0) return irq; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - regs = devm_ioremap_resource(dev, res); + regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(regs)) return PTR_ERR(regs); diff --git a/drivers/usb/host/ehci-orion.c b/drivers/usb/host/ehci-orion.c index 2cfb27dc943a..6c47ab0a491d 100644 --- a/drivers/usb/host/ehci-orion.c +++ b/drivers/usb/host/ehci-orion.c @@ -13,8 +13,6 @@ #include #include #include -#include -#include #include #include #include @@ -220,8 +218,8 @@ static int ehci_orion_drv_probe(struct platform_device *pdev) pr_debug("Initializing Orion-SoC USB Host Controller\n"); irq = platform_get_irq(pdev, 0); - if (irq <= 0) { - err = -ENODEV; + if (irq < 0) { + err = irq; goto err; } @@ -234,8 +232,7 @@ static int ehci_orion_drv_probe(struct platform_device *pdev) if (err) goto err; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - regs = devm_ioremap_resource(&pdev->dev, res); + regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(regs)) { err = PTR_ERR(regs); goto err; diff --git a/drivers/usb/host/ehci-platform.c b/drivers/usb/host/ehci-platform.c index 83bf56c9424f..98b073185e1c 100644 --- a/drivers/usb/host/ehci-platform.c +++ b/drivers/usb/host/ehci-platform.c @@ -359,8 +359,7 @@ static int ehci_platform_probe(struct platform_device *dev) goto err_reset; } - res_mem = platform_get_resource(dev, IORESOURCE_MEM, 0); - hcd->regs = devm_ioremap_resource(&dev->dev, res_mem); + hcd->regs = devm_platform_get_and_ioremap_resource(dev, 0, &res_mem); if (IS_ERR(hcd->regs)) { err = PTR_ERR(hcd->regs); goto err_power; diff --git a/drivers/usb/host/ehci-sched.c b/drivers/usb/host/ehci-sched.c index bd542b6fc46b..7e834587e7de 100644 --- a/drivers/usb/host/ehci-sched.c +++ b/drivers/usb/host/ehci-sched.c @@ -490,13 +490,14 @@ static int tt_no_collision( static void enable_periodic(struct ehci_hcd *ehci) { if (ehci->periodic_count++) - return; + goto out; /* Stop waiting to turn off the periodic schedule */ ehci->enabled_hrtimer_events &= ~BIT(EHCI_HRTIMER_DISABLE_PERIODIC); /* Don't start the schedule until PSS is 0 */ ehci_poll_PSS(ehci); +out: turn_on_io_watchdog(ehci); } diff --git a/drivers/usb/host/ehci-sh.c b/drivers/usb/host/ehci-sh.c index 0520e762801d..d31d9506e41a 100644 --- a/drivers/usb/host/ehci-sh.c +++ b/drivers/usb/host/ehci-sh.c @@ -82,8 +82,8 @@ static int ehci_hcd_sh_probe(struct platform_device *pdev) return -ENODEV; irq = platform_get_irq(pdev, 0); - if (irq <= 0) { - ret = -ENODEV; + if (irq < 0) { + ret = irq; goto fail_create_hcd; } @@ -95,8 +95,7 @@ static int ehci_hcd_sh_probe(struct platform_device *pdev) goto fail_create_hcd; } - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - hcd->regs = devm_ioremap_resource(&pdev->dev, res); + hcd->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(hcd->regs)) { ret = PTR_ERR(hcd->regs); goto fail_request_resource; diff --git a/drivers/usb/host/ehci-spear.c b/drivers/usb/host/ehci-spear.c index 1407703649be..d0e94e4c9fe2 100644 --- a/drivers/usb/host/ehci-spear.c +++ b/drivers/usb/host/ehci-spear.c @@ -91,8 +91,7 @@ static int spear_ehci_hcd_drv_probe(struct platform_device *pdev) goto fail; } - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - hcd->regs = devm_ioremap_resource(&pdev->dev, res); + hcd->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(hcd->regs)) { retval = PTR_ERR(hcd->regs); goto err_put_hcd; diff --git a/drivers/usb/host/ehci-st.c b/drivers/usb/host/ehci-st.c index ee0976b815b4..2dbb0d86daaa 100644 --- a/drivers/usb/host/ehci-st.c +++ b/drivers/usb/host/ehci-st.c @@ -158,11 +158,6 @@ static int st_ehci_platform_probe(struct platform_device *dev) irq = platform_get_irq(dev, 0); if (irq < 0) return irq; - res_mem = platform_get_resource(dev, IORESOURCE_MEM, 0); - if (!res_mem) { - dev_err(&dev->dev, "no memory resource provided"); - return -ENXIO; - } hcd = usb_create_hcd(&ehci_platform_hc_driver, &dev->dev, dev_name(&dev->dev)); @@ -222,14 +217,13 @@ static int st_ehci_platform_probe(struct platform_device *dev) goto err_put_clks; } - hcd->rsrc_start = res_mem->start; - hcd->rsrc_len = resource_size(res_mem); - - hcd->regs = devm_ioremap_resource(&dev->dev, res_mem); + hcd->regs = devm_platform_get_and_ioremap_resource(dev, 0, &res_mem); if (IS_ERR(hcd->regs)) { err = PTR_ERR(hcd->regs); goto err_put_clks; } + hcd->rsrc_start = res_mem->start; + hcd->rsrc_len = resource_size(res_mem); err = usb_add_hcd(hcd, irq, IRQF_SHARED); if (err) diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h index c5c7f8782549..1441e3400796 100644 --- a/drivers/usb/host/ehci.h +++ b/drivers/usb/host/ehci.h @@ -207,6 +207,7 @@ struct ehci_hcd { /* one per controller */ unsigned has_fsl_port_bug:1; /* FreeScale */ unsigned has_fsl_hs_errata:1; /* Freescale HS quirk */ unsigned has_fsl_susp_errata:1; /* NXP SUSP quirk */ + unsigned has_ci_pec_bug:1; /* ChipIdea PEC bug */ unsigned big_endian_mmio:1; unsigned big_endian_desc:1; unsigned big_endian_capbase:1; @@ -707,6 +708,15 @@ ehci_port_speed(struct ehci_hcd *ehci, unsigned int portsc) */ #define ehci_has_fsl_susp_errata(e) ((e)->has_fsl_susp_errata) +/* + * Some Freescale/NXP processors using ChipIdea IP have a bug in which + * disabling the port (PE is cleared) does not cause PEC to be asserted + * when frame babble is detected. + */ +#define ehci_has_ci_pec_bug(e, portsc) \ + ((e)->has_ci_pec_bug && ((e)->command & CMD_PSE) \ + && !(portsc & PORT_PEC) && !(portsc & PORT_PE)) + /* * While most USB host controllers implement their registers in * little-endian format, a minority (celleb companion chip) implement diff --git a/drivers/usb/host/fhci-hcd.c b/drivers/usb/host/fhci-hcd.c index 66a045e01dad..9a1b5224f239 100644 --- a/drivers/usb/host/fhci-hcd.c +++ b/drivers/usb/host/fhci-hcd.c @@ -22,9 +22,10 @@ #include #include #include +#include #include #include -#include +#include #include #include #include diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c index a9877f2569f4..8508d37a2aff 100644 --- a/drivers/usb/host/fsl-mph-dr-of.c +++ b/drivers/usb/host/fsl-mph-dr-of.c @@ -10,7 +10,8 @@ #include #include #include -#include +#include +#include #include #include #include diff --git a/drivers/usb/host/isp1362-hcd.c b/drivers/usb/host/isp1362-hcd.c index 606f0a64f3b7..a52c3d858f3e 100644 --- a/drivers/usb/host/isp1362-hcd.c +++ b/drivers/usb/host/isp1362-hcd.c @@ -2651,8 +2651,7 @@ static int isp1362_probe(struct platform_device *pdev) if (IS_ERR(addr_reg)) return PTR_ERR(addr_reg); - data = platform_get_resource(pdev, IORESOURCE_MEM, 0); - data_reg = devm_ioremap_resource(&pdev->dev, data); + data_reg = devm_platform_get_and_ioremap_resource(pdev, 0, &data); if (IS_ERR(data_reg)) return PTR_ERR(data_reg); diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c index b805c4b52ac3..f691cd98a574 100644 --- a/drivers/usb/host/ohci-at91.c +++ b/drivers/usb/host/ohci-at91.c @@ -17,13 +17,13 @@ #include #include #include -#include #include #include #include #include #include #include +#include #include #include #include @@ -190,18 +190,15 @@ static int usb_hcd_at91_probe(const struct hc_driver *driver, int irq; irq = platform_get_irq(pdev, 0); - if (irq < 0) { - dev_dbg(dev, "hcd probe: missing irq resource\n"); + if (irq < 0) return irq; - } hcd = usb_create_hcd(driver, dev, "at91"); if (!hcd) return -ENOMEM; ohci_at91 = hcd_to_ohci_at91_priv(hcd); - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - hcd->regs = devm_ioremap_resource(dev, res); + hcd->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(hcd->regs)) { retval = PTR_ERR(hcd->regs); goto err; diff --git a/drivers/usb/host/ohci-da8xx.c b/drivers/usb/host/ohci-da8xx.c index e4191a868944..d9adae53466b 100644 --- a/drivers/usb/host/ohci-da8xx.c +++ b/drivers/usb/host/ohci-da8xx.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -435,8 +436,7 @@ static int ohci_da8xx_probe(struct platform_device *pdev) goto err; } - mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); - hcd->regs = devm_ioremap_resource(dev, mem); + hcd->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &mem); if (IS_ERR(hcd->regs)) { error = PTR_ERR(hcd->regs); goto err; diff --git a/drivers/usb/host/ohci-exynos.c b/drivers/usb/host/ohci-exynos.c index ab31c459b32d..20e26a474591 100644 --- a/drivers/usb/host/ohci-exynos.c +++ b/drivers/usb/host/ohci-exynos.c @@ -149,8 +149,7 @@ static int exynos_ohci_probe(struct platform_device *pdev) if (err) goto fail_clk; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - hcd->regs = devm_ioremap_resource(&pdev->dev, res); + hcd->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(hcd->regs)) { err = PTR_ERR(hcd->regs); goto fail_io; diff --git a/drivers/usb/host/ohci-nxp.c b/drivers/usb/host/ohci-nxp.c index c04b2af5c766..8264c454f6bd 100644 --- a/drivers/usb/host/ohci-nxp.c +++ b/drivers/usb/host/ohci-nxp.c @@ -202,8 +202,7 @@ static int ohci_hcd_nxp_probe(struct platform_device *pdev) goto fail_hcd; } - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - hcd->regs = devm_ioremap_resource(&pdev->dev, res); + hcd->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(hcd->regs)) { ret = PTR_ERR(hcd->regs); goto fail_resource; diff --git a/drivers/usb/host/ohci-platform.c b/drivers/usb/host/ohci-platform.c index 45a2c981319e..4a75507325dd 100644 --- a/drivers/usb/host/ohci-platform.c +++ b/drivers/usb/host/ohci-platform.c @@ -200,8 +200,7 @@ static int ohci_platform_probe(struct platform_device *dev) goto err_reset; } - res_mem = platform_get_resource(dev, IORESOURCE_MEM, 0); - hcd->regs = devm_ioremap_resource(&dev->dev, res_mem); + hcd->regs = devm_platform_get_and_ioremap_resource(dev, 0, &res_mem); if (IS_ERR(hcd->regs)) { err = PTR_ERR(hcd->regs); goto err_power; diff --git a/drivers/usb/host/ohci-ppc-of.c b/drivers/usb/host/ohci-ppc-of.c index 35a7ad7e2569..f64bfe5f4d4d 100644 --- a/drivers/usb/host/ohci-ppc-of.c +++ b/drivers/usb/host/ohci-ppc-of.c @@ -15,9 +15,10 @@ */ #include +#include #include #include -#include +#include static int ohci_ppc_of_start(struct usb_hcd *hcd) diff --git a/drivers/usb/host/ohci-pxa27x.c b/drivers/usb/host/ohci-pxa27x.c index 7410442f720f..357d9aee38a3 100644 --- a/drivers/usb/host/ohci-pxa27x.c +++ b/drivers/usb/host/ohci-pxa27x.c @@ -435,8 +435,7 @@ static int ohci_hcd_pxa27x_probe(struct platform_device *pdev) if (!hcd) return -ENOMEM; - r = platform_get_resource(pdev, IORESOURCE_MEM, 0); - hcd->regs = devm_ioremap_resource(&pdev->dev, r); + hcd->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &r); if (IS_ERR(hcd->regs)) { retval = PTR_ERR(hcd->regs); goto err; diff --git a/drivers/usb/host/ohci-sm501.c b/drivers/usb/host/ohci-sm501.c index 0468eeb4fcfd..4b39e9d6f33a 100644 --- a/drivers/usb/host/ohci-sm501.c +++ b/drivers/usb/host/ohci-sm501.c @@ -195,8 +195,7 @@ static void ohci_hcd_sm501_drv_remove(struct platform_device *pdev) release_mem_region(hcd->rsrc_start, hcd->rsrc_len); usb_put_hcd(hcd); mem = platform_get_resource(pdev, IORESOURCE_MEM, 1); - if (mem) - release_mem_region(mem->start, resource_size(mem)); + release_mem_region(mem->start, resource_size(mem)); /* mask interrupts and disable power */ diff --git a/drivers/usb/host/ohci-spear.c b/drivers/usb/host/ohci-spear.c index f4b2656407dd..993f347c5c28 100644 --- a/drivers/usb/host/ohci-spear.c +++ b/drivers/usb/host/ohci-spear.c @@ -68,8 +68,7 @@ static int spear_ohci_hcd_drv_probe(struct platform_device *pdev) goto fail; } - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - hcd->regs = devm_ioremap_resource(&pdev->dev, res); + hcd->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(hcd->regs)) { retval = PTR_ERR(hcd->regs); goto err_put_hcd; diff --git a/drivers/usb/host/ohci-st.c b/drivers/usb/host/ohci-st.c index 884e447a8098..214342013f7e 100644 --- a/drivers/usb/host/ohci-st.c +++ b/drivers/usb/host/ohci-st.c @@ -139,12 +139,6 @@ static int st_ohci_platform_probe(struct platform_device *dev) if (irq < 0) return irq; - res_mem = platform_get_resource(dev, IORESOURCE_MEM, 0); - if (!res_mem) { - dev_err(&dev->dev, "no memory resource provided"); - return -ENXIO; - } - hcd = usb_create_hcd(&ohci_platform_hc_driver, &dev->dev, dev_name(&dev->dev)); if (!hcd) @@ -199,14 +193,14 @@ static int st_ohci_platform_probe(struct platform_device *dev) goto err_power; } - hcd->rsrc_start = res_mem->start; - hcd->rsrc_len = resource_size(res_mem); - - hcd->regs = devm_ioremap_resource(&dev->dev, res_mem); + hcd->regs = devm_platform_get_and_ioremap_resource(dev, 0, &res_mem); if (IS_ERR(hcd->regs)) { err = PTR_ERR(hcd->regs); goto err_power; } + hcd->rsrc_start = res_mem->start; + hcd->rsrc_len = resource_size(res_mem); + err = usb_add_hcd(hcd, irq, IRQF_SHARED); if (err) goto err_power; diff --git a/drivers/usb/host/oxu210hp-hcd.c b/drivers/usb/host/oxu210hp-hcd.c index 50c1ccabb0f5..d467472f9d3c 100644 --- a/drivers/usb/host/oxu210hp-hcd.c +++ b/drivers/usb/host/oxu210hp-hcd.c @@ -4230,8 +4230,7 @@ static int oxu_drv_probe(struct platform_device *pdev) return irq; dev_dbg(&pdev->dev, "IRQ resource %d\n", irq); - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - base = devm_ioremap_resource(&pdev->dev, res); + base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(base)) { ret = PTR_ERR(base); goto error; diff --git a/drivers/usb/host/uhci-platform.c b/drivers/usb/host/uhci-platform.c index 71ca532fc086..3dec5dd3a0d5 100644 --- a/drivers/usb/host/uhci-platform.c +++ b/drivers/usb/host/uhci-platform.c @@ -91,8 +91,7 @@ static int uhci_hcd_platform_probe(struct platform_device *pdev) uhci = hcd_to_uhci(hcd); - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - hcd->regs = devm_ioremap_resource(&pdev->dev, res); + hcd->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(hcd->regs)) { ret = PTR_ERR(hcd->regs); goto err_rmr; diff --git a/drivers/usb/host/xhci-dbgtty.c b/drivers/usb/host/xhci-dbgtty.c index d3acc0829ee5..b74e98e94393 100644 --- a/drivers/usb/host/xhci-dbgtty.c +++ b/drivers/usb/host/xhci-dbgtty.c @@ -208,9 +208,8 @@ static void dbc_tty_close(struct tty_struct *tty, struct file *file) tty_port_close(&port->port, tty, file); } -static int dbc_tty_write(struct tty_struct *tty, - const unsigned char *buf, - int count) +static ssize_t dbc_tty_write(struct tty_struct *tty, const u8 *buf, + size_t count) { struct dbc_port *port = tty->driver_data; unsigned long flags; @@ -224,7 +223,7 @@ static int dbc_tty_write(struct tty_struct *tty, return count; } -static int dbc_tty_put_char(struct tty_struct *tty, unsigned char ch) +static int dbc_tty_put_char(struct tty_struct *tty, u8 ch) { struct dbc_port *port = tty->driver_data; unsigned long flags; diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c index 19a402123de0..8714ab5bf04d 100644 --- a/drivers/usb/host/xhci-mem.c +++ b/drivers/usb/host/xhci-mem.c @@ -1108,9 +1108,6 @@ int xhci_setup_addressable_virt_dev(struct xhci_hcd *xhci, struct usb_device *ud slot_ctx->dev_info |= cpu_to_le32(SLOT_SPEED_LS); max_packets = MAX_PACKET(8); break; - case USB_SPEED_WIRELESS: - xhci_dbg(xhci, "FIXME xHCI doesn't support wireless speeds\n"); - return -EINVAL; default: /* Speed was set earlier, this shouldn't happen. */ return -EINVAL; diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c index b26ea7cb4357..28218c8f1837 100644 --- a/drivers/usb/host/xhci-plat.c +++ b/drivers/usb/host/xhci-plat.c @@ -13,7 +13,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/usb/host/xhci-rcar.c b/drivers/usb/host/xhci-rcar.c index bf5261fed32c..ab9c5969e462 100644 --- a/drivers/usb/host/xhci-rcar.c +++ b/drivers/usb/host/xhci-rcar.c @@ -10,7 +10,6 @@ #include #include #include -#include #include #include "xhci.h" diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c index 4693d83351c6..6246d5ad1468 100644 --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c @@ -14,7 +14,7 @@ #include #include #include -#include +#include #include #include #include @@ -1912,6 +1912,15 @@ put_padctl: return err; } +static void tegra_xusb_disable(struct tegra_xusb *tegra) +{ + tegra_xusb_powergate_partitions(tegra); + tegra_xusb_powerdomain_remove(tegra->dev, tegra); + tegra_xusb_phy_disable(tegra); + tegra_xusb_clk_disable(tegra); + regulator_bulk_disable(tegra->soc->num_supplies, tegra->supplies); +} + static void tegra_xusb_remove(struct platform_device *pdev) { struct tegra_xusb *tegra = platform_get_drvdata(pdev); @@ -1934,16 +1943,20 @@ static void tegra_xusb_remove(struct platform_device *pdev) pm_runtime_put(&pdev->dev); - tegra_xusb_powergate_partitions(tegra); - - tegra_xusb_powerdomain_remove(&pdev->dev, tegra); - - tegra_xusb_phy_disable(tegra); - tegra_xusb_clk_disable(tegra); - regulator_bulk_disable(tegra->soc->num_supplies, tegra->supplies); + tegra_xusb_disable(tegra); tegra_xusb_padctl_put(tegra->padctl); } +static void tegra_xusb_shutdown(struct platform_device *pdev) +{ + struct tegra_xusb *tegra = platform_get_drvdata(pdev); + + pm_runtime_get_sync(&pdev->dev); + disable_irq(tegra->xhci_irq); + xhci_shutdown(tegra->hcd); + tegra_xusb_disable(tegra); +} + static bool xhci_hub_ports_suspended(struct xhci_hub *hub) { struct device *dev = hub->hcd->self.controller; @@ -2652,6 +2665,7 @@ MODULE_DEVICE_TABLE(of, tegra_xusb_of_match); static struct platform_driver tegra_xusb_driver = { .probe = tegra_xusb_probe, .remove_new = tegra_xusb_remove, + .shutdown = tegra_xusb_shutdown, .driver = { .name = "tegra-xusb", .pm = &tegra_xusb_pm_ops, diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c index fae994f679d4..e1b1b64a0723 100644 --- a/drivers/usb/host/xhci.c +++ b/drivers/usb/host/xhci.c @@ -2194,7 +2194,6 @@ static unsigned int xhci_get_block_size(struct usb_device *udev) case USB_SPEED_SUPER_PLUS: return SS_BLOCK; case USB_SPEED_UNKNOWN: - case USB_SPEED_WIRELESS: default: /* Should never happen */ return 1; @@ -2555,10 +2554,7 @@ static void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci, case USB_SPEED_HIGH: interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1; break; - case USB_SPEED_SUPER: - case USB_SPEED_SUPER_PLUS: - case USB_SPEED_UNKNOWN: - case USB_SPEED_WIRELESS: + default: /* Should never happen because only LS/FS/HS endpoints will get * added to the endpoint list. */ @@ -2615,10 +2611,7 @@ static void xhci_add_ep_to_interval_table(struct xhci_hcd *xhci, case USB_SPEED_HIGH: interval_bw->overhead[HS_OVERHEAD_TYPE] += 1; break; - case USB_SPEED_SUPER: - case USB_SPEED_SUPER_PLUS: - case USB_SPEED_UNKNOWN: - case USB_SPEED_WIRELESS: + default: /* Should never happen because only LS/FS/HS endpoints will get * added to the endpoint list. */ diff --git a/drivers/usb/misc/cypress_cy7c63.c b/drivers/usb/misc/cypress_cy7c63.c index 14faec51d7a5..cecd7693b741 100644 --- a/drivers/usb/misc/cypress_cy7c63.c +++ b/drivers/usb/misc/cypress_cy7c63.c @@ -203,7 +203,7 @@ ATTRIBUTE_GROUPS(cypress); static int cypress_probe(struct usb_interface *interface, const struct usb_device_id *id) { - struct cypress *dev = NULL; + struct cypress *dev; int retval = -ENOMEM; /* allocate memory for our device state and initialize it */ diff --git a/drivers/usb/misc/cytherm.c b/drivers/usb/misc/cytherm.c index 3e3802aaefa3..875016dd073c 100644 --- a/drivers/usb/misc/cytherm.c +++ b/drivers/usb/misc/cytherm.c @@ -304,20 +304,20 @@ static int cytherm_probe(struct usb_interface *interface, const struct usb_device_id *id) { struct usb_device *udev = interface_to_usbdev(interface); - struct usb_cytherm *dev = NULL; + struct usb_cytherm *dev; int retval = -ENOMEM; - dev = kzalloc (sizeof(struct usb_cytherm), GFP_KERNEL); + dev = kzalloc(sizeof(struct usb_cytherm), GFP_KERNEL); if (!dev) goto error_mem; dev->udev = usb_get_dev(udev); - usb_set_intfdata (interface, dev); + usb_set_intfdata(interface, dev); dev->brightness = 0xFF; - dev_info (&interface->dev, + dev_info(&interface->dev, "Cypress thermometer device now attached\n"); return 0; @@ -329,10 +329,10 @@ static void cytherm_disconnect(struct usb_interface *interface) { struct usb_cytherm *dev; - dev = usb_get_intfdata (interface); + dev = usb_get_intfdata(interface); /* first remove the files, then NULL the pointer */ - usb_set_intfdata (interface, NULL); + usb_set_intfdata(interface, NULL); usb_put_dev(dev->udev); diff --git a/drivers/usb/misc/onboard_usb_hub.c b/drivers/usb/misc/onboard_usb_hub.c index 83f14ca1d38e..3da1a4659c5f 100644 --- a/drivers/usb/misc/onboard_usb_hub.c +++ b/drivers/usb/misc/onboard_usb_hub.c @@ -27,6 +27,17 @@ #include "onboard_usb_hub.h" +/* + * Use generic names, as the actual names might differ between hubs. If a new + * hub requires more than the currently supported supplies, add a new one here. + */ +static const char * const supply_names[] = { + "vdd", + "vdd2", +}; + +#define MAX_SUPPLIES ARRAY_SIZE(supply_names) + static void onboard_hub_attach_usb_driver(struct work_struct *work); static struct usb_device_driver onboard_hub_usbdev_driver; @@ -40,7 +51,7 @@ struct usbdev_node { }; struct onboard_hub { - struct regulator *vdd; + struct regulator_bulk_data supplies[MAX_SUPPLIES]; struct device *dev; const struct onboard_hub_pdata *pdata; struct gpio_desc *reset_gpio; @@ -55,9 +66,9 @@ static int onboard_hub_power_on(struct onboard_hub *hub) { int err; - err = regulator_enable(hub->vdd); + err = regulator_bulk_enable(hub->pdata->num_supplies, hub->supplies); if (err) { - dev_err(hub->dev, "failed to enable regulator: %d\n", err); + dev_err(hub->dev, "failed to enable supplies: %d\n", err); return err; } @@ -75,9 +86,9 @@ static int onboard_hub_power_off(struct onboard_hub *hub) gpiod_set_value_cansleep(hub->reset_gpio, 1); - err = regulator_disable(hub->vdd); + err = regulator_bulk_disable(hub->pdata->num_supplies, hub->supplies); if (err) { - dev_err(hub->dev, "failed to disable regulator: %d\n", err); + dev_err(hub->dev, "failed to disable supplies: %d\n", err); return err; } @@ -232,6 +243,7 @@ static int onboard_hub_probe(struct platform_device *pdev) const struct of_device_id *of_id; struct device *dev = &pdev->dev; struct onboard_hub *hub; + unsigned int i; int err; hub = devm_kzalloc(dev, sizeof(*hub), GFP_KERNEL); @@ -246,9 +258,18 @@ static int onboard_hub_probe(struct platform_device *pdev) if (!hub->pdata) return -EINVAL; - hub->vdd = devm_regulator_get(dev, "vdd"); - if (IS_ERR(hub->vdd)) - return PTR_ERR(hub->vdd); + if (hub->pdata->num_supplies > MAX_SUPPLIES) + return dev_err_probe(dev, -EINVAL, "max %zu supplies supported!\n", + MAX_SUPPLIES); + + for (i = 0; i < hub->pdata->num_supplies; i++) + hub->supplies[i].supply = supply_names[i]; + + err = devm_regulator_bulk_get(dev, hub->pdata->num_supplies, hub->supplies); + if (err) { + dev_err(dev, "Failed to get regulator supplies: %d\n", err); + return err; + } hub->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH); @@ -329,6 +350,7 @@ static struct platform_driver onboard_hub_driver = { /************************** USB driver **************************/ +#define VENDOR_ID_CYPRESS 0x04b4 #define VENDOR_ID_GENESYS 0x05e3 #define VENDOR_ID_MICROCHIP 0x0424 #define VENDOR_ID_REALTEK 0x0bda @@ -407,8 +429,11 @@ static void onboard_hub_usbdev_disconnect(struct usb_device *udev) } static const struct usb_device_id onboard_hub_id_table[] = { + { USB_DEVICE(VENDOR_ID_CYPRESS, 0x6504) }, /* CYUSB33{0,1,2}x/CYUSB230x 3.0 */ + { USB_DEVICE(VENDOR_ID_CYPRESS, 0x6506) }, /* CYUSB33{0,1,2}x/CYUSB230x 2.0 */ { USB_DEVICE(VENDOR_ID_GENESYS, 0x0608) }, /* Genesys Logic GL850G USB 2.0 */ { USB_DEVICE(VENDOR_ID_GENESYS, 0x0610) }, /* Genesys Logic GL852G USB 2.0 */ + { USB_DEVICE(VENDOR_ID_GENESYS, 0x0620) }, /* Genesys Logic GL3523 USB 3.1 */ { USB_DEVICE(VENDOR_ID_MICROCHIP, 0x2514) }, /* USB2514B USB 2.0 */ { USB_DEVICE(VENDOR_ID_MICROCHIP, 0x2517) }, /* USB2517 USB 2.0 */ { USB_DEVICE(VENDOR_ID_REALTEK, 0x0411) }, /* RTS5411 USB 3.1 */ diff --git a/drivers/usb/misc/onboard_usb_hub.h b/drivers/usb/misc/onboard_usb_hub.h index aca5f50eb0da..4026ba64c592 100644 --- a/drivers/usb/misc/onboard_usb_hub.h +++ b/drivers/usb/misc/onboard_usb_hub.h @@ -8,30 +8,42 @@ struct onboard_hub_pdata { unsigned long reset_us; /* reset pulse width in us */ + unsigned int num_supplies; /* number of supplies */ }; static const struct onboard_hub_pdata microchip_usb424_data = { .reset_us = 1, + .num_supplies = 1, }; static const struct onboard_hub_pdata realtek_rts5411_data = { .reset_us = 0, + .num_supplies = 1, }; static const struct onboard_hub_pdata ti_tusb8041_data = { .reset_us = 3000, + .num_supplies = 1, +}; + +static const struct onboard_hub_pdata cypress_hx3_data = { + .reset_us = 10000, + .num_supplies = 2, }; static const struct onboard_hub_pdata genesys_gl850g_data = { .reset_us = 3, + .num_supplies = 1, }; static const struct onboard_hub_pdata genesys_gl852g_data = { .reset_us = 50, + .num_supplies = 1, }; static const struct onboard_hub_pdata vialab_vl817_data = { .reset_us = 10, + .num_supplies = 1, }; static const struct of_device_id onboard_hub_match[] = { @@ -39,8 +51,11 @@ static const struct of_device_id onboard_hub_match[] = { { .compatible = "usb424,2517", .data = µchip_usb424_data, }, { .compatible = "usb451,8140", .data = &ti_tusb8041_data, }, { .compatible = "usb451,8142", .data = &ti_tusb8041_data, }, + { .compatible = "usb4b4,6504", .data = &cypress_hx3_data, }, + { .compatible = "usb4b4,6506", .data = &cypress_hx3_data, }, { .compatible = "usb5e3,608", .data = &genesys_gl850g_data, }, { .compatible = "usb5e3,610", .data = &genesys_gl852g_data, }, + { .compatible = "usb5e3,620", .data = &genesys_gl852g_data, }, { .compatible = "usbbda,411", .data = &realtek_rts5411_data, }, { .compatible = "usbbda,5411", .data = &realtek_rts5411_data, }, { .compatible = "usbbda,414", .data = &realtek_rts5411_data, }, diff --git a/drivers/usb/misc/usb251xb.c b/drivers/usb/misc/usb251xb.c index e4edb486b69e..7da404f55a6d 100644 --- a/drivers/usb/misc/usb251xb.c +++ b/drivers/usb/misc/usb251xb.c @@ -16,7 +16,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/usb/misc/usb_u132.h b/drivers/usb/misc/usb_u132.h deleted file mode 100644 index 1584efbbd704..000000000000 --- a/drivers/usb/misc/usb_u132.h +++ /dev/null @@ -1,97 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* -* Common Header File for the Elan Digital Systems U132 adapter -* this file should be included by both the "ftdi-u132" and -* the "u132-hcd" modules. -* -* Copyright(C) 2006 Elan Digital Systems Limited -*(http://www.elandigitalsystems.com) -* -* Author and Maintainer - Tony Olech - Elan Digital Systems -*(tony.olech@elandigitalsystems.com) -* -* The driver was written by Tony Olech(tony.olech@elandigitalsystems.com) -* based on various USB client drivers in the 2.6.15 linux kernel -* with constant reference to the 3rd Edition of Linux Device Drivers -* published by O'Reilly -* -* The U132 adapter is a USB to CardBus adapter specifically designed -* for PC cards that contain an OHCI host controller. Typical PC cards -* are the Orange Mobile 3G Option GlobeTrotter Fusion card. -* -* The U132 adapter will *NOT *work with PC cards that do not contain -* an OHCI controller. A simple way to test whether a PC card has an -* OHCI controller as an interface is to insert the PC card directly -* into a laptop(or desktop) with a CardBus slot and if "lspci" shows -* a new USB controller and "lsusb -v" shows a new OHCI Host Controller -* then there is a good chance that the U132 adapter will support the -* PC card.(you also need the specific client driver for the PC card) -* -* Please inform the Author and Maintainer about any PC cards that -* contain OHCI Host Controller and work when directly connected to -* an embedded CardBus slot but do not work when they are connected -* via an ELAN U132 adapter. -* -* The driver consists of two modules, the "ftdi-u132" module is -* a USB client driver that interfaces to the FTDI chip within -* the U132 adapter manufactured by Elan Digital Systems, and the -* "u132-hcd" module is a USB host controller driver that talks -* to the OHCI controller within CardBus card that are inserted -* in the U132 adapter. -* -* The "ftdi-u132" module should be loaded automatically by the -* hot plug system when the U132 adapter is plugged in. The module -* initialises the adapter which mostly consists of synchronising -* the FTDI chip, before continuously polling the adapter to detect -* PC card insertions. As soon as a PC card containing a recognised -* OHCI controller is seen the "ftdi-u132" module explicitly requests -* the kernel to load the "u132-hcd" module. -* -* The "ftdi-u132" module provides the interface to the inserted -* PC card and the "u132-hcd" module uses the API to send and receive -* data. The API features call-backs, so that part of the "u132-hcd" -* module code will run in the context of one of the kernel threads -* of the "ftdi-u132" module. -* -*/ -int ftdi_elan_switch_on_diagnostics(int number); -void ftdi_elan_gone_away(struct platform_device *pdev); -void start_usb_lock_device_tracing(void); -struct u132_platform_data { - u16 vendor; - u16 device; - u8 potpg; - void (*port_power) (struct device *dev, int is_on); - void (*reset) (struct device *dev); -}; -int usb_ftdi_elan_edset_single(struct platform_device *pdev, u8 ed_number, - void *endp, struct urb *urb, u8 address, u8 ep_number, u8 toggle_bits, - void (*callback) (void *endp, struct urb *urb, u8 *buf, int len, - int toggle_bits, int error_count, int condition_code, int repeat_number, - int halted, int skipped, int actual, int non_null)); -int usb_ftdi_elan_edset_output(struct platform_device *pdev, u8 ed_number, - void *endp, struct urb *urb, u8 address, u8 ep_number, u8 toggle_bits, - void (*callback) (void *endp, struct urb *urb, u8 *buf, int len, - int toggle_bits, int error_count, int condition_code, int repeat_number, - int halted, int skipped, int actual, int non_null)); -int usb_ftdi_elan_edset_empty(struct platform_device *pdev, u8 ed_number, - void *endp, struct urb *urb, u8 address, u8 ep_number, u8 toggle_bits, - void (*callback) (void *endp, struct urb *urb, u8 *buf, int len, - int toggle_bits, int error_count, int condition_code, int repeat_number, - int halted, int skipped, int actual, int non_null)); -int usb_ftdi_elan_edset_input(struct platform_device *pdev, u8 ed_number, - void *endp, struct urb *urb, u8 address, u8 ep_number, u8 toggle_bits, - void (*callback) (void *endp, struct urb *urb, u8 *buf, int len, - int toggle_bits, int error_count, int condition_code, int repeat_number, - int halted, int skipped, int actual, int non_null)); -int usb_ftdi_elan_edset_setup(struct platform_device *pdev, u8 ed_number, - void *endp, struct urb *urb, u8 address, u8 ep_number, u8 toggle_bits, - void (*callback) (void *endp, struct urb *urb, u8 *buf, int len, - int toggle_bits, int error_count, int condition_code, int repeat_number, - int halted, int skipped, int actual, int non_null)); -int usb_ftdi_elan_edset_flush(struct platform_device *pdev, u8 ed_number, - void *endp); -int usb_ftdi_elan_read_pcimem(struct platform_device *pdev, int mem_offset, - u8 width, u32 *data); -int usb_ftdi_elan_write_pcimem(struct platform_device *pdev, int mem_offset, - u8 width, u32 data); diff --git a/drivers/usb/misc/usbsevseg.c b/drivers/usb/misc/usbsevseg.c index c3114d9bd128..546deff754ba 100644 --- a/drivers/usb/misc/usbsevseg.c +++ b/drivers/usb/misc/usbsevseg.c @@ -305,7 +305,7 @@ static int sevseg_probe(struct usb_interface *interface, const struct usb_device_id *id) { struct usb_device *udev = interface_to_usbdev(interface); - struct usb_sevsegdev *mydev = NULL; + struct usb_sevsegdev *mydev; int rc = -ENOMEM; mydev = kzalloc(sizeof(struct usb_sevsegdev), GFP_KERNEL); diff --git a/drivers/usb/mtu3/mtu3.h b/drivers/usb/mtu3/mtu3.h index b4a7662dded5..c11840b9a6f1 100644 --- a/drivers/usb/mtu3/mtu3.h +++ b/drivers/usb/mtu3/mtu3.h @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include diff --git a/drivers/usb/mtu3/mtu3_host.c b/drivers/usb/mtu3/mtu3_host.c index 177d2caf887c..9f2be22af844 100644 --- a/drivers/usb/mtu3/mtu3_host.c +++ b/drivers/usb/mtu3/mtu3_host.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include diff --git a/drivers/usb/musb/cppi_dma.h b/drivers/usb/musb/cppi_dma.h index 16dd1ed44bb5..3606be897cb2 100644 --- a/drivers/usb/musb/cppi_dma.h +++ b/drivers/usb/musb/cppi_dma.h @@ -121,9 +121,6 @@ struct cppi { struct list_head tx_complete; }; -/* CPPI IRQ handler */ -extern irqreturn_t cppi_interrupt(int, void *); - struct cppi41_dma_channel { struct dma_channel channel; struct cppi41_dma_controller *controller; diff --git a/drivers/usb/musb/jz4740.c b/drivers/usb/musb/jz4740.c index 5aabdd7e2511..b38df9226278 100644 --- a/drivers/usb/musb/jz4740.c +++ b/drivers/usb/musb/jz4740.c @@ -10,7 +10,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/usb/musb/mediatek.c b/drivers/usb/musb/mediatek.c index 598ee5c0bf34..0a35aab3ab81 100644 --- a/drivers/usb/musb/mediatek.c +++ b/drivers/usb/musb/mediatek.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include diff --git a/drivers/usb/musb/mpfs.c b/drivers/usb/musb/mpfs.c index 24b98716f7fc..f0f56df38835 100644 --- a/drivers/usb/musb/mpfs.c +++ b/drivers/usb/musb/mpfs.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include "musb_core.h" diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c index ecbd3784bec3..b24adb5b399f 100644 --- a/drivers/usb/musb/musb_core.c +++ b/drivers/usb/musb/musb_core.c @@ -2610,8 +2610,8 @@ static int musb_probe(struct platform_device *pdev) int irq = platform_get_irq_byname(pdev, "mc"); void __iomem *base; - if (irq <= 0) - return -ENODEV; + if (irq < 0) + return irq; base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(base)) diff --git a/drivers/usb/musb/musb_dma.h b/drivers/usb/musb/musb_dma.h index e2445ca3356d..0cd7fc468de8 100644 --- a/drivers/usb/musb/musb_dma.h +++ b/drivers/usb/musb/musb_dma.h @@ -198,10 +198,6 @@ extern struct dma_controller * tusb_dma_controller_create(struct musb *musb, void __iomem *base); extern void tusb_dma_controller_destroy(struct dma_controller *c); -extern struct dma_controller * -cppi_dma_controller_create(struct musb *musb, void __iomem *base); -extern void cppi_dma_controller_destroy(struct dma_controller *c); - extern struct dma_controller * cppi41_dma_controller_create(struct musb *musb, void __iomem *base); extern void cppi41_dma_controller_destroy(struct dma_controller *c); diff --git a/drivers/usb/musb/musb_dsps.c b/drivers/usb/musb/musb_dsps.c index 9119b1d51370..98b42dc04dee 100644 --- a/drivers/usb/musb/musb_dsps.c +++ b/drivers/usb/musb/musb_dsps.c @@ -26,9 +26,7 @@ #include #include -#include #include -#include #include #include diff --git a/drivers/usb/musb/musb_gadget.c b/drivers/usb/musb/musb_gadget.c index 31c44325e828..051c6da7cf6d 100644 --- a/drivers/usb/musb/musb_gadget.c +++ b/drivers/usb/musb/musb_gadget.c @@ -1130,7 +1130,7 @@ static int musb_gadget_disable(struct usb_ep *ep) struct usb_request *musb_alloc_request(struct usb_ep *ep, gfp_t gfp_flags) { struct musb_ep *musb_ep = to_musb_ep(ep); - struct musb_request *request = NULL; + struct musb_request *request; request = kzalloc(sizeof *request, gfp_flags); if (!request) diff --git a/drivers/usb/musb/sunxi.c b/drivers/usb/musb/sunxi.c index c5c6c4e09300..d54283fd026b 100644 --- a/drivers/usb/musb/sunxi.c +++ b/drivers/usb/musb/sunxi.c @@ -15,7 +15,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/usb/musb/tusb6010.c b/drivers/usb/musb/tusb6010.c index cbc707fe570f..461587629bf2 100644 --- a/drivers/usb/musb/tusb6010.c +++ b/drivers/usb/musb/tusb6010.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include #include @@ -1029,7 +1030,7 @@ static int tusb_musb_start(struct musb *musb) void __iomem *tbase = musb->ctrl_base; unsigned long flags; u32 reg; - int i; + int ret; /* * Enable or disable power to TUSB6010. When enabling, turn on 3.3 V and @@ -1037,17 +1038,13 @@ static int tusb_musb_start(struct musb *musb) * provide then PGOOD signal to TUSB6010 which will release it from reset. */ gpiod_set_value(glue->enable, 1); - msleep(1); /* Wait for 100ms until TUSB6010 pulls INT pin down */ - i = 100; - while (i && gpiod_get_value(glue->intpin)) { - msleep(1); - i--; - } - if (!i) { - pr_err("tusb: Powerup respones failed\n"); - return -ENODEV; + ret = read_poll_timeout(gpiod_get_value, reg, !reg, 5000, 100000, true, + glue->intpin); + if (ret) { + pr_err("tusb: Powerup response failed\n"); + return ret; } spin_lock_irqsave(&musb->lock, flags); diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-usb.c index e1a2b2ea098b..acd46b72899e 100644 --- a/drivers/usb/phy/phy-mxs-usb.c +++ b/drivers/usb/phy/phy-mxs-usb.c @@ -14,7 +14,7 @@ #include #include #include -#include +#include #include #include #include @@ -388,19 +388,14 @@ static void __mxs_phy_disconnect_line(struct mxs_phy *mxs_phy, bool disconnect) static bool mxs_phy_is_otg_host(struct mxs_phy *mxs_phy) { - void __iomem *base = mxs_phy->phy.io_priv; - u32 phyctrl = readl(base + HW_USBPHY_CTRL); - - if (IS_ENABLED(CONFIG_USB_OTG) && - !(phyctrl & BM_USBPHY_CTRL_OTG_ID_VALUE)) - return true; - - return false; + return IS_ENABLED(CONFIG_USB_OTG) && + mxs_phy->phy.last_event == USB_EVENT_ID; } static void mxs_phy_disconnect_line(struct mxs_phy *mxs_phy, bool on) { bool vbus_is_on = false; + enum usb_phy_events last_event = mxs_phy->phy.last_event; /* If the SoCs don't need to disconnect line without vbus, quit */ if (!(mxs_phy->data->flags & MXS_PHY_DISCONNECT_LINE_WITHOUT_VBUS)) @@ -412,7 +407,8 @@ static void mxs_phy_disconnect_line(struct mxs_phy *mxs_phy, bool on) vbus_is_on = mxs_phy_get_vbus_status(mxs_phy); - if (on && !vbus_is_on && !mxs_phy_is_otg_host(mxs_phy)) + if (on && ((!vbus_is_on && !mxs_phy_is_otg_host(mxs_phy)) + || (last_event == USB_EVENT_VBUS))) __mxs_phy_disconnect_line(mxs_phy, true); else __mxs_phy_disconnect_line(mxs_phy, false); diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c index 8b2ff3a8882d..4ea47e6f835b 100644 --- a/drivers/usb/phy/phy-tegra-usb.c +++ b/drivers/usb/phy/phy-tegra-usb.c @@ -16,7 +16,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/usb/renesas_usbhs/common.c b/drivers/usb/renesas_usbhs/common.c index 111b7ee152c4..dd1c17542439 100644 --- a/drivers/usb/renesas_usbhs/common.c +++ b/drivers/usb/renesas_usbhs/common.c @@ -11,7 +11,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/usb/renesas_usbhs/rza.c b/drivers/usb/renesas_usbhs/rza.c index 2d77edefb4b3..97b5217c5a90 100644 --- a/drivers/usb/renesas_usbhs/rza.c +++ b/drivers/usb/renesas_usbhs/rza.c @@ -8,7 +8,7 @@ #include #include -#include +#include #include "common.h" #include "rza.h" diff --git a/drivers/usb/renesas_usbhs/rza2.c b/drivers/usb/renesas_usbhs/rza2.c index 3eed3334a17f..f079817250bb 100644 --- a/drivers/usb/renesas_usbhs/rza2.c +++ b/drivers/usb/renesas_usbhs/rza2.c @@ -8,7 +8,6 @@ #include #include -#include #include #include "common.h" #include "rza.h" diff --git a/drivers/usb/serial/option.c b/drivers/usb/serial/option.c index 8ac98e60fff5..7994a4549a6c 100644 --- a/drivers/usb/serial/option.c +++ b/drivers/usb/serial/option.c @@ -259,6 +259,7 @@ static void option_instat_callback(struct urb *urb); #define QUECTEL_PRODUCT_EM05G 0x030a #define QUECTEL_PRODUCT_EM060K 0x030b #define QUECTEL_PRODUCT_EM05G_CS 0x030c +#define QUECTEL_PRODUCT_EM05GV2 0x030e #define QUECTEL_PRODUCT_EM05CN_SG 0x0310 #define QUECTEL_PRODUCT_EM05G_SG 0x0311 #define QUECTEL_PRODUCT_EM05CN 0x0312 @@ -1188,6 +1189,8 @@ static const struct usb_device_id option_ids[] = { .driver_info = RSVD(6) | ZLP }, { USB_DEVICE_INTERFACE_CLASS(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EM05G, 0xff), .driver_info = RSVD(6) | ZLP }, + { USB_DEVICE_INTERFACE_CLASS(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EM05GV2, 0xff), + .driver_info = RSVD(4) | ZLP }, { USB_DEVICE_INTERFACE_CLASS(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EM05G_CS, 0xff), .driver_info = RSVD(6) | ZLP }, { USB_DEVICE_INTERFACE_CLASS(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EM05G_GR, 0xff), @@ -2232,6 +2235,10 @@ static const struct usb_device_id option_ids[] = { .driver_info = RSVD(0) | RSVD(1) | RSVD(6) }, { USB_DEVICE_INTERFACE_CLASS(0x0489, 0xe0db, 0xff), /* Foxconn T99W265 MBIM */ .driver_info = RSVD(3) }, + { USB_DEVICE_INTERFACE_CLASS(0x0489, 0xe0ee, 0xff), /* Foxconn T99W368 MBIM */ + .driver_info = RSVD(3) }, + { USB_DEVICE_INTERFACE_CLASS(0x0489, 0xe0f0, 0xff), /* Foxconn T99W373 MBIM */ + .driver_info = RSVD(3) }, { USB_DEVICE(0x1508, 0x1001), /* Fibocom NL668 (IOT version) */ .driver_info = RSVD(4) | RSVD(5) | RSVD(6) }, { USB_DEVICE(0x1782, 0x4d10) }, /* Fibocom L610 (AT mode) */ diff --git a/drivers/usb/serial/usb-serial.c b/drivers/usb/serial/usb-serial.c index 7b4805c1004d..17b09f03ef84 100644 --- a/drivers/usb/serial/usb-serial.c +++ b/drivers/usb/serial/usb-serial.c @@ -361,8 +361,7 @@ static void serial_cleanup(struct tty_struct *tty) module_put(owner); } -static int serial_write(struct tty_struct *tty, const unsigned char *buf, - int count) +static ssize_t serial_write(struct tty_struct *tty, const u8 *buf, size_t count) { struct usb_serial_port *port = tty->driver_data; int retval = -ENODEV; @@ -370,7 +369,7 @@ static int serial_write(struct tty_struct *tty, const unsigned char *buf, if (port->serial->dev->state == USB_STATE_NOTATTACHED) goto exit; - dev_dbg(&port->dev, "%s - %d byte(s)\n", __func__, count); + dev_dbg(&port->dev, "%s - %zu byte(s)\n", __func__, count); retval = port->serial->type->write(tty, port, buf, count); if (retval < 0) diff --git a/drivers/usb/serial/xr_serial.c b/drivers/usb/serial/xr_serial.c index 4ec7c5892b84..1d9a12628f81 100644 --- a/drivers/usb/serial/xr_serial.c +++ b/drivers/usb/serial/xr_serial.c @@ -93,6 +93,7 @@ struct xr_txrx_clk_mask { #define XR_GPIO_MODE_SEL_DTR_DSR 0x2 #define XR_GPIO_MODE_SEL_RS485 0x3 #define XR_GPIO_MODE_SEL_RS485_ADDR 0x4 +#define XR_GPIO_MODE_RS485_TX_H 0x8 #define XR_GPIO_MODE_TX_TOGGLE 0x100 #define XR_GPIO_MODE_RX_TOGGLE 0x200 @@ -237,6 +238,7 @@ static const struct xr_type xr_types[] = { struct xr_data { const struct xr_type *type; u8 channel; /* zero-based index or interface number */ + struct serial_rs485 rs485; }; static int xr_set_reg(struct usb_serial_port *port, u8 channel, u16 reg, u16 val) @@ -629,6 +631,7 @@ static void xr_set_flow_mode(struct tty_struct *tty, struct xr_data *data = usb_get_serial_port_data(port); const struct xr_type *type = data->type; u16 flow, gpio_mode; + bool rs485_enabled; int ret; ret = xr_get_reg_uart(port, type->gpio_mode, &gpio_mode); @@ -645,7 +648,17 @@ static void xr_set_flow_mode(struct tty_struct *tty, /* Set GPIO mode for controlling the pins manually by default. */ gpio_mode &= ~XR_GPIO_MODE_SEL_MASK; - if (C_CRTSCTS(tty) && C_BAUD(tty) != B0) { + rs485_enabled = !!(data->rs485.flags & SER_RS485_ENABLED); + if (rs485_enabled) { + dev_dbg(&port->dev, "Enabling RS-485\n"); + gpio_mode |= XR_GPIO_MODE_SEL_RS485; + if (data->rs485.flags & SER_RS485_RTS_ON_SEND) + gpio_mode &= ~XR_GPIO_MODE_RS485_TX_H; + else + gpio_mode |= XR_GPIO_MODE_RS485_TX_H; + } + + if (C_CRTSCTS(tty) && C_BAUD(tty) != B0 && !rs485_enabled) { dev_dbg(&port->dev, "Enabling hardware flow ctrl\n"); gpio_mode |= XR_GPIO_MODE_SEL_RTS_CTS; flow = XR_UART_FLOW_MODE_HW; @@ -809,6 +822,79 @@ static void xr_cdc_set_line_coding(struct tty_struct *tty, kfree(lc); } +static void xr_sanitize_serial_rs485(struct serial_rs485 *rs485) +{ + if (!(rs485->flags & SER_RS485_ENABLED)) { + memset(rs485, 0, sizeof(*rs485)); + return; + } + + /* RTS always toggles after TX */ + if (rs485->flags & SER_RS485_RTS_ON_SEND) + rs485->flags &= ~SER_RS485_RTS_AFTER_SEND; + else + rs485->flags |= SER_RS485_RTS_AFTER_SEND; + + /* Only the flags are implemented at the moment */ + rs485->flags &= SER_RS485_ENABLED | SER_RS485_RTS_ON_SEND | + SER_RS485_RTS_AFTER_SEND; + rs485->delay_rts_before_send = 0; + rs485->delay_rts_after_send = 0; + memset(rs485->padding, 0, sizeof(rs485->padding)); +} + +static int xr_get_rs485_config(struct tty_struct *tty, + struct serial_rs485 __user *argp) +{ + struct usb_serial_port *port = tty->driver_data; + struct xr_data *data = usb_get_serial_port_data(port); + + down_read(&tty->termios_rwsem); + if (copy_to_user(argp, &data->rs485, sizeof(data->rs485))) { + up_read(&tty->termios_rwsem); + return -EFAULT; + } + up_read(&tty->termios_rwsem); + + return 0; +} + +static int xr_set_rs485_config(struct tty_struct *tty, + struct serial_rs485 __user *argp) +{ + struct usb_serial_port *port = tty->driver_data; + struct xr_data *data = usb_get_serial_port_data(port); + struct serial_rs485 rs485; + + if (copy_from_user(&rs485, argp, sizeof(rs485))) + return -EFAULT; + xr_sanitize_serial_rs485(&rs485); + + down_write(&tty->termios_rwsem); + data->rs485 = rs485; + xr_set_flow_mode(tty, port, NULL); + up_write(&tty->termios_rwsem); + + if (copy_to_user(argp, &rs485, sizeof(rs485))) + return -EFAULT; + + return 0; +} + +static int xr_ioctl(struct tty_struct *tty, unsigned int cmd, unsigned long arg) +{ + void __user *argp = (void __user *)arg; + + switch (cmd) { + case TIOCGRS485: + return xr_get_rs485_config(tty, argp); + case TIOCSRS485: + return xr_set_rs485_config(tty, argp); + } + + return -ENOIOCTLCMD; +} + static void xr_set_termios(struct tty_struct *tty, struct usb_serial_port *port, const struct ktermios *old_termios) @@ -1010,6 +1096,7 @@ static struct usb_serial_driver xr_device = { .set_termios = xr_set_termios, .tiocmget = xr_tiocmget, .tiocmset = xr_tiocmset, + .ioctl = xr_ioctl, .dtr_rts = xr_dtr_rts }; diff --git a/drivers/usb/typec/altmodes/displayport.c b/drivers/usb/typec/altmodes/displayport.c index cdf8261e22db..426c88a516e5 100644 --- a/drivers/usb/typec/altmodes/displayport.c +++ b/drivers/usb/typec/altmodes/displayport.c @@ -594,7 +594,10 @@ int dp_altmode_probe(struct typec_altmode *alt) alt->ops = &dp_altmode_ops; fwnode = dev_fwnode(alt->dev.parent->parent); /* typec_port fwnode */ - dp->connector_fwnode = fwnode_find_reference(fwnode, "displayport", 0); + if (fwnode_property_present(fwnode, "displayport")) + dp->connector_fwnode = fwnode_find_reference(fwnode, "displayport", 0); + else + dp->connector_fwnode = fwnode_handle_get(fwnode); /* embedded DP */ if (IS_ERR(dp->connector_fwnode)) dp->connector_fwnode = NULL; diff --git a/drivers/usb/typec/bus.c b/drivers/usb/typec/bus.c index fe5b9a2e61f5..e95ec7e382bb 100644 --- a/drivers/usb/typec/bus.c +++ b/drivers/usb/typec/bus.c @@ -183,12 +183,20 @@ EXPORT_SYMBOL_GPL(typec_altmode_exit); * * Notifies the partner of @adev about Attention command. */ -void typec_altmode_attention(struct typec_altmode *adev, u32 vdo) +int typec_altmode_attention(struct typec_altmode *adev, u32 vdo) { - struct typec_altmode *pdev = &to_altmode(adev)->partner->adev; + struct altmode *partner = to_altmode(adev)->partner; + struct typec_altmode *pdev; + + if (!partner) + return -ENODEV; + + pdev = &partner->adev; if (pdev->ops && pdev->ops->attention) pdev->ops->attention(pdev, vdo); + + return 0; } EXPORT_SYMBOL_GPL(typec_altmode_attention); diff --git a/drivers/usb/typec/mux/intel_pmc_mux.c b/drivers/usb/typec/mux/intel_pmc_mux.c index 5e8edf3881c0..60ed1f809130 100644 --- a/drivers/usb/typec/mux/intel_pmc_mux.c +++ b/drivers/usb/typec/mux/intel_pmc_mux.c @@ -59,7 +59,7 @@ enum { }; /* Common Mode Data bits */ -#define PMC_USB_ALTMODE_ACTIVE_CABLE BIT(2) +#define PMC_USB_ALTMODE_RETIMER_CABLE BIT(2) #define PMC_USB_ALTMODE_ORI_SHIFT 1 #define PMC_USB_ALTMODE_UFP_SHIFT 3 @@ -71,6 +71,7 @@ enum { #define PMC_USB_ALTMODE_TBT_TYPE BIT(17) #define PMC_USB_ALTMODE_CABLE_TYPE BIT(18) #define PMC_USB_ALTMODE_ACTIVE_LINK BIT(20) +#define PMC_USB_ALTMODE_ACTIVE_CABLE BIT(22) #define PMC_USB_ALTMODE_FORCE_LSR BIT(23) #define PMC_USB_ALTMODE_CABLE_SPD(_s_) (((_s_) & GENMASK(2, 0)) << 25) #define PMC_USB_ALTMODE_CABLE_USB31 1 @@ -117,6 +118,16 @@ enum { IOM_PORT_STATUS_DHPD_HPD_STATUS_SHIFT) & \ IOM_PORT_STATUS_DHPD_HPD_STATUS_ASSERT) +/* IOM port status register */ +#define IOM_PORT_STATUS_REGS(_offset_, _size_) ((_offset_) | (_size_)) +#define IOM_PORT_STATUS_REGS_SZ_MASK BIT(0) +#define IOM_PORT_STATUS_REGS_SZ_4 0 +#define IOM_PORT_STATUS_REGS_SZ_8 1 +#define IOM_PORT_STATUS_REGS_OFFSET(_d_) \ + ((_d_) & ~IOM_PORT_STATUS_REGS_SZ_MASK) +#define IOM_PORT_STATUS_REGS_SIZE(_d_) \ + (4 << ((_d_) & IOM_PORT_STATUS_REGS_SZ_MASK)) + struct pmc_usb; struct pmc_usb_port { @@ -145,6 +156,7 @@ struct pmc_usb { struct acpi_device *iom_adev; void __iomem *iom_base; u32 iom_port_status_offset; + u8 iom_port_status_size; struct dentry *dentry; }; @@ -160,7 +172,7 @@ static void update_port_status(struct pmc_usb_port *port) port->iom_status = readl(port->pmc->iom_base + port->pmc->iom_port_status_offset + - port_num * sizeof(u32)); + port_num * port->pmc->iom_port_status_size); } static int sbu_orientation(struct pmc_usb_port *port) @@ -319,8 +331,18 @@ pmc_usb_mux_tbt(struct pmc_usb_port *port, struct typec_mux_state *state) if (data->cable_mode & TBT_CABLE_LINK_TRAINING) req.mode_data |= PMC_USB_ALTMODE_ACTIVE_LINK; - if (data->enter_vdo & TBT_ENTER_MODE_ACTIVE_CABLE) - req.mode_data |= PMC_USB_ALTMODE_ACTIVE_CABLE; + if (acpi_dev_hid_uid_match(port->pmc->iom_adev, "INTC1072", NULL) || + acpi_dev_hid_uid_match(port->pmc->iom_adev, "INTC1079", NULL)) { + if ((data->enter_vdo & TBT_ENTER_MODE_ACTIVE_CABLE) || + (data->cable_mode & TBT_CABLE_RETIMER)) + req.mode_data |= PMC_USB_ALTMODE_RETIMER_CABLE; + } else { + if (data->enter_vdo & TBT_ENTER_MODE_ACTIVE_CABLE) + req.mode_data |= PMC_USB_ALTMODE_ACTIVE_CABLE; + + if (data->cable_mode & TBT_CABLE_RETIMER) + req.mode_data |= PMC_USB_ALTMODE_RETIMER_CABLE; + } req.mode_data |= PMC_USB_ALTMODE_CABLE_SPD(cable_speed); @@ -359,8 +381,17 @@ pmc_usb_mux_usb4(struct pmc_usb_port *port, struct typec_mux_state *state) case EUDO_CABLE_TYPE_OPTICAL: req.mode_data |= PMC_USB_ALTMODE_CABLE_TYPE; fallthrough; + case EUDO_CABLE_TYPE_RE_TIMER: + if (!acpi_dev_hid_uid_match(port->pmc->iom_adev, "INTC1072", NULL) || + !acpi_dev_hid_uid_match(port->pmc->iom_adev, "INTC1079", NULL)) + req.mode_data |= PMC_USB_ALTMODE_RETIMER_CABLE; + fallthrough; default: - req.mode_data |= PMC_USB_ALTMODE_ACTIVE_CABLE; + if (acpi_dev_hid_uid_match(port->pmc->iom_adev, "INTC1072", NULL) || + acpi_dev_hid_uid_match(port->pmc->iom_adev, "INTC1079", NULL)) + req.mode_data |= PMC_USB_ALTMODE_RETIMER_CABLE; + else + req.mode_data |= PMC_USB_ALTMODE_ACTIVE_CABLE; /* Configure data rate to rounded in the case of Active TBT3 * and USB4 cables. @@ -589,13 +620,16 @@ err_unregister_switch: /* IOM ACPI IDs and IOM_PORT_STATUS_OFFSET */ static const struct acpi_device_id iom_acpi_ids[] = { /* TigerLake */ - { "INTC1072", 0x560, }, + { "INTC1072", IOM_PORT_STATUS_REGS(0x560, IOM_PORT_STATUS_REGS_SZ_4) }, /* AlderLake */ - { "INTC1079", 0x160, }, + { "INTC1079", IOM_PORT_STATUS_REGS(0x160, IOM_PORT_STATUS_REGS_SZ_4) }, /* Meteor Lake */ - { "INTC107A", 0x160, }, + { "INTC107A", IOM_PORT_STATUS_REGS(0x160, IOM_PORT_STATUS_REGS_SZ_4) }, + + /* Lunar Lake */ + { "INTC10EA", IOM_PORT_STATUS_REGS(0x150, IOM_PORT_STATUS_REGS_SZ_8) }, {} }; @@ -615,7 +649,8 @@ static int pmc_usb_probe_iom(struct pmc_usb *pmc) if (!adev) return -ENODEV; - pmc->iom_port_status_offset = (u32)dev_id->driver_data; + pmc->iom_port_status_offset = IOM_PORT_STATUS_REGS_OFFSET(dev_id->driver_data); + pmc->iom_port_status_size = IOM_PORT_STATUS_REGS_SIZE(dev_id->driver_data); INIT_LIST_HEAD(&resource_list); ret = acpi_dev_get_memory_resources(adev, &resource_list); diff --git a/drivers/usb/typec/mux/nb7vpq904m.c b/drivers/usb/typec/mux/nb7vpq904m.c index 4d1122d95013..cda206cf0c38 100644 --- a/drivers/usb/typec/mux/nb7vpq904m.c +++ b/drivers/usb/typec/mux/nb7vpq904m.c @@ -528,7 +528,7 @@ static struct i2c_driver nb7vpq904m_driver = { .name = "nb7vpq904m", .of_match_table = nb7vpq904m_of_table, }, - .probe_new = nb7vpq904m_probe, + .probe = nb7vpq904m_probe, .remove = nb7vpq904m_remove, .id_table = nb7vpq904m_table, }; diff --git a/drivers/usb/typec/tcpm/Kconfig b/drivers/usb/typec/tcpm/Kconfig index 5d393f520fc2..0b2993fef564 100644 --- a/drivers/usb/typec/tcpm/Kconfig +++ b/drivers/usb/typec/tcpm/Kconfig @@ -79,6 +79,7 @@ config TYPEC_WCOVE config TYPEC_QCOM_PMIC tristate "Qualcomm PMIC USB Type-C Port Controller Manager driver" depends on ARCH_QCOM || COMPILE_TEST + depends on DRM || DRM=n help A Type-C port and Power Delivery driver which aggregates two discrete pieces of silicon in the PM8150b PMIC block: the diff --git a/drivers/usb/typec/tcpm/fusb302.c b/drivers/usb/typec/tcpm/fusb302.c index 7fc1ffa14f76..bc21006e979c 100644 --- a/drivers/usb/typec/tcpm/fusb302.c +++ b/drivers/usb/typec/tcpm/fusb302.c @@ -15,7 +15,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/usb/typec/tcpm/qcom/qcom_pmic_typec.c b/drivers/usb/typec/tcpm/qcom/qcom_pmic_typec.c index 9b467a346114..581199d37b49 100644 --- a/drivers/usb/typec/tcpm/qcom/qcom_pmic_typec.c +++ b/drivers/usb/typec/tcpm/qcom/qcom_pmic_typec.c @@ -8,7 +8,7 @@ #include #include #include -#include +#include #include #include #include @@ -17,6 +17,9 @@ #include #include #include + +#include + #include "qcom_pmic_typec_pdphy.h" #include "qcom_pmic_typec_port.h" @@ -33,6 +36,7 @@ struct pmic_typec { struct pmic_typec_port *pmic_typec_port; bool vbus_enabled; struct mutex lock; /* VBUS state serialization */ + struct drm_bridge bridge; }; #define tcpc_to_tcpm(_tcpc_) container_of(_tcpc_, struct pmic_typec, tcpc) @@ -146,6 +150,35 @@ static int qcom_pmic_typec_init(struct tcpc_dev *tcpc) return 0; } +#if IS_ENABLED(CONFIG_DRM) +static int qcom_pmic_typec_attach(struct drm_bridge *bridge, + enum drm_bridge_attach_flags flags) +{ + return flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR ? 0 : -EINVAL; +} + +static const struct drm_bridge_funcs qcom_pmic_typec_bridge_funcs = { + .attach = qcom_pmic_typec_attach, +}; + +static int qcom_pmic_typec_init_drm(struct pmic_typec *tcpm) +{ + tcpm->bridge.funcs = &qcom_pmic_typec_bridge_funcs; +#ifdef CONFIG_OF + tcpm->bridge.of_node = of_get_child_by_name(tcpm->dev->of_node, "connector"); +#endif + tcpm->bridge.ops = DRM_BRIDGE_OP_HPD; + tcpm->bridge.type = DRM_MODE_CONNECTOR_DisplayPort; + + return devm_drm_bridge_add(tcpm->dev, &tcpm->bridge); +} +#else +static int qcom_pmic_typec_init_drm(struct pmic_typec *tcpm) +{ + return 0; +} +#endif + static int qcom_pmic_typec_probe(struct platform_device *pdev) { struct pmic_typec *tcpm; @@ -208,6 +241,10 @@ static int qcom_pmic_typec_probe(struct platform_device *pdev) mutex_init(&tcpm->lock); platform_set_drvdata(pdev, tcpm); + ret = qcom_pmic_typec_init_drm(tcpm); + if (ret) + return ret; + tcpm->tcpc.fwnode = device_get_named_child_node(tcpm->dev, "connector"); if (!tcpm->tcpc.fwnode) return -EINVAL; diff --git a/drivers/usb/typec/tcpm/qcom/qcom_pmic_typec_pdphy.c b/drivers/usb/typec/tcpm/qcom/qcom_pmic_typec_pdphy.c index 4e1b846627d2..bb0b8479d80f 100644 --- a/drivers/usb/typec/tcpm/qcom/qcom_pmic_typec_pdphy.c +++ b/drivers/usb/typec/tcpm/qcom/qcom_pmic_typec_pdphy.c @@ -8,8 +8,6 @@ #include #include #include -#include -#include #include #include #include diff --git a/drivers/usb/typec/tcpm/qcom/qcom_pmic_typec_port.c b/drivers/usb/typec/tcpm/qcom/qcom_pmic_typec_port.c index 94285f64b67d..a8f3f4d3a450 100644 --- a/drivers/usb/typec/tcpm/qcom/qcom_pmic_typec_port.c +++ b/drivers/usb/typec/tcpm/qcom/qcom_pmic_typec_port.c @@ -9,7 +9,6 @@ #include #include #include -#include #include #include #include @@ -214,6 +213,11 @@ int qcom_pmic_typec_port_get_cc(struct pmic_typec_port *pmic_typec_port, if (ret) goto done; switch (val & DETECTED_SRC_TYPE_MASK) { + case AUDIO_ACCESS_RA_RA: + val = TYPEC_CC_RA; + *cc1 = TYPEC_CC_RA; + *cc2 = TYPEC_CC_RA; + break; case SRC_RD_OPEN: val = TYPEC_CC_RD; break; diff --git a/drivers/usb/typec/tcpm/tcpci.c b/drivers/usb/typec/tcpm/tcpci.c index fc708c289a73..0ee3e6e29bb1 100644 --- a/drivers/usb/typec/tcpm/tcpci.c +++ b/drivers/usb/typec/tcpm/tcpci.c @@ -602,6 +602,10 @@ static int tcpci_init(struct tcpc_dev *tcpc) if (time_after(jiffies, timeout)) return -ETIMEDOUT; + ret = tcpci_write16(tcpci, TCPC_FAULT_STATUS, TCPC_FAULT_STATUS_ALL_REG_RST_TO_DEFAULT); + if (ret < 0) + return ret; + /* Handle vendor init */ if (tcpci->data->init) { ret = tcpci->data->init(tcpci, tcpci->data); diff --git a/drivers/usb/typec/tcpm/tcpci_mt6370.c b/drivers/usb/typec/tcpm/tcpci_mt6370.c index 2a079464b398..9cda1005ef01 100644 --- a/drivers/usb/typec/tcpm/tcpci_mt6370.c +++ b/drivers/usb/typec/tcpm/tcpci_mt6370.c @@ -147,7 +147,7 @@ static int mt6370_tcpc_probe(struct platform_device *pdev) irq = platform_get_irq(pdev, 0); if (irq < 0) - return dev_err_probe(dev, irq, "Failed to get irq\n"); + return irq; /* Assign TCPCI feature and ops */ priv->tcpci_data.auto_discharge_disconnect = 1; diff --git a/drivers/usb/typec/tcpm/tcpm.c b/drivers/usb/typec/tcpm/tcpm.c index edb02f9d6797..72ead0384002 100644 --- a/drivers/usb/typec/tcpm/tcpm.c +++ b/drivers/usb/typec/tcpm/tcpm.c @@ -1877,7 +1877,8 @@ static void tcpm_handle_vdm_request(struct tcpm_port *port, } break; case ADEV_ATTENTION: - typec_altmode_attention(adev, p[1]); + if (typec_altmode_attention(adev, p[1])) + tcpm_log(port, "typec_altmode_attention no port partner altmode"); break; } } @@ -2753,6 +2754,13 @@ static void tcpm_pd_ctrl_request(struct tcpm_port *port, port->sink_cap_done = true; tcpm_set_state(port, ready_state(port), 0); break; + /* + * Some port partners do not support GET_STATUS, avoid soft reset the link to + * prevent redundant power re-negotiation + */ + case GET_STATUS_SEND: + tcpm_set_state(port, ready_state(port), 0); + break; case SRC_READY: case SNK_READY: if (port->vdm_state > VDM_STATE_READY) { @@ -3253,23 +3261,12 @@ static int tcpm_pd_select_pdo(struct tcpm_port *port, int *sink_pdo, return ret; } -#define min_pps_apdo_current(x, y) \ - min(pdo_pps_apdo_max_current(x), pdo_pps_apdo_max_current(y)) - static unsigned int tcpm_pd_select_pps_apdo(struct tcpm_port *port) { - unsigned int i, j, max_mw = 0, max_mv = 0; - unsigned int min_src_mv, max_src_mv, src_ma, src_mw; - unsigned int min_snk_mv, max_snk_mv; - unsigned int max_op_mv; - u32 pdo, src, snk; - unsigned int src_pdo = 0, snk_pdo = 0; + unsigned int i, src_ma, max_temp_mw = 0, max_op_ma, op_mw; + unsigned int src_pdo = 0; + u32 pdo, src; - /* - * Select the source PPS APDO providing the most power while staying - * within the board's limits. We skip the first PDO as this is always - * 5V 3A. - */ for (i = 1; i < port->nr_source_caps; ++i) { pdo = port->source_caps[i]; @@ -3280,54 +3277,17 @@ static unsigned int tcpm_pd_select_pps_apdo(struct tcpm_port *port) continue; } - min_src_mv = pdo_pps_apdo_min_voltage(pdo); - max_src_mv = pdo_pps_apdo_max_voltage(pdo); + if (port->pps_data.req_out_volt > pdo_pps_apdo_max_voltage(pdo) || + port->pps_data.req_out_volt < pdo_pps_apdo_min_voltage(pdo)) + continue; + src_ma = pdo_pps_apdo_max_current(pdo); - src_mw = (src_ma * max_src_mv) / 1000; - - /* - * Now search through the sink PDOs to find a matching - * PPS APDO. Again skip the first sink PDO as this will - * always be 5V 3A. - */ - for (j = 1; j < port->nr_snk_pdo; j++) { - pdo = port->snk_pdo[j]; - - switch (pdo_type(pdo)) { - case PDO_TYPE_APDO: - if (pdo_apdo_type(pdo) != APDO_TYPE_PPS) { - tcpm_log(port, - "Not PPS APDO (sink), ignoring"); - continue; - } - - min_snk_mv = - pdo_pps_apdo_min_voltage(pdo); - max_snk_mv = - pdo_pps_apdo_max_voltage(pdo); - break; - default: - tcpm_log(port, - "Not APDO type (sink), ignoring"); - continue; - } - - if (min_src_mv <= max_snk_mv && - max_src_mv >= min_snk_mv) { - max_op_mv = min(max_src_mv, max_snk_mv); - src_mw = (max_op_mv * src_ma) / 1000; - /* Prefer higher voltages if available */ - if ((src_mw == max_mw && - max_op_mv > max_mv) || - src_mw > max_mw) { - src_pdo = i; - snk_pdo = j; - max_mw = src_mw; - max_mv = max_op_mv; - } - } + max_op_ma = min(src_ma, port->pps_data.req_op_curr); + op_mw = max_op_ma * port->pps_data.req_out_volt / 1000; + if (op_mw > max_temp_mw) { + src_pdo = i; + max_temp_mw = op_mw; } - break; default: tcpm_log(port, "Not APDO type (source), ignoring"); @@ -3337,16 +3297,10 @@ static unsigned int tcpm_pd_select_pps_apdo(struct tcpm_port *port) if (src_pdo) { src = port->source_caps[src_pdo]; - snk = port->snk_pdo[snk_pdo]; - port->pps_data.req_min_volt = max(pdo_pps_apdo_min_voltage(src), - pdo_pps_apdo_min_voltage(snk)); - port->pps_data.req_max_volt = min(pdo_pps_apdo_max_voltage(src), - pdo_pps_apdo_max_voltage(snk)); - port->pps_data.req_max_curr = min_pps_apdo_current(src, snk); - port->pps_data.req_out_volt = min(port->pps_data.req_max_volt, - max(port->pps_data.req_min_volt, - port->pps_data.req_out_volt)); + port->pps_data.req_min_volt = pdo_pps_apdo_min_voltage(src); + port->pps_data.req_max_volt = pdo_pps_apdo_max_voltage(src); + port->pps_data.req_max_curr = pdo_pps_apdo_max_current(src); port->pps_data.req_op_curr = min(port->pps_data.req_max_curr, port->pps_data.req_op_curr); } @@ -3464,32 +3418,16 @@ static int tcpm_pd_send_request(struct tcpm_port *port) static int tcpm_pd_build_pps_request(struct tcpm_port *port, u32 *rdo) { unsigned int out_mv, op_ma, op_mw, max_mv, max_ma, flags; - enum pd_pdo_type type; unsigned int src_pdo_index; - u32 pdo; src_pdo_index = tcpm_pd_select_pps_apdo(port); if (!src_pdo_index) return -EOPNOTSUPP; - pdo = port->source_caps[src_pdo_index]; - type = pdo_type(pdo); - - switch (type) { - case PDO_TYPE_APDO: - if (pdo_apdo_type(pdo) != APDO_TYPE_PPS) { - tcpm_log(port, "Invalid APDO selected!"); - return -EINVAL; - } - max_mv = port->pps_data.req_max_volt; - max_ma = port->pps_data.req_max_curr; - out_mv = port->pps_data.req_out_volt; - op_ma = port->pps_data.req_op_curr; - break; - default: - tcpm_log(port, "Invalid PDO selected!"); - return -EINVAL; - } + max_mv = port->pps_data.req_max_volt; + max_ma = port->pps_data.req_max_curr; + out_mv = port->pps_data.req_out_volt; + op_ma = port->pps_data.req_op_curr; flags = RDO_USB_COMM | RDO_NO_SUSPEND; @@ -3789,6 +3727,9 @@ static void tcpm_detach(struct tcpm_port *port) if (tcpm_port_is_disconnected(port)) port->hard_reset_count = 0; + port->try_src_count = 0; + port->try_snk_count = 0; + if (!port->attached) return; @@ -3928,6 +3869,29 @@ static enum typec_cc_status tcpm_pwr_opmode_to_rp(enum typec_pwr_opmode opmode) } } +static void tcpm_set_initial_svdm_version(struct tcpm_port *port) +{ + switch (port->negotiated_rev) { + case PD_REV30: + break; + /* + * 6.4.4.2.3 Structured VDM Version + * 2.0 states "At this time, there is only one version (1.0) defined. + * This field Shall be set to zero to indicate Version 1.0." + * 3.0 states "This field Shall be set to 01b to indicate Version 2.0." + * To ensure that we follow the Power Delivery revision we are currently + * operating on, downgrade the SVDM version to the highest one supported + * by the Power Delivery revision. + */ + case PD_REV20: + typec_partner_set_svdm_version(port->partner, SVDM_VER_1_0); + break; + default: + typec_partner_set_svdm_version(port->partner, SVDM_VER_1_0); + break; + } +} + static void run_state_machine(struct tcpm_port *port) { int ret; @@ -4165,10 +4129,12 @@ static void run_state_machine(struct tcpm_port *port) * For now, this driver only supports SOP for DISCOVER_IDENTITY, thus using * port->explicit_contract to decide whether to send the command. */ - if (port->explicit_contract) + if (port->explicit_contract) { + tcpm_set_initial_svdm_version(port); mod_send_discover_delayed_work(port, 0); - else + } else { port->send_discover = false; + } /* * 6.3.5 @@ -4301,7 +4267,9 @@ static void run_state_machine(struct tcpm_port *port) if (port->slow_charger_loop && (current_lim > PD_P_SNK_STDBY_MW / 5)) current_lim = PD_P_SNK_STDBY_MW / 5; tcpm_set_current_limit(port, current_lim, 5000); - tcpm_set_charge(port, true); + /* Not sink vbus if operational current is 0mA */ + tcpm_set_charge(port, !!pdo_max_current(port->snk_pdo[0])); + if (!port->pd_supported) tcpm_set_state(port, SNK_READY, 0); else @@ -4455,10 +4423,12 @@ static void run_state_machine(struct tcpm_port *port) * For now, this driver only supports SOP for DISCOVER_IDENTITY, thus using * port->explicit_contract. */ - if (port->explicit_contract) + if (port->explicit_contract) { + tcpm_set_initial_svdm_version(port); mod_send_discover_delayed_work(port, 0); - else + } else { port->send_discover = false; + } power_supply_changed(port->psy); break; @@ -4582,7 +4552,8 @@ static void run_state_machine(struct tcpm_port *port) tcpm_set_current_limit(port, tcpm_get_current_limit(port), 5000); - tcpm_set_charge(port, true); + /* Not sink vbus if operational current is 0mA */ + tcpm_set_charge(port, !!pdo_max_current(port->snk_pdo[0])); } if (port->ams == HARD_RESET) tcpm_ams_finish(port); @@ -5888,12 +5859,6 @@ static int tcpm_pps_set_out_volt(struct tcpm_port *port, u16 req_out_volt) goto port_unlock; } - if (req_out_volt < port->pps_data.min_volt || - req_out_volt > port->pps_data.max_volt) { - ret = -EINVAL; - goto port_unlock; - } - target_mw = (port->current_limit * req_out_volt) / 1000; if (target_mw < port->operating_snk_mw) { ret = -EINVAL; @@ -6446,11 +6411,7 @@ static int tcpm_psy_set_prop(struct power_supply *psy, ret = tcpm_psy_set_online(port, val); break; case POWER_SUPPLY_PROP_VOLTAGE_NOW: - if (val->intval < port->pps_data.min_volt * 1000 || - val->intval > port->pps_data.max_volt * 1000) - ret = -EINVAL; - else - ret = tcpm_pps_set_out_volt(port, val->intval / 1000); + ret = tcpm_pps_set_out_volt(port, val->intval / 1000); break; case POWER_SUPPLY_PROP_CURRENT_NOW: if (val->intval > port->pps_data.max_curr * 1000) diff --git a/drivers/usb/typec/ucsi/Kconfig b/drivers/usb/typec/ucsi/Kconfig index b3bb0191987e..bdcb1764cfae 100644 --- a/drivers/usb/typec/ucsi/Kconfig +++ b/drivers/usb/typec/ucsi/Kconfig @@ -4,6 +4,7 @@ config TYPEC_UCSI tristate "USB Type-C Connector System Software Interface driver" depends on !CPU_BIG_ENDIAN depends on USB_ROLE_SWITCH || !USB_ROLE_SWITCH + select USB_COMMON if DEBUG_FS help USB Type-C Connector System Software Interface (UCSI) is a specification for an interface that allows the operating system to diff --git a/drivers/usb/typec/ucsi/Makefile b/drivers/usb/typec/ucsi/Makefile index 77f09e136956..b4679f94696b 100644 --- a/drivers/usb/typec/ucsi/Makefile +++ b/drivers/usb/typec/ucsi/Makefile @@ -5,6 +5,8 @@ obj-$(CONFIG_TYPEC_UCSI) += typec_ucsi.o typec_ucsi-y := ucsi.o +typec_ucsi-$(CONFIG_DEBUG_FS) += debugfs.o + typec_ucsi-$(CONFIG_TRACING) += trace.o ifneq ($(CONFIG_POWER_SUPPLY),) diff --git a/drivers/usb/typec/ucsi/debugfs.c b/drivers/usb/typec/ucsi/debugfs.c new file mode 100644 index 000000000000..0c7bf88d4a7f --- /dev/null +++ b/drivers/usb/typec/ucsi/debugfs.c @@ -0,0 +1,99 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * UCSI debugfs interface + * + * Copyright (C) 2023 Intel Corporation + * + * Authors: Rajaram Regupathy + * Gopal Saranya + */ +#include +#include +#include +#include +#include + +#include + +#include "ucsi.h" + +static struct dentry *ucsi_debugfs_root; + +static int ucsi_cmd(void *data, u64 val) +{ + struct ucsi *ucsi = data; + int ret; + + memset(&ucsi->debugfs->response, 0, sizeof(ucsi->debugfs->response)); + ucsi->debugfs->status = 0; + + switch (UCSI_COMMAND(val)) { + case UCSI_SET_UOM: + case UCSI_SET_UOR: + case UCSI_SET_PDR: + case UCSI_CONNECTOR_RESET: + ret = ucsi_send_command(ucsi, val, NULL, 0); + break; + case UCSI_GET_CAPABILITY: + case UCSI_GET_CONNECTOR_CAPABILITY: + case UCSI_GET_ALTERNATE_MODES: + case UCSI_GET_CURRENT_CAM: + case UCSI_GET_PDOS: + case UCSI_GET_CABLE_PROPERTY: + case UCSI_GET_CONNECTOR_STATUS: + ret = ucsi_send_command(ucsi, val, + &ucsi->debugfs->response, + sizeof(ucsi->debugfs->response)); + break; + default: + ret = -EOPNOTSUPP; + } + + if (ret < 0) { + ucsi->debugfs->status = ret; + return ret; + } + + return 0; +} +DEFINE_DEBUGFS_ATTRIBUTE(ucsi_cmd_fops, NULL, ucsi_cmd, "0x%llx\n"); + +static int ucsi_resp_show(struct seq_file *s, void *not_used) +{ + struct ucsi *ucsi = s->private; + + if (ucsi->debugfs->status) + return ucsi->debugfs->status; + + seq_printf(s, "0x%016llx%016llx\n", ucsi->debugfs->response.high, + ucsi->debugfs->response.low); + return 0; +} +DEFINE_SHOW_ATTRIBUTE(ucsi_resp); + +void ucsi_debugfs_register(struct ucsi *ucsi) +{ + ucsi->debugfs = kzalloc(sizeof(*ucsi->debugfs), GFP_KERNEL); + if (!ucsi->debugfs) + return; + + ucsi->debugfs->dentry = debugfs_create_dir(dev_name(ucsi->dev), ucsi_debugfs_root); + debugfs_create_file("command", 0200, ucsi->debugfs->dentry, ucsi, &ucsi_cmd_fops); + debugfs_create_file("response", 0400, ucsi->debugfs->dentry, ucsi, &ucsi_resp_fops); +} + +void ucsi_debugfs_unregister(struct ucsi *ucsi) +{ + debugfs_remove_recursive(ucsi->debugfs->dentry); + kfree(ucsi->debugfs); +} + +void ucsi_debugfs_init(void) +{ + ucsi_debugfs_root = debugfs_create_dir("ucsi", usb_debug_root); +} + +void ucsi_debugfs_exit(void) +{ + debugfs_remove(ucsi_debugfs_root); +} diff --git a/drivers/usb/typec/ucsi/ucsi.c b/drivers/usb/typec/ucsi/ucsi.c index f6901319639d..c6dfe3dff346 100644 --- a/drivers/usb/typec/ucsi/ucsi.c +++ b/drivers/usb/typec/ucsi/ucsi.c @@ -1530,6 +1530,7 @@ EXPORT_SYMBOL_GPL(ucsi_create); */ void ucsi_destroy(struct ucsi *ucsi) { + ucsi_debugfs_unregister(ucsi); kfree(ucsi); } EXPORT_SYMBOL_GPL(ucsi_destroy); @@ -1552,6 +1553,7 @@ int ucsi_register(struct ucsi *ucsi) queue_delayed_work(system_long_wq, &ucsi->work, 0); + ucsi_debugfs_register(ucsi); return 0; } EXPORT_SYMBOL_GPL(ucsi_register); @@ -1611,6 +1613,19 @@ void ucsi_unregister(struct ucsi *ucsi) } EXPORT_SYMBOL_GPL(ucsi_unregister); +static int __init ucsi_module_init(void) +{ + ucsi_debugfs_init(); + return 0; +} +module_init(ucsi_module_init); + +static void __exit ucsi_module_exit(void) +{ + ucsi_debugfs_exit(); +} +module_exit(ucsi_module_exit); + MODULE_AUTHOR("Heikki Krogerus "); MODULE_LICENSE("GPL v2"); MODULE_DESCRIPTION("USB Type-C Connector System Software Interface driver"); diff --git a/drivers/usb/typec/ucsi/ucsi.h b/drivers/usb/typec/ucsi/ucsi.h index c09af859f573..474315a72c77 100644 --- a/drivers/usb/typec/ucsi/ucsi.h +++ b/drivers/usb/typec/ucsi/ucsi.h @@ -15,6 +15,7 @@ struct ucsi; struct ucsi_altmode; +struct dentry; /* UCSI offsets (Bytes) */ #define UCSI_VERSION 0 @@ -277,6 +278,16 @@ struct ucsi_connector_status { /* -------------------------------------------------------------------------- */ +struct ucsi_debugfs_entry { + u64 command; + struct ucsi_data { + u64 low; + u64 high; + } response; + u32 status; + struct dentry *dentry; +}; + struct ucsi { u16 version; struct device *dev; @@ -286,6 +297,7 @@ struct ucsi { struct ucsi_capability cap; struct ucsi_connector *connector; + struct ucsi_debugfs_entry *debugfs; struct work_struct resume_work; struct delayed_work work; @@ -388,6 +400,18 @@ static inline void ucsi_displayport_remove_partner(struct typec_altmode *adev) { } #endif /* CONFIG_TYPEC_DP_ALTMODE */ +#ifdef CONFIG_DEBUG_FS +void ucsi_debugfs_init(void); +void ucsi_debugfs_exit(void); +void ucsi_debugfs_register(struct ucsi *ucsi); +void ucsi_debugfs_unregister(struct ucsi *ucsi); +#else +static inline void ucsi_debugfs_init(void) { } +static inline void ucsi_debugfs_exit(void) { } +static inline void ucsi_debugfs_register(struct ucsi *ucsi) { } +static inline void ucsi_debugfs_unregister(struct ucsi *ucsi) { } +#endif /* CONFIG_DEBUG_FS */ + /* * NVIDIA VirtualLink (svid 0x955) has two altmode. VirtualLink * DP mode with vdo=0x1 and NVIDIA test mode with vdo=0x3 diff --git a/drivers/usb/typec/ucsi/ucsi_glink.c b/drivers/usb/typec/ucsi/ucsi_glink.c index 1fe9cb5b6bd9..bb1854b3311d 100644 --- a/drivers/usb/typec/ucsi/ucsi_glink.c +++ b/drivers/usb/typec/ucsi/ucsi_glink.c @@ -5,7 +5,6 @@ */ #include #include -#include #include #include #include diff --git a/drivers/usb/usbip/vudc_dev.c b/drivers/usb/usbip/vudc_dev.c index 2bc428f2e261..44b04c54c086 100644 --- a/drivers/usb/usbip/vudc_dev.c +++ b/drivers/usb/usbip/vudc_dev.c @@ -489,11 +489,11 @@ static void vudc_device_unusable(struct usbip_device *ud) struct vudc_device *alloc_vudc_device(int devid) { - struct vudc_device *udc_dev = NULL; + struct vudc_device *udc_dev; udc_dev = kzalloc(sizeof(*udc_dev), GFP_KERNEL); if (!udc_dev) - goto out; + return NULL; INIT_LIST_HEAD(&udc_dev->dev_entry); @@ -503,7 +503,6 @@ struct vudc_device *alloc_vudc_device(int devid) udc_dev = NULL; } -out: return udc_dev; } diff --git a/fs/debugfs/file.c b/fs/debugfs/file.c index b7711888dd17..87b3753aa4b1 100644 --- a/fs/debugfs/file.c +++ b/fs/debugfs/file.c @@ -904,8 +904,52 @@ EXPORT_SYMBOL_GPL(debugfs_create_str); static ssize_t debugfs_write_file_str(struct file *file, const char __user *user_buf, size_t count, loff_t *ppos) { - /* This is really only for read-only strings */ - return -EINVAL; + struct dentry *dentry = F_DENTRY(file); + char *old, *new = NULL; + int pos = *ppos; + int r; + + r = debugfs_file_get(dentry); + if (unlikely(r)) + return r; + + old = *(char **)file->private_data; + + /* only allow strict concatenation */ + r = -EINVAL; + if (pos && pos != strlen(old)) + goto error; + + r = -E2BIG; + if (pos + count + 1 > PAGE_SIZE) + goto error; + + r = -ENOMEM; + new = kmalloc(pos + count + 1, GFP_KERNEL); + if (!new) + goto error; + + if (pos) + memcpy(new, old, pos); + + r = -EFAULT; + if (copy_from_user(new + pos, user_buf, count)) + goto error; + + new[pos + count] = '\0'; + strim(new); + + rcu_assign_pointer(*(char **)file->private_data, new); + synchronize_rcu(); + kfree(old); + + debugfs_file_put(dentry); + return count; + +error: + kfree(new); + debugfs_file_put(dentry); + return r; } static const struct file_operations fops_str = { diff --git a/fs/kernfs/dir.c b/fs/kernfs/dir.c index 660995856a04..8b2bd65d70e7 100644 --- a/fs/kernfs/dir.c +++ b/fs/kernfs/dir.c @@ -383,9 +383,11 @@ static int kernfs_link_sibling(struct kernfs_node *kn) rb_insert_color(&kn->rb, &kn->parent->dir.children); /* successfully added, account subdir number */ + down_write(&kernfs_root(kn)->kernfs_iattr_rwsem); if (kernfs_type(kn) == KERNFS_DIR) kn->parent->dir.subdirs++; kernfs_inc_rev(kn->parent); + up_write(&kernfs_root(kn)->kernfs_iattr_rwsem); return 0; } @@ -408,9 +410,11 @@ static bool kernfs_unlink_sibling(struct kernfs_node *kn) if (RB_EMPTY_NODE(&kn->rb)) return false; + down_write(&kernfs_root(kn)->kernfs_iattr_rwsem); if (kernfs_type(kn) == KERNFS_DIR) kn->parent->dir.subdirs--; kernfs_inc_rev(kn->parent); + up_write(&kernfs_root(kn)->kernfs_iattr_rwsem); rb_erase(&kn->rb, &kn->parent->dir.children); RB_CLEAR_NODE(&kn->rb); diff --git a/fs/kernfs/mount.c b/fs/kernfs/mount.c index d49606accb07..c4bf26142eec 100644 --- a/fs/kernfs/mount.c +++ b/fs/kernfs/mount.c @@ -16,6 +16,8 @@ #include #include #include +#include +#include #include "kernfs-internal.h" @@ -45,8 +47,15 @@ static int kernfs_sop_show_path(struct seq_file *sf, struct dentry *dentry) return 0; } +static int kernfs_statfs(struct dentry *dentry, struct kstatfs *buf) +{ + simple_statfs(dentry, buf); + buf->f_fsid = uuid_to_fsid(dentry->d_sb->s_uuid.b); + return 0; +} + const struct super_operations kernfs_sops = { - .statfs = simple_statfs, + .statfs = kernfs_statfs, .drop_inode = generic_delete_inode, .evict_inode = kernfs_evict_inode, @@ -351,6 +360,8 @@ int kernfs_get_tree(struct fs_context *fc) } sb->s_flags |= SB_ACTIVE; + uuid_gen(&sb->s_uuid); + down_write(&root->kernfs_supers_rwsem); list_add(&info->node, &info->root->supers); up_write(&root->kernfs_supers_rwsem); diff --git a/include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h b/include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h index 09fd169ad18e..5d98f7d48a1e 100644 --- a/include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h +++ b/include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h @@ -6,58 +6,60 @@ #ifndef _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H #define _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H -/* ADC channels for PM8350_ADC for PMIC7 */ -#define PM8350_ADC7_REF_GND(sid) ((sid) << 8 | 0x0) -#define PM8350_ADC7_1P25VREF(sid) ((sid) << 8 | 0x01) -#define PM8350_ADC7_VREF_VADC(sid) ((sid) << 8 | 0x02) -#define PM8350_ADC7_DIE_TEMP(sid) ((sid) << 8 | 0x03) +#include -#define PM8350_ADC7_AMUX_THM1(sid) ((sid) << 8 | 0x04) -#define PM8350_ADC7_AMUX_THM2(sid) ((sid) << 8 | 0x05) -#define PM8350_ADC7_AMUX_THM3(sid) ((sid) << 8 | 0x06) -#define PM8350_ADC7_AMUX_THM4(sid) ((sid) << 8 | 0x07) -#define PM8350_ADC7_AMUX_THM5(sid) ((sid) << 8 | 0x08) -#define PM8350_ADC7_GPIO1(sid) ((sid) << 8 | 0x0a) -#define PM8350_ADC7_GPIO2(sid) ((sid) << 8 | 0x0b) -#define PM8350_ADC7_GPIO3(sid) ((sid) << 8 | 0x0c) -#define PM8350_ADC7_GPIO4(sid) ((sid) << 8 | 0x0d) +/* ADC channels for PM8350_ADC for PMIC7 */ +#define PM8350_ADC7_REF_GND(sid) ((sid) << 8 | ADC7_REF_GND) +#define PM8350_ADC7_1P25VREF(sid) ((sid) << 8 | ADC7_1P25VREF) +#define PM8350_ADC7_VREF_VADC(sid) ((sid) << 8 | ADC7_VREF_VADC) +#define PM8350_ADC7_DIE_TEMP(sid) ((sid) << 8 | ADC7_DIE_TEMP) + +#define PM8350_ADC7_AMUX_THM1(sid) ((sid) << 8 | ADC7_AMUX_THM1) +#define PM8350_ADC7_AMUX_THM2(sid) ((sid) << 8 | ADC7_AMUX_THM2) +#define PM8350_ADC7_AMUX_THM3(sid) ((sid) << 8 | ADC7_AMUX_THM3) +#define PM8350_ADC7_AMUX_THM4(sid) ((sid) << 8 | ADC7_AMUX_THM4) +#define PM8350_ADC7_AMUX_THM5(sid) ((sid) << 8 | ADC7_AMUX_THM5) +#define PM8350_ADC7_GPIO1(sid) ((sid) << 8 | ADC7_GPIO1) +#define PM8350_ADC7_GPIO2(sid) ((sid) << 8 | ADC7_GPIO2) +#define PM8350_ADC7_GPIO3(sid) ((sid) << 8 | ADC7_GPIO3) +#define PM8350_ADC7_GPIO4(sid) ((sid) << 8 | ADC7_GPIO4) /* 30k pull-up1 */ -#define PM8350_ADC7_AMUX_THM1_30K_PU(sid) ((sid) << 8 | 0x24) -#define PM8350_ADC7_AMUX_THM2_30K_PU(sid) ((sid) << 8 | 0x25) -#define PM8350_ADC7_AMUX_THM3_30K_PU(sid) ((sid) << 8 | 0x26) -#define PM8350_ADC7_AMUX_THM4_30K_PU(sid) ((sid) << 8 | 0x27) -#define PM8350_ADC7_AMUX_THM5_30K_PU(sid) ((sid) << 8 | 0x28) -#define PM8350_ADC7_GPIO1_30K_PU(sid) ((sid) << 8 | 0x2a) -#define PM8350_ADC7_GPIO2_30K_PU(sid) ((sid) << 8 | 0x2b) -#define PM8350_ADC7_GPIO3_30K_PU(sid) ((sid) << 8 | 0x2c) -#define PM8350_ADC7_GPIO4_30K_PU(sid) ((sid) << 8 | 0x2d) +#define PM8350_ADC7_AMUX_THM1_30K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM1_30K_PU) +#define PM8350_ADC7_AMUX_THM2_30K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM2_30K_PU) +#define PM8350_ADC7_AMUX_THM3_30K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM3_30K_PU) +#define PM8350_ADC7_AMUX_THM4_30K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM4_30K_PU) +#define PM8350_ADC7_AMUX_THM5_30K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM5_30K_PU) +#define PM8350_ADC7_GPIO1_30K_PU(sid) ((sid) << 8 | ADC7_GPIO1_30K_PU) +#define PM8350_ADC7_GPIO2_30K_PU(sid) ((sid) << 8 | ADC7_GPIO2_30K_PU) +#define PM8350_ADC7_GPIO3_30K_PU(sid) ((sid) << 8 | ADC7_GPIO3_30K_PU) +#define PM8350_ADC7_GPIO4_30K_PU(sid) ((sid) << 8 | ADC7_GPIO4_30K_PU) /* 100k pull-up2 */ -#define PM8350_ADC7_AMUX_THM1_100K_PU(sid) ((sid) << 8 | 0x44) -#define PM8350_ADC7_AMUX_THM2_100K_PU(sid) ((sid) << 8 | 0x45) -#define PM8350_ADC7_AMUX_THM3_100K_PU(sid) ((sid) << 8 | 0x46) -#define PM8350_ADC7_AMUX_THM4_100K_PU(sid) ((sid) << 8 | 0x47) -#define PM8350_ADC7_AMUX_THM5_100K_PU(sid) ((sid) << 8 | 0x48) -#define PM8350_ADC7_GPIO1_100K_PU(sid) ((sid) << 8 | 0x4a) -#define PM8350_ADC7_GPIO2_100K_PU(sid) ((sid) << 8 | 0x4b) -#define PM8350_ADC7_GPIO3_100K_PU(sid) ((sid) << 8 | 0x4c) -#define PM8350_ADC7_GPIO4_100K_PU(sid) ((sid) << 8 | 0x4d) +#define PM8350_ADC7_AMUX_THM1_100K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM1_100K_PU) +#define PM8350_ADC7_AMUX_THM2_100K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM2_100K_PU) +#define PM8350_ADC7_AMUX_THM3_100K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM3_100K_PU) +#define PM8350_ADC7_AMUX_THM4_100K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM4_100K_PU) +#define PM8350_ADC7_AMUX_THM5_100K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM5_100K_PU) +#define PM8350_ADC7_GPIO1_100K_PU(sid) ((sid) << 8 | ADC7_GPIO1_100K_PU) +#define PM8350_ADC7_GPIO2_100K_PU(sid) ((sid) << 8 | ADC7_GPIO2_100K_PU) +#define PM8350_ADC7_GPIO3_100K_PU(sid) ((sid) << 8 | ADC7_GPIO3_100K_PU) +#define PM8350_ADC7_GPIO4_100K_PU(sid) ((sid) << 8 | ADC7_GPIO4_100K_PU) /* 400k pull-up3 */ -#define PM8350_ADC7_AMUX_THM1_400K_PU(sid) ((sid) << 8 | 0x64) -#define PM8350_ADC7_AMUX_THM2_400K_PU(sid) ((sid) << 8 | 0x65) -#define PM8350_ADC7_AMUX_THM3_400K_PU(sid) ((sid) << 8 | 0x66) -#define PM8350_ADC7_AMUX_THM4_400K_PU(sid) ((sid) << 8 | 0x67) -#define PM8350_ADC7_AMUX_THM5_400K_PU(sid) ((sid) << 8 | 0x68) -#define PM8350_ADC7_GPIO1_400K_PU(sid) ((sid) << 8 | 0x6a) -#define PM8350_ADC7_GPIO2_400K_PU(sid) ((sid) << 8 | 0x6b) -#define PM8350_ADC7_GPIO3_400K_PU(sid) ((sid) << 8 | 0x6c) -#define PM8350_ADC7_GPIO4_400K_PU(sid) ((sid) << 8 | 0x6d) +#define PM8350_ADC7_AMUX_THM1_400K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM1_400K_PU) +#define PM8350_ADC7_AMUX_THM2_400K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM2_400K_PU) +#define PM8350_ADC7_AMUX_THM3_400K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM3_400K_PU) +#define PM8350_ADC7_AMUX_THM4_400K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM4_400K_PU) +#define PM8350_ADC7_AMUX_THM5_400K_PU(sid) ((sid) << 8 | ADC7_AMUX_THM5_400K_PU) +#define PM8350_ADC7_GPIO1_400K_PU(sid) ((sid) << 8 | ADC7_GPIO1_400K_PU) +#define PM8350_ADC7_GPIO2_400K_PU(sid) ((sid) << 8 | ADC7_GPIO2_400K_PU) +#define PM8350_ADC7_GPIO3_400K_PU(sid) ((sid) << 8 | ADC7_GPIO3_400K_PU) +#define PM8350_ADC7_GPIO4_400K_PU(sid) ((sid) << 8 | ADC7_GPIO4_400K_PU) /* 1/3 Divider */ -#define PM8350_ADC7_GPIO4_DIV3(sid) ((sid) << 8 | 0x8d) +#define PM8350_ADC7_GPIO4_DIV3(sid) ((sid) << 8 | ADC7_GPIO4_DIV3) -#define PM8350_ADC7_VPH_PWR(sid) ((sid) << 8 | 0x8e) +#define PM8350_ADC7_VPH_PWR(sid) ((sid) << 8 | ADC7_VPH_PWR) #endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H */ diff --git a/include/dt-bindings/iio/qcom,spmi-adc7-pm8350b.h b/include/dt-bindings/iio/qcom,spmi-adc7-pm8350b.h index dc2497c27e16..57c7977666d3 100644 --- a/include/dt-bindings/iio/qcom,spmi-adc7-pm8350b.h +++ b/include/dt-bindings/iio/qcom,spmi-adc7-pm8350b.h @@ -10,79 +10,81 @@ #define PM8350B_SID 3 #endif +#include + /* ADC channels for PM8350B_ADC for PMIC7 */ -#define PM8350B_ADC7_REF_GND (PM8350B_SID << 8 | 0x0) -#define PM8350B_ADC7_1P25VREF (PM8350B_SID << 8 | 0x01) -#define PM8350B_ADC7_VREF_VADC (PM8350B_SID << 8 | 0x02) -#define PM8350B_ADC7_DIE_TEMP (PM8350B_SID << 8 | 0x03) +#define PM8350B_ADC7_REF_GND (PM8350B_SID << 8 | ADC7_REF_GND) +#define PM8350B_ADC7_1P25VREF (PM8350B_SID << 8 | ADC7_1P25VREF) +#define PM8350B_ADC7_VREF_VADC (PM8350B_SID << 8 | ADC7_VREF_VADC) +#define PM8350B_ADC7_DIE_TEMP (PM8350B_SID << 8 | ADC7_DIE_TEMP) -#define PM8350B_ADC7_AMUX_THM1 (PM8350B_SID << 8 | 0x04) -#define PM8350B_ADC7_AMUX_THM2 (PM8350B_SID << 8 | 0x05) -#define PM8350B_ADC7_AMUX_THM3 (PM8350B_SID << 8 | 0x06) -#define PM8350B_ADC7_AMUX_THM4 (PM8350B_SID << 8 | 0x07) -#define PM8350B_ADC7_AMUX_THM5 (PM8350B_SID << 8 | 0x08) -#define PM8350B_ADC7_AMUX_THM6 (PM8350B_SID << 8 | 0x09) -#define PM8350B_ADC7_GPIO1 (PM8350B_SID << 8 | 0x0a) -#define PM8350B_ADC7_GPIO2 (PM8350B_SID << 8 | 0x0b) -#define PM8350B_ADC7_GPIO3 (PM8350B_SID << 8 | 0x0c) -#define PM8350B_ADC7_GPIO4 (PM8350B_SID << 8 | 0x0d) +#define PM8350B_ADC7_AMUX_THM1 (PM8350B_SID << 8 | ADC7_AMUX_THM1) +#define PM8350B_ADC7_AMUX_THM2 (PM8350B_SID << 8 | ADC7_AMUX_THM2) +#define PM8350B_ADC7_AMUX_THM3 (PM8350B_SID << 8 | ADC7_AMUX_THM3) +#define PM8350B_ADC7_AMUX_THM4 (PM8350B_SID << 8 | ADC7_AMUX_THM4) +#define PM8350B_ADC7_AMUX_THM5 (PM8350B_SID << 8 | ADC7_AMUX_THM5) +#define PM8350B_ADC7_AMUX_THM6 (PM8350B_SID << 8 | ADC7_AMUX_THM6) +#define PM8350B_ADC7_GPIO1 (PM8350B_SID << 8 | ADC7_GPIO1) +#define PM8350B_ADC7_GPIO2 (PM8350B_SID << 8 | ADC7_GPIO2) +#define PM8350B_ADC7_GPIO3 (PM8350B_SID << 8 | ADC7_GPIO3) +#define PM8350B_ADC7_GPIO4 (PM8350B_SID << 8 | ADC7_GPIO4) -#define PM8350B_ADC7_CHG_TEMP (PM8350B_SID << 8 | 0x10) -#define PM8350B_ADC7_USB_IN_V_16 (PM8350B_SID << 8 | 0x11) -#define PM8350B_ADC7_VDC_16 (PM8350B_SID << 8 | 0x12) -#define PM8350B_ADC7_CC1_ID (PM8350B_SID << 8 | 0x13) -#define PM8350B_ADC7_VREF_BAT_THERM (PM8350B_SID << 8 | 0x15) -#define PM8350B_ADC7_IIN_FB (PM8350B_SID << 8 | 0x17) +#define PM8350B_ADC7_CHG_TEMP (PM8350B_SID << 8 | ADC7_CHG_TEMP) +#define PM8350B_ADC7_USB_IN_V_16 (PM8350B_SID << 8 | ADC7_USB_IN_V_16) +#define PM8350B_ADC7_VDC_16 (PM8350B_SID << 8 | ADC7_VDC_16) +#define PM8350B_ADC7_CC1_ID (PM8350B_SID << 8 | ADC7_CC1_ID) +#define PM8350B_ADC7_VREF_BAT_THERM (PM8350B_SID << 8 | ADC7_VREF_BAT_THERM) +#define PM8350B_ADC7_IIN_FB (PM8350B_SID << 8 | ADC7_IIN_FB) /* 30k pull-up1 */ -#define PM8350B_ADC7_AMUX_THM1_30K_PU (PM8350B_SID << 8 | 0x24) -#define PM8350B_ADC7_AMUX_THM2_30K_PU (PM8350B_SID << 8 | 0x25) -#define PM8350B_ADC7_AMUX_THM3_30K_PU (PM8350B_SID << 8 | 0x26) -#define PM8350B_ADC7_AMUX_THM4_30K_PU (PM8350B_SID << 8 | 0x27) -#define PM8350B_ADC7_AMUX_THM5_30K_PU (PM8350B_SID << 8 | 0x28) -#define PM8350B_ADC7_AMUX_THM6_30K_PU (PM8350B_SID << 8 | 0x29) -#define PM8350B_ADC7_GPIO1_30K_PU (PM8350B_SID << 8 | 0x2a) -#define PM8350B_ADC7_GPIO2_30K_PU (PM8350B_SID << 8 | 0x2b) -#define PM8350B_ADC7_GPIO3_30K_PU (PM8350B_SID << 8 | 0x2c) -#define PM8350B_ADC7_GPIO4_30K_PU (PM8350B_SID << 8 | 0x2d) -#define PM8350B_ADC7_CC1_ID_30K_PU (PM8350B_SID << 8 | 0x33) +#define PM8350B_ADC7_AMUX_THM1_30K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM1_30K_PU) +#define PM8350B_ADC7_AMUX_THM2_30K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM2_30K_PU) +#define PM8350B_ADC7_AMUX_THM3_30K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM3_30K_PU) +#define PM8350B_ADC7_AMUX_THM4_30K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM4_30K_PU) +#define PM8350B_ADC7_AMUX_THM5_30K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM5_30K_PU) +#define PM8350B_ADC7_AMUX_THM6_30K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM6_30K_PU) +#define PM8350B_ADC7_GPIO1_30K_PU (PM8350B_SID << 8 | ADC7_GPIO1_30K_PU) +#define PM8350B_ADC7_GPIO2_30K_PU (PM8350B_SID << 8 | ADC7_GPIO2_30K_PU) +#define PM8350B_ADC7_GPIO3_30K_PU (PM8350B_SID << 8 | ADC7_GPIO3_30K_PU) +#define PM8350B_ADC7_GPIO4_30K_PU (PM8350B_SID << 8 | ADC7_GPIO4_30K_PU) +#define PM8350B_ADC7_CC1_ID_30K_PU (PM8350B_SID << 8 | ADC7_CC1_ID_30K_PU) /* 100k pull-up2 */ -#define PM8350B_ADC7_AMUX_THM1_100K_PU (PM8350B_SID << 8 | 0x44) -#define PM8350B_ADC7_AMUX_THM2_100K_PU (PM8350B_SID << 8 | 0x45) -#define PM8350B_ADC7_AMUX_THM3_100K_PU (PM8350B_SID << 8 | 0x46) -#define PM8350B_ADC7_AMUX_THM4_100K_PU (PM8350B_SID << 8 | 0x47) -#define PM8350B_ADC7_AMUX_THM5_100K_PU (PM8350B_SID << 8 | 0x48) -#define PM8350B_ADC7_AMUX_THM6_100K_PU (PM8350B_SID << 8 | 0x49) -#define PM8350B_ADC7_GPIO1_100K_PU (PM8350B_SID << 8 | 0x4a) -#define PM8350B_ADC7_GPIO2_100K_PU (PM8350B_SID << 8 | 0x4b) -#define PM8350B_ADC7_GPIO3_100K_PU (PM8350B_SID << 8 | 0x4c) -#define PM8350B_ADC7_GPIO4_100K_PU (PM8350B_SID << 8 | 0x4d) -#define PM8350B_ADC7_CC1_ID_100K_PU (PM8350B_SID << 8 | 0x53) +#define PM8350B_ADC7_AMUX_THM1_100K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM1_100K_PU) +#define PM8350B_ADC7_AMUX_THM2_100K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM2_100K_PU) +#define PM8350B_ADC7_AMUX_THM3_100K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM3_100K_PU) +#define PM8350B_ADC7_AMUX_THM4_100K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM4_100K_PU) +#define PM8350B_ADC7_AMUX_THM5_100K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM5_100K_PU) +#define PM8350B_ADC7_AMUX_THM6_100K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM6_100K_PU) +#define PM8350B_ADC7_GPIO1_100K_PU (PM8350B_SID << 8 | ADC7_GPIO1_100K_PU) +#define PM8350B_ADC7_GPIO2_100K_PU (PM8350B_SID << 8 | ADC7_GPIO2_100K_PU) +#define PM8350B_ADC7_GPIO3_100K_PU (PM8350B_SID << 8 | ADC7_GPIO3_100K_PU) +#define PM8350B_ADC7_GPIO4_100K_PU (PM8350B_SID << 8 | ADC7_GPIO4_100K_PU) +#define PM8350B_ADC7_CC1_ID_100K_PU (PM8350B_SID << 8 | ADC7_CC1_ID_100K_PU) /* 400k pull-up3 */ -#define PM8350B_ADC7_AMUX_THM1_400K_PU (PM8350B_SID << 8 | 0x64) -#define PM8350B_ADC7_AMUX_THM2_400K_PU (PM8350B_SID << 8 | 0x65) -#define PM8350B_ADC7_AMUX_THM3_400K_PU (PM8350B_SID << 8 | 0x66) -#define PM8350B_ADC7_AMUX_THM4_400K_PU (PM8350B_SID << 8 | 0x67) -#define PM8350B_ADC7_AMUX_THM5_400K_PU (PM8350B_SID << 8 | 0x68) -#define PM8350B_ADC7_AMUX_THM6_400K_PU (PM8350B_SID << 8 | 0x69) -#define PM8350B_ADC7_GPIO1_400K_PU (PM8350B_SID << 8 | 0x6a) -#define PM8350B_ADC7_GPIO2_400K_PU (PM8350B_SID << 8 | 0x6b) -#define PM8350B_ADC7_GPIO3_400K_PU (PM8350B_SID << 8 | 0x6c) -#define PM8350B_ADC7_GPIO4_400K_PU (PM8350B_SID << 8 | 0x6d) -#define PM8350B_ADC7_CC1_ID_400K_PU (PM8350B_SID << 8 | 0x73) +#define PM8350B_ADC7_AMUX_THM1_400K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM1_400K_PU) +#define PM8350B_ADC7_AMUX_THM2_400K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM2_400K_PU) +#define PM8350B_ADC7_AMUX_THM3_400K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM3_400K_PU) +#define PM8350B_ADC7_AMUX_THM4_400K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM4_400K_PU) +#define PM8350B_ADC7_AMUX_THM5_400K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM5_400K_PU) +#define PM8350B_ADC7_AMUX_THM6_400K_PU (PM8350B_SID << 8 | ADC7_AMUX_THM6_400K_PU) +#define PM8350B_ADC7_GPIO1_400K_PU (PM8350B_SID << 8 | ADC7_GPIO1_400K_PU) +#define PM8350B_ADC7_GPIO2_400K_PU (PM8350B_SID << 8 | ADC7_GPIO2_400K_PU) +#define PM8350B_ADC7_GPIO3_400K_PU (PM8350B_SID << 8 | ADC7_GPIO3_400K_PU) +#define PM8350B_ADC7_GPIO4_400K_PU (PM8350B_SID << 8 | ADC7_GPIO4_400K_PU) +#define PM8350B_ADC7_CC1_ID_400K_PU (PM8350B_SID << 8 | ADC7_CC1_ID_400K_PU) /* 1/3 Divider */ -#define PM8350B_ADC7_GPIO1_DIV3 (PM8350B_SID << 8 | 0x8a) -#define PM8350B_ADC7_GPIO2_DIV3 (PM8350B_SID << 8 | 0x8b) -#define PM8350B_ADC7_GPIO3_DIV3 (PM8350B_SID << 8 | 0x8c) -#define PM8350B_ADC7_GPIO4_DIV3 (PM8350B_SID << 8 | 0x8d) +#define PM8350B_ADC7_GPIO1_DIV3 (PM8350B_SID << 8 | ADC7_GPIO1_DIV3) +#define PM8350B_ADC7_GPIO2_DIV3 (PM8350B_SID << 8 | ADC7_GPIO2_DIV3) +#define PM8350B_ADC7_GPIO3_DIV3 (PM8350B_SID << 8 | ADC7_GPIO3_DIV3) +#define PM8350B_ADC7_GPIO4_DIV3 (PM8350B_SID << 8 | ADC7_GPIO4_DIV3) -#define PM8350B_ADC7_VPH_PWR (PM8350B_SID << 8 | 0x8e) -#define PM8350B_ADC7_VBAT_SNS (PM8350B_SID << 8 | 0x8f) +#define PM8350B_ADC7_VPH_PWR (PM8350B_SID << 8 | ADC7_VPH_PWR) +#define PM8350B_ADC7_VBAT_SNS (PM8350B_SID << 8 | ADC7_VBAT_SNS) -#define PM8350B_ADC7_SBUx (PM8350B_SID << 8 | 0x94) -#define PM8350B_ADC7_VBAT_2S_MID (PM8350B_SID << 8 | 0x96) +#define PM8350B_ADC7_SBUx (PM8350B_SID << 8 | ADC7_SBU) +#define PM8350B_ADC7_VBAT_2S_MID (PM8350B_SID << 8 | ADC7_VBAT_2S_MID) #endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PM8350B_H */ diff --git a/include/dt-bindings/iio/qcom,spmi-adc7-pmk8350.h b/include/dt-bindings/iio/qcom,spmi-adc7-pmk8350.h index 6c296870e95b..3d1a41a22cef 100644 --- a/include/dt-bindings/iio/qcom,spmi-adc7-pmk8350.h +++ b/include/dt-bindings/iio/qcom,spmi-adc7-pmk8350.h @@ -10,37 +10,39 @@ #define PMK8350_SID 0 #endif -/* ADC channels for PMK8350_ADC for PMIC7 */ -#define PMK8350_ADC7_REF_GND (PMK8350_SID << 8 | 0x0) -#define PMK8350_ADC7_1P25VREF (PMK8350_SID << 8 | 0x01) -#define PMK8350_ADC7_VREF_VADC (PMK8350_SID << 8 | 0x02) -#define PMK8350_ADC7_DIE_TEMP (PMK8350_SID << 8 | 0x03) +#include -#define PMK8350_ADC7_AMUX_THM1 (PMK8350_SID << 8 | 0x04) -#define PMK8350_ADC7_AMUX_THM2 (PMK8350_SID << 8 | 0x05) -#define PMK8350_ADC7_AMUX_THM3 (PMK8350_SID << 8 | 0x06) -#define PMK8350_ADC7_AMUX_THM4 (PMK8350_SID << 8 | 0x07) -#define PMK8350_ADC7_AMUX_THM5 (PMK8350_SID << 8 | 0x08) +/* ADC channels for PMK8350_ADC for PMIC7 */ +#define PMK8350_ADC7_REF_GND (PMK8350_SID << 8 | ADC7_REF_GND) +#define PMK8350_ADC7_1P25VREF (PMK8350_SID << 8 | ADC7_1P25VREF) +#define PMK8350_ADC7_VREF_VADC (PMK8350_SID << 8 | ADC7_VREF_VADC) +#define PMK8350_ADC7_DIE_TEMP (PMK8350_SID << 8 | ADC7_DIE_TEMP) + +#define PMK8350_ADC7_AMUX_THM1 (PMK8350_SID << 8 | ADC7_AMUX_THM1) +#define PMK8350_ADC7_AMUX_THM2 (PMK8350_SID << 8 | ADC7_AMUX_THM2) +#define PMK8350_ADC7_AMUX_THM3 (PMK8350_SID << 8 | ADC7_AMUX_THM3) +#define PMK8350_ADC7_AMUX_THM4 (PMK8350_SID << 8 | ADC7_AMUX_THM4) +#define PMK8350_ADC7_AMUX_THM5 (PMK8350_SID << 8 | ADC7_AMUX_THM5) /* 30k pull-up1 */ -#define PMK8350_ADC7_AMUX_THM1_30K_PU (PMK8350_SID << 8 | 0x24) -#define PMK8350_ADC7_AMUX_THM2_30K_PU (PMK8350_SID << 8 | 0x25) -#define PMK8350_ADC7_AMUX_THM3_30K_PU (PMK8350_SID << 8 | 0x26) -#define PMK8350_ADC7_AMUX_THM4_30K_PU (PMK8350_SID << 8 | 0x27) -#define PMK8350_ADC7_AMUX_THM5_30K_PU (PMK8350_SID << 8 | 0x28) +#define PMK8350_ADC7_AMUX_THM1_30K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM1_30K_PU) +#define PMK8350_ADC7_AMUX_THM2_30K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM2_30K_PU) +#define PMK8350_ADC7_AMUX_THM3_30K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM3_30K_PU) +#define PMK8350_ADC7_AMUX_THM4_30K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM4_30K_PU) +#define PMK8350_ADC7_AMUX_THM5_30K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM5_30K_PU) /* 100k pull-up2 */ -#define PMK8350_ADC7_AMUX_THM1_100K_PU (PMK8350_SID << 8 | 0x44) -#define PMK8350_ADC7_AMUX_THM2_100K_PU (PMK8350_SID << 8 | 0x45) -#define PMK8350_ADC7_AMUX_THM3_100K_PU (PMK8350_SID << 8 | 0x46) -#define PMK8350_ADC7_AMUX_THM4_100K_PU (PMK8350_SID << 8 | 0x47) -#define PMK8350_ADC7_AMUX_THM5_100K_PU (PMK8350_SID << 8 | 0x48) +#define PMK8350_ADC7_AMUX_THM1_100K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM1_100K_PU) +#define PMK8350_ADC7_AMUX_THM2_100K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM2_100K_PU) +#define PMK8350_ADC7_AMUX_THM3_100K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM3_100K_PU) +#define PMK8350_ADC7_AMUX_THM4_100K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM4_100K_PU) +#define PMK8350_ADC7_AMUX_THM5_100K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM5_100K_PU) /* 400k pull-up3 */ -#define PMK8350_ADC7_AMUX_THM1_400K_PU (PMK8350_SID << 8 | 0x64) -#define PMK8350_ADC7_AMUX_THM2_400K_PU (PMK8350_SID << 8 | 0x65) -#define PMK8350_ADC7_AMUX_THM3_400K_PU (PMK8350_SID << 8 | 0x66) -#define PMK8350_ADC7_AMUX_THM4_400K_PU (PMK8350_SID << 8 | 0x67) -#define PMK8350_ADC7_AMUX_THM5_400K_PU (PMK8350_SID << 8 | 0x68) +#define PMK8350_ADC7_AMUX_THM1_400K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM1_400K_PU) +#define PMK8350_ADC7_AMUX_THM2_400K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM2_400K_PU) +#define PMK8350_ADC7_AMUX_THM3_400K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM3_400K_PU) +#define PMK8350_ADC7_AMUX_THM4_400K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM4_400K_PU) +#define PMK8350_ADC7_AMUX_THM5_400K_PU (PMK8350_SID << 8 | ADC7_AMUX_THM5_400K_PU) #endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PMK8350_H */ diff --git a/include/dt-bindings/iio/qcom,spmi-adc7-pmr735a.h b/include/dt-bindings/iio/qcom,spmi-adc7-pmr735a.h index d6df1b19e5ff..c5adfa82b20d 100644 --- a/include/dt-bindings/iio/qcom,spmi-adc7-pmr735a.h +++ b/include/dt-bindings/iio/qcom,spmi-adc7-pmr735a.h @@ -10,19 +10,21 @@ #define PMR735A_SID 4 #endif -/* ADC channels for PMR735A_ADC for PMIC7 */ -#define PMR735A_ADC7_REF_GND (PMR735A_SID << 8 | 0x0) -#define PMR735A_ADC7_1P25VREF (PMR735A_SID << 8 | 0x01) -#define PMR735A_ADC7_VREF_VADC (PMR735A_SID << 8 | 0x02) -#define PMR735A_ADC7_DIE_TEMP (PMR735A_SID << 8 | 0x03) +#include -#define PMR735A_ADC7_GPIO1 (PMR735A_SID << 8 | 0x0a) -#define PMR735A_ADC7_GPIO2 (PMR735A_SID << 8 | 0x0b) -#define PMR735A_ADC7_GPIO3 (PMR735A_SID << 8 | 0x0c) +/* ADC channels for PMR735A_ADC for PMIC7 */ +#define PMR735A_ADC7_REF_GND (PMR735A_SID << 8 | ADC7_REF_GND) +#define PMR735A_ADC7_1P25VREF (PMR735A_SID << 8 | ADC7_1P25VREF) +#define PMR735A_ADC7_VREF_VADC (PMR735A_SID << 8 | ADC7_VREF_VADC) +#define PMR735A_ADC7_DIE_TEMP (PMR735A_SID << 8 | ADC7_DIE_TEMP) + +#define PMR735A_ADC7_GPIO1 (PMR735A_SID << 8 | ADC7_GPIO1) +#define PMR735A_ADC7_GPIO2 (PMR735A_SID << 8 | ADC7_GPIO2) +#define PMR735A_ADC7_GPIO3 (PMR735A_SID << 8 | ADC7_GPIO3) /* 100k pull-up2 */ -#define PMR735A_ADC7_GPIO1_100K_PU (PMR735A_SID << 8 | 0x4a) -#define PMR735A_ADC7_GPIO2_100K_PU (PMR735A_SID << 8 | 0x4b) -#define PMR735A_ADC7_GPIO3_100K_PU (PMR735A_SID << 8 | 0x4c) +#define PMR735A_ADC7_GPIO1_100K_PU (PMR735A_SID << 8 | ADC7_GPIO1_100K_PU) +#define PMR735A_ADC7_GPIO2_100K_PU (PMR735A_SID << 8 | ADC7_GPIO2_100K_PU) +#define PMR735A_ADC7_GPIO3_100K_PU (PMR735A_SID << 8 | ADC7_GPIO3_100K_PU) #endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PMR735A_H */ diff --git a/include/dt-bindings/iio/qcom,spmi-adc7-pmr735b.h b/include/dt-bindings/iio/qcom,spmi-adc7-pmr735b.h index 8da0e7dab315..fdb8dd9ae541 100644 --- a/include/dt-bindings/iio/qcom,spmi-adc7-pmr735b.h +++ b/include/dt-bindings/iio/qcom,spmi-adc7-pmr735b.h @@ -10,19 +10,21 @@ #define PMR735B_SID 5 #endif -/* ADC channels for PMR735B_ADC for PMIC7 */ -#define PMR735B_ADC7_REF_GND (PMR735B_SID << 8 | 0x0) -#define PMR735B_ADC7_1P25VREF (PMR735B_SID << 8 | 0x01) -#define PMR735B_ADC7_VREF_VADC (PMR735B_SID << 8 | 0x02) -#define PMR735B_ADC7_DIE_TEMP (PMR735B_SID << 8 | 0x03) +#include -#define PMR735B_ADC7_GPIO1 (PMR735B_SID << 8 | 0x0a) -#define PMR735B_ADC7_GPIO2 (PMR735B_SID << 8 | 0x0b) -#define PMR735B_ADC7_GPIO3 (PMR735B_SID << 8 | 0x0c) +/* ADC channels for PMR735B_ADC for PMIC7 */ +#define PMR735B_ADC7_REF_GND (PMR735B_SID << 8 | ADC7_REF_GND) +#define PMR735B_ADC7_1P25VREF (PMR735B_SID << 8 | ADC7_1P25VREF) +#define PMR735B_ADC7_VREF_VADC (PMR735B_SID << 8 | ADC7_VREF_VADC) +#define PMR735B_ADC7_DIE_TEMP (PMR735B_SID << 8 | ADC7_DIE_TEMP) + +#define PMR735B_ADC7_GPIO1 (PMR735B_SID << 8 | ADC7_GPIO1) +#define PMR735B_ADC7_GPIO2 (PMR735B_SID << 8 | ADC7_GPIO2) +#define PMR735B_ADC7_GPIO3 (PMR735B_SID << 8 | ADC7_GPIO3) /* 100k pull-up2 */ -#define PMR735B_ADC7_GPIO1_100K_PU (PMR735B_SID << 8 | 0x4a) -#define PMR735B_ADC7_GPIO2_100K_PU (PMR735B_SID << 8 | 0x4b) -#define PMR735B_ADC7_GPIO3_100K_PU (PMR735B_SID << 8 | 0x4c) +#define PMR735B_ADC7_GPIO1_100K_PU (PMR735B_SID << 8 | ADC7_GPIO1_100K_PU) +#define PMR735B_ADC7_GPIO2_100K_PU (PMR735B_SID << 8 | ADC7_GPIO2_100K_PU) +#define PMR735B_ADC7_GPIO3_100K_PU (PMR735B_SID << 8 | ADC7_GPIO3_100K_PU) #endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PMR735B_H */ diff --git a/include/dt-bindings/interconnect/qcom,sm8250.h b/include/dt-bindings/interconnect/qcom,sm8250.h index a4af5cc19271..2a656c02df4b 100644 --- a/include/dt-bindings/interconnect/qcom,sm8250.h +++ b/include/dt-bindings/interconnect/qcom,sm8250.h @@ -166,4 +166,11 @@ #define SLAVE_QDSS_STM 17 #define SLAVE_TCU 18 +#define MASTER_QUP_CORE_0 0 +#define MASTER_QUP_CORE_1 1 +#define MASTER_QUP_CORE_2 2 +#define SLAVE_QUP_CORE_0 3 +#define SLAVE_QUP_CORE_1 4 +#define SLAVE_QUP_CORE_2 5 + #endif diff --git a/include/linux/coresight.h b/include/linux/coresight.h index bf70987240e4..a269fffaf991 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -6,6 +6,8 @@ #ifndef _LINUX_CORESIGHT_H #define _LINUX_CORESIGHT_H +#include +#include #include #include #include @@ -386,6 +388,63 @@ static inline u32 csdev_access_relaxed_read32(struct csdev_access *csa, return csa->read(offset, true, false); } +#define CORESIGHT_CIDRn(i) (0xFF0 + ((i) * 4)) + +static inline u32 coresight_get_cid(void __iomem *base) +{ + u32 i, cid = 0; + + for (i = 0; i < 4; i++) + cid |= readl(base + CORESIGHT_CIDRn(i)) << (i * 8); + + return cid; +} + +static inline bool is_coresight_device(void __iomem *base) +{ + u32 cid = coresight_get_cid(base); + + return cid == CORESIGHT_CID; +} + +/* + * Attempt to find and enable "APB clock" for the given device + * + * Returns: + * + * clk - Clock is found and enabled + * NULL - clock is not found + * ERROR - Clock is found but failed to enable + */ +static inline struct clk *coresight_get_enable_apb_pclk(struct device *dev) +{ + struct clk *pclk; + int ret; + + pclk = clk_get(dev, "apb_pclk"); + if (IS_ERR(pclk)) + return NULL; + + ret = clk_prepare_enable(pclk); + if (ret) { + clk_put(pclk); + return ERR_PTR(ret); + } + return pclk; +} + +#define CORESIGHT_PIDRn(i) (0xFE0 + ((i) * 4)) + +static inline u32 coresight_get_pid(struct csdev_access *csa) +{ + u32 i, pid = 0; + + for (i = 0; i < 4; i++) + pid |= csdev_access_relaxed_read32(csa, CORESIGHT_PIDRn(i)) << (i * 8); + + return pid; +} + static inline u64 csdev_access_relaxed_read_pair(struct csdev_access *csa, u32 lo_offset, u32 hi_offset) { diff --git a/include/linux/counter.h b/include/linux/counter.h index b63746637de2..702e9108bbb4 100644 --- a/include/linux/counter.h +++ b/include/linux/counter.h @@ -399,7 +399,7 @@ struct counter_device { struct mutex ops_exist_lock; }; -void *counter_priv(const struct counter_device *const counter); +void *counter_priv(const struct counter_device *const counter) __attribute_const__; struct counter_device *counter_alloc(size_t sizeof_priv); void counter_put(struct counter_device *const counter); diff --git a/include/linux/dev_printk.h b/include/linux/dev_printk.h index 8904063d4c9f..6bfe70decc9f 100644 --- a/include/linux/dev_printk.h +++ b/include/linux/dev_printk.h @@ -274,4 +274,6 @@ do { \ WARN_ONCE(condition, "%s %s: " format, \ dev_driver_string(dev), dev_name(dev), ## arg) +__printf(3, 4) int dev_err_probe(const struct device *dev, int err, const char *fmt, ...); + #endif /* _DEVICE_PRINTK_H_ */ diff --git a/include/linux/device.h b/include/linux/device.h index 941c0de6151a..56d93a1ffb7b 100644 --- a/include/linux/device.h +++ b/include/linux/device.h @@ -1249,8 +1249,6 @@ void device_link_remove(void *consumer, struct device *supplier); void device_links_supplier_sync_state_pause(void); void device_links_supplier_sync_state_resume(void); -__printf(3, 4) int dev_err_probe(const struct device *dev, int err, const char *fmt, ...); - /* Create alias, so I can be autoloaded. */ #define MODULE_ALIAS_CHARDEV(major,minor) \ MODULE_ALIAS("char-major-" __stringify(major) "-" __stringify(minor)) diff --git a/include/linux/dynamic_debug.h b/include/linux/dynamic_debug.h index 061dd84d09f3..4fcbf4d4fd0a 100644 --- a/include/linux/dynamic_debug.h +++ b/include/linux/dynamic_debug.h @@ -37,10 +37,12 @@ struct _ddebug { #define _DPRINTK_FLAGS_INCL_FUNCNAME (1<<2) #define _DPRINTK_FLAGS_INCL_LINENO (1<<3) #define _DPRINTK_FLAGS_INCL_TID (1<<4) +#define _DPRINTK_FLAGS_INCL_SOURCENAME (1<<5) #define _DPRINTK_FLAGS_INCL_ANY \ (_DPRINTK_FLAGS_INCL_MODNAME | _DPRINTK_FLAGS_INCL_FUNCNAME |\ - _DPRINTK_FLAGS_INCL_LINENO | _DPRINTK_FLAGS_INCL_TID) + _DPRINTK_FLAGS_INCL_LINENO | _DPRINTK_FLAGS_INCL_TID |\ + _DPRINTK_FLAGS_INCL_SOURCENAME) #if defined DEBUG #define _DPRINTK_FLAGS_DEFAULT _DPRINTK_FLAGS_PRINT diff --git a/include/linux/extcon.h b/include/linux/extcon.h index 3c45c3846fe9..e596a0abcb27 100644 --- a/include/linux/extcon.h +++ b/include/linux/extcon.h @@ -328,16 +328,4 @@ struct extcon_specific_cable_nb { struct extcon_dev *edev; unsigned long previous_value; }; - -static inline int extcon_register_interest(struct extcon_specific_cable_nb *obj, - const char *extcon_name, const char *cable_name, - struct notifier_block *nb) -{ - return -EINVAL; -} - -static inline int extcon_unregister_interest(struct extcon_specific_cable_nb *obj) -{ - return -EINVAL; -} #endif /* __LINUX_EXTCON_H__ */ diff --git a/include/linux/firmware/intel/stratix10-smc.h b/include/linux/firmware/intel/stratix10-smc.h index a718f853d457..ee80ca4bb0d0 100644 --- a/include/linux/firmware/intel/stratix10-smc.h +++ b/include/linux/firmware/intel/stratix10-smc.h @@ -466,6 +466,31 @@ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE) #define INTEL_SIP_SMC_FIRMWARE_VERSION \ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FIRMWARE_VERSION) +/** + * SMC call protocol for Mailbox, starting FUNCID from 60 + * + * Call register usage: + * a0 INTEL_SIP_SMC_MBOX_SEND_CMD + * a1 mailbox command code + * a2 physical address that contain mailbox command data (not include header) + * a3 mailbox command data size in word + * a4 set to 0 for CASUAL, set to 1 for URGENT + * a5 physical address for secure firmware to put response data + * (not include header) + * a6 maximum size in word of physical address to store response data + * a7 not used + * + * Return status + * a0 INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_STATUS_REJECTED or + * INTEL_SIP_SMC_STATUS_ERROR + * a1 mailbox error code + * a2 response data length in word + * a3 not used + */ +#define INTEL_SIP_SMC_FUNCID_MBOX_SEND_CMD 60 + #define INTEL_SIP_SMC_MBOX_SEND_CMD \ + INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_MBOX_SEND_CMD) + /** * Request INTEL_SIP_SMC_SVC_VERSION * diff --git a/include/linux/firmware/intel/stratix10-svc-client.h b/include/linux/firmware/intel/stratix10-svc-client.h index 0c16037fd08d..60ed82112680 100644 --- a/include/linux/firmware/intel/stratix10-svc-client.h +++ b/include/linux/firmware/intel/stratix10-svc-client.h @@ -118,6 +118,9 @@ struct stratix10_svc_chan; * @COMMAND_SMC_SVC_VERSION: Non-mailbox SMC SVC API Version, * return status is SVC_STATUS_OK * + * @COMMAND_MBOX_SEND_CMD: send generic mailbox command, return status is + * SVC_STATUS_OK or SVC_STATUS_ERROR + * * @COMMAND_RSU_DCMF_STATUS: query firmware for the DCMF status * return status is SVC_STATUS_OK or SVC_STATUS_ERROR * @@ -164,6 +167,8 @@ enum stratix10_svc_command_code { COMMAND_FCS_RANDOM_NUMBER_GEN, /* for general status poll */ COMMAND_POLL_SERVICE_STATUS = 40, + /* for generic mailbox send command */ + COMMAND_MBOX_SEND_CMD = 100, /* Non-mailbox SMC Call */ COMMAND_SMC_SVC_VERSION = 200, }; diff --git a/include/linux/fs_uart_pd.h b/include/linux/fs_uart_pd.h deleted file mode 100644 index 36b61ff39277..000000000000 --- a/include/linux/fs_uart_pd.h +++ /dev/null @@ -1,71 +0,0 @@ -/* - * Platform information definitions for the CPM Uart driver. - * - * 2006 (c) MontaVista Software, Inc. - * Vitaly Bordug - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - -#ifndef FS_UART_PD_H -#define FS_UART_PD_H - -#include - -enum fs_uart_id { - fsid_smc1_uart, - fsid_smc2_uart, - fsid_scc1_uart, - fsid_scc2_uart, - fsid_scc3_uart, - fsid_scc4_uart, - fs_uart_nr, -}; - -static inline int fs_uart_id_scc2fsid(int id) -{ - return fsid_scc1_uart + id - 1; -} - -static inline int fs_uart_id_fsid2scc(int id) -{ - return id - fsid_scc1_uart + 1; -} - -static inline int fs_uart_id_smc2fsid(int id) -{ - return fsid_smc1_uart + id - 1; -} - -static inline int fs_uart_id_fsid2smc(int id) -{ - return id - fsid_smc1_uart + 1; -} - -struct fs_uart_platform_info { - void(*init_ioports)(struct fs_uart_platform_info *); - /* device specific information */ - int fs_no; /* controller index */ - char fs_type[4]; /* controller type */ - u32 uart_clk; - u8 tx_num_fifo; - u8 tx_buf_size; - u8 rx_num_fifo; - u8 rx_buf_size; - u8 brg; - u8 clk_rx; - u8 clk_tx; -}; - -static inline int fs_uart_get_id(struct fs_uart_platform_info *fpi) -{ - if(strstr(fpi->fs_type, "SMC")) - return fs_uart_id_smc2fsid(fpi->fs_no); - if(strstr(fpi->fs_type, "SCC")) - return fs_uart_id_scc2fsid(fpi->fs_no); - return fpi->fs_no; -} - -#endif diff --git a/include/linux/greybus/svc.h b/include/linux/greybus/svc.h index 5afaf5f06856..da547fb9071b 100644 --- a/include/linux/greybus/svc.h +++ b/include/linux/greybus/svc.h @@ -100,7 +100,4 @@ bool gb_svc_watchdog_enabled(struct gb_svc *svc); int gb_svc_watchdog_enable(struct gb_svc *svc); int gb_svc_watchdog_disable(struct gb_svc *svc); -int gb_svc_protocol_init(void); -void gb_svc_protocol_exit(void); - #endif /* __SVC_H */ diff --git a/include/linux/hid-roccat.h b/include/linux/hid-roccat.h index 3214fb0815fc..753654fff07f 100644 --- a/include/linux/hid-roccat.h +++ b/include/linux/hid-roccat.h @@ -16,7 +16,7 @@ #ifdef __KERNEL__ -int roccat_connect(struct class *klass, struct hid_device *hid, +int roccat_connect(const struct class *klass, struct hid_device *hid, int report_size); void roccat_disconnect(int minor); int roccat_report_event(int minor, u8 const *data); diff --git a/include/linux/iio/common/inv_sensors_timestamp.h b/include/linux/iio/common/inv_sensors_timestamp.h new file mode 100644 index 000000000000..a47d304d1ba7 --- /dev/null +++ b/include/linux/iio/common/inv_sensors_timestamp.h @@ -0,0 +1,95 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Copyright (C) 2020 Invensense, Inc. + */ + +#ifndef INV_SENSORS_TIMESTAMP_H_ +#define INV_SENSORS_TIMESTAMP_H_ + +/** + * struct inv_sensors_timestamp_chip - chip internal properties + * @clock_period: internal clock period in ns + * @jitter: acceptable jitter in per-mille + * @init_period: chip initial period at reset in ns + */ +struct inv_sensors_timestamp_chip { + uint32_t clock_period; + uint32_t jitter; + uint32_t init_period; +}; + +/** + * struct inv_sensors_timestamp_interval - timestamps interval + * @lo: interval lower bound + * @up: interval upper bound + */ +struct inv_sensors_timestamp_interval { + int64_t lo; + int64_t up; +}; + +/** + * struct inv_sensors_timestamp_acc - accumulator for computing an estimation + * @val: current estimation of the value, the mean of all values + * @idx: current index of the next free place in values table + * @values: table of all measured values, use for computing the mean + */ +struct inv_sensors_timestamp_acc { + uint32_t val; + size_t idx; + uint32_t values[32]; +}; + +/** + * struct inv_sensors_timestamp - timestamp management states + * @chip: chip internal characteristics + * @min_period: minimal acceptable clock period + * @max_period: maximal acceptable clock period + * @it: interrupts interval timestamps + * @timestamp: store last timestamp for computing next data timestamp + * @mult: current internal period multiplier + * @new_mult: new set internal period multiplier (not yet effective) + * @period: measured current period of the sensor + * @chip_period: accumulator for computing internal chip period + */ +struct inv_sensors_timestamp { + struct inv_sensors_timestamp_chip chip; + uint32_t min_period; + uint32_t max_period; + struct inv_sensors_timestamp_interval it; + int64_t timestamp; + uint32_t mult; + uint32_t new_mult; + uint32_t period; + struct inv_sensors_timestamp_acc chip_period; +}; + +void inv_sensors_timestamp_init(struct inv_sensors_timestamp *ts, + const struct inv_sensors_timestamp_chip *chip); + +int inv_sensors_timestamp_update_odr(struct inv_sensors_timestamp *ts, + uint32_t period, bool fifo); + +void inv_sensors_timestamp_interrupt(struct inv_sensors_timestamp *ts, + uint32_t fifo_period, size_t fifo_nb, + size_t sensor_nb, int64_t timestamp); + +static inline int64_t inv_sensors_timestamp_pop(struct inv_sensors_timestamp *ts) +{ + ts->timestamp += ts->period; + return ts->timestamp; +} + +void inv_sensors_timestamp_apply_odr(struct inv_sensors_timestamp *ts, + uint32_t fifo_period, size_t fifo_nb, + unsigned int fifo_no); + +static inline void inv_sensors_timestamp_reset(struct inv_sensors_timestamp *ts) +{ + const struct inv_sensors_timestamp_interval interval_init = {0LL, 0LL}; + + ts->it = interval_init; + ts->timestamp = 0; +} + +#endif diff --git a/include/linux/iio/types.h b/include/linux/iio/types.h index 82faa98c719a..117bde7d6ad7 100644 --- a/include/linux/iio/types.h +++ b/include/linux/iio/types.h @@ -19,6 +19,8 @@ enum iio_event_info { IIO_EV_INFO_TIMEOUT, IIO_EV_INFO_RESET_TIMEOUT, IIO_EV_INFO_TAP2_MIN_DELAY, + IIO_EV_INFO_RUNNING_PERIOD, + IIO_EV_INFO_RUNNING_COUNT, }; #define IIO_VAL_INT 1 diff --git a/include/linux/interconnect-provider.h b/include/linux/interconnect-provider.h index e6d8aca6886d..7ba183f221f1 100644 --- a/include/linux/interconnect-provider.h +++ b/include/linux/interconnect-provider.h @@ -33,7 +33,7 @@ struct icc_node_data { */ struct icc_onecell_data { unsigned int num_nodes; - struct icc_node *nodes[]; + struct icc_node *nodes[] __counted_by(num_nodes); }; struct icc_node *of_icc_xlate_onecell(struct of_phandle_args *spec, diff --git a/include/linux/kernfs.h b/include/linux/kernfs.h index 73f5c120def8..2a36f3218b51 100644 --- a/include/linux/kernfs.h +++ b/include/linux/kernfs.h @@ -550,6 +550,10 @@ static inline int kernfs_setattr(struct kernfs_node *kn, const struct iattr *iattr) { return -ENOSYS; } +static inline __poll_t kernfs_generic_poll(struct kernfs_open_file *of, + struct poll_table_struct *pt) +{ return -ENOSYS; } + static inline void kernfs_notify(struct kernfs_node *kn) { } static inline int kernfs_xattr_get(struct kernfs_node *kn, const char *name, diff --git a/include/linux/kobject.h b/include/linux/kobject.h index c392c811d9ad..c30affcc43b4 100644 --- a/include/linux/kobject.h +++ b/include/linux/kobject.h @@ -69,14 +69,16 @@ struct kobject { const struct kobj_type *ktype; struct kernfs_node *sd; /* sysfs directory entry */ struct kref kref; -#ifdef CONFIG_DEBUG_KOBJECT_RELEASE - struct delayed_work release; -#endif + unsigned int state_initialized:1; unsigned int state_in_sysfs:1; unsigned int state_add_uevent_sent:1; unsigned int state_remove_uevent_sent:1; unsigned int uevent_suppress:1; + +#ifdef CONFIG_DEBUG_KOBJECT_RELEASE + struct delayed_work release; +#endif }; __printf(2, 3) int kobject_set_name(struct kobject *kobj, const char *name, ...); diff --git a/include/linux/mhi.h b/include/linux/mhi.h index f6de4b6ecfc7..039943ec4d4e 100644 --- a/include/linux/mhi.h +++ b/include/linux/mhi.h @@ -299,6 +299,10 @@ struct mhi_controller_config { * @iova_start: IOMMU starting address for data (required) * @iova_stop: IOMMU stop address for data (required) * @fw_image: Firmware image name for normal booting (optional) + * @fw_data: Firmware image data content for normal booting, used only + * if fw_image is NULL and fbc_download is true (optional) + * @fw_sz: Firmware image data size for normal booting, used only if fw_image + * is NULL and fbc_download is true (optional) * @edl_image: Firmware image name for emergency download mode (optional) * @rddm_size: RAM dump size that host should allocate for debugging purpose * @sbl_size: SBL image size downloaded through BHIe (optional) @@ -384,6 +388,8 @@ struct mhi_controller { dma_addr_t iova_start; dma_addr_t iova_stop; const char *fw_image; + const u8 *fw_data; + size_t fw_sz; const char *edl_image; size_t rddm_size; size_t sbl_size; diff --git a/include/linux/nvmem-consumer.h b/include/linux/nvmem-consumer.h index fa030d93b768..4523e4e83319 100644 --- a/include/linux/nvmem-consumer.h +++ b/include/linux/nvmem-consumer.h @@ -43,6 +43,8 @@ enum { NVMEM_REMOVE, NVMEM_CELL_ADD, NVMEM_CELL_REMOVE, + NVMEM_LAYOUT_ADD, + NVMEM_LAYOUT_REMOVE, }; #if IS_ENABLED(CONFIG_NVMEM) @@ -256,7 +258,7 @@ static inline struct nvmem_device *of_nvmem_device_get(struct device_node *np, static inline struct device_node * of_nvmem_layout_get_container(struct nvmem_device *nvmem) { - return ERR_PTR(-EOPNOTSUPP); + return NULL; } #endif /* CONFIG_NVMEM && CONFIG_OF */ diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index b9767f36d5b5..5fb3d4c393a9 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -1762,6 +1762,10 @@ #define PCI_SUBDEVICE_ID_AT_2700FX 0x2701 #define PCI_SUBDEVICE_ID_AT_2701FX 0x2703 +#define PCI_VENDOR_ID_ASIX 0x125b +#define PCI_DEVICE_ID_ASIX_AX99100 0x9100 +#define PCI_DEVICE_ID_ASIX_AX99100_LB 0x9110 + #define PCI_VENDOR_ID_ESS 0x125d #define PCI_DEVICE_ID_ESS_ESS1968 0x1968 #define PCI_DEVICE_ID_ESS_ESS1978 0x1978 diff --git a/include/linux/peci.h b/include/linux/peci.h index 06e6ef935297..9b3d36aff431 100644 --- a/include/linux/peci.h +++ b/include/linux/peci.h @@ -42,13 +42,13 @@ struct peci_controller_ops { */ struct peci_controller { struct device dev; - struct peci_controller_ops *ops; + const struct peci_controller_ops *ops; struct mutex bus_lock; /* held for the duration of xfer */ u8 id; }; struct peci_controller *devm_peci_controller_add(struct device *parent, - struct peci_controller_ops *ops); + const struct peci_controller_ops *ops); static inline struct peci_controller *to_peci_controller(void *d) { diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h index a156d2ed8d9e..bb6f073bc159 100644 --- a/include/linux/serial_core.h +++ b/include/linux/serial_core.h @@ -570,7 +570,7 @@ struct uart_port { struct serial_port_device *port_dev; /* serial core port device */ unsigned long sysrq; /* sysrq timeout */ - unsigned int sysrq_ch; /* char for sysrq */ + u8 sysrq_ch; /* char for sysrq */ unsigned char has_sysrq; unsigned char sysrq_seq; /* index in sysrq_toggle_seq */ @@ -904,16 +904,16 @@ void uart_handle_dcd_change(struct uart_port *uport, bool active); void uart_handle_cts_change(struct uart_port *uport, bool active); void uart_insert_char(struct uart_port *port, unsigned int status, - unsigned int overrun, unsigned int ch, unsigned int flag); + unsigned int overrun, u8 ch, u8 flag); void uart_xchar_out(struct uart_port *uport, int offset); #ifdef CONFIG_MAGIC_SYSRQ_SERIAL #define SYSRQ_TIMEOUT (HZ * 5) -bool uart_try_toggle_sysrq(struct uart_port *port, unsigned int ch); +bool uart_try_toggle_sysrq(struct uart_port *port, u8 ch); -static inline int uart_handle_sysrq_char(struct uart_port *port, unsigned int ch) +static inline int uart_handle_sysrq_char(struct uart_port *port, u8 ch) { if (!port->sysrq) return 0; @@ -932,7 +932,7 @@ static inline int uart_handle_sysrq_char(struct uart_port *port, unsigned int ch return 0; } -static inline int uart_prepare_sysrq_char(struct uart_port *port, unsigned int ch) +static inline int uart_prepare_sysrq_char(struct uart_port *port, u8 ch) { if (!port->sysrq) return 0; @@ -953,7 +953,7 @@ static inline int uart_prepare_sysrq_char(struct uart_port *port, unsigned int c static inline void uart_unlock_and_check_sysrq(struct uart_port *port) { - int sysrq_ch; + u8 sysrq_ch; if (!port->has_sysrq) { spin_unlock(&port->lock); @@ -972,7 +972,7 @@ static inline void uart_unlock_and_check_sysrq(struct uart_port *port) static inline void uart_unlock_and_check_sysrq_irqrestore(struct uart_port *port, unsigned long flags) { - int sysrq_ch; + u8 sysrq_ch; if (!port->has_sysrq) { spin_unlock_irqrestore(&port->lock, flags); @@ -988,11 +988,11 @@ static inline void uart_unlock_and_check_sysrq_irqrestore(struct uart_port *port handle_sysrq(sysrq_ch); } #else /* CONFIG_MAGIC_SYSRQ_SERIAL */ -static inline int uart_handle_sysrq_char(struct uart_port *port, unsigned int ch) +static inline int uart_handle_sysrq_char(struct uart_port *port, u8 ch) { return 0; } -static inline int uart_prepare_sysrq_char(struct uart_port *port, unsigned int ch) +static inline int uart_prepare_sysrq_char(struct uart_port *port, u8 ch) { return 0; } diff --git a/include/linux/sysrq.h b/include/linux/sysrq.h index 3a582ec7a2f1..bdca467ebb77 100644 --- a/include/linux/sysrq.h +++ b/include/linux/sysrq.h @@ -30,7 +30,7 @@ #define SYSRQ_ENABLE_RTNICE 0x0100 struct sysrq_key_op { - void (* const handler)(int); + void (* const handler)(u8); const char * const help_msg; const char * const action_msg; const int enable_mask; @@ -43,10 +43,10 @@ struct sysrq_key_op { * are available -- else NULL's). */ -void handle_sysrq(int key); -void __handle_sysrq(int key, bool check_mask); -int register_sysrq_key(int key, const struct sysrq_key_op *op); -int unregister_sysrq_key(int key, const struct sysrq_key_op *op); +void handle_sysrq(u8 key); +void __handle_sysrq(u8 key, bool check_mask); +int register_sysrq_key(u8 key, const struct sysrq_key_op *op); +int unregister_sysrq_key(u8 key, const struct sysrq_key_op *op); extern const struct sysrq_key_op *__sysrq_reboot_op; int sysrq_toggle_support(int enable_mask); @@ -54,20 +54,20 @@ int sysrq_mask(void); #else -static inline void handle_sysrq(int key) +static inline void handle_sysrq(u8 key) { } -static inline void __handle_sysrq(int key, bool check_mask) +static inline void __handle_sysrq(u8 key, bool check_mask) { } -static inline int register_sysrq_key(int key, const struct sysrq_key_op *op) +static inline int register_sysrq_key(u8 key, const struct sysrq_key_op *op) { return -EINVAL; } -static inline int unregister_sysrq_key(int key, const struct sysrq_key_op *op) +static inline int unregister_sysrq_key(u8 key, const struct sysrq_key_op *op) { return -EINVAL; } diff --git a/include/linux/ti_wilink_st.h b/include/linux/ti_wilink_st.h index 44a7f9169ac6..10642d4844f0 100644 --- a/include/linux/ti_wilink_st.h +++ b/include/linux/ti_wilink_st.h @@ -271,7 +271,7 @@ long st_kim_stop(void *); void st_kim_complete(void *); void kim_st_list_protocols(struct st_data_s *, void *); -void st_kim_recv(void *, const unsigned char *, long); +void st_kim_recv(void *disc_data, const u8 *data, size_t count); /* diff --git a/include/linux/tty.h b/include/linux/tty.h index e8d5d9997aca..f002d0f25db7 100644 --- a/include/linux/tty.h +++ b/include/linux/tty.h @@ -192,13 +192,14 @@ struct tty_operations; */ struct tty_struct { struct kref kref; + int index; struct device *dev; struct tty_driver *driver; + struct tty_port *port; const struct tty_operations *ops; - int index; - struct ld_semaphore ldisc_sem; struct tty_ldisc *ldisc; + struct ld_semaphore ldisc_sem; struct mutex atomic_write_lock; struct mutex legacy_mutex; @@ -209,6 +210,7 @@ struct tty_struct { char name[64]; unsigned long flags; int count; + unsigned int receive_room; struct winsize winsize; struct { @@ -219,16 +221,16 @@ struct tty_struct { } __aligned(sizeof(unsigned long)) flow; struct { - spinlock_t lock; struct pid *pgrp; struct pid *session; + spinlock_t lock; unsigned char pktstatus; bool packet; unsigned long unused[0]; } __aligned(sizeof(unsigned long)) ctrl; bool hw_stopped; - unsigned int receive_room; + bool closing; int flow_change; struct tty_struct *link; @@ -239,15 +241,13 @@ struct tty_struct { void *disc_data; void *driver_data; spinlock_t files_lock; + int write_cnt; + unsigned char *write_buf; + struct list_head tty_files; #define N_TTY_BUF_SIZE 4096 - - int closing; - unsigned char *write_buf; - int write_cnt; struct work_struct SAK_work; - struct tty_port *port; } __randomize_layout; /* Each of a tty's open files has private_data pointing to tty_file_private */ diff --git a/include/linux/tty_buffer.h b/include/linux/tty_buffer.h index 6ceb2789e6c8..31125e3be3c5 100644 --- a/include/linux/tty_buffer.h +++ b/include/linux/tty_buffer.h @@ -12,24 +12,24 @@ struct tty_buffer { struct tty_buffer *next; struct llist_node free; }; - int used; - int size; - int commit; - int lookahead; /* Lazy update on recv, can become less than "read" */ - int read; + unsigned int used; + unsigned int size; + unsigned int commit; + unsigned int lookahead; /* Lazy update on recv, can become less than "read" */ + unsigned int read; bool flags; /* Data points here */ - unsigned long data[]; + u8 data[] __aligned(sizeof(unsigned long)); }; -static inline unsigned char *char_buf_ptr(struct tty_buffer *b, int ofs) +static inline u8 *char_buf_ptr(struct tty_buffer *b, unsigned int ofs) { - return ((unsigned char *)b->data) + ofs; + return b->data + ofs; } -static inline char *flag_buf_ptr(struct tty_buffer *b, int ofs) +static inline u8 *flag_buf_ptr(struct tty_buffer *b, unsigned int ofs) { - return (char *)char_buf_ptr(b, ofs) + b->size; + return char_buf_ptr(b, ofs) + b->size; } struct tty_bufhead { diff --git a/include/linux/tty_driver.h b/include/linux/tty_driver.h index e00034118c7b..18beff0cec1a 100644 --- a/include/linux/tty_driver.h +++ b/include/linux/tty_driver.h @@ -72,8 +72,8 @@ struct serial_struct; * is closed for the last time freeing up the resources. This is * actually the second part of shutdown for routines that might sleep. * - * @write: ``int ()(struct tty_struct *tty, const unsigned char *buf, - * int count)`` + * @write: ``ssize_t ()(struct tty_struct *tty, const unsigned char *buf, + * size_t count)`` * * This routine is called by the kernel to write a series (@count) of * characters (@buf) to the @tty device. The characters may come from @@ -356,9 +356,8 @@ struct tty_operations { void (*close)(struct tty_struct * tty, struct file * filp); void (*shutdown)(struct tty_struct *tty); void (*cleanup)(struct tty_struct *tty); - int (*write)(struct tty_struct * tty, - const unsigned char *buf, int count); - int (*put_char)(struct tty_struct *tty, unsigned char ch); + ssize_t (*write)(struct tty_struct *tty, const u8 *buf, size_t count); + int (*put_char)(struct tty_struct *tty, u8 ch); void (*flush_chars)(struct tty_struct *tty); unsigned int (*write_room)(struct tty_struct *tty); unsigned int (*chars_in_buffer)(struct tty_struct *tty); diff --git a/include/linux/tty_flip.h b/include/linux/tty_flip.h index bfaaeee61a05..af4fce98f64e 100644 --- a/include/linux/tty_flip.h +++ b/include/linux/tty_flip.h @@ -10,17 +10,59 @@ struct tty_ldisc; int tty_buffer_set_limit(struct tty_port *port, int limit); unsigned int tty_buffer_space_avail(struct tty_port *port); int tty_buffer_request_room(struct tty_port *port, size_t size); -int tty_insert_flip_string_flags(struct tty_port *port, - const unsigned char *chars, const char *flags, size_t size); -int tty_insert_flip_string_fixed_flag(struct tty_port *port, - const unsigned char *chars, char flag, size_t size); -int tty_prepare_flip_string(struct tty_port *port, unsigned char **chars, - size_t size); +size_t __tty_insert_flip_string_flags(struct tty_port *port, const u8 *chars, + const u8 *flags, bool mutable_flags, + size_t size); +size_t tty_prepare_flip_string(struct tty_port *port, u8 **chars, size_t size); void tty_flip_buffer_push(struct tty_port *port); -int __tty_insert_flip_char(struct tty_port *port, unsigned char ch, char flag); -static inline int tty_insert_flip_char(struct tty_port *port, - unsigned char ch, char flag) +/** + * tty_insert_flip_string_fixed_flag - add characters to the tty buffer + * @port: tty port + * @chars: characters + * @flag: flag value for each character + * @size: size + * + * Queue a series of bytes to the tty buffering. All the characters passed are + * marked with the supplied flag. + * + * Returns: the number added. + */ +static inline size_t tty_insert_flip_string_fixed_flag(struct tty_port *port, + const u8 *chars, u8 flag, + size_t size) +{ + return __tty_insert_flip_string_flags(port, chars, &flag, false, size); +} + +/** + * tty_insert_flip_string_flags - add characters to the tty buffer + * @port: tty port + * @chars: characters + * @flags: flag bytes + * @size: size + * + * Queue a series of bytes to the tty buffering. For each character the flags + * array indicates the status of the character. + * + * Returns: the number added. + */ +static inline size_t tty_insert_flip_string_flags(struct tty_port *port, + const u8 *chars, + const u8 *flags, size_t size) +{ + return __tty_insert_flip_string_flags(port, chars, flags, true, size); +} + +/** + * tty_insert_flip_char - add one character to the tty buffer + * @port: tty port + * @ch: character + * @flag: flag byte + * + * Queue a single byte @ch to the tty buffering, with an optional flag. + */ +static inline size_t tty_insert_flip_char(struct tty_port *port, u8 ch, u8 flag) { struct tty_buffer *tb = port->buf.tail; int change; @@ -32,17 +74,17 @@ static inline int tty_insert_flip_char(struct tty_port *port, *char_buf_ptr(tb, tb->used++) = ch; return 1; } - return __tty_insert_flip_char(port, ch, flag); + return __tty_insert_flip_string_flags(port, &ch, &flag, false, 1); } -static inline int tty_insert_flip_string(struct tty_port *port, - const unsigned char *chars, size_t size) +static inline size_t tty_insert_flip_string(struct tty_port *port, + const u8 *chars, size_t size) { return tty_insert_flip_string_fixed_flag(port, chars, TTY_NORMAL, size); } -int tty_ldisc_receive_buf(struct tty_ldisc *ld, const unsigned char *p, - const char *f, int count); +size_t tty_ldisc_receive_buf(struct tty_ldisc *ld, const u8 *p, const u8 *f, + size_t count); void tty_buffer_lock_exclusive(struct tty_port *port); void tty_buffer_unlock_exclusive(struct tty_port *port); diff --git a/include/linux/tty_ldisc.h b/include/linux/tty_ldisc.h index 49dc172dedc7..af01e89074b2 100644 --- a/include/linux/tty_ldisc.h +++ b/include/linux/tty_ldisc.h @@ -71,7 +71,7 @@ int ldsem_down_write_nested(struct ld_semaphore *sem, int subclass, * call to @receive_buf(). Returning an error will prevent the ldisc from * being attached. * - * Can sleep. + * Optional. Can sleep. * * @close: [TTY] ``void ()(struct tty_struct *tty)`` * @@ -80,7 +80,7 @@ int ldsem_down_write_nested(struct ld_semaphore *sem, int subclass, * changed to use a new line discipline. At the point of execution no * further users will enter the ldisc code for this tty. * - * Can sleep. + * Optional. Can sleep. * * @flush_buffer: [TTY] ``void ()(struct tty_struct *tty)`` * @@ -88,8 +88,10 @@ int ldsem_down_write_nested(struct ld_semaphore *sem, int subclass, * input characters it may have queued to be delivered to the user mode * process. It may be called at any point between open and close. * - * @read: [TTY] ``ssize_t ()(struct tty_struct *tty, struct file *file, - * unsigned char *buf, size_t nr)`` + * Optional. + * + * @read: [TTY] ``ssize_t ()(struct tty_struct *tty, struct file *file, u8 *buf, + * size_t nr)`` * * This function is called when the user requests to read from the @tty. * The line discipline will return whatever characters it has buffered up @@ -97,10 +99,10 @@ int ldsem_down_write_nested(struct ld_semaphore *sem, int subclass, * an %EIO error. Multiple read calls may occur in parallel and the ldisc * must deal with serialization issues. * - * Can sleep. + * Optional: %EIO unless provided. Can sleep. * * @write: [TTY] ``ssize_t ()(struct tty_struct *tty, struct file *file, - * const unsigned char *buf, size_t nr)`` + * const u8 *buf, size_t nr)`` * * This function is called when the user requests to write to the @tty. * The line discipline will deliver the characters to the low-level tty @@ -108,7 +110,7 @@ int ldsem_down_write_nested(struct ld_semaphore *sem, int subclass, * characters first. If this function is not defined, the user will * receive an %EIO error. * - * Can sleep. + * Optional: %EIO unless provided. Can sleep. * * @ioctl: [TTY] ``int ()(struct tty_struct *tty, unsigned int cmd, * unsigned long arg)`` @@ -120,6 +122,8 @@ int ldsem_down_write_nested(struct ld_semaphore *sem, int subclass, * discpline. So a low-level driver can "grab" an ioctl request before * the line discpline has a chance to see it. * + * Optional. + * * @compat_ioctl: [TTY] ``int ()(struct tty_struct *tty, unsigned int cmd, * unsigned long arg)`` * @@ -130,11 +134,15 @@ int ldsem_down_write_nested(struct ld_semaphore *sem, int subclass, * a pointer to wordsize-sensitive structure belongs here, but most of * ldiscs will happily leave it %NULL. * + * Optional. + * * @set_termios: [TTY] ``void ()(struct tty_struct *tty, const struct ktermios *old)`` * * This function notifies the line discpline that a change has been made * to the termios structure. * + * Optional. + * * @poll: [TTY] ``int ()(struct tty_struct *tty, struct file *file, * struct poll_table_struct *wait)`` * @@ -142,6 +150,8 @@ int ldsem_down_write_nested(struct ld_semaphore *sem, int subclass, * device. It is solely the responsibility of the line discipline to * handle poll requests. * + * Optional. + * * @hangup: [TTY] ``void ()(struct tty_struct *tty)`` * * Called on a hangup. Tells the discipline that it should cease I/O to @@ -149,10 +159,10 @@ int ldsem_down_write_nested(struct ld_semaphore *sem, int subclass, * but should wait until any pending driver I/O is completed. No further * calls into the ldisc code will occur. * - * Can sleep. + * Optional. Can sleep. * - * @receive_buf: [DRV] ``void ()(struct tty_struct *tty, - * const unsigned char *cp, const char *fp, int count)`` + * @receive_buf: [DRV] ``void ()(struct tty_struct *tty, const u8 *cp, + * const u8 *fp, size_t count)`` * * This function is called by the low-level tty driver to send characters * received by the hardware to the line discpline for processing. @cp is @@ -161,6 +171,8 @@ int ldsem_down_write_nested(struct ld_semaphore *sem, int subclass, * character was received with a parity error, etc. @fp may be %NULL to * indicate all data received is %TTY_NORMAL. * + * Optional. + * * @write_wakeup: [DRV] ``void ()(struct tty_struct *tty)`` * * This function is called by the low-level tty driver to signal that line @@ -170,13 +182,17 @@ int ldsem_down_write_nested(struct ld_semaphore *sem, int subclass, * send, please arise a tasklet or workqueue to do the real data transfer. * Do not send data in this hook, it may lead to a deadlock. * + * Optional. + * * @dcd_change: [DRV] ``void ()(struct tty_struct *tty, bool active)`` * * Tells the discipline that the DCD pin has changed its status. Used * exclusively by the %N_PPS (Pulse-Per-Second) line discipline. * - * @receive_buf2: [DRV] ``int ()(struct tty_struct *tty, - * const unsigned char *cp, const char *fp, int count)`` + * Optional. + * + * @receive_buf2: [DRV] ``ssize_t ()(struct tty_struct *tty, const u8 *cp, + * const u8 *fp, size_t count)`` * * This function is called by the low-level tty driver to send characters * received by the hardware to the line discpline for processing. @cp is a @@ -186,8 +202,10 @@ int ldsem_down_write_nested(struct ld_semaphore *sem, int subclass, * indicate all data received is %TTY_NORMAL. If assigned, prefer this * function for automatic flow control. * - * @lookahead_buf: [DRV] ``void ()(struct tty_struct *tty, - * const unsigned char *cp, const char *fp, int count)`` + * Optional. + * + * @lookahead_buf: [DRV] ``void ()(struct tty_struct *tty, const u8 *cp, + * const u8 *fp, size_t count)`` * * This function is called by the low-level tty driver for characters * not eaten by ->receive_buf() or ->receive_buf2(). It is useful for @@ -198,6 +216,8 @@ int ldsem_down_write_nested(struct ld_semaphore *sem, int subclass, * same characters (e.g. by skipping the actions for high-priority * characters already handled by ->lookahead_buf()). * + * Optional. + * * @owner: module containting this ldisc (for reference counting) * * This structure defines the interface between the tty line discipline @@ -218,11 +238,10 @@ struct tty_ldisc_ops { int (*open)(struct tty_struct *tty); void (*close)(struct tty_struct *tty); void (*flush_buffer)(struct tty_struct *tty); - ssize_t (*read)(struct tty_struct *tty, struct file *file, - unsigned char *buf, size_t nr, - void **cookie, unsigned long offset); + ssize_t (*read)(struct tty_struct *tty, struct file *file, u8 *buf, + size_t nr, void **cookie, unsigned long offset); ssize_t (*write)(struct tty_struct *tty, struct file *file, - const unsigned char *buf, size_t nr); + const u8 *buf, size_t nr); int (*ioctl)(struct tty_struct *tty, unsigned int cmd, unsigned long arg); int (*compat_ioctl)(struct tty_struct *tty, unsigned int cmd, @@ -235,14 +254,14 @@ struct tty_ldisc_ops { /* * The following routines are called from below. */ - void (*receive_buf)(struct tty_struct *tty, const unsigned char *cp, - const char *fp, int count); + void (*receive_buf)(struct tty_struct *tty, const u8 *cp, + const u8 *fp, size_t count); void (*write_wakeup)(struct tty_struct *tty); void (*dcd_change)(struct tty_struct *tty, bool active); - int (*receive_buf2)(struct tty_struct *tty, const unsigned char *cp, - const char *fp, int count); - void (*lookahead_buf)(struct tty_struct *tty, const unsigned char *cp, - const unsigned char *fp, unsigned int count); + size_t (*receive_buf2)(struct tty_struct *tty, const u8 *cp, + const u8 *fp, size_t count); + void (*lookahead_buf)(struct tty_struct *tty, const u8 *cp, + const u8 *fp, size_t count); struct module *owner; }; diff --git a/include/linux/tty_port.h b/include/linux/tty_port.h index edf685a24f7c..6b367eb17979 100644 --- a/include/linux/tty_port.h +++ b/include/linux/tty_port.h @@ -39,9 +39,10 @@ struct tty_port_operations { }; struct tty_port_client_operations { - int (*receive_buf)(struct tty_port *port, const unsigned char *, const unsigned char *, size_t); - void (*lookahead_buf)(struct tty_port *port, const unsigned char *cp, - const unsigned char *fp, unsigned int count); + size_t (*receive_buf)(struct tty_port *port, const u8 *cp, const u8 *fp, + size_t count); + void (*lookahead_buf)(struct tty_port *port, const u8 *cp, + const u8 *fp, size_t count); void (*write_wakeup)(struct tty_port *port); }; diff --git a/include/linux/usb.h b/include/linux/usb.h index 25f8e62a30ec..a21074861f91 100644 --- a/include/linux/usb.h +++ b/include/linux/usb.h @@ -25,7 +25,6 @@ struct usb_device; struct usb_driver; -struct wusb_dev; /*-------------------------------------------------------------------------*/ @@ -425,7 +424,6 @@ struct usb_host_config { struct usb_host_bos { struct usb_bos_descriptor *desc; - /* wireless cap descriptor is handled by wusb */ struct usb_ext_cap_descriptor *ext_cap; struct usb_ss_cap_descriptor *ss_cap; struct usb_ssp_cap_descriptor *ssp_cap; @@ -612,7 +610,6 @@ struct usb3_lpm_parameters { * WUSB devices are not, until we authorize them from user space. * FIXME -- complete doc * @authenticated: Crypto authentication passed - * @wusb: device is Wireless USB * @lpm_capable: device supports LPM * @lpm_devinit_allow: Allow USB3 device initiated LPM, exit latency is in range * @usb2_hw_lpm_capable: device can perform USB2 hardware LPM @@ -634,8 +631,6 @@ struct usb3_lpm_parameters { * @do_remote_wakeup: remote wakeup should be enabled * @reset_resume: needs reset instead of resume * @port_is_suspended: the upstream port is suspended (L2 or U3) - * @wusb_dev: if this is a Wireless USB device, link to the WUSB - * specific data for the device. * @slot_id: Slot ID assigned by xHCI * @removable: Device can be physically removed from this port * @l1_params: best effor service latency for USB2 L1 LPM state, and L1 timeout. @@ -696,7 +691,6 @@ struct usb_device { unsigned have_langid:1; unsigned authorized:1; unsigned authenticated:1; - unsigned wusb:1; unsigned lpm_capable:1; unsigned lpm_devinit_allow:1; unsigned usb2_hw_lpm_capable:1; @@ -727,7 +721,6 @@ struct usb_device { unsigned reset_resume:1; unsigned port_is_suspended:1; - struct wusb_dev *wusb_dev; int slot_id; struct usb2_lpm_parameters l1_params; struct usb3_lpm_parameters u1_params; @@ -1742,11 +1735,6 @@ static inline void usb_fill_bulk_urb(struct urb *urb, * encoding of the endpoint interval, and express polling intervals in * microframes (eight per millisecond) rather than in frames (one per * millisecond). - * - * Wireless USB also uses the logarithmic encoding, but specifies it in units of - * 128us instead of 125us. For Wireless USB devices, the interval is passed - * through to the host controller, rather than being translated into microframe - * units. */ static inline void usb_fill_int_urb(struct urb *urb, struct usb_device *dev, diff --git a/include/linux/usb/ch9.h b/include/linux/usb/ch9.h index 969e7dba6358..c93b410b314a 100644 --- a/include/linux/usb/ch9.h +++ b/include/linux/usb/ch9.h @@ -3,7 +3,7 @@ * This file holds USB constants and structures that are needed for * USB device APIs. These are used by the USB device model, which is * defined in chapter 9 of the USB 2.0 specification and in the - * Wireless USB 1.0 (spread around). Linux has several APIs in C that + * Wireless USB 1.0 spec (now defunct). Linux has several APIs in C that * need these: * * - the host side Linux-USB kernel driver API; @@ -14,9 +14,6 @@ * act either as a USB host or as a USB device. That means the host and * device side APIs benefit from working well together. * - * There's also "Wireless USB", using low power short range radios for - * peripheral interconnection but otherwise building on the USB framework. - * * Note all descriptors are declared '__attribute__((packed))' so that: * * [a] they never get padded, either internally (USB spec writers diff --git a/include/linux/usb/chipidea.h b/include/linux/usb/chipidea.h index ee38835ed77c..0b4f2d5faa08 100644 --- a/include/linux/usb/chipidea.h +++ b/include/linux/usb/chipidea.h @@ -63,6 +63,7 @@ struct ci_hdrc_platform_data { #define CI_HDRC_IMX_IS_HSIC BIT(14) #define CI_HDRC_PMQOS BIT(15) #define CI_HDRC_PHY_VBUS_CONTROL BIT(16) +#define CI_HDRC_HAS_PORTSC_PEC_MISSED BIT(17) enum usb_dr_mode dr_mode; #define CI_HDRC_CONTROLLER_RESET_EVENT 0 #define CI_HDRC_CONTROLLER_STOPPED_EVENT 1 diff --git a/include/linux/usb/composite.h b/include/linux/usb/composite.h index 151ac8303a67..285f48306f99 100644 --- a/include/linux/usb/composite.h +++ b/include/linux/usb/composite.h @@ -450,29 +450,6 @@ static inline struct usb_composite_driver *to_cdriver( * * One of these devices is allocated and initialized before the * associated device driver's bind() is called. - * - * OPEN ISSUE: it appears that some WUSB devices will need to be - * built by combining a normal (wired) gadget with a wireless one. - * This revision of the gadget framework should probably try to make - * sure doing that won't hurt too much. - * - * One notion for how to handle Wireless USB devices involves: - * - * (a) a second gadget here, discovery mechanism TBD, but likely - * needing separate "register/unregister WUSB gadget" calls; - * (b) updates to usb_gadget to include flags "is it wireless", - * "is it wired", plus (presumably in a wrapper structure) - * bandgroup and PHY info; - * (c) presumably a wireless_ep wrapping a usb_ep, and reporting - * wireless-specific parameters like maxburst and maxsequence; - * (d) configurations that are specific to wireless links; - * (e) function drivers that understand wireless configs and will - * support wireless for (additional) function instances; - * (f) a function to support association setup (like CBAF), not - * necessarily requiring a wireless adapter; - * (g) composite device setup that can create one or more wireless - * configs, including appropriate association setup support; - * (h) more, TBD. */ struct usb_composite_dev { struct usb_gadget *gadget; diff --git a/include/linux/usb/hcd.h b/include/linux/usb/hcd.h index 4e9623e8492b..61d4f0b793dc 100644 --- a/include/linux/usb/hcd.h +++ b/include/linux/usb/hcd.h @@ -154,7 +154,6 @@ struct usb_hcd { /* The next flag is a stopgap, to be removed when all the HCDs * support the new root-hub polling mechanism. */ unsigned uses_new_polling:1; - unsigned wireless:1; /* Wireless USB HCD */ unsigned has_tt:1; /* Integrated TT in root hub */ unsigned amd_resume_bug:1; /* AMD remote wakeup quirk */ unsigned can_do_streams:1; /* HC supports streams */ @@ -249,7 +248,6 @@ struct hc_driver { #define HCD_SHARED 0x0004 /* Two (or more) usb_hcds share HW */ #define HCD_USB11 0x0010 /* USB 1.1 */ #define HCD_USB2 0x0020 /* USB 2.0 */ -#define HCD_USB25 0x0030 /* Wireless USB 1.0 (USB 2.5)*/ #define HCD_USB3 0x0040 /* USB 3.0 */ #define HCD_USB31 0x0050 /* USB 3.1 */ #define HCD_USB32 0x0060 /* USB 3.2 */ diff --git a/include/linux/usb/phy.h b/include/linux/usb/phy.h index e4de6bc1f69b..b513749582d7 100644 --- a/include/linux/usb/phy.h +++ b/include/linux/usb/phy.h @@ -144,6 +144,10 @@ struct usb_phy { */ int (*set_wakeup)(struct usb_phy *x, bool enabled); + /* notify phy port status change */ + int (*notify_port_status)(struct usb_phy *x, int port, + u16 portstatus, u16 portchange); + /* notify phy connect status change */ int (*notify_connect)(struct usb_phy *x, enum usb_device_speed speed); @@ -316,6 +320,15 @@ usb_phy_set_wakeup(struct usb_phy *x, bool enabled) return 0; } +static inline int +usb_phy_notify_port_status(struct usb_phy *x, int port, u16 portstatus, u16 portchange) +{ + if (x && x->notify_port_status) + return x->notify_port_status(x, port, portstatus, portchange); + else + return 0; +} + static inline int usb_phy_notify_connect(struct usb_phy *x, enum usb_device_speed speed) { diff --git a/include/linux/usb/tcpci.h b/include/linux/usb/tcpci.h index 85e95a3251d3..83376473ac76 100644 --- a/include/linux/usb/tcpci.h +++ b/include/linux/usb/tcpci.h @@ -103,6 +103,7 @@ #define TCPC_POWER_STATUS_SINKING_VBUS BIT(0) #define TCPC_FAULT_STATUS 0x1f +#define TCPC_FAULT_STATUS_ALL_REG_RST_TO_DEFAULT BIT(7) #define TCPC_ALERT_EXTENDED 0x21 diff --git a/include/linux/usb/typec_altmode.h b/include/linux/usb/typec_altmode.h index 350d49012659..28aeef8f9e7b 100644 --- a/include/linux/usb/typec_altmode.h +++ b/include/linux/usb/typec_altmode.h @@ -67,7 +67,7 @@ struct typec_altmode_ops { int typec_altmode_enter(struct typec_altmode *altmode, u32 *vdo); int typec_altmode_exit(struct typec_altmode *altmode); -void typec_altmode_attention(struct typec_altmode *altmode, u32 vdo); +int typec_altmode_attention(struct typec_altmode *altmode, u32 vdo); int typec_altmode_vdm(struct typec_altmode *altmode, const u32 header, const u32 *vdo, int count); int typec_altmode_notify(struct typec_altmode *altmode, unsigned long conf, diff --git a/include/trace/events/fsi.h b/include/trace/events/fsi.h index c9a72e8432b8..5ff15126ad9d 100644 --- a/include/trace/events/fsi.h +++ b/include/trace/events/fsi.h @@ -122,6 +122,37 @@ TRACE_EVENT(fsi_master_break, ) ); +TRACE_EVENT(fsi_master_scan, + TP_PROTO(const struct fsi_master *master, bool scan), + TP_ARGS(master, scan), + TP_STRUCT__entry( + __field(int, master_idx) + __field(int, n_links) + __field(bool, scan) + ), + TP_fast_assign( + __entry->master_idx = master->idx; + __entry->n_links = master->n_links; + __entry->scan = scan; + ), + TP_printk("fsi%d (%d links) %s", __entry->master_idx, __entry->n_links, + __entry->scan ? "scan" : "unscan") +); + +TRACE_EVENT(fsi_master_unregister, + TP_PROTO(const struct fsi_master *master), + TP_ARGS(master), + TP_STRUCT__entry( + __field(int, master_idx) + __field(int, n_links) + ), + TP_fast_assign( + __entry->master_idx = master->idx; + __entry->n_links = master->n_links; + ), + TP_printk("fsi%d (%d links)", __entry->master_idx, __entry->n_links) +); + TRACE_EVENT(fsi_slave_init, TP_PROTO(const struct fsi_slave *slave), TP_ARGS(slave), diff --git a/include/trace/events/fsi_master_i2cr.h b/include/trace/events/fsi_master_i2cr.h new file mode 100644 index 000000000000..c33eba130049 --- /dev/null +++ b/include/trace/events/fsi_master_i2cr.h @@ -0,0 +1,107 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#undef TRACE_SYSTEM +#define TRACE_SYSTEM fsi_master_i2cr + +#if !defined(_TRACE_FSI_MASTER_I2CR_H) || defined(TRACE_HEADER_MULTI_READ) +#define _TRACE_FSI_MASTER_I2CR_H + +#include + +TRACE_EVENT(i2cr_i2c_error, + TP_PROTO(const struct i2c_client *client, uint32_t command, int rc), + TP_ARGS(client, command, rc), + TP_STRUCT__entry( + __field(int, bus) + __field(int, rc) + __array(unsigned char, command, sizeof(uint32_t)) + __field(unsigned short, addr) + ), + TP_fast_assign( + __entry->bus = client->adapter->nr; + __entry->rc = rc; + memcpy(__entry->command, &command, sizeof(uint32_t)); + __entry->addr = client->addr; + ), + TP_printk("%d-%02x command:{ %*ph } rc:%d", __entry->bus, __entry->addr, + (int)sizeof(uint32_t), __entry->command, __entry->rc) +); + +TRACE_EVENT(i2cr_read, + TP_PROTO(const struct i2c_client *client, uint32_t command, uint64_t *data), + TP_ARGS(client, command, data), + TP_STRUCT__entry( + __field(int, bus) + __array(unsigned char, data, sizeof(uint64_t)) + __array(unsigned char, command, sizeof(uint32_t)) + __field(unsigned short, addr) + ), + TP_fast_assign( + __entry->bus = client->adapter->nr; + memcpy(__entry->data, data, sizeof(uint64_t)); + memcpy(__entry->command, &command, sizeof(uint32_t)); + __entry->addr = client->addr; + ), + TP_printk("%d-%02x command:{ %*ph } { %*ph }", __entry->bus, __entry->addr, + (int)sizeof(uint32_t), __entry->command, (int)sizeof(uint64_t), __entry->data) +); + +TRACE_EVENT(i2cr_status, + TP_PROTO(const struct i2c_client *client, uint64_t status), + TP_ARGS(client, status), + TP_STRUCT__entry( + __field(uint64_t, status) + __field(int, bus) + __field(unsigned short, addr) + ), + TP_fast_assign( + __entry->status = status; + __entry->bus = client->adapter->nr; + __entry->addr = client->addr; + ), + TP_printk("%d-%02x %016llx", __entry->bus, __entry->addr, __entry->status) +); + +TRACE_EVENT(i2cr_status_error, + TP_PROTO(const struct i2c_client *client, uint64_t status, uint64_t error, uint64_t log), + TP_ARGS(client, status, error, log), + TP_STRUCT__entry( + __field(uint64_t, error) + __field(uint64_t, log) + __field(uint64_t, status) + __field(int, bus) + __field(unsigned short, addr) + ), + TP_fast_assign( + __entry->error = error; + __entry->log = log; + __entry->status = status; + __entry->bus = client->adapter->nr; + __entry->addr = client->addr; + ), + TP_printk("%d-%02x status:%016llx error:%016llx log:%016llx", __entry->bus, __entry->addr, + __entry->status, __entry->error, __entry->log) +); + +TRACE_EVENT(i2cr_write, + TP_PROTO(const struct i2c_client *client, uint32_t command, uint64_t data), + TP_ARGS(client, command, data), + TP_STRUCT__entry( + __field(int, bus) + __array(unsigned char, data, sizeof(uint64_t)) + __array(unsigned char, command, sizeof(uint32_t)) + __field(unsigned short, addr) + ), + TP_fast_assign( + __entry->bus = client->adapter->nr; + memcpy(__entry->data, &data, sizeof(uint64_t)); + memcpy(__entry->command, &command, sizeof(uint32_t)); + __entry->addr = client->addr; + ), + TP_printk("%d-%02x command:{ %*ph } { %*ph }", __entry->bus, __entry->addr, + (int)sizeof(uint32_t), __entry->command, (int)sizeof(uint64_t), __entry->data) +); + +#endif + +#include diff --git a/include/uapi/linux/fsi.h b/include/uapi/linux/fsi.h index b2f1977378c7..a2e730fc6309 100644 --- a/include/uapi/linux/fsi.h +++ b/include/uapi/linux/fsi.h @@ -59,6 +59,16 @@ struct scom_access { * /dev/sbefifo* ioctl interface */ +/** + * FSI_SBEFIFO_CMD_TIMEOUT sets the timeout for writing data to the SBEFIFO. + * + * The command timeout is specified in seconds. The minimum value of command + * timeout is 1 seconds (default) and the maximum value of command timeout is + * 120 seconds. A command timeout of 0 will reset the value to the default of + * 1 seconds. + */ +#define FSI_SBEFIFO_CMD_TIMEOUT_SECONDS _IOW('s', 0x01, __u32) + /** * FSI_SBEFIFO_READ_TIMEOUT sets the read timeout for response from SBE. * diff --git a/include/uapi/linux/gsmmux.h b/include/uapi/linux/gsmmux.h index eb67884e5f38..4c878d84dbda 100644 --- a/include/uapi/linux/gsmmux.h +++ b/include/uapi/linux/gsmmux.h @@ -2,10 +2,45 @@ #ifndef _LINUX_GSMMUX_H #define _LINUX_GSMMUX_H +#include #include #include #include +/* + * flags definition for n_gsm + * + * Used by: + * struct gsm_config_ext.flags + * struct gsm_dlci_config.flags + */ +/* Forces a DLCI reset if set. Otherwise, a DLCI reset is only done if + * incompatible settings were provided. Always cleared on retrieval. + */ +#define GSM_FL_RESTART _BITUL(0) + +/** + * struct gsm_config - n_gsm basic configuration parameters + * + * This structure is used in combination with GSMIOC_GETCONF and GSMIOC_SETCONF + * to retrieve and set the basic parameters of an n_gsm ldisc. + * struct gsm_config_ext can be used to configure extended ldisc parameters. + * + * All timers are in units of 1/100th of a second. + * + * @adaption: Convergence layer type + * @encapsulation: Framing (0 = basic option, 1 = advanced option) + * @initiator: Initiator or responder + * @t1: Acknowledgment timer + * @t2: Response timer for multiplexer control channel + * @t3: Response timer for wake-up procedure + * @n2: Maximum number of retransmissions + * @mru: Maximum incoming frame payload size + * @mtu: Maximum outgoing frame payload size + * @k: Window size + * @i: Frame type (1 = UIH, 2 = UI) + * @unused: Can not be used + */ struct gsm_config { unsigned int adaption; @@ -19,18 +54,32 @@ struct gsm_config unsigned int mtu; unsigned int k; unsigned int i; - unsigned int unused[8]; /* Can not be used */ + unsigned int unused[8]; }; #define GSMIOC_GETCONF _IOR('G', 0, struct gsm_config) #define GSMIOC_SETCONF _IOW('G', 1, struct gsm_config) +/** + * struct gsm_netconfig - n_gsm network configuration parameters + * + * This structure is used in combination with GSMIOC_ENABLE_NET and + * GSMIOC_DISABLE_NET to enable or disable a network data connection + * over a mux virtual tty channel. This is for modems that support + * data connections with raw IP frames instead of PPP. + * + * @adaption: Adaption to use in network mode. + * @protocol: Protocol to use - only ETH_P_IP supported. + * @unused2: Can not be used. + * @if_name: Interface name format string. + * @unused: Can not be used. + */ struct gsm_netconfig { - unsigned int adaption; /* Adaption to use in network mode */ - unsigned short protocol;/* Protocol to use - only ETH_P_IP supported */ - unsigned short unused2; /* Can not be used */ - char if_name[IFNAMSIZ]; /* interface name format string */ - __u8 unused[28]; /* Can not be used */ + unsigned int adaption; + unsigned short protocol; + unsigned short unused2; + char if_name[IFNAMSIZ]; + __u8 unused[28]; }; #define GSMIOC_ENABLE_NET _IOW('G', 2, struct gsm_netconfig) @@ -39,26 +88,57 @@ struct gsm_netconfig { /* get the base tty number for a configured gsmmux tty */ #define GSMIOC_GETFIRST _IOR('G', 4, __u32) +/** + * struct gsm_config_ext - n_gsm extended configuration parameters + * + * This structure is used in combination with GSMIOC_GETCONF_EXT and + * GSMIOC_SETCONF_EXT to retrieve and set the extended parameters of an + * n_gsm ldisc. + * + * All timers are in units of 1/100th of a second. + * + * @keep_alive: Control channel keep-alive in 1/100th of a second (0 to disable). + * @wait_config: Wait for DLCI config before opening virtual link? + * @flags: Mux specific flags. + * @reserved: For future use, must be initialized to zero. + */ struct gsm_config_ext { - __u32 keep_alive; /* Control channel keep-alive in 1/100th of a - * second (0 to disable) - */ - __u32 wait_config; /* Wait for DLCI config before opening virtual link? */ - __u32 reserved[6]; /* For future use, must be initialized to zero */ + __u32 keep_alive; + __u32 wait_config; + __u32 flags; + __u32 reserved[5]; }; #define GSMIOC_GETCONF_EXT _IOR('G', 5, struct gsm_config_ext) #define GSMIOC_SETCONF_EXT _IOW('G', 6, struct gsm_config_ext) -/* Set channel accordingly before calling GSMIOC_GETCONF_DLCI. */ +/** + * struct gsm_dlci_config - n_gsm channel configuration parameters + * + * This structure is used in combination with GSMIOC_GETCONF_DLCI and + * GSMIOC_SETCONF_DLCI to retrieve and set the channel specific parameters + * of an n_gsm ldisc. + * + * Set the channel accordingly before calling GSMIOC_GETCONF_DLCI. + * + * @channel: DLCI (0 for the associated DLCI). + * @adaption: Convergence layer type. + * @mtu: Maximum transfer unit. + * @priority: Priority (0 for default value). + * @i: Frame type (1 = UIH, 2 = UI). + * @k: Window size (0 for default value). + * @flags: DLCI specific flags. + * @reserved: For future use, must be initialized to zero. + */ struct gsm_dlci_config { - __u32 channel; /* DLCI (0 for the associated DLCI) */ - __u32 adaption; /* Convergence layer type */ - __u32 mtu; /* Maximum transfer unit */ - __u32 priority; /* Priority (0 for default value) */ - __u32 i; /* Frame type (1 = UIH, 2 = UI) */ - __u32 k; /* Window size (0 for default value) */ - __u32 reserved[8]; /* For future use, must be initialized to zero */ + __u32 channel; + __u32 adaption; + __u32 mtu; + __u32 priority; + __u32 i; + __u32 k; + __u32 flags; + __u32 reserved[7]; }; #define GSMIOC_GETCONF_DLCI _IOWR('G', 7, struct gsm_dlci_config) diff --git a/include/uapi/linux/serial_core.h b/include/uapi/linux/serial_core.h index 281fa286555c..add349889d0a 100644 --- a/include/uapi/linux/serial_core.h +++ b/include/uapi/linux/serial_core.h @@ -25,6 +25,8 @@ /* * The type definitions. These are from Ted Ts'o's serial.h + * By historical reasons the values from 0 to 13 are defined + * in the include/uapi/linux/serial.h, do not define them here. */ #define PORT_NS16550A 14 #define PORT_XSCALE 15 @@ -94,15 +96,9 @@ #define PORT_SCIF 53 #define PORT_IRDA 54 -/* Samsung S3C2410 SoC and derivatives thereof */ -#define PORT_S3C2410 55 - /* SGI IP22 aka Indy / Challenge S / Indigo 2 */ #define PORT_IP22ZILOG 56 -/* Sharp LH7a40x -- an ARM9 SoC series */ -#define PORT_LH7A40X 57 - /* PPC CPM type number */ #define PORT_CPM 58 @@ -112,37 +108,23 @@ /* IBM icom */ #define PORT_ICOM 60 -/* Samsung S3C2440 SoC */ -#define PORT_S3C2440 61 - /* Motorola i.MX SoC */ #define PORT_IMX 62 -/* Marvell MPSC (obsolete unused) */ -#define PORT_MPSC 63 - /* TXX9 type number */ #define PORT_TXX9 64 -/* Samsung S3C2400 SoC */ -#define PORT_S3C2400 67 - -/* M32R SIO */ -#define PORT_M32R_SIO 68 - /*Digi jsm */ #define PORT_JSM 69 /* SUN4V Hypervisor Console */ #define PORT_SUNHV 72 -#define PORT_S3C2412 73 - /* Xilinx uartlite */ #define PORT_UARTLITE 74 -/* Blackfin bf5xx */ -#define PORT_BFIN 75 +/* Broadcom BCM7271 UART */ +#define PORT_BCM7271 76 /* Broadcom SB1250, etc. SOC */ #define PORT_SB1250_DUART 77 @@ -150,13 +132,6 @@ /* Freescale ColdFire */ #define PORT_MCF 78 -/* Blackfin SPORT */ -#define PORT_BFIN_SPORT 79 - -/* MN10300 on-chip UART numbers */ -#define PORT_MN10300 80 -#define PORT_MN10300_CTS 81 - #define PORT_SC26XX 82 /* SH-SCI */ @@ -164,9 +139,6 @@ #define PORT_S3C6400 84 -/* NWPSERIAL, now removed */ -#define PORT_NWPSERIAL 85 - /* MAX3100 */ #define PORT_MAX3100 86 @@ -225,13 +197,10 @@ /* ST ASC type numbers */ #define PORT_ASC 105 -/* Tilera TILE-Gx UART */ -#define PORT_TILEGX 106 - /* MEN 16z135 UART */ #define PORT_MEN_Z135 107 -/* SC16IS74xx */ +/* SC16IS7xx */ #define PORT_SC16IS7XX 108 /* MESON */ @@ -243,9 +212,6 @@ /* SPRD SERIAL */ #define PORT_SPRD 111 -/* Cris v10 / v32 SoC */ -#define PORT_CRIS 112 - /* STM32 USART */ #define PORT_STM32 113 diff --git a/include/uapi/linux/sync_file.h b/include/uapi/linux/sync_file.h index 7e42a5b7558b..ff0a931833e2 100644 --- a/include/uapi/linux/sync_file.h +++ b/include/uapi/linux/sync_file.h @@ -56,7 +56,7 @@ struct sync_fence_info { * @name: name of fence * @status: status of fence. 1: signaled 0:active <0:error * @flags: sync_file_info flags - * @num_fences number of fences in the sync_file + * @num_fences: number of fences in the sync_file * @pad: padding for 64-bit alignment, should always be zero * @sync_fence_info: pointer to array of struct &sync_fence_info with all * fences in the sync_file diff --git a/include/uapi/linux/usb/ch11.h b/include/uapi/linux/usb/ch11.h index fb0cd24c392c..ce4c83f2e66a 100644 --- a/include/uapi/linux/usb/ch11.h +++ b/include/uapi/linux/usb/ch11.h @@ -15,10 +15,8 @@ /* This is arbitrary. * From USB 2.0 spec Table 11-13, offset 7, a hub can * have up to 255 ports. The most yet reported is 10. - * - * Current Wireless USB host hardware (Intel i1480 for example) allows - * up to 22 devices to connect. Upcoming hardware might raise that - * limit. Because the arrays need to add a bit for hub status data, we + * Upcoming hardware might raise that limit. + * Because the arrays need to add a bit for hub status data, we * use 31, so plus one evens out to four bytes. */ #define USB_MAXCHILDREN 31 diff --git a/include/uapi/linux/usb/ch9.h b/include/uapi/linux/usb/ch9.h index 62d318377379..8a147abfc680 100644 --- a/include/uapi/linux/usb/ch9.h +++ b/include/uapi/linux/usb/ch9.h @@ -3,7 +3,7 @@ * This file holds USB constants and structures that are needed for * USB device APIs. These are used by the USB device model, which is * defined in chapter 9 of the USB 2.0 specification and in the - * Wireless USB 1.0 (spread around). Linux has several APIs in C that + * Wireless USB 1.0 spec (now defunct). Linux has several APIs in C that * need these: * * - the master/host side Linux-USB kernel driver API; @@ -14,9 +14,6 @@ * act either as a USB master/host or as a USB slave/device. That means * the master and slave side APIs benefit from working well together. * - * There's also "Wireless USB", using low power short range radios for - * peripheral interconnection but otherwise building on the USB framework. - * * Note all descriptors are declared '__attribute__((packed))' so that: * * [a] they never get padded, either internally (USB spec writers diff --git a/kernel/debug/debug_core.c b/kernel/debug/debug_core.c index d5e9ccde3ab8..621037a0aa87 100644 --- a/kernel/debug/debug_core.c +++ b/kernel/debug/debug_core.c @@ -968,7 +968,7 @@ static int __init opt_kgdb_con(char *str) early_param("kgdbcon", opt_kgdb_con); #ifdef CONFIG_MAGIC_SYSRQ -static void sysrq_handle_dbg(int key) +static void sysrq_handle_dbg(u8 key) { if (!dbg_io_ops) { pr_crit("ERROR: No KGDB I/O module available\n"); diff --git a/kernel/power/poweroff.c b/kernel/power/poweroff.c index 562aa0e450ed..1f306f158696 100644 --- a/kernel/power/poweroff.c +++ b/kernel/power/poweroff.c @@ -23,7 +23,7 @@ static void do_poweroff(struct work_struct *dummy) static DECLARE_WORK(poweroff_work, do_poweroff); -static void handle_poweroff(int key) +static void handle_poweroff(u8 key) { /* run sysrq poweroff on boot cpu */ schedule_work_on(cpumask_first(cpu_online_mask), &poweroff_work); diff --git a/kernel/rcu/tree_stall.h b/kernel/rcu/tree_stall.h index b10b8349bb2a..6f06dc12904a 100644 --- a/kernel/rcu/tree_stall.h +++ b/kernel/rcu/tree_stall.h @@ -1035,7 +1035,7 @@ static bool sysrq_rcu; module_param(sysrq_rcu, bool, 0444); /* Dump grace-period-request information due to commandeered sysrq. */ -static void sysrq_show_rcu(int key) +static void sysrq_show_rcu(u8 key) { show_rcu_gp_kthreads(); } diff --git a/lib/dynamic_debug.c b/lib/dynamic_debug.c index fdd6d9800a70..6fba6423cc10 100644 --- a/lib/dynamic_debug.c +++ b/lib/dynamic_debug.c @@ -88,10 +88,11 @@ static inline const char *trim_prefix(const char *path) return path + skip; } -static struct { unsigned flag:8; char opt_char; } opt_array[] = { +static const struct { unsigned flag:8; char opt_char; } opt_array[] = { { _DPRINTK_FLAGS_PRINT, 'p' }, { _DPRINTK_FLAGS_INCL_MODNAME, 'm' }, { _DPRINTK_FLAGS_INCL_FUNCNAME, 'f' }, + { _DPRINTK_FLAGS_INCL_SOURCENAME, 's' }, { _DPRINTK_FLAGS_INCL_LINENO, 'l' }, { _DPRINTK_FLAGS_INCL_TID, 't' }, { _DPRINTK_FLAGS_NONE, '_' }, @@ -808,7 +809,7 @@ const struct kernel_param_ops param_ops_dyndbg_classes = { }; EXPORT_SYMBOL(param_ops_dyndbg_classes); -#define PREFIX_SIZE 64 +#define PREFIX_SIZE 128 static int remaining(int wrote) { @@ -836,6 +837,9 @@ static char *__dynamic_emit_prefix(const struct _ddebug *desc, char *buf) if (desc->flags & _DPRINTK_FLAGS_INCL_FUNCNAME) pos += snprintf(buf + pos, remaining(pos), "%s:", desc->function); + if (desc->flags & _DPRINTK_FLAGS_INCL_SOURCENAME) + pos += snprintf(buf + pos, remaining(pos), "%s:", + trim_prefix(desc->filename)); if (desc->flags & _DPRINTK_FLAGS_INCL_LINENO) pos += snprintf(buf + pos, remaining(pos), "%d:", desc->lineno); diff --git a/lib/kobject.c b/lib/kobject.c index 16d530f9c174..59dbcbdb1c91 100644 --- a/lib/kobject.c +++ b/lib/kobject.c @@ -56,6 +56,14 @@ void kobject_get_ownership(const struct kobject *kobj, kuid_t *uid, kgid_t *gid) kobj->ktype->get_ownership(kobj, uid, gid); } +static bool kobj_ns_type_is_valid(enum kobj_ns_type type) +{ + if ((type <= KOBJ_NS_TYPE_NONE) || (type >= KOBJ_NS_TYPES)) + return false; + + return true; +} + static int create_dir(struct kobject *kobj) { const struct kobj_type *ktype = get_ktype(kobj); @@ -66,12 +74,10 @@ static int create_dir(struct kobject *kobj) if (error) return error; - if (ktype) { - error = sysfs_create_groups(kobj, ktype->default_groups); - if (error) { - sysfs_remove_dir(kobj); - return error; - } + error = sysfs_create_groups(kobj, ktype->default_groups); + if (error) { + sysfs_remove_dir(kobj); + return error; } /* @@ -86,8 +92,7 @@ static int create_dir(struct kobject *kobj) */ ops = kobj_child_ns_ops(kobj); if (ops) { - BUG_ON(ops->type <= KOBJ_NS_TYPE_NONE); - BUG_ON(ops->type >= KOBJ_NS_TYPES); + BUG_ON(!kobj_ns_type_is_valid(ops->type)); BUG_ON(!kobj_ns_type_registered(ops->type)); sysfs_enable_ns(kobj->sd); @@ -584,8 +589,7 @@ static void __kobject_del(struct kobject *kobj) sd = kobj->sd; ktype = get_ktype(kobj); - if (ktype) - sysfs_remove_groups(kobj, ktype->default_groups); + sysfs_remove_groups(kobj, ktype->default_groups); /* send "remove" if the caller did not do it but sent "add" */ if (kobj->state_add_uevent_sent && !kobj->state_remove_uevent_sent) { @@ -662,10 +666,6 @@ static void kobject_cleanup(struct kobject *kobj) pr_debug("'%s' (%p): %s, parent %p\n", kobject_name(kobj), kobj, __func__, kobj->parent); - if (t && !t->release) - pr_debug("'%s' (%p): does not have a release() function, it is broken and must be fixed. See Documentation/core-api/kobject.rst.\n", - kobject_name(kobj), kobj); - /* remove from sysfs if the caller did not do it */ if (kobj->state_in_sysfs) { pr_debug("'%s' (%p): auto cleanup kobject_del\n", @@ -676,10 +676,13 @@ static void kobject_cleanup(struct kobject *kobj) parent = NULL; } - if (t && t->release) { + if (t->release) { pr_debug("'%s' (%p): calling ktype release\n", kobject_name(kobj), kobj); t->release(kobj); + } else { + pr_debug("'%s' (%p): does not have a release() function, it is broken and must be fixed. See Documentation/core-api/kobject.rst.\n", + kobject_name(kobj), kobj); } /* free name if we allocated it */ @@ -854,6 +857,11 @@ int kset_register(struct kset *k) if (!k) return -EINVAL; + if (!k->kobj.ktype) { + pr_err("must have a ktype to be initialized properly!\n"); + return -EINVAL; + } + kset_init(k); err = kobject_add_internal(&k->kobj); if (err) { @@ -1017,11 +1025,7 @@ int kobj_ns_type_register(const struct kobj_ns_type_operations *ops) spin_lock(&kobj_ns_type_lock); error = -EINVAL; - if (type >= KOBJ_NS_TYPES) - goto out; - - error = -EINVAL; - if (type <= KOBJ_NS_TYPE_NONE) + if (!kobj_ns_type_is_valid(type)) goto out; error = -EBUSY; @@ -1041,7 +1045,7 @@ int kobj_ns_type_registered(enum kobj_ns_type type) int registered = 0; spin_lock(&kobj_ns_type_lock); - if ((type > KOBJ_NS_TYPE_NONE) && (type < KOBJ_NS_TYPES)) + if (kobj_ns_type_is_valid(type)) registered = kobj_ns_ops_tbl[type] != NULL; spin_unlock(&kobj_ns_type_lock); @@ -1052,7 +1056,7 @@ const struct kobj_ns_type_operations *kobj_child_ns_ops(const struct kobject *pa { const struct kobj_ns_type_operations *ops = NULL; - if (parent && parent->ktype && parent->ktype->child_ns_type) + if (parent && parent->ktype->child_ns_type) ops = parent->ktype->child_ns_type(parent); return ops; @@ -1068,8 +1072,7 @@ bool kobj_ns_current_may_mount(enum kobj_ns_type type) bool may_mount = true; spin_lock(&kobj_ns_type_lock); - if ((type > KOBJ_NS_TYPE_NONE) && (type < KOBJ_NS_TYPES) && - kobj_ns_ops_tbl[type]) + if (kobj_ns_type_is_valid(type) && kobj_ns_ops_tbl[type]) may_mount = kobj_ns_ops_tbl[type]->current_may_mount(); spin_unlock(&kobj_ns_type_lock); @@ -1081,8 +1084,7 @@ void *kobj_ns_grab_current(enum kobj_ns_type type) void *ns = NULL; spin_lock(&kobj_ns_type_lock); - if ((type > KOBJ_NS_TYPE_NONE) && (type < KOBJ_NS_TYPES) && - kobj_ns_ops_tbl[type]) + if (kobj_ns_type_is_valid(type) && kobj_ns_ops_tbl[type]) ns = kobj_ns_ops_tbl[type]->grab_current_ns(); spin_unlock(&kobj_ns_type_lock); @@ -1095,8 +1097,7 @@ const void *kobj_ns_netlink(enum kobj_ns_type type, struct sock *sk) const void *ns = NULL; spin_lock(&kobj_ns_type_lock); - if ((type > KOBJ_NS_TYPE_NONE) && (type < KOBJ_NS_TYPES) && - kobj_ns_ops_tbl[type]) + if (kobj_ns_type_is_valid(type) && kobj_ns_ops_tbl[type]) ns = kobj_ns_ops_tbl[type]->netlink_ns(sk); spin_unlock(&kobj_ns_type_lock); @@ -1108,8 +1109,7 @@ const void *kobj_ns_initial(enum kobj_ns_type type) const void *ns = NULL; spin_lock(&kobj_ns_type_lock); - if ((type > KOBJ_NS_TYPE_NONE) && (type < KOBJ_NS_TYPES) && - kobj_ns_ops_tbl[type]) + if (kobj_ns_type_is_valid(type) && kobj_ns_ops_tbl[type]) ns = kobj_ns_ops_tbl[type]->initial_ns(); spin_unlock(&kobj_ns_type_lock); @@ -1119,7 +1119,7 @@ const void *kobj_ns_initial(enum kobj_ns_type type) void kobj_ns_drop(enum kobj_ns_type type, void *ns) { spin_lock(&kobj_ns_type_lock); - if ((type > KOBJ_NS_TYPE_NONE) && (type < KOBJ_NS_TYPES) && + if (kobj_ns_type_is_valid(type) && kobj_ns_ops_tbl[type] && kobj_ns_ops_tbl[type]->drop_ns) kobj_ns_ops_tbl[type]->drop_ns(ns); spin_unlock(&kobj_ns_type_lock); diff --git a/net/bluetooth/rfcomm/tty.c b/net/bluetooth/rfcomm/tty.c index 5697df9d4394..94ec913dfb76 100644 --- a/net/bluetooth/rfcomm/tty.c +++ b/net/bluetooth/rfcomm/tty.c @@ -771,7 +771,7 @@ static int rfcomm_tty_open(struct tty_struct *tty, struct file *filp) static void rfcomm_tty_close(struct tty_struct *tty, struct file *filp) { - struct rfcomm_dev *dev = (struct rfcomm_dev *) tty->driver_data; + struct rfcomm_dev *dev = tty->driver_data; BT_DBG("tty %p dev %p dlc %p opened %d", tty, dev, dev->dlc, dev->port.count); @@ -779,17 +779,18 @@ static void rfcomm_tty_close(struct tty_struct *tty, struct file *filp) tty_port_close(&dev->port, tty, filp); } -static int rfcomm_tty_write(struct tty_struct *tty, const unsigned char *buf, int count) +static ssize_t rfcomm_tty_write(struct tty_struct *tty, const u8 *buf, + size_t count) { - struct rfcomm_dev *dev = (struct rfcomm_dev *) tty->driver_data; + struct rfcomm_dev *dev = tty->driver_data; struct rfcomm_dlc *dlc = dev->dlc; struct sk_buff *skb; - int sent = 0, size; + size_t sent = 0, size; - BT_DBG("tty %p count %d", tty, count); + BT_DBG("tty %p count %zu", tty, count); while (count) { - size = min_t(uint, count, dlc->mtu); + size = min_t(size_t, count, dlc->mtu); skb = rfcomm_wmalloc(dev, size + RFCOMM_SKB_RESERVE, GFP_ATOMIC); if (!skb) @@ -810,7 +811,7 @@ static int rfcomm_tty_write(struct tty_struct *tty, const unsigned char *buf, in static unsigned int rfcomm_tty_write_room(struct tty_struct *tty) { - struct rfcomm_dev *dev = (struct rfcomm_dev *) tty->driver_data; + struct rfcomm_dev *dev = tty->driver_data; int room = 0; if (dev && dev->dlc) @@ -864,7 +865,7 @@ static void rfcomm_tty_set_termios(struct tty_struct *tty, u8 baud, data_bits, stop_bits, parity, x_on, x_off; u16 changes = 0; - struct rfcomm_dev *dev = (struct rfcomm_dev *) tty->driver_data; + struct rfcomm_dev *dev = tty->driver_data; BT_DBG("tty %p termios %p", tty, old); @@ -996,7 +997,7 @@ static void rfcomm_tty_set_termios(struct tty_struct *tty, static void rfcomm_tty_throttle(struct tty_struct *tty) { - struct rfcomm_dev *dev = (struct rfcomm_dev *) tty->driver_data; + struct rfcomm_dev *dev = tty->driver_data; BT_DBG("tty %p dev %p", tty, dev); @@ -1005,7 +1006,7 @@ static void rfcomm_tty_throttle(struct tty_struct *tty) static void rfcomm_tty_unthrottle(struct tty_struct *tty) { - struct rfcomm_dev *dev = (struct rfcomm_dev *) tty->driver_data; + struct rfcomm_dev *dev = tty->driver_data; BT_DBG("tty %p dev %p", tty, dev); @@ -1014,7 +1015,7 @@ static void rfcomm_tty_unthrottle(struct tty_struct *tty) static unsigned int rfcomm_tty_chars_in_buffer(struct tty_struct *tty) { - struct rfcomm_dev *dev = (struct rfcomm_dev *) tty->driver_data; + struct rfcomm_dev *dev = tty->driver_data; BT_DBG("tty %p dev %p", tty, dev); @@ -1029,7 +1030,7 @@ static unsigned int rfcomm_tty_chars_in_buffer(struct tty_struct *tty) static void rfcomm_tty_flush_buffer(struct tty_struct *tty) { - struct rfcomm_dev *dev = (struct rfcomm_dev *) tty->driver_data; + struct rfcomm_dev *dev = tty->driver_data; BT_DBG("tty %p dev %p", tty, dev); @@ -1052,7 +1053,7 @@ static void rfcomm_tty_wait_until_sent(struct tty_struct *tty, int timeout) static void rfcomm_tty_hangup(struct tty_struct *tty) { - struct rfcomm_dev *dev = (struct rfcomm_dev *) tty->driver_data; + struct rfcomm_dev *dev = tty->driver_data; BT_DBG("tty %p dev %p", tty, dev); @@ -1061,7 +1062,7 @@ static void rfcomm_tty_hangup(struct tty_struct *tty) static int rfcomm_tty_tiocmget(struct tty_struct *tty) { - struct rfcomm_dev *dev = (struct rfcomm_dev *) tty->driver_data; + struct rfcomm_dev *dev = tty->driver_data; BT_DBG("tty %p dev %p", tty, dev); @@ -1070,7 +1071,7 @@ static int rfcomm_tty_tiocmget(struct tty_struct *tty) static int rfcomm_tty_tiocmset(struct tty_struct *tty, unsigned int set, unsigned int clear) { - struct rfcomm_dev *dev = (struct rfcomm_dev *) tty->driver_data; + struct rfcomm_dev *dev = tty->driver_data; struct rfcomm_dlc *dlc = dev->dlc; u8 v24_sig; diff --git a/net/nfc/nci/uart.c b/net/nfc/nci/uart.c index cc8fa9e36159..ed1508a9e093 100644 --- a/net/nfc/nci/uart.c +++ b/net/nfc/nci/uart.c @@ -172,7 +172,7 @@ static int nci_uart_tty_open(struct tty_struct *tty) */ static void nci_uart_tty_close(struct tty_struct *tty) { - struct nci_uart *nu = (void *)tty->disc_data; + struct nci_uart *nu = tty->disc_data; /* Detach from the tty */ tty->disc_data = NULL; @@ -204,7 +204,7 @@ static void nci_uart_tty_close(struct tty_struct *tty) */ static void nci_uart_tty_wakeup(struct tty_struct *tty) { - struct nci_uart *nu = (void *)tty->disc_data; + struct nci_uart *nu = tty->disc_data; if (!nu) return; @@ -296,9 +296,9 @@ static int nci_uart_default_recv_buf(struct nci_uart *nu, const u8 *data, * Return Value: None */ static void nci_uart_tty_receive(struct tty_struct *tty, const u8 *data, - const char *flags, int count) + const u8 *flags, size_t count) { - struct nci_uart *nu = (void *)tty->disc_data; + struct nci_uart *nu = tty->disc_data; if (!nu || tty != nu->tty) return; @@ -325,7 +325,7 @@ static void nci_uart_tty_receive(struct tty_struct *tty, const u8 *data, static int nci_uart_tty_ioctl(struct tty_struct *tty, unsigned int cmd, unsigned long arg) { - struct nci_uart *nu = (void *)tty->disc_data; + struct nci_uart *nu = tty->disc_data; int err = 0; switch (cmd) { @@ -345,20 +345,14 @@ static int nci_uart_tty_ioctl(struct tty_struct *tty, unsigned int cmd, /* We don't provide read/write/poll interface for user space. */ static ssize_t nci_uart_tty_read(struct tty_struct *tty, struct file *file, - unsigned char *buf, size_t nr, - void **cookie, unsigned long offset) + u8 *buf, size_t nr, void **cookie, + unsigned long offset) { return 0; } static ssize_t nci_uart_tty_write(struct tty_struct *tty, struct file *file, - const unsigned char *data, size_t count) -{ - return 0; -} - -static __poll_t nci_uart_tty_poll(struct tty_struct *tty, - struct file *filp, poll_table *wait) + const u8 *data, size_t count) { return 0; } @@ -435,7 +429,6 @@ static struct tty_ldisc_ops nci_uart_ldisc = { .close = nci_uart_tty_close, .read = nci_uart_tty_read, .write = nci_uart_tty_write, - .poll = nci_uart_tty_poll, .receive_buf = nci_uart_tty_receive, .write_wakeup = nci_uart_tty_wakeup, .ioctl = nci_uart_tty_ioctl, diff --git a/sound/soc/codecs/cx20442.c b/sound/soc/codecs/cx20442.c index 43c0cac0ec9e..9d54141a0cd1 100644 --- a/sound/soc/codecs/cx20442.c +++ b/sound/soc/codecs/cx20442.c @@ -258,8 +258,8 @@ static void v253_hangup(struct tty_struct *tty) } /* Line discipline .receive_buf() */ -static void v253_receive(struct tty_struct *tty, const unsigned char *cp, - const char *fp, int count) +static void v253_receive(struct tty_struct *tty, const u8 *cp, const u8 *fp, + size_t count) { struct snd_soc_component *component = tty->disc_data; struct cx20442_priv *cx20442; diff --git a/sound/soc/ti/ams-delta.c b/sound/soc/ti/ams-delta.c index 1028b5efcfff..371943350fdf 100644 --- a/sound/soc/ti/ams-delta.c +++ b/sound/soc/ti/ams-delta.c @@ -336,7 +336,7 @@ static void cx81801_hangup(struct tty_struct *tty) } /* Line discipline .receive_buf() */ -static void cx81801_receive(struct tty_struct *tty, const unsigned char *cp, +static void cx81801_receive(struct tty_struct *tty, const u8 *cp, const char *fp, int count) { struct snd_soc_component *component = tty->disc_data; diff --git a/tools/iio/iio_generic_buffer.c b/tools/iio/iio_generic_buffer.c index f8deae4e26a1..44bbf80f0cfd 100644 --- a/tools/iio/iio_generic_buffer.c +++ b/tools/iio/iio_generic_buffer.c @@ -51,9 +51,9 @@ enum autochan { * Has the side effect of filling the channels[i].location values used * in processing the buffer output. **/ -static int size_from_channelarray(struct iio_channel_info *channels, int num_channels) +static unsigned int size_from_channelarray(struct iio_channel_info *channels, int num_channels) { - int bytes = 0; + unsigned int bytes = 0; int i = 0; while (i < num_channels) { @@ -348,7 +348,7 @@ int main(int argc, char **argv) ssize_t read_size; int dev_num = -1, trig_num = -1; char *buffer_access = NULL; - int scan_size; + unsigned int scan_size; int noevents = 0; int notrigger = 0; char *dummy; @@ -674,7 +674,16 @@ int main(int argc, char **argv) } scan_size = size_from_channelarray(channels, num_channels); - data = malloc(scan_size * buf_len); + + size_t total_buf_len = scan_size * buf_len; + + if (scan_size > 0 && total_buf_len / scan_size != buf_len) { + ret = -EFAULT; + perror("Integer overflow happened when calculate scan_size * buf_len"); + goto error; + } + + data = malloc(total_buf_len); if (!data) { ret = -ENOMEM; goto error;