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[POWERPC] Remove APUS support from arch/ppc

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Current status of APUS:
- arch/powerpc/: removed in 2.6.23
- arch/ppc/: marked BROKEN since 2 years

This therefore removes the remaining parts of APUS support from
arch/ppc, include/asm-ppc, arch/powerpc and include/asm-powerpc.

Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This commit is contained in:
Adrian Bunk
2007-08-27 23:29:53 +02:00
committed by Paul Mackerras
parent 8237bf080e
commit e6b6e3ffb9
32 changed files with 12 additions and 4364 deletions
Download Patch File Download Diff File Expand all files Collapse all files
include/asm-ppc/amigahw.h
-16
View File
@@ -1,16 +0,0 @@
#ifdef __KERNEL__
#ifndef __ASMPPC_AMIGAHW_H
#define __ASMPPC_AMIGAHW_H
#include <asm-m68k/amigahw.h>
#undef CHIP_PHYSADDR
#ifdef CONFIG_APUS_FAST_EXCEPT
#define CHIP_PHYSADDR (0x000000)
#else
#define CHIP_PHYSADDR (0x004000)
#endif
#endif /* __ASMPPC_AMIGAHW_H */
#endif /* __KERNEL__ */
include/asm-ppc/amigaints.h
-133
View File
@@ -1,133 +0,0 @@
/*
** amigaints.h -- Amiga Linux interrupt handling structs and prototypes
**
** Copyright 1992 by Greg Harp
**
** This file is subject to the terms and conditions of the GNU General Public
** License. See the file COPYING in the main directory of this archive
** for more details.
**
** Created 10/2/92 by Greg Harp
*/
#ifdef __KERNEL__
#ifndef _ASMm68k_AMIGAINTS_H_
#define _ASMm68k_AMIGAINTS_H_
/*
** Amiga Interrupt sources.
**
*/
#define AUTO_IRQS (8)
#define AMI_STD_IRQS (14)
#define CIA_IRQS (5)
#define AMI_IRQS (32) /* AUTO_IRQS+AMI_STD_IRQS+2*CIA_IRQS */
/* vertical blanking interrupt */
#define IRQ_AMIGA_VERTB 0
/* copper interrupt */
#define IRQ_AMIGA_COPPER 1
/* Audio interrupts */
#define IRQ_AMIGA_AUD0 2
#define IRQ_AMIGA_AUD1 3
#define IRQ_AMIGA_AUD2 4
#define IRQ_AMIGA_AUD3 5
/* Blitter done interrupt */
#define IRQ_AMIGA_BLIT 6
/* floppy disk interrupts */
#define IRQ_AMIGA_DSKSYN 7
#define IRQ_AMIGA_DSKBLK 8
/* builtin serial port interrupts */
#define IRQ_AMIGA_RBF 9
#define IRQ_AMIGA_TBE 10
/* software interrupts */
#define IRQ_AMIGA_SOFT 11
/* interrupts from external hardware */
#define IRQ_AMIGA_PORTS 12
#define IRQ_AMIGA_EXTER 13
/* CIA interrupt sources */
#define IRQ_AMIGA_CIAA 14
#define IRQ_AMIGA_CIAA_TA 14
#define IRQ_AMIGA_CIAA_TB 15
#define IRQ_AMIGA_CIAA_ALRM 16
#define IRQ_AMIGA_CIAA_SP 17
#define IRQ_AMIGA_CIAA_FLG 18
#define IRQ_AMIGA_CIAB 19
#define IRQ_AMIGA_CIAB_TA 19
#define IRQ_AMIGA_CIAB_TB 20
#define IRQ_AMIGA_CIAB_ALRM 21
#define IRQ_AMIGA_CIAB_SP 22
#define IRQ_AMIGA_CIAB_FLG 23
/* auto-vector interrupts */
#define IRQ_AMIGA_AUTO 24
#define IRQ_AMIGA_AUTO_0 24 /* This is just a dummy */
#define IRQ_AMIGA_AUTO_1 25
#define IRQ_AMIGA_AUTO_2 26
#define IRQ_AMIGA_AUTO_3 27
#define IRQ_AMIGA_AUTO_4 28
#define IRQ_AMIGA_AUTO_5 29
#define IRQ_AMIGA_AUTO_6 30
#define IRQ_AMIGA_AUTO_7 31
#define IRQ_FLOPPY IRQ_AMIGA_DSKBLK
/* INTREQR masks */
#define IRQ1_MASK 0x0007 /* INTREQR mask for IRQ 1 */
#define IRQ2_MASK 0x0008 /* INTREQR mask for IRQ 2 */
#define IRQ3_MASK 0x0070 /* INTREQR mask for IRQ 3 */
#define IRQ4_MASK 0x0780 /* INTREQR mask for IRQ 4 */
#define IRQ5_MASK 0x1800 /* INTREQR mask for IRQ 5 */
#define IRQ6_MASK 0x2000 /* INTREQR mask for IRQ 6 */
#define IRQ7_MASK 0x4000 /* INTREQR mask for IRQ 7 */
#define IF_SETCLR 0x8000 /* set/clr bit */
#define IF_INTEN 0x4000 /* master interrupt bit in INT* registers */
#define IF_EXTER 0x2000 /* external level 6 and CIA B interrupt */
#define IF_DSKSYN 0x1000 /* disk sync interrupt */
#define IF_RBF 0x0800 /* serial receive buffer full interrupt */
#define IF_AUD3 0x0400 /* audio channel 3 done interrupt */
#define IF_AUD2 0x0200 /* audio channel 2 done interrupt */
#define IF_AUD1 0x0100 /* audio channel 1 done interrupt */
#define IF_AUD0 0x0080 /* audio channel 0 done interrupt */
#define IF_BLIT 0x0040 /* blitter done interrupt */
#define IF_VERTB 0x0020 /* vertical blanking interrupt */
#define IF_COPER 0x0010 /* copper interrupt */
#define IF_PORTS 0x0008 /* external level 2 and CIA A interrupt */
#define IF_SOFT 0x0004 /* software initiated interrupt */
#define IF_DSKBLK 0x0002 /* diskblock DMA finished */
#define IF_TBE 0x0001 /* serial transmit buffer empty interrupt */
extern void amiga_do_irq(int irq, struct pt_regs *fp);
extern void amiga_do_irq_list(int irq, struct pt_regs *fp);
/* CIA interrupt control register bits */
#define CIA_ICR_TA 0x01
#define CIA_ICR_TB 0x02
#define CIA_ICR_ALRM 0x04
#define CIA_ICR_SP 0x08
#define CIA_ICR_FLG 0x10
#define CIA_ICR_ALL 0x1f
#define CIA_ICR_SETCLR 0x80
/* to access the interrupt control registers of CIA's use only
** these functions, they behave exactly like the amiga os routines
*/
extern struct ciabase ciaa_base, ciab_base;
extern unsigned char cia_set_irq(unsigned int irq, int set);
extern unsigned char cia_able_irq(unsigned int irq, int enable);
#endif /* asm-m68k/amigaints.h */
#endif /* __KERNEL__ */
include/asm-ppc/amigappc.h
-85
View File
@@ -1,85 +0,0 @@
/*
** asm-ppc/amigappc.h -- This header defines some values and pointers for
** the Phase 5 PowerUp card.
**
** Copyright 1997, 1998 by Phase5, Germany.
**
** This file is subject to the terms and conditions of the GNU General Public
** License. See the file COPYING in the main directory of this archive
** for more details.
**
** Created: 7/22/97 by Jesper Skov
*/
#ifdef __KERNEL__
#ifndef _M68K_AMIGAPPC_H
#define _M68K_AMIGAPPC_H
#ifndef __ASSEMBLY__
/* #include <asm/system.h> */
#define mb() __asm__ __volatile__ ("sync" : : : "memory")
#define APUS_WRITE(_a_, _v_) \
do { \
(*((volatile unsigned char *)(_a_)) = (_v_)); \
mb(); \
} while (0)
#define APUS_READ(_a_, _v_) \
do { \
(_v_) = (*((volatile unsigned char *)(_a_))); \
mb(); \
} while (0)
#endif /* ndef __ASSEMBLY__ */
/* Maybe add a [#ifdef WANT_ZTWOBASE] condition to amigahw.h? */
#define zTwoBase (0x80000000)
#define APUS_IPL_BASE (zTwoBase + 0x00f60000)
#define APUS_REG_RESET (APUS_IPL_BASE + 0x00)
#define APUS_REG_WAITSTATE (APUS_IPL_BASE + 0x10)
#define APUS_REG_SHADOW (APUS_IPL_BASE + 0x18)
#define APUS_REG_LOCK (APUS_IPL_BASE + 0x20)
#define APUS_REG_INT (APUS_IPL_BASE + 0x28)
#define APUS_IPL_EMU (APUS_IPL_BASE + 0x30)
#define APUS_INT_LVL (APUS_IPL_BASE + 0x38)
#define REGSHADOW_SETRESET (0x80)
#define REGSHADOW_SELFRESET (0x40)
#define REGLOCK_SETRESET (0x80)
#define REGLOCK_BLACKMAGICK1 (0x40)
#define REGLOCK_BLACKMAGICK2 (0x20)
#define REGLOCK_BLACKMAGICK3 (0x10)
#define REGWAITSTATE_SETRESET (0x80)
#define REGWAITSTATE_PPCW (0x08)
#define REGWAITSTATE_PPCR (0x04)
#define REGRESET_SETRESET (0x80)
#define REGRESET_PPCRESET (0x10)
#define REGRESET_M68KRESET (0x08)
#define REGRESET_AMIGARESET (0x04)
#define REGRESET_AUXRESET (0x02)
#define REGRESET_SCSIRESET (0x01)
#define REGINT_SETRESET (0x80)
#define REGINT_ENABLEIPL (0x02)
#define REGINT_INTMASTER (0x01)
#define IPLEMU_SETRESET (0x80)
#define IPLEMU_DISABLEINT (0x40)
#define IPLEMU_IPL2 (0x20)
#define IPLEMU_IPL1 (0x10)
#define IPLEMU_IPL0 (0x08)
#define IPLEMU_PPCIPL2 (0x04)
#define IPLEMU_PPCIPL1 (0x02)
#define IPLEMU_PPCIPL0 (0x01)
#define IPLEMU_IPLMASK (IPLEMU_PPCIPL2|IPLEMU_PPCIPL1|IPLEMU_PPCIPL0)
#define INTLVL_SETRESET (0x80)
#define INTLVL_MASK (0x7f)
#endif /* _M68k_AMIGAPPC_H */
#endif /* __KERNEL__ */
include/asm-ppc/bootinfo.h
-5
View File
@@ -11,10 +11,6 @@
#include <asm/page.h>
#if defined(CONFIG_APUS) && !defined(__BOOTER__)
#include <asm-m68k/bootinfo.h>
#else
struct bi_record {
unsigned long tag; /* tag ID */
unsigned long size; /* size of record (in bytes) */
@@ -44,7 +40,6 @@ bootinfo_addr(unsigned long offset)
return (struct bi_record *)_ALIGN((offset) + (1 << 20) - 1,
(1 << 20));
}
#endif /* CONFIG_APUS */
#endif /* _PPC_BOOTINFO_H */
include/asm-ppc/io.h
+4 -44
View File
@@ -30,7 +30,7 @@
#include <asm/mpc8xx.h>
#elif defined(CONFIG_8260)
#include <asm/mpc8260.h>
#elif defined(CONFIG_APUS) || !defined(CONFIG_PCI)
#elif !defined(CONFIG_PCI)
#define _IO_BASE 0
#define _ISA_MEM_BASE 0
#define PCI_DRAM_OFFSET 0
@@ -145,24 +145,7 @@ static inline void writeb(__u8 b, volatile void __iomem *addr)
}
#endif
#if defined(CONFIG_APUS)
static inline __u16 readw(const volatile void __iomem *addr)
{
return *(__force volatile __u16 *)(addr);
}
static inline __u32 readl(const volatile void __iomem *addr)
{
return *(__force volatile __u32 *)(addr);
}
static inline void writew(__u16 b, volatile void __iomem *addr)
{
*(__force volatile __u16 *)(addr) = b;
}
static inline void writel(__u32 b, volatile void __iomem *addr)
{
*(__force volatile __u32 *)(addr) = b;
}
#elif defined (CONFIG_8260_PCI9)
#if defined (CONFIG_8260_PCI9)
/* Use macros if PCI9 workaround enabled */
#define readw(addr) in_le16((volatile u16 *)(addr))
#define readl(addr) in_le32((volatile u32 *)(addr))
@@ -185,7 +168,7 @@ static inline void writel(__u32 b, volatile void __iomem *addr)
{
out_le32(addr, b);
}
#endif /* CONFIG_APUS */
#endif /* CONFIG_8260_PCI9 */
#define readb_relaxed(addr) readb(addr)
#define readw_relaxed(addr) readw(addr)
@@ -300,13 +283,7 @@ extern __inline__ void name(unsigned int val, unsigned int port) \
}
__do_out_asm(outb, "stbx")
#ifdef CONFIG_APUS
__do_in_asm(inb, "lbzx")
__do_in_asm(inw, "lhz%U1%X1")
__do_in_asm(inl, "lwz%U1%X1")
__do_out_asm(outl,"stw%U0%X0")
__do_out_asm(outw, "sth%U0%X0")
#elif defined (CONFIG_8260_PCI9)
#if defined (CONFIG_8260_PCI9)
/* in asm cannot be defined if PCI9 workaround is used */
#define inb(port) in_8((port)+___IO_BASE)
#define inw(port) in_le16((port)+___IO_BASE)
@@ -371,7 +348,6 @@ extern void __iomem *ioremap64(unsigned long long address, unsigned long size);
#define ioremap_nocache(addr, size) ioremap((addr), (size))
extern void iounmap(volatile void __iomem *addr);
extern unsigned long iopa(unsigned long addr);
extern unsigned long mm_ptov(unsigned long addr) __attribute_const__;
extern void io_block_mapping(unsigned long virt, phys_addr_t phys,
unsigned int size, int flags);
@@ -384,24 +360,16 @@ extern void io_block_mapping(unsigned long virt, phys_addr_t phys,
*/
extern inline unsigned long virt_to_bus(volatile void * address)
{
#ifndef CONFIG_APUS
if (address == (void *)0)
return 0;
return (unsigned long)address - KERNELBASE + PCI_DRAM_OFFSET;
#else
return iopa ((unsigned long) address);
#endif
}
extern inline void * bus_to_virt(unsigned long address)
{
#ifndef CONFIG_APUS
if (address == 0)
return NULL;
return (void *)(address - PCI_DRAM_OFFSET + KERNELBASE);
#else
return (void*) mm_ptov (address);
#endif
}
/*
@@ -410,20 +378,12 @@ extern inline void * bus_to_virt(unsigned long address)
*/
extern inline unsigned long virt_to_phys(volatile void * address)
{
#ifndef CONFIG_APUS
return (unsigned long) address - KERNELBASE;
#else
return iopa ((unsigned long) address);
#endif
}
extern inline void * phys_to_virt(unsigned long address)
{
#ifndef CONFIG_APUS
return (void *) (address + KERNELBASE);
#else
return (void*) mm_ptov (address);
#endif
}
/*
include/asm-ppc/machdep.h
-4
View File
@@ -8,10 +8,6 @@
#include <asm/setup.h>
#include <asm/page.h>
#ifdef CONFIG_APUS
#include <asm-m68k/machdep.h>
#endif
struct pt_regs;
struct pci_bus;
struct pci_dev;
include/asm-ppc/page.h
+2 -42
View File
@@ -97,62 +97,22 @@ extern void clear_user_page(void *page, unsigned long vaddr, struct page *pg);
extern void copy_user_page(void *to, void *from, unsigned long vaddr,
struct page *pg);
#ifndef CONFIG_APUS
#define PPC_MEMSTART 0
#define PPC_PGSTART 0
#define PPC_MEMOFFSET PAGE_OFFSET
#else
extern unsigned long ppc_memstart;
extern unsigned long ppc_pgstart;
extern unsigned long ppc_memoffset;
#define PPC_MEMSTART ppc_memstart
#define PPC_PGSTART ppc_pgstart
#define PPC_MEMOFFSET ppc_memoffset
#endif
#if defined(CONFIG_APUS) && !defined(MODULE)
/* map phys->virtual and virtual->phys for RAM pages */
static inline unsigned long ___pa(unsigned long v)
{
unsigned long p;
asm volatile ("1: addis %0, %1, %2;"
".section \".vtop_fixup\",\"aw\";"
".align 1;"
".long 1b;"
".previous;"
: "=r" (p)
: "b" (v), "K" (((-PAGE_OFFSET) >> 16) & 0xffff));
return p;
}
static inline void* ___va(unsigned long p)
{
unsigned long v;
asm volatile ("1: addis %0, %1, %2;"
".section \".ptov_fixup\",\"aw\";"
".align 1;"
".long 1b;"
".previous;"
: "=r" (v)
: "b" (p), "K" (((PAGE_OFFSET) >> 16) & 0xffff));
return (void*) v;
}
#else
#define ___pa(vaddr) ((vaddr)-PPC_MEMOFFSET)
#define ___va(paddr) ((paddr)+PPC_MEMOFFSET)
#endif
extern int page_is_ram(unsigned long pfn);
#define __pa(x) ___pa((unsigned long)(x))
#define __va(x) ((void *)(___va((unsigned long)(x))))
#define ARCH_PFN_OFFSET (PPC_PGSTART)
#define ARCH_PFN_OFFSET 0
#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
#define page_to_virt(page) __va(page_to_pfn(page) << PAGE_SHIFT)
#define pfn_valid(pfn) (((pfn) - PPC_PGSTART) < max_mapnr)
#define pfn_valid(pfn) ((pfn) < max_mapnr)
#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
/* Pure 2^n version of get_order */
include/asm-ppc/pgtable.h
-8
View File
@@ -765,14 +765,6 @@ extern void paging_init(void);
#define pte_to_pgoff(pte) (pte_val(pte) >> 3)
#define pgoff_to_pte(off) ((pte_t) { ((off) << 3) | _PAGE_FILE })
/* CONFIG_APUS */
/* For virtual address to physical address conversion */
extern void cache_clear(__u32 addr, int length);
extern void cache_push(__u32 addr, int length);
extern int mm_end_of_chunk (unsigned long addr, int len);
extern unsigned long iopa(unsigned long addr);
extern unsigned long mm_ptov(unsigned long addr) __attribute_const__;
/* Values for nocacheflag and cmode */
/* These are not used by the APUS kernel_map, but prevents
compilation errors. */