Merge 3f386cb8ee ("Merge tag 'pci-v6.11-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci") into android-mainline

Steps on the way to v6.11-rc1

Signed-off-by: Lee Jones <joneslee@google.com>
Change-Id: I2675aa9c48c1a3164e8af0318e78f307099f94c6
This commit is contained in:
Lee Jones
2024-08-12 10:28:25 +01:00
1039 changed files with 27248 additions and 12283 deletions
+29 -1
View File
@@ -1,6 +1,23 @@
What: /sys/bus/nvmem/devices/.../force_ro
Date: June 2024
KernelVersion: 6.11
Contact: Marek Vasut <marex@denx.de>
Description:
This read/write attribute allows users to set read-write
devices as read-only and back to read-write from userspace.
This can be used to unlock and relock write-protection of
devices which are generally locked, except during sporadic
programming operation.
Read returns '0' or '1' for read-write or read-only modes
respectively.
Write parses one of 'YyTt1NnFf0', or [oO][NnFf] for "on"
and "off", i.e. what kstrbool() supports.
Note: This file is only present if CONFIG_NVMEM_SYSFS
is enabled.
What: /sys/bus/nvmem/devices/.../nvmem
Date: July 2015
KernelVersion: 4.2
KernelVersion: 4.2
Contact: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Description:
This file allows user to read/write the raw NVMEM contents.
@@ -20,3 +37,14 @@ Description:
...
*
0001000
What: /sys/bus/nvmem/devices/.../type
Date: November 2018
KernelVersion: 5.0
Contact: Alexandre Belloni <alexandre.belloni@bootlin.com>
Description:
This read-only attribute allows user to read the NVMEM
device type. Supported types are "Unknown", "EEPROM",
"OTP", "Battery backed", "FRAM".
Note: This file is only present if CONFIG_NVMEM_SYSFS
is enabled.
@@ -0,0 +1,25 @@
What: /sys/devices/pciXXXX:XX/0000:XX:XX.X/0000:XX:XX.X/version
Date: June 2024
KernelVersion: 6.11
Contact: Gerhard Engleder <eg@keba.com>
Description: Version of the FPGA configuration bitstream as printable string.
This file is read only.
Users: KEBA
What: /sys/devices/pciXXXX:XX/0000:XX:XX.X/0000:XX:XX.X/keep_cfg
Date: June 2024
KernelVersion: 6.11
Contact: Gerhard Engleder <eg@keba.com>
Description: Flag which signals if FPGA shall keep or reload configuration
bitstream on reset. Normal FPGA behavior and default is to keep
configuration bitstream and to only reset the configured logic.
Reloading configuration on reset enables an update of the
configuration bitstream with a simple reboot. Otherwise it is
necessary to power cycle the device to reload the new
configuration bitstream.
This file is read/write. The values are as follows:
1 = keep configuration bitstream on reset, default
0 = reload configuration bitstream on reset
Users: KEBA
@@ -0,0 +1,18 @@
What: /sys/bus/iio/devices/iio:deviceX/in_accel_power_mode
KernelVersion: 6.11
Contact: linux-iio@vger.kernel.org
Description:
Accelerometer power mode. Setting this attribute will set the
requested power mode to use if the ODR support it. If ODR
support only 1 mode, power mode will be enforced.
Reading this attribute will return the current accelerometer
power mode if the sensor is on, or the requested value if the
sensor is off. The value between real and requested value can
be different for ODR supporting only 1 mode.
What: /sys/bus/iio/devices/iio:deviceX/in_accel_power_mode_available
KernelVersion: 6.11
Contact: linux-iio@vger.kernel.org
Description:
List of available accelerometer power modes that can be set in
in_accel_power_mode attribute.
@@ -75,3 +75,13 @@ Description:
The default value is 1 (GNU Remote Debug command).
Other permissible value is 0 which is for vendor defined debug
target.
What: /sys/bus/pci/drivers/xhci_hcd/.../dbc_poll_interval_ms
Date: February 2024
Contact: Mathias Nyman <mathias.nyman@linux.intel.com>
Description:
This attribute adjust the polling interval used to check for
DbC events. Unit is milliseconds. Accepted values range from 0
up to 5000. The default value is 64 ms.
This polling interval is used while DbC is enabled but has no
active data transfers.
+2 -2
View File
@@ -172,8 +172,8 @@ by the PCI endpoint function driver.
* bind: ops to perform when a EPC device has been bound to EPF device
* unbind: ops to perform when a binding has been lost between a EPC
device and EPF device
* linkup: ops to perform when the EPC device has established a
connection with a host system
* add_cfs: optional ops to create function specific configfs
attributes
The PCI Function driver can then register the PCI EPF driver by using
pci_epf_register_driver().
+1 -1
View File
@@ -139,7 +139,7 @@ driver data structure.
static struct pcie_port_service_driver root_aerdrv = {
.name = (char *)device_name,
.id_table = &service_id[0],
.id_table = service_id,
.probe = aerdrv_load,
.remove = aerdrv_unload,
@@ -792,6 +792,25 @@
Documentation/networking/netconsole.rst for an
alternative.
<DEVNAME>:<n>.<n>[,options]
Use the specified serial port on the serial core bus.
The addressing uses DEVNAME of the physical serial port
device, followed by the serial core controller instance,
and the serial port instance. The options are the same
as documented for the ttyS addressing above.
The mapping of the serial ports to the tty instances
can be viewed with:
$ ls -d /sys/bus/serial-base/devices/*:*.*/tty/*
/sys/bus/serial-base/devices/00:04:0.0/tty/ttyS0
In the above example, the console can be addressed with
console=00:04:0.0. Note that a console addressed this
way will only get added when the related device driver
is ready. The use of an earlycon parameter in addition to
the console may be desired for console output early on.
uart[8250],io,<addr>[,options]
uart[8250],mmio,<addr>[,options]
uart[8250],mmio16,<addr>[,options]
@@ -4549,6 +4568,38 @@
bridges without forcing it upstream. Note:
this removes isolation between devices and
may put more devices in an IOMMU group.
config_acs=
Format:
<ACS flags>@<pci_dev>[; ...]
Specify one or more PCI devices (in the format
specified above) optionally prepended with flags
and separated by semicolons. The respective
capabilities will be enabled, disabled or
unchanged based on what is specified in
flags.
ACS Flags is defined as follows:
bit-0 : ACS Source Validation
bit-1 : ACS Translation Blocking
bit-2 : ACS P2P Request Redirect
bit-3 : ACS P2P Completion Redirect
bit-4 : ACS Upstream Forwarding
bit-5 : ACS P2P Egress Control
bit-6 : ACS Direct Translated P2P
Each bit can be marked as:
'0' force disabled
'1' force enabled
'x' unchanged
For example,
pci=config_acs=10x
would configure all devices that support
ACS to enable P2P Request Redirect, disable
Translation Blocking, and leave Source
Validation unchanged from whatever power-up
or firmware set it to.
Note: this may remove isolation between devices
and may put more devices in an IOMMU group.
force_floating [S390] Force usage of floating interrupts.
nomio [S390] Do not use MIO instructions.
norid [S390] ignore the RID field and force use of
@@ -7041,6 +7092,9 @@
usb-storage.delay_use=
[UMS] The delay in seconds before a new device is
scanned for Logical Units (default 1).
Optionally the delay in milliseconds if the value has
suffix with "ms".
Example: delay_use=2567ms
usb-storage.quirks=
[UMS] A list of quirks entries to supplement or
@@ -11,7 +11,9 @@ maintainers:
properties:
compatible:
const: ti,am3352-eqep
enum:
- ti,am3352-eqep
- ti,am62-eqep
reg:
maxItems: 1
@@ -21,19 +23,35 @@ properties:
maxItems: 1
clocks:
description: The clock that determines the SYSCLKOUT rate for the eQEP
peripheral.
description: The functional and interface clock that determines the clock
rate for the eQEP peripheral.
maxItems: 1
clock-names:
const: sysclkout
power-domains:
maxItems: 1
allOf:
- if:
properties:
compatible:
contains:
enum:
- ti,am62-eqep
then:
properties:
clock-names: false
required:
- power-domains
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
additionalProperties: false
@@ -43,7 +61,6 @@ examples:
compatible = "ti,am3352-eqep";
reg = <0x180 0x80>;
clocks = <&l4ls_gclk>;
clock-names = "sysclkout";
interrupts = <79>;
};
@@ -18,7 +18,9 @@ select:
properties:
compatible:
contains:
pattern: "^atmel,(24(c|cs|mac)[0-9]+|spd)$"
anyOf:
- pattern: "^atmel,(24(c|cs|mac)[0-9]+|spd)$"
- enum: ["microchip,24aa025e48", "microchip,24aa025e64"]
required:
- compatible
@@ -102,9 +104,6 @@ properties:
pattern: spd$
# These are special cases that don't conform to the above pattern.
# Each requires a standard at24 model as fallback.
- items:
- const: belling,bl24c16a
- const: atmel,24c16
- items:
- enum:
- rohm,br24g01
@@ -122,16 +121,25 @@ properties:
- rohm,br24g04
- const: atmel,24c04
- items:
- const: renesas,r1ex24016
- enum:
- belling,bl24c16a
- renesas,r1ex24016
- const: atmel,24c16
- items:
- const: giantec,gt24c32a
- const: atmel,24c32
- items:
- const: onnn,n24s64b
- const: atmel,24c64
- items:
- enum:
- renesas,r1ex24128
- samsung,s524ad0xd1
- const: atmel,24c128
- items:
- const: microchip,24aa025e48
- items:
- const: microchip,24aa025e64
- pattern: '^atmel,24c(32|64)d-wl$' # Actual vendor is st
label:
@@ -30,6 +30,9 @@ properties:
clocks:
minItems: 1
power-domains:
maxItems: 1
required:
- compatible
- reg
@@ -26,6 +26,7 @@ properties:
- microchip,sam9x60-i2c
- items:
- enum:
- microchip,sama7d65-i2c
- microchip,sama7g5-i2c
- microchip,sam9x7-i2c
- const: microchip,sam9x60-i2c
@@ -36,12 +37,6 @@ properties:
interrupts:
maxItems: 1
"#address-cells":
const: 1
"#size-cells":
const: 0
clocks:
maxItems: 1
@@ -72,8 +67,6 @@ required:
- compatible
- reg
- interrupts
- "#address-cells"
- "#size-cells"
- clocks
allOf:
@@ -86,6 +79,7 @@ allOf:
- atmel,sama5d4-i2c
- atmel,sama5d2-i2c
- microchip,sam9x60-i2c
- microchip,sama7d65-i2c
- microchip,sama7g5-i2c
then:
properties:
@@ -76,21 +76,21 @@ else:
examples:
- |
bsca: i2c@f0406200 {
clock-frequency = <390000>;
compatible = "brcm,brcmstb-i2c";
interrupt-parent = <&irq0_intc>;
reg = <0xf0406200 0x58>;
interrupts = <0x18>;
interrupt-names = "upg_bsca";
};
bsca: i2c@f0406200 {
compatible = "brcm,brcmstb-i2c";
reg = <0xf0406200 0x58>;
clock-frequency = <390000>;
interrupt-parent = <&irq0_intc>;
interrupts = <0x18>;
interrupt-names = "upg_bsca";
};
- |
ddc0: i2c@7ef04500 {
compatible = "brcm,bcm2711-hdmi-i2c";
reg = <0x7ef04500 0x100>, <0x7ef00b00 0x300>;
reg-names = "bsc", "auto-i2c";
clock-frequency = <390000>;
};
ddc0: i2c@7ef04500 {
compatible = "brcm,bcm2711-hdmi-i2c";
reg = <0x7ef04500 0x100>, <0x7ef00b00 0x300>;
reg-names = "bsc", "auto-i2c";
clock-frequency = <390000>;
};
...
@@ -109,65 +109,65 @@ examples:
// Example for a bus to be demuxed. It contains various I2C clients for
// HDMI, so the bus is named "i2c-hdmi":
i2chdmi: i2c-mux3 {
compatible = "i2c-demux-pinctrl";
i2c-parent = <&iic2>, <&i2c2>, <&gpioi2c2>;
i2c-bus-name = "i2c-hdmi";
#address-cells = <1>;
#size-cells = <0>;
compatible = "i2c-demux-pinctrl";
i2c-parent = <&iic2>, <&i2c2>, <&gpioi2c2>;
i2c-bus-name = "i2c-hdmi";
#address-cells = <1>;
#size-cells = <0>;
ak4643: codec@12 {
compatible = "asahi-kasei,ak4643";
#sound-dai-cells = <0>;
reg = <0x12>;
ak4643: codec@12 {
compatible = "asahi-kasei,ak4643";
#sound-dai-cells = <0>;
reg = <0x12>;
};
composite-in@20 {
compatible = "adi,adv7180";
reg = <0x20>;
port {
adv7180: endpoint {
bus-width = <8>;
remote-endpoint = <&vin1ep0>;
};
};
};
composite-in@20 {
compatible = "adi,adv7180";
reg = <0x20>;
hdmi@39 {
compatible = "adi,adv7511w";
reg = <0x39>;
interrupt-parent = <&gpio1>;
interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
clocks = <&cec_clock>;
clock-names = "cec";
port {
adv7180: endpoint {
bus-width = <8>;
remote-endpoint = <&vin1ep0>;
};
avdd-supply = <&fixedregulator1v8>;
dvdd-supply = <&fixedregulator1v8>;
pvdd-supply = <&fixedregulator1v8>;
dvdd-3v-supply = <&fixedregulator3v3>;
bgvdd-supply = <&fixedregulator1v8>;
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7511_in: endpoint {
remote-endpoint = <&lvds0_out>;
};
};
};
hdmi@39 {
compatible = "adi,adv7511w";
reg = <0x39>;
interrupt-parent = <&gpio1>;
interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
clocks = <&cec_clock>;
clock-names = "cec";
avdd-supply = <&fixedregulator1v8>;
dvdd-supply = <&fixedregulator1v8>;
pvdd-supply = <&fixedregulator1v8>;
dvdd-3v-supply = <&fixedregulator3v3>;
bgvdd-supply = <&fixedregulator1v8>;
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7511_in: endpoint {
remote-endpoint = <&lvds0_out>;
};
};
port@1 {
reg = <1>;
adv7511_out: endpoint {
remote-endpoint = <&hdmi_con_out>;
};
};
port@1 {
reg = <1>;
adv7511_out: endpoint {
remote-endpoint = <&hdmi_con_out>;
};
};
};
};
};
@@ -1,33 +0,0 @@
NXP I2C controller for LPC2xxx/178x/18xx/43xx
Required properties:
- compatible: must be "nxp,lpc1788-i2c"
- reg: physical address and length of the device registers
- interrupts: a single interrupt specifier
- clocks: clock for the device
- #address-cells: should be <1>
- #size-cells: should be <0>
Optional properties:
- clock-frequency: the desired I2C bus clock frequency in Hz; in
absence of this property the default value is used (100 kHz).
Example:
i2c0: i2c@400a1000 {
compatible = "nxp,lpc1788-i2c";
reg = <0x400a1000 0x1000>;
interrupts = <18>;
clocks = <&ccu1 CLK_APB1_I2C0>;
#address-cells = <1>;
#size-cells = <0>;
};
&i2c0 {
clock-frequency = <400000>;
lm75@48 {
compatible = "nxp,lm75";
reg = <0x48>;
};
};
@@ -87,12 +87,6 @@ properties:
interrupts:
maxItems: 1
'#address-cells':
const: 1
'#size-cells':
const: 0
clocks:
minItems: 1
maxItems: 2
@@ -0,0 +1,54 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/i2c/nxp,lpc1788-i2c.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NXP I2C controller for LPC2xxx/178x/18xx/43xx
maintainers:
- Vladimir Zapolskiy <vz@mleia.com>
allOf:
- $ref: /schemas/i2c/i2c-controller.yaml#
properties:
compatible:
const: nxp,lpc1788-i2c
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
maxItems: 1
clock-frequency:
description: the desired I2C bus clock frequency in Hz
default: 100000
resets:
maxItems: 1
required:
- compatible
- reg
- interrupts
- clocks
unevaluatedProperties: false
examples:
- |
#include "dt-bindings/clock/lpc18xx-ccu.h"
i2c@400a1000 {
compatible = "nxp,lpc1788-i2c";
reg = <0x400a1000 0x1000>;
interrupts = <18>;
clocks = <&ccu1 CLK_APB1_I2C0>;
#address-cells = <1>;
#size-cells = <0>;
};
@@ -44,11 +44,11 @@ examples:
#include <dt-bindings/interrupt-controller/arm-gic.h>
iic0: i2c@e0070000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,iic-emev2";
reg = <0xe0070000 0x28>;
interrupts = <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>;
clocks = <&iic0_sclk>;
clock-names = "sclk";
compatible = "renesas,iic-emev2";
reg = <0xe0070000 0x28>;
interrupts = <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>;
clocks = <&iic0_sclk>;
clock-names = "sclk";
#address-cells = <1>;
#size-cells = <0>;
};
@@ -153,14 +153,14 @@ examples:
#include <dt-bindings/power/r8a7791-sysc.h>
i2c0: i2c@e6508000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
reg = <0xe6508000 0x40>;
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <400000>;
clocks = <&cpg CPG_MOD 931>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 931>;
i2c-scl-internal-delay-ns = <6>;
compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
reg = <0xe6508000 0x40>;
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <400000>;
clocks = <&cpg CPG_MOD 931>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 931>;
i2c-scl-internal-delay-ns = <6>;
#address-cells = <1>;
#size-cells = <0>;
};
@@ -97,21 +97,21 @@ examples:
#include <dt-bindings/interrupt-controller/arm-gic.h>
i2c0: i2c@fcfee000 {
compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
reg = <0xfcfee000 0x44>;
interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 158 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 159 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tei", "ri", "ti", "spi", "sti", "naki", "ali",
"tmoi";
clocks = <&mstp9_clks R7S72100_CLK_I2C0>;
clock-frequency = <100000>;
power-domains = <&cpg_clocks>;
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
reg = <0xfcfee000 0x44>;
interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 158 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 159 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tei", "ri", "ti", "spi", "sti", "naki", "ali",
"tmoi";
clocks = <&mstp9_clks R7S72100_CLK_I2C0>;
clock-frequency = <100000>;
power-domains = <&cpg_clocks>;
#address-cells = <1>;
#size-cells = <0>;
};
@@ -134,16 +134,16 @@ examples:
#include <dt-bindings/power/r8a7790-sysc.h>
iic0: i2c@e6500000 {
compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
"renesas,rmobile-iic";
reg = <0xe6500000 0x425>;
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 318>;
clock-frequency = <400000>;
dmas = <&dmac0 0x61>, <&dmac0 0x62>, <&dmac1 0x61>, <&dmac1 0x62>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 318>;
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
"renesas,rmobile-iic";
reg = <0xe6500000 0x425>;
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 318>;
clock-frequency = <400000>;
dmas = <&dmac0 0x61>, <&dmac0 0x62>, <&dmac1 0x61>, <&dmac1 0x62>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 318>;
#address-cells = <1>;
#size-cells = <0>;
};
@@ -26,9 +26,6 @@ properties:
- samsung,exynos850-i2c
- const: samsung,s3c2440-i2c
'#address-cells':
const: 1
clocks:
maxItems: 1
@@ -73,9 +70,6 @@ properties:
$ref: /schemas/types.yaml#/definitions/phandle
description: Pandle to syscon used to control the system registers.
'#size-cells':
const: 0
required:
- compatible
- reg
@@ -33,6 +33,10 @@ properties:
- const: snps,designware-i2c
- description: Baikal-T1 SoC System I2C controller
const: baikal,bt1-sys-i2c
- description: T-HEAD TH1520 SoCs I2C controller
items:
- const: thead,th1520-i2c
- const: snps,designware-i2c
reg:
minItems: 1
@@ -145,31 +145,31 @@ examples:
#include <dt-bindings/mfd/stm32f7-rcc.h>
#include <dt-bindings/clock/stm32fx-clock.h>
//Example 1 (with st,stm32f4-i2c compatible)
i2c@40005400 {
compatible = "st,stm32f4-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40005400 0x400>;
interrupts = <31>,
<32>;
resets = <&rcc 277>;
clocks = <&rcc 0 149>;
};
i2c@40005400 {
compatible = "st,stm32f4-i2c";
reg = <0x40005400 0x400>;
interrupts = <31>,
<32>;
resets = <&rcc 277>;
clocks = <&rcc 0 149>;
#address-cells = <1>;
#size-cells = <0>;
};
- |
#include <dt-bindings/mfd/stm32f7-rcc.h>
#include <dt-bindings/clock/stm32fx-clock.h>
//Example 2 (with st,stm32f7-i2c compatible)
i2c@40005800 {
compatible = "st,stm32f7-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40005800 0x400>;
interrupts = <31>,
<32>;
resets = <&rcc STM32F7_APB1_RESET(I2C1)>;
clocks = <&rcc 1 CLK_I2C1>;
};
i2c@40005800 {
compatible = "st,stm32f7-i2c";
reg = <0x40005800 0x400>;
interrupts = <31>,
<32>;
resets = <&rcc STM32F7_APB1_RESET(I2C1)>;
clocks = <&rcc 1 CLK_I2C1>;
#address-cells = <1>;
#size-cells = <0>;
};
- |
#include <dt-bindings/mfd/stm32f7-rcc.h>
@@ -178,16 +178,16 @@ examples:
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/stm32mp1-clks.h>
#include <dt-bindings/reset/stm32mp1-resets.h>
i2c@40013000 {
compatible = "st,stm32mp15-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40013000 0x400>;
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc I2C2_K>;
resets = <&rcc I2C2_R>;
i2c-scl-rising-time-ns = <185>;
i2c-scl-falling-time-ns = <20>;
st,syscfg-fmp = <&syscfg 0x4 0x2>;
};
i2c@40013000 {
compatible = "st,stm32mp15-i2c";
reg = <0x40013000 0x400>;
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc I2C2_K>;
resets = <&rcc I2C2_R>;
i2c-scl-rising-time-ns = <185>;
i2c-scl-falling-time-ns = <20>;
st,syscfg-fmp = <&syscfg 0x4 0x2>;
#address-cells = <1>;
#size-cells = <0>;
};
@@ -37,16 +37,8 @@ properties:
clock-names:
const: fck
clock-frequency: true
power-domains: true
"#address-cells":
const: 1
"#size-cells":
const: 0
ti,hwmods:
description:
Must be "i2c<n>", n being the instance number (1-based).
@@ -55,38 +47,34 @@ properties:
$ref: /schemas/types.yaml#/definitions/string
deprecated: true
# subnode's properties
patternProperties:
"@[0-9a-f]+$":
type: object
description:
Flash device uses the below defined properties in the subnode.
required:
- compatible
- reg
- interrupts
additionalProperties: false
allOf:
- $ref: /schemas/i2c/i2c-controller.yaml#
if:
properties:
compatible:
enum:
- ti,omap2420-i2c
- ti,omap2430-i2c
- ti,omap3-i2c
- ti,omap4-i2c
- if:
properties:
compatible:
enum:
- ti,omap2420-i2c
- ti,omap2430-i2c
- ti,omap3-i2c
- ti,omap4-i2c
then:
properties:
ti,hwmods:
items:
- pattern: "^i2c([1-9])$"
then:
properties:
ti,hwmods:
items:
- pattern: "^i2c([1-9])$"
else:
properties:
ti,hwmods: false
else:
properties:
ti,hwmods: false
unevaluatedProperties: false
examples:
- |
@@ -94,9 +82,9 @@ examples:
#include <dt-bindings/interrupt-controller/arm-gic.h>
main_i2c0: i2c@2000000 {
compatible = "ti,j721e-i2c", "ti,omap4-i2c";
reg = <0x2000000 0x100>;
interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
};
compatible = "ti,j721e-i2c", "ti,omap4-i2c";
reg = <0x2000000 0x100>;
interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
};
@@ -38,6 +38,25 @@ properties:
The first value specifies the positive input pin, the second
specifies the negative input pin.
single-channel:
$ref: /schemas/types.yaml#/definitions/uint32
description:
When devices combine single-ended and differential channels, allow the
channel for a single element to be specified, independent of reg (as for
differential channels). If this and diff-channels are not present reg
shall be used instead.
common-mode-channel:
$ref: /schemas/types.yaml#/definitions/uint32
description:
Some ADCs have differential input pins that can be used to measure
single-ended or pseudo-differential inputs. This property can be used
in addition to single-channel to signal software that this channel is
not differential but still specify two inputs.
The input pair is specified by setting single-channel to the positive
input pin and common-mode-channel to the negative pin.
settling-time-us:
description:
Time between enabling the channel and first stable readings.
@@ -50,4 +69,15 @@ properties:
device design and can interact with other characteristics such as
settling time.
anyOf:
- oneOf:
- required:
- reg
- diff-channels
- required:
- reg
- single-channel
- required:
- reg
additionalProperties: true
@@ -19,7 +19,18 @@ description: |
primarily for measurement of signals close to DC but also delivers
outstanding performance with input bandwidths out to ~10kHz.
Analog Devices AD411x ADC's:
The AD411X family encompasses a series of low power, low noise, 24-bit,
sigma-delta analog-to-digital converters that offer a versatile range of
specifications. They integrate an analog front end suitable for processing
fully differential/single-ended and bipolar voltage inputs.
Datasheets for supported chips:
https://www.analog.com/media/en/technical-documentation/data-sheets/AD4111.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/AD4112.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/AD4114.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/AD4115.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/AD4116.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/AD7172-2.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/AD7172-4.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/AD7173-8.pdf
@@ -31,6 +42,11 @@ description: |
properties:
compatible:
enum:
- adi,ad4111
- adi,ad4112
- adi,ad4114
- adi,ad4115
- adi,ad4116
- adi,ad7172-2
- adi,ad7172-4
- adi,ad7173-8
@@ -129,10 +145,56 @@ patternProperties:
maximum: 15
diff-channels:
description: |
This property is used for defining the inputs of a differential
voltage channel. The first value is the positive input and the second
value is the negative input of the channel.
Family AD411x supports a dedicated VINCOM voltage input.
To select it set the second channel to 16.
(VIN2, VINCOM) -> diff-channels = <2 16>
There are special values that can be selected besides the voltage
analog inputs:
21: REF+
22: REF
Supported only by AD7172-2, AD7172-4, AD7175-2, AD7175-8, AD7177-2,
must be paired together and can be used to monitor the power supply
of the ADC:
19: ((AVDD1 AVSS)/5)+
20: ((AVDD1 AVSS)/5)
items:
minimum: 0
maximum: 31
single-channel:
description: |
This property is used for defining a current channel or the positive
input of a voltage channel (single-ended or pseudo-differential).
Models AD4111 and AD4112 support current channels.
Example: (IIN2+, IIN2) -> single-channel = <2>
To correctly configure a current channel set the "adi,current-channel"
property to true.
To configure a single-ended/pseudo-differential channel set the
"common-mode-channel" property to the desired negative voltage input.
When used as a voltage channel, special inputs are valid as well.
minimum: 0
maximum: 31
common-mode-channel:
description:
This property is used for defining the negative input of a
single-ended or pseudo-differential voltage channel.
Special inputs are valid as well.
minimum: 0
maximum: 31
adi,reference-select:
description: |
Select the reference source to use when converting on
@@ -154,9 +216,31 @@ patternProperties:
- avdd
default: refout-avss
adi,current-channel:
$ref: /schemas/types.yaml#/definitions/flag
description: |
Signal that the selected inputs are current channels.
Only available on AD4111 and AD4112.
required:
- reg
- diff-channels
allOf:
- oneOf:
- required: [single-channel]
properties:
diff-channels: false
- required: [diff-channels]
properties:
single-channel: false
adi,current-channel: false
common-mode-channel: false
- if:
required: [common-mode-channel]
then:
properties:
adi,current-channel: false
required:
- compatible
@@ -166,7 +250,6 @@ allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
# Only ad7172-4, ad7173-8 and ad7175-8 support vref2
# Other models have [0-3] channel registers
- if:
properties:
compatible:
@@ -187,6 +270,37 @@ allOf:
- vref
- refout-avss
- avdd
- if:
properties:
compatible:
contains:
enum:
- adi,ad4114
- adi,ad4115
- adi,ad4116
- adi,ad7173-8
- adi,ad7175-8
then:
patternProperties:
"^channel@[0-9a-f]$":
properties:
reg:
maximum: 15
- if:
properties:
compatible:
contains:
enum:
- adi,ad7172-2
- adi,ad7175-2
- adi,ad7176-2
- adi,ad7177-2
then:
patternProperties:
"^channel@[0-9a-f]$":
properties:
reg:
maximum: 3
@@ -210,6 +324,34 @@ allOf:
required:
- adi,reference-select
- if:
properties:
compatible:
contains:
enum:
- adi,ad4111
- adi,ad4112
- adi,ad4114
- adi,ad4115
- adi,ad4116
then:
properties:
avdd2-supply: false
- if:
properties:
compatible:
not:
contains:
enum:
- adi,ad4111
- adi,ad4112
then:
patternProperties:
"^channel@[0-9a-f]$":
properties:
adi,current-channel: false
- if:
anyOf:
- required: [clock-names]
@@ -221,6 +363,7 @@ allOf:
unevaluatedProperties: false
examples:
# Example AD7173-8 with external reference connected to REF+/REF-:
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
@@ -277,3 +420,50 @@ examples:
};
};
};
# Example AD4111 with current channel and single-ended channel:
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
adc@0 {
compatible = "adi,ad4111";
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
interrupt-names = "rdy";
interrupt-parent = <&gpio>;
spi-max-frequency = <5000000>;
gpio-controller;
#gpio-cells = <2>;
#clock-cells = <0>;
channel@0 {
reg = <0>;
bipolar;
diff-channels = <4 5>;
};
// Single ended channel VIN2/VINCOM
channel@1 {
reg = <1>;
bipolar;
single-channel = <2>;
common-mode-channel = <16>;
};
// Current channel IN2+/IN2-
channel@2 {
reg = <2>;
single-channel = <2>;
adi,current-channel;
};
};
};
@@ -21,8 +21,15 @@ properties:
- adi,ad7190
- adi,ad7192
- adi,ad7193
- adi,ad7194
- adi,ad7195
"#address-cells":
const: 1
"#size-cells":
const: 0
reg:
maxItems: 1
@@ -41,6 +48,11 @@ properties:
interrupts:
maxItems: 1
aincom-supply:
description: |
AINCOM voltage supply. Analog inputs AINx are referenced to this input
when configured for pseudo-differential operation.
dvdd-supply:
description: DVdd voltage supply
@@ -84,6 +96,42 @@ properties:
description: see Documentation/devicetree/bindings/iio/adc/adc.yaml
type: boolean
patternProperties:
"^channel@[0-9a-f]+$":
type: object
$ref: adc.yaml
unevaluatedProperties: false
properties:
reg:
description: The channel index.
minimum: 0
maximum: 271
diff-channels:
description:
Both inputs can be connected to pins AIN1 to AIN16 by choosing the
appropriate value from 1 to 16.
items:
minimum: 1
maximum: 16
single-channel:
description:
Positive input can be connected to pins AIN1 to AIN16 by choosing the
appropriate value from 1 to 16. Negative input is connected to AINCOM.
items:
minimum: 1
maximum: 16
oneOf:
- required:
- reg
- diff-channels
- required:
- reg
- single-channel
required:
- compatible
- reg
@@ -98,6 +146,17 @@ required:
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
- if:
properties:
compatible:
enum:
- adi,ad7190
- adi,ad7192
- adi,ad7193
- adi,ad7195
then:
patternProperties:
"^channel@[0-9a-f]+$": false
unevaluatedProperties: false
@@ -117,6 +176,7 @@ examples:
clock-names = "mclk";
interrupts = <25 0x2>;
interrupt-parent = <&gpio>;
aincom-supply = <&aincom>;
dvdd-supply = <&dvdd>;
avdd-supply = <&avdd>;
vref-supply = <&vref>;
@@ -127,3 +187,38 @@ examples:
adi,burnout-currents-enable;
};
};
- |
spi {
#address-cells = <1>;
#size-cells = <0>;
adc@0 {
compatible = "adi,ad7194";
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <1000000>;
spi-cpol;
spi-cpha;
clocks = <&ad7192_mclk>;
clock-names = "mclk";
interrupts = <25 0x2>;
interrupt-parent = <&gpio>;
aincom-supply = <&aincom>;
dvdd-supply = <&dvdd>;
avdd-supply = <&avdd>;
vref-supply = <&vref>;
channel@0 {
reg = <0>;
diff-channels = <1 6>;
};
channel@1 {
reg = <1>;
single-channel = <1>;
};
};
};
@@ -0,0 +1,148 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/adi,ad7380.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Analog Devices Simultaneous Sampling Analog to Digital Converters
maintainers:
- Michael Hennerich <Michael.Hennerich@analog.com>
- Nuno Sá <nuno.sa@analog.com>
description: |
* https://www.analog.com/en/products/ad7380.html
* https://www.analog.com/en/products/ad7381.html
* https://www.analog.com/en/products/ad7383.html
* https://www.analog.com/en/products/ad7384.html
* https://www.analog.com/en/products/ad7380-4.html
* https://www.analog.com/en/products/ad7381-4.html
* https://www.analog.com/en/products/ad7383-4.html
* https://www.analog.com/en/products/ad7384-4.html
$ref: /schemas/spi/spi-peripheral-props.yaml#
properties:
compatible:
enum:
- adi,ad7380
- adi,ad7381
- adi,ad7383
- adi,ad7384
- adi,ad7380-4
- adi,ad7381-4
- adi,ad7383-4
- adi,ad7384-4
reg:
maxItems: 1
spi-max-frequency:
maximum: 80000000
spi-cpol: true
spi-cpha: true
vcc-supply:
description: A 3V to 3.6V supply that powers the chip.
vlogic-supply:
description:
A 1.65V to 3.6V supply for the logic pins.
refio-supply:
description:
A 2.5V to 3.3V supply for the external reference voltage. When omitted,
the internal 2.5V reference is used.
aina-supply:
description:
The common mode voltage supply for the AINA- pin on pseudo-differential
chips.
ainb-supply:
description:
The common mode voltage supply for the AINB- pin on pseudo-differential
chips.
ainc-supply:
description:
The common mode voltage supply for the AINC- pin on pseudo-differential
chips.
aind-supply:
description:
The common mode voltage supply for the AIND- pin on pseudo-differential
chips.
interrupts:
description:
When the device is using 1-wire mode, this property is used to optionally
specify the ALERT interrupt.
maxItems: 1
required:
- compatible
- reg
- vcc-supply
- vlogic-supply
unevaluatedProperties: false
allOf:
# pseudo-differential chips require common mode voltage supplies,
# true differential chips don't use them
- if:
properties:
compatible:
enum:
- adi,ad7383
- adi,ad7384
- adi,ad7383-4
- adi,ad7384-4
then:
required:
- aina-supply
- ainb-supply
else:
properties:
aina-supply: false
ainb-supply: false
- if:
properties:
compatible:
enum:
- adi,ad7383-4
- adi,ad7384-4
then:
required:
- ainc-supply
- aind-supply
else:
properties:
ainc-supply: false
aind-supply: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
adc@0 {
compatible = "adi,ad7380";
reg = <0>;
spi-cpol;
spi-cpha;
spi-max-frequency = <80000000>;
interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
interrupt-parent = <&gpio0>;
vcc-supply = <&supply_3_3V>;
vlogic-supply = <&supply_3_3V>;
refio-supply = <&supply_2_5V>;
};
};
@@ -11,6 +11,7 @@ maintainers:
description: |
Analog Devices AD7606 Simultaneous Sampling ADC
https://www.analog.com/media/en/technical-documentation/data-sheets/AD7605-4.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606_7606-6_7606-4.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/AD7606B.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/AD7616.pdf
@@ -19,9 +20,9 @@ properties:
compatible:
enum:
- adi,ad7605-4
- adi,ad7606-8
- adi,ad7606-6
- adi,ad7606-4
- adi,ad7606-6
- adi,ad7606-8 # Referred to as AD7606 (without -8) in the datasheet
- adi,ad7606b
- adi,ad7616
@@ -66,6 +66,9 @@ properties:
nvmem-cell-names:
const: temperature_calib
power-domains:
maxItems: 1
allOf:
- if:
properties:
@@ -0,0 +1,33 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/mediatek,mt6359-auxadc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: MediaTek MT6350 series PMIC AUXADC
maintainers:
- AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
description:
The Auxiliary Analog/Digital Converter (AUXADC) is an ADC found
in some MediaTek PMICs, performing various PMIC related measurements
such as battery and PMIC internal voltage regulators temperatures,
accessory detection resistance (usually, for a 3.5mm audio jack)
other than voltages for various PMIC internal components.
properties:
compatible:
enum:
- mediatek,mt6357-auxadc
- mediatek,mt6358-auxadc
- mediatek,mt6359-auxadc
"#io-channel-cells":
const: 1
required:
- compatible
- "#io-channel-cells"
additionalProperties: false
@@ -246,6 +246,10 @@ patternProperties:
From common IIO binding. Used to pipe external sigma delta
modulator or internal ADC output to DFSDM channel.
port:
$ref: /schemas/sound/audio-graph-port.yaml#
unevaluatedProperties: false
required:
- compatible
- "#sound-dai-cells"
@@ -18,6 +18,7 @@ properties:
enum:
- ti,ads1015
- ti,ads1115
- ti,tla2021
- ti,tla2024
reg:
@@ -0,0 +1,155 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/ti,ads1119.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Texas Instruments ADS1119 ADC
maintainers:
- João Paulo Gonçalves <jpaulo.silvagoncalves@gmail.com>
description:
The TI ADS1119 is a precision 16-bit ADC over I2C that offers single-ended and
differential measurements using a multiplexed input. It features a programmable
gain, a programmable sample rate, an internal oscillator and voltage reference,
and a 50/60Hz rejection filter.
properties:
compatible:
const: ti,ads1119
reg:
maxItems: 1
interrupts:
maxItems: 1
reset-gpios:
maxItems: 1
avdd-supply: true
dvdd-supply: true
vref-supply:
description:
ADC external reference voltage (VREF).
"#address-cells":
const: 1
"#size-cells":
const: 0
"#io-channel-cells":
const: 1
required:
- compatible
- reg
- "#address-cells"
- "#size-cells"
- avdd-supply
- dvdd-supply
patternProperties:
"^channel@([0-6])$":
$ref: adc.yaml
type: object
properties:
reg:
minimum: 0
maximum: 6
diff-channels:
description:
Differential input channels AIN0-AIN1, AIN2-AIN3 and AIN1-AIN2.
oneOf:
- items:
- const: 0
- const: 1
- items:
- const: 2
- const: 3
- items:
- const: 1
- const: 2
single-channel:
description:
Single-ended input channels AIN0, AIN1, AIN2 and AIN3.
minimum: 0
maximum: 3
oneOf:
- required:
- diff-channels
- required:
- single-channel
required:
- reg
unevaluatedProperties: false
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
adc@40 {
compatible = "ti,ads1119";
reg = <0x40>;
interrupt-parent = <&gpio1>;
interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
avdd-supply = <&reg_avdd_ads1119>;
dvdd-supply = <&reg_dvdd_ads1119>;
vref-supply = <&reg_vref_ads1119>;
#address-cells = <1>;
#size-cells = <0>;
#io-channel-cells = <1>;
channel@0 {
reg = <0>;
single-channel = <0>;
};
channel@1 {
reg = <1>;
diff-channels = <0 1>;
};
channel@2 {
reg = <2>;
single-channel = <3>;
};
channel@3 {
reg = <3>;
single-channel = <1>;
};
channel@4 {
reg = <4>;
single-channel = <2>;
};
channel@5 {
reg = <5>;
diff-channels = <1 2>;
};
channel@6 {
reg = <6>;
diff-channels = <2 3>;
};
};
};
@@ -0,0 +1,70 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/chemical/sciosense,ens160.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ScioSense ENS160 multi-gas sensor
maintainers:
- Gustavo Silva <gustavograzs@gmail.com>
description: |
Digital Multi-Gas Sensor for Monitoring Indoor Air Quality.
Datasheet:
https://www.sciosense.com/wp-content/uploads/2023/12/ENS160-Datasheet.pdf
properties:
compatible:
enum:
- sciosense,ens160
reg:
maxItems: 1
interrupts:
maxItems: 1
vdd-supply: true
vddio-supply: true
required:
- compatible
- reg
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
gas-sensor@52 {
compatible = "sciosense,ens160";
reg = <0x52>;
interrupt-parent = <&gpio0>;
interrupts = <19 IRQ_TYPE_EDGE_FALLING>;
};
};
- |
#include <dt-bindings/interrupt-controller/irq.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
gas-sensor@0 {
compatible = "sciosense,ens160";
reg = <0>;
spi-max-frequency = <10000000>;
interrupt-parent = <&gpio>;
interrupts = <19 IRQ_TYPE_EDGE_FALLING>;
};
};
...
@@ -13,13 +13,17 @@ maintainers:
description: |
Bindings for the Analog Devices AD3552R DAC device and similar.
Datasheet can be found here:
https://www.analog.com/media/en/technical-documentation/data-sheets/ad3541r.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/ad3542r.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/ad3551r.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/ad3552r.pdf
properties:
compatible:
enum:
- adi,ad3541r
- adi,ad3542r
- adi,ad3551r
- adi,ad3552r
reg:
@@ -92,13 +96,13 @@ patternProperties:
maximum: 511
minimum: -511
adi,gain-scaling-p-inv-log2:
description: GainP = 1 / ( 2 ^ adi,gain-scaling-p-inv-log2)
adi,gain-scaling-p:
description: GainP = 1 / ( 2 ^ adi,gain-scaling-p)
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1, 2, 3]
adi,gain-scaling-n-inv-log2:
description: GainN = 1 / ( 2 ^ adi,gain-scaling-n-inv-log2)
adi,gain-scaling-n:
description: GainN = 1 / ( 2 ^ adi,gain-scaling-n)
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1, 2, 3]
@@ -107,8 +111,8 @@ patternProperties:
required:
- adi,gain-offset
- adi,gain-scaling-p-inv-log2
- adi,gain-scaling-n-inv-log2
- adi,gain-scaling-p
- adi,gain-scaling-n
- adi,rfb-ohms
required:
@@ -128,7 +132,9 @@ allOf:
properties:
compatible:
contains:
const: adi,ad3542r
enum:
- adi,ad3541r
- adi,ad3542r
then:
patternProperties:
"^channel@([0-1])$":
@@ -158,7 +164,9 @@ allOf:
properties:
compatible:
contains:
const: adi,ad3552r
enum:
- adi,ad3551r
- adi,ad3552r
then:
patternProperties:
"^channel@([0-1])$":
@@ -182,6 +190,21 @@ allOf:
- const: -10000000
- const: 10000000
- if:
properties:
compatible:
contains:
enum:
- adi,ad3541r
- adi,ad3551r
then:
properties:
channel@1: false
channel@0:
properties:
reg:
const: 0
required:
- compatible
- reg
@@ -208,8 +231,8 @@ examples:
reg = <1>;
custom-output-range-config {
adi,gain-offset = <5>;
adi,gain-scaling-p-inv-log2 = <1>;
adi,gain-scaling-n-inv-log2 = <2>;
adi,gain-scaling-p = <1>;
adi,gain-scaling-n = <2>;
adi,rfb-ohms = <1>;
};
};
@@ -28,6 +28,12 @@ properties:
clock-names:
const: clkin
'#clock-cells':
const: 0
clock-output-names:
maxItems: 1
gpios:
maxItems: 1
description: Lock detect GPIO.
@@ -30,12 +30,19 @@ properties:
- adi,adis16467-2
- adi,adis16467-3
- adi,adis16500
- adi,adis16501
- adi,adis16505-1
- adi,adis16505-2
- adi,adis16505-3
- adi,adis16507-1
- adi,adis16507-2
- adi,adis16507-3
- adi,adis16575-2
- adi,adis16575-3
- adi,adis16576-2
- adi,adis16576-3
- adi,adis16577-2
- adi,adis16577-3
reg:
maxItems: 1
@@ -90,12 +97,19 @@ allOf:
contains:
enum:
- adi,adis16500
- adi,adis16501
- adi,adis16505-1
- adi,adis16505-2
- adi,adis16505-3
- adi,adis16507-1
- adi,adis16507-2
- adi,adis16507-3
- adi,adis16575-2
- adi,adis16575-3
- adi,adis16576-2
- adi,adis16576-3
- adi,adis16577-2
- adi,adis16577-3
then:
properties:
@@ -112,6 +126,23 @@ allOf:
dependencies:
adi,sync-mode: [ clocks ]
- if:
properties:
compatible:
contains:
enum:
- adi,adis16575-2
- adi,adis16575-3
- adi,adis16576-2
- adi,adis16576-3
- adi,adis16577-2
- adi,adis16577-3
then:
properties:
spi-max-frequency:
maximum: 15000000
unevaluatedProperties: false
examples:
@@ -23,6 +23,12 @@ properties:
- adi,adis16497-1
- adi,adis16497-2
- adi,adis16497-3
- adi,adis16545-1
- adi,adis16545-2
- adi,adis16545-3
- adi,adis16547-1
- adi,adis16547-2
- adi,adis16547-3
reg:
maxItems: 1
@@ -16,7 +16,11 @@ description: |
properties:
compatible:
const: bosch,bmi160
oneOf:
- const: bosch,bmi160
- items:
- const: bosch,bmi120
- const: bosch,bmi160
reg:
maxItems: 1
@@ -4,14 +4,19 @@
$id: http://devicetree.org/schemas/iio/light/vishay,veml6075.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Vishay VEML6075 UVA and UVB sensor
title: Vishay VEML6075 UVA/B and VEML6040 RGBW sensors
maintainers:
- Javier Carrasco <javier.carrasco.cruz@gmail.com>
description:
VEML6040 datasheet at https://www.vishay.com/docs/84276/veml6040.pdf
properties:
compatible:
const: vishay,veml6075
enum:
- vishay,veml6040
- vishay,veml6075
reg:
maxItems: 1
@@ -26,6 +26,7 @@ properties:
- st,lis2dw12
- st,lis2hh12
- st,lis2dh12-accel
- st,lis2ds12
- st,lis302dl
- st,lis331dl-accel
- st,lis331dlh-accel
@@ -1,60 +0,0 @@
TI-NSPIRE Keypad
Required properties:
- compatible: Compatible property value should be "ti,nspire-keypad".
- reg: Physical base address of the peripheral and length of memory mapped
region.
- interrupts: The interrupt number for the peripheral.
- scan-interval: How often to scan in us. Based on a APB speed of 33MHz, the
maximum and minimum delay time is ~2000us and ~500us respectively
- row-delay: How long to wait before scanning each row.
- clocks: The clock this peripheral is attached to.
- linux,keymap: The keymap to use
(see Documentation/devicetree/bindings/input/matrix-keymap.txt)
Optional properties:
- active-low: Specify that the keypad is active low (i.e. logical low signifies
a key press).
Example:
input {
compatible = "ti,nspire-keypad";
reg = <0x900E0000 0x1000>;
interrupts = <16>;
scan-interval = <1000>;
row-delay = <200>;
clocks = <&apb_pclk>;
linux,keymap = <
0x0000001c 0x0001001c 0x00040039
0x0005002c 0x00060015 0x0007000b
0x0008000f 0x0100002d 0x01010011
0x0102002f 0x01030004 0x01040016
0x01050014 0x0106001f 0x01070002
0x010a006a 0x02000013 0x02010010
0x02020019 0x02030007 0x02040018
0x02050031 0x02060032 0x02070005
0x02080028 0x0209006c 0x03000026
0x03010025 0x03020024 0x0303000a
0x03040017 0x03050023 0x03060022
0x03070008 0x03080035 0x03090069
0x04000021 0x04010012 0x04020020
0x0404002e 0x04050030 0x0406001e
0x0407000d 0x04080037 0x04090067
0x05010038 0x0502000c 0x0503001b
0x05040034 0x0505001a 0x05060006
0x05080027 0x0509000e 0x050a006f
0x0600002b 0x0602004e 0x06030068
0x06040003 0x0605006d 0x06060009
0x06070001 0x0609000f 0x0708002a
0x0709001d 0x070a0033 >;
};
@@ -0,0 +1,74 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/input/ti,nspire-keypad.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: TI-NSPIRE Keypad
maintainers:
- Andrew Davis <afd@ti.com>
allOf:
- $ref: input.yaml#
- $ref: matrix-keymap.yaml#
properties:
compatible:
enum:
- ti,nspire-keypad
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
maxItems: 1
scan-interval:
$ref: /schemas/types.yaml#/definitions/uint32
description: How often to scan in us. Based on a APB speed of 33MHz, the
maximum and minimum delay time is ~2000us and ~500us respectively
row-delay:
$ref: /schemas/types.yaml#/definitions/uint32
description: How long to wait between scanning each row in us.
active-low:
description: Specify that the keypad is active low.
required:
- compatible
- reg
- interrupts
- clocks
- scan-interval
- row-delay
- linux,keymap
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/input/input.h>
keypad@900e0000 {
compatible = "ti,nspire-keypad";
reg = <0x900e0000 0x1000>;
interrupts = <16>;
clocks = <&apb_pclk>;
scan-interval = <1000>;
row-delay = <200>;
linux,keymap = <
MATRIX_KEY(0, 0, KEY_ENTER)
MATRIX_KEY(0, 1, KEY_ENTER)
MATRIX_KEY(0, 4, KEY_SPACE)
MATRIX_KEY(0, 5, KEY_Z)
MATRIX_KEY(0, 6, KEY_Y)
MATRIX_KEY(0, 7, KEY_0)
>;
};
@@ -57,6 +57,7 @@ Optional properties:
pendown-gpio (u32).
pendown-gpio GPIO handle describing the pin the !PENIRQ
line is connected to.
ti,hsync-gpios GPIO line to poll for hsync
wakeup-source use any event on touchscreen as wakeup event.
(Legacy property support: "linux,wakeup")
touchscreen-size-x General touchscreen binding, see [1].
@@ -39,6 +39,7 @@ properties:
- edt,edt-ft5406
- edt,edt-ft5506
- evervision,ev-ft5726
- focaltech,ft5426
- focaltech,ft5452
- focaltech,ft6236
- focaltech,ft8719
@@ -14,10 +14,14 @@ allOf:
properties:
compatible:
enum:
- eeti,exc3000
- eeti,exc80h60
- eeti,exc80h84
oneOf:
- const: eeti,exc3000
- const: eeti,exc80h60
- const: eeti,exc80h84
- items:
- enum:
- eeti,exc81w32
- const: eeti,exc80h84
reg:
const: 0x2a
interrupts:
@@ -1,25 +0,0 @@
* Elan eKTF2127 I2C touchscreen controller
Required properties:
- compatible : "elan,ektf2127" or "elan,ektf2132"
- reg : I2C slave address of the chip (0x40)
- interrupts : interrupt specification for the ektf2127 interrupt
- power-gpios : GPIO specification for the pin connected to the
ektf2127's wake input. This needs to be driven high
to take ektf2127 out of its low power state
For additional optional properties see: touchscreen.txt
Example:
i2c@00000000 {
ektf2127: touchscreen@15 {
compatible = "elan,ektf2127";
reg = <0x15>;
interrupt-parent = <&pio>;
interrupts = <6 11 IRQ_TYPE_EDGE_FALLING>
power-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>;
touchscreen-inverted-x;
touchscreen-swapped-x-y;
};
};
@@ -0,0 +1,58 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/input/touchscreen/elan,ektf2127.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Elan eKTF2127 I2C touchscreen controller
maintainers:
- Siebren Vroegindeweij <siebren.vroegindeweij@hotmail.com>
allOf:
- $ref: touchscreen.yaml#
properties:
compatible:
enum:
- elan,ektf2127
- elan,ektf2132
- elan,ektf2232
reg:
maxItems: 1
interrupts:
maxItems: 1
power-gpios:
maxItems: 1
required:
- compatible
- reg
- interrupts
- power-gpios
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
touchscreen@15 {
compatible = "elan,ektf2127";
reg = <0x15>;
interrupt-parent = <&pio>;
interrupts = <6 11 IRQ_TYPE_EDGE_FALLING>;
power-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>;
touchscreen-inverted-x;
touchscreen-swapped-x-y;
};
};
...
@@ -15,6 +15,7 @@ allOf:
properties:
compatible:
enum:
- himax,hx83100a
- himax,hx83112b
reg:
@@ -16,6 +16,7 @@ properties:
compatible:
enum:
- imagis,ist3032c
- imagis,ist3038
- imagis,ist3038b
- imagis,ist3038c
@@ -0,0 +1,51 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/interconnect/mediatek,mt8183-emi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: MediaTek External Memory Interface (EMI) Interconnect
maintainers:
- AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
description: |
EMI interconnect providers support system bandwidth requirements through
Dynamic Voltage Frequency Scaling Resource Collector (DVFSRC) hardware.
The provider is able to communicate with the DVFSRC through Secure Monitor
Call (SMC).
ICC provider ICC Nodes
---- ----
_________ |CPU | |--- |VPU |
_____ | |----- ---- | ----
| |->| DRAM | ---- | ----
|DRAM |->|scheduler|----- |GPU | |--- |DISP|
| |->| (EMI) | ---- | ----
|_____|->|_________|---. ----- | ----
/|\ `-|MMSYS|--|--- |VDEC|
| ----- | ----
| | ----
| change DRAM freq |--- |VENC|
-------- | ----
SMC --> | DVFSRC | | ----
-------- |--- |IMG |
| ----
| ----
|--- |CAM |
----
properties:
compatible:
enum:
- mediatek,mt8183-emi
- mediatek,mt8195-emi
'#interconnect-cells':
const: 1
required:
- compatible
- '#interconnect-cells'
unevaluatedProperties: false
@@ -0,0 +1,101 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interconnect/qcom,msm8953.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm MSM8953 Network-On-Chip interconnect
maintainers:
- Barnabas Czeman <barnabas.czeman@mainlining.org>
description: |
The Qualcomm MSM8953 interconnect providers support adjusting the
bandwidth requirements between the various NoC fabrics.
See also:
- dt-bindings/interconnect/qcom,msm8953.h
properties:
compatible:
enum:
- qcom,msm8953-bimc
- qcom,msm8953-pcnoc
- qcom,msm8953-snoc
reg:
maxItems: 1
clocks:
maxItems: 1
clock-names:
maxItems: 1
'#interconnect-cells':
const: 2
patternProperties:
'^interconnect-[a-z0-9\-]+$':
type: object
$ref: qcom,rpm-common.yaml#
unevaluatedProperties: false
description:
The interconnect providers do not have a separate QoS register space,
but share parent's space.
properties:
compatible:
const: qcom,msm8953-snoc-mm
required:
- compatible
- '#interconnect-cells'
required:
- compatible
- reg
- '#interconnect-cells'
allOf:
- $ref: qcom,rpm-common.yaml#
- if:
properties:
compatible:
const: qcom,msm8953-pcnoc
then:
properties:
clocks:
items:
- description: PCNOC USB3 AXI Clock.
clock-names:
const: pcnoc_usb3_axi
required:
- clocks
- clock-names
else:
properties:
clocks: false
clock-names: false
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/qcom,gcc-msm8953.h>
snoc: interconnect@580000 {
compatible = "qcom,msm8953-snoc";
reg = <0x580000 0x16080>;
#interconnect-cells = <2>;
snoc_mm: interconnect-snoc {
compatible = "qcom,msm8953-snoc-mm";
#interconnect-cells = <2>;
};
};
@@ -35,6 +35,10 @@ properties:
reg:
maxItems: 1
clocks:
minItems: 1
maxItems: 2
required:
- compatible
@@ -53,10 +57,50 @@ allOf:
required:
- reg
- if:
properties:
compatible:
contains:
enum:
- qcom,sc7280-aggre1-noc
then:
properties:
clocks:
items:
- description: aggre UFS PHY AXI clock
- description: aggre USB3 PRIM AXI clock
- if:
properties:
compatible:
contains:
enum:
- qcom,sc7280-aggre2-noc
then:
properties:
clocks:
items:
- description: RPMH CC IPA clock
- if:
properties:
compatible:
contains:
enum:
- qcom,sc7280-aggre1-noc
- qcom,sc7280-aggre2-noc
then:
required:
- clocks
else:
properties:
clocks: false
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/qcom,gcc-sc7280.h>
interconnect {
compatible = "qcom,sc7280-clk-virt";
#interconnect-cells = <2>;
@@ -69,3 +113,12 @@ examples:
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
interconnect@16e0000 {
reg = <0x016e0000 0x1c080>;
compatible = "qcom,sc7280-aggre1-noc";
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
clocks = <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
<&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>;
};
@@ -29,6 +29,9 @@ properties:
Defaults to 10 if unset.
default: 10
interrupts:
maxItems: 1
timeout-sec:
description: |
The stall detector expiration timeout measured in seconds.
@@ -43,9 +46,12 @@ additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
vmwdt@9030000 {
compatible = "qemu,vcpu-stall-detector";
reg = <0x9030000 0x10000>;
clock-frequency = <10>;
timeout-sec = <8>;
interrupts = <GIC_PPI 15 IRQ_TYPE_EDGE_RISING>;
};
@@ -28,6 +28,9 @@ properties:
description: phandle to the secure-monitor node
$ref: /schemas/types.yaml#/definitions/phandle
power-domains:
maxItems: 1
required:
- compatible
- clocks
@@ -28,7 +28,9 @@ properties:
- enum:
- mediatek,mt7622-efuse
- mediatek,mt7623-efuse
- mediatek,mt7981-efuse
- mediatek,mt7986-efuse
- mediatek,mt7988-efuse
- mediatek,mt8173-efuse
- mediatek,mt8183-efuse
- mediatek,mt8186-efuse
@@ -13,6 +13,35 @@ description: |+
MediaTek MT7621 PCIe subsys supports a single Root Complex (RC)
with 3 Root Ports. Each Root Port supports a Gen1 1-lane Link
MT7621 PCIe HOST Topology
.-------.
| |
| CPU |
| |
'-------'
|
|
|
v
.------------------.
.-----------| HOST/PCI Bridge |------------.
| '------------------' | Type1
BUS0 | | | Access
v v v On Bus0
.-------------. .-------------. .-------------.
| VIRTUAL P2P | | VIRTUAL P2P | | VIRTUAL P2P |
| BUS0 | | BUS0 | | BUS0 |
| DEV0 | | DEV1 | | DEV2 |
'-------------' '-------------' '-------------'
Type0 | Type0 | Type0 |
Access BUS1 | Access BUS2| Access BUS3|
On Bus1 v On Bus2 v On Bus3 v
.----------. .----------. .----------.
| Device 0 | | Device 0 | | Device 0 |
| Func 0 | | Func 0 | | Func 0 |
'----------' '----------' '----------'
allOf:
- $ref: /schemas/pci/pci-host-bridge.yaml#
@@ -10,21 +10,13 @@ maintainers:
- Daire McNamara <daire.mcnamara@microchip.com>
allOf:
- $ref: /schemas/pci/pci-host-bridge.yaml#
- $ref: plda,xpressrich3-axi-common.yaml#
- $ref: /schemas/interrupt-controller/msi-controller.yaml#
properties:
compatible:
const: microchip,pcie-host-1.0 # PolarFire
reg:
maxItems: 2
reg-names:
items:
- const: cfg
- const: apb
clocks:
description:
Fabric Interface Controllers, FICs, are the interface between the FPGA
@@ -52,18 +44,6 @@ properties:
items:
pattern: '^fic[0-3]$'
interrupts:
minItems: 1
items:
- description: PCIe host controller
- description: builtin MSI controller
interrupt-names:
minItems: 1
items:
- const: pcie
- const: msi
ranges:
minItems: 1
maxItems: 3
@@ -72,39 +52,6 @@ properties:
minItems: 1
maxItems: 6
msi-controller:
description: Identifies the node as an MSI controller.
msi-parent:
description: MSI controller the device is capable of using.
interrupt-controller:
type: object
properties:
'#address-cells':
const: 0
'#interrupt-cells':
const: 1
interrupt-controller: true
required:
- '#address-cells'
- '#interrupt-cells'
- interrupt-controller
additionalProperties: false
required:
- reg
- reg-names
- "#interrupt-cells"
- interrupts
- interrupt-map-mask
- interrupt-map
- msi-controller
unevaluatedProperties: false
examples:
@@ -0,0 +1,75 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pci/plda,xpressrich3-axi-common.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: PLDA XpressRICH PCIe host common properties
maintainers:
- Daire McNamara <daire.mcnamara@microchip.com>
- Kevin Xie <kevin.xie@starfivetech.com>
description:
Generic PLDA XpressRICH PCIe host common properties.
allOf:
- $ref: /schemas/pci/pci-host-bridge.yaml#
properties:
reg:
maxItems: 2
reg-names:
items:
- const: cfg
- const: apb
interrupts:
minItems: 1
items:
- description: PCIe host controller
- description: builtin MSI controller
interrupt-names:
minItems: 1
items:
- const: pcie
- const: msi
msi-controller:
description: Identifies the node as an MSI controller.
msi-parent:
description: MSI controller the device is capable of using.
interrupt-controller:
type: object
properties:
'#address-cells':
const: 0
'#interrupt-cells':
const: 1
interrupt-controller: true
required:
- '#address-cells'
- '#interrupt-cells'
- interrupt-controller
additionalProperties: false
required:
- reg
- reg-names
- interrupts
- msi-controller
- "#interrupt-cells"
- interrupt-map-mask
- interrupt-map
additionalProperties: true
...
@@ -13,6 +13,7 @@ properties:
compatible:
oneOf:
- enum:
- qcom,sa8775p-pcie-ep
- qcom,sdx55-pcie-ep
- qcom,sm8450-pcie-ep
- items:
@@ -20,6 +21,7 @@ properties:
- const: qcom,sdx55-pcie-ep
reg:
minItems: 6
items:
- description: Qualcomm-specific PARF configuration registers
- description: DesignWare PCIe registers
@@ -27,8 +29,10 @@ properties:
- description: Address Translation Unit (ATU) registers
- description: Memory region used to map remote RC address space
- description: BAR memory region
- description: DMA register space
reg-names:
minItems: 6
items:
- const: parf
- const: dbi
@@ -36,13 +40,14 @@ properties:
- const: atu
- const: addr_space
- const: mmio
- const: dma
clocks:
minItems: 7
minItems: 5
maxItems: 8
clock-names:
minItems: 7
minItems: 5
maxItems: 8
qcom,perst-regs:
@@ -57,14 +62,18 @@ properties:
- description: Perst separation enable offset
interrupts:
minItems: 2
items:
- description: PCIe Global interrupt
- description: PCIe Doorbell interrupt
- description: DMA interrupt
interrupt-names:
minItems: 2
items:
- const: global
- const: doorbell
- const: dma
reset-gpios:
description: GPIO used as PERST# input signal
@@ -125,6 +134,10 @@ allOf:
- qcom,sdx55-pcie-ep
then:
properties:
reg:
maxItems: 6
reg-names:
maxItems: 6
clocks:
items:
- description: PCIe Auxiliary clock
@@ -143,6 +156,10 @@ allOf:
- const: slave_q2a
- const: sleep
- const: ref
interrupts:
maxItems: 2
interrupt-names:
maxItems: 2
- if:
properties:
@@ -152,6 +169,10 @@ allOf:
- qcom,sm8450-pcie-ep
then:
properties:
reg:
maxItems: 6
reg-names:
maxItems: 6
clocks:
items:
- description: PCIe Auxiliary clock
@@ -172,6 +193,45 @@ allOf:
- const: ref
- const: ddrss_sf_tbu
- const: aggre_noc_axi
interrupts:
maxItems: 2
interrupt-names:
maxItems: 2
- if:
properties:
compatible:
contains:
enum:
- qcom,sa8775p-pcie-ep
then:
properties:
reg:
minItems: 7
maxItems: 7
reg-names:
minItems: 7
maxItems: 7
clocks:
items:
- description: PCIe Auxiliary clock
- description: PCIe CFG AHB clock
- description: PCIe Master AXI clock
- description: PCIe Slave AXI clock
- description: PCIe Slave Q2A AXI clock
clock-names:
items:
- const: aux
- const: cfg
- const: bus_master
- const: bus_slave
- const: slave_q2a
interrupts:
minItems: 3
maxItems: 3
interrupt-names:
minItems: 3
maxItems: 3
unevaluatedProperties: false
@@ -69,6 +69,10 @@ properties:
- const: msi6
- const: msi7
operating-points-v2: true
opp-table:
type: object
resets:
maxItems: 1
@@ -19,11 +19,10 @@ properties:
const: qcom,pcie-x1e80100
reg:
minItems: 5
minItems: 6
maxItems: 6
reg-names:
minItems: 5
items:
- const: parf # Qualcomm specific registers
- const: dbi # DesignWare PCIe registers
@@ -0,0 +1,126 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pci/rockchip-dw-pcie-common.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: DesignWare based PCIe RC/EP controller on Rockchip SoCs
maintainers:
- Shawn Lin <shawn.lin@rock-chips.com>
- Simon Xue <xxm@rock-chips.com>
- Heiko Stuebner <heiko@sntech.de>
description: |+
Generic properties for the DesignWare based PCIe RC/EP controller on Rockchip
SoCs.
properties:
clocks:
minItems: 5
items:
- description: AHB clock for PCIe master
- description: AHB clock for PCIe slave
- description: AHB clock for PCIe dbi
- description: APB clock for PCIe
- description: Auxiliary clock for PCIe
- description: PIPE clock
- description: Reference clock for PCIe
clock-names:
minItems: 5
items:
- const: aclk_mst
- const: aclk_slv
- const: aclk_dbi
- const: pclk
- const: aux
- const: pipe
- const: ref
interrupts:
minItems: 5
items:
- description:
Combined system interrupt, which is used to signal the following
interrupts - phy_link_up, dll_link_up, link_req_rst_not, hp_pme,
hp, hp_msi, link_auto_bw, link_auto_bw_msi, bw_mgt, bw_mgt_msi,
edma_wr, edma_rd, dpa_sub_upd, rbar_update, link_eq_req, ep_elbi_app
- description:
Combined PM interrupt, which is used to signal the following
interrupts - linkst_in_l1sub, linkst_in_l1, linkst_in_l2,
linkst_in_l0s, linkst_out_l1sub, linkst_out_l1, linkst_out_l2,
linkst_out_l0s, pm_dstate_update
- description:
Combined message interrupt, which is used to signal the following
interrupts - ven_msg, unlock_msg, ltr_msg, cfg_pme, cfg_pme_msi,
pm_pme, pm_to_ack, pm_turnoff, obff_idle, obff_obff, obff_cpu_active
- description:
Combined legacy interrupt, which is used to signal the following
interrupts - inta, intb, intc, intd, tx_inta, tx_intb, tx_intc,
tx_intd
- description:
Combined error interrupt, which is used to signal the following
interrupts - aer_rc_err, aer_rc_err_msi, rx_cpl_timeout,
tx_cpl_timeout, cor_err_sent, nf_err_sent, f_err_sent, cor_err_rx,
nf_err_rx, f_err_rx, radm_qoverflow
- description:
eDMA write channel 0 interrupt
- description:
eDMA write channel 1 interrupt
- description:
eDMA read channel 0 interrupt
- description:
eDMA read channel 1 interrupt
interrupt-names:
minItems: 5
items:
- const: sys
- const: pmc
- const: msg
- const: legacy
- const: err
- const: dma0
- const: dma1
- const: dma2
- const: dma3
num-lanes: true
phys:
maxItems: 1
phy-names:
const: pcie-phy
power-domains:
maxItems: 1
resets:
minItems: 1
maxItems: 2
reset-names:
oneOf:
- const: pipe
- items:
- const: pwr
- const: pipe
required:
- compatible
- reg
- reg-names
- clocks
- clock-names
- num-lanes
- phys
- phy-names
- power-domains
- resets
- reset-names
additionalProperties: true
...
@@ -0,0 +1,95 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pci/rockchip-dw-pcie-ep.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: DesignWare based PCIe Endpoint controller on Rockchip SoCs
maintainers:
- Niklas Cassel <cassel@kernel.org>
description: |+
RK3588 SoC PCIe Endpoint controller is based on the Synopsys DesignWare
PCIe IP and thus inherits all the common properties defined in
snps,dw-pcie-ep.yaml.
allOf:
- $ref: /schemas/pci/snps,dw-pcie-ep.yaml#
- $ref: /schemas/pci/rockchip-dw-pcie-common.yaml#
properties:
compatible:
enum:
- rockchip,rk3568-pcie-ep
- rockchip,rk3588-pcie-ep
reg:
items:
- description: Data Bus Interface (DBI) registers
- description: Data Bus Interface (DBI) shadow registers
- description: Rockchip designed configuration registers
- description: Memory region used to map remote RC address space
- description: Internal Address Translation Unit (iATU) registers
reg-names:
items:
- const: dbi
- const: dbi2
- const: apb
- const: addr_space
- const: atu
required:
- interrupts
- interrupt-names
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/rockchip,rk3588-cru.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/power/rk3588-power.h>
#include <dt-bindings/reset/rockchip,rk3588-cru.h>
soc {
#address-cells = <2>;
#size-cells = <2>;
pcie3x4_ep: pcie-ep@fe150000 {
compatible = "rockchip,rk3588-pcie-ep";
reg = <0xa 0x40000000 0x0 0x00100000>,
<0xa 0x40100000 0x0 0x00100000>,
<0x0 0xfe150000 0x0 0x00010000>,
<0x9 0x00000000 0x0 0x40000000>,
<0xa 0x40300000 0x0 0x00100000>;
reg-names = "dbi", "dbi2", "apb", "addr_space", "atu";
clocks = <&cru ACLK_PCIE_4L_MSTR>, <&cru ACLK_PCIE_4L_SLV>,
<&cru ACLK_PCIE_4L_DBI>, <&cru PCLK_PCIE_4L>,
<&cru CLK_PCIE_AUX0>, <&cru CLK_PCIE4L_PIPE>;
clock-names = "aclk_mst", "aclk_slv",
"aclk_dbi", "pclk",
"aux", "pipe";
interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH 0>;
interrupt-names = "sys", "pmc", "msg", "legacy", "err",
"dma0", "dma1", "dma2", "dma3";
max-link-speed = <3>;
num-lanes = <4>;
phys = <&pcie30phy>;
phy-names = "pcie-phy";
power-domains = <&power RK3588_PD_PCIE>;
resets = <&cru SRST_PCIE0_POWER_UP>, <&cru SRST_P_PCIE0>;
reset-names = "pwr", "pipe";
};
};
...
@@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/pci/rockchip-dw-pcie.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: DesignWare based PCIe controller on Rockchip SoCs
title: DesignWare based PCIe Root Complex controller on Rockchip SoCs
maintainers:
- Shawn Lin <shawn.lin@rock-chips.com>
@@ -12,12 +12,13 @@ maintainers:
- Heiko Stuebner <heiko@sntech.de>
description: |+
RK3568 SoC PCIe host controller is based on the Synopsys DesignWare
RK3568 SoC PCIe Root Complex controller is based on the Synopsys DesignWare
PCIe IP and thus inherits all the common properties defined in
snps,dw-pcie.yaml.
allOf:
- $ref: /schemas/pci/snps,dw-pcie.yaml#
- $ref: /schemas/pci/rockchip-dw-pcie-common.yaml#
properties:
compatible:
@@ -40,61 +41,6 @@ properties:
- const: apb
- const: config
clocks:
minItems: 5
items:
- description: AHB clock for PCIe master
- description: AHB clock for PCIe slave
- description: AHB clock for PCIe dbi
- description: APB clock for PCIe
- description: Auxiliary clock for PCIe
- description: PIPE clock
- description: Reference clock for PCIe
clock-names:
minItems: 5
items:
- const: aclk_mst
- const: aclk_slv
- const: aclk_dbi
- const: pclk
- const: aux
- const: pipe
- const: ref
interrupts:
items:
- description:
Combined system interrupt, which is used to signal the following
interrupts - phy_link_up, dll_link_up, link_req_rst_not, hp_pme,
hp, hp_msi, link_auto_bw, link_auto_bw_msi, bw_mgt, bw_mgt_msi,
edma_wr, edma_rd, dpa_sub_upd, rbar_update, link_eq_req, ep_elbi_app
- description:
Combined PM interrupt, which is used to signal the following
interrupts - linkst_in_l1sub, linkst_in_l1, linkst_in_l2,
linkst_in_l0s, linkst_out_l1sub, linkst_out_l1, linkst_out_l2,
linkst_out_l0s, pm_dstate_update
- description:
Combined message interrupt, which is used to signal the following
interrupts - ven_msg, unlock_msg, ltr_msg, cfg_pme, cfg_pme_msi,
pm_pme, pm_to_ack, pm_turnoff, obff_idle, obff_obff, obff_cpu_active
- description:
Combined legacy interrupt, which is used to signal the following
interrupts - inta, intb, intc, intd
- description:
Combined error interrupt, which is used to signal the following
interrupts - aer_rc_err, aer_rc_err_msi, rx_cpl_timeout,
tx_cpl_timeout, cor_err_sent, nf_err_sent, f_err_sent, cor_err_rx,
nf_err_rx, f_err_rx, radm_qoverflow
interrupt-names:
items:
- const: sys
- const: pmc
- const: msg
- const: legacy
- const: err
legacy-interrupt-controller:
description: Interrupt controller node for handling legacy PCI interrupts.
type: object
@@ -119,47 +65,14 @@ properties:
msi-map: true
num-lanes: true
phys:
maxItems: 1
phy-names:
const: pcie-phy
power-domains:
maxItems: 1
ranges:
minItems: 2
maxItems: 3
resets:
minItems: 1
maxItems: 2
reset-names:
oneOf:
- const: pipe
- items:
- const: pwr
- const: pipe
vpcie3v3-supply: true
required:
- compatible
- reg
- reg-names
- clocks
- clock-names
- msi-map
- num-lanes
- phys
- phy-names
- power-domains
- resets
- reset-names
unevaluatedProperties: false
@@ -100,7 +100,7 @@ properties:
for new bindings.
oneOf:
- description: See native 'elbi/app' CSR region for details.
enum: [ link, appl ]
enum: [ apb, link, appl ]
- description: See native 'atu' CSR region for details.
enum: [ atu_dma ]
allOf:
@@ -151,12 +151,21 @@ properties:
Application-specific IRQ raised depending on the vendor-specific
events basis.
const: app
- description:
Interrupts triggered when the controller itself (in Endpoint mode)
has sent an Assert_INT{A,B,C,D}/Desassert_INT{A,B,C,D} message to
the upstream device.
pattern: "^tx_int(a|b|c|d)$"
- description:
Combined interrupt signal raised when the controller has sent an
Assert_INT{A,B,C,D} message. See "^tx_int(a|b|c|d)$" for details.
const: legacy
- description:
Vendor-specific IRQ names. Consider using the generic names above
for new bindings.
oneOf:
- description: See native "app" IRQ for details
enum: [ intr ]
enum: [ intr, sys, pmc, msg, err ]
max-functions:
maximum: 32
@@ -0,0 +1,120 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pci/starfive,jh7110-pcie.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: StarFive JH7110 PCIe host controller
maintainers:
- Kevin Xie <kevin.xie@starfivetech.com>
allOf:
- $ref: plda,xpressrich3-axi-common.yaml#
properties:
compatible:
const: starfive,jh7110-pcie
clocks:
items:
- description: NOC bus clock
- description: Transport layer clock
- description: AXI MST0 clock
- description: APB clock
clock-names:
items:
- const: noc
- const: tl
- const: axi_mst0
- const: apb
resets:
items:
- description: AXI MST0 reset
- description: AXI SLAVE0 reset
- description: AXI SLAVE reset
- description: PCIE BRIDGE reset
- description: PCIE CORE reset
- description: PCIE APB reset
reset-names:
items:
- const: mst0
- const: slv0
- const: slv
- const: brg
- const: core
- const: apb
starfive,stg-syscon:
$ref: /schemas/types.yaml#/definitions/phandle-array
description:
The phandle to System Register Controller syscon node.
perst-gpios:
description: GPIO controlled connection to PERST# signal
maxItems: 1
phys:
description:
Specified PHY is attached to PCIe controller.
maxItems: 1
required:
- clocks
- resets
- starfive,stg-syscon
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
soc {
#address-cells = <2>;
#size-cells = <2>;
pcie@940000000 {
compatible = "starfive,jh7110-pcie";
reg = <0x9 0x40000000 0x0 0x10000000>,
<0x0 0x2b000000 0x0 0x1000000>;
reg-names = "cfg", "apb";
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
device_type = "pci";
ranges = <0x82000000 0x0 0x30000000 0x0 0x30000000 0x0 0x08000000>,
<0xc3000000 0x9 0x00000000 0x9 0x00000000 0x0 0x40000000>;
starfive,stg-syscon = <&stg_syscon>;
bus-range = <0x0 0xff>;
interrupt-parent = <&plic>;
interrupts = <56>;
interrupt-map-mask = <0x0 0x0 0x0 0x7>;
interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc0 0x1>,
<0x0 0x0 0x0 0x2 &pcie_intc0 0x2>,
<0x0 0x0 0x0 0x3 &pcie_intc0 0x3>,
<0x0 0x0 0x0 0x4 &pcie_intc0 0x4>;
msi-controller;
clocks = <&syscrg 86>,
<&stgcrg 10>,
<&stgcrg 8>,
<&stgcrg 9>;
clock-names = "noc", "tl", "axi_mst0", "apb";
resets = <&stgcrg 11>,
<&stgcrg 12>,
<&stgcrg 13>,
<&stgcrg 14>,
<&stgcrg 15>,
<&stgcrg 16>;
perst-gpios = <&gpios 26 GPIO_ACTIVE_LOW>;
phys = <&pciephy0>;
pcie_intc0: interrupt-controller {
#address-cells = <0>;
#interrupt-cells = <1>;
interrupt-controller;
};
};
};
@@ -92,7 +92,7 @@ examples:
<0 0 0 3 &pcie_intc_0 2>,
<0 0 0 4 &pcie_intc_0 3>;
bus-range = <0x00 0xff>;
ranges = <0x02000000 0x0 0xe0000000 0x0 0xe0000000 0x0 0x10000000>,
ranges = <0x02000000 0x0 0xe0010000 0x0 0xe0010000 0x0 0x10000000>,
<0x43000000 0x80 0x00000000 0x80 0x00000000 0x0 0x80000000>;
msi-map = <0x0 &its_gic 0x0 0x10000>;
reg = <0x0 0xfca10000 0x0 0x1000>,
@@ -37,6 +37,7 @@ properties:
- mediatek,mt7623-uart
- mediatek,mt7629-uart
- mediatek,mt7986-uart
- mediatek,mt7988-uart
- mediatek,mt8127-uart
- mediatek,mt8135-uart
- mediatek,mt8173-uart
@@ -28,6 +28,9 @@ properties:
clocks:
maxItems: 1
reset-gpios:
maxItems: 1
clock-frequency:
description:
When there is no clock provider visible to the platform, this
@@ -91,6 +94,7 @@ unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
@@ -120,6 +124,7 @@ examples:
compatible = "nxp,sc16is752";
reg = <0x54>;
clocks = <&clk20m>;
reset-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpio3>;
interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
nxp,modem-control-line-ports = <0 1>; /* Ports 0 and 1 as modem control lines */
@@ -9,9 +9,6 @@ title: Renesas Serial Communication Interface with FIFO (SCIF)
maintainers:
- Geert Uytterhoeven <geert+renesas@glider.be>
allOf:
- $ref: serial.yaml#
properties:
compatible:
oneOf:
@@ -83,6 +80,8 @@ properties:
- renesas,scif-r9a08g045 # RZ/G3S
- const: renesas,scif-r9a07g044 # RZ/G2{L,LC} fallback
- const: renesas,scif-r9a09g057 # RZ/V2H(P)
reg:
maxItems: 1
@@ -90,11 +89,6 @@ properties:
oneOf:
- items:
- description: A combined interrupt
- items:
- description: Error interrupt
- description: Receive buffer full interrupt
- description: Transmit buffer empty interrupt
- description: Break interrupt
- items:
- description: Error interrupt
- description: Receive buffer full interrupt
@@ -102,21 +96,23 @@ properties:
- description: Break interrupt
- description: Data Ready interrupt
- description: Transmit End interrupt
- description: Transmit End/Data Ready interrupt
- description: Receive buffer full interrupt (EDGE trigger)
- description: Transmit buffer empty interrupt (EDGE trigger)
minItems: 4
interrupt-names:
oneOf:
- items:
- const: eri
- const: rxi
- const: txi
- const: bri
- items:
- const: eri
- const: rxi
- const: txi
- const: bri
- const: dri
- const: tei
minItems: 4
items:
- const: eri
- const: rxi
- const: txi
- const: bri
- const: dri
- const: tei
- const: tei-dri
- const: rxi-edge
- const: txi-edge
clocks:
minItems: 1
@@ -161,18 +157,92 @@ required:
- clock-names
- power-domains
if:
properties:
compatible:
contains:
enum:
- renesas,rcar-gen2-scif
- renesas,rcar-gen3-scif
- renesas,rcar-gen4-scif
- renesas,scif-r9a07g044
then:
required:
- resets
allOf:
- $ref: serial.yaml#
- if:
properties:
compatible:
contains:
enum:
- renesas,rcar-gen2-scif
- renesas,rcar-gen3-scif
- renesas,rcar-gen4-scif
- renesas,scif-r9a07g044
- renesas,scif-r9a09g057
then:
required:
- resets
- if:
properties:
compatible:
contains:
enum:
- renesas,rcar-gen1-scif
- renesas,rcar-gen2-scif
- renesas,rcar-gen3-scif
- renesas,rcar-gen4-scif
then:
properties:
interrupts:
maxItems: 1
interrupt-names: false
else:
required:
- interrupt-names
- if:
properties:
compatible:
contains:
enum:
- renesas,scif-r7s72100
then:
properties:
interrupts:
minItems: 4
maxItems: 4
interrupt-names:
maxItems: 4
- if:
properties:
compatible:
contains:
enum:
- renesas,scif-r7s9210
- renesas,scif-r9a07g044
then:
properties:
interrupts:
minItems: 6
maxItems: 6
interrupt-names:
minItems: 6
maxItems: 6
- if:
properties:
compatible:
contains:
const: renesas,scif-r9a09g057
then:
properties:
clocks:
maxItems: 1
clock-names:
maxItems: 1
interrupts:
minItems: 9
interrupt-names:
minItems: 9
unevaluatedProperties: false
@@ -13,6 +13,20 @@ allOf:
- $ref: serial.yaml#
- $ref: rs485.yaml#
- if:
properties:
compatible:
contains:
const: starfive,jh7110-uart
then:
properties:
resets:
minItems: 2
else:
properties:
resets:
maxItems: 1
properties:
compatible:
oneOf:
@@ -48,6 +62,7 @@ properties:
- enum:
- starfive,jh7100-hsuart
- starfive,jh7100-uart
- starfive,jh7110-uart
- const: snps,dw-apb-uart
- const: snps,dw-apb-uart
@@ -82,7 +97,8 @@ properties:
type: boolean
resets:
maxItems: 1
minItems: 1
maxItems: 2
reg-shift: true
@@ -0,0 +1,46 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/serial/via,vt8500-uart.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: VIA VT8500 and WonderMedia WM8xxx UART Controller
maintainers:
- Alexey Charkov <alchark@gmail.com>
allOf:
- $ref: serial.yaml
properties:
compatible:
enum:
- via,vt8500-uart # up to WM8850/WM8950
- wm,wm8880-uart # for WM8880 and later
clocks:
maxItems: 1
interrupts:
maxItems: 1
reg:
maxItems: 1
required:
- compatible
- clocks
- interrupts
- reg
unevaluatedProperties: false
examples:
- |
serial@d8200000 {
compatible = "via,vt8500-uart";
reg = <0xd8200000 0x1040>;
interrupts = <32>;
clocks = <&clkuart0>;
};
@@ -1,27 +0,0 @@
* VIA VT8500 and WonderMedia WM8xxx UART Controller
Required properties:
- compatible: should be "via,vt8500-uart" (for VIA/WonderMedia chips up to and
including WM8850/WM8950), or "wm,wm8880-uart" (for WM8880 and later)
- reg: base physical address of the controller and length of memory mapped
region.
- interrupts: hardware interrupt number
- clocks: shall be the input parent clock phandle for the clock. This should
be the 24Mhz reference clock.
Aliases may be defined to ensure the correct ordering of the uarts.
Example:
aliases {
serial0 = &uart0;
};
uart0: serial@d8200000 {
compatible = "via,vt8500-uart";
reg = <0xd8200000 0x1040>;
interrupts = <32>;
clocks = <&clkuart0>;
};
@@ -42,8 +42,11 @@ properties:
- const: otg
- const: wakeup
dr_mode:
enum: [host, otg, peripheral]
port:
$ref: /schemas/graph.yaml#/properties/port
description:
This port is used with the 'usb-role-switch' property to connect the
cdns3 to type C connector.
maximum-speed:
enum: [super-speed, high-speed, full-speed]
@@ -70,6 +73,9 @@ properties:
description: Enable resetting of PHY if Rx fail is detected
type: boolean
dependencies:
port: [ usb-role-switch ]
required:
- compatible
- reg
@@ -77,7 +83,10 @@ required:
- interrupts
- interrupt-names
additionalProperties: false
allOf:
- $ref: usb-drd.yaml#
unevaluatedProperties: false
examples:
- |
@@ -188,7 +188,7 @@ required:
- clocks
- clock-names
additionalProperties: false
unevaluatedProperties: false
examples:
- |
@@ -0,0 +1,95 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/usb/fsl,usb2.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Freescale SOC USB controllers
maintainers:
- Frank Li <Frank.Li@nxp.com>
description: |
The device node for a USB controller that is part of a Freescale
SOC is as described in the document "Open Firmware Recommended
Practice: Universal Serial Bus" with the following modifications
and additions.
properties:
compatible:
oneOf:
- enum:
- fsl-usb2-mph
- fsl-usb2-dr
- items:
- enum:
- fsl-usb2-dr-v2.2
- fsl-usb2-dr-v2.5
- const: fsl-usb2-dr
reg:
maxItems: 1
interrupts:
maxItems: 1
phy_type:
$ref: /schemas/types.yaml#/definitions/string
enum: [ulpi, serial, utmi, utmi_wide]
port0:
$ref: /schemas/types.yaml#/definitions/flag
description:
Indicates port0 is connected for fsl-usb2-mph compatible controllers.
port1:
$ref: /schemas/types.yaml#/definitions/flag
description:
Indicates port1 is connected for "fsl-usb2-mph" compatible controllers.
fsl,invert-drvvbus:
$ref: /schemas/types.yaml#/definitions/flag
description:
for MPC5121 USB0 only. Indicates the
port power polarity of internal PHY signal DRVVBUS is inverted.
fsl,invert-pwr-fault:
$ref: /schemas/types.yaml#/definitions/flag
description:
for MPC5121 USB0 only. Indicates
the PWR_FAULT signal polarity is inverted.
required:
- compatible
- reg
- interrupts
- phy_type
allOf:
- $ref: usb-drd.yaml#
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
usb@22000 {
compatible = "fsl-usb2-mph";
reg = <22000 1000>;
interrupts = <27 IRQ_TYPE_EDGE_RISING>;
phy_type = "ulpi";
port0;
port1;
};
- |
#include <dt-bindings/interrupt-controller/irq.h>
usb@23000 {
compatible = "fsl-usb2-dr";
reg = <23000 1000>;
interrupts = <26 IRQ_TYPE_EDGE_RISING>;
dr_mode = "otg";
phy_type = "ulpi";
};
@@ -1,81 +0,0 @@
Freescale SOC USB controllers
The device node for a USB controller that is part of a Freescale
SOC is as described in the document "Open Firmware Recommended
Practice : Universal Serial Bus" with the following modifications
and additions :
Required properties :
- compatible : Should be "fsl-usb2-mph" for multi port host USB
controllers, or "fsl-usb2-dr" for dual role USB controllers
or "fsl,mpc5121-usb2-dr" for dual role USB controllers of MPC5121.
Wherever applicable, the IP version of the USB controller should
also be mentioned (for eg. fsl-usb2-dr-v2.2 for bsc9132).
- phy_type : For multi port host USB controllers, should be one of
"ulpi", or "serial". For dual role USB controllers, should be
one of "ulpi", "utmi", "utmi_wide", or "serial".
- reg : Offset and length of the register set for the device
- port0 : boolean; if defined, indicates port0 is connected for
fsl-usb2-mph compatible controllers. Either this property or
"port1" (or both) must be defined for "fsl-usb2-mph" compatible
controllers.
- port1 : boolean; if defined, indicates port1 is connected for
fsl-usb2-mph compatible controllers. Either this property or
"port0" (or both) must be defined for "fsl-usb2-mph" compatible
controllers.
- dr_mode : indicates the working mode for "fsl-usb2-dr" compatible
controllers. Can be "host", "peripheral", or "otg". Default to
"host" if not defined for backward compatibility.
Recommended properties :
- interrupts : <a b> where a is the interrupt number and b is a
field that represents an encoding of the sense and level
information for the interrupt. This should be encoded based on
the information in section 2) depending on the type of interrupt
controller you have.
Optional properties :
- fsl,invert-drvvbus : boolean; for MPC5121 USB0 only. Indicates the
port power polarity of internal PHY signal DRVVBUS is inverted.
- fsl,invert-pwr-fault : boolean; for MPC5121 USB0 only. Indicates
the PWR_FAULT signal polarity is inverted.
Example multi port host USB controller device node :
usb@22000 {
compatible = "fsl-usb2-mph";
reg = <22000 1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <700>;
interrupts = <27 1>;
phy_type = "ulpi";
port0;
port1;
};
Example dual role USB controller device node :
usb@23000 {
compatible = "fsl-usb2-dr";
reg = <23000 1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <700>;
interrupts = <26 1>;
dr_mode = "otg";
phy = "ulpi";
};
Example dual role USB controller device node for MPC5121ADS:
usb@4000 {
compatible = "fsl,mpc5121-usb2-dr";
reg = <0x4000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = < &ipic >;
interrupts = <44 0x8>;
dr_mode = "otg";
phy_type = "utmi_wide";
fsl,invert-drvvbus;
fsl,invert-pwr-fault;
};
@@ -9,9 +9,6 @@ title: Genesys Logic USB hub controller
maintainers:
- Icenowy Zheng <uwu@icenowy.me>
allOf:
- $ref: usb-device.yaml#
properties:
compatible:
enum:
@@ -27,17 +24,44 @@ properties:
vdd-supply:
description:
the regulator that provides 3.3V core power to the hub.
The regulator that provides 3.3V or 5.0V core power to the hub.
peer-hub:
$ref: /schemas/types.yaml#/definitions/phandle
description:
phandle to the peer hub on the controller.
For onboard hub controllers that support USB 3.x and USB 2.0 hubs
with shared resets and power supplies, this property is used to identify
the hubs with which these are shared.
required:
- compatible
- reg
allOf:
- $ref: usb-device.yaml#
- if:
properties:
compatible:
contains:
enum:
- usb5e3,608
then:
properties:
peer-hub: false
vdd-supply: false
- if:
properties:
compatible:
contains:
enum:
- usb5e3,610
- usb5e3,620
then:
properties:
peer-hub: true
vdd-supply: true
additionalProperties: false
examples:
@@ -54,3 +78,29 @@ examples:
reset-gpios = <&pio 7 2 GPIO_ACTIVE_LOW>;
};
};
- |
#include <dt-bindings/gpio/gpio.h>
usb {
dr_mode = "host";
#address-cells = <1>;
#size-cells = <0>;
/* 2.0 hub on port 1 */
hub_2_0: hub@1 {
compatible = "usb5e3,610";
reg = <1>;
peer-hub = <&hub_3_0>;
reset-gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
vdd-supply = <&vcc_5v>;
};
/* 3.1 hub on port 4 */
hub_3_0: hub@2 {
compatible = "usb5e3,620";
reg = <2>;
peer-hub = <&hub_2_0>;
reset-gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
vdd-supply = <&vcc_5v>;
};
};
@@ -22,6 +22,7 @@ properties:
- nxp,cbdtu02043
- onnn,fsusb43l10x
- pericom,pi3usb102
- ti,tmuxhs4212
- const: gpio-sbu-mux
enable-gpios:
@@ -44,13 +45,18 @@ properties:
required:
- compatible
- enable-gpios
- select-gpios
- orientation-switch
- port
allOf:
- $ref: usb-switch.yaml#
- if:
required:
- mode-switch
then:
required:
- enable-gpios
additionalProperties: false
@@ -34,6 +34,13 @@ properties:
clocks:
maxItems: 1
microchip,ext-vbus-drv:
description:
Some ULPI USB PHYs do not support an internal VBUS supply and driving
the CPEN pin requires the configuration of the UPLI_USE__EXTVBUS
bit in ULPI_BUSCONTROL.
$ref: /schemas/types.yaml#/definitions/flag
required:
- compatible
- reg
@@ -30,6 +30,8 @@ properties:
- qcom,sa8775p-dwc3
- qcom,sc7180-dwc3
- qcom,sc7280-dwc3
- qcom,sc8180x-dwc3
- qcom,sc8180x-dwc3-mp
- qcom,sc8280xp-dwc3
- qcom,sc8280xp-dwc3-mp
- qcom,sdm660-dwc3
@@ -334,6 +336,8 @@ allOf:
contains:
enum:
- qcom,qcm2290-dwc3
- qcom,sc8180x-dwc3
- qcom,sc8180x-dwc3-mp
- qcom,sm6115-dwc3
- qcom,sm6125-dwc3
- qcom,sm8150-dwc3
@@ -448,6 +452,7 @@ allOf:
- qcom,sa8775p-dwc3
- qcom,sc7180-dwc3
- qcom,sc7280-dwc3
- qcom,sc8180x-dwc3
- qcom,sc8280xp-dwc3
- qcom,sdm670-dwc3
- qcom,sdm845-dwc3
@@ -475,6 +480,30 @@ allOf:
- const: dm_hs_phy_irq
- const: ss_phy_irq
- if:
properties:
compatible:
contains:
enum:
- qcom,sc8180x-dwc3-mp
then:
properties:
interrupts:
minItems: 10
maxItems: 10
interrupt-names:
items:
- const: pwr_event_1
- const: pwr_event_2
- const: hs_phy_1
- const: hs_phy_2
- const: dp_hs_phy_1
- const: dm_hs_phy_1
- const: dp_hs_phy_2
- const: dm_hs_phy_2
- const: ss_phy_1
- const: ss_phy_2
- if:
properties:
compatible:
@@ -1270,6 +1270,8 @@ patternProperties:
description: Schindler
"^schneider,.*":
description: Schneider Electric
"^sciosense,.*":
description: ScioSense B.V.
"^seagate,.*":
description: Seagate Technology PLC
"^seeed,.*":
@@ -80,6 +80,10 @@ The details of these operations are:
- slave_sg: DMA a list of scatter gather buffers from/to a peripheral
- peripheral_dma_vec: DMA an array of scatter gather buffers from/to a
peripheral. Similar to slave_sg, but uses an array of dma_vec
structures instead of a scatterlist.
- dma_cyclic: Perform a cyclic DMA operation from/to a peripheral till the
operation is explicitly stopped.
@@ -102,6 +106,11 @@ The details of these operations are:
unsigned int sg_len, enum dma_data_direction direction,
unsigned long flags);
struct dma_async_tx_descriptor *dmaengine_prep_peripheral_dma_vec(
struct dma_chan *chan, const struct dma_vec *vecs,
size_t nents, enum dma_data_direction direction,
unsigned long flags);
struct dma_async_tx_descriptor *dmaengine_prep_dma_cyclic(
struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
size_t period_len, enum dma_data_direction direction);
@@ -433,6 +433,12 @@ supported.
- residue: Provides the residue bytes of the transfer for those that
support residue.
- ``device_prep_peripheral_dma_vec``
- Similar to ``device_prep_slave_sg``, but it takes a pointer to a
array of ``dma_vec`` structures, which (in the long run) will replace
scatterlists.
- ``device_issue_pending``
- Takes the first transaction descriptor in the pending queue,
@@ -544,6 +550,10 @@ dma_cookie_t
- Not really relevant any more since the introduction of ``virt-dma``
that abstracts it away.
dma_vec
- A small structure that contains a DMA address and length.
DMA_CTRL_ACK
- If clear, the descriptor cannot be reused by provider until the
+1
View File
@@ -48,6 +48,7 @@ Supported adapters:
* Intel Raptor Lake (PCH)
* Intel Meteor Lake (SOC and PCH)
* Intel Birch Stream (SOC)
* Intel Arrow Lake (SOC)
Datasheets: Publicly available at the Intel website
+87 -40
View File
@@ -16,9 +16,9 @@ Note that this is a device for testing and debugging. It should not be enabled
in a production build. And while there is some versioning and we try hard to
keep backward compatibility, there is no stable ABI guaranteed!
Instantiating the device is regular. Example for bus 0, address 0x30:
Instantiating the device is regular. Example for bus 0, address 0x30::
# echo "slave-testunit 0x1030" > /sys/bus/i2c/devices/i2c-0/new_device
# echo "slave-testunit 0x1030" > /sys/bus/i2c/devices/i2c-0/new_device
After that, you will have a write-only device listening. Reads will just return
an 8-bit version number of the testunit. When writing, the device consists of 4
@@ -26,14 +26,17 @@ an 8-bit version number of the testunit. When writing, the device consists of 4
written to start a testcase, i.e. you usually write 4 bytes to the device. The
registers are:
0x00 CMD - which test to trigger
0x01 DATAL - configuration byte 1 for the test
0x02 DATAH - configuration byte 2 for the test
0x03 DELAY - delay in n * 10ms until test is started
.. csv-table::
:header: "Offset", "Name", "Description"
Using 'i2cset' from the i2c-tools package, the generic command looks like:
0x00, CMD, which test to trigger
0x01, DATAL, configuration byte 1 for the test
0x02, DATAH, configuration byte 2 for the test
0x03, DELAY, delay in n * 10ms until test is started
# i2cset -y <bus_num> <testunit_address> <CMD> <DATAL> <DATAH> <DELAY> i
Using 'i2cset' from the i2c-tools package, the generic command looks like::
# i2cset -y <bus_num> <testunit_address> <CMD> <DATAL> <DATAH> <DELAY> i
DELAY is a generic parameter which will delay the execution of the test in CMD.
While a command is running (including the delay), new commands will not be
@@ -45,44 +48,88 @@ result in the transfer not being acknowledged.
Commands
--------
0x00 NOOP (reserved for future use)
0x00 NOOP
~~~~~~~~~
0x01 READ_BYTES (also needs master mode)
DATAL - address to read data from (lower 7 bits, highest bit currently unused)
DATAH - number of bytes to read
Reserved for future use.
This is useful to test if your bus master driver is handling multi-master
correctly. You can trigger the testunit to read bytes from another device on
the bus. If the bus master under test also wants to access the bus at the same
time, the bus will be busy. Example to read 128 bytes from device 0x50 after
50ms of delay:
0x01 READ_BYTES
~~~~~~~~~~~~~~~
# i2cset -y 0 0x30 0x01 0x50 0x80 0x05 i
.. list-table::
:header-rows: 1
0x02 SMBUS_HOST_NOTIFY (also needs master mode)
DATAL - low byte of the status word to send
DATAH - high byte of the status word to send
* - CMD
- DATAL
- DATAH
- DELAY
This test will send an SMBUS_HOST_NOTIFY message to the host. Note that the
status word is currently ignored in the Linux Kernel. Example to send a
notification after 10ms:
* - 0x01
- address to read data from (lower 7 bits, highest bit currently unused)
- number of bytes to read
- n * 10ms
# i2cset -y 0 0x30 0x02 0x42 0x64 0x01 i
Also needs master mode. This is useful to test if your bus master driver is
handling multi-master correctly. You can trigger the testunit to read bytes
from another device on the bus. If the bus master under test also wants to
access the bus at the same time, the bus will be busy. Example to read 128
bytes from device 0x50 after 50ms of delay::
0x03 SMBUS_BLOCK_PROC_CALL (partial command)
DATAL - must be '1', i.e. one further byte will be written
DATAH - number of bytes to be sent back
DELAY - not applicable, partial command!
# i2cset -y 0 0x30 0x01 0x50 0x80 0x05 i
This test will respond to a block process call as defined by the SMBus
specification. The one data byte written specifies how many bytes will be sent
back in the following read transfer. Note that in this read transfer, the
testunit will prefix the length of the bytes to follow. So, if your host bus
driver emulates SMBus calls like the majority does, it needs to support the
I2C_M_RECV_LEN flag of an i2c_msg. This is a good testcase for it. The returned
data consists of the length first, and then of an array of bytes from length-1
to 0. Here is an example which emulates i2c_smbus_block_process_call() using
i2ctransfer (you need i2c-tools v4.2 or later):
0x02 SMBUS_HOST_NOTIFY
~~~~~~~~~~~~~~~~~~~~~~
# i2ctransfer -y 0 w3@0x30 0x03 0x01 0x10 r?
0x10 0x0f 0x0e 0x0d 0x0c 0x0b 0x0a 0x09 0x08 0x07 0x06 0x05 0x04 0x03 0x02 0x01 0x00
.. list-table::
:header-rows: 1
* - CMD
- DATAL
- DATAH
- DELAY
* - 0x02
- low byte of the status word to send
- high byte of the status word to send
- n * 10ms
Also needs master mode. This test will send an SMBUS_HOST_NOTIFY message to the
host. Note that the status word is currently ignored in the Linux Kernel.
Example to send a notification after 10ms::
# i2cset -y 0 0x30 0x02 0x42 0x64 0x01 i
If the host controller supports HostNotify, this message with debug level
should appear (Linux 6.11 and later)::
Detected HostNotify from address 0x30
0x03 SMBUS_BLOCK_PROC_CALL
~~~~~~~~~~~~~~~~~~~~~~~~~~
.. list-table::
:header-rows: 1
* - CMD
- DATAL
- DATAH
- DELAY
* - 0x03
- must be '1', i.e. one further byte will be written
- number of bytes to be sent back
- leave out, partial command!
Partial command. This test will respond to a block process call as defined by
the SMBus specification. The one data byte written specifies how many bytes
will be sent back in the following read transfer. Note that in this read
transfer, the testunit will prefix the length of the bytes to follow. So, if
your host bus driver emulates SMBus calls like the majority does, it needs to
support the I2C_M_RECV_LEN flag of an i2c_msg. This is a good testcase for it.
The returned data consists of the length first, and then of an array of bytes
from length-1 to 0. Here is an example which emulates
i2c_smbus_block_process_call() using i2ctransfer (you need i2c-tools v4.2 or
later)::
# i2ctransfer -y 0 w3@0x30 0x03 0x01 0x10 r?
0x10 0x0f 0x0e 0x0d 0x0c 0x0b 0x0a 0x09 0x08 0x07 0x06 0x05 0x04 0x03 0x02 0x01 0x00
+2 -21
View File
@@ -380,24 +380,5 @@ data is structured.
4. IIO Interfacing Tools
========================
Linux Kernel Tools
------------------
Linux Kernel provides some userspace tools that can be used to retrieve data
from IIO sysfs:
* lsiio: example application that provides a list of IIO devices and triggers
* iio_event_monitor: example application that reads events from an IIO device
and prints them
* iio_generic_buffer: example application that reads data from buffer
* iio_utils: set of APIs, typically used to access sysfs files.
LibIIO
------
LibIIO is a C/C++ library that provides generic access to IIO devices. The
library abstracts the low-level details of the hardware, and provides a simple
yet complete programming interface that can be used for advanced projects.
For more information about LibIIO, please see:
https://github.com/analogdevicesinc/libiio
See ``Documentation/iio/iio_tools.rst`` for the description of the available IIO
interfacing tools.
+443
View File
@@ -0,0 +1,443 @@
.. SPDX-License-Identifier: GPL-2.0
================
ADIS16480 driver
================
This driver supports Analog Device's IMUs on SPI bus.
1. Supported devices
====================
* `ADIS16375 <https://www.analog.com/ADIS16375>`_
* `ADIS16480 <https://www.analog.com/ADIS16480>`_
* `ADIS16485 <https://www.analog.com/ADIS16485>`_
* `ADIS16488 <https://www.analog.com/ADIS16488>`_
* `ADIS16490 <https://www.analog.com/ADIS16490>`_
* `ADIS16495 <https://www.analog.com/ADIS16495>`_
* `ADIS16497 <https://www.analog.com/ADIS16497>`_
* `ADIS16545 <https://www.analog.com/ADIS16545>`_
* `ADIS16547 <https://www.analog.com/ADIS16547>`_
Each supported device is a complete inertial system that includes a triaxial
gyroscope and a triaxial accelerometer. Each inertial sensor in device combines
with signal conditioning that optimizes dynamic performance. The factory
calibration characterizes each sensor for sensitivity, bias, and alignment. As
a result, each sensor has its own dynamic compensation formulas that provide
accurate sensor measurements.
2. Device attributes
====================
Accelerometer, gyroscope measurements are always provided. Furthermore, the
driver offers the capability to retrieve the delta angle and the delta velocity
measurements computed by the device.
The delta angle measurements represent a calculation of angular displacement
between each sample update, while the delta velocity measurements represent a
calculation of linear velocity change between each sample update.
Finally, temperature data are provided which show a coarse measurement of
the temperature inside of the IMU device. This data is most useful for
monitoring relative changes in the thermal environment.
ADIS16480 and ADIS16488 also provide access to barometric pressure data and
triaxial magnetometer measurements.
Each IIO device, has a device folder under ``/sys/bus/iio/devices/iio:deviceX``,
where X is the IIO index of the device. Under these folders reside a set of
device files, depending on the characteristics and features of the hardware
device in questions. These files are consistently generalized and documented in
the IIO ABI documentation.
The following tables show the adis16480 related device files, found in the
specific device folder path ``/sys/bus/iio/devices/iio:deviceX``.
**Available only for ADIS16480 and ADIS16488:**
+------------------------------------------+---------------------------------------------------------+
| 3-Axis Magnetometer related device files | Description |
+------------------------------------------+---------------------------------------------------------+
| in_magn_scale | Scale for the magnetometer channels. |
+------------------------------------------+---------------------------------------------------------+
| in_magn_x_calibbias | Calibration offset for the X-axis magnetometer channel. |
+------------------------------------------+---------------------------------------------------------+
| in_magn_x_filter_low_pass_3db_frequency | Bandwidth for the X-axis magnetometer channel. |
+------------------------------------------+---------------------------------------------------------+
| in_magn_x_raw | Raw X-axis magnetometer channel value. |
+------------------------------------------+---------------------------------------------------------+
| in_magn_y_calibbias | Calibration offset for the Y-axis magnetometer channel. |
+------------------------------------------+---------------------------------------------------------+
| in_magn_y_filter_low_pass_3db_frequency | Bandwidth for the Y-axis magnetometer channel. |
+------------------------------------------+---------------------------------------------------------+
| in_magn_y_raw | Raw Y-axis magnetometer channel value. |
+------------------------------------------+---------------------------------------------------------+
| in_magn_z_calibbias | Calibration offset for the Z-axis magnetometer channel. |
+------------------------------------------+---------------------------------------------------------+
| in_magn_z_filter_low_pass_3db_frequency | Bandwidth for the Z-axis magnetometer channel. |
+------------------------------------------+---------------------------------------------------------+
| in_magn_z_raw | Raw Z-axis magnetometer channel value. |
+------------------------------------------+---------------------------------------------------------+
+------------------------------------------+-----------------------------------------------------+
| Barometric pressure sensor related files | Description |
+------------------------------------------+-----------------------------------------------------+
| in_pressure0_calibbias | Calibration offset for barometric pressure channel. |
+------------------------------------------+-----------------------------------------------------+
| in_pressure0_raw | Raw barometric pressure channel value. |
+------------------------------------------+-----------------------------------------------------+
| in_pressure0_scale | Scale for the barometric pressure sensor channel. |
+------------------------------------------+-----------------------------------------------------+
**Available for all supported devices:**
+-------------------------------------------+----------------------------------------------------------+
| 3-Axis Accelerometer related device files | Description |
+-------------------------------------------+----------------------------------------------------------+
| in_accel_scale | Scale for the accelerometer channels. |
+-------------------------------------------+----------------------------------------------------------+
| in_accel_x_calibbias | Calibration offset for the X-axis accelerometer channel. |
+-------------------------------------------+----------------------------------------------------------+
| in_accel_x_calibscale | Calibration scale for the X-axis accelerometer channel. |
+-------------------------------------------+----------------------------------------------------------+
| in_accel_x_filter_low_pass_3db_frequency | Bandwidth for the X-axis accelerometer channel. |
+-------------------------------------------+----------------------------------------------------------+
| in_accel_x_raw | Raw X-axis accelerometer channel value. |
+-------------------------------------------+----------------------------------------------------------+
| in_accel_y_calibbias | Calibration offset for the Y-axis accelerometer channel. |
+-------------------------------------------+----------------------------------------------------------+
| in_accel_y_calibscale | Calibration scale for the Y-axis accelerometer channel. |
+-------------------------------------------+----------------------------------------------------------+
| in_accel_y_filter_low_pass_3db_frequency | Bandwidth for the Y-axis accelerometer channel. |
+-------------------------------------------+----------------------------------------------------------+
| in_accel_y_raw | Raw Y-axis accelerometer channel value. |
+-------------------------------------------+----------------------------------------------------------+
| in_accel_z_calibbias | Calibration offset for the Z-axis accelerometer channel. |
+-------------------------------------------+----------------------------------------------------------+
| in_accel_z_calibscale | Calibration scale for the Z-axis accelerometer channel. |
+-------------------------------------------+----------------------------------------------------------+
| in_accel_z_filter_low_pass_3db_frequency | Bandwidth for the Z-axis accelerometer channel. |
+-------------------------------------------+----------------------------------------------------------+
| in_accel_z_raw | Raw Z-axis accelerometer channel value. |
+-------------------------------------------+----------------------------------------------------------+
| in_deltavelocity_scale | Scale for delta velocity channels. |
+-------------------------------------------+----------------------------------------------------------+
| in_deltavelocity_x_raw | Raw X-axis delta velocity channel value. |
+-------------------------------------------+----------------------------------------------------------+
| in_deltavelocity_y_raw | Raw Y-axis delta velocity channel value. |
+-------------------------------------------+----------------------------------------------------------+
| in_deltavelocity_z_raw | Raw Z-axis delta velocity channel value. |
+-------------------------------------------+----------------------------------------------------------+
+--------------------------------------------+------------------------------------------------------+
| 3-Axis Gyroscope related device files | Description |
+--------------------------------------------+------------------------------------------------------+
| in_anglvel_scale | Scale for the gyroscope channels. |
+--------------------------------------------+------------------------------------------------------+
| in_anglvel_x_calibbias | Calibration offset for the X-axis gyroscope channel. |
+--------------------------------------------+------------------------------------------------------+
| in_anglvel_x_calibscale | Calibration scale for the X-axis gyroscope channel. |
+--------------------------------------------+------------------------------------------------------+
| in_anglvel_x_filter_low_pass_3db_frequency | Bandwidth for the X-axis gyroscope channel. |
+--------------------------------------------+------------------------------------------------------+
| in_anglvel_x_raw | Raw X-axis gyroscope channel value. |
+--------------------------------------------+------------------------------------------------------+
| in_anglvel_y_calibbias | Calibration offset for the Y-axis gyroscope channel. |
+--------------------------------------------+------------------------------------------------------+
| in_anglvel_y_calibscale | Calibration scale for the Y-axis gyroscope channel. |
+--------------------------------------------+------------------------------------------------------+
| in_anglvel_y_filter_low_pass_3db_frequency | Bandwidth for the Y-axis gyroscope channel. |
+--------------------------------------------+------------------------------------------------------+
| in_anglvel_y_raw | Raw Y-axis gyroscope channel value. |
+--------------------------------------------+------------------------------------------------------+
| in_anglvel_z_calibbias | Calibration offset for the Z-axis gyroscope channel. |
+--------------------------------------------+------------------------------------------------------+
| in_anglvel_z_calibscale | Calibration scale for the Z-axis gyroscope channel. |
+--------------------------------------------+------------------------------------------------------+
| in_anglvel_z_filter_low_pass_3db_frequency | Bandwidth for the Z-axis gyroscope channel. |
+--------------------------------------------+------------------------------------------------------+
| in_anglvel_z_raw | Raw Z-axis gyroscope channel value. |
+--------------------------------------------+------------------------------------------------------+
| in_deltaangl_scale | Scale for delta angle channels. |
+--------------------------------------------+------------------------------------------------------+
| in_deltaangl_x_raw | Raw X-axis delta angle channel value. |
+--------------------------------------------+------------------------------------------------------+
| in_deltaangl_y_raw | Raw Y-axis delta angle channel value. |
+--------------------------------------------+------------------------------------------------------+
| in_deltaangl_z_raw | Raw Z-axis delta angle channel value. |
+--------------------------------------------+------------------------------------------------------+
+----------------------------------+-------------------------------------------+
| Temperature sensor related files | Description |
+----------------------------------+-------------------------------------------+
| in_temp0_raw | Raw temperature channel value. |
+----------------------------------+-------------------------------------------+
| in_temp0_offset | Offset for the temperature sensor channel.|
+----------------------------------+-------------------------------------------+
| in_temp0_scale | Scale for the temperature sensor channel. |
+----------------------------------+-------------------------------------------+
+-------------------------------+---------------------------------------------------------+
| Miscellaneous device files | Description |
+-------------------------------+---------------------------------------------------------+
| name | Name of the IIO device. |
+-------------------------------+---------------------------------------------------------+
| sampling_frequency | Currently selected sample rate. |
+-------------------------------+---------------------------------------------------------+
The following table shows the adis16480 related device debug files, found in the
specific device debug folder path ``/sys/kernel/debug/iio/iio:deviceX``.
+----------------------+-------------------------------------------------------------------------+
| Debugfs device files | Description |
+----------------------+-------------------------------------------------------------------------+
| serial_number | The serial number of the chip in hexadecimal format. |
+----------------------+-------------------------------------------------------------------------+
| product_id | Chip specific product id (e.g. 16480, 16488, 16545, etc.). |
+----------------------+-------------------------------------------------------------------------+
| flash_count | The number of flash writes performed on the device. |
+----------------------+-------------------------------------------------------------------------+
| firmware_revision | String containing the firmware revision in the following format ##.##. |
+----------------------+-------------------------------------------------------------------------+
| firmware_date | String containing the firmware date in the following format mm-dd-yyyy. |
+----------------------+-------------------------------------------------------------------------+
Channels processed values
-------------------------
A channel value can be read from its _raw attribute. The value returned is the
raw value as reported by the devices. To get the processed value of the channel,
apply the following formula:
.. code-block:: bash
processed value = (_raw + _offset) * _scale
Where _offset and _scale are device attributes. If no _offset attribute is
present, simply assume its value is 0.
The adis16480 driver offers data for 7 types of channels, the table below shows
the measurement units for the processed value, which are defined by the IIO
framework:
+--------------------------------------+---------------------------+
| Channel type | Measurement unit |
+--------------------------------------+---------------------------+
| Acceleration on X, Y, and Z axis | Meters per Second squared |
+--------------------------------------+---------------------------+
| Angular velocity on X, Y and Z axis | Radians per second |
+--------------------------------------+---------------------------+
| Delta velocity on X. Y, and Z axis | Meters per Second |
+--------------------------------------+---------------------------+
| Delta angle on X, Y, and Z axis | Radians |
+--------------------------------------+---------------------------+
| Temperature | Millidegrees Celsius |
+--------------------------------------+---------------------------+
| Magnetic field along X, Y and Z axis | Gauss |
+--------------------------------------+---------------------------+
| Barometric pressure | kilo Pascal |
+--------------------------------------+---------------------------+
Usage examples
--------------
Show device name:
.. code-block:: bash
root:/sys/bus/iio/devices/iio:device0> cat name
adis16545-1
Show accelerometer channels value:
.. code-block:: bash
root:/sys/bus/iio/devices/iio:device0> cat in_accel_x_raw
1376728
root:/sys/bus/iio/devices/iio:device0> cat in_accel_y_raw
4487621
root:/sys/bus/iio/devices/iio:device0> cat in_accel_z_raw
262773792
root:/sys/bus/iio/devices/iio:device0> cat in_accel_scale
0.000000037
- X-axis acceleration = in_accel_x_raw * in_accel_scale = 0.050938936 m/s^2
- Y-axis acceleration = in_accel_y_raw * in_accel_scale = 0.166041977 m/s^2
- Z-axis acceleration = in_accel_z_raw * in_accel_scale = 9.722630304 m/s^2
Show gyroscope channels value:
.. code-block:: bash
root:/sys/bus/iio/devices/iio:device0> cat in_anglvel_x_raw
-1041702
root:/sys/bus/iio/devices/iio:device0> cat in_anglvel_y_raw
-273013
root:/sys/bus/iio/devices/iio:device0> cat in_anglvel_z_raw
2745116
root:/sys/bus/iio/devices/iio:device0> cat in_anglvel_scale
0.000000001
- X-axis angular velocity = in_anglvel_x_raw * in_anglvel_scale = 0.001041702 rad/s
- Y-axis angular velocity = in_anglvel_y_raw * in_anglvel_scale = 0.000273013 rad/s
- Z-axis angular velocity = in_anglvel_z_raw * in_anglvel_scale = 0.002745116 rad/s
Set calibration offset for accelerometer channels:
.. code-block:: bash
root:/sys/bus/iio/devices/iio:device0> cat in_accel_x_calibbias
0
root:/sys/bus/iio/devices/iio:device0> echo 5000 > in_accel_x_calibbias
root:/sys/bus/iio/devices/iio:device0> cat in_accel_x_calibbias
5000
Set calibration offset for gyroscope channels:
.. code-block:: bash
root:/sys/bus/iio/devices/iio:device0> cat in_anglvel_y_calibbias
0
root:/sys/bus/iio/devices/iio:device0> echo -5000 > in_anglvel_y_calibbias
root:/sys/bus/iio/devices/iio:device0> cat in_anglvel_y_calibbias
-5000
Set sampling frequency:
.. code-block:: bash
root:/sys/bus/iio/devices/iio:device0> cat sampling_frequency
4250.000000
root:/sys/bus/iio/devices/iio:device0> echo 1000 > sampling_frequency
1062.500000
Set bandwidth for accelerometer channels:
.. code-block:: bash
root:/sys/bus/iio/devices/iio:device0> cat in_accel_x_filter_low_pass_3db_frequency
0
root:/sys/bus/iio/devices/iio:device0> echo 300 > in_accel_x_filter_low_pass_3db_frequency
root:/sys/bus/iio/devices/iio:device0> cat in_accel_x_filter_low_pass_3db_frequency
300
Show serial number:
.. code-block:: bash
root:/sys/kernel/debug/iio/iio:device0> cat serial_number
0x000c
Show product id:
.. code-block:: bash
root:/sys/kernel/debug/iio/iio:device0> cat product_id
16545
Show flash count:
.. code-block:: bash
root:/sys/kernel/debug/iio/iio:device0> cat flash_count
88
Show firmware revision:
.. code-block:: bash
root:/sys/kernel/debug/iio/iio:device0> cat firmware_revision
1.4
Show firmware date:
.. code-block:: bash
root:/sys/kernel/debug/iio/iio:device0> cat firmware_date
09-23-2023
3. Device buffers
=================
This driver supports IIO buffers.
All devices support retrieving the raw acceleration, gyroscope and temperature
measurements using buffers.
The following device families also support retrieving the delta velocity, delta
angle and temperature measurements using buffers:
- ADIS16545
- ADIS16547
However, when retrieving acceleration or gyroscope data using buffers, delta
readings will not be available and vice versa. This is because the device only
allows to read either acceleration and gyroscope data or delta velocity and
delta angle data at a time and switching between these two burst data selection
modes is time consuming.
Usage examples
--------------
Set device trigger in current_trigger, if not already set:
.. code-block:: bash
root:/sys/bus/iio/devices/iio:device0> cat trigger/current_trigger
root:/sys/bus/iio/devices/iio:device0> echo adis16545-1-dev0 > trigger/current_trigger
root:/sys/bus/iio/devices/iio:device0> cat trigger/current_trigger
adis16545-1-dev0
Select channels for buffer read:
.. code-block:: bash
root:/sys/bus/iio/devices/iio:device0> echo 1 > scan_elements/in_deltavelocity_x_en
root:/sys/bus/iio/devices/iio:device0> echo 1 > scan_elements/in_deltavelocity_y_en
root:/sys/bus/iio/devices/iio:device0> echo 1 > scan_elements/in_deltavelocity_z_en
root:/sys/bus/iio/devices/iio:device0> echo 1 > scan_elements/in_temp0_en
Set the number of samples to be stored in the buffer:
.. code-block:: bash
root:/sys/bus/iio/devices/iio:device0> echo 10 > buffer/length
Enable buffer readings:
.. code-block:: bash
root:/sys/bus/iio/devices/iio:device0> echo 1 > buffer/enable
Obtain buffered data::
root:/sys/bus/iio/devices/iio:device0> hexdump -C /dev/iio\:device0
...
00006aa0 09 62 00 00 ff ff fc a4 00 00 01 69 00 03 3c 08 |.b.........i..<.|
00006ab0 09 61 00 00 00 00 02 96 00 00 02 8f 00 03 37 50 |.a............7P|
00006ac0 09 61 00 00 00 00 12 3d 00 00 0b 89 00 03 2c 0b |.a.....=......,.|
00006ad0 09 61 00 00 00 00 1e dc 00 00 16 dd 00 03 25 bf |.a............%.|
00006ae0 09 61 00 00 00 00 1e e3 00 00 1b bf 00 03 27 0b |.a............'.|
00006af0 09 61 00 00 00 00 15 50 00 00 19 44 00 03 30 fd |.a.....P...D..0.|
00006b00 09 61 00 00 00 00 09 0e 00 00 14 41 00 03 3d 7f |.a.........A..=.|
00006b10 09 61 00 00 ff ff ff f0 00 00 0e bc 00 03 48 d0 |.a............H.|
00006b20 09 63 00 00 00 00 00 9f 00 00 0f 37 00 03 4c fe |.c.........7..L.|
00006b30 09 64 00 00 00 00 0b f6 00 00 18 92 00 03 43 22 |.d............C"|
00006b40 09 64 00 00 00 00 18 df 00 00 22 33 00 03 33 ab |.d........"3..3.|
00006b50 09 63 00 00 00 00 1e 81 00 00 26 be 00 03 29 60 |.c........&...)`|
00006b60 09 63 00 00 00 00 1b 13 00 00 22 2f 00 03 23 91 |.c........"/..#.|
...
See ``Documentation/iio/iio_devbuf.rst`` for more information about how buffered
data is structured.
4. IIO Interfacing Tools
========================
See ``Documentation/iio/iio_tools.rst`` for the description of the available IIO
interfacing tools.
+54
View File
@@ -0,0 +1,54 @@
.. SPDX-License-Identifier: GPL-2.0
===================================
High-speed DMABUF interface for IIO
===================================
1. Overview
===========
The Industrial I/O subsystem supports access to buffers through a
file-based interface, with read() and write() access calls through the
IIO device's dev node.
It additionally supports a DMABUF based interface, where the userspace
can attach DMABUF objects (externally created) to an IIO buffer, and
subsequently use them for data transfers.
A userspace application can then use this interface to share DMABUF
objects between several interfaces, allowing it to transfer data in a
zero-copy fashion, for instance between IIO and the USB stack.
The userspace application can also memory-map the DMABUF objects, and
access the sample data directly. The advantage of doing this vs. the
read() interface is that it avoids an extra copy of the data between the
kernel and userspace. This is particularly useful for high-speed devices
which produce several megabytes or even gigabytes of data per second.
It does however increase the userspace-kernelspace synchronization
overhead, as the DMA_BUF_SYNC_START and DMA_BUF_SYNC_END IOCTLs have to
be used for data integrity.
2. User API
===========
As part of this interface, three new IOCTLs have been added. These three
IOCTLs have to be performed on the IIO buffer's file descriptor, which
can be obtained using the IIO_BUFFER_GET_FD_IOCTL() ioctl.
``IIO_BUFFER_DMABUF_ATTACH_IOCTL(int fd)``
Attach the DMABUF object, identified by its file descriptor, to the
IIO buffer. Returns zero on success, and a negative errno value on
error.
``IIO_BUFFER_DMABUF_DETACH_IOCTL(int fd)``
Detach the given DMABUF object, identified by its file descriptor,
from the IIO buffer. Returns zero on success, and a negative errno
value on error.
Note that closing the IIO buffer's file descriptor will
automatically detach all previously attached DMABUF objects.
``IIO_BUFFER_DMABUF_ENQUEUE_IOCTL(struct iio_dmabuf *iio_dmabuf)``
Enqueue a previously attached DMABUF object to the buffer queue.
Enqueued DMABUFs will be read from (if output buffer) or written to
(if input buffer) as long as the buffer is enabled.
+27
View File
@@ -0,0 +1,27 @@
.. SPDX-License-Identifier: GPL-2.0
=====================
IIO Interfacing Tools
=====================
1. Linux Kernel Tools
=====================
Linux Kernel provides some userspace tools that can be used to retrieve data
from IIO sysfs:
* lsiio: example application that provides a list of IIO devices and triggers
* iio_event_monitor: example application that reads events from an IIO device
and prints them
* iio_generic_buffer: example application that reads data from buffer
* iio_utils: set of APIs, typically used to access sysfs files.
2. LibIIO
=========
LibIIO is a C/C++ library that provides generic access to IIO devices. The
library abstracts the low-level details of the hardware, and provides a simple
yet complete programming interface that can be used for advanced projects.
For more information about LibIIO, please see:
https://github.com/analogdevicesinc/libiio
+3
View File
@@ -9,6 +9,8 @@ Industrial I/O
iio_configfs
iio_devbuf
iio_dmabuf_api
iio_tools
Industrial I/O Kernel Drivers
=============================
@@ -18,5 +20,6 @@ Industrial I/O Kernel Drivers
ad7944
adis16475
adis16480
bno055
ep93xx_adc
+1
View File
@@ -21,6 +21,7 @@ fit into other categories.
isl29003
lis3lv02d
max6875
mrvl_cn10k_dpi
oxsemi-tornado
pci-endpoint-test
spear-pcie-gadget
@@ -0,0 +1,52 @@
.. SPDX-License-Identifier: GPL-2.0
===============================================
Marvell CN10K DMA packet interface (DPI) driver
===============================================
Overview
========
DPI is a DMA packet interface hardware block in Marvell's CN10K silicon.
DPI hardware comprises a physical function (PF), its virtual functions,
mailbox logic, and a set of DMA engines & DMA command queues.
DPI PF function is an administrative function which services the mailbox
requests from its VF functions and provisions DMA engine resources to
it's VF functions.
mrvl_cn10k_dpi.ko misc driver loads on DPI PF device and services the
mailbox commands submitted by the VF devices and accordingly initializes
the DMA engines and VF device's DMA command queues. Also, driver creates
/dev/mrvl-cn10k-dpi node to set DMA engine and PEM (PCIe interface) port
attributes like fifo length, molr, mps & mrrs.
DPI PF driver is just an administrative driver to setup its VF device's
queues and provisions the hardware resources, it cannot initiate any
DMA operations. Only VF devices are provisioned with DMA capabilities.
Driver location
===============
drivers/misc/mrvl_cn10k_dpi.c
Driver IOCTLs
=============
:c:macro::`DPI_MPS_MRRS_CFG`
ioctl that sets max payload size & max read request size parameters of
a pem port to which DMA engines are wired.
:c:macro::`DPI_ENGINE_CFG`
ioctl that sets DMA engine's fifo sizes & max outstanding load request
thresholds.
User space code example
=======================
DPI VF devices are probed and accessed from user space applications using
vfio-pci driver. Below is a sample dpi dma application to demonstrate on
how applications use mailbox and ioctl services from DPI PF kernel driver.
https://github.com/MarvellEmbeddedProcessors/dpi-sample-app
@@ -124,7 +124,7 @@ pcie_port_service_unregister取代了Linux驱动模型的pci_unregister_driver
static struct pcie_port_service_driver root_aerdrv = {
.name = (char *)device_name,
.id_table = &service_id[0],
.id_table = service_id,
.probe = aerdrv_load,
.remove = aerdrv_unload,
@@ -365,6 +365,7 @@ Code Seq# Include File Comments
0xB6 all linux/fpga-dfl.h
0xB7 all uapi/linux/remoteproc_cdev.h <mailto:linux-remoteproc@vger.kernel.org>
0xB7 all uapi/linux/nsfs.h <mailto:Andrei Vagin <avagin@openvz.org>>
0xB8 01-02 uapi/misc/mrvl_cn10k_dpi.h Marvell CN10K DPI driver
0xC0 00-0F linux/usb/iowarrior.h
0xCA 00-0F uapi/misc/cxl.h
0xCA 10-2F uapi/misc/ocxl.h
+59 -4
View File
@@ -440,6 +440,16 @@ W: http://wiki.analog.com/AD7142
W: https://ez.analog.com/linux-software-drivers
F: drivers/input/misc/ad714x.c
AD738X ADC DRIVER (AD7380/1/2/4)
M: Michael Hennerich <michael.hennerich@analog.com>
M: Nuno Sá <nuno.sa@analog.com>
R: David Lechner <dlechner@baylibre.com>
S: Supported
W: https://wiki.analog.com/resources/tools-software/linux-drivers/iio-adc/ad738x
W: https://ez.analog.com/linux-software-drivers
F: Documentation/devicetree/bindings/iio/adc/adi,ad7380.yaml
F: drivers/iio/adc/ad7380.c
AD7877 TOUCHSCREEN DRIVER
M: Michael Hennerich <michael.hennerich@analog.com>
S: Supported
@@ -1202,7 +1212,7 @@ F: Documentation/devicetree/bindings/iio/adc/adi,ad7091r*
F: drivers/iio/adc/ad7091r*
ANALOG DEVICES INC AD7192 DRIVER
M: Alexandru Tachici <alexandru.tachici@analog.com>
M: Alisa-Dariana Roman <alisa.roman@analog.com>
L: linux-iio@vger.kernel.org
S: Supported
W: https://ez.analog.com/linux-software-drivers
@@ -2400,7 +2410,7 @@ ARM/LPC18XX ARCHITECTURE
M: Vladimir Zapolskiy <vz@mleia.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
F: Documentation/devicetree/bindings/i2c/i2c-lpc2k.txt
F: Documentation/devicetree/bindings/i2c/nxp,lpc1788-i2c.yaml
F: arch/arm/boot/dts/nxp/lpc/lpc43*
F: drivers/i2c/busses/i2c-lpc2k.c
F: drivers/memory/pl172.c
@@ -3568,6 +3578,13 @@ F: include/linux/cfag12864b.h
F: include/uapi/linux/map_to_14segment.h
F: include/uapi/linux/map_to_7segment.h
AVAGO APDS9306 AMBIENT LIGHT SENSOR DRIVER
M: Subhajit Ghosh <subhajit.ghosh@tweaklogic.com>
L: linux-iio@vger.kernel.org
S: Maintained
F: Documentation/devicetree/bindings/iio/light/avago,apds9300.yaml
F: drivers/iio/light/apds9306.c
AVIA HX711 ANALOG DIGITAL CONVERTER IIO DRIVER
M: Andreas Klinger <ak@it-klinger.de>
L: linux-iio@vger.kernel.org
@@ -11668,6 +11685,7 @@ M: Jean-Baptiste Maneyrol <jmaneyrol@invensense.com>
L: linux-iio@vger.kernel.org
S: Maintained
W: https://invensense.tdk.com/
F: Documentation/ABI/testing/sysfs-bus-iio-inv_icm42600
F: Documentation/devicetree/bindings/iio/imu/invensense,icm42600.yaml
F: drivers/iio/imu/inv_icm42600/
@@ -13628,6 +13646,11 @@ S: Supported
F: Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml
F: drivers/mmc/host/sdhci-xenon*
MARVELL OCTEON CN10K DPI DRIVER
M: Vamsi Attunuru <vattunuru@marvell.com>
S: Supported
F: drivers/misc/mrvl_cn10k_dpi.c
MARVELL OCTEON ENDPOINT VIRTIO DATA PATH ACCELERATOR
R: schalla@marvell.com
R: vattunuru@marvell.com
@@ -17440,6 +17463,14 @@ S: Maintained
F: Documentation/devicetree/bindings/pci/layerscape-pcie-gen4.txt
F: drivers/pci/controller/mobiveil/pcie-layerscape-gen4.c
PCI DRIVER FOR PLDA PCIE IP
M: Daire McNamara <daire.mcnamara@microchip.com>
L: linux-pci@vger.kernel.org
S: Maintained
F: Documentation/devicetree/bindings/pci/plda,xpressrich3-axi-common.yaml
F: drivers/pci/controller/plda/pcie-plda-host.c
F: drivers/pci/controller/plda/pcie-plda.h
PCI DRIVER FOR RENESAS R-CAR
M: Marek Vasut <marek.vasut+renesas@gmail.com>
M: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
@@ -17678,7 +17709,7 @@ M: Daire McNamara <daire.mcnamara@microchip.com>
L: linux-pci@vger.kernel.org
S: Supported
F: Documentation/devicetree/bindings/pci/microchip*
F: drivers/pci/controller/*microchip*
F: drivers/pci/controller/plda/*microchip*
PCIE DRIVER FOR QUALCOMM MSM
M: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
@@ -17708,6 +17739,13 @@ L: linux-pci@vger.kernel.org
S: Maintained
F: drivers/pci/controller/dwc/*spear*
PCIE DRIVER FOR STARFIVE JH71x0
M: Kevin Xie <kevin.xie@starfivetech.com>
L: linux-pci@vger.kernel.org
S: Maintained
F: Documentation/devicetree/bindings/pci/starfive,jh7110-pcie.yaml
F: drivers/pci/controller/plda/pcie-starfive.c
PCIE ENDPOINT DRIVER FOR QUALCOMM
M: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
L: linux-pci@vger.kernel.org
@@ -18736,6 +18774,7 @@ QUALCOMM FASTRPC DRIVER
M: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
M: Amol Maheshwari <amahesh@qti.qualcomm.com>
L: linux-arm-msm@vger.kernel.org
L: dri-devel@lists.freedesktop.org
S: Maintained
F: Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml
F: drivers/misc/fastrpc.c
@@ -19547,7 +19586,7 @@ F: drivers/clk/microchip/clk-mpfs*.c
F: drivers/firmware/microchip/mpfs-auto-update.c
F: drivers/i2c/busses/i2c-microchip-corei2c.c
F: drivers/mailbox/mailbox-mpfs.c
F: drivers/pci/controller/pcie-microchip-host.c
F: drivers/pci/controller/plda/pcie-microchip-host.c
F: drivers/pwm/pwm-microchip-core.c
F: drivers/reset/reset-mpfs.c
F: drivers/rtc/rtc-mpfs.c
@@ -20206,6 +20245,14 @@ F: include/linux/wait.h
F: include/uapi/linux/sched.h
F: kernel/sched/
SCIOSENSE ENS160 MULTI-GAS SENSOR DRIVER
M: Gustavo Silva <gustavograzs@gmail.com>
S: Maintained
F: drivers/iio/chemical/ens160_core.c
F: drivers/iio/chemical/ens160_i2c.c
F: drivers/iio/chemical/ens160_spi.c
F: drivers/iio/chemical/ens160.h
SCSI LIBSAS SUBSYSTEM
R: John Garry <john.g.garry@oracle.com>
R: Jason Yan <yanaijie@huawei.com>
@@ -22663,6 +22710,14 @@ M: Robert Richter <rric@kernel.org>
S: Odd Fixes
F: drivers/gpio/gpio-thunderx.c
TI ADS1119 ADC DRIVER
M: Francesco Dolcini <francesco@dolcini.it>
M: João Paulo Gonçalves <jpaulo.silvagoncalves@gmail.com>
L: linux-iio@vger.kernel.org
S: Maintained
F: Documentation/devicetree/bindings/iio/adc/ti,ads1119.yaml
F: drivers/iio/adc/ti-ads1119.c
TI ADS7924 ADC DRIVER
M: Hugo Villeneuve <hvilleneuve@dimonoff.com>
L: linux-iio@vger.kernel.org
@@ -31,6 +31,30 @@
enable-active-high;
};
/* USB hub supports both USB 2.0 and USB 3.0 root hub */
usb-hub {
dr_mode = "host";
#address-cells = <1>;
#size-cells = <0>;
/* 2.0 hub on port 1 */
hub_2_0: hub@1 {
compatible = "usb5e3,610";
reg = <1>;
peer-hub = <&hub_3_0>;
vdd-supply = <&usb_pwr_en>;
};
/* 3.0 hub on port 4 */
hub_3_0: hub@2 {
compatible = "usb5e3,620";
reg = <2>;
peer-hub = <&hub_2_0>;
reset-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_LOW>;
vdd-supply = <&vcc_5v>;
};
};
sound {
compatible = "amlogic,axg-sound-card";
model = "ODROID-N2";
@@ -234,18 +258,6 @@
"PIN_3", /* GPIOX_17 */
"PIN_5", /* GPIOX_18 */
"PIN_36"; /* GPIOX_19 */
/*
* WARNING: The USB Hub on the Odroid-N2 needs a reset signal
* to be turned high in order to be detected by the USB Controller
* This signal should be handled by a USB specific power sequence
* in order to reset the Hub when USB bus is powered down.
*/
usb-hub-hog {
gpio-hog;
gpios = <GPIOH_4 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "usb-hub-reset";
};
};
&i2c3 {
+18 -12
View File
@@ -387,12 +387,13 @@
};
uart0: serial@10000000 {
compatible = "snps,dw-apb-uart";
compatible = "starfive,jh7110-uart", "snps,dw-apb-uart";
reg = <0x0 0x10000000 0x0 0x10000>;
clocks = <&syscrg JH7110_SYSCLK_UART0_CORE>,
<&syscrg JH7110_SYSCLK_UART0_APB>;
clock-names = "baudclk", "apb_pclk";
resets = <&syscrg JH7110_SYSRST_UART0_APB>;
resets = <&syscrg JH7110_SYSRST_UART0_APB>,
<&syscrg JH7110_SYSRST_UART0_CORE>;
interrupts = <32>;
reg-io-width = <4>;
reg-shift = <2>;
@@ -400,12 +401,13 @@
};
uart1: serial@10010000 {
compatible = "snps,dw-apb-uart";
compatible = "starfive,jh7110-uart", "snps,dw-apb-uart";
reg = <0x0 0x10010000 0x0 0x10000>;
clocks = <&syscrg JH7110_SYSCLK_UART1_CORE>,
<&syscrg JH7110_SYSCLK_UART1_APB>;
clock-names = "baudclk", "apb_pclk";
resets = <&syscrg JH7110_SYSRST_UART1_APB>;
resets = <&syscrg JH7110_SYSRST_UART1_APB>,
<&syscrg JH7110_SYSRST_UART1_CORE>;
interrupts = <33>;
reg-io-width = <4>;
reg-shift = <2>;
@@ -413,12 +415,13 @@
};
uart2: serial@10020000 {
compatible = "snps,dw-apb-uart";
compatible = "starfive,jh7110-uart", "snps,dw-apb-uart";
reg = <0x0 0x10020000 0x0 0x10000>;
clocks = <&syscrg JH7110_SYSCLK_UART2_CORE>,
<&syscrg JH7110_SYSCLK_UART2_APB>;
clock-names = "baudclk", "apb_pclk";
resets = <&syscrg JH7110_SYSRST_UART2_APB>;
resets = <&syscrg JH7110_SYSRST_UART2_APB>,
<&syscrg JH7110_SYSRST_UART2_CORE>;
interrupts = <34>;
reg-io-width = <4>;
reg-shift = <2>;
@@ -642,12 +645,13 @@
};
uart3: serial@12000000 {
compatible = "snps,dw-apb-uart";
compatible = "starfive,jh7110-uart", "snps,dw-apb-uart";
reg = <0x0 0x12000000 0x0 0x10000>;
clocks = <&syscrg JH7110_SYSCLK_UART3_CORE>,
<&syscrg JH7110_SYSCLK_UART3_APB>;
clock-names = "baudclk", "apb_pclk";
resets = <&syscrg JH7110_SYSRST_UART3_APB>;
resets = <&syscrg JH7110_SYSRST_UART3_APB>,
<&syscrg JH7110_SYSRST_UART3_CORE>;
interrupts = <45>;
reg-io-width = <4>;
reg-shift = <2>;
@@ -655,12 +659,13 @@
};
uart4: serial@12010000 {
compatible = "snps,dw-apb-uart";
compatible = "starfive,jh7110-uart", "snps,dw-apb-uart";
reg = <0x0 0x12010000 0x0 0x10000>;
clocks = <&syscrg JH7110_SYSCLK_UART4_CORE>,
<&syscrg JH7110_SYSCLK_UART4_APB>;
clock-names = "baudclk", "apb_pclk";
resets = <&syscrg JH7110_SYSRST_UART4_APB>;
resets = <&syscrg JH7110_SYSRST_UART4_APB>,
<&syscrg JH7110_SYSRST_UART4_CORE>;
interrupts = <46>;
reg-io-width = <4>;
reg-shift = <2>;
@@ -668,12 +673,13 @@
};
uart5: serial@12020000 {
compatible = "snps,dw-apb-uart";
compatible = "starfive,jh7110-uart", "snps,dw-apb-uart";
reg = <0x0 0x12020000 0x0 0x10000>;
clocks = <&syscrg JH7110_SYSCLK_UART5_CORE>,
<&syscrg JH7110_SYSCLK_UART5_APB>;
clock-names = "baudclk", "apb_pclk";
resets = <&syscrg JH7110_SYSRST_UART5_APB>;
resets = <&syscrg JH7110_SYSRST_UART5_APB>,
<&syscrg JH7110_SYSRST_UART5_CORE>;
interrupts = <47>;
reg-io-width = <4>;
reg-shift = <2>;

Some files were not shown because too many files have changed in this diff Show More