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drm/xe: Replace double space with single space after comma

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[ Upstream commit cd89de14bbacce1fc060fdfab75bacf95b1c5d40 ]

Avoid using double space, ",  " in function or macro parameters
where it's not required by any alignment purpose. Replace it with
a single space, ", ".

Signed-off-by: Nitin Gote <nitin.r.gote@intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240823080643.2461992-1-nitin.r.gote@intel.com
Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>
Stable-dep-of: ad40098da5c3 ("drm/xe/guc: Explicitly exit CT safe mode on unwind")
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Nitin Gote
2024-08-23 13:36:43 +05:30
committed by Greg Kroah-Hartman
parent 0dadcd17e2
commit e595433c63
5 changed files with 7 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files
drivers/gpu/drm/xe/regs/xe_reg_defs.h
+1 -1
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@@ -128,7 +128,7 @@ struct xe_reg_mcr {
* options. * options.
*/ */
#define XE_REG_MCR(r_, ...) ((const struct xe_reg_mcr){ \ #define XE_REG_MCR(r_, ...) ((const struct xe_reg_mcr){ \
.__reg = XE_REG_INITIALIZER(r_, ##__VA_ARGS__, .mcr = 1) \ .__reg = XE_REG_INITIALIZER(r_, ##__VA_ARGS__, .mcr = 1) \
}) })
static inline bool xe_reg_is_valid(struct xe_reg r) static inline bool xe_reg_is_valid(struct xe_reg r)
drivers/gpu/drm/xe/xe_guc.c
+1 -1
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@@ -985,7 +985,7 @@ timeout:
BUILD_BUG_ON(FIELD_MAX(GUC_HXG_MSG_0_TYPE) != GUC_HXG_TYPE_RESPONSE_SUCCESS); BUILD_BUG_ON(FIELD_MAX(GUC_HXG_MSG_0_TYPE) != GUC_HXG_TYPE_RESPONSE_SUCCESS);
BUILD_BUG_ON((GUC_HXG_TYPE_RESPONSE_SUCCESS ^ GUC_HXG_TYPE_RESPONSE_FAILURE) != 1); BUILD_BUG_ON((GUC_HXG_TYPE_RESPONSE_SUCCESS ^ GUC_HXG_TYPE_RESPONSE_FAILURE) != 1);
ret = xe_mmio_wait32(gt, reply_reg, resp_mask, resp_mask, ret = xe_mmio_wait32(gt, reply_reg, resp_mask, resp_mask,
1000000, &header, false); 1000000, &header, false);
if (unlikely(FIELD_GET(GUC_HXG_MSG_0_ORIGIN, header) != if (unlikely(FIELD_GET(GUC_HXG_MSG_0_ORIGIN, header) !=
drivers/gpu/drm/xe/xe_guc_ct.c
+2 -2
View File
@@ -182,7 +182,7 @@ int xe_guc_ct_init(struct xe_guc_ct *ct)
spin_lock_init(&ct->fast_lock); spin_lock_init(&ct->fast_lock);
xa_init(&ct->fence_lookup); xa_init(&ct->fence_lookup);
INIT_WORK(&ct->g2h_worker, g2h_worker_func); INIT_WORK(&ct->g2h_worker, g2h_worker_func);
INIT_DELAYED_WORK(&ct->safe_mode_worker, safe_mode_worker_func); INIT_DELAYED_WORK(&ct->safe_mode_worker, safe_mode_worker_func);
init_waitqueue_head(&ct->wq); init_waitqueue_head(&ct->wq);
init_waitqueue_head(&ct->g2h_fence_wq); init_waitqueue_head(&ct->g2h_fence_wq);
@@ -851,7 +851,7 @@ static bool retry_failure(struct xe_guc_ct *ct, int ret)
#define ct_alive(ct) \ #define ct_alive(ct) \
(xe_guc_ct_enabled(ct) && !ct->ctbs.h2g.info.broken && \ (xe_guc_ct_enabled(ct) && !ct->ctbs.h2g.info.broken && \
!ct->ctbs.g2h.info.broken) !ct->ctbs.g2h.info.broken)
if (!wait_event_interruptible_timeout(ct->wq, ct_alive(ct), HZ * 5)) if (!wait_event_interruptible_timeout(ct->wq, ct_alive(ct), HZ * 5))
return false; return false;
#undef ct_alive #undef ct_alive
drivers/gpu/drm/xe/xe_irq.c
+2 -2
View File
@@ -173,7 +173,7 @@ void xe_irq_enable_hwe(struct xe_gt *gt)
if (ccs_mask & (BIT(0)|BIT(1))) if (ccs_mask & (BIT(0)|BIT(1)))
xe_mmio_write32(gt, CCS0_CCS1_INTR_MASK, ~dmask); xe_mmio_write32(gt, CCS0_CCS1_INTR_MASK, ~dmask);
if (ccs_mask & (BIT(2)|BIT(3))) if (ccs_mask & (BIT(2)|BIT(3)))
xe_mmio_write32(gt, CCS2_CCS3_INTR_MASK, ~dmask); xe_mmio_write32(gt, CCS2_CCS3_INTR_MASK, ~dmask);
} }
if (xe_gt_is_media_type(gt) || MEDIA_VER(xe) < 13) { if (xe_gt_is_media_type(gt) || MEDIA_VER(xe) < 13) {
@@ -504,7 +504,7 @@ static void gt_irq_reset(struct xe_tile *tile)
if (ccs_mask & (BIT(0)|BIT(1))) if (ccs_mask & (BIT(0)|BIT(1)))
xe_mmio_write32(mmio, CCS0_CCS1_INTR_MASK, ~0); xe_mmio_write32(mmio, CCS0_CCS1_INTR_MASK, ~0);
if (ccs_mask & (BIT(2)|BIT(3))) if (ccs_mask & (BIT(2)|BIT(3)))
xe_mmio_write32(mmio, CCS2_CCS3_INTR_MASK, ~0); xe_mmio_write32(mmio, CCS2_CCS3_INTR_MASK, ~0);
if ((tile->media_gt && if ((tile->media_gt &&
xe_hw_engine_mask_per_class(tile->media_gt, XE_ENGINE_CLASS_OTHER)) || xe_hw_engine_mask_per_class(tile->media_gt, XE_ENGINE_CLASS_OTHER)) ||
drivers/gpu/drm/xe/xe_trace_bo.h
+1 -1
View File
@@ -189,7 +189,7 @@ DECLARE_EVENT_CLASS(xe_vm,
), ),
TP_printk("dev=%s, vm=%p, asid=0x%05x", __get_str(dev), TP_printk("dev=%s, vm=%p, asid=0x%05x", __get_str(dev),
__entry->vm, __entry->asid) __entry->vm, __entry->asid)
); );
DEFINE_EVENT(xe_vm, xe_vm_kill, DEFINE_EVENT(xe_vm, xe_vm_kill,