memory: tegra186: Support icc scaling
Add Interconnect framework support to dynamically set the DRAM bandwidth from different clients. The MC driver is added as an ICC provider and the EMC is already a provider. Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
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@@ -886,9 +886,56 @@ static const struct tegra_mc_client tegra186_mc_clients[] = {
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.security = 0x51c,
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},
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},
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}, {
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.id = TEGRA_ICC_MC_CPU_CLUSTER0,
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.name = "sw_cluster0",
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.type = TEGRA_ICC_NISO,
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}, {
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.id = TEGRA_ICC_MC_CPU_CLUSTER1,
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.name = "sw_cluster1",
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.type = TEGRA_ICC_NISO,
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},
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};
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static int tegra186_mc_icc_set(struct icc_node *src, struct icc_node *dst)
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{
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/* TODO: program PTSA */
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return 0;
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}
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static int tegra186_mc_icc_aggregate(struct icc_node *node, u32 tag, u32 avg_bw,
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u32 peak_bw, u32 *agg_avg, u32 *agg_peak)
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{
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struct icc_provider *p = node->provider;
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struct tegra_mc *mc = icc_provider_to_tegra_mc(p);
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if (node->id == TEGRA_ICC_MC_CPU_CLUSTER0 ||
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node->id == TEGRA_ICC_MC_CPU_CLUSTER1) {
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if (mc)
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peak_bw = peak_bw * mc->num_channels;
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}
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*agg_avg += avg_bw;
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*agg_peak = max(*agg_peak, peak_bw);
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return 0;
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}
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static int tegra186_mc_icc_get_init_bw(struct icc_node *node, u32 *avg, u32 *peak)
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{
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*avg = 0;
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*peak = 0;
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return 0;
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}
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static const struct tegra_mc_icc_ops tegra186_mc_icc_ops = {
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.xlate = tegra_mc_icc_xlate,
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.aggregate = tegra186_mc_icc_aggregate,
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.get_bw = tegra186_mc_icc_get_init_bw,
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.set = tegra186_mc_icc_set,
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};
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const struct tegra_mc_soc tegra186_mc_soc = {
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.num_clients = ARRAY_SIZE(tegra186_mc_clients),
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.clients = tegra186_mc_clients,
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@@ -899,6 +946,7 @@ const struct tegra_mc_soc tegra186_mc_soc = {
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MC_INT_SECERR_SEC | MC_INT_DECERR_VPR |
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MC_INT_SECURITY_VIOLATION | MC_INT_DECERR_EMEM,
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.ops = &tegra186_mc_ops,
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.icc_ops = &tegra186_mc_icc_ops,
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.ch_intmask = 0x0000000f,
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.global_intstatus_channel_shift = 0,
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};
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