perf: arm_pmu: Remove event index to counter remapping
Xscale and Armv6 PMUs defined the cycle counter at 0 and event counters starting at 1 and had 1:1 event index to counter numbering. On Armv7 and later, this changed the cycle counter to 31 and event counters start at 0. The drivers for Armv7 and PMUv3 kept the old event index numbering and introduced an event index to counter conversion. The conversion uses masking to convert from event index to a counter number. This operation relies on having at most 32 counters so that the cycle counter index 0 can be transformed to counter number 31. Armv9.4 adds support for an additional fixed function counter (instructions) which increases possible counters to more than 32, and the conversion won't work anymore as a simple subtract and mask. The primary reason for the translation (other than history) seems to be to have a contiguous mask of counters 0-N. Keeping that would result in more complicated index to counter conversions. Instead, store a mask of available counters rather than just number of events. That provides more information in addition to the number of events. No (intended) functional changes. Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Tested-by: James Clark <james.clark@linaro.org> Link: https://lore.kernel.org/r/20240731-arm-pmu-3-9-icntr-v3-1-280a8d7ff465@kernel.org Signed-off-by: Will Deacon <will@kernel.org>
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Will Deacon
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@@ -96,7 +96,7 @@ struct arm_pmu {
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void (*stop)(struct arm_pmu *);
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void (*reset)(void *);
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int (*map_event)(struct perf_event *event);
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int num_events;
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DECLARE_BITMAP(cntr_mask, ARMPMU_MAX_HWEVENTS);
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bool secure_access; /* 32-bit ARM only */
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#define ARMV8_PMUV3_MAX_COMMON_EVENTS 0x40
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DECLARE_BITMAP(pmceid_bitmap, ARMV8_PMUV3_MAX_COMMON_EVENTS);
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@@ -6,6 +6,7 @@
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#ifndef __PERF_ARM_PMUV3_H
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#define __PERF_ARM_PMUV3_H
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#define ARMV8_PMU_MAX_GENERAL_COUNTERS 31
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#define ARMV8_PMU_MAX_COUNTERS 32
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#define ARMV8_PMU_COUNTER_MASK (ARMV8_PMU_MAX_COUNTERS - 1)
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