[MTD] [NAND] Blackfin on-chip NAND Flash Controller driver

This is the driver for latest Blackfin on-chip nand flash controller

 - use nand_chip and mtd_info common nand driver interface
 - provide both PIO and dma operation
 - compiled with ezkit bf548 configuration
 - use hardware 1-bit ECC
 - tested with YAFFS2 and can mount YAFFS2 filesystem as rootfs

ChangeLog from try#1
 - use hweight32() instead of count_bits()
 - replace bf54x with bf5xx and BF54X with BF5XX
 - compare against plat->page_size in 2 cases when enable hardware ECC

ChangeLog from try#2
 - passed nand_test suites
 - use cpu_relax() instead of busy wait loop
 - some coding style issue pointed out by Andrew

Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
This commit is contained in:
Bryan Wu
2007-10-02 13:56:05 -07:00
committed by David Woodhouse
parent c4a9f88daf
commit b37bde1478
5 changed files with 856 additions and 0 deletions
+1
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@@ -55,6 +55,7 @@
#define CH_SPORT3_RX 20
#define CH_SPORT3_TX 21
#define CH_SDH 22
#define CH_NFC 22
#define CH_SPI2 23
#define CH_MEM_STREAM0_DEST 24
+47
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@@ -0,0 +1,47 @@
/* linux/include/asm-blackfin/nand.h
*
* Copyright (c) 2007 Analog Devices, Inc.
* Bryan Wu <bryan.wu@analog.com>
*
* BF5XX - NAND flash controller platfrom_device info
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/* struct bf5xx_nand_platform
*
* define a interface between platfrom board specific code and
* bf54x NFC driver.
*
* nr_partitions = number of partitions pointed to be partitoons (or zero)
* partitions = mtd partition list
*/
#define NFC_PG_SIZE_256 0
#define NFC_PG_SIZE_512 1
#define NFC_PG_SIZE_OFFSET 9
#define NFC_NWIDTH_8 0
#define NFC_NWIDTH_16 1
#define NFC_NWIDTH_OFFSET 8
#define NFC_RDDLY_OFFSET 4
#define NFC_WRDLY_OFFSET 0
#define NFC_STAT_NBUSY 1
struct bf5xx_nand_platform {
/* NAND chip information */
unsigned short page_size;
unsigned short data_width;
/* RD/WR strobe delay timing information, all times in SCLK cycles */
unsigned short rd_dly;
unsigned short wr_dly;
/* NAND MTD partition information */
int nr_partitions;
struct mtd_partition *partitions;
};