memory: tegra210-emc: Support Device Tree EMC Tables
These are generated by the Tegra210 Android bootloader. This is similar to the Tegra124 handling, so the support is based on that and modified to match Tegra210 by referencing the downstream Nvidia 4.9 kernel. Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
This commit is contained in:
Aaron Kling
@@ -1783,6 +1783,226 @@ static void tegra210_emc_detect(struct tegra210_emc *emc)
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emc->num_channels = 1;
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}
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static struct device_node *
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tegra_emc_find_node_by_ram_code(struct device_node *node, u32 ram_code)
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{
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struct device_node *np;
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int err;
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for_each_child_of_node(node, np) {
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u32 value;
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err = of_property_read_u32(np, "nvidia,ram-code", &value);
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if (err || (value != ram_code))
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continue;
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return np;
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}
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return NULL;
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}
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static int load_one_timing_from_dt(struct tegra210_emc *emc,
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struct tegra210_emc_timing *timing,
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struct device_node *node)
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{
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int err;
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#define EMC_READ_PROP(prop, dtprop) { \
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err = of_property_read_u32(node, dtprop, &timing->prop); \
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if (err) { \
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dev_err(emc->dev, "timing %pOFn: failed to read " #prop ": %d\n", \
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node, err); \
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return err; \
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} \
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}
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#define EMC_READ_PROP_STRING(prop, dtprop) { \
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err = of_property_read_string(node, dtprop, (const char **)&timing->prop); \
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if (err) { \
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dev_err(emc->dev, "timing %pOFn: failed to read " #prop ": %d\n", \
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node, err); \
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return err; \
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} \
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}
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#define EMC_READ_PROP_ARRAY(prop, dtprop, length) { \
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err = of_property_read_u32_array(node, dtprop, timing->prop, length); \
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if (err) { \
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dev_err(emc->dev, "timing %pOFn: failed to read " #prop ": %d\n", \
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node, err); \
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return err; \
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} \
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}
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EMC_READ_PROP_STRING(clock_src, "nvidia,source")
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EMC_READ_PROP_STRING(dvfs_ver, "nvidia,dvfs-version")
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EMC_READ_PROP(revision, "nvidia,revision")
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EMC_READ_PROP(rate, "clock-frequency")
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EMC_READ_PROP(min_volt, "nvidia,emc-min-mv")
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EMC_READ_PROP(gpu_min_volt, "nvidia,gk20a-min-mv")
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EMC_READ_PROP(clk_src_emc, "nvidia,src-sel-reg")
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EMC_READ_PROP(num_burst, "nvidia,burst-regs-num")
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EMC_READ_PROP(emc_cfg_2, "nvidia,emc-cfg-2")
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EMC_READ_PROP(emc_sel_dpd_ctrl, "nvidia,emc-sel-dpd-ctrl")
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EMC_READ_PROP(emc_auto_cal_config, "nvidia,emc-auto-cal-config")
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EMC_READ_PROP(emc_auto_cal_config2, "nvidia,emc-auto-cal-config2")
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EMC_READ_PROP(emc_auto_cal_config3, "nvidia,emc-auto-cal-config3")
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EMC_READ_PROP(latency, "nvidia,emc-clock-latency-change")
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EMC_READ_PROP_ARRAY(burst_regs, "nvidia,emc-registers", timing->num_burst)
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EMC_READ_PROP(needs_training, "nvidia,needs-training")
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EMC_READ_PROP(trained, "nvidia,trained")
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if (timing->revision >= 0x6) {
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EMC_READ_PROP(periodic_training, "nvidia,periodic_training")
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EMC_READ_PROP(trained_dram_clktree[C0D0U0], "nvidia,trained_dram_clktree_c0d0u0")
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EMC_READ_PROP(trained_dram_clktree[C0D0U1], "nvidia,trained_dram_clktree_c0d0u1")
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EMC_READ_PROP(trained_dram_clktree[C0D1U0], "nvidia,trained_dram_clktree_c0d1u0")
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EMC_READ_PROP(trained_dram_clktree[C0D1U1], "nvidia,trained_dram_clktree_c0d1u1")
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EMC_READ_PROP(trained_dram_clktree[C1D0U0], "nvidia,trained_dram_clktree_c1d0u0")
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EMC_READ_PROP(trained_dram_clktree[C1D0U1], "nvidia,trained_dram_clktree_c1d0u1")
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EMC_READ_PROP(trained_dram_clktree[C1D1U0], "nvidia,trained_dram_clktree_c1d1u0")
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EMC_READ_PROP(trained_dram_clktree[C1D1U1], "nvidia,trained_dram_clktree_c1d1u1")
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EMC_READ_PROP(current_dram_clktree[C0D0U0], "nvidia,current_dram_clktree_c0d0u0")
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EMC_READ_PROP(current_dram_clktree[C0D0U1], "nvidia,current_dram_clktree_c0d0u1")
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EMC_READ_PROP(current_dram_clktree[C0D1U0], "nvidia,current_dram_clktree_c0d1u0")
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EMC_READ_PROP(current_dram_clktree[C0D1U1], "nvidia,current_dram_clktree_c0d1u1")
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EMC_READ_PROP(current_dram_clktree[C1D0U0], "nvidia,current_dram_clktree_c1d0u0")
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EMC_READ_PROP(current_dram_clktree[C1D0U1], "nvidia,current_dram_clktree_c1d0u1")
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EMC_READ_PROP(current_dram_clktree[C1D1U0], "nvidia,current_dram_clktree_c1d1u0")
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EMC_READ_PROP(current_dram_clktree[C1D1U1], "nvidia,current_dram_clktree_c1d1u1")
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EMC_READ_PROP(run_clocks, "nvidia,run_clocks")
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EMC_READ_PROP(tree_margin, "nvidia,tree_margin")
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}
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EMC_READ_PROP(num_burst_per_ch, "nvidia,burst-regs-per-ch-num")
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EMC_READ_PROP(num_trim, "nvidia,trim-regs-num")
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EMC_READ_PROP(num_trim_per_ch, "nvidia,trim-regs-per-ch-num")
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EMC_READ_PROP(num_mc_regs, "nvidia,burst-mc-regs-num")
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EMC_READ_PROP(num_up_down, "nvidia,la-scale-regs-num")
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EMC_READ_PROP(vref_num, "nvidia,vref-regs-num")
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EMC_READ_PROP(dram_timing_num, "nvidia,dram-timing-regs-num")
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EMC_READ_PROP(min_mrs_wait, "nvidia,min-mrs-wait")
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EMC_READ_PROP(emc_mrw, "nvidia,emc-mrw")
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EMC_READ_PROP(emc_mrw2, "nvidia,emc-mrw2")
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EMC_READ_PROP(emc_mrw3, "nvidia,emc-mrw3")
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EMC_READ_PROP(emc_mrw4, "nvidia,emc-mrw4")
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EMC_READ_PROP(emc_mrw9, "nvidia,emc-mrw9")
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EMC_READ_PROP(emc_mrs, "nvidia,emc-mrs")
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EMC_READ_PROP(emc_emrs, "nvidia,emc-emrs")
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EMC_READ_PROP(emc_emrs2, "nvidia,emc-emrs2")
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EMC_READ_PROP(emc_auto_cal_config4, "nvidia,emc-auto-cal-config4")
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EMC_READ_PROP(emc_auto_cal_config5, "nvidia,emc-auto-cal-config5")
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EMC_READ_PROP(emc_auto_cal_config6, "nvidia,emc-auto-cal-config6")
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EMC_READ_PROP(emc_auto_cal_config7, "nvidia,emc-auto-cal-config7")
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EMC_READ_PROP(emc_auto_cal_config8, "nvidia,emc-auto-cal-config8")
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EMC_READ_PROP(emc_fdpd_ctrl_cmd_no_ramp, "nvidia,emc-fdpd-ctrl-cmd-no-ramp")
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EMC_READ_PROP(dll_clk_src, "nvidia,dll-clk-src")
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EMC_READ_PROP(clk_out_enb_x_0_clk_enb_emc_dll, "nvidia,clk-out-enb-x-0-clk-enb-emc-dll")
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if (timing->revision >= 0x7)
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EMC_READ_PROP_ARRAY(ptfv_list, "nvidia,ptfv", ARRAY_SIZE(timing->ptfv_list))
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EMC_READ_PROP_ARRAY(burst_reg_per_ch, "nvidia,emc-burst-regs-per-ch",
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timing->num_burst_per_ch)
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EMC_READ_PROP_ARRAY(shadow_regs_ca_train, "nvidia,emc-shadow-regs-ca-train",
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timing->num_burst)
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EMC_READ_PROP_ARRAY(shadow_regs_quse_train, "nvidia,emc-shadow-regs-quse-train",
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timing->num_burst)
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EMC_READ_PROP_ARRAY(shadow_regs_rdwr_train, "nvidia,emc-shadow-regs-rdwr-train",
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timing->num_burst)
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EMC_READ_PROP_ARRAY(trim_regs, "nvidia,emc-trim-regs", timing->num_trim)
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EMC_READ_PROP_ARRAY(trim_perch_regs, "nvidia,emc-trim-regs-per-ch", timing->num_trim_per_ch)
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EMC_READ_PROP_ARRAY(vref_perch_regs, "nvidia,emc-vref-regs", timing->vref_num)
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EMC_READ_PROP_ARRAY(dram_timings, "nvidia,emc-dram-timing-regs", timing->dram_timing_num)
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EMC_READ_PROP_ARRAY(burst_mc_regs, "nvidia,emc-burst-mc-regs", timing->num_mc_regs)
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EMC_READ_PROP_ARRAY(la_scale_regs, "nvidia,emc-la-scale-regs", timing->num_up_down)
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#undef EMC_READ_PROP
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#undef EMC_READ_STRING
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#undef EMC_READ_PROP_ARRAY
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return 0;
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}
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#define NOMINAL_COMPATIBLE "nvidia,tegra21-emc-table"
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#define DERATED_COMPATIBLE "nvidia,tegra21-emc-table-derated"
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static int tegra210_emc_load_timings_from_dt(struct tegra210_emc *emc,
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struct device_node *node)
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{
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struct tegra210_emc_timing *timing;
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unsigned int num_nominal = 0, num_derated = 0;
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int err;
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emc->num_timings = 0;
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for_each_child_of_node_scoped(node, child) {
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if (of_device_is_compatible(child, NOMINAL_COMPATIBLE))
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emc->num_timings++;
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else if (of_device_is_compatible(child, DERATED_COMPATIBLE))
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num_derated++;
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}
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if (!emc->num_timings || (num_derated && (emc->num_timings != num_derated)))
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return -EINVAL;
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emc->nominal = devm_kcalloc(emc->dev, emc->num_timings, sizeof(*timing),
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GFP_KERNEL);
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if (!emc->nominal)
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return -ENOMEM;
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if (num_derated) {
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num_derated = 0;
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emc->derated = devm_kcalloc(emc->dev, emc->num_timings, sizeof(*timing),
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GFP_KERNEL);
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if (!emc->derated)
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return -ENOMEM;
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}
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for_each_child_of_node_scoped(node, child) {
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if (of_device_is_compatible(child, NOMINAL_COMPATIBLE))
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timing = &emc->nominal[num_nominal++];
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else if (of_device_is_compatible(child, DERATED_COMPATIBLE))
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timing = &emc->derated[num_derated++];
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else
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continue;
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err = load_one_timing_from_dt(emc, timing, child);
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if (err)
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return err;
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}
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return 0;
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}
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static int tegra210_emc_parse_dt(struct tegra210_emc *emc)
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{
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struct device_node *node, *np = emc->dev->of_node;
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int ram_code, ret = 0;
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if (!np) {
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dev_err(emc->dev, "Unable to find emc node\n");
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return -ENODEV;
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}
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if (of_find_property(np, "nvidia,use-ram-code", NULL)) {
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ram_code = tegra_read_ram_code();
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node = tegra_emc_find_node_by_ram_code(np, ram_code);
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if (!node) {
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dev_warn(emc->dev, "can't find emc table for ram-code\n");
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return -ENODEV;
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}
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ret = tegra210_emc_load_timings_from_dt(emc, node);
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of_node_put(node);
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} else {
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ret = tegra210_emc_load_timings_from_dt(emc, np);
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}
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return ret;
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}
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static int tegra210_emc_validate_timings(struct tegra210_emc *emc,
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struct tegra210_emc_timing *timings,
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unsigned int num_timings)
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@@ -1815,6 +2035,7 @@ static int tegra210_emc_probe(struct platform_device *pdev)
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struct device_node *np;
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unsigned int i;
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int err;
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bool have_dt_tables = false;
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emc = devm_kzalloc(&pdev->dev, sizeof(*emc), GFP_KERNEL);
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if (!emc)
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@@ -1847,16 +2068,20 @@ static int tegra210_emc_probe(struct platform_device *pdev)
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np = pdev->dev.of_node;
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/* attach to the nominal and (optional) derated tables */
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err = of_reserved_mem_device_init_by_name(emc->dev, np, "nominal");
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if (err < 0) {
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dev_err(emc->dev, "failed to get nominal EMC table: %d\n", err);
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return err;
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}
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if (of_reserved_mem_device_init_by_name(emc->dev, np, "nominal") >= 0) {
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err = of_reserved_mem_device_init_by_name(emc->dev, np, "derated");
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if (err < 0 && err != -ENODEV) {
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dev_err(emc->dev, "failed to get derated EMC table: %d\n", err);
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goto release;
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}
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} else {
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err = tegra210_emc_parse_dt(emc);
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if (err < 0) {
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dev_err(emc->dev, "failed to get EMC tables: %d\n", err);
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return err;
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}
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err = of_reserved_mem_device_init_by_name(emc->dev, np, "derated");
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if (err < 0 && err != -ENODEV) {
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dev_err(emc->dev, "failed to get derated EMC table: %d\n", err);
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goto release;
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have_dt_tables = true;
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}
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/* validate the tables */
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@@ -1980,7 +2205,8 @@ detach:
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debugfs_remove_recursive(emc->debugfs.root);
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tegra210_clk_emc_detach(emc->clk);
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release:
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of_reserved_mem_device_release(emc->dev);
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if (!have_dt_tables)
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of_reserved_mem_device_release(emc->dev);
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return err;
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}
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