NVIDIA: SAUCE: tegra: prod: use legacy prod settings
BugLink: https://bugs.launchpad.net/bugs/2080908 This is an integration squash commit of following commits: - [INTG: NVIDIA INTERNAL] phy: tegra: xusb: Support prod-settings properties - [INTG]: drivers: spi: add support for prod framework - [INTG: NVIDIA INTERNAL]: mmc: host: Add prod framework changes - i2c: Add prod settings support - i2c: tegra: Add new prod setting support - spi: tegra114: Add new prod settings - sdhci: tegra: Add new prod settings - [NV INTERNAL] xusb: tegra: Add new prod setting - sdhci-tegra: host: Avoid access to prod settings on PreSi. - tegra: prod: use legacy prod settings http://nvbugs/4359070 http://nvbugs/4097475 http://nvbugs/4099482 http://nvbugs/4189448 http://nvbugs/4189442 http://nvbugs/4165914 http://nvbugs/4165933 http://nvbugs/4165918 http://nvbugs/4165919 http://nvbugs/4765671 http://nvbugs/4754882 Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Acked-by: Noah Wager <noah.wager@canonical.com> Acked-by: Jacob Martin <jacob.martin@canonical.com> Signed-off-by: Noah Wager <noah.wager@canonical.com>
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@@ -1,6 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2016-2022, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2016-2024, NVIDIA CORPORATION. All rights reserved.
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*/
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#include <linux/delay.h>
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@@ -12,6 +12,7 @@
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#include <linux/platform_device.h>
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#include <linux/clk.h>
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#include <linux/slab.h>
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#include <linux/tegra_prod.h>
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#include <soc/tegra/fuse.h>
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@@ -239,6 +240,24 @@
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#define TEGRA_UTMI_PAD_MAX 4
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/* Prod fields */
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#define USB2_OTG_PADX_CTL0_LS_RSLEW_FIELD_START 17
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#define USB2_OTG_PADX_CTL0_LS_RSLEW_FIELD_WIDTH 4
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#define USB2_OTG_PADX_CTL0_LS_FSLEW_FIELD_START 21
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#define USB2_OTG_PADX_CTL0_LS_FSLEW_FIELD_WIDTH 4
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#define USB2_OTG_PADX_CTL3_HS_TXEQ_FIELD_START 1
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#define USB2_OTG_PADX_CTL3_HS_TXEQ_FIELD_WIDTH 3
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#define USB2_BIAS_PAD_CTL0_HS_DISCON_LEVEL_FIELD_START 3
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#define USB2_BIAS_PAD_CTL0_HS_DISCON_LEVEL_FIELD_WIDTH 3
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#define USB2_BIAS_PAD_CTL1_TRK_START_TIMER_FIELD_START 12
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#define USB2_BIAS_PAD_CTL1_TRK_START_TIMER_FIELD_WIDTH 7
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#define USB2_BIAS_PAD_CTL1_TRK_DONE_RESET_TIMER_FIELD_START 19
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#define USB2_BIAS_PAD_CTL1_TRK_DONE_RESET_TIMER_FIELD_WIDTH 7
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#define XUSB_PADCTL_USB2_OTG_PADX_CTL3(x) (0x94 + (x) * 0x40)
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#define TEGRA186_LANE(_name, _offset, _shift, _mask, _type) \
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{ \
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.name = _name, \
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@@ -267,6 +286,8 @@ struct tegra186_xusb_padctl {
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struct tegra_xusb_padctl base;
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void __iomem *ao_regs;
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/* prod settings */
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struct tegra_prod *prod_list;
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struct tegra_xusb_fuse_calibration calib;
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/* UTMI bias and tracking */
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@@ -850,6 +871,14 @@ static int tegra186_utmi_phy_set_mode(struct phy *phy, enum phy_mode mode,
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return err;
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}
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static int tegra186_utmi_write_prod_settings(struct tegra_xusb_padctl *padctl,
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const char *prod_name)
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{
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struct tegra186_xusb_padctl *priv = to_tegra186_xusb_padctl(padctl);
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return tegra_prod_set_by_name(&padctl->regs, prod_name, priv->prod_list);
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}
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static int tegra186_utmi_phy_power_on(struct phy *phy)
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{
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struct tegra_xusb_lane *lane = phy_get_drvdata(phy);
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@@ -867,6 +896,12 @@ static int tegra186_utmi_phy_power_on(struct phy *phy)
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return -ENODEV;
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}
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if (priv->prod_list) {
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int err = tegra186_utmi_write_prod_settings(padctl, "prod");
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if (err)
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dev_dbg(dev, "failed to apply prod settings\n");
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}
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value = padctl_readl(padctl, XUSB_PADCTL_USB2_PAD_MUX);
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value &= ~(USB2_PORT_MASK << USB2_PORT_SHIFT(index));
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value |= (PORT_XUSB << USB2_PORT_SHIFT(index));
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@@ -1512,6 +1547,12 @@ tegra186_xusb_padctl_probe(struct device *dev,
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if (err < 0)
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return ERR_PTR(err);
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priv->prod_list = devm_tegra_prod_get(dev);
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if (IS_ERR_OR_NULL(priv->prod_list)) {
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dev_dbg(dev, "Prod-settings is not available\n");
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priv->prod_list = NULL;
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}
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return &priv->base;
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}
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