NVIDIA: SAUCE: tegra: prod: use legacy prod settings

BugLink: https://bugs.launchpad.net/bugs/2080908

This is an integration squash commit of following commits:

- [INTG: NVIDIA INTERNAL] phy: tegra: xusb: Support prod-settings properties
- [INTG]: drivers: spi: add support for prod framework
- [INTG: NVIDIA INTERNAL]: mmc: host: Add prod framework changes
- i2c: Add prod settings support
- i2c: tegra: Add new prod setting support
- spi: tegra114: Add new prod settings
- sdhci: tegra: Add new prod settings
- [NV INTERNAL] xusb: tegra: Add new prod setting
- sdhci-tegra: host: Avoid access to prod settings on PreSi.
- tegra: prod: use legacy prod settings

http://nvbugs/4359070
http://nvbugs/4097475
http://nvbugs/4099482
http://nvbugs/4189448
http://nvbugs/4189442
http://nvbugs/4165914
http://nvbugs/4165933
http://nvbugs/4165918
http://nvbugs/4165919
http://nvbugs/4765671
http://nvbugs/4754882

Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Acked-by: Noah Wager <noah.wager@canonical.com>
Acked-by: Jacob Martin <jacob.martin@canonical.com>
Signed-off-by: Noah Wager <noah.wager@canonical.com>
This commit is contained in:
Krishna Yarlagadda
2023-06-26 08:45:11 +00:00
committed by Thomas Makin
parent 9cf1f30f0a
commit a52caa6411
5 changed files with 300 additions and 46 deletions
+42 -1
View File
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2016-2022, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2016-2024, NVIDIA CORPORATION. All rights reserved.
*/
#include <linux/delay.h>
@@ -12,6 +12,7 @@
#include <linux/platform_device.h>
#include <linux/clk.h>
#include <linux/slab.h>
#include <linux/tegra_prod.h>
#include <soc/tegra/fuse.h>
@@ -239,6 +240,24 @@
#define TEGRA_UTMI_PAD_MAX 4
/* Prod fields */
#define USB2_OTG_PADX_CTL0_LS_RSLEW_FIELD_START 17
#define USB2_OTG_PADX_CTL0_LS_RSLEW_FIELD_WIDTH 4
#define USB2_OTG_PADX_CTL0_LS_FSLEW_FIELD_START 21
#define USB2_OTG_PADX_CTL0_LS_FSLEW_FIELD_WIDTH 4
#define USB2_OTG_PADX_CTL3_HS_TXEQ_FIELD_START 1
#define USB2_OTG_PADX_CTL3_HS_TXEQ_FIELD_WIDTH 3
#define USB2_BIAS_PAD_CTL0_HS_DISCON_LEVEL_FIELD_START 3
#define USB2_BIAS_PAD_CTL0_HS_DISCON_LEVEL_FIELD_WIDTH 3
#define USB2_BIAS_PAD_CTL1_TRK_START_TIMER_FIELD_START 12
#define USB2_BIAS_PAD_CTL1_TRK_START_TIMER_FIELD_WIDTH 7
#define USB2_BIAS_PAD_CTL1_TRK_DONE_RESET_TIMER_FIELD_START 19
#define USB2_BIAS_PAD_CTL1_TRK_DONE_RESET_TIMER_FIELD_WIDTH 7
#define XUSB_PADCTL_USB2_OTG_PADX_CTL3(x) (0x94 + (x) * 0x40)
#define TEGRA186_LANE(_name, _offset, _shift, _mask, _type) \
{ \
.name = _name, \
@@ -267,6 +286,8 @@ struct tegra186_xusb_padctl {
struct tegra_xusb_padctl base;
void __iomem *ao_regs;
/* prod settings */
struct tegra_prod *prod_list;
struct tegra_xusb_fuse_calibration calib;
/* UTMI bias and tracking */
@@ -850,6 +871,14 @@ static int tegra186_utmi_phy_set_mode(struct phy *phy, enum phy_mode mode,
return err;
}
static int tegra186_utmi_write_prod_settings(struct tegra_xusb_padctl *padctl,
const char *prod_name)
{
struct tegra186_xusb_padctl *priv = to_tegra186_xusb_padctl(padctl);
return tegra_prod_set_by_name(&padctl->regs, prod_name, priv->prod_list);
}
static int tegra186_utmi_phy_power_on(struct phy *phy)
{
struct tegra_xusb_lane *lane = phy_get_drvdata(phy);
@@ -867,6 +896,12 @@ static int tegra186_utmi_phy_power_on(struct phy *phy)
return -ENODEV;
}
if (priv->prod_list) {
int err = tegra186_utmi_write_prod_settings(padctl, "prod");
if (err)
dev_dbg(dev, "failed to apply prod settings\n");
}
value = padctl_readl(padctl, XUSB_PADCTL_USB2_PAD_MUX);
value &= ~(USB2_PORT_MASK << USB2_PORT_SHIFT(index));
value |= (PORT_XUSB << USB2_PORT_SHIFT(index));
@@ -1512,6 +1547,12 @@ tegra186_xusb_padctl_probe(struct device *dev,
if (err < 0)
return ERR_PTR(err);
priv->prod_list = devm_tegra_prod_get(dev);
if (IS_ERR_OR_NULL(priv->prod_list)) {
dev_dbg(dev, "Prod-settings is not available\n");
priv->prod_list = NULL;
}
return &priv->base;
}