From 417e24986935f6bd6afa38010cc981cf4d7a7bef Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Fri, 17 Jul 2020 18:00:24 +0100 Subject: [PATCH 001/433] pinctrl: sh-pfc: r8a7790: Add USB1 PWEN pin and group Add USB1 PWEN pin and group for USB1 interface. Signed-off-by: Lad Prabhakar Reviewed-by: Biju Das Link: https://lore.kernel.org/r/1595005225-11519-2-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven --- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c index f524401fec5f..39ba1e7cc1c3 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c @@ -3611,6 +3611,13 @@ static const unsigned int usb1_pins[] = { static const unsigned int usb1_mux[] = { USB1_PWEN_MARK, USB1_OVC_MARK, }; +static const unsigned int usb1_pwen_pins[] = { + /* PWEN */ + RCAR_GP_PIN(5, 20), +}; +static const unsigned int usb1_pwen_mux[] = { + USB1_PWEN_MARK, +}; /* - USB2 ------------------------------------------------------------------- */ static const unsigned int usb2_pins[] = { /* PWEN, OVC */ @@ -3939,7 +3946,7 @@ static const unsigned int vin3_clk_mux[] = { }; static const struct { - struct sh_pfc_pin_group common[289]; + struct sh_pfc_pin_group common[290]; struct sh_pfc_pin_group automotive[1]; } pinmux_groups = { .common = { @@ -4193,6 +4200,7 @@ static const struct { SH_PFC_PIN_GROUP(usb0), SH_PFC_PIN_GROUP(usb0_ovc_vbus), SH_PFC_PIN_GROUP(usb1), + SH_PFC_PIN_GROUP(usb1_pwen), SH_PFC_PIN_GROUP(usb2), VIN_DATA_PIN_GROUP(vin0_data, 24), VIN_DATA_PIN_GROUP(vin0_data, 20), @@ -4640,6 +4648,7 @@ static const char * const usb0_groups[] = { static const char * const usb1_groups[] = { "usb1", + "usb1_pwen", }; static const char * const usb2_groups[] = { From 2d26684a4af6d0829fa9ff637ff56160d571148f Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 3 Aug 2020 11:19:36 +0200 Subject: [PATCH 002/433] leds: s3c24xx: Remove unused machine header include The driver includes machine header for GPIO registers but actually does not use them. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Pavel Machek --- drivers/leds/leds-s3c24xx.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/leds/leds-s3c24xx.c b/drivers/leds/leds-s3c24xx.c index 9b5e67664ba3..3c0c7aa63b8c 100644 --- a/drivers/leds/leds-s3c24xx.c +++ b/drivers/leds/leds-s3c24xx.c @@ -16,8 +16,6 @@ #include #include -#include - /* our context */ struct s3c24xx_gpio_led { From fa31311c31634e5e900d61b1eb24df4c8555b5f8 Mon Sep 17 00:00:00 2001 From: Tom Rix Date: Sun, 9 Aug 2020 09:32:21 -0700 Subject: [PATCH 003/433] leds: mt6323: move period calculation clang static analysis reports this problem leds-mt6323.c:275:12: warning: Division by zero duty_hw = MT6323_CAL_HW_DUTY(*delay_on, period); ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ This is because period can be 0. period = *delay_on + *delay_off; There is a later check that *delay_on/off are valid. if (!*delay_on && !*delay_off) { *delay_on = 500; *delay_off = 500; } Setting the delay_on/off means period needs to be recalculated anyway. So move the period statements after this check. Fixes: 216ec6cc4c19 ("leds: Add LED support for MT6323 PMIC") Signed-off-by: Tom Rix Signed-off-by: Pavel Machek --- drivers/leds/leds-mt6323.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/leds/leds-mt6323.c b/drivers/leds/leds-mt6323.c index 2a13e3161bf4..7b240771e45b 100644 --- a/drivers/leds/leds-mt6323.c +++ b/drivers/leds/leds-mt6323.c @@ -248,15 +248,6 @@ static int mt6323_led_set_blink(struct led_classdev *cdev, u8 duty_hw; int ret; - /* - * Units are in ms, if over the hardware able - * to support, fallback into software blink - */ - period = *delay_on + *delay_off; - - if (period > MT6323_MAX_PERIOD) - return -EINVAL; - /* * LED subsystem requires a default user * friendly blink pattern for the LED so using @@ -268,6 +259,15 @@ static int mt6323_led_set_blink(struct led_classdev *cdev, *delay_off = 500; } + /* + * Units are in ms, if over the hardware able + * to support, fallback into software blink + */ + period = *delay_on + *delay_off; + + if (period > MT6323_MAX_PERIOD) + return -EINVAL; + /* * Calculate duty_hw based on the percentage of period during * which the led is ON. From a2f8e2b4f1817d9438b281d96ca45ca455707f95 Mon Sep 17 00:00:00 2001 From: Pavel Machek Date: Tue, 11 Aug 2020 15:48:13 +0200 Subject: [PATCH 004/433] leds: we don't want people to use LED subsystem for vibrations Remove notes about vibrations, as that is better done using input subsystem. Signed-off-by: Pavel Machek --- Documentation/leds/ledtrig-transient.rst | 7 ------- 1 file changed, 7 deletions(-) diff --git a/Documentation/leds/ledtrig-transient.rst b/Documentation/leds/ledtrig-transient.rst index eedfa1626e8a..63072f310660 100644 --- a/Documentation/leds/ledtrig-transient.rst +++ b/Documentation/leds/ledtrig-transient.rst @@ -17,12 +17,6 @@ set a timer to hold a state, however when user space application crashes or goes away without deactivating the timer, the hardware will be left in that state permanently. -As a specific example of this use-case, let's look at vibrate feature on -phones. Vibrate function on phones is implemented using PWM pins on SoC or -PMIC. There is a need to activate one shot timer to control the vibrate -feature, to prevent user space crashes leaving the phone in vibrate mode -permanently causing the battery to drain. - Transient trigger addresses the need for one shot timer activation. The transient trigger can be enabled and disabled just like the other leds triggers. @@ -159,7 +153,6 @@ repeat the following step as needed:: This trigger is intended to be used for the following example use cases: - - Control of vibrate (phones, tablets etc.) hardware by user space app. - Use of LED by user space app as activity indicator. - Use of LED by user space app as a kind of watchdog indicator -- as long as the app is alive, it can keep the LED illuminated, if it dies From deae5de3340fc1b967f3d868d55104f2c8f5c517 Mon Sep 17 00:00:00 2001 From: Pavel Machek Date: Mon, 17 Aug 2020 18:02:55 +0200 Subject: [PATCH 005/433] leds: sgm3140: fix led->LED for consistency Signed-off-by: Pavel Machek --- drivers/leds/leds-sgm3140.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/leds/leds-sgm3140.c b/drivers/leds/leds-sgm3140.c index c494b934ae09..28c8b31fa952 100644 --- a/drivers/leds/leds-sgm3140.c +++ b/drivers/leds/leds-sgm3140.c @@ -316,5 +316,5 @@ static struct platform_driver sgm3140_driver = { module_platform_driver(sgm3140_driver); MODULE_AUTHOR("Luca Weiss "); -MODULE_DESCRIPTION("SG Micro SGM3140 charge pump led driver"); +MODULE_DESCRIPTION("SG Micro SGM3140 charge pump LED driver"); MODULE_LICENSE("GPL v2"); From f8f79fa6bb258fe19cc0e9bc220807fb171d6865 Mon Sep 17 00:00:00 2001 From: Christian Eggers Date: Thu, 13 Aug 2020 10:59:59 +0200 Subject: [PATCH 006/433] dt-bindings: at25: convert the binding document to yaml Convert the binding document for at25 EEPROMs from txt to yaml. Signed-off-by: Christian Eggers Link: https://lore.kernel.org/r/20200813085959.15946-1-ceggers@arri.de Signed-off-by: Rob Herring --- .../devicetree/bindings/eeprom/at25.txt | 45 ------ .../devicetree/bindings/eeprom/at25.yaml | 129 ++++++++++++++++++ 2 files changed, 129 insertions(+), 45 deletions(-) delete mode 100644 Documentation/devicetree/bindings/eeprom/at25.txt create mode 100644 Documentation/devicetree/bindings/eeprom/at25.yaml diff --git a/Documentation/devicetree/bindings/eeprom/at25.txt b/Documentation/devicetree/bindings/eeprom/at25.txt deleted file mode 100644 index fcacd97abd0a..000000000000 --- a/Documentation/devicetree/bindings/eeprom/at25.txt +++ /dev/null @@ -1,45 +0,0 @@ -EEPROMs (SPI) compatible with Atmel at25. - -Required properties: -- compatible : Should be ",", and generic value "atmel,at25". - Example "," values: - "anvo,anv32e61w" - "microchip,25lc040" - "st,m95m02" - "st,m95256" - -- reg : chip select number -- spi-max-frequency : max spi frequency to use -- pagesize : size of the eeprom page -- size : total eeprom size in bytes -- address-width : number of address bits (one of 8, 9, 16, or 24). - For 9 bits, the MSB of the address is sent as bit 3 of the instruction - byte, before the address byte. - -Optional properties: -- spi-cpha : SPI shifted clock phase, as per spi-bus bindings. -- spi-cpol : SPI inverse clock polarity, as per spi-bus bindings. -- read-only : this parameter-less property disables writes to the eeprom -- wp-gpios : GPIO to which the write-protect pin of the chip is connected - -Obsolete legacy properties can be used in place of "size", "pagesize", -"address-width", and "read-only": -- at25,byte-len : total eeprom size in bytes -- at25,addr-mode : addr-mode flags, as defined in include/linux/spi/eeprom.h -- at25,page-size : size of the eeprom page - -Additional compatible properties are also allowed. - -Example: - eeprom@0 { - compatible = "st,m95256", "atmel,at25"; - reg = <0> - spi-max-frequency = <5000000>; - spi-cpha; - spi-cpol; - wp-gpios = <&gpio1 3 0>; - - pagesize = <64>; - size = <32768>; - address-width = <16>; - }; diff --git a/Documentation/devicetree/bindings/eeprom/at25.yaml b/Documentation/devicetree/bindings/eeprom/at25.yaml new file mode 100644 index 000000000000..9810619a2b5c --- /dev/null +++ b/Documentation/devicetree/bindings/eeprom/at25.yaml @@ -0,0 +1,129 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/eeprom/at25.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: SPI EEPROMs compatible with Atmel's AT25 + +maintainers: + - Christian Eggers + +properties: + $nodename: + pattern: "^eeprom@[0-9a-f]{1,2}$" + + # There are multiple known vendors who manufacture EEPROM chips compatible + # with Atmel's AT25. The compatible string requires two items where the + # 'vendor' and 'model' parts of the first are the actual chip and the second + # item is fixed to "atmel,at25". Some existing bindings only have the + # "atmel,at25" part and should be fixed by somebody who knows vendor and + # product. + compatible: + oneOf: + - items: + - enum: + - anvo,anv32e61w + - atmel,at25256B + - fujitsu,mb85rs1mt + - fujitsu,mb85rs64 + - microchip,at25160bn + - microchip,25lc040 + - st,m95m02 + - st,m95256 + + - const: atmel,at25 + + # Please don't use this alternative for new bindings. + - items: + - const: atmel,at25 + + reg: + description: + Chip select number. + + spi-max-frequency: true + + pagesize: + $ref: /schemas/types.yaml#definitions/uint32 + enum: [1, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384, 32768, 65536, 131072] + description: + Size of the eeprom page. + + size: + $ref: /schemas/types.yaml#definitions/uint32 + description: + Total eeprom size in bytes. + + address-width: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 8, 9, 16, 24 ] + description: + Number of address bits. + For 9 bits, the MSB of the address is sent as bit 3 of the instruction + byte, before the address byte. + + spi-cpha: true + + spi-cpol: true + + read-only: + description: + Disable writes to the eeprom. + type: boolean + + wp-gpios: + maxItems: 1 + description: + GPIO to which the write-protect pin of the chip is connected. + + # Deprecated: at25,byte-len, at25,addr-mode, at25,page-size + at25,byte-len: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Total eeprom size in bytes. Deprecated, use "size" property instead. + deprecated: true + + at25,addr-mode: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Addr-mode flags, as defined in include/linux/spi/eeprom.h. + Deprecated, use "address-width" property instead. + deprecated: true + + at25,page-size: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Size of the eeprom page. Deprecated, use "pagesize" property instead. + deprecated: true + +required: + - compatible + - reg + - spi-max-frequency + - pagesize + - size + - address-width + +additionalProperties: false + +examples: + - | + #include + spi0 { + #address-cells = <1>; + #size-cells = <0>; + + eeprom@0 { + compatible = "st,m95256", "atmel,at25"; + reg = <0>; + spi-max-frequency = <5000000>; + spi-cpha; + spi-cpol; + wp-gpios = <&gpio1 3 0>; + + pagesize = <64>; + size = <32768>; + address-width = <16>; + }; + }; From 8ebe6d29a3f163f9fe9fc71e15073913e0ee8ad6 Mon Sep 17 00:00:00 2001 From: Eddie James Date: Mon, 3 Aug 2020 09:50:54 -0500 Subject: [PATCH 007/433] dt-bindings: leds: pca955x: Add IBM implementation compatible string IBM created an implementation of the PCA9552 on a PIC16F microcontroller. Document the new compatible string for this device. Signed-off-by: Eddie James Acked-by: Rob Herring Signed-off-by: Pavel Machek --- Documentation/devicetree/bindings/leds/leds-pca955x.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/leds/leds-pca955x.txt b/Documentation/devicetree/bindings/leds/leds-pca955x.txt index 7a5830f8d5ab..817f460f3a72 100644 --- a/Documentation/devicetree/bindings/leds/leds-pca955x.txt +++ b/Documentation/devicetree/bindings/leds/leds-pca955x.txt @@ -9,6 +9,7 @@ Required properties: "nxp,pca9550" "nxp,pca9551" "nxp,pca9552" + "ibm,pca9552" "nxp,pca9553" - #address-cells: must be 1 - #size-cells: must be 0 From 46de3adb5240f33b6dbf89ca0dc4ba5c86abebb1 Mon Sep 17 00:00:00 2001 From: Eddie James Date: Mon, 3 Aug 2020 09:50:55 -0500 Subject: [PATCH 008/433] leds: pca955x: Add an IBM software implementation of the PCA9552 chip IBM created an implementation of the PCA9552 on a PIC16F microcontroller. The I2C device addresses are different from the hardware PCA9552, so add a new compatible string and associated platform data to be able to probe this device. Signed-off-by: Eddie James Reviewed-by: Vishwanatha Subbanna Signed-off-by: Pavel Machek --- drivers/leds/leds-pca955x.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/leds/leds-pca955x.c b/drivers/leds/leds-pca955x.c index 131f8e922ade..7087ca4592fc 100644 --- a/drivers/leds/leds-pca955x.c +++ b/drivers/leds/leds-pca955x.c @@ -65,6 +65,7 @@ enum pca955x_type { pca9550, pca9551, pca9552, + ibm_pca9552, pca9553, }; @@ -90,6 +91,11 @@ static struct pca955x_chipdef pca955x_chipdefs[] = { .slv_addr = /* 1100xxx */ 0x60, .slv_addr_shift = 3, }, + [ibm_pca9552] = { + .bits = 16, + .slv_addr = /* 0110xxx */ 0x30, + .slv_addr_shift = 3, + }, [pca9553] = { .bits = 4, .slv_addr = /* 110001x */ 0x62, @@ -101,6 +107,7 @@ static const struct i2c_device_id pca955x_id[] = { { "pca9550", pca9550 }, { "pca9551", pca9551 }, { "pca9552", pca9552 }, + { "ibm-pca9552", ibm_pca9552 }, { "pca9553", pca9553 }, { } }; @@ -412,6 +419,7 @@ static const struct of_device_id of_pca955x_match[] = { { .compatible = "nxp,pca9550", .data = (void *)pca9550 }, { .compatible = "nxp,pca9551", .data = (void *)pca9551 }, { .compatible = "nxp,pca9552", .data = (void *)pca9552 }, + { .compatible = "ibm,pca9552", .data = (void *)ibm_pca9552 }, { .compatible = "nxp,pca9553", .data = (void *)pca9553 }, {}, }; From 87e236845a3415eb7a7bc6600657c494abe41390 Mon Sep 17 00:00:00 2001 From: Randy Dunlap Date: Mon, 17 Aug 2020 12:11:29 -0700 Subject: [PATCH 009/433] leds: LP55XX_COMMON needs to depend on LEDS_CLASS With these kernel configs: CONFIG_LEDS_CLASS=m # CONFIG_LEDS_CLASS_MULTICOLOR is not set CONFIG_LEDS_LP55XX_COMMON=y CONFIG_LEDS_LP5521=m CONFIG_LEDS_LP5562=m leds-lp55xx-common.c has a build error because it is builtin and calls an interface that is built as a loadable module (due to LEDS_CLASS=m). By making LEDS_LP55XX_COMMON depend on LEDS_CLASS, this config combination cannot happen, thus preventing the build error. ld: drivers/leds/leds-lp55xx-common.o: in function `lp55xx_register_leds': leds-lp55xx-common.c:(.text+0xc5f): undefined reference to `devm_led_classdev_register_ext' Fixes: 33b3a561f417 ("leds: support new LP8501 device - another LP55xx common") Signed-off-by: Randy Dunlap Cc: Pavel Machek Cc: Dan Murphy Cc: Milo Kim Cc: linux-leds@vger.kernel.org Signed-off-by: Pavel Machek --- drivers/leds/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig index 1c181df24eae..3c54debfc432 100644 --- a/drivers/leds/Kconfig +++ b/drivers/leds/Kconfig @@ -397,6 +397,7 @@ config LEDS_LP3952 config LEDS_LP55XX_COMMON tristate "Common Driver for TI/National LP5521/5523/55231/5562/8501" + depends on LEDS_CLASS depends on LEDS_CLASS_MULTICOLOR || !LEDS_CLASS_MULTICOLOR depends on OF depends on I2C From dce1452301e7899468a2d46c826f23eba1e1dd28 Mon Sep 17 00:00:00 2001 From: Dan Murphy Date: Wed, 12 Aug 2020 14:50:15 -0500 Subject: [PATCH 010/433] dt: bindings: lp50xx: Introduce the lp50xx family of RGB drivers Introduce the bindings for the Texas Instruments LP5036, LP5030, LP5024, LP5018, LP5012 and LP5009 RGB LED device driver. The LP5036/30/24/18/12/9 can control RGB LEDs individually or as part of a control bank group. These devices have the ability to adjust the mixing control for the RGB LEDs to obtain different colors independent of the overall brightness of the LED grouping. Datasheet: http://www.ti.com/lit/ds/symlink/lp5012.pdf http://www.ti.com/lit/ds/symlink/lp5024.pdf http://www.ti.com/lit/ds/symlink/lp5036.pdf Reviewed-by: Rob Herring Acked-by: Jacek Anaszewski Acked-by: Pavel Machek Signed-off-by: Dan Murphy Signed-off-by: Pavel Machek --- .../devicetree/bindings/leds/leds-lp50xx.yaml | 130 ++++++++++++++++++ 1 file changed, 130 insertions(+) create mode 100644 Documentation/devicetree/bindings/leds/leds-lp50xx.yaml diff --git a/Documentation/devicetree/bindings/leds/leds-lp50xx.yaml b/Documentation/devicetree/bindings/leds/leds-lp50xx.yaml new file mode 100644 index 000000000000..947542a253ec --- /dev/null +++ b/Documentation/devicetree/bindings/leds/leds-lp50xx.yaml @@ -0,0 +1,130 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/leds/leds-lp50xx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: LED driver for LP50XX RGB LED from Texas Instruments. + +maintainers: + - Dan Murphy + +description: | + The LP50XX is multi-channel, I2C RGB LED Drivers that can group RGB LEDs into + a LED group or control them individually. + + The difference in these RGB LED drivers is the number of supported RGB + modules. + + For more product information please see the link below: + https://www.ti.com/lit/ds/symlink/lp5012.pdf + https://www.ti.com/lit/ds/symlink/lp5024.pdf + https://www.ti.com/lit/ds/symlink/lp5036.pdf + +properties: + compatible: + enum: + - ti,lp5009 + - ti,lp5012 + - ti,lp5018 + - ti,lp5024 + - ti,lp5030 + - ti,lp5036 + + reg: + maxItems: 1 + description: + I2C slave address + lp5009/12 - 0x14, 0x15, 0x16, 0x17 + lp5018/24 - 0x28, 0x29, 0x2a, 0x2b + lp5030/36 - 0x30, 0x31, 0x32, 0x33 + + enable-gpios: + maxItems: 1 + description: GPIO pin to enable/disable the device. + + vled-supply: + description: LED supply. + +patternProperties: + '^multi-led@[0-9a-f]$': + type: object + allOf: + - $ref: leds-class-multicolor.yaml# + properties: + reg: + minItems: 1 + maxItems: 12 + description: + This property denotes the LED module number(s) that is used on the + for the child node. The LED modules can either be used stand alone + or grouped into a module bank. + + patternProperties: + "(^led-[0-9a-f]$|led)": + type: object + $ref: common.yaml# + +required: + - compatible + - reg + +examples: + - | + #include + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + led-controller@14 { + compatible = "ti,lp5009"; + reg = <0x14>; + #address-cells = <1>; + #size-cells = <0>; + enable-gpios = <&gpio1 16>; + + multi-led@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x1>; + color = ; + function = LED_FUNCTION_CHARGING; + + led-0 { + color = ; + }; + + led-1 { + color = ; + }; + + led-2 { + color = ; + }; + }; + + multi-led@2 { + #address-cells = <1>; + #size-cells = <2>; + reg = <0x2 0x3 0x5>; + color = ; + function = LED_FUNCTION_STANDBY; + + led-6 { + color = ; + }; + + led-7 { + color = ; + }; + + led-8 { + color = ; + }; + }; + }; + }; + +... From 242b81170fb8a4a9d84ae183a8e0b1aaf2554d89 Mon Sep 17 00:00:00 2001 From: Dan Murphy Date: Wed, 12 Aug 2020 14:50:16 -0500 Subject: [PATCH 011/433] leds: lp50xx: Add the LP50XX family of the RGB LED driver Introduce the LP5036/30/24/18/12/9 RGB LED driver. The difference in these parts are the number of LED outputs where the: LP5036 can control 36 LEDs LP5030 can control 30 LEDs LP5024 can control 24 LEDs LP5018 can control 18 LEDs LP5012 can control 12 LEDs LP5009 can control 9 LEDs The device has the ability to group LED outputs into control banks so that multiple LED banks can be controlled with the same mixing and brightness. Or the LED outputs can also be controlled independently. Acked-by: Jacek Anaszewski Signed-off-by: Dan Murphy Signed-off-by: Pavel Machek --- drivers/leds/Kconfig | 11 + drivers/leds/Makefile | 1 + drivers/leds/leds-lp50xx.c | 634 +++++++++++++++++++++++++++++++++++++ 3 files changed, 646 insertions(+) create mode 100644 drivers/leds/leds-lp50xx.c diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig index 3c54debfc432..4f6464a169d5 100644 --- a/drivers/leds/Kconfig +++ b/drivers/leds/Kconfig @@ -395,6 +395,17 @@ config LEDS_LP3952 To compile this driver as a module, choose M here: the module will be called leds-lp3952. +config LEDS_LP50XX + tristate "LED Support for TI LP5036/30/24/18/12/9 LED driver chip" + depends on LEDS_CLASS && REGMAP_I2C + depends on LEDS_CLASS_MULTICOLOR || !LEDS_CLASS_MULTICOLOR + help + If you say yes here you get support for the Texas Instruments + LP5036, LP5030, LP5024, LP5018, LP5012 and LP5009 LED driver. + + To compile this driver as a module, choose M here: the + module will be called leds-lp50xx. + config LEDS_LP55XX_COMMON tristate "Common Driver for TI/National LP5521/5523/55231/5562/8501" depends on LEDS_CLASS diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile index c2c7d7ade0d0..778cb4bb8c52 100644 --- a/drivers/leds/Makefile +++ b/drivers/leds/Makefile @@ -49,6 +49,7 @@ obj-$(CONFIG_LEDS_LM3697) += leds-lm3697.o obj-$(CONFIG_LEDS_LOCOMO) += leds-locomo.o obj-$(CONFIG_LEDS_LP3944) += leds-lp3944.o obj-$(CONFIG_LEDS_LP3952) += leds-lp3952.o +obj-$(CONFIG_LEDS_LP50XX) += leds-lp50xx.o obj-$(CONFIG_LEDS_LP5521) += leds-lp5521.o obj-$(CONFIG_LEDS_LP5523) += leds-lp5523.o obj-$(CONFIG_LEDS_LP5562) += leds-lp5562.o diff --git a/drivers/leds/leds-lp50xx.c b/drivers/leds/leds-lp50xx.c new file mode 100644 index 000000000000..47144a37cb94 --- /dev/null +++ b/drivers/leds/leds-lp50xx.c @@ -0,0 +1,634 @@ +// SPDX-License-Identifier: GPL-2.0 +// TI LP50XX LED chip family driver +// Copyright (C) 2018-20 Texas Instruments Incorporated - https://www.ti.com/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include "leds.h" + +#define LP50XX_DEV_CFG0 0x00 +#define LP50XX_DEV_CFG1 0x01 +#define LP50XX_LED_CFG0 0x02 + +/* LP5009 and LP5012 registers */ +#define LP5012_BNK_BRT 0x03 +#define LP5012_BNKA_CLR 0x04 +#define LP5012_BNKB_CLR 0x05 +#define LP5012_BNKC_CLR 0x06 +#define LP5012_LED0_BRT 0x07 +#define LP5012_OUT0_CLR 0x0b +#define LP5012_RESET 0x17 + +/* LP5018 and LP5024 registers */ +#define LP5024_BNK_BRT 0x03 +#define LP5024_BNKA_CLR 0x04 +#define LP5024_BNKB_CLR 0x05 +#define LP5024_BNKC_CLR 0x06 +#define LP5024_LED0_BRT 0x07 +#define LP5024_OUT0_CLR 0x0f +#define LP5024_RESET 0x27 + +/* LP5030 and LP5036 registers */ +#define LP5036_LED_CFG1 0x03 +#define LP5036_BNK_BRT 0x04 +#define LP5036_BNKA_CLR 0x05 +#define LP5036_BNKB_CLR 0x06 +#define LP5036_BNKC_CLR 0x07 +#define LP5036_LED0_BRT 0x08 +#define LP5036_OUT0_CLR 0x14 +#define LP5036_RESET 0x38 + +#define LP50XX_SW_RESET 0xff +#define LP50XX_CHIP_EN BIT(6) + +/* There are 3 LED outputs per bank */ +#define LP50XX_LEDS_PER_MODULE 3 + +#define LP5009_MAX_LED_MODULES 2 +#define LP5012_MAX_LED_MODULES 4 +#define LP5018_MAX_LED_MODULES 6 +#define LP5024_MAX_LED_MODULES 8 +#define LP5030_MAX_LED_MODULES 10 +#define LP5036_MAX_LED_MODULES 12 + +static const struct reg_default lp5012_reg_defs[] = { + {LP50XX_DEV_CFG0, 0x0}, + {LP50XX_DEV_CFG1, 0x3c}, + {LP50XX_LED_CFG0, 0x0}, + {LP5012_BNK_BRT, 0xff}, + {LP5012_BNKA_CLR, 0x0f}, + {LP5012_BNKB_CLR, 0x0f}, + {LP5012_BNKC_CLR, 0x0f}, + {LP5012_LED0_BRT, 0x0f}, + /* LEDX_BRT registers are all 0xff for defaults */ + {0x08, 0xff}, {0x09, 0xff}, {0x0a, 0xff}, + {LP5012_OUT0_CLR, 0x0f}, + /* OUTX_CLR registers are all 0x0 for defaults */ + {0x0c, 0x00}, {0x0d, 0x00}, {0x0e, 0x00}, {0x0f, 0x00}, {0x10, 0x00}, + {0x11, 0x00}, {0x12, 0x00}, {0x13, 0x00}, {0x14, 0x00}, {0x15, 0x00}, + {0x16, 0x00}, + {LP5012_RESET, 0x00} +}; + +static const struct reg_default lp5024_reg_defs[] = { + {LP50XX_DEV_CFG0, 0x0}, + {LP50XX_DEV_CFG1, 0x3c}, + {LP50XX_LED_CFG0, 0x0}, + {LP5024_BNK_BRT, 0xff}, + {LP5024_BNKA_CLR, 0x0f}, + {LP5024_BNKB_CLR, 0x0f}, + {LP5024_BNKC_CLR, 0x0f}, + {LP5024_LED0_BRT, 0x0f}, + /* LEDX_BRT registers are all 0xff for defaults */ + {0x08, 0xff}, {0x09, 0xff}, {0x0a, 0xff}, {0x0b, 0xff}, {0x0c, 0xff}, + {0x0d, 0xff}, {0x0e, 0xff}, + {LP5024_OUT0_CLR, 0x0f}, + /* OUTX_CLR registers are all 0x0 for defaults */ + {0x10, 0x00}, {0x11, 0x00}, {0x12, 0x00}, {0x13, 0x00}, {0x14, 0x00}, + {0x15, 0x00}, {0x16, 0x00}, {0x17, 0x00}, {0x18, 0x00}, {0x19, 0x00}, + {0x1a, 0x00}, {0x1b, 0x00}, {0x1c, 0x00}, {0x1d, 0x00}, {0x1e, 0x00}, + {0x1f, 0x00}, {0x20, 0x00}, {0x21, 0x00}, {0x22, 0x00}, {0x23, 0x00}, + {0x24, 0x00}, {0x25, 0x00}, {0x26, 0x00}, + {LP5024_RESET, 0x00} +}; + +static const struct reg_default lp5036_reg_defs[] = { + {LP50XX_DEV_CFG0, 0x0}, + {LP50XX_DEV_CFG1, 0x3c}, + {LP50XX_LED_CFG0, 0x0}, + {LP5036_LED_CFG1, 0x0}, + {LP5036_BNK_BRT, 0xff}, + {LP5036_BNKA_CLR, 0x0f}, + {LP5036_BNKB_CLR, 0x0f}, + {LP5036_BNKC_CLR, 0x0f}, + {LP5036_LED0_BRT, 0x0f}, + /* LEDX_BRT registers are all 0xff for defaults */ + {0x08, 0xff}, {0x09, 0xff}, {0x0a, 0xff}, {0x0b, 0xff}, {0x0c, 0xff}, + {0x0d, 0xff}, {0x0e, 0xff}, {0x0f, 0xff}, {0x10, 0xff}, {0x11, 0xff}, + {0x12, 0xff}, {0x13, 0xff}, + {LP5036_OUT0_CLR, 0x0f}, + /* OUTX_CLR registers are all 0x0 for defaults */ + {0x15, 0x00}, {0x16, 0x00}, {0x17, 0x00}, {0x18, 0x00}, {0x19, 0x00}, + {0x1a, 0x00}, {0x1b, 0x00}, {0x1c, 0x00}, {0x1d, 0x00}, {0x1e, 0x00}, + {0x1f, 0x00}, {0x20, 0x00}, {0x21, 0x00}, {0x22, 0x00}, {0x23, 0x00}, + {0x24, 0x00}, {0x25, 0x00}, {0x26, 0x00}, {0x27, 0x00}, {0x28, 0x00}, + {0x29, 0x00}, {0x2a, 0x00}, {0x2b, 0x00}, {0x2c, 0x00}, {0x2d, 0x00}, + {0x2e, 0x00}, {0x2f, 0x00}, {0x30, 0x00}, {0x31, 0x00}, {0x32, 0x00}, + {0x33, 0x00}, {0x34, 0x00}, {0x35, 0x00}, {0x36, 0x00}, {0x37, 0x00}, + {LP5036_RESET, 0x00} +}; + +static const struct regmap_config lp5012_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + + .max_register = LP5012_RESET, + .reg_defaults = lp5012_reg_defs, + .num_reg_defaults = ARRAY_SIZE(lp5012_reg_defs), + .cache_type = REGCACHE_FLAT, +}; + +static const struct regmap_config lp5024_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + + .max_register = LP5024_RESET, + .reg_defaults = lp5024_reg_defs, + .num_reg_defaults = ARRAY_SIZE(lp5024_reg_defs), + .cache_type = REGCACHE_FLAT, +}; + +static const struct regmap_config lp5036_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + + .max_register = LP5036_RESET, + .reg_defaults = lp5036_reg_defs, + .num_reg_defaults = ARRAY_SIZE(lp5036_reg_defs), + .cache_type = REGCACHE_FLAT, +}; + +enum lp50xx_model { + LP5009, + LP5012, + LP5018, + LP5024, + LP5030, + LP5036, +}; + +/** + * struct lp50xx_chip_info - + * @lp50xx_regmap_config: regmap register configuration + * @model_id: LED device model + * @max_modules: total number of supported LED modules + * @num_leds: number of LED outputs available on the device + * @led_brightness0_reg: first brightness register of the device + * @mix_out0_reg: first color mix register of the device + * @bank_brt_reg: bank brightness register + * @bank_mix_reg: color mix register + * @reset_reg: device reset register + */ +struct lp50xx_chip_info { + const struct regmap_config *lp50xx_regmap_config; + int model_id; + u8 max_modules; + u8 num_leds; + u8 led_brightness0_reg; + u8 mix_out0_reg; + u8 bank_brt_reg; + u8 bank_mix_reg; + u8 reset_reg; +}; + +static const struct lp50xx_chip_info lp50xx_chip_info_tbl[] = { + [LP5009] = { + .model_id = LP5009, + .max_modules = LP5009_MAX_LED_MODULES, + .num_leds = LP5009_MAX_LED_MODULES * LP50XX_LEDS_PER_MODULE, + .led_brightness0_reg = LP5012_LED0_BRT, + .mix_out0_reg = LP5012_OUT0_CLR, + .bank_brt_reg = LP5012_BNK_BRT, + .bank_mix_reg = LP5012_BNKA_CLR, + .reset_reg = LP5012_RESET, + .lp50xx_regmap_config = &lp5012_regmap_config, + }, + [LP5012] = { + .model_id = LP5012, + .max_modules = LP5012_MAX_LED_MODULES, + .num_leds = LP5012_MAX_LED_MODULES * LP50XX_LEDS_PER_MODULE, + .led_brightness0_reg = LP5012_LED0_BRT, + .mix_out0_reg = LP5012_OUT0_CLR, + .bank_brt_reg = LP5012_BNK_BRT, + .bank_mix_reg = LP5012_BNKA_CLR, + .reset_reg = LP5012_RESET, + .lp50xx_regmap_config = &lp5012_regmap_config, + }, + [LP5018] = { + .model_id = LP5018, + .max_modules = LP5018_MAX_LED_MODULES, + .num_leds = LP5018_MAX_LED_MODULES * LP50XX_LEDS_PER_MODULE, + .led_brightness0_reg = LP5024_LED0_BRT, + .mix_out0_reg = LP5024_OUT0_CLR, + .bank_brt_reg = LP5024_BNK_BRT, + .bank_mix_reg = LP5024_BNKA_CLR, + .reset_reg = LP5024_RESET, + .lp50xx_regmap_config = &lp5024_regmap_config, + }, + [LP5024] = { + .model_id = LP5024, + .max_modules = LP5024_MAX_LED_MODULES, + .num_leds = LP5024_MAX_LED_MODULES * LP50XX_LEDS_PER_MODULE, + .led_brightness0_reg = LP5024_LED0_BRT, + .mix_out0_reg = LP5024_OUT0_CLR, + .bank_brt_reg = LP5024_BNK_BRT, + .bank_mix_reg = LP5024_BNKA_CLR, + .reset_reg = LP5024_RESET, + .lp50xx_regmap_config = &lp5024_regmap_config, + }, + [LP5030] = { + .model_id = LP5030, + .max_modules = LP5030_MAX_LED_MODULES, + .num_leds = LP5030_MAX_LED_MODULES * LP50XX_LEDS_PER_MODULE, + .led_brightness0_reg = LP5036_LED0_BRT, + .mix_out0_reg = LP5036_OUT0_CLR, + .bank_brt_reg = LP5036_BNK_BRT, + .bank_mix_reg = LP5036_BNKA_CLR, + .reset_reg = LP5036_RESET, + .lp50xx_regmap_config = &lp5036_regmap_config, + }, + [LP5036] = { + .model_id = LP5036, + .max_modules = LP5036_MAX_LED_MODULES, + .num_leds = LP5036_MAX_LED_MODULES * LP50XX_LEDS_PER_MODULE, + .led_brightness0_reg = LP5036_LED0_BRT, + .mix_out0_reg = LP5036_OUT0_CLR, + .bank_brt_reg = LP5036_BNK_BRT, + .bank_mix_reg = LP5036_BNKA_CLR, + .reset_reg = LP5036_RESET, + .lp50xx_regmap_config = &lp5036_regmap_config, + }, +}; + +struct lp50xx_led { + struct led_classdev_mc mc_cdev; + struct lp50xx *priv; + unsigned long bank_modules; + int led_intensity[LP50XX_LEDS_PER_MODULE]; + u8 ctrl_bank_enabled; + int led_number; +}; + +/** + * struct lp50xx - + * @enable_gpio: hardware enable gpio + * @regulator: LED supply regulator pointer + * @client: pointer to the I2C client + * @regmap: device register map + * @dev: pointer to the devices device struct + * @lock: lock for reading/writing the device + * @chip_info: chip specific information (ie num_leds) + * @num_of_banked_leds: holds the number of banked LEDs + * @leds: array of LED strings + */ +struct lp50xx { + struct gpio_desc *enable_gpio; + struct regulator *regulator; + struct i2c_client *client; + struct regmap *regmap; + struct device *dev; + struct mutex lock; + const struct lp50xx_chip_info *chip_info; + int num_of_banked_leds; + + /* This needs to be at the end of the struct */ + struct lp50xx_led leds[]; +}; + +static struct lp50xx_led *mcled_cdev_to_led(struct led_classdev_mc *mc_cdev) +{ + return container_of(mc_cdev, struct lp50xx_led, mc_cdev); +} + +static int lp50xx_brightness_set(struct led_classdev *cdev, + enum led_brightness brightness) +{ + struct led_classdev_mc *mc_dev = lcdev_to_mccdev(cdev); + struct lp50xx_led *led = mcled_cdev_to_led(mc_dev); + const struct lp50xx_chip_info *led_chip = led->priv->chip_info; + u8 led_offset, reg_val; + int ret = 0; + int i; + + mutex_lock(&led->priv->lock); + if (led->ctrl_bank_enabled) + reg_val = led_chip->bank_brt_reg; + else + reg_val = led_chip->led_brightness0_reg + + led->led_number; + + ret = regmap_write(led->priv->regmap, reg_val, brightness); + if (ret) { + dev_err(&led->priv->client->dev, + "Cannot write brightness value %d\n", ret); + goto out; + } + + for (i = 0; i < led->mc_cdev.num_colors; i++) { + if (led->ctrl_bank_enabled) { + reg_val = led_chip->bank_mix_reg + i; + } else { + led_offset = (led->led_number * 3) + i; + reg_val = led_chip->mix_out0_reg + led_offset; + } + + ret = regmap_write(led->priv->regmap, reg_val, + mc_dev->subled_info[i].intensity); + if (ret) { + dev_err(&led->priv->client->dev, + "Cannot write intensity value %d\n", ret); + goto out; + } + } +out: + mutex_unlock(&led->priv->lock); + return ret; +} + +static int lp50xx_set_banks(struct lp50xx *priv, u32 led_banks[]) +{ + u8 led_config_lo, led_config_hi; + u32 bank_enable_mask = 0; + int ret; + int i; + + for (i = 0; i < priv->chip_info->max_modules; i++) { + if (led_banks[i]) + bank_enable_mask |= (1 << led_banks[i]); + } + + led_config_lo = (u8)(bank_enable_mask & 0xff); + led_config_hi = (u8)(bank_enable_mask >> 8) & 0xff; + + ret = regmap_write(priv->regmap, LP50XX_LED_CFG0, led_config_lo); + if (ret) + return ret; + + if (priv->chip_info->model_id >= LP5030) + ret = regmap_write(priv->regmap, LP5036_LED_CFG1, led_config_hi); + + return ret; +} + +static int lp50xx_reset(struct lp50xx *priv) +{ + return regmap_write(priv->regmap, priv->chip_info->reset_reg, LP50XX_SW_RESET); +} + +static int lp50xx_enable_disable(struct lp50xx *priv, int enable_disable) +{ + int ret; + + if (priv->enable_gpio) { + ret = gpiod_direction_output(priv->enable_gpio, enable_disable); + if (ret) + return ret; + } + + if (enable_disable) + return regmap_write(priv->regmap, LP50XX_DEV_CFG0, LP50XX_CHIP_EN); + else + return regmap_write(priv->regmap, LP50XX_DEV_CFG0, 0); + +} + +static int lp50xx_probe_leds(struct fwnode_handle *child, struct lp50xx *priv, + struct lp50xx_led *led, int num_leds) +{ + u32 led_banks[LP5036_MAX_LED_MODULES] = {0}; + int led_number; + int ret; + + if (num_leds > 1) { + if (num_leds > priv->chip_info->max_modules) { + dev_err(&priv->client->dev, "reg property is invalid\n"); + return -EINVAL; + } + + priv->num_of_banked_leds = num_leds; + + ret = fwnode_property_read_u32_array(child, "reg", led_banks, num_leds); + if (ret) { + dev_err(&priv->client->dev, "reg property is missing\n"); + return ret; + } + + ret = lp50xx_set_banks(priv, led_banks); + if (ret) { + dev_err(&priv->client->dev, "Cannot setup banked LEDs\n"); + return ret; + } + + led->ctrl_bank_enabled = 1; + } else { + ret = fwnode_property_read_u32(child, "reg", &led_number); + if (ret) { + dev_err(&priv->client->dev, "led reg property missing\n"); + return ret; + } + + if (led_number > priv->chip_info->num_leds) { + dev_err(&priv->client->dev, "led-sources property is invalid\n"); + return -EINVAL; + } + + led->led_number = led_number; + } + + return 0; +} + +static int lp50xx_probe_dt(struct lp50xx *priv) +{ + struct fwnode_handle *child = NULL; + struct fwnode_handle *led_node = NULL; + struct led_init_data init_data = {}; + struct led_classdev *led_cdev; + struct mc_subled *mc_led_info; + struct lp50xx_led *led; + int ret = -EINVAL; + int num_colors; + u32 color_id; + int i = 0; + + priv->enable_gpio = devm_gpiod_get_optional(priv->dev, "enable", GPIOD_OUT_LOW); + if (IS_ERR(priv->enable_gpio)) { + ret = PTR_ERR(priv->enable_gpio); + dev_err(&priv->client->dev, "Failed to get enable gpio: %d\n", + ret); + return ret; + } + + priv->regulator = devm_regulator_get(priv->dev, "vled"); + if (IS_ERR(priv->regulator)) + priv->regulator = NULL; + + device_for_each_child_node(priv->dev, child) { + led = &priv->leds[i]; + ret = fwnode_property_count_u32(child, "reg"); + if (ret < 0) { + dev_err(&priv->client->dev, "reg property is invalid\n"); + goto child_out; + } + + ret = lp50xx_probe_leds(child, priv, led, ret); + if (ret) + goto child_out; + + init_data.fwnode = child; + num_colors = 0; + + /* + * There are only 3 LEDs per module otherwise they should be + * banked which also is presented as 3 LEDs. + */ + mc_led_info = devm_kcalloc(priv->dev, LP50XX_LEDS_PER_MODULE, + sizeof(*mc_led_info), GFP_KERNEL); + if (!mc_led_info) + return -ENOMEM; + + fwnode_for_each_child_node(child, led_node) { + ret = fwnode_property_read_u32(led_node, "color", + &color_id); + if (ret) { + dev_err(priv->dev, "Cannot read color\n"); + goto child_out; + } + + mc_led_info[num_colors].color_index = color_id; + num_colors++; + } + + led->priv = priv; + led->mc_cdev.num_colors = num_colors; + led->mc_cdev.subled_info = mc_led_info; + led_cdev = &led->mc_cdev.led_cdev; + led_cdev->brightness_set_blocking = lp50xx_brightness_set; + + fwnode_property_read_string(child, "linux,default-trigger", + &led_cdev->default_trigger); + + ret = devm_led_classdev_multicolor_register_ext(&priv->client->dev, + &led->mc_cdev, + &init_data); + if (ret) { + dev_err(&priv->client->dev, "led register err: %d\n", + ret); + goto child_out; + } + i++; + fwnode_handle_put(child); + } + + return 0; + +child_out: + fwnode_handle_put(child); + return ret; +} + +static int lp50xx_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct lp50xx *led; + int count; + int ret; + + count = device_get_child_node_count(&client->dev); + if (!count) { + dev_err(&client->dev, "LEDs are not defined in device tree!"); + return -ENODEV; + } + + led = devm_kzalloc(&client->dev, struct_size(led, leds, count), + GFP_KERNEL); + if (!led) + return -ENOMEM; + + mutex_init(&led->lock); + led->client = client; + led->dev = &client->dev; + led->chip_info = &lp50xx_chip_info_tbl[id->driver_data]; + i2c_set_clientdata(client, led); + led->regmap = devm_regmap_init_i2c(client, + led->chip_info->lp50xx_regmap_config); + if (IS_ERR(led->regmap)) { + ret = PTR_ERR(led->regmap); + dev_err(&client->dev, "Failed to allocate register map: %d\n", + ret); + return ret; + } + + ret = lp50xx_reset(led); + if (ret) + return ret; + + ret = lp50xx_enable_disable(led, 1); + if (ret) + return ret; + + return lp50xx_probe_dt(led); +} + +static int lp50xx_remove(struct i2c_client *client) +{ + struct lp50xx *led = i2c_get_clientdata(client); + int ret; + + ret = lp50xx_enable_disable(led, 0); + if (ret) { + dev_err(&led->client->dev, "Failed to disable chip\n"); + return ret; + } + + if (led->regulator) { + ret = regulator_disable(led->regulator); + if (ret) + dev_err(&led->client->dev, + "Failed to disable regulator\n"); + } + + mutex_destroy(&led->lock); + + return 0; +} + +static const struct i2c_device_id lp50xx_id[] = { + { "lp5009", LP5009 }, + { "lp5012", LP5012 }, + { "lp5018", LP5018 }, + { "lp5024", LP5024 }, + { "lp5030", LP5030 }, + { "lp5036", LP5036 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, lp50xx_id); + +static const struct of_device_id of_lp50xx_leds_match[] = { + { .compatible = "ti,lp5009", .data = (void *)LP5009 }, + { .compatible = "ti,lp5012", .data = (void *)LP5012 }, + { .compatible = "ti,lp5018", .data = (void *)LP5018 }, + { .compatible = "ti,lp5024", .data = (void *)LP5024 }, + { .compatible = "ti,lp5030", .data = (void *)LP5030 }, + { .compatible = "ti,lp5036", .data = (void *)LP5036 }, + {}, +}; +MODULE_DEVICE_TABLE(of, of_lp50xx_leds_match); + +static struct i2c_driver lp50xx_driver = { + .driver = { + .name = "lp50xx", + .of_match_table = of_lp50xx_leds_match, + }, + .probe = lp50xx_probe, + .remove = lp50xx_remove, + .id_table = lp50xx_id, +}; +module_i2c_driver(lp50xx_driver); + +MODULE_DESCRIPTION("Texas Instruments LP50XX LED driver"); +MODULE_AUTHOR("Dan Murphy "); +MODULE_LICENSE("GPL v2"); From 92adc6bcfad7a50fff13007f1dee316351a3605e Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Wed, 5 Aug 2020 10:38:11 +0800 Subject: [PATCH 012/433] dt-bindings: w1: Convert i.MX to json-schema Convert the i.MX one wire binding to DT schema format using json-schema. Signed-off-by: Anson Huang Link: https://lore.kernel.org/r/1596595091-26760-1-git-send-email-Anson.Huang@nxp.com Signed-off-by: Rob Herring --- .../devicetree/bindings/w1/fsl-imx-owire.txt | 18 -------- .../devicetree/bindings/w1/fsl-imx-owire.yaml | 44 +++++++++++++++++++ 2 files changed, 44 insertions(+), 18 deletions(-) delete mode 100644 Documentation/devicetree/bindings/w1/fsl-imx-owire.txt create mode 100644 Documentation/devicetree/bindings/w1/fsl-imx-owire.yaml diff --git a/Documentation/devicetree/bindings/w1/fsl-imx-owire.txt b/Documentation/devicetree/bindings/w1/fsl-imx-owire.txt deleted file mode 100644 index cbaa6467ab2c..000000000000 --- a/Documentation/devicetree/bindings/w1/fsl-imx-owire.txt +++ /dev/null @@ -1,18 +0,0 @@ -* Freescale i.MX One wire bus master controller - -Required properties: -- compatible : should be "fsl,imx21-owire" -- reg : Address and length of the register set for the device - -Optional properties: -- clocks : phandle of clock that supplies the module (required if platform - clock bindings use device tree) - -Example: - -- From imx53.dtsi: -owire: owire@63fa4000 { - compatible = "fsl,imx53-owire", "fsl,imx21-owire"; - reg = <0x63fa4000 0x4000>; - clocks = <&clks 159>; -}; diff --git a/Documentation/devicetree/bindings/w1/fsl-imx-owire.yaml b/Documentation/devicetree/bindings/w1/fsl-imx-owire.yaml new file mode 100644 index 000000000000..1aaf3e768c81 --- /dev/null +++ b/Documentation/devicetree/bindings/w1/fsl-imx-owire.yaml @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/w1/fsl-imx-owire.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX One wire bus master controller + +maintainers: + - Martin Fuzzey + +properties: + compatible: + oneOf: + - const: fsl,imx21-owire + - items: + - enum: + - fsl,imx27-owire + - fsl,imx50-owire + - fsl,imx51-owire + - fsl,imx53-owire + - const: fsl,imx21-owire + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include + + owire@63fa4000 { + compatible = "fsl,imx53-owire", "fsl,imx21-owire"; + reg = <0x63fa4000 0x4000>; + clocks = <&clks IMX5_CLK_OWIRE_GATE>; + }; From 92ced918448d204119d603329017aa23add17eb7 Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Wed, 5 Aug 2020 10:43:28 +0800 Subject: [PATCH 013/433] dt-bindings: crypto: Convert MXS DCP to json-schema Convert the MXS DCP binding to DT schema format using json-schema. Signed-off-by: Anson Huang Link: https://lore.kernel.org/r/1596595410-26921-1-git-send-email-Anson.Huang@nxp.com Signed-off-by: Rob Herring --- .../devicetree/bindings/crypto/fsl-dcp.txt | 18 ------- .../devicetree/bindings/crypto/fsl-dcp.yaml | 51 +++++++++++++++++++ 2 files changed, 51 insertions(+), 18 deletions(-) delete mode 100644 Documentation/devicetree/bindings/crypto/fsl-dcp.txt create mode 100644 Documentation/devicetree/bindings/crypto/fsl-dcp.yaml diff --git a/Documentation/devicetree/bindings/crypto/fsl-dcp.txt b/Documentation/devicetree/bindings/crypto/fsl-dcp.txt deleted file mode 100644 index 513499fcdb5b..000000000000 --- a/Documentation/devicetree/bindings/crypto/fsl-dcp.txt +++ /dev/null @@ -1,18 +0,0 @@ -Freescale DCP (Data Co-Processor) found on i.MX23/i.MX28 . - -Required properties: -- compatible : Should be "fsl,-dcp" -- reg : Should contain MXS DCP registers location and length -- interrupts : Should contain MXS DCP interrupt numbers, VMI IRQ and DCP IRQ - must be supplied, optionally Secure IRQ can be present, but - is currently not implemented and not used. -- clocks : Clock reference (only required on some SOCs: 6ull and 6sll). -- clock-names : Must be "dcp". - -Example: - -dcp: crypto@80028000 { - compatible = "fsl,imx28-dcp", "fsl,imx23-dcp"; - reg = <0x80028000 0x2000>; - interrupts = <52 53>; -}; diff --git a/Documentation/devicetree/bindings/crypto/fsl-dcp.yaml b/Documentation/devicetree/bindings/crypto/fsl-dcp.yaml new file mode 100644 index 000000000000..a30bf38a4a49 --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/fsl-dcp.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/crypto/fsl-dcp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale DCP (Data Co-Processor) found on i.MX23/i.MX28 + +maintainers: + - Marek Vasut + +properties: + compatible: + enum: + - fsl,imx23-dcp + - fsl,imx28-dcp + + reg: + maxItems: 1 + + interrupts: + description: Should contain MXS DCP interrupt numbers, VMI IRQ and DCP IRQ + must be supplied, optionally Secure IRQ can be present, but is currently + not implemented and not used. + items: + - description: MXS DCP VMI interrupt + - description: MXS DCP DCP interrupt + - description: MXS DCP secure interrupt + minItems: 2 + maxItems: 3 + + clocks: + maxItems: 1 + + clock-names: + const: dcp + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + crypto@80028000 { + compatible = "fsl,imx23-dcp"; + reg = <0x80028000 0x2000>; + interrupts = <53>, <54>; + }; From 921ab310873f3ebc864d7d69285f83fc62fb0b5e Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Wed, 5 Aug 2020 10:43:29 +0800 Subject: [PATCH 014/433] dt-bindings: crypto: Convert i.MX SCC to json-schema Convert the i.MX SCC binding to DT schema format using json-schema. Signed-off-by: Anson Huang Link: https://lore.kernel.org/r/1596595410-26921-2-git-send-email-Anson.Huang@nxp.com Signed-off-by: Rob Herring --- .../bindings/crypto/fsl-imx-scc.txt | 21 -------- .../bindings/crypto/fsl-imx-scc.yaml | 54 +++++++++++++++++++ 2 files changed, 54 insertions(+), 21 deletions(-) delete mode 100644 Documentation/devicetree/bindings/crypto/fsl-imx-scc.txt create mode 100644 Documentation/devicetree/bindings/crypto/fsl-imx-scc.yaml diff --git a/Documentation/devicetree/bindings/crypto/fsl-imx-scc.txt b/Documentation/devicetree/bindings/crypto/fsl-imx-scc.txt deleted file mode 100644 index 7aad448e8a36..000000000000 --- a/Documentation/devicetree/bindings/crypto/fsl-imx-scc.txt +++ /dev/null @@ -1,21 +0,0 @@ -Freescale Security Controller (SCC) - -Required properties: -- compatible : Should be "fsl,imx25-scc". -- reg : Should contain register location and length. -- interrupts : Should contain interrupt numbers for SCM IRQ and SMN IRQ. -- interrupt-names : Should specify the names "scm" and "smn" for the - SCM IRQ and SMN IRQ. -- clocks: Should contain the clock driving the SCC core. -- clock-names: Should be set to "ipg". - -Example: - - scc: crypto@53fac000 { - compatible = "fsl,imx25-scc"; - reg = <0x53fac000 0x4000>; - clocks = <&clks 111>; - clock-names = "ipg"; - interrupts = <49>, <50>; - interrupt-names = "scm", "smn"; - }; diff --git a/Documentation/devicetree/bindings/crypto/fsl-imx-scc.yaml b/Documentation/devicetree/bindings/crypto/fsl-imx-scc.yaml new file mode 100644 index 000000000000..563a31605d2b --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/fsl-imx-scc.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/crypto/fsl-imx-scc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale Security Controller (SCC) + +maintainers: + - Steffen Trumtrar + +properties: + compatible: + const: fsl,imx25-scc + + reg: + maxItems: 1 + + interrupts: + items: + - description: SCC SCM interrupt + - description: SCC SMN interrupt + + interrupt-names: + items: + - const: scm + - const: smn + + clocks: + maxItems: 1 + + clock-names: + const: ipg + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + crypto@53fac000 { + compatible = "fsl,imx25-scc"; + reg = <0x53fac000 0x4000>; + clocks = <&clks 111>; + clock-names = "ipg"; + interrupts = <49>, <50>; + interrupt-names = "scm", "smn"; + }; From 21d3aecc88c60a00b55623b4bba5811a97547991 Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Wed, 5 Aug 2020 10:43:30 +0800 Subject: [PATCH 015/433] dt-bindings: crypto: Convert i.MX sahara to json-schema Convert the i.MX sahara binding to DT schema format using json-schema. Signed-off-by: Anson Huang Link: https://lore.kernel.org/r/1596595410-26921-3-git-send-email-Anson.Huang@nxp.com Signed-off-by: Rob Herring --- .../bindings/crypto/fsl-imx-sahara.txt | 15 -------- .../bindings/crypto/fsl-imx-sahara.yaml | 37 +++++++++++++++++++ 2 files changed, 37 insertions(+), 15 deletions(-) delete mode 100644 Documentation/devicetree/bindings/crypto/fsl-imx-sahara.txt create mode 100644 Documentation/devicetree/bindings/crypto/fsl-imx-sahara.yaml diff --git a/Documentation/devicetree/bindings/crypto/fsl-imx-sahara.txt b/Documentation/devicetree/bindings/crypto/fsl-imx-sahara.txt deleted file mode 100644 index db690b10e582..000000000000 --- a/Documentation/devicetree/bindings/crypto/fsl-imx-sahara.txt +++ /dev/null @@ -1,15 +0,0 @@ -Freescale SAHARA Cryptographic Accelerator included in some i.MX chips. -Currently only i.MX27 and i.MX53 are supported. - -Required properties: -- compatible : Should be "fsl,-sahara" -- reg : Should contain SAHARA registers location and length -- interrupts : Should contain SAHARA interrupt number - -Example: - -sah: crypto@10025000 { - compatible = "fsl,imx27-sahara"; - reg = < 0x10025000 0x800>; - interrupts = <75>; -}; diff --git a/Documentation/devicetree/bindings/crypto/fsl-imx-sahara.yaml b/Documentation/devicetree/bindings/crypto/fsl-imx-sahara.yaml new file mode 100644 index 000000000000..d531f3af3ea4 --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/fsl-imx-sahara.yaml @@ -0,0 +1,37 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/crypto/fsl-imx-sahara.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale SAHARA Cryptographic Accelerator included in some i.MX chips + +maintainers: + - Steffen Trumtrar + +properties: + compatible: + enum: + - fsl,imx27-sahara + - fsl,imx53-sahara + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + crypto@10025000 { + compatible = "fsl,imx27-sahara"; + reg = < 0x10025000 0x800>; + interrupts = <75>; + }; From 8ba41d6bd9893200f54f61e49938899d76d30307 Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Wed, 5 Aug 2020 10:50:40 +0800 Subject: [PATCH 016/433] dt-bindings: fsl: Convert i.MX7ULP PM to json-schema Convert the i.MX7ULP PM binding to DT schema format using json-schema. Signed-off-by: Anson Huang Link: https://lore.kernel.org/r/1596595841-27563-1-git-send-email-Anson.Huang@nxp.com Signed-off-by: Rob Herring --- .../bindings/arm/freescale/fsl,imx7ulp-pm.txt | 23 ---------- .../arm/freescale/fsl,imx7ulp-pm.yaml | 42 +++++++++++++++++++ 2 files changed, 42 insertions(+), 23 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-pm.txt create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-pm.yaml diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-pm.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-pm.txt deleted file mode 100644 index 75195bee116f..000000000000 --- a/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-pm.txt +++ /dev/null @@ -1,23 +0,0 @@ -Freescale i.MX7ULP Power Management Components ----------------------------------------------- - -The Multi-System Mode Controller (MSMC) is responsible for sequencing -the MCU into and out of all stop and run power modes. Specifically, it -monitors events to trigger transitions between power modes while -controlling the power, clocks, and memories of the MCU to achieve the -power consumption and functionality of that mode. - -The WFI or WFE instruction is used to invoke a Sleep, Deep Sleep or -Standby modes for either Cortex family. Run, Wait, and Stop are the -common terms used for the primary operating modes of Kinetis -microcontrollers. - -Required properties: -- compatible: Should be "fsl,imx7ulp-smc1". -- reg: Specifies base physical address and size of the register sets. - -Example: -smc1: smc1@40410000 { - compatible = "fsl,imx7ulp-smc1"; - reg = <0x40410000 0x1000>; -}; diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-pm.yaml b/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-pm.yaml new file mode 100644 index 000000000000..3b26040f8f18 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-pm.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/freescale/fsl,imx7ulp-pm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX7ULP Power Management Components + +maintainers: + - A.s. Dong + +description: | + The Multi-System Mode Controller (MSMC) is responsible for sequencing + the MCU into and out of all stop and run power modes. Specifically, it + monitors events to trigger transitions between power modes while + controlling the power, clocks, and memories of the MCU to achieve the + power consumption and functionality of that mode. + + The WFI or WFE instruction is used to invoke a Sleep, Deep Sleep or + Standby modes for either Cortex family. Run, Wait, and Stop are the + common terms used for the primary operating modes of Kinetis + microcontrollers. + +properties: + compatible: + const: fsl,imx7ulp-smc1 + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + smc1@40410000 { + compatible = "fsl,imx7ulp-smc1"; + reg = <0x40410000 0x1000>; + }; From a505e52a65918f5f0010274289c6019519a2b32c Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Wed, 5 Aug 2020 10:50:41 +0800 Subject: [PATCH 017/433] dt-bindings: fsl: Convert i.MX7ULP SIM to json-schema Convert the i.MX7ULP SIM binding to DT schema format using json-schema. Signed-off-by: Anson Huang Link: https://lore.kernel.org/r/1596595841-27563-2-git-send-email-Anson.Huang@nxp.com Signed-off-by: Rob Herring --- .../arm/freescale/fsl,imx7ulp-sim.txt | 16 -------- .../arm/freescale/fsl,imx7ulp-sim.yaml | 38 +++++++++++++++++++ 2 files changed, 38 insertions(+), 16 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-sim.txt create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-sim.yaml diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-sim.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-sim.txt deleted file mode 100644 index 7d0c7f002401..000000000000 --- a/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-sim.txt +++ /dev/null @@ -1,16 +0,0 @@ -Freescale i.MX7ULP System Integration Module ----------------------------------------------- -The system integration module (SIM) provides system control and chip configuration -registers. In this module, chip revision information is located in JTAG ID register, -and a set of registers have been made available in DGO domain for SW use, with the -objective to maintain its value between system resets. - -Required properties: -- compatible: Should be "fsl,imx7ulp-sim". -- reg: Specifies base physical address and size of the register sets. - -Example: -sim: sim@410a3000 { - compatible = "fsl,imx7ulp-sim", "syscon"; - reg = <0x410a3000 0x1000>; -}; diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-sim.yaml b/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-sim.yaml new file mode 100644 index 000000000000..526f508cb98d --- /dev/null +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-sim.yaml @@ -0,0 +1,38 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/freescale/fsl,imx7ulp-sim.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX7ULP System Integration Module + +maintainers: + - Anson Huang + +description: | + The system integration module (SIM) provides system control and chip configuration + registers. In this module, chip revision information is located in JTAG ID register, + and a set of registers have been made available in DGO domain for SW use, with the + objective to maintain its value between system resets. + +properties: + compatible: + items: + - const: fsl,imx7ulp-sim + - const: syscon + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + sim@410a3000 { + compatible = "fsl,imx7ulp-sim", "syscon"; + reg = <0x410a3000 0x1000>; + }; From f83febb44b42cf55e4f0cc9853f87801a82770b2 Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Wed, 5 Aug 2020 14:28:04 +0800 Subject: [PATCH 018/433] dt-bindings: rng: Convert i.MX to json-schema Convert the i.MX rng binding to DT schema format using json-schema. Signed-off-by: Anson Huang Link: https://lore.kernel.org/r/1596608884-13205-1-git-send-email-Anson.Huang@nxp.com Signed-off-by: Rob Herring --- .../devicetree/bindings/rng/imx-rng.txt | 23 -------- .../devicetree/bindings/rng/imx-rng.yaml | 52 +++++++++++++++++++ 2 files changed, 52 insertions(+), 23 deletions(-) delete mode 100644 Documentation/devicetree/bindings/rng/imx-rng.txt create mode 100644 Documentation/devicetree/bindings/rng/imx-rng.yaml diff --git a/Documentation/devicetree/bindings/rng/imx-rng.txt b/Documentation/devicetree/bindings/rng/imx-rng.txt deleted file mode 100644 index 659d4efdd664..000000000000 --- a/Documentation/devicetree/bindings/rng/imx-rng.txt +++ /dev/null @@ -1,23 +0,0 @@ -Freescale RNGA/RNGB/RNGC (Random Number Generator Versions A, B and C) - -Required properties: -- compatible : should be one of - "fsl,imx21-rnga" - "fsl,imx31-rnga" (backward compatible with "fsl,imx21-rnga") - "fsl,imx25-rngb" - "fsl,imx6sl-rngb" (backward compatible with "fsl,imx25-rngb") - "fsl,imx6sll-rngb" (backward compatible with "fsl,imx25-rngb") - "fsl,imx6ull-rngb" (backward compatible with "fsl,imx25-rngb") - "fsl,imx35-rngc" -- reg : offset and length of the register set of this block -- interrupts : the interrupt number for the RNG block -- clocks : the RNG clk source - -Example: - -rng@53fb0000 { - compatible = "fsl,imx25-rngb"; - reg = <0x53fb0000 0x4000>; - interrupts = <22>; - clocks = <&trng_clk>; -}; diff --git a/Documentation/devicetree/bindings/rng/imx-rng.yaml b/Documentation/devicetree/bindings/rng/imx-rng.yaml new file mode 100644 index 000000000000..4ad1e456a801 --- /dev/null +++ b/Documentation/devicetree/bindings/rng/imx-rng.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rng/imx-rng.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale RNGA/RNGB/RNGC (Random Number Generator Versions A, B and C) + +maintainers: + - Vladimir Zapolskiy + +properties: + compatible: + oneOf: + - const: fsl,imx21-rnga + - const: fsl,imx25-rngb + - items: + - const: fsl,imx31-rnga + - const: fsl,imx21-rnga + - items: + - enum: + - fsl,imx6sl-rngb + - fsl,imx6sll-rngb + - fsl,imx6ull-rngb + - const: fsl,imx25-rngb + - const: fsl,imx35-rngc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + +additionalProperties: false + +examples: + - | + rngb@53fb0000 { + compatible = "fsl,imx25-rngb"; + reg = <0x53fb0000 0x4000>; + clocks = <&clks 109>; + interrupts = <22>; + }; From fd0ae78d04f3a64975df8ea08fbed816d3e0c2fe Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Wed, 5 Aug 2020 14:36:27 +0800 Subject: [PATCH 019/433] dt-bindings: perf: Convert i.MX DDR to json-schema Convert the i.MX DDR perf binding to DT schema format using json-schema. Signed-off-by: Anson Huang Link: https://lore.kernel.org/r/1596609387-23542-1-git-send-email-Anson.Huang@nxp.com Signed-off-by: Rob Herring --- .../devicetree/bindings/perf/fsl-imx-ddr.txt | 22 ---------- .../devicetree/bindings/perf/fsl-imx-ddr.yaml | 41 +++++++++++++++++++ 2 files changed, 41 insertions(+), 22 deletions(-) delete mode 100644 Documentation/devicetree/bindings/perf/fsl-imx-ddr.txt create mode 100644 Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml diff --git a/Documentation/devicetree/bindings/perf/fsl-imx-ddr.txt b/Documentation/devicetree/bindings/perf/fsl-imx-ddr.txt deleted file mode 100644 index 7822a806ea0a..000000000000 --- a/Documentation/devicetree/bindings/perf/fsl-imx-ddr.txt +++ /dev/null @@ -1,22 +0,0 @@ -* Freescale(NXP) IMX8 DDR performance monitor - -Required properties: - -- compatible: should be one of: - "fsl,imx8-ddr-pmu" - "fsl,imx8m-ddr-pmu" - "fsl,imx8mp-ddr-pmu" - -- reg: physical address and size - -- interrupts: single interrupt - generated by the control block - -Example: - - ddr-pmu@5c020000 { - compatible = "fsl,imx8-ddr-pmu"; - reg = <0x5c020000 0x10000>; - interrupt-parent = <&gic>; - interrupts = ; - }; diff --git a/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml b/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml new file mode 100644 index 000000000000..9ed8f44adabe --- /dev/null +++ b/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml @@ -0,0 +1,41 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/perf/fsl-imx-ddr.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale(NXP) IMX8 DDR performance monitor + +maintainers: + - Frank Li + +properties: + compatible: + enum: + - fsl,imx8-ddr-pmu + - fsl,imx8m-ddr-pmu + - fsl,imx8mp-ddr-pmu + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + #include + + ddr-pmu@5c020000 { + compatible = "fsl,imx8-ddr-pmu"; + reg = <0x5c020000 0x10000>; + interrupt-parent = <&gic>; + interrupts = ; + }; From 3a52d2986204fb90a830ac3c9d5967226f28cd6e Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Wed, 5 Aug 2020 14:49:32 +0800 Subject: [PATCH 020/433] dt-bindings: nvmem: Convert snvs lpgpr to json-schema Convert the snvs lpgpr binding to DT schema format using json-schema. Signed-off-by: Anson Huang Link: https://lore.kernel.org/r/1596610172-30323-1-git-send-email-Anson.Huang@nxp.com Signed-off-by: Rob Herring --- .../devicetree/bindings/nvmem/snvs-lpgpr.txt | 21 ------------ .../devicetree/bindings/nvmem/snvs-lpgpr.yaml | 33 +++++++++++++++++++ 2 files changed, 33 insertions(+), 21 deletions(-) delete mode 100644 Documentation/devicetree/bindings/nvmem/snvs-lpgpr.txt create mode 100644 Documentation/devicetree/bindings/nvmem/snvs-lpgpr.yaml diff --git a/Documentation/devicetree/bindings/nvmem/snvs-lpgpr.txt b/Documentation/devicetree/bindings/nvmem/snvs-lpgpr.txt deleted file mode 100644 index 3cb170896658..000000000000 --- a/Documentation/devicetree/bindings/nvmem/snvs-lpgpr.txt +++ /dev/null @@ -1,21 +0,0 @@ -Device tree bindings for Low Power General Purpose Register found in i.MX6Q/D -and i.MX7 Secure Non-Volatile Storage. - -This DT node should be represented as a sub-node of a "syscon", -"simple-mfd" node. - -Required properties: -- compatible: should be one of the fallowing variants: - "fsl,imx6q-snvs-lpgpr" for Freescale i.MX6Q/D/DL/S - "fsl,imx6ul-snvs-lpgpr" for Freescale i.MX6UL - "fsl,imx7d-snvs-lpgpr" for Freescale i.MX7D/S - -Example: -snvs: snvs@020cc000 { - compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd"; - reg = <0x020cc000 0x4000>; - - snvs_lpgpr: snvs-lpgpr { - compatible = "fsl,imx6q-snvs-lpgpr"; - }; -}; diff --git a/Documentation/devicetree/bindings/nvmem/snvs-lpgpr.yaml b/Documentation/devicetree/bindings/nvmem/snvs-lpgpr.yaml new file mode 100644 index 000000000000..c819f0e90320 --- /dev/null +++ b/Documentation/devicetree/bindings/nvmem/snvs-lpgpr.yaml @@ -0,0 +1,33 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/nvmem/snvs-lpgpr.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Low Power General Purpose Register found in i.MX Secure Non-Volatile Storage + +maintainers: + - Oleksij Rempel + +properties: + compatible: + enum: + - fsl,imx6q-snvs-lpgpr + - fsl,imx6ul-snvs-lpgpr + - fsl,imx7d-snvs-lpgpr + +required: + - compatible + +additionalProperties: false + +examples: + - | + snvs@20cc000 { + compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd"; + reg = <0x20cc000 0x4000>; + + snvs_lpgpr: snvs-lpgpr { + compatible = "fsl,imx6q-snvs-lpgpr"; + }; + }; From 5deac4589111aeee2b65ad59d8e67ce68a175ae7 Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Wed, 5 Aug 2020 15:15:46 +0800 Subject: [PATCH 021/433] dt-bindings: ata: Convert i.MX sata to json-schema Convert the i.MX sata binding to DT schema format using json-schema. Signed-off-by: Anson Huang Link: https://lore.kernel.org/r/1596611746-29155-1-git-send-email-Anson.Huang@nxp.com Signed-off-by: Rob Herring --- .../devicetree/bindings/ata/imx-sata.txt | 37 --------- .../devicetree/bindings/ata/imx-sata.yaml | 83 +++++++++++++++++++ 2 files changed, 83 insertions(+), 37 deletions(-) delete mode 100644 Documentation/devicetree/bindings/ata/imx-sata.txt create mode 100644 Documentation/devicetree/bindings/ata/imx-sata.yaml diff --git a/Documentation/devicetree/bindings/ata/imx-sata.txt b/Documentation/devicetree/bindings/ata/imx-sata.txt deleted file mode 100644 index 781f88751762..000000000000 --- a/Documentation/devicetree/bindings/ata/imx-sata.txt +++ /dev/null @@ -1,37 +0,0 @@ -* Freescale i.MX AHCI SATA Controller - -The Freescale i.MX SATA controller mostly conforms to the AHCI interface -with some special extensions at integration level. - -Required properties: -- compatible : should be one of the following: - - "fsl,imx53-ahci" for i.MX53 SATA controller - - "fsl,imx6q-ahci" for i.MX6Q SATA controller - - "fsl,imx6qp-ahci" for i.MX6QP SATA controller -- interrupts : interrupt mapping for SATA IRQ -- reg : registers mapping -- clocks : list of clock specifiers, must contain an entry for each - required entry in clock-names -- clock-names : should include "sata", "sata_ref" and "ahb" entries - -Optional properties: -- fsl,transmit-level-mV : transmit voltage level, in millivolts. -- fsl,transmit-boost-mdB : transmit boost level, in milli-decibels -- fsl,transmit-atten-16ths : transmit attenuation, in 16ths -- fsl,receive-eq-mdB : receive equalisation, in milli-decibels - Please refer to the technical documentation or the driver source code - for the list of legal values for these options. -- fsl,no-spread-spectrum : disable spread-spectrum clocking on the SATA - link. - -Examples: - -sata@2200000 { - compatible = "fsl,imx6q-ahci"; - reg = <0x02200000 0x4000>; - interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6QDL_CLK_SATA>, - <&clks IMX6QDL_CLK_SATA_REF_100M>, - <&clks IMX6QDL_CLK_AHB>; - clock-names = "sata", "sata_ref", "ahb"; -}; diff --git a/Documentation/devicetree/bindings/ata/imx-sata.yaml b/Documentation/devicetree/bindings/ata/imx-sata.yaml new file mode 100644 index 000000000000..68ffb97ddc9b --- /dev/null +++ b/Documentation/devicetree/bindings/ata/imx-sata.yaml @@ -0,0 +1,83 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ata/imx-sata.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX AHCI SATA Controller + +maintainers: + - Shawn Guo + +description: | + The Freescale i.MX SATA controller mostly conforms to the AHCI interface + with some special extensions at integration level. + +properties: + compatible: + enum: + - fsl,imx53-ahci + - fsl,imx6q-ahci + - fsl,imx6qp-ahci + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: sata clock + - description: sata reference clock + - description: ahb clock + + clock-names: + items: + - const: sata + - const: sata_ref + - const: ahb + + fsl,transmit-level-mV: + $ref: /schemas/types.yaml#/definitions/uint32 + description: transmit voltage level, in millivolts. + + fsl,transmit-boost-mdB: + $ref: /schemas/types.yaml#/definitions/uint32 + description: transmit boost level, in milli-decibels. + + fsl,transmit-atten-16ths: + $ref: /schemas/types.yaml#/definitions/uint32 + description: transmit attenuation, in 16ths. + + fsl,receive-eq-mdB: + $ref: /schemas/types.yaml#/definitions/uint32 + description: receive equalisation, in milli-decibels. + + fsl,no-spread-spectrum: + $ref: /schemas/types.yaml#/definitions/flag + description: if present, disable spread-spectrum clocking on the SATA link. + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include + #include + + sata@2200000 { + compatible = "fsl,imx6q-ahci"; + reg = <0x02200000 0x4000>; + interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX6QDL_CLK_SATA>, + <&clks IMX6QDL_CLK_SATA_REF_100M>, + <&clks IMX6QDL_CLK_AHB>; + clock-names = "sata", "sata_ref", "ahb"; + }; From 1c5711876b32470ba5983f9aa9b2a25dd5bc9639 Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Wed, 12 Aug 2020 15:52:21 +0800 Subject: [PATCH 022/433] dt-bindings: gpio: Convert vf610 to json-schema Convert the vf610 gpio binding to DT schema format using json-schema. Signed-off-by: Anson Huang Link: https://lore.kernel.org/r/1597218741-24899-1-git-send-email-Anson.Huang@nxp.com Signed-off-by: Rob Herring --- .../devicetree/bindings/gpio/gpio-vf610.txt | 63 --------------- .../devicetree/bindings/gpio/gpio-vf610.yaml | 81 +++++++++++++++++++ 2 files changed, 81 insertions(+), 63 deletions(-) delete mode 100644 Documentation/devicetree/bindings/gpio/gpio-vf610.txt create mode 100644 Documentation/devicetree/bindings/gpio/gpio-vf610.yaml diff --git a/Documentation/devicetree/bindings/gpio/gpio-vf610.txt b/Documentation/devicetree/bindings/gpio/gpio-vf610.txt deleted file mode 100644 index ae254aadee35..000000000000 --- a/Documentation/devicetree/bindings/gpio/gpio-vf610.txt +++ /dev/null @@ -1,63 +0,0 @@ -* Freescale VF610 PORT/GPIO module - -The Freescale PORT/GPIO modules are two adjacent modules providing GPIO -functionality. Each pair serves 32 GPIOs. The VF610 has 5 instances of -each, and each PORT module has its own interrupt. - -Required properties for GPIO node: -- compatible : Should be "fsl,-gpio", below is supported list: - "fsl,vf610-gpio" - "fsl,imx7ulp-gpio" -- reg : The first reg tuple represents the PORT module, the second tuple - the GPIO module. -- interrupts : Should be the port interrupt shared by all 32 pins. -- gpio-controller : Marks the device node as a gpio controller. -- #gpio-cells : Should be two. The first cell is the pin number and - the second cell is used to specify the gpio polarity: - 0 = active high - 1 = active low -- interrupt-controller: Marks the device node as an interrupt controller. -- #interrupt-cells : Should be 2. The first cell is the GPIO number. - The second cell bits[3:0] is used to specify trigger type and level flags: - 1 = low-to-high edge triggered. - 2 = high-to-low edge triggered. - 4 = active high level-sensitive. - 8 = active low level-sensitive. - -Optional properties: --clocks: Must contain an entry for each entry in clock-names. - See common clock-bindings.txt for details. --clock-names: A list of clock names. For imx7ulp, it must contain - "gpio", "port". - -Note: Each GPIO port should have an alias correctly numbered in "aliases" -node. - -Examples: - -aliases { - gpio0 = &gpio1; - gpio1 = &gpio2; -}; - -gpio1: gpio@40049000 { - compatible = "fsl,vf610-gpio"; - reg = <0x40049000 0x1000 0x400ff000 0x40>; - interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - gpio-ranges = <&iomuxc 0 0 32>; -}; - -gpio2: gpio@4004a000 { - compatible = "fsl,vf610-gpio"; - reg = <0x4004a000 0x1000 0x400ff040 0x40>; - interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - gpio-ranges = <&iomuxc 0 32 32>; -}; diff --git a/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml b/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml new file mode 100644 index 000000000000..6ac5a78ad3da --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml @@ -0,0 +1,81 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/gpio-vf610.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale VF610 PORT/GPIO module + +maintainers: + - Stefan Agner + +description: | + The Freescale PORT/GPIO modules are two adjacent modules providing GPIO + functionality. Each pair serves 32 GPIOs. The VF610 has 5 instances of + each, and each PORT module has its own interrupt. + + Note: Each GPIO port should have an alias correctly numbered in "aliases" + node. + +properties: + compatible: + enum: + - fsl,vf610-gpio + - fsl,imx7ulp-gpio + + reg: + description: The first reg tuple represents the PORT module, the second tuple + represents the GPIO module. + maxItems: 2 + + interrupts: + maxItems: 1 + + interrupt-controller: true + + "#interrupt-cells": + const: 2 + + "#gpio-cells": + const: 2 + + gpio-controller: true + + clocks: + items: + - description: SoC GPIO clock + - description: SoC PORT clock + + clock-names: + items: + - const: gpio + - const: port + + gpio-ranges: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - interrupt-controller + - "#interrupt-cells" + - "#gpio-cells" + - gpio-controller + +additionalProperties: false + +examples: + - | + #include + + gpio1: gpio@40049000 { + compatible = "fsl,vf610-gpio"; + reg = <0x40049000 0x1000>, <0x400ff000 0x40>; + interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-ranges = <&iomuxc 0 0 32>; + }; From 70a29209f67cf7dfa7c04975b3261e127694a4e7 Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Thu, 6 Aug 2020 17:36:50 +0200 Subject: [PATCH 023/433] of: platform: Destroy child devices symmetrically Iterate over child devices in reverse when unpopulating a platform device to make this step symmetrical with the population step. This fixes an issue in the Tegra DRM driver where upon module unload the DPAUX controller tries to unregister an I2C controller but will end up waiting indefinitely because one of the SOR devices is keeping a reference to it. Since the SOR devices are instantiated after the DPAUX devices, they would only be removed (and hence release their reference to the I2C controller) after the DPAUX devices have been removed. While destroying the child devices in reverse order helps in this situation, it isn't fully safe to do so either. An even better way would be for the child devices to be reordered to match the probe order, which would work irrespective of the instantiation order. However, reordering by probe order would be fairly complicated and doesn't fix any known issues, so we'll go with the simpler fix for now. Signed-off-by: Thierry Reding Link: https://lore.kernel.org/r/20200806153650.3883530-1-thierry.reding@gmail.com Signed-off-by: Rob Herring --- drivers/of/platform.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/of/platform.c b/drivers/of/platform.c index 071f04da32c8..b557a0fcd4ba 100644 --- a/drivers/of/platform.c +++ b/drivers/of/platform.c @@ -590,7 +590,7 @@ EXPORT_SYMBOL_GPL(of_platform_device_destroy); void of_platform_depopulate(struct device *parent) { if (parent->of_node && of_node_check_flag(parent->of_node, OF_POPULATED_BUS)) { - device_for_each_child(parent, NULL, of_platform_device_destroy); + device_for_each_child_reverse(parent, NULL, of_platform_device_destroy); of_node_clear_flag(parent->of_node, OF_POPULATED_BUS); } } From a42a9f6a9bbc0d3894fc8ceaa714f5c5d9f4d96b Mon Sep 17 00:00:00 2001 From: Allen Pais Date: Mon, 17 Aug 2020 14:29:18 +0530 Subject: [PATCH 024/433] tty: ipwireless: convert tasklets to use new tasklet_setup() API In preparation for unconditionally passing the struct tasklet_struct pointer to all tasklet callbacks, switch to using the new tasklet_setup() and from_tasklet() to pass the tasklet pointer explicitly. Signed-off-by: Romain Perier Signed-off-by: Allen Pais Link: https://lore.kernel.org/r/20200817085921.26033-2-allen.cryptic@gmail.com Signed-off-by: Greg Kroah-Hartman --- drivers/tty/ipwireless/hardware.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/tty/ipwireless/hardware.c b/drivers/tty/ipwireless/hardware.c index 6bbf35682d53..f5d3e68f5750 100644 --- a/drivers/tty/ipwireless/hardware.c +++ b/drivers/tty/ipwireless/hardware.c @@ -1006,9 +1006,9 @@ static int send_pending_packet(struct ipw_hardware *hw, int priority_limit) /* * Send and receive all queued packets. */ -static void ipwireless_do_tasklet(unsigned long hw_) +static void ipwireless_do_tasklet(struct tasklet_struct *t) { - struct ipw_hardware *hw = (struct ipw_hardware *) hw_; + struct ipw_hardware *hw = from_tasklet(hw, t, tasklet); unsigned long flags; spin_lock_irqsave(&hw->lock, flags); @@ -1635,7 +1635,7 @@ struct ipw_hardware *ipwireless_hardware_create(void) INIT_LIST_HEAD(&hw->rx_queue); INIT_LIST_HEAD(&hw->rx_pool); spin_lock_init(&hw->lock); - tasklet_init(&hw->tasklet, ipwireless_do_tasklet, (unsigned long) hw); + tasklet_setup(&hw->tasklet, ipwireless_do_tasklet); INIT_WORK(&hw->work_rx, ipw_receive_data_work); timer_setup(&hw->setup_timer, ipwireless_setup_timer, 0); From 41e85e44edea0ba1a1601ed2a099d236c7f738bf Mon Sep 17 00:00:00 2001 From: Allen Pais Date: Mon, 17 Aug 2020 14:29:19 +0530 Subject: [PATCH 025/433] tty: atmel_serial: convert tasklets to use new tasklet_setup() API In preparation for unconditionally passing the struct tasklet_struct pointer to all tasklet callbacks, switch to using the new tasklet_setup() and from_tasklet() to pass the tasklet pointer explicitly. Signed-off-by: Romain Perier Signed-off-by: Allen Pais Link: https://lore.kernel.org/r/20200817085921.26033-3-allen.cryptic@gmail.com Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/atmel_serial.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c index e43471b33710..a9c47f56e994 100644 --- a/drivers/tty/serial/atmel_serial.c +++ b/drivers/tty/serial/atmel_serial.c @@ -1722,10 +1722,11 @@ static int atmel_prepare_rx_pdc(struct uart_port *port) /* * tasklet handling tty stuff outside the interrupt handler. */ -static void atmel_tasklet_rx_func(unsigned long data) +static void atmel_tasklet_rx_func(struct tasklet_struct *t) { - struct uart_port *port = (struct uart_port *)data; - struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); + struct atmel_uart_port *atmel_port = from_tasklet(atmel_port, t, + tasklet_rx); + struct uart_port *port = &atmel_port->uart; /* The interrupt handler does not take the lock */ spin_lock(&port->lock); @@ -1733,10 +1734,11 @@ static void atmel_tasklet_rx_func(unsigned long data) spin_unlock(&port->lock); } -static void atmel_tasklet_tx_func(unsigned long data) +static void atmel_tasklet_tx_func(struct tasklet_struct *t) { - struct uart_port *port = (struct uart_port *)data; - struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); + struct atmel_uart_port *atmel_port = from_tasklet(atmel_port, t, + tasklet_tx); + struct uart_port *port = &atmel_port->uart; /* The interrupt handler does not take the lock */ spin_lock(&port->lock); @@ -1911,10 +1913,8 @@ static int atmel_startup(struct uart_port *port) } atomic_set(&atmel_port->tasklet_shutdown, 0); - tasklet_init(&atmel_port->tasklet_rx, atmel_tasklet_rx_func, - (unsigned long)port); - tasklet_init(&atmel_port->tasklet_tx, atmel_tasklet_tx_func, - (unsigned long)port); + tasklet_setup(&atmel_port->tasklet_rx, atmel_tasklet_rx_func); + tasklet_setup(&atmel_port->tasklet_tx, atmel_tasklet_tx_func); /* * Initialize DMA (if necessary) From d77e24f21df1da4ddd7a6fb185105c4ad3d86a86 Mon Sep 17 00:00:00 2001 From: Allen Pais Date: Mon, 17 Aug 2020 14:29:20 +0530 Subject: [PATCH 026/433] tty: ifx6x60: convert tasklets to use new tasklet_setup() API In preparation for unconditionally passing the struct tasklet_struct pointer to all tasklet callbacks, switch to using the new tasklet_setup() and from_tasklet() to pass the tasklet pointer explicitly. Signed-off-by: Romain Perier Signed-off-by: Allen Pais Link: https://lore.kernel.org/r/20200817085921.26033-4-allen.cryptic@gmail.com Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/ifx6x60.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/tty/serial/ifx6x60.c b/drivers/tty/serial/ifx6x60.c index 7d16fe41932f..37d5b8516880 100644 --- a/drivers/tty/serial/ifx6x60.c +++ b/drivers/tty/serial/ifx6x60.c @@ -725,10 +725,11 @@ complete_exit: * Queue data for transmission if possible and then kick off the * transfer. */ -static void ifx_spi_io(unsigned long data) +static void ifx_spi_io(struct tasklet_struct *t) { int retval; - struct ifx_spi_device *ifx_dev = (struct ifx_spi_device *) data; + struct ifx_spi_device *ifx_dev = from_tasklet(ifx_dev, t, + io_work_tasklet); if (!test_and_set_bit(IFX_SPI_STATE_IO_IN_PROGRESS, &ifx_dev->flags) && test_bit(IFX_SPI_STATE_IO_AVAILABLE, &ifx_dev->flags)) { @@ -1067,8 +1068,7 @@ static int ifx_spi_spi_probe(struct spi_device *spi) init_waitqueue_head(&ifx_dev->mdm_reset_wait); spi_set_drvdata(spi, ifx_dev); - tasklet_init(&ifx_dev->io_work_tasklet, ifx_spi_io, - (unsigned long)ifx_dev); + tasklet_setup(&ifx_dev->io_work_tasklet, ifx_spi_io); set_bit(IFX_SPI_STATE_PRESENT, &ifx_dev->flags); From 2b2dd9c6ac41cc975fedc82fc871cbff1fb7f711 Mon Sep 17 00:00:00 2001 From: Allen Pais Date: Mon, 17 Aug 2020 14:29:21 +0530 Subject: [PATCH 027/433] tty: timbuart: convert tasklets to use new tasklet_setup() API In preparation for unconditionally passing the struct tasklet_struct pointer to all tasklet callbacks, switch to using the new tasklet_setup() and from_tasklet() to pass the tasklet pointer explicitly. Signed-off-by: Romain Perier Signed-off-by: Allen Pais Link: https://lore.kernel.org/r/20200817085921.26033-5-allen.cryptic@gmail.com Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/timbuart.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/tty/serial/timbuart.c b/drivers/tty/serial/timbuart.c index 19d38b504e27..2126e6e6dfd1 100644 --- a/drivers/tty/serial/timbuart.c +++ b/drivers/tty/serial/timbuart.c @@ -172,9 +172,9 @@ static void timbuart_handle_rx_port(struct uart_port *port, u32 isr, u32 *ier) dev_dbg(port->dev, "%s - leaving\n", __func__); } -static void timbuart_tasklet(unsigned long arg) +static void timbuart_tasklet(struct tasklet_struct *t) { - struct timbuart_port *uart = (struct timbuart_port *)arg; + struct timbuart_port *uart = from_tasklet(uart, t, tasklet); u32 isr, ier = 0; spin_lock(&uart->port.lock); @@ -451,7 +451,7 @@ static int timbuart_probe(struct platform_device *dev) } uart->port.irq = irq; - tasklet_init(&uart->tasklet, timbuart_tasklet, (unsigned long)uart); + tasklet_setup(&uart->tasklet, timbuart_tasklet); err = uart_register_driver(&timbuart_driver); if (err) From d73568c4ccb01d01e20cd23fefbff8e4a05ddfac Mon Sep 17 00:00:00 2001 From: Jiri Slaby Date: Tue, 18 Aug 2020 10:56:51 +0200 Subject: [PATCH 028/433] vt: make vc_data pointers const in selection.h There are many functions declared in selection.h which only read from struct vc_data passed as a parameter. Make all those uses const to hint the compiler a bit. Signed-off-by: Jiri Slaby Link: https://lore.kernel.org/r/20200818085706.12163-1-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman --- drivers/tty/vt/consolemap.c | 2 +- drivers/tty/vt/vt.c | 15 ++++++++------- drivers/video/console/sticon.c | 2 +- drivers/video/fbdev/core/fbcon.c | 2 +- include/linux/console.h | 2 +- include/linux/consolemap.h | 3 ++- include/linux/selection.h | 14 ++++++++------ 7 files changed, 22 insertions(+), 18 deletions(-) diff --git a/drivers/tty/vt/consolemap.c b/drivers/tty/vt/consolemap.c index 5947b54d92be..5d5a5fd2dce7 100644 --- a/drivers/tty/vt/consolemap.c +++ b/drivers/tty/vt/consolemap.c @@ -268,7 +268,7 @@ unsigned short *set_translate(int m, struct vc_data *vc) * was active. * Still, it is now possible to a certain extent to cut and paste non-ASCII. */ -u16 inverse_translate(struct vc_data *conp, int glyph, int use_unicode) +u16 inverse_translate(const struct vc_data *conp, int glyph, int use_unicode) { struct uni_pagedir *p; int m; diff --git a/drivers/tty/vt/vt.c b/drivers/tty/vt/vt.c index ccb533fd00a2..8f283221330e 100644 --- a/drivers/tty/vt/vt.c +++ b/drivers/tty/vt/vt.c @@ -283,7 +283,8 @@ static inline bool con_should_update(const struct vc_data *vc) return con_is_visible(vc) && !console_blanked; } -static inline unsigned short *screenpos(struct vc_data *vc, int offset, int viewed) +static inline unsigned short *screenpos(const struct vc_data *vc, int offset, + int viewed) { unsigned short *p; @@ -543,7 +544,7 @@ int vc_uniscr_check(struct vc_data *vc) * This must be preceded by a successful call to vc_uniscr_check() once * the console lock has been taken. */ -void vc_uniscr_copy_line(struct vc_data *vc, void *dest, int viewed, +void vc_uniscr_copy_line(const struct vc_data *vc, void *dest, int viewed, unsigned int row, unsigned int col, unsigned int nr) { struct uni_screen *uniscr = get_vc_uniscr(vc); @@ -4740,7 +4741,7 @@ int con_font_op(struct vc_data *vc, struct console_font_op *op) */ /* used by selection */ -u16 screen_glyph(struct vc_data *vc, int offset) +u16 screen_glyph(const struct vc_data *vc, int offset) { u16 w = scr_readw(screenpos(vc, offset, 1)); u16 c = w & 0xff; @@ -4751,7 +4752,7 @@ u16 screen_glyph(struct vc_data *vc, int offset) } EXPORT_SYMBOL_GPL(screen_glyph); -u32 screen_glyph_unicode(struct vc_data *vc, int n) +u32 screen_glyph_unicode(const struct vc_data *vc, int n) { struct uni_screen *uniscr = get_vc_uniscr(vc); @@ -4762,13 +4763,13 @@ u32 screen_glyph_unicode(struct vc_data *vc, int n) EXPORT_SYMBOL_GPL(screen_glyph_unicode); /* used by vcs - note the word offset */ -unsigned short *screen_pos(struct vc_data *vc, int w_offset, int viewed) +unsigned short *screen_pos(const struct vc_data *vc, int w_offset, int viewed) { return screenpos(vc, 2 * w_offset, viewed); } EXPORT_SYMBOL_GPL(screen_pos); -void getconsxy(struct vc_data *vc, unsigned char *p) +void getconsxy(const struct vc_data *vc, unsigned char *p) { /* clamp values if they don't fit */ p[0] = min(vc->state.x, 0xFFu); @@ -4782,7 +4783,7 @@ void putconsxy(struct vc_data *vc, unsigned char *p) set_cursor(vc); } -u16 vcs_scr_readw(struct vc_data *vc, const u16 *org) +u16 vcs_scr_readw(const struct vc_data *vc, const u16 *org) { if ((unsigned long)org == vc->vc_pos && softcursor_original != -1) return softcursor_original; diff --git a/drivers/video/console/sticon.c b/drivers/video/console/sticon.c index 21a5c280c8c9..e21147e8a14e 100644 --- a/drivers/video/console/sticon.c +++ b/drivers/video/console/sticon.c @@ -236,7 +236,7 @@ static int sticon_blank(struct vc_data *c, int blank, int mode_switch) return 1; } -static u16 *sticon_screen_pos(struct vc_data *conp, int offset) +static u16 *sticon_screen_pos(const struct vc_data *conp, int offset) { int line; unsigned long p; diff --git a/drivers/video/fbdev/core/fbcon.c b/drivers/video/fbdev/core/fbcon.c index 8a31fc2b2258..6068845d98f2 100644 --- a/drivers/video/fbdev/core/fbcon.c +++ b/drivers/video/fbdev/core/fbcon.c @@ -2765,7 +2765,7 @@ static void fbcon_set_palette(struct vc_data *vc, const unsigned char *table) fb_set_cmap(&palette_cmap, info); } -static u16 *fbcon_screen_pos(struct vc_data *vc, int offset) +static u16 *fbcon_screen_pos(const struct vc_data *vc, int offset) { unsigned long p; int line; diff --git a/include/linux/console.h b/include/linux/console.h index 0670d3491e0e..4b1e26c4cb42 100644 --- a/include/linux/console.h +++ b/include/linux/console.h @@ -74,7 +74,7 @@ struct consw { enum vc_intensity intensity, bool blink, bool underline, bool reverse, bool italic); void (*con_invert_region)(struct vc_data *vc, u16 *p, int count); - u16 *(*con_screen_pos)(struct vc_data *vc, int offset); + u16 *(*con_screen_pos)(const struct vc_data *vc, int offset); unsigned long (*con_getxy)(struct vc_data *vc, unsigned long position, int *px, int *py); /* diff --git a/include/linux/consolemap.h b/include/linux/consolemap.h index 254246673390..bcfce748c9d8 100644 --- a/include/linux/consolemap.h +++ b/include/linux/consolemap.h @@ -17,7 +17,8 @@ #ifdef CONFIG_CONSOLE_TRANSLATIONS struct vc_data; -extern u16 inverse_translate(struct vc_data *conp, int glyph, int use_unicode); +extern u16 inverse_translate(const struct vc_data *conp, int glyph, + int use_unicode); extern unsigned short *set_translate(int m, struct vc_data *vc); extern int conv_uni_to_pc(struct vc_data *conp, long ucs); extern u32 conv_8bit_to_uni(unsigned char c); diff --git a/include/linux/selection.h b/include/linux/selection.h index 5b890ef5b59f..34404a019ebf 100644 --- a/include/linux/selection.h +++ b/include/linux/selection.h @@ -33,21 +33,23 @@ extern unsigned char default_red[]; extern unsigned char default_grn[]; extern unsigned char default_blu[]; -extern unsigned short *screen_pos(struct vc_data *vc, int w_offset, int viewed); -extern u16 screen_glyph(struct vc_data *vc, int offset); -extern u32 screen_glyph_unicode(struct vc_data *vc, int offset); +extern unsigned short *screen_pos(const struct vc_data *vc, int w_offset, + int viewed); +extern u16 screen_glyph(const struct vc_data *vc, int offset); +extern u32 screen_glyph_unicode(const struct vc_data *vc, int offset); extern void complement_pos(struct vc_data *vc, int offset); extern void invert_screen(struct vc_data *vc, int offset, int count, int shift); -extern void getconsxy(struct vc_data *vc, unsigned char *p); +extern void getconsxy(const struct vc_data *vc, unsigned char *p); extern void putconsxy(struct vc_data *vc, unsigned char *p); -extern u16 vcs_scr_readw(struct vc_data *vc, const u16 *org); +extern u16 vcs_scr_readw(const struct vc_data *vc, const u16 *org); extern void vcs_scr_writew(struct vc_data *vc, u16 val, u16 *org); extern void vcs_scr_updated(struct vc_data *vc); extern int vc_uniscr_check(struct vc_data *vc); -extern void vc_uniscr_copy_line(struct vc_data *vc, void *dest, int viewed, +extern void vc_uniscr_copy_line(const struct vc_data *vc, void *dest, + int viewed, unsigned int row, unsigned int col, unsigned int nr); From a5c6bd806dd626103db38dee77796fe758c8df94 Mon Sep 17 00:00:00 2001 From: Jiri Slaby Date: Tue, 18 Aug 2020 10:56:52 +0200 Subject: [PATCH 029/433] vt: declare xy for get/putconsxy properly That is: 1) call the parameter 'xy' to denote what it really is, not generic 'p' 2) tell the compiler and users that we expect an array: * with at least 2 chars (static 2) * which we don't modify in putconsxy (const) Signed-off-by: Jiri Slaby Link: https://lore.kernel.org/r/20200818085706.12163-2-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman --- drivers/tty/vt/vt.c | 10 +++++----- include/linux/selection.h | 4 ++-- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/tty/vt/vt.c b/drivers/tty/vt/vt.c index 8f283221330e..a0da7771c327 100644 --- a/drivers/tty/vt/vt.c +++ b/drivers/tty/vt/vt.c @@ -4769,17 +4769,17 @@ unsigned short *screen_pos(const struct vc_data *vc, int w_offset, int viewed) } EXPORT_SYMBOL_GPL(screen_pos); -void getconsxy(const struct vc_data *vc, unsigned char *p) +void getconsxy(const struct vc_data *vc, unsigned char xy[static 2]) { /* clamp values if they don't fit */ - p[0] = min(vc->state.x, 0xFFu); - p[1] = min(vc->state.y, 0xFFu); + xy[0] = min(vc->state.x, 0xFFu); + xy[1] = min(vc->state.y, 0xFFu); } -void putconsxy(struct vc_data *vc, unsigned char *p) +void putconsxy(struct vc_data *vc, unsigned char xy[static const 2]) { hide_cursor(vc); - gotoxy(vc, p[0], p[1]); + gotoxy(vc, xy[0], xy[1]); set_cursor(vc); } diff --git a/include/linux/selection.h b/include/linux/selection.h index 34404a019ebf..15e36e7ef869 100644 --- a/include/linux/selection.h +++ b/include/linux/selection.h @@ -40,8 +40,8 @@ extern u32 screen_glyph_unicode(const struct vc_data *vc, int offset); extern void complement_pos(struct vc_data *vc, int offset); extern void invert_screen(struct vc_data *vc, int offset, int count, int shift); -extern void getconsxy(const struct vc_data *vc, unsigned char *p); -extern void putconsxy(struct vc_data *vc, unsigned char *p); +extern void getconsxy(const struct vc_data *vc, unsigned char xy[static 2]); +extern void putconsxy(struct vc_data *vc, unsigned char xy[static const 2]); extern u16 vcs_scr_readw(const struct vc_data *vc, const u16 *org); extern void vcs_scr_writew(struct vc_data *vc, u16 val, u16 *org); From b8209f694f7f4256181deea92d30eedb908d6788 Mon Sep 17 00:00:00 2001 From: Jiri Slaby Date: Tue, 18 Aug 2020 10:56:53 +0200 Subject: [PATCH 030/433] vc: propagate "viewed as bool" from screenpos up viewed is used as a flag, i.e. bool. So treat is as such in most of the places. vcs_vc is handled in the next patch. Note: the last parameter of invert_screen was misnamed in the declaration since 1.1.92. Signed-off-by: Jiri Slaby Link: https://lore.kernel.org/r/20200818085706.12163-3-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman --- drivers/accessibility/speakup/main.c | 4 ++-- drivers/tty/vt/selection.c | 2 +- drivers/tty/vt/vt.c | 18 ++++++++++-------- include/linux/selection.h | 6 +++--- 4 files changed, 16 insertions(+), 14 deletions(-) diff --git a/drivers/accessibility/speakup/main.c b/drivers/accessibility/speakup/main.c index ddfd12afe3b9..be79b2135fac 100644 --- a/drivers/accessibility/speakup/main.c +++ b/drivers/accessibility/speakup/main.c @@ -257,7 +257,7 @@ static struct notifier_block vt_notifier_block = { static unsigned char get_attributes(struct vc_data *vc, u16 *pos) { - pos = screen_pos(vc, pos - (u16 *)vc->vc_origin, 1); + pos = screen_pos(vc, pos - (u16 *)vc->vc_origin, true); return (scr_readw(pos) & ~vc->vc_hi_font_mask) >> 8; } @@ -465,7 +465,7 @@ static u16 get_char(struct vc_data *vc, u16 *pos, u_char *attribs) u16 w; u16 c; - pos = screen_pos(vc, pos - (u16 *)vc->vc_origin, 1); + pos = screen_pos(vc, pos - (u16 *)vc->vc_origin, true); w = scr_readw(pos); c = w & 0xff; diff --git a/drivers/tty/vt/selection.c b/drivers/tty/vt/selection.c index 8e74654c1b27..f245a5acf7e9 100644 --- a/drivers/tty/vt/selection.c +++ b/drivers/tty/vt/selection.c @@ -54,7 +54,7 @@ static struct vc_selection { /* set reverse video on characters s-e of console with selection. */ static inline void highlight(const int s, const int e) { - invert_screen(vc_sel.cons, s, e-s+2, 1); + invert_screen(vc_sel.cons, s, e-s+2, true); } /* use complementary color to show the pointer */ diff --git a/drivers/tty/vt/vt.c b/drivers/tty/vt/vt.c index a0da7771c327..0f7064d41e92 100644 --- a/drivers/tty/vt/vt.c +++ b/drivers/tty/vt/vt.c @@ -284,7 +284,7 @@ static inline bool con_should_update(const struct vc_data *vc) } static inline unsigned short *screenpos(const struct vc_data *vc, int offset, - int viewed) + bool viewed) { unsigned short *p; @@ -544,7 +544,7 @@ int vc_uniscr_check(struct vc_data *vc) * This must be preceded by a successful call to vc_uniscr_check() once * the console lock has been taken. */ -void vc_uniscr_copy_line(const struct vc_data *vc, void *dest, int viewed, +void vc_uniscr_copy_line(const struct vc_data *vc, void *dest, bool viewed, unsigned int row, unsigned int col, unsigned int nr) { struct uni_screen *uniscr = get_vc_uniscr(vc); @@ -753,7 +753,7 @@ static void update_attr(struct vc_data *vc) } /* Note: inverting the screen twice should revert to the original state */ -void invert_screen(struct vc_data *vc, int offset, int count, int viewed) +void invert_screen(struct vc_data *vc, int offset, int count, bool viewed) { unsigned short *p; @@ -812,7 +812,7 @@ void complement_pos(struct vc_data *vc, int offset) if (old_offset != -1 && old_offset >= 0 && old_offset < vc->vc_screenbuf_size) { - scr_writew(old, screenpos(vc, old_offset, 1)); + scr_writew(old, screenpos(vc, old_offset, true)); if (con_should_update(vc)) vc->vc_sw->con_putc(vc, old, oldy, oldx); notify_update(vc); @@ -824,7 +824,7 @@ void complement_pos(struct vc_data *vc, int offset) offset < vc->vc_screenbuf_size) { unsigned short new; unsigned short *p; - p = screenpos(vc, offset, 1); + p = screenpos(vc, offset, true); old = scr_readw(p); new = old ^ vc->vc_complement_mask; scr_writew(new, p); @@ -1885,7 +1885,9 @@ static void set_mode(struct vc_data *vc, int on_off) case 5: /* Inverted screen on/off */ if (vc->vc_decscnm != on_off) { vc->vc_decscnm = on_off; - invert_screen(vc, 0, vc->vc_screenbuf_size, 0); + invert_screen(vc, 0, + vc->vc_screenbuf_size, + false); update_attr(vc); } break; @@ -4743,7 +4745,7 @@ int con_font_op(struct vc_data *vc, struct console_font_op *op) /* used by selection */ u16 screen_glyph(const struct vc_data *vc, int offset) { - u16 w = scr_readw(screenpos(vc, offset, 1)); + u16 w = scr_readw(screenpos(vc, offset, true)); u16 c = w & 0xff; if (w & vc->vc_hi_font_mask) @@ -4763,7 +4765,7 @@ u32 screen_glyph_unicode(const struct vc_data *vc, int n) EXPORT_SYMBOL_GPL(screen_glyph_unicode); /* used by vcs - note the word offset */ -unsigned short *screen_pos(const struct vc_data *vc, int w_offset, int viewed) +unsigned short *screen_pos(const struct vc_data *vc, int w_offset, bool viewed) { return screenpos(vc, 2 * w_offset, viewed); } diff --git a/include/linux/selection.h b/include/linux/selection.h index 15e36e7ef869..170ef28ff26b 100644 --- a/include/linux/selection.h +++ b/include/linux/selection.h @@ -34,11 +34,11 @@ extern unsigned char default_grn[]; extern unsigned char default_blu[]; extern unsigned short *screen_pos(const struct vc_data *vc, int w_offset, - int viewed); + bool viewed); extern u16 screen_glyph(const struct vc_data *vc, int offset); extern u32 screen_glyph_unicode(const struct vc_data *vc, int offset); extern void complement_pos(struct vc_data *vc, int offset); -extern void invert_screen(struct vc_data *vc, int offset, int count, int shift); +extern void invert_screen(struct vc_data *vc, int offset, int count, bool viewed); extern void getconsxy(const struct vc_data *vc, unsigned char xy[static 2]); extern void putconsxy(struct vc_data *vc, unsigned char xy[static const 2]); @@ -49,7 +49,7 @@ extern void vcs_scr_updated(struct vc_data *vc); extern int vc_uniscr_check(struct vc_data *vc); extern void vc_uniscr_copy_line(const struct vc_data *vc, void *dest, - int viewed, + bool viewed, unsigned int row, unsigned int col, unsigned int nr); From 7d62549a22ee500ea2ad764b9d04b87c6bbcd75f Mon Sep 17 00:00:00 2001 From: Jiri Slaby Date: Tue, 18 Aug 2020 10:56:54 +0200 Subject: [PATCH 031/433] vc_screen: document and cleanup vcs_vc Document parameters of vcs_vc and make viewed a bool. Signed-off-by: Jiri Slaby Link: https://lore.kernel.org/r/20200818085706.12163-4-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman --- drivers/tty/vt/vc_screen.c | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) diff --git a/drivers/tty/vt/vc_screen.c b/drivers/tty/vt/vc_screen.c index 778f83ea2249..adc3c786b621 100644 --- a/drivers/tty/vt/vc_screen.c +++ b/drivers/tty/vt/vc_screen.c @@ -177,12 +177,14 @@ vcs_poll_data_get(struct file *file) return poll; } -/* - * Returns VC for inode. +/** + * vcs_vc -- return VC for @inode + * @inode: inode for which to return a VC + * @viewed: returns whether this console is currently foreground (viewed) + * * Must be called with console_lock. */ -static struct vc_data* -vcs_vc(struct inode *inode, int *viewed) +static struct vc_data *vcs_vc(struct inode *inode, bool *viewed) { unsigned int currcons = console(inode); @@ -191,11 +193,11 @@ vcs_vc(struct inode *inode, int *viewed) if (currcons == 0) { currcons = fg_console; if (viewed) - *viewed = 1; + *viewed = true; } else { currcons--; if (viewed) - *viewed = 0; + *viewed = false; } return vc_cons[currcons].d; } @@ -247,10 +249,11 @@ vcs_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) struct vc_data *vc; struct vcs_poll_data *poll; long pos, read; - int attr, uni_mode, row, col, maxcol, viewed; + int attr, uni_mode, row, col, maxcol; unsigned short *org = NULL; ssize_t ret; char *con_buf; + bool viewed; con_buf = (char *) __get_free_page(GFP_KERNEL); if (!con_buf) @@ -451,10 +454,11 @@ vcs_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos) long pos; long attr, size, written; char *con_buf0; - int col, maxcol, viewed; + int col, maxcol; u16 *org0 = NULL, *org = NULL; size_t ret; char *con_buf; + bool viewed; if (use_unicode(inode)) return -EOPNOTSUPP; From 71d4abfab322e827a75304431fe0fad3c805cb80 Mon Sep 17 00:00:00 2001 From: Jiri Slaby Date: Tue, 18 Aug 2020 10:56:55 +0200 Subject: [PATCH 032/433] vc_screen: rewrite vcs_size to accept vc, not inode It is weird to fetch the information from the inode over and over. Read and write already have the needed information, so rewrite vcs_size to accept a vc, attr and unicode and adapt vcs_lseek to that. Also make sure all sites check the return value of vcs_size for errors. And document it using kernel-doc. Signed-off-by: Jiri Slaby Link: https://lore.kernel.org/r/20200818085706.12163-5-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman --- drivers/tty/vt/vc_screen.c | 46 ++++++++++++++++++++++++-------------- 1 file changed, 29 insertions(+), 17 deletions(-) diff --git a/drivers/tty/vt/vc_screen.c b/drivers/tty/vt/vc_screen.c index adc3c786b621..8aa0d50bcac7 100644 --- a/drivers/tty/vt/vc_screen.c +++ b/drivers/tty/vt/vc_screen.c @@ -202,39 +202,47 @@ static struct vc_data *vcs_vc(struct inode *inode, bool *viewed) return vc_cons[currcons].d; } -/* - * Returns size for VC carried by inode. +/** + * vcs_size -- return size for a VC in @vc + * @vc: which VC + * @attr: does it use attributes? + * @unicode: is it unicode? + * * Must be called with console_lock. */ -static int -vcs_size(struct inode *inode) +static int vcs_size(const struct vc_data *vc, bool attr, bool unicode) { int size; - struct vc_data *vc; WARN_CONSOLE_UNLOCKED(); - vc = vcs_vc(inode, NULL); - if (!vc) - return -ENXIO; - size = vc->vc_rows * vc->vc_cols; - if (use_attributes(inode)) { - if (use_unicode(inode)) + if (attr) { + if (unicode) return -EOPNOTSUPP; - size = 2*size + HEADER_SIZE; - } else if (use_unicode(inode)) + + size = 2 * size + HEADER_SIZE; + } else if (unicode) size *= 4; + return size; } static loff_t vcs_lseek(struct file *file, loff_t offset, int orig) { + struct inode *inode = file_inode(file); + struct vc_data *vc; int size; console_lock(); - size = vcs_size(file_inode(file)); + vc = vcs_vc(inode, NULL); + if (!vc) { + console_unlock(); + return -ENXIO; + } + + size = vcs_size(vc, use_attributes(inode), use_unicode(inode)); console_unlock(); if (size < 0) return size; @@ -295,7 +303,7 @@ vcs_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) * as copy_to_user at the end of this loop * could sleep. */ - size = vcs_size(inode); + size = vcs_size(vc, attr, uni_mode); if (size < 0) { if (read) break; @@ -480,7 +488,11 @@ vcs_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos) if (!vc) goto unlock_out; - size = vcs_size(inode); + size = vcs_size(vc, attr, false); + if (size < 0) { + ret = size; + goto unlock_out; + } ret = -EINVAL; if (pos < 0 || pos > size) goto unlock_out; @@ -519,7 +531,7 @@ vcs_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos) * the user buffer, so recheck. * Return data written up to now on failure. */ - size = vcs_size(inode); + size = vcs_size(vc, attr, false); if (size < 0) { if (written) break; From 2665bef49f96df1a541b4e71e7b27bf631f7667c Mon Sep 17 00:00:00 2001 From: Jiri Slaby Date: Tue, 18 Aug 2020 10:56:56 +0200 Subject: [PATCH 033/433] vc_screen: sanitize types in vcs_write * ret can carry error codes, so make it signed, i.e. ssize_t * pos is derived from the passed ppos, so make it long enough, i.e. loff_t * attr is a boolean, so... * size is limited by vcs_size() which returns an int * written, p, orig_count and this_round are always ">= 0" and "< size", so uint is enough * col and max_col are derived from vc->vc_cols (uint) and p, so make them uint too * place con_buf0 and con_buf declaration to a single line Signed-off-by: Jiri Slaby Link: https://lore.kernel.org/r/20200818085706.12163-6-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman --- drivers/tty/vt/vc_screen.c | 17 +++++++---------- 1 file changed, 7 insertions(+), 10 deletions(-) diff --git a/drivers/tty/vt/vc_screen.c b/drivers/tty/vt/vc_screen.c index 8aa0d50bcac7..2571d9067b08 100644 --- a/drivers/tty/vt/vc_screen.c +++ b/drivers/tty/vt/vc_screen.c @@ -459,14 +459,13 @@ vcs_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos) { struct inode *inode = file_inode(file); struct vc_data *vc; - long pos; - long attr, size, written; - char *con_buf0; - int col, maxcol; + char *con_buf0, *con_buf; u16 *org0 = NULL, *org = NULL; - size_t ret; - char *con_buf; - bool viewed; + unsigned int written, col, maxcol; + int size; + ssize_t ret; + loff_t pos; + bool viewed, attr; if (use_unicode(inode)) return -EOPNOTSUPP; @@ -500,9 +499,7 @@ vcs_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos) count = size - pos; written = 0; while (count) { - long this_round = count; - size_t orig_count; - long p; + unsigned int orig_count, p, this_round = count; if (this_round > CON_BUF_SIZE) this_round = CON_BUF_SIZE; From 9e6363784e3f1e90416b81c0d0cd16f6bfb304af Mon Sep 17 00:00:00 2001 From: Jiri Slaby Date: Tue, 18 Aug 2020 10:56:57 +0200 Subject: [PATCH 034/433] vc_screen: extract vcs_write_buf_noattr vcs_write is too long to be readable. Extract buffer handling w/o attributes from there to a separate function. Signed-off-by: Jiri Slaby Link: https://lore.kernel.org/r/20200818085706.12163-7-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman --- drivers/tty/vt/vc_screen.c | 55 +++++++++++++++++++++++--------------- 1 file changed, 34 insertions(+), 21 deletions(-) diff --git a/drivers/tty/vt/vc_screen.c b/drivers/tty/vt/vc_screen.c index 2571d9067b08..62e6d240f0dd 100644 --- a/drivers/tty/vt/vc_screen.c +++ b/drivers/tty/vt/vc_screen.c @@ -454,6 +454,33 @@ unlock_out: return ret; } +static u16 *vcs_write_buf_noattr(struct vc_data *vc, const char *con_buf, + unsigned int pos, unsigned int count, bool viewed, u16 **org0) +{ + u16 *org; + unsigned int col, maxcol = vc->vc_cols; + + *org0 = org = screen_pos(vc, pos, viewed); + col = pos % maxcol; + pos += maxcol - col; + + while (count > 0) { + unsigned char c = *con_buf++; + + count--; + vcs_scr_writew(vc, + (vcs_scr_readw(vc, org) & 0xff00) | c, org); + org++; + if (++col == maxcol) { + org = screen_pos(vc, pos, viewed); + col = 0; + pos += maxcol; + } + } + + return org; +} + static ssize_t vcs_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos) { @@ -544,29 +571,15 @@ vcs_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos) * under the lock using the local kernel buffer. */ - con_buf0 = con_buf; - orig_count = this_round; - maxcol = vc->vc_cols; - p = pos; if (!attr) { - org0 = org = screen_pos(vc, p, viewed); - col = p % maxcol; - p += maxcol - col; - - while (this_round > 0) { - unsigned char c = *con_buf0++; - - this_round--; - vcs_scr_writew(vc, - (vcs_scr_readw(vc, org) & 0xff00) | c, org); - org++; - if (++col == maxcol) { - org = screen_pos(vc, p, viewed); - col = 0; - p += maxcol; - } - } + org = vcs_write_buf_noattr(vc, con_buf, pos, this_round, + viewed, &org0); } else { + con_buf0 = con_buf; + orig_count = this_round; + maxcol = vc->vc_cols; + p = pos; + if (p < HEADER_SIZE) { char header[HEADER_SIZE]; From 95e0d57fd49780db89193bc2df67b9eec640c4be Mon Sep 17 00:00:00 2001 From: Jiri Slaby Date: Tue, 18 Aug 2020 10:56:58 +0200 Subject: [PATCH 035/433] vc_screen: extract vcs_write_buf This is the counterpart of the previous patch: here, we extract buffer writing with attributes from vcs_write. Now, there is no need for org to be initialized to NULL. The org0 check before update_region() confuses compilers, so check org instead. It provides the same semantics. And it also eliminates the need for initialization of org0. We switch the branches of the attr 'if' too, as the inversion brings only confusion now. Signed-off-by: Jiri Slaby Link: https://lore.kernel.org/r/20200818085706.12163-8-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman --- drivers/tty/vt/vc_screen.c | 168 ++++++++++++++++++++----------------- 1 file changed, 92 insertions(+), 76 deletions(-) diff --git a/drivers/tty/vt/vc_screen.c b/drivers/tty/vt/vc_screen.c index 62e6d240f0dd..10a26fd5f1b7 100644 --- a/drivers/tty/vt/vc_screen.c +++ b/drivers/tty/vt/vc_screen.c @@ -481,14 +481,93 @@ static u16 *vcs_write_buf_noattr(struct vc_data *vc, const char *con_buf, return org; } +static u16 *vcs_write_buf(struct vc_data *vc, const char *con_buf, + unsigned int pos, unsigned int count, bool viewed, u16 **org0) +{ + u16 *org; + unsigned int col, maxcol = vc->vc_cols; + unsigned char c; + + /* header */ + if (pos < HEADER_SIZE) { + char header[HEADER_SIZE]; + + getconsxy(vc, header + 2); + while (pos < HEADER_SIZE && count > 0) { + count--; + header[pos++] = *con_buf++; + } + if (!viewed) + putconsxy(vc, header + 2); + } + + if (!count) + return NULL; + + pos -= HEADER_SIZE; + col = (pos/2) % maxcol; + + *org0 = org = screen_pos(vc, pos/2, viewed); + + /* odd pos -- the first single character */ + if (pos & 1) { + count--; + c = *con_buf++; +#ifdef __BIG_ENDIAN + vcs_scr_writew(vc, c | + (vcs_scr_readw(vc, org) & 0xff00), org); +#else + vcs_scr_writew(vc, (c << 8) | + (vcs_scr_readw(vc, org) & 0xff), org); +#endif + org++; + pos++; + if (++col == maxcol) { + org = screen_pos(vc, pos/2, viewed); + col = 0; + } + } + + pos /= 2; + pos += maxcol - col; + + /* even pos -- handle attr+character pairs */ + while (count > 1) { + unsigned short w; + + w = get_unaligned(((unsigned short *)con_buf)); + vcs_scr_writew(vc, w, org++); + con_buf += 2; + count -= 2; + if (++col == maxcol) { + org = screen_pos(vc, pos, viewed); + col = 0; + pos += maxcol; + } + } + + if (!count) + return org; + + /* odd pos -- the remaining character */ + c = *con_buf++; +#ifdef __BIG_ENDIAN + vcs_scr_writew(vc, (vcs_scr_readw(vc, org) & 0xff) | (c << 8), org); +#else + vcs_scr_writew(vc, (vcs_scr_readw(vc, org) & 0xff00) | c, org); +#endif + + return org; +} + static ssize_t vcs_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos) { struct inode *inode = file_inode(file); struct vc_data *vc; - char *con_buf0, *con_buf; - u16 *org0 = NULL, *org = NULL; - unsigned int written, col, maxcol; + char *con_buf; + u16 *org0, *org; + unsigned int written; int size; ssize_t ret; loff_t pos; @@ -526,7 +605,7 @@ vcs_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos) count = size - pos; written = 0; while (count) { - unsigned int orig_count, p, this_round = count; + unsigned int this_round = count; if (this_round > CON_BUF_SIZE) this_round = CON_BUF_SIZE; @@ -571,81 +650,18 @@ vcs_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos) * under the lock using the local kernel buffer. */ - if (!attr) { + if (attr) + org = vcs_write_buf(vc, con_buf, pos, this_round, + viewed, &org0); + else org = vcs_write_buf_noattr(vc, con_buf, pos, this_round, viewed, &org0); - } else { - con_buf0 = con_buf; - orig_count = this_round; - maxcol = vc->vc_cols; - p = pos; - if (p < HEADER_SIZE) { - char header[HEADER_SIZE]; - - getconsxy(vc, header + 2); - while (p < HEADER_SIZE && this_round > 0) { - this_round--; - header[p++] = *con_buf0++; - } - if (!viewed) - putconsxy(vc, header + 2); - } - p -= HEADER_SIZE; - col = (p/2) % maxcol; - if (this_round > 0) { - org0 = org = screen_pos(vc, p/2, viewed); - if ((p & 1) && this_round > 0) { - char c; - - this_round--; - c = *con_buf0++; -#ifdef __BIG_ENDIAN - vcs_scr_writew(vc, c | - (vcs_scr_readw(vc, org) & 0xff00), org); -#else - vcs_scr_writew(vc, (c << 8) | - (vcs_scr_readw(vc, org) & 0xff), org); -#endif - org++; - p++; - if (++col == maxcol) { - org = screen_pos(vc, p/2, viewed); - col = 0; - } - } - p /= 2; - p += maxcol - col; - } - while (this_round > 1) { - unsigned short w; - - w = get_unaligned(((unsigned short *)con_buf0)); - vcs_scr_writew(vc, w, org++); - con_buf0 += 2; - this_round -= 2; - if (++col == maxcol) { - org = screen_pos(vc, p, viewed); - col = 0; - p += maxcol; - } - } - if (this_round > 0) { - unsigned char c; - - c = *con_buf0++; -#ifdef __BIG_ENDIAN - vcs_scr_writew(vc, (vcs_scr_readw(vc, org) & 0xff) | (c << 8), org); -#else - vcs_scr_writew(vc, (vcs_scr_readw(vc, org) & 0xff00) | c, org); -#endif - } - } - count -= orig_count; - written += orig_count; - buf += orig_count; - pos += orig_count; - if (org0) + count -= this_round; + written += this_round; + buf += this_round; + pos += this_round; + if (org) update_region(vc, (unsigned long)(org0), org - org0); } *ppos += written; From d7c91c50815beebe14905292404b048a26147c07 Mon Sep 17 00:00:00 2001 From: Jiri Slaby Date: Tue, 18 Aug 2020 10:56:59 +0200 Subject: [PATCH 036/433] vc_screen: eliminate ifdefs from vcs_write_buf Introduce a new inline function called vc_compile_le16 and do the shifts and ORs there. Depending on LE x BE. I tried cpu_to_le16, but it ends up with worse assembly on BE for whatever reason -- the compiler seems to be unable to optimize the swap. Signed-off-by: Jiri Slaby Link: https://lore.kernel.org/r/20200818085706.12163-9-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman --- drivers/tty/vt/vc_screen.c | 29 +++++++++++++++++------------ 1 file changed, 17 insertions(+), 12 deletions(-) diff --git a/drivers/tty/vt/vc_screen.c b/drivers/tty/vt/vc_screen.c index 10a26fd5f1b7..36b967825f68 100644 --- a/drivers/tty/vt/vc_screen.c +++ b/drivers/tty/vt/vc_screen.c @@ -481,6 +481,19 @@ static u16 *vcs_write_buf_noattr(struct vc_data *vc, const char *con_buf, return org; } +/* + * Compilers (gcc 10) are unable to optimize the swap in cpu_to_le16. So do it + * the poor man way. + */ +static inline u16 vc_compile_le16(u8 hi, u8 lo) +{ +#ifdef __BIG_ENDIAN + return (lo << 8u) | hi; +#else + return (hi << 8u) | lo; +#endif +} + static u16 *vcs_write_buf(struct vc_data *vc, const char *con_buf, unsigned int pos, unsigned int count, bool viewed, u16 **org0) { @@ -513,13 +526,8 @@ static u16 *vcs_write_buf(struct vc_data *vc, const char *con_buf, if (pos & 1) { count--; c = *con_buf++; -#ifdef __BIG_ENDIAN - vcs_scr_writew(vc, c | - (vcs_scr_readw(vc, org) & 0xff00), org); -#else - vcs_scr_writew(vc, (c << 8) | - (vcs_scr_readw(vc, org) & 0xff), org); -#endif + vcs_scr_writew(vc, vc_compile_le16(c, vcs_scr_readw(vc, org)), + org); org++; pos++; if (++col == maxcol) { @@ -551,11 +559,8 @@ static u16 *vcs_write_buf(struct vc_data *vc, const char *con_buf, /* odd pos -- the remaining character */ c = *con_buf++; -#ifdef __BIG_ENDIAN - vcs_scr_writew(vc, (vcs_scr_readw(vc, org) & 0xff) | (c << 8), org); -#else - vcs_scr_writew(vc, (vcs_scr_readw(vc, org) & 0xff00) | c, org); -#endif + vcs_scr_writew(vc, vc_compile_le16(vcs_scr_readw(vc, org) >> 8, c), + org); return org; } From 36c39220129e4048b6810dc732b49b4f23f2dcee Mon Sep 17 00:00:00 2001 From: Jiri Slaby Date: Tue, 18 Aug 2020 10:57:00 +0200 Subject: [PATCH 037/433] vc_screen: sanitize types in vcs_read * pos is derived from the passed ppos, so make it long enough, i.e. loff_t * attr and uni_mode are booleans, so... * size is limited by vcs_size() which returns an int * read, p, orig_count and this_round are always ">= 0" and "< size", so uint is enough * row, col, and max_col are derived from vc->vc_cols (uint) and p, so make them uint too * tmp_count is derived from this_round, so make it an uint too. * use u16 * for org (instead of unsigned short *). No need to initialize org too. Signed-off-by: Jiri Slaby Link: https://lore.kernel.org/r/20200818085706.12163-10-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman --- drivers/tty/vt/vc_screen.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/drivers/tty/vt/vc_screen.c b/drivers/tty/vt/vc_screen.c index 36b967825f68..c62c590ed816 100644 --- a/drivers/tty/vt/vc_screen.c +++ b/drivers/tty/vt/vc_screen.c @@ -256,12 +256,12 @@ vcs_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) struct inode *inode = file_inode(file); struct vc_data *vc; struct vcs_poll_data *poll; - long pos, read; - int attr, uni_mode, row, col, maxcol; - unsigned short *org = NULL; + u16 *org; + unsigned int read, row, col, maxcol; ssize_t ret; char *con_buf; - bool viewed; + loff_t pos; + bool viewed, attr, uni_mode; con_buf = (char *) __get_free_page(GFP_KERNEL); if (!con_buf) @@ -295,9 +295,8 @@ vcs_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) ret = 0; while (count) { char *con_buf0, *con_buf_start; - long this_round, size; - ssize_t orig_count; - long p = pos; + unsigned int this_round, orig_count, p = pos; + int size; /* Check whether we are above size each round, * as copy_to_user at the end of this loop @@ -362,7 +361,7 @@ vcs_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) } } else { if (p < HEADER_SIZE) { - size_t tmp_count; + unsigned int tmp_count; /* clamp header values if they don't fit */ con_buf0[0] = min(vc->vc_rows, 0xFFu); From 6d507c75e0cd359e4cede48230fb7e7a45c9bb74 Mon Sep 17 00:00:00 2001 From: Jiri Slaby Date: Tue, 18 Aug 2020 10:57:01 +0200 Subject: [PATCH 038/433] vs_screen: kill tmp_count from vcs_read Both tmp_count computations and the single use can be eliminated using min(). Do so. Side note: we need HEADER_SIZE to be unsigned for min() not to complain. Fix that too as all its other uses do not mind. Signed-off-by: Jiri Slaby Link: https://lore.kernel.org/r/20200818085706.12163-11-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman --- drivers/tty/vt/vc_screen.c | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/drivers/tty/vt/vc_screen.c b/drivers/tty/vt/vc_screen.c index c62c590ed816..8ebb6724a804 100644 --- a/drivers/tty/vt/vc_screen.c +++ b/drivers/tty/vt/vc_screen.c @@ -53,7 +53,7 @@ #undef attr #undef org #undef addr -#define HEADER_SIZE 4 +#define HEADER_SIZE 4u #define CON_BUF_SIZE (CONFIG_BASE_SMALL ? 256 : PAGE_SIZE) @@ -361,8 +361,6 @@ vcs_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) } } else { if (p < HEADER_SIZE) { - unsigned int tmp_count; - /* clamp header values if they don't fit */ con_buf0[0] = min(vc->vc_rows, 0xFFu); con_buf0[1] = min(vc->vc_cols, 0xFFu); @@ -375,12 +373,8 @@ vcs_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) orig_count = this_round - p; } - tmp_count = HEADER_SIZE; - if (tmp_count > this_round) - tmp_count = this_round; - /* Advance state pointers and move on. */ - this_round -= tmp_count; + this_round -= min(HEADER_SIZE, this_round); p = HEADER_SIZE; con_buf0 = con_buf + HEADER_SIZE; /* If this_round >= 0, then p is even... */ From 0f66eee346c1672bdb538031a5fe03ea1e0c626f Mon Sep 17 00:00:00 2001 From: Jiri Slaby Date: Tue, 18 Aug 2020 10:57:02 +0200 Subject: [PATCH 039/433] vc_screen: extract vcs_read_buf_uni The same as making write more readable, extract unicode handling from vcs_read. The other two cases (w/ and w/o attributes) will follow. Signed-off-by: Jiri Slaby Link: https://lore.kernel.org/r/20200818085706.12163-12-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman --- drivers/tty/vt/vc_screen.c | 49 +++++++++++++++++++++++--------------- 1 file changed, 30 insertions(+), 19 deletions(-) diff --git a/drivers/tty/vt/vc_screen.c b/drivers/tty/vt/vc_screen.c index 8ebb6724a804..91d2e0148a67 100644 --- a/drivers/tty/vt/vc_screen.c +++ b/drivers/tty/vt/vc_screen.c @@ -249,6 +249,33 @@ static loff_t vcs_lseek(struct file *file, loff_t offset, int orig) return fixed_size_llseek(file, offset, orig, size); } +static int vcs_read_buf_uni(struct vc_data *vc, char *con_buf, + unsigned int pos, unsigned int count, bool viewed) +{ + unsigned int nr, row, col, maxcol = vc->vc_cols; + int ret; + + ret = vc_uniscr_check(vc); + if (ret) + return ret; + + pos /= 4; + row = pos / maxcol; + col = pos % maxcol; + nr = maxcol - col; + do { + if (nr > count / 4) + nr = count / 4; + vc_uniscr_copy_line(vc, con_buf, viewed, row, col, nr); + con_buf += nr * 4; + count -= nr * 4; + row++; + col = 0; + nr = maxcol; + } while (count); + + return 0; +} static ssize_t vcs_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) @@ -257,7 +284,7 @@ vcs_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) struct vc_data *vc; struct vcs_poll_data *poll; u16 *org; - unsigned int read, row, col, maxcol; + unsigned int read, col, maxcol; ssize_t ret; char *con_buf; loff_t pos; @@ -327,26 +354,10 @@ vcs_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) orig_count = this_round; maxcol = vc->vc_cols; if (uni_mode) { - unsigned int nr; - - ret = vc_uniscr_check(vc); + ret = vcs_read_buf_uni(vc, con_buf, pos, this_round, + viewed); if (ret) break; - p /= 4; - row = p / vc->vc_cols; - col = p % maxcol; - nr = maxcol - col; - do { - if (nr > this_round/4) - nr = this_round/4; - vc_uniscr_copy_line(vc, con_buf0, viewed, - row, col, nr); - con_buf0 += nr * 4; - this_round -= nr * 4; - row++; - col = 0; - nr = maxcol; - } while (this_round); } else if (!attr) { org = screen_pos(vc, p, viewed); col = p % maxcol; From 5a52baaab029e38e919efff2abc0d4e89338d464 Mon Sep 17 00:00:00 2001 From: Jiri Slaby Date: Tue, 18 Aug 2020 10:57:03 +0200 Subject: [PATCH 040/433] vc_screen: extract vcs_read_buf_noattr Now, move the code for no-attributes handling to a separate function. Signed-off-by: Jiri Slaby Link: https://lore.kernel.org/r/20200818085706.12163-13-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman --- drivers/tty/vt/vc_screen.c | 33 ++++++++++++++++++++++----------- 1 file changed, 22 insertions(+), 11 deletions(-) diff --git a/drivers/tty/vt/vc_screen.c b/drivers/tty/vt/vc_screen.c index 91d2e0148a67..ad015cd4e82f 100644 --- a/drivers/tty/vt/vc_screen.c +++ b/drivers/tty/vt/vc_screen.c @@ -277,6 +277,26 @@ static int vcs_read_buf_uni(struct vc_data *vc, char *con_buf, return 0; } +static void vcs_read_buf_noattr(const struct vc_data *vc, char *con_buf, + unsigned int pos, unsigned int count, bool viewed) +{ + u16 *org; + unsigned int col, maxcol = vc->vc_cols; + + org = screen_pos(vc, pos, viewed); + col = pos % maxcol; + pos += maxcol - col; + + while (count-- > 0) { + *con_buf++ = (vcs_scr_readw(vc, org++) & 0xff); + if (++col == maxcol) { + org = screen_pos(vc, pos, viewed); + col = 0; + pos += maxcol; + } + } +} + static ssize_t vcs_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) { @@ -359,17 +379,8 @@ vcs_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) if (ret) break; } else if (!attr) { - org = screen_pos(vc, p, viewed); - col = p % maxcol; - p += maxcol - col; - while (this_round-- > 0) { - *con_buf0++ = (vcs_scr_readw(vc, org++) & 0xff); - if (++col == maxcol) { - org = screen_pos(vc, p, viewed); - col = 0; - p += maxcol; - } - } + vcs_read_buf_noattr(vc, con_buf, pos, this_round, + viewed); } else { if (p < HEADER_SIZE) { /* clamp header values if they don't fit */ From 6a6b76cc44c98a39d3e718aa2056e2e12b609615 Mon Sep 17 00:00:00 2001 From: Jiri Slaby Date: Tue, 18 Aug 2020 10:57:04 +0200 Subject: [PATCH 041/433] vc_screen: extract vcs_read_buf And finally, move the attributes buffer handling to a separate function. Leaving vcs_read quite compact. Signed-off-by: Jiri Slaby Link: https://lore.kernel.org/r/20200818085706.12163-14-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman --- drivers/tty/vt/vc_screen.c | 146 ++++++++++++++++++++----------------- 1 file changed, 78 insertions(+), 68 deletions(-) diff --git a/drivers/tty/vt/vc_screen.c b/drivers/tty/vt/vc_screen.c index ad015cd4e82f..c178a1611223 100644 --- a/drivers/tty/vt/vc_screen.c +++ b/drivers/tty/vt/vc_screen.c @@ -297,14 +297,81 @@ static void vcs_read_buf_noattr(const struct vc_data *vc, char *con_buf, } } +static unsigned int vcs_read_buf(const struct vc_data *vc, char *con_buf, + unsigned int pos, unsigned int count, bool viewed, + unsigned int *skip) +{ + u16 *org, *con_buf16; + unsigned int col, maxcol = vc->vc_cols; + unsigned int filled = count; + + if (pos < HEADER_SIZE) { + /* clamp header values if they don't fit */ + con_buf[0] = min(vc->vc_rows, 0xFFu); + con_buf[1] = min(vc->vc_cols, 0xFFu); + getconsxy(vc, con_buf + 2); + + *skip += pos; + count += pos; + if (count > CON_BUF_SIZE) { + count = CON_BUF_SIZE; + filled = count - pos; + } + + /* Advance state pointers and move on. */ + count -= min(HEADER_SIZE, count); + pos = HEADER_SIZE; + con_buf += HEADER_SIZE; + /* If count >= 0, then pos is even... */ + } else if (pos & 1) { + /* + * Skip first byte for output if start address is odd. Update + * region sizes up/down depending on free space in buffer. + */ + (*skip)++; + if (count < CON_BUF_SIZE) + count++; + else + filled--; + } + + if (!count) + return filled; + + pos -= HEADER_SIZE; + pos /= 2; + col = pos % maxcol; + + org = screen_pos(vc, pos, viewed); + pos += maxcol - col; + + /* + * Buffer has even length, so we can always copy character + attribute. + * We do not copy last byte to userspace if count is odd. + */ + count = (count + 1) / 2; + con_buf16 = (u16 *)con_buf; + + while (count) { + *con_buf16++ = vcs_scr_readw(vc, org++); + count--; + if (++col == maxcol) { + org = screen_pos(vc, pos, viewed); + col = 0; + pos += maxcol; + } + } + + return filled; +} + static ssize_t vcs_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) { struct inode *inode = file_inode(file); struct vc_data *vc; struct vcs_poll_data *poll; - u16 *org; - unsigned int read, col, maxcol; + unsigned int read; ssize_t ret; char *con_buf; loff_t pos; @@ -341,8 +408,7 @@ vcs_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) read = 0; ret = 0; while (count) { - char *con_buf0, *con_buf_start; - unsigned int this_round, orig_count, p = pos; + unsigned int this_round, skip = 0; int size; /* Check whether we are above size each round, @@ -370,9 +436,6 @@ vcs_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) * attempt to move it to userspace. */ - con_buf_start = con_buf0 = con_buf; - orig_count = this_round; - maxcol = vc->vc_cols; if (uni_mode) { ret = vcs_read_buf_uni(vc, con_buf, pos, this_round, viewed); @@ -382,61 +445,8 @@ vcs_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) vcs_read_buf_noattr(vc, con_buf, pos, this_round, viewed); } else { - if (p < HEADER_SIZE) { - /* clamp header values if they don't fit */ - con_buf0[0] = min(vc->vc_rows, 0xFFu); - con_buf0[1] = min(vc->vc_cols, 0xFFu); - getconsxy(vc, con_buf0 + 2); - - con_buf_start += p; - this_round += p; - if (this_round > CON_BUF_SIZE) { - this_round = CON_BUF_SIZE; - orig_count = this_round - p; - } - - /* Advance state pointers and move on. */ - this_round -= min(HEADER_SIZE, this_round); - p = HEADER_SIZE; - con_buf0 = con_buf + HEADER_SIZE; - /* If this_round >= 0, then p is even... */ - } else if (p & 1) { - /* Skip first byte for output if start address is odd - * Update region sizes up/down depending on free - * space in buffer. - */ - con_buf_start++; - if (this_round < CON_BUF_SIZE) - this_round++; - else - orig_count--; - } - if (this_round > 0) { - unsigned short *tmp_buf = (unsigned short *)con_buf0; - - p -= HEADER_SIZE; - p /= 2; - col = p % maxcol; - - org = screen_pos(vc, p, viewed); - p += maxcol - col; - - /* Buffer has even length, so we can always copy - * character + attribute. We do not copy last byte - * to userspace if this_round is odd. - */ - this_round = (this_round + 1) >> 1; - - while (this_round) { - *tmp_buf++ = vcs_scr_readw(vc, org++); - this_round --; - if (++col == maxcol) { - org = screen_pos(vc, p, viewed); - col = 0; - p += maxcol; - } - } - } + this_round = vcs_read_buf(vc, con_buf, pos, this_round, + viewed, &skip); } /* Finally, release the console semaphore while we push @@ -447,18 +457,18 @@ vcs_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) */ console_unlock(); - ret = copy_to_user(buf, con_buf_start, orig_count); + ret = copy_to_user(buf, con_buf + skip, this_round); console_lock(); if (ret) { - read += (orig_count - ret); + read += this_round - ret; ret = -EFAULT; break; } - buf += orig_count; - pos += orig_count; - read += orig_count; - count -= orig_count; + buf += this_round; + pos += this_round; + read += this_round; + count -= this_round; } *ppos += read; if (read) From b1c32fcfadf5593ab7a63261cc8a5747c36e627e Mon Sep 17 00:00:00 2001 From: Jiri Slaby Date: Tue, 18 Aug 2020 10:57:05 +0200 Subject: [PATCH 042/433] vc_screen: extract vcs_read_buf_header The attribute header handling is terrible in vcs_read_buf. Separate it to a new function and simply do memmove (of up to 4 bytes) to the start of the con_buf -- if user seeked. Signed-off-by: Jiri Slaby Link: https://lore.kernel.org/r/20200818085706.12163-15-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman --- drivers/tty/vt/vc_screen.c | 31 ++++++++++++++++++------------- 1 file changed, 18 insertions(+), 13 deletions(-) diff --git a/drivers/tty/vt/vc_screen.c b/drivers/tty/vt/vc_screen.c index c178a1611223..9d68c6b36ddf 100644 --- a/drivers/tty/vt/vc_screen.c +++ b/drivers/tty/vt/vc_screen.c @@ -297,6 +297,22 @@ static void vcs_read_buf_noattr(const struct vc_data *vc, char *con_buf, } } +static unsigned int vcs_read_buf_header(const struct vc_data *vc, char *con_buf, + unsigned int pos, unsigned int count) +{ + count = min(HEADER_SIZE - pos, count); + + /* clamp header values if they don't fit */ + con_buf[0] = min(vc->vc_rows, 0xFFu); + con_buf[1] = min(vc->vc_cols, 0xFFu); + getconsxy(vc, con_buf + 2); + + if (pos) + memmove(con_buf, con_buf + pos, count); + + return count; +} + static unsigned int vcs_read_buf(const struct vc_data *vc, char *con_buf, unsigned int pos, unsigned int count, bool viewed, unsigned int *skip) @@ -306,22 +322,11 @@ static unsigned int vcs_read_buf(const struct vc_data *vc, char *con_buf, unsigned int filled = count; if (pos < HEADER_SIZE) { - /* clamp header values if they don't fit */ - con_buf[0] = min(vc->vc_rows, 0xFFu); - con_buf[1] = min(vc->vc_cols, 0xFFu); - getconsxy(vc, con_buf + 2); + count -= vcs_read_buf_header(vc, con_buf, pos, count); - *skip += pos; - count += pos; - if (count > CON_BUF_SIZE) { - count = CON_BUF_SIZE; - filled = count - pos; - } - - /* Advance state pointers and move on. */ - count -= min(HEADER_SIZE, count); pos = HEADER_SIZE; con_buf += HEADER_SIZE; + /* If count >= 0, then pos is even... */ } else if (pos & 1) { /* From a89313825b0657273e1938aea7f13afe9abb44e8 Mon Sep 17 00:00:00 2001 From: Jiri Slaby Date: Tue, 18 Aug 2020 10:57:06 +0200 Subject: [PATCH 043/433] vc_screen: prune macros Do not undefine random words. I guess this was here as there were macros with such generic names somewhere. I very doubt they still exist. So drop these. And remove a spare blank line. Signed-off-by: Jiri Slaby Link: https://lore.kernel.org/r/20200818085706.12163-16-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman --- drivers/tty/vt/vc_screen.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/drivers/tty/vt/vc_screen.c b/drivers/tty/vt/vc_screen.c index 9d68c6b36ddf..3e3a6a9a7f44 100644 --- a/drivers/tty/vt/vc_screen.c +++ b/drivers/tty/vt/vc_screen.c @@ -50,11 +50,7 @@ #include #include -#undef attr -#undef org -#undef addr #define HEADER_SIZE 4u - #define CON_BUF_SIZE (CONFIG_BASE_SMALL ? 256 : PAGE_SIZE) /* From a579767c1f4e3270818504843a86ba3277127152 Mon Sep 17 00:00:00 2001 From: Jiri Slaby Date: Tue, 18 Aug 2020 10:56:48 +0200 Subject: [PATCH 044/433] tty: n_gsm, eliminate indirection for gsm->{output,error}() gsm->output and ->error are set only to gsmld_output and gsm_error, respectively. Call these functions directly and remove error and output function pointers from struct gsm_mux completely. Note: we need a forward declaration of gsmld_output now. Signed-off-by: Jiri Slaby Link: https://lore.kernel.org/r/20200818085655.12071-1-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman --- drivers/tty/n_gsm.c | 15 ++++++--------- 1 file changed, 6 insertions(+), 9 deletions(-) diff --git a/drivers/tty/n_gsm.c b/drivers/tty/n_gsm.c index 0a29a94ec438..10f8fc07f23c 100644 --- a/drivers/tty/n_gsm.c +++ b/drivers/tty/n_gsm.c @@ -222,11 +222,8 @@ struct gsm_mux { u8 received_fcs; u8 *txframe; /* TX framing buffer */ - /* Methods for the receiver side */ + /* Method for the receiver side */ void (*receive)(struct gsm_mux *gsm, u8 ch); - void (*error)(struct gsm_mux *gsm, u8 ch, u8 flag); - /* And transmit side */ - int (*output)(struct gsm_mux *mux, u8 *data, int len); /* Link Layer */ unsigned int mru; @@ -366,6 +363,8 @@ static const u8 gsm_fcs8[256] = { #define INIT_FCS 0xFF #define GOOD_FCS 0xCF +static int gsmld_output(struct gsm_mux *gsm, u8 *data, int len); + /** * gsm_fcs_add - update FCS * @fcs: Current FCS @@ -587,7 +586,7 @@ static void gsm_send(struct gsm_mux *gsm, int addr, int cr, int control) WARN_ON(1); return; } - gsm->output(gsm, cbuf, len); + gsmld_output(gsm, cbuf, len); gsm_print_packet("-->", addr, cr, control, NULL, 0); } @@ -687,7 +686,7 @@ static void gsm_data_kick(struct gsm_mux *gsm, struct gsm_dlci *dlci) print_hex_dump_bytes("gsm_data_kick: ", DUMP_PREFIX_OFFSET, gsm->txframe, len); - if (gsm->output(gsm, gsm->txframe, len) < 0) + if (gsmld_output(gsm, gsm->txframe, len) < 0) break; /* FIXME: Can eliminate one SOF in many more cases */ gsm->tx_bytes -= msg->len; @@ -2128,7 +2127,6 @@ static int gsm_activate_mux(struct gsm_mux *gsm) gsm->receive = gsm0_receive; else gsm->receive = gsm1_receive; - gsm->error = gsm_error; spin_lock(&gsm_mux_lock); for (i = 0; i < MAX_MUX; i++) { @@ -2378,7 +2376,6 @@ static int gsmld_attach_gsm(struct tty_struct *tty, struct gsm_mux *gsm) int ret, i; gsm->tty = tty_kref_get(tty); - gsm->output = gsmld_output; ret = gsm_activate_mux(gsm); if (ret != 0) tty_kref_put(gsm->tty); @@ -2438,7 +2435,7 @@ static void gsmld_receive_buf(struct tty_struct *tty, const unsigned char *cp, case TTY_BREAK: case TTY_PARITY: case TTY_FRAME: - gsm->error(gsm, *dp, flags); + gsm_error(gsm, *dp, flags); break; default: WARN_ONCE(1, "%s: unknown flag %d\n", From e18d918bd2ccd725ac574f7d126ed0856fe794e3 Mon Sep 17 00:00:00 2001 From: Jiri Slaby Date: Tue, 18 Aug 2020 10:56:49 +0200 Subject: [PATCH 045/433] newport_con: fix no return statement in newport_show_logo When CONFIG_LOGO_SGI_CLUT224 is unset, newport_show_logo contains no return, despite it should return a pointer. Add one returning NULL to fix a compiler warning: drivers/video/console/newport_con.c: In function 'newport_show_logo': drivers/video/console/newport_con.c:132:1: warning: no return statement in function returning non-void Note that the caller expects NULL from the function already. Signed-off-by: Jiri Slaby Cc: Bartlomiej Zolnierkiewicz Cc: dri-devel@lists.freedesktop.org Cc: linux-fbdev@vger.kernel.org Cc: linux-mips@vger.kernel.org Link: https://lore.kernel.org/r/20200818085655.12071-2-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman --- drivers/video/console/newport_con.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/video/console/newport_con.c b/drivers/video/console/newport_con.c index 72f146d047d9..4d9110393479 100644 --- a/drivers/video/console/newport_con.c +++ b/drivers/video/console/newport_con.c @@ -131,6 +131,8 @@ static const struct linux_logo *newport_show_logo(void) npregs->go.hostrw0 = *data++ << 24; return logo; +#else + return NULL; #endif /* CONFIG_LOGO_SGI_CLUT224 */ } From 9b07655c7740a97b918ebe7dc59447e29e22a957 Mon Sep 17 00:00:00 2001 From: Jiri Slaby Date: Tue, 18 Aug 2020 10:56:50 +0200 Subject: [PATCH 046/433] newport_con: make module's init & exit static using module_driver The compiler complains that newport_console_init and newport_console_exit are not declared: drivers/video/console/newport_con.c:745:12: warning: no previous prototype for 'newport_console_init' drivers/video/console/newport_con.c:750:13: warning: no previous prototype for 'newport_console_exit' Here, it translates into: they should be marked static. Do so by converting the simple un/registration to module_driver(). Signed-off-by: Jiri Slaby Cc: Bartlomiej Zolnierkiewicz Cc: dri-devel@lists.freedesktop.org Cc: linux-fbdev@vger.kernel.org Cc: linux-mips@vger.kernel.org Link: https://lore.kernel.org/r/20200818085655.12071-3-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman --- drivers/video/console/newport_con.c | 14 +------------- 1 file changed, 1 insertion(+), 13 deletions(-) diff --git a/drivers/video/console/newport_con.c b/drivers/video/console/newport_con.c index 4d9110393479..0d0989040c58 100644 --- a/drivers/video/console/newport_con.c +++ b/drivers/video/console/newport_con.c @@ -751,18 +751,6 @@ static struct gio_driver newport_driver = { .probe = newport_probe, .remove = newport_remove, }; - -int __init newport_console_init(void) -{ - return gio_register_driver(&newport_driver); -} - -void __exit newport_console_exit(void) -{ - gio_unregister_driver(&newport_driver); -} - -module_init(newport_console_init); -module_exit(newport_console_exit); +module_driver(newport_driver, gio_register_driver, gio_unregister_driver); MODULE_LICENSE("GPL"); From fa44195455c42de656bf5040a80d482526f45c8e Mon Sep 17 00:00:00 2001 From: Jiri Slaby Date: Tue, 18 Aug 2020 10:56:51 +0200 Subject: [PATCH 047/433] tty: fix kernel-doc With W=1, the kernel-doc checker complains quite a lot in the tty layer. Over the time, many documented parameters were renamed, removed or switched from tty to tty_port and similar. Some were mistyped in the doc too. So fix all these in the tty core. (But do not add the missing ones which the checker complains about too. Not now.) The rest in the tty layer will follow in the next patches. Signed-off-by: Jiri Slaby Link: https://lore.kernel.org/r/20200818085655.12071-4-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman --- drivers/tty/pty.c | 2 +- drivers/tty/tty_baudrate.c | 6 +++--- drivers/tty/tty_buffer.c | 14 +++++++------- drivers/tty/tty_io.c | 26 ++++++++++++-------------- drivers/tty/tty_jobctrl.c | 4 ++-- drivers/tty/tty_ldisc.c | 3 +-- 6 files changed, 26 insertions(+), 29 deletions(-) diff --git a/drivers/tty/pty.c b/drivers/tty/pty.c index 00099a8439d2..b6d8cc7f0f16 100644 --- a/drivers/tty/pty.c +++ b/drivers/tty/pty.c @@ -100,7 +100,7 @@ static void pty_unthrottle(struct tty_struct *tty) * pty_write - write to a pty * @tty: the tty we write from * @buf: kernel buffer of data - * @count: bytes to write + * @c: bytes to write * * Our "hardware" write method. Data is coming from the ldisc which * may be in a non sleeping state. We simply throw this at the other diff --git a/drivers/tty/tty_baudrate.c b/drivers/tty/tty_baudrate.c index 40207cab3b2a..84fec3c62d6a 100644 --- a/drivers/tty/tty_baudrate.c +++ b/drivers/tty/tty_baudrate.c @@ -119,8 +119,8 @@ EXPORT_SYMBOL(tty_termios_input_baud_rate); /** * tty_termios_encode_baud_rate * @termios: ktermios structure holding user requested state - * @ispeed: input speed - * @ospeed: output speed + * @ibaud: input speed + * @obaud: output speed * * Encode the speeds set into the passed termios structure. This is * used as a library helper for drivers so that they can report back @@ -223,7 +223,7 @@ EXPORT_SYMBOL_GPL(tty_termios_encode_baud_rate); /** * tty_encode_baud_rate - set baud rate of the tty * @ibaud: input baud rate - * @obad: output baud rate + * @obaud: output baud rate * * Update the current termios data for the tty with the new speed * settings. The caller must hold the termios_rwsem for the tty in diff --git a/drivers/tty/tty_buffer.c b/drivers/tty/tty_buffer.c index ec145a59f199..bd2d91546e32 100644 --- a/drivers/tty/tty_buffer.c +++ b/drivers/tty/tty_buffer.c @@ -42,7 +42,7 @@ * tty_buffer_lock_exclusive - gain exclusive access to buffer * tty_buffer_unlock_exclusive - release exclusive access * - * @port - tty_port owning the flip buffer + * @port: tty port owning the flip buffer * * Guarantees safe use of the line discipline's receive_buf() method by * excluding the buffer work and any pending flush from using the flip @@ -78,7 +78,7 @@ EXPORT_SYMBOL_GPL(tty_buffer_unlock_exclusive); /** * tty_buffer_space_avail - return unused buffer space - * @port - tty_port owning the flip buffer + * @port: tty port owning the flip buffer * * Returns the # of bytes which can be written by the driver without * reaching the buffer limit. @@ -107,7 +107,7 @@ static void tty_buffer_reset(struct tty_buffer *p, size_t size) /** * tty_buffer_free_all - free buffers used by a tty - * @tty: tty to free from + * @port: tty port to free from * * Remove all the buffers pending on a tty whether queued with data * or in the free ring. Must be called when the tty is no longer in use @@ -142,7 +142,7 @@ void tty_buffer_free_all(struct tty_port *port) /** * tty_buffer_alloc - allocate a tty buffer - * @tty: tty device + * @port: tty port * @size: desired size (characters) * * Allocate a new tty buffer to hold the desired number of characters. @@ -184,7 +184,7 @@ found: /** * tty_buffer_free - free a tty buffer - * @tty: tty owning the buffer + * @port: tty port owning the buffer * @b: the buffer to free * * Free a tty buffer, or add it to the free list according to our @@ -243,7 +243,7 @@ void tty_buffer_flush(struct tty_struct *tty, struct tty_ldisc *ld) /** * tty_buffer_request_room - grow tty buffer if needed - * @tty: tty structure + * @port: tty port * @size: size desired * @flags: buffer flags if new buffer allocated (default = 0) * @@ -559,7 +559,7 @@ EXPORT_SYMBOL(tty_flip_buffer_push); /** * tty_buffer_init - prepare a tty buffer structure - * @tty: tty to initialise + * @port: tty port to initialise * * Set up the initial state of the buffer management for a tty device. * Must be called before the other tty buffer functions are used. diff --git a/drivers/tty/tty_io.c b/drivers/tty/tty_io.c index ceed72c9a88f..7a4c02548fb3 100644 --- a/drivers/tty/tty_io.c +++ b/drivers/tty/tty_io.c @@ -307,7 +307,7 @@ static int check_tty_count(struct tty_struct *tty, const char *routine) /** * get_tty_driver - find device of a tty - * @dev_t: device identifier + * @device: device identifier * @index: returns the index of the tty * * This routine returns a tty driver structure, given a device number @@ -544,7 +544,7 @@ EXPORT_SYMBOL_GPL(tty_wakeup); /** * __tty_hangup - actual handler for hangup events - * @work: tty device + * @tty: tty device * * This can be called by a "kworker" kernel thread. That is process * synchronous but doesn't hold any locks, so we need to make sure we @@ -1232,7 +1232,7 @@ static int tty_driver_install_tty(struct tty_driver *driver, /** * tty_driver_remove_tty() - remove a tty from the driver tables * @driver: the driver for the tty - * @idx: the minor number + * @tty: tty to remove * * Remvoe a tty object from the driver tables. The tty->index field * will be set by the time this is called. @@ -1247,9 +1247,9 @@ static void tty_driver_remove_tty(struct tty_driver *driver, struct tty_struct * driver->ttys[tty->index] = NULL; } -/* - * tty_reopen() - fast re-open of an open tty - * @tty - the tty to open +/** + * tty_reopen() - fast re-open of an open tty + * @tty: the tty to open * * Return 0 on success, -errno on error. * Re-opens on master ptys are not allowed and return -EIO. @@ -1295,7 +1295,6 @@ static int tty_reopen(struct tty_struct *tty) * tty_init_dev - initialise a tty device * @driver: tty driver we are opening a device on * @idx: device index - * @ret_tty: returned tty structure * * Prepare a tty device. This may not be a "new" clean device but * could also be an active device. The pty drivers require special @@ -1313,6 +1312,8 @@ static int tty_reopen(struct tty_struct *tty) * failed open. The new code protects the open with a mutex, so it's * really quite straightforward. The mutex locking can probably be * relaxed for the (most common) case of reopening a tty. + * + * Return: returned tty structure */ struct tty_struct *tty_init_dev(struct tty_driver *driver, int idx) @@ -1432,7 +1433,7 @@ static void tty_flush_works(struct tty_struct *tty) /** * release_one_tty - release tty structure memory - * @kref: kref of tty we are obliterating + * @work: work of tty we are obliterating * * Releases memory associated with a tty structure, and clears out the * driver table slots. This function is called when a device is no longer @@ -1528,7 +1529,6 @@ static void release_tty(struct tty_struct *tty, int idx) /** * tty_release_checks - check a tty before real release * @tty: tty to check - * @o_tty: link of @tty (if any) * @idx: index of the tty * * Performs some paranoid checking before true release of the @tty. @@ -2200,7 +2200,7 @@ static int tiocsti(struct tty_struct *tty, char __user *p) /** * tiocgwinsz - implement window query ioctl - * @tty; tty + * @tty: tty * @arg: user buffer for result * * Copies the kernel idea of the window size into the user buffer. @@ -2223,8 +2223,7 @@ static int tiocgwinsz(struct tty_struct *tty, struct winsize __user *arg) /** * tty_do_resize - resize event * @tty: tty being resized - * @rows: rows (character) - * @cols: cols (character) + * @ws: new dimensions * * Update the termios variables and send the necessary signals to * peform a terminal resize correctly @@ -2254,7 +2253,7 @@ EXPORT_SYMBOL(tty_do_resize); /** * tiocswinsz - implement window size set ioctl - * @tty; tty side of tty + * @tty: tty side of tty * @arg: user buffer for result * * Copies the user idea of the window size to the kernel. Traditionally @@ -2402,7 +2401,6 @@ out: /** * tty_tiocmget - get modem status * @tty: tty device - * @file: user file pointer * @p: pointer to result * * Obtain the modem status bits from the tty driver if the feature diff --git a/drivers/tty/tty_jobctrl.c b/drivers/tty/tty_jobctrl.c index f8ed50a16848..28a23a0fef21 100644 --- a/drivers/tty/tty_jobctrl.c +++ b/drivers/tty/tty_jobctrl.c @@ -178,8 +178,8 @@ void session_clear_tty(struct pid *session) /** * tty_signal_session_leader - sends SIGHUP to session leader - * @tty controlling tty - * @exit_session if non-zero, signal all foreground group processes + * @tty: controlling tty + * @exit_session: if non-zero, signal all foreground group processes * * Send SIGHUP and SIGCONT to the session leader and its process group. * Optionally, signal all processes in the foreground process group. diff --git a/drivers/tty/tty_ldisc.c b/drivers/tty/tty_ldisc.c index ec1f6a48121e..fe37ec331289 100644 --- a/drivers/tty/tty_ldisc.c +++ b/drivers/tty/tty_ldisc.c @@ -79,7 +79,6 @@ EXPORT_SYMBOL(tty_register_ldisc); /** * tty_unregister_ldisc - unload a line discipline * @disc: ldisc number - * @new_ldisc: pointer to the ldisc object * * Remove a line discipline from the kernel providing it is not * currently in use. @@ -542,7 +541,7 @@ static void tty_ldisc_restore(struct tty_struct *tty, struct tty_ldisc *old) /** * tty_set_ldisc - set line discipline * @tty: the terminal to set - * @ldisc: the line discipline + * @disc: the line discipline number * * Set the discipline of a tty line. Must be called from a process * context. The ldisc change logic has to protect itself against any From 724ac070ffc7a1e7526be4408edbd324a4163e15 Mon Sep 17 00:00:00 2001 From: Jiri Slaby Date: Tue, 18 Aug 2020 10:56:52 +0200 Subject: [PATCH 048/433] tty: ldiscs, fix kernel-doc As in the previous patch, fix kernel-doc in line disciplines. Signed-off-by: Jiri Slaby Link: https://lore.kernel.org/r/20200818085655.12071-5-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman --- drivers/tty/n_gsm.c | 23 +++++++------- drivers/tty/n_hdlc.c | 72 ++++++++++++++++++++++---------------------- drivers/tty/n_tty.c | 4 +-- 3 files changed, 49 insertions(+), 50 deletions(-) diff --git a/drivers/tty/n_gsm.c b/drivers/tty/n_gsm.c index 10f8fc07f23c..67baa884b0c5 100644 --- a/drivers/tty/n_gsm.c +++ b/drivers/tty/n_gsm.c @@ -76,10 +76,9 @@ module_param(debug, int, 0600); /** * struct gsm_mux_net - network interface - * @struct gsm_dlci* dlci * * Created when net interface is initialized. - **/ + */ struct gsm_mux_net { struct kref ref; struct gsm_dlci *dlci; @@ -399,7 +398,7 @@ static inline u8 gsm_fcs_add_block(u8 fcs, u8 *c, int len) /** * gsm_read_ea - read a byte into an EA * @val: variable holding value - * c: byte going into the EA + * @c: byte going into the EA * * Processes one byte of an EA. Updates the passed variable * and returns 1 if the EA is now completely read @@ -513,8 +512,8 @@ static void gsm_print_packet(const char *hdr, int addr, int cr, /** * gsm_stuff_packet - bytestuff a packet - * @ibuf: input - * @obuf: output + * @input: input buffer + * @output: output buffer * @len: length of input * * Expand a buffer by bytestuffing it. The worst case size change @@ -1304,7 +1303,7 @@ static void gsm_control_transmit(struct gsm_mux *gsm, struct gsm_control *ctrl) /** * gsm_control_retransmit - retransmit a control frame - * @data: pointer to our gsm object + * @t: timer contained in our gsm object * * Called off the T2 timer expiry in order to retransmit control frames * that have been lost in the system somewhere. The control_lock protects @@ -1341,7 +1340,7 @@ static void gsm_control_retransmit(struct timer_list *t) * @gsm: the GSM channel * @command: command to send including CR bit * @data: bytes of data (must be kmalloced) - * @len: length of the block to send + * @clen: length of the block to send * * Queue and dispatch a control command. Only one command can be * active at a time. In theory more can be outstanding but the matching @@ -1453,7 +1452,7 @@ static void gsm_dlci_open(struct gsm_dlci *dlci) /** * gsm_dlci_t1 - T1 timer expiry - * @dlci: DLCI that opened + * @t: timer contained in the DLCI that opened * * The T1 timer handles retransmits of control frames (essentially of * SABM and DISC). We resend the command until the retry count runs out @@ -1549,7 +1548,7 @@ static void gsm_dlci_begin_close(struct gsm_dlci *dlci) * gsm_dlci_data - data arrived * @dlci: channel * @data: block of bytes received - * @len: length of received block + * @clen: length of received block * * A UI or UIH frame has arrived which contains data for a channel * other than the control channel. If the relevant virtual tty is @@ -1671,7 +1670,7 @@ static struct gsm_dlci *gsm_dlci_alloc(struct gsm_mux *gsm, int addr) /** * gsm_dlci_free - free DLCI - * @dlci: DLCI to free + * @port: tty port for DLCI to free * * Free up a DLCI. * @@ -2149,7 +2148,7 @@ static int gsm_activate_mux(struct gsm_mux *gsm) /** * gsm_free_mux - free up a mux - * @mux: mux to free + * @gsm: mux to free * * Dispose of allocated resources for a dead mux */ @@ -2162,7 +2161,7 @@ static void gsm_free_mux(struct gsm_mux *gsm) /** * gsm_free_muxr - free up a mux - * @mux: mux to free + * @ref: kreference to the mux to free * * Dispose of allocated resources for a dead mux */ diff --git a/drivers/tty/n_hdlc.c b/drivers/tty/n_hdlc.c index b09eac4b6d64..9ba967f8b7ca 100644 --- a/drivers/tty/n_hdlc.c +++ b/drivers/tty/n_hdlc.c @@ -123,13 +123,13 @@ struct n_hdlc_buf_list { /** * struct n_hdlc - per device instance data structure - * @magic - magic value for structure - * @tbusy - reentrancy flag for tx wakeup code - * @woke_up - tx wakeup needs to be run again as it was called while @tbusy - * @tx_buf_list - list of pending transmit frame buffers - * @rx_buf_list - list of received frame buffers - * @tx_free_buf_list - list unused transmit frame buffers - * @rx_free_buf_list - list unused received frame buffers + * @magic: magic value for structure + * @tbusy: reentrancy flag for tx wakeup code + * @woke_up: tx wakeup needs to be run again as it was called while @tbusy + * @tx_buf_list: list of pending transmit frame buffers + * @rx_buf_list: list of received frame buffers + * @tx_free_buf_list: list unused transmit frame buffers + * @rx_free_buf_list: list unused received frame buffers */ struct n_hdlc { int magic; @@ -187,7 +187,7 @@ static void n_hdlc_free_buf_list(struct n_hdlc_buf_list *list) /** * n_hdlc_tty_close - line discipline close - * @tty - pointer to tty info structure + * @tty: pointer to tty info structure * * Called when the line discipline is changed to something * else, the tty is closed, or the tty detects a hangup. @@ -218,7 +218,7 @@ static void n_hdlc_tty_close(struct tty_struct *tty) /** * n_hdlc_tty_open - called when line discipline changed to n_hdlc - * @tty - pointer to tty info structure + * @tty: pointer to tty info structure * * Returns 0 if success, otherwise error code */ @@ -255,8 +255,8 @@ static int n_hdlc_tty_open(struct tty_struct *tty) /** * n_hdlc_send_frames - send frames on pending send buffer list - * @n_hdlc - pointer to ldisc instance data - * @tty - pointer to tty instance data + * @n_hdlc: pointer to ldisc instance data + * @tty: pointer to tty instance data * * Send frames on pending send buffer list until the driver does not accept a * frame (busy) this function is called after adding a frame to the send buffer @@ -335,7 +335,7 @@ check_again: /** * n_hdlc_tty_wakeup - Callback for transmit wakeup - * @tty - pointer to associated tty instance data + * @tty: pointer to associated tty instance data * * Called when low level device driver can accept more send data. */ @@ -348,10 +348,10 @@ static void n_hdlc_tty_wakeup(struct tty_struct *tty) /** * n_hdlc_tty_receive - Called by tty driver when receive data is available - * @tty - pointer to tty instance data - * @data - pointer to received data - * @flags - pointer to flags for data - * @count - count of received data in bytes + * @tty: pointer to tty instance data + * @data: pointer to received data + * @flags: pointer to flags for data + * @count: count of received data in bytes * * Called by tty low level driver when receive data is available. Data is * interpreted as one HDLC frame. @@ -408,10 +408,10 @@ static void n_hdlc_tty_receive(struct tty_struct *tty, const __u8 *data, /** * n_hdlc_tty_read - Called to retrieve one frame of data (if available) - * @tty - pointer to tty instance data - * @file - pointer to open file object - * @buf - pointer to returned data buffer - * @nr - size of returned data buffer + * @tty: pointer to tty instance data + * @file: pointer to open file object + * @buf: pointer to returned data buffer + * @nr: size of returned data buffer * * Returns the number of bytes returned or error code. */ @@ -479,10 +479,10 @@ static ssize_t n_hdlc_tty_read(struct tty_struct *tty, struct file *file, /** * n_hdlc_tty_write - write a single frame of data to device - * @tty - pointer to associated tty device instance data - * @file - pointer to file object data - * @data - pointer to transmit data (one frame) - * @count - size of transmit frame in bytes + * @tty: pointer to associated tty device instance data + * @file: pointer to file object data + * @data: pointer to transmit data (one frame) + * @count: size of transmit frame in bytes * * Returns the number of bytes written (or error code). */ @@ -546,10 +546,10 @@ static ssize_t n_hdlc_tty_write(struct tty_struct *tty, struct file *file, /** * n_hdlc_tty_ioctl - process IOCTL system call for the tty device. - * @tty - pointer to tty instance data - * @file - pointer to open file object for device - * @cmd - IOCTL command code - * @arg - argument for IOCTL call (cmd dependent) + * @tty: pointer to tty instance data + * @file: pointer to open file object for device + * @cmd: IOCTL command code + * @arg: argument for IOCTL call (cmd dependent) * * Returns command dependent result. */ @@ -614,9 +614,9 @@ static int n_hdlc_tty_ioctl(struct tty_struct *tty, struct file *file, /** * n_hdlc_tty_poll - TTY callback for poll system call - * @tty - pointer to tty instance data - * @filp - pointer to open file object for device - * @poll_table - wait queue for operations + * @tty: pointer to tty instance data + * @filp: pointer to open file object for device + * @wait: wait queue for operations * * Determine which operations (read/write) will not block and return info * to caller. @@ -703,8 +703,8 @@ static struct n_hdlc *n_hdlc_alloc(void) /** * n_hdlc_buf_return - put the HDLC buffer after the head of the specified list - * @buf_list - pointer to the buffer list - * @buf - pointer to the buffer + * @buf_list: pointer to the buffer list + * @buf: pointer to the buffer */ static void n_hdlc_buf_return(struct n_hdlc_buf_list *buf_list, struct n_hdlc_buf *buf) @@ -721,8 +721,8 @@ static void n_hdlc_buf_return(struct n_hdlc_buf_list *buf_list, /** * n_hdlc_buf_put - add specified HDLC buffer to tail of specified list - * @buf_list - pointer to buffer list - * @buf - pointer to buffer + * @buf_list: pointer to buffer list + * @buf: pointer to buffer */ static void n_hdlc_buf_put(struct n_hdlc_buf_list *buf_list, struct n_hdlc_buf *buf) @@ -739,7 +739,7 @@ static void n_hdlc_buf_put(struct n_hdlc_buf_list *buf_list, /** * n_hdlc_buf_get - remove and return an HDLC buffer from list - * @buf_list - pointer to HDLC buffer list + * @buf_list: pointer to HDLC buffer list * * Remove and return an HDLC buffer from the head of the specified HDLC buffer * list. diff --git a/drivers/tty/n_tty.c b/drivers/tty/n_tty.c index 1794d84e7bf6..7e5e36315260 100644 --- a/drivers/tty/n_tty.c +++ b/drivers/tty/n_tty.c @@ -322,7 +322,7 @@ static inline void put_tty_queue(unsigned char c, struct n_tty_data *ldata) /** * reset_buffer_flags - reset buffer state - * @tty: terminal to reset + * @ldata: line disc data to reset * * Reset the read buffer counters and clear the flags. * Called from n_tty_open() and n_tty_flush_buffer(). @@ -906,7 +906,7 @@ static void echo_erase_tab(unsigned int num_chars, int after_tab, /** * echo_char_raw - echo a character raw * @c: unicode byte to echo - * @tty: terminal device + * @ldata: line disc data * * Echo user input back onto the screen. This must be called only when * L_ECHO(tty) is true. Called from the driver receive_buf path. From ea239f1e32af046f826d816b75599b7608eaa542 Mon Sep 17 00:00:00 2001 From: Jiri Slaby Date: Tue, 18 Aug 2020 10:56:53 +0200 Subject: [PATCH 049/433] tty: vt, fix kernel-doc As in the previous patches, fix kernel-doc in vt. Signed-off-by: Jiri Slaby Link: https://lore.kernel.org/r/20200818085655.12071-6-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman --- drivers/tty/vt/consolemap.c | 2 +- drivers/tty/vt/vt.c | 7 ++++--- drivers/tty/vt/vt_ioctl.c | 3 +-- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/tty/vt/consolemap.c b/drivers/tty/vt/consolemap.c index 5d5a5fd2dce7..5d778c0aa009 100644 --- a/drivers/tty/vt/consolemap.c +++ b/drivers/tty/vt/consolemap.c @@ -708,7 +708,7 @@ EXPORT_SYMBOL(con_set_default_unimap); /** * con_copy_unimap - copy unimap between two vts * @dst_vc: target - * @src_vt: source + * @src_vc: source * * The caller must hold the console lock when invoking this method */ diff --git a/drivers/tty/vt/vt.c b/drivers/tty/vt/vt.c index 0f7064d41e92..71f972675fee 100644 --- a/drivers/tty/vt/vt.c +++ b/drivers/tty/vt/vt.c @@ -1181,7 +1181,6 @@ static inline int resize_screen(struct vc_data *vc, int width, int height, /** * vc_do_resize - resizing method for the tty * @tty: tty being resized - * @real_tty: real tty (different to tty if a pty/tty pair) * @vc: virtual console private data * @cols: columns * @lines: lines @@ -2607,6 +2606,9 @@ static inline int vc_sanitize_unicode(const int c) /** * vc_translate_unicode -- Combine UTF-8 into Unicode in @vc_utf_char + * @vc: virtual console + * @c: character to translate + * @rescan: we return true if we need more (continuation) data * * @vc_utf_char is the being-constructed unicode character. * @vc_utf_count is the number of continuation bytes still expected to arrive. @@ -3982,7 +3984,7 @@ EXPORT_SYMBOL(con_is_visible); /** * con_debug_enter - prepare the console for the kernel debugger - * @sw: console driver + * @vc: virtual console * * Called when the console is taken over by the kernel debugger, this * function needs to save the current console state, then put the console @@ -4040,7 +4042,6 @@ EXPORT_SYMBOL_GPL(con_debug_enter); /** * con_debug_leave - restore console state - * @sw: console driver * * Restore the console state to what it was before the kernel debugger * was invoked. diff --git a/drivers/tty/vt/vt_ioctl.c b/drivers/tty/vt/vt_ioctl.c index 91c301775047..7726df6b9b6f 100644 --- a/drivers/tty/vt/vt_ioctl.c +++ b/drivers/tty/vt/vt_ioctl.c @@ -181,7 +181,7 @@ static void vt_event_wait(struct vt_event_wait *vw) /** * vt_event_wait_ioctl - event ioctl handler - * @arg: argument to ioctl + * @event: argument to ioctl (the event) * * Implement the VT_WAITEVENT ioctl using the VT event interface */ @@ -208,7 +208,6 @@ static int vt_event_wait_ioctl(struct vt_event __user *event) /** * vt_waitactive - active console wait - * @event: event code * @n: new console * * Helper for event waits. Used to implement the legacy From 87d03a940be5e6da7b8c6c618d0c51800d4a161b Mon Sep 17 00:00:00 2001 From: Jiri Slaby Date: Tue, 18 Aug 2020 10:56:54 +0200 Subject: [PATCH 050/433] tty: synclink, fix kernel-doc As in the previous patches, fix kernel-doc in synclink drivers. This is done separately from others, as kernel-doc comments were heavily broken in these drivers. Convert them to proper ones. Signed-off-by: Jiri Slaby Link: https://lore.kernel.org/r/20200818085655.12071-7-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman --- drivers/tty/synclink.c | 82 +++++++++++++++++++------------------- drivers/tty/synclink_gt.c | 81 ++++++++++++++++++-------------------- drivers/tty/synclinkmp.c | 83 +++++++++++++++++++-------------------- 3 files changed, 119 insertions(+), 127 deletions(-) diff --git a/drivers/tty/synclink.c b/drivers/tty/synclink.c index 0dba40eace46..c8324d58ef56 100644 --- a/drivers/tty/synclink.c +++ b/drivers/tty/synclink.c @@ -942,7 +942,7 @@ static inline int mgsl_paranoia_check(struct mgsl_struct *info, return 0; } -/** +/* * line discipline callback wrappers * * The wrappers maintain line discipline references @@ -7419,14 +7419,14 @@ static int usc_loopmode_active( struct mgsl_struct * info) #if SYNCLINK_GENERIC_HDLC /** - * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.) - * set encoding and frame check sequence (FCS) options + * hdlcdev_attach - called by generic HDLC layer when protocol selected (PPP, frame relay, etc.) + * @dev: pointer to network device structure + * @encoding: serial encoding setting + * @parity: FCS setting * - * dev pointer to network device structure - * encoding serial encoding setting - * parity FCS setting + * Set encoding and frame check sequence (FCS) options. * - * returns 0 if success, otherwise error code + * Return: 0 if success, otherwise error code */ static int hdlcdev_attach(struct net_device *dev, unsigned short encoding, unsigned short parity) @@ -7468,10 +7468,9 @@ static int hdlcdev_attach(struct net_device *dev, unsigned short encoding, } /** - * called by generic HDLC layer to send frame - * - * skb socket buffer containing HDLC frame - * dev pointer to network device structure + * hdlcdev_xmit - called by generic HDLC layer to send a frame + * @skb: socket buffer containing HDLC frame + * @dev: pointer to network device structure */ static netdev_tx_t hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev) @@ -7509,12 +7508,12 @@ static netdev_tx_t hdlcdev_xmit(struct sk_buff *skb, } /** - * called by network layer when interface enabled - * claim resources and initialize hardware + * hdlcdev_open - called by network layer when interface enabled + * @dev: pointer to network device structure * - * dev pointer to network device structure + * Claim resources and initialize hardware. * - * returns 0 if success, otherwise error code + * Return: 0 if success, otherwise error code */ static int hdlcdev_open(struct net_device *dev) { @@ -7568,12 +7567,12 @@ static int hdlcdev_open(struct net_device *dev) } /** - * called by network layer when interface is disabled - * shutdown hardware and release resources + * hdlcdev_close - called by network layer when interface is disabled + * @dev: pointer to network device structure * - * dev pointer to network device structure + * Shutdown hardware and release resources. * - * returns 0 if success, otherwise error code + * Return: 0 if success, otherwise error code */ static int hdlcdev_close(struct net_device *dev) { @@ -7598,13 +7597,12 @@ static int hdlcdev_close(struct net_device *dev) } /** - * called by network layer to process IOCTL call to network device + * hdlcdev_ioctl - called by network layer to process IOCTL call to network device + * @dev: pointer to network device structure + * @ifr: pointer to network interface request structure + * @cmd: IOCTL command code * - * dev pointer to network device structure - * ifr pointer to network interface request structure - * cmd IOCTL command code - * - * returns 0 if success, otherwise error code + * Return: 0 if success, otherwise error code */ static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) { @@ -7702,9 +7700,9 @@ static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) } /** - * called by network layer when transmit timeout is detected + * hdlcdev_tx_timeout - called by network layer when transmit timeout is detected * - * dev pointer to network device structure + * @dev: pointer to network device structure */ static void hdlcdev_tx_timeout(struct net_device *dev, unsigned int txqueue) { @@ -7725,10 +7723,10 @@ static void hdlcdev_tx_timeout(struct net_device *dev, unsigned int txqueue) } /** - * called by device driver when transmit completes - * reenable network layer transmit if stopped + * hdlcdev_tx_done - called by device driver when transmit completes + * @info: pointer to device instance information * - * info pointer to device instance information + * Reenable network layer transmit if stopped. */ static void hdlcdev_tx_done(struct mgsl_struct *info) { @@ -7737,12 +7735,12 @@ static void hdlcdev_tx_done(struct mgsl_struct *info) } /** - * called by device driver when frame received - * pass frame to network layer + * hdlcdev_rx - called by device driver when frame received + * @info: pointer to device instance information + * @buf: pointer to buffer contianing frame data + * @size: count of data bytes in buf * - * info pointer to device instance information - * buf pointer to buffer contianing frame data - * size count of data bytes in buf + * Pass frame to network layer. */ static void hdlcdev_rx(struct mgsl_struct *info, char *buf, int size) { @@ -7778,12 +7776,12 @@ static const struct net_device_ops hdlcdev_ops = { }; /** - * called by device driver when adding device instance - * do generic HDLC initialization + * hdlcdev_init - called by device driver when adding device instance + * @info: pointer to device instance information * - * info pointer to device instance information + * Do generic HDLC initialization. * - * returns 0 if success, otherwise error code + * Return: 0 if success, otherwise error code */ static int hdlcdev_init(struct mgsl_struct *info) { @@ -7827,10 +7825,10 @@ static int hdlcdev_init(struct mgsl_struct *info) } /** - * called by device driver when removing device instance - * do generic HDLC cleanup + * hdlcdev_exit - called by device driver when removing device instance + * @info: pointer to device instance information * - * info pointer to device instance information + * Do generic HDLC cleanup. */ static void hdlcdev_exit(struct mgsl_struct *info) { diff --git a/drivers/tty/synclink_gt.c b/drivers/tty/synclink_gt.c index b794177ccfb9..917cc611ad25 100644 --- a/drivers/tty/synclink_gt.c +++ b/drivers/tty/synclink_gt.c @@ -1395,14 +1395,14 @@ static int set_break(struct tty_struct *tty, int break_state) #if SYNCLINK_GENERIC_HDLC /** - * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.) - * set encoding and frame check sequence (FCS) options + * hdlcdev_attach - called by generic HDLC layer when protocol selected (PPP, frame relay, etc.) + * @dev: pointer to network device structure + * @encoding: serial encoding setting + * @parity: FCS setting * - * dev pointer to network device structure - * encoding serial encoding setting - * parity FCS setting + * Set encoding and frame check sequence (FCS) options. * - * returns 0 if success, otherwise error code + * Return: 0 if success, otherwise error code */ static int hdlcdev_attach(struct net_device *dev, unsigned short encoding, unsigned short parity) @@ -1446,10 +1446,9 @@ static int hdlcdev_attach(struct net_device *dev, unsigned short encoding, } /** - * called by generic HDLC layer to send frame - * - * skb socket buffer containing HDLC frame - * dev pointer to network device structure + * hdlcdev_xmit - called by generic HDLC layer to send a frame + * @skb: socket buffer containing HDLC frame + * @dev: pointer to network device structure */ static netdev_tx_t hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev) @@ -1483,12 +1482,12 @@ static netdev_tx_t hdlcdev_xmit(struct sk_buff *skb, } /** - * called by network layer when interface enabled - * claim resources and initialize hardware + * hdlcdev_open - called by network layer when interface enabled + * @dev: pointer to network device structure * - * dev pointer to network device structure + * Claim resources and initialize hardware. * - * returns 0 if success, otherwise error code + * Return: 0 if success, otherwise error code */ static int hdlcdev_open(struct net_device *dev) { @@ -1544,12 +1543,12 @@ static int hdlcdev_open(struct net_device *dev) } /** - * called by network layer when interface is disabled - * shutdown hardware and release resources + * hdlcdev_close - called by network layer when interface is disabled + * @dev: pointer to network device structure * - * dev pointer to network device structure + * Shutdown hardware and release resources. * - * returns 0 if success, otherwise error code + * Return: 0 if success, otherwise error code */ static int hdlcdev_close(struct net_device *dev) { @@ -1574,13 +1573,12 @@ static int hdlcdev_close(struct net_device *dev) } /** - * called by network layer to process IOCTL call to network device + * hdlcdev_ioctl - called by network layer to process IOCTL call to network device + * @dev: pointer to network device structure + * @ifr: pointer to network interface request structure + * @cmd: IOCTL command code * - * dev pointer to network device structure - * ifr pointer to network interface request structure - * cmd IOCTL command code - * - * returns 0 if success, otherwise error code + * Return: 0 if success, otherwise error code */ static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) { @@ -1678,9 +1676,8 @@ static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) } /** - * called by network layer when transmit timeout is detected - * - * dev pointer to network device structure + * hdlcdev_tx_timeout - called by network layer when transmit timeout is detected + * @dev: pointer to network device structure */ static void hdlcdev_tx_timeout(struct net_device *dev, unsigned int txqueue) { @@ -1700,10 +1697,10 @@ static void hdlcdev_tx_timeout(struct net_device *dev, unsigned int txqueue) } /** - * called by device driver when transmit completes - * reenable network layer transmit if stopped + * hdlcdev_tx_done - called by device driver when transmit completes + * @info: pointer to device instance information * - * info pointer to device instance information + * Reenable network layer transmit if stopped. */ static void hdlcdev_tx_done(struct slgt_info *info) { @@ -1712,12 +1709,12 @@ static void hdlcdev_tx_done(struct slgt_info *info) } /** - * called by device driver when frame received - * pass frame to network layer + * hdlcdev_rx - called by device driver when frame received + * @info: pointer to device instance information + * @buf: pointer to buffer contianing frame data + * @size: count of data bytes in buf * - * info pointer to device instance information - * buf pointer to buffer contianing frame data - * size count of data bytes in buf + * Pass frame to network layer. */ static void hdlcdev_rx(struct slgt_info *info, char *buf, int size) { @@ -1751,12 +1748,12 @@ static const struct net_device_ops hdlcdev_ops = { }; /** - * called by device driver when adding device instance - * do generic HDLC initialization + * hdlcdev_init - called by device driver when adding device instance + * @info: pointer to device instance information * - * info pointer to device instance information + * Do generic HDLC initialization. * - * returns 0 if success, otherwise error code + * Return: 0 if success, otherwise error code */ static int hdlcdev_init(struct slgt_info *info) { @@ -1800,10 +1797,10 @@ static int hdlcdev_init(struct slgt_info *info) } /** - * called by device driver when removing device instance - * do generic HDLC cleanup + * hdlcdev_exit - called by device driver when removing device instance + * @info: pointer to device instance information * - * info pointer to device instance information + * Do generic HDLC cleanup. */ static void hdlcdev_exit(struct slgt_info *info) { diff --git a/drivers/tty/synclinkmp.c b/drivers/tty/synclinkmp.c index 33ff2dbb6650..ce08c5ec331c 100644 --- a/drivers/tty/synclinkmp.c +++ b/drivers/tty/synclinkmp.c @@ -685,7 +685,7 @@ static inline int sanity_check(SLMP_INFO *info, return 0; } -/** +/* * line discipline callback wrappers * * The wrappers maintain line discipline references @@ -1520,14 +1520,14 @@ static int set_break(struct tty_struct *tty, int break_state) #if SYNCLINK_GENERIC_HDLC /** - * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.) - * set encoding and frame check sequence (FCS) options + * hdlcdev_attach - called by generic HDLC layer when protocol selected (PPP, frame relay, etc.) + * @dev: pointer to network device structure + * @encoding: serial encoding setting + * @parity: FCS setting * - * dev pointer to network device structure - * encoding serial encoding setting - * parity FCS setting + * Set encoding and frame check sequence (FCS) options. * - * returns 0 if success, otherwise error code + * Return: 0 if success, otherwise error code */ static int hdlcdev_attach(struct net_device *dev, unsigned short encoding, unsigned short parity) @@ -1569,10 +1569,9 @@ static int hdlcdev_attach(struct net_device *dev, unsigned short encoding, } /** - * called by generic HDLC layer to send frame - * - * skb socket buffer containing HDLC frame - * dev pointer to network device structure + * hdlcdev_xmit - called by generic HDLC layer to send frame + * @skb: socket buffer containing HDLC frame + * @dev: pointer to network device structure */ static netdev_tx_t hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev) @@ -1610,12 +1609,12 @@ static netdev_tx_t hdlcdev_xmit(struct sk_buff *skb, } /** - * called by network layer when interface enabled - * claim resources and initialize hardware + * hdlcdev_open - called by network layer when interface enabled + * @dev: pointer to network device structure * - * dev pointer to network device structure + * Claim resources and initialize hardware. * - * returns 0 if success, otherwise error code + * Return: 0 if success, otherwise error code */ static int hdlcdev_open(struct net_device *dev) { @@ -1669,12 +1668,12 @@ static int hdlcdev_open(struct net_device *dev) } /** - * called by network layer when interface is disabled - * shutdown hardware and release resources + * hdlcdev_close - called by network layer when interface is disabled + * @dev: pointer to network device structure * - * dev pointer to network device structure + * Shutdown hardware and release resources. * - * returns 0 if success, otherwise error code + * Return: 0 if success, otherwise error code */ static int hdlcdev_close(struct net_device *dev) { @@ -1699,13 +1698,12 @@ static int hdlcdev_close(struct net_device *dev) } /** - * called by network layer to process IOCTL call to network device + * hdlcdev_ioctl - called by network layer to process IOCTL call to network device + * @dev: pointer to network device structure + * @ifr: pointer to network interface request structure + * @cmd: IOCTL command code * - * dev pointer to network device structure - * ifr pointer to network interface request structure - * cmd IOCTL command code - * - * returns 0 if success, otherwise error code + * Return: 0 if success, otherwise error code */ static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) { @@ -1803,9 +1801,8 @@ static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) } /** - * called by network layer when transmit timeout is detected - * - * dev pointer to network device structure + * hdlcdev_tx_timeout - called by network layer when transmit timeout is detected + * @dev: pointer to network device structure */ static void hdlcdev_tx_timeout(struct net_device *dev, unsigned int txqueue) { @@ -1826,10 +1823,10 @@ static void hdlcdev_tx_timeout(struct net_device *dev, unsigned int txqueue) } /** - * called by device driver when transmit completes - * reenable network layer transmit if stopped + * hdlcdev_tx_done - called by device driver when transmit completes + * @info: pointer to device instance information * - * info pointer to device instance information + * Reenable network layer transmit if stopped. */ static void hdlcdev_tx_done(SLMP_INFO *info) { @@ -1838,12 +1835,12 @@ static void hdlcdev_tx_done(SLMP_INFO *info) } /** - * called by device driver when frame received - * pass frame to network layer + * hdlcdev_rx - called by device driver when frame received + * @info: pointer to device instance information + * @buf: pointer to buffer contianing frame data + * @size: count of data bytes in buf * - * info pointer to device instance information - * buf pointer to buffer contianing frame data - * size count of data bytes in buf + * Pass frame to network layer. */ static void hdlcdev_rx(SLMP_INFO *info, char *buf, int size) { @@ -1879,12 +1876,12 @@ static const struct net_device_ops hdlcdev_ops = { }; /** - * called by device driver when adding device instance - * do generic HDLC initialization + * hdlcdev_init - called by device driver when adding device instance + * @info: pointer to device instance information * - * info pointer to device instance information + * Do generic HDLC initialization. * - * returns 0 if success, otherwise error code + * Return: 0 if success, otherwise error code */ static int hdlcdev_init(SLMP_INFO *info) { @@ -1928,10 +1925,10 @@ static int hdlcdev_init(SLMP_INFO *info) } /** - * called by device driver when removing device instance - * do generic HDLC cleanup + * hdlcdev_exit - called by device driver when removing device instance + * @info: pointer to device instance information * - * info pointer to device instance information + * Do generic HDLC cleanup. */ static void hdlcdev_exit(SLMP_INFO *info) { From 145f5646be67eb5613d9606c5cb5139bb00df8b9 Mon Sep 17 00:00:00 2001 From: Jiri Slaby Date: Tue, 18 Aug 2020 10:56:55 +0200 Subject: [PATCH 051/433] tty: serial, fix kernel-doc As in the previous patches, fix kernel-doc in serial drivers. Signed-off-by: Jiri Slaby Link: https://lore.kernel.org/r/20200818085655.12071-8-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/ifx6x60.c | 7 +++---- drivers/tty/serial/men_z135_uart.c | 8 ++++---- 2 files changed, 7 insertions(+), 8 deletions(-) diff --git a/drivers/tty/serial/ifx6x60.c b/drivers/tty/serial/ifx6x60.c index 37d5b8516880..21d519c804cb 100644 --- a/drivers/tty/serial/ifx6x60.c +++ b/drivers/tty/serial/ifx6x60.c @@ -257,7 +257,7 @@ static void mrdy_assert(struct ifx_spi_device *ifx_dev) /** * ifx_spi_timeout - SPI timeout - * @arg: our SPI device + * @t: timer in our SPI device * * The SPI has timed out: hang up the tty. Users will then see a hangup * and error events. @@ -277,7 +277,6 @@ static void ifx_spi_timeout(struct timer_list *t) /** * ifx_spi_tiocmget - get modem lines * @tty: our tty device - * @filp: file handle issuing the request * * Map the signal state into Linux modem flags and report the value * in Linux terms @@ -531,7 +530,7 @@ static int ifx_spi_chars_in_buffer(struct tty_struct *tty) /** * ifx_port_hangup - * @port: our tty port + * @tty: our tty * * tty port hang up. Called when tty_hangup processing is invoked either * by loss of carrier, or by software (eg vhangup). Serialized against @@ -611,7 +610,7 @@ static const struct tty_operations ifx_spi_serial_ops = { /** * ifx_spi_insert_fip_string - queue received data - * @ifx_ser: our SPI device + * @ifx_dev: our SPI device * @chars: buffer we have received * @size: number of chars reeived * diff --git a/drivers/tty/serial/men_z135_uart.c b/drivers/tty/serial/men_z135_uart.c index 4f53a4caabf6..9acae5f8fc32 100644 --- a/drivers/tty/serial/men_z135_uart.c +++ b/drivers/tty/serial/men_z135_uart.c @@ -173,7 +173,7 @@ static void men_z135_reg_clr(struct men_z135_port *uart, /** * men_z135_handle_modem_status() - Handle change of modem status - * @port: The UART port + * @uart: The UART port * * Handle change of modem status register. This is done by reading the "delta" * versions of DCD (Data Carrier Detect) and CTS (Clear To Send). @@ -236,7 +236,7 @@ static u16 get_rx_fifo_content(struct men_z135_port *uart) /** * men_z135_handle_rx() - RX tasklet routine - * @arg: Pointer to struct men_z135_port + * @uart: Pointer to struct men_z135_port * * Copy from RX FIFO and acknowledge number of bytes copied. */ @@ -287,7 +287,7 @@ static void men_z135_handle_rx(struct men_z135_port *uart) /** * men_z135_handle_tx() - TX tasklet routine - * @arg: Pointer to struct men_z135_port + * @uart: Pointer to struct men_z135_port * */ static void men_z135_handle_tx(struct men_z135_port *uart) @@ -596,7 +596,7 @@ static void men_z135_stop_rx(struct uart_port *port) /** * men_z135_enable_ms() - Enable Modem Status - * port: + * @port: the port * * Enable Modem Status IRQ. */ From 0e2d769d4b4eb8eb012c430be34b6ca06daf9e1d Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Mon, 27 Jul 2020 19:12:14 +0300 Subject: [PATCH 052/433] pinctrl: cherryview: Drop stale comment There is no more .groups member in struct chv_pinctrl, drop associated comment because it's not applicable anymore. Signed-off-by: Andy Shevchenko Acked-by: Mika Westerberg --- drivers/pinctrl/intel/pinctrl-cherryview.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-cherryview.c b/drivers/pinctrl/intel/pinctrl-cherryview.c index 9ef246145bde..41708f7ea65c 100644 --- a/drivers/pinctrl/intel/pinctrl-cherryview.c +++ b/drivers/pinctrl/intel/pinctrl-cherryview.c @@ -86,9 +86,6 @@ struct intel_pad_context { * @irq: Our parent irq * @intr_lines: Mapping between 16 HW interrupt wires and GPIO offset (in GPIO number space) * @saved_intmask: Interrupt mask saved for system sleep - * - * The first group in @groups is expected to contain all pins that can be - * used as GPIOs. */ struct chv_pinctrl { struct device *dev; From 8a82857077804b03be3a64fc5204ebc49a53dd95 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Mon, 27 Jul 2020 19:12:15 +0300 Subject: [PATCH 053/433] pinctrl: cherryview: Move custom community members to separate data struct This is a preparatory patch for bigger clean up pending for Cherryview driver. There is no functional change intended. Signed-off-by: Andy Shevchenko Acked-by: Mika Westerberg --- drivers/pinctrl/intel/pinctrl-cherryview.c | 45 +++++++++++++++------- 1 file changed, 31 insertions(+), 14 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-cherryview.c b/drivers/pinctrl/intel/pinctrl-cherryview.c index 41708f7ea65c..6b2fbc0ac422 100644 --- a/drivers/pinctrl/intel/pinctrl-cherryview.c +++ b/drivers/pinctrl/intel/pinctrl-cherryview.c @@ -72,6 +72,16 @@ struct intel_pad_context { u32 padctrl1; }; +/** + * struct intel_community_context - community context for Cherryview + * @intr_lines: Mapping between 16 HW interrupt wires and GPIO offset (in GPIO number space) + * @saved_intmask: Interrupt mask saved for system sleep + */ +struct intel_community_context { + unsigned int intr_lines[16]; + u32 saved_intmask; +}; + /** * struct chv_pinctrl - CHV pinctrl private structure * @dev: Pointer to the parent device @@ -84,8 +94,6 @@ struct intel_pad_context { * @ncommunities: Number of communities in this pin controller * @context: Configuration saved over system sleep * @irq: Our parent irq - * @intr_lines: Mapping between 16 HW interrupt wires and GPIO offset (in GPIO number space) - * @saved_intmask: Interrupt mask saved for system sleep */ struct chv_pinctrl { struct device *dev; @@ -98,9 +106,6 @@ struct chv_pinctrl { size_t ncommunities; struct intel_pinctrl_context context; int irq; - - unsigned int intr_lines[16]; - u32 saved_intmask; }; #define PINMODE_INVERT_OE BIT(15) @@ -815,12 +820,13 @@ static int chv_gpio_request_enable(struct pinctrl_dev *pctldev, return -EBUSY; } } else { + struct intel_community_context *cctx = &pctrl->context.communities[0]; int i; /* Reset the interrupt mapping */ - for (i = 0; i < ARRAY_SIZE(pctrl->intr_lines); i++) { - if (pctrl->intr_lines[i] == offset) { - pctrl->intr_lines[i] = 0; + for (i = 0; i < ARRAY_SIZE(cctx->intr_lines); i++) { + if (cctx->intr_lines[i] == offset) { + cctx->intr_lines[i] = 0; break; } } @@ -1310,6 +1316,7 @@ static unsigned chv_gpio_irq_startup(struct irq_data *d) if (irqd_get_trigger_type(d) == IRQ_TYPE_NONE) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); struct chv_pinctrl *pctrl = gpiochip_get_data(gc); + struct intel_community_context *cctx = &pctrl->context.communities[0]; unsigned int pin = irqd_to_hwirq(d); irq_flow_handler_t handler; unsigned long flags; @@ -1326,9 +1333,9 @@ static unsigned chv_gpio_irq_startup(struct irq_data *d) else handler = handle_edge_irq; - if (!pctrl->intr_lines[intsel]) { + if (!cctx->intr_lines[intsel]) { irq_set_handler_locked(d, handler); - pctrl->intr_lines[intsel] = pin; + cctx->intr_lines[intsel] = pin; } raw_spin_unlock_irqrestore(&chv_lock, flags); } @@ -1341,6 +1348,7 @@ static int chv_gpio_irq_type(struct irq_data *d, unsigned int type) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); struct chv_pinctrl *pctrl = gpiochip_get_data(gc); + struct intel_community_context *cctx = &pctrl->context.communities[0]; unsigned int pin = irqd_to_hwirq(d); unsigned long flags; u32 value; @@ -1385,7 +1393,7 @@ static int chv_gpio_irq_type(struct irq_data *d, unsigned int type) value &= CHV_PADCTRL0_INTSEL_MASK; value >>= CHV_PADCTRL0_INTSEL_SHIFT; - pctrl->intr_lines[value] = pin; + cctx->intr_lines[value] = pin; if (type & IRQ_TYPE_EDGE_BOTH) irq_set_handler_locked(d, handle_edge_irq); @@ -1402,6 +1410,7 @@ static void chv_gpio_irq_handler(struct irq_desc *desc) struct gpio_chip *gc = irq_desc_get_handler_data(desc); struct chv_pinctrl *pctrl = gpiochip_get_data(gc); const struct intel_community *community = &pctrl->communities[0]; + struct intel_community_context *cctx = &pctrl->context.communities[0]; struct irq_chip *chip = irq_desc_get_chip(desc); unsigned long pending; unsigned long flags; @@ -1416,7 +1425,7 @@ static void chv_gpio_irq_handler(struct irq_desc *desc) for_each_set_bit(intr_line, &pending, community->nirqs) { unsigned int irq, offset; - offset = pctrl->intr_lines[intr_line]; + offset = cctx->intr_lines[intr_line]; irq = irq_find_mapping(gc->irq.domain, offset); generic_handle_irq(irq); } @@ -1674,6 +1683,12 @@ static int chv_pinctrl_probe(struct platform_device *pdev) return -ENOMEM; #endif + pctrl->context.communities = devm_kcalloc(dev, pctrl->soc->ncommunities, + sizeof(*pctrl->context.communities), + GFP_KERNEL); + if (!pctrl->context.communities) + return -ENOMEM; + irq = platform_get_irq(pdev, 0); if (irq < 0) return irq; @@ -1722,12 +1737,13 @@ static int chv_pinctrl_remove(struct platform_device *pdev) static int chv_pinctrl_suspend_noirq(struct device *dev) { struct chv_pinctrl *pctrl = dev_get_drvdata(dev); + struct intel_community_context *cctx = &pctrl->context.communities[0]; unsigned long flags; int i; raw_spin_lock_irqsave(&chv_lock, flags); - pctrl->saved_intmask = chv_pctrl_readl(pctrl, CHV_INTMASK); + cctx->saved_intmask = chv_pctrl_readl(pctrl, CHV_INTMASK); for (i = 0; i < pctrl->soc->npins; i++) { const struct pinctrl_pin_desc *desc; @@ -1751,6 +1767,7 @@ static int chv_pinctrl_suspend_noirq(struct device *dev) static int chv_pinctrl_resume_noirq(struct device *dev) { struct chv_pinctrl *pctrl = dev_get_drvdata(dev); + struct intel_community_context *cctx = &pctrl->context.communities[0]; unsigned long flags; int i; @@ -1794,7 +1811,7 @@ static int chv_pinctrl_resume_noirq(struct device *dev) * the interrupt mask register as well. */ chv_pctrl_writel(pctrl, CHV_INTSTAT, 0xffff); - chv_pctrl_writel(pctrl, CHV_INTMASK, pctrl->saved_intmask); + chv_pctrl_writel(pctrl, CHV_INTMASK, cctx->saved_intmask); raw_spin_unlock_irqrestore(&chv_lock, flags); From 3ea2e2cabd2dc749d866887a8eaab9fd9536ca0b Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Mon, 27 Jul 2020 19:12:16 +0300 Subject: [PATCH 054/433] pinctrl: cherryview: Switch to use struct intel_pinctrl Now when all preparations are done we may easily switch to use struct intel_pinctrl instead of custom one. Signed-off-by: Andy Shevchenko Acked-by: Mika Westerberg --- drivers/pinctrl/intel/pinctrl-cherryview.c | 104 ++++++++------------- 1 file changed, 39 insertions(+), 65 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-cherryview.c b/drivers/pinctrl/intel/pinctrl-cherryview.c index 6b2fbc0ac422..c18abc1a0d04 100644 --- a/drivers/pinctrl/intel/pinctrl-cherryview.c +++ b/drivers/pinctrl/intel/pinctrl-cherryview.c @@ -82,32 +82,6 @@ struct intel_community_context { u32 saved_intmask; }; -/** - * struct chv_pinctrl - CHV pinctrl private structure - * @dev: Pointer to the parent device - * @pctldesc: Pin controller description - * @pctldev: Pointer to the pin controller device - * @chip: GPIO chip in this pin controller - * @irqchip: IRQ chip in this pin controller - * @soc: Community specific pin configuration data - * @communities: All communities in this pin controller - * @ncommunities: Number of communities in this pin controller - * @context: Configuration saved over system sleep - * @irq: Our parent irq - */ -struct chv_pinctrl { - struct device *dev; - struct pinctrl_desc pctldesc; - struct pinctrl_dev *pctldev; - struct gpio_chip chip; - struct irq_chip irqchip; - const struct intel_pinctrl_soc_data *soc; - struct intel_community *communities; - size_t ncommunities; - struct intel_pinctrl_context context; - int irq; -}; - #define PINMODE_INVERT_OE BIT(15) #define PINMODE(m, i) ((m) | ((i) * PINMODE_INVERT_OE)) @@ -589,14 +563,14 @@ static const struct intel_pinctrl_soc_data *chv_soc_data[] = { */ static DEFINE_RAW_SPINLOCK(chv_lock); -static u32 chv_pctrl_readl(struct chv_pinctrl *pctrl, unsigned int offset) +static u32 chv_pctrl_readl(struct intel_pinctrl *pctrl, unsigned int offset) { const struct intel_community *community = &pctrl->communities[0]; return readl(community->regs + offset); } -static void chv_pctrl_writel(struct chv_pinctrl *pctrl, unsigned int offset, u32 value) +static void chv_pctrl_writel(struct intel_pinctrl *pctrl, unsigned int offset, u32 value) { const struct intel_community *community = &pctrl->communities[0]; void __iomem *reg = community->regs + offset; @@ -606,7 +580,7 @@ static void chv_pctrl_writel(struct chv_pinctrl *pctrl, unsigned int offset, u32 readl(reg); } -static void __iomem *chv_padreg(struct chv_pinctrl *pctrl, unsigned int offset, +static void __iomem *chv_padreg(struct intel_pinctrl *pctrl, unsigned int offset, unsigned int reg) { const struct intel_community *community = &pctrl->communities[0]; @@ -618,12 +592,12 @@ static void __iomem *chv_padreg(struct chv_pinctrl *pctrl, unsigned int offset, return community->pad_regs + offset + reg; } -static u32 chv_readl(struct chv_pinctrl *pctrl, unsigned int pin, unsigned int offset) +static u32 chv_readl(struct intel_pinctrl *pctrl, unsigned int pin, unsigned int offset) { return readl(chv_padreg(pctrl, pin, offset)); } -static void chv_writel(struct chv_pinctrl *pctrl, unsigned int pin, unsigned int offset, u32 value) +static void chv_writel(struct intel_pinctrl *pctrl, unsigned int pin, unsigned int offset, u32 value) { void __iomem *reg = chv_padreg(pctrl, pin, offset); @@ -633,14 +607,14 @@ static void chv_writel(struct chv_pinctrl *pctrl, unsigned int pin, unsigned int } /* When Pad Cfg is locked, driver can only change GPIOTXState or GPIORXState */ -static bool chv_pad_locked(struct chv_pinctrl *pctrl, unsigned int offset) +static bool chv_pad_locked(struct intel_pinctrl *pctrl, unsigned int offset) { return chv_readl(pctrl, offset, CHV_PADCTRL1) & CHV_PADCTRL1_CFGLOCK; } static int chv_get_groups_count(struct pinctrl_dev *pctldev) { - struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); + struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); return pctrl->soc->ngroups; } @@ -648,7 +622,7 @@ static int chv_get_groups_count(struct pinctrl_dev *pctldev) static const char *chv_get_group_name(struct pinctrl_dev *pctldev, unsigned int group) { - struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); + struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); return pctrl->soc->groups[group].name; } @@ -656,7 +630,7 @@ static const char *chv_get_group_name(struct pinctrl_dev *pctldev, static int chv_get_group_pins(struct pinctrl_dev *pctldev, unsigned int group, const unsigned int **pins, unsigned int *npins) { - struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); + struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); *pins = pctrl->soc->groups[group].pins; *npins = pctrl->soc->groups[group].npins; @@ -666,7 +640,7 @@ static int chv_get_group_pins(struct pinctrl_dev *pctldev, unsigned int group, static void chv_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, unsigned int offset) { - struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); + struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); unsigned long flags; u32 ctrl0, ctrl1; bool locked; @@ -705,7 +679,7 @@ static const struct pinctrl_ops chv_pinctrl_ops = { static int chv_get_functions_count(struct pinctrl_dev *pctldev) { - struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); + struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); return pctrl->soc->nfunctions; } @@ -713,7 +687,7 @@ static int chv_get_functions_count(struct pinctrl_dev *pctldev) static const char *chv_get_function_name(struct pinctrl_dev *pctldev, unsigned int function) { - struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); + struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); return pctrl->soc->functions[function].name; } @@ -723,7 +697,7 @@ static int chv_get_function_groups(struct pinctrl_dev *pctldev, const char * const **groups, unsigned int * const ngroups) { - struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); + struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); *groups = pctrl->soc->functions[function].groups; *ngroups = pctrl->soc->functions[function].ngroups; @@ -733,7 +707,7 @@ static int chv_get_function_groups(struct pinctrl_dev *pctldev, static int chv_pinmux_set_mux(struct pinctrl_dev *pctldev, unsigned int function, unsigned int group) { - struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); + struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); const struct intel_pingroup *grp; unsigned long flags; int i; @@ -791,7 +765,7 @@ static int chv_pinmux_set_mux(struct pinctrl_dev *pctldev, return 0; } -static void chv_gpio_clear_triggering(struct chv_pinctrl *pctrl, +static void chv_gpio_clear_triggering(struct intel_pinctrl *pctrl, unsigned int offset) { u32 value; @@ -806,7 +780,7 @@ static int chv_gpio_request_enable(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, unsigned int offset) { - struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); + struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); unsigned long flags; u32 value; @@ -860,7 +834,7 @@ static void chv_gpio_disable_free(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, unsigned int offset) { - struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); + struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); unsigned long flags; raw_spin_lock_irqsave(&chv_lock, flags); @@ -875,7 +849,7 @@ static int chv_gpio_set_direction(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, unsigned int offset, bool input) { - struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); + struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); unsigned long flags; u32 ctrl0; @@ -906,7 +880,7 @@ static const struct pinmux_ops chv_pinmux_ops = { static int chv_config_get(struct pinctrl_dev *pctldev, unsigned int pin, unsigned long *config) { - struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); + struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); enum pin_config_param param = pinconf_to_config_param(*config); unsigned long flags; u32 ctrl0, ctrl1; @@ -983,7 +957,7 @@ static int chv_config_get(struct pinctrl_dev *pctldev, unsigned int pin, return 0; } -static int chv_config_set_pull(struct chv_pinctrl *pctrl, unsigned int pin, +static int chv_config_set_pull(struct intel_pinctrl *pctrl, unsigned int pin, enum pin_config_param param, u32 arg) { unsigned long flags; @@ -1048,7 +1022,7 @@ static int chv_config_set_pull(struct chv_pinctrl *pctrl, unsigned int pin, return 0; } -static int chv_config_set_oden(struct chv_pinctrl *pctrl, unsigned int pin, +static int chv_config_set_oden(struct intel_pinctrl *pctrl, unsigned int pin, bool enable) { unsigned long flags; @@ -1071,7 +1045,7 @@ static int chv_config_set_oden(struct chv_pinctrl *pctrl, unsigned int pin, static int chv_config_set(struct pinctrl_dev *pctldev, unsigned int pin, unsigned long *configs, unsigned int nconfigs) { - struct chv_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); + struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); enum pin_config_param param; int i, ret; u32 arg; @@ -1172,7 +1146,7 @@ static struct pinctrl_desc chv_pinctrl_desc = { static int chv_gpio_get(struct gpio_chip *chip, unsigned int offset) { - struct chv_pinctrl *pctrl = gpiochip_get_data(chip); + struct intel_pinctrl *pctrl = gpiochip_get_data(chip); unsigned long flags; u32 ctrl0, cfg; @@ -1190,7 +1164,7 @@ static int chv_gpio_get(struct gpio_chip *chip, unsigned int offset) static void chv_gpio_set(struct gpio_chip *chip, unsigned int offset, int value) { - struct chv_pinctrl *pctrl = gpiochip_get_data(chip); + struct intel_pinctrl *pctrl = gpiochip_get_data(chip); unsigned long flags; u32 ctrl0; @@ -1210,7 +1184,7 @@ static void chv_gpio_set(struct gpio_chip *chip, unsigned int offset, int value) static int chv_gpio_get_direction(struct gpio_chip *chip, unsigned int offset) { - struct chv_pinctrl *pctrl = gpiochip_get_data(chip); + struct intel_pinctrl *pctrl = gpiochip_get_data(chip); u32 ctrl0, direction; unsigned long flags; @@ -1253,7 +1227,7 @@ static const struct gpio_chip chv_gpio_chip = { static void chv_gpio_irq_ack(struct irq_data *d) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct chv_pinctrl *pctrl = gpiochip_get_data(gc); + struct intel_pinctrl *pctrl = gpiochip_get_data(gc); int pin = irqd_to_hwirq(d); u32 intr_line; @@ -1270,7 +1244,7 @@ static void chv_gpio_irq_ack(struct irq_data *d) static void chv_gpio_irq_mask_unmask(struct irq_data *d, bool mask) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct chv_pinctrl *pctrl = gpiochip_get_data(gc); + struct intel_pinctrl *pctrl = gpiochip_get_data(gc); int pin = irqd_to_hwirq(d); u32 value, intr_line; unsigned long flags; @@ -1315,7 +1289,7 @@ static unsigned chv_gpio_irq_startup(struct irq_data *d) */ if (irqd_get_trigger_type(d) == IRQ_TYPE_NONE) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct chv_pinctrl *pctrl = gpiochip_get_data(gc); + struct intel_pinctrl *pctrl = gpiochip_get_data(gc); struct intel_community_context *cctx = &pctrl->context.communities[0]; unsigned int pin = irqd_to_hwirq(d); irq_flow_handler_t handler; @@ -1347,7 +1321,7 @@ static unsigned chv_gpio_irq_startup(struct irq_data *d) static int chv_gpio_irq_type(struct irq_data *d, unsigned int type) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct chv_pinctrl *pctrl = gpiochip_get_data(gc); + struct intel_pinctrl *pctrl = gpiochip_get_data(gc); struct intel_community_context *cctx = &pctrl->context.communities[0]; unsigned int pin = irqd_to_hwirq(d); unsigned long flags; @@ -1408,7 +1382,7 @@ static int chv_gpio_irq_type(struct irq_data *d, unsigned int type) static void chv_gpio_irq_handler(struct irq_desc *desc) { struct gpio_chip *gc = irq_desc_get_handler_data(desc); - struct chv_pinctrl *pctrl = gpiochip_get_data(gc); + struct intel_pinctrl *pctrl = gpiochip_get_data(gc); const struct intel_community *community = &pctrl->communities[0]; struct intel_community_context *cctx = &pctrl->context.communities[0]; struct irq_chip *chip = irq_desc_get_chip(desc); @@ -1478,7 +1452,7 @@ static void chv_init_irq_valid_mask(struct gpio_chip *chip, unsigned long *valid_mask, unsigned int ngpios) { - struct chv_pinctrl *pctrl = gpiochip_get_data(chip); + struct intel_pinctrl *pctrl = gpiochip_get_data(chip); const struct intel_community *community = &pctrl->communities[0]; int i; @@ -1500,7 +1474,7 @@ static void chv_init_irq_valid_mask(struct gpio_chip *chip, static int chv_gpio_irq_init_hw(struct gpio_chip *chip) { - struct chv_pinctrl *pctrl = gpiochip_get_data(chip); + struct intel_pinctrl *pctrl = gpiochip_get_data(chip); const struct intel_community *community = &pctrl->communities[0]; /* @@ -1526,7 +1500,7 @@ static int chv_gpio_irq_init_hw(struct gpio_chip *chip) static int chv_gpio_add_pin_ranges(struct gpio_chip *chip) { - struct chv_pinctrl *pctrl = gpiochip_get_data(chip); + struct intel_pinctrl *pctrl = gpiochip_get_data(chip); const struct intel_community *community = &pctrl->communities[0]; const struct intel_padgroup *gpp; int ret, i; @@ -1545,7 +1519,7 @@ static int chv_gpio_add_pin_ranges(struct gpio_chip *chip) return 0; } -static int chv_gpio_probe(struct chv_pinctrl *pctrl, int irq) +static int chv_gpio_probe(struct intel_pinctrl *pctrl, int irq) { const struct intel_community *community = &pctrl->communities[0]; const struct intel_padgroup *gpp; @@ -1611,7 +1585,7 @@ static acpi_status chv_pinctrl_mmio_access_handler(u32 function, acpi_physical_address address, u32 bits, u64 *value, void *handler_context, void *region_context) { - struct chv_pinctrl *pctrl = region_context; + struct intel_pinctrl *pctrl = region_context; unsigned long flags; acpi_status ret = AE_OK; @@ -1635,7 +1609,7 @@ static int chv_pinctrl_probe(struct platform_device *pdev) const struct intel_pinctrl_soc_data **soc_table; struct intel_community *community; struct device *dev = &pdev->dev; - struct chv_pinctrl *pctrl; + struct intel_pinctrl *pctrl; struct acpi_device *adev; acpi_status status; int ret, irq, i; @@ -1723,7 +1697,7 @@ static int chv_pinctrl_probe(struct platform_device *pdev) static int chv_pinctrl_remove(struct platform_device *pdev) { - struct chv_pinctrl *pctrl = platform_get_drvdata(pdev); + struct intel_pinctrl *pctrl = platform_get_drvdata(pdev); const struct intel_community *community = &pctrl->communities[0]; acpi_remove_address_space_handler(ACPI_COMPANION(&pdev->dev), @@ -1736,7 +1710,7 @@ static int chv_pinctrl_remove(struct platform_device *pdev) #ifdef CONFIG_PM_SLEEP static int chv_pinctrl_suspend_noirq(struct device *dev) { - struct chv_pinctrl *pctrl = dev_get_drvdata(dev); + struct intel_pinctrl *pctrl = dev_get_drvdata(dev); struct intel_community_context *cctx = &pctrl->context.communities[0]; unsigned long flags; int i; @@ -1766,7 +1740,7 @@ static int chv_pinctrl_suspend_noirq(struct device *dev) static int chv_pinctrl_resume_noirq(struct device *dev) { - struct chv_pinctrl *pctrl = dev_get_drvdata(dev); + struct intel_pinctrl *pctrl = dev_get_drvdata(dev); struct intel_community_context *cctx = &pctrl->context.communities[0]; unsigned long flags; int i; From 359164fa730c45641ec597f48ab33c03d955e824 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Wed, 29 Jul 2020 15:02:30 +0300 Subject: [PATCH 055/433] pinctrl: cherryview: Utilize temporary variable to hold device pointer By one of the previous clean up change we got a temporary variable to hold a device pointer. It can be utilized in other calls in the ->probe() and save a bit of LOCs. Signed-off-by: Andy Shevchenko Acked-by: Mika Westerberg --- drivers/pinctrl/intel/pinctrl-cherryview.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-cherryview.c b/drivers/pinctrl/intel/pinctrl-cherryview.c index c18abc1a0d04..86e954df82d6 100644 --- a/drivers/pinctrl/intel/pinctrl-cherryview.c +++ b/drivers/pinctrl/intel/pinctrl-cherryview.c @@ -1632,7 +1632,7 @@ static int chv_pinctrl_probe(struct platform_device *pdev) if (!pctrl) return -ENOMEM; - pctrl->dev = &pdev->dev; + pctrl->dev = dev; pctrl->soc = soc_data; pctrl->ncommunities = pctrl->soc->ncommunities; @@ -1668,14 +1668,13 @@ static int chv_pinctrl_probe(struct platform_device *pdev) return irq; pctrl->pctldesc = chv_pinctrl_desc; - pctrl->pctldesc.name = dev_name(&pdev->dev); + pctrl->pctldesc.name = dev_name(dev); pctrl->pctldesc.pins = pctrl->soc->pins; pctrl->pctldesc.npins = pctrl->soc->npins; - pctrl->pctldev = devm_pinctrl_register(&pdev->dev, &pctrl->pctldesc, - pctrl); + pctrl->pctldev = devm_pinctrl_register(dev, &pctrl->pctldesc, pctrl); if (IS_ERR(pctrl->pctldev)) { - dev_err(&pdev->dev, "failed to register pinctrl driver\n"); + dev_err(dev, "failed to register pinctrl driver\n"); return PTR_ERR(pctrl->pctldev); } @@ -1688,7 +1687,7 @@ static int chv_pinctrl_probe(struct platform_device *pdev) chv_pinctrl_mmio_access_handler, NULL, pctrl); if (ACPI_FAILURE(status)) - dev_err(&pdev->dev, "failed to install ACPI addr space handler\n"); + dev_err(dev, "failed to install ACPI addr space handler\n"); platform_set_drvdata(pdev, pctrl); From 465ddff7e4867fcb65e27fa7ff4d0bb0999e4500 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Tue, 4 Aug 2020 16:48:07 +0300 Subject: [PATCH 056/433] serial: sa1100: use platform_get_resource() Use platform_get_resource() to fetch the memory resource instead of open-coded variant. While here, fail the probe if no resource found or no port is added. Signed-off-by: Andy Shevchenko Link: https://lore.kernel.org/r/20200804134807.11589-1-andriy.shevchenko@linux.intel.com Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/sa1100.c | 22 ++++++++++------------ 1 file changed, 10 insertions(+), 12 deletions(-) diff --git a/drivers/tty/serial/sa1100.c b/drivers/tty/serial/sa1100.c index 75c2a22895f9..f5fab1dd96bc 100644 --- a/drivers/tty/serial/sa1100.c +++ b/drivers/tty/serial/sa1100.c @@ -879,22 +879,20 @@ static int sa1100_serial_add_one_port(struct sa1100_port *sport, struct platform static int sa1100_serial_probe(struct platform_device *dev) { - struct resource *res = dev->resource; + struct resource *res; int i; - for (i = 0; i < dev->num_resources; i++, res++) - if (res->flags & IORESOURCE_MEM) - break; + res = platform_get_resource(dev, IORESOURCE_MEM, 0); + if (!res) + return -EINVAL; - if (i < dev->num_resources) { - for (i = 0; i < NR_PORTS; i++) { - if (sa1100_ports[i].port.mapbase != res->start) - continue; - - sa1100_serial_add_one_port(&sa1100_ports[i], dev); + for (i = 0; i < NR_PORTS; i++) + if (sa1100_ports[i].port.mapbase == res->start) break; - } - } + if (i == NR_PORTS) + return -ENODEV; + + sa1100_serial_add_one_port(&sa1100_ports[i], dev); return 0; } From ff360d62d9fe02081431412e05950a23f71ec98a Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Wed, 29 Jul 2020 14:57:06 +0300 Subject: [PATCH 057/433] pinctrl: intel: Extract intel_pinctrl_get_soc_data() helper for wider use intel_pinctrl_get_soc_data() helper can be used in few driver instead of open-coded variants. Thus, extract it as a standalone API. Signed-off-by: Andy Shevchenko Acked-by: Mika Westerberg --- drivers/pinctrl/intel/pinctrl-intel.c | 24 ++++++++++++++++++------ drivers/pinctrl/intel/pinctrl-intel.h | 2 ++ 2 files changed, 20 insertions(+), 6 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c index b64997b303e0..154ce3f908cd 100644 --- a/drivers/pinctrl/intel/pinctrl-intel.c +++ b/drivers/pinctrl/intel/pinctrl-intel.c @@ -1414,9 +1414,6 @@ static int intel_pinctrl_probe(struct platform_device *pdev, struct intel_pinctrl *pctrl; int i, ret, irq; - if (!soc_data) - return -EINVAL; - pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL); if (!pctrl) return -ENOMEM; @@ -1505,11 +1502,26 @@ int intel_pinctrl_probe_by_hid(struct platform_device *pdev) const struct intel_pinctrl_soc_data *data; data = device_get_match_data(&pdev->dev); + if (!data) + return -ENODATA; + return intel_pinctrl_probe(pdev, data); } EXPORT_SYMBOL_GPL(intel_pinctrl_probe_by_hid); int intel_pinctrl_probe_by_uid(struct platform_device *pdev) +{ + const struct intel_pinctrl_soc_data *data; + + data = intel_pinctrl_get_soc_data(pdev); + if (IS_ERR(data)) + return PTR_ERR(data); + + return intel_pinctrl_probe(pdev, data); +} +EXPORT_SYMBOL_GPL(intel_pinctrl_probe_by_uid); + +const struct intel_pinctrl_soc_data *intel_pinctrl_get_soc_data(struct platform_device *pdev) { const struct intel_pinctrl_soc_data *data = NULL; const struct intel_pinctrl_soc_data **table; @@ -1532,15 +1544,15 @@ int intel_pinctrl_probe_by_uid(struct platform_device *pdev) id = platform_get_device_id(pdev); if (!id) - return -ENODEV; + return ERR_PTR(-ENODEV); table = (const struct intel_pinctrl_soc_data **)id->driver_data; data = table[pdev->id]; } - return intel_pinctrl_probe(pdev, data); + return data ?: ERR_PTR(-ENODATA); } -EXPORT_SYMBOL_GPL(intel_pinctrl_probe_by_uid); +EXPORT_SYMBOL_GPL(intel_pinctrl_get_soc_data); #ifdef CONFIG_PM_SLEEP static bool intel_pinctrl_should_save(struct intel_pinctrl *pctrl, unsigned int pin) diff --git a/drivers/pinctrl/intel/pinctrl-intel.h b/drivers/pinctrl/intel/pinctrl-intel.h index 4e17308d33e9..3b0564ae9b15 100644 --- a/drivers/pinctrl/intel/pinctrl-intel.h +++ b/drivers/pinctrl/intel/pinctrl-intel.h @@ -194,6 +194,8 @@ struct intel_pinctrl_soc_data { size_t ncommunities; }; +const struct intel_pinctrl_soc_data *intel_pinctrl_get_soc_data(struct platform_device *pdev); + struct intel_pad_context; struct intel_community_context; From 28726bac1aa7aa3d453fa1617d6b1503152e4767 Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Tue, 18 Aug 2020 11:34:41 +0800 Subject: [PATCH 058/433] dt-bindings: clock: Update i.MX28 example Update the i.MX28 clock example to align with MXS AUART binding doc to avoid below build error: Documentation/devicetree/bindings/clock/imx28-clock.example.dt.yaml: serial@8006a000: clocks: [[4294967295, 45]] is too short Documentation/devicetree/bindings/clock/imx28-clock.example.dt.yaml: serial@8006a000: compatible: Additional items are not allowed ('fsl,imx23-auart' was unexpected) Documentation/devicetree/bindings/clock/imx28-clock.example.dt.yaml: serial@8006a000: compatible: ['fsl,imx28-auart', 'fsl,imx23-auart'] is too long Documentation/devicetree/bindings/clock/imx28-clock.example.dt.yaml: serial@8006a000: 'dmas' is a required property Documentation/devicetree/bindings/clock/imx28-clock.example.dt.yaml: serial@8006a000: 'dma-names' is a required property Signed-off-by: Anson Huang Link: https://lore.kernel.org/r/1597721685-9280-1-git-send-email-Anson.Huang@nxp.com Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/clock/imx28-clock.yaml | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/imx28-clock.yaml b/Documentation/devicetree/bindings/clock/imx28-clock.yaml index 72328d5ca09a..671b2790546b 100644 --- a/Documentation/devicetree/bindings/clock/imx28-clock.yaml +++ b/Documentation/devicetree/bindings/clock/imx28-clock.yaml @@ -108,8 +108,10 @@ examples: }; serial@8006a000 { - compatible = "fsl,imx28-auart", "fsl,imx23-auart"; + compatible = "fsl,imx28-auart"; reg = <0x8006a000 0x2000>; - interrupts = <112 70 71>; + interrupts = <112>; + dmas = <&dma_apbx 8>, <&dma_apbx 9>; + dma-names = "rx", "tx"; clocks = <&clks 45>; }; From d74671b6a9a1b09e7a2f568dce35afc746ff9603 Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Tue, 18 Aug 2020 11:34:42 +0800 Subject: [PATCH 059/433] dt-bindings: clock: Update i.MX23 example Update the i.MX23 clock example to align with MXS AUART binding doc to avoid below build error: Documentation/devicetree/bindings/clock/imx23-clock.example.dt.yaml: serial@8006c000: clocks: [[4294967295, 32]] is too short Documentation/devicetree/bindings/clock/imx23-clock.example.dt.yaml: serial@8006c000: 'dmas' is a required property Documentation/devicetree/bindings/clock/imx23-clock.example.dt.yaml: serial@8006c000: 'dma-names' is a required property Signed-off-by: Anson Huang Link: https://lore.kernel.org/r/1597721685-9280-2-git-send-email-Anson.Huang@nxp.com Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/clock/imx23-clock.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/clock/imx23-clock.yaml b/Documentation/devicetree/bindings/clock/imx23-clock.yaml index 66cb238a1040..4028c1f428f9 100644 --- a/Documentation/devicetree/bindings/clock/imx23-clock.yaml +++ b/Documentation/devicetree/bindings/clock/imx23-clock.yaml @@ -87,6 +87,8 @@ examples: serial@8006c000 { compatible = "fsl,imx23-auart"; reg = <0x8006c000 0x2000>; - interrupts = <24 25 23>; + interrupts = <24>; clocks = <&clks 32>; + dmas = <&dma_apbx 6>, <&dma_apbx 7>; + dma-names = "rx", "tx"; }; From ebd35674aee6d9147e6744748cb33ce0ce244895 Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Tue, 18 Aug 2020 11:34:43 +0800 Subject: [PATCH 060/433] dt-bindings: serial: Convert i.MX uart to json-schema Convert the i.MX uart binding to DT schema format using json-schema. Signed-off-by: Anson Huang Link: https://lore.kernel.org/r/1597721685-9280-3-git-send-email-Anson.Huang@nxp.com Signed-off-by: Rob Herring --- .../bindings/serial/fsl-imx-uart.txt | 40 -------- .../bindings/serial/fsl-imx-uart.yaml | 92 +++++++++++++++++++ 2 files changed, 92 insertions(+), 40 deletions(-) delete mode 100644 Documentation/devicetree/bindings/serial/fsl-imx-uart.txt create mode 100644 Documentation/devicetree/bindings/serial/fsl-imx-uart.yaml diff --git a/Documentation/devicetree/bindings/serial/fsl-imx-uart.txt b/Documentation/devicetree/bindings/serial/fsl-imx-uart.txt deleted file mode 100644 index 9582fc2279ed..000000000000 --- a/Documentation/devicetree/bindings/serial/fsl-imx-uart.txt +++ /dev/null @@ -1,40 +0,0 @@ -* Freescale i.MX Universal Asynchronous Receiver/Transmitter (UART) - -Required properties: -- compatible : Should be "fsl,-uart" -- reg : Address and length of the register set for the device -- interrupts : Should contain uart interrupt - -Optional properties: -- fsl,dte-mode : Indicate the uart works in DTE mode. The uart works - in DCE mode by default. -- fsl,inverted-tx , fsl,inverted-rx : Indicate that the hardware attached - to the peripheral inverts the signal transmitted or received, - respectively, and that the peripheral should invert its output/input - using the INVT/INVR registers. -- rs485-rts-delay, rs485-rts-active-low, rs485-rx-during-tx, - linux,rs485-enabled-at-boot-time: see rs485.txt. Note that for RS485 - you must enable either the "uart-has-rtscts" or the "rts-gpios" - properties. In case you use "uart-has-rtscts" the signal that controls - the transceiver is actually CTS_B, not RTS_B. CTS_B is always output, - and RTS_B is input, regardless of dte-mode. - -Please check Documentation/devicetree/bindings/serial/serial.yaml -for the complete list of generic properties. - -Note: Each uart controller should have an alias correctly numbered -in "aliases" node. - -Example: - -aliases { - serial0 = &uart1; -}; - -uart1: serial@73fbc000 { - compatible = "fsl,imx51-uart", "fsl,imx21-uart"; - reg = <0x73fbc000 0x4000>; - interrupts = <31>; - uart-has-rtscts; - fsl,dte-mode; -}; diff --git a/Documentation/devicetree/bindings/serial/fsl-imx-uart.yaml b/Documentation/devicetree/bindings/serial/fsl-imx-uart.yaml new file mode 100644 index 000000000000..cba3f83ccd5f --- /dev/null +++ b/Documentation/devicetree/bindings/serial/fsl-imx-uart.yaml @@ -0,0 +1,92 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/serial/fsl-imx-uart.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX Universal Asynchronous Receiver/Transmitter (UART) + +maintainers: + - Fabio Estevam + +allOf: + - $ref: "serial.yaml" + - $ref: "rs485.yaml" + +properties: + compatible: + oneOf: + - const: fsl,imx1-uart + - const: fsl,imx21-uart + - const: fsl,imx53-uart + - const: fsl,imx6q-uart + - items: + - enum: + - fsl,imx25-uart + - fsl,imx27-uart + - fsl,imx31-uart + - fsl,imx35-uart + - fsl,imx50-uart + - fsl,imx51-uart + - const: fsl,imx21-uart + - items: + - enum: + - fsl,imx6sl-uart + - fsl,imx6sll-uart + - fsl,imx6sx-uart + - fsl,imx6ul-uart + - fsl,imx7d-uart + - const: fsl,imx6q-uart + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + fsl,dte-mode: + $ref: /schemas/types.yaml#/definitions/flag + description: | + Indicate the uart works in DTE mode. The uart works in DCE mode by default. + + fsl,inverted-tx: + $ref: /schemas/types.yaml#/definitions/flag + description: | + Indicate that the hardware attached to the peripheral inverts the signal + transmitted, and that the peripheral should invert its output using the + INVT registers. + + fsl,inverted-rx: + $ref: /schemas/types.yaml#/definitions/flag + description: | + Indicate that the hardware attached to the peripheral inverts the signal + received, and that the peripheral should invert its input using the + INVR registers. + + uart-has-rtscts: true + + rs485-rts-delay: true + rs485-rts-active-low: true + rs485-rx-during-tx: true + linux,rs485-enabled-at-boot-time: true + +required: + - compatible + - reg + - interrupts + +unevaluatedProperties: false + +examples: + - | + aliases { + serial0 = &uart1; + }; + + uart1: serial@73fbc000 { + compatible = "fsl,imx51-uart", "fsl,imx21-uart"; + reg = <0x73fbc000 0x4000>; + interrupts = <31>; + uart-has-rtscts; + fsl,dte-mode; + }; From 66f669d6fc885d73eeb3aa60d355a14ac0dbcc58 Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Tue, 18 Aug 2020 11:34:44 +0800 Subject: [PATCH 061/433] dt-bindings: serial: Convert MXS auart to json-schema Convert the MXS auart binding to DT schema format using json-schema. Signed-off-by: Anson Huang Link: https://lore.kernel.org/r/1597721685-9280-4-git-send-email-Anson.Huang@nxp.com Signed-off-by: Rob Herring --- .../bindings/serial/fsl-mxs-auart.txt | 53 ----------- .../bindings/serial/fsl-mxs-auart.yaml | 91 +++++++++++++++++++ 2 files changed, 91 insertions(+), 53 deletions(-) delete mode 100644 Documentation/devicetree/bindings/serial/fsl-mxs-auart.txt create mode 100644 Documentation/devicetree/bindings/serial/fsl-mxs-auart.yaml diff --git a/Documentation/devicetree/bindings/serial/fsl-mxs-auart.txt b/Documentation/devicetree/bindings/serial/fsl-mxs-auart.txt deleted file mode 100644 index 5c96d41899f1..000000000000 --- a/Documentation/devicetree/bindings/serial/fsl-mxs-auart.txt +++ /dev/null @@ -1,53 +0,0 @@ -* Freescale MXS Application UART (AUART) - -Required properties for all SoCs: -- compatible : Should be one of fallowing variants: - "fsl,imx23-auart" - Freescale i.MX23 - "fsl,imx28-auart" - Freescale i.MX28 - "alphascale,asm9260-auart" - Alphascale ASM9260 -- reg : Address and length of the register set for the device -- interrupts : Should contain the auart interrupt numbers -- dmas: DMA specifier, consisting of a phandle to DMA controller node - and AUART DMA channel ID. - Refer to dma.txt and fsl-mxs-dma.txt for details. -- dma-names: "rx" for RX channel, "tx" for TX channel. - -Required properties for "alphascale,asm9260-auart": -- clocks : the clocks feeding the watchdog timer. See clock-bindings.txt -- clock-names : should be set to - "mod" - source for tick counter. - "ahb" - ahb gate. - -Optional properties: -- uart-has-rtscts : Indicate the UART has RTS and CTS lines - for hardware flow control, - it also means you enable the DMA support for this UART. -- {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD - line respectively. It will use specified PIO instead of the peripheral - function pin for the USART feature. - If unsure, don't specify this property. - -Example: -auart0: serial@8006a000 { - compatible = "fsl,imx28-auart", "fsl,imx23-auart"; - reg = <0x8006a000 0x2000>; - interrupts = <112>; - dmas = <&dma_apbx 8>, <&dma_apbx 9>; - dma-names = "rx", "tx"; - cts-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; - dsr-gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; - dcd-gpios = <&gpio1 17 GPIO_ACTIVE_LOW>; -}; - -Note: Each auart port should have an alias correctly numbered in "aliases" -node. - -Example: - -aliases { - serial0 = &auart0; - serial1 = &auart1; - serial2 = &auart2; - serial3 = &auart3; - serial4 = &auart4; -}; diff --git a/Documentation/devicetree/bindings/serial/fsl-mxs-auart.yaml b/Documentation/devicetree/bindings/serial/fsl-mxs-auart.yaml new file mode 100644 index 000000000000..ce1d89496342 --- /dev/null +++ b/Documentation/devicetree/bindings/serial/fsl-mxs-auart.yaml @@ -0,0 +1,91 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/serial/fsl-mxs-auart.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale MXS Application UART (AUART) + +maintainers: + - Fabio Estevam + +allOf: + - $ref: "serial.yaml" + +properties: + compatible: + enum: + - fsl,imx23-auart + - fsl,imx28-auart + - alphascale,asm9260-auart + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + dmas: + items: + - description: DMA controller phandle and request line for RX + - description: DMA controller phandle and request line for TX + + dma-names: + items: + - const: rx + - const: tx + + clocks: + items: + - description: mod clock + - description: ahb clock + minItems: 1 + + clock-names: + items: + - const: mod + - const: ahb + minItems: 1 + + uart-has-rtscts: true + rts-gpios: true + cts-gpios: true + dtr-gpios: true + dsr-gpios: true + rng-gpios: true + dcd-gpios: true + +if: + properties: + compatible: + contains: + enum: + - alphascale,asm9260-auart +then: + required: + - clocks + - clock-names + +required: + - compatible + - reg + - interrupts + - dmas + - dma-names + +unevaluatedProperties: false + +examples: + - | + aliases { + serial0 = &auart0; + }; + + auart0: serial@8006a000 { + compatible = "fsl,imx28-auart"; + reg = <0x8006a000 0x2000>; + interrupts = <112>; + dmas = <&dma_apbx 8>, <&dma_apbx 9>; + dma-names = "rx", "tx"; + clocks = <&clks 45>; + }; From 178984d85609742c9510cc0dedc1764872852772 Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Tue, 18 Aug 2020 11:34:45 +0800 Subject: [PATCH 062/433] dt-bindings: serial: Convert NXP lpuart to json-schema Convert the NXP lpuart binding to DT schema format using json-schema. Signed-off-by: Anson Huang Link: https://lore.kernel.org/r/1597721685-9280-5-git-send-email-Anson.Huang@nxp.com Signed-off-by: Rob Herring --- .../devicetree/bindings/serial/fsl-lpuart.txt | 43 ---------- .../bindings/serial/fsl-lpuart.yaml | 79 +++++++++++++++++++ 2 files changed, 79 insertions(+), 43 deletions(-) delete mode 100644 Documentation/devicetree/bindings/serial/fsl-lpuart.txt create mode 100644 Documentation/devicetree/bindings/serial/fsl-lpuart.yaml diff --git a/Documentation/devicetree/bindings/serial/fsl-lpuart.txt b/Documentation/devicetree/bindings/serial/fsl-lpuart.txt deleted file mode 100644 index e7448b92dd9d..000000000000 --- a/Documentation/devicetree/bindings/serial/fsl-lpuart.txt +++ /dev/null @@ -1,43 +0,0 @@ -* Freescale low power universal asynchronous receiver/transmitter (lpuart) - -Required properties: -- compatible : - - "fsl,vf610-lpuart" for lpuart compatible with the one integrated - on Vybrid vf610 SoC with 8-bit register organization - - "fsl,ls1021a-lpuart" for lpuart compatible with the one integrated - on LS1021A SoC with 32-bit big-endian register organization - - "fsl,ls1028a-lpuart" for lpuart compatible with the one integrated - on LS1028A SoC with 32-bit little-endian register organization - - "fsl,imx7ulp-lpuart" for lpuart compatible with the one integrated - on i.MX7ULP SoC with 32-bit little-endian register organization - - "fsl,imx8qxp-lpuart" for lpuart compatible with the one integrated - on i.MX8QXP SoC with 32-bit little-endian register organization - - "fsl,imx8qm-lpuart" for lpuart compatible with the one integrated - on i.MX8QM SoC with 32-bit little-endian register organization -- reg : Address and length of the register set for the device -- interrupts : Should contain uart interrupt -- clocks : phandle + clock specifier pairs, one for each entry in clock-names -- clock-names : For vf610/ls1021a/ls1028a/imx7ulp, "ipg" clock is for uart - bus/baud clock. For imx8qxp lpuart, "ipg" clock is bus clock that is used - to access lpuart controller registers, it also requires "baud" clock for - module to receive/transmit data. - -Optional properties: -- dmas: A list of two dma specifiers, one for each entry in dma-names. -- dma-names: should contain "tx" and "rx". -- rs485-rts-active-low, linux,rs485-enabled-at-boot-time: see rs485.txt - -Note: Optional properties for DMA support. Write them both or both not. - -Example: - -uart0: serial@40027000 { - compatible = "fsl,vf610-lpuart"; - reg = <0x40027000 0x1000>; - interrupts = <0 61 0x00>; - clocks = <&clks VF610_CLK_UART0>; - clock-names = "ipg"; - dmas = <&edma0 0 2>, - <&edma0 0 3>; - dma-names = "rx","tx"; - }; diff --git a/Documentation/devicetree/bindings/serial/fsl-lpuart.yaml b/Documentation/devicetree/bindings/serial/fsl-lpuart.yaml new file mode 100644 index 000000000000..e82c2cf9fef7 --- /dev/null +++ b/Documentation/devicetree/bindings/serial/fsl-lpuart.yaml @@ -0,0 +1,79 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/serial/fsl-lpuart.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale low power universal asynchronous receiver/transmitter (lpuart) + +maintainers: + - Fugang Duan + +allOf: + - $ref: "rs485.yaml" + +properties: + compatible: + enum: + - fsl,vf610-lpuart + - fsl,ls1021a-lpuart + - fsl,ls1028a-lpuart + - fsl,imx7ulp-lpuart + - fsl,imx8qxp-lpuart + - fsl,imx8qm-lpuart + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: ipg clock + - description: baud clock + minItems: 1 + maxItems: 2 + + clock-names: + items: + - const: ipg + - const: baud + minItems: 1 + maxItems: 2 + + dmas: + items: + - description: DMA controller phandle and request line for RX + - description: DMA controller phandle and request line for TX + + dma-names: + items: + - const: rx + - const: tx + + rs485-rts-active-low: true + linux,rs485-enabled-at-boot-time: true + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +unevaluatedProperties: false + +examples: + - | + #include + + serial@40027000 { + compatible = "fsl,vf610-lpuart"; + reg = <0x40027000 0x1000>; + interrupts = <0 61 0x00>; + clocks = <&clks VF610_CLK_UART0>; + clock-names = "ipg"; + dmas = <&edma0 0 2>, <&edma0 0 3>; + dma-names = "rx","tx"; + }; From a7de3bcb330bfef8db1d4027da8eb3616ae20fe4 Mon Sep 17 00:00:00 2001 From: Seiya Wang Date: Fri, 14 Aug 2020 14:04:53 +0800 Subject: [PATCH 063/433] dt-bindings: serial: Add compatible for Mediatek MT8192 This commit adds dt-binding documentation of uart for Mediatek MT8192 SoC Platform. Acked-by: Rob Herring Signed-off-by: Seiya Wang Link: https://lore.kernel.org/r/20200814060454.32200-3-seiya.wang@mediatek.com Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/serial/mtk-uart.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/serial/mtk-uart.txt b/Documentation/devicetree/bindings/serial/mtk-uart.txt index 3a3b57079f0d..647b5aee86f3 100644 --- a/Documentation/devicetree/bindings/serial/mtk-uart.txt +++ b/Documentation/devicetree/bindings/serial/mtk-uart.txt @@ -19,6 +19,7 @@ Required properties: * "mediatek,mt8135-uart" for MT8135 compatible UARTS * "mediatek,mt8173-uart" for MT8173 compatible UARTS * "mediatek,mt8183-uart", "mediatek,mt6577-uart" for MT8183 compatible UARTS + * "mediatek,mt8192-uart", "mediatek,mt6577-uart" for MT8192 compatible UARTS * "mediatek,mt8516-uart" for MT8516 compatible UARTS * "mediatek,mt6577-uart" for MT6577 and all of the above From 377c0d7ea5bb93251e71559c115d2f94650c00d6 Mon Sep 17 00:00:00 2001 From: Seiya Wang Date: Fri, 14 Aug 2020 14:04:54 +0800 Subject: [PATCH 064/433] dt-bindings: timer: Add compatible for Mediatek MT8192 This commit adds dt-binding documentation of timer for Mediatek MT8192 SoC Platform. Acked-by: Rob Herring Signed-off-by: Seiya Wang Link: https://lore.kernel.org/r/20200814060454.32200-4-seiya.wang@mediatek.com Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt b/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt index 0d256486f886..690a9c0966ac 100644 --- a/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt +++ b/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt @@ -22,6 +22,7 @@ Required properties: For those SoCs that use SYST * "mediatek,mt8183-timer" for MT8183 compatible timers (SYST) + * "mediatek,mt8192-timer" for MT8192 compatible timers (SYST) * "mediatek,mt7629-timer" for MT7629 compatible timers (SYST) * "mediatek,mt6765-timer" for MT6765 and all above compatible timers (SYST) From 4036707c7c61a0fec7774aec44bbb7350153e8c2 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 19 Aug 2020 14:47:09 +0200 Subject: [PATCH 065/433] scripts/dtc: dtx_diff - make help text formatting consistent None of the help texts use capitalization, except the one for the -T option. Drop the capitalization for consistency. Split the single long line that doesn't fit in 80 characters. Reviewed-by: Frank Rowand Signed-off-by: Geert Uytterhoeven Signed-off-by: Rob Herring Link: https://lore.kernel.org/r/20200819124709.20401-1-geert+renesas@glider.be --- scripts/dtc/dtx_diff | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/scripts/dtc/dtx_diff b/scripts/dtc/dtx_diff index 541c432e7d19..d3422ee15e30 100755 --- a/scripts/dtc/dtx_diff +++ b/scripts/dtc/dtx_diff @@ -29,7 +29,8 @@ Usage: -s SRCTREE linux kernel source tree is at path SRCTREE (default is current directory) -S linux kernel source tree is at root of current git repo - -T Annotate output .dts with input source file and line (-T -T for more details) + -T annotate output .dts with input source file and line + (-T -T for more details) -u unsorted, do not sort DTx From 3e6ae2438d8beb3f590576491b758ad4c65f630f Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Thu, 13 Aug 2020 13:34:14 -0600 Subject: [PATCH 066/433] dt-bindings: Bump minimum version of dtschema to 2020.8.1 dtschema release 2020.8.1 gained several additions to help performance. dt-doc-validate can now take a list of files and directories, and dt-mk-schema can store the processed schema in JSON which is much faster to parse than YAML. Utilizing both of these changes results in a 3-4x speed improvement in running dt_binding_check. There's also additional meta-schema checks which binding schemas should be checked against. Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/Makefile b/Documentation/devicetree/bindings/Makefile index 91c4d00e96d3..31f08cdab487 100644 --- a/Documentation/devicetree/bindings/Makefile +++ b/Documentation/devicetree/bindings/Makefile @@ -3,7 +3,7 @@ DT_DOC_CHECKER ?= dt-doc-validate DT_EXTRACT_EX ?= dt-extract-example DT_MK_SCHEMA ?= dt-mk-schema -DT_SCHEMA_MIN_VERSION = 2020.5 +DT_SCHEMA_MIN_VERSION = 2020.8.1 PHONY += check_dtschema_version check_dtschema_version: From b8a49399fb7abd4ec402bea1fec5a974053591b6 Mon Sep 17 00:00:00 2001 From: Andrei Ziureaev Date: Thu, 13 Aug 2020 14:26:11 +0100 Subject: [PATCH 067/433] dt-bindings: Use json for processed-schema* Change the format of processed-schema* from yaml to json to speed up validation. With json output, using xargs and appending the output won't work since json has explicit list begin and end characters. Instead, we pass the schema files as a list in a temp file. The parsing time for the processed schema goes down from ~2sec to 70ms. Also, 'make dtbs_check' becomes 33% faster. Some error messages are affected by this change. For example, "True was expected" becomes "... is not of type 'boolean'". The order of messages is also changed. Signed-off-by: Andrei Ziureaev Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/.gitignore | 1 + Documentation/devicetree/bindings/Makefile | 25 ++++++++++---------- scripts/Makefile.lib | 2 +- 3 files changed, 15 insertions(+), 13 deletions(-) diff --git a/Documentation/devicetree/bindings/.gitignore b/Documentation/devicetree/bindings/.gitignore index 5c6d8ea1a09c..3a05b99bfa26 100644 --- a/Documentation/devicetree/bindings/.gitignore +++ b/Documentation/devicetree/bindings/.gitignore @@ -1,3 +1,4 @@ # SPDX-License-Identifier: GPL-2.0-only *.example.dts processed-schema*.yaml +processed-schema*.json diff --git a/Documentation/devicetree/bindings/Makefile b/Documentation/devicetree/bindings/Makefile index 31f08cdab487..8da8847689f6 100644 --- a/Documentation/devicetree/bindings/Makefile +++ b/Documentation/devicetree/bindings/Makefile @@ -19,18 +19,19 @@ $(obj)/%.example.dts: $(src)/%.yaml check_dtschema_version FORCE $(call if_changed,chk_binding) # Use full schemas when checking %.example.dts -DT_TMP_SCHEMA := $(obj)/processed-schema-examples.yaml +DT_TMP_SCHEMA := $(obj)/processed-schema-examples.json find_cmd = find $(srctree)/$(src) \( -name '*.yaml' ! \ -name 'processed-schema*' ! \ -name '*.example.dt.yaml' \) quiet_cmd_mk_schema = SCHEMA $@ - cmd_mk_schema = rm -f $@ ; \ + cmd_mk_schema = f=$$(mktemp) ; \ $(if $(DT_MK_SCHEMA_FLAGS), \ echo $(real-prereqs), \ - $(find_cmd)) | \ - xargs $(DT_MK_SCHEMA) $(DT_MK_SCHEMA_FLAGS) >> $@ + $(find_cmd)) > $$f ; \ + $(DT_MK_SCHEMA) -j $(DT_MK_SCHEMA_FLAGS) @$$f > $@ ; \ + rm -f $$f DT_DOCS = $(shell $(find_cmd) | sed -e 's|^$(srctree)/||') @@ -39,33 +40,33 @@ override DTC_FLAGS := \ -Wno-graph_child_address \ -Wno-interrupt_provider -$(obj)/processed-schema-examples.yaml: $(DT_DOCS) check_dtschema_version FORCE +$(obj)/processed-schema-examples.json: $(DT_DOCS) check_dtschema_version FORCE $(call if_changed,mk_schema) ifeq ($(DT_SCHEMA_FILES),) # Unless DT_SCHEMA_FILES is specified, use the full schema for dtbs_check too. -# Just copy processed-schema-examples.yaml +# Just copy processed-schema-examples.json -$(obj)/processed-schema.yaml: $(obj)/processed-schema-examples.yaml FORCE +$(obj)/processed-schema.json: $(obj)/processed-schema-examples.json FORCE $(call if_changed,copy) DT_SCHEMA_FILES = $(DT_DOCS) else -# If DT_SCHEMA_FILES is specified, use it for processed-schema.yaml +# If DT_SCHEMA_FILES is specified, use it for processed-schema.json -$(obj)/processed-schema.yaml: DT_MK_SCHEMA_FLAGS := -u -$(obj)/processed-schema.yaml: $(DT_SCHEMA_FILES) check_dtschema_version FORCE +$(obj)/processed-schema.json: DT_MK_SCHEMA_FLAGS := -u +$(obj)/processed-schema.json: $(DT_SCHEMA_FILES) check_dtschema_version FORCE $(call if_changed,mk_schema) endif extra-$(CHECK_DT_BINDING) += $(patsubst $(src)/%.yaml,%.example.dts, $(DT_SCHEMA_FILES)) extra-$(CHECK_DT_BINDING) += $(patsubst $(src)/%.yaml,%.example.dt.yaml, $(DT_SCHEMA_FILES)) -extra-$(CHECK_DT_BINDING) += processed-schema-examples.yaml -extra-$(CHECK_DTBS) += processed-schema.yaml +extra-$(CHECK_DT_BINDING) += processed-schema-examples.json +extra-$(CHECK_DTBS) += processed-schema.json # Hack: avoid 'Argument list too long' error for 'make clean'. Remove most of # build artifacts here before they are processed by scripts/Makefile.clean diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib index 3d599716940c..94133708889d 100644 --- a/scripts/Makefile.lib +++ b/scripts/Makefile.lib @@ -328,7 +328,7 @@ $(obj)/%.dtb: $(src)/%.dts $(DTC) FORCE DT_CHECKER ?= dt-validate DT_BINDING_DIR := Documentation/devicetree/bindings # DT_TMP_SCHEMA may be overridden from Documentation/devicetree/bindings/Makefile -DT_TMP_SCHEMA ?= $(objtree)/$(DT_BINDING_DIR)/processed-schema.yaml +DT_TMP_SCHEMA ?= $(objtree)/$(DT_BINDING_DIR)/processed-schema.json quiet_cmd_dtb_check = CHECK $@ cmd_dtb_check = $(DT_CHECKER) -u $(srctree)/$(DT_BINDING_DIR) -p $(DT_TMP_SCHEMA) $@ From 7ba58fff001da7e7296dbed8ddc13212300d1c57 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Thu, 6 Aug 2020 16:50:09 -0600 Subject: [PATCH 068/433] dt-bindings: Validate DT binding schema in a single call As the number of binding schemas has grown, the time to run dt_binding_check has gotten pretty slow. A large part of this is due to the slow startup time of Python (a well documented problem). There's not currently any benefit to running dt-doc-validate one file at a time, so let's switch it to run a single rule. Doing this means we loose the make parallelism, but we can use xargs instead. This speeds up the validation time from several minutes to <10 sec. Since the validation is a single step with no output, we move running it as part of the processed-schema-examples.json target. We also need to reorder the extra-y entries so the validation is run first rather than after all the examples are extracted. Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/Makefile | 22 +++++++++++++++------- 1 file changed, 15 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/Makefile b/Documentation/devicetree/bindings/Makefile index 8da8847689f6..ec8073cb2e71 100644 --- a/Documentation/devicetree/bindings/Makefile +++ b/Documentation/devicetree/bindings/Makefile @@ -11,12 +11,11 @@ check_dtschema_version: $(DT_DOC_CHECKER) --version 2>/dev/null || echo 0; } | sort -VC || \ { echo "ERROR: dtschema minimum version is v$(DT_SCHEMA_MIN_VERSION)" >&2; false; } -quiet_cmd_chk_binding = CHKDT $(patsubst $(srctree)/%,%,$<) - cmd_chk_binding = $(DT_DOC_CHECKER) -u $(srctree)/$(src) $< ; \ - $(DT_EXTRACT_EX) $< > $@ +quiet_cmd_extract_ex = DTEX $@ + cmd_extract_ex = $(DT_EXTRACT_EX) $< > $@ $(obj)/%.example.dts: $(src)/%.yaml check_dtschema_version FORCE - $(call if_changed,chk_binding) + $(call if_changed,extract_ex) # Use full schemas when checking %.example.dts DT_TMP_SCHEMA := $(obj)/processed-schema-examples.json @@ -25,6 +24,10 @@ find_cmd = find $(srctree)/$(src) \( -name '*.yaml' ! \ -name 'processed-schema*' ! \ -name '*.example.dt.yaml' \) +quiet_cmd_chk_bindings = CHKDT $@ + cmd_chk_bindings = $(find_cmd) | \ + xargs -n200 -P$$(nproc) $(DT_DOC_CHECKER) -u $(srctree)/$(src) + quiet_cmd_mk_schema = SCHEMA $@ cmd_mk_schema = f=$$(mktemp) ; \ $(if $(DT_MK_SCHEMA_FLAGS), \ @@ -33,6 +36,11 @@ quiet_cmd_mk_schema = SCHEMA $@ $(DT_MK_SCHEMA) -j $(DT_MK_SCHEMA_FLAGS) @$$f > $@ ; \ rm -f $$f +define rule_chkdt + $(call cmd,chk_bindings) + $(call cmd,mk_schema) +endef + DT_DOCS = $(shell $(find_cmd) | sed -e 's|^$(srctree)/||') override DTC_FLAGS := \ @@ -41,7 +49,7 @@ override DTC_FLAGS := \ -Wno-interrupt_provider $(obj)/processed-schema-examples.json: $(DT_DOCS) check_dtschema_version FORCE - $(call if_changed,mk_schema) + $(call if_changed_rule,chkdt) ifeq ($(DT_SCHEMA_FILES),) @@ -63,10 +71,10 @@ $(obj)/processed-schema.json: $(DT_SCHEMA_FILES) check_dtschema_version FORCE endif -extra-$(CHECK_DT_BINDING) += $(patsubst $(src)/%.yaml,%.example.dts, $(DT_SCHEMA_FILES)) -extra-$(CHECK_DT_BINDING) += $(patsubst $(src)/%.yaml,%.example.dt.yaml, $(DT_SCHEMA_FILES)) extra-$(CHECK_DT_BINDING) += processed-schema-examples.json extra-$(CHECK_DTBS) += processed-schema.json +extra-$(CHECK_DT_BINDING) += $(patsubst $(src)/%.yaml,%.example.dts, $(DT_SCHEMA_FILES)) +extra-$(CHECK_DT_BINDING) += $(patsubst $(src)/%.yaml,%.example.dt.yaml, $(DT_SCHEMA_FILES)) # Hack: avoid 'Argument list too long' error for 'make clean'. Remove most of # build artifacts here before they are processed by scripts/Makefile.clean From ce7793e9ef6322d236b722ada386d3bb7ecb7df2 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Wed, 29 Jul 2020 14:57:07 +0300 Subject: [PATCH 069/433] pinctrl: baytrail: Switch to use intel_pinctrl_get_soc_data() Since we have common helper to retrieve SoC data from driver data we may switch to use it. Signed-off-by: Andy Shevchenko Acked-by: Mika Westerberg --- drivers/pinctrl/intel/Kconfig | 6 +----- drivers/pinctrl/intel/pinctrl-baytrail.c | 24 +++++------------------- 2 files changed, 6 insertions(+), 24 deletions(-) diff --git a/drivers/pinctrl/intel/Kconfig b/drivers/pinctrl/intel/Kconfig index b3e6060db52d..c7f0d5d9d9d3 100644 --- a/drivers/pinctrl/intel/Kconfig +++ b/drivers/pinctrl/intel/Kconfig @@ -6,11 +6,7 @@ if (X86 || COMPILE_TEST) config PINCTRL_BAYTRAIL bool "Intel Baytrail GPIO pin control" depends on ACPI - select GPIOLIB - select GPIOLIB_IRQCHIP - select PINMUX - select PINCONF - select GENERIC_PINCONF + select PINCTRL_INTEL help driver for memory mapped GPIO functionality on Intel Baytrail platforms. Supports 3 banks with 102, 28 and 44 gpios. diff --git a/drivers/pinctrl/intel/pinctrl-baytrail.c b/drivers/pinctrl/intel/pinctrl-baytrail.c index d6e35cba3065..d49aab3cfbaa 100644 --- a/drivers/pinctrl/intel/pinctrl-baytrail.c +++ b/drivers/pinctrl/intel/pinctrl-baytrail.c @@ -1635,28 +1635,14 @@ static const struct acpi_device_id byt_gpio_acpi_match[] = { static int byt_pinctrl_probe(struct platform_device *pdev) { - const struct intel_pinctrl_soc_data *soc_data = NULL; - const struct intel_pinctrl_soc_data **soc_table; + const struct intel_pinctrl_soc_data *soc_data; struct device *dev = &pdev->dev; - struct acpi_device *acpi_dev; struct intel_pinctrl *vg; - int i, ret; + int ret; - acpi_dev = ACPI_COMPANION(dev); - if (!acpi_dev) - return -ENODEV; - - soc_table = (const struct intel_pinctrl_soc_data **)device_get_match_data(dev); - - for (i = 0; soc_table[i]; i++) { - if (!strcmp(acpi_dev->pnp.unique_id, soc_table[i]->uid)) { - soc_data = soc_table[i]; - break; - } - } - - if (!soc_data) - return -ENODEV; + soc_data = intel_pinctrl_get_soc_data(pdev); + if (IS_ERR(soc_data)) + return PTR_ERR(soc_data); vg = devm_kzalloc(dev, sizeof(*vg), GFP_KERNEL); if (!vg) From 10c857f063fc63902160755a6e23fa594290c6d3 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Wed, 29 Jul 2020 14:57:08 +0300 Subject: [PATCH 070/433] pinctrl: cherryview: Switch to use intel_pinctrl_get_soc_data() Since we have common helper to retrieve SoC data from driver data we may switch to use it. Signed-off-by: Andy Shevchenko Acked-by: Mika Westerberg --- drivers/pinctrl/intel/Kconfig | 6 +----- drivers/pinctrl/intel/pinctrl-cherryview.c | 23 ++++++---------------- 2 files changed, 7 insertions(+), 22 deletions(-) diff --git a/drivers/pinctrl/intel/Kconfig b/drivers/pinctrl/intel/Kconfig index c7f0d5d9d9d3..28e5f824ba45 100644 --- a/drivers/pinctrl/intel/Kconfig +++ b/drivers/pinctrl/intel/Kconfig @@ -18,11 +18,7 @@ config PINCTRL_BAYTRAIL config PINCTRL_CHERRYVIEW tristate "Intel Cherryview/Braswell pinctrl and GPIO driver" depends on ACPI - select PINMUX - select PINCONF - select GENERIC_PINCONF - select GPIOLIB - select GPIOLIB_IRQCHIP + select PINCTRL_INTEL help Cherryview/Braswell pinctrl driver provides an interface that allows configuring of SoC pins and using them as GPIOs. diff --git a/drivers/pinctrl/intel/pinctrl-cherryview.c b/drivers/pinctrl/intel/pinctrl-cherryview.c index 86e954df82d6..e48d4445e932 100644 --- a/drivers/pinctrl/intel/pinctrl-cherryview.c +++ b/drivers/pinctrl/intel/pinctrl-cherryview.c @@ -1605,28 +1605,17 @@ static acpi_status chv_pinctrl_mmio_access_handler(u32 function, static int chv_pinctrl_probe(struct platform_device *pdev) { - const struct intel_pinctrl_soc_data *soc_data = NULL; - const struct intel_pinctrl_soc_data **soc_table; + const struct intel_pinctrl_soc_data *soc_data; struct intel_community *community; struct device *dev = &pdev->dev; + struct acpi_device *adev = ACPI_COMPANION(dev); struct intel_pinctrl *pctrl; - struct acpi_device *adev; acpi_status status; - int ret, irq, i; + int ret, irq; - adev = ACPI_COMPANION(&pdev->dev); - if (!adev) - return -ENODEV; - - soc_table = (const struct intel_pinctrl_soc_data **)device_get_match_data(dev); - for (i = 0; soc_table[i]; i++) { - if (!strcmp(adev->pnp.unique_id, soc_table[i]->uid)) { - soc_data = soc_table[i]; - break; - } - } - if (!soc_data) - return -ENODEV; + soc_data = intel_pinctrl_get_soc_data(pdev); + if (IS_ERR(soc_data)) + return PTR_ERR(soc_data); pctrl = devm_kzalloc(dev, sizeof(*pctrl), GFP_KERNEL); if (!pctrl) From 04d53068508e1b670a46ed9507aeaec7ef6d4ae4 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Tue, 18 Aug 2020 17:23:53 +0300 Subject: [PATCH 071/433] pinctrl: intel: Update header block to reflect direct dependencies Update header inclusion block to reflect all direct dependencies that are being involved in pinctrl-intel.h. Signed-off-by: Andy Shevchenko Acked-by: Mika Westerberg --- drivers/pinctrl/intel/pinctrl-intel.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/intel/pinctrl-intel.h b/drivers/pinctrl/intel/pinctrl-intel.h index 3b0564ae9b15..ad34b7a3f6ed 100644 --- a/drivers/pinctrl/intel/pinctrl-intel.h +++ b/drivers/pinctrl/intel/pinctrl-intel.h @@ -10,12 +10,15 @@ #ifndef PINCTRL_INTEL_H #define PINCTRL_INTEL_H +#include +#include #include #include +#include #include +#include #include -struct pinctrl_pin_desc; struct platform_device; struct device; From 52c3c3a59234a9725b5dcfe9729ed737d7843980 Mon Sep 17 00:00:00 2001 From: Jiri Slaby Date: Mon, 24 Aug 2020 11:54:25 +0200 Subject: [PATCH 072/433] Revert "vc_screen: extract vcs_read_buf_header" This reverts commit b1c32fcfadf5593ab7a63261cc8a5747c36e627e, because Syzkaller reports a use-after-free, a write in vcs_read: BUG: KASAN: use-after-free in vcs_read_buf drivers/tty/vt/vc_screen.c:357 [inline] BUG: KASAN: use-after-free in vcs_read+0xaa7/0xb40 drivers/tty/vt/vc_screen.c:449 Write of size 2 at addr ffff8880a8014000 by task syz-executor.5/16936 CPU: 1 PID: 16936 Comm: syz-executor.5 Not tainted 5.9.0-rc1-next-20200820-syzkaller #0 Hardware name: Google Google Compute Engine/Google Compute Engine, BIOS Google 01/01/2011 Call Trace: ... kasan_report.cold+0x1f/0x37 mm/kasan/report.c:530 vcs_read_buf drivers/tty/vt/vc_screen.c:357 [inline] vcs_read+0xaa7/0xb40 drivers/tty/vt/vc_screen.c:449 There are two issues with the patch: 1) vcs_read rounds the 'count' *up* to an even number. So if we read odd bytes from the header (3 bytes in the reproducer), the second byte of a (2-byte/ushort) write to temporary con_buf won't fit. It is because with the patch applied, we only subtract the real number read (3 bytes) and not the whole header (4 bytes). 2) in this scenario, we perform unaligned accesses now: there are 2-byte/ushort writes to odd addresses. Due to the same reason as above. Revert this for now, re-think and retry later. Signed-off-by: Jiri Slaby Reported-by: syzbot+ad1f53726c3bd11180cb@syzkaller.appspotmail.com Fixes: b1c32fcfadf5 ("vc_screen: extract vcs_read_buf_header") Cc: akpm@linux-foundation.org Cc: nico@fluxnic.net Link: https://lore.kernel.org/r/20200824095425.4376-1-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman --- drivers/tty/vt/vc_screen.c | 31 +++++++++++++------------------ 1 file changed, 13 insertions(+), 18 deletions(-) diff --git a/drivers/tty/vt/vc_screen.c b/drivers/tty/vt/vc_screen.c index 3e3a6a9a7f44..1850bacdb5b0 100644 --- a/drivers/tty/vt/vc_screen.c +++ b/drivers/tty/vt/vc_screen.c @@ -293,22 +293,6 @@ static void vcs_read_buf_noattr(const struct vc_data *vc, char *con_buf, } } -static unsigned int vcs_read_buf_header(const struct vc_data *vc, char *con_buf, - unsigned int pos, unsigned int count) -{ - count = min(HEADER_SIZE - pos, count); - - /* clamp header values if they don't fit */ - con_buf[0] = min(vc->vc_rows, 0xFFu); - con_buf[1] = min(vc->vc_cols, 0xFFu); - getconsxy(vc, con_buf + 2); - - if (pos) - memmove(con_buf, con_buf + pos, count); - - return count; -} - static unsigned int vcs_read_buf(const struct vc_data *vc, char *con_buf, unsigned int pos, unsigned int count, bool viewed, unsigned int *skip) @@ -318,11 +302,22 @@ static unsigned int vcs_read_buf(const struct vc_data *vc, char *con_buf, unsigned int filled = count; if (pos < HEADER_SIZE) { - count -= vcs_read_buf_header(vc, con_buf, pos, count); + /* clamp header values if they don't fit */ + con_buf[0] = min(vc->vc_rows, 0xFFu); + con_buf[1] = min(vc->vc_cols, 0xFFu); + getconsxy(vc, con_buf + 2); + *skip += pos; + count += pos; + if (count > CON_BUF_SIZE) { + count = CON_BUF_SIZE; + filled = count - pos; + } + + /* Advance state pointers and move on. */ + count -= min(HEADER_SIZE, count); pos = HEADER_SIZE; con_buf += HEADER_SIZE; - /* If count >= 0, then pos is even... */ } else if (pos & 1) { /* From fe9c36442769e07aaaf0dce1fb7f083faad4b1e9 Mon Sep 17 00:00:00 2001 From: Andrew Halaney Date: Thu, 6 Aug 2020 10:53:25 -0500 Subject: [PATCH 073/433] pinctrl: nomadik: Fix pull direction debug info The nomadik pinctrl hardware doesn't have any way to determine if the active pull is up or down. Reading the bit currently used to report if the pull is up/down indicates if the gpio input is reading high or low, it doesn't reflect the pull state. For this reason change the output from "pull up"/"pull down" to "pull enabled". This avoids confusing developers who were using the output to determine what the pull state is. Signed-off-by: Andrew Halaney Link: https://lore.kernel.org/r/20200806155322.GA25523@ola-jn9phv2.ad.garmin.com Signed-off-by: Linus Walleij --- drivers/pinctrl/nomadik/pinctrl-nomadik.c | 16 ++++++---------- 1 file changed, 6 insertions(+), 10 deletions(-) diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c index ba25c4654391..657e35a75d84 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c @@ -931,11 +931,6 @@ static void nmk_gpio_dbg_show_one(struct seq_file *s, [NMK_GPIO_ALT_C+3] = "altC3", [NMK_GPIO_ALT_C+4] = "altC4", }; - const char *pulls[] = { - "none ", - "pull down", - "pull up ", - }; clk_enable(nmk_chip->clk); is_out = !!(readl(nmk_chip->addr + NMK_GPIO_DIR) & BIT(offset)); @@ -946,7 +941,7 @@ static void nmk_gpio_dbg_show_one(struct seq_file *s, mode = nmk_prcm_gpiocr_get_mode(pctldev, gpio); if (is_out) { - seq_printf(s, " gpio-%-3d (%-20.20s) out %s %s", + seq_printf(s, " gpio-%-3d (%-20.20s) out %s %s", gpio, label ?: "(none)", data_out ? "hi" : "lo", @@ -954,11 +949,12 @@ static void nmk_gpio_dbg_show_one(struct seq_file *s, } else { int irq = chip->to_irq(chip, offset); struct irq_desc *desc = irq_to_desc(irq); - int pullidx = 0; + const int pullidx = pull ? 1 : 0; int val; - - if (pull) - pullidx = data_out ? 2 : 1; + static const char * const pulls[] = { + "none ", + "pull enabled", + }; seq_printf(s, " gpio-%-3d (%-20.20s) in %s %s", gpio, From 0c0a41fb17484c9046faf65739dc77853ca32a0c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Fri, 24 Jul 2020 15:24:57 +0200 Subject: [PATCH 074/433] pinctrl: armada-37xx: Add comment for pcie1_reset pin group MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Group name 'pcie1' is misleading as it controls only PCIe reset pin. Like other PCIe groups it should have been called 'pcie1_reset'. But due to backward compatibility it is not possible to change existing group name. So just add comment describing this PCIe reset functionality. Signed-off-by: Pali Rohár Link: https://lore.kernel.org/r/20200724132457.7094-1-pali@kernel.org Signed-off-by: Linus Walleij --- arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 2 +- drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi index 2bbc69b4dc99..d5b6c0a1c54a 100644 --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi @@ -316,7 +316,7 @@ }; pcie_reset_pins: pcie-reset-pins { - groups = "pcie1"; + groups = "pcie1"; /* this actually controls "pcie1_reset" */ function = "gpio"; }; diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c index 953126bf6657..68894e9e05d2 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c @@ -197,7 +197,7 @@ static struct armada_37xx_pin_group armada_37xx_sb_groups[] = { PIN_GRP_GPIO("sdio_sb", 24, 6, BIT(2), "sdio"), PIN_GRP_GPIO("rgmii", 6, 12, BIT(3), "mii"), PIN_GRP_GPIO("smi", 18, 2, BIT(4), "smi"), - PIN_GRP_GPIO("pcie1", 3, 1, BIT(5), "pcie"), + PIN_GRP_GPIO("pcie1", 3, 1, BIT(5), "pcie"), /* this actually controls "pcie1_reset" */ PIN_GRP_GPIO("pcie1_clkreq", 4, 1, BIT(9), "pcie"), PIN_GRP_GPIO("pcie1_wakeup", 5, 1, BIT(10), "pcie"), PIN_GRP_GPIO("ptp", 20, 3, BIT(11) | BIT(12) | BIT(13), "ptp"), From 441717c46fc71e349cf8373392a2afd61332dd4e Mon Sep 17 00:00:00 2001 From: Bartosz Dudziak Date: Thu, 16 Jul 2020 22:55:28 +0200 Subject: [PATCH 075/433] dt-bindings: pinctrl: qcom: Add msm8226 pinctrl bindings Add device tree binding Documentation details for Qualcomm msm8226 pinctrl driver. - Bindings documentation was based on qcom,ipq6018-pinctrl.yaml added by Sricharan R and then modified for msm8226 content Signed-off-by: Bartosz Dudziak Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20200716205530.22910-2-bartosz.dudziak@snejp.pl Signed-off-by: Linus Walleij --- .../pinctrl/qcom,msm8226-pinctrl.yaml | 132 ++++++++++++++++++ 1 file changed, 132 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml new file mode 100644 index 000000000000..1f0f5757f9e1 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml @@ -0,0 +1,132 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/qcom,msm8226-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Technologies, Inc. MSM8226 TLMM block + +maintainers: + - Bjorn Andersson + +description: | + This binding describes the Top Level Mode Multiplexer block found in the + MSM8226 platform. + +properties: + compatible: + const: qcom,msm8226-pinctrl + + reg: + description: Specifies the base address and size of the TLMM register space + maxItems: 1 + + interrupts: + description: Specifies the TLMM summary IRQ + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + description: Specifies the PIN numbers and Flags, as defined in + include/dt-bindings/interrupt-controller/irq.h + const: 2 + + gpio-controller: true + + '#gpio-cells': + description: Specifying the pin number and flags, as defined in + include/dt-bindings/gpio/gpio.h + const: 2 + + gpio-ranges: + maxItems: 1 + + gpio-reserved-ranges: + maxItems: 1 + +#PIN CONFIGURATION NODES +patternProperties: + '-pins$': + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configuration. + Client device subnodes use below standard properties. + $ref: "/schemas/pinctrl/pincfg-node.yaml" + + properties: + pins: + description: + List of gpio pins affected by the properties specified in this + subnode. + items: + oneOf: + - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-1][0-6])$" + - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, sdc2_data ] + minItems: 1 + maxItems: 36 + + function: + description: + Specify the alternative function to be configured for the specified + pins. Functions are only valid for gpio pins. + enum: [ gpio, cci_i2c0, blsp_uim1, blsp_uim2, blsp_uim3, blsp_uim5, + blsp_i2c1, blsp_i2c2, blsp_i2c3, blsp_i2c5, blsp_spi1, + blsp_spi2, blsp_spi3, blsp_spi5, blsp_uart1, blsp_uart2, + blsp_uart3, blsp_uart5, cam_mclk0, cam_mclk1, wlan ] + + drive-strength: + enum: [2, 4, 6, 8, 10, 12, 14, 16] + default: 2 + description: + Selects the drive strength for the specified pins, in mA. + + bias-pull-down: true + + bias-pull-up: true + + bias-disable: true + + output-high: true + + output-low: true + + required: + - pins + - function + + additionalProperties: false + +required: + - compatible + - reg + - interrupts + - interrupt-controller + - '#interrupt-cells' + - gpio-controller + - '#gpio-cells' + - gpio-ranges + +additionalProperties: false + +examples: + - | + #include + msmgpio: pinctrl@fd510000 { + compatible = "qcom,msm8226-pinctrl"; + reg = <0xfd510000 0x4000>; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&msmgpio 0 0 117>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + + serial-pins { + pins = "gpio8", "gpio9"; + function = "blsp_uart3"; + drive-strength = <8>; + bias-disable; + }; + }; From db436a7198a78d8d02178dc992ad5ae2de57cd2e Mon Sep 17 00:00:00 2001 From: Bartosz Dudziak Date: Thu, 16 Jul 2020 22:55:29 +0200 Subject: [PATCH 076/433] pinctrl: qcom: Add msm8226 pinctrl driver. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add initial Qualcomm msm8226 pinctrl driver to support pin configuration with pinctrl framework for msm8226 SoC. - Initial formatting and style was taken from the msm8x74 pinctrl driver added by Björn Andersson Signed-off-by: Bartosz Dudziak Link: https://lore.kernel.org/r/20200716205530.22910-3-bartosz.dudziak@snejp.pl Signed-off-by: Linus Walleij --- drivers/pinctrl/qcom/Kconfig | 9 + drivers/pinctrl/qcom/Makefile | 1 + drivers/pinctrl/qcom/pinctrl-msm8226.c | 630 +++++++++++++++++++++++++ 3 files changed, 640 insertions(+) create mode 100644 drivers/pinctrl/qcom/pinctrl-msm8226.c diff --git a/drivers/pinctrl/qcom/Kconfig b/drivers/pinctrl/qcom/Kconfig index f8ff30cdafa6..5fe7b8aaf69d 100644 --- a/drivers/pinctrl/qcom/Kconfig +++ b/drivers/pinctrl/qcom/Kconfig @@ -62,6 +62,15 @@ config PINCTRL_IPQ6018 Qualcomm Technologies Inc. IPQ6018 platform. Select this for IPQ6018. +config PINCTRL_MSM8226 + tristate "Qualcomm 8226 pin controller driver" + depends on GPIOLIB && OF + select PINCTRL_MSM + help + This is the pinctrl, pinmux, pinconf and gpiolib driver for the + Qualcomm Technologies Inc TLMM block found on the Qualcomm + Technologies Inc MSM8226 platform. + config PINCTRL_MSM8660 tristate "Qualcomm 8660 pin controller driver" depends on GPIOLIB && OF diff --git a/drivers/pinctrl/qcom/Makefile b/drivers/pinctrl/qcom/Makefile index 061ec9fb659b..9e3d9c91a444 100644 --- a/drivers/pinctrl/qcom/Makefile +++ b/drivers/pinctrl/qcom/Makefile @@ -7,6 +7,7 @@ obj-$(CONFIG_PINCTRL_IPQ4019) += pinctrl-ipq4019.o obj-$(CONFIG_PINCTRL_IPQ8064) += pinctrl-ipq8064.o obj-$(CONFIG_PINCTRL_IPQ8074) += pinctrl-ipq8074.o obj-$(CONFIG_PINCTRL_IPQ6018) += pinctrl-ipq6018.o +obj-$(CONFIG_PINCTRL_MSM8226) += pinctrl-msm8226.o obj-$(CONFIG_PINCTRL_MSM8660) += pinctrl-msm8660.o obj-$(CONFIG_PINCTRL_MSM8960) += pinctrl-msm8960.o obj-$(CONFIG_PINCTRL_MSM8X74) += pinctrl-msm8x74.o diff --git a/drivers/pinctrl/qcom/pinctrl-msm8226.c b/drivers/pinctrl/qcom/pinctrl-msm8226.c new file mode 100644 index 000000000000..98779e62e951 --- /dev/null +++ b/drivers/pinctrl/qcom/pinctrl-msm8226.c @@ -0,0 +1,630 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#include +#include +#include +#include + +#include "pinctrl-msm.h" + +static const struct pinctrl_pin_desc msm8226_pins[] = { + PINCTRL_PIN(0, "GPIO_0"), + PINCTRL_PIN(1, "GPIO_1"), + PINCTRL_PIN(2, "GPIO_2"), + PINCTRL_PIN(3, "GPIO_3"), + PINCTRL_PIN(4, "GPIO_4"), + PINCTRL_PIN(5, "GPIO_5"), + PINCTRL_PIN(6, "GPIO_6"), + PINCTRL_PIN(7, "GPIO_7"), + PINCTRL_PIN(8, "GPIO_8"), + PINCTRL_PIN(9, "GPIO_9"), + PINCTRL_PIN(10, "GPIO_10"), + PINCTRL_PIN(11, "GPIO_11"), + PINCTRL_PIN(12, "GPIO_12"), + PINCTRL_PIN(13, "GPIO_13"), + PINCTRL_PIN(14, "GPIO_14"), + PINCTRL_PIN(15, "GPIO_15"), + PINCTRL_PIN(16, "GPIO_16"), + PINCTRL_PIN(17, "GPIO_17"), + PINCTRL_PIN(18, "GPIO_18"), + PINCTRL_PIN(19, "GPIO_19"), + PINCTRL_PIN(20, "GPIO_20"), + PINCTRL_PIN(21, "GPIO_21"), + PINCTRL_PIN(22, "GPIO_22"), + PINCTRL_PIN(23, "GPIO_23"), + PINCTRL_PIN(24, "GPIO_24"), + PINCTRL_PIN(25, "GPIO_25"), + PINCTRL_PIN(26, "GPIO_26"), + PINCTRL_PIN(27, "GPIO_27"), + PINCTRL_PIN(28, "GPIO_28"), + PINCTRL_PIN(29, "GPIO_29"), + PINCTRL_PIN(30, "GPIO_30"), + PINCTRL_PIN(31, "GPIO_31"), + PINCTRL_PIN(32, "GPIO_32"), + PINCTRL_PIN(33, "GPIO_33"), + PINCTRL_PIN(34, "GPIO_34"), + PINCTRL_PIN(35, "GPIO_35"), + PINCTRL_PIN(36, "GPIO_36"), + PINCTRL_PIN(37, "GPIO_37"), + PINCTRL_PIN(38, "GPIO_38"), + PINCTRL_PIN(39, "GPIO_39"), + PINCTRL_PIN(40, "GPIO_40"), + PINCTRL_PIN(41, "GPIO_41"), + PINCTRL_PIN(42, "GPIO_42"), + PINCTRL_PIN(43, "GPIO_43"), + PINCTRL_PIN(44, "GPIO_44"), + PINCTRL_PIN(45, "GPIO_45"), + PINCTRL_PIN(46, "GPIO_46"), + PINCTRL_PIN(47, "GPIO_47"), + PINCTRL_PIN(48, "GPIO_48"), + PINCTRL_PIN(49, "GPIO_49"), + PINCTRL_PIN(50, "GPIO_50"), + PINCTRL_PIN(51, "GPIO_51"), + PINCTRL_PIN(52, "GPIO_52"), + PINCTRL_PIN(53, "GPIO_53"), + PINCTRL_PIN(54, "GPIO_54"), + PINCTRL_PIN(55, "GPIO_55"), + PINCTRL_PIN(56, "GPIO_56"), + PINCTRL_PIN(57, "GPIO_57"), + PINCTRL_PIN(58, "GPIO_58"), + PINCTRL_PIN(59, "GPIO_59"), + PINCTRL_PIN(60, "GPIO_60"), + PINCTRL_PIN(61, "GPIO_61"), + PINCTRL_PIN(62, "GPIO_62"), + PINCTRL_PIN(63, "GPIO_63"), + PINCTRL_PIN(64, "GPIO_64"), + PINCTRL_PIN(65, "GPIO_65"), + PINCTRL_PIN(66, "GPIO_66"), + PINCTRL_PIN(67, "GPIO_67"), + PINCTRL_PIN(68, "GPIO_68"), + PINCTRL_PIN(69, "GPIO_69"), + PINCTRL_PIN(70, "GPIO_70"), + PINCTRL_PIN(71, "GPIO_71"), + PINCTRL_PIN(72, "GPIO_72"), + PINCTRL_PIN(73, "GPIO_73"), + PINCTRL_PIN(74, "GPIO_74"), + PINCTRL_PIN(75, "GPIO_75"), + PINCTRL_PIN(76, "GPIO_76"), + PINCTRL_PIN(77, "GPIO_77"), + PINCTRL_PIN(78, "GPIO_78"), + PINCTRL_PIN(79, "GPIO_79"), + PINCTRL_PIN(80, "GPIO_80"), + PINCTRL_PIN(81, "GPIO_81"), + PINCTRL_PIN(82, "GPIO_82"), + PINCTRL_PIN(83, "GPIO_83"), + PINCTRL_PIN(84, "GPIO_84"), + PINCTRL_PIN(85, "GPIO_85"), + PINCTRL_PIN(86, "GPIO_86"), + PINCTRL_PIN(87, "GPIO_87"), + PINCTRL_PIN(88, "GPIO_88"), + PINCTRL_PIN(89, "GPIO_89"), + PINCTRL_PIN(90, "GPIO_90"), + PINCTRL_PIN(91, "GPIO_91"), + PINCTRL_PIN(92, "GPIO_92"), + PINCTRL_PIN(93, "GPIO_93"), + PINCTRL_PIN(94, "GPIO_94"), + PINCTRL_PIN(95, "GPIO_95"), + PINCTRL_PIN(96, "GPIO_96"), + PINCTRL_PIN(97, "GPIO_97"), + PINCTRL_PIN(98, "GPIO_98"), + PINCTRL_PIN(99, "GPIO_99"), + PINCTRL_PIN(100, "GPIO_100"), + PINCTRL_PIN(101, "GPIO_101"), + PINCTRL_PIN(102, "GPIO_102"), + PINCTRL_PIN(103, "GPIO_103"), + PINCTRL_PIN(104, "GPIO_104"), + PINCTRL_PIN(105, "GPIO_105"), + PINCTRL_PIN(106, "GPIO_106"), + PINCTRL_PIN(107, "GPIO_107"), + PINCTRL_PIN(108, "GPIO_108"), + PINCTRL_PIN(109, "GPIO_109"), + PINCTRL_PIN(110, "GPIO_110"), + PINCTRL_PIN(111, "GPIO_111"), + PINCTRL_PIN(112, "GPIO_112"), + PINCTRL_PIN(113, "GPIO_113"), + PINCTRL_PIN(114, "GPIO_114"), + PINCTRL_PIN(115, "GPIO_115"), + PINCTRL_PIN(116, "GPIO_116"), + + PINCTRL_PIN(117, "SDC1_CLK"), + PINCTRL_PIN(118, "SDC1_CMD"), + PINCTRL_PIN(119, "SDC1_DATA"), + PINCTRL_PIN(120, "SDC2_CLK"), + PINCTRL_PIN(121, "SDC2_CMD"), + PINCTRL_PIN(122, "SDC2_DATA"), +}; + +#define DECLARE_MSM_GPIO_PINS(pin) static const unsigned int gpio##pin##_pins[] = { pin } +DECLARE_MSM_GPIO_PINS(0); +DECLARE_MSM_GPIO_PINS(1); +DECLARE_MSM_GPIO_PINS(2); +DECLARE_MSM_GPIO_PINS(3); +DECLARE_MSM_GPIO_PINS(4); +DECLARE_MSM_GPIO_PINS(5); +DECLARE_MSM_GPIO_PINS(6); +DECLARE_MSM_GPIO_PINS(7); +DECLARE_MSM_GPIO_PINS(8); +DECLARE_MSM_GPIO_PINS(9); +DECLARE_MSM_GPIO_PINS(10); +DECLARE_MSM_GPIO_PINS(11); +DECLARE_MSM_GPIO_PINS(12); +DECLARE_MSM_GPIO_PINS(13); +DECLARE_MSM_GPIO_PINS(14); +DECLARE_MSM_GPIO_PINS(15); +DECLARE_MSM_GPIO_PINS(16); +DECLARE_MSM_GPIO_PINS(17); +DECLARE_MSM_GPIO_PINS(18); +DECLARE_MSM_GPIO_PINS(19); +DECLARE_MSM_GPIO_PINS(20); +DECLARE_MSM_GPIO_PINS(21); +DECLARE_MSM_GPIO_PINS(22); +DECLARE_MSM_GPIO_PINS(23); +DECLARE_MSM_GPIO_PINS(24); +DECLARE_MSM_GPIO_PINS(25); +DECLARE_MSM_GPIO_PINS(26); +DECLARE_MSM_GPIO_PINS(27); +DECLARE_MSM_GPIO_PINS(28); +DECLARE_MSM_GPIO_PINS(29); +DECLARE_MSM_GPIO_PINS(30); +DECLARE_MSM_GPIO_PINS(31); +DECLARE_MSM_GPIO_PINS(32); +DECLARE_MSM_GPIO_PINS(33); +DECLARE_MSM_GPIO_PINS(34); +DECLARE_MSM_GPIO_PINS(35); +DECLARE_MSM_GPIO_PINS(36); +DECLARE_MSM_GPIO_PINS(37); +DECLARE_MSM_GPIO_PINS(38); +DECLARE_MSM_GPIO_PINS(39); +DECLARE_MSM_GPIO_PINS(40); +DECLARE_MSM_GPIO_PINS(41); +DECLARE_MSM_GPIO_PINS(42); +DECLARE_MSM_GPIO_PINS(43); +DECLARE_MSM_GPIO_PINS(44); +DECLARE_MSM_GPIO_PINS(45); +DECLARE_MSM_GPIO_PINS(46); +DECLARE_MSM_GPIO_PINS(47); +DECLARE_MSM_GPIO_PINS(48); +DECLARE_MSM_GPIO_PINS(49); +DECLARE_MSM_GPIO_PINS(50); +DECLARE_MSM_GPIO_PINS(51); +DECLARE_MSM_GPIO_PINS(52); +DECLARE_MSM_GPIO_PINS(53); +DECLARE_MSM_GPIO_PINS(54); +DECLARE_MSM_GPIO_PINS(55); +DECLARE_MSM_GPIO_PINS(56); +DECLARE_MSM_GPIO_PINS(57); +DECLARE_MSM_GPIO_PINS(58); +DECLARE_MSM_GPIO_PINS(59); +DECLARE_MSM_GPIO_PINS(60); +DECLARE_MSM_GPIO_PINS(61); +DECLARE_MSM_GPIO_PINS(62); +DECLARE_MSM_GPIO_PINS(63); +DECLARE_MSM_GPIO_PINS(64); +DECLARE_MSM_GPIO_PINS(65); +DECLARE_MSM_GPIO_PINS(66); +DECLARE_MSM_GPIO_PINS(67); +DECLARE_MSM_GPIO_PINS(68); +DECLARE_MSM_GPIO_PINS(69); +DECLARE_MSM_GPIO_PINS(70); +DECLARE_MSM_GPIO_PINS(71); +DECLARE_MSM_GPIO_PINS(72); +DECLARE_MSM_GPIO_PINS(73); +DECLARE_MSM_GPIO_PINS(74); +DECLARE_MSM_GPIO_PINS(75); +DECLARE_MSM_GPIO_PINS(76); +DECLARE_MSM_GPIO_PINS(77); +DECLARE_MSM_GPIO_PINS(78); +DECLARE_MSM_GPIO_PINS(79); +DECLARE_MSM_GPIO_PINS(80); +DECLARE_MSM_GPIO_PINS(81); +DECLARE_MSM_GPIO_PINS(82); +DECLARE_MSM_GPIO_PINS(83); +DECLARE_MSM_GPIO_PINS(84); +DECLARE_MSM_GPIO_PINS(85); +DECLARE_MSM_GPIO_PINS(86); +DECLARE_MSM_GPIO_PINS(87); +DECLARE_MSM_GPIO_PINS(88); +DECLARE_MSM_GPIO_PINS(89); +DECLARE_MSM_GPIO_PINS(90); +DECLARE_MSM_GPIO_PINS(91); +DECLARE_MSM_GPIO_PINS(92); +DECLARE_MSM_GPIO_PINS(93); +DECLARE_MSM_GPIO_PINS(94); +DECLARE_MSM_GPIO_PINS(95); +DECLARE_MSM_GPIO_PINS(96); +DECLARE_MSM_GPIO_PINS(97); +DECLARE_MSM_GPIO_PINS(98); +DECLARE_MSM_GPIO_PINS(99); +DECLARE_MSM_GPIO_PINS(100); +DECLARE_MSM_GPIO_PINS(101); +DECLARE_MSM_GPIO_PINS(102); +DECLARE_MSM_GPIO_PINS(103); +DECLARE_MSM_GPIO_PINS(104); +DECLARE_MSM_GPIO_PINS(105); +DECLARE_MSM_GPIO_PINS(106); +DECLARE_MSM_GPIO_PINS(107); +DECLARE_MSM_GPIO_PINS(108); +DECLARE_MSM_GPIO_PINS(109); +DECLARE_MSM_GPIO_PINS(110); +DECLARE_MSM_GPIO_PINS(111); +DECLARE_MSM_GPIO_PINS(112); +DECLARE_MSM_GPIO_PINS(113); +DECLARE_MSM_GPIO_PINS(114); +DECLARE_MSM_GPIO_PINS(115); +DECLARE_MSM_GPIO_PINS(116); + +static const unsigned int sdc1_clk_pins[] = { 117 }; +static const unsigned int sdc1_cmd_pins[] = { 118 }; +static const unsigned int sdc1_data_pins[] = { 119 }; +static const unsigned int sdc2_clk_pins[] = { 120 }; +static const unsigned int sdc2_cmd_pins[] = { 121 }; +static const unsigned int sdc2_data_pins[] = { 122 }; + +#define FUNCTION(fname) \ + [MSM_MUX_##fname] = { \ + .name = #fname, \ + .groups = fname##_groups, \ + .ngroups = ARRAY_SIZE(fname##_groups), \ + } + +#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7) \ + { \ + .name = "gpio" #id, \ + .pins = gpio##id##_pins, \ + .npins = ARRAY_SIZE(gpio##id##_pins), \ + .funcs = (int[]){ \ + MSM_MUX_gpio, \ + MSM_MUX_##f1, \ + MSM_MUX_##f2, \ + MSM_MUX_##f3, \ + MSM_MUX_##f4, \ + MSM_MUX_##f5, \ + MSM_MUX_##f6, \ + MSM_MUX_##f7 \ + }, \ + .nfuncs = 8, \ + .ctl_reg = 0x1000 + 0x10 * id, \ + .io_reg = 0x1004 + 0x10 * id, \ + .intr_cfg_reg = 0x1008 + 0x10 * id, \ + .intr_status_reg = 0x100c + 0x10 * id, \ + .intr_target_reg = 0x1008 + 0x10 * id, \ + .mux_bit = 2, \ + .pull_bit = 0, \ + .drv_bit = 6, \ + .oe_bit = 9, \ + .in_bit = 0, \ + .out_bit = 1, \ + .intr_enable_bit = 0, \ + .intr_status_bit = 0, \ + .intr_target_bit = 5, \ + .intr_target_kpss_val = 4, \ + .intr_raw_status_bit = 4, \ + .intr_polarity_bit = 1, \ + .intr_detection_bit = 2, \ + .intr_detection_width = 2, \ + } + +#define SDC_PINGROUP(pg_name, ctl, pull, drv) \ + { \ + .name = #pg_name, \ + .pins = pg_name##_pins, \ + .npins = ARRAY_SIZE(pg_name##_pins), \ + .ctl_reg = ctl, \ + .io_reg = 0, \ + .intr_cfg_reg = 0, \ + .intr_status_reg = 0, \ + .intr_target_reg = 0, \ + .mux_bit = -1, \ + .pull_bit = pull, \ + .drv_bit = drv, \ + .oe_bit = -1, \ + .in_bit = -1, \ + .out_bit = -1, \ + .intr_enable_bit = -1, \ + .intr_status_bit = -1, \ + .intr_target_bit = -1, \ + .intr_target_kpss_val = -1, \ + .intr_raw_status_bit = -1, \ + .intr_polarity_bit = -1, \ + .intr_detection_bit = -1, \ + .intr_detection_width = -1, \ + } + +/* + * TODO: Add the rest of the possible functions and fill out + * the pingroup table below. + */ +enum msm8226_functions { + MSM_MUX_gpio, + MSM_MUX_cci_i2c0, + MSM_MUX_blsp_i2c1, + MSM_MUX_blsp_i2c2, + MSM_MUX_blsp_i2c3, + MSM_MUX_blsp_i2c5, + MSM_MUX_blsp_spi1, + MSM_MUX_blsp_spi2, + MSM_MUX_blsp_spi3, + MSM_MUX_blsp_spi5, + MSM_MUX_blsp_uart1, + MSM_MUX_blsp_uart2, + MSM_MUX_blsp_uart3, + MSM_MUX_blsp_uart5, + MSM_MUX_blsp_uim1, + MSM_MUX_blsp_uim2, + MSM_MUX_blsp_uim3, + MSM_MUX_blsp_uim5, + MSM_MUX_cam_mclk0, + MSM_MUX_cam_mclk1, + MSM_MUX_wlan, + MSM_MUX_NA, +}; + +static const char * const gpio_groups[] = { + "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", + "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14", + "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21", + "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", + "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35", + "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42", + "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49", + "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56", + "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63", + "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70", + "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77", + "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84", + "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91", + "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98", + "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104", + "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110", + "gpio111", "gpio112", "gpio113", "gpio114", "gpio115", "gpio116", +}; + +static const char * const blsp_uart1_groups[] = { + "gpio0", "gpio1", "gpio2", "gpio3" +}; + +static const char * const blsp_uim1_groups[] = { "gpio0", "gpio1" }; +static const char * const blsp_i2c1_groups[] = { "gpio2", "gpio3" }; +static const char * const blsp_spi1_groups[] = { + "gpio0", "gpio1", "gpio2", "gpio3" +}; + +static const char * const blsp_uart2_groups[] = { + "gpio4", "gpio5", "gpio6", "gpio7" +}; + +static const char * const blsp_uim2_groups[] = { "gpio4", "gpio5" }; +static const char * const blsp_i2c2_groups[] = { "gpio6", "gpio7" }; +static const char * const blsp_spi2_groups[] = { + "gpio4", "gpio5", "gpio6", "gpio7" +}; + +static const char * const blsp_uart3_groups[] = { + "gpio8", "gpio9", "gpio10", "gpio11" +}; + +static const char * const blsp_uim3_groups[] = { "gpio8", "gpio9" }; +static const char * const blsp_i2c3_groups[] = { "gpio10", "gpio11" }; +static const char * const blsp_spi3_groups[] = { + "gpio8", "gpio9", "gpio10", "gpio11" +}; + +static const char * const blsp_uart5_groups[] = { + "gpio16", "gpio17", "gpio18", "gpio19" +}; + +static const char * const blsp_uim5_groups[] = { "gpio16", "gpio17" }; +static const char * const blsp_i2c5_groups[] = { "gpio18", "gpio19" }; +static const char * const blsp_spi5_groups[] = { + "gpio16", "gpio17", "gpio18", "gpio19" +}; + +static const char * const cci_i2c0_groups[] = { "gpio29", "gpio30" }; + +static const char * const cam_mclk0_groups[] = { "gpio26" }; +static const char * const cam_mclk1_groups[] = { "gpio27" }; + +static const char * const wlan_groups[] = { + "gpio40", "gpio41", "gpio42", "gpio43", "gpio44" +}; + +static const struct msm_function msm8226_functions[] = { + FUNCTION(gpio), + FUNCTION(cci_i2c0), + FUNCTION(blsp_uim1), + FUNCTION(blsp_uim2), + FUNCTION(blsp_uim3), + FUNCTION(blsp_uim5), + FUNCTION(blsp_i2c1), + FUNCTION(blsp_i2c2), + FUNCTION(blsp_i2c3), + FUNCTION(blsp_i2c5), + FUNCTION(blsp_spi1), + FUNCTION(blsp_spi2), + FUNCTION(blsp_spi3), + FUNCTION(blsp_spi5), + FUNCTION(blsp_uart1), + FUNCTION(blsp_uart2), + FUNCTION(blsp_uart3), + FUNCTION(blsp_uart5), + FUNCTION(cam_mclk0), + FUNCTION(cam_mclk1), + FUNCTION(wlan), +}; + +static const struct msm_pingroup msm8226_groups[] = { + PINGROUP(0, blsp_spi1, blsp_uart1, blsp_uim1, NA, NA, NA, NA), + PINGROUP(1, blsp_spi1, blsp_uart1, blsp_uim1, NA, NA, NA, NA), + PINGROUP(2, blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA), + PINGROUP(3, blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA), + PINGROUP(4, blsp_spi2, blsp_uart2, blsp_uim2, NA, NA, NA, NA), + PINGROUP(5, blsp_spi2, blsp_uart2, blsp_uim2, NA, NA, NA, NA), + PINGROUP(6, blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA), + PINGROUP(7, blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA), + PINGROUP(8, blsp_spi3, blsp_uart3, blsp_uim3, NA, NA, NA, NA), + PINGROUP(9, blsp_spi3, blsp_uart3, blsp_uim3, NA, NA, NA, NA), + PINGROUP(10, blsp_spi3, blsp_uart3, blsp_i2c3, NA, NA, NA, NA), + PINGROUP(11, blsp_spi3, blsp_uart3, blsp_i2c3, NA, NA, NA, NA), + PINGROUP(12, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(13, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(14, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(15, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(16, blsp_spi5, blsp_uart5, blsp_uim5, NA, NA, NA, NA), + PINGROUP(17, blsp_spi5, blsp_uart5, blsp_uim5, NA, NA, NA, NA), + PINGROUP(18, blsp_spi5, blsp_uart5, blsp_i2c5, NA, NA, NA, NA), + PINGROUP(19, blsp_spi5, blsp_uart5, blsp_i2c5, NA, NA, NA, NA), + PINGROUP(20, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(21, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(22, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(23, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(24, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(25, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(26, cam_mclk0, NA, NA, NA, NA, NA, NA), + PINGROUP(27, cam_mclk1, NA, NA, NA, NA, NA, NA), + PINGROUP(28, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(29, cci_i2c0, NA, NA, NA, NA, NA, NA), + PINGROUP(30, cci_i2c0, NA, NA, NA, NA, NA, NA), + PINGROUP(31, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(32, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(33, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(34, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(35, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(36, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(37, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(38, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(39, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(40, wlan, NA, NA, NA, NA, NA, NA), + PINGROUP(41, wlan, NA, NA, NA, NA, NA, NA), + PINGROUP(42, wlan, NA, NA, NA, NA, NA, NA), + PINGROUP(43, wlan, NA, NA, NA, NA, NA, NA), + PINGROUP(44, wlan, NA, NA, NA, NA, NA, NA), + PINGROUP(45, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(46, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(47, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(48, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(49, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(50, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(51, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(52, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(53, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(54, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(55, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(56, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(57, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(58, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(59, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(60, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(61, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(62, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(63, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(64, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(65, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(66, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(67, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(68, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(69, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(70, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(71, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(72, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(73, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(74, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(75, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(76, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(77, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(78, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(79, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(80, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(81, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(82, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(83, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(84, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(85, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(86, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(87, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(88, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(89, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(90, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(91, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(92, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(93, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(94, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(95, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(96, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(97, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(98, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(99, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(100, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(101, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(102, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(103, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(104, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(105, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(106, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(107, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(108, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(109, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(110, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(111, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(112, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(113, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(114, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(115, NA, NA, NA, NA, NA, NA, NA), + PINGROUP(116, NA, NA, NA, NA, NA, NA, NA), + SDC_PINGROUP(sdc1_clk, 0x2044, 13, 6), + SDC_PINGROUP(sdc1_cmd, 0x2044, 11, 3), + SDC_PINGROUP(sdc1_data, 0x2044, 9, 0), + SDC_PINGROUP(sdc2_clk, 0x2048, 14, 6), + SDC_PINGROUP(sdc2_cmd, 0x2048, 11, 3), + SDC_PINGROUP(sdc2_data, 0x2048, 9, 0), +}; + +#define NUM_GPIO_PINGROUPS 117 + +static const struct msm_pinctrl_soc_data msm8226_pinctrl = { + .pins = msm8226_pins, + .npins = ARRAY_SIZE(msm8226_pins), + .functions = msm8226_functions, + .nfunctions = ARRAY_SIZE(msm8226_functions), + .groups = msm8226_groups, + .ngroups = ARRAY_SIZE(msm8226_groups), + .ngpios = NUM_GPIO_PINGROUPS, +}; + +static int msm8226_pinctrl_probe(struct platform_device *pdev) +{ + return msm_pinctrl_probe(pdev, &msm8226_pinctrl); +} + +static const struct of_device_id msm8226_pinctrl_of_match[] = { + { .compatible = "qcom,msm8226-pinctrl", }, + { }, +}; + +static struct platform_driver msm8226_pinctrl_driver = { + .driver = { + .name = "msm8226-pinctrl", + .of_match_table = msm8226_pinctrl_of_match, + }, + .probe = msm8226_pinctrl_probe, + .remove = msm_pinctrl_remove, +}; + +static int __init msm8226_pinctrl_init(void) +{ + return platform_driver_register(&msm8226_pinctrl_driver); +} +arch_initcall(msm8226_pinctrl_init); + +static void __exit msm8226_pinctrl_exit(void) +{ + platform_driver_unregister(&msm8226_pinctrl_driver); +} +module_exit(msm8226_pinctrl_exit); + +MODULE_AUTHOR("Bartosz Dudziak "); +MODULE_DESCRIPTION("Qualcomm MSM8226 pinctrl driver"); +MODULE_LICENSE("GPL v2"); +MODULE_DEVICE_TABLE(of, msm8226_pinctrl_of_match); From aebebcf910c4d7b6b98bc7b3b573ec24543861a6 Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Mon, 3 Aug 2020 17:20:54 +0300 Subject: [PATCH 077/433] dt-bindings: pinctrl: Add bindings for Actions S500 SoC Add pinctrl and gpio bindings for Actions Semi S500 SoC. Signed-off-by: Cristian Ciocaltea Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/7abf618c446b7b648f512afe72e46704156e9912.1596461275.git.cristian.ciocaltea@gmail.com Signed-off-by: Linus Walleij --- .../pinctrl/actions,s500-pinctrl.yaml | 240 ++++++++++++++++++ 1 file changed, 240 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/actions,s500-pinctrl.yaml diff --git a/Documentation/devicetree/bindings/pinctrl/actions,s500-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/actions,s500-pinctrl.yaml new file mode 100644 index 000000000000..33391d30c00c --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/actions,s500-pinctrl.yaml @@ -0,0 +1,240 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/actions,s500-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Actions Semi S500 SoC pinmux & GPIO controller + +maintainers: + - Manivannan Sadhasivam + - Cristian Ciocaltea + +description: | + Pinmux & GPIO controller manages pin multiplexing & configuration including + GPIO function selection & GPIO attributes configuration. Please refer to + pinctrl-bindings.txt in this directory for common binding part and usage. + +properties: + compatible: + const: actions,s500-pinctrl + + reg: + items: + - description: GPIO Output + GPIO Input + GPIO Data + - description: Multiplexing Control + - description: PAD Pull Control + PAD Schmitt Trigger Enable + PAD Control + - description: PAD Drive Capacity Select + minItems: 1 + maxItems: 4 + + clocks: + maxItems: 1 + + gpio-controller: true + + gpio-ranges: + maxItems: 1 + + '#gpio-cells': + description: + Specifies the pin number and flags, as defined in + include/dt-bindings/gpio/gpio.h + const: 2 + + interrupt-controller: true + + '#interrupt-cells': + description: + Specifies the pin number and flags, as defined in + include/dt-bindings/interrupt-controller/irq.h + const: 2 + + interrupts: + description: + One interrupt per each of the 5 GPIO ports supported by the controller, + sorted by port number ascending order. + minItems: 5 + maxItems: 5 + +patternProperties: + '-pins$': + type: object + patternProperties: + '^(.*-)?pinmux$': + type: object + description: + Pinctrl node's client devices specify pin muxes using subnodes, + which in turn use the standard properties below. + $ref: pinmux-node.yaml# + + properties: + groups: + description: + List of gpio pin groups affected by the functions specified in + this subnode. + items: + oneOf: + - enum: [lcd0_d18_mfp, rmii_crs_dv_mfp, rmii_txd0_mfp, + rmii_txd1_mfp, rmii_txen_mfp, rmii_rxen_mfp, rmii_rxd1_mfp, + rmii_rxd0_mfp, rmii_ref_clk_mfp, i2s_d0_mfp, i2s_pcm1_mfp, + i2s0_pcm0_mfp, i2s1_pcm0_mfp, i2s_d1_mfp, ks_in2_mfp, + ks_in1_mfp, ks_in0_mfp, ks_in3_mfp, ks_out0_mfp, + ks_out1_mfp, ks_out2_mfp, lvds_o_pn_mfp, dsi_dn0_mfp, + dsi_dp2_mfp, lcd0_d17_mfp, dsi_dp3_mfp, dsi_dn3_mfp, + dsi_dp0_mfp, lvds_ee_pn_mfp, spi0_i2c_pcm_mfp, + spi0_i2s_pcm_mfp, dsi_dnp1_cp_mfp, lvds_e_pn_mfp, + dsi_dn2_mfp, uart2_rtsb_mfp, uart2_ctsb_mfp, uart3_rtsb_mfp, + uart3_ctsb_mfp, sd0_d0_mfp, sd0_d1_mfp, sd0_d2_d3_mfp, + sd1_d0_d3_mfp, sd0_cmd_mfp, sd0_clk_mfp, sd1_cmd_mfp, + uart0_rx_mfp, clko_25m_mfp, csi_cn_cp_mfp, sens0_ckout_mfp, + uart0_tx_mfp, i2c0_mfp, csi_dn_dp_mfp, sen0_pclk_mfp, + pcm1_in_mfp, pcm1_clk_mfp, pcm1_sync_mfp, pcm1_out_mfp, + dnand_data_wr_mfp, dnand_acle_ce0_mfp, nand_ceb2_mfp, + nand_ceb3_mfp] + minItems: 1 + maxItems: 32 + + function: + description: + Specify the alternative function to be configured for the + given gpio pin groups. + enum: [nor, eth_rmii, eth_smii, spi0, spi1, spi2, spi3, sens0, + sens1, uart0, uart1, uart2, uart3, uart4, uart5, uart6, i2s0, + i2s1, pcm1, pcm0, ks, jtag, pwm0, pwm1, pwm2, pwm3, pwm4, pwm5, + p0, sd0, sd1, sd2, i2c0, i2c1, i2c3, dsi, lvds, usb30, clko_25m, + mipi_csi, nand, spdif, ts, lcd0] + + required: + - groups + - function + + additionalProperties: false + + '^(.*-)?pinconf$': + type: object + description: + Pinctrl node's client devices specify pin configurations using + subnodes, which in turn use the standard properties below. + $ref: pincfg-node.yaml# + + properties: + groups: + description: + List of gpio pin groups affected by the drive-strength property + specified in this subnode. + items: + oneOf: + - enum: [sirq_drv, rmii_txd01_txen_drv, rmii_rxer_drv, + rmii_crs_drv, rmii_rxd10_drv, rmii_ref_clk_drv, + smi_mdc_mdio_drv, i2s_d0_drv, i2s_bclk0_drv, i2s3_drv, + i2s13_drv, pcm1_drv, ks_in_drv, ks_out_drv, lvds_all_drv, + lcd_dsi_drv, dsi_drv, sd0_d0_d3_drv, sd1_d0_d3_drv, + sd0_cmd_drv, sd0_clk_drv, sd1_cmd_drv, sd1_clk_drv, + spi0_all_drv, uart0_rx_drv, uart0_tx_drv, uart2_all_drv, + i2c0_all_drv, i2c12_all_drv, sens0_pclk_drv, + sens0_ckout_drv, uart3_all_drv] + minItems: 1 + maxItems: 32 + + pins: + description: + List of gpio pins affected by the bias-pull-* and + input-schmitt-* properties specified in this subnode. + items: + oneOf: + - enum: [dnand_dqs, dnand_dqsn, eth_txd0, eth_txd1, eth_txen, + eth_rxer, eth_crs_dv, eth_rxd1, eth_rxd0, eth_ref_clk, + eth_mdc, eth_mdio, sirq0, sirq1, sirq2, i2s_d0, i2s_bclk0, + i2s_lrclk0, i2s_mclk0, i2s_d1, i2s_bclk1, i2s_lrclk1, + i2s_mclk1, ks_in0, ks_in1, ks_in2, ks_in3, ks_out0, ks_out1, + ks_out2, lvds_oep, lvds_oen, lvds_odp, lvds_odn, lvds_ocp, + lvds_ocn, lvds_obp, lvds_obn, lvds_oap, lvds_oan, lvds_eep, + lvds_een, lvds_edp, lvds_edn, lvds_ecp, lvds_ecn, lvds_ebp, + lvds_ebn, lvds_eap, lvds_ean, lcd0_d18, lcd0_d17, dsi_dp3, + dsi_dn3, dsi_dp1, dsi_dn1, dsi_cp, dsi_cn, dsi_dp0, dsi_dn0, + dsi_dp2, dsi_dn2, sd0_d0, sd0_d1, sd0_d2, sd0_d3, sd1_d0, + sd1_d1, sd1_d2, sd1_d3, sd0_cmd, sd0_clk, sd1_cmd, sd1_clk, + spi0_sclk, spi0_ss, spi0_miso, spi0_mosi, uart0_rx, + uart0_tx, i2c0_sclk, i2c0_sdata, sensor0_pclk, + sensor0_ckout, dnand_ale, dnand_cle, dnand_ceb0, dnand_ceb1, + dnand_ceb2, dnand_ceb3, uart2_rx, uart2_tx, uart2_rtsb, + uart2_ctsb, uart3_rx, uart3_tx, uart3_rtsb, uart3_ctsb, + pcm1_in, pcm1_clk, pcm1_sync, pcm1_out, i2c1_sclk, + i2c1_sdata, i2c2_sclk, i2c2_sdata, csi_dn0, csi_dp0, + csi_dn1, csi_dp1, csi_dn2, csi_dp2, csi_dn3, csi_dp3, + csi_cn, csi_cp, dnand_d0, dnand_d1, dnand_d2, dnand_d3, + dnand_d4, dnand_d5, dnand_d6, dnand_d7, dnand_rb, dnand_rdb, + dnand_rdbn, dnand_wrb, porb, clko_25m, bsel, pkg0, pkg1, + pkg2, pkg3] + minItems: 1 + maxItems: 64 + + bias-pull-up: true + bias-pull-down: true + + drive-strength: + description: + Selects the drive strength for the specified pins, in mA. + enum: [2, 4, 8, 12] + + input-schmitt-enable: true + input-schmitt-disable: true + + additionalProperties: false + + additionalProperties: false + +required: + - compatible + - reg + - clocks + - gpio-controller + - gpio-ranges + - '#gpio-cells' + - interrupt-controller + - '#interrupt-cells' + - interrupts + +additionalProperties: false + +examples: + - | + #include + pinctrl: pinctrl@b01b0000 { + compatible = "actions,s500-pinctrl"; + reg = <0xb01b0000 0x40>, <0xb01b0040 0x10>, + <0xb01b0060 0x18>, <0xb01b0080 0xc>; + clocks = <&cmu 55>; + gpio-controller; + gpio-ranges = <&pinctrl 0 0 132>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = , + , + , + , + ; + + mmc0_pins: mmc0-pins { + pinmux { + groups = "sd0_d0_mfp", "sd0_d1_mfp", "sd0_d2_d3_mfp", + "sd0_cmd_mfp", "sd0_clk_mfp"; + function = "sd0"; + }; + + drv-pinconf { + groups = "sd0_d0_d3_drv", "sd0_cmd_drv", "sd0_clk_drv"; + drive-strength = <8>; + }; + + bias-pinconf { + pins = "sd0_d0", "sd0_d1", "sd0_d2", + "sd0_d3", "sd0_cmd"; + bias-pull-up; + }; + }; + }; + +... From 45de28e31a6e250cd9e17c8b9f9db5a439fb39b2 Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Mon, 3 Aug 2020 17:20:55 +0300 Subject: [PATCH 078/433] pinctrl: actions: Add Actions S500 pinctrl driver Add pinctrl and gpio driver for Actions Semi S500 SoC. The driver supports pinctrl, pinmux, pinconf, gpio and interrupt functions using a set of registers shared between gpio and pinctrl. Signed-off-by: Cristian Ciocaltea Link: https://lore.kernel.org/r/ce11c15f2f72798a8d740f8a7d5cbf1e6d70974a.1596461275.git.cristian.ciocaltea@gmail.com Signed-off-by: Linus Walleij --- drivers/pinctrl/actions/Kconfig | 6 + drivers/pinctrl/actions/Makefile | 1 + drivers/pinctrl/actions/pinctrl-s500.c | 1727 ++++++++++++++++++++++++ 3 files changed, 1734 insertions(+) create mode 100644 drivers/pinctrl/actions/pinctrl-s500.c diff --git a/drivers/pinctrl/actions/Kconfig b/drivers/pinctrl/actions/Kconfig index 966f1c2c89d6..a1d16e8280e5 100644 --- a/drivers/pinctrl/actions/Kconfig +++ b/drivers/pinctrl/actions/Kconfig @@ -10,6 +10,12 @@ config PINCTRL_OWL help Say Y here to enable Actions Semi OWL pinctrl driver +config PINCTRL_S500 + bool "Actions Semi S500 pinctrl driver" + depends on PINCTRL_OWL + help + Say Y here to enable Actions Semi S500 pinctrl driver + config PINCTRL_S700 bool "Actions Semi S700 pinctrl driver" depends on PINCTRL_OWL diff --git a/drivers/pinctrl/actions/Makefile b/drivers/pinctrl/actions/Makefile index 61aa9107a43a..b9e2c527c9d3 100644 --- a/drivers/pinctrl/actions/Makefile +++ b/drivers/pinctrl/actions/Makefile @@ -1,4 +1,5 @@ # SPDX-License-Identifier: GPL-2.0-only obj-$(CONFIG_PINCTRL_OWL) += pinctrl-owl.o +obj-$(CONFIG_PINCTRL_S500) += pinctrl-s500.o obj-$(CONFIG_PINCTRL_S700) += pinctrl-s700.o obj-$(CONFIG_PINCTRL_S900) += pinctrl-s900.o diff --git a/drivers/pinctrl/actions/pinctrl-s500.c b/drivers/pinctrl/actions/pinctrl-s500.c new file mode 100644 index 000000000000..38e30914af6e --- /dev/null +++ b/drivers/pinctrl/actions/pinctrl-s500.c @@ -0,0 +1,1727 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Actions Semi S500 SoC Pinctrl driver + * + * Copyright (c) 2014 Actions Semi Inc. + * Copyright (c) 2020 Cristian Ciocaltea + */ + +#include +#include +#include +#include +#include +#include "pinctrl-owl.h" + +/* Pinctrl registers offset */ +#define MFCTL0 (0x0040) +#define MFCTL1 (0x0044) +#define MFCTL2 (0x0048) +#define MFCTL3 (0x004C) +#define PAD_PULLCTL0 (0x0060) +#define PAD_PULLCTL1 (0x0064) +#define PAD_PULLCTL2 (0x0068) +#define PAD_ST0 (0x006C) +#define PAD_ST1 (0x0070) +#define PAD_CTL (0x0074) +#define PAD_DRV0 (0x0080) +#define PAD_DRV1 (0x0084) +#define PAD_DRV2 (0x0088) + +#define _GPIOA(offset) (offset) +#define _GPIOB(offset) (32 + (offset)) +#define _GPIOC(offset) (64 + (offset)) +#define _GPIOD(offset) (96 + (offset)) +#define _GPIOE(offset) (128 + (offset)) + +#define NUM_GPIOS (_GPIOE(3) + 1) +#define _PIN(offset) (NUM_GPIOS + (offset)) + +#define DNAND_DQS _GPIOA(12) +#define DNAND_DQSN _GPIOA(13) +#define ETH_TXD0 _GPIOA(14) +#define ETH_TXD1 _GPIOA(15) +#define ETH_TXEN _GPIOA(16) +#define ETH_RXER _GPIOA(17) +#define ETH_CRS_DV _GPIOA(18) +#define ETH_RXD1 _GPIOA(19) +#define ETH_RXD0 _GPIOA(20) +#define ETH_REF_CLK _GPIOA(21) +#define ETH_MDC _GPIOA(22) +#define ETH_MDIO _GPIOA(23) +#define SIRQ0 _GPIOA(24) +#define SIRQ1 _GPIOA(25) +#define SIRQ2 _GPIOA(26) +#define I2S_D0 _GPIOA(27) +#define I2S_BCLK0 _GPIOA(28) +#define I2S_LRCLK0 _GPIOA(29) +#define I2S_MCLK0 _GPIOA(30) +#define I2S_D1 _GPIOA(31) + +#define I2S_BCLK1 _GPIOB(0) +#define I2S_LRCLK1 _GPIOB(1) +#define I2S_MCLK1 _GPIOB(2) +#define KS_IN0 _GPIOB(3) +#define KS_IN1 _GPIOB(4) +#define KS_IN2 _GPIOB(5) +#define KS_IN3 _GPIOB(6) +#define KS_OUT0 _GPIOB(7) +#define KS_OUT1 _GPIOB(8) +#define KS_OUT2 _GPIOB(9) +#define LVDS_OEP _GPIOB(10) +#define LVDS_OEN _GPIOB(11) +#define LVDS_ODP _GPIOB(12) +#define LVDS_ODN _GPIOB(13) +#define LVDS_OCP _GPIOB(14) +#define LVDS_OCN _GPIOB(15) +#define LVDS_OBP _GPIOB(16) +#define LVDS_OBN _GPIOB(17) +#define LVDS_OAP _GPIOB(18) +#define LVDS_OAN _GPIOB(19) +#define LVDS_EEP _GPIOB(20) +#define LVDS_EEN _GPIOB(21) +#define LVDS_EDP _GPIOB(22) +#define LVDS_EDN _GPIOB(23) +#define LVDS_ECP _GPIOB(24) +#define LVDS_ECN _GPIOB(25) +#define LVDS_EBP _GPIOB(26) +#define LVDS_EBN _GPIOB(27) +#define LVDS_EAP _GPIOB(28) +#define LVDS_EAN _GPIOB(29) +#define LCD0_D18 _GPIOB(30) +#define LCD0_D17 _GPIOB(31) + +#define DSI_DP3 _GPIOC(0) +#define DSI_DN3 _GPIOC(1) +#define DSI_DP1 _GPIOC(2) +#define DSI_DN1 _GPIOC(3) +#define DSI_CP _GPIOC(4) +#define DSI_CN _GPIOC(5) +#define DSI_DP0 _GPIOC(6) +#define DSI_DN0 _GPIOC(7) +#define DSI_DP2 _GPIOC(8) +#define DSI_DN2 _GPIOC(9) +#define SD0_D0 _GPIOC(10) +#define SD0_D1 _GPIOC(11) +#define SD0_D2 _GPIOC(12) +#define SD0_D3 _GPIOC(13) +#define SD1_D0 _GPIOC(14) /* SD0_D4 */ +#define SD1_D1 _GPIOC(15) /* SD0_D5 */ +#define SD1_D2 _GPIOC(16) /* SD0_D6 */ +#define SD1_D3 _GPIOC(17) /* SD0_D7 */ +#define SD0_CMD _GPIOC(18) +#define SD0_CLK _GPIOC(19) +#define SD1_CMD _GPIOC(20) +#define SD1_CLK _GPIOC(21) +#define SPI0_SCLK _GPIOC(22) +#define SPI0_SS _GPIOC(23) +#define SPI0_MISO _GPIOC(24) +#define SPI0_MOSI _GPIOC(25) +#define UART0_RX _GPIOC(26) +#define UART0_TX _GPIOC(27) +#define I2C0_SCLK _GPIOC(28) +#define I2C0_SDATA _GPIOC(29) +#define SENSOR0_PCLK _GPIOC(31) + +#define SENSOR0_CKOUT _GPIOD(10) +#define DNAND_ALE _GPIOD(12) +#define DNAND_CLE _GPIOD(13) +#define DNAND_CEB0 _GPIOD(14) +#define DNAND_CEB1 _GPIOD(15) +#define DNAND_CEB2 _GPIOD(16) +#define DNAND_CEB3 _GPIOD(17) +#define UART2_RX _GPIOD(18) +#define UART2_TX _GPIOD(19) +#define UART2_RTSB _GPIOD(20) +#define UART2_CTSB _GPIOD(21) +#define UART3_RX _GPIOD(22) +#define UART3_TX _GPIOD(23) +#define UART3_RTSB _GPIOD(24) +#define UART3_CTSB _GPIOD(25) +#define PCM1_IN _GPIOD(28) +#define PCM1_CLK _GPIOD(29) +#define PCM1_SYNC _GPIOD(30) +#define PCM1_OUT _GPIOD(31) + +#define I2C1_SCLK _GPIOE(0) +#define I2C1_SDATA _GPIOE(1) +#define I2C2_SCLK _GPIOE(2) +#define I2C2_SDATA _GPIOE(3) + +#define CSI_DN0 _PIN(0) +#define CSI_DP0 _PIN(1) +#define CSI_DN1 _PIN(2) +#define CSI_DP1 _PIN(3) +#define CSI_CN _PIN(4) +#define CSI_CP _PIN(5) +#define CSI_DN2 _PIN(6) +#define CSI_DP2 _PIN(7) +#define CSI_DN3 _PIN(8) +#define CSI_DP3 _PIN(9) + +#define DNAND_D0 _PIN(10) +#define DNAND_D1 _PIN(11) +#define DNAND_D2 _PIN(12) +#define DNAND_D3 _PIN(13) +#define DNAND_D4 _PIN(14) +#define DNAND_D5 _PIN(15) +#define DNAND_D6 _PIN(16) +#define DNAND_D7 _PIN(17) +#define DNAND_WRB _PIN(18) +#define DNAND_RDB _PIN(19) +#define DNAND_RDBN _PIN(20) +#define DNAND_RB _PIN(21) + +#define PORB _PIN(22) +#define CLKO_25M _PIN(23) +#define BSEL _PIN(24) +#define PKG0 _PIN(25) +#define PKG1 _PIN(26) +#define PKG2 _PIN(27) +#define PKG3 _PIN(28) + +#define _FIRSTPAD _GPIOA(0) +#define _LASTPAD PKG3 +#define NUM_PADS (_PIN(28) + 1) + +static const struct pinctrl_pin_desc s500_pads[] = { + PINCTRL_PIN(DNAND_DQS, "dnand_dqs"), + PINCTRL_PIN(DNAND_DQSN, "dnand_dqsn"), + PINCTRL_PIN(ETH_TXD0, "eth_txd0"), + PINCTRL_PIN(ETH_TXD1, "eth_txd1"), + PINCTRL_PIN(ETH_TXEN, "eth_txen"), + PINCTRL_PIN(ETH_RXER, "eth_rxer"), + PINCTRL_PIN(ETH_CRS_DV, "eth_crs_dv"), + PINCTRL_PIN(ETH_RXD1, "eth_rxd1"), + PINCTRL_PIN(ETH_RXD0, "eth_rxd0"), + PINCTRL_PIN(ETH_REF_CLK, "eth_ref_clk"), + PINCTRL_PIN(ETH_MDC, "eth_mdc"), + PINCTRL_PIN(ETH_MDIO, "eth_mdio"), + PINCTRL_PIN(SIRQ0, "sirq0"), + PINCTRL_PIN(SIRQ1, "sirq1"), + PINCTRL_PIN(SIRQ2, "sirq2"), + PINCTRL_PIN(I2S_D0, "i2s_d0"), + PINCTRL_PIN(I2S_BCLK0, "i2s_bclk0"), + PINCTRL_PIN(I2S_LRCLK0, "i2s_lrclk0"), + PINCTRL_PIN(I2S_MCLK0, "i2s_mclk0"), + PINCTRL_PIN(I2S_D1, "i2s_d1"), + PINCTRL_PIN(I2S_BCLK1, "i2s_bclk1"), + PINCTRL_PIN(I2S_LRCLK1, "i2s_lrclk1"), + PINCTRL_PIN(I2S_MCLK1, "i2s_mclk1"), + PINCTRL_PIN(KS_IN0, "ks_in0"), + PINCTRL_PIN(KS_IN1, "ks_in1"), + PINCTRL_PIN(KS_IN2, "ks_in2"), + PINCTRL_PIN(KS_IN3, "ks_in3"), + PINCTRL_PIN(KS_OUT0, "ks_out0"), + PINCTRL_PIN(KS_OUT1, "ks_out1"), + PINCTRL_PIN(KS_OUT2, "ks_out2"), + PINCTRL_PIN(LVDS_OEP, "lvds_oep"), + PINCTRL_PIN(LVDS_OEN, "lvds_oen"), + PINCTRL_PIN(LVDS_ODP, "lvds_odp"), + PINCTRL_PIN(LVDS_ODN, "lvds_odn"), + PINCTRL_PIN(LVDS_OCP, "lvds_ocp"), + PINCTRL_PIN(LVDS_OCN, "lvds_ocn"), + PINCTRL_PIN(LVDS_OBP, "lvds_obp"), + PINCTRL_PIN(LVDS_OBN, "lvds_obn"), + PINCTRL_PIN(LVDS_OAP, "lvds_oap"), + PINCTRL_PIN(LVDS_OAN, "lvds_oan"), + PINCTRL_PIN(LVDS_EEP, "lvds_eep"), + PINCTRL_PIN(LVDS_EEN, "lvds_een"), + PINCTRL_PIN(LVDS_EDP, "lvds_edp"), + PINCTRL_PIN(LVDS_EDN, "lvds_edn"), + PINCTRL_PIN(LVDS_ECP, "lvds_ecp"), + PINCTRL_PIN(LVDS_ECN, "lvds_ecn"), + PINCTRL_PIN(LVDS_EBP, "lvds_ebp"), + PINCTRL_PIN(LVDS_EBN, "lvds_ebn"), + PINCTRL_PIN(LVDS_EAP, "lvds_eap"), + PINCTRL_PIN(LVDS_EAN, "lvds_ean"), + PINCTRL_PIN(LCD0_D18, "lcd0_d18"), + PINCTRL_PIN(LCD0_D17, "lcd0_d17"), + PINCTRL_PIN(DSI_DP3, "dsi_dp3"), + PINCTRL_PIN(DSI_DN3, "dsi_dn3"), + PINCTRL_PIN(DSI_DP1, "dsi_dp1"), + PINCTRL_PIN(DSI_DN1, "dsi_dn1"), + PINCTRL_PIN(DSI_CP, "dsi_cp"), + PINCTRL_PIN(DSI_CN, "dsi_cn"), + PINCTRL_PIN(DSI_DP0, "dsi_dp0"), + PINCTRL_PIN(DSI_DN0, "dsi_dn0"), + PINCTRL_PIN(DSI_DP2, "dsi_dp2"), + PINCTRL_PIN(DSI_DN2, "dsi_dn2"), + PINCTRL_PIN(SD0_D0, "sd0_d0"), + PINCTRL_PIN(SD0_D1, "sd0_d1"), + PINCTRL_PIN(SD0_D2, "sd0_d2"), + PINCTRL_PIN(SD0_D3, "sd0_d3"), + PINCTRL_PIN(SD1_D0, "sd1_d0"), + PINCTRL_PIN(SD1_D1, "sd1_d1"), + PINCTRL_PIN(SD1_D2, "sd1_d2"), + PINCTRL_PIN(SD1_D3, "sd1_d3"), + PINCTRL_PIN(SD0_CMD, "sd0_cmd"), + PINCTRL_PIN(SD0_CLK, "sd0_clk"), + PINCTRL_PIN(SD1_CMD, "sd1_cmd"), + PINCTRL_PIN(SD1_CLK, "sd1_clk"), + PINCTRL_PIN(SPI0_SCLK, "spi0_sclk"), + PINCTRL_PIN(SPI0_SS, "spi0_ss"), + PINCTRL_PIN(SPI0_MISO, "spi0_miso"), + PINCTRL_PIN(SPI0_MOSI, "spi0_mosi"), + PINCTRL_PIN(UART0_RX, "uart0_rx"), + PINCTRL_PIN(UART0_TX, "uart0_tx"), + PINCTRL_PIN(I2C0_SCLK, "i2c0_sclk"), + PINCTRL_PIN(I2C0_SDATA, "i2c0_sdata"), + PINCTRL_PIN(SENSOR0_PCLK, "sensor0_pclk"), + PINCTRL_PIN(SENSOR0_CKOUT, "sensor0_ckout"), + PINCTRL_PIN(DNAND_ALE, "dnand_ale"), + PINCTRL_PIN(DNAND_CLE, "dnand_cle"), + PINCTRL_PIN(DNAND_CEB0, "dnand_ceb0"), + PINCTRL_PIN(DNAND_CEB1, "dnand_ceb1"), + PINCTRL_PIN(DNAND_CEB2, "dnand_ceb2"), + PINCTRL_PIN(DNAND_CEB3, "dnand_ceb3"), + PINCTRL_PIN(UART2_RX, "uart2_rx"), + PINCTRL_PIN(UART2_TX, "uart2_tx"), + PINCTRL_PIN(UART2_RTSB, "uart2_rtsb"), + PINCTRL_PIN(UART2_CTSB, "uart2_ctsb"), + PINCTRL_PIN(UART3_RX, "uart3_rx"), + PINCTRL_PIN(UART3_TX, "uart3_tx"), + PINCTRL_PIN(UART3_RTSB, "uart3_rtsb"), + PINCTRL_PIN(UART3_CTSB, "uart3_ctsb"), + PINCTRL_PIN(PCM1_IN, "pcm1_in"), + PINCTRL_PIN(PCM1_CLK, "pcm1_clk"), + PINCTRL_PIN(PCM1_SYNC, "pcm1_sync"), + PINCTRL_PIN(PCM1_OUT, "pcm1_out"), + PINCTRL_PIN(I2C1_SCLK, "i2c1_sclk"), + PINCTRL_PIN(I2C1_SDATA, "i2c1_sdata"), + PINCTRL_PIN(I2C2_SCLK, "i2c2_sclk"), + PINCTRL_PIN(I2C2_SDATA, "i2c2_sdata"), + PINCTRL_PIN(CSI_DN0, "csi_dn0"), + PINCTRL_PIN(CSI_DP0, "csi_dp0"), + PINCTRL_PIN(CSI_DN1, "csi_dn1"), + PINCTRL_PIN(CSI_DP1, "csi_dp1"), + PINCTRL_PIN(CSI_DN2, "csi_dn2"), + PINCTRL_PIN(CSI_DP2, "csi_dp2"), + PINCTRL_PIN(CSI_DN3, "csi_dn3"), + PINCTRL_PIN(CSI_DP3, "csi_dp3"), + PINCTRL_PIN(CSI_CN, "csi_cn"), + PINCTRL_PIN(CSI_CP, "csi_cp"), + PINCTRL_PIN(DNAND_D0, "dnand_d0"), + PINCTRL_PIN(DNAND_D1, "dnand_d1"), + PINCTRL_PIN(DNAND_D2, "dnand_d2"), + PINCTRL_PIN(DNAND_D3, "dnand_d3"), + PINCTRL_PIN(DNAND_D4, "dnand_d4"), + PINCTRL_PIN(DNAND_D5, "dnand_d5"), + PINCTRL_PIN(DNAND_D6, "dnand_d6"), + PINCTRL_PIN(DNAND_D7, "dnand_d7"), + PINCTRL_PIN(DNAND_RB, "dnand_rb"), + PINCTRL_PIN(DNAND_RDB, "dnand_rdb"), + PINCTRL_PIN(DNAND_RDBN, "dnand_rdbn"), + PINCTRL_PIN(DNAND_WRB, "dnand_wrb"), + PINCTRL_PIN(PORB, "porb"), + PINCTRL_PIN(CLKO_25M, "clko_25m"), + PINCTRL_PIN(BSEL, "bsel"), + PINCTRL_PIN(PKG0, "pkg0"), + PINCTRL_PIN(PKG1, "pkg1"), + PINCTRL_PIN(PKG2, "pkg2"), + PINCTRL_PIN(PKG3, "pkg3"), +}; + +enum s500_pinmux_functions { + S500_MUX_NOR, + S500_MUX_ETH_RMII, + S500_MUX_ETH_SMII, + S500_MUX_SPI0, + S500_MUX_SPI1, + S500_MUX_SPI2, + S500_MUX_SPI3, + S500_MUX_SENS0, + S500_MUX_SENS1, + S500_MUX_UART0, + S500_MUX_UART1, + S500_MUX_UART2, + S500_MUX_UART3, + S500_MUX_UART4, + S500_MUX_UART5, + S500_MUX_UART6, + S500_MUX_I2S0, + S500_MUX_I2S1, + S500_MUX_PCM1, + S500_MUX_PCM0, + S500_MUX_KS, + S500_MUX_JTAG, + S500_MUX_PWM0, + S500_MUX_PWM1, + S500_MUX_PWM2, + S500_MUX_PWM3, + S500_MUX_PWM4, + S500_MUX_PWM5, + S500_MUX_P0, + S500_MUX_SD0, + S500_MUX_SD1, + S500_MUX_SD2, + S500_MUX_I2C0, + S500_MUX_I2C1, + /*S500_MUX_I2C2,*/ + S500_MUX_I2C3, + S500_MUX_DSI, + S500_MUX_LVDS, + S500_MUX_USB30, + S500_MUX_CLKO_25M, + S500_MUX_MIPI_CSI, + S500_MUX_NAND, + S500_MUX_SPDIF, + /*S500_MUX_SIRQ0,*/ + /*S500_MUX_SIRQ1,*/ + /*S500_MUX_SIRQ2,*/ + S500_MUX_TS, + S500_MUX_LCD0, + S500_MUX_RESERVED, +}; + +/* MFPCTL group data */ +/* mfp0_31_26 reserved */ +/* mfp0_25_23 */ +static unsigned int lcd0_d18_mfp_pads[] = { LCD0_D18 }; +static unsigned int lcd0_d18_mfp_funcs[] = { S500_MUX_NOR, + S500_MUX_SENS1, + S500_MUX_PWM2, + S500_MUX_PWM4, + S500_MUX_LCD0 }; +/* mfp0_22_20 */ +static unsigned int rmii_crs_dv_mfp_pads[] = { ETH_CRS_DV }; +static unsigned int rmii_crs_dv_mfp_funcs[] = { S500_MUX_ETH_RMII, + S500_MUX_ETH_SMII, + S500_MUX_SPI2, + S500_MUX_UART4, + S500_MUX_PWM4 }; +/* mfp0_18_16_eth_txd0 */ +static unsigned int rmii_txd0_mfp_pads[] = { ETH_TXD0 }; +static unsigned int rmii_txd0_mfp_funcs[] = { S500_MUX_ETH_RMII, + S500_MUX_ETH_SMII, + S500_MUX_SPI2, + S500_MUX_UART6, + S500_MUX_PWM4 }; +/* mfp0_18_16_eth_txd1 */ +static unsigned int rmii_txd1_mfp_pads[] = { ETH_TXD1 }; +static unsigned int rmii_txd1_mfp_funcs[] = { S500_MUX_ETH_RMII, + S500_MUX_ETH_SMII, + S500_MUX_SPI2, + S500_MUX_UART6, + S500_MUX_PWM5 }; +/* mfp0_15_13_rmii_txen */ +static unsigned int rmii_txen_mfp_pads[] = { ETH_TXEN }; +static unsigned int rmii_txen_mfp_funcs[] = { S500_MUX_ETH_RMII, + S500_MUX_UART2, + S500_MUX_SPI3, + S500_MUX_PWM0 }; +/* mfp0_15_13_rmii_rxen */ +static unsigned int rmii_rxen_mfp_pads[] = { ETH_RXER }; +static unsigned int rmii_rxen_mfp_funcs[] = { S500_MUX_ETH_RMII, + S500_MUX_UART2, + S500_MUX_SPI3, + S500_MUX_PWM1 }; +/* mfp0_12_11 reserved */ + +/* mfp0_10_8_rmii_rxd1 */ +static unsigned int rmii_rxd1_mfp_pads[] = { ETH_RXD1 }; +static unsigned int rmii_rxd1_mfp_funcs[] = { S500_MUX_ETH_RMII, + S500_MUX_UART2, + S500_MUX_SPI3, + S500_MUX_PWM2, + S500_MUX_UART5 }; +/* mfp0_10_8_rmii_rxd0 */ +static unsigned int rmii_rxd0_mfp_pads[] = { ETH_RXD0 }; +static unsigned int rmii_rxd0_mfp_funcs[] = { S500_MUX_ETH_RMII, + S500_MUX_UART2, + S500_MUX_SPI3, + S500_MUX_PWM3, + S500_MUX_UART5 }; +/* mfp0_7_6 */ +static unsigned int rmii_ref_clk_mfp_pads[] = { ETH_REF_CLK }; +static unsigned int rmii_ref_clk_mfp_funcs[] = { S500_MUX_ETH_RMII, + S500_MUX_UART4, + S500_MUX_SPI2, + S500_MUX_RESERVED, + S500_MUX_ETH_SMII }; +/* mfp0_5 */ +static unsigned int i2s_d0_mfp_pads[] = { I2S_D0 }; +static unsigned int i2s_d0_mfp_funcs[] = { S500_MUX_I2S0, + S500_MUX_NOR }; +/* mfp0_4_3 */ +static unsigned int i2s_pcm1_mfp_pads[] = { I2S_LRCLK0, I2S_MCLK0 }; +static unsigned int i2s_pcm1_mfp_funcs[] = { S500_MUX_I2S0, + S500_MUX_NOR, + S500_MUX_PCM1 }; +/* mfp0_2_1_i2s0 */ +static unsigned int i2s0_pcm0_mfp_pads[] = { I2S_BCLK0 }; +static unsigned int i2s0_pcm0_mfp_funcs[] = { S500_MUX_I2S0, + S500_MUX_NOR, + S500_MUX_PCM0 }; +/* mfp0_2_1_i2s1 */ +static unsigned int i2s1_pcm0_mfp_pads[] = { I2S_BCLK1, I2S_LRCLK1, + I2S_MCLK1 }; +static unsigned int i2s1_pcm0_mfp_funcs[] = { S500_MUX_I2S1, + S500_MUX_NOR, + S500_MUX_PCM0 }; +/* mfp0_0 */ +static unsigned int i2s_d1_mfp_pads[] = { I2S_D1 }; +static unsigned int i2s_d1_mfp_funcs[] = { S500_MUX_I2S1, + S500_MUX_NOR }; +/* mfp1_31_29_ks_in0 */ +static unsigned int ks_in0_mfp_pads[] = { KS_IN0 }; +static unsigned int ks_in0_mfp_funcs[] = { S500_MUX_KS, + S500_MUX_JTAG, + S500_MUX_NOR, + S500_MUX_PWM0, + S500_MUX_PWM4, + S500_MUX_SENS1, + S500_MUX_PWM4, + S500_MUX_P0 }; +/* mfp1_31_29_ks_in1 */ +static unsigned int ks_in1_mfp_pads[] = { KS_IN1 }; +static unsigned int ks_in1_mfp_funcs[] = { S500_MUX_KS, + S500_MUX_JTAG, + S500_MUX_NOR, + S500_MUX_PWM1, + S500_MUX_PWM5, + S500_MUX_SENS1, + S500_MUX_PWM1, + S500_MUX_USB30 }; +/* mfp1_31_29_ks_in2 */ +static unsigned int ks_in2_mfp_pads[] = { KS_IN2 }; +static unsigned int ks_in2_mfp_funcs[] = { S500_MUX_KS, + S500_MUX_JTAG, + S500_MUX_NOR, + S500_MUX_PWM0, + S500_MUX_PWM0, + S500_MUX_SENS1, + S500_MUX_PWM0, + S500_MUX_P0 }; +/* mfp1_28_26_ks_in3 */ +static unsigned int ks_in3_mfp_pads[] = { KS_IN3 }; +static unsigned int ks_in3_mfp_funcs[] = { S500_MUX_KS, + S500_MUX_JTAG, + S500_MUX_NOR, + S500_MUX_PWM1, + S500_MUX_RESERVED, + S500_MUX_SENS1 }; +/* mfp1_28_26_ks_out0 */ +static unsigned int ks_out0_mfp_pads[] = { KS_OUT0 }; +static unsigned int ks_out0_mfp_funcs[] = { S500_MUX_KS, + S500_MUX_UART5, + S500_MUX_NOR, + S500_MUX_PWM2, + S500_MUX_RESERVED, + S500_MUX_SENS1, + S500_MUX_SD0 }; +/* mfp1_28_26_ks_out1 */ +static unsigned int ks_out1_mfp_pads[] = { KS_OUT1 }; +static unsigned int ks_out1_mfp_funcs[] = { S500_MUX_KS, + S500_MUX_JTAG, + S500_MUX_NOR, + S500_MUX_PWM3, + S500_MUX_RESERVED, + S500_MUX_SENS1, + S500_MUX_SD0 }; +/* mfp1_25_23 */ +static unsigned int ks_out2_mfp_pads[] = { KS_OUT2 }; +static unsigned int ks_out2_mfp_funcs[] = { S500_MUX_SD0, + S500_MUX_KS, + S500_MUX_NOR, + S500_MUX_PWM2, + S500_MUX_UART5, + S500_MUX_SENS1 }; +/* mfp1_22_21 */ +static unsigned int lvds_o_pn_mfp_pads[] = { LVDS_OEP, LVDS_OEN, + LVDS_ODP, LVDS_ODN, + LVDS_OCP, LVDS_OCN, + LVDS_OBP, LVDS_OBN, + LVDS_OAP, LVDS_OAN }; +static unsigned int lvds_o_pn_mfp_funcs[] = { S500_MUX_LVDS, + S500_MUX_TS, + S500_MUX_LCD0 }; +/* mfp1_20_19 */ +static unsigned int dsi_dn0_mfp_pads[] = { DSI_DN0 }; +static unsigned int dsi_dn0_mfp_funcs[] = { S500_MUX_DSI, + S500_MUX_UART2, + S500_MUX_SPI0 }; +/* mfp1_18_17 */ +static unsigned int dsi_dp2_mfp_pads[] = { DSI_DP2 }; +static unsigned int dsi_dp2_mfp_funcs[] = { S500_MUX_DSI, + S500_MUX_UART2, + S500_MUX_SPI0, + S500_MUX_SD1 }; +/* mfp1_16_14 */ +static unsigned int lcd0_d17_mfp_pads[] = { LCD0_D17 }; +static unsigned int lcd0_d17_mfp_funcs[] = { S500_MUX_NOR, + S500_MUX_SD0, + S500_MUX_SD1, + S500_MUX_PWM3, + S500_MUX_LCD0 }; +/* mfp1_13_12 */ +static unsigned int dsi_dp3_mfp_pads[] = { DSI_DP3 }; +static unsigned int dsi_dp3_mfp_funcs[] = { S500_MUX_DSI, + S500_MUX_SD0, + S500_MUX_SD1, + S500_MUX_LCD0 }; +/* mfp1_11_10 */ +static unsigned int dsi_dn3_mfp_pads[] = { DSI_DN3 }; +static unsigned int dsi_dn3_mfp_funcs[] = { S500_MUX_DSI, + S500_MUX_RESERVED, + S500_MUX_SD1, + S500_MUX_LCD0 }; +/* mfp1_9_7 */ +static unsigned int dsi_dp0_mfp_pads[] = { DSI_DP0 }; +static unsigned int dsi_dp0_mfp_funcs[] = { S500_MUX_DSI, + S500_MUX_RESERVED, + S500_MUX_SD0, + S500_MUX_UART2, + S500_MUX_SPI0 }; +/* mfp1_6_5 */ +static unsigned int lvds_ee_pn_mfp_pads[] = { LVDS_EEP, LVDS_EEN }; +static unsigned int lvds_ee_pn_mfp_funcs[] = { S500_MUX_LVDS, + S500_MUX_NOR, + S500_MUX_TS, + S500_MUX_LCD0 }; +/* mfp1_4_3 */ +static unsigned int spi0_i2c_pcm_mfp_pads[] = { SPI0_SCLK, SPI0_MOSI }; +static unsigned int spi0_i2c_pcm_mfp_funcs[] = { S500_MUX_SPI0, + S500_MUX_NOR, + S500_MUX_I2C3, + S500_MUX_PCM0 }; +/* mfp1_2_0 */ +static unsigned int spi0_i2s_pcm_mfp_pads[] = { SPI0_SS, SPI0_MISO }; +static unsigned int spi0_i2s_pcm_mfp_funcs[] = { S500_MUX_SPI0, + S500_MUX_NOR, + S500_MUX_I2S1, + S500_MUX_PCM1, + S500_MUX_PCM0 }; +/* mfp2_31 reserved */ +/* mfp2_30_29 */ +static unsigned int dsi_dnp1_cp_mfp_pads[] = { DSI_DP1, DSI_CP, DSI_CN }; +static unsigned int dsi_dnp1_cp_mfp_funcs[] = { S500_MUX_DSI, + S500_MUX_SD1, + S500_MUX_LCD0 }; +/* mfp2_28_27 */ +static unsigned int lvds_e_pn_mfp_pads[] = { LVDS_EDP, LVDS_EDN, + LVDS_ECP, LVDS_ECN, + LVDS_EBP, LVDS_EBN, + LVDS_EAP, LVDS_EAN }; +static unsigned int lvds_e_pn_mfp_funcs[] = { S500_MUX_LVDS, + S500_MUX_NOR, + S500_MUX_LCD0 }; +/* mfp2_26_24 */ +static unsigned int dsi_dn2_mfp_pads[] = { DSI_DN2 }; +static unsigned int dsi_dn2_mfp_funcs[] = { S500_MUX_DSI, + S500_MUX_RESERVED, + S500_MUX_SD1, + S500_MUX_UART2, + S500_MUX_SPI0 }; +/* mfp2_23 */ +static unsigned int uart2_rtsb_mfp_pads[] = { UART2_RTSB }; +static unsigned int uart2_rtsb_mfp_funcs[] = { S500_MUX_UART2, + S500_MUX_UART0 }; +/* mfp2_22 */ +static unsigned int uart2_ctsb_mfp_pads[] = { UART2_CTSB }; +static unsigned int uart2_ctsb_mfp_funcs[] = { S500_MUX_UART2, + S500_MUX_UART0 }; +/* mfp2_21 */ +static unsigned int uart3_rtsb_mfp_pads[] = { UART3_RTSB }; +static unsigned int uart3_rtsb_mfp_funcs[] = { S500_MUX_UART3, + S500_MUX_UART5 }; +/* mfp2_20 */ +static unsigned int uart3_ctsb_mfp_pads[] = { UART3_CTSB }; +static unsigned int uart3_ctsb_mfp_funcs[] = { S500_MUX_UART3, + S500_MUX_UART5 }; +/* mfp2_19_17 */ +static unsigned int sd0_d0_mfp_pads[] = { SD0_D0 }; +static unsigned int sd0_d0_mfp_funcs[] = { S500_MUX_SD0, + S500_MUX_NOR, + S500_MUX_RESERVED, + S500_MUX_JTAG, + S500_MUX_UART2, + S500_MUX_UART5 }; +/* mfp2_16_14 */ +static unsigned int sd0_d1_mfp_pads[] = { SD0_D1 }; +static unsigned int sd0_d1_mfp_funcs[] = { S500_MUX_SD0, + S500_MUX_NOR, + S500_MUX_RESERVED, + S500_MUX_RESERVED, + S500_MUX_UART2, + S500_MUX_UART5 }; +/* mfp2_13_11 */ +static unsigned int sd0_d2_d3_mfp_pads[] = { SD0_D2, SD0_D3 }; +static unsigned int sd0_d2_d3_mfp_funcs[] = { S500_MUX_SD0, + S500_MUX_NOR, + S500_MUX_RESERVED, + S500_MUX_JTAG, + S500_MUX_UART2, + S500_MUX_UART1 }; +/* mfp2_10_9 */ +static unsigned int sd1_d0_d3_mfp_pads[] = { SD1_D0, SD1_D1, + SD1_D2, SD1_D3 }; +static unsigned int sd1_d0_d3_mfp_funcs[] = { S500_MUX_SD0, + S500_MUX_NOR, + S500_MUX_RESERVED, + S500_MUX_SD1 }; +/* mfp2_8_7 */ +static unsigned int sd0_cmd_mfp_pads[] = { SD0_CMD }; +static unsigned int sd0_cmd_mfp_funcs[] = { S500_MUX_SD0, + S500_MUX_NOR, + S500_MUX_RESERVED, + S500_MUX_JTAG }; +/* mfp2_6_5 */ +static unsigned int sd0_clk_mfp_pads[] = { SD0_CLK }; +static unsigned int sd0_clk_mfp_funcs[] = { S500_MUX_SD0, + S500_MUX_RESERVED, + S500_MUX_JTAG }; +/* mfp2_4_3 */ +static unsigned int sd1_cmd_mfp_pads[] = { SD1_CMD }; +static unsigned int sd1_cmd_mfp_funcs[] = { S500_MUX_SD1, + S500_MUX_NOR }; +/* mfp2_2_0 */ +static unsigned int uart0_rx_mfp_pads[] = { UART0_RX }; +static unsigned int uart0_rx_mfp_funcs[] = { S500_MUX_UART0, + S500_MUX_UART2, + S500_MUX_SPI1, + S500_MUX_I2C0, + S500_MUX_PCM1, + S500_MUX_I2S1 }; +/* mfp3_31 reserved */ +/* mfp3_30 */ +static unsigned int clko_25m_mfp_pads[] = { CLKO_25M }; +static unsigned int clko_25m_mfp_funcs[] = { S500_MUX_RESERVED, + S500_MUX_CLKO_25M }; +/* mfp3_29_28 */ +static unsigned int csi_cn_cp_mfp_pads[] = { CSI_CN, CSI_CP }; +static unsigned int csi_cn_cp_mfp_funcs[] = { S500_MUX_MIPI_CSI, + S500_MUX_SENS0 }; +/* mfp3_27_24 reserved */ +/* mfp3_23_22 */ +static unsigned int sens0_ckout_mfp_pads[] = { SENSOR0_CKOUT }; +static unsigned int sens0_ckout_mfp_funcs[] = { S500_MUX_SENS0, + S500_MUX_NOR, + S500_MUX_SENS1, + S500_MUX_PWM1 }; +/* mfp3_21_19 */ +static unsigned int uart0_tx_mfp_pads[] = { UART0_TX }; +static unsigned int uart0_tx_mfp_funcs[] = { S500_MUX_UART0, + S500_MUX_UART2, + S500_MUX_SPI1, + S500_MUX_I2C0, + S500_MUX_SPDIF, + S500_MUX_PCM1, + S500_MUX_I2S1 }; +/* mfp3_18_16 */ +static unsigned int i2c0_mfp_pads[] = { I2C0_SCLK, + I2C0_SDATA }; +static unsigned int i2c0_mfp_funcs[] = { S500_MUX_I2C0, + S500_MUX_UART2, + S500_MUX_I2C1, + S500_MUX_UART1, + S500_MUX_SPI1 }; +/* mfp3_15_14 */ +static unsigned int csi_dn_dp_mfp_pads[] = { CSI_DN0, CSI_DN1, + CSI_DN2, CSI_DN3, + CSI_DP0, CSI_DP1, + CSI_DP2, CSI_DP3 }; +static unsigned int csi_dn_dp_mfp_funcs[] = { S500_MUX_MIPI_CSI, + S500_MUX_SENS0 }; +/* mfp3_13_12 */ +static unsigned int sen0_pclk_mfp_pads[] = { SENSOR0_PCLK }; +static unsigned int sen0_pclk_mfp_funcs[] = { S500_MUX_SENS0, + S500_MUX_NOR, + S500_MUX_PWM0 }; +/* mfp3_11_10 */ +static unsigned int pcm1_in_mfp_pads[] = { PCM1_IN }; +static unsigned int pcm1_in_mfp_funcs[] = { S500_MUX_PCM1, + S500_MUX_SENS1, + S500_MUX_UART4, + S500_MUX_PWM4 }; +/* mfp3_9_8 */ +static unsigned int pcm1_clk_mfp_pads[] = { PCM1_CLK }; +static unsigned int pcm1_clk_mfp_funcs[] = { S500_MUX_PCM1, + S500_MUX_SENS1, + S500_MUX_UART4, + S500_MUX_PWM5 }; +/* mfp3_7_6 */ +static unsigned int pcm1_sync_mfp_pads[] = { PCM1_SYNC }; +static unsigned int pcm1_sync_mfp_funcs[] = { S500_MUX_PCM1, + S500_MUX_SENS1, + S500_MUX_UART6, + S500_MUX_I2C3 }; +/* mfp3_5_4 */ +static unsigned int pcm1_out_mfp_pads[] = { PCM1_OUT }; +static unsigned int pcm1_out_mfp_funcs[] = { S500_MUX_PCM1, + S500_MUX_SENS1, + S500_MUX_UART6, + S500_MUX_I2C3 }; +/* mfp3_3 */ +static unsigned int dnand_data_wr_mfp_pads[] = { DNAND_D0, DNAND_D1, + DNAND_D2, DNAND_D3, + DNAND_D4, DNAND_D5, + DNAND_D6, DNAND_D7, + DNAND_RDB, DNAND_RDBN }; +static unsigned int dnand_data_wr_mfp_funcs[] = { S500_MUX_NAND, + S500_MUX_SD2 }; +/* mfp3_2 */ +static unsigned int dnand_acle_ce0_mfp_pads[] = { DNAND_ALE, + DNAND_CLE, + DNAND_CEB0, + DNAND_CEB1 }; +static unsigned int dnand_acle_ce0_mfp_funcs[] = { S500_MUX_NAND, + S500_MUX_SPI2 }; +/* mfp3_1_0_nand_ceb2 */ +static unsigned int nand_ceb2_mfp_pads[] = { DNAND_CEB2 }; +static unsigned int nand_ceb2_mfp_funcs[] = { S500_MUX_NAND, + S500_MUX_PWM5 }; +/* mfp3_1_0_nand_ceb3 */ +static unsigned int nand_ceb3_mfp_pads[] = { DNAND_CEB3 }; +static unsigned int nand_ceb3_mfp_funcs[] = { S500_MUX_NAND, + S500_MUX_PWM4 }; + +/* PADDRV group data */ +/* paddrv0_29_28 */ +static unsigned int sirq_drv_pads[] = { SIRQ0, SIRQ1, SIRQ2 }; +/* paddrv0_23_22 */ +static unsigned int rmii_txd01_txen_drv_pads[] = { ETH_TXD0, ETH_TXD1, + ETH_TXEN }; +/* paddrv0_21_20 */ +static unsigned int rmii_rxer_drv_pads[] = { ETH_RXER }; +/* paddrv0_19_18 */ +static unsigned int rmii_crs_drv_pads[] = { ETH_CRS_DV }; +/* paddrv0_17_16 */ +static unsigned int rmii_rxd10_drv_pads[] = { ETH_RXD0, ETH_RXD1 }; +/* paddrv0_15_14 */ +static unsigned int rmii_ref_clk_drv_pads[] = { ETH_REF_CLK }; +/* paddrv0_13_12 */ +static unsigned int smi_mdc_mdio_drv_pads[] = { ETH_MDC, ETH_MDIO }; +/* paddrv0_11_10 */ +static unsigned int i2s_d0_drv_pads[] = { I2S_D0 }; +/* paddrv0_9_8 */ +static unsigned int i2s_bclk0_drv_pads[] = { I2S_BCLK0 }; +/* paddrv0_7_6 */ +static unsigned int i2s3_drv_pads[] = { I2S_LRCLK0, I2S_MCLK0, + I2S_D1 }; +/* paddrv0_5_4 */ +static unsigned int i2s13_drv_pads[] = { I2S_BCLK1, I2S_LRCLK1, + I2S_MCLK1 }; +/* paddrv0_3_2 */ +static unsigned int pcm1_drv_pads[] = { PCM1_IN, PCM1_CLK, + PCM1_SYNC, PCM1_OUT }; +/* paddrv0_1_0 */ +static unsigned int ks_in_drv_pads[] = { KS_IN0, KS_IN1, + KS_IN2, KS_IN3 }; +/* paddrv1_31_30 */ +static unsigned int ks_out_drv_pads[] = { KS_OUT0, KS_OUT1, KS_OUT2 }; +/* paddrv1_29_28 */ +static unsigned int lvds_all_drv_pads[] = { LVDS_OEP, LVDS_OEN, + LVDS_ODP, LVDS_ODN, + LVDS_OCP, LVDS_OCN, + LVDS_OBP, LVDS_OBN, + LVDS_OAP, LVDS_OAN, + LVDS_EEP, LVDS_EEN, + LVDS_EDP, LVDS_EDN, + LVDS_ECP, LVDS_ECN, + LVDS_EBP, LVDS_EBN, + LVDS_EAP, LVDS_EAN }; +/* paddrv1_27_26 */ +static unsigned int lcd_dsi_drv_pads[] = { DSI_DP3, DSI_DN3, DSI_DP1, + DSI_DN1, DSI_CP, DSI_CN }; +/* paddrv1_25_24 */ +static unsigned int dsi_drv_pads[] = { DSI_DP0, DSI_DN0, + DSI_DP2, DSI_DN2 }; +/* paddrv1_23_22 */ +static unsigned int sd0_d0_d3_drv_pads[] = { SD0_D0, SD0_D1, + SD0_D2, SD0_D3 }; +/* paddrv1_21_20 */ +static unsigned int sd1_d0_d3_drv_pads[] = { SD1_D0, SD1_D1, + SD1_D2, SD1_D3 }; +/* paddrv1_19_18 */ +static unsigned int sd0_cmd_drv_pads[] = { SD0_CMD }; +/* paddrv1_17_16 */ +static unsigned int sd0_clk_drv_pads[] = { SD0_CLK }; +/* paddrv1_15_14 */ +static unsigned int sd1_cmd_drv_pads[] = { SD1_CMD }; +/* paddrv1_13_12 */ +static unsigned int sd1_clk_drv_pads[] = { SD1_CLK }; +/* paddrv1_11_10 */ +static unsigned int spi0_all_drv_pads[] = { SPI0_SCLK, SPI0_SS, + SPI0_MISO, SPI0_MOSI }; +/* paddrv2_31_30 */ +static unsigned int uart0_rx_drv_pads[] = { UART0_RX }; +/* paddrv2_29_28 */ +static unsigned int uart0_tx_drv_pads[] = { UART0_TX }; +/* paddrv2_27_26 */ +static unsigned int uart2_all_drv_pads[] = { UART2_RX, UART2_TX, + UART2_RTSB, UART2_CTSB }; +/* paddrv2_24_23 */ +static unsigned int i2c0_all_drv_pads[] = { I2C0_SCLK, I2C0_SDATA }; +/* paddrv2_22_21 */ +static unsigned int i2c12_all_drv_pads[] = { I2C1_SCLK, I2C1_SDATA, + I2C2_SCLK, I2C2_SDATA }; +/* paddrv2_19_18 */ +static unsigned int sens0_pclk_drv_pads[] = { SENSOR0_PCLK }; +/* paddrv2_13_12 */ +static unsigned int sens0_ckout_drv_pads[] = { SENSOR0_CKOUT }; +/* paddrv2_3_2 */ +static unsigned int uart3_all_drv_pads[] = { UART3_RX, UART3_TX, + UART3_RTSB, UART3_CTSB }; + +/* Pinctrl groups */ +static const struct owl_pingroup s500_groups[] = { + MUX_PG(lcd0_d18_mfp, 0, 23, 3), + MUX_PG(rmii_crs_dv_mfp, 0, 20, 3), + MUX_PG(rmii_txd0_mfp, 0, 16, 3), + MUX_PG(rmii_txd1_mfp, 0, 16, 3), + MUX_PG(rmii_txen_mfp, 0, 13, 3), + MUX_PG(rmii_rxen_mfp, 0, 13, 3), + MUX_PG(rmii_rxd1_mfp, 0, 8, 3), + MUX_PG(rmii_rxd0_mfp, 0, 8, 3), + MUX_PG(rmii_ref_clk_mfp, 0, 6, 2), + MUX_PG(i2s_d0_mfp, 0, 5, 1), + MUX_PG(i2s_pcm1_mfp, 0, 3, 2), + MUX_PG(i2s0_pcm0_mfp, 0, 1, 2), + MUX_PG(i2s1_pcm0_mfp, 0, 1, 2), + MUX_PG(i2s_d1_mfp, 0, 0, 1), + MUX_PG(ks_in2_mfp, 1, 29, 3), + MUX_PG(ks_in1_mfp, 1, 29, 3), + MUX_PG(ks_in0_mfp, 1, 29, 3), + MUX_PG(ks_in3_mfp, 1, 26, 3), + MUX_PG(ks_out0_mfp, 1, 26, 3), + MUX_PG(ks_out1_mfp, 1, 26, 3), + MUX_PG(ks_out2_mfp, 1, 23, 3), + MUX_PG(lvds_o_pn_mfp, 1, 21, 2), + MUX_PG(dsi_dn0_mfp, 1, 19, 2), + MUX_PG(dsi_dp2_mfp, 1, 17, 2), + MUX_PG(lcd0_d17_mfp, 1, 14, 3), + MUX_PG(dsi_dp3_mfp, 1, 12, 2), + MUX_PG(dsi_dn3_mfp, 1, 10, 2), + MUX_PG(dsi_dp0_mfp, 1, 7, 3), + MUX_PG(lvds_ee_pn_mfp, 1, 5, 2), + MUX_PG(spi0_i2c_pcm_mfp, 1, 3, 2), + MUX_PG(spi0_i2s_pcm_mfp, 1, 0, 3), + MUX_PG(dsi_dnp1_cp_mfp, 2, 29, 2), + MUX_PG(lvds_e_pn_mfp, 2, 27, 2), + MUX_PG(dsi_dn2_mfp, 2, 24, 3), + MUX_PG(uart2_rtsb_mfp, 2, 23, 1), + MUX_PG(uart2_ctsb_mfp, 2, 22, 1), + MUX_PG(uart3_rtsb_mfp, 2, 21, 1), + MUX_PG(uart3_ctsb_mfp, 2, 20, 1), + MUX_PG(sd0_d0_mfp, 2, 17, 3), + MUX_PG(sd0_d1_mfp, 2, 14, 3), + MUX_PG(sd0_d2_d3_mfp, 2, 11, 3), + MUX_PG(sd1_d0_d3_mfp, 2, 9, 2), + MUX_PG(sd0_cmd_mfp, 2, 7, 2), + MUX_PG(sd0_clk_mfp, 2, 5, 2), + MUX_PG(sd1_cmd_mfp, 2, 3, 2), + MUX_PG(uart0_rx_mfp, 2, 0, 3), + MUX_PG(clko_25m_mfp, 3, 30, 1), + MUX_PG(csi_cn_cp_mfp, 3, 28, 2), + MUX_PG(sens0_ckout_mfp, 3, 22, 2), + MUX_PG(uart0_tx_mfp, 3, 19, 3), + MUX_PG(i2c0_mfp, 3, 16, 3), + MUX_PG(csi_dn_dp_mfp, 3, 14, 2), + MUX_PG(sen0_pclk_mfp, 3, 12, 2), + MUX_PG(pcm1_in_mfp, 3, 10, 2), + MUX_PG(pcm1_clk_mfp, 3, 8, 2), + MUX_PG(pcm1_sync_mfp, 3, 6, 2), + MUX_PG(pcm1_out_mfp, 3, 4, 2), + MUX_PG(dnand_data_wr_mfp, 3, 3, 1), + MUX_PG(dnand_acle_ce0_mfp, 3, 2, 1), + MUX_PG(nand_ceb2_mfp, 3, 0, 2), + MUX_PG(nand_ceb3_mfp, 3, 0, 2), + + DRV_PG(sirq_drv, 0, 28, 2), + DRV_PG(rmii_txd01_txen_drv, 0, 22, 2), + DRV_PG(rmii_rxer_drv, 0, 20, 2), + DRV_PG(rmii_crs_drv, 0, 18, 2), + DRV_PG(rmii_rxd10_drv, 0, 16, 2), + DRV_PG(rmii_ref_clk_drv, 0, 14, 2), + DRV_PG(smi_mdc_mdio_drv, 0, 12, 2), + DRV_PG(i2s_d0_drv, 0, 10, 2), + DRV_PG(i2s_bclk0_drv, 0, 8, 2), + DRV_PG(i2s3_drv, 0, 6, 2), + DRV_PG(i2s13_drv, 0, 4, 2), + DRV_PG(pcm1_drv, 0, 2, 2), + DRV_PG(ks_in_drv, 0, 0, 2), + DRV_PG(ks_out_drv, 1, 30, 2), + DRV_PG(lvds_all_drv, 1, 28, 2), + DRV_PG(lcd_dsi_drv, 1, 26, 2), + DRV_PG(dsi_drv, 1, 24, 2), + DRV_PG(sd0_d0_d3_drv, 1, 22, 2), + DRV_PG(sd1_d0_d3_drv, 1, 20, 2), + DRV_PG(sd0_cmd_drv, 1, 18, 2), + DRV_PG(sd0_clk_drv, 1, 16, 2), + DRV_PG(sd1_cmd_drv, 1, 14, 2), + DRV_PG(sd1_clk_drv, 1, 12, 2), + DRV_PG(spi0_all_drv, 1, 10, 2), + DRV_PG(uart0_rx_drv, 2, 30, 2), + DRV_PG(uart0_tx_drv, 2, 28, 2), + DRV_PG(uart2_all_drv, 2, 26, 2), + DRV_PG(i2c0_all_drv, 2, 23, 2), + DRV_PG(i2c12_all_drv, 2, 21, 2), + DRV_PG(sens0_pclk_drv, 2, 18, 2), + DRV_PG(sens0_ckout_drv, 2, 12, 2), + DRV_PG(uart3_all_drv, 2, 2, 2), +}; + +static const char * const nor_groups[] = { + "lcd0_d18_mfp", + "i2s_d0_mfp", + "i2s0_pcm0_mfp", + "i2s1_pcm0_mfp", + "i2s_d1_mfp", + "ks_in2_mfp", + "ks_in1_mfp", + "ks_in0_mfp", + "ks_in3_mfp", + "ks_out0_mfp", + "ks_out1_mfp", + "ks_out2_mfp", + "lcd0_d17_mfp", + "lvds_ee_pn_mfp", + "spi0_i2c_pcm_mfp", + "spi0_i2s_pcm_mfp", + "lvds_e_pn_mfp", + "sd0_d0_mfp", + "sd0_d1_mfp", + "sd0_d2_d3_mfp", + "sd1_d0_d3_mfp", + "sd0_cmd_mfp", + "sd1_cmd_mfp", + "sens0_ckout_mfp", + "sen0_pclk_mfp", +}; + +static const char * const eth_rmii_groups[] = { + "rmii_crs_dv_mfp", + "rmii_txd0_mfp", + "rmii_txd1_mfp", + "rmii_txen_mfp", + "rmii_rxen_mfp", + "rmii_rxd1_mfp", + "rmii_rxd0_mfp", + "rmii_ref_clk_mfp", +}; + +static const char * const eth_smii_groups[] = { + "rmii_crs_dv_mfp", + "rmii_txd0_mfp", + "rmii_txd1_mfp", + "rmii_ref_clk_mfp", +}; + +static const char * const spi0_groups[] = { + "dsi_dn0_mfp", + "dsi_dp2_mfp", + "dsi_dp0_mfp", + "spi0_i2c_pcm_mfp", + "spi0_i2s_pcm_mfp", + "dsi_dn2_mfp", +}; + +static const char * const spi1_groups[] = { + "uart0_rx_mfp", + "uart0_tx_mfp", + "i2c0_mfp", +}; + +static const char * const spi2_groups[] = { + "rmii_crs_dv_mfp", + "rmii_txd0_mfp", + "rmii_txd1_mfp", + "rmii_ref_clk_mfp", + "dnand_acle_ce0_mfp", +}; + +static const char * const spi3_groups[] = { + "rmii_txen_mfp", + "rmii_rxen_mfp", + "rmii_rxd1_mfp", + "rmii_rxd0_mfp", +}; + +static const char * const sens0_groups[] = { + "csi_cn_cp_mfp", + "sens0_ckout_mfp", + "csi_dn_dp_mfp", + "sen0_pclk_mfp", +}; + +static const char * const sens1_groups[] = { + "lcd0_d18_mfp", + "ks_in2_mfp", + "ks_in1_mfp", + "ks_in0_mfp", + "ks_in3_mfp", + "ks_out0_mfp", + "ks_out1_mfp", + "ks_out2_mfp", + "sens0_ckout_mfp", + "pcm1_in_mfp", + "pcm1_clk_mfp", + "pcm1_sync_mfp", + "pcm1_out_mfp", +}; + +static const char * const uart0_groups[] = { + "uart2_rtsb_mfp", + "uart2_ctsb_mfp", + "uart0_rx_mfp", + "uart0_tx_mfp", +}; + +static const char * const uart1_groups[] = { + "sd0_d2_d3_mfp", + "i2c0_mfp", +}; + +static const char * const uart2_groups[] = { + "rmii_txen_mfp", + "rmii_rxen_mfp", + "rmii_rxd1_mfp", + "rmii_rxd0_mfp", + "dsi_dn0_mfp", + "dsi_dp2_mfp", + "dsi_dp0_mfp", + "dsi_dn2_mfp", + "uart2_rtsb_mfp", + "uart2_ctsb_mfp", + "sd0_d0_mfp", + "sd0_d1_mfp", + "sd0_d2_d3_mfp", + "uart0_rx_mfp", + "uart0_tx_mfp", + "i2c0_mfp", +}; + +static const char * const uart3_groups[] = { + "uart3_rtsb_mfp", + "uart3_ctsb_mfp", +}; + +static const char * const uart4_groups[] = { + "rmii_crs_dv_mfp", + "rmii_ref_clk_mfp", + "pcm1_in_mfp", + "pcm1_clk_mfp", +}; + +static const char * const uart5_groups[] = { + "rmii_rxd1_mfp", + "rmii_rxd0_mfp", + "ks_out0_mfp", + "ks_out2_mfp", + "uart3_rtsb_mfp", + "uart3_ctsb_mfp", + "sd0_d0_mfp", + "sd0_d1_mfp", +}; + +static const char * const uart6_groups[] = { + "rmii_txd0_mfp", + "rmii_txd1_mfp", + "pcm1_sync_mfp", + "pcm1_out_mfp", +}; + +static const char * const i2s0_groups[] = { + "i2s_d0_mfp", + "i2s_pcm1_mfp", + "i2s0_pcm0_mfp", +}; + +static const char * const i2s1_groups[] = { + "i2s1_pcm0_mfp", + "i2s_d1_mfp", + "spi0_i2s_pcm_mfp", + "uart0_rx_mfp", + "uart0_tx_mfp", +}; + +static const char * const pcm1_groups[] = { + "i2s_pcm1_mfp", + "spi0_i2s_pcm_mfp", + "uart0_rx_mfp", + "uart0_tx_mfp", + "pcm1_in_mfp", + "pcm1_clk_mfp", + "pcm1_sync_mfp", + "pcm1_out_mfp", +}; + +static const char * const pcm0_groups[] = { + "i2s0_pcm0_mfp", + "i2s1_pcm0_mfp", + "spi0_i2c_pcm_mfp", + "spi0_i2s_pcm_mfp", +}; + +static const char * const ks_groups[] = { + "ks_in2_mfp", + "ks_in1_mfp", + "ks_in0_mfp", + "ks_in3_mfp", + "ks_out0_mfp", + "ks_out1_mfp", + "ks_out2_mfp", +}; + +static const char * const jtag_groups[] = { + "ks_in2_mfp", + "ks_in1_mfp", + "ks_in0_mfp", + "ks_in3_mfp", + "ks_out1_mfp", + "sd0_d0_mfp", + "sd0_d2_d3_mfp", + "sd0_cmd_mfp", + "sd0_clk_mfp", +}; + +static const char * const pwm0_groups[] = { + "ks_in2_mfp", + "ks_in0_mfp", + "rmii_txen_mfp", + "sen0_pclk_mfp", +}; + +static const char * const pwm1_groups[] = { + "rmii_rxen_mfp", + "ks_in1_mfp", + "ks_in3_mfp", + "sens0_ckout_mfp", +}; + +static const char * const pwm2_groups[] = { + "lcd0_d18_mfp", + "rmii_rxd1_mfp", + "ks_out0_mfp", + "ks_out2_mfp", +}; + +static const char * const pwm3_groups[] = { + "rmii_rxd0_mfp", + "ks_out1_mfp", + "lcd0_d17_mfp", +}; + +static const char * const pwm4_groups[] = { + "lcd0_d18_mfp", + "rmii_crs_dv_mfp", + "rmii_txd0_mfp", + "ks_in0_mfp", + "pcm1_in_mfp", + "nand_ceb3_mfp", +}; + +static const char * const pwm5_groups[] = { + "rmii_txd1_mfp", + "ks_in1_mfp", + "pcm1_clk_mfp", + "nand_ceb2_mfp", +}; + +static const char * const p0_groups[] = { + "ks_in2_mfp", + "ks_in0_mfp", +}; + +static const char * const sd0_groups[] = { + "ks_out0_mfp", + "ks_out1_mfp", + "ks_out2_mfp", + "lcd0_d17_mfp", + "dsi_dp3_mfp", + "dsi_dp0_mfp", + "sd0_d0_mfp", + "sd0_d1_mfp", + "sd0_d2_d3_mfp", + "sd1_d0_d3_mfp", + "sd0_cmd_mfp", + "sd0_clk_mfp", +}; + +static const char * const sd1_groups[] = { + "dsi_dp2_mfp", + "lcd0_d17_mfp", + "dsi_dp3_mfp", + "dsi_dn3_mfp", + "dsi_dnp1_cp_mfp", + "dsi_dn2_mfp", + "sd1_d0_d3_mfp", + "sd1_cmd_mfp", +}; + +static const char * const sd2_groups[] = { + "dnand_data_wr_mfp", +}; + +static const char * const i2c0_groups[] = { + "uart0_rx_mfp", + "uart0_tx_mfp", + "i2c0_mfp", +}; + +static const char * const i2c1_groups[] = { + "i2c0_mfp", +}; + +static const char * const i2c3_groups[] = { + "spi0_i2c_pcm_mfp", + "pcm1_sync_mfp", + "pcm1_out_mfp", +}; + +static const char * const lvds_groups[] = { + "lvds_o_pn_mfp", + "lvds_ee_pn_mfp", + "lvds_e_pn_mfp", +}; + +static const char * const ts_groups[] = { + "lvds_o_pn_mfp", + "lvds_ee_pn_mfp", +}; + +static const char * const lcd0_groups[] = { + "lcd0_d18_mfp", + "lcd0_d17_mfp", + "lvds_o_pn_mfp", + "dsi_dp3_mfp", + "dsi_dn3_mfp", + "lvds_ee_pn_mfp", + "dsi_dnp1_cp_mfp", + "lvds_e_pn_mfp", +}; + +static const char * const usb30_groups[] = { + "ks_in1_mfp", +}; + +static const char * const clko_25m_groups[] = { + "clko_25m_mfp", +}; + +static const char * const mipi_csi_groups[] = { + "csi_cn_cp_mfp", + "csi_dn_dp_mfp", +}; + +static const char * const dsi_groups[] = { + "dsi_dn0_mfp", + "dsi_dp2_mfp", + "dsi_dp3_mfp", + "dsi_dn3_mfp", + "dsi_dp0_mfp", + "dsi_dnp1_cp_mfp", + "dsi_dn2_mfp", +}; + +static const char * const nand_groups[] = { + "dnand_data_wr_mfp", + "dnand_acle_ce0_mfp", + "nand_ceb2_mfp", + "nand_ceb3_mfp", +}; + +static const char * const spdif_groups[] = { + "uart0_tx_mfp", +}; + +static const struct owl_pinmux_func s500_functions[] = { + [S500_MUX_NOR] = FUNCTION(nor), + [S500_MUX_ETH_RMII] = FUNCTION(eth_rmii), + [S500_MUX_ETH_SMII] = FUNCTION(eth_smii), + [S500_MUX_SPI0] = FUNCTION(spi0), + [S500_MUX_SPI1] = FUNCTION(spi1), + [S500_MUX_SPI2] = FUNCTION(spi2), + [S500_MUX_SPI3] = FUNCTION(spi3), + [S500_MUX_SENS0] = FUNCTION(sens0), + [S500_MUX_SENS1] = FUNCTION(sens1), + [S500_MUX_UART0] = FUNCTION(uart0), + [S500_MUX_UART1] = FUNCTION(uart1), + [S500_MUX_UART2] = FUNCTION(uart2), + [S500_MUX_UART3] = FUNCTION(uart3), + [S500_MUX_UART4] = FUNCTION(uart4), + [S500_MUX_UART5] = FUNCTION(uart5), + [S500_MUX_UART6] = FUNCTION(uart6), + [S500_MUX_I2S0] = FUNCTION(i2s0), + [S500_MUX_I2S1] = FUNCTION(i2s1), + [S500_MUX_PCM1] = FUNCTION(pcm1), + [S500_MUX_PCM0] = FUNCTION(pcm0), + [S500_MUX_KS] = FUNCTION(ks), + [S500_MUX_JTAG] = FUNCTION(jtag), + [S500_MUX_PWM0] = FUNCTION(pwm0), + [S500_MUX_PWM1] = FUNCTION(pwm1), + [S500_MUX_PWM2] = FUNCTION(pwm2), + [S500_MUX_PWM3] = FUNCTION(pwm3), + [S500_MUX_PWM4] = FUNCTION(pwm4), + [S500_MUX_PWM5] = FUNCTION(pwm5), + [S500_MUX_P0] = FUNCTION(p0), + [S500_MUX_SD0] = FUNCTION(sd0), + [S500_MUX_SD1] = FUNCTION(sd1), + [S500_MUX_SD2] = FUNCTION(sd2), + [S500_MUX_I2C0] = FUNCTION(i2c0), + [S500_MUX_I2C1] = FUNCTION(i2c1), + /*[S500_MUX_I2C2] = FUNCTION(i2c2),*/ + [S500_MUX_I2C3] = FUNCTION(i2c3), + [S500_MUX_DSI] = FUNCTION(dsi), + [S500_MUX_LVDS] = FUNCTION(lvds), + [S500_MUX_USB30] = FUNCTION(usb30), + [S500_MUX_CLKO_25M] = FUNCTION(clko_25m), + [S500_MUX_MIPI_CSI] = FUNCTION(mipi_csi), + [S500_MUX_NAND] = FUNCTION(nand), + [S500_MUX_SPDIF] = FUNCTION(spdif), + /*[S500_MUX_SIRQ0] = FUNCTION(sirq0),*/ + /*[S500_MUX_SIRQ1] = FUNCTION(sirq1),*/ + /*[S500_MUX_SIRQ2] = FUNCTION(sirq2),*/ + [S500_MUX_TS] = FUNCTION(ts), + [S500_MUX_LCD0] = FUNCTION(lcd0), +}; + +/* PAD_ST0 */ +static PAD_ST_CONF(I2C0_SDATA, 0, 30, 1); +static PAD_ST_CONF(UART0_RX, 0, 29, 1); +static PAD_ST_CONF(I2S_MCLK1, 0, 23, 1); +static PAD_ST_CONF(ETH_REF_CLK, 0, 22, 1); +static PAD_ST_CONF(ETH_TXEN, 0, 21, 1); +static PAD_ST_CONF(ETH_TXD0, 0, 20, 1); +static PAD_ST_CONF(I2S_LRCLK1, 0, 19, 1); +static PAD_ST_CONF(DSI_DP0, 0, 16, 1); +static PAD_ST_CONF(DSI_DN0, 0, 15, 1); +static PAD_ST_CONF(UART0_TX, 0, 14, 1); +static PAD_ST_CONF(SPI0_SCLK, 0, 13, 1); +static PAD_ST_CONF(SD0_CLK, 0, 12, 1); +static PAD_ST_CONF(KS_IN0, 0, 11, 1); +static PAD_ST_CONF(SENSOR0_PCLK, 0, 9, 1); +static PAD_ST_CONF(I2C0_SCLK, 0, 7, 1); +static PAD_ST_CONF(KS_OUT0, 0, 6, 1); +static PAD_ST_CONF(KS_OUT1, 0, 5, 1); +static PAD_ST_CONF(KS_OUT2, 0, 4, 1); + +/* PAD_ST1 */ +static PAD_ST_CONF(DSI_DP2, 1, 31, 1); +static PAD_ST_CONF(DSI_DN2, 1, 30, 1); +static PAD_ST_CONF(I2S_LRCLK0, 1, 29, 1); +static PAD_ST_CONF(UART3_CTSB, 1, 27, 1); +static PAD_ST_CONF(UART3_RTSB, 1, 26, 1); +static PAD_ST_CONF(UART3_RX, 1, 25, 1); +static PAD_ST_CONF(UART2_RTSB, 1, 24, 1); +static PAD_ST_CONF(UART2_CTSB, 1, 23, 1); +static PAD_ST_CONF(UART2_RX, 1, 22, 1); +static PAD_ST_CONF(ETH_RXD0, 1, 21, 1); +static PAD_ST_CONF(ETH_RXD1, 1, 20, 1); +static PAD_ST_CONF(ETH_CRS_DV, 1, 19, 1); +static PAD_ST_CONF(ETH_RXER, 1, 18, 1); +static PAD_ST_CONF(ETH_TXD1, 1, 17, 1); +static PAD_ST_CONF(LVDS_OAP, 1, 12, 1); +static PAD_ST_CONF(PCM1_CLK, 1, 11, 1); +static PAD_ST_CONF(PCM1_IN, 1, 10, 1); +static PAD_ST_CONF(PCM1_SYNC, 1, 9, 1); +static PAD_ST_CONF(I2C1_SCLK, 1, 8, 1); +static PAD_ST_CONF(I2C1_SDATA, 1, 7, 1); +static PAD_ST_CONF(I2C2_SCLK, 1, 6, 1); +static PAD_ST_CONF(I2C2_SDATA, 1, 5, 1); +static PAD_ST_CONF(SPI0_MOSI, 1, 4, 1); +static PAD_ST_CONF(SPI0_MISO, 1, 3, 1); +static PAD_ST_CONF(SPI0_SS, 1, 2, 1); +static PAD_ST_CONF(I2S_BCLK0, 1, 1, 1); +static PAD_ST_CONF(I2S_MCLK0, 1, 0, 1); + +/* PAD_PULLCTL0 */ +static PAD_PULLCTL_CONF(PCM1_SYNC, 0, 30, 1); +static PAD_PULLCTL_CONF(PCM1_OUT, 0, 29, 1); +static PAD_PULLCTL_CONF(KS_OUT2, 0, 28, 1); +static PAD_PULLCTL_CONF(LCD0_D17, 0, 27, 1); +static PAD_PULLCTL_CONF(DSI_DN3, 0, 26, 1); +static PAD_PULLCTL_CONF(ETH_RXER, 0, 16, 1); +static PAD_PULLCTL_CONF(SIRQ0, 0, 14, 2); +static PAD_PULLCTL_CONF(SIRQ1, 0, 12, 2); +static PAD_PULLCTL_CONF(SIRQ2, 0, 10, 2); +static PAD_PULLCTL_CONF(I2C0_SDATA, 0, 9, 1); +static PAD_PULLCTL_CONF(I2C0_SCLK, 0, 8, 1); +static PAD_PULLCTL_CONF(KS_IN0, 0, 7, 1); +static PAD_PULLCTL_CONF(KS_IN1, 0, 6, 1); +static PAD_PULLCTL_CONF(KS_IN2, 0, 5, 1); +static PAD_PULLCTL_CONF(KS_IN3, 0, 4, 1); +static PAD_PULLCTL_CONF(KS_OUT0, 0, 2, 1); +static PAD_PULLCTL_CONF(KS_OUT1, 0, 1, 1); +static PAD_PULLCTL_CONF(DSI_DP1, 0, 0, 1); + +/* PAD_PULLCTL1 */ +static PAD_PULLCTL_CONF(DSI_CP, 1, 31, 1); +static PAD_PULLCTL_CONF(DSI_CN, 1, 30, 1); +static PAD_PULLCTL_CONF(DSI_DN2, 1, 28, 1); +static PAD_PULLCTL_CONF(DNAND_RDBN, 1, 25, 1); +static PAD_PULLCTL_CONF(SD0_D0, 1, 17, 1); +static PAD_PULLCTL_CONF(SD0_D1, 1, 16, 1); +static PAD_PULLCTL_CONF(SD0_D2, 1, 15, 1); +static PAD_PULLCTL_CONF(SD0_D3, 1, 14, 1); +static PAD_PULLCTL_CONF(SD0_CMD, 1, 13, 1); +static PAD_PULLCTL_CONF(SD0_CLK, 1, 12, 1); +static PAD_PULLCTL_CONF(SD1_CMD, 1, 11, 1); +static PAD_PULLCTL_CONF(SD1_D0, 1, 6, 1); +static PAD_PULLCTL_CONF(SD1_D1, 1, 5, 1); +static PAD_PULLCTL_CONF(SD1_D2, 1, 4, 1); +static PAD_PULLCTL_CONF(SD1_D3, 1, 3, 1); +static PAD_PULLCTL_CONF(UART0_RX, 1, 2, 1); +static PAD_PULLCTL_CONF(UART0_TX, 1, 1, 1); +static PAD_PULLCTL_CONF(CLKO_25M, 1, 0, 1); + +/* PAD_PULLCTL2 */ +static PAD_PULLCTL_CONF(SPI0_SCLK, 2, 12, 1); +static PAD_PULLCTL_CONF(SPI0_MOSI, 2, 11, 1); +static PAD_PULLCTL_CONF(I2C1_SDATA, 2, 10, 1); +static PAD_PULLCTL_CONF(I2C1_SCLK, 2, 9, 1); +static PAD_PULLCTL_CONF(I2C2_SDATA, 2, 8, 1); +static PAD_PULLCTL_CONF(I2C2_SCLK, 2, 7, 1); +static PAD_PULLCTL_CONF(DNAND_DQSN, 2, 5, 2); +static PAD_PULLCTL_CONF(DNAND_DQS, 2, 3, 2); +static PAD_PULLCTL_CONF(DNAND_D0, 2, 2, 1); +static PAD_PULLCTL_CONF(DNAND_D1, 2, 2, 1); +static PAD_PULLCTL_CONF(DNAND_D2, 2, 2, 1); +static PAD_PULLCTL_CONF(DNAND_D3, 2, 2, 1); +static PAD_PULLCTL_CONF(DNAND_D4, 2, 2, 1); +static PAD_PULLCTL_CONF(DNAND_D5, 2, 2, 1); +static PAD_PULLCTL_CONF(DNAND_D6, 2, 2, 1); +static PAD_PULLCTL_CONF(DNAND_D7, 2, 2, 1); + +/* Pad info table */ +static struct owl_padinfo s500_padinfo[NUM_PADS] = { + [DNAND_DQS] = PAD_INFO_PULLCTL(DNAND_DQS), + [DNAND_DQSN] = PAD_INFO_PULLCTL(DNAND_DQSN), + [ETH_TXD0] = PAD_INFO_ST(ETH_TXD0), + [ETH_TXD1] = PAD_INFO_ST(ETH_TXD1), + [ETH_TXEN] = PAD_INFO_ST(ETH_TXEN), + [ETH_RXER] = PAD_INFO_PULLCTL_ST(ETH_RXER), + [ETH_CRS_DV] = PAD_INFO_ST(ETH_CRS_DV), + [ETH_RXD1] = PAD_INFO_ST(ETH_RXD1), + [ETH_RXD0] = PAD_INFO_ST(ETH_RXD0), + [ETH_REF_CLK] = PAD_INFO_ST(ETH_REF_CLK), + [ETH_MDC] = PAD_INFO(ETH_MDC), + [ETH_MDIO] = PAD_INFO(ETH_MDIO), + [SIRQ0] = PAD_INFO_PULLCTL(SIRQ0), + [SIRQ1] = PAD_INFO_PULLCTL(SIRQ1), + [SIRQ2] = PAD_INFO_PULLCTL(SIRQ2), + [I2S_D0] = PAD_INFO(I2S_D0), + [I2S_BCLK0] = PAD_INFO_ST(I2S_BCLK0), + [I2S_LRCLK0] = PAD_INFO_ST(I2S_LRCLK0), + [I2S_MCLK0] = PAD_INFO_ST(I2S_MCLK0), + [I2S_D1] = PAD_INFO(I2S_D1), + [I2S_BCLK1] = PAD_INFO(I2S_BCLK1), + [I2S_LRCLK1] = PAD_INFO_ST(I2S_LRCLK1), + [I2S_MCLK1] = PAD_INFO_ST(I2S_MCLK1), + [KS_IN0] = PAD_INFO_PULLCTL_ST(KS_IN0), + [KS_IN1] = PAD_INFO_PULLCTL(KS_IN1), + [KS_IN2] = PAD_INFO_PULLCTL(KS_IN2), + [KS_IN3] = PAD_INFO_PULLCTL(KS_IN3), + [KS_OUT0] = PAD_INFO_PULLCTL_ST(KS_OUT0), + [KS_OUT1] = PAD_INFO_PULLCTL_ST(KS_OUT1), + [KS_OUT2] = PAD_INFO_PULLCTL_ST(KS_OUT2), + [LVDS_OEP] = PAD_INFO(LVDS_OEP), + [LVDS_OEN] = PAD_INFO(LVDS_OEN), + [LVDS_ODP] = PAD_INFO(LVDS_ODP), + [LVDS_ODN] = PAD_INFO(LVDS_ODN), + [LVDS_OCP] = PAD_INFO(LVDS_OCP), + [LVDS_OCN] = PAD_INFO(LVDS_OCN), + [LVDS_OBP] = PAD_INFO(LVDS_OBP), + [LVDS_OBN] = PAD_INFO(LVDS_OBN), + [LVDS_OAP] = PAD_INFO_ST(LVDS_OAP), + [LVDS_OAN] = PAD_INFO(LVDS_OAN), + [LVDS_EEP] = PAD_INFO(LVDS_EEP), + [LVDS_EEN] = PAD_INFO(LVDS_EEN), + [LVDS_EDP] = PAD_INFO(LVDS_EDP), + [LVDS_EDN] = PAD_INFO(LVDS_EDN), + [LVDS_ECP] = PAD_INFO(LVDS_ECP), + [LVDS_ECN] = PAD_INFO(LVDS_ECN), + [LVDS_EBP] = PAD_INFO(LVDS_EBP), + [LVDS_EBN] = PAD_INFO(LVDS_EBN), + [LVDS_EAP] = PAD_INFO(LVDS_EAP), + [LVDS_EAN] = PAD_INFO(LVDS_EAN), + [LCD0_D18] = PAD_INFO(LCD0_D18), + [LCD0_D17] = PAD_INFO_PULLCTL(LCD0_D17), + [DSI_DP3] = PAD_INFO(DSI_DP3), + [DSI_DN3] = PAD_INFO_PULLCTL(DSI_DN3), + [DSI_DP1] = PAD_INFO_PULLCTL(DSI_DP1), + [DSI_DN1] = PAD_INFO(DSI_DN1), + [DSI_CP] = PAD_INFO_PULLCTL(DSI_CP), + [DSI_CN] = PAD_INFO_PULLCTL(DSI_CN), + [DSI_DP0] = PAD_INFO_ST(DSI_DP0), + [DSI_DN0] = PAD_INFO_ST(DSI_DN0), + [DSI_DP2] = PAD_INFO_ST(DSI_DP2), + [DSI_DN2] = PAD_INFO_PULLCTL_ST(DSI_DN2), + [SD0_D0] = PAD_INFO_PULLCTL(SD0_D0), + [SD0_D1] = PAD_INFO_PULLCTL(SD0_D1), + [SD0_D2] = PAD_INFO_PULLCTL(SD0_D2), + [SD0_D3] = PAD_INFO_PULLCTL(SD0_D3), + [SD1_D0] = PAD_INFO_PULLCTL(SD1_D0), + [SD1_D1] = PAD_INFO_PULLCTL(SD1_D1), + [SD1_D2] = PAD_INFO_PULLCTL(SD1_D2), + [SD1_D3] = PAD_INFO_PULLCTL(SD1_D3), + [SD0_CMD] = PAD_INFO_PULLCTL(SD0_CMD), + [SD0_CLK] = PAD_INFO_PULLCTL_ST(SD0_CLK), + [SD1_CMD] = PAD_INFO_PULLCTL(SD1_CMD), + [SD1_CLK] = PAD_INFO(SD1_CLK), + [SPI0_SCLK] = PAD_INFO_PULLCTL_ST(SPI0_SCLK), + [SPI0_SS] = PAD_INFO_ST(SPI0_SS), + [SPI0_MISO] = PAD_INFO_ST(SPI0_MISO), + [SPI0_MOSI] = PAD_INFO_PULLCTL_ST(SPI0_MOSI), + [UART0_RX] = PAD_INFO_PULLCTL_ST(UART0_RX), + [UART0_TX] = PAD_INFO_PULLCTL_ST(UART0_TX), + [I2C0_SCLK] = PAD_INFO_PULLCTL_ST(I2C0_SCLK), + [I2C0_SDATA] = PAD_INFO_PULLCTL_ST(I2C0_SDATA), + [SENSOR0_PCLK] = PAD_INFO_ST(SENSOR0_PCLK), + [SENSOR0_CKOUT] = PAD_INFO(SENSOR0_CKOUT), + [DNAND_ALE] = PAD_INFO(DNAND_ALE), + [DNAND_CLE] = PAD_INFO(DNAND_CLE), + [DNAND_CEB0] = PAD_INFO(DNAND_CEB0), + [DNAND_CEB1] = PAD_INFO(DNAND_CEB1), + [DNAND_CEB2] = PAD_INFO(DNAND_CEB2), + [DNAND_CEB3] = PAD_INFO(DNAND_CEB3), + [UART2_RX] = PAD_INFO_ST(UART2_RX), + [UART2_TX] = PAD_INFO(UART2_TX), + [UART2_RTSB] = PAD_INFO_ST(UART2_RTSB), + [UART2_CTSB] = PAD_INFO_ST(UART2_CTSB), + [UART3_RX] = PAD_INFO_ST(UART3_RX), + [UART3_TX] = PAD_INFO(UART3_TX), + [UART3_RTSB] = PAD_INFO_ST(UART3_RTSB), + [UART3_CTSB] = PAD_INFO_ST(UART3_CTSB), + [PCM1_IN] = PAD_INFO_ST(PCM1_IN), + [PCM1_CLK] = PAD_INFO_ST(PCM1_CLK), + [PCM1_SYNC] = PAD_INFO_PULLCTL_ST(PCM1_SYNC), + [PCM1_OUT] = PAD_INFO_PULLCTL(PCM1_OUT), + [I2C1_SCLK] = PAD_INFO_PULLCTL_ST(I2C1_SCLK), + [I2C1_SDATA] = PAD_INFO_PULLCTL_ST(I2C1_SDATA), + [I2C2_SCLK] = PAD_INFO_PULLCTL_ST(I2C2_SCLK), + [I2C2_SDATA] = PAD_INFO_PULLCTL_ST(I2C2_SDATA), + [CSI_DN0] = PAD_INFO(CSI_DN0), + [CSI_DP0] = PAD_INFO(CSI_DP0), + [CSI_DN1] = PAD_INFO(CSI_DN1), + [CSI_DP1] = PAD_INFO(CSI_DP1), + [CSI_CN] = PAD_INFO(CSI_CN), + [CSI_CP] = PAD_INFO(CSI_CP), + [CSI_DN2] = PAD_INFO(CSI_DN2), + [CSI_DP2] = PAD_INFO(CSI_DP2), + [CSI_DN3] = PAD_INFO(CSI_DN3), + [CSI_DP3] = PAD_INFO(CSI_DP3), + [DNAND_D0] = PAD_INFO_PULLCTL(DNAND_D0), + [DNAND_D1] = PAD_INFO_PULLCTL(DNAND_D1), + [DNAND_D2] = PAD_INFO_PULLCTL(DNAND_D2), + [DNAND_D3] = PAD_INFO_PULLCTL(DNAND_D3), + [DNAND_D4] = PAD_INFO_PULLCTL(DNAND_D4), + [DNAND_D5] = PAD_INFO_PULLCTL(DNAND_D5), + [DNAND_D6] = PAD_INFO_PULLCTL(DNAND_D6), + [DNAND_D7] = PAD_INFO_PULLCTL(DNAND_D7), + [DNAND_WRB] = PAD_INFO(DNAND_WRB), + [DNAND_RDB] = PAD_INFO(DNAND_RDB), + [DNAND_RDBN] = PAD_INFO_PULLCTL(DNAND_RDBN), + [DNAND_RB] = PAD_INFO(DNAND_RB), + [PORB] = PAD_INFO(PORB), + [CLKO_25M] = PAD_INFO_PULLCTL(CLKO_25M), + [BSEL] = PAD_INFO(BSEL), + [PKG0] = PAD_INFO(PKG0), + [PKG1] = PAD_INFO(PKG1), + [PKG2] = PAD_INFO(PKG2), + [PKG3] = PAD_INFO(PKG3), +}; + +static const struct owl_gpio_port s500_gpio_ports[] = { + OWL_GPIO_PORT(A, 0x0000, 32, 0x0, 0x4, 0x8, 0x204, 0x208, 0x20C, 0x230, 0), + OWL_GPIO_PORT(B, 0x000C, 32, 0x0, 0x4, 0x8, 0x1F8, 0x204, 0x208, 0x22C, 1), + OWL_GPIO_PORT(C, 0x0018, 32, 0x0, 0x4, 0x8, 0x1EC, 0x200, 0x204, 0x228, 2), + OWL_GPIO_PORT(D, 0x0024, 32, 0x0, 0x4, 0x8, 0x1E0, 0x1FC, 0x200, 0x224, 3), + OWL_GPIO_PORT(E, 0x0030, 4, 0x0, 0x4, 0x8, 0x1D4, 0x1F8, 0x1FC, 0x220, 4), +}; + +enum s500_pinconf_pull { + OWL_PINCONF_PULL_DOWN, + OWL_PINCONF_PULL_UP, +}; + +static int s500_pad_pinconf_arg2val(const struct owl_padinfo *info, + unsigned int param, u32 *arg) +{ + switch (param) { + case PIN_CONFIG_BIAS_PULL_DOWN: + *arg = OWL_PINCONF_PULL_DOWN; + break; + case PIN_CONFIG_BIAS_PULL_UP: + *arg = OWL_PINCONF_PULL_UP; + break; + case PIN_CONFIG_INPUT_SCHMITT_ENABLE: + *arg = (*arg >= 1 ? 1 : 0); + break; + default: + return -EOPNOTSUPP; + } + + return 0; +} + +static int s500_pad_pinconf_val2arg(const struct owl_padinfo *padinfo, + unsigned int param, u32 *arg) +{ + switch (param) { + case PIN_CONFIG_BIAS_PULL_DOWN: + *arg = *arg == OWL_PINCONF_PULL_DOWN; + break; + case PIN_CONFIG_BIAS_PULL_UP: + *arg = *arg == OWL_PINCONF_PULL_UP; + break; + case PIN_CONFIG_INPUT_SCHMITT_ENABLE: + *arg = *arg == 1; + break; + default: + return -EOPNOTSUPP; + } + + return 0; +} + +static struct owl_pinctrl_soc_data s500_pinctrl_data = { + .padinfo = s500_padinfo, + .pins = (const struct pinctrl_pin_desc *)s500_pads, + .npins = ARRAY_SIZE(s500_pads), + .functions = s500_functions, + .nfunctions = ARRAY_SIZE(s500_functions), + .groups = s500_groups, + .ngroups = ARRAY_SIZE(s500_groups), + .ngpios = NUM_GPIOS, + .ports = s500_gpio_ports, + .nports = ARRAY_SIZE(s500_gpio_ports), + .padctl_arg2val = s500_pad_pinconf_arg2val, + .padctl_val2arg = s500_pad_pinconf_val2arg, +}; + +static int s500_pinctrl_probe(struct platform_device *pdev) +{ + return owl_pinctrl_probe(pdev, &s500_pinctrl_data); +} + +static const struct of_device_id s500_pinctrl_of_match[] = { + { .compatible = "actions,s500-pinctrl", }, + { } +}; + +static struct platform_driver s500_pinctrl_driver = { + .driver = { + .name = "pinctrl-s500", + .of_match_table = of_match_ptr(s500_pinctrl_of_match), + }, + .probe = s500_pinctrl_probe, +}; + +static int __init s500_pinctrl_init(void) +{ + return platform_driver_register(&s500_pinctrl_driver); +} +arch_initcall(s500_pinctrl_init); + +static void __exit s500_pinctrl_exit(void) +{ + platform_driver_unregister(&s500_pinctrl_driver); +} +module_exit(s500_pinctrl_exit); + +MODULE_AUTHOR("Actions Semi Inc."); +MODULE_AUTHOR("Cristian Ciocaltea "); +MODULE_DESCRIPTION("Actions Semi S500 SoC Pinctrl Driver"); +MODULE_LICENSE("GPL"); From e1c17431855936e25f1077efa8e331122321ddd7 Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Mon, 3 Aug 2020 17:20:56 +0300 Subject: [PATCH 079/433] MAINTAINERS: Set pinctrl binding entry for all Actions Semi Owl SoCs Update the pinctrl binding entry to match all members of Actions Semi Owl SoCs. Signed-off-by: Cristian Ciocaltea Link: https://lore.kernel.org/r/1a9eb2b12c151d4d765d2aa74dc9cd58b3c117dc.1596461275.git.cristian.ciocaltea@gmail.com Signed-off-by: Linus Walleij --- MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index deaafb617361..db97d048a92e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1526,7 +1526,7 @@ F: Documentation/devicetree/bindings/clock/actions,owl-cmu.txt F: Documentation/devicetree/bindings/dma/owl-dma.txt F: Documentation/devicetree/bindings/i2c/i2c-owl.txt F: Documentation/devicetree/bindings/mmc/owl-mmc.yaml -F: Documentation/devicetree/bindings/pinctrl/actions,s900-pinctrl.txt +F: Documentation/devicetree/bindings/pinctrl/actions,* F: Documentation/devicetree/bindings/power/actions,owl-sps.txt F: Documentation/devicetree/bindings/timer/actions,owl-timer.txt F: arch/arm/boot/dts/owl-* From 7c81b7199b79e053db7b909e667f2a88e6c437b0 Mon Sep 17 00:00:00 2001 From: Zhiyong Tao Date: Mon, 17 Aug 2020 08:17:00 +0800 Subject: [PATCH 080/433] dt-bindings: pinctrl: mt8192: add pinctrl file This patch adds pinctrl file for mt8192. Signed-off-by: Zhiyong Tao Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20200817001702.1646-2-zhiyong.tao@mediatek.com Signed-off-by: Linus Walleij --- include/dt-bindings/pinctrl/mt8192-pinfunc.h | 1344 ++++++++++++++++++ 1 file changed, 1344 insertions(+) create mode 100644 include/dt-bindings/pinctrl/mt8192-pinfunc.h diff --git a/include/dt-bindings/pinctrl/mt8192-pinfunc.h b/include/dt-bindings/pinctrl/mt8192-pinfunc.h new file mode 100644 index 000000000000..71ffe3a52578 --- /dev/null +++ b/include/dt-bindings/pinctrl/mt8192-pinfunc.h @@ -0,0 +1,1344 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2019 MediaTek Inc. + * Author: Zhiyong Tao + * + */ + +#ifndef __MT8192_PINFUNC_H +#define __MT8192_PINFUNC_H + +#include "mt65xx.h" + +#define PINMUX_GPIO0__FUNC_GPIO0 (MTK_PIN_NO(0) | 0) +#define PINMUX_GPIO0__FUNC_SPI6_CLK (MTK_PIN_NO(0) | 1) +#define PINMUX_GPIO0__FUNC_I2S5_MCK (MTK_PIN_NO(0) | 2) +#define PINMUX_GPIO0__FUNC_PWM_0 (MTK_PIN_NO(0) | 3) +#define PINMUX_GPIO0__FUNC_TDM_LRCK (MTK_PIN_NO(0) | 4) +#define PINMUX_GPIO0__FUNC_TP_GPIO0_AO (MTK_PIN_NO(0) | 5) +#define PINMUX_GPIO0__FUNC_MD_INT0 (MTK_PIN_NO(0) | 6) + +#define PINMUX_GPIO1__FUNC_GPIO1 (MTK_PIN_NO(1) | 0) +#define PINMUX_GPIO1__FUNC_SPI6_CSB (MTK_PIN_NO(1) | 1) +#define PINMUX_GPIO1__FUNC_I2S5_BCK (MTK_PIN_NO(1) | 2) +#define PINMUX_GPIO1__FUNC_PWM_1 (MTK_PIN_NO(1) | 3) +#define PINMUX_GPIO1__FUNC_TDM_BCK (MTK_PIN_NO(1) | 4) +#define PINMUX_GPIO1__FUNC_TP_GPIO1_AO (MTK_PIN_NO(1) | 5) +#define PINMUX_GPIO1__FUNC_MD_INT1_C2K_UIM0_HOT_PLUG (MTK_PIN_NO(1) | 6) +#define PINMUX_GPIO1__FUNC_DBG_MON_A9 (MTK_PIN_NO(1) | 7) + +#define PINMUX_GPIO2__FUNC_GPIO2 (MTK_PIN_NO(2) | 0) +#define PINMUX_GPIO2__FUNC_SPI6_MI (MTK_PIN_NO(2) | 1) +#define PINMUX_GPIO2__FUNC_I2S5_LRCK (MTK_PIN_NO(2) | 2) +#define PINMUX_GPIO2__FUNC_PWM_2 (MTK_PIN_NO(2) | 3) +#define PINMUX_GPIO2__FUNC_TDM_MCK (MTK_PIN_NO(2) | 4) +#define PINMUX_GPIO2__FUNC_TP_GPIO2_AO (MTK_PIN_NO(2) | 5) +#define PINMUX_GPIO2__FUNC_MD_INT2_C2K_UIM1_HOT_PLUG (MTK_PIN_NO(2) | 6) +#define PINMUX_GPIO2__FUNC_DBG_MON_A10 (MTK_PIN_NO(2) | 7) + +#define PINMUX_GPIO3__FUNC_GPIO3 (MTK_PIN_NO(3) | 0) +#define PINMUX_GPIO3__FUNC_SPI6_MO (MTK_PIN_NO(3) | 1) +#define PINMUX_GPIO3__FUNC_I2S5_DO (MTK_PIN_NO(3) | 2) +#define PINMUX_GPIO3__FUNC_PWM_3 (MTK_PIN_NO(3) | 3) +#define PINMUX_GPIO3__FUNC_TDM_DATA0 (MTK_PIN_NO(3) | 4) +#define PINMUX_GPIO3__FUNC_TP_GPIO3_AO (MTK_PIN_NO(3) | 5) +#define PINMUX_GPIO3__FUNC_CLKM0 (MTK_PIN_NO(3) | 6) +#define PINMUX_GPIO3__FUNC_DBG_MON_A11 (MTK_PIN_NO(3) | 7) + +#define PINMUX_GPIO4__FUNC_GPIO4 (MTK_PIN_NO(4) | 0) +#define PINMUX_GPIO4__FUNC_SPI4_A_CLK (MTK_PIN_NO(4) | 1) +#define PINMUX_GPIO4__FUNC_I2S2_MCK (MTK_PIN_NO(4) | 2) +#define PINMUX_GPIO4__FUNC_DMIC1_CLK (MTK_PIN_NO(4) | 3) +#define PINMUX_GPIO4__FUNC_TDM_DATA1 (MTK_PIN_NO(4) | 4) +#define PINMUX_GPIO4__FUNC_TP_GPIO4_AO (MTK_PIN_NO(4) | 5) +#define PINMUX_GPIO4__FUNC_PCM1_DI (MTK_PIN_NO(4) | 6) +#define PINMUX_GPIO4__FUNC_IDDIG (MTK_PIN_NO(4) | 7) + +#define PINMUX_GPIO5__FUNC_GPIO5 (MTK_PIN_NO(5) | 0) +#define PINMUX_GPIO5__FUNC_SPI4_A_CSB (MTK_PIN_NO(5) | 1) +#define PINMUX_GPIO5__FUNC_I2S2_BCK (MTK_PIN_NO(5) | 2) +#define PINMUX_GPIO5__FUNC_DMIC1_DAT (MTK_PIN_NO(5) | 3) +#define PINMUX_GPIO5__FUNC_TDM_DATA2 (MTK_PIN_NO(5) | 4) +#define PINMUX_GPIO5__FUNC_TP_GPIO5_AO (MTK_PIN_NO(5) | 5) +#define PINMUX_GPIO5__FUNC_PCM1_CLK (MTK_PIN_NO(5) | 6) +#define PINMUX_GPIO5__FUNC_USB_DRVVBUS (MTK_PIN_NO(5) | 7) + +#define PINMUX_GPIO6__FUNC_GPIO6 (MTK_PIN_NO(6) | 0) +#define PINMUX_GPIO6__FUNC_SPI4_A_MI (MTK_PIN_NO(6) | 1) +#define PINMUX_GPIO6__FUNC_I2S2_LRCK (MTK_PIN_NO(6) | 2) +#define PINMUX_GPIO6__FUNC_DMIC_CLK (MTK_PIN_NO(6) | 3) +#define PINMUX_GPIO6__FUNC_TDM_DATA3 (MTK_PIN_NO(6) | 4) +#define PINMUX_GPIO6__FUNC_TP_GPIO6_AO (MTK_PIN_NO(6) | 5) +#define PINMUX_GPIO6__FUNC_PCM1_SYNC (MTK_PIN_NO(6) | 6) + +#define PINMUX_GPIO7__FUNC_GPIO7 (MTK_PIN_NO(7) | 0) +#define PINMUX_GPIO7__FUNC_SPI4_A_MO (MTK_PIN_NO(7) | 1) +#define PINMUX_GPIO7__FUNC_I2S2_DI (MTK_PIN_NO(7) | 2) +#define PINMUX_GPIO7__FUNC_DMIC_DAT (MTK_PIN_NO(7) | 3) +#define PINMUX_GPIO7__FUNC_WIFI_TXD (MTK_PIN_NO(7) | 4) +#define PINMUX_GPIO7__FUNC_TP_GPIO7_AO (MTK_PIN_NO(7) | 5) +#define PINMUX_GPIO7__FUNC_PCM1_DO0 (MTK_PIN_NO(7) | 6) + +#define PINMUX_GPIO8__FUNC_GPIO8 (MTK_PIN_NO(8) | 0) +#define PINMUX_GPIO8__FUNC_SRCLKENAI1 (MTK_PIN_NO(8) | 1) +#define PINMUX_GPIO8__FUNC_I2S2_DI2 (MTK_PIN_NO(8) | 2) +#define PINMUX_GPIO8__FUNC_KPCOL2 (MTK_PIN_NO(8) | 3) +#define PINMUX_GPIO8__FUNC_CONN_TCXOENA_REQ (MTK_PIN_NO(8) | 4) +#define PINMUX_GPIO8__FUNC_CLKM1 (MTK_PIN_NO(8) | 5) +#define PINMUX_GPIO8__FUNC_PCM1_DO1 (MTK_PIN_NO(8) | 6) +#define PINMUX_GPIO8__FUNC_DBG_MON_A12 (MTK_PIN_NO(8) | 7) + +#define PINMUX_GPIO9__FUNC_GPIO9 (MTK_PIN_NO(9) | 0) +#define PINMUX_GPIO9__FUNC_SRCLKENAI0 (MTK_PIN_NO(9) | 1) +#define PINMUX_GPIO9__FUNC_DVFSRC_EXT_REQ (MTK_PIN_NO(9) | 2) +#define PINMUX_GPIO9__FUNC_KPROW2 (MTK_PIN_NO(9) | 3) +#define PINMUX_GPIO9__FUNC_CMMCLK4 (MTK_PIN_NO(9) | 4) +#define PINMUX_GPIO9__FUNC_CLKM3 (MTK_PIN_NO(9) | 5) +#define PINMUX_GPIO9__FUNC_PCM1_DO2 (MTK_PIN_NO(9) | 6) +#define PINMUX_GPIO9__FUNC_DBG_MON_A13 (MTK_PIN_NO(9) | 7) + +#define PINMUX_GPIO10__FUNC_GPIO10 (MTK_PIN_NO(10) | 0) +#define PINMUX_GPIO10__FUNC_MSDC2_CLK (MTK_PIN_NO(10) | 1) +#define PINMUX_GPIO10__FUNC_SPI4_B_CLK (MTK_PIN_NO(10) | 2) +#define PINMUX_GPIO10__FUNC_I2S8_MCK (MTK_PIN_NO(10) | 3) +#define PINMUX_GPIO10__FUNC_MD_INT0 (MTK_PIN_NO(10) | 5) +#define PINMUX_GPIO10__FUNC_TP_GPIO8_AO (MTK_PIN_NO(10) | 6) + +#define PINMUX_GPIO11__FUNC_GPIO11 (MTK_PIN_NO(11) | 0) +#define PINMUX_GPIO11__FUNC_MSDC2_CMD (MTK_PIN_NO(11) | 1) +#define PINMUX_GPIO11__FUNC_SPI4_B_CSB (MTK_PIN_NO(11) | 2) +#define PINMUX_GPIO11__FUNC_I2S8_BCK (MTK_PIN_NO(11) | 3) +#define PINMUX_GPIO11__FUNC_PCIE_CLKREQ_N (MTK_PIN_NO(11) | 4) +#define PINMUX_GPIO11__FUNC_MD_INT1_C2K_UIM0_HOT_PLUG (MTK_PIN_NO(11) | 5) +#define PINMUX_GPIO11__FUNC_TP_GPIO9_AO (MTK_PIN_NO(11) | 6) + +#define PINMUX_GPIO12__FUNC_GPIO12 (MTK_PIN_NO(12) | 0) +#define PINMUX_GPIO12__FUNC_MSDC2_DAT3 (MTK_PIN_NO(12) | 1) +#define PINMUX_GPIO12__FUNC_SPI4_B_MI (MTK_PIN_NO(12) | 2) +#define PINMUX_GPIO12__FUNC_I2S8_LRCK (MTK_PIN_NO(12) | 3) +#define PINMUX_GPIO12__FUNC_DMIC1_CLK (MTK_PIN_NO(12) | 4) +#define PINMUX_GPIO12__FUNC_MD_INT2_C2K_UIM1_HOT_PLUG (MTK_PIN_NO(12) | 5) +#define PINMUX_GPIO12__FUNC_TP_GPIO10_AO (MTK_PIN_NO(12) | 6) + +#define PINMUX_GPIO13__FUNC_GPIO13 (MTK_PIN_NO(13) | 0) +#define PINMUX_GPIO13__FUNC_MSDC2_DAT0 (MTK_PIN_NO(13) | 1) +#define PINMUX_GPIO13__FUNC_SPI4_B_MO (MTK_PIN_NO(13) | 2) +#define PINMUX_GPIO13__FUNC_I2S8_DI (MTK_PIN_NO(13) | 3) +#define PINMUX_GPIO13__FUNC_DMIC1_DAT (MTK_PIN_NO(13) | 4) +#define PINMUX_GPIO13__FUNC_ANT_SEL10 (MTK_PIN_NO(13) | 5) +#define PINMUX_GPIO13__FUNC_TP_GPIO11_AO (MTK_PIN_NO(13) | 6) + +#define PINMUX_GPIO14__FUNC_GPIO14 (MTK_PIN_NO(14) | 0) +#define PINMUX_GPIO14__FUNC_MSDC2_DAT2 (MTK_PIN_NO(14) | 1) +#define PINMUX_GPIO14__FUNC_IDDIG (MTK_PIN_NO(14) | 2) +#define PINMUX_GPIO14__FUNC_SCL_6306 (MTK_PIN_NO(14) | 3) +#define PINMUX_GPIO14__FUNC_PCIE_PERESET_N (MTK_PIN_NO(14) | 4) +#define PINMUX_GPIO14__FUNC_ANT_SEL11 (MTK_PIN_NO(14) | 5) +#define PINMUX_GPIO14__FUNC_TP_GPIO12_AO (MTK_PIN_NO(14) | 6) + +#define PINMUX_GPIO15__FUNC_GPIO15 (MTK_PIN_NO(15) | 0) +#define PINMUX_GPIO15__FUNC_MSDC2_DAT1 (MTK_PIN_NO(15) | 1) +#define PINMUX_GPIO15__FUNC_USB_DRVVBUS (MTK_PIN_NO(15) | 2) +#define PINMUX_GPIO15__FUNC_SDA_6306 (MTK_PIN_NO(15) | 3) +#define PINMUX_GPIO15__FUNC_PCIE_WAKE_N (MTK_PIN_NO(15) | 4) +#define PINMUX_GPIO15__FUNC_ANT_SEL12 (MTK_PIN_NO(15) | 5) +#define PINMUX_GPIO15__FUNC_TP_GPIO13_AO (MTK_PIN_NO(15) | 6) + +#define PINMUX_GPIO16__FUNC_GPIO16 (MTK_PIN_NO(16) | 0) +#define PINMUX_GPIO16__FUNC_SRCLKENAI1 (MTK_PIN_NO(16) | 1) +#define PINMUX_GPIO16__FUNC_IDDIG (MTK_PIN_NO(16) | 2) +#define PINMUX_GPIO16__FUNC_TP_GPIO14_AO (MTK_PIN_NO(16) | 3) +#define PINMUX_GPIO16__FUNC_KPCOL2 (MTK_PIN_NO(16) | 4) +#define PINMUX_GPIO16__FUNC_GPS_L1_ELNA_EN (MTK_PIN_NO(16) | 5) +#define PINMUX_GPIO16__FUNC_SPI7_A_MI (MTK_PIN_NO(16) | 6) +#define PINMUX_GPIO16__FUNC_DBG_MON_A0 (MTK_PIN_NO(16) | 7) + +#define PINMUX_GPIO17__FUNC_GPIO17 (MTK_PIN_NO(17) | 0) +#define PINMUX_GPIO17__FUNC_SRCLKENAI0 (MTK_PIN_NO(17) | 1) +#define PINMUX_GPIO17__FUNC_USB_DRVVBUS (MTK_PIN_NO(17) | 2) +#define PINMUX_GPIO17__FUNC_TP_GPIO15_AO (MTK_PIN_NO(17) | 3) +#define PINMUX_GPIO17__FUNC_KPROW2 (MTK_PIN_NO(17) | 4) +#define PINMUX_GPIO17__FUNC_SPI7_A_MO (MTK_PIN_NO(17) | 6) +#define PINMUX_GPIO17__FUNC_DBG_MON_A1 (MTK_PIN_NO(17) | 7) + +#define PINMUX_GPIO18__FUNC_GPIO18 (MTK_PIN_NO(18) | 0) +#define PINMUX_GPIO18__FUNC_SRCLKENAI0 (MTK_PIN_NO(18) | 1) +#define PINMUX_GPIO18__FUNC_SPI4_C_MI (MTK_PIN_NO(18) | 2) +#define PINMUX_GPIO18__FUNC_SPI1_B_MI (MTK_PIN_NO(18) | 3) +#define PINMUX_GPIO18__FUNC_GPS_L1_ELNA_EN (MTK_PIN_NO(18) | 4) +#define PINMUX_GPIO18__FUNC_ANT_SEL10 (MTK_PIN_NO(18) | 5) +#define PINMUX_GPIO18__FUNC_MD_INT0 (MTK_PIN_NO(18) | 6) +#define PINMUX_GPIO18__FUNC_DBG_MON_B2 (MTK_PIN_NO(18) | 7) + +#define PINMUX_GPIO19__FUNC_GPIO19 (MTK_PIN_NO(19) | 0) +#define PINMUX_GPIO19__FUNC_SRCLKENAI1 (MTK_PIN_NO(19) | 1) +#define PINMUX_GPIO19__FUNC_SPI4_C_MO (MTK_PIN_NO(19) | 2) +#define PINMUX_GPIO19__FUNC_SPI1_B_MO (MTK_PIN_NO(19) | 3) +#define PINMUX_GPIO19__FUNC_ANT_SEL11 (MTK_PIN_NO(19) | 5) +#define PINMUX_GPIO19__FUNC_MD_INT1_C2K_UIM0_HOT_PLUG (MTK_PIN_NO(19) | 6) +#define PINMUX_GPIO19__FUNC_DBG_MON_B3 (MTK_PIN_NO(19) | 7) + +#define PINMUX_GPIO20__FUNC_GPIO20 (MTK_PIN_NO(20) | 0) +#define PINMUX_GPIO20__FUNC_SRCLKENAI0 (MTK_PIN_NO(20) | 1) +#define PINMUX_GPIO20__FUNC_SPI4_C_CLK (MTK_PIN_NO(20) | 2) +#define PINMUX_GPIO20__FUNC_SPI1_B_CLK (MTK_PIN_NO(20) | 3) +#define PINMUX_GPIO20__FUNC_PWM_3 (MTK_PIN_NO(20) | 4) +#define PINMUX_GPIO20__FUNC_ANT_SEL12 (MTK_PIN_NO(20) | 5) +#define PINMUX_GPIO20__FUNC_MD_INT2_C2K_UIM1_HOT_PLUG (MTK_PIN_NO(20) | 6) +#define PINMUX_GPIO20__FUNC_DBG_MON_B4 (MTK_PIN_NO(20) | 7) + +#define PINMUX_GPIO21__FUNC_GPIO21 (MTK_PIN_NO(21) | 0) +#define PINMUX_GPIO21__FUNC_SPI4_C_CSB (MTK_PIN_NO(21) | 2) +#define PINMUX_GPIO21__FUNC_SPI1_B_CSB (MTK_PIN_NO(21) | 3) +#define PINMUX_GPIO21__FUNC_IDDIG (MTK_PIN_NO(21) | 6) +#define PINMUX_GPIO21__FUNC_DBG_MON_B5 (MTK_PIN_NO(21) | 7) + +#define PINMUX_GPIO22__FUNC_GPIO22 (MTK_PIN_NO(22) | 0) +#define PINMUX_GPIO22__FUNC_SPI0_C_CLK (MTK_PIN_NO(22) | 2) +#define PINMUX_GPIO22__FUNC_SPI7_B_CLK (MTK_PIN_NO(22) | 3) +#define PINMUX_GPIO22__FUNC_I2S7_BCK (MTK_PIN_NO(22) | 4) +#define PINMUX_GPIO22__FUNC_I2S9_BCK (MTK_PIN_NO(22) | 5) +#define PINMUX_GPIO22__FUNC_SCL_6306 (MTK_PIN_NO(22) | 6) + +#define PINMUX_GPIO23__FUNC_GPIO23 (MTK_PIN_NO(23) | 0) +#define PINMUX_GPIO23__FUNC_SPI0_C_CSB (MTK_PIN_NO(23) | 2) +#define PINMUX_GPIO23__FUNC_SPI7_B_CSB (MTK_PIN_NO(23) | 3) +#define PINMUX_GPIO23__FUNC_I2S7_LRCK (MTK_PIN_NO(23) | 4) +#define PINMUX_GPIO23__FUNC_I2S9_LRCK (MTK_PIN_NO(23) | 5) +#define PINMUX_GPIO23__FUNC_SDA_6306 (MTK_PIN_NO(23) | 6) + +#define PINMUX_GPIO24__FUNC_GPIO24 (MTK_PIN_NO(24) | 0) +#define PINMUX_GPIO24__FUNC_SRCLKENAI1 (MTK_PIN_NO(24) | 1) +#define PINMUX_GPIO24__FUNC_SPI0_C_MI (MTK_PIN_NO(24) | 2) +#define PINMUX_GPIO24__FUNC_SPI7_B_MI (MTK_PIN_NO(24) | 3) +#define PINMUX_GPIO24__FUNC_I2S6_DI (MTK_PIN_NO(24) | 4) +#define PINMUX_GPIO24__FUNC_I2S8_DI (MTK_PIN_NO(24) | 5) +#define PINMUX_GPIO24__FUNC_SPINOR_CS (MTK_PIN_NO(24) | 6) + +#define PINMUX_GPIO25__FUNC_GPIO25 (MTK_PIN_NO(25) | 0) +#define PINMUX_GPIO25__FUNC_SRCLKENAI0 (MTK_PIN_NO(25) | 1) +#define PINMUX_GPIO25__FUNC_SPI0_C_MO (MTK_PIN_NO(25) | 2) +#define PINMUX_GPIO25__FUNC_SPI7_B_MO (MTK_PIN_NO(25) | 3) +#define PINMUX_GPIO25__FUNC_I2S7_DO (MTK_PIN_NO(25) | 4) +#define PINMUX_GPIO25__FUNC_I2S9_DO (MTK_PIN_NO(25) | 5) +#define PINMUX_GPIO25__FUNC_SPINOR_CK (MTK_PIN_NO(25) | 6) + +#define PINMUX_GPIO26__FUNC_GPIO26 (MTK_PIN_NO(26) | 0) +#define PINMUX_GPIO26__FUNC_PWM_2 (MTK_PIN_NO(26) | 1) +#define PINMUX_GPIO26__FUNC_CLKM0 (MTK_PIN_NO(26) | 2) +#define PINMUX_GPIO26__FUNC_USB_DRVVBUS (MTK_PIN_NO(26) | 3) +#define PINMUX_GPIO26__FUNC_SPI5_C_MI (MTK_PIN_NO(26) | 4) +#define PINMUX_GPIO26__FUNC_I2S9_BCK (MTK_PIN_NO(26) | 5) + +#define PINMUX_GPIO27__FUNC_GPIO27 (MTK_PIN_NO(27) | 0) +#define PINMUX_GPIO27__FUNC_PWM_3 (MTK_PIN_NO(27) | 1) +#define PINMUX_GPIO27__FUNC_CLKM1 (MTK_PIN_NO(27) | 2) +#define PINMUX_GPIO27__FUNC_SPI5_C_MO (MTK_PIN_NO(27) | 4) +#define PINMUX_GPIO27__FUNC_I2S9_LRCK (MTK_PIN_NO(27) | 5) +#define PINMUX_GPIO27__FUNC_SPINOR_IO0 (MTK_PIN_NO(27) | 6) + +#define PINMUX_GPIO28__FUNC_GPIO28 (MTK_PIN_NO(28) | 0) +#define PINMUX_GPIO28__FUNC_PWM_0 (MTK_PIN_NO(28) | 1) +#define PINMUX_GPIO28__FUNC_CLKM2 (MTK_PIN_NO(28) | 2) +#define PINMUX_GPIO28__FUNC_SPI5_C_CSB (MTK_PIN_NO(28) | 4) +#define PINMUX_GPIO28__FUNC_I2S9_MCK (MTK_PIN_NO(28) | 5) +#define PINMUX_GPIO28__FUNC_SPINOR_IO1 (MTK_PIN_NO(28) | 6) + +#define PINMUX_GPIO29__FUNC_GPIO29 (MTK_PIN_NO(29) | 0) +#define PINMUX_GPIO29__FUNC_PWM_1 (MTK_PIN_NO(29) | 1) +#define PINMUX_GPIO29__FUNC_CLKM3 (MTK_PIN_NO(29) | 2) +#define PINMUX_GPIO29__FUNC_SPI5_C_CLK (MTK_PIN_NO(29) | 4) +#define PINMUX_GPIO29__FUNC_I2S9_DO (MTK_PIN_NO(29) | 5) +#define PINMUX_GPIO29__FUNC_SPINOR_IO2 (MTK_PIN_NO(29) | 6) + +#define PINMUX_GPIO30__FUNC_GPIO30 (MTK_PIN_NO(30) | 0) +#define PINMUX_GPIO30__FUNC_PWM_2 (MTK_PIN_NO(30) | 1) +#define PINMUX_GPIO30__FUNC_CLKM0 (MTK_PIN_NO(30) | 2) +#define PINMUX_GPIO30__FUNC_GPS_L1_ELNA_EN (MTK_PIN_NO(30) | 3) +#define PINMUX_GPIO30__FUNC_I2S7_MCK (MTK_PIN_NO(30) | 4) +#define PINMUX_GPIO30__FUNC_I2S9_MCK (MTK_PIN_NO(30) | 5) +#define PINMUX_GPIO30__FUNC_SPINOR_IO3 (MTK_PIN_NO(30) | 6) + +#define PINMUX_GPIO31__FUNC_GPIO31 (MTK_PIN_NO(31) | 0) +#define PINMUX_GPIO31__FUNC_I2S3_MCK (MTK_PIN_NO(31) | 1) +#define PINMUX_GPIO31__FUNC_I2S1_MCK (MTK_PIN_NO(31) | 2) +#define PINMUX_GPIO31__FUNC_I2S5_MCK (MTK_PIN_NO(31) | 3) +#define PINMUX_GPIO31__FUNC_SRCLKENAI0 (MTK_PIN_NO(31) | 4) +#define PINMUX_GPIO31__FUNC_I2S0_MCK (MTK_PIN_NO(31) | 5) + +#define PINMUX_GPIO32__FUNC_GPIO32 (MTK_PIN_NO(32) | 0) +#define PINMUX_GPIO32__FUNC_I2S3_BCK (MTK_PIN_NO(32) | 1) +#define PINMUX_GPIO32__FUNC_I2S1_BCK (MTK_PIN_NO(32) | 2) +#define PINMUX_GPIO32__FUNC_I2S5_BCK (MTK_PIN_NO(32) | 3) +#define PINMUX_GPIO32__FUNC_PCM0_CLK (MTK_PIN_NO(32) | 4) +#define PINMUX_GPIO32__FUNC_I2S0_BCK (MTK_PIN_NO(32) | 5) + +#define PINMUX_GPIO33__FUNC_GPIO33 (MTK_PIN_NO(33) | 0) +#define PINMUX_GPIO33__FUNC_I2S3_LRCK (MTK_PIN_NO(33) | 1) +#define PINMUX_GPIO33__FUNC_I2S1_LRCK (MTK_PIN_NO(33) | 2) +#define PINMUX_GPIO33__FUNC_I2S5_LRCK (MTK_PIN_NO(33) | 3) +#define PINMUX_GPIO33__FUNC_PCM0_SYNC (MTK_PIN_NO(33) | 4) +#define PINMUX_GPIO33__FUNC_I2S0_LRCK (MTK_PIN_NO(33) | 5) + +#define PINMUX_GPIO34__FUNC_GPIO34 (MTK_PIN_NO(34) | 0) +#define PINMUX_GPIO34__FUNC_I2S0_DI (MTK_PIN_NO(34) | 1) +#define PINMUX_GPIO34__FUNC_I2S2_DI (MTK_PIN_NO(34) | 2) +#define PINMUX_GPIO34__FUNC_I2S2_DI2 (MTK_PIN_NO(34) | 3) +#define PINMUX_GPIO34__FUNC_PCM0_DI (MTK_PIN_NO(34) | 4) +#define PINMUX_GPIO34__FUNC_I2S0_DI_A (MTK_PIN_NO(34) | 5) + +#define PINMUX_GPIO35__FUNC_GPIO35 (MTK_PIN_NO(35) | 0) +#define PINMUX_GPIO35__FUNC_I2S3_DO (MTK_PIN_NO(35) | 1) +#define PINMUX_GPIO35__FUNC_I2S1_DO (MTK_PIN_NO(35) | 2) +#define PINMUX_GPIO35__FUNC_I2S5_DO (MTK_PIN_NO(35) | 3) +#define PINMUX_GPIO35__FUNC_PCM0_DO (MTK_PIN_NO(35) | 4) + +#define PINMUX_GPIO36__FUNC_GPIO36 (MTK_PIN_NO(36) | 0) +#define PINMUX_GPIO36__FUNC_SPI5_A_CLK (MTK_PIN_NO(36) | 1) +#define PINMUX_GPIO36__FUNC_DMIC1_CLK (MTK_PIN_NO(36) | 2) +#define PINMUX_GPIO36__FUNC_MD_URXD0 (MTK_PIN_NO(36) | 4) +#define PINMUX_GPIO36__FUNC_UCTS0 (MTK_PIN_NO(36) | 5) +#define PINMUX_GPIO36__FUNC_URXD1 (MTK_PIN_NO(36) | 6) + +#define PINMUX_GPIO37__FUNC_GPIO37 (MTK_PIN_NO(37) | 0) +#define PINMUX_GPIO37__FUNC_SPI5_A_CSB (MTK_PIN_NO(37) | 1) +#define PINMUX_GPIO37__FUNC_DMIC1_DAT (MTK_PIN_NO(37) | 2) +#define PINMUX_GPIO37__FUNC_MD_UTXD0 (MTK_PIN_NO(37) | 4) +#define PINMUX_GPIO37__FUNC_URTS0 (MTK_PIN_NO(37) | 5) +#define PINMUX_GPIO37__FUNC_UTXD1 (MTK_PIN_NO(37) | 6) + +#define PINMUX_GPIO38__FUNC_GPIO38 (MTK_PIN_NO(38) | 0) +#define PINMUX_GPIO38__FUNC_SPI5_A_MI (MTK_PIN_NO(38) | 1) +#define PINMUX_GPIO38__FUNC_DMIC_CLK (MTK_PIN_NO(38) | 2) +#define PINMUX_GPIO38__FUNC_MD_URXD1 (MTK_PIN_NO(38) | 4) +#define PINMUX_GPIO38__FUNC_URXD0 (MTK_PIN_NO(38) | 5) +#define PINMUX_GPIO38__FUNC_UCTS1 (MTK_PIN_NO(38) | 6) + +#define PINMUX_GPIO39__FUNC_GPIO39 (MTK_PIN_NO(39) | 0) +#define PINMUX_GPIO39__FUNC_SPI5_A_MO (MTK_PIN_NO(39) | 1) +#define PINMUX_GPIO39__FUNC_DMIC_DAT (MTK_PIN_NO(39) | 2) +#define PINMUX_GPIO39__FUNC_MD_UTXD1 (MTK_PIN_NO(39) | 4) +#define PINMUX_GPIO39__FUNC_UTXD0 (MTK_PIN_NO(39) | 5) +#define PINMUX_GPIO39__FUNC_URTS1 (MTK_PIN_NO(39) | 6) + +#define PINMUX_GPIO40__FUNC_GPIO40 (MTK_PIN_NO(40) | 0) +#define PINMUX_GPIO40__FUNC_DISP_PWM (MTK_PIN_NO(40) | 1) +#define PINMUX_GPIO40__FUNC_DBG_MON_A6 (MTK_PIN_NO(40) | 7) + +#define PINMUX_GPIO41__FUNC_GPIO41 (MTK_PIN_NO(41) | 0) +#define PINMUX_GPIO41__FUNC_DSI_TE (MTK_PIN_NO(41) | 1) +#define PINMUX_GPIO41__FUNC_DBG_MON_A7 (MTK_PIN_NO(41) | 7) + +#define PINMUX_GPIO42__FUNC_GPIO42 (MTK_PIN_NO(42) | 0) +#define PINMUX_GPIO42__FUNC_LCM_RST (MTK_PIN_NO(42) | 1) +#define PINMUX_GPIO42__FUNC_DBG_MON_A8 (MTK_PIN_NO(42) | 7) + +#define PINMUX_GPIO43__FUNC_GPIO43 (MTK_PIN_NO(43) | 0) +#define PINMUX_GPIO43__FUNC_MD_INT1_C2K_UIM0_HOT_PLUG (MTK_PIN_NO(43) | 1) +#define PINMUX_GPIO43__FUNC_MD_INT2_C2K_UIM1_HOT_PLUG (MTK_PIN_NO(43) | 2) +#define PINMUX_GPIO43__FUNC_SCL_6306 (MTK_PIN_NO(43) | 3) +#define PINMUX_GPIO43__FUNC_ADSP_URXD0 (MTK_PIN_NO(43) | 4) +#define PINMUX_GPIO43__FUNC_PTA_RXD (MTK_PIN_NO(43) | 5) +#define PINMUX_GPIO43__FUNC_SSPM_URXD_AO (MTK_PIN_NO(43) | 6) +#define PINMUX_GPIO43__FUNC_DBG_MON_B0 (MTK_PIN_NO(43) | 7) + +#define PINMUX_GPIO44__FUNC_GPIO44 (MTK_PIN_NO(44) | 0) +#define PINMUX_GPIO44__FUNC_MD_INT2_C2K_UIM1_HOT_PLUG (MTK_PIN_NO(44) | 1) +#define PINMUX_GPIO44__FUNC_MD_INT1_C2K_UIM0_HOT_PLUG (MTK_PIN_NO(44) | 2) +#define PINMUX_GPIO44__FUNC_SDA_6306 (MTK_PIN_NO(44) | 3) +#define PINMUX_GPIO44__FUNC_ADSP_UTXD0 (MTK_PIN_NO(44) | 4) +#define PINMUX_GPIO44__FUNC_PTA_TXD (MTK_PIN_NO(44) | 5) +#define PINMUX_GPIO44__FUNC_SSPM_UTXD_AO (MTK_PIN_NO(44) | 6) +#define PINMUX_GPIO44__FUNC_DBG_MON_B1 (MTK_PIN_NO(44) | 7) + +#define PINMUX_GPIO45__FUNC_GPIO45 (MTK_PIN_NO(45) | 0) +#define PINMUX_GPIO45__FUNC_MD1_SIM2_SCLK (MTK_PIN_NO(45) | 1) +#define PINMUX_GPIO45__FUNC_MD1_SIM1_SCLK (MTK_PIN_NO(45) | 2) +#define PINMUX_GPIO45__FUNC_MCUPM_JTAG_TDI (MTK_PIN_NO(45) | 3) +#define PINMUX_GPIO45__FUNC_APU_JTAG_TDI (MTK_PIN_NO(45) | 4) +#define PINMUX_GPIO45__FUNC_CCU_JTAG_TDI (MTK_PIN_NO(45) | 5) +#define PINMUX_GPIO45__FUNC_LVTS_SCK (MTK_PIN_NO(45) | 6) +#define PINMUX_GPIO45__FUNC_CONN_DSP_JDI (MTK_PIN_NO(45) | 7) + +#define PINMUX_GPIO46__FUNC_GPIO46 (MTK_PIN_NO(46) | 0) +#define PINMUX_GPIO46__FUNC_MD1_SIM2_SRST (MTK_PIN_NO(46) | 1) +#define PINMUX_GPIO46__FUNC_MD1_SIM1_SRST (MTK_PIN_NO(46) | 2) +#define PINMUX_GPIO46__FUNC_MCUPM_JTAG_TMS (MTK_PIN_NO(46) | 3) +#define PINMUX_GPIO46__FUNC_APU_JTAG_TMS (MTK_PIN_NO(46) | 4) +#define PINMUX_GPIO46__FUNC_CCU_JTAG_TMS (MTK_PIN_NO(46) | 5) +#define PINMUX_GPIO46__FUNC_LVTS_SDI (MTK_PIN_NO(46) | 6) +#define PINMUX_GPIO46__FUNC_CONN_DSP_JMS (MTK_PIN_NO(46) | 7) + +#define PINMUX_GPIO47__FUNC_GPIO47 (MTK_PIN_NO(47) | 0) +#define PINMUX_GPIO47__FUNC_MD1_SIM2_SIO (MTK_PIN_NO(47) | 1) +#define PINMUX_GPIO47__FUNC_MD1_SIM1_SIO (MTK_PIN_NO(47) | 2) +#define PINMUX_GPIO47__FUNC_MCUPM_JTAG_TDO (MTK_PIN_NO(47) | 3) +#define PINMUX_GPIO47__FUNC_APU_JTAG_TDO (MTK_PIN_NO(47) | 4) +#define PINMUX_GPIO47__FUNC_CCU_JTAG_TDO (MTK_PIN_NO(47) | 5) +#define PINMUX_GPIO47__FUNC_LVTS_SCF (MTK_PIN_NO(47) | 6) +#define PINMUX_GPIO47__FUNC_CONN_DSP_JDO (MTK_PIN_NO(47) | 7) + +#define PINMUX_GPIO48__FUNC_GPIO48 (MTK_PIN_NO(48) | 0) +#define PINMUX_GPIO48__FUNC_MD1_SIM1_SIO (MTK_PIN_NO(48) | 1) +#define PINMUX_GPIO48__FUNC_MD1_SIM2_SIO (MTK_PIN_NO(48) | 2) +#define PINMUX_GPIO48__FUNC_MCUPM_JTAG_TRSTN (MTK_PIN_NO(48) | 3) +#define PINMUX_GPIO48__FUNC_APU_JTAG_TRST (MTK_PIN_NO(48) | 4) +#define PINMUX_GPIO48__FUNC_CCU_JTAG_TRST (MTK_PIN_NO(48) | 5) +#define PINMUX_GPIO48__FUNC_LVTS_FOUT (MTK_PIN_NO(48) | 6) +#define PINMUX_GPIO48__FUNC_CONN_DSP_JINTP (MTK_PIN_NO(48) | 7) + +#define PINMUX_GPIO49__FUNC_GPIO49 (MTK_PIN_NO(49) | 0) +#define PINMUX_GPIO49__FUNC_MD1_SIM1_SRST (MTK_PIN_NO(49) | 1) +#define PINMUX_GPIO49__FUNC_MD1_SIM2_SRST (MTK_PIN_NO(49) | 2) +#define PINMUX_GPIO49__FUNC_MCUPM_JTAG_TCK (MTK_PIN_NO(49) | 3) +#define PINMUX_GPIO49__FUNC_APU_JTAG_TCK (MTK_PIN_NO(49) | 4) +#define PINMUX_GPIO49__FUNC_CCU_JTAG_TCK (MTK_PIN_NO(49) | 5) +#define PINMUX_GPIO49__FUNC_LVTS_SDO (MTK_PIN_NO(49) | 6) +#define PINMUX_GPIO49__FUNC_CONN_DSP_JCK (MTK_PIN_NO(49) | 7) + +#define PINMUX_GPIO50__FUNC_GPIO50 (MTK_PIN_NO(50) | 0) +#define PINMUX_GPIO50__FUNC_MD1_SIM1_SCLK (MTK_PIN_NO(50) | 1) +#define PINMUX_GPIO50__FUNC_MD1_SIM2_SCLK (MTK_PIN_NO(50) | 2) +#define PINMUX_GPIO50__FUNC_LVTS_26M (MTK_PIN_NO(50) | 6) + +#define PINMUX_GPIO51__FUNC_GPIO51 (MTK_PIN_NO(51) | 0) +#define PINMUX_GPIO51__FUNC_MSDC1_CLK (MTK_PIN_NO(51) | 1) +#define PINMUX_GPIO51__FUNC_PCM1_CLK (MTK_PIN_NO(51) | 2) +#define PINMUX_GPIO51__FUNC_CONN_DSP_JCK (MTK_PIN_NO(51) | 3) +#define PINMUX_GPIO51__FUNC_UDI_TCK (MTK_PIN_NO(51) | 4) +#define PINMUX_GPIO51__FUNC_IPU_JTAG_TCK (MTK_PIN_NO(51) | 5) +#define PINMUX_GPIO51__FUNC_SSPM_JTAG_TCK (MTK_PIN_NO(51) | 6) +#define PINMUX_GPIO51__FUNC_JTCK_SEL3 (MTK_PIN_NO(51) | 7) + +#define PINMUX_GPIO52__FUNC_GPIO52 (MTK_PIN_NO(52) | 0) +#define PINMUX_GPIO52__FUNC_MSDC1_CMD (MTK_PIN_NO(52) | 1) +#define PINMUX_GPIO52__FUNC_PCM1_SYNC (MTK_PIN_NO(52) | 2) +#define PINMUX_GPIO52__FUNC_CONN_DSP_JMS (MTK_PIN_NO(52) | 3) +#define PINMUX_GPIO52__FUNC_UDI_TMS (MTK_PIN_NO(52) | 4) +#define PINMUX_GPIO52__FUNC_IPU_JTAG_TMS (MTK_PIN_NO(52) | 5) +#define PINMUX_GPIO52__FUNC_SSPM_JTAG_TMS (MTK_PIN_NO(52) | 6) +#define PINMUX_GPIO52__FUNC_JTMS_SEL3 (MTK_PIN_NO(52) | 7) + +#define PINMUX_GPIO53__FUNC_GPIO53 (MTK_PIN_NO(53) | 0) +#define PINMUX_GPIO53__FUNC_MSDC1_DAT3 (MTK_PIN_NO(53) | 1) +#define PINMUX_GPIO53__FUNC_PCM1_DI (MTK_PIN_NO(53) | 2) +#define PINMUX_GPIO53__FUNC_CONN_DSP_JINTP (MTK_PIN_NO(53) | 3) +#define PINMUX_GPIO53__FUNC_CONN_MCU_AICE_TMSC (MTK_PIN_NO(53) | 4) + +#define PINMUX_GPIO54__FUNC_GPIO54 (MTK_PIN_NO(54) | 0) +#define PINMUX_GPIO54__FUNC_MSDC1_DAT0 (MTK_PIN_NO(54) | 1) +#define PINMUX_GPIO54__FUNC_PCM1_DO0 (MTK_PIN_NO(54) | 2) +#define PINMUX_GPIO54__FUNC_CONN_DSP_JDI (MTK_PIN_NO(54) | 3) +#define PINMUX_GPIO54__FUNC_UDI_TDI (MTK_PIN_NO(54) | 4) +#define PINMUX_GPIO54__FUNC_IPU_JTAG_TDI (MTK_PIN_NO(54) | 5) +#define PINMUX_GPIO54__FUNC_SSPM_JTAG_TDI (MTK_PIN_NO(54) | 6) +#define PINMUX_GPIO54__FUNC_JTDI_SEL3 (MTK_PIN_NO(54) | 7) + +#define PINMUX_GPIO55__FUNC_GPIO55 (MTK_PIN_NO(55) | 0) +#define PINMUX_GPIO55__FUNC_MSDC1_DAT2 (MTK_PIN_NO(55) | 1) +#define PINMUX_GPIO55__FUNC_PCM1_DO2 (MTK_PIN_NO(55) | 2) +#define PINMUX_GPIO55__FUNC_CONN_MCU_AICE_TCKC (MTK_PIN_NO(55) | 3) +#define PINMUX_GPIO55__FUNC_UDI_NTRST (MTK_PIN_NO(55) | 4) +#define PINMUX_GPIO55__FUNC_IPU_JTAG_TRST (MTK_PIN_NO(55) | 5) +#define PINMUX_GPIO55__FUNC_SSPM_JTAG_TRSTN (MTK_PIN_NO(55) | 6) +#define PINMUX_GPIO55__FUNC_JTRSTN_SEL3 (MTK_PIN_NO(55) | 7) + +#define PINMUX_GPIO56__FUNC_GPIO56 (MTK_PIN_NO(56) | 0) +#define PINMUX_GPIO56__FUNC_MSDC1_DAT1 (MTK_PIN_NO(56) | 1) +#define PINMUX_GPIO56__FUNC_PCM1_DO1 (MTK_PIN_NO(56) | 2) +#define PINMUX_GPIO56__FUNC_CONN_DSP_JDO (MTK_PIN_NO(56) | 3) +#define PINMUX_GPIO56__FUNC_UDI_TDO (MTK_PIN_NO(56) | 4) +#define PINMUX_GPIO56__FUNC_IPU_JTAG_TDO (MTK_PIN_NO(56) | 5) +#define PINMUX_GPIO56__FUNC_SSPM_JTAG_TDO (MTK_PIN_NO(56) | 6) +#define PINMUX_GPIO56__FUNC_JTDO_SEL3 (MTK_PIN_NO(56) | 7) + +#define PINMUX_GPIO57__FUNC_GPIO57 (MTK_PIN_NO(57) | 0) +#define PINMUX_GPIO57__FUNC_MIPI2_D_SCLK (MTK_PIN_NO(57) | 1) + +#define PINMUX_GPIO58__FUNC_GPIO58 (MTK_PIN_NO(58) | 0) +#define PINMUX_GPIO58__FUNC_MIPI2_D_SDATA (MTK_PIN_NO(58) | 1) + +#define PINMUX_GPIO59__FUNC_GPIO59 (MTK_PIN_NO(59) | 0) +#define PINMUX_GPIO59__FUNC_MIPI_M_SCLK (MTK_PIN_NO(59) | 1) + +#define PINMUX_GPIO60__FUNC_GPIO60 (MTK_PIN_NO(60) | 0) +#define PINMUX_GPIO60__FUNC_MIPI_M_SDATA (MTK_PIN_NO(60) | 1) + +#define PINMUX_GPIO61__FUNC_GPIO61 (MTK_PIN_NO(61) | 0) +#define PINMUX_GPIO61__FUNC_MD_UCNT_A_TGL (MTK_PIN_NO(61) | 1) + +#define PINMUX_GPIO62__FUNC_GPIO62 (MTK_PIN_NO(62) | 0) +#define PINMUX_GPIO62__FUNC_DIGRF_IRQ (MTK_PIN_NO(62) | 1) + +#define PINMUX_GPIO63__FUNC_GPIO63 (MTK_PIN_NO(63) | 0) +#define PINMUX_GPIO63__FUNC_BPI_BUS0 (MTK_PIN_NO(63) | 1) +#define PINMUX_GPIO63__FUNC_PCIE_WAKE_N (MTK_PIN_NO(63) | 3) + +#define PINMUX_GPIO64__FUNC_GPIO64 (MTK_PIN_NO(64) | 0) +#define PINMUX_GPIO64__FUNC_BPI_BUS1 (MTK_PIN_NO(64) | 1) +#define PINMUX_GPIO64__FUNC_PCIE_PERESET_N (MTK_PIN_NO(64) | 3) + +#define PINMUX_GPIO65__FUNC_GPIO65 (MTK_PIN_NO(65) | 0) +#define PINMUX_GPIO65__FUNC_BPI_BUS2 (MTK_PIN_NO(65) | 1) +#define PINMUX_GPIO65__FUNC_PCIE_CLKREQ_N (MTK_PIN_NO(65) | 3) + +#define PINMUX_GPIO66__FUNC_GPIO66 (MTK_PIN_NO(66) | 0) +#define PINMUX_GPIO66__FUNC_BPI_BUS3 (MTK_PIN_NO(66) | 1) + +#define PINMUX_GPIO67__FUNC_GPIO67 (MTK_PIN_NO(67) | 0) +#define PINMUX_GPIO67__FUNC_BPI_BUS4 (MTK_PIN_NO(67) | 1) + +#define PINMUX_GPIO68__FUNC_GPIO68 (MTK_PIN_NO(68) | 0) +#define PINMUX_GPIO68__FUNC_BPI_BUS5 (MTK_PIN_NO(68) | 1) + +#define PINMUX_GPIO69__FUNC_GPIO69 (MTK_PIN_NO(69) | 0) +#define PINMUX_GPIO69__FUNC_BPI_BUS6 (MTK_PIN_NO(69) | 1) +#define PINMUX_GPIO69__FUNC_CONN_BPI_BUS6 (MTK_PIN_NO(69) | 2) + +#define PINMUX_GPIO70__FUNC_GPIO70 (MTK_PIN_NO(70) | 0) +#define PINMUX_GPIO70__FUNC_BPI_BUS7 (MTK_PIN_NO(70) | 1) +#define PINMUX_GPIO70__FUNC_CONN_BPI_BUS7 (MTK_PIN_NO(70) | 2) + +#define PINMUX_GPIO71__FUNC_GPIO71 (MTK_PIN_NO(71) | 0) +#define PINMUX_GPIO71__FUNC_BPI_BUS8 (MTK_PIN_NO(71) | 1) +#define PINMUX_GPIO71__FUNC_CONN_BPI_BUS8 (MTK_PIN_NO(71) | 2) + +#define PINMUX_GPIO72__FUNC_GPIO72 (MTK_PIN_NO(72) | 0) +#define PINMUX_GPIO72__FUNC_BPI_BUS9 (MTK_PIN_NO(72) | 1) +#define PINMUX_GPIO72__FUNC_CONN_BPI_BUS9 (MTK_PIN_NO(72) | 2) + +#define PINMUX_GPIO73__FUNC_GPIO73 (MTK_PIN_NO(73) | 0) +#define PINMUX_GPIO73__FUNC_BPI_BUS10 (MTK_PIN_NO(73) | 1) +#define PINMUX_GPIO73__FUNC_CONN_BPI_BUS10 (MTK_PIN_NO(73) | 2) + +#define PINMUX_GPIO74__FUNC_GPIO74 (MTK_PIN_NO(74) | 0) +#define PINMUX_GPIO74__FUNC_BPI_BUS11_OLAT0 (MTK_PIN_NO(74) | 1) +#define PINMUX_GPIO74__FUNC_CONN_BPI_BUS11_OLAT0 (MTK_PIN_NO(74) | 2) + +#define PINMUX_GPIO75__FUNC_GPIO75 (MTK_PIN_NO(75) | 0) +#define PINMUX_GPIO75__FUNC_BPI_BUS12_OLAT1 (MTK_PIN_NO(75) | 1) +#define PINMUX_GPIO75__FUNC_CONN_BPI_BUS12_OLAT1 (MTK_PIN_NO(75) | 2) + +#define PINMUX_GPIO76__FUNC_GPIO76 (MTK_PIN_NO(76) | 0) +#define PINMUX_GPIO76__FUNC_BPI_BUS13_OLAT2 (MTK_PIN_NO(76) | 1) +#define PINMUX_GPIO76__FUNC_CONN_BPI_BUS13_OLAT2 (MTK_PIN_NO(76) | 2) + +#define PINMUX_GPIO77__FUNC_GPIO77 (MTK_PIN_NO(77) | 0) +#define PINMUX_GPIO77__FUNC_BPI_BUS14_OLAT3 (MTK_PIN_NO(77) | 1) +#define PINMUX_GPIO77__FUNC_CONN_BPI_BUS14_OLAT3 (MTK_PIN_NO(77) | 2) + +#define PINMUX_GPIO78__FUNC_GPIO78 (MTK_PIN_NO(78) | 0) +#define PINMUX_GPIO78__FUNC_BPI_BUS15_OLAT4 (MTK_PIN_NO(78) | 1) +#define PINMUX_GPIO78__FUNC_CONN_BPI_BUS15_OLAT4 (MTK_PIN_NO(78) | 2) + +#define PINMUX_GPIO79__FUNC_GPIO79 (MTK_PIN_NO(79) | 0) +#define PINMUX_GPIO79__FUNC_BPI_BUS16_OLAT5 (MTK_PIN_NO(79) | 1) +#define PINMUX_GPIO79__FUNC_CONN_BPI_BUS16_OLAT5 (MTK_PIN_NO(79) | 2) + +#define PINMUX_GPIO80__FUNC_GPIO80 (MTK_PIN_NO(80) | 0) +#define PINMUX_GPIO80__FUNC_BPI_BUS17_ANT0 (MTK_PIN_NO(80) | 1) +#define PINMUX_GPIO80__FUNC_CONN_BPI_BUS17_ANT0 (MTK_PIN_NO(80) | 2) +#define PINMUX_GPIO80__FUNC_PCIE_WAKE_N (MTK_PIN_NO(80) | 3) + +#define PINMUX_GPIO81__FUNC_GPIO81 (MTK_PIN_NO(81) | 0) +#define PINMUX_GPIO81__FUNC_BPI_BUS18_ANT1 (MTK_PIN_NO(81) | 1) +#define PINMUX_GPIO81__FUNC_CONN_BPI_BUS18_ANT1 (MTK_PIN_NO(81) | 2) +#define PINMUX_GPIO81__FUNC_PCIE_PERESET_N (MTK_PIN_NO(81) | 3) + +#define PINMUX_GPIO82__FUNC_GPIO82 (MTK_PIN_NO(82) | 0) +#define PINMUX_GPIO82__FUNC_BPI_BUS19_ANT2 (MTK_PIN_NO(82) | 1) +#define PINMUX_GPIO82__FUNC_CONN_BPI_BUS19_ANT2 (MTK_PIN_NO(82) | 2) +#define PINMUX_GPIO82__FUNC_PCIE_CLKREQ_N (MTK_PIN_NO(82) | 3) + +#define PINMUX_GPIO83__FUNC_GPIO83 (MTK_PIN_NO(83) | 0) +#define PINMUX_GPIO83__FUNC_BPI_BUS20_ANT3 (MTK_PIN_NO(83) | 1) +#define PINMUX_GPIO83__FUNC_CONN_BPI_BUS20_ANT3 (MTK_PIN_NO(83) | 2) + +#define PINMUX_GPIO84__FUNC_GPIO84 (MTK_PIN_NO(84) | 0) +#define PINMUX_GPIO84__FUNC_BPI_BUS21_ANT4 (MTK_PIN_NO(84) | 1) +#define PINMUX_GPIO84__FUNC_CONN_BPI_BUS21_ANT4 (MTK_PIN_NO(84) | 2) + +#define PINMUX_GPIO85__FUNC_GPIO85 (MTK_PIN_NO(85) | 0) +#define PINMUX_GPIO85__FUNC_MIPI1_D_SCLK (MTK_PIN_NO(85) | 1) +#define PINMUX_GPIO85__FUNC_CONN_MIPI1_SCLK (MTK_PIN_NO(85) | 2) + +#define PINMUX_GPIO86__FUNC_GPIO86 (MTK_PIN_NO(86) | 0) +#define PINMUX_GPIO86__FUNC_MIPI1_D_SDATA (MTK_PIN_NO(86) | 1) +#define PINMUX_GPIO86__FUNC_CONN_MIPI1_SDATA (MTK_PIN_NO(86) | 2) + +#define PINMUX_GPIO87__FUNC_GPIO87 (MTK_PIN_NO(87) | 0) +#define PINMUX_GPIO87__FUNC_MIPI0_D_SCLK (MTK_PIN_NO(87) | 1) +#define PINMUX_GPIO87__FUNC_CONN_MIPI0_SCLK (MTK_PIN_NO(87) | 2) + +#define PINMUX_GPIO88__FUNC_GPIO88 (MTK_PIN_NO(88) | 0) +#define PINMUX_GPIO88__FUNC_MIPI0_D_SDATA (MTK_PIN_NO(88) | 1) +#define PINMUX_GPIO88__FUNC_CONN_MIPI0_SDATA (MTK_PIN_NO(88) | 2) + +#define PINMUX_GPIO89__FUNC_GPIO89 (MTK_PIN_NO(89) | 0) +#define PINMUX_GPIO89__FUNC_SPMI_SCL (MTK_PIN_NO(89) | 1) +#define PINMUX_GPIO89__FUNC_SCL10 (MTK_PIN_NO(89) | 2) + +#define PINMUX_GPIO90__FUNC_GPIO90 (MTK_PIN_NO(90) | 0) +#define PINMUX_GPIO90__FUNC_SPMI_SDA (MTK_PIN_NO(90) | 1) +#define PINMUX_GPIO90__FUNC_SDA10 (MTK_PIN_NO(90) | 2) + +#define PINMUX_GPIO91__FUNC_GPIO91 (MTK_PIN_NO(91) | 0) +#define PINMUX_GPIO91__FUNC_AP_GOOD (MTK_PIN_NO(91) | 1) + +#define PINMUX_GPIO92__FUNC_GPIO92 (MTK_PIN_NO(92) | 0) +#define PINMUX_GPIO92__FUNC_URXD0 (MTK_PIN_NO(92) | 1) +#define PINMUX_GPIO92__FUNC_MD_URXD0 (MTK_PIN_NO(92) | 2) +#define PINMUX_GPIO92__FUNC_MD_URXD1 (MTK_PIN_NO(92) | 3) +#define PINMUX_GPIO92__FUNC_SSPM_URXD_AO (MTK_PIN_NO(92) | 4) +#define PINMUX_GPIO92__FUNC_CONN_UART0_RXD (MTK_PIN_NO(92) | 5) + +#define PINMUX_GPIO93__FUNC_GPIO93 (MTK_PIN_NO(93) | 0) +#define PINMUX_GPIO93__FUNC_UTXD0 (MTK_PIN_NO(93) | 1) +#define PINMUX_GPIO93__FUNC_MD_UTXD0 (MTK_PIN_NO(93) | 2) +#define PINMUX_GPIO93__FUNC_MD_UTXD1 (MTK_PIN_NO(93) | 3) +#define PINMUX_GPIO93__FUNC_SSPM_UTXD_AO (MTK_PIN_NO(93) | 4) +#define PINMUX_GPIO93__FUNC_CONN_UART0_TXD (MTK_PIN_NO(93) | 5) +#define PINMUX_GPIO93__FUNC_WIFI_TXD (MTK_PIN_NO(93) | 6) + +#define PINMUX_GPIO94__FUNC_GPIO94 (MTK_PIN_NO(94) | 0) +#define PINMUX_GPIO94__FUNC_URXD1 (MTK_PIN_NO(94) | 1) +#define PINMUX_GPIO94__FUNC_ADSP_URXD0 (MTK_PIN_NO(94) | 2) +#define PINMUX_GPIO94__FUNC_MD32_0_RXD (MTK_PIN_NO(94) | 3) +#define PINMUX_GPIO94__FUNC_SSPM_URXD_AO (MTK_PIN_NO(94) | 4) +#define PINMUX_GPIO94__FUNC_TP_URXD1_AO (MTK_PIN_NO(94) | 5) +#define PINMUX_GPIO94__FUNC_TP_URXD2_AO (MTK_PIN_NO(94) | 6) +#define PINMUX_GPIO94__FUNC_MBISTREADEN_TRIGGER (MTK_PIN_NO(94) | 7) + +#define PINMUX_GPIO95__FUNC_GPIO95 (MTK_PIN_NO(95) | 0) +#define PINMUX_GPIO95__FUNC_UTXD1 (MTK_PIN_NO(95) | 1) +#define PINMUX_GPIO95__FUNC_ADSP_UTXD0 (MTK_PIN_NO(95) | 2) +#define PINMUX_GPIO95__FUNC_MD32_0_TXD (MTK_PIN_NO(95) | 3) +#define PINMUX_GPIO95__FUNC_SSPM_UTXD_AO (MTK_PIN_NO(95) | 4) +#define PINMUX_GPIO95__FUNC_TP_UTXD1_AO (MTK_PIN_NO(95) | 5) +#define PINMUX_GPIO95__FUNC_TP_UTXD2_AO (MTK_PIN_NO(95) | 6) +#define PINMUX_GPIO95__FUNC_MBISTWRITEEN_TRIGGER (MTK_PIN_NO(95) | 7) + +#define PINMUX_GPIO96__FUNC_GPIO96 (MTK_PIN_NO(96) | 0) +#define PINMUX_GPIO96__FUNC_TDM_LRCK (MTK_PIN_NO(96) | 1) +#define PINMUX_GPIO96__FUNC_I2S7_LRCK (MTK_PIN_NO(96) | 2) +#define PINMUX_GPIO96__FUNC_I2S9_LRCK (MTK_PIN_NO(96) | 3) +#define PINMUX_GPIO96__FUNC_DPI_D0 (MTK_PIN_NO(96) | 4) +#define PINMUX_GPIO96__FUNC_ADSP_JTAG0_TDI (MTK_PIN_NO(96) | 5) +#define PINMUX_GPIO96__FUNC_IO_JTAG_TDI (MTK_PIN_NO(96) | 7) + +#define PINMUX_GPIO97__FUNC_GPIO97 (MTK_PIN_NO(97) | 0) +#define PINMUX_GPIO97__FUNC_TDM_BCK (MTK_PIN_NO(97) | 1) +#define PINMUX_GPIO97__FUNC_I2S7_BCK (MTK_PIN_NO(97) | 2) +#define PINMUX_GPIO97__FUNC_I2S9_BCK (MTK_PIN_NO(97) | 3) +#define PINMUX_GPIO97__FUNC_DPI_D1 (MTK_PIN_NO(97) | 4) +#define PINMUX_GPIO97__FUNC_ADSP_JTAG0_TRSTN (MTK_PIN_NO(97) | 5) +#define PINMUX_GPIO97__FUNC_IO_JTAG_TRSTN (MTK_PIN_NO(97) | 7) + +#define PINMUX_GPIO98__FUNC_GPIO98 (MTK_PIN_NO(98) | 0) +#define PINMUX_GPIO98__FUNC_TDM_MCK (MTK_PIN_NO(98) | 1) +#define PINMUX_GPIO98__FUNC_I2S7_MCK (MTK_PIN_NO(98) | 2) +#define PINMUX_GPIO98__FUNC_I2S9_MCK (MTK_PIN_NO(98) | 3) +#define PINMUX_GPIO98__FUNC_DPI_D2 (MTK_PIN_NO(98) | 4) +#define PINMUX_GPIO98__FUNC_ADSP_JTAG0_TCK (MTK_PIN_NO(98) | 5) +#define PINMUX_GPIO98__FUNC_IO_JTAG_TCK (MTK_PIN_NO(98) | 7) + +#define PINMUX_GPIO99__FUNC_GPIO99 (MTK_PIN_NO(99) | 0) +#define PINMUX_GPIO99__FUNC_TDM_DATA0 (MTK_PIN_NO(99) | 1) +#define PINMUX_GPIO99__FUNC_I2S6_DI (MTK_PIN_NO(99) | 2) +#define PINMUX_GPIO99__FUNC_I2S8_DI (MTK_PIN_NO(99) | 3) +#define PINMUX_GPIO99__FUNC_DPI_D3 (MTK_PIN_NO(99) | 4) +#define PINMUX_GPIO99__FUNC_ADSP_JTAG0_TDO (MTK_PIN_NO(99) | 5) +#define PINMUX_GPIO99__FUNC_IO_JTAG_TDO (MTK_PIN_NO(99) | 7) + +#define PINMUX_GPIO100__FUNC_GPIO100 (MTK_PIN_NO(100) | 0) +#define PINMUX_GPIO100__FUNC_TDM_DATA1 (MTK_PIN_NO(100) | 1) +#define PINMUX_GPIO100__FUNC_I2S7_DO (MTK_PIN_NO(100) | 2) +#define PINMUX_GPIO100__FUNC_I2S9_DO (MTK_PIN_NO(100) | 3) +#define PINMUX_GPIO100__FUNC_DPI_D4 (MTK_PIN_NO(100) | 4) +#define PINMUX_GPIO100__FUNC_ADSP_JTAG0_TMS (MTK_PIN_NO(100) | 5) +#define PINMUX_GPIO100__FUNC_IO_JTAG_TMS (MTK_PIN_NO(100) | 7) + +#define PINMUX_GPIO101__FUNC_GPIO101 (MTK_PIN_NO(101) | 0) +#define PINMUX_GPIO101__FUNC_TDM_DATA2 (MTK_PIN_NO(101) | 1) +#define PINMUX_GPIO101__FUNC_DMIC1_CLK (MTK_PIN_NO(101) | 2) +#define PINMUX_GPIO101__FUNC_SRCLKENAI0 (MTK_PIN_NO(101) | 3) +#define PINMUX_GPIO101__FUNC_DPI_D5 (MTK_PIN_NO(101) | 4) +#define PINMUX_GPIO101__FUNC_CLKM0 (MTK_PIN_NO(101) | 5) +#define PINMUX_GPIO101__FUNC_DAP_MD32_SWD (MTK_PIN_NO(101) | 7) + +#define PINMUX_GPIO102__FUNC_GPIO102 (MTK_PIN_NO(102) | 0) +#define PINMUX_GPIO102__FUNC_TDM_DATA3 (MTK_PIN_NO(102) | 1) +#define PINMUX_GPIO102__FUNC_DMIC1_DAT (MTK_PIN_NO(102) | 2) +#define PINMUX_GPIO102__FUNC_SRCLKENAI1 (MTK_PIN_NO(102) | 3) +#define PINMUX_GPIO102__FUNC_DPI_D6 (MTK_PIN_NO(102) | 4) +#define PINMUX_GPIO102__FUNC_DVFSRC_EXT_REQ (MTK_PIN_NO(102) | 6) +#define PINMUX_GPIO102__FUNC_DAP_MD32_SWCK (MTK_PIN_NO(102) | 7) + +#define PINMUX_GPIO103__FUNC_GPIO103 (MTK_PIN_NO(103) | 0) +#define PINMUX_GPIO103__FUNC_SPI0_A_MI (MTK_PIN_NO(103) | 1) +#define PINMUX_GPIO103__FUNC_SCP_SPI0_MI (MTK_PIN_NO(103) | 2) +#define PINMUX_GPIO103__FUNC_DPI_D7 (MTK_PIN_NO(103) | 4) +#define PINMUX_GPIO103__FUNC_DFD_TDO (MTK_PIN_NO(103) | 5) +#define PINMUX_GPIO103__FUNC_SPM_JTAG_TDO (MTK_PIN_NO(103) | 6) +#define PINMUX_GPIO103__FUNC_JTDO_SEL1 (MTK_PIN_NO(103) | 7) + +#define PINMUX_GPIO104__FUNC_GPIO104 (MTK_PIN_NO(104) | 0) +#define PINMUX_GPIO104__FUNC_SPI0_A_CSB (MTK_PIN_NO(104) | 1) +#define PINMUX_GPIO104__FUNC_SCP_SPI0_CS (MTK_PIN_NO(104) | 2) +#define PINMUX_GPIO104__FUNC_DPI_D8 (MTK_PIN_NO(104) | 4) +#define PINMUX_GPIO104__FUNC_DFD_TMS (MTK_PIN_NO(104) | 5) +#define PINMUX_GPIO104__FUNC_SPM_JTAG_TMS (MTK_PIN_NO(104) | 6) +#define PINMUX_GPIO104__FUNC_JTMS_SEL1 (MTK_PIN_NO(104) | 7) + +#define PINMUX_GPIO105__FUNC_GPIO105 (MTK_PIN_NO(105) | 0) +#define PINMUX_GPIO105__FUNC_SPI0_A_MO (MTK_PIN_NO(105) | 1) +#define PINMUX_GPIO105__FUNC_SCP_SPI0_MO (MTK_PIN_NO(105) | 2) +#define PINMUX_GPIO105__FUNC_SCP_SDA0 (MTK_PIN_NO(105) | 3) +#define PINMUX_GPIO105__FUNC_DPI_D9 (MTK_PIN_NO(105) | 4) +#define PINMUX_GPIO105__FUNC_DFD_TDI (MTK_PIN_NO(105) | 5) +#define PINMUX_GPIO105__FUNC_SPM_JTAG_TDI (MTK_PIN_NO(105) | 6) +#define PINMUX_GPIO105__FUNC_JTDI_SEL1 (MTK_PIN_NO(105) | 7) + +#define PINMUX_GPIO106__FUNC_GPIO106 (MTK_PIN_NO(106) | 0) +#define PINMUX_GPIO106__FUNC_SPI0_A_CLK (MTK_PIN_NO(106) | 1) +#define PINMUX_GPIO106__FUNC_SCP_SPI0_CK (MTK_PIN_NO(106) | 2) +#define PINMUX_GPIO106__FUNC_SCP_SCL0 (MTK_PIN_NO(106) | 3) +#define PINMUX_GPIO106__FUNC_DPI_D10 (MTK_PIN_NO(106) | 4) +#define PINMUX_GPIO106__FUNC_DFD_TCK_XI (MTK_PIN_NO(106) | 5) +#define PINMUX_GPIO106__FUNC_SPM_JTAG_TCK (MTK_PIN_NO(106) | 6) +#define PINMUX_GPIO106__FUNC_JTCK_SEL1 (MTK_PIN_NO(106) | 7) + +#define PINMUX_GPIO107__FUNC_GPIO107 (MTK_PIN_NO(107) | 0) +#define PINMUX_GPIO107__FUNC_DMIC_CLK (MTK_PIN_NO(107) | 1) +#define PINMUX_GPIO107__FUNC_PWM_0 (MTK_PIN_NO(107) | 2) +#define PINMUX_GPIO107__FUNC_CLKM2 (MTK_PIN_NO(107) | 3) +#define PINMUX_GPIO107__FUNC_SPM_JTAG_TRSTN (MTK_PIN_NO(107) | 6) +#define PINMUX_GPIO107__FUNC_JTRSTN_SEL1 (MTK_PIN_NO(107) | 7) + +#define PINMUX_GPIO108__FUNC_GPIO108 (MTK_PIN_NO(108) | 0) +#define PINMUX_GPIO108__FUNC_DMIC_DAT (MTK_PIN_NO(108) | 1) +#define PINMUX_GPIO108__FUNC_PWM_1 (MTK_PIN_NO(108) | 2) +#define PINMUX_GPIO108__FUNC_CLKM3 (MTK_PIN_NO(108) | 3) +#define PINMUX_GPIO108__FUNC_DAP_SONIC_SWD (MTK_PIN_NO(108) | 7) + +#define PINMUX_GPIO109__FUNC_GPIO109 (MTK_PIN_NO(109) | 0) +#define PINMUX_GPIO109__FUNC_I2S1_MCK (MTK_PIN_NO(109) | 1) +#define PINMUX_GPIO109__FUNC_I2S3_MCK (MTK_PIN_NO(109) | 2) +#define PINMUX_GPIO109__FUNC_I2S2_MCK (MTK_PIN_NO(109) | 3) +#define PINMUX_GPIO109__FUNC_DPI_DE (MTK_PIN_NO(109) | 4) +#define PINMUX_GPIO109__FUNC_I2S2_MCK_A (MTK_PIN_NO(109) | 5) +#define PINMUX_GPIO109__FUNC_SRCLKENAI0 (MTK_PIN_NO(109) | 6) +#define PINMUX_GPIO109__FUNC_DAP_SONIC_SWCK (MTK_PIN_NO(109) | 7) + +#define PINMUX_GPIO110__FUNC_GPIO110 (MTK_PIN_NO(110) | 0) +#define PINMUX_GPIO110__FUNC_I2S1_BCK (MTK_PIN_NO(110) | 1) +#define PINMUX_GPIO110__FUNC_I2S3_BCK (MTK_PIN_NO(110) | 2) +#define PINMUX_GPIO110__FUNC_I2S2_BCK (MTK_PIN_NO(110) | 3) +#define PINMUX_GPIO110__FUNC_DPI_D11 (MTK_PIN_NO(110) | 4) +#define PINMUX_GPIO110__FUNC_I2S2_BCK_A (MTK_PIN_NO(110) | 5) +#define PINMUX_GPIO110__FUNC_CONN_MCU_TDO (MTK_PIN_NO(110) | 6) + +#define PINMUX_GPIO111__FUNC_GPIO111 (MTK_PIN_NO(111) | 0) +#define PINMUX_GPIO111__FUNC_I2S1_LRCK (MTK_PIN_NO(111) | 1) +#define PINMUX_GPIO111__FUNC_I2S3_LRCK (MTK_PIN_NO(111) | 2) +#define PINMUX_GPIO111__FUNC_I2S2_LRCK (MTK_PIN_NO(111) | 3) +#define PINMUX_GPIO111__FUNC_DPI_VSYNC (MTK_PIN_NO(111) | 4) +#define PINMUX_GPIO111__FUNC_I2S2_LRCK_A (MTK_PIN_NO(111) | 5) +#define PINMUX_GPIO111__FUNC_CONN_MCU_TDI (MTK_PIN_NO(111) | 6) + +#define PINMUX_GPIO112__FUNC_GPIO112 (MTK_PIN_NO(112) | 0) +#define PINMUX_GPIO112__FUNC_I2S2_DI (MTK_PIN_NO(112) | 1) +#define PINMUX_GPIO112__FUNC_I2S0_DI (MTK_PIN_NO(112) | 2) +#define PINMUX_GPIO112__FUNC_I2S2_DI2 (MTK_PIN_NO(112) | 3) +#define PINMUX_GPIO112__FUNC_DPI_CK (MTK_PIN_NO(112) | 4) +#define PINMUX_GPIO112__FUNC_I2S2_DI_A (MTK_PIN_NO(112) | 5) +#define PINMUX_GPIO112__FUNC_CONN_MCU_TMS (MTK_PIN_NO(112) | 6) + +#define PINMUX_GPIO113__FUNC_GPIO113 (MTK_PIN_NO(113) | 0) +#define PINMUX_GPIO113__FUNC_I2S1_DO (MTK_PIN_NO(113) | 1) +#define PINMUX_GPIO113__FUNC_I2S3_DO (MTK_PIN_NO(113) | 2) +#define PINMUX_GPIO113__FUNC_I2S5_DO (MTK_PIN_NO(113) | 3) +#define PINMUX_GPIO113__FUNC_DPI_HSYNC (MTK_PIN_NO(113) | 4) +#define PINMUX_GPIO113__FUNC_I2S2_DI2 (MTK_PIN_NO(113) | 5) +#define PINMUX_GPIO113__FUNC_CONN_MCU_TCK (MTK_PIN_NO(113) | 6) + +#define PINMUX_GPIO114__FUNC_GPIO114 (MTK_PIN_NO(114) | 0) +#define PINMUX_GPIO114__FUNC_SPI2_MI (MTK_PIN_NO(114) | 1) +#define PINMUX_GPIO114__FUNC_SCP_SPI2_MI (MTK_PIN_NO(114) | 2) +#define PINMUX_GPIO114__FUNC_PCM0_DI (MTK_PIN_NO(114) | 4) +#define PINMUX_GPIO114__FUNC_CONN_MCU_TRST_B (MTK_PIN_NO(114) | 6) + +#define PINMUX_GPIO115__FUNC_GPIO115 (MTK_PIN_NO(115) | 0) +#define PINMUX_GPIO115__FUNC_SPI2_CSB (MTK_PIN_NO(115) | 1) +#define PINMUX_GPIO115__FUNC_SCP_SPI2_CS (MTK_PIN_NO(115) | 2) +#define PINMUX_GPIO115__FUNC_PCM0_SYNC (MTK_PIN_NO(115) | 4) +#define PINMUX_GPIO115__FUNC_CONN_MCU_DBGI_N (MTK_PIN_NO(115) | 6) + +#define PINMUX_GPIO116__FUNC_GPIO116 (MTK_PIN_NO(116) | 0) +#define PINMUX_GPIO116__FUNC_SPI2_MO (MTK_PIN_NO(116) | 1) +#define PINMUX_GPIO116__FUNC_SCP_SPI2_MO (MTK_PIN_NO(116) | 2) +#define PINMUX_GPIO116__FUNC_SCP_SDA1 (MTK_PIN_NO(116) | 3) +#define PINMUX_GPIO116__FUNC_PCM0_DO (MTK_PIN_NO(116) | 4) +#define PINMUX_GPIO116__FUNC_CONN_MCU_DBGACK_N (MTK_PIN_NO(116) | 6) + +#define PINMUX_GPIO117__FUNC_GPIO117 (MTK_PIN_NO(117) | 0) +#define PINMUX_GPIO117__FUNC_SPI2_CLK (MTK_PIN_NO(117) | 1) +#define PINMUX_GPIO117__FUNC_SCP_SPI2_CK (MTK_PIN_NO(117) | 2) +#define PINMUX_GPIO117__FUNC_SCP_SCL1 (MTK_PIN_NO(117) | 3) +#define PINMUX_GPIO117__FUNC_PCM0_CLK (MTK_PIN_NO(117) | 4) + +#define PINMUX_GPIO118__FUNC_GPIO118 (MTK_PIN_NO(118) | 0) +#define PINMUX_GPIO118__FUNC_SCL1 (MTK_PIN_NO(118) | 1) +#define PINMUX_GPIO118__FUNC_SCP_SCL0 (MTK_PIN_NO(118) | 2) +#define PINMUX_GPIO118__FUNC_SCP_SCL1 (MTK_PIN_NO(118) | 3) + +#define PINMUX_GPIO119__FUNC_GPIO119 (MTK_PIN_NO(119) | 0) +#define PINMUX_GPIO119__FUNC_SDA1 (MTK_PIN_NO(119) | 1) +#define PINMUX_GPIO119__FUNC_SCP_SDA0 (MTK_PIN_NO(119) | 2) +#define PINMUX_GPIO119__FUNC_SCP_SDA1 (MTK_PIN_NO(119) | 3) + +#define PINMUX_GPIO120__FUNC_GPIO120 (MTK_PIN_NO(120) | 0) +#define PINMUX_GPIO120__FUNC_SCL9 (MTK_PIN_NO(120) | 1) +#define PINMUX_GPIO120__FUNC_SCP_SCL0 (MTK_PIN_NO(120) | 2) + +#define PINMUX_GPIO121__FUNC_GPIO121 (MTK_PIN_NO(121) | 0) +#define PINMUX_GPIO121__FUNC_SDA9 (MTK_PIN_NO(121) | 1) +#define PINMUX_GPIO121__FUNC_SCP_SDA0 (MTK_PIN_NO(121) | 2) + +#define PINMUX_GPIO122__FUNC_GPIO122 (MTK_PIN_NO(122) | 0) +#define PINMUX_GPIO122__FUNC_SCL8 (MTK_PIN_NO(122) | 1) +#define PINMUX_GPIO122__FUNC_SCP_SDA0 (MTK_PIN_NO(122) | 2) + +#define PINMUX_GPIO123__FUNC_GPIO123 (MTK_PIN_NO(123) | 0) +#define PINMUX_GPIO123__FUNC_SDA8 (MTK_PIN_NO(123) | 1) +#define PINMUX_GPIO123__FUNC_SCP_SCL0 (MTK_PIN_NO(123) | 2) + +#define PINMUX_GPIO124__FUNC_GPIO124 (MTK_PIN_NO(124) | 0) +#define PINMUX_GPIO124__FUNC_SCL7 (MTK_PIN_NO(124) | 1) +#define PINMUX_GPIO124__FUNC_DMIC1_CLK (MTK_PIN_NO(124) | 2) + +#define PINMUX_GPIO125__FUNC_GPIO125 (MTK_PIN_NO(125) | 0) +#define PINMUX_GPIO125__FUNC_SDA7 (MTK_PIN_NO(125) | 1) +#define PINMUX_GPIO125__FUNC_DMIC1_DAT (MTK_PIN_NO(125) | 2) + +#define PINMUX_GPIO126__FUNC_GPIO126 (MTK_PIN_NO(126) | 0) +#define PINMUX_GPIO126__FUNC_CMFLASH0 (MTK_PIN_NO(126) | 1) +#define PINMUX_GPIO126__FUNC_PWM_2 (MTK_PIN_NO(126) | 2) +#define PINMUX_GPIO126__FUNC_TP_UCTS1_AO (MTK_PIN_NO(126) | 3) +#define PINMUX_GPIO126__FUNC_UCTS0 (MTK_PIN_NO(126) | 4) +#define PINMUX_GPIO126__FUNC_SCL11 (MTK_PIN_NO(126) | 5) +#define PINMUX_GPIO126__FUNC_GPS_L1_ELNA_EN (MTK_PIN_NO(126) | 6) +#define PINMUX_GPIO126__FUNC_DBG_MON_A14 (MTK_PIN_NO(126) | 7) + +#define PINMUX_GPIO127__FUNC_GPIO127 (MTK_PIN_NO(127) | 0) +#define PINMUX_GPIO127__FUNC_CMFLASH1 (MTK_PIN_NO(127) | 1) +#define PINMUX_GPIO127__FUNC_PWM_3 (MTK_PIN_NO(127) | 2) +#define PINMUX_GPIO127__FUNC_TP_URTS1_AO (MTK_PIN_NO(127) | 3) +#define PINMUX_GPIO127__FUNC_URTS0 (MTK_PIN_NO(127) | 4) +#define PINMUX_GPIO127__FUNC_SDA11 (MTK_PIN_NO(127) | 5) +#define PINMUX_GPIO127__FUNC_DBG_MON_A15 (MTK_PIN_NO(127) | 7) + +#define PINMUX_GPIO128__FUNC_GPIO128 (MTK_PIN_NO(128) | 0) +#define PINMUX_GPIO128__FUNC_CMFLASH2 (MTK_PIN_NO(128) | 1) +#define PINMUX_GPIO128__FUNC_PWM_0 (MTK_PIN_NO(128) | 2) +#define PINMUX_GPIO128__FUNC_TP_UCTS2_AO (MTK_PIN_NO(128) | 3) +#define PINMUX_GPIO128__FUNC_UCTS1 (MTK_PIN_NO(128) | 4) +#define PINMUX_GPIO128__FUNC_SCL_6306 (MTK_PIN_NO(128) | 5) +#define PINMUX_GPIO128__FUNC_DBG_MON_A16 (MTK_PIN_NO(128) | 7) + +#define PINMUX_GPIO129__FUNC_GPIO129 (MTK_PIN_NO(129) | 0) +#define PINMUX_GPIO129__FUNC_CMFLASH3 (MTK_PIN_NO(129) | 1) +#define PINMUX_GPIO129__FUNC_PWM_1 (MTK_PIN_NO(129) | 2) +#define PINMUX_GPIO129__FUNC_TP_URTS2_AO (MTK_PIN_NO(129) | 3) +#define PINMUX_GPIO129__FUNC_URTS1 (MTK_PIN_NO(129) | 4) +#define PINMUX_GPIO129__FUNC_SDA_6306 (MTK_PIN_NO(129) | 5) +#define PINMUX_GPIO129__FUNC_DBG_MON_A17 (MTK_PIN_NO(129) | 7) + +#define PINMUX_GPIO130__FUNC_GPIO130 (MTK_PIN_NO(130) | 0) +#define PINMUX_GPIO130__FUNC_CMVREF0 (MTK_PIN_NO(130) | 1) +#define PINMUX_GPIO130__FUNC_ANT_SEL10 (MTK_PIN_NO(130) | 2) +#define PINMUX_GPIO130__FUNC_SCP_JTAG0_TDO (MTK_PIN_NO(130) | 3) +#define PINMUX_GPIO130__FUNC_MD32_0_JTAG_TDO (MTK_PIN_NO(130) | 4) +#define PINMUX_GPIO130__FUNC_SCL11 (MTK_PIN_NO(130) | 5) +#define PINMUX_GPIO130__FUNC_SPI5_B_CLK (MTK_PIN_NO(130) | 6) +#define PINMUX_GPIO130__FUNC_DBG_MON_A22 (MTK_PIN_NO(130) | 7) + +#define PINMUX_GPIO131__FUNC_GPIO131 (MTK_PIN_NO(131) | 0) +#define PINMUX_GPIO131__FUNC_CMVREF1 (MTK_PIN_NO(131) | 1) +#define PINMUX_GPIO131__FUNC_ANT_SEL11 (MTK_PIN_NO(131) | 2) +#define PINMUX_GPIO131__FUNC_SCP_JTAG0_TDI (MTK_PIN_NO(131) | 3) +#define PINMUX_GPIO131__FUNC_MD32_0_JTAG_TDI (MTK_PIN_NO(131) | 4) +#define PINMUX_GPIO131__FUNC_SDA11 (MTK_PIN_NO(131) | 5) +#define PINMUX_GPIO131__FUNC_SPI5_B_MO (MTK_PIN_NO(131) | 6) +#define PINMUX_GPIO131__FUNC_DBG_MON_A25 (MTK_PIN_NO(131) | 7) + +#define PINMUX_GPIO132__FUNC_GPIO132 (MTK_PIN_NO(132) | 0) +#define PINMUX_GPIO132__FUNC_CMVREF2 (MTK_PIN_NO(132) | 1) +#define PINMUX_GPIO132__FUNC_ANT_SEL12 (MTK_PIN_NO(132) | 2) +#define PINMUX_GPIO132__FUNC_SCP_JTAG0_TMS (MTK_PIN_NO(132) | 3) +#define PINMUX_GPIO132__FUNC_MD32_0_JTAG_TMS (MTK_PIN_NO(132) | 4) +#define PINMUX_GPIO132__FUNC_DBG_MON_A28 (MTK_PIN_NO(132) | 7) + +#define PINMUX_GPIO133__FUNC_GPIO133 (MTK_PIN_NO(133) | 0) +#define PINMUX_GPIO133__FUNC_CMVREF3 (MTK_PIN_NO(133) | 1) +#define PINMUX_GPIO133__FUNC_GPS_L1_ELNA_EN (MTK_PIN_NO(133) | 2) +#define PINMUX_GPIO133__FUNC_SCP_JTAG0_TCK (MTK_PIN_NO(133) | 3) +#define PINMUX_GPIO133__FUNC_MD32_0_JTAG_TCK (MTK_PIN_NO(133) | 4) +#define PINMUX_GPIO133__FUNC_SPI5_B_CSB (MTK_PIN_NO(133) | 6) +#define PINMUX_GPIO133__FUNC_DBG_MON_A23 (MTK_PIN_NO(133) | 7) + +#define PINMUX_GPIO134__FUNC_GPIO134 (MTK_PIN_NO(134) | 0) +#define PINMUX_GPIO134__FUNC_CMVREF4 (MTK_PIN_NO(134) | 1) +#define PINMUX_GPIO134__FUNC_SCP_JTAG0_TRSTN (MTK_PIN_NO(134) | 3) +#define PINMUX_GPIO134__FUNC_MD32_0_JTAG_TRST (MTK_PIN_NO(134) | 4) +#define PINMUX_GPIO134__FUNC_DBG_MON_A26 (MTK_PIN_NO(134) | 7) + +#define PINMUX_GPIO135__FUNC_GPIO135 (MTK_PIN_NO(135) | 0) +#define PINMUX_GPIO135__FUNC_PWM_0 (MTK_PIN_NO(135) | 1) +#define PINMUX_GPIO135__FUNC_SRCLKENAI1 (MTK_PIN_NO(135) | 2) +#define PINMUX_GPIO135__FUNC_MD_URXD0 (MTK_PIN_NO(135) | 3) +#define PINMUX_GPIO135__FUNC_MD32_0_RXD (MTK_PIN_NO(135) | 4) +#define PINMUX_GPIO135__FUNC_CONN_TCXOENA_REQ (MTK_PIN_NO(135) | 5) +#define PINMUX_GPIO135__FUNC_DBG_MON_A29 (MTK_PIN_NO(135) | 7) + +#define PINMUX_GPIO136__FUNC_GPIO136 (MTK_PIN_NO(136) | 0) +#define PINMUX_GPIO136__FUNC_CMMCLK3 (MTK_PIN_NO(136) | 1) +#define PINMUX_GPIO136__FUNC_CLKM1 (MTK_PIN_NO(136) | 2) +#define PINMUX_GPIO136__FUNC_MD_UTXD0 (MTK_PIN_NO(136) | 3) +#define PINMUX_GPIO136__FUNC_MD32_0_TXD (MTK_PIN_NO(136) | 4) +#define PINMUX_GPIO136__FUNC_SPI5_B_MI (MTK_PIN_NO(136) | 6) +#define PINMUX_GPIO136__FUNC_DBG_MON_A24 (MTK_PIN_NO(136) | 7) + +#define PINMUX_GPIO137__FUNC_GPIO137 (MTK_PIN_NO(137) | 0) +#define PINMUX_GPIO137__FUNC_CMMCLK4 (MTK_PIN_NO(137) | 1) +#define PINMUX_GPIO137__FUNC_CLKM2 (MTK_PIN_NO(137) | 2) +#define PINMUX_GPIO137__FUNC_MD_URXD1 (MTK_PIN_NO(137) | 3) +#define PINMUX_GPIO137__FUNC_CONN_UART0_RXD (MTK_PIN_NO(137) | 6) +#define PINMUX_GPIO137__FUNC_DBG_MON_A27 (MTK_PIN_NO(137) | 7) + +#define PINMUX_GPIO138__FUNC_GPIO138 (MTK_PIN_NO(138) | 0) +#define PINMUX_GPIO138__FUNC_CMMCLK5 (MTK_PIN_NO(138) | 1) +#define PINMUX_GPIO138__FUNC_CLKM3 (MTK_PIN_NO(138) | 2) +#define PINMUX_GPIO138__FUNC_MD_UTXD1 (MTK_PIN_NO(138) | 3) +#define PINMUX_GPIO138__FUNC_CONN_UART0_TXD (MTK_PIN_NO(138) | 6) +#define PINMUX_GPIO138__FUNC_DBG_MON_A30 (MTK_PIN_NO(138) | 7) + +#define PINMUX_GPIO139__FUNC_GPIO139 (MTK_PIN_NO(139) | 0) +#define PINMUX_GPIO139__FUNC_SCL4 (MTK_PIN_NO(139) | 1) +#define PINMUX_GPIO139__FUNC_DBG_MON_A21 (MTK_PIN_NO(139) | 7) + +#define PINMUX_GPIO140__FUNC_GPIO140 (MTK_PIN_NO(140) | 0) +#define PINMUX_GPIO140__FUNC_SDA4 (MTK_PIN_NO(140) | 1) +#define PINMUX_GPIO140__FUNC_DBG_MON_A20 (MTK_PIN_NO(140) | 7) + +#define PINMUX_GPIO141__FUNC_GPIO141 (MTK_PIN_NO(141) | 0) +#define PINMUX_GPIO141__FUNC_SCL2 (MTK_PIN_NO(141) | 1) +#define PINMUX_GPIO141__FUNC_DBG_MON_A18 (MTK_PIN_NO(141) | 7) + +#define PINMUX_GPIO142__FUNC_GPIO142 (MTK_PIN_NO(142) | 0) +#define PINMUX_GPIO142__FUNC_SDA2 (MTK_PIN_NO(142) | 1) +#define PINMUX_GPIO142__FUNC_DBG_MON_A19 (MTK_PIN_NO(142) | 7) + +#define PINMUX_GPIO143__FUNC_GPIO143 (MTK_PIN_NO(143) | 0) +#define PINMUX_GPIO143__FUNC_CMVREF0 (MTK_PIN_NO(143) | 1) +#define PINMUX_GPIO143__FUNC_SPI3_CLK (MTK_PIN_NO(143) | 2) +#define PINMUX_GPIO143__FUNC_ADSP_JTAG1_TDO (MTK_PIN_NO(143) | 3) +#define PINMUX_GPIO143__FUNC_SCP_JTAG1_TDO (MTK_PIN_NO(143) | 4) +#define PINMUX_GPIO143__FUNC_DBG_MON_A31 (MTK_PIN_NO(143) | 7) + +#define PINMUX_GPIO144__FUNC_GPIO144 (MTK_PIN_NO(144) | 0) +#define PINMUX_GPIO144__FUNC_CMVREF1 (MTK_PIN_NO(144) | 1) +#define PINMUX_GPIO144__FUNC_SPI3_CSB (MTK_PIN_NO(144) | 2) +#define PINMUX_GPIO144__FUNC_ADSP_JTAG1_TDI (MTK_PIN_NO(144) | 3) +#define PINMUX_GPIO144__FUNC_SCP_JTAG1_TDI (MTK_PIN_NO(144) | 4) + +#define PINMUX_GPIO145__FUNC_GPIO145 (MTK_PIN_NO(145) | 0) +#define PINMUX_GPIO145__FUNC_CMVREF2 (MTK_PIN_NO(145) | 1) +#define PINMUX_GPIO145__FUNC_SPI3_MI (MTK_PIN_NO(145) | 2) +#define PINMUX_GPIO145__FUNC_ADSP_JTAG1_TMS (MTK_PIN_NO(145) | 3) +#define PINMUX_GPIO145__FUNC_SCP_JTAG1_TMS (MTK_PIN_NO(145) | 4) + +#define PINMUX_GPIO146__FUNC_GPIO146 (MTK_PIN_NO(146) | 0) +#define PINMUX_GPIO146__FUNC_CMVREF3 (MTK_PIN_NO(146) | 1) +#define PINMUX_GPIO146__FUNC_SPI3_MO (MTK_PIN_NO(146) | 2) +#define PINMUX_GPIO146__FUNC_ADSP_JTAG1_TCK (MTK_PIN_NO(146) | 3) +#define PINMUX_GPIO146__FUNC_SCP_JTAG1_TCK (MTK_PIN_NO(146) | 4) +#define PINMUX_GPIO146__FUNC_DBG_MON_A32 (MTK_PIN_NO(146) | 7) + +#define PINMUX_GPIO147__FUNC_GPIO147 (MTK_PIN_NO(147) | 0) +#define PINMUX_GPIO147__FUNC_CMVREF4 (MTK_PIN_NO(147) | 1) +#define PINMUX_GPIO147__FUNC_EXT_FRAME_SYNC (MTK_PIN_NO(147) | 2) +#define PINMUX_GPIO147__FUNC_ADSP_JTAG1_TRSTN (MTK_PIN_NO(147) | 3) +#define PINMUX_GPIO147__FUNC_SCP_JTAG1_TRSTN (MTK_PIN_NO(147) | 4) + +#define PINMUX_GPIO148__FUNC_GPIO148 (MTK_PIN_NO(148) | 0) +#define PINMUX_GPIO148__FUNC_PWM_1 (MTK_PIN_NO(148) | 1) +#define PINMUX_GPIO148__FUNC_AGPS_SYNC (MTK_PIN_NO(148) | 2) +#define PINMUX_GPIO148__FUNC_CMMCLK5 (MTK_PIN_NO(148) | 3) + +#define PINMUX_GPIO149__FUNC_GPIO149 (MTK_PIN_NO(149) | 0) +#define PINMUX_GPIO149__FUNC_CMMCLK0 (MTK_PIN_NO(149) | 1) +#define PINMUX_GPIO149__FUNC_CLKM0 (MTK_PIN_NO(149) | 2) +#define PINMUX_GPIO149__FUNC_MD32_0_GPIO0 (MTK_PIN_NO(149) | 3) + +#define PINMUX_GPIO150__FUNC_GPIO150 (MTK_PIN_NO(150) | 0) +#define PINMUX_GPIO150__FUNC_CMMCLK1 (MTK_PIN_NO(150) | 1) +#define PINMUX_GPIO150__FUNC_CLKM1 (MTK_PIN_NO(150) | 2) +#define PINMUX_GPIO150__FUNC_MD32_0_GPIO1 (MTK_PIN_NO(150) | 3) +#define PINMUX_GPIO150__FUNC_CONN_MCU_AICE_TMSC (MTK_PIN_NO(150) | 7) + +#define PINMUX_GPIO151__FUNC_GPIO151 (MTK_PIN_NO(151) | 0) +#define PINMUX_GPIO151__FUNC_CMMCLK2 (MTK_PIN_NO(151) | 1) +#define PINMUX_GPIO151__FUNC_CLKM2 (MTK_PIN_NO(151) | 2) +#define PINMUX_GPIO151__FUNC_MD32_0_GPIO2 (MTK_PIN_NO(151) | 3) +#define PINMUX_GPIO151__FUNC_CONN_MCU_AICE_TCKC (MTK_PIN_NO(151) | 7) + +#define PINMUX_GPIO152__FUNC_GPIO152 (MTK_PIN_NO(152) | 0) +#define PINMUX_GPIO152__FUNC_KPROW1 (MTK_PIN_NO(152) | 1) +#define PINMUX_GPIO152__FUNC_PWM_2 (MTK_PIN_NO(152) | 2) +#define PINMUX_GPIO152__FUNC_IDDIG (MTK_PIN_NO(152) | 3) +#define PINMUX_GPIO152__FUNC_MBISTREADEN_TRIGGER (MTK_PIN_NO(152) | 6) +#define PINMUX_GPIO152__FUNC_DBG_MON_B9 (MTK_PIN_NO(152) | 7) + +#define PINMUX_GPIO153__FUNC_GPIO153 (MTK_PIN_NO(153) | 0) +#define PINMUX_GPIO153__FUNC_KPROW0 (MTK_PIN_NO(153) | 1) +#define PINMUX_GPIO153__FUNC_DBG_MON_B8 (MTK_PIN_NO(153) | 7) + +#define PINMUX_GPIO154__FUNC_GPIO154 (MTK_PIN_NO(154) | 0) +#define PINMUX_GPIO154__FUNC_KPCOL0 (MTK_PIN_NO(154) | 1) +#define PINMUX_GPIO154__FUNC_DBG_MON_B6 (MTK_PIN_NO(154) | 7) + +#define PINMUX_GPIO155__FUNC_GPIO155 (MTK_PIN_NO(155) | 0) +#define PINMUX_GPIO155__FUNC_KPCOL1 (MTK_PIN_NO(155) | 1) +#define PINMUX_GPIO155__FUNC_PWM_3 (MTK_PIN_NO(155) | 2) +#define PINMUX_GPIO155__FUNC_USB_DRVVBUS (MTK_PIN_NO(155) | 3) +#define PINMUX_GPIO155__FUNC_CONN_TCXOENA_REQ (MTK_PIN_NO(155) | 4) +#define PINMUX_GPIO155__FUNC_MBISTWRITEEN_TRIGGER (MTK_PIN_NO(155) | 6) +#define PINMUX_GPIO155__FUNC_DBG_MON_B7 (MTK_PIN_NO(155) | 7) + +#define PINMUX_GPIO156__FUNC_GPIO156 (MTK_PIN_NO(156) | 0) +#define PINMUX_GPIO156__FUNC_SPI1_A_CLK (MTK_PIN_NO(156) | 1) +#define PINMUX_GPIO156__FUNC_SCP_SPI1_A_CK (MTK_PIN_NO(156) | 2) +#define PINMUX_GPIO156__FUNC_MRG_CLK (MTK_PIN_NO(156) | 3) +#define PINMUX_GPIO156__FUNC_AGPS_SYNC (MTK_PIN_NO(156) | 4) +#define PINMUX_GPIO156__FUNC_MD_URXD0 (MTK_PIN_NO(156) | 5) +#define PINMUX_GPIO156__FUNC_UDI_TMS (MTK_PIN_NO(156) | 6) +#define PINMUX_GPIO156__FUNC_DBG_MON_B10 (MTK_PIN_NO(156) | 7) + +#define PINMUX_GPIO157__FUNC_GPIO157 (MTK_PIN_NO(157) | 0) +#define PINMUX_GPIO157__FUNC_SPI1_A_CSB (MTK_PIN_NO(157) | 1) +#define PINMUX_GPIO157__FUNC_SCP_SPI1_A_CS (MTK_PIN_NO(157) | 2) +#define PINMUX_GPIO157__FUNC_MRG_SYNC (MTK_PIN_NO(157) | 3) +#define PINMUX_GPIO157__FUNC_EXT_FRAME_SYNC (MTK_PIN_NO(157) | 4) +#define PINMUX_GPIO157__FUNC_MD_UTXD0 (MTK_PIN_NO(157) | 5) +#define PINMUX_GPIO157__FUNC_UDI_TCK (MTK_PIN_NO(157) | 6) +#define PINMUX_GPIO157__FUNC_DBG_MON_B11 (MTK_PIN_NO(157) | 7) + +#define PINMUX_GPIO158__FUNC_GPIO158 (MTK_PIN_NO(158) | 0) +#define PINMUX_GPIO158__FUNC_SPI1_A_MI (MTK_PIN_NO(158) | 1) +#define PINMUX_GPIO158__FUNC_SCP_SPI1_A_MI (MTK_PIN_NO(158) | 2) +#define PINMUX_GPIO158__FUNC_MRG_DI (MTK_PIN_NO(158) | 3) +#define PINMUX_GPIO158__FUNC_PTA_RXD (MTK_PIN_NO(158) | 4) +#define PINMUX_GPIO158__FUNC_MD_URXD1 (MTK_PIN_NO(158) | 5) +#define PINMUX_GPIO158__FUNC_UDI_TDO (MTK_PIN_NO(158) | 6) +#define PINMUX_GPIO158__FUNC_DBG_MON_B12 (MTK_PIN_NO(158) | 7) + +#define PINMUX_GPIO159__FUNC_GPIO159 (MTK_PIN_NO(159) | 0) +#define PINMUX_GPIO159__FUNC_SPI1_A_MO (MTK_PIN_NO(159) | 1) +#define PINMUX_GPIO159__FUNC_SCP_SPI1_A_MO (MTK_PIN_NO(159) | 2) +#define PINMUX_GPIO159__FUNC_MRG_DO (MTK_PIN_NO(159) | 3) +#define PINMUX_GPIO159__FUNC_PTA_TXD (MTK_PIN_NO(159) | 4) +#define PINMUX_GPIO159__FUNC_MD_UTXD1 (MTK_PIN_NO(159) | 5) +#define PINMUX_GPIO159__FUNC_UDI_NTRST (MTK_PIN_NO(159) | 6) +#define PINMUX_GPIO159__FUNC_DBG_MON_B13 (MTK_PIN_NO(159) | 7) + +#define PINMUX_GPIO160__FUNC_GPIO160 (MTK_PIN_NO(160) | 0) +#define PINMUX_GPIO160__FUNC_SCL3 (MTK_PIN_NO(160) | 1) +#define PINMUX_GPIO160__FUNC_SCP_SCL1 (MTK_PIN_NO(160) | 3) +#define PINMUX_GPIO160__FUNC_DBG_MON_B14 (MTK_PIN_NO(160) | 7) + +#define PINMUX_GPIO161__FUNC_GPIO161 (MTK_PIN_NO(161) | 0) +#define PINMUX_GPIO161__FUNC_SDA3 (MTK_PIN_NO(161) | 1) +#define PINMUX_GPIO161__FUNC_SCP_SDA1 (MTK_PIN_NO(161) | 3) +#define PINMUX_GPIO161__FUNC_DBG_MON_B15 (MTK_PIN_NO(161) | 7) + +#define PINMUX_GPIO162__FUNC_GPIO162 (MTK_PIN_NO(162) | 0) +#define PINMUX_GPIO162__FUNC_ANT_SEL0 (MTK_PIN_NO(162) | 1) +#define PINMUX_GPIO162__FUNC_GPS_L1_ELNA_EN (MTK_PIN_NO(162) | 2) +#define PINMUX_GPIO162__FUNC_UDI_TDI (MTK_PIN_NO(162) | 6) +#define PINMUX_GPIO162__FUNC_DBG_MON_B16 (MTK_PIN_NO(162) | 7) + +#define PINMUX_GPIO163__FUNC_GPIO163 (MTK_PIN_NO(163) | 0) +#define PINMUX_GPIO163__FUNC_ANT_SEL1 (MTK_PIN_NO(163) | 1) +#define PINMUX_GPIO163__FUNC_CONN_TCXOENA_REQ (MTK_PIN_NO(163) | 2) +#define PINMUX_GPIO163__FUNC_DBG_MON_B17 (MTK_PIN_NO(163) | 7) + +#define PINMUX_GPIO164__FUNC_GPIO164 (MTK_PIN_NO(164) | 0) +#define PINMUX_GPIO164__FUNC_ANT_SEL2 (MTK_PIN_NO(164) | 1) +#define PINMUX_GPIO164__FUNC_SCP_SPI1_B_CK (MTK_PIN_NO(164) | 2) +#define PINMUX_GPIO164__FUNC_TP_URXD1_AO (MTK_PIN_NO(164) | 3) +#define PINMUX_GPIO164__FUNC_UCTS0 (MTK_PIN_NO(164) | 5) +#define PINMUX_GPIO164__FUNC_DBG_MON_B18 (MTK_PIN_NO(164) | 7) + +#define PINMUX_GPIO165__FUNC_GPIO165 (MTK_PIN_NO(165) | 0) +#define PINMUX_GPIO165__FUNC_ANT_SEL3 (MTK_PIN_NO(165) | 1) +#define PINMUX_GPIO165__FUNC_SCP_SPI1_B_CS (MTK_PIN_NO(165) | 2) +#define PINMUX_GPIO165__FUNC_TP_UTXD1_AO (MTK_PIN_NO(165) | 3) +#define PINMUX_GPIO165__FUNC_CONN_TCXOENA_REQ (MTK_PIN_NO(165) | 4) +#define PINMUX_GPIO165__FUNC_URTS0 (MTK_PIN_NO(165) | 5) +#define PINMUX_GPIO165__FUNC_DBG_MON_B19 (MTK_PIN_NO(165) | 7) + +#define PINMUX_GPIO166__FUNC_GPIO166 (MTK_PIN_NO(166) | 0) +#define PINMUX_GPIO166__FUNC_ANT_SEL4 (MTK_PIN_NO(166) | 1) +#define PINMUX_GPIO166__FUNC_SCP_SPI1_B_MI (MTK_PIN_NO(166) | 2) +#define PINMUX_GPIO166__FUNC_TP_URXD2_AO (MTK_PIN_NO(166) | 3) +#define PINMUX_GPIO166__FUNC_SRCLKENAI1 (MTK_PIN_NO(166) | 4) +#define PINMUX_GPIO166__FUNC_UCTS1 (MTK_PIN_NO(166) | 5) +#define PINMUX_GPIO166__FUNC_DBG_MON_B20 (MTK_PIN_NO(166) | 7) + +#define PINMUX_GPIO167__FUNC_GPIO167 (MTK_PIN_NO(167) | 0) +#define PINMUX_GPIO167__FUNC_ANT_SEL5 (MTK_PIN_NO(167) | 1) +#define PINMUX_GPIO167__FUNC_SCP_SPI1_B_MO (MTK_PIN_NO(167) | 2) +#define PINMUX_GPIO167__FUNC_TP_UTXD2_AO (MTK_PIN_NO(167) | 3) +#define PINMUX_GPIO167__FUNC_SRCLKENAI0 (MTK_PIN_NO(167) | 4) +#define PINMUX_GPIO167__FUNC_URTS1 (MTK_PIN_NO(167) | 5) +#define PINMUX_GPIO167__FUNC_DBG_MON_B21 (MTK_PIN_NO(167) | 7) + +#define PINMUX_GPIO168__FUNC_GPIO168 (MTK_PIN_NO(168) | 0) +#define PINMUX_GPIO168__FUNC_ANT_SEL6 (MTK_PIN_NO(168) | 1) +#define PINMUX_GPIO168__FUNC_SPI0_B_CLK (MTK_PIN_NO(168) | 2) +#define PINMUX_GPIO168__FUNC_TP_UCTS1_AO (MTK_PIN_NO(168) | 3) +#define PINMUX_GPIO168__FUNC_KPCOL2 (MTK_PIN_NO(168) | 4) +#define PINMUX_GPIO168__FUNC_MD_UCTS0 (MTK_PIN_NO(168) | 5) +#define PINMUX_GPIO168__FUNC_SCL11 (MTK_PIN_NO(168) | 6) +#define PINMUX_GPIO168__FUNC_DBG_MON_B22 (MTK_PIN_NO(168) | 7) + +#define PINMUX_GPIO169__FUNC_GPIO169 (MTK_PIN_NO(169) | 0) +#define PINMUX_GPIO169__FUNC_ANT_SEL7 (MTK_PIN_NO(169) | 1) +#define PINMUX_GPIO169__FUNC_SPI0_B_CSB (MTK_PIN_NO(169) | 2) +#define PINMUX_GPIO169__FUNC_TP_URTS1_AO (MTK_PIN_NO(169) | 3) +#define PINMUX_GPIO169__FUNC_KPROW2 (MTK_PIN_NO(169) | 4) +#define PINMUX_GPIO169__FUNC_MD_URTS0 (MTK_PIN_NO(169) | 5) +#define PINMUX_GPIO169__FUNC_SDA11 (MTK_PIN_NO(169) | 6) +#define PINMUX_GPIO169__FUNC_DBG_MON_B23 (MTK_PIN_NO(169) | 7) + +#define PINMUX_GPIO170__FUNC_GPIO170 (MTK_PIN_NO(170) | 0) +#define PINMUX_GPIO170__FUNC_ANT_SEL8 (MTK_PIN_NO(170) | 1) +#define PINMUX_GPIO170__FUNC_SPI0_B_MI (MTK_PIN_NO(170) | 2) +#define PINMUX_GPIO170__FUNC_TP_UCTS2_AO (MTK_PIN_NO(170) | 3) +#define PINMUX_GPIO170__FUNC_SRCLKENAI1 (MTK_PIN_NO(170) | 4) +#define PINMUX_GPIO170__FUNC_MD_UCTS1 (MTK_PIN_NO(170) | 5) +#define PINMUX_GPIO170__FUNC_DBG_MON_B24 (MTK_PIN_NO(170) | 7) + +#define PINMUX_GPIO171__FUNC_GPIO171 (MTK_PIN_NO(171) | 0) +#define PINMUX_GPIO171__FUNC_ANT_SEL9 (MTK_PIN_NO(171) | 1) +#define PINMUX_GPIO171__FUNC_SPI0_B_MO (MTK_PIN_NO(171) | 2) +#define PINMUX_GPIO171__FUNC_TP_URTS2_AO (MTK_PIN_NO(171) | 3) +#define PINMUX_GPIO171__FUNC_SRCLKENAI0 (MTK_PIN_NO(171) | 4) +#define PINMUX_GPIO171__FUNC_MD_URTS1 (MTK_PIN_NO(171) | 5) +#define PINMUX_GPIO171__FUNC_DBG_MON_B25 (MTK_PIN_NO(171) | 7) + +#define PINMUX_GPIO172__FUNC_GPIO172 (MTK_PIN_NO(172) | 0) +#define PINMUX_GPIO172__FUNC_CONN_TOP_CLK (MTK_PIN_NO(172) | 1) +#define PINMUX_GPIO172__FUNC_AUXIF_CLK0 (MTK_PIN_NO(172) | 2) +#define PINMUX_GPIO172__FUNC_DBG_MON_B29 (MTK_PIN_NO(172) | 7) + +#define PINMUX_GPIO173__FUNC_GPIO173 (MTK_PIN_NO(173) | 0) +#define PINMUX_GPIO173__FUNC_CONN_TOP_DATA (MTK_PIN_NO(173) | 1) +#define PINMUX_GPIO173__FUNC_AUXIF_ST0 (MTK_PIN_NO(173) | 2) +#define PINMUX_GPIO173__FUNC_DBG_MON_B30 (MTK_PIN_NO(173) | 7) + +#define PINMUX_GPIO174__FUNC_GPIO174 (MTK_PIN_NO(174) | 0) +#define PINMUX_GPIO174__FUNC_CONN_HRST_B (MTK_PIN_NO(174) | 1) +#define PINMUX_GPIO174__FUNC_DBG_MON_B28 (MTK_PIN_NO(174) | 7) + +#define PINMUX_GPIO175__FUNC_GPIO175 (MTK_PIN_NO(175) | 0) +#define PINMUX_GPIO175__FUNC_CONN_WB_PTA (MTK_PIN_NO(175) | 1) +#define PINMUX_GPIO175__FUNC_DBG_MON_B31 (MTK_PIN_NO(175) | 7) + +#define PINMUX_GPIO176__FUNC_GPIO176 (MTK_PIN_NO(176) | 0) +#define PINMUX_GPIO176__FUNC_CONN_BT_CLK (MTK_PIN_NO(176) | 1) +#define PINMUX_GPIO176__FUNC_AUXIF_CLK1 (MTK_PIN_NO(176) | 2) +#define PINMUX_GPIO176__FUNC_DBG_MON_B26 (MTK_PIN_NO(176) | 7) + +#define PINMUX_GPIO177__FUNC_GPIO177 (MTK_PIN_NO(177) | 0) +#define PINMUX_GPIO177__FUNC_CONN_BT_DATA (MTK_PIN_NO(177) | 1) +#define PINMUX_GPIO177__FUNC_AUXIF_ST1 (MTK_PIN_NO(177) | 2) +#define PINMUX_GPIO177__FUNC_DBG_MON_B27 (MTK_PIN_NO(177) | 7) + +#define PINMUX_GPIO178__FUNC_GPIO178 (MTK_PIN_NO(178) | 0) +#define PINMUX_GPIO178__FUNC_CONN_WF_CTRL0 (MTK_PIN_NO(178) | 1) + +#define PINMUX_GPIO179__FUNC_GPIO179 (MTK_PIN_NO(179) | 0) +#define PINMUX_GPIO179__FUNC_CONN_WF_CTRL1 (MTK_PIN_NO(179) | 1) +#define PINMUX_GPIO179__FUNC_UFS_MPHY_SCL (MTK_PIN_NO(179) | 2) + +#define PINMUX_GPIO180__FUNC_GPIO180 (MTK_PIN_NO(180) | 0) +#define PINMUX_GPIO180__FUNC_CONN_WF_CTRL2 (MTK_PIN_NO(180) | 1) +#define PINMUX_GPIO180__FUNC_UFS_MPHY_SDA (MTK_PIN_NO(180) | 2) + +#define PINMUX_GPIO181__FUNC_GPIO181 (MTK_PIN_NO(181) | 0) +#define PINMUX_GPIO181__FUNC_CONN_WF_CTRL3 (MTK_PIN_NO(181) | 1) + +#define PINMUX_GPIO182__FUNC_GPIO182 (MTK_PIN_NO(182) | 0) +#define PINMUX_GPIO182__FUNC_CONN_WF_CTRL4 (MTK_PIN_NO(182) | 1) + +#define PINMUX_GPIO183__FUNC_GPIO183 (MTK_PIN_NO(183) | 0) +#define PINMUX_GPIO183__FUNC_MSDC0_CMD (MTK_PIN_NO(183) | 1) + +#define PINMUX_GPIO184__FUNC_GPIO184 (MTK_PIN_NO(184) | 0) +#define PINMUX_GPIO184__FUNC_MSDC0_DAT0 (MTK_PIN_NO(184) | 1) + +#define PINMUX_GPIO185__FUNC_GPIO185 (MTK_PIN_NO(185) | 0) +#define PINMUX_GPIO185__FUNC_MSDC0_DAT2 (MTK_PIN_NO(185) | 1) + +#define PINMUX_GPIO186__FUNC_GPIO186 (MTK_PIN_NO(186) | 0) +#define PINMUX_GPIO186__FUNC_MSDC0_DAT4 (MTK_PIN_NO(186) | 1) + +#define PINMUX_GPIO187__FUNC_GPIO187 (MTK_PIN_NO(187) | 0) +#define PINMUX_GPIO187__FUNC_MSDC0_DAT6 (MTK_PIN_NO(187) | 1) + +#define PINMUX_GPIO188__FUNC_GPIO188 (MTK_PIN_NO(188) | 0) +#define PINMUX_GPIO188__FUNC_MSDC0_DAT1 (MTK_PIN_NO(188) | 1) + +#define PINMUX_GPIO189__FUNC_GPIO189 (MTK_PIN_NO(189) | 0) +#define PINMUX_GPIO189__FUNC_MSDC0_DAT5 (MTK_PIN_NO(189) | 1) + +#define PINMUX_GPIO190__FUNC_GPIO190 (MTK_PIN_NO(190) | 0) +#define PINMUX_GPIO190__FUNC_MSDC0_DAT7 (MTK_PIN_NO(190) | 1) + +#define PINMUX_GPIO191__FUNC_GPIO191 (MTK_PIN_NO(191) | 0) +#define PINMUX_GPIO191__FUNC_MSDC0_DSL (MTK_PIN_NO(191) | 1) +#define PINMUX_GPIO191__FUNC_GPS_L1_ELNA_EN (MTK_PIN_NO(191) | 2) +#define PINMUX_GPIO191__FUNC_IDDIG (MTK_PIN_NO(191) | 3) +#define PINMUX_GPIO191__FUNC_DMIC_CLK (MTK_PIN_NO(191) | 4) + +#define PINMUX_GPIO192__FUNC_GPIO192 (MTK_PIN_NO(192) | 0) +#define PINMUX_GPIO192__FUNC_MSDC0_CLK (MTK_PIN_NO(192) | 1) +#define PINMUX_GPIO192__FUNC_USB_DRVVBUS (MTK_PIN_NO(192) | 3) +#define PINMUX_GPIO192__FUNC_DMIC_DAT (MTK_PIN_NO(192) | 4) + +#define PINMUX_GPIO193__FUNC_GPIO193 (MTK_PIN_NO(193) | 0) +#define PINMUX_GPIO193__FUNC_MSDC0_DAT3 (MTK_PIN_NO(193) | 1) + +#define PINMUX_GPIO194__FUNC_GPIO194 (MTK_PIN_NO(194) | 0) +#define PINMUX_GPIO194__FUNC_MSDC0_RSTB (MTK_PIN_NO(194) | 1) + +#define PINMUX_GPIO195__FUNC_GPIO195 (MTK_PIN_NO(195) | 0) +#define PINMUX_GPIO195__FUNC_SCP_VREQ_VAO (MTK_PIN_NO(195) | 1) +#define PINMUX_GPIO195__FUNC_DVFSRC_EXT_REQ (MTK_PIN_NO(195) | 2) + +#define PINMUX_GPIO196__FUNC_GPIO196 (MTK_PIN_NO(196) | 0) +#define PINMUX_GPIO196__FUNC_AUD_DAT_MOSI2 (MTK_PIN_NO(196) | 1) + +#define PINMUX_GPIO197__FUNC_GPIO197 (MTK_PIN_NO(197) | 0) +#define PINMUX_GPIO197__FUNC_AUD_NLE_MOSI1 (MTK_PIN_NO(197) | 1) +#define PINMUX_GPIO197__FUNC_AUD_CLK_MISO (MTK_PIN_NO(197) | 2) +#define PINMUX_GPIO197__FUNC_I2S2_MCK (MTK_PIN_NO(197) | 3) +#define PINMUX_GPIO197__FUNC_I2S6_MCK (MTK_PIN_NO(197) | 4) +#define PINMUX_GPIO197__FUNC_I2S8_MCK (MTK_PIN_NO(197) | 5) + +#define PINMUX_GPIO198__FUNC_GPIO198 (MTK_PIN_NO(198) | 0) +#define PINMUX_GPIO198__FUNC_AUD_NLE_MOSI0 (MTK_PIN_NO(198) | 1) +#define PINMUX_GPIO198__FUNC_AUD_SYNC_MISO (MTK_PIN_NO(198) | 2) +#define PINMUX_GPIO198__FUNC_I2S2_BCK (MTK_PIN_NO(198) | 3) +#define PINMUX_GPIO198__FUNC_I2S6_BCK (MTK_PIN_NO(198) | 4) +#define PINMUX_GPIO198__FUNC_I2S8_BCK (MTK_PIN_NO(198) | 5) + +#define PINMUX_GPIO199__FUNC_GPIO199 (MTK_PIN_NO(199) | 0) +#define PINMUX_GPIO199__FUNC_AUD_DAT_MISO2 (MTK_PIN_NO(199) | 1) +#define PINMUX_GPIO199__FUNC_I2S2_DI2 (MTK_PIN_NO(199) | 3) + +#define PINMUX_GPIO200__FUNC_GPIO200 (MTK_PIN_NO(200) | 0) +#define PINMUX_GPIO200__FUNC_SCL6 (MTK_PIN_NO(200) | 1) +#define PINMUX_GPIO200__FUNC_SCP_SCL1 (MTK_PIN_NO(200) | 3) +#define PINMUX_GPIO200__FUNC_SCL_6306 (MTK_PIN_NO(200) | 4) +#define PINMUX_GPIO200__FUNC_DBG_MON_A4 (MTK_PIN_NO(200) | 7) + +#define PINMUX_GPIO201__FUNC_GPIO201 (MTK_PIN_NO(201) | 0) +#define PINMUX_GPIO201__FUNC_SDA6 (MTK_PIN_NO(201) | 1) +#define PINMUX_GPIO201__FUNC_SCP_SDA1 (MTK_PIN_NO(201) | 3) +#define PINMUX_GPIO201__FUNC_SDA_6306 (MTK_PIN_NO(201) | 4) +#define PINMUX_GPIO201__FUNC_DBG_MON_A5 (MTK_PIN_NO(201) | 7) + +#define PINMUX_GPIO202__FUNC_GPIO202 (MTK_PIN_NO(202) | 0) +#define PINMUX_GPIO202__FUNC_SCL5 (MTK_PIN_NO(202) | 1) + +#define PINMUX_GPIO203__FUNC_GPIO203 (MTK_PIN_NO(203) | 0) +#define PINMUX_GPIO203__FUNC_SDA5 (MTK_PIN_NO(203) | 1) + +#define PINMUX_GPIO204__FUNC_GPIO204 (MTK_PIN_NO(204) | 0) +#define PINMUX_GPIO204__FUNC_SCL0 (MTK_PIN_NO(204) | 1) +#define PINMUX_GPIO204__FUNC_SPI7_A_CLK (MTK_PIN_NO(204) | 6) +#define PINMUX_GPIO204__FUNC_DBG_MON_A2 (MTK_PIN_NO(204) | 7) + +#define PINMUX_GPIO205__FUNC_GPIO205 (MTK_PIN_NO(205) | 0) +#define PINMUX_GPIO205__FUNC_SDA0 (MTK_PIN_NO(205) | 1) +#define PINMUX_GPIO205__FUNC_SPI7_A_CSB (MTK_PIN_NO(205) | 6) +#define PINMUX_GPIO205__FUNC_DBG_MON_A3 (MTK_PIN_NO(205) | 7) + +#define PINMUX_GPIO206__FUNC_GPIO206 (MTK_PIN_NO(206) | 0) +#define PINMUX_GPIO206__FUNC_SRCLKENA0 (MTK_PIN_NO(206) | 1) + +#define PINMUX_GPIO207__FUNC_GPIO207 (MTK_PIN_NO(207) | 0) +#define PINMUX_GPIO207__FUNC_SRCLKENA1 (MTK_PIN_NO(207) | 1) + +#define PINMUX_GPIO208__FUNC_GPIO208 (MTK_PIN_NO(208) | 0) +#define PINMUX_GPIO208__FUNC_WATCHDOG (MTK_PIN_NO(208) | 1) + +#define PINMUX_GPIO209__FUNC_GPIO209 (MTK_PIN_NO(209) | 0) +#define PINMUX_GPIO209__FUNC_PWRAP_SPI0_MI (MTK_PIN_NO(209) | 1) +#define PINMUX_GPIO209__FUNC_PWRAP_SPI0_MO (MTK_PIN_NO(209) | 2) + +#define PINMUX_GPIO210__FUNC_GPIO210 (MTK_PIN_NO(210) | 0) +#define PINMUX_GPIO210__FUNC_PWRAP_SPI0_CSN (MTK_PIN_NO(210) | 1) + +#define PINMUX_GPIO211__FUNC_GPIO211 (MTK_PIN_NO(211) | 0) +#define PINMUX_GPIO211__FUNC_PWRAP_SPI0_MO (MTK_PIN_NO(211) | 1) +#define PINMUX_GPIO211__FUNC_PWRAP_SPI0_MI (MTK_PIN_NO(211) | 2) + +#define PINMUX_GPIO212__FUNC_GPIO212 (MTK_PIN_NO(212) | 0) +#define PINMUX_GPIO212__FUNC_PWRAP_SPI0_CK (MTK_PIN_NO(212) | 1) + +#define PINMUX_GPIO213__FUNC_GPIO213 (MTK_PIN_NO(213) | 0) +#define PINMUX_GPIO213__FUNC_RTC32K_CK (MTK_PIN_NO(213) | 1) + +#define PINMUX_GPIO214__FUNC_GPIO214 (MTK_PIN_NO(214) | 0) +#define PINMUX_GPIO214__FUNC_AUD_CLK_MOSI (MTK_PIN_NO(214) | 1) +#define PINMUX_GPIO214__FUNC_I2S1_MCK (MTK_PIN_NO(214) | 3) +#define PINMUX_GPIO214__FUNC_I2S7_MCK (MTK_PIN_NO(214) | 4) +#define PINMUX_GPIO214__FUNC_I2S9_MCK (MTK_PIN_NO(214) | 5) + +#define PINMUX_GPIO215__FUNC_GPIO215 (MTK_PIN_NO(215) | 0) +#define PINMUX_GPIO215__FUNC_AUD_SYNC_MOSI (MTK_PIN_NO(215) | 1) +#define PINMUX_GPIO215__FUNC_I2S1_BCK (MTK_PIN_NO(215) | 3) +#define PINMUX_GPIO215__FUNC_I2S7_BCK (MTK_PIN_NO(215) | 4) +#define PINMUX_GPIO215__FUNC_I2S9_BCK (MTK_PIN_NO(215) | 5) + +#define PINMUX_GPIO216__FUNC_GPIO216 (MTK_PIN_NO(216) | 0) +#define PINMUX_GPIO216__FUNC_AUD_DAT_MOSI0 (MTK_PIN_NO(216) | 1) +#define PINMUX_GPIO216__FUNC_I2S1_LRCK (MTK_PIN_NO(216) | 3) +#define PINMUX_GPIO216__FUNC_I2S7_LRCK (MTK_PIN_NO(216) | 4) +#define PINMUX_GPIO216__FUNC_I2S9_LRCK (MTK_PIN_NO(216) | 5) + +#define PINMUX_GPIO217__FUNC_GPIO217 (MTK_PIN_NO(217) | 0) +#define PINMUX_GPIO217__FUNC_AUD_DAT_MOSI1 (MTK_PIN_NO(217) | 1) +#define PINMUX_GPIO217__FUNC_I2S1_DO (MTK_PIN_NO(217) | 3) +#define PINMUX_GPIO217__FUNC_I2S7_DO (MTK_PIN_NO(217) | 4) +#define PINMUX_GPIO217__FUNC_I2S9_DO (MTK_PIN_NO(217) | 5) + +#define PINMUX_GPIO218__FUNC_GPIO218 (MTK_PIN_NO(218) | 0) +#define PINMUX_GPIO218__FUNC_AUD_DAT_MISO0 (MTK_PIN_NO(218) | 1) +#define PINMUX_GPIO218__FUNC_VOW_DAT_MISO (MTK_PIN_NO(218) | 2) +#define PINMUX_GPIO218__FUNC_I2S2_LRCK (MTK_PIN_NO(218) | 3) +#define PINMUX_GPIO218__FUNC_I2S6_LRCK (MTK_PIN_NO(218) | 4) +#define PINMUX_GPIO218__FUNC_I2S8_LRCK (MTK_PIN_NO(218) | 5) + +#define PINMUX_GPIO219__FUNC_GPIO219 (MTK_PIN_NO(219) | 0) +#define PINMUX_GPIO219__FUNC_AUD_DAT_MISO1 (MTK_PIN_NO(219) | 1) +#define PINMUX_GPIO219__FUNC_VOW_CLK_MISO (MTK_PIN_NO(219) | 2) +#define PINMUX_GPIO219__FUNC_I2S2_DI (MTK_PIN_NO(219) | 3) +#define PINMUX_GPIO219__FUNC_I2S6_DI (MTK_PIN_NO(219) | 4) +#define PINMUX_GPIO219__FUNC_I2S8_DI (MTK_PIN_NO(219) | 5) + +#endif /* __MT8192_PINFUNC_H */ From d2f2f1321c194479c32ac13843a9299568da9304 Mon Sep 17 00:00:00 2001 From: Zhiyong Tao Date: Mon, 17 Aug 2020 08:17:01 +0800 Subject: [PATCH 081/433] dt-bindings: pinctrl: mt8192: add binding document The commit adds mt8192 compatible node in binding document. Signed-off-by: Zhiyong Tao Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20200817001702.1646-3-zhiyong.tao@mediatek.com Signed-off-by: Linus Walleij --- .../bindings/pinctrl/pinctrl-mt8192.yaml | 155 ++++++++++++++++++ 1 file changed, 155 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/pinctrl-mt8192.yaml diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8192.yaml b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8192.yaml new file mode 100644 index 000000000000..5556def6b99b --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8192.yaml @@ -0,0 +1,155 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/pinctrl-mt8192.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek MT8192 Pin Controller + +maintainers: + - Sean Wang + +description: | + The Mediatek's Pin controller is used to control SoC pins. + +properties: + compatible: + const: mediatek,mt8192-pinctrl + + gpio-controller: true + + '#gpio-cells': + description: | + Number of cells in GPIO specifier. Since the generic GPIO binding is used, + the amount of cells must be specified as 2. See the below + mentioned gpio binding representation for description of particular cells. + const: 2 + + gpio-ranges: + description: gpio valid number range. + maxItems: 1 + + reg: + description: | + Physical address base for gpio base registers. There are 11 GPIO + physical address base in mt8192. + maxItems: 11 + + reg-names: + description: | + Gpio base register names. + maxItems: 11 + + interrupt-controller: true + + '#interrupt-cells': + const: 2 + + interrupts: + description: The interrupt outputs to sysirq. + maxItems: 1 + +#PIN CONFIGURATION NODES +patternProperties: + '^pins': + type: object + description: | + A pinctrl node should contain at least one subnodes representing the + pinctrl groups available on the machine. Each subnode will list the + pins it needs, and how they should be configured, with regard to muxer + configuration, pullups, drive strength, input enable/disable and + input schmitt. + An example of using macro: + pincontroller { + /* GPIO0 set as multifunction GPIO0 */ + state_0_node_a { + pinmux = ; + }; + /* GPIO1 set as multifunction PWM */ + state_0_node_b { + pinmux = ; + }; + }; + $ref: "pinmux-node.yaml" + + properties: + pinmux: + description: | + Integer array, represents gpio pin number and mux setting. + Supported pin number and mux varies for different SoCs, and are defined + as macros in dt-bindings/pinctrl/-pinfunc.h directly. + + drive-strength: + description: | + It can support some arguments, such as MTK_DRIVE_4mA, MTK_DRIVE_6mA, etc. See + dt-bindings/pinctrl/mt65xx.h. It can only support 2/4/6/8/10/12/14/16mA in mt8192. + enum: [2, 4, 6, 8, 10, 12, 14, 16] + + bias-pull-down: true + + bias-pull-up: true + + bias-disable: true + + output-high: true + + output-low: true + + input-enable: true + + input-disable: true + + input-schmitt-enable: true + + input-schmitt-disable: true + + required: + - pinmux + + additionalProperties: false + +required: + - compatible + - reg + - interrupts + - interrupt-controller + - '#interrupt-cells' + - gpio-controller + - '#gpio-cells' + - gpio-ranges + +additionalProperties: false + +examples: + - | + #include + #include + pio: pinctrl@10005000 { + compatible = "mediatek,mt8192-pinctrl"; + reg = <0x10005000 0x1000>, + <0x11c20000 0x1000>, + <0x11d10000 0x1000>, + <0x11d30000 0x1000>, + <0x11d40000 0x1000>, + <0x11e20000 0x1000>, + <0x11e70000 0x1000>, + <0x11ea0000 0x1000>, + <0x11f20000 0x1000>, + <0x11f30000 0x1000>, + <0x1000b000 0x1000>; + reg-names = "iocfg0", "iocfg_rm", "iocfg_bm", + "iocfg_bl", "iocfg_br", "iocfg_lm", + "iocfg_lb", "iocfg_rt", "iocfg_lt", + "iocfg_tl", "eint"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pio 0 0 220>; + interrupt-controller; + interrupts = ; + #interrupt-cells = <2>; + + pins { + pinmux = ; + output-low; + }; + }; From d32f38f2a8fc498de8e160ab1f1acb42b64c73b9 Mon Sep 17 00:00:00 2001 From: Zhiyong Tao Date: Mon, 17 Aug 2020 08:17:02 +0800 Subject: [PATCH 082/433] pinctrl: mediatek: Add pinctrl driver for mt8192 This commit includes pinctrl driver for mt8192. Signed-off-by: Zhiyong Tao Acked-by: Sean Wang Link: https://lore.kernel.org/r/20200817001702.1646-4-zhiyong.tao@mediatek.com Signed-off-by: Linus Walleij --- drivers/pinctrl/mediatek/Kconfig | 7 + drivers/pinctrl/mediatek/Makefile | 1 + drivers/pinctrl/mediatek/pinctrl-mt8192.c | 1409 ++++++++++ drivers/pinctrl/mediatek/pinctrl-mtk-mt8192.h | 2275 +++++++++++++++++ 4 files changed, 3692 insertions(+) create mode 100644 drivers/pinctrl/mediatek/pinctrl-mt8192.c create mode 100644 drivers/pinctrl/mediatek/pinctrl-mtk-mt8192.h diff --git a/drivers/pinctrl/mediatek/Kconfig b/drivers/pinctrl/mediatek/Kconfig index 1cedc5f2aadb..7d336370d767 100644 --- a/drivers/pinctrl/mediatek/Kconfig +++ b/drivers/pinctrl/mediatek/Kconfig @@ -133,6 +133,13 @@ config PINCTRL_MT8183 default ARM64 && ARCH_MEDIATEK select PINCTRL_MTK_PARIS +config PINCTRL_MT8192 + bool "Mediatek MT8192 pin control" + depends on OF + depends on ARM64 || COMPILE_TEST + default ARM64 && ARCH_MEDIATEK + select PINCTRL_MTK_PARIS + config PINCTRL_MT8516 bool "Mediatek MT8516 pin control" depends on OF diff --git a/drivers/pinctrl/mediatek/Makefile b/drivers/pinctrl/mediatek/Makefile index b0b07c541d11..1966a5299da4 100644 --- a/drivers/pinctrl/mediatek/Makefile +++ b/drivers/pinctrl/mediatek/Makefile @@ -19,5 +19,6 @@ obj-$(CONFIG_PINCTRL_MT7623) += pinctrl-mt7623.o obj-$(CONFIG_PINCTRL_MT7629) += pinctrl-mt7629.o obj-$(CONFIG_PINCTRL_MT8173) += pinctrl-mt8173.o obj-$(CONFIG_PINCTRL_MT8183) += pinctrl-mt8183.o +obj-$(CONFIG_PINCTRL_MT8192) += pinctrl-mt8192.o obj-$(CONFIG_PINCTRL_MT8516) += pinctrl-mt8516.o obj-$(CONFIG_PINCTRL_MT6397) += pinctrl-mt6397.o diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8192.c b/drivers/pinctrl/mediatek/pinctrl-mt8192.c new file mode 100644 index 000000000000..0c16b2c756bf --- /dev/null +++ b/drivers/pinctrl/mediatek/pinctrl-mt8192.c @@ -0,0 +1,1409 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2019 MediaTek Inc. + * Author: Zhiyong Tao + * + */ + +#include +#include "pinctrl-mtk-mt8192.h" +#include "pinctrl-paris.h" + +/* MT8192 have multiple bases to program pin configuration listed as the below: + * iocfg0:0x10005000, iocfg_rm:0x11C20000, iocfg_bm:0x11D10000, + * iocfg_bl:0x11D30000, iocfg_br:0x11D40000, iocfg_lm:0x11E20000, + * iocfg_lb:0x11E70000, iocfg_rt:0x11EA0000, iocfg_lt:0x11F20000, + * iocfg_tl:0x11F30000 + * _i_based could be used to indicate what base the pin should be mapped into. + */ + +#define PIN_FIELD_BASE(s_pin, e_pin, i_base, s_addr, x_addrs, s_bit, x_bits) \ + PIN_FIELD_CALC(s_pin, e_pin, i_base, s_addr, x_addrs, s_bit, x_bits, \ + 32, 0) + +#define PINS_FIELD_BASE(s_pin, e_pin, i_base, s_addr, x_addrs, s_bit, x_bits) \ + PIN_FIELD_CALC(s_pin, e_pin, i_base, s_addr, x_addrs, s_bit, x_bits, \ + 32, 1) + +static const struct mtk_pin_field_calc mt8192_pin_mode_range[] = { + PIN_FIELD(0, 228, 0x300, 0x10, 0, 4), +}; + +static const struct mtk_pin_field_calc mt8192_pin_dir_range[] = { + PIN_FIELD(0, 228, 0x0, 0x10, 0, 1), +}; + +static const struct mtk_pin_field_calc mt8192_pin_di_range[] = { + PIN_FIELD(0, 228, 0x200, 0x10, 0, 1), +}; + +static const struct mtk_pin_field_calc mt8192_pin_do_range[] = { + PIN_FIELD(0, 228, 0x100, 0x10, 0, 1), +}; + +static const struct mtk_pin_field_calc mt8192_pin_smt_range[] = { + PIN_FIELD_BASE(0, 0, 4, 0x00f0, 0x10, 8, 1), + PIN_FIELD_BASE(1, 1, 4, 0x00f0, 0x10, 8, 1), + PIN_FIELD_BASE(2, 2, 4, 0x00f0, 0x10, 8, 1), + PIN_FIELD_BASE(3, 3, 4, 0x00f0, 0x10, 8, 1), + PIN_FIELD_BASE(4, 4, 4, 0x00f0, 0x10, 8, 1), + PIN_FIELD_BASE(5, 5, 4, 0x00f0, 0x10, 9, 1), + PIN_FIELD_BASE(6, 6, 4, 0x00f0, 0x10, 9, 1), + PIN_FIELD_BASE(7, 7, 4, 0x00f0, 0x10, 9, 1), + PIN_FIELD_BASE(8, 8, 4, 0x00f0, 0x10, 9, 1), + PIN_FIELD_BASE(9, 9, 4, 0x00f0, 0x10, 5, 1), + PIN_FIELD_BASE(10, 10, 6, 0x0070, 0x10, 0, 1), + PIN_FIELD_BASE(11, 11, 6, 0x0070, 0x10, 1, 1), + PIN_FIELD_BASE(12, 12, 6, 0x0070, 0x10, 2, 1), + PIN_FIELD_BASE(13, 13, 6, 0x0070, 0x10, 3, 1), + PIN_FIELD_BASE(14, 14, 6, 0x0070, 0x10, 4, 1), + PIN_FIELD_BASE(15, 15, 6, 0x0070, 0x10, 5, 1), + PIN_FIELD_BASE(16, 16, 8, 0x0080, 0x10, 0, 1), + PIN_FIELD_BASE(17, 17, 8, 0x0080, 0x10, 0, 1), + PIN_FIELD_BASE(18, 18, 7, 0x0100, 0x10, 4, 1), + PIN_FIELD_BASE(19, 19, 7, 0x0100, 0x10, 4, 1), + PIN_FIELD_BASE(20, 20, 7, 0x0100, 0x10, 5, 1), + PIN_FIELD_BASE(21, 21, 7, 0x0100, 0x10, 5, 1), + PIN_FIELD_BASE(22, 22, 2, 0x00c0, 0x10, 3, 1), + PIN_FIELD_BASE(23, 23, 2, 0x00c0, 0x10, 3, 1), + PIN_FIELD_BASE(24, 24, 2, 0x00c0, 0x10, 3, 1), + PIN_FIELD_BASE(25, 25, 2, 0x00c0, 0x10, 3, 1), + PIN_FIELD_BASE(26, 26, 3, 0x00a0, 0x10, 10, 1), + PIN_FIELD_BASE(27, 27, 3, 0x00a0, 0x10, 10, 1), + PIN_FIELD_BASE(28, 28, 3, 0x00a0, 0x10, 11, 1), + PIN_FIELD_BASE(29, 29, 3, 0x00a0, 0x10, 11, 1), + PIN_FIELD_BASE(30, 30, 3, 0x00a0, 0x10, 11, 1), + PIN_FIELD_BASE(31, 31, 3, 0x00a0, 0x10, 11, 1), + PIN_FIELD_BASE(32, 32, 3, 0x00a0, 0x10, 12, 1), + PIN_FIELD_BASE(33, 33, 3, 0x00a0, 0x10, 12, 1), + PIN_FIELD_BASE(34, 34, 3, 0x00a0, 0x10, 12, 1), + PIN_FIELD_BASE(35, 35, 3, 0x00a0, 0x10, 12, 1), + PIN_FIELD_BASE(36, 36, 2, 0x00c0, 0x10, 2, 1), + PIN_FIELD_BASE(37, 37, 2, 0x00c0, 0x10, 2, 1), + PIN_FIELD_BASE(38, 38, 2, 0x00c0, 0x10, 2, 1), + PIN_FIELD_BASE(39, 39, 2, 0x00c0, 0x10, 2, 1), + PIN_FIELD_BASE(40, 40, 8, 0x0080, 0x10, 0, 1), + PIN_FIELD_BASE(41, 41, 8, 0x0080, 0x10, 0, 1), + PIN_FIELD_BASE(42, 42, 8, 0x0080, 0x10, 1, 1), + PIN_FIELD_BASE(43, 43, 7, 0x0100, 0x10, 4, 1), + PIN_FIELD_BASE(44, 44, 7, 0x0100, 0x10, 4, 1), + PIN_FIELD_BASE(45, 45, 1, 0x00c0, 0x10, 12, 1), + PIN_FIELD_BASE(46, 46, 1, 0x00c0, 0x10, 12, 1), + PIN_FIELD_BASE(47, 47, 1, 0x00c0, 0x10, 12, 1), + PIN_FIELD_BASE(48, 48, 1, 0x00c0, 0x10, 13, 1), + PIN_FIELD_BASE(49, 49, 1, 0x00c0, 0x10, 13, 1), + PIN_FIELD_BASE(50, 50, 1, 0x00c0, 0x10, 13, 1), + PIN_FIELD_BASE(51, 51, 1, 0x00c0, 0x10, 4, 1), + PIN_FIELD_BASE(52, 52, 1, 0x00c0, 0x10, 5, 1), + PIN_FIELD_BASE(53, 53, 1, 0x00c0, 0x10, 9, 1), + PIN_FIELD_BASE(54, 54, 1, 0x00c0, 0x10, 6, 1), + PIN_FIELD_BASE(55, 55, 1, 0x00c0, 0x10, 8, 1), + PIN_FIELD_BASE(56, 56, 1, 0x00c0, 0x10, 7, 1), + PIN_FIELD_BASE(57, 57, 3, 0x00a0, 0x10, 8, 1), + PIN_FIELD_BASE(58, 58, 3, 0x00a0, 0x10, 8, 1), + PIN_FIELD_BASE(59, 59, 3, 0x00a0, 0x10, 9, 1), + PIN_FIELD_BASE(60, 60, 3, 0x00a0, 0x10, 9, 1), + PIN_FIELD_BASE(61, 61, 3, 0x00a0, 0x10, 10, 1), + PIN_FIELD_BASE(62, 62, 3, 0x00a0, 0x10, 10, 1), + PIN_FIELD_BASE(63, 63, 3, 0x00a0, 0x10, 0, 1), + PIN_FIELD_BASE(64, 64, 3, 0x00a0, 0x10, 0, 1), + PIN_FIELD_BASE(65, 65, 3, 0x00a0, 0x10, 0, 1), + PIN_FIELD_BASE(66, 66, 3, 0x00a0, 0x10, 0, 1), + PIN_FIELD_BASE(67, 67, 3, 0x00a0, 0x10, 1, 1), + PIN_FIELD_BASE(68, 68, 3, 0x00a0, 0x10, 1, 1), + PIN_FIELD_BASE(69, 69, 3, 0x00a0, 0x10, 1, 1), + PIN_FIELD_BASE(70, 70, 3, 0x00a0, 0x10, 1, 1), + PIN_FIELD_BASE(71, 71, 3, 0x00a0, 0x10, 2, 1), + PIN_FIELD_BASE(72, 72, 3, 0x00a0, 0x10, 2, 1), + PIN_FIELD_BASE(73, 73, 3, 0x00a0, 0x10, 2, 1), + PIN_FIELD_BASE(74, 74, 3, 0x00a0, 0x10, 2, 1), + PIN_FIELD_BASE(75, 75, 3, 0x00a0, 0x10, 3, 1), + PIN_FIELD_BASE(76, 76, 3, 0x00a0, 0x10, 3, 1), + PIN_FIELD_BASE(77, 77, 3, 0x00a0, 0x10, 3, 1), + PIN_FIELD_BASE(78, 78, 3, 0x00a0, 0x10, 3, 1), + PIN_FIELD_BASE(79, 79, 3, 0x00a0, 0x10, 4, 1), + PIN_FIELD_BASE(80, 80, 3, 0x00a0, 0x10, 4, 1), + PIN_FIELD_BASE(81, 81, 3, 0x00a0, 0x10, 4, 1), + PIN_FIELD_BASE(82, 82, 3, 0x00a0, 0x10, 4, 1), + PIN_FIELD_BASE(83, 83, 3, 0x00a0, 0x10, 5, 1), + PIN_FIELD_BASE(84, 84, 3, 0x00a0, 0x10, 5, 1), + PIN_FIELD_BASE(85, 85, 3, 0x00a0, 0x10, 7, 1), + PIN_FIELD_BASE(86, 86, 3, 0x00a0, 0x10, 7, 1), + PIN_FIELD_BASE(87, 87, 3, 0x00a0, 0x10, 6, 1), + PIN_FIELD_BASE(88, 88, 3, 0x00a0, 0x10, 6, 1), + PIN_FIELD_BASE(89, 89, 2, 0x00c0, 0x10, 9, 1), + PIN_FIELD_BASE(90, 90, 2, 0x00c0, 0x10, 10, 1), + PIN_FIELD_BASE(91, 91, 2, 0x00c0, 0x10, 4, 1), + PIN_FIELD_BASE(92, 92, 2, 0x00c0, 0x10, 4, 1), + PIN_FIELD_BASE(93, 93, 2, 0x00c0, 0x10, 4, 1), + PIN_FIELD_BASE(94, 94, 2, 0x00c0, 0x10, 4, 1), + PIN_FIELD_BASE(95, 95, 2, 0x00c0, 0x10, 5, 1), + PIN_FIELD_BASE(96, 96, 2, 0x00c0, 0x10, 5, 1), + PIN_FIELD_BASE(97, 97, 2, 0x00c0, 0x10, 5, 1), + PIN_FIELD_BASE(98, 98, 2, 0x00c0, 0x10, 5, 1), + PIN_FIELD_BASE(99, 99, 2, 0x00c0, 0x10, 6, 1), + PIN_FIELD_BASE(100, 100, 2, 0x00c0, 0x10, 6, 1), + PIN_FIELD_BASE(101, 101, 2, 0x00c0, 0x10, 6, 1), + PIN_FIELD_BASE(102, 102, 2, 0x00c0, 0x10, 6, 1), + PIN_FIELD_BASE(103, 103, 2, 0x00c0, 0x10, 7, 1), + PIN_FIELD_BASE(104, 104, 2, 0x00c0, 0x10, 7, 1), + PIN_FIELD_BASE(105, 105, 2, 0x00c0, 0x10, 7, 1), + PIN_FIELD_BASE(106, 106, 2, 0x00c0, 0x10, 7, 1), + PIN_FIELD_BASE(107, 107, 2, 0x00c0, 0x10, 8, 1), + PIN_FIELD_BASE(108, 108, 2, 0x00c0, 0x10, 8, 1), + PIN_FIELD_BASE(109, 109, 2, 0x00c0, 0x10, 0, 1), + PIN_FIELD_BASE(110, 110, 2, 0x00c0, 0x10, 8, 1), + PIN_FIELD_BASE(111, 111, 2, 0x00c0, 0x10, 0, 1), + PIN_FIELD_BASE(112, 112, 2, 0x00c0, 0x10, 0, 1), + PIN_FIELD_BASE(113, 113, 2, 0x00c0, 0x10, 8, 1), + PIN_FIELD_BASE(114, 114, 2, 0x00c0, 0x10, 1, 1), + PIN_FIELD_BASE(115, 115, 2, 0x00c0, 0x10, 1, 1), + PIN_FIELD_BASE(116, 116, 2, 0x00c0, 0x10, 1, 1), + PIN_FIELD_BASE(117, 117, 2, 0x00c0, 0x10, 0, 1), + PIN_FIELD_BASE(118, 118, 4, 0x00f0, 0x10, 12, 1), + PIN_FIELD_BASE(119, 119, 4, 0x00f0, 0x10, 18, 1), + PIN_FIELD_BASE(120, 120, 4, 0x00f0, 0x10, 17, 1), + PIN_FIELD_BASE(121, 121, 4, 0x00f0, 0x10, 23, 1), + PIN_FIELD_BASE(122, 122, 4, 0x00f0, 0x10, 16, 1), + PIN_FIELD_BASE(123, 123, 4, 0x00f0, 0x10, 22, 1), + PIN_FIELD_BASE(124, 124, 4, 0x00f0, 0x10, 15, 1), + PIN_FIELD_BASE(125, 125, 4, 0x00f0, 0x10, 21, 1), + PIN_FIELD_BASE(126, 126, 4, 0x00f0, 0x10, 6, 1), + PIN_FIELD_BASE(127, 127, 4, 0x00f0, 0x10, 7, 1), + PIN_FIELD_BASE(128, 128, 4, 0x00f0, 0x10, 10, 1), + PIN_FIELD_BASE(129, 129, 4, 0x00f0, 0x10, 10, 1), + PIN_FIELD_BASE(130, 130, 4, 0x00f0, 0x10, 3, 1), + PIN_FIELD_BASE(131, 131, 4, 0x00f0, 0x10, 4, 1), + PIN_FIELD_BASE(132, 132, 4, 0x00f0, 0x10, 11, 1), + PIN_FIELD_BASE(133, 133, 4, 0x00f0, 0x10, 10, 1), + PIN_FIELD_BASE(134, 134, 4, 0x00f0, 0x10, 10, 1), + PIN_FIELD_BASE(135, 135, 4, 0x00f0, 0x10, 11, 1), + PIN_FIELD_BASE(136, 136, 4, 0x00f0, 0x10, 0, 1), + PIN_FIELD_BASE(137, 137, 4, 0x00f0, 0x10, 1, 1), + PIN_FIELD_BASE(138, 138, 4, 0x00f0, 0x10, 2, 1), + PIN_FIELD_BASE(139, 139, 4, 0x00f0, 0x10, 14, 1), + PIN_FIELD_BASE(140, 140, 4, 0x00f0, 0x10, 20, 1), + PIN_FIELD_BASE(141, 141, 4, 0x00f0, 0x10, 13, 1), + PIN_FIELD_BASE(142, 142, 4, 0x00f0, 0x10, 19, 1), + PIN_FIELD_BASE(143, 143, 1, 0x00c0, 0x10, 10, 1), + PIN_FIELD_BASE(144, 144, 1, 0x00c0, 0x10, 10, 1), + PIN_FIELD_BASE(145, 145, 1, 0x00c0, 0x10, 11, 1), + PIN_FIELD_BASE(146, 146, 1, 0x00c0, 0x10, 10, 1), + PIN_FIELD_BASE(147, 147, 1, 0x00c0, 0x10, 10, 1), + PIN_FIELD_BASE(148, 148, 1, 0x00c0, 0x10, 3, 1), + PIN_FIELD_BASE(149, 149, 1, 0x00c0, 0x10, 0, 1), + PIN_FIELD_BASE(150, 150, 1, 0x00c0, 0x10, 1, 1), + PIN_FIELD_BASE(151, 151, 1, 0x00c0, 0x10, 2, 1), + PIN_FIELD_BASE(152, 152, 7, 0x0100, 0x10, 6, 1), + PIN_FIELD_BASE(153, 153, 7, 0x0100, 0x10, 6, 1), + PIN_FIELD_BASE(154, 154, 7, 0x0100, 0x10, 6, 1), + PIN_FIELD_BASE(155, 155, 7, 0x0100, 0x10, 6, 1), + PIN_FIELD_BASE(156, 156, 7, 0x0100, 0x10, 7, 1), + PIN_FIELD_BASE(157, 157, 7, 0x0100, 0x10, 7, 1), + PIN_FIELD_BASE(158, 158, 7, 0x0100, 0x10, 7, 1), + PIN_FIELD_BASE(159, 159, 7, 0x0100, 0x10, 7, 1), + PIN_FIELD_BASE(160, 160, 7, 0x0100, 0x10, 12, 1), + PIN_FIELD_BASE(161, 161, 7, 0x0100, 0x10, 13, 1), + PIN_FIELD_BASE(162, 162, 7, 0x0100, 0x10, 0, 1), + PIN_FIELD_BASE(163, 163, 7, 0x0100, 0x10, 1, 1), + PIN_FIELD_BASE(164, 164, 7, 0x0100, 0x10, 8, 1), + PIN_FIELD_BASE(165, 165, 7, 0x0100, 0x10, 8, 1), + PIN_FIELD_BASE(166, 166, 7, 0x0100, 0x10, 8, 1), + PIN_FIELD_BASE(167, 167, 7, 0x0100, 0x10, 8, 1), + PIN_FIELD_BASE(168, 168, 7, 0x0100, 0x10, 2, 1), + PIN_FIELD_BASE(169, 169, 7, 0x0100, 0x10, 3, 1), + PIN_FIELD_BASE(170, 170, 7, 0x0100, 0x10, 8, 1), + PIN_FIELD_BASE(171, 171, 7, 0x0100, 0x10, 8, 1), + PIN_FIELD_BASE(172, 172, 7, 0x0100, 0x10, 9, 1), + PIN_FIELD_BASE(173, 173, 7, 0x0100, 0x10, 10, 1), + PIN_FIELD_BASE(174, 174, 7, 0x0100, 0x10, 9, 1), + PIN_FIELD_BASE(175, 175, 7, 0x0100, 0x10, 10, 1), + PIN_FIELD_BASE(176, 176, 7, 0x0100, 0x10, 9, 1), + PIN_FIELD_BASE(177, 177, 7, 0x0100, 0x10, 9, 1), + PIN_FIELD_BASE(178, 178, 7, 0x0100, 0x10, 10, 1), + PIN_FIELD_BASE(179, 179, 7, 0x0100, 0x10, 10, 1), + PIN_FIELD_BASE(180, 180, 7, 0x0100, 0x10, 11, 1), + PIN_FIELD_BASE(181, 181, 7, 0x0100, 0x10, 11, 1), + PIN_FIELD_BASE(182, 182, 7, 0x0100, 0x10, 11, 1), + PIN_FIELD_BASE(183, 183, 9, 0x0090, 0x10, 1, 1), + PIN_FIELD_BASE(184, 184, 9, 0x0090, 0x10, 2, 1), + PIN_FIELD_BASE(185, 185, 9, 0x0090, 0x10, 4, 1), + PIN_FIELD_BASE(186, 186, 9, 0x0090, 0x10, 6, 1), + PIN_FIELD_BASE(187, 187, 9, 0x0090, 0x10, 8, 1), + PIN_FIELD_BASE(188, 188, 9, 0x0090, 0x10, 3, 1), + PIN_FIELD_BASE(189, 189, 9, 0x0090, 0x10, 7, 1), + PIN_FIELD_BASE(190, 190, 9, 0x0090, 0x10, 9, 1), + PIN_FIELD_BASE(191, 191, 9, 0x0090, 0x10, 10, 1), + PIN_FIELD_BASE(192, 192, 9, 0x0090, 0x10, 0, 1), + PIN_FIELD_BASE(193, 193, 9, 0x0090, 0x10, 5, 1), + PIN_FIELD_BASE(194, 194, 9, 0x0090, 0x10, 11, 1), + PIN_FIELD_BASE(195, 195, 5, 0x0080, 0x10, 1, 1), + PIN_FIELD_BASE(196, 196, 5, 0x0080, 0x10, 3, 1), + PIN_FIELD_BASE(197, 197, 5, 0x0080, 0x10, 3, 1), + PIN_FIELD_BASE(198, 198, 5, 0x0080, 0x10, 3, 1), + PIN_FIELD_BASE(199, 199, 5, 0x0080, 0x10, 4, 1), + PIN_FIELD_BASE(200, 200, 8, 0x0080, 0x10, 3, 1), + PIN_FIELD_BASE(201, 201, 8, 0x0080, 0x10, 5, 1), + PIN_FIELD_BASE(202, 202, 5, 0x0080, 0x10, 5, 1), + PIN_FIELD_BASE(203, 203, 5, 0x0080, 0x10, 6, 1), + PIN_FIELD_BASE(204, 204, 8, 0x0080, 0x10, 2, 1), + PIN_FIELD_BASE(205, 205, 8, 0x0080, 0x10, 4, 1), + PIN_FIELD_BASE(206, 206, 5, 0x0080, 0x10, 1, 1), + PIN_FIELD_BASE(207, 207, 5, 0x0080, 0x10, 1, 1), + PIN_FIELD_BASE(208, 208, 5, 0x0080, 0x10, 7, 1), + PIN_FIELD_BASE(209, 209, 5, 0x0080, 0x10, 0, 1), + PIN_FIELD_BASE(210, 210, 5, 0x0080, 0x10, 0, 1), + PIN_FIELD_BASE(211, 211, 5, 0x0080, 0x10, 0, 1), + PIN_FIELD_BASE(212, 212, 5, 0x0080, 0x10, 0, 1), + PIN_FIELD_BASE(213, 213, 5, 0x0080, 0x10, 1, 1), + PIN_FIELD_BASE(214, 214, 5, 0x0080, 0x10, 2, 1), + PIN_FIELD_BASE(215, 215, 5, 0x0080, 0x10, 2, 1), + PIN_FIELD_BASE(216, 216, 5, 0x0080, 0x10, 2, 1), + PIN_FIELD_BASE(217, 217, 5, 0x0080, 0x10, 2, 1), + PIN_FIELD_BASE(218, 218, 5, 0x0080, 0x10, 3, 1), + PIN_FIELD_BASE(219, 219, 5, 0x0080, 0x10, 4, 1), +}; + +static const struct mtk_pin_field_calc mt8192_pin_ies_range[] = { + PIN_FIELD_BASE(0, 0, 4, 0x0070, 0x10, 9, 1), + PIN_FIELD_BASE(1, 1, 4, 0x0070, 0x10, 10, 1), + PIN_FIELD_BASE(2, 2, 4, 0x0070, 0x10, 11, 1), + PIN_FIELD_BASE(3, 3, 4, 0x0070, 0x10, 12, 1), + PIN_FIELD_BASE(4, 4, 4, 0x0070, 0x10, 13, 1), + PIN_FIELD_BASE(5, 5, 4, 0x0070, 0x10, 14, 1), + PIN_FIELD_BASE(6, 6, 4, 0x0070, 0x10, 15, 1), + PIN_FIELD_BASE(7, 7, 4, 0x0070, 0x10, 16, 1), + PIN_FIELD_BASE(8, 8, 4, 0x0070, 0x10, 17, 1), + PIN_FIELD_BASE(9, 9, 4, 0x0070, 0x10, 18, 1), + PIN_FIELD_BASE(10, 10, 6, 0x0010, 0x10, 0, 1), + PIN_FIELD_BASE(11, 11, 6, 0x0010, 0x10, 1, 1), + PIN_FIELD_BASE(12, 12, 6, 0x0010, 0x10, 2, 1), + PIN_FIELD_BASE(13, 13, 6, 0x0010, 0x10, 3, 1), + PIN_FIELD_BASE(14, 14, 6, 0x0010, 0x10, 4, 1), + PIN_FIELD_BASE(15, 15, 6, 0x0010, 0x10, 5, 1), + PIN_FIELD_BASE(16, 16, 8, 0x0030, 0x10, 2, 1), + PIN_FIELD_BASE(17, 17, 8, 0x0030, 0x10, 3, 1), + PIN_FIELD_BASE(18, 18, 7, 0x0050, 0x10, 21, 1), + PIN_FIELD_BASE(19, 19, 7, 0x0050, 0x10, 22, 1), + PIN_FIELD_BASE(20, 20, 7, 0x0050, 0x10, 23, 1), + PIN_FIELD_BASE(21, 21, 7, 0x0050, 0x10, 24, 1), + PIN_FIELD_BASE(22, 22, 2, 0x0050, 0x10, 3, 1), + PIN_FIELD_BASE(23, 23, 2, 0x0050, 0x10, 4, 1), + PIN_FIELD_BASE(24, 24, 2, 0x0050, 0x10, 5, 1), + PIN_FIELD_BASE(25, 25, 2, 0x0050, 0x10, 6, 1), + PIN_FIELD_BASE(26, 26, 3, 0x0040, 0x10, 5, 1), + PIN_FIELD_BASE(27, 27, 3, 0x0040, 0x10, 6, 1), + PIN_FIELD_BASE(28, 28, 3, 0x0040, 0x10, 7, 1), + PIN_FIELD_BASE(29, 29, 3, 0x0040, 0x10, 8, 1), + PIN_FIELD_BASE(30, 30, 3, 0x0040, 0x10, 9, 1), + PIN_FIELD_BASE(31, 31, 3, 0x0030, 0x10, 27, 1), + PIN_FIELD_BASE(32, 32, 3, 0x0030, 0x10, 24, 1), + PIN_FIELD_BASE(33, 33, 3, 0x0030, 0x10, 26, 1), + PIN_FIELD_BASE(34, 34, 3, 0x0030, 0x10, 23, 1), + PIN_FIELD_BASE(35, 35, 3, 0x0030, 0x10, 25, 1), + PIN_FIELD_BASE(36, 36, 2, 0x0050, 0x10, 20, 1), + PIN_FIELD_BASE(37, 37, 2, 0x0050, 0x10, 21, 1), + PIN_FIELD_BASE(38, 38, 2, 0x0050, 0x10, 22, 1), + PIN_FIELD_BASE(39, 39, 2, 0x0050, 0x10, 23, 1), + PIN_FIELD_BASE(40, 40, 8, 0x0030, 0x10, 0, 1), + PIN_FIELD_BASE(41, 41, 8, 0x0030, 0x10, 1, 1), + PIN_FIELD_BASE(42, 42, 8, 0x0030, 0x10, 4, 1), + PIN_FIELD_BASE(43, 43, 7, 0x0050, 0x10, 25, 1), + PIN_FIELD_BASE(44, 44, 7, 0x0050, 0x10, 26, 1), + PIN_FIELD_BASE(45, 45, 1, 0x0030, 0x10, 18, 1), + PIN_FIELD_BASE(46, 46, 1, 0x0030, 0x10, 20, 1), + PIN_FIELD_BASE(47, 47, 1, 0x0030, 0x10, 19, 1), + PIN_FIELD_BASE(48, 48, 1, 0x0030, 0x10, 16, 1), + PIN_FIELD_BASE(49, 49, 1, 0x0030, 0x10, 17, 1), + PIN_FIELD_BASE(50, 50, 1, 0x0030, 0x10, 15, 1), + PIN_FIELD_BASE(51, 51, 1, 0x0030, 0x10, 9, 1), + PIN_FIELD_BASE(52, 52, 1, 0x0030, 0x10, 10, 1), + PIN_FIELD_BASE(53, 53, 1, 0x0030, 0x10, 14, 1), + PIN_FIELD_BASE(54, 54, 1, 0x0030, 0x10, 11, 1), + PIN_FIELD_BASE(55, 55, 1, 0x0030, 0x10, 13, 1), + PIN_FIELD_BASE(56, 56, 1, 0x0030, 0x10, 12, 1), + PIN_FIELD_BASE(57, 57, 3, 0x0040, 0x10, 1, 1), + PIN_FIELD_BASE(58, 58, 3, 0x0040, 0x10, 2, 1), + PIN_FIELD_BASE(59, 59, 3, 0x0040, 0x10, 3, 1), + PIN_FIELD_BASE(60, 60, 3, 0x0040, 0x10, 4, 1), + PIN_FIELD_BASE(61, 61, 3, 0x0030, 0x10, 28, 1), + PIN_FIELD_BASE(62, 62, 3, 0x0030, 0x10, 22, 1), + PIN_FIELD_BASE(63, 63, 3, 0x0030, 0x10, 0, 1), + PIN_FIELD_BASE(64, 64, 3, 0x0030, 0x10, 1, 1), + PIN_FIELD_BASE(65, 65, 3, 0x0030, 0x10, 12, 1), + PIN_FIELD_BASE(66, 66, 3, 0x0030, 0x10, 15, 1), + PIN_FIELD_BASE(67, 67, 3, 0x0030, 0x10, 16, 1), + PIN_FIELD_BASE(68, 68, 3, 0x0030, 0x10, 17, 1), + PIN_FIELD_BASE(69, 69, 3, 0x0030, 0x10, 18, 1), + PIN_FIELD_BASE(70, 70, 3, 0x0030, 0x10, 19, 1), + PIN_FIELD_BASE(71, 71, 3, 0x0030, 0x10, 20, 1), + PIN_FIELD_BASE(72, 72, 3, 0x0030, 0x10, 21, 1), + PIN_FIELD_BASE(73, 73, 3, 0x0030, 0x10, 2, 1), + PIN_FIELD_BASE(74, 74, 3, 0x0030, 0x10, 3, 1), + PIN_FIELD_BASE(75, 75, 3, 0x0030, 0x10, 4, 1), + PIN_FIELD_BASE(76, 76, 3, 0x0030, 0x10, 5, 1), + PIN_FIELD_BASE(77, 77, 3, 0x0030, 0x10, 6, 1), + PIN_FIELD_BASE(78, 78, 3, 0x0030, 0x10, 7, 1), + PIN_FIELD_BASE(79, 79, 3, 0x0030, 0x10, 8, 1), + PIN_FIELD_BASE(80, 80, 3, 0x0030, 0x10, 9, 1), + PIN_FIELD_BASE(81, 81, 3, 0x0030, 0x10, 10, 1), + PIN_FIELD_BASE(82, 82, 3, 0x0030, 0x10, 11, 1), + PIN_FIELD_BASE(83, 83, 3, 0x0030, 0x10, 13, 1), + PIN_FIELD_BASE(84, 84, 3, 0x0030, 0x10, 14, 1), + PIN_FIELD_BASE(85, 85, 3, 0x0030, 0x10, 31, 1), + PIN_FIELD_BASE(86, 86, 3, 0x0040, 0x10, 0, 1), + PIN_FIELD_BASE(87, 87, 3, 0x0030, 0x10, 29, 1), + PIN_FIELD_BASE(88, 88, 3, 0x0030, 0x10, 30, 1), + PIN_FIELD_BASE(89, 89, 2, 0x0050, 0x10, 24, 1), + PIN_FIELD_BASE(90, 90, 2, 0x0050, 0x10, 25, 1), + PIN_FIELD_BASE(91, 91, 2, 0x0050, 0x10, 0, 1), + PIN_FIELD_BASE(92, 92, 2, 0x0060, 0x10, 1, 1), + PIN_FIELD_BASE(93, 93, 2, 0x0060, 0x10, 3, 1), + PIN_FIELD_BASE(94, 94, 2, 0x0060, 0x10, 2, 1), + PIN_FIELD_BASE(95, 95, 2, 0x0060, 0x10, 4, 1), + PIN_FIELD_BASE(96, 96, 2, 0x0050, 0x10, 31, 1), + PIN_FIELD_BASE(97, 97, 2, 0x0050, 0x10, 26, 1), + PIN_FIELD_BASE(98, 98, 2, 0x0060, 0x10, 0, 1), + PIN_FIELD_BASE(99, 99, 2, 0x0050, 0x10, 27, 1), + PIN_FIELD_BASE(100, 100, 2, 0x0050, 0x10, 28, 1), + PIN_FIELD_BASE(101, 101, 2, 0x0050, 0x10, 29, 1), + PIN_FIELD_BASE(102, 102, 2, 0x0050, 0x10, 30, 1), + PIN_FIELD_BASE(103, 103, 2, 0x0050, 0x10, 18, 1), + PIN_FIELD_BASE(104, 104, 2, 0x0050, 0x10, 17, 1), + PIN_FIELD_BASE(105, 105, 2, 0x0050, 0x10, 19, 1), + PIN_FIELD_BASE(106, 106, 2, 0x0050, 0x10, 16, 1), + PIN_FIELD_BASE(107, 107, 2, 0x0050, 0x10, 1, 1), + PIN_FIELD_BASE(108, 108, 2, 0x0050, 0x10, 2, 1), + PIN_FIELD_BASE(109, 109, 2, 0x0050, 0x10, 10, 1), + PIN_FIELD_BASE(110, 110, 2, 0x0050, 0x10, 7, 1), + PIN_FIELD_BASE(111, 111, 2, 0x0050, 0x10, 9, 1), + PIN_FIELD_BASE(112, 112, 2, 0x0050, 0x10, 11, 1), + PIN_FIELD_BASE(113, 113, 2, 0x0050, 0x10, 8, 1), + PIN_FIELD_BASE(114, 114, 2, 0x0050, 0x10, 14, 1), + PIN_FIELD_BASE(115, 115, 2, 0x0050, 0x10, 13, 1), + PIN_FIELD_BASE(116, 116, 2, 0x0050, 0x10, 15, 1), + PIN_FIELD_BASE(117, 117, 2, 0x0050, 0x10, 12, 1), + PIN_FIELD_BASE(118, 118, 4, 0x0070, 0x10, 23, 1), + PIN_FIELD_BASE(119, 119, 4, 0x0070, 0x10, 29, 1), + PIN_FIELD_BASE(120, 120, 4, 0x0070, 0x10, 28, 1), + PIN_FIELD_BASE(121, 121, 4, 0x0080, 0x10, 2, 1), + PIN_FIELD_BASE(122, 122, 4, 0x0070, 0x10, 27, 1), + PIN_FIELD_BASE(123, 123, 4, 0x0080, 0x10, 1, 1), + PIN_FIELD_BASE(124, 124, 4, 0x0070, 0x10, 26, 1), + PIN_FIELD_BASE(125, 125, 4, 0x0080, 0x10, 0, 1), + PIN_FIELD_BASE(126, 126, 4, 0x0070, 0x10, 19, 1), + PIN_FIELD_BASE(127, 127, 4, 0x0070, 0x10, 20, 1), + PIN_FIELD_BASE(128, 128, 4, 0x0070, 0x10, 21, 1), + PIN_FIELD_BASE(129, 129, 4, 0x0070, 0x10, 22, 1), + PIN_FIELD_BASE(130, 130, 4, 0x0070, 0x10, 6, 1), + PIN_FIELD_BASE(131, 131, 4, 0x0070, 0x10, 7, 1), + PIN_FIELD_BASE(132, 132, 4, 0x0070, 0x10, 8, 1), + PIN_FIELD_BASE(133, 133, 4, 0x0070, 0x10, 3, 1), + PIN_FIELD_BASE(134, 134, 4, 0x0070, 0x10, 4, 1), + PIN_FIELD_BASE(135, 135, 4, 0x0070, 0x10, 5, 1), + PIN_FIELD_BASE(136, 136, 4, 0x0070, 0x10, 0, 1), + PIN_FIELD_BASE(137, 137, 4, 0x0070, 0x10, 1, 1), + PIN_FIELD_BASE(138, 138, 4, 0x0070, 0x10, 2, 1), + PIN_FIELD_BASE(139, 139, 4, 0x0070, 0x10, 25, 1), + PIN_FIELD_BASE(140, 140, 4, 0x0070, 0x10, 31, 1), + PIN_FIELD_BASE(141, 141, 4, 0x0070, 0x10, 24, 1), + PIN_FIELD_BASE(142, 142, 4, 0x0070, 0x10, 30, 1), + PIN_FIELD_BASE(143, 143, 1, 0x0030, 0x10, 6, 1), + PIN_FIELD_BASE(144, 144, 1, 0x0030, 0x10, 7, 1), + PIN_FIELD_BASE(145, 145, 1, 0x0030, 0x10, 8, 1), + PIN_FIELD_BASE(146, 146, 1, 0x0030, 0x10, 3, 1), + PIN_FIELD_BASE(147, 147, 1, 0x0030, 0x10, 4, 1), + PIN_FIELD_BASE(148, 148, 1, 0x0030, 0x10, 5, 1), + PIN_FIELD_BASE(149, 149, 1, 0x0030, 0x10, 0, 1), + PIN_FIELD_BASE(150, 150, 1, 0x0030, 0x10, 1, 1), + PIN_FIELD_BASE(151, 151, 1, 0x0030, 0x10, 2, 1), + PIN_FIELD_BASE(152, 152, 7, 0x0050, 0x10, 30, 1), + PIN_FIELD_BASE(153, 153, 7, 0x0050, 0x10, 29, 1), + PIN_FIELD_BASE(154, 154, 7, 0x0050, 0x10, 27, 1), + PIN_FIELD_BASE(155, 155, 7, 0x0050, 0x10, 28, 1), + PIN_FIELD_BASE(156, 156, 7, 0x0060, 0x10, 1, 1), + PIN_FIELD_BASE(157, 157, 7, 0x0060, 0x10, 2, 1), + PIN_FIELD_BASE(158, 158, 7, 0x0060, 0x10, 3, 1), + PIN_FIELD_BASE(159, 159, 7, 0x0060, 0x10, 4, 1), + PIN_FIELD_BASE(160, 160, 7, 0x0050, 0x10, 31, 1), + PIN_FIELD_BASE(161, 161, 7, 0x0060, 0x10, 0, 1), + PIN_FIELD_BASE(162, 162, 7, 0x0050, 0x10, 0, 1), + PIN_FIELD_BASE(163, 163, 7, 0x0050, 0x10, 1, 1), + PIN_FIELD_BASE(164, 164, 7, 0x0050, 0x10, 2, 1), + PIN_FIELD_BASE(165, 165, 7, 0x0050, 0x10, 3, 1), + PIN_FIELD_BASE(166, 166, 7, 0x0050, 0x10, 4, 1), + PIN_FIELD_BASE(167, 167, 7, 0x0050, 0x10, 5, 1), + PIN_FIELD_BASE(168, 168, 7, 0x0050, 0x10, 6, 1), + PIN_FIELD_BASE(169, 169, 7, 0x0050, 0x10, 7, 1), + PIN_FIELD_BASE(170, 170, 7, 0x0050, 0x10, 8, 1), + PIN_FIELD_BASE(171, 171, 7, 0x0050, 0x10, 9, 1), + PIN_FIELD_BASE(172, 172, 7, 0x0050, 0x10, 13, 1), + PIN_FIELD_BASE(173, 173, 7, 0x0050, 0x10, 14, 1), + PIN_FIELD_BASE(174, 174, 7, 0x0050, 0x10, 12, 1), + PIN_FIELD_BASE(175, 175, 7, 0x0050, 0x10, 15, 1), + PIN_FIELD_BASE(176, 176, 7, 0x0050, 0x10, 10, 1), + PIN_FIELD_BASE(177, 177, 7, 0x0050, 0x10, 11, 1), + PIN_FIELD_BASE(178, 178, 7, 0x0050, 0x10, 16, 1), + PIN_FIELD_BASE(179, 179, 7, 0x0050, 0x10, 17, 1), + PIN_FIELD_BASE(180, 180, 7, 0x0050, 0x10, 18, 1), + PIN_FIELD_BASE(181, 181, 7, 0x0050, 0x10, 19, 1), + PIN_FIELD_BASE(182, 182, 7, 0x0050, 0x10, 20, 1), + PIN_FIELD_BASE(183, 183, 9, 0x0020, 0x10, 1, 1), + PIN_FIELD_BASE(184, 184, 9, 0x0020, 0x10, 2, 1), + PIN_FIELD_BASE(185, 185, 9, 0x0020, 0x10, 4, 1), + PIN_FIELD_BASE(186, 186, 9, 0x0020, 0x10, 6, 1), + PIN_FIELD_BASE(187, 187, 9, 0x0020, 0x10, 8, 1), + PIN_FIELD_BASE(188, 188, 9, 0x0020, 0x10, 3, 1), + PIN_FIELD_BASE(189, 189, 9, 0x0020, 0x10, 7, 1), + PIN_FIELD_BASE(190, 190, 9, 0x0020, 0x10, 9, 1), + PIN_FIELD_BASE(191, 191, 9, 0x0020, 0x10, 10, 1), + PIN_FIELD_BASE(192, 192, 9, 0x0020, 0x10, 0, 1), + PIN_FIELD_BASE(193, 193, 9, 0x0020, 0x10, 5, 1), + PIN_FIELD_BASE(194, 194, 9, 0x0020, 0x10, 11, 1), + PIN_FIELD_BASE(195, 195, 5, 0x0030, 0x10, 16, 1), + PIN_FIELD_BASE(196, 196, 5, 0x0030, 0x10, 6, 1), + PIN_FIELD_BASE(197, 197, 5, 0x0030, 0x10, 8, 1), + PIN_FIELD_BASE(198, 198, 5, 0x0030, 0x10, 7, 1), + PIN_FIELD_BASE(199, 199, 5, 0x0030, 0x10, 3, 1), + PIN_FIELD_BASE(200, 200, 8, 0x0030, 0x10, 6, 1), + PIN_FIELD_BASE(201, 201, 8, 0x0030, 0x10, 8, 1), + PIN_FIELD_BASE(202, 202, 5, 0x0030, 0x10, 15, 1), + PIN_FIELD_BASE(203, 203, 5, 0x0030, 0x10, 17, 1), + PIN_FIELD_BASE(204, 204, 8, 0x0030, 0x10, 5, 1), + PIN_FIELD_BASE(205, 205, 8, 0x0030, 0x10, 7, 1), + PIN_FIELD_BASE(206, 206, 5, 0x0030, 0x10, 18, 1), + PIN_FIELD_BASE(207, 207, 5, 0x0030, 0x10, 19, 1), + PIN_FIELD_BASE(208, 208, 5, 0x0030, 0x10, 20, 1), + PIN_FIELD_BASE(209, 209, 5, 0x0030, 0x10, 12, 1), + PIN_FIELD_BASE(210, 210, 5, 0x0030, 0x10, 11, 1), + PIN_FIELD_BASE(211, 211, 5, 0x0030, 0x10, 13, 1), + PIN_FIELD_BASE(212, 212, 5, 0x0030, 0x10, 10, 1), + PIN_FIELD_BASE(213, 213, 5, 0x0030, 0x10, 14, 1), + PIN_FIELD_BASE(214, 214, 5, 0x0030, 0x10, 0, 1), + PIN_FIELD_BASE(215, 215, 5, 0x0030, 0x10, 9, 1), + PIN_FIELD_BASE(216, 216, 5, 0x0030, 0x10, 4, 1), + PIN_FIELD_BASE(217, 217, 5, 0x0030, 0x10, 5, 1), + PIN_FIELD_BASE(218, 218, 5, 0x0030, 0x10, 1, 1), + PIN_FIELD_BASE(219, 219, 5, 0x0030, 0x10, 2, 1), +}; + +static const struct mtk_pin_field_calc mt8192_pin_pu_range[] = { + PIN_FIELD_BASE(0, 0, 4, 0x00b0, 0x10, 9, 1), + PIN_FIELD_BASE(1, 1, 4, 0x00b0, 0x10, 10, 1), + PIN_FIELD_BASE(2, 2, 4, 0x00b0, 0x10, 11, 1), + PIN_FIELD_BASE(3, 3, 4, 0x00b0, 0x10, 12, 1), + PIN_FIELD_BASE(4, 4, 4, 0x00b0, 0x10, 13, 1), + PIN_FIELD_BASE(5, 5, 4, 0x00b0, 0x10, 14, 1), + PIN_FIELD_BASE(6, 6, 4, 0x00b0, 0x10, 15, 1), + PIN_FIELD_BASE(7, 7, 4, 0x00b0, 0x10, 16, 1), + PIN_FIELD_BASE(8, 8, 4, 0x00b0, 0x10, 17, 1), + PIN_FIELD_BASE(9, 9, 4, 0x00b0, 0x10, 18, 1), + PIN_FIELD_BASE(16, 16, 8, 0x0050, 0x10, 2, 1), + PIN_FIELD_BASE(17, 17, 8, 0x0050, 0x10, 3, 1), + PIN_FIELD_BASE(18, 18, 7, 0x00a0, 0x10, 21, 1), + PIN_FIELD_BASE(19, 19, 7, 0x00a0, 0x10, 22, 1), + PIN_FIELD_BASE(20, 20, 7, 0x00a0, 0x10, 23, 1), + PIN_FIELD_BASE(21, 21, 7, 0x00a0, 0x10, 24, 1), + PIN_FIELD_BASE(22, 22, 2, 0x0090, 0x10, 3, 1), + PIN_FIELD_BASE(23, 23, 2, 0x0090, 0x10, 4, 1), + PIN_FIELD_BASE(24, 24, 2, 0x0090, 0x10, 5, 1), + PIN_FIELD_BASE(25, 25, 2, 0x0090, 0x10, 6, 1), + PIN_FIELD_BASE(26, 26, 3, 0x0080, 0x10, 5, 1), + PIN_FIELD_BASE(27, 27, 3, 0x0080, 0x10, 6, 1), + PIN_FIELD_BASE(28, 28, 3, 0x0080, 0x10, 7, 1), + PIN_FIELD_BASE(29, 29, 3, 0x0080, 0x10, 8, 1), + PIN_FIELD_BASE(30, 30, 3, 0x0080, 0x10, 9, 1), + PIN_FIELD_BASE(31, 31, 3, 0x0070, 0x10, 27, 1), + PIN_FIELD_BASE(32, 32, 3, 0x0070, 0x10, 24, 1), + PIN_FIELD_BASE(33, 33, 3, 0x0070, 0x10, 26, 1), + PIN_FIELD_BASE(34, 34, 3, 0x0070, 0x10, 23, 1), + PIN_FIELD_BASE(35, 35, 3, 0x0070, 0x10, 25, 1), + PIN_FIELD_BASE(36, 36, 2, 0x0090, 0x10, 20, 1), + PIN_FIELD_BASE(37, 37, 2, 0x0090, 0x10, 21, 1), + PIN_FIELD_BASE(38, 38, 2, 0x0090, 0x10, 22, 1), + PIN_FIELD_BASE(39, 39, 2, 0x0090, 0x10, 23, 1), + PIN_FIELD_BASE(40, 40, 8, 0x0050, 0x10, 0, 1), + PIN_FIELD_BASE(41, 41, 8, 0x0050, 0x10, 1, 1), + PIN_FIELD_BASE(42, 42, 8, 0x0050, 0x10, 4, 1), + PIN_FIELD_BASE(43, 43, 7, 0x00a0, 0x10, 25, 1), + PIN_FIELD_BASE(44, 44, 7, 0x00a0, 0x10, 26, 1), + PIN_FIELD_BASE(57, 57, 3, 0x0080, 0x10, 1, 1), + PIN_FIELD_BASE(58, 58, 3, 0x0080, 0x10, 2, 1), + PIN_FIELD_BASE(59, 59, 3, 0x0080, 0x10, 3, 1), + PIN_FIELD_BASE(60, 60, 3, 0x0080, 0x10, 4, 1), + PIN_FIELD_BASE(61, 61, 3, 0x0070, 0x10, 28, 1), + PIN_FIELD_BASE(62, 62, 3, 0x0070, 0x10, 22, 1), + PIN_FIELD_BASE(63, 63, 3, 0x0070, 0x10, 0, 1), + PIN_FIELD_BASE(64, 64, 3, 0x0070, 0x10, 1, 1), + PIN_FIELD_BASE(65, 65, 3, 0x0070, 0x10, 12, 1), + PIN_FIELD_BASE(66, 66, 3, 0x0070, 0x10, 15, 1), + PIN_FIELD_BASE(67, 67, 3, 0x0070, 0x10, 16, 1), + PIN_FIELD_BASE(68, 68, 3, 0x0070, 0x10, 17, 1), + PIN_FIELD_BASE(69, 69, 3, 0x0070, 0x10, 18, 1), + PIN_FIELD_BASE(70, 70, 3, 0x0070, 0x10, 19, 1), + PIN_FIELD_BASE(71, 71, 3, 0x0070, 0x10, 20, 1), + PIN_FIELD_BASE(72, 72, 3, 0x0070, 0x10, 21, 1), + PIN_FIELD_BASE(73, 73, 3, 0x0070, 0x10, 2, 1), + PIN_FIELD_BASE(74, 74, 3, 0x0070, 0x10, 3, 1), + PIN_FIELD_BASE(75, 75, 3, 0x0070, 0x10, 4, 1), + PIN_FIELD_BASE(76, 76, 3, 0x0070, 0x10, 5, 1), + PIN_FIELD_BASE(77, 77, 3, 0x0070, 0x10, 6, 1), + PIN_FIELD_BASE(78, 78, 3, 0x0070, 0x10, 7, 1), + PIN_FIELD_BASE(79, 79, 3, 0x0070, 0x10, 8, 1), + PIN_FIELD_BASE(80, 80, 3, 0x0070, 0x10, 9, 1), + PIN_FIELD_BASE(81, 81, 3, 0x0070, 0x10, 10, 1), + PIN_FIELD_BASE(82, 82, 3, 0x0070, 0x10, 11, 1), + PIN_FIELD_BASE(83, 83, 3, 0x0070, 0x10, 13, 1), + PIN_FIELD_BASE(84, 84, 3, 0x0070, 0x10, 14, 1), + PIN_FIELD_BASE(85, 85, 3, 0x0070, 0x10, 31, 1), + PIN_FIELD_BASE(86, 86, 3, 0x0080, 0x10, 0, 1), + PIN_FIELD_BASE(87, 87, 3, 0x0070, 0x10, 29, 1), + PIN_FIELD_BASE(88, 88, 3, 0x0070, 0x10, 30, 1), + PIN_FIELD_BASE(89, 89, 2, 0x0090, 0x10, 24, 1), + PIN_FIELD_BASE(90, 90, 2, 0x0090, 0x10, 25, 1), + PIN_FIELD_BASE(91, 91, 2, 0x0090, 0x10, 0, 1), + PIN_FIELD_BASE(92, 92, 2, 0x00a0, 0x10, 2, 1), + PIN_FIELD_BASE(93, 93, 2, 0x00a0, 0x10, 4, 1), + PIN_FIELD_BASE(94, 94, 2, 0x00a0, 0x10, 3, 1), + PIN_FIELD_BASE(95, 95, 2, 0x00a0, 0x10, 5, 1), + PIN_FIELD_BASE(96, 96, 2, 0x0090, 0x10, 31, 1), + PIN_FIELD_BASE(97, 97, 2, 0x0090, 0x10, 26, 1), + PIN_FIELD_BASE(98, 98, 2, 0x00a0, 0x10, 0, 1), + PIN_FIELD_BASE(99, 99, 2, 0x0090, 0x10, 27, 1), + PIN_FIELD_BASE(100, 100, 2, 0x0090, 0x10, 28, 1), + PIN_FIELD_BASE(101, 101, 2, 0x0090, 0x10, 29, 1), + PIN_FIELD_BASE(102, 102, 2, 0x0090, 0x10, 30, 1), + PIN_FIELD_BASE(103, 103, 2, 0x0090, 0x10, 18, 1), + PIN_FIELD_BASE(104, 104, 2, 0x0090, 0x10, 17, 1), + PIN_FIELD_BASE(105, 105, 2, 0x0090, 0x10, 19, 1), + PIN_FIELD_BASE(106, 106, 2, 0x0090, 0x10, 16, 1), + PIN_FIELD_BASE(107, 107, 2, 0x0090, 0x10, 1, 1), + PIN_FIELD_BASE(108, 108, 2, 0x0090, 0x10, 2, 1), + PIN_FIELD_BASE(109, 109, 2, 0x0090, 0x10, 10, 1), + PIN_FIELD_BASE(110, 110, 2, 0x0090, 0x10, 7, 1), + PIN_FIELD_BASE(111, 111, 2, 0x0090, 0x10, 9, 1), + PIN_FIELD_BASE(112, 112, 2, 0x0090, 0x10, 11, 1), + PIN_FIELD_BASE(113, 113, 2, 0x0090, 0x10, 8, 1), + PIN_FIELD_BASE(114, 114, 2, 0x0090, 0x10, 14, 1), + PIN_FIELD_BASE(115, 115, 2, 0x0090, 0x10, 13, 1), + PIN_FIELD_BASE(116, 116, 2, 0x0090, 0x10, 15, 1), + PIN_FIELD_BASE(117, 117, 2, 0x0090, 0x10, 12, 1), + PIN_FIELD_BASE(118, 118, 4, 0x00b0, 0x10, 23, 1), + PIN_FIELD_BASE(119, 119, 4, 0x00b0, 0x10, 29, 1), + PIN_FIELD_BASE(120, 120, 4, 0x00b0, 0x10, 28, 1), + PIN_FIELD_BASE(121, 121, 4, 0x00c0, 0x10, 2, 1), + PIN_FIELD_BASE(122, 122, 4, 0x00b0, 0x10, 27, 1), + PIN_FIELD_BASE(123, 123, 4, 0x00c0, 0x10, 1, 1), + PIN_FIELD_BASE(124, 124, 4, 0x00b0, 0x10, 26, 1), + PIN_FIELD_BASE(125, 125, 4, 0x00c0, 0x10, 0, 1), + PIN_FIELD_BASE(126, 126, 4, 0x00b0, 0x10, 19, 1), + PIN_FIELD_BASE(127, 127, 4, 0x00b0, 0x10, 20, 1), + PIN_FIELD_BASE(128, 128, 4, 0x00b0, 0x10, 21, 1), + PIN_FIELD_BASE(129, 129, 4, 0x00b0, 0x10, 22, 1), + PIN_FIELD_BASE(130, 130, 4, 0x00b0, 0x10, 6, 1), + PIN_FIELD_BASE(131, 131, 4, 0x00b0, 0x10, 7, 1), + PIN_FIELD_BASE(132, 132, 4, 0x00b0, 0x10, 8, 1), + PIN_FIELD_BASE(133, 133, 4, 0x00b0, 0x10, 3, 1), + PIN_FIELD_BASE(134, 134, 4, 0x00b0, 0x10, 4, 1), + PIN_FIELD_BASE(135, 135, 4, 0x00b0, 0x10, 5, 1), + PIN_FIELD_BASE(136, 136, 4, 0x00b0, 0x10, 0, 1), + PIN_FIELD_BASE(137, 137, 4, 0x00b0, 0x10, 1, 1), + PIN_FIELD_BASE(138, 138, 4, 0x00b0, 0x10, 2, 1), + PIN_FIELD_BASE(139, 139, 4, 0x00b0, 0x10, 25, 1), + PIN_FIELD_BASE(140, 140, 4, 0x00b0, 0x10, 31, 1), + PIN_FIELD_BASE(141, 141, 4, 0x00b0, 0x10, 24, 1), + PIN_FIELD_BASE(142, 142, 4, 0x00b0, 0x10, 30, 1), + PIN_FIELD_BASE(143, 143, 1, 0x0070, 0x10, 6, 1), + PIN_FIELD_BASE(144, 144, 1, 0x0070, 0x10, 7, 1), + PIN_FIELD_BASE(145, 145, 1, 0x0070, 0x10, 8, 1), + PIN_FIELD_BASE(146, 146, 1, 0x0070, 0x10, 3, 1), + PIN_FIELD_BASE(147, 147, 1, 0x0070, 0x10, 4, 1), + PIN_FIELD_BASE(148, 148, 1, 0x0070, 0x10, 5, 1), + PIN_FIELD_BASE(149, 149, 1, 0x0070, 0x10, 0, 1), + PIN_FIELD_BASE(150, 150, 1, 0x0070, 0x10, 1, 1), + PIN_FIELD_BASE(151, 151, 1, 0x0070, 0x10, 2, 1), + PIN_FIELD_BASE(156, 156, 7, 0x00a0, 0x10, 29, 1), + PIN_FIELD_BASE(157, 157, 7, 0x00a0, 0x10, 30, 1), + PIN_FIELD_BASE(158, 158, 7, 0x00a0, 0x10, 31, 1), + PIN_FIELD_BASE(159, 159, 7, 0x00b0, 0x10, 0, 1), + PIN_FIELD_BASE(160, 160, 7, 0x00a0, 0x10, 27, 1), + PIN_FIELD_BASE(161, 161, 7, 0x00a0, 0x10, 28, 1), + PIN_FIELD_BASE(162, 162, 7, 0x00a0, 0x10, 0, 1), + PIN_FIELD_BASE(163, 163, 7, 0x00a0, 0x10, 1, 1), + PIN_FIELD_BASE(164, 164, 7, 0x00a0, 0x10, 2, 1), + PIN_FIELD_BASE(165, 165, 7, 0x00a0, 0x10, 3, 1), + PIN_FIELD_BASE(166, 166, 7, 0x00a0, 0x10, 4, 1), + PIN_FIELD_BASE(167, 167, 7, 0x00a0, 0x10, 5, 1), + PIN_FIELD_BASE(168, 168, 7, 0x00a0, 0x10, 6, 1), + PIN_FIELD_BASE(169, 169, 7, 0x00a0, 0x10, 7, 1), + PIN_FIELD_BASE(170, 170, 7, 0x00a0, 0x10, 8, 1), + PIN_FIELD_BASE(171, 171, 7, 0x00a0, 0x10, 9, 1), + PIN_FIELD_BASE(172, 172, 7, 0x00a0, 0x10, 13, 1), + PIN_FIELD_BASE(173, 173, 7, 0x00a0, 0x10, 14, 1), + PIN_FIELD_BASE(174, 174, 7, 0x00a0, 0x10, 12, 1), + PIN_FIELD_BASE(175, 175, 7, 0x00a0, 0x10, 15, 1), + PIN_FIELD_BASE(176, 176, 7, 0x00a0, 0x10, 10, 1), + PIN_FIELD_BASE(177, 177, 7, 0x00a0, 0x10, 11, 1), + PIN_FIELD_BASE(178, 178, 7, 0x00a0, 0x10, 16, 1), + PIN_FIELD_BASE(179, 179, 7, 0x00a0, 0x10, 17, 1), + PIN_FIELD_BASE(180, 180, 7, 0x00a0, 0x10, 18, 1), + PIN_FIELD_BASE(181, 181, 7, 0x00a0, 0x10, 19, 1), + PIN_FIELD_BASE(182, 182, 7, 0x00a0, 0x10, 20, 1), + PIN_FIELD_BASE(195, 195, 5, 0x0050, 0x10, 16, 1), + PIN_FIELD_BASE(196, 196, 5, 0x0050, 0x10, 6, 1), + PIN_FIELD_BASE(197, 197, 5, 0x0050, 0x10, 8, 1), + PIN_FIELD_BASE(198, 198, 5, 0x0050, 0x10, 7, 1), + PIN_FIELD_BASE(199, 199, 5, 0x0050, 0x10, 3, 1), + PIN_FIELD_BASE(200, 200, 8, 0x0050, 0x10, 6, 1), + PIN_FIELD_BASE(201, 201, 8, 0x0050, 0x10, 8, 1), + PIN_FIELD_BASE(202, 202, 5, 0x0050, 0x10, 15, 1), + PIN_FIELD_BASE(203, 203, 5, 0x0050, 0x10, 17, 1), + PIN_FIELD_BASE(204, 204, 8, 0x0050, 0x10, 5, 1), + PIN_FIELD_BASE(205, 205, 8, 0x0050, 0x10, 7, 1), + PIN_FIELD_BASE(206, 206, 5, 0x0050, 0x10, 18, 1), + PIN_FIELD_BASE(207, 207, 5, 0x0050, 0x10, 19, 1), + PIN_FIELD_BASE(208, 208, 5, 0x0050, 0x10, 20, 1), + PIN_FIELD_BASE(209, 209, 5, 0x0050, 0x10, 12, 1), + PIN_FIELD_BASE(210, 210, 5, 0x0050, 0x10, 11, 1), + PIN_FIELD_BASE(211, 211, 5, 0x0050, 0x10, 13, 1), + PIN_FIELD_BASE(212, 212, 5, 0x0050, 0x10, 10, 1), + PIN_FIELD_BASE(213, 213, 5, 0x0050, 0x10, 14, 1), + PIN_FIELD_BASE(214, 214, 5, 0x0050, 0x10, 0, 1), + PIN_FIELD_BASE(215, 215, 5, 0x0050, 0x10, 9, 1), + PIN_FIELD_BASE(216, 216, 5, 0x0050, 0x10, 4, 1), + PIN_FIELD_BASE(217, 217, 5, 0x0050, 0x10, 5, 1), + PIN_FIELD_BASE(218, 218, 5, 0x0050, 0x10, 1, 1), + PIN_FIELD_BASE(219, 219, 5, 0x0050, 0x10, 2, 1), +}; + +static const struct mtk_pin_field_calc mt8192_pin_pd_range[] = { + PIN_FIELD_BASE(0, 0, 4, 0x0090, 0x10, 9, 1), + PIN_FIELD_BASE(1, 1, 4, 0x0090, 0x10, 10, 1), + PIN_FIELD_BASE(2, 2, 4, 0x0090, 0x10, 11, 1), + PIN_FIELD_BASE(3, 3, 4, 0x0090, 0x10, 12, 1), + PIN_FIELD_BASE(4, 4, 4, 0x0090, 0x10, 13, 1), + PIN_FIELD_BASE(5, 5, 4, 0x0090, 0x10, 14, 1), + PIN_FIELD_BASE(6, 6, 4, 0x0090, 0x10, 15, 1), + PIN_FIELD_BASE(7, 7, 4, 0x0090, 0x10, 16, 1), + PIN_FIELD_BASE(8, 8, 4, 0x0090, 0x10, 17, 1), + PIN_FIELD_BASE(9, 9, 4, 0x0090, 0x10, 18, 1), + PIN_FIELD_BASE(16, 16, 8, 0x0040, 0x10, 2, 1), + PIN_FIELD_BASE(17, 17, 8, 0x0040, 0x10, 3, 1), + PIN_FIELD_BASE(18, 18, 7, 0x0070, 0x10, 21, 1), + PIN_FIELD_BASE(19, 19, 7, 0x0070, 0x10, 22, 1), + PIN_FIELD_BASE(20, 20, 7, 0x0070, 0x10, 23, 1), + PIN_FIELD_BASE(21, 21, 7, 0x0070, 0x10, 24, 1), + PIN_FIELD_BASE(22, 22, 2, 0x0070, 0x10, 3, 1), + PIN_FIELD_BASE(23, 23, 2, 0x0070, 0x10, 4, 1), + PIN_FIELD_BASE(24, 24, 2, 0x0070, 0x10, 5, 1), + PIN_FIELD_BASE(25, 25, 2, 0x0070, 0x10, 6, 1), + PIN_FIELD_BASE(26, 26, 3, 0x0060, 0x10, 5, 1), + PIN_FIELD_BASE(27, 27, 3, 0x0060, 0x10, 6, 1), + PIN_FIELD_BASE(28, 28, 3, 0x0060, 0x10, 7, 1), + PIN_FIELD_BASE(29, 29, 3, 0x0060, 0x10, 8, 1), + PIN_FIELD_BASE(30, 30, 3, 0x0060, 0x10, 9, 1), + PIN_FIELD_BASE(31, 31, 3, 0x0050, 0x10, 27, 1), + PIN_FIELD_BASE(32, 32, 3, 0x0050, 0x10, 24, 1), + PIN_FIELD_BASE(33, 33, 3, 0x0050, 0x10, 26, 1), + PIN_FIELD_BASE(34, 34, 3, 0x0050, 0x10, 23, 1), + PIN_FIELD_BASE(35, 35, 3, 0x0050, 0x10, 25, 1), + PIN_FIELD_BASE(36, 36, 2, 0x0070, 0x10, 20, 1), + PIN_FIELD_BASE(37, 37, 2, 0x0070, 0x10, 21, 1), + PIN_FIELD_BASE(38, 38, 2, 0x0070, 0x10, 22, 1), + PIN_FIELD_BASE(39, 39, 2, 0x0070, 0x10, 23, 1), + PIN_FIELD_BASE(40, 40, 8, 0x0040, 0x10, 0, 1), + PIN_FIELD_BASE(41, 41, 8, 0x0040, 0x10, 1, 1), + PIN_FIELD_BASE(42, 42, 8, 0x0040, 0x10, 4, 1), + PIN_FIELD_BASE(43, 43, 7, 0x0070, 0x10, 25, 1), + PIN_FIELD_BASE(44, 44, 7, 0x0070, 0x10, 26, 1), + PIN_FIELD_BASE(57, 57, 3, 0x0060, 0x10, 1, 1), + PIN_FIELD_BASE(58, 58, 3, 0x0060, 0x10, 2, 1), + PIN_FIELD_BASE(59, 59, 3, 0x0060, 0x10, 3, 1), + PIN_FIELD_BASE(60, 60, 3, 0x0060, 0x10, 4, 1), + PIN_FIELD_BASE(61, 61, 3, 0x0050, 0x10, 28, 1), + PIN_FIELD_BASE(62, 62, 3, 0x0050, 0x10, 22, 1), + PIN_FIELD_BASE(63, 63, 3, 0x0050, 0x10, 0, 1), + PIN_FIELD_BASE(64, 64, 3, 0x0050, 0x10, 1, 1), + PIN_FIELD_BASE(65, 65, 3, 0x0050, 0x10, 12, 1), + PIN_FIELD_BASE(66, 66, 3, 0x0050, 0x10, 15, 1), + PIN_FIELD_BASE(67, 67, 3, 0x0050, 0x10, 16, 1), + PIN_FIELD_BASE(68, 68, 3, 0x0050, 0x10, 17, 1), + PIN_FIELD_BASE(69, 69, 3, 0x0050, 0x10, 18, 1), + PIN_FIELD_BASE(70, 70, 3, 0x0050, 0x10, 19, 1), + PIN_FIELD_BASE(71, 71, 3, 0x0050, 0x10, 20, 1), + PIN_FIELD_BASE(72, 72, 3, 0x0050, 0x10, 21, 1), + PIN_FIELD_BASE(73, 73, 3, 0x0050, 0x10, 2, 1), + PIN_FIELD_BASE(74, 74, 3, 0x0050, 0x10, 3, 1), + PIN_FIELD_BASE(75, 75, 3, 0x0050, 0x10, 4, 1), + PIN_FIELD_BASE(76, 76, 3, 0x0050, 0x10, 5, 1), + PIN_FIELD_BASE(77, 77, 3, 0x0050, 0x10, 6, 1), + PIN_FIELD_BASE(78, 78, 3, 0x0050, 0x10, 7, 1), + PIN_FIELD_BASE(79, 79, 3, 0x0050, 0x10, 8, 1), + PIN_FIELD_BASE(80, 80, 3, 0x0050, 0x10, 9, 1), + PIN_FIELD_BASE(81, 81, 3, 0x0050, 0x10, 10, 1), + PIN_FIELD_BASE(82, 82, 3, 0x0050, 0x10, 11, 1), + PIN_FIELD_BASE(83, 83, 3, 0x0050, 0x10, 13, 1), + PIN_FIELD_BASE(84, 84, 3, 0x0050, 0x10, 14, 1), + PIN_FIELD_BASE(85, 85, 3, 0x0050, 0x10, 31, 1), + PIN_FIELD_BASE(86, 86, 3, 0x0060, 0x10, 0, 1), + PIN_FIELD_BASE(87, 87, 3, 0x0050, 0x10, 29, 1), + PIN_FIELD_BASE(88, 88, 3, 0x0050, 0x10, 30, 1), + PIN_FIELD_BASE(89, 89, 2, 0x0070, 0x10, 24, 1), + PIN_FIELD_BASE(90, 90, 2, 0x0070, 0x10, 25, 1), + PIN_FIELD_BASE(91, 91, 2, 0x0070, 0x10, 0, 1), + PIN_FIELD_BASE(92, 92, 2, 0x0080, 0x10, 2, 1), + PIN_FIELD_BASE(93, 93, 2, 0x0080, 0x10, 4, 1), + PIN_FIELD_BASE(94, 94, 2, 0x0080, 0x10, 3, 1), + PIN_FIELD_BASE(95, 95, 2, 0x0080, 0x10, 5, 1), + PIN_FIELD_BASE(96, 96, 2, 0x0070, 0x10, 31, 1), + PIN_FIELD_BASE(97, 97, 2, 0x0070, 0x10, 26, 1), + PIN_FIELD_BASE(98, 98, 2, 0x0080, 0x10, 0, 1), + PIN_FIELD_BASE(99, 99, 2, 0x0070, 0x10, 27, 1), + PIN_FIELD_BASE(100, 100, 2, 0x0070, 0x10, 28, 1), + PIN_FIELD_BASE(101, 101, 2, 0x0070, 0x10, 29, 1), + PIN_FIELD_BASE(102, 102, 2, 0x0070, 0x10, 30, 1), + PIN_FIELD_BASE(103, 103, 2, 0x0070, 0x10, 18, 1), + PIN_FIELD_BASE(104, 104, 2, 0x0070, 0x10, 17, 1), + PIN_FIELD_BASE(105, 105, 2, 0x0070, 0x10, 19, 1), + PIN_FIELD_BASE(106, 106, 2, 0x0070, 0x10, 16, 1), + PIN_FIELD_BASE(107, 107, 2, 0x0070, 0x10, 1, 1), + PIN_FIELD_BASE(108, 108, 2, 0x0070, 0x10, 2, 1), + PIN_FIELD_BASE(109, 109, 2, 0x0070, 0x10, 10, 1), + PIN_FIELD_BASE(110, 110, 2, 0x0070, 0x10, 7, 1), + PIN_FIELD_BASE(111, 111, 2, 0x0070, 0x10, 9, 1), + PIN_FIELD_BASE(112, 112, 2, 0x0070, 0x10, 11, 1), + PIN_FIELD_BASE(113, 113, 2, 0x0070, 0x10, 8, 1), + PIN_FIELD_BASE(114, 114, 2, 0x0070, 0x10, 14, 1), + PIN_FIELD_BASE(115, 115, 2, 0x0070, 0x10, 13, 1), + PIN_FIELD_BASE(116, 116, 2, 0x0070, 0x10, 15, 1), + PIN_FIELD_BASE(117, 117, 2, 0x0070, 0x10, 12, 1), + PIN_FIELD_BASE(118, 118, 4, 0x0090, 0x10, 23, 1), + PIN_FIELD_BASE(119, 119, 4, 0x0090, 0x10, 29, 1), + PIN_FIELD_BASE(120, 120, 4, 0x0090, 0x10, 28, 1), + PIN_FIELD_BASE(121, 121, 4, 0x00a0, 0x10, 2, 1), + PIN_FIELD_BASE(122, 122, 4, 0x0090, 0x10, 27, 1), + PIN_FIELD_BASE(123, 123, 4, 0x00a0, 0x10, 1, 1), + PIN_FIELD_BASE(124, 124, 4, 0x0090, 0x10, 26, 1), + PIN_FIELD_BASE(125, 125, 4, 0x00a0, 0x10, 0, 1), + PIN_FIELD_BASE(126, 126, 4, 0x0090, 0x10, 19, 1), + PIN_FIELD_BASE(127, 127, 4, 0x0090, 0x10, 20, 1), + PIN_FIELD_BASE(128, 128, 4, 0x0090, 0x10, 21, 1), + PIN_FIELD_BASE(129, 129, 4, 0x0090, 0x10, 22, 1), + PIN_FIELD_BASE(130, 130, 4, 0x0090, 0x10, 6, 1), + PIN_FIELD_BASE(131, 131, 4, 0x0090, 0x10, 7, 1), + PIN_FIELD_BASE(132, 132, 4, 0x0090, 0x10, 8, 1), + PIN_FIELD_BASE(133, 133, 4, 0x0090, 0x10, 3, 1), + PIN_FIELD_BASE(134, 134, 4, 0x0090, 0x10, 4, 1), + PIN_FIELD_BASE(135, 135, 4, 0x0090, 0x10, 5, 1), + PIN_FIELD_BASE(136, 136, 4, 0x0090, 0x10, 0, 1), + PIN_FIELD_BASE(137, 137, 4, 0x0090, 0x10, 1, 1), + PIN_FIELD_BASE(138, 138, 4, 0x0090, 0x10, 2, 1), + PIN_FIELD_BASE(139, 139, 4, 0x0090, 0x10, 25, 1), + PIN_FIELD_BASE(140, 140, 4, 0x0090, 0x10, 31, 1), + PIN_FIELD_BASE(141, 141, 4, 0x0090, 0x10, 24, 1), + PIN_FIELD_BASE(142, 142, 4, 0x0090, 0x10, 30, 1), + PIN_FIELD_BASE(143, 143, 1, 0x0050, 0x10, 6, 1), + PIN_FIELD_BASE(144, 144, 1, 0x0050, 0x10, 7, 1), + PIN_FIELD_BASE(145, 145, 1, 0x0050, 0x10, 8, 1), + PIN_FIELD_BASE(146, 146, 1, 0x0050, 0x10, 3, 1), + PIN_FIELD_BASE(147, 147, 1, 0x0050, 0x10, 4, 1), + PIN_FIELD_BASE(148, 148, 1, 0x0050, 0x10, 5, 1), + PIN_FIELD_BASE(149, 149, 1, 0x0050, 0x10, 0, 1), + PIN_FIELD_BASE(150, 150, 1, 0x0050, 0x10, 1, 1), + PIN_FIELD_BASE(151, 151, 1, 0x0050, 0x10, 2, 1), + PIN_FIELD_BASE(156, 156, 7, 0x0070, 0x10, 29, 1), + PIN_FIELD_BASE(157, 157, 7, 0x0070, 0x10, 30, 1), + PIN_FIELD_BASE(158, 158, 7, 0x0070, 0x10, 31, 1), + PIN_FIELD_BASE(159, 159, 7, 0x0080, 0x10, 0, 1), + PIN_FIELD_BASE(160, 160, 7, 0x0070, 0x10, 27, 1), + PIN_FIELD_BASE(161, 161, 7, 0x0070, 0x10, 28, 1), + PIN_FIELD_BASE(162, 162, 7, 0x0070, 0x10, 0, 1), + PIN_FIELD_BASE(163, 163, 7, 0x0070, 0x10, 1, 1), + PIN_FIELD_BASE(164, 164, 7, 0x0070, 0x10, 2, 1), + PIN_FIELD_BASE(165, 165, 7, 0x0070, 0x10, 3, 1), + PIN_FIELD_BASE(166, 166, 7, 0x0070, 0x10, 4, 1), + PIN_FIELD_BASE(167, 167, 7, 0x0070, 0x10, 5, 1), + PIN_FIELD_BASE(168, 168, 7, 0x0070, 0x10, 6, 1), + PIN_FIELD_BASE(169, 169, 7, 0x0070, 0x10, 7, 1), + PIN_FIELD_BASE(170, 170, 7, 0x0070, 0x10, 8, 1), + PIN_FIELD_BASE(171, 171, 7, 0x0070, 0x10, 9, 1), + PIN_FIELD_BASE(172, 172, 7, 0x0070, 0x10, 13, 1), + PIN_FIELD_BASE(173, 173, 7, 0x0070, 0x10, 14, 1), + PIN_FIELD_BASE(174, 174, 7, 0x0070, 0x10, 12, 1), + PIN_FIELD_BASE(175, 175, 7, 0x0070, 0x10, 15, 1), + PIN_FIELD_BASE(176, 176, 7, 0x0070, 0x10, 10, 1), + PIN_FIELD_BASE(177, 177, 7, 0x0070, 0x10, 11, 1), + PIN_FIELD_BASE(178, 178, 7, 0x0070, 0x10, 16, 1), + PIN_FIELD_BASE(179, 179, 7, 0x0070, 0x10, 17, 1), + PIN_FIELD_BASE(180, 180, 7, 0x0070, 0x10, 18, 1), + PIN_FIELD_BASE(181, 181, 7, 0x0070, 0x10, 19, 1), + PIN_FIELD_BASE(182, 182, 7, 0x0070, 0x10, 20, 1), + PIN_FIELD_BASE(195, 195, 5, 0x0040, 0x10, 16, 1), + PIN_FIELD_BASE(196, 196, 5, 0x0040, 0x10, 6, 1), + PIN_FIELD_BASE(197, 197, 5, 0x0040, 0x10, 8, 1), + PIN_FIELD_BASE(198, 198, 5, 0x0040, 0x10, 7, 1), + PIN_FIELD_BASE(199, 199, 5, 0x0040, 0x10, 3, 1), + PIN_FIELD_BASE(200, 200, 8, 0x0040, 0x10, 6, 1), + PIN_FIELD_BASE(201, 201, 8, 0x0040, 0x10, 8, 1), + PIN_FIELD_BASE(202, 202, 5, 0x0040, 0x10, 15, 1), + PIN_FIELD_BASE(203, 203, 5, 0x0040, 0x10, 17, 1), + PIN_FIELD_BASE(204, 204, 8, 0x0040, 0x10, 5, 1), + PIN_FIELD_BASE(205, 205, 8, 0x0040, 0x10, 7, 1), + PIN_FIELD_BASE(206, 206, 5, 0x0040, 0x10, 18, 1), + PIN_FIELD_BASE(207, 207, 5, 0x0040, 0x10, 19, 1), + PIN_FIELD_BASE(208, 208, 5, 0x0040, 0x10, 20, 1), + PIN_FIELD_BASE(209, 209, 5, 0x0040, 0x10, 12, 1), + PIN_FIELD_BASE(210, 210, 5, 0x0040, 0x10, 11, 1), + PIN_FIELD_BASE(211, 211, 5, 0x0040, 0x10, 13, 1), + PIN_FIELD_BASE(212, 212, 5, 0x0040, 0x10, 10, 1), + PIN_FIELD_BASE(213, 213, 5, 0x0040, 0x10, 14, 1), + PIN_FIELD_BASE(214, 214, 5, 0x0040, 0x10, 0, 1), + PIN_FIELD_BASE(215, 215, 5, 0x0040, 0x10, 9, 1), + PIN_FIELD_BASE(216, 216, 5, 0x0040, 0x10, 4, 1), + PIN_FIELD_BASE(217, 217, 5, 0x0040, 0x10, 5, 1), + PIN_FIELD_BASE(218, 218, 5, 0x0040, 0x10, 1, 1), + PIN_FIELD_BASE(219, 219, 5, 0x0040, 0x10, 2, 1), +}; + +static const struct mtk_pin_field_calc mt8192_pin_drv_range[] = { + PIN_FIELD_BASE(0, 0, 4, 0x0000, 0x10, 18, 3), + PIN_FIELD_BASE(1, 1, 4, 0x0000, 0x10, 21, 3), + PIN_FIELD_BASE(2, 2, 4, 0x0000, 0x10, 24, 3), + PIN_FIELD_BASE(3, 3, 4, 0x0000, 0x10, 27, 3), + PIN_FIELD_BASE(4, 4, 4, 0x0010, 0x10, 0, 3), + PIN_FIELD_BASE(5, 5, 4, 0x0010, 0x10, 3, 3), + PIN_FIELD_BASE(6, 6, 4, 0x0010, 0x10, 6, 3), + PIN_FIELD_BASE(7, 7, 4, 0x0010, 0x10, 9, 3), + PIN_FIELD_BASE(8, 8, 4, 0x0010, 0x10, 12, 3), + PIN_FIELD_BASE(9, 9, 4, 0x0010, 0x10, 15, 3), + PIN_FIELD_BASE(10, 10, 6, 0x0000, 0x10, 0, 3), + PIN_FIELD_BASE(11, 11, 6, 0x0000, 0x10, 3, 3), + PIN_FIELD_BASE(12, 12, 6, 0x0000, 0x10, 6, 3), + PIN_FIELD_BASE(13, 13, 6, 0x0000, 0x10, 9, 3), + PIN_FIELD_BASE(14, 14, 6, 0x0000, 0x10, 12, 3), + PIN_FIELD_BASE(15, 15, 6, 0x0000, 0x10, 15, 3), + PIN_FIELD_BASE(16, 16, 8, 0x0000, 0x10, 0, 3), + PIN_FIELD_BASE(17, 17, 8, 0x0000, 0x10, 0, 3), + PIN_FIELD_BASE(18, 18, 7, 0x0010, 0x10, 15, 3), + PIN_FIELD_BASE(19, 19, 7, 0x0010, 0x10, 15, 3), + PIN_FIELD_BASE(20, 20, 7, 0x0010, 0x10, 18, 3), + PIN_FIELD_BASE(21, 21, 7, 0x0010, 0x10, 18, 3), + PIN_FIELD_BASE(22, 22, 2, 0x0000, 0x10, 6, 3), + PIN_FIELD_BASE(23, 23, 2, 0x0000, 0x10, 9, 3), + PIN_FIELD_BASE(24, 24, 2, 0x0000, 0x10, 12, 3), + PIN_FIELD_BASE(25, 25, 2, 0x0000, 0x10, 15, 3), + PIN_FIELD_BASE(26, 26, 3, 0x0000, 0x10, 15, 3), + PIN_FIELD_BASE(27, 27, 3, 0x0000, 0x10, 18, 3), + PIN_FIELD_BASE(28, 28, 3, 0x0000, 0x10, 21, 3), + PIN_FIELD_BASE(29, 29, 3, 0x0000, 0x10, 24, 3), + PIN_FIELD_BASE(30, 30, 3, 0x0000, 0x10, 27, 3), + PIN_FIELD_BASE(31, 31, 3, 0x0000, 0x10, 12, 3), + PIN_FIELD_BASE(32, 32, 3, 0x0000, 0x10, 3, 3), + PIN_FIELD_BASE(33, 33, 3, 0x0000, 0x10, 9, 3), + PIN_FIELD_BASE(34, 34, 3, 0x0000, 0x10, 0, 3), + PIN_FIELD_BASE(35, 35, 3, 0x0000, 0x10, 6, 3), + PIN_FIELD_BASE(36, 36, 2, 0x0010, 0x10, 21, 3), + PIN_FIELD_BASE(37, 37, 2, 0x0010, 0x10, 24, 3), + PIN_FIELD_BASE(38, 38, 2, 0x0010, 0x10, 27, 3), + PIN_FIELD_BASE(39, 39, 2, 0x0020, 0x10, 0, 3), + PIN_FIELD_BASE(40, 40, 8, 0x0000, 0x10, 0, 3), + PIN_FIELD_BASE(41, 41, 8, 0x0000, 0x10, 0, 3), + PIN_FIELD_BASE(42, 42, 8, 0x0000, 0x10, 3, 3), + PIN_FIELD_BASE(43, 43, 7, 0x0010, 0x10, 15, 3), + PIN_FIELD_BASE(44, 44, 7, 0x0010, 0x10, 15, 3), + PIN_FIELD_BASE(45, 45, 1, 0x0010, 0x10, 6, 2), + PIN_FIELD_BASE(46, 46, 1, 0x0010, 0x10, 6, 2), + PIN_FIELD_BASE(47, 47, 1, 0x0010, 0x10, 6, 2), + PIN_FIELD_BASE(48, 48, 1, 0x0010, 0x10, 8, 2), + PIN_FIELD_BASE(49, 49, 1, 0x0010, 0x10, 8, 2), + PIN_FIELD_BASE(50, 50, 1, 0x0010, 0x10, 8, 2), + PIN_FIELD_BASE(51, 51, 1, 0x0000, 0x10, 12, 3), + PIN_FIELD_BASE(52, 52, 1, 0x0000, 0x10, 15, 3), + PIN_FIELD_BASE(53, 53, 1, 0x0000, 0x10, 27, 3), + PIN_FIELD_BASE(54, 54, 1, 0x0000, 0x10, 18, 3), + PIN_FIELD_BASE(55, 55, 1, 0x0000, 0x10, 24, 3), + PIN_FIELD_BASE(56, 56, 1, 0x0000, 0x10, 21, 3), + PIN_FIELD_BASE(57, 57, 3, 0x0010, 0x10, 24, 3), + PIN_FIELD_BASE(58, 58, 3, 0x0010, 0x10, 24, 3), + PIN_FIELD_BASE(59, 59, 3, 0x0010, 0x10, 27, 3), + PIN_FIELD_BASE(60, 60, 3, 0x0010, 0x10, 27, 3), + PIN_FIELD_BASE(61, 61, 3, 0x0020, 0x10, 0, 3), + PIN_FIELD_BASE(62, 62, 3, 0x0020, 0x10, 0, 3), + PIN_FIELD_BASE(63, 63, 3, 0x0010, 0x10, 0, 3), + PIN_FIELD_BASE(64, 64, 3, 0x0010, 0x10, 0, 3), + PIN_FIELD_BASE(65, 65, 3, 0x0010, 0x10, 0, 3), + PIN_FIELD_BASE(66, 66, 3, 0x0010, 0x10, 0, 3), + PIN_FIELD_BASE(67, 67, 3, 0x0010, 0x10, 3, 3), + PIN_FIELD_BASE(68, 68, 3, 0x0010, 0x10, 3, 3), + PIN_FIELD_BASE(69, 69, 3, 0x0010, 0x10, 3, 3), + PIN_FIELD_BASE(70, 70, 3, 0x0010, 0x10, 3, 3), + PIN_FIELD_BASE(71, 71, 3, 0x0010, 0x10, 6, 3), + PIN_FIELD_BASE(72, 72, 3, 0x0010, 0x10, 6, 3), + PIN_FIELD_BASE(73, 73, 3, 0x0010, 0x10, 6, 3), + PIN_FIELD_BASE(74, 74, 3, 0x0010, 0x10, 6, 3), + PIN_FIELD_BASE(75, 75, 3, 0x0010, 0x10, 9, 3), + PIN_FIELD_BASE(76, 76, 3, 0x0010, 0x10, 9, 3), + PIN_FIELD_BASE(77, 77, 3, 0x0010, 0x10, 9, 3), + PIN_FIELD_BASE(78, 78, 3, 0x0010, 0x10, 9, 3), + PIN_FIELD_BASE(79, 79, 3, 0x0010, 0x10, 12, 3), + PIN_FIELD_BASE(80, 80, 3, 0x0010, 0x10, 12, 3), + PIN_FIELD_BASE(81, 81, 3, 0x0010, 0x10, 12, 3), + PIN_FIELD_BASE(82, 82, 3, 0x0010, 0x10, 12, 3), + PIN_FIELD_BASE(83, 83, 3, 0x0010, 0x10, 15, 3), + PIN_FIELD_BASE(84, 84, 3, 0x0010, 0x10, 15, 3), + PIN_FIELD_BASE(85, 85, 3, 0x0010, 0x10, 21, 3), + PIN_FIELD_BASE(86, 86, 3, 0x0010, 0x10, 21, 3), + PIN_FIELD_BASE(87, 87, 3, 0x0010, 0x10, 18, 3), + PIN_FIELD_BASE(88, 88, 3, 0x0010, 0x10, 18, 3), + PIN_FIELD_BASE(89, 89, 2, 0x0020, 0x10, 3, 3), + PIN_FIELD_BASE(90, 90, 2, 0x0020, 0x10, 6, 3), + PIN_FIELD_BASE(91, 91, 2, 0x0010, 0x10, 3, 3), + PIN_FIELD_BASE(92, 92, 2, 0x0010, 0x10, 3, 3), + PIN_FIELD_BASE(93, 93, 2, 0x0010, 0x10, 3, 3), + PIN_FIELD_BASE(94, 94, 2, 0x0010, 0x10, 3, 3), + PIN_FIELD_BASE(95, 95, 2, 0x0010, 0x10, 3, 3), + PIN_FIELD_BASE(96, 96, 2, 0x0020, 0x10, 24, 3), + PIN_FIELD_BASE(97, 97, 2, 0x0020, 0x10, 9, 3), + PIN_FIELD_BASE(98, 98, 2, 0x0020, 0x10, 27, 3), + PIN_FIELD_BASE(99, 99, 2, 0x0020, 0x10, 12, 3), + PIN_FIELD_BASE(100, 100, 2, 0x0020, 0x10, 15, 3), + PIN_FIELD_BASE(101, 101, 2, 0x0020, 0x10, 18, 3), + PIN_FIELD_BASE(102, 102, 2, 0x0020, 0x10, 21, 3), + PIN_FIELD_BASE(103, 103, 2, 0x0010, 0x10, 6, 3), + PIN_FIELD_BASE(104, 104, 2, 0x0010, 0x10, 6, 3), + PIN_FIELD_BASE(105, 105, 2, 0x0010, 0x10, 6, 3), + PIN_FIELD_BASE(106, 106, 2, 0x0010, 0x10, 6, 3), + PIN_FIELD_BASE(107, 107, 2, 0x0000, 0x10, 0, 3), + PIN_FIELD_BASE(108, 108, 2, 0x0000, 0x10, 3, 3), + PIN_FIELD_BASE(109, 109, 2, 0x0000, 0x10, 27, 3), + PIN_FIELD_BASE(110, 110, 2, 0x0000, 0x10, 18, 3), + PIN_FIELD_BASE(111, 111, 2, 0x0000, 0x10, 24, 3), + PIN_FIELD_BASE(112, 112, 2, 0x0010, 0x10, 0, 3), + PIN_FIELD_BASE(113, 113, 2, 0x0000, 0x10, 21, 3), + PIN_FIELD_BASE(114, 114, 2, 0x0010, 0x10, 15, 3), + PIN_FIELD_BASE(115, 115, 2, 0x0010, 0x10, 12, 3), + PIN_FIELD_BASE(116, 116, 2, 0x0010, 0x10, 18, 3), + PIN_FIELD_BASE(117, 117, 2, 0x0010, 0x10, 9, 3), + PIN_FIELD_BASE(118, 118, 4, 0x0020, 0x10, 3, 3), + PIN_FIELD_BASE(119, 119, 4, 0x0020, 0x10, 21, 3), + PIN_FIELD_BASE(120, 120, 4, 0x0020, 0x10, 18, 3), + PIN_FIELD_BASE(121, 121, 4, 0x0030, 0x10, 6, 3), + PIN_FIELD_BASE(122, 122, 4, 0x0020, 0x10, 15, 3), + PIN_FIELD_BASE(123, 123, 4, 0x0030, 0x10, 3, 3), + PIN_FIELD_BASE(124, 124, 4, 0x0020, 0x10, 12, 3), + PIN_FIELD_BASE(125, 125, 4, 0x0030, 0x10, 0, 3), + PIN_FIELD_BASE(126, 126, 4, 0x0010, 0x10, 18, 3), + PIN_FIELD_BASE(127, 127, 4, 0x0010, 0x10, 21, 3), + PIN_FIELD_BASE(128, 128, 4, 0x0010, 0x10, 24, 3), + PIN_FIELD_BASE(129, 129, 4, 0x0010, 0x10, 27, 3), + PIN_FIELD_BASE(130, 130, 4, 0x0000, 0x10, 9, 3), + PIN_FIELD_BASE(131, 131, 4, 0x0000, 0x10, 12, 3), + PIN_FIELD_BASE(132, 132, 4, 0x0000, 0x10, 15, 3), + PIN_FIELD_BASE(133, 133, 4, 0x0020, 0x10, 0, 3), + PIN_FIELD_BASE(134, 134, 4, 0x0020, 0x10, 0, 3), + PIN_FIELD_BASE(135, 135, 4, 0x0020, 0x10, 0, 3), + PIN_FIELD_BASE(136, 136, 4, 0x0000, 0x10, 0, 3), + PIN_FIELD_BASE(137, 137, 4, 0x0000, 0x10, 3, 3), + PIN_FIELD_BASE(138, 138, 4, 0x0000, 0x10, 6, 3), + PIN_FIELD_BASE(139, 139, 4, 0x0020, 0x10, 9, 3), + PIN_FIELD_BASE(140, 140, 4, 0x0020, 0x10, 27, 3), + PIN_FIELD_BASE(141, 141, 4, 0x0020, 0x10, 6, 3), + PIN_FIELD_BASE(142, 142, 4, 0x0020, 0x10, 24, 3), + PIN_FIELD_BASE(143, 143, 1, 0x0010, 0x10, 0, 3), + PIN_FIELD_BASE(144, 144, 1, 0x0010, 0x10, 0, 3), + PIN_FIELD_BASE(145, 145, 1, 0x0010, 0x10, 3, 3), + PIN_FIELD_BASE(146, 146, 1, 0x0010, 0x10, 0, 3), + PIN_FIELD_BASE(147, 147, 1, 0x0010, 0x10, 0, 3), + PIN_FIELD_BASE(148, 148, 1, 0x0000, 0x10, 9, 3), + PIN_FIELD_BASE(149, 149, 1, 0x0000, 0x10, 0, 3), + PIN_FIELD_BASE(150, 150, 1, 0x0000, 0x10, 3, 3), + PIN_FIELD_BASE(151, 151, 1, 0x0000, 0x10, 6, 3), + PIN_FIELD_BASE(152, 152, 7, 0x0010, 0x10, 21, 3), + PIN_FIELD_BASE(153, 153, 7, 0x0010, 0x10, 21, 3), + PIN_FIELD_BASE(154, 154, 7, 0x0010, 0x10, 21, 3), + PIN_FIELD_BASE(155, 155, 7, 0x0010, 0x10, 21, 3), + PIN_FIELD_BASE(156, 156, 7, 0x0020, 0x10, 3, 3), + PIN_FIELD_BASE(157, 157, 7, 0x0020, 0x10, 6, 3), + PIN_FIELD_BASE(158, 158, 7, 0x0020, 0x10, 9, 3), + PIN_FIELD_BASE(159, 159, 7, 0x0020, 0x10, 12, 3), + PIN_FIELD_BASE(160, 160, 7, 0x0010, 0x10, 27, 3), + PIN_FIELD_BASE(161, 161, 7, 0x0020, 0x10, 0, 3), + PIN_FIELD_BASE(162, 162, 7, 0x0000, 0x10, 0, 3), + PIN_FIELD_BASE(163, 163, 7, 0x0000, 0x10, 3, 3), + PIN_FIELD_BASE(164, 164, 7, 0x0010, 0x10, 24, 3), + PIN_FIELD_BASE(165, 165, 7, 0x0010, 0x10, 24, 3), + PIN_FIELD_BASE(166, 166, 7, 0x0010, 0x10, 24, 3), + PIN_FIELD_BASE(167, 167, 7, 0x0010, 0x10, 24, 3), + PIN_FIELD_BASE(168, 168, 7, 0x0000, 0x10, 6, 3), + PIN_FIELD_BASE(169, 169, 7, 0x0000, 0x10, 9, 3), + PIN_FIELD_BASE(170, 170, 7, 0x0010, 0x10, 24, 3), + PIN_FIELD_BASE(171, 171, 7, 0x0010, 0x10, 24, 3), + PIN_FIELD_BASE(172, 172, 7, 0x0000, 0x10, 21, 3), + PIN_FIELD_BASE(173, 173, 7, 0x0000, 0x10, 24, 3), + PIN_FIELD_BASE(174, 174, 7, 0x0000, 0x10, 18, 3), + PIN_FIELD_BASE(175, 175, 7, 0x0000, 0x10, 27, 3), + PIN_FIELD_BASE(176, 176, 7, 0x0000, 0x10, 12, 3), + PIN_FIELD_BASE(177, 177, 7, 0x0000, 0x10, 15, 3), + PIN_FIELD_BASE(178, 178, 7, 0x0010, 0x10, 0, 3), + PIN_FIELD_BASE(179, 179, 7, 0x0010, 0x10, 3, 3), + PIN_FIELD_BASE(180, 180, 7, 0x0010, 0x10, 6, 3), + PIN_FIELD_BASE(181, 181, 7, 0x0010, 0x10, 9, 3), + PIN_FIELD_BASE(182, 182, 7, 0x0010, 0x10, 12, 3), + PIN_FIELD_BASE(183, 183, 9, 0x0000, 0x10, 3, 3), + PIN_FIELD_BASE(184, 184, 9, 0x0000, 0x10, 6, 3), + PIN_FIELD_BASE(185, 185, 9, 0x0000, 0x10, 12, 3), + PIN_FIELD_BASE(186, 186, 9, 0x0000, 0x10, 18, 3), + PIN_FIELD_BASE(187, 187, 9, 0x0000, 0x10, 24, 3), + PIN_FIELD_BASE(188, 188, 9, 0x0000, 0x10, 9, 3), + PIN_FIELD_BASE(189, 189, 9, 0x0000, 0x10, 21, 3), + PIN_FIELD_BASE(190, 190, 9, 0x0000, 0x10, 27, 3), + PIN_FIELD_BASE(191, 191, 9, 0x0010, 0x10, 0, 3), + PIN_FIELD_BASE(192, 192, 9, 0x0000, 0x10, 0, 3), + PIN_FIELD_BASE(193, 193, 9, 0x0000, 0x10, 15, 3), + PIN_FIELD_BASE(194, 194, 9, 0x0010, 0x10, 3, 3), + PIN_FIELD_BASE(195, 195, 5, 0x0010, 0x10, 3, 3), + PIN_FIELD_BASE(196, 196, 5, 0x0000, 0x10, 18, 3), + PIN_FIELD_BASE(197, 197, 5, 0x0000, 0x10, 24, 3), + PIN_FIELD_BASE(198, 198, 5, 0x0000, 0x10, 21, 3), + PIN_FIELD_BASE(199, 199, 5, 0x0000, 0x10, 9, 3), + PIN_FIELD_BASE(200, 200, 8, 0x0000, 0x10, 9, 3), + PIN_FIELD_BASE(201, 201, 8, 0x0000, 0x10, 15, 3), + PIN_FIELD_BASE(202, 202, 5, 0x0010, 0x10, 6, 3), + PIN_FIELD_BASE(203, 203, 5, 0x0010, 0x10, 9, 3), + PIN_FIELD_BASE(204, 204, 8, 0x0000, 0x10, 6, 3), + PIN_FIELD_BASE(205, 205, 8, 0x0000, 0x10, 12, 3), + PIN_FIELD_BASE(206, 206, 5, 0x0010, 0x10, 3, 3), + PIN_FIELD_BASE(207, 207, 5, 0x0010, 0x10, 3, 3), + PIN_FIELD_BASE(208, 208, 5, 0x0010, 0x10, 12, 3), + PIN_FIELD_BASE(209, 209, 5, 0x0010, 0x10, 0, 3), + PIN_FIELD_BASE(210, 210, 5, 0x0010, 0x10, 0, 3), + PIN_FIELD_BASE(211, 211, 5, 0x0010, 0x10, 0, 3), + PIN_FIELD_BASE(212, 212, 5, 0x0010, 0x10, 0, 3), + PIN_FIELD_BASE(213, 213, 5, 0x0010, 0x10, 3, 3), + PIN_FIELD_BASE(214, 214, 5, 0x0000, 0x10, 0, 3), + PIN_FIELD_BASE(215, 215, 5, 0x0000, 0x10, 27, 3), + PIN_FIELD_BASE(216, 216, 5, 0x0000, 0x10, 12, 3), + PIN_FIELD_BASE(217, 217, 5, 0x0000, 0x10, 15, 3), + PIN_FIELD_BASE(218, 218, 5, 0x0000, 0x10, 3, 3), + PIN_FIELD_BASE(219, 219, 5, 0x0000, 0x10, 6, 3), +}; + +static const struct mtk_pin_field_calc mt8192_pin_pupd_range[] = { + PIN_FIELD_BASE(10, 10, 6, 0x0020, 0x10, 0, 1), + PIN_FIELD_BASE(11, 11, 6, 0x0020, 0x10, 1, 1), + PIN_FIELD_BASE(12, 12, 6, 0x0020, 0x10, 2, 1), + PIN_FIELD_BASE(13, 13, 6, 0x0020, 0x10, 3, 1), + PIN_FIELD_BASE(14, 14, 6, 0x0020, 0x10, 4, 1), + PIN_FIELD_BASE(15, 15, 6, 0x0020, 0x10, 5, 1), + PIN_FIELD_BASE(45, 45, 1, 0x0060, 0x10, 9, 1), + PIN_FIELD_BASE(46, 46, 1, 0x0060, 0x10, 11, 1), + PIN_FIELD_BASE(47, 47, 1, 0x0060, 0x10, 10, 1), + PIN_FIELD_BASE(48, 48, 1, 0x0060, 0x10, 7, 1), + PIN_FIELD_BASE(49, 49, 1, 0x0060, 0x10, 8, 1), + PIN_FIELD_BASE(50, 50, 1, 0x0060, 0x10, 6, 1), + PIN_FIELD_BASE(51, 51, 1, 0x0060, 0x10, 0, 1), + PIN_FIELD_BASE(52, 52, 1, 0x0060, 0x10, 1, 1), + PIN_FIELD_BASE(53, 53, 1, 0x0060, 0x10, 5, 1), + PIN_FIELD_BASE(54, 54, 1, 0x0060, 0x10, 2, 1), + PIN_FIELD_BASE(55, 55, 1, 0x0060, 0x10, 4, 1), + PIN_FIELD_BASE(56, 56, 1, 0x0060, 0x10, 3, 1), + PIN_FIELD_BASE(118, 118, 4, 0x00e0, 0x10, 31, 1), + PIN_FIELD_BASE(119, 119, 4, 0x00e0, 0x10, 31, 1), + PIN_FIELD_BASE(120, 120, 4, 0x00e0, 0x10, 31, 1), + PIN_FIELD_BASE(121, 121, 4, 0x00e0, 0x10, 31, 1), + PIN_FIELD_BASE(122, 122, 4, 0x00e0, 0x10, 31, 1), + PIN_FIELD_BASE(123, 123, 4, 0x00e0, 0x10, 31, 1), + PIN_FIELD_BASE(124, 124, 4, 0x00e0, 0x10, 31, 1), + PIN_FIELD_BASE(125, 125, 4, 0x00e0, 0x10, 31, 1), + PIN_FIELD_BASE(139, 139, 4, 0x00e0, 0x10, 31, 1), + PIN_FIELD_BASE(140, 140, 4, 0x00e0, 0x10, 31, 1), + PIN_FIELD_BASE(141, 141, 4, 0x00e0, 0x10, 31, 1), + PIN_FIELD_BASE(142, 142, 4, 0x00e0, 0x10, 31, 1), + PIN_FIELD_BASE(152, 152, 7, 0x0090, 0x10, 3, 1), + PIN_FIELD_BASE(153, 153, 7, 0x0090, 0x10, 2, 1), + PIN_FIELD_BASE(154, 154, 7, 0x0090, 0x10, 0, 1), + PIN_FIELD_BASE(155, 155, 7, 0x0090, 0x10, 1, 1), + PIN_FIELD_BASE(160, 160, 7, 0x00f0, 0x10, 31, 1), + PIN_FIELD_BASE(161, 161, 7, 0x00f0, 0x10, 31, 1), + PIN_FIELD_BASE(183, 183, 9, 0x0030, 0x10, 1, 1), + PIN_FIELD_BASE(184, 184, 9, 0x0030, 0x10, 2, 1), + PIN_FIELD_BASE(185, 185, 9, 0x0030, 0x10, 4, 1), + PIN_FIELD_BASE(186, 186, 9, 0x0030, 0x10, 6, 1), + PIN_FIELD_BASE(187, 187, 9, 0x0030, 0x10, 8, 1), + PIN_FIELD_BASE(188, 188, 9, 0x0030, 0x10, 3, 1), + PIN_FIELD_BASE(189, 189, 9, 0x0030, 0x10, 7, 1), + PIN_FIELD_BASE(190, 190, 9, 0x0030, 0x10, 9, 1), + PIN_FIELD_BASE(191, 191, 9, 0x0030, 0x10, 10, 1), + PIN_FIELD_BASE(192, 192, 9, 0x0030, 0x10, 0, 1), + PIN_FIELD_BASE(193, 193, 9, 0x0030, 0x10, 5, 1), + PIN_FIELD_BASE(194, 194, 9, 0x0030, 0x10, 11, 1), + PIN_FIELD_BASE(200, 200, 8, 0x0070, 0x10, 31, 1), + PIN_FIELD_BASE(201, 201, 8, 0x0070, 0x10, 31, 1), + PIN_FIELD_BASE(202, 202, 5, 0x0070, 0x10, 31, 1), + PIN_FIELD_BASE(203, 203, 5, 0x0070, 0x10, 31, 1), + PIN_FIELD_BASE(204, 204, 8, 0x0070, 0x10, 31, 1), + PIN_FIELD_BASE(205, 205, 8, 0x0070, 0x10, 31, 1), +}; + +static const struct mtk_pin_field_calc mt8192_pin_r0_range[] = { + PIN_FIELD_BASE(10, 10, 6, 0x0030, 0x10, 0, 1), + PIN_FIELD_BASE(11, 11, 6, 0x0030, 0x10, 1, 1), + PIN_FIELD_BASE(12, 12, 6, 0x0030, 0x10, 2, 1), + PIN_FIELD_BASE(13, 13, 6, 0x0030, 0x10, 3, 1), + PIN_FIELD_BASE(14, 14, 6, 0x0030, 0x10, 4, 1), + PIN_FIELD_BASE(15, 15, 6, 0x0030, 0x10, 5, 1), + PIN_FIELD_BASE(45, 45, 1, 0x0080, 0x10, 9, 1), + PIN_FIELD_BASE(46, 46, 1, 0x0080, 0x10, 11, 1), + PIN_FIELD_BASE(47, 47, 1, 0x0080, 0x10, 10, 1), + PIN_FIELD_BASE(48, 48, 1, 0x0080, 0x10, 7, 1), + PIN_FIELD_BASE(49, 49, 1, 0x0080, 0x10, 8, 1), + PIN_FIELD_BASE(50, 50, 1, 0x0080, 0x10, 6, 1), + PIN_FIELD_BASE(51, 51, 1, 0x0080, 0x10, 0, 1), + PIN_FIELD_BASE(52, 52, 1, 0x0080, 0x10, 1, 1), + PIN_FIELD_BASE(53, 53, 1, 0x0080, 0x10, 5, 1), + PIN_FIELD_BASE(54, 54, 1, 0x0080, 0x10, 2, 1), + PIN_FIELD_BASE(55, 55, 1, 0x0080, 0x10, 4, 1), + PIN_FIELD_BASE(56, 56, 1, 0x0080, 0x10, 3, 1), + PIN_FIELD_BASE(118, 118, 4, 0x00e0, 0x10, 0, 1), + PIN_FIELD_BASE(119, 119, 4, 0x00e0, 0x10, 12, 1), + PIN_FIELD_BASE(120, 120, 4, 0x00e0, 0x10, 10, 1), + PIN_FIELD_BASE(121, 121, 4, 0x00e0, 0x10, 22, 1), + PIN_FIELD_BASE(122, 122, 4, 0x00e0, 0x10, 8, 1), + PIN_FIELD_BASE(123, 123, 4, 0x00e0, 0x10, 20, 1), + PIN_FIELD_BASE(124, 124, 4, 0x00e0, 0x10, 6, 1), + PIN_FIELD_BASE(125, 125, 4, 0x00e0, 0x10, 18, 1), + PIN_FIELD_BASE(139, 139, 4, 0x00e0, 0x10, 4, 1), + PIN_FIELD_BASE(140, 140, 4, 0x00e0, 0x10, 16, 1), + PIN_FIELD_BASE(141, 141, 4, 0x00e0, 0x10, 2, 1), + PIN_FIELD_BASE(142, 142, 4, 0x00e0, 0x10, 14, 1), + PIN_FIELD_BASE(152, 152, 7, 0x00c0, 0x10, 3, 1), + PIN_FIELD_BASE(153, 153, 7, 0x00c0, 0x10, 2, 1), + PIN_FIELD_BASE(154, 154, 7, 0x00c0, 0x10, 0, 1), + PIN_FIELD_BASE(155, 155, 7, 0x00c0, 0x10, 1, 1), + PIN_FIELD_BASE(160, 160, 7, 0x00f0, 0x10, 0, 1), + PIN_FIELD_BASE(161, 161, 7, 0x00f0, 0x10, 2, 1), + PIN_FIELD_BASE(183, 183, 9, 0x0040, 0x10, 1, 1), + PIN_FIELD_BASE(184, 184, 9, 0x0040, 0x10, 2, 1), + PIN_FIELD_BASE(185, 185, 9, 0x0040, 0x10, 4, 1), + PIN_FIELD_BASE(186, 186, 9, 0x0040, 0x10, 6, 1), + PIN_FIELD_BASE(187, 187, 9, 0x0040, 0x10, 8, 1), + PIN_FIELD_BASE(188, 188, 9, 0x0040, 0x10, 3, 1), + PIN_FIELD_BASE(189, 189, 9, 0x0040, 0x10, 7, 1), + PIN_FIELD_BASE(190, 190, 9, 0x0040, 0x10, 9, 1), + PIN_FIELD_BASE(191, 191, 9, 0x0040, 0x10, 10, 1), + PIN_FIELD_BASE(192, 192, 9, 0x0040, 0x10, 0, 1), + PIN_FIELD_BASE(193, 193, 9, 0x0040, 0x10, 5, 1), + PIN_FIELD_BASE(194, 194, 9, 0x0040, 0x10, 11, 1), + PIN_FIELD_BASE(200, 200, 8, 0x0070, 0x10, 2, 1), + PIN_FIELD_BASE(201, 201, 8, 0x0070, 0x10, 6, 1), + PIN_FIELD_BASE(202, 202, 5, 0x0070, 0x10, 0, 1), + PIN_FIELD_BASE(203, 203, 5, 0x0070, 0x10, 2, 1), + PIN_FIELD_BASE(204, 204, 8, 0x0070, 0x10, 0, 1), + PIN_FIELD_BASE(205, 205, 8, 0x0070, 0x10, 4, 1), +}; + +static const struct mtk_pin_field_calc mt8192_pin_r1_range[] = { + PIN_FIELD_BASE(10, 10, 6, 0x0040, 0x10, 0, 1), + PIN_FIELD_BASE(11, 11, 6, 0x0040, 0x10, 1, 1), + PIN_FIELD_BASE(12, 12, 6, 0x0040, 0x10, 2, 1), + PIN_FIELD_BASE(13, 13, 6, 0x0040, 0x10, 3, 1), + PIN_FIELD_BASE(14, 14, 6, 0x0040, 0x10, 4, 1), + PIN_FIELD_BASE(15, 15, 6, 0x0040, 0x10, 5, 1), + PIN_FIELD_BASE(45, 45, 1, 0x0090, 0x10, 9, 1), + PIN_FIELD_BASE(46, 46, 1, 0x0090, 0x10, 11, 1), + PIN_FIELD_BASE(47, 47, 1, 0x0090, 0x10, 10, 1), + PIN_FIELD_BASE(48, 48, 1, 0x0090, 0x10, 7, 1), + PIN_FIELD_BASE(49, 49, 1, 0x0090, 0x10, 8, 1), + PIN_FIELD_BASE(50, 50, 1, 0x0090, 0x10, 6, 1), + PIN_FIELD_BASE(51, 51, 1, 0x0090, 0x10, 0, 1), + PIN_FIELD_BASE(52, 52, 1, 0x0090, 0x10, 1, 1), + PIN_FIELD_BASE(53, 53, 1, 0x0090, 0x10, 5, 1), + PIN_FIELD_BASE(54, 54, 1, 0x0090, 0x10, 2, 1), + PIN_FIELD_BASE(55, 55, 1, 0x0090, 0x10, 4, 1), + PIN_FIELD_BASE(56, 56, 1, 0x0090, 0x10, 3, 1), + PIN_FIELD_BASE(118, 118, 4, 0x00e0, 0x10, 1, 1), + PIN_FIELD_BASE(119, 119, 4, 0x00e0, 0x10, 13, 1), + PIN_FIELD_BASE(120, 120, 4, 0x00e0, 0x10, 11, 1), + PIN_FIELD_BASE(121, 121, 4, 0x00e0, 0x10, 23, 1), + PIN_FIELD_BASE(122, 122, 4, 0x00e0, 0x10, 9, 1), + PIN_FIELD_BASE(123, 123, 4, 0x00e0, 0x10, 21, 1), + PIN_FIELD_BASE(124, 124, 4, 0x00e0, 0x10, 7, 1), + PIN_FIELD_BASE(125, 125, 4, 0x00e0, 0x10, 19, 1), + PIN_FIELD_BASE(139, 139, 4, 0x00e0, 0x10, 5, 1), + PIN_FIELD_BASE(140, 140, 4, 0x00e0, 0x10, 17, 1), + PIN_FIELD_BASE(141, 141, 4, 0x00e0, 0x10, 3, 1), + PIN_FIELD_BASE(142, 142, 4, 0x00e0, 0x10, 15, 1), + PIN_FIELD_BASE(152, 152, 7, 0x00d0, 0x10, 3, 1), + PIN_FIELD_BASE(153, 153, 7, 0x00d0, 0x10, 2, 1), + PIN_FIELD_BASE(154, 154, 7, 0x00d0, 0x10, 0, 1), + PIN_FIELD_BASE(155, 155, 7, 0x00d0, 0x10, 1, 1), + PIN_FIELD_BASE(160, 160, 7, 0x00f0, 0x10, 1, 1), + PIN_FIELD_BASE(161, 161, 7, 0x00f0, 0x10, 3, 1), + PIN_FIELD_BASE(183, 183, 9, 0x0050, 0x10, 1, 1), + PIN_FIELD_BASE(184, 184, 9, 0x0050, 0x10, 2, 1), + PIN_FIELD_BASE(185, 185, 9, 0x0050, 0x10, 4, 1), + PIN_FIELD_BASE(186, 186, 9, 0x0050, 0x10, 6, 1), + PIN_FIELD_BASE(187, 187, 9, 0x0050, 0x10, 8, 1), + PIN_FIELD_BASE(188, 188, 9, 0x0050, 0x10, 3, 1), + PIN_FIELD_BASE(189, 189, 9, 0x0050, 0x10, 7, 1), + PIN_FIELD_BASE(190, 190, 9, 0x0050, 0x10, 9, 1), + PIN_FIELD_BASE(191, 191, 9, 0x0050, 0x10, 10, 1), + PIN_FIELD_BASE(192, 192, 9, 0x0050, 0x10, 0, 1), + PIN_FIELD_BASE(193, 193, 9, 0x0050, 0x10, 5, 1), + PIN_FIELD_BASE(194, 194, 9, 0x0050, 0x10, 11, 1), + PIN_FIELD_BASE(200, 200, 8, 0x0070, 0x10, 3, 1), + PIN_FIELD_BASE(201, 201, 8, 0x0070, 0x10, 7, 1), + PIN_FIELD_BASE(202, 202, 5, 0x0070, 0x10, 1, 1), + PIN_FIELD_BASE(203, 203, 5, 0x0070, 0x10, 3, 1), + PIN_FIELD_BASE(204, 204, 8, 0x0070, 0x10, 1, 1), + PIN_FIELD_BASE(205, 205, 8, 0x0070, 0x10, 5, 1), +}; + +static const struct mtk_pin_field_calc mt8192_pin_e1e0en_range[] = { + PIN_FIELD_BASE(118, 118, 4, 0x0040, 0x10, 0, 1), + PIN_FIELD_BASE(119, 119, 4, 0x0040, 0x10, 18, 1), + PIN_FIELD_BASE(120, 120, 4, 0x0040, 0x10, 15, 1), + PIN_FIELD_BASE(121, 121, 4, 0x0050, 0x10, 3, 1), + PIN_FIELD_BASE(122, 122, 4, 0x0040, 0x10, 12, 1), + PIN_FIELD_BASE(123, 123, 4, 0x0050, 0x10, 0, 1), + PIN_FIELD_BASE(124, 124, 4, 0x0040, 0x10, 9, 1), + PIN_FIELD_BASE(125, 125, 4, 0x0040, 0x10, 27, 1), + PIN_FIELD_BASE(139, 139, 4, 0x0040, 0x10, 6, 1), + PIN_FIELD_BASE(140, 140, 4, 0x0040, 0x10, 24, 1), + PIN_FIELD_BASE(141, 141, 4, 0x0040, 0x10, 3, 1), + PIN_FIELD_BASE(142, 142, 4, 0x0040, 0x10, 21, 1), + PIN_FIELD_BASE(160, 160, 7, 0x0030, 0x10, 0, 1), + PIN_FIELD_BASE(161, 161, 7, 0x0030, 0x10, 3, 1), + PIN_FIELD_BASE(200, 200, 8, 0x0010, 0x10, 3, 1), + PIN_FIELD_BASE(201, 201, 8, 0x0010, 0x10, 9, 1), + PIN_FIELD_BASE(202, 202, 5, 0x0020, 0x10, 0, 1), + PIN_FIELD_BASE(203, 203, 5, 0x0020, 0x10, 3, 1), + PIN_FIELD_BASE(204, 204, 8, 0x0010, 0x10, 0, 1), + PIN_FIELD_BASE(205, 205, 8, 0x0010, 0x10, 6, 1), +}; + +static const struct mtk_pin_field_calc mt8192_pin_e0_range[] = { + PIN_FIELD_BASE(118, 118, 4, 0x0040, 0x10, 1, 1), + PIN_FIELD_BASE(119, 119, 4, 0x0040, 0x10, 19, 1), + PIN_FIELD_BASE(120, 120, 4, 0x0040, 0x10, 16, 1), + PIN_FIELD_BASE(121, 121, 4, 0x0050, 0x10, 4, 1), + PIN_FIELD_BASE(122, 122, 4, 0x0040, 0x10, 13, 1), + PIN_FIELD_BASE(123, 123, 4, 0x0050, 0x10, 1, 1), + PIN_FIELD_BASE(124, 124, 4, 0x0040, 0x10, 10, 1), + PIN_FIELD_BASE(125, 125, 4, 0x0040, 0x10, 28, 1), + PIN_FIELD_BASE(139, 139, 4, 0x0040, 0x10, 7, 1), + PIN_FIELD_BASE(140, 140, 4, 0x0040, 0x10, 25, 1), + PIN_FIELD_BASE(141, 141, 4, 0x0040, 0x10, 4, 1), + PIN_FIELD_BASE(142, 142, 4, 0x0040, 0x10, 22, 1), + PIN_FIELD_BASE(160, 160, 7, 0x0030, 0x10, 1, 1), + PIN_FIELD_BASE(161, 161, 7, 0x0030, 0x10, 4, 1), + PIN_FIELD_BASE(200, 200, 8, 0x0010, 0x10, 4, 1), + PIN_FIELD_BASE(201, 201, 8, 0x0010, 0x10, 10, 1), + PIN_FIELD_BASE(202, 202, 5, 0x0020, 0x10, 1, 1), + PIN_FIELD_BASE(203, 203, 5, 0x0020, 0x10, 4, 1), + PIN_FIELD_BASE(204, 204, 8, 0x0010, 0x10, 1, 1), + PIN_FIELD_BASE(205, 205, 8, 0x0010, 0x10, 7, 1), +}; + +static const struct mtk_pin_field_calc mt8192_pin_e1_range[] = { + PIN_FIELD_BASE(118, 118, 4, 0x0040, 0x10, 2, 1), + PIN_FIELD_BASE(119, 119, 4, 0x0040, 0x10, 20, 1), + PIN_FIELD_BASE(120, 120, 4, 0x0040, 0x10, 17, 1), + PIN_FIELD_BASE(121, 121, 4, 0x0050, 0x10, 5, 1), + PIN_FIELD_BASE(122, 122, 4, 0x0040, 0x10, 14, 1), + PIN_FIELD_BASE(123, 123, 4, 0x0050, 0x10, 2, 1), + PIN_FIELD_BASE(124, 124, 4, 0x0040, 0x10, 11, 1), + PIN_FIELD_BASE(125, 125, 4, 0x0040, 0x10, 29, 1), + PIN_FIELD_BASE(139, 139, 4, 0x0040, 0x10, 8, 1), + PIN_FIELD_BASE(140, 140, 4, 0x0040, 0x10, 26, 1), + PIN_FIELD_BASE(141, 141, 4, 0x0040, 0x10, 5, 1), + PIN_FIELD_BASE(142, 142, 4, 0x0040, 0x10, 23, 1), + PIN_FIELD_BASE(160, 160, 7, 0x0030, 0x10, 2, 1), + PIN_FIELD_BASE(161, 161, 7, 0x0030, 0x10, 5, 1), + PIN_FIELD_BASE(200, 200, 8, 0x0010, 0x10, 5, 1), + PIN_FIELD_BASE(201, 201, 8, 0x0010, 0x10, 11, 1), + PIN_FIELD_BASE(202, 202, 5, 0x0020, 0x10, 2, 1), + PIN_FIELD_BASE(203, 203, 5, 0x0020, 0x10, 5, 1), + PIN_FIELD_BASE(204, 204, 8, 0x0010, 0x10, 2, 1), + PIN_FIELD_BASE(205, 205, 8, 0x0010, 0x10, 8, 1), +}; + + +static const char * const mt8192_pinctrl_register_base_names[] = { + "iocfg0", "iocfg_rm", "iocfg_bm", "iocfg_bl", "iocfg_br", + "iocfg_lm", "iocfg_lb", "iocfg_rt", "iocfg_lt", "iocfg_tl", +}; + +static const struct mtk_eint_hw mt8192_eint_hw = { + .port_mask = 7, + .ports = 7, + .ap_num = 224, + .db_cnt = 32, +}; + +static const struct mtk_pin_reg_calc mt8192_reg_cals[PINCTRL_PIN_REG_MAX] = { + [PINCTRL_PIN_REG_MODE] = MTK_RANGE(mt8192_pin_mode_range), + [PINCTRL_PIN_REG_DIR] = MTK_RANGE(mt8192_pin_dir_range), + [PINCTRL_PIN_REG_DI] = MTK_RANGE(mt8192_pin_di_range), + [PINCTRL_PIN_REG_DO] = MTK_RANGE(mt8192_pin_do_range), + [PINCTRL_PIN_REG_SR] = MTK_RANGE(mt8192_pin_dir_range), + [PINCTRL_PIN_REG_SMT] = MTK_RANGE(mt8192_pin_smt_range), + [PINCTRL_PIN_REG_IES] = MTK_RANGE(mt8192_pin_ies_range), + [PINCTRL_PIN_REG_PU] = MTK_RANGE(mt8192_pin_pu_range), + [PINCTRL_PIN_REG_PD] = MTK_RANGE(mt8192_pin_pd_range), + [PINCTRL_PIN_REG_DRV] = MTK_RANGE(mt8192_pin_drv_range), + [PINCTRL_PIN_REG_PUPD] = MTK_RANGE(mt8192_pin_pupd_range), + [PINCTRL_PIN_REG_R0] = MTK_RANGE(mt8192_pin_r0_range), + [PINCTRL_PIN_REG_R1] = MTK_RANGE(mt8192_pin_r1_range), + [PINCTRL_PIN_REG_DRV_EN] = MTK_RANGE(mt8192_pin_e1e0en_range), + [PINCTRL_PIN_REG_DRV_E0] = MTK_RANGE(mt8192_pin_e0_range), + [PINCTRL_PIN_REG_DRV_E1] = MTK_RANGE(mt8192_pin_e1_range), +}; + +static const struct mtk_pin_soc mt8192_data = { + .reg_cal = mt8192_reg_cals, + .pins = mtk_pins_mt8192, + .npins = ARRAY_SIZE(mtk_pins_mt8192), + .ngrps = ARRAY_SIZE(mtk_pins_mt8192), + .base_names = mt8192_pinctrl_register_base_names, + .nbase_names = ARRAY_SIZE(mt8192_pinctrl_register_base_names), + .eint_hw = &mt8192_eint_hw, + .nfuncs = 8, + .gpio_m = 0, + .bias_set_combo = mtk_pinconf_bias_set_combo, + .bias_get_combo = mtk_pinconf_bias_get_combo, + .drive_set = mtk_pinconf_drive_set_raw, + .drive_get = mtk_pinconf_drive_get_raw, + .adv_pull_get = mtk_pinconf_adv_pull_get, + .adv_pull_set = mtk_pinconf_adv_pull_set, + .adv_drive_get = mtk_pinconf_adv_drive_get, + .adv_drive_set = mtk_pinconf_adv_drive_set, +}; + +static const struct of_device_id mt8192_pinctrl_of_match[] = { + { .compatible = "mediatek,mt8192-pinctrl", }, + { } +}; + +static int mt8192_pinctrl_probe(struct platform_device *pdev) +{ + return mtk_paris_pinctrl_probe(pdev, &mt8192_data); +} + +static struct platform_driver mt8192_pinctrl_driver = { + .driver = { + .name = "mt8192-pinctrl", + .of_match_table = mt8192_pinctrl_of_match, + .pm = &mtk_paris_pinctrl_pm_ops, + }, + .probe = mt8192_pinctrl_probe, +}; + +static int __init mt8192_pinctrl_init(void) +{ + return platform_driver_register(&mt8192_pinctrl_driver); +} +arch_initcall(mt8192_pinctrl_init); + +MODULE_LICENSE("GPL v2"); +MODULE_DESCRIPTION("MediaTek MT8192 Pinctrl Driver"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-mt8192.h b/drivers/pinctrl/mediatek/pinctrl-mtk-mt8192.h new file mode 100644 index 000000000000..071162141376 --- /dev/null +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-mt8192.h @@ -0,0 +1,2275 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2019 MediaTek Inc. + * Author: Andy Teng + * + */ + +#ifndef __PINCTRL_MTK_MT8192_H +#define __PINCTRL_MTK_MT8192_H + +#include "pinctrl-paris.h" + +static const struct mtk_pin_desc mtk_pins_mt8192[] = { + MTK_PIN( + 0, "GPIO0", + MTK_EINT_FUNCTION(0, 0), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO0"), + MTK_FUNCTION(1, "SPI6_CLK"), + MTK_FUNCTION(2, "I2S5_MCK"), + MTK_FUNCTION(3, "PWM_0"), + MTK_FUNCTION(4, "TDM_LRCK"), + MTK_FUNCTION(5, "TP_GPIO0_AO"), + MTK_FUNCTION(6, "MD_INT0") + ), + MTK_PIN( + 1, "GPIO1", + MTK_EINT_FUNCTION(0, 1), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO1"), + MTK_FUNCTION(1, "SPI6_CSB"), + MTK_FUNCTION(2, "I2S5_BCK"), + MTK_FUNCTION(3, "PWM_1"), + MTK_FUNCTION(4, "TDM_BCK"), + MTK_FUNCTION(5, "TP_GPIO1_AO"), + MTK_FUNCTION(6, "MD_INT1_C2K_UIM0_HOT_PLUG"), + MTK_FUNCTION(7, "DBG_MON_A9") + ), + MTK_PIN( + 2, "GPIO2", + MTK_EINT_FUNCTION(0, 2), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO2"), + MTK_FUNCTION(1, "SPI6_MI"), + MTK_FUNCTION(2, "I2S5_LRCK"), + MTK_FUNCTION(3, "PWM_2"), + MTK_FUNCTION(4, "TDM_MCK"), + MTK_FUNCTION(5, "TP_GPIO2_AO"), + MTK_FUNCTION(6, "MD_INT2_C2K_UIM1_HOT_PLUG"), + MTK_FUNCTION(7, "DBG_MON_A10") + ), + MTK_PIN( + 3, "GPIO3", + MTK_EINT_FUNCTION(0, 3), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO3"), + MTK_FUNCTION(1, "SPI6_MO"), + MTK_FUNCTION(2, "I2S5_DO"), + MTK_FUNCTION(3, "PWM_3"), + MTK_FUNCTION(4, "TDM_DATA0"), + MTK_FUNCTION(5, "TP_GPIO3_AO"), + MTK_FUNCTION(6, "CLKM0"), + MTK_FUNCTION(7, "DBG_MON_A11") + ), + MTK_PIN( + 4, "GPIO4", + MTK_EINT_FUNCTION(0, 4), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO4"), + MTK_FUNCTION(1, "SPI4_A_CLK"), + MTK_FUNCTION(2, "I2S2_MCK"), + MTK_FUNCTION(3, "DMIC1_CLK"), + MTK_FUNCTION(4, "TDM_DATA1"), + MTK_FUNCTION(5, "TP_GPIO4_AO"), + MTK_FUNCTION(6, "PCM1_DI"), + MTK_FUNCTION(7, "IDDIG") + ), + MTK_PIN( + 5, "GPIO5", + MTK_EINT_FUNCTION(0, 5), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO5"), + MTK_FUNCTION(1, "SPI4_A_CSB"), + MTK_FUNCTION(2, "I2S2_BCK"), + MTK_FUNCTION(3, "DMIC1_DAT"), + MTK_FUNCTION(4, "TDM_DATA2"), + MTK_FUNCTION(5, "TP_GPIO5_AO"), + MTK_FUNCTION(6, "PCM1_CLK"), + MTK_FUNCTION(7, "USB_DRVVBUS") + ), + MTK_PIN( + 6, "GPIO6", + MTK_EINT_FUNCTION(0, 6), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO6"), + MTK_FUNCTION(1, "SPI4_A_MI"), + MTK_FUNCTION(2, "I2S2_LRCK"), + MTK_FUNCTION(3, "DMIC_CLK"), + MTK_FUNCTION(4, "TDM_DATA3"), + MTK_FUNCTION(5, "TP_GPIO6_AO"), + MTK_FUNCTION(6, "PCM1_SYNC") + ), + MTK_PIN( + 7, "GPIO7", + MTK_EINT_FUNCTION(0, 7), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO7"), + MTK_FUNCTION(1, "SPI4_A_MO"), + MTK_FUNCTION(2, "I2S2_DI"), + MTK_FUNCTION(3, "DMIC_DAT"), + MTK_FUNCTION(4, "WIFI_TXD"), + MTK_FUNCTION(5, "TP_GPIO7_AO"), + MTK_FUNCTION(6, "PCM1_DO0") + ), + MTK_PIN( + 8, "GPIO8", + MTK_EINT_FUNCTION(0, 8), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO8"), + MTK_FUNCTION(1, "SRCLKENAI1"), + MTK_FUNCTION(2, "I2S2_DI2"), + MTK_FUNCTION(3, "KPCOL2"), + MTK_FUNCTION(4, "CONN_TCXOENA_REQ"), + MTK_FUNCTION(5, "CLKM1"), + MTK_FUNCTION(6, "PCM1_DO1"), + MTK_FUNCTION(7, "DBG_MON_A12") + ), + MTK_PIN( + 9, "GPIO9", + MTK_EINT_FUNCTION(0, 9), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO9"), + MTK_FUNCTION(1, "SRCLKENAI0"), + MTK_FUNCTION(2, "DVFSRC_EXT_REQ"), + MTK_FUNCTION(3, "KPROW2"), + MTK_FUNCTION(4, "CMMCLK4"), + MTK_FUNCTION(5, "CLKM3"), + MTK_FUNCTION(6, "PCM1_DO2"), + MTK_FUNCTION(7, "DBG_MON_A13") + ), + MTK_PIN( + 10, "GPIO10", + MTK_EINT_FUNCTION(0, 10), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO10"), + MTK_FUNCTION(1, "MSDC2_CLK"), + MTK_FUNCTION(2, "SPI4_B_CLK"), + MTK_FUNCTION(3, "I2S8_MCK"), + MTK_FUNCTION(5, "MD_INT0"), + MTK_FUNCTION(6, "TP_GPIO8_AO") + ), + MTK_PIN( + 11, "GPIO11", + MTK_EINT_FUNCTION(0, 11), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO11"), + MTK_FUNCTION(1, "MSDC2_CMD"), + MTK_FUNCTION(2, "SPI4_B_CSB"), + MTK_FUNCTION(3, "I2S8_BCK"), + MTK_FUNCTION(4, "PCIE_CLKREQ_N"), + MTK_FUNCTION(5, "MD_INT1_C2K_UIM0_HOT_PLUG"), + MTK_FUNCTION(6, "TP_GPIO9_AO") + ), + MTK_PIN( + 12, "GPIO12", + MTK_EINT_FUNCTION(0, 12), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO12"), + MTK_FUNCTION(1, "MSDC2_DAT3"), + MTK_FUNCTION(2, "SPI4_B_MI"), + MTK_FUNCTION(3, "I2S8_LRCK"), + MTK_FUNCTION(4, "DMIC1_CLK"), + MTK_FUNCTION(5, "MD_INT2_C2K_UIM1_HOT_PLUG"), + MTK_FUNCTION(6, "TP_GPIO10_AO") + ), + MTK_PIN( + 13, "GPIO13", + MTK_EINT_FUNCTION(0, 13), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO13"), + MTK_FUNCTION(1, "MSDC2_DAT0"), + MTK_FUNCTION(2, "SPI4_B_MO"), + MTK_FUNCTION(3, "I2S8_DI"), + MTK_FUNCTION(4, "DMIC1_DAT"), + MTK_FUNCTION(5, "ANT_SEL10"), + MTK_FUNCTION(6, "TP_GPIO11_AO") + ), + MTK_PIN( + 14, "GPIO14", + MTK_EINT_FUNCTION(0, 14), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO14"), + MTK_FUNCTION(1, "MSDC2_DAT2"), + MTK_FUNCTION(2, "IDDIG"), + MTK_FUNCTION(3, "SCL_6306"), + MTK_FUNCTION(4, "PCIE_PERESET_N"), + MTK_FUNCTION(5, "ANT_SEL11"), + MTK_FUNCTION(6, "TP_GPIO12_AO") + ), + MTK_PIN( + 15, "GPIO15", + MTK_EINT_FUNCTION(0, 15), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO15"), + MTK_FUNCTION(1, "MSDC2_DAT1"), + MTK_FUNCTION(2, "USB_DRVVBUS"), + MTK_FUNCTION(3, "SDA_6306"), + MTK_FUNCTION(4, "PCIE_WAKE_N"), + MTK_FUNCTION(5, "ANT_SEL12"), + MTK_FUNCTION(6, "TP_GPIO13_AO") + ), + MTK_PIN( + 16, "GPIO16", + MTK_EINT_FUNCTION(0, 16), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO16"), + MTK_FUNCTION(1, "SRCLKENAI1"), + MTK_FUNCTION(2, "IDDIG"), + MTK_FUNCTION(3, "TP_GPIO14_AO"), + MTK_FUNCTION(4, "KPCOL2"), + MTK_FUNCTION(5, "GPS_L1_ELNA_EN"), + MTK_FUNCTION(6, "SPI7_A_MI"), + MTK_FUNCTION(7, "DBG_MON_A0") + ), + MTK_PIN( + 17, "GPIO17", + MTK_EINT_FUNCTION(0, 17), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO17"), + MTK_FUNCTION(1, "SRCLKENAI0"), + MTK_FUNCTION(2, "USB_DRVVBUS"), + MTK_FUNCTION(3, "TP_GPIO15_AO"), + MTK_FUNCTION(4, "KPROW2"), + MTK_FUNCTION(6, "SPI7_A_MO"), + MTK_FUNCTION(7, "DBG_MON_A1") + ), + MTK_PIN( + 18, "GPIO18", + MTK_EINT_FUNCTION(0, 18), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO18"), + MTK_FUNCTION(1, "SRCLKENAI0"), + MTK_FUNCTION(2, "SPI4_C_MI"), + MTK_FUNCTION(3, "SPI1_B_MI"), + MTK_FUNCTION(4, "GPS_L1_ELNA_EN"), + MTK_FUNCTION(5, "ANT_SEL10"), + MTK_FUNCTION(6, "MD_INT0"), + MTK_FUNCTION(7, "DBG_MON_B2") + ), + MTK_PIN( + 19, "GPIO19", + MTK_EINT_FUNCTION(0, 19), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO19"), + MTK_FUNCTION(1, "SRCLKENAI1"), + MTK_FUNCTION(2, "SPI4_C_MO"), + MTK_FUNCTION(3, "SPI1_B_MO"), + MTK_FUNCTION(5, "ANT_SEL11"), + MTK_FUNCTION(6, "MD_INT1_C2K_UIM0_HOT_PLUG"), + MTK_FUNCTION(7, "DBG_MON_B3") + ), + MTK_PIN( + 20, "GPIO20", + MTK_EINT_FUNCTION(0, 20), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO20"), + MTK_FUNCTION(1, "SRCLKENAI0"), + MTK_FUNCTION(2, "SPI4_C_CLK"), + MTK_FUNCTION(3, "SPI1_B_CLK"), + MTK_FUNCTION(4, "PWM_3"), + MTK_FUNCTION(5, "ANT_SEL12"), + MTK_FUNCTION(6, "MD_INT2_C2K_UIM1_HOT_PLUG"), + MTK_FUNCTION(7, "DBG_MON_B4") + ), + MTK_PIN( + 21, "GPIO21", + MTK_EINT_FUNCTION(0, 21), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO21"), + MTK_FUNCTION(2, "SPI4_C_CSB"), + MTK_FUNCTION(3, "SPI1_B_CSB"), + MTK_FUNCTION(6, "IDDIG"), + MTK_FUNCTION(7, "DBG_MON_B5") + ), + MTK_PIN( + 22, "GPIO22", + MTK_EINT_FUNCTION(0, 22), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO22"), + MTK_FUNCTION(2, "SPI0_C_CLK"), + MTK_FUNCTION(3, "SPI7_B_CLK"), + MTK_FUNCTION(4, "I2S7_BCK"), + MTK_FUNCTION(5, "I2S9_BCK"), + MTK_FUNCTION(6, "SCL_6306") + ), + MTK_PIN( + 23, "GPIO23", + MTK_EINT_FUNCTION(0, 23), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO23"), + MTK_FUNCTION(2, "SPI0_C_CSB"), + MTK_FUNCTION(3, "SPI7_B_CSB"), + MTK_FUNCTION(4, "I2S7_LRCK"), + MTK_FUNCTION(5, "I2S9_LRCK"), + MTK_FUNCTION(6, "SDA_6306") + ), + MTK_PIN( + 24, "GPIO24", + MTK_EINT_FUNCTION(0, 24), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO24"), + MTK_FUNCTION(1, "SRCLKENAI1"), + MTK_FUNCTION(2, "SPI0_C_MI"), + MTK_FUNCTION(3, "SPI7_B_MI"), + MTK_FUNCTION(4, "I2S6_DI"), + MTK_FUNCTION(5, "I2S8_DI"), + MTK_FUNCTION(6, "SPINOR_CS") + ), + MTK_PIN( + 25, "GPIO25", + MTK_EINT_FUNCTION(0, 25), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO25"), + MTK_FUNCTION(1, "SRCLKENAI0"), + MTK_FUNCTION(2, "SPI0_C_MO"), + MTK_FUNCTION(3, "SPI7_B_MO"), + MTK_FUNCTION(4, "I2S7_DO"), + MTK_FUNCTION(5, "I2S9_DO"), + MTK_FUNCTION(6, "SPINOR_CK") + ), + MTK_PIN( + 26, "GPIO26", + MTK_EINT_FUNCTION(0, 26), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO26"), + MTK_FUNCTION(1, "PWM_2"), + MTK_FUNCTION(2, "CLKM0"), + MTK_FUNCTION(3, "USB_DRVVBUS"), + MTK_FUNCTION(4, "SPI5_C_MI"), + MTK_FUNCTION(5, "I2S9_BCK") + ), + MTK_PIN( + 27, "GPIO27", + MTK_EINT_FUNCTION(0, 27), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO27"), + MTK_FUNCTION(1, "PWM_3"), + MTK_FUNCTION(2, "CLKM1"), + MTK_FUNCTION(4, "SPI5_C_MO"), + MTK_FUNCTION(5, "I2S9_LRCK"), + MTK_FUNCTION(6, "SPINOR_IO0") + ), + MTK_PIN( + 28, "GPIO28", + MTK_EINT_FUNCTION(0, 28), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO28"), + MTK_FUNCTION(1, "PWM_0"), + MTK_FUNCTION(2, "CLKM2"), + MTK_FUNCTION(4, "SPI5_C_CSB"), + MTK_FUNCTION(5, "I2S9_MCK"), + MTK_FUNCTION(6, "SPINOR_IO1") + ), + MTK_PIN( + 29, "GPIO29", + MTK_EINT_FUNCTION(0, 29), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO29"), + MTK_FUNCTION(1, "PWM_1"), + MTK_FUNCTION(2, "CLKM3"), + MTK_FUNCTION(4, "SPI5_C_CLK"), + MTK_FUNCTION(5, "I2S9_DO"), + MTK_FUNCTION(6, "SPINOR_IO2") + ), + MTK_PIN( + 30, "GPIO30", + MTK_EINT_FUNCTION(0, 30), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO30"), + MTK_FUNCTION(1, "PWM_2"), + MTK_FUNCTION(2, "CLKM0"), + MTK_FUNCTION(3, "GPS_L1_ELNA_EN"), + MTK_FUNCTION(4, "I2S7_MCK"), + MTK_FUNCTION(5, "I2S9_MCK"), + MTK_FUNCTION(6, "SPINOR_IO3") + ), + MTK_PIN( + 31, "GPIO31", + MTK_EINT_FUNCTION(0, 31), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO31"), + MTK_FUNCTION(1, "I2S3_MCK"), + MTK_FUNCTION(2, "I2S1_MCK"), + MTK_FUNCTION(3, "I2S5_MCK"), + MTK_FUNCTION(4, "SRCLKENAI0"), + MTK_FUNCTION(5, "I2S0_MCK") + ), + MTK_PIN( + 32, "GPIO32", + MTK_EINT_FUNCTION(0, 32), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO32"), + MTK_FUNCTION(1, "I2S3_BCK"), + MTK_FUNCTION(2, "I2S1_BCK"), + MTK_FUNCTION(3, "I2S5_BCK"), + MTK_FUNCTION(4, "PCM0_CLK"), + MTK_FUNCTION(5, "I2S0_BCK") + ), + MTK_PIN( + 33, "GPIO33", + MTK_EINT_FUNCTION(0, 33), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO33"), + MTK_FUNCTION(1, "I2S3_LRCK"), + MTK_FUNCTION(2, "I2S1_LRCK"), + MTK_FUNCTION(3, "I2S5_LRCK"), + MTK_FUNCTION(4, "PCM0_SYNC"), + MTK_FUNCTION(5, "I2S0_LRCK") + ), + MTK_PIN( + 34, "GPIO34", + MTK_EINT_FUNCTION(0, 34), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO34"), + MTK_FUNCTION(1, "I2S0_DI"), + MTK_FUNCTION(2, "I2S2_DI"), + MTK_FUNCTION(3, "I2S2_DI2"), + MTK_FUNCTION(4, "PCM0_DI"), + MTK_FUNCTION(5, "I2S0_DI") + ), + MTK_PIN( + 35, "GPIO35", + MTK_EINT_FUNCTION(0, 35), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO35"), + MTK_FUNCTION(1, "I2S3_DO"), + MTK_FUNCTION(2, "I2S1_DO"), + MTK_FUNCTION(3, "I2S5_DO"), + MTK_FUNCTION(4, "PCM0_DO") + ), + MTK_PIN( + 36, "GPIO36", + MTK_EINT_FUNCTION(0, 36), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO36"), + MTK_FUNCTION(1, "SPI5_A_CLK"), + MTK_FUNCTION(2, "DMIC1_CLK"), + MTK_FUNCTION(4, "MD_URXD0"), + MTK_FUNCTION(5, "UCTS0"), + MTK_FUNCTION(6, "URXD1") + ), + MTK_PIN( + 37, "GPIO37", + MTK_EINT_FUNCTION(0, 37), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO37"), + MTK_FUNCTION(1, "SPI5_A_CSB"), + MTK_FUNCTION(2, "DMIC1_DAT"), + MTK_FUNCTION(4, "MD_UTXD0"), + MTK_FUNCTION(5, "URTS0"), + MTK_FUNCTION(6, "UTXD1") + ), + MTK_PIN( + 38, "GPIO38", + MTK_EINT_FUNCTION(0, 38), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO38"), + MTK_FUNCTION(1, "SPI5_A_MI"), + MTK_FUNCTION(2, "DMIC_CLK"), + MTK_FUNCTION(4, "MD_URXD1"), + MTK_FUNCTION(5, "URXD0"), + MTK_FUNCTION(6, "UCTS1") + ), + MTK_PIN( + 39, "GPIO39", + MTK_EINT_FUNCTION(0, 39), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO39"), + MTK_FUNCTION(1, "SPI5_A_MO"), + MTK_FUNCTION(2, "DMIC_DAT"), + MTK_FUNCTION(4, "MD_UTXD1"), + MTK_FUNCTION(5, "UTXD0"), + MTK_FUNCTION(6, "URTS1") + ), + MTK_PIN( + 40, "GPIO40", + MTK_EINT_FUNCTION(0, 40), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO40"), + MTK_FUNCTION(1, "DISP_PWM"), + MTK_FUNCTION(7, "DBG_MON_A6") + ), + MTK_PIN( + 41, "GPIO41", + MTK_EINT_FUNCTION(0, 41), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO41"), + MTK_FUNCTION(1, "DSI_TE"), + MTK_FUNCTION(7, "DBG_MON_A7") + ), + MTK_PIN( + 42, "GPIO42", + MTK_EINT_FUNCTION(0, 42), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO42"), + MTK_FUNCTION(1, "LCM_RST"), + MTK_FUNCTION(7, "DBG_MON_A8") + ), + MTK_PIN( + 43, "GPIO43", + MTK_EINT_FUNCTION(0, 43), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO43"), + MTK_FUNCTION(1, "MD_INT1_C2K_UIM0_HOT_PLUG"), + MTK_FUNCTION(2, "MD_INT2_C2K_UIM1_HOT_PLUG"), + MTK_FUNCTION(3, "SCL_6306"), + MTK_FUNCTION(4, "ADSP_URXD0"), + MTK_FUNCTION(5, "PTA_RXD"), + MTK_FUNCTION(6, "SSPM_URXD_AO"), + MTK_FUNCTION(7, "DBG_MON_B0") + ), + MTK_PIN( + 44, "GPIO44", + MTK_EINT_FUNCTION(0, 44), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO44"), + MTK_FUNCTION(1, "MD_INT2_C2K_UIM1_HOT_PLUG"), + MTK_FUNCTION(2, "MD_INT1_C2K_UIM0_HOT_PLUG"), + MTK_FUNCTION(3, "SDA_6306"), + MTK_FUNCTION(4, "ADSP_UTXD0"), + MTK_FUNCTION(5, "PTA_TXD"), + MTK_FUNCTION(6, "SSPM_UTXD_AO"), + MTK_FUNCTION(7, "DBG_MON_B1") + ), + MTK_PIN( + 45, "GPIO45", + MTK_EINT_FUNCTION(0, 45), + DRV_GRP0, + MTK_FUNCTION(0, "GPIO45"), + MTK_FUNCTION(1, "MD1_SIM2_SCLK"), + MTK_FUNCTION(2, "MD1_SIM1_SCLK"), + MTK_FUNCTION(3, "MCUPM_JTAG_TDI"), + MTK_FUNCTION(4, "APU_JTAG_TDI"), + MTK_FUNCTION(5, "CCU_JTAG_TDI"), + MTK_FUNCTION(6, "LVTS_SCK"), + MTK_FUNCTION(7, "CONN_DSP_JDI") + ), + MTK_PIN( + 46, "GPIO46", + MTK_EINT_FUNCTION(0, 46), + DRV_GRP0, + MTK_FUNCTION(0, "GPIO46"), + MTK_FUNCTION(1, "MD1_SIM2_SRST"), + MTK_FUNCTION(2, "MD1_SIM1_SRST"), + MTK_FUNCTION(3, "MCUPM_JTAG_TMS"), + MTK_FUNCTION(4, "APU_JTAG_TMS"), + MTK_FUNCTION(5, "CCU_JTAG_TMS"), + MTK_FUNCTION(6, "LVTS_SDI"), + MTK_FUNCTION(7, "CONN_DSP_JMS") + ), + MTK_PIN( + 47, "GPIO47", + MTK_EINT_FUNCTION(0, 47), + DRV_GRP0, + MTK_FUNCTION(0, "GPIO47"), + MTK_FUNCTION(1, "MD1_SIM2_SIO"), + MTK_FUNCTION(2, "MD1_SIM1_SIO"), + MTK_FUNCTION(3, "MCUPM_JTAG_TDO"), + MTK_FUNCTION(4, "APU_JTAG_TDO"), + MTK_FUNCTION(5, "CCU_JTAG_TDO"), + MTK_FUNCTION(6, "LVTS_SCF"), + MTK_FUNCTION(7, "CONN_DSP_JDO") + ), + MTK_PIN( + 48, "GPIO48", + MTK_EINT_FUNCTION(0, 48), + DRV_GRP0, + MTK_FUNCTION(0, "GPIO48"), + MTK_FUNCTION(1, "MD1_SIM1_SIO"), + MTK_FUNCTION(2, "MD1_SIM2_SIO"), + MTK_FUNCTION(3, "MCUPM_JTAG_TRSTN"), + MTK_FUNCTION(4, "APU_JTAG_TRST"), + MTK_FUNCTION(5, "CCU_JTAG_TRST"), + MTK_FUNCTION(6, "LVTS_FOUT"), + MTK_FUNCTION(7, "CONN_DSP_JINTP") + ), + MTK_PIN( + 49, "GPIO49", + MTK_EINT_FUNCTION(0, 49), + DRV_GRP0, + MTK_FUNCTION(0, "GPIO49"), + MTK_FUNCTION(1, "MD1_SIM1_SRST"), + MTK_FUNCTION(2, "MD1_SIM2_SRST"), + MTK_FUNCTION(3, "MCUPM_JTAG_TCK"), + MTK_FUNCTION(4, "APU_JTAG_TCK"), + MTK_FUNCTION(5, "CCU_JTAG_TCK"), + MTK_FUNCTION(6, "LVTS_SDO"), + MTK_FUNCTION(7, "CONN_DSP_JCK") + ), + MTK_PIN( + 50, "GPIO50", + MTK_EINT_FUNCTION(0, 50), + DRV_GRP0, + MTK_FUNCTION(0, "GPIO50"), + MTK_FUNCTION(1, "MD1_SIM1_SCLK"), + MTK_FUNCTION(2, "MD1_SIM2_SCLK"), + MTK_FUNCTION(6, "LVTS_26M") + ), + MTK_PIN( + 51, "GPIO51", + MTK_EINT_FUNCTION(0, 51), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO51"), + MTK_FUNCTION(1, "MSDC1_CLK"), + MTK_FUNCTION(2, "PCM1_CLK"), + MTK_FUNCTION(3, "CONN_DSP_JCK"), + MTK_FUNCTION(4, "UDI_TCK"), + MTK_FUNCTION(5, "IPU_JTAG_TCK"), + MTK_FUNCTION(6, "SSPM_JTAG_TCK"), + MTK_FUNCTION(7, "JTCK_SEL3") + ), + MTK_PIN( + 52, "GPIO52", + MTK_EINT_FUNCTION(0, 52), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO52"), + MTK_FUNCTION(1, "MSDC1_CMD"), + MTK_FUNCTION(2, "PCM1_SYNC"), + MTK_FUNCTION(3, "CONN_DSP_JMS"), + MTK_FUNCTION(4, "UDI_TMS"), + MTK_FUNCTION(5, "IPU_JTAG_TMS"), + MTK_FUNCTION(6, "SSPM_JTAG_TMS"), + MTK_FUNCTION(7, "JTMS_SEL3") + ), + MTK_PIN( + 53, "GPIO53", + MTK_EINT_FUNCTION(0, 53), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO53"), + MTK_FUNCTION(1, "MSDC1_DAT3"), + MTK_FUNCTION(2, "PCM1_DI"), + MTK_FUNCTION(3, "CONN_DSP_JINTP"), + MTK_FUNCTION(4, "CONN_MCU_AICE_TMSC") + ), + MTK_PIN( + 54, "GPIO54", + MTK_EINT_FUNCTION(0, 54), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO54"), + MTK_FUNCTION(1, "MSDC1_DAT0"), + MTK_FUNCTION(2, "PCM1_DO0"), + MTK_FUNCTION(3, "CONN_DSP_JDI"), + MTK_FUNCTION(4, "UDI_TDI"), + MTK_FUNCTION(5, "IPU_JTAG_TDI"), + MTK_FUNCTION(6, "SSPM_JTAG_TDI"), + MTK_FUNCTION(7, "JTDI_SEL3") + ), + MTK_PIN( + 55, "GPIO55", + MTK_EINT_FUNCTION(0, 55), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO55"), + MTK_FUNCTION(1, "MSDC1_DAT2"), + MTK_FUNCTION(2, "PCM1_DO2"), + MTK_FUNCTION(3, "CONN_MCU_AICE_TCKC"), + MTK_FUNCTION(4, "UDI_NTRST"), + MTK_FUNCTION(5, "IPU_JTAG_TRST"), + MTK_FUNCTION(6, "SSPM_JTAG_TRSTN"), + MTK_FUNCTION(7, "JTRSTN_SEL3") + ), + MTK_PIN( + 56, "GPIO56", + MTK_EINT_FUNCTION(0, 56), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO56"), + MTK_FUNCTION(1, "MSDC1_DAT1"), + MTK_FUNCTION(2, "PCM1_DO1"), + MTK_FUNCTION(3, "CONN_DSP_JDO"), + MTK_FUNCTION(4, "UDI_TDO"), + MTK_FUNCTION(5, "IPU_JTAG_TDO"), + MTK_FUNCTION(6, "SSPM_JTAG_TDO"), + MTK_FUNCTION(7, "JTDO_SEL3") + ), + MTK_PIN( + 57, "GPIO57", + MTK_EINT_FUNCTION(0, 57), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO57"), + MTK_FUNCTION(1, "MIPI2_D_SCLK") + ), + MTK_PIN( + 58, "GPIO58", + MTK_EINT_FUNCTION(0, 58), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO58"), + MTK_FUNCTION(1, "MIPI2_D_SDATA") + ), + MTK_PIN( + 59, "GPIO59", + MTK_EINT_FUNCTION(0, 59), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO59"), + MTK_FUNCTION(1, "MIPI_M_SCLK") + ), + MTK_PIN( + 60, "GPIO60", + MTK_EINT_FUNCTION(0, 60), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO60"), + MTK_FUNCTION(1, "MIPI_M_SDATA") + ), + MTK_PIN( + 61, "GPIO61", + MTK_EINT_FUNCTION(0, 61), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO61"), + MTK_FUNCTION(1, "MD_UCNT_A_TGL") + ), + MTK_PIN( + 62, "GPIO62", + MTK_EINT_FUNCTION(0, 62), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO62"), + MTK_FUNCTION(1, "DIGRF_IRQ") + ), + MTK_PIN( + 63, "GPIO63", + MTK_EINT_FUNCTION(0, 63), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO63"), + MTK_FUNCTION(1, "BPI_BUS0"), + MTK_FUNCTION(3, "PCIE_WAKE_N") + ), + MTK_PIN( + 64, "GPIO64", + MTK_EINT_FUNCTION(0, 64), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO64"), + MTK_FUNCTION(1, "BPI_BUS1"), + MTK_FUNCTION(3, "PCIE_PERESET_N") + ), + MTK_PIN( + 65, "GPIO65", + MTK_EINT_FUNCTION(0, 65), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO65"), + MTK_FUNCTION(1, "BPI_BUS2"), + MTK_FUNCTION(3, "PCIE_CLKREQ_N") + ), + MTK_PIN( + 66, "GPIO66", + MTK_EINT_FUNCTION(0, 66), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO66"), + MTK_FUNCTION(1, "BPI_BUS3") + ), + MTK_PIN( + 67, "GPIO67", + MTK_EINT_FUNCTION(0, 67), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO67"), + MTK_FUNCTION(1, "BPI_BUS4") + ), + MTK_PIN( + 68, "GPIO68", + MTK_EINT_FUNCTION(0, 68), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO68"), + MTK_FUNCTION(1, "BPI_BUS5") + ), + MTK_PIN( + 69, "GPIO69", + MTK_EINT_FUNCTION(0, 69), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO69"), + MTK_FUNCTION(1, "BPI_BUS6"), + MTK_FUNCTION(2, "CONN_BPI_BUS6") + ), + MTK_PIN( + 70, "GPIO70", + MTK_EINT_FUNCTION(0, 70), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO70"), + MTK_FUNCTION(1, "BPI_BUS7"), + MTK_FUNCTION(2, "CONN_BPI_BUS7") + ), + MTK_PIN( + 71, "GPIO71", + MTK_EINT_FUNCTION(0, 71), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO71"), + MTK_FUNCTION(1, "BPI_BUS8"), + MTK_FUNCTION(2, "CONN_BPI_BUS8") + ), + MTK_PIN( + 72, "GPIO72", + MTK_EINT_FUNCTION(0, 72), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO72"), + MTK_FUNCTION(1, "BPI_BUS9"), + MTK_FUNCTION(2, "CONN_BPI_BUS9") + ), + MTK_PIN( + 73, "GPIO73", + MTK_EINT_FUNCTION(0, 73), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO73"), + MTK_FUNCTION(1, "BPI_BUS10"), + MTK_FUNCTION(2, "CONN_BPI_BUS10") + ), + MTK_PIN( + 74, "GPIO74", + MTK_EINT_FUNCTION(0, 74), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO74"), + MTK_FUNCTION(1, "BPI_BUS11_OLAT0"), + MTK_FUNCTION(2, "CONN_BPI_BUS11_OLAT0") + ), + MTK_PIN( + 75, "GPIO75", + MTK_EINT_FUNCTION(0, 75), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO75"), + MTK_FUNCTION(1, "BPI_BUS12_OLAT1"), + MTK_FUNCTION(2, "CONN_BPI_BUS12_OLAT1") + ), + MTK_PIN( + 76, "GPIO76", + MTK_EINT_FUNCTION(0, 76), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO76"), + MTK_FUNCTION(1, "BPI_BUS13_OLAT2"), + MTK_FUNCTION(2, "CONN_BPI_BUS13_OLAT2") + ), + MTK_PIN( + 77, "GPIO77", + MTK_EINT_FUNCTION(0, 77), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO77"), + MTK_FUNCTION(1, "BPI_BUS14_OLAT3"), + MTK_FUNCTION(2, "CONN_BPI_BUS14_OLAT3") + ), + MTK_PIN( + 78, "GPIO78", + MTK_EINT_FUNCTION(0, 78), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO78"), + MTK_FUNCTION(1, "BPI_BUS15_OLAT4"), + MTK_FUNCTION(2, "CONN_BPI_BUS15_OLAT4") + ), + MTK_PIN( + 79, "GPIO79", + MTK_EINT_FUNCTION(0, 79), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO79"), + MTK_FUNCTION(1, "BPI_BUS16_OLAT5"), + MTK_FUNCTION(2, "CONN_BPI_BUS16_OLAT5") + ), + MTK_PIN( + 80, "GPIO80", + MTK_EINT_FUNCTION(0, 80), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO80"), + MTK_FUNCTION(1, "BPI_BUS17_ANT0"), + MTK_FUNCTION(2, "CONN_BPI_BUS17_ANT0"), + MTK_FUNCTION(3, "PCIE_WAKE_N") + ), + MTK_PIN( + 81, "GPIO81", + MTK_EINT_FUNCTION(0, 81), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO81"), + MTK_FUNCTION(1, "BPI_BUS18_ANT1"), + MTK_FUNCTION(2, "CONN_BPI_BUS18_ANT1"), + MTK_FUNCTION(3, "PCIE_PERESET_N") + ), + MTK_PIN( + 82, "GPIO82", + MTK_EINT_FUNCTION(0, 82), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO82"), + MTK_FUNCTION(1, "BPI_BUS19_ANT2"), + MTK_FUNCTION(2, "CONN_BPI_BUS19_ANT2"), + MTK_FUNCTION(3, "PCIE_CLKREQ_N") + ), + MTK_PIN( + 83, "GPIO83", + MTK_EINT_FUNCTION(0, 83), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO83"), + MTK_FUNCTION(1, "BPI_BUS20_ANT3"), + MTK_FUNCTION(2, "CONN_BPI_BUS20_ANT3") + ), + MTK_PIN( + 84, "GPIO84", + MTK_EINT_FUNCTION(0, 84), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO84"), + MTK_FUNCTION(1, "BPI_BUS21_ANT4"), + MTK_FUNCTION(2, "CONN_BPI_BUS21_ANT4") + ), + MTK_PIN( + 85, "GPIO85", + MTK_EINT_FUNCTION(0, 85), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO85"), + MTK_FUNCTION(1, "MIPI1_D_SCLK"), + MTK_FUNCTION(2, "CONN_MIPI1_SCLK") + ), + MTK_PIN( + 86, "GPIO86", + MTK_EINT_FUNCTION(0, 86), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO86"), + MTK_FUNCTION(1, "MIPI1_D_SDATA"), + MTK_FUNCTION(2, "CONN_MIPI1_SDATA") + ), + MTK_PIN( + 87, "GPIO87", + MTK_EINT_FUNCTION(0, 87), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO87"), + MTK_FUNCTION(1, "MIPI0_D_SCLK"), + MTK_FUNCTION(2, "CONN_MIPI0_SCLK") + ), + MTK_PIN( + 88, "GPIO88", + MTK_EINT_FUNCTION(0, 88), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO88"), + MTK_FUNCTION(1, "MIPI0_D_SDATA"), + MTK_FUNCTION(2, "CONN_MIPI0_SDATA") + ), + MTK_PIN( + 89, "GPIO89", + MTK_EINT_FUNCTION(0, 89), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO89"), + MTK_FUNCTION(1, "SPMI_SCL"), + MTK_FUNCTION(2, "SCL10") + ), + MTK_PIN( + 90, "GPIO90", + MTK_EINT_FUNCTION(0, 90), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO90"), + MTK_FUNCTION(1, "SPMI_SDA"), + MTK_FUNCTION(2, "SDA10") + ), + MTK_PIN( + 91, "GPIO91", + MTK_EINT_FUNCTION(0, 91), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO91"), + MTK_FUNCTION(1, "AP_GOOD") + ), + MTK_PIN( + 92, "GPIO92", + MTK_EINT_FUNCTION(0, 92), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO92"), + MTK_FUNCTION(1, "URXD0"), + MTK_FUNCTION(2, "MD_URXD0"), + MTK_FUNCTION(3, "MD_URXD1"), + MTK_FUNCTION(4, "SSPM_URXD_AO"), + MTK_FUNCTION(5, "CONN_UART0_RXD") + ), + MTK_PIN( + 93, "GPIO93", + MTK_EINT_FUNCTION(0, 93), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO93"), + MTK_FUNCTION(1, "UTXD0"), + MTK_FUNCTION(2, "MD_UTXD0"), + MTK_FUNCTION(3, "MD_UTXD1"), + MTK_FUNCTION(4, "SSPM_UTXD_AO"), + MTK_FUNCTION(5, "CONN_UART0_TXD"), + MTK_FUNCTION(6, "WIFI_TXD") + ), + MTK_PIN( + 94, "GPIO94", + MTK_EINT_FUNCTION(0, 94), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO94"), + MTK_FUNCTION(1, "URXD1"), + MTK_FUNCTION(2, "ADSP_URXD0"), + MTK_FUNCTION(3, "MD32_0_RXD"), + MTK_FUNCTION(4, "SSPM_URXD_AO"), + MTK_FUNCTION(5, "TP_URXD1_AO"), + MTK_FUNCTION(6, "TP_URXD2_AO"), + MTK_FUNCTION(7, "MBISTREADEN_TRIGGER") + ), + MTK_PIN( + 95, "GPIO95", + MTK_EINT_FUNCTION(0, 95), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO95"), + MTK_FUNCTION(1, "UTXD1"), + MTK_FUNCTION(2, "ADSP_UTXD0"), + MTK_FUNCTION(3, "MD32_0_TXD"), + MTK_FUNCTION(4, "SSPM_UTXD_AO"), + MTK_FUNCTION(5, "TP_UTXD1_AO"), + MTK_FUNCTION(6, "TP_UTXD2_AO"), + MTK_FUNCTION(7, "MBISTWRITEEN_TRIGGER") + ), + MTK_PIN( + 96, "GPIO96", + MTK_EINT_FUNCTION(0, 96), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO96"), + MTK_FUNCTION(1, "TDM_LRCK"), + MTK_FUNCTION(2, "I2S7_LRCK"), + MTK_FUNCTION(3, "I2S9_LRCK"), + MTK_FUNCTION(4, "DPI_D0"), + MTK_FUNCTION(5, "ADSP_JTAG0_TDI"), + MTK_FUNCTION(7, "IO_JTAG_TDI") + ), + MTK_PIN( + 97, "GPIO97", + MTK_EINT_FUNCTION(0, 97), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO97"), + MTK_FUNCTION(1, "TDM_BCK"), + MTK_FUNCTION(2, "I2S7_BCK"), + MTK_FUNCTION(3, "I2S9_BCK"), + MTK_FUNCTION(4, "DPI_D1"), + MTK_FUNCTION(5, "ADSP_JTAG0_TRSTN"), + MTK_FUNCTION(7, "IO_JTAG_TRSTN") + ), + MTK_PIN( + 98, "GPIO98", + MTK_EINT_FUNCTION(0, 98), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO98"), + MTK_FUNCTION(1, "TDM_MCK"), + MTK_FUNCTION(2, "I2S7_MCK"), + MTK_FUNCTION(3, "I2S9_MCK"), + MTK_FUNCTION(4, "DPI_D2"), + MTK_FUNCTION(5, "ADSP_JTAG0_TCK"), + MTK_FUNCTION(7, "IO_JTAG_TCK") + ), + MTK_PIN( + 99, "GPIO99", + MTK_EINT_FUNCTION(0, 99), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO99"), + MTK_FUNCTION(1, "TDM_DATA0"), + MTK_FUNCTION(2, "I2S6_DI"), + MTK_FUNCTION(3, "I2S8_DI"), + MTK_FUNCTION(4, "DPI_D3"), + MTK_FUNCTION(5, "ADSP_JTAG0_TDO"), + MTK_FUNCTION(7, "IO_JTAG_TDO") + ), + MTK_PIN( + 100, "GPIO100", + MTK_EINT_FUNCTION(0, 100), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO100"), + MTK_FUNCTION(1, "TDM_DATA1"), + MTK_FUNCTION(2, "I2S7_DO"), + MTK_FUNCTION(3, "I2S9_DO"), + MTK_FUNCTION(4, "DPI_D4"), + MTK_FUNCTION(5, "ADSP_JTAG0_TMS"), + MTK_FUNCTION(7, "IO_JTAG_TMS") + ), + MTK_PIN( + 101, "GPIO101", + MTK_EINT_FUNCTION(0, 101), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO101"), + MTK_FUNCTION(1, "TDM_DATA2"), + MTK_FUNCTION(2, "DMIC1_CLK"), + MTK_FUNCTION(3, "SRCLKENAI0"), + MTK_FUNCTION(4, "DPI_D5"), + MTK_FUNCTION(5, "CLKM0"), + MTK_FUNCTION(7, "DAP_MD32_SWD") + ), + MTK_PIN( + 102, "GPIO102", + MTK_EINT_FUNCTION(0, 102), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO102"), + MTK_FUNCTION(1, "TDM_DATA3"), + MTK_FUNCTION(2, "DMIC1_DAT"), + MTK_FUNCTION(3, "SRCLKENAI1"), + MTK_FUNCTION(4, "DPI_D6"), + MTK_FUNCTION(6, "DVFSRC_EXT_REQ"), + MTK_FUNCTION(7, "DAP_MD32_SWCK") + ), + MTK_PIN( + 103, "GPIO103", + MTK_EINT_FUNCTION(0, 103), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO103"), + MTK_FUNCTION(1, "SPI0_A_MI"), + MTK_FUNCTION(2, "SCP_SPI0_MI"), + MTK_FUNCTION(4, "DPI_D7"), + MTK_FUNCTION(5, "DFD_TDO"), + MTK_FUNCTION(6, "SPM_JTAG_TDO"), + MTK_FUNCTION(7, "JTDO_SEL1") + ), + MTK_PIN( + 104, "GPIO104", + MTK_EINT_FUNCTION(0, 104), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO104"), + MTK_FUNCTION(1, "SPI0_A_CSB"), + MTK_FUNCTION(2, "SCP_SPI0_CS"), + MTK_FUNCTION(4, "DPI_D8"), + MTK_FUNCTION(5, "DFD_TMS"), + MTK_FUNCTION(6, "SPM_JTAG_TMS"), + MTK_FUNCTION(7, "JTMS_SEL1") + ), + MTK_PIN( + 105, "GPIO105", + MTK_EINT_FUNCTION(0, 105), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO105"), + MTK_FUNCTION(1, "SPI0_A_MO"), + MTK_FUNCTION(2, "SCP_SPI0_MO"), + MTK_FUNCTION(3, "SCP_SDA0"), + MTK_FUNCTION(4, "DPI_D9"), + MTK_FUNCTION(5, "DFD_TDI"), + MTK_FUNCTION(6, "SPM_JTAG_TDI"), + MTK_FUNCTION(7, "JTDI_SEL1") + ), + MTK_PIN( + 106, "GPIO106", + MTK_EINT_FUNCTION(0, 106), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO106"), + MTK_FUNCTION(1, "SPI0_A_CLK"), + MTK_FUNCTION(2, "SCP_SPI0_CK"), + MTK_FUNCTION(3, "SCP_SCL0"), + MTK_FUNCTION(4, "DPI_D10"), + MTK_FUNCTION(5, "DFD_TCK_XI"), + MTK_FUNCTION(6, "SPM_JTAG_TCK"), + MTK_FUNCTION(7, "JTCK_SEL1") + ), + MTK_PIN( + 107, "GPIO107", + MTK_EINT_FUNCTION(0, 107), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO107"), + MTK_FUNCTION(1, "DMIC_CLK"), + MTK_FUNCTION(2, "PWM_0"), + MTK_FUNCTION(3, "CLKM2"), + MTK_FUNCTION(6, "SPM_JTAG_TRSTN"), + MTK_FUNCTION(7, "JTRSTN_SEL1") + ), + MTK_PIN( + 108, "GPIO108", + MTK_EINT_FUNCTION(0, 108), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO108"), + MTK_FUNCTION(1, "DMIC_DAT"), + MTK_FUNCTION(2, "PWM_1"), + MTK_FUNCTION(3, "CLKM3"), + MTK_FUNCTION(7, "DAP_SONIC_SWD") + ), + MTK_PIN( + 109, "GPIO109", + MTK_EINT_FUNCTION(0, 109), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO109"), + MTK_FUNCTION(1, "I2S1_MCK"), + MTK_FUNCTION(2, "I2S3_MCK"), + MTK_FUNCTION(3, "I2S2_MCK"), + MTK_FUNCTION(4, "DPI_DE"), + MTK_FUNCTION(5, "I2S2_MCK"), + MTK_FUNCTION(6, "SRCLKENAI0"), + MTK_FUNCTION(7, "DAP_SONIC_SWCK") + ), + MTK_PIN( + 110, "GPIO110", + MTK_EINT_FUNCTION(0, 110), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO110"), + MTK_FUNCTION(1, "I2S1_BCK"), + MTK_FUNCTION(2, "I2S3_BCK"), + MTK_FUNCTION(3, "I2S2_BCK"), + MTK_FUNCTION(4, "DPI_D11"), + MTK_FUNCTION(5, "I2S2_BCK"), + MTK_FUNCTION(6, "CONN_MCU_TDO") + ), + MTK_PIN( + 111, "GPIO111", + MTK_EINT_FUNCTION(0, 111), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO111"), + MTK_FUNCTION(1, "I2S1_LRCK"), + MTK_FUNCTION(2, "I2S3_LRCK"), + MTK_FUNCTION(3, "I2S2_LRCK"), + MTK_FUNCTION(4, "DPI_VSYNC"), + MTK_FUNCTION(5, "I2S2_LRCK"), + MTK_FUNCTION(6, "CONN_MCU_TDI") + ), + MTK_PIN( + 112, "GPIO112", + MTK_EINT_FUNCTION(0, 112), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO112"), + MTK_FUNCTION(1, "I2S2_DI"), + MTK_FUNCTION(2, "I2S0_DI"), + MTK_FUNCTION(3, "I2S2_DI2"), + MTK_FUNCTION(4, "DPI_CK"), + MTK_FUNCTION(5, "I2S2_DI"), + MTK_FUNCTION(6, "CONN_MCU_TMS") + ), + MTK_PIN( + 113, "GPIO113", + MTK_EINT_FUNCTION(0, 113), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO113"), + MTK_FUNCTION(1, "I2S1_DO"), + MTK_FUNCTION(2, "I2S3_DO"), + MTK_FUNCTION(3, "I2S5_DO"), + MTK_FUNCTION(4, "DPI_HSYNC"), + MTK_FUNCTION(5, "I2S2_DI2"), + MTK_FUNCTION(6, "CONN_MCU_TCK") + ), + MTK_PIN( + 114, "GPIO114", + MTK_EINT_FUNCTION(0, 114), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO114"), + MTK_FUNCTION(1, "SPI2_MI"), + MTK_FUNCTION(2, "SCP_SPI2_MI"), + MTK_FUNCTION(4, "PCM0_DI"), + MTK_FUNCTION(6, "CONN_MCU_TRST_B") + ), + MTK_PIN( + 115, "GPIO115", + MTK_EINT_FUNCTION(0, 115), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO115"), + MTK_FUNCTION(1, "SPI2_CSB"), + MTK_FUNCTION(2, "SCP_SPI2_CS"), + MTK_FUNCTION(4, "PCM0_SYNC"), + MTK_FUNCTION(6, "CONN_MCU_DBGI_N") + ), + MTK_PIN( + 116, "GPIO116", + MTK_EINT_FUNCTION(0, 116), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO116"), + MTK_FUNCTION(1, "SPI2_MO"), + MTK_FUNCTION(2, "SCP_SPI2_MO"), + MTK_FUNCTION(3, "SCP_SDA1"), + MTK_FUNCTION(4, "PCM0_DO"), + MTK_FUNCTION(6, "CONN_MCU_DBGACK_N") + ), + MTK_PIN( + 117, "GPIO117", + MTK_EINT_FUNCTION(0, 117), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO117"), + MTK_FUNCTION(1, "SPI2_CLK"), + MTK_FUNCTION(2, "SCP_SPI2_CK"), + MTK_FUNCTION(3, "SCP_SCL1"), + MTK_FUNCTION(4, "PCM0_CLK") + ), + MTK_PIN( + 118, "GPIO118", + MTK_EINT_FUNCTION(0, 118), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO118"), + MTK_FUNCTION(1, "SCL1"), + MTK_FUNCTION(2, "SCP_SCL0"), + MTK_FUNCTION(3, "SCP_SCL1") + ), + MTK_PIN( + 119, "GPIO119", + MTK_EINT_FUNCTION(0, 119), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO119"), + MTK_FUNCTION(1, "SDA1"), + MTK_FUNCTION(2, "SCP_SDA0"), + MTK_FUNCTION(3, "SCP_SDA1") + ), + MTK_PIN( + 120, "GPIO120", + MTK_EINT_FUNCTION(0, 120), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO120"), + MTK_FUNCTION(1, "SCL9"), + MTK_FUNCTION(2, "SCP_SCL0") + ), + MTK_PIN( + 121, "GPIO121", + MTK_EINT_FUNCTION(0, 121), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO121"), + MTK_FUNCTION(1, "SDA9"), + MTK_FUNCTION(2, "SCP_SDA0") + ), + MTK_PIN( + 122, "GPIO122", + MTK_EINT_FUNCTION(0, 122), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO122"), + MTK_FUNCTION(1, "SCL8"), + MTK_FUNCTION(2, "SCP_SDA0") + ), + MTK_PIN( + 123, "GPIO123", + MTK_EINT_FUNCTION(0, 123), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO123"), + MTK_FUNCTION(1, "SDA8"), + MTK_FUNCTION(2, "SCP_SCL0") + ), + MTK_PIN( + 124, "GPIO124", + MTK_EINT_FUNCTION(0, 124), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO124"), + MTK_FUNCTION(1, "SCL7"), + MTK_FUNCTION(2, "DMIC1_CLK") + ), + MTK_PIN( + 125, "GPIO125", + MTK_EINT_FUNCTION(0, 125), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO125"), + MTK_FUNCTION(1, "SDA7"), + MTK_FUNCTION(2, "DMIC1_DAT") + ), + MTK_PIN( + 126, "GPIO126", + MTK_EINT_FUNCTION(0, 126), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO126"), + MTK_FUNCTION(1, "CMFLASH0"), + MTK_FUNCTION(2, "PWM_2"), + MTK_FUNCTION(3, "TP_UCTS1_AO"), + MTK_FUNCTION(4, "UCTS0"), + MTK_FUNCTION(5, "SCL11"), + MTK_FUNCTION(6, "GPS_L1_ELNA_EN"), + MTK_FUNCTION(7, "DBG_MON_A14") + ), + MTK_PIN( + 127, "GPIO127", + MTK_EINT_FUNCTION(0, 127), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO127"), + MTK_FUNCTION(1, "CMFLASH1"), + MTK_FUNCTION(2, "PWM_3"), + MTK_FUNCTION(3, "TP_URTS1_AO"), + MTK_FUNCTION(4, "URTS0"), + MTK_FUNCTION(5, "SDA11"), + MTK_FUNCTION(7, "DBG_MON_A15") + ), + MTK_PIN( + 128, "GPIO128", + MTK_EINT_FUNCTION(0, 128), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO128"), + MTK_FUNCTION(1, "CMFLASH2"), + MTK_FUNCTION(2, "PWM_0"), + MTK_FUNCTION(3, "TP_UCTS2_AO"), + MTK_FUNCTION(4, "UCTS1"), + MTK_FUNCTION(5, "SCL_6306"), + MTK_FUNCTION(7, "DBG_MON_A16") + ), + MTK_PIN( + 129, "GPIO129", + MTK_EINT_FUNCTION(0, 129), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO129"), + MTK_FUNCTION(1, "CMFLASH3"), + MTK_FUNCTION(2, "PWM_1"), + MTK_FUNCTION(3, "TP_URTS2_AO"), + MTK_FUNCTION(4, "URTS1"), + MTK_FUNCTION(5, "SDA_6306"), + MTK_FUNCTION(7, "DBG_MON_A17") + ), + MTK_PIN( + 130, "GPIO130", + MTK_EINT_FUNCTION(0, 130), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO130"), + MTK_FUNCTION(1, "CMVREF0"), + MTK_FUNCTION(2, "ANT_SEL10"), + MTK_FUNCTION(3, "SCP_JTAG0_TDO"), + MTK_FUNCTION(4, "MD32_0_JTAG_TDO"), + MTK_FUNCTION(5, "SCL11"), + MTK_FUNCTION(6, "SPI5_B_CLK"), + MTK_FUNCTION(7, "DBG_MON_A22") + ), + MTK_PIN( + 131, "GPIO131", + MTK_EINT_FUNCTION(0, 131), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO131"), + MTK_FUNCTION(1, "CMVREF1"), + MTK_FUNCTION(2, "ANT_SEL11"), + MTK_FUNCTION(3, "SCP_JTAG0_TDI"), + MTK_FUNCTION(4, "MD32_0_JTAG_TDI"), + MTK_FUNCTION(5, "SDA11"), + MTK_FUNCTION(6, "SPI5_B_MO"), + MTK_FUNCTION(7, "DBG_MON_A25") + ), + MTK_PIN( + 132, "GPIO132", + MTK_EINT_FUNCTION(0, 132), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO132"), + MTK_FUNCTION(1, "CMVREF2"), + MTK_FUNCTION(2, "ANT_SEL12"), + MTK_FUNCTION(3, "SCP_JTAG0_TMS"), + MTK_FUNCTION(4, "MD32_0_JTAG_TMS"), + MTK_FUNCTION(7, "DBG_MON_A28") + ), + MTK_PIN( + 133, "GPIO133", + MTK_EINT_FUNCTION(0, 133), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO133"), + MTK_FUNCTION(1, "CMVREF3"), + MTK_FUNCTION(2, "GPS_L1_ELNA_EN"), + MTK_FUNCTION(3, "SCP_JTAG0_TCK"), + MTK_FUNCTION(4, "MD32_0_JTAG_TCK"), + MTK_FUNCTION(6, "SPI5_B_CSB"), + MTK_FUNCTION(7, "DBG_MON_A23") + ), + MTK_PIN( + 134, "GPIO134", + MTK_EINT_FUNCTION(0, 134), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO134"), + MTK_FUNCTION(1, "CMVREF4"), + MTK_FUNCTION(3, "SCP_JTAG0_TRSTN"), + MTK_FUNCTION(4, "MD32_0_JTAG_TRST"), + MTK_FUNCTION(7, "DBG_MON_A26") + ), + MTK_PIN( + 135, "GPIO135", + MTK_EINT_FUNCTION(0, 135), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO135"), + MTK_FUNCTION(1, "PWM_0"), + MTK_FUNCTION(2, "SRCLKENAI1"), + MTK_FUNCTION(3, "MD_URXD0"), + MTK_FUNCTION(4, "MD32_0_RXD"), + MTK_FUNCTION(5, "CONN_TCXOENA_REQ"), + MTK_FUNCTION(7, "DBG_MON_A29") + ), + MTK_PIN( + 136, "GPIO136", + MTK_EINT_FUNCTION(0, 136), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO136"), + MTK_FUNCTION(1, "CMMCLK3"), + MTK_FUNCTION(2, "CLKM1"), + MTK_FUNCTION(3, "MD_UTXD0"), + MTK_FUNCTION(4, "MD32_0_TXD"), + MTK_FUNCTION(6, "SPI5_B_MI"), + MTK_FUNCTION(7, "DBG_MON_A24") + ), + MTK_PIN( + 137, "GPIO137", + MTK_EINT_FUNCTION(0, 137), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO137"), + MTK_FUNCTION(1, "CMMCLK4"), + MTK_FUNCTION(2, "CLKM2"), + MTK_FUNCTION(3, "MD_URXD1"), + MTK_FUNCTION(6, "CONN_UART0_RXD"), + MTK_FUNCTION(7, "DBG_MON_A27") + ), + MTK_PIN( + 138, "GPIO138", + MTK_EINT_FUNCTION(0, 138), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO138"), + MTK_FUNCTION(1, "CMMCLK5"), + MTK_FUNCTION(2, "CLKM3"), + MTK_FUNCTION(3, "MD_UTXD1"), + MTK_FUNCTION(6, "CONN_UART0_TXD"), + MTK_FUNCTION(7, "DBG_MON_A30") + ), + MTK_PIN( + 139, "GPIO139", + MTK_EINT_FUNCTION(0, 139), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO139"), + MTK_FUNCTION(1, "SCL4"), + MTK_FUNCTION(7, "DBG_MON_A21") + ), + MTK_PIN( + 140, "GPIO140", + MTK_EINT_FUNCTION(0, 140), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO140"), + MTK_FUNCTION(1, "SDA4"), + MTK_FUNCTION(7, "DBG_MON_A20") + ), + MTK_PIN( + 141, "GPIO141", + MTK_EINT_FUNCTION(0, 141), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO141"), + MTK_FUNCTION(1, "SCL2"), + MTK_FUNCTION(7, "DBG_MON_A18") + ), + MTK_PIN( + 142, "GPIO142", + MTK_EINT_FUNCTION(0, 142), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO142"), + MTK_FUNCTION(1, "SDA2"), + MTK_FUNCTION(7, "DBG_MON_A19") + ), + MTK_PIN( + 143, "GPIO143", + MTK_EINT_FUNCTION(0, 143), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO143"), + MTK_FUNCTION(1, "CMVREF0"), + MTK_FUNCTION(2, "SPI3_CLK"), + MTK_FUNCTION(3, "ADSP_JTAG1_TDO"), + MTK_FUNCTION(4, "SCP_JTAG1_TDO"), + MTK_FUNCTION(7, "DBG_MON_A31") + ), + MTK_PIN( + 144, "GPIO144", + MTK_EINT_FUNCTION(0, 144), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO144"), + MTK_FUNCTION(1, "CMVREF1"), + MTK_FUNCTION(2, "SPI3_CSB"), + MTK_FUNCTION(3, "ADSP_JTAG1_TDI"), + MTK_FUNCTION(4, "SCP_JTAG1_TDI") + ), + MTK_PIN( + 145, "GPIO145", + MTK_EINT_FUNCTION(0, 145), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO145"), + MTK_FUNCTION(1, "CMVREF2"), + MTK_FUNCTION(2, "SPI3_MI"), + MTK_FUNCTION(3, "ADSP_JTAG1_TMS"), + MTK_FUNCTION(4, "SCP_JTAG1_TMS") + ), + MTK_PIN( + 146, "GPIO146", + MTK_EINT_FUNCTION(0, 146), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO146"), + MTK_FUNCTION(1, "CMVREF3"), + MTK_FUNCTION(2, "SPI3_MO"), + MTK_FUNCTION(3, "ADSP_JTAG1_TCK"), + MTK_FUNCTION(4, "SCP_JTAG1_TCK"), + MTK_FUNCTION(7, "DBG_MON_A32") + ), + MTK_PIN( + 147, "GPIO147", + MTK_EINT_FUNCTION(0, 147), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO147"), + MTK_FUNCTION(1, "CMVREF4"), + MTK_FUNCTION(2, "EXT_FRAME_SYNC"), + MTK_FUNCTION(3, "ADSP_JTAG1_TRSTN"), + MTK_FUNCTION(4, "SCP_JTAG1_TRSTN") + ), + MTK_PIN( + 148, "GPIO148", + MTK_EINT_FUNCTION(0, 148), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO148"), + MTK_FUNCTION(1, "PWM_1"), + MTK_FUNCTION(2, "AGPS_SYNC"), + MTK_FUNCTION(3, "CMMCLK5") + ), + MTK_PIN( + 149, "GPIO149", + MTK_EINT_FUNCTION(0, 149), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO149"), + MTK_FUNCTION(1, "CMMCLK0"), + MTK_FUNCTION(2, "CLKM0"), + MTK_FUNCTION(3, "MD32_0_GPIO0") + ), + MTK_PIN( + 150, "GPIO150", + MTK_EINT_FUNCTION(0, 150), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO150"), + MTK_FUNCTION(1, "CMMCLK1"), + MTK_FUNCTION(2, "CLKM1"), + MTK_FUNCTION(3, "MD32_0_GPIO1"), + MTK_FUNCTION(7, "CONN_MCU_AICE_TMSC") + ), + MTK_PIN( + 151, "GPIO151", + MTK_EINT_FUNCTION(0, 151), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO151"), + MTK_FUNCTION(1, "CMMCLK2"), + MTK_FUNCTION(2, "CLKM2"), + MTK_FUNCTION(3, "MD32_0_GPIO2"), + MTK_FUNCTION(7, "CONN_MCU_AICE_TCKC") + ), + MTK_PIN( + 152, "GPIO152", + MTK_EINT_FUNCTION(0, 152), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO152"), + MTK_FUNCTION(1, "KPROW1"), + MTK_FUNCTION(2, "PWM_2"), + MTK_FUNCTION(3, "IDDIG"), + MTK_FUNCTION(6, "MBISTREADEN_TRIGGER"), + MTK_FUNCTION(7, "DBG_MON_B9") + ), + MTK_PIN( + 153, "GPIO153", + MTK_EINT_FUNCTION(0, 153), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO153"), + MTK_FUNCTION(1, "KPROW0"), + MTK_FUNCTION(7, "DBG_MON_B8") + ), + MTK_PIN( + 154, "GPIO154", + MTK_EINT_FUNCTION(0, 154), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO154"), + MTK_FUNCTION(1, "KPCOL0"), + MTK_FUNCTION(7, "DBG_MON_B6") + ), + MTK_PIN( + 155, "GPIO155", + MTK_EINT_FUNCTION(0, 155), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO155"), + MTK_FUNCTION(1, "KPCOL1"), + MTK_FUNCTION(2, "PWM_3"), + MTK_FUNCTION(3, "USB_DRVVBUS"), + MTK_FUNCTION(4, "CONN_TCXOENA_REQ"), + MTK_FUNCTION(6, "MBISTWRITEEN_TRIGGER"), + MTK_FUNCTION(7, "DBG_MON_B7") + ), + MTK_PIN( + 156, "GPIO156", + MTK_EINT_FUNCTION(0, 156), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO156"), + MTK_FUNCTION(1, "SPI1_A_CLK"), + MTK_FUNCTION(2, "SCP_SPI1_A_CK"), + MTK_FUNCTION(3, "MRG_CLK"), + MTK_FUNCTION(4, "AGPS_SYNC"), + MTK_FUNCTION(5, "MD_URXD0"), + MTK_FUNCTION(6, "UDI_TMS"), + MTK_FUNCTION(7, "DBG_MON_B10") + ), + MTK_PIN( + 157, "GPIO157", + MTK_EINT_FUNCTION(0, 157), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO157"), + MTK_FUNCTION(1, "SPI1_A_CSB"), + MTK_FUNCTION(2, "SCP_SPI1_A_CS"), + MTK_FUNCTION(3, "MRG_SYNC"), + MTK_FUNCTION(4, "EXT_FRAME_SYNC"), + MTK_FUNCTION(5, "MD_UTXD0"), + MTK_FUNCTION(6, "UDI_TCK"), + MTK_FUNCTION(7, "DBG_MON_B11") + ), + MTK_PIN( + 158, "GPIO158", + MTK_EINT_FUNCTION(0, 158), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO158"), + MTK_FUNCTION(1, "SPI1_A_MI"), + MTK_FUNCTION(2, "SCP_SPI1_A_MI"), + MTK_FUNCTION(3, "MRG_DI"), + MTK_FUNCTION(4, "PTA_RXD"), + MTK_FUNCTION(5, "MD_URXD1"), + MTK_FUNCTION(6, "UDI_TDO"), + MTK_FUNCTION(7, "DBG_MON_B12") + ), + MTK_PIN( + 159, "GPIO159", + MTK_EINT_FUNCTION(0, 159), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO159"), + MTK_FUNCTION(1, "SPI1_A_MO"), + MTK_FUNCTION(2, "SCP_SPI1_A_MO"), + MTK_FUNCTION(3, "MRG_DO"), + MTK_FUNCTION(4, "PTA_TXD"), + MTK_FUNCTION(5, "MD_UTXD1"), + MTK_FUNCTION(6, "UDI_NTRST"), + MTK_FUNCTION(7, "DBG_MON_B13") + ), + MTK_PIN( + 160, "GPIO160", + MTK_EINT_FUNCTION(0, 160), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO160"), + MTK_FUNCTION(1, "SCL3"), + MTK_FUNCTION(3, "SCP_SCL1"), + MTK_FUNCTION(7, "DBG_MON_B14") + ), + MTK_PIN( + 161, "GPIO161", + MTK_EINT_FUNCTION(0, 161), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO161"), + MTK_FUNCTION(1, "SDA3"), + MTK_FUNCTION(3, "SCP_SDA1"), + MTK_FUNCTION(7, "DBG_MON_B15") + ), + MTK_PIN( + 162, "GPIO162", + MTK_EINT_FUNCTION(0, 162), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO162"), + MTK_FUNCTION(1, "ANT_SEL0"), + MTK_FUNCTION(2, "GPS_L1_ELNA_EN"), + MTK_FUNCTION(6, "UDI_TDI"), + MTK_FUNCTION(7, "DBG_MON_B16") + ), + MTK_PIN( + 163, "GPIO163", + MTK_EINT_FUNCTION(0, 163), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO163"), + MTK_FUNCTION(1, "ANT_SEL1"), + MTK_FUNCTION(2, "CONN_TCXOENA_REQ"), + MTK_FUNCTION(7, "DBG_MON_B17") + ), + MTK_PIN( + 164, "GPIO164", + MTK_EINT_FUNCTION(0, 164), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO164"), + MTK_FUNCTION(1, "ANT_SEL2"), + MTK_FUNCTION(2, "SCP_SPI1_B_CK"), + MTK_FUNCTION(3, "TP_URXD1_AO"), + MTK_FUNCTION(5, "UCTS0"), + MTK_FUNCTION(7, "DBG_MON_B18") + ), + MTK_PIN( + 165, "GPIO165", + MTK_EINT_FUNCTION(0, 165), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO165"), + MTK_FUNCTION(1, "ANT_SEL3"), + MTK_FUNCTION(2, "SCP_SPI1_B_CS"), + MTK_FUNCTION(3, "TP_UTXD1_AO"), + MTK_FUNCTION(4, "CONN_TCXOENA_REQ"), + MTK_FUNCTION(5, "URTS0"), + MTK_FUNCTION(7, "DBG_MON_B19") + ), + MTK_PIN( + 166, "GPIO166", + MTK_EINT_FUNCTION(0, 166), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO166"), + MTK_FUNCTION(1, "ANT_SEL4"), + MTK_FUNCTION(2, "SCP_SPI1_B_MI"), + MTK_FUNCTION(3, "TP_URXD2_AO"), + MTK_FUNCTION(4, "SRCLKENAI1"), + MTK_FUNCTION(5, "UCTS1"), + MTK_FUNCTION(7, "DBG_MON_B20") + ), + MTK_PIN( + 167, "GPIO167", + MTK_EINT_FUNCTION(0, 167), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO167"), + MTK_FUNCTION(1, "ANT_SEL5"), + MTK_FUNCTION(2, "SCP_SPI1_B_MO"), + MTK_FUNCTION(3, "TP_UTXD2_AO"), + MTK_FUNCTION(4, "SRCLKENAI0"), + MTK_FUNCTION(5, "URTS1"), + MTK_FUNCTION(7, "DBG_MON_B21") + ), + MTK_PIN( + 168, "GPIO168", + MTK_EINT_FUNCTION(0, 168), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO168"), + MTK_FUNCTION(1, "ANT_SEL6"), + MTK_FUNCTION(2, "SPI0_B_CLK"), + MTK_FUNCTION(3, "TP_UCTS1_AO"), + MTK_FUNCTION(4, "KPCOL2"), + MTK_FUNCTION(5, "MD_UCTS0"), + MTK_FUNCTION(6, "SCL11"), + MTK_FUNCTION(7, "DBG_MON_B22") + ), + MTK_PIN( + 169, "GPIO169", + MTK_EINT_FUNCTION(0, 169), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO169"), + MTK_FUNCTION(1, "ANT_SEL7"), + MTK_FUNCTION(2, "SPI0_B_CSB"), + MTK_FUNCTION(3, "TP_URTS1_AO"), + MTK_FUNCTION(4, "KPROW2"), + MTK_FUNCTION(5, "MD_URTS0"), + MTK_FUNCTION(6, "SDA11"), + MTK_FUNCTION(7, "DBG_MON_B23") + ), + MTK_PIN( + 170, "GPIO170", + MTK_EINT_FUNCTION(0, 170), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO170"), + MTK_FUNCTION(1, "ANT_SEL8"), + MTK_FUNCTION(2, "SPI0_B_MI"), + MTK_FUNCTION(3, "TP_UCTS2_AO"), + MTK_FUNCTION(4, "SRCLKENAI1"), + MTK_FUNCTION(5, "MD_UCTS1"), + MTK_FUNCTION(7, "DBG_MON_B24") + ), + MTK_PIN( + 171, "GPIO171", + MTK_EINT_FUNCTION(0, 171), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO171"), + MTK_FUNCTION(1, "ANT_SEL9"), + MTK_FUNCTION(2, "SPI0_B_MO"), + MTK_FUNCTION(3, "TP_URTS2_AO"), + MTK_FUNCTION(4, "SRCLKENAI0"), + MTK_FUNCTION(5, "MD_URTS1"), + MTK_FUNCTION(7, "DBG_MON_B25") + ), + MTK_PIN( + 172, "GPIO172", + MTK_EINT_FUNCTION(0, 172), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO172"), + MTK_FUNCTION(1, "CONN_TOP_CLK"), + MTK_FUNCTION(2, "AUXIF_CLK0"), + MTK_FUNCTION(7, "DBG_MON_B29") + ), + MTK_PIN( + 173, "GPIO173", + MTK_EINT_FUNCTION(0, 173), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO173"), + MTK_FUNCTION(1, "CONN_TOP_DATA"), + MTK_FUNCTION(2, "AUXIF_ST0"), + MTK_FUNCTION(7, "DBG_MON_B30") + ), + MTK_PIN( + 174, "GPIO174", + MTK_EINT_FUNCTION(0, 174), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO174"), + MTK_FUNCTION(1, "CONN_HRST_B"), + MTK_FUNCTION(7, "DBG_MON_B28") + ), + MTK_PIN( + 175, "GPIO175", + MTK_EINT_FUNCTION(0, 175), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO175"), + MTK_FUNCTION(1, "CONN_WB_PTA"), + MTK_FUNCTION(7, "DBG_MON_B31") + ), + MTK_PIN( + 176, "GPIO176", + MTK_EINT_FUNCTION(0, 176), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO176"), + MTK_FUNCTION(1, "CONN_BT_CLK"), + MTK_FUNCTION(2, "AUXIF_CLK1"), + MTK_FUNCTION(7, "DBG_MON_B26") + ), + MTK_PIN( + 177, "GPIO177", + MTK_EINT_FUNCTION(0, 177), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO177"), + MTK_FUNCTION(1, "CONN_BT_DATA"), + MTK_FUNCTION(2, "AUXIF_ST1"), + MTK_FUNCTION(7, "DBG_MON_B27") + ), + MTK_PIN( + 178, "GPIO178", + MTK_EINT_FUNCTION(0, 178), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO178"), + MTK_FUNCTION(1, "CONN_WF_CTRL0") + ), + MTK_PIN( + 179, "GPIO179", + MTK_EINT_FUNCTION(0, 179), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO179"), + MTK_FUNCTION(1, "CONN_WF_CTRL1"), + MTK_FUNCTION(2, "UFS_MPHY_SCL") + ), + MTK_PIN( + 180, "GPIO180", + MTK_EINT_FUNCTION(0, 180), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO180"), + MTK_FUNCTION(1, "CONN_WF_CTRL2"), + MTK_FUNCTION(2, "UFS_MPHY_SDA") + ), + MTK_PIN( + 181, "GPIO181", + MTK_EINT_FUNCTION(0, 181), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO181"), + MTK_FUNCTION(1, "CONN_WF_CTRL3") + ), + MTK_PIN( + 182, "GPIO182", + MTK_EINT_FUNCTION(0, 182), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO182"), + MTK_FUNCTION(1, "CONN_WF_CTRL4") + ), + MTK_PIN( + 183, "GPIO183", + MTK_EINT_FUNCTION(0, 183), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO183"), + MTK_FUNCTION(1, "MSDC0_CMD") + ), + MTK_PIN( + 184, "GPIO184", + MTK_EINT_FUNCTION(0, 184), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO184"), + MTK_FUNCTION(1, "MSDC0_DAT0") + ), + MTK_PIN( + 185, "GPIO185", + MTK_EINT_FUNCTION(0, 185), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO185"), + MTK_FUNCTION(1, "MSDC0_DAT2") + ), + MTK_PIN( + 186, "GPIO186", + MTK_EINT_FUNCTION(0, 186), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO186"), + MTK_FUNCTION(1, "MSDC0_DAT4") + ), + MTK_PIN( + 187, "GPIO187", + MTK_EINT_FUNCTION(0, 187), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO187"), + MTK_FUNCTION(1, "MSDC0_DAT6") + ), + MTK_PIN( + 188, "GPIO188", + MTK_EINT_FUNCTION(0, 188), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO188"), + MTK_FUNCTION(1, "MSDC0_DAT1") + ), + MTK_PIN( + 189, "GPIO189", + MTK_EINT_FUNCTION(0, 189), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO189"), + MTK_FUNCTION(1, "MSDC0_DAT5") + ), + MTK_PIN( + 190, "GPIO190", + MTK_EINT_FUNCTION(0, 190), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO190"), + MTK_FUNCTION(1, "MSDC0_DAT7") + ), + MTK_PIN( + 191, "GPIO191", + MTK_EINT_FUNCTION(0, 191), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO191"), + MTK_FUNCTION(1, "MSDC0_DSL"), + MTK_FUNCTION(2, "GPS_L1_ELNA_EN"), + MTK_FUNCTION(3, "IDDIG"), + MTK_FUNCTION(4, "DMIC_CLK") + ), + MTK_PIN( + 192, "GPIO192", + MTK_EINT_FUNCTION(0, 192), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO192"), + MTK_FUNCTION(1, "MSDC0_CLK"), + MTK_FUNCTION(3, "USB_DRVVBUS"), + MTK_FUNCTION(4, "DMIC_DAT") + ), + MTK_PIN( + 193, "GPIO193", + MTK_EINT_FUNCTION(0, 193), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO193"), + MTK_FUNCTION(1, "MSDC0_DAT3") + ), + MTK_PIN( + 194, "GPIO194", + MTK_EINT_FUNCTION(0, 194), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO194"), + MTK_FUNCTION(1, "MSDC0_RSTB") + ), + MTK_PIN( + 195, "GPIO195", + MTK_EINT_FUNCTION(0, 195), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO195"), + MTK_FUNCTION(1, "SCP_VREQ_VAO"), + MTK_FUNCTION(2, "DVFSRC_EXT_REQ") + ), + MTK_PIN( + 196, "GPIO196", + MTK_EINT_FUNCTION(0, 196), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO196"), + MTK_FUNCTION(1, "AUD_DAT_MOSI2") + ), + MTK_PIN( + 197, "GPIO197", + MTK_EINT_FUNCTION(0, 197), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO197"), + MTK_FUNCTION(1, "AUD_NLE_MOSI1"), + MTK_FUNCTION(2, "AUD_CLK_MISO"), + MTK_FUNCTION(3, "I2S2_MCK"), + MTK_FUNCTION(4, "I2S6_MCK"), + MTK_FUNCTION(5, "I2S8_MCK") + ), + MTK_PIN( + 198, "GPIO198", + MTK_EINT_FUNCTION(0, 198), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO198"), + MTK_FUNCTION(1, "AUD_NLE_MOSI0"), + MTK_FUNCTION(2, "AUD_SYNC_MISO"), + MTK_FUNCTION(3, "I2S2_BCK"), + MTK_FUNCTION(4, "I2S6_BCK"), + MTK_FUNCTION(5, "I2S8_BCK") + ), + MTK_PIN( + 199, "GPIO199", + MTK_EINT_FUNCTION(0, 199), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO199"), + MTK_FUNCTION(1, "AUD_DAT_MISO2"), + MTK_FUNCTION(3, "I2S2_DI2") + ), + MTK_PIN( + 200, "GPIO200", + MTK_EINT_FUNCTION(0, 200), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO200"), + MTK_FUNCTION(1, "SCL6"), + MTK_FUNCTION(3, "SCP_SCL1"), + MTK_FUNCTION(4, "SCL_6306"), + MTK_FUNCTION(7, "DBG_MON_A4") + ), + MTK_PIN( + 201, "GPIO201", + MTK_EINT_FUNCTION(0, 201), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO201"), + MTK_FUNCTION(1, "SDA6"), + MTK_FUNCTION(3, "SCP_SDA1"), + MTK_FUNCTION(4, "SDA_6306"), + MTK_FUNCTION(7, "DBG_MON_A5") + ), + MTK_PIN( + 202, "GPIO202", + MTK_EINT_FUNCTION(0, 202), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO202"), + MTK_FUNCTION(1, "SCL5") + ), + MTK_PIN( + 203, "GPIO203", + MTK_EINT_FUNCTION(0, 203), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO203"), + MTK_FUNCTION(1, "SDA5") + ), + MTK_PIN( + 204, "GPIO204", + MTK_EINT_FUNCTION(0, 204), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO204"), + MTK_FUNCTION(1, "SCL0"), + MTK_FUNCTION(6, "SPI7_A_CLK"), + MTK_FUNCTION(7, "DBG_MON_A2") + ), + MTK_PIN( + 205, "GPIO205", + MTK_EINT_FUNCTION(0, 205), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO205"), + MTK_FUNCTION(1, "SDA0"), + MTK_FUNCTION(6, "SPI7_A_CSB"), + MTK_FUNCTION(7, "DBG_MON_A3") + ), + MTK_PIN( + 206, "GPIO206", + MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO206"), + MTK_FUNCTION(1, "SRCLKENA0") + ), + MTK_PIN( + 207, "GPIO207", + MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO207"), + MTK_FUNCTION(1, "SRCLKENA1") + ), + MTK_PIN( + 208, "GPIO208", + MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO208"), + MTK_FUNCTION(1, "WATCHDOG") + ), + MTK_PIN( + 209, "GPIO209", + MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO209"), + MTK_FUNCTION(1, "PWRAP_SPI0_MI"), + MTK_FUNCTION(2, "PWRAP_SPI0_MO") + ), + MTK_PIN( + 210, "GPIO210", + MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO210"), + MTK_FUNCTION(1, "PWRAP_SPI0_CSN") + ), + MTK_PIN( + 211, "GPIO211", + MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO211"), + MTK_FUNCTION(1, "PWRAP_SPI0_MO"), + MTK_FUNCTION(2, "PWRAP_SPI0_MI") + ), + MTK_PIN( + 212, "GPIO212", + MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO212"), + MTK_FUNCTION(1, "PWRAP_SPI0_CK") + ), + MTK_PIN( + 213, "GPIO213", + MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO213"), + MTK_FUNCTION(1, "RTC32K_CK") + ), + MTK_PIN( + 214, "GPIO214", + MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO214"), + MTK_FUNCTION(1, "AUD_CLK_MOSI"), + MTK_FUNCTION(3, "I2S1_MCK"), + MTK_FUNCTION(4, "I2S7_MCK"), + MTK_FUNCTION(5, "I2S9_MCK") + ), + MTK_PIN( + 215, "GPIO215", + MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO215"), + MTK_FUNCTION(1, "AUD_SYNC_MOSI"), + MTK_FUNCTION(3, "I2S1_BCK"), + MTK_FUNCTION(4, "I2S7_BCK"), + MTK_FUNCTION(5, "I2S9_BCK") + ), + MTK_PIN( + 216, "GPIO216", + MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO216"), + MTK_FUNCTION(1, "AUD_DAT_MOSI0"), + MTK_FUNCTION(3, "I2S1_LRCK"), + MTK_FUNCTION(4, "I2S7_LRCK"), + MTK_FUNCTION(5, "I2S9_LRCK") + ), + MTK_PIN( + 217, "GPIO217", + MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO217"), + MTK_FUNCTION(1, "AUD_DAT_MOSI1"), + MTK_FUNCTION(3, "I2S1_DO"), + MTK_FUNCTION(4, "I2S7_DO"), + MTK_FUNCTION(5, "I2S9_DO") + ), + MTK_PIN( + 218, "GPIO218", + MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO218"), + MTK_FUNCTION(1, "AUD_DAT_MISO0"), + MTK_FUNCTION(2, "VOW_DAT_MISO"), + MTK_FUNCTION(3, "I2S2_LRCK"), + MTK_FUNCTION(4, "I2S6_LRCK"), + MTK_FUNCTION(5, "I2S8_LRCK") + ), + MTK_PIN( + 219, "GPIO219", + MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO219"), + MTK_FUNCTION(1, "AUD_DAT_MISO1"), + MTK_FUNCTION(2, "VOW_CLK_MISO"), + MTK_FUNCTION(3, "I2S2_DI"), + MTK_FUNCTION(4, "I2S6_DI"), + MTK_FUNCTION(5, "I2S8_DI") + ), + MTK_PIN( + 220, "GPIO220", + MTK_EINT_FUNCTION(0, 208), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO220") + ), + MTK_PIN( + 221, "GPIO221", + MTK_EINT_FUNCTION(0, 209), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO221") + ), + MTK_PIN( + 222, "GPIO222", + MTK_EINT_FUNCTION(0, 210), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO222") + ), + MTK_PIN( + 223, "GPIO223", + MTK_EINT_FUNCTION(0, 211), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO223") + ), + MTK_PIN( + 224, "GPIO224", + MTK_EINT_FUNCTION(0, 212), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO224") + ), + MTK_PIN( + 225, "GPIO225", + MTK_EINT_FUNCTION(0, 214), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO225") + ), + MTK_PIN( + 226, "GPIO226", + MTK_EINT_FUNCTION(0, 215), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO226") + ), + MTK_PIN( + 227, "GPIO227", + MTK_EINT_FUNCTION(0, 216), + DRV_GRP4, + MTK_FUNCTION(0, "GPIO227") + ), +}; + +#endif /* __PINCTRL_MTK_MT8192_H */ From c9fe14ac8bd6c329d84e1f88c1b89cb1d5fb982a Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 18 Aug 2020 19:44:57 -0300 Subject: [PATCH 083/433] serial: fsl_lpuart: Fix typo in "transfer" Fix two occurrences where "transfer" is spelled incorrectly. Signed-off-by: Fabio Estevam Link: https://lore.kernel.org/r/20200818224457.16507-1-festevam@gmail.com Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/fsl_lpuart.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c index 7ca642249224..5a5a22d77841 100644 --- a/drivers/tty/serial/fsl_lpuart.c +++ b/drivers/tty/serial/fsl_lpuart.c @@ -1260,7 +1260,7 @@ static int lpuart_config_rs485(struct uart_port *port, modem |= UARTMODEM_TXRTSE; /* - * RTS needs to be logic HIGH either during transer _or_ after + * RTS needs to be logic HIGH either during transfer _or_ after * transfer, other variants are not supported by the hardware. */ @@ -1311,7 +1311,7 @@ static int lpuart32_config_rs485(struct uart_port *port, modem |= UARTMODEM_TXRTSE; /* - * RTS needs to be logic HIGH either during transer _or_ after + * RTS needs to be logic HIGH either during transfer _or_ after * transfer, other variants are not supported by the hardware. */ From 9cfbf7a6416b5fa2b88ac337d092be82778a0469 Mon Sep 17 00:00:00 2001 From: Alex Dewar Date: Mon, 24 Aug 2020 23:39:33 +0100 Subject: [PATCH 084/433] serial: core: don't use snprintf() for formatting sysfs attrs As per the documentation (Documentation/filesystems/sysfs.rst), snprintf() should not be used for formatting values returned by sysfs. For all of the instances in serial_core.c, we know that the string will be Link: https://lore.kernel.org/r/20200824223932.27709-1-alex.dewar90@gmail.com Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/serial_core.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/drivers/tty/serial/serial_core.c b/drivers/tty/serial/serial_core.c index 3403dd790517..b303a9a44a4e 100644 --- a/drivers/tty/serial/serial_core.c +++ b/drivers/tty/serial/serial_core.c @@ -2637,7 +2637,7 @@ static ssize_t uartclk_show(struct device *dev, struct tty_port *port = dev_get_drvdata(dev); uart_get_info(port, &tmp); - return snprintf(buf, PAGE_SIZE, "%d\n", tmp.baud_base * 16); + return sprintf(buf, "%d\n", tmp.baud_base * 16); } static ssize_t type_show(struct device *dev, @@ -2647,7 +2647,7 @@ static ssize_t type_show(struct device *dev, struct tty_port *port = dev_get_drvdata(dev); uart_get_info(port, &tmp); - return snprintf(buf, PAGE_SIZE, "%d\n", tmp.type); + return sprintf(buf, "%d\n", tmp.type); } static ssize_t line_show(struct device *dev, @@ -2657,7 +2657,7 @@ static ssize_t line_show(struct device *dev, struct tty_port *port = dev_get_drvdata(dev); uart_get_info(port, &tmp); - return snprintf(buf, PAGE_SIZE, "%d\n", tmp.line); + return sprintf(buf, "%d\n", tmp.line); } static ssize_t port_show(struct device *dev, @@ -2671,7 +2671,7 @@ static ssize_t port_show(struct device *dev, ioaddr = tmp.port; if (HIGH_BITS_OFFSET) ioaddr |= (unsigned long)tmp.port_high << HIGH_BITS_OFFSET; - return snprintf(buf, PAGE_SIZE, "0x%lX\n", ioaddr); + return sprintf(buf, "0x%lX\n", ioaddr); } static ssize_t irq_show(struct device *dev, @@ -2681,7 +2681,7 @@ static ssize_t irq_show(struct device *dev, struct tty_port *port = dev_get_drvdata(dev); uart_get_info(port, &tmp); - return snprintf(buf, PAGE_SIZE, "%d\n", tmp.irq); + return sprintf(buf, "%d\n", tmp.irq); } static ssize_t flags_show(struct device *dev, @@ -2691,7 +2691,7 @@ static ssize_t flags_show(struct device *dev, struct tty_port *port = dev_get_drvdata(dev); uart_get_info(port, &tmp); - return snprintf(buf, PAGE_SIZE, "0x%X\n", tmp.flags); + return sprintf(buf, "0x%X\n", tmp.flags); } static ssize_t xmit_fifo_size_show(struct device *dev, @@ -2701,7 +2701,7 @@ static ssize_t xmit_fifo_size_show(struct device *dev, struct tty_port *port = dev_get_drvdata(dev); uart_get_info(port, &tmp); - return snprintf(buf, PAGE_SIZE, "%d\n", tmp.xmit_fifo_size); + return sprintf(buf, "%d\n", tmp.xmit_fifo_size); } static ssize_t close_delay_show(struct device *dev, @@ -2711,7 +2711,7 @@ static ssize_t close_delay_show(struct device *dev, struct tty_port *port = dev_get_drvdata(dev); uart_get_info(port, &tmp); - return snprintf(buf, PAGE_SIZE, "%d\n", tmp.close_delay); + return sprintf(buf, "%d\n", tmp.close_delay); } static ssize_t closing_wait_show(struct device *dev, @@ -2721,7 +2721,7 @@ static ssize_t closing_wait_show(struct device *dev, struct tty_port *port = dev_get_drvdata(dev); uart_get_info(port, &tmp); - return snprintf(buf, PAGE_SIZE, "%d\n", tmp.closing_wait); + return sprintf(buf, "%d\n", tmp.closing_wait); } static ssize_t custom_divisor_show(struct device *dev, @@ -2731,7 +2731,7 @@ static ssize_t custom_divisor_show(struct device *dev, struct tty_port *port = dev_get_drvdata(dev); uart_get_info(port, &tmp); - return snprintf(buf, PAGE_SIZE, "%d\n", tmp.custom_divisor); + return sprintf(buf, "%d\n", tmp.custom_divisor); } static ssize_t io_type_show(struct device *dev, @@ -2741,7 +2741,7 @@ static ssize_t io_type_show(struct device *dev, struct tty_port *port = dev_get_drvdata(dev); uart_get_info(port, &tmp); - return snprintf(buf, PAGE_SIZE, "%d\n", tmp.io_type); + return sprintf(buf, "%d\n", tmp.io_type); } static ssize_t iomem_base_show(struct device *dev, @@ -2751,7 +2751,7 @@ static ssize_t iomem_base_show(struct device *dev, struct tty_port *port = dev_get_drvdata(dev); uart_get_info(port, &tmp); - return snprintf(buf, PAGE_SIZE, "0x%lX\n", (unsigned long)tmp.iomem_base); + return sprintf(buf, "0x%lX\n", (unsigned long)tmp.iomem_base); } static ssize_t iomem_reg_shift_show(struct device *dev, @@ -2761,7 +2761,7 @@ static ssize_t iomem_reg_shift_show(struct device *dev, struct tty_port *port = dev_get_drvdata(dev); uart_get_info(port, &tmp); - return snprintf(buf, PAGE_SIZE, "%d\n", tmp.iomem_reg_shift); + return sprintf(buf, "%d\n", tmp.iomem_reg_shift); } static ssize_t console_show(struct device *dev, From c7ac46dac744455047438de7acc63e1236536a83 Mon Sep 17 00:00:00 2001 From: Viresh Kumar Date: Fri, 28 Aug 2020 11:37:52 +0530 Subject: [PATCH 085/433] tty: serial: qcom_geni_serial: Unconditionally call dev_pm_opp_of_remove_table() dev_pm_opp_of_remove_table() doesn't report any errors when it fails to find the OPP table with error -ENODEV (i.e. OPP table not present for the device). And we can call dev_pm_opp_of_remove_table() unconditionally here. While at it, create a new label to put clkname on errors. Signed-off-by: Viresh Kumar Link: https://lore.kernel.org/r/583003f385a103b4c089ce8144a215c58cfb117a.1598594714.git.viresh.kumar@linaro.org Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/qcom_geni_serial.c | 13 +++++-------- 1 file changed, 5 insertions(+), 8 deletions(-) diff --git a/drivers/tty/serial/qcom_geni_serial.c b/drivers/tty/serial/qcom_geni_serial.c index 3aa29d201f54..33f1af6c61d1 100644 --- a/drivers/tty/serial/qcom_geni_serial.c +++ b/drivers/tty/serial/qcom_geni_serial.c @@ -1433,11 +1433,9 @@ static int qcom_geni_serial_probe(struct platform_device *pdev) return PTR_ERR(port->se.opp_table); /* OPP table is optional */ ret = dev_pm_opp_of_add_table(&pdev->dev); - if (!ret) { - port->se.has_opp_table = true; - } else if (ret != -ENODEV) { + if (ret && ret != -ENODEV) { dev_err(&pdev->dev, "invalid OPP table in device tree\n"); - return ret; + goto put_clkname; } port->private_data.drv = drv; @@ -1478,8 +1476,8 @@ static int qcom_geni_serial_probe(struct platform_device *pdev) return 0; err: - if (port->se.has_opp_table) - dev_pm_opp_of_remove_table(&pdev->dev); + dev_pm_opp_of_remove_table(&pdev->dev); +put_clkname: dev_pm_opp_put_clkname(port->se.opp_table); return ret; } @@ -1489,8 +1487,7 @@ static int qcom_geni_serial_remove(struct platform_device *pdev) struct qcom_geni_serial_port *port = platform_get_drvdata(pdev); struct uart_driver *drv = port->private_data.drv; - if (port->se.has_opp_table) - dev_pm_opp_of_remove_table(&pdev->dev); + dev_pm_opp_of_remove_table(&pdev->dev); dev_pm_opp_put_clkname(port->se.opp_table); dev_pm_clear_wake_irq(&pdev->dev); device_init_wakeup(&pdev->dev, false); From 04b6ff5f25dece9b0ee244aa768b251cfe855c85 Mon Sep 17 00:00:00 2001 From: Du Huanpeng Date: Sat, 22 Aug 2020 09:47:28 +0800 Subject: [PATCH 086/433] serial: 8250_pci: Add WCH384_8S 8 port serial device Add PCI id for WCH384_8S 8 port PCI-E serial card. because this card has so many ports, you may have to check these two options before use it: CONFIG_SERIAL_8250_RUNTIME_UARTS CONFIG_SERIAL_8250_NR_UARTS Signed-off-by: Du Huanpeng Link: https://lore.kernel.org/r/1598060848-27807-1-git-send-email-u74147@gmail.com Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/8250/8250_pci.c | 56 ++++++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) diff --git a/drivers/tty/serial/8250/8250_pci.c b/drivers/tty/serial/8250/8250_pci.c index 1a74d511b02a..d8f43f23b5b0 100644 --- a/drivers/tty/serial/8250/8250_pci.c +++ b/drivers/tty/serial/8250/8250_pci.c @@ -1776,6 +1776,39 @@ pci_wch_ch38x_setup(struct serial_private *priv, return pci_default_setup(priv, board, port, idx); } + +#define CH384_XINT_ENABLE_REG 0xEB +#define CH384_XINT_ENABLE_BIT 0x02 + +static int pci_wch_ch38x_init(struct pci_dev *dev) +{ + int max_port; + unsigned long iobase; + + + switch (dev->device) { + case 0x3853: /* 8 ports */ + max_port = 8; + break; + default: + return -EINVAL; + } + + iobase = pci_resource_start(dev, 0); + outb(CH384_XINT_ENABLE_BIT, iobase + CH384_XINT_ENABLE_REG); + + return max_port; +} + +static void pci_wch_ch38x_exit(struct pci_dev *dev) +{ + unsigned long iobase; + + iobase = pci_resource_start(dev, 0); + outb(0x0, iobase + CH384_XINT_ENABLE_REG); +} + + static int pci_sunix_setup(struct serial_private *priv, const struct pciserial_board *board, @@ -1867,6 +1900,7 @@ pci_moxa_setup(struct serial_private *priv, #define PCIE_VENDOR_ID_WCH 0x1c00 #define PCIE_DEVICE_ID_WCH_CH382_2S1P 0x3250 #define PCIE_DEVICE_ID_WCH_CH384_4S 0x3470 +#define PCIE_DEVICE_ID_WCH_CH384_8S 0x3853 #define PCIE_DEVICE_ID_WCH_CH382_2S 0x3253 #define PCI_VENDOR_ID_ACCESIO 0x494f @@ -2642,6 +2676,16 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = { .subdevice = PCI_ANY_ID, .setup = pci_wch_ch38x_setup, }, + /* WCH CH384 8S card (16850 clone) */ + { + .vendor = PCIE_VENDOR_ID_WCH, + .device = PCIE_DEVICE_ID_WCH_CH384_8S, + .subvendor = PCI_ANY_ID, + .subdevice = PCI_ANY_ID, + .init = pci_wch_ch38x_init, + .exit = pci_wch_ch38x_exit, + .setup = pci_wch_ch38x_setup, + }, /* * ASIX devices with FIFO bug */ @@ -2913,6 +2957,7 @@ enum pci_board_num_t { pbn_fintek_F81512A, pbn_wch382_2, pbn_wch384_4, + pbn_wch384_8, pbn_pericom_PI7C9X7951, pbn_pericom_PI7C9X7952, pbn_pericom_PI7C9X7954, @@ -3650,6 +3695,13 @@ static struct pciserial_board pci_boards[] = { .uart_offset = 8, .first_offset = 0xC0, }, + [pbn_wch384_8] = { + .flags = FL_BASE0, + .num_ports = 8, + .base_baud = 115200, + .uart_offset = 8, + .first_offset = 0x00, + }, /* * Pericom PI7C9X795[1248] Uno/Dual/Quad/Octal UART */ @@ -5566,6 +5618,10 @@ static const struct pci_device_id serial_pci_tbl[] = { PCI_ANY_ID, PCI_ANY_ID, 0, 0, pbn_wch384_4 }, + { PCIE_VENDOR_ID_WCH, PCIE_DEVICE_ID_WCH_CH384_8S, + PCI_ANY_ID, PCI_ANY_ID, + 0, 0, pbn_wch384_8 }, + /* Fintek PCI serial cards */ { PCI_DEVICE(0x1c29, 0x1104), .driver_data = pbn_fintek_4 }, { PCI_DEVICE(0x1c29, 0x1108), .driver_data = pbn_fintek_8 }, From b7a4f80bc316a56d6ec8750e93e66f42431ed960 Mon Sep 17 00:00:00 2001 From: "dinghao.liu@zju.edu.cn" Date: Thu, 20 Aug 2020 14:38:17 +0800 Subject: [PATCH 087/433] backlight: sky81452-backlight: Fix refcount imbalance on error When of_property_read_u32_array() returns an error code, a pairing refcount decrement is needed to keep np's refcount balanced. Fixes: f705806c9f355 ("backlight: Add support Skyworks SKY81452 backlight driver") Signed-off-by: Dinghao Liu Reviewed-by: Daniel Thompson Signed-off-by: Lee Jones --- drivers/video/backlight/sky81452-backlight.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/video/backlight/sky81452-backlight.c b/drivers/video/backlight/sky81452-backlight.c index 0ce181585008..8268ac43d54f 100644 --- a/drivers/video/backlight/sky81452-backlight.c +++ b/drivers/video/backlight/sky81452-backlight.c @@ -217,6 +217,7 @@ static struct sky81452_bl_platform_data *sky81452_bl_parse_dt( num_entry); if (ret < 0) { dev_err(dev, "led-sources node is invalid.\n"); + of_node_put(np); return ERR_PTR(-EINVAL); } From ae1f74da7c5a6bed3b9573a44e66f8ebbadefbbd Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Wed, 19 Aug 2020 22:51:48 +0200 Subject: [PATCH 088/433] dt-bindings: backlight: Add some common backlight properties Let's use a common.yaml include for the backlight like we do with the LEDs. The LEDs are inherently incompatible so their bindings cannot be reused for backlight. Cc: devicetree@vger.kernel.org Suggested-by: Sam Ravnborg Signed-off-by: Linus Walleij Reviewed-by: Daniel Thompson Reviewed-by: Rob Herring Signed-off-by: Lee Jones --- .../bindings/leds/backlight/common.yaml | 34 +++++++++++++++++++ 1 file changed, 34 insertions(+) create mode 100644 Documentation/devicetree/bindings/leds/backlight/common.yaml diff --git a/Documentation/devicetree/bindings/leds/backlight/common.yaml b/Documentation/devicetree/bindings/leds/backlight/common.yaml new file mode 100644 index 000000000000..4e7e95e331a5 --- /dev/null +++ b/Documentation/devicetree/bindings/leds/backlight/common.yaml @@ -0,0 +1,34 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/leds/backlight/common.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Common backlight properties + +maintainers: + - Lee Jones + - Daniel Thompson + - Jingoo Han + +description: + Backlight devices provide backlight for different types of graphical + displays. They are typically but not necessarily implemented using a white + LED powered by a boost converter. + +properties: + default-brightness: + description: + The default brightness that should be applied to the LED by the operating + system on start-up. The brightness should not exceed the brightness the + LED can provide. + $ref: /schemas/types.yaml#definitions/uint32 + + max-brightness: + description: + Normally the maximum brightness is determined by the hardware and this + property is not required. This property is used to put a software limit + on the brightness apart from what the driver says, as it could happen + that a LED can be made so bright that it gets damaged or causes damage + due to restrictions in a specific system, such as mounting conditions. + $ref: /schemas/types.yaml#definitions/uint32 From 299beae588e0e339458e623c01b64405f76f033c Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Wed, 19 Aug 2020 22:51:49 +0200 Subject: [PATCH 089/433] dt-bindings: backlight: Add Kinetic KTD253 bindings This adds device tree bindings for the Kinetic KTD253 white LED backlight driver. Cc: devicetree@vger.kernel.org Cc: Sam Ravnborg Signed-off-by: Linus Walleij Reviewed-by: Daniel Thompson Reviewed-by: Rob Herring Signed-off-by: Lee Jones --- .../leds/backlight/kinetic,ktd253.yaml | 46 +++++++++++++++++++ 1 file changed, 46 insertions(+) create mode 100644 Documentation/devicetree/bindings/leds/backlight/kinetic,ktd253.yaml diff --git a/Documentation/devicetree/bindings/leds/backlight/kinetic,ktd253.yaml b/Documentation/devicetree/bindings/leds/backlight/kinetic,ktd253.yaml new file mode 100644 index 000000000000..7a6ec1f8c0f3 --- /dev/null +++ b/Documentation/devicetree/bindings/leds/backlight/kinetic,ktd253.yaml @@ -0,0 +1,46 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/leds/backlight/kinetic,ktd253.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Kinetic Technologies KTD253 one-wire backlight + +maintainers: + - Linus Walleij + +description: | + The Kinetic Technologies KTD253 is a white LED backlight that is + controlled by a single GPIO line. If you just turn on the backlight + it goes to maximum backlight then you can set the level of backlight + using pulses on the enable wire. This is sometimes referred to as + "expresswire". + +allOf: + - $ref: common.yaml# + +properties: + compatible: + const: kinetic,ktd253 + + enable-gpios: + description: GPIO to use to enable/disable and dim the backlight. + maxItems: 1 + + default-brightness: true + max-brightness: true + +required: + - compatible + - enable-gpios + +additionalProperties: false + +examples: + - | + #include + backlight { + compatible = "kinetic,ktd253"; + enable-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; + default-brightness = <13>; + }; From 5317f37e48b953be94bfdbb6474542363467c37e Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Wed, 19 Aug 2020 22:51:50 +0200 Subject: [PATCH 090/433] backlight: Add Kinetic KTD253 backlight driver The Kinetic KTD253 backlight driver is controlled with a single GPIO line, but still supports a range of brightness settings by sending fast pulses on the line. This is based off the source code release for the Samsung GT-S7710 mobile phone. Cc: Sam Ravnborg Reviewed-by: Daniel Thompson Signed-off-by: Linus Walleij Signed-off-by: Lee Jones --- MAINTAINERS | 6 + drivers/video/backlight/Kconfig | 8 + drivers/video/backlight/Makefile | 1 + drivers/video/backlight/ktd253-backlight.c | 198 +++++++++++++++++++++ 4 files changed, 213 insertions(+) create mode 100644 drivers/video/backlight/ktd253-backlight.c diff --git a/MAINTAINERS b/MAINTAINERS index deaafb617361..ef6b4a279d25 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -9722,6 +9722,12 @@ F: Documentation/admin-guide/auxdisplay/ks0108.rst F: drivers/auxdisplay/ks0108.c F: include/linux/ks0108.h +KTD253 BACKLIGHT DRIVER +M: Linus Walleij +S: Maintained +F: Documentation/devicetree/bindings/leds/backlight/kinetic,ktd253.yaml +F: drivers/video/backlight/ktd253-backlight.c + L3MDEV M: David Ahern L: netdev@vger.kernel.org diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig index 87f9fc238d28..d83c87b902c1 100644 --- a/drivers/video/backlight/Kconfig +++ b/drivers/video/backlight/Kconfig @@ -182,6 +182,14 @@ config BACKLIGHT_IPAQ_MICRO computers. Say yes if you have one of the h3100/h3600/h3700 machines. +config BACKLIGHT_KTD253 + tristate "Backlight Driver for Kinetic KTD253" + depends on GPIOLIB || COMPILE_TEST + help + Say y to enabled the backlight driver for the Kinetic KTD253 + which is a 1-wire GPIO-controlled backlight found in some mobile + phones. + config BACKLIGHT_LM3533 tristate "Backlight Driver for LM3533" depends on MFD_LM3533 diff --git a/drivers/video/backlight/Makefile b/drivers/video/backlight/Makefile index 13463b99f1f9..685f3f1ca4df 100644 --- a/drivers/video/backlight/Makefile +++ b/drivers/video/backlight/Makefile @@ -35,6 +35,7 @@ obj-$(CONFIG_BACKLIGHT_GPIO) += gpio_backlight.o obj-$(CONFIG_BACKLIGHT_HP680) += hp680_bl.o obj-$(CONFIG_BACKLIGHT_HP700) += jornada720_bl.o obj-$(CONFIG_BACKLIGHT_IPAQ_MICRO) += ipaq_micro_bl.o +obj-$(CONFIG_BACKLIGHT_KTD253) += ktd253-backlight.o obj-$(CONFIG_BACKLIGHT_LM3533) += lm3533_bl.o obj-$(CONFIG_BACKLIGHT_LM3630A) += lm3630a_bl.o obj-$(CONFIG_BACKLIGHT_LM3639) += lm3639_bl.o diff --git a/drivers/video/backlight/ktd253-backlight.c b/drivers/video/backlight/ktd253-backlight.c new file mode 100644 index 000000000000..e3fee3f1f582 --- /dev/null +++ b/drivers/video/backlight/ktd253-backlight.c @@ -0,0 +1,198 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Backlight driver for the Kinetic KTD253 + * Based on code and know-how from the Samsung GT-S7710 + * Gareth Phillips + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Current ratio is n/32 from 1/32 to 32/32 */ +#define KTD253_MIN_RATIO 1 +#define KTD253_MAX_RATIO 32 +#define KTD253_DEFAULT_RATIO 13 + +#define KTD253_T_LOW_NS (200 + 10) /* Additional 10ns as safety factor */ +#define KTD253_T_HIGH_NS (200 + 10) /* Additional 10ns as safety factor */ +#define KTD253_T_OFF_MS 3 + +struct ktd253_backlight { + struct device *dev; + struct backlight_device *bl; + struct gpio_desc *gpiod; + u16 ratio; +}; + +static int ktd253_backlight_update_status(struct backlight_device *bl) +{ + struct ktd253_backlight *ktd253 = bl_get_data(bl); + int brightness = backlight_get_brightness(bl); + u16 target_ratio; + u16 current_ratio = ktd253->ratio; + unsigned long flags; + + dev_dbg(ktd253->dev, "new brightness/ratio: %d/32\n", brightness); + + target_ratio = brightness; + + if (target_ratio == current_ratio) + /* This is already right */ + return 0; + + if (target_ratio == 0) { + gpiod_set_value_cansleep(ktd253->gpiod, 0); + /* + * We need to keep the GPIO low for at least this long + * to actually switch the KTD253 off. + */ + msleep(KTD253_T_OFF_MS); + ktd253->ratio = 0; + return 0; + } + + if (current_ratio == 0) { + gpiod_set_value_cansleep(ktd253->gpiod, 1); + ndelay(KTD253_T_HIGH_NS); + /* We always fall back to this when we power on */ + current_ratio = KTD253_MAX_RATIO; + } + + /* + * WARNING: + * The loop to set the correct current level is performed + * with interrupts disabled as it is timing critical. + * The maximum number of cycles of the loop is 32 + * so the time taken will be (T_LOW_NS + T_HIGH_NS + loop_time) * 32, + */ + local_irq_save(flags); + while (current_ratio != target_ratio) { + /* + * These GPIO operations absolutely can NOT sleep so no + * _cansleep suffixes, and no using GPIO expanders on + * slow buses for this! + */ + gpiod_set_value(ktd253->gpiod, 0); + ndelay(KTD253_T_LOW_NS); + gpiod_set_value(ktd253->gpiod, 1); + ndelay(KTD253_T_HIGH_NS); + /* After 1/32 we loop back to 32/32 */ + if (current_ratio == KTD253_MIN_RATIO) + current_ratio = KTD253_MAX_RATIO; + else + current_ratio--; + } + local_irq_restore(flags); + ktd253->ratio = current_ratio; + + dev_dbg(ktd253->dev, "new ratio set to %d/32\n", target_ratio); + + return 0; +} + +static const struct backlight_ops ktd253_backlight_ops = { + .options = BL_CORE_SUSPENDRESUME, + .update_status = ktd253_backlight_update_status, +}; + +static int ktd253_backlight_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct backlight_device *bl; + struct ktd253_backlight *ktd253; + u32 max_brightness; + u32 brightness; + int ret; + + ktd253 = devm_kzalloc(dev, sizeof(*ktd253), GFP_KERNEL); + if (!ktd253) + return -ENOMEM; + ktd253->dev = dev; + + ret = device_property_read_u32(dev, "max-brightness", &max_brightness); + if (ret) + max_brightness = KTD253_MAX_RATIO; + if (max_brightness > KTD253_MAX_RATIO) { + /* Clamp brightness to hardware max */ + dev_err(dev, "illegal max brightness specified\n"); + max_brightness = KTD253_MAX_RATIO; + } + + ret = device_property_read_u32(dev, "default-brightness", &brightness); + if (ret) + brightness = KTD253_DEFAULT_RATIO; + if (brightness > max_brightness) { + /* Clamp default brightness to max brightness */ + dev_err(dev, "default brightness exceeds max brightness\n"); + brightness = max_brightness; + } + + if (brightness) + /* This will be the default ratio when the KTD253 is enabled */ + ktd253->ratio = KTD253_MAX_RATIO; + else + ktd253->ratio = 0; + + ktd253->gpiod = devm_gpiod_get(dev, "enable", + brightness ? GPIOD_OUT_HIGH : + GPIOD_OUT_LOW); + if (IS_ERR(ktd253->gpiod)) { + ret = PTR_ERR(ktd253->gpiod); + if (ret != -EPROBE_DEFER) + dev_err(dev, "gpio line missing or invalid.\n"); + return ret; + } + gpiod_set_consumer_name(ktd253->gpiod, dev_name(dev)); + + bl = devm_backlight_device_register(dev, dev_name(dev), dev, ktd253, + &ktd253_backlight_ops, NULL); + if (IS_ERR(bl)) { + dev_err(dev, "failed to register backlight\n"); + return PTR_ERR(bl); + } + bl->props.max_brightness = max_brightness; + /* When we just enable the GPIO line we set max brightness */ + if (brightness) { + bl->props.brightness = brightness; + bl->props.power = FB_BLANK_UNBLANK; + } else { + bl->props.brightness = 0; + bl->props.power = FB_BLANK_POWERDOWN; + } + + ktd253->bl = bl; + platform_set_drvdata(pdev, bl); + backlight_update_status(bl); + + return 0; +} + +static const struct of_device_id ktd253_backlight_of_match[] = { + { .compatible = "kinetic,ktd253" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, ktd253_backlight_of_match); + +static struct platform_driver ktd253_backlight_driver = { + .driver = { + .name = "ktd253-backlight", + .of_match_table = ktd253_backlight_of_match, + }, + .probe = ktd253_backlight_probe, +}; +module_platform_driver(ktd253_backlight_driver); + +MODULE_AUTHOR("Linus Walleij "); +MODULE_DESCRIPTION("Kinetic KTD253 Backlight Driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:ktd253-backlight"); From ebc2599144b610a7e6e967ee89a769d908a3eeef Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Fri, 28 Aug 2020 13:32:35 +0300 Subject: [PATCH 091/433] pinctrl: mcp23s08: Improve error messaging in ->probe() Print particular message in each of error case in the ->probe(). While here, use dev_err_probe() for that. Signed-off-by: Andy Shevchenko Cc: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20200828103235.78380-1-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij --- drivers/pinctrl/pinctrl-mcp23s08.c | 25 ++++++++++++------------- 1 file changed, 12 insertions(+), 13 deletions(-) diff --git a/drivers/pinctrl/pinctrl-mcp23s08.c b/drivers/pinctrl/pinctrl-mcp23s08.c index 42b12ea14d6b..b4606811cf57 100644 --- a/drivers/pinctrl/pinctrl-mcp23s08.c +++ b/drivers/pinctrl/pinctrl-mcp23s08.c @@ -564,7 +564,7 @@ int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev, ret = mcp_read(mcp, MCP_IOCON, &status); if (ret < 0) - goto fail; + return dev_err_probe(dev, ret, "can't identify chip %d\n", addr); mcp->irq_controller = device_property_read_bool(dev, "interrupt-controller"); @@ -598,7 +598,7 @@ int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev, ret = mcp_write(mcp, MCP_IOCON, status); if (ret < 0) - goto fail; + return dev_err_probe(dev, ret, "can't write IOCON %d\n", addr); } if (mcp->irq && mcp->irq_controller) { @@ -616,7 +616,7 @@ int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev, ret = devm_gpiochip_add_data(dev, &mcp->chip, mcp); if (ret < 0) - goto fail; + return dev_err_probe(dev, ret, "can't add GPIO chip\n"); mcp->pinctrl_desc.pctlops = &mcp_pinctrl_ops; mcp->pinctrl_desc.confops = &mcp_pinconf_ops; @@ -628,18 +628,17 @@ int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev, mcp->pinctrl_desc.owner = THIS_MODULE; mcp->pctldev = devm_pinctrl_register(dev, &mcp->pinctrl_desc, mcp); - if (IS_ERR(mcp->pctldev)) { - ret = PTR_ERR(mcp->pctldev); - goto fail; + if (IS_ERR(mcp->pctldev)) + return dev_err_probe(dev, PTR_ERR(mcp->pctldev), "can't register controller\n"); + + if (mcp->irq) { + ret = mcp23s08_irq_setup(mcp); + if (ret) + return dev_err_probe(dev, ret, "can't setup IRQ\n"); } - if (mcp->irq) - ret = mcp23s08_irq_setup(mcp); - -fail: - if (ret < 0) - dev_dbg(dev, "can't setup chip %d, --> %d\n", addr, ret); - return ret; + return 0; } EXPORT_SYMBOL_GPL(mcp23s08_probe_one); + MODULE_LICENSE("GPL"); From bbf369d4e59a248ed715041267951f5cd051b317 Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Tue, 25 Aug 2020 10:54:48 +0100 Subject: [PATCH 092/433] pinctrl: sh-pfc: r8a7790: Add CAN pins, groups and functions Add pins, groups and functions for the CAN{0,1} interface. Signed-off-by: Lad Prabhakar Reviewed-by: Chris Paterson Link: https://lore.kernel.org/r/20200825095448.13093-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven --- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 112 ++++++++++++++++++++++++++- 1 file changed, 110 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c index 39ba1e7cc1c3..60f973c5dffe 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c @@ -1871,6 +1871,86 @@ static const unsigned int avb_gmii_mux[] = { AVB_TX_EN_MARK, AVB_TX_ER_MARK, AVB_TX_CLK_MARK, AVB_COL_MARK, }; +/* - CAN0 ----------------------------------------------------------------- */ +static const unsigned int can0_data_pins[] = { + /* CAN0 RX */ + RCAR_GP_PIN(1, 17), + /* CAN0 TX */ + RCAR_GP_PIN(1, 19), +}; +static const unsigned int can0_data_mux[] = { + CAN0_RX_MARK, + CAN0_TX_MARK, +}; +static const unsigned int can0_data_b_pins[] = { + /* CAN0 RXB */ + RCAR_GP_PIN(4, 5), + /* CAN0 TXB */ + RCAR_GP_PIN(4, 4), +}; +static const unsigned int can0_data_b_mux[] = { + CAN0_RX_B_MARK, + CAN0_TX_B_MARK, +}; +static const unsigned int can0_data_c_pins[] = { + /* CAN0 RXC */ + RCAR_GP_PIN(4, 26), + /* CAN0 TXC */ + RCAR_GP_PIN(4, 23), +}; +static const unsigned int can0_data_c_mux[] = { + CAN0_RX_C_MARK, + CAN0_TX_C_MARK, +}; +static const unsigned int can0_data_d_pins[] = { + /* CAN0 RXD */ + RCAR_GP_PIN(4, 26), + /* CAN0 TXD */ + RCAR_GP_PIN(4, 18), +}; +static const unsigned int can0_data_d_mux[] = { + CAN0_RX_D_MARK, + CAN0_TX_D_MARK, +}; +/* - CAN1 ----------------------------------------------------------------- */ +static const unsigned int can1_data_pins[] = { + /* CAN1 RX */ + RCAR_GP_PIN(1, 22), + /* CAN1 TX */ + RCAR_GP_PIN(1, 18), +}; +static const unsigned int can1_data_mux[] = { + CAN1_RX_MARK, + CAN1_TX_MARK, +}; +static const unsigned int can1_data_b_pins[] = { + /* CAN1 RXB */ + RCAR_GP_PIN(4, 7), + /* CAN1 TXB */ + RCAR_GP_PIN(4, 6), +}; +static const unsigned int can1_data_b_mux[] = { + CAN1_RX_B_MARK, + CAN1_TX_B_MARK, +}; +/* - CAN Clock -------------------------------------------------------------- */ +static const unsigned int can_clk_pins[] = { + /* CLK */ + RCAR_GP_PIN(1, 21), +}; + +static const unsigned int can_clk_mux[] = { + CAN_CLK_MARK, +}; + +static const unsigned int can_clk_b_pins[] = { + /* CLK */ + RCAR_GP_PIN(4, 3), +}; + +static const unsigned int can_clk_b_mux[] = { + CAN_CLK_B_MARK, +}; /* - DU RGB ----------------------------------------------------------------- */ static const unsigned int du_rgb666_pins[] = { /* R[7:2], G[7:2], B[7:2] */ @@ -3946,7 +4026,7 @@ static const unsigned int vin3_clk_mux[] = { }; static const struct { - struct sh_pfc_pin_group common[290]; + struct sh_pfc_pin_group common[298]; struct sh_pfc_pin_group automotive[1]; } pinmux_groups = { .common = { @@ -3963,6 +4043,14 @@ static const struct { SH_PFC_PIN_GROUP(avb_mdio), SH_PFC_PIN_GROUP(avb_mii), SH_PFC_PIN_GROUP(avb_gmii), + SH_PFC_PIN_GROUP(can0_data), + SH_PFC_PIN_GROUP(can0_data_b), + SH_PFC_PIN_GROUP(can0_data_c), + SH_PFC_PIN_GROUP(can0_data_d), + SH_PFC_PIN_GROUP(can1_data), + SH_PFC_PIN_GROUP(can1_data_b), + SH_PFC_PIN_GROUP(can_clk), + SH_PFC_PIN_GROUP(can_clk_b), SH_PFC_PIN_GROUP(du_rgb666), SH_PFC_PIN_GROUP(du_rgb888), SH_PFC_PIN_GROUP(du_clk_out_0), @@ -4265,6 +4353,23 @@ static const char * const avb_groups[] = { "avb_gmii", }; +static const char * const can0_groups[] = { + "can0_data", + "can0_data_b", + "can0_data_c", + "can0_data_d", +}; + +static const char * const can1_groups[] = { + "can1_data", + "can1_data_b", +}; + +static const char * const can_clk_groups[] = { + "can_clk", + "can_clk_b", +}; + static const char * const du_groups[] = { "du_rgb666", "du_rgb888", @@ -4706,13 +4811,16 @@ static const char * const vin3_groups[] = { }; static const struct { - struct sh_pfc_function common[55]; + struct sh_pfc_function common[58]; struct sh_pfc_function automotive[1]; } pinmux_functions = { .common = { SH_PFC_FUNCTION(audio_clk), SH_PFC_FUNCTION(avb), SH_PFC_FUNCTION(du), + SH_PFC_FUNCTION(can0), + SH_PFC_FUNCTION(can1), + SH_PFC_FUNCTION(can_clk), SH_PFC_FUNCTION(du0), SH_PFC_FUNCTION(du1), SH_PFC_FUNCTION(du2), From 2dab430a8e712d64124bbe1f45dce8794b3d1003 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Wed, 26 Aug 2020 12:48:49 -0600 Subject: [PATCH 093/433] dt-bindings: sound: Remove unused 'linux,hdmi-audio' The binding was added in 2013 and has had no driver since 2015. Cc: Liam Girdwood Cc: Mark Brown Cc: alsa-devel@alsa-project.org Link: https://lore.kernel.org/r/20200826184851.3431531-1-robh@kernel.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/sound/hdmi.txt | 16 ---------------- 1 file changed, 16 deletions(-) delete mode 100644 Documentation/devicetree/bindings/sound/hdmi.txt diff --git a/Documentation/devicetree/bindings/sound/hdmi.txt b/Documentation/devicetree/bindings/sound/hdmi.txt deleted file mode 100644 index 56407c30e954..000000000000 --- a/Documentation/devicetree/bindings/sound/hdmi.txt +++ /dev/null @@ -1,16 +0,0 @@ -Device-Tree bindings for dummy HDMI codec - -Required properties: - - compatible: should be "linux,hdmi-audio". - -CODEC output pins: - * TX - -CODEC input pins: - * RX - -Example node: - - hdmi_audio: hdmi_audio@0 { - compatible = "linux,hdmi-audio"; - }; From 06f7f8e6f958c0fcbbfdabc6c95bfd19a2aeef55 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Wed, 26 Aug 2020 12:48:50 -0600 Subject: [PATCH 094/433] dt-bindings: phy: Remove phy-stih41x-usb binding The driver was removed in 2016 in commit fb954c48aea6 ("phy: stih41x-usb: Remove usb phy driver and dt binding documentation.") and somehow the DT binding got dropped despite the subject. Cc: Peter Griffin Cc: Kishon Vijay Abraham I Link: https://lore.kernel.org/r/20200826184851.3431531-2-robh@kernel.org Signed-off-by: Rob Herring --- .../bindings/phy/phy-stih41x-usb.txt | 24 ------------------- 1 file changed, 24 deletions(-) delete mode 100644 Documentation/devicetree/bindings/phy/phy-stih41x-usb.txt diff --git a/Documentation/devicetree/bindings/phy/phy-stih41x-usb.txt b/Documentation/devicetree/bindings/phy/phy-stih41x-usb.txt deleted file mode 100644 index 744b4809542e..000000000000 --- a/Documentation/devicetree/bindings/phy/phy-stih41x-usb.txt +++ /dev/null @@ -1,24 +0,0 @@ -STMicroelectronics STiH41x USB PHY binding ------------------------------------------- - -This file contains documentation for the usb phy found in STiH415/6 SoCs from -STMicroelectronics. - -Required properties: -- compatible : should be "st,stih416-usb-phy" or "st,stih415-usb-phy" -- st,syscfg : should be a phandle of the syscfg node -- clock-names : must contain "osc_phy" -- clocks : must contain an entry for each name in clock-names. -See: Documentation/devicetree/bindings/clock/clock-bindings.txt -- #phy-cells : must be 0 for this phy -See: Documentation/devicetree/bindings/phy/phy-bindings.txt - -Example: - -usb2_phy: usb2phy@0 { - compatible = "st,stih416-usb-phy"; - #phy-cells = <0>; - st,syscfg = <&syscfg_rear>; - clocks = <&clk_sysin>; - clock-names = "osc_phy"; -}; From 282d66289d583dbe53802c1329bb47c767ded7bb Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Wed, 26 Aug 2020 12:48:51 -0600 Subject: [PATCH 095/433] dt-bindings: interrupt-controller: Remove obsolete 'img,meta-intc' The driver and metag arch were removed in 2018. Cc: Thomas Gleixner Cc: Jason Cooper Cc: Marc Zyngier Link: https://lore.kernel.org/r/20200826184851.3431531-3-robh@kernel.org Signed-off-by: Rob Herring --- .../interrupt-controller/img,meta-intc.txt | 82 ------------------- 1 file changed, 82 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/img,meta-intc.txt diff --git a/Documentation/devicetree/bindings/interrupt-controller/img,meta-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/img,meta-intc.txt deleted file mode 100644 index 42431f44697f..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/img,meta-intc.txt +++ /dev/null @@ -1,82 +0,0 @@ -* Meta External Trigger Controller Binding - -This binding specifies what properties must be available in the device tree -representation of a Meta external trigger controller. - -Required properties: - - - compatible: Specifies the compatibility list for the interrupt controller. - The type shall be and the value shall include "img,meta-intc". - - - num-banks: Specifies the number of interrupt banks (each of which can - handle 32 interrupt sources). - - - interrupt-controller: The presence of this property identifies the node - as an interrupt controller. No property value shall be defined. - - - #interrupt-cells: Specifies the number of cells needed to encode an - interrupt source. The type shall be a and the value shall be 2. - - - #address-cells: Specifies the number of cells needed to encode an - address. The type shall be and the value shall be 0. As such, - 'interrupt-map' nodes do not have to specify a parent unit address. - -Optional properties: - - - no-mask: The controller doesn't have any mask registers. - -* Interrupt Specifier Definition - - Interrupt specifiers consists of 2 cells encoded as follows: - - - <1st-cell>: The interrupt-number that identifies the interrupt source. - - - <2nd-cell>: The Linux interrupt flags containing level-sense information, - encoded as follows: - 1 = edge triggered - 4 = level-sensitive - -* Examples - -Example 1: - - /* - * Meta external trigger block - */ - intc: intc { - // This is an interrupt controller node. - interrupt-controller; - - // No address cells so that 'interrupt-map' nodes which - // reference this interrupt controller node do not need a parent - // address specifier. - #address-cells = <0>; - - // Two cells to encode interrupt sources. - #interrupt-cells = <2>; - - // Number of interrupt banks - num-banks = <2>; - - // No HWMASKEXT is available (specify on Chorus2 and Comet ES1) - no-mask; - - // Compatible with Meta hardware trigger block. - compatible = "img,meta-intc"; - }; - -Example 2: - - /* - * An interrupt generating device that is wired to a Meta external - * trigger block. - */ - uart1: uart@02004c00 { - // Interrupt source '5' that is level-sensitive. - // Note that there are only two cells as specified in the - // interrupt parent's '#interrupt-cells' property. - interrupts = <5 4 /* level */>; - - // The interrupt controller that this device is wired to. - interrupt-parent = <&intc>; - }; From 5f0e708c8d74049f524e7407b523cce4330b090f Mon Sep 17 00:00:00 2001 From: Ye Bin Date: Thu, 3 Sep 2020 14:24:01 +0800 Subject: [PATCH 096/433] serial: imx: Delete duplicated argument to '|' in imx_uart_probe MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When calculate "ucr1" UCR1_TRDYEN is duplicate. Signed-off-by: Ye Bin Reviewed-by: Uwe Kleine-König Link: https://lore.kernel.org/r/20200903062401.692442-1-yebin10@huawei.com Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/imx.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c index ce8c472cf385..4e6ead1f650e 100644 --- a/drivers/tty/serial/imx.c +++ b/drivers/tty/serial/imx.c @@ -2389,8 +2389,7 @@ static int imx_uart_probe(struct platform_device *pdev) /* Disable interrupts before requesting them */ ucr1 = imx_uart_readl(sport, UCR1); - ucr1 &= ~(UCR1_ADEN | UCR1_TRDYEN | UCR1_IDEN | UCR1_RRDYEN | - UCR1_TRDYEN | UCR1_RTSDEN); + ucr1 &= ~(UCR1_ADEN | UCR1_TRDYEN | UCR1_IDEN | UCR1_RRDYEN | UCR1_RTSDEN); imx_uart_writel(sport, ucr1, UCR1); if (!imx_uart_is_imx1(sport) && sport->dte_mode) { From ea43a60b15486bca1c406b59034e3561d543d571 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 1 Sep 2020 17:30:59 +0200 Subject: [PATCH 097/433] serial: 8250: Simplify with dev_err_probe() Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and the error value gets printed. Signed-off-by: Krzysztof Kozlowski Acked-by: Florian Fainelli Reviewed-by: Lukas Wunner Link: https://lore.kernel.org/r/20200901153100.18827-1-krzk@kernel.org Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/8250/8250_bcm2835aux.c | 12 +++--------- drivers/tty/serial/8250/8250_ingenic.c | 20 ++++++-------------- 2 files changed, 9 insertions(+), 23 deletions(-) diff --git a/drivers/tty/serial/8250/8250_bcm2835aux.c b/drivers/tty/serial/8250/8250_bcm2835aux.c index 12d03e678295..fd95860cd661 100644 --- a/drivers/tty/serial/8250/8250_bcm2835aux.c +++ b/drivers/tty/serial/8250/8250_bcm2835aux.c @@ -110,12 +110,8 @@ static int bcm2835aux_serial_probe(struct platform_device *pdev) /* get the clock - this also enables the HW */ data->clk = devm_clk_get(&pdev->dev, NULL); - ret = PTR_ERR_OR_ZERO(data->clk); - if (ret) { - if (ret != -EPROBE_DEFER) - dev_err(&pdev->dev, "could not get clk: %d\n", ret); - return ret; - } + if (IS_ERR(data->clk)) + return dev_err_probe(&pdev->dev, PTR_ERR(data->clk), "could not get clk\n"); /* get the interrupt */ ret = platform_get_irq(pdev, 0); @@ -155,9 +151,7 @@ static int bcm2835aux_serial_probe(struct platform_device *pdev) /* register the port */ ret = serial8250_register_8250_port(&up); if (ret < 0) { - if (ret != -EPROBE_DEFER) - dev_err(&pdev->dev, - "unable to register 8250 port - %d\n", ret); + dev_err_probe(&pdev->dev, ret, "unable to register 8250 port\n"); goto dis_clk; } data->line = ret; diff --git a/drivers/tty/serial/8250/8250_ingenic.c b/drivers/tty/serial/8250/8250_ingenic.c index dde766fa465f..988bf6bcce42 100644 --- a/drivers/tty/serial/8250/8250_ingenic.c +++ b/drivers/tty/serial/8250/8250_ingenic.c @@ -259,22 +259,14 @@ static int ingenic_uart_probe(struct platform_device *pdev) return -ENOMEM; data->clk_module = devm_clk_get(&pdev->dev, "module"); - if (IS_ERR(data->clk_module)) { - err = PTR_ERR(data->clk_module); - if (err != -EPROBE_DEFER) - dev_err(&pdev->dev, - "unable to get module clock: %d\n", err); - return err; - } + if (IS_ERR(data->clk_module)) + return dev_err_probe(&pdev->dev, PTR_ERR(data->clk_module), + "unable to get module clock\n"); data->clk_baud = devm_clk_get(&pdev->dev, "baud"); - if (IS_ERR(data->clk_baud)) { - err = PTR_ERR(data->clk_baud); - if (err != -EPROBE_DEFER) - dev_err(&pdev->dev, - "unable to get baud clock: %d\n", err); - return err; - } + if (IS_ERR(data->clk_baud)) + return dev_err_probe(&pdev->dev, PTR_ERR(data->clk_baud), + "unable to get baud clock\n"); err = clk_prepare_enable(data->clk_module); if (err) { From 89c65d664832ebaf2cbdcfe83b25c0036780feb7 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 1 Sep 2020 17:31:00 +0200 Subject: [PATCH 098/433] serial: core: Simplify with dev_err_probe() Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and the error value gets printed. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Lukas Wunner Link: https://lore.kernel.org/r/20200901153100.18827-2-krzk@kernel.org Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/serial_core.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/tty/serial/serial_core.c b/drivers/tty/serial/serial_core.c index 4d313385cb2a..6ea13d35d5fc 100644 --- a/drivers/tty/serial/serial_core.c +++ b/drivers/tty/serial/serial_core.c @@ -3264,9 +3264,7 @@ int uart_get_rs485_mode(struct uart_port *port) if (IS_ERR(port->rs485_term_gpio)) { ret = PTR_ERR(port->rs485_term_gpio); port->rs485_term_gpio = NULL; - if (ret != -EPROBE_DEFER) - dev_err(dev, "Cannot get rs485-term-gpios\n"); - return ret; + return dev_err_probe(dev, ret, "Cannot get rs485-term-gpios\n"); } return 0; From 5da6b1c079e6804a81e63ab8337224cbd2148c91 Mon Sep 17 00:00:00 2001 From: Daniel Mack Date: Tue, 1 Sep 2020 14:03:29 +0200 Subject: [PATCH 099/433] sc16is7xx: Set iobase to device index Some derivates of sc16is7xx devices expose more than one tty device to userspace. If multiple such devices exist in a system, userspace currently has no clean way to infer which tty maps to which physical line. Set the .iobase value to the relative index within the device to allow infering the order through sysfs. Signed-off-by: Daniel Mack Link: https://lore.kernel.org/r/20200901120329.4176302-1-daniel@zonque.org Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/sc16is7xx.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/tty/serial/sc16is7xx.c b/drivers/tty/serial/sc16is7xx.c index 809610b37c71..f86ec2d2635b 100644 --- a/drivers/tty/serial/sc16is7xx.c +++ b/drivers/tty/serial/sc16is7xx.c @@ -1271,6 +1271,7 @@ static int sc16is7xx_probe(struct device *dev, s->p[i].port.type = PORT_SC16IS7XX; s->p[i].port.fifosize = SC16IS7XX_FIFO_SIZE; s->p[i].port.flags = UPF_FIXED_TYPE | UPF_LOW_LATENCY; + s->p[i].port.iobase = i; s->p[i].port.iotype = UPIO_PORT; s->p[i].port.uartclk = freq; s->p[i].port.rs485_config = sc16is7xx_config_rs485; From 0fb9342d06b0f667b915ba58bfefc030e534a218 Mon Sep 17 00:00:00 2001 From: Tong Zhang Date: Fri, 28 Aug 2020 08:39:50 -0400 Subject: [PATCH 100/433] tty: serial: earlycon dependency parse_options() in drivers/tty/serial/earlycon.c calls uart_parse_earlycon in drivers/tty/serial/serial_core.c therefore selecting SERIAL_EARLYCON should automatically select SERIAL_CORE, otherwise will result in symbol not found error during linking if SERIAL_CORE is not configured as builtin Fixes: 9aac5887595b ("tty/serial: add generic serial earlycon") Signed-off-by: Tong Zhang Link: https://lore.kernel.org/r/20200828123949.2642-1-ztong0001@gmail.com Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig index 9409be982aa6..54586c1aba60 100644 --- a/drivers/tty/serial/Kconfig +++ b/drivers/tty/serial/Kconfig @@ -8,6 +8,7 @@ menu "Serial drivers" config SERIAL_EARLYCON bool + depends on SERIAL_CORE help Support for early consoles with the earlycon parameter. This enables the console before standard serial driver is probed. The console is From ad0c2748059fff13e8295ae91f51073d6c0311b7 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 31 Aug 2020 19:10:45 +0200 Subject: [PATCH 101/433] serial: stm32: Add RS485 RTS GPIO control again While the STM32 does support RS485 drive-enable control within the UART IP itself, some systems have the drive-enable line connected to a pin which cannot be pinmuxed as RTS. Add support for toggling the RTS GPIO line using the modem control GPIOs to provide at least some sort of emulation. Fixes: 7df5081cbf5e ("serial: stm32: Add RS485 RTS GPIO control") Signed-off-by: Marek Vasut Cc: Alexandre Torgue Cc: Andy Shevchenko Cc: Manivannan Sadhasivam Cc: Fabrice Gasnier Cc: linux-stm32@st-md-mailman.stormreply.com Link: https://lore.kernel.org/r/20200831171045.205691-1-marex@denx.de Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/stm32-usart.c | 33 ++++++++++++++++++++++++-------- 1 file changed, 25 insertions(+), 8 deletions(-) diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c index ba503dd04ce2..ee6c7762d355 100644 --- a/drivers/tty/serial/stm32-usart.c +++ b/drivers/tty/serial/stm32-usart.c @@ -129,13 +129,9 @@ static int stm32_config_rs485(struct uart_port *port, if (rs485conf->flags & SER_RS485_RTS_ON_SEND) { cr3 &= ~USART_CR3_DEP; rs485conf->flags &= ~SER_RS485_RTS_AFTER_SEND; - mctrl_gpio_set(stm32_port->gpios, - stm32_port->port.mctrl & ~TIOCM_RTS); } else { cr3 |= USART_CR3_DEP; rs485conf->flags |= SER_RS485_RTS_AFTER_SEND; - mctrl_gpio_set(stm32_port->gpios, - stm32_port->port.mctrl | TIOCM_RTS); } writel_relaxed(cr3, port->membase + ofs->cr3); @@ -541,17 +537,42 @@ static void stm32_disable_ms(struct uart_port *port) /* Transmit stop */ static void stm32_stop_tx(struct uart_port *port) { + struct stm32_port *stm32_port = to_stm32_port(port); + struct serial_rs485 *rs485conf = &port->rs485; + stm32_tx_interrupt_disable(port); + + if (rs485conf->flags & SER_RS485_ENABLED) { + if (rs485conf->flags & SER_RS485_RTS_ON_SEND) { + mctrl_gpio_set(stm32_port->gpios, + stm32_port->port.mctrl & ~TIOCM_RTS); + } else { + mctrl_gpio_set(stm32_port->gpios, + stm32_port->port.mctrl | TIOCM_RTS); + } + } } /* There are probably characters waiting to be transmitted. */ static void stm32_start_tx(struct uart_port *port) { + struct stm32_port *stm32_port = to_stm32_port(port); + struct serial_rs485 *rs485conf = &port->rs485; struct circ_buf *xmit = &port->state->xmit; if (uart_circ_empty(xmit)) return; + if (rs485conf->flags & SER_RS485_ENABLED) { + if (rs485conf->flags & SER_RS485_RTS_ON_SEND) { + mctrl_gpio_set(stm32_port->gpios, + stm32_port->port.mctrl | TIOCM_RTS); + } else { + mctrl_gpio_set(stm32_port->gpios, + stm32_port->port.mctrl & ~TIOCM_RTS); + } + } + stm32_transmit_chars(port); } @@ -851,13 +872,9 @@ static void stm32_set_termios(struct uart_port *port, struct ktermios *termios, if (rs485conf->flags & SER_RS485_RTS_ON_SEND) { cr3 &= ~USART_CR3_DEP; rs485conf->flags &= ~SER_RS485_RTS_AFTER_SEND; - mctrl_gpio_set(stm32_port->gpios, - stm32_port->port.mctrl & ~TIOCM_RTS); } else { cr3 |= USART_CR3_DEP; rs485conf->flags |= SER_RS485_RTS_AFTER_SEND; - mctrl_gpio_set(stm32_port->gpios, - stm32_port->port.mctrl | TIOCM_RTS); } } else { From 11361610b00500c4afe269ff5a4fe06d58f0a3d0 Mon Sep 17 00:00:00 2001 From: kuldip dwivedi Date: Thu, 3 Sep 2020 17:04:02 +0530 Subject: [PATCH 102/433] serial: 8250_fsl: Add ACPI support This adds support for ACPI enumerated FSL 16550 UARTs. For supporting ACPI, I added a wrapper so that this driver can be used if firmware has exposed the HID "NXP0018" in DSDT table. This will be built as object file if config "SERIAL_8250_FSL" is enabled which depends on config "SERIAL_8250_CONSOLE". Signed-off-by: kuldip dwivedi Link: https://lore.kernel.org/r/20200903113402.12371-1-kuldip.dwivedi@puresoftware.com Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/8250/8250_fsl.c | 108 +++++++++++++++++++++++++++-- 1 file changed, 101 insertions(+), 7 deletions(-) diff --git a/drivers/tty/serial/8250/8250_fsl.c b/drivers/tty/serial/8250/8250_fsl.c index 0d0c80905c58..c3582d8938d6 100644 --- a/drivers/tty/serial/8250/8250_fsl.c +++ b/drivers/tty/serial/8250/8250_fsl.c @@ -1,15 +1,12 @@ // SPDX-License-Identifier: GPL-2.0 -#include -#include - -#include "8250.h" - /* * Freescale 16550 UART "driver", Copyright (C) 2011 Paul Gortmaker. + * Copyright 2020 NXP + * Copyright 2020 Puresoftware Ltd. * * This isn't a full driver; it just provides an alternate IRQ - * handler to deal with an errata. Everything else is just - * using the bog standard 8250 support. + * handler to deal with an errata and provide ACPI wrapper. + * Everything else is just using the bog standard 8250 support. * * We follow code flow of serial8250_default_handle_irq() but add * a check for a break and insert a dummy read on the Rx for the @@ -20,6 +17,16 @@ * IRQ event to the next one. */ +#include +#include +#include + +#include "8250.h" + +struct fsl8250_data { + int line; +}; + int fsl8250_handle_irq(struct uart_port *port) { unsigned char lsr, orig_lsr; @@ -79,3 +86,90 @@ int fsl8250_handle_irq(struct uart_port *port) return 1; } EXPORT_SYMBOL_GPL(fsl8250_handle_irq); + +#ifdef CONFIG_ACPI +static int fsl8250_acpi_probe(struct platform_device *pdev) +{ + struct fsl8250_data *data; + struct uart_8250_port port8250; + struct device *dev = &pdev->dev; + struct resource *regs; + + int ret, irq; + + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!regs) { + dev_err(dev, "no registers defined\n"); + return -EINVAL; + } + + irq = platform_get_irq(pdev, 0); + if (irq < 0) { + if (irq != -EPROBE_DEFER) + dev_err(dev, "cannot get irq\n"); + return irq; + } + + memset(&port8250, 0, sizeof(port8250)); + + ret = device_property_read_u32(dev, "clock-frequency", + &port8250.port.uartclk); + if (ret) + return ret; + + spin_lock_init(&port8250.port.lock); + + port8250.port.mapbase = regs->start; + port8250.port.irq = irq; + port8250.port.handle_irq = fsl8250_handle_irq; + port8250.port.type = PORT_16550A; + port8250.port.flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF + | UPF_FIXED_PORT | UPF_IOREMAP + | UPF_FIXED_TYPE; + port8250.port.dev = dev; + port8250.port.mapsize = resource_size(regs); + port8250.port.iotype = UPIO_MEM; + port8250.port.irqflags = IRQF_SHARED; + + port8250.port.membase = devm_ioremap(dev, port8250.port.mapbase, + port8250.port.mapsize); + if (!port8250.port.membase) + return -ENOMEM; + + data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + data->line = serial8250_register_8250_port(&port8250); + if (data->line < 0) + return data->line; + + platform_set_drvdata(pdev, data); + return 0; +} + +static int fsl8250_acpi_remove(struct platform_device *pdev) +{ + struct fsl8250_data *data = platform_get_drvdata(pdev); + + serial8250_unregister_port(data->line); + return 0; +} + +static const struct acpi_device_id fsl_8250_acpi_id[] = { + { "NXP0018", 0 }, + { }, +}; +MODULE_DEVICE_TABLE(acpi, fsl_8250_acpi_id); + +static struct platform_driver fsl8250_platform_driver = { + .driver = { + .name = "fsl-16550-uart", + .acpi_match_table = ACPI_PTR(fsl_8250_acpi_id), + }, + .probe = fsl8250_acpi_probe, + .remove = fsl8250_acpi_remove, +}; + +module_platform_driver(fsl8250_platform_driver); +#endif From c3647f2f30c875830fe972141a96b75a0b8df1a6 Mon Sep 17 00:00:00 2001 From: Christophe JAILLET Date: Thu, 6 Aug 2020 08:05:07 +0200 Subject: [PATCH 103/433] tty: serial: icom: switch from 'pci_' to 'dma_' API The wrappers in include/linux/pci-dma-compat.h should go away. The patch has been generated with the coccinelle script below and has been hand modified to replace GFP_ with a correct flag. It has been compile tested. When memory is allocated in 'get_port_memory()', GFP_KERNEL can be used because it is only called from a probe function and no lock is acquired. The call chain is: icom_probe (the probe function) --> icom_load_ports --> get_port_memory When memory is allocated in 'load_code()', GFP_KERNEL can be used because it is only called from a .startup function. icom_open (the .startup function of struct uart_ops) --> startup --> load_code .startup functions are protected using a semaphore and no spinlock is taken. @@ @@ - PCI_DMA_BIDIRECTIONAL + DMA_BIDIRECTIONAL @@ @@ - PCI_DMA_TODEVICE + DMA_TO_DEVICE @@ @@ - PCI_DMA_FROMDEVICE + DMA_FROM_DEVICE @@ @@ - PCI_DMA_NONE + DMA_NONE @@ expression e1, e2, e3; @@ - pci_alloc_consistent(e1, e2, e3) + dma_alloc_coherent(&e1->dev, e2, e3, GFP_) @@ expression e1, e2, e3; @@ - pci_zalloc_consistent(e1, e2, e3) + dma_alloc_coherent(&e1->dev, e2, e3, GFP_) @@ expression e1, e2, e3, e4; @@ - pci_free_consistent(e1, e2, e3, e4) + dma_free_coherent(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_map_single(e1, e2, e3, e4) + dma_map_single(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_unmap_single(e1, e2, e3, e4) + dma_unmap_single(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4, e5; @@ - pci_map_page(e1, e2, e3, e4, e5) + dma_map_page(&e1->dev, e2, e3, e4, e5) @@ expression e1, e2, e3, e4; @@ - pci_unmap_page(e1, e2, e3, e4) + dma_unmap_page(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_map_sg(e1, e2, e3, e4) + dma_map_sg(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_unmap_sg(e1, e2, e3, e4) + dma_unmap_sg(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_single_for_cpu(e1, e2, e3, e4) + dma_sync_single_for_cpu(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_single_for_device(e1, e2, e3, e4) + dma_sync_single_for_device(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_sg_for_cpu(e1, e2, e3, e4) + dma_sync_sg_for_cpu(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_sg_for_device(e1, e2, e3, e4) + dma_sync_sg_for_device(&e1->dev, e2, e3, e4) @@ expression e1, e2; @@ - pci_dma_mapping_error(e1, e2) + dma_mapping_error(&e1->dev, e2) @@ expression e1, e2; @@ - pci_set_dma_mask(e1, e2) + dma_set_mask(&e1->dev, e2) @@ expression e1, e2; @@ - pci_set_consistent_dma_mask(e1, e2) + dma_set_coherent_mask(&e1->dev, e2) Signed-off-by: Christophe JAILLET Link: https://lore.kernel.org/r/20200806060507.730142-1-christophe.jaillet@wanadoo.fr Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/icom.c | 32 ++++++++++++++++++-------------- 1 file changed, 18 insertions(+), 14 deletions(-) diff --git a/drivers/tty/serial/icom.c b/drivers/tty/serial/icom.c index 624f3d541c68..94c8281ddb5f 100644 --- a/drivers/tty/serial/icom.c +++ b/drivers/tty/serial/icom.c @@ -138,24 +138,24 @@ static void free_port_memory(struct icom_port *icom_port) trace(icom_port, "RET_PORT_MEM", 0); if (icom_port->recv_buf) { - pci_free_consistent(dev, 4096, icom_port->recv_buf, - icom_port->recv_buf_pci); + dma_free_coherent(&dev->dev, 4096, icom_port->recv_buf, + icom_port->recv_buf_pci); icom_port->recv_buf = NULL; } if (icom_port->xmit_buf) { - pci_free_consistent(dev, 4096, icom_port->xmit_buf, - icom_port->xmit_buf_pci); + dma_free_coherent(&dev->dev, 4096, icom_port->xmit_buf, + icom_port->xmit_buf_pci); icom_port->xmit_buf = NULL; } if (icom_port->statStg) { - pci_free_consistent(dev, 4096, icom_port->statStg, - icom_port->statStg_pci); + dma_free_coherent(&dev->dev, 4096, icom_port->statStg, + icom_port->statStg_pci); icom_port->statStg = NULL; } if (icom_port->xmitRestart) { - pci_free_consistent(dev, 4096, icom_port->xmitRestart, - icom_port->xmitRestart_pci); + dma_free_coherent(&dev->dev, 4096, icom_port->xmitRestart, + icom_port->xmitRestart_pci); icom_port->xmitRestart = NULL; } } @@ -169,7 +169,8 @@ static int get_port_memory(struct icom_port *icom_port) struct pci_dev *dev = icom_port->adapter->pci_dev; icom_port->xmit_buf = - pci_alloc_consistent(dev, 4096, &icom_port->xmit_buf_pci); + dma_alloc_coherent(&dev->dev, 4096, &icom_port->xmit_buf_pci, + GFP_KERNEL); if (!icom_port->xmit_buf) { dev_err(&dev->dev, "Can not allocate Transmit buffer\n"); return -ENOMEM; @@ -179,7 +180,8 @@ static int get_port_memory(struct icom_port *icom_port) (unsigned long) icom_port->xmit_buf); icom_port->recv_buf = - pci_alloc_consistent(dev, 4096, &icom_port->recv_buf_pci); + dma_alloc_coherent(&dev->dev, 4096, &icom_port->recv_buf_pci, + GFP_KERNEL); if (!icom_port->recv_buf) { dev_err(&dev->dev, "Can not allocate Receive buffer\n"); free_port_memory(icom_port); @@ -189,7 +191,8 @@ static int get_port_memory(struct icom_port *icom_port) (unsigned long) icom_port->recv_buf); icom_port->statStg = - pci_alloc_consistent(dev, 4096, &icom_port->statStg_pci); + dma_alloc_coherent(&dev->dev, 4096, &icom_port->statStg_pci, + GFP_KERNEL); if (!icom_port->statStg) { dev_err(&dev->dev, "Can not allocate Status buffer\n"); free_port_memory(icom_port); @@ -199,7 +202,8 @@ static int get_port_memory(struct icom_port *icom_port) (unsigned long) icom_port->statStg); icom_port->xmitRestart = - pci_alloc_consistent(dev, 4096, &icom_port->xmitRestart_pci); + dma_alloc_coherent(&dev->dev, 4096, &icom_port->xmitRestart_pci, + GFP_KERNEL); if (!icom_port->xmitRestart) { dev_err(&dev->dev, "Can not allocate xmit Restart buffer\n"); @@ -414,7 +418,7 @@ static void load_code(struct icom_port *icom_port) /*Set up data in icom DRAM to indicate where personality *code is located and its length. */ - new_page = pci_alloc_consistent(dev, 4096, &temp_pci); + new_page = dma_alloc_coherent(&dev->dev, 4096, &temp_pci, GFP_KERNEL); if (!new_page) { dev_err(&dev->dev, "Can not allocate DMA buffer\n"); @@ -494,7 +498,7 @@ static void load_code(struct icom_port *icom_port) } if (new_page != NULL) - pci_free_consistent(dev, 4096, new_page, temp_pci); + dma_free_coherent(&dev->dev, 4096, new_page, temp_pci); } static int startup(struct icom_port *icom_port) From 68778cab29bf27a60b67f55d6f4710d9fa906eab Mon Sep 17 00:00:00 2001 From: Christophe JAILLET Date: Thu, 6 Aug 2020 07:44:04 +0200 Subject: [PATCH 104/433] tty: synclink_gt: switch from 'pci_' to 'dma_' API The wrappers in include/linux/pci-dma-compat.h should go away. The patch has been generated with the coccinelle script below and has been hand modified to replace GFP_ with a correct flag. It has been compile tested. When memory is allocated in 'alloc_desc()' and 'alloc_bufs()', GFP_KERNEL can be used because it is only called from a probe function and no lock is acquired. The call chain is: init_one (the probe function) --> device_init --> alloc_dma_bufs --> alloc_desc --> alloc_bufs @@ @@ - PCI_DMA_BIDIRECTIONAL + DMA_BIDIRECTIONAL @@ @@ - PCI_DMA_TODEVICE + DMA_TO_DEVICE @@ @@ - PCI_DMA_FROMDEVICE + DMA_FROM_DEVICE @@ @@ - PCI_DMA_NONE + DMA_NONE @@ expression e1, e2, e3; @@ - pci_alloc_consistent(e1, e2, e3) + dma_alloc_coherent(&e1->dev, e2, e3, GFP_) @@ expression e1, e2, e3; @@ - pci_zalloc_consistent(e1, e2, e3) + dma_alloc_coherent(&e1->dev, e2, e3, GFP_) @@ expression e1, e2, e3, e4; @@ - pci_free_consistent(e1, e2, e3, e4) + dma_free_coherent(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_map_single(e1, e2, e3, e4) + dma_map_single(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_unmap_single(e1, e2, e3, e4) + dma_unmap_single(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4, e5; @@ - pci_map_page(e1, e2, e3, e4, e5) + dma_map_page(&e1->dev, e2, e3, e4, e5) @@ expression e1, e2, e3, e4; @@ - pci_unmap_page(e1, e2, e3, e4) + dma_unmap_page(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_map_sg(e1, e2, e3, e4) + dma_map_sg(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_unmap_sg(e1, e2, e3, e4) + dma_unmap_sg(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_single_for_cpu(e1, e2, e3, e4) + dma_sync_single_for_cpu(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_single_for_device(e1, e2, e3, e4) + dma_sync_single_for_device(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_sg_for_cpu(e1, e2, e3, e4) + dma_sync_sg_for_cpu(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_sg_for_device(e1, e2, e3, e4) + dma_sync_sg_for_device(&e1->dev, e2, e3, e4) @@ expression e1, e2; @@ - pci_dma_mapping_error(e1, e2) + dma_mapping_error(&e1->dev, e2) @@ expression e1, e2; @@ - pci_set_dma_mask(e1, e2) + dma_set_mask(&e1->dev, e2) @@ expression e1, e2; @@ - pci_set_consistent_dma_mask(e1, e2) + dma_set_coherent_mask(&e1->dev, e2) Signed-off-by: Christophe JAILLET Reviewed-by: Jiri Slaby Link: https://lore.kernel.org/r/20200806054404.728854-1-christophe.jaillet@wanadoo.fr Signed-off-by: Greg Kroah-Hartman --- drivers/tty/synclink_gt.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/drivers/tty/synclink_gt.c b/drivers/tty/synclink_gt.c index 917cc611ad25..afa4cc52e48d 100644 --- a/drivers/tty/synclink_gt.c +++ b/drivers/tty/synclink_gt.c @@ -3338,8 +3338,8 @@ static int alloc_desc(struct slgt_info *info) unsigned int pbufs; /* allocate memory to hold descriptor lists */ - info->bufs = pci_zalloc_consistent(info->pdev, DESC_LIST_SIZE, - &info->bufs_dma_addr); + info->bufs = dma_alloc_coherent(&info->pdev->dev, DESC_LIST_SIZE, + &info->bufs_dma_addr, GFP_KERNEL); if (info->bufs == NULL) return -ENOMEM; @@ -3381,7 +3381,8 @@ static int alloc_desc(struct slgt_info *info) static void free_desc(struct slgt_info *info) { if (info->bufs != NULL) { - pci_free_consistent(info->pdev, DESC_LIST_SIZE, info->bufs, info->bufs_dma_addr); + dma_free_coherent(&info->pdev->dev, DESC_LIST_SIZE, + info->bufs, info->bufs_dma_addr); info->bufs = NULL; info->rbufs = NULL; info->tbufs = NULL; @@ -3392,7 +3393,9 @@ static int alloc_bufs(struct slgt_info *info, struct slgt_desc *bufs, int count) { int i; for (i=0; i < count; i++) { - if ((bufs[i].buf = pci_alloc_consistent(info->pdev, DMABUFSIZE, &bufs[i].buf_dma_addr)) == NULL) + bufs[i].buf = dma_alloc_coherent(&info->pdev->dev, DMABUFSIZE, + &bufs[i].buf_dma_addr, GFP_KERNEL); + if (!bufs[i].buf) return -ENOMEM; bufs[i].pbuf = cpu_to_le32((unsigned int)bufs[i].buf_dma_addr); } @@ -3405,7 +3408,8 @@ static void free_bufs(struct slgt_info *info, struct slgt_desc *bufs, int count) for (i=0; i < count; i++) { if (bufs[i].buf == NULL) continue; - pci_free_consistent(info->pdev, DMABUFSIZE, bufs[i].buf, bufs[i].buf_dma_addr); + dma_free_coherent(&info->pdev->dev, DMABUFSIZE, bufs[i].buf, + bufs[i].buf_dma_addr); bufs[i].buf = NULL; } } From db332356222d9429731ab9395c89cca403828460 Mon Sep 17 00:00:00 2001 From: Tong Zhang Date: Fri, 21 Aug 2020 12:19:40 -0400 Subject: [PATCH 105/433] tty: ipwireless: fix error handling ipwireless_send_packet() can only return 0 on success and -ENOMEM on error, the caller should check non zero for error condition Signed-off-by: Tong Zhang Acked-by: David Sterba Link: https://lore.kernel.org/r/20200821161942.36589-1-ztong0001@gmail.com Signed-off-by: Greg Kroah-Hartman --- drivers/tty/ipwireless/network.c | 4 ++-- drivers/tty/ipwireless/tty.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/tty/ipwireless/network.c b/drivers/tty/ipwireless/network.c index cf20616340a1..fe569f6294a2 100644 --- a/drivers/tty/ipwireless/network.c +++ b/drivers/tty/ipwireless/network.c @@ -117,7 +117,7 @@ static int ipwireless_ppp_start_xmit(struct ppp_channel *ppp_channel, skb->len, notify_packet_sent, network); - if (ret == -1) { + if (ret < 0) { skb_pull(skb, 2); return 0; } @@ -134,7 +134,7 @@ static int ipwireless_ppp_start_xmit(struct ppp_channel *ppp_channel, notify_packet_sent, network); kfree(buf); - if (ret == -1) + if (ret < 0) return 0; } kfree_skb(skb); diff --git a/drivers/tty/ipwireless/tty.c b/drivers/tty/ipwireless/tty.c index fad3401e604d..23584769fc29 100644 --- a/drivers/tty/ipwireless/tty.c +++ b/drivers/tty/ipwireless/tty.c @@ -218,7 +218,7 @@ static int ipw_write(struct tty_struct *linux_tty, ret = ipwireless_send_packet(tty->hardware, IPW_CHANNEL_RAS, buf, count, ipw_write_packet_sent_callback, tty); - if (ret == -1) { + if (ret < 0) { mutex_unlock(&tty->ipw_tty_mutex); return 0; } From 63ffcbdad738e3d1c857027789a2273df3337624 Mon Sep 17 00:00:00 2001 From: Tyrel Datwyler Date: Thu, 20 Aug 2020 18:46:38 -0500 Subject: [PATCH 106/433] tty: hvcs: Don't NULL tty->driver_data until hvcs_cleanup() The code currently NULLs tty->driver_data in hvcs_close() with the intent of informing the next call to hvcs_open() that device needs to be reconfigured. However, when hvcs_cleanup() is called we copy hvcsd from tty->driver_data which was previoulsy NULLed by hvcs_close() and our call to tty_port_put(&hvcsd->port) doesn't actually do anything since &hvcsd->port ends up translating to NULL by chance. This has the side effect that when hvcs_remove() is called we have one too many port references preventing hvcs_destuct_port() from ever being called. This also prevents us from reusing the /dev/hvcsX node in a future hvcs_probe() and we can eventually run out of /dev/hvcsX devices. Fix this by waiting to NULL tty->driver_data in hvcs_cleanup(). Fixes: 27bf7c43a19c ("TTY: hvcs, add tty install") Signed-off-by: Tyrel Datwyler Link: https://lore.kernel.org/r/20200820234643.70412-1-tyreld@linux.ibm.com Signed-off-by: Greg Kroah-Hartman --- drivers/tty/hvc/hvcs.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/tty/hvc/hvcs.c b/drivers/tty/hvc/hvcs.c index 55105ac38f89..509d1042825a 100644 --- a/drivers/tty/hvc/hvcs.c +++ b/drivers/tty/hvc/hvcs.c @@ -1216,13 +1216,6 @@ static void hvcs_close(struct tty_struct *tty, struct file *filp) tty_wait_until_sent(tty, HVCS_CLOSE_WAIT); - /* - * This line is important because it tells hvcs_open that this - * device needs to be re-configured the next time hvcs_open is - * called. - */ - tty->driver_data = NULL; - free_irq(irq, hvcsd); return; } else if (hvcsd->port.count < 0) { @@ -1237,6 +1230,13 @@ static void hvcs_cleanup(struct tty_struct * tty) { struct hvcs_struct *hvcsd = tty->driver_data; + /* + * This line is important because it tells hvcs_open that this + * device needs to be re-configured the next time hvcs_open is + * called. + */ + tty->driver_data = NULL; + tty_port_put(&hvcsd->port); } From 71a174b39f10b4b93223d374722aa894b5d8a82e Mon Sep 17 00:00:00 2001 From: Artem Savkov Date: Wed, 2 Sep 2020 14:00:45 +0200 Subject: [PATCH 107/433] pty: do tty_flip_buffer_push without port->lock in pty_write b6da31b2c07c "tty: Fix data race in tty_insert_flip_string_fixed_flag" puts tty_flip_buffer_push under port->lock introducing the following possible circular locking dependency: [30129.876566] ====================================================== [30129.876566] WARNING: possible circular locking dependency detected [30129.876567] 5.9.0-rc2+ #3 Tainted: G S W [30129.876568] ------------------------------------------------------ [30129.876568] sysrq.sh/1222 is trying to acquire lock: [30129.876569] ffffffff92c39480 (console_owner){....}-{0:0}, at: console_unlock+0x3fe/0xa90 [30129.876572] but task is already holding lock: [30129.876572] ffff888107cb9018 (&pool->lock/1){-.-.}-{2:2}, at: show_workqueue_state.cold.55+0x15b/0x6ca [30129.876576] which lock already depends on the new lock. [30129.876577] the existing dependency chain (in reverse order) is: [30129.876578] -> #3 (&pool->lock/1){-.-.}-{2:2}: [30129.876581] _raw_spin_lock+0x30/0x70 [30129.876581] __queue_work+0x1a3/0x10f0 [30129.876582] queue_work_on+0x78/0x80 [30129.876582] pty_write+0x165/0x1e0 [30129.876583] n_tty_write+0x47f/0xf00 [30129.876583] tty_write+0x3d6/0x8d0 [30129.876584] vfs_write+0x1a8/0x650 [30129.876588] -> #2 (&port->lock#2){-.-.}-{2:2}: [30129.876590] _raw_spin_lock_irqsave+0x3b/0x80 [30129.876591] tty_port_tty_get+0x1d/0xb0 [30129.876592] tty_port_default_wakeup+0xb/0x30 [30129.876592] serial8250_tx_chars+0x3d6/0x970 [30129.876593] serial8250_handle_irq.part.12+0x216/0x380 [30129.876593] serial8250_default_handle_irq+0x82/0xe0 [30129.876594] serial8250_interrupt+0xdd/0x1b0 [30129.876595] __handle_irq_event_percpu+0xfc/0x850 [30129.876602] -> #1 (&port->lock){-.-.}-{2:2}: [30129.876605] _raw_spin_lock_irqsave+0x3b/0x80 [30129.876605] serial8250_console_write+0x12d/0x900 [30129.876606] console_unlock+0x679/0xa90 [30129.876606] register_console+0x371/0x6e0 [30129.876607] univ8250_console_init+0x24/0x27 [30129.876607] console_init+0x2f9/0x45e [30129.876609] -> #0 (console_owner){....}-{0:0}: [30129.876611] __lock_acquire+0x2f70/0x4e90 [30129.876612] lock_acquire+0x1ac/0xad0 [30129.876612] console_unlock+0x460/0xa90 [30129.876613] vprintk_emit+0x130/0x420 [30129.876613] printk+0x9f/0xc5 [30129.876614] show_pwq+0x154/0x618 [30129.876615] show_workqueue_state.cold.55+0x193/0x6ca [30129.876615] __handle_sysrq+0x244/0x460 [30129.876616] write_sysrq_trigger+0x48/0x4a [30129.876616] proc_reg_write+0x1a6/0x240 [30129.876617] vfs_write+0x1a8/0x650 [30129.876619] other info that might help us debug this: [30129.876620] Chain exists of: [30129.876621] console_owner --> &port->lock#2 --> &pool->lock/1 [30129.876625] Possible unsafe locking scenario: [30129.876626] CPU0 CPU1 [30129.876626] ---- ---- [30129.876627] lock(&pool->lock/1); [30129.876628] lock(&port->lock#2); [30129.876630] lock(&pool->lock/1); [30129.876631] lock(console_owner); [30129.876633] *** DEADLOCK *** [30129.876634] 5 locks held by sysrq.sh/1222: [30129.876634] #0: ffff8881d3ce0470 (sb_writers#3){.+.+}-{0:0}, at: vfs_write+0x359/0x650 [30129.876637] #1: ffffffff92c612c0 (rcu_read_lock){....}-{1:2}, at: __handle_sysrq+0x4d/0x460 [30129.876640] #2: ffffffff92c612c0 (rcu_read_lock){....}-{1:2}, at: show_workqueue_state+0x5/0xf0 [30129.876642] #3: ffff888107cb9018 (&pool->lock/1){-.-.}-{2:2}, at: show_workqueue_state.cold.55+0x15b/0x6ca [30129.876645] #4: ffffffff92c39980 (console_lock){+.+.}-{0:0}, at: vprintk_emit+0x123/0x420 [30129.876648] stack backtrace: [30129.876649] CPU: 3 PID: 1222 Comm: sysrq.sh Tainted: G S W 5.9.0-rc2+ #3 [30129.876649] Hardware name: Intel Corporation 2012 Client Platform/Emerald Lake 2, BIOS ACRVMBY1.86C.0078.P00.1201161002 01/16/2012 [30129.876650] Call Trace: [30129.876650] dump_stack+0x9d/0xe0 [30129.876651] check_noncircular+0x34f/0x410 [30129.876653] __lock_acquire+0x2f70/0x4e90 [30129.876656] lock_acquire+0x1ac/0xad0 [30129.876658] console_unlock+0x460/0xa90 [30129.876660] vprintk_emit+0x130/0x420 [30129.876660] printk+0x9f/0xc5 [30129.876661] show_pwq+0x154/0x618 [30129.876662] show_workqueue_state.cold.55+0x193/0x6ca [30129.876664] __handle_sysrq+0x244/0x460 [30129.876665] write_sysrq_trigger+0x48/0x4a [30129.876665] proc_reg_write+0x1a6/0x240 [30129.876666] vfs_write+0x1a8/0x650 It looks like the commit was aimed to protect tty_insert_flip_string and there is no need for tty_flip_buffer_push to be under this lock. Fixes: b6da31b2c07c ("tty: Fix data race in tty_insert_flip_string_fixed_flag") Signed-off-by: Artem Savkov Acked-by: Jiri Slaby Link: https://lore.kernel.org/r/20200902120045.3693075-1-asavkov@redhat.com Signed-off-by: Greg Kroah-Hartman --- drivers/tty/pty.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/tty/pty.c b/drivers/tty/pty.c index b6d8cc7f0f16..23368cec7ee8 100644 --- a/drivers/tty/pty.c +++ b/drivers/tty/pty.c @@ -120,10 +120,10 @@ static int pty_write(struct tty_struct *tty, const unsigned char *buf, int c) spin_lock_irqsave(&to->port->lock, flags); /* Stuff the data into the input queue of the other end */ c = tty_insert_flip_string(to->port, buf, c); + spin_unlock_irqrestore(&to->port->lock, flags); /* And shovel */ if (c) tty_flip_buffer_push(to->port); - spin_unlock_irqrestore(&to->port->lock, flags); } return c; } From 51fae39bd5018e4f6d3e65a1a1a8ad40b5ee3662 Mon Sep 17 00:00:00 2001 From: Saravana Kannan Date: Tue, 1 Sep 2020 15:48:42 -0700 Subject: [PATCH 108/433] scripts/dev-needs: Add script to list device dependencies This script can be useful for: - Figuring out the list of modules you need to pack in initrd - Figuring out the list of drivers you need to modularize for a device to be fully functional without building in any dependencies. - Figuring out which drivers to enable first, when porting drivers between kernels (say, to upstream). - Plotting graphs of system dependencies, etc. Usage: dev-needs.sh [-c|-d|-m|-f] [filter options] This script needs to be run on the target device once it has booted to a shell. The script takes as input a list of one or more device directories under /sys/devices and then lists the probe dependency chain (suppliers and parents) of these devices. It does a breadth first search of the dependency chain, so the last entry in the output is close to the root of the dependency chain. By default it lists the full path to the devices under /sys/devices. It also takes an optional modifier flag as the first parameter to change what information is listed in the output. If the requested information is not available, the device name is printed. -c lists the compatible string of the dependencies -d lists the driver name of the dependencies that have probed -m lists the module name of the dependencies that have a module -f list the firmware node path of the dependencies -g list the dependencies as edges and nodes for graphviz -t list the dependencies as edges for tsort The filter options provide a way to filter out some dependencies: --allow-no-driver By default dependencies that don't have a driver attached are ignored. This is to avoid following device links to "class" devices that are created when the consumer probes (as in, not a probe dependency). If you want to follow these links anyway, use this flag. --exclude-devlinks Don't follow device links when tracking probe dependencies. --exclude-parents Don't follow parent devices when tracking probe dependencies. Signed-off-by: Saravana Kannan Link: https://lore.kernel.org/r/20200901224842.1787825-1-saravanak@google.com Signed-off-by: Greg Kroah-Hartman --- MAINTAINERS | 6 + scripts/dev-needs.sh | 315 +++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 321 insertions(+) create mode 100755 scripts/dev-needs.sh diff --git a/MAINTAINERS b/MAINTAINERS index f0068bceeb61..4e4d9e3f9986 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -4994,6 +4994,12 @@ S: Maintained F: drivers/base/devcoredump.c F: include/linux/devcoredump.h +DEVICE DEPENDENCY HELPER SCRIPT +M: Saravana Kannan +L: linux-kernel@vger.kernel.org +S: Maintained +F: scripts/dev-needs.sh + DEVICE DIRECT ACCESS (DAX) M: Dan Williams M: Vishal Verma diff --git a/scripts/dev-needs.sh b/scripts/dev-needs.sh new file mode 100755 index 000000000000..454cc304fb44 --- /dev/null +++ b/scripts/dev-needs.sh @@ -0,0 +1,315 @@ +#! /bin/sh +# SPDX-License-Identifier: GPL-2.0 +# Copyright (c) 2020, Google LLC. All rights reserved. +# Author: Saravana Kannan + +function help() { + cat << EOF +Usage: $(basename $0) [-c|-d|-m|-f] [filter options] + +This script needs to be run on the target device once it has booted to a +shell. + +The script takes as input a list of one or more device directories under +/sys/devices and then lists the probe dependency chain (suppliers and +parents) of these devices. It does a breadth first search of the dependency +chain, so the last entry in the output is close to the root of the +dependency chain. + +By default it lists the full path to the devices under /sys/devices. + +It also takes an optional modifier flag as the first parameter to change +what information is listed in the output. If the requested information is +not available, the device name is printed. + + -c lists the compatible string of the dependencies + -d lists the driver name of the dependencies that have probed + -m lists the module name of the dependencies that have a module + -f list the firmware node path of the dependencies + -g list the dependencies as edges and nodes for graphviz + -t list the dependencies as edges for tsort + +The filter options provide a way to filter out some dependencies: + --allow-no-driver By default dependencies that don't have a driver + attached are ignored. This is to avoid following + device links to "class" devices that are created + when the consumer probes (as in, not a probe + dependency). If you want to follow these links + anyway, use this flag. + + --exclude-devlinks Don't follow device links when tracking probe + dependencies. + + --exclude-parents Don't follow parent devices when tracking probe + dependencies. + +EOF +} + +function dev_to_detail() { + local i=0 + while [ $i -lt ${#OUT_LIST[@]} ] + do + local C=${OUT_LIST[i]} + local S=${OUT_LIST[i+1]} + local D="'$(detail_chosen $C $S)'" + if [ ! -z "$D" ] + then + # This weirdness is needed to work with toybox when + # using the -t option. + printf '%05u\t%s\n' ${i} "$D" | tr -d \' + fi + i=$((i+2)) + done +} + +function already_seen() { + local i=0 + while [ $i -lt ${#OUT_LIST[@]} ] + do + if [ "$1" = "${OUT_LIST[$i]}" ] + then + # if-statement treats 0 (no-error) as true + return 0 + fi + i=$(($i+2)) + done + + # if-statement treats 1 (error) as false + return 1 +} + +# Return 0 (no-error/true) if parent was added +function add_parent() { + + if [ ${ALLOW_PARENTS} -eq 0 ] + then + return 1 + fi + + local CON=$1 + # $CON could be a symlink path. So, we need to find the real path and + # then go up one level to find the real parent. + local PARENT=$(realpath $CON/..) + + while [ ! -e ${PARENT}/driver ] + do + if [ "$PARENT" = "/sys/devices" ] + then + return 1 + fi + PARENT=$(realpath $PARENT/..) + done + + CONSUMERS+=($PARENT) + OUT_LIST+=(${CON} ${PARENT}) + return 0 +} + +# Return 0 (no-error/true) if one or more suppliers were added +function add_suppliers() { + local CON=$1 + local RET=1 + + if [ ${ALLOW_DEVLINKS} -eq 0 ] + then + return 1 + fi + + SUPPLIER_LINKS=$(ls -1d $CON/supplier:* 2>/dev/null) + for SL in $SUPPLIER_LINKS; + do + SYNC_STATE=$(cat $SL/sync_state_only) + + # sync_state_only links are proxy dependencies. + # They can also have cycles. So, don't follow them. + if [ "$SYNC_STATE" != '0' ] + then + continue + fi + + SUPPLIER=$(realpath $SL/supplier) + + if [ ! -e $SUPPLIER/driver -a ${ALLOW_NO_DRIVER} -eq 0 ] + then + continue + fi + + CONSUMERS+=($SUPPLIER) + OUT_LIST+=(${CON} ${SUPPLIER}) + RET=0 + done + + return $RET +} + +function detail_compat() { + f=$1/of_node/compatible + if [ -e $f ] + then + echo -n $(cat $f) + else + echo -n $1 + fi +} + +function detail_module() { + f=$1/driver/module + if [ -e $f ] + then + echo -n $(basename $(realpath $f)) + else + echo -n $1 + fi +} + +function detail_driver() { + f=$1/driver + if [ -e $f ] + then + echo -n $(basename $(realpath $f)) + else + echo -n $1 + fi +} + +function detail_fwnode() { + f=$1/firmware_node + if [ ! -e $f ] + then + f=$1/of_node + fi + + if [ -e $f ] + then + echo -n $(realpath $f) + else + echo -n $1 + fi +} + +function detail_graphviz() { + if [ "$2" != "ROOT" ] + then + echo -n "\"$(basename $2)\"->\"$(basename $1)\"" + else + echo -n "\"$(basename $1)\"" + fi +} + +function detail_tsort() { + echo -n "\"$2\" \"$1\"" +} + +function detail_device() { echo -n $1; } + +alias detail=detail_device +ALLOW_NO_DRIVER=0 +ALLOW_DEVLINKS=1 +ALLOW_PARENTS=1 + +while [ $# -gt 0 ] +do + ARG=$1 + case $ARG in + --help) + help + exit 0 + ;; + -c) + alias detail=detail_compat + ;; + -m) + alias detail=detail_module + ;; + -d) + alias detail=detail_driver + ;; + -f) + alias detail=detail_fwnode + ;; + -g) + alias detail=detail_graphviz + ;; + -t) + alias detail=detail_tsort + ;; + --allow-no-driver) + ALLOW_NO_DRIVER=1 + ;; + --exclude-devlinks) + ALLOW_DEVLINKS=0 + ;; + --exclude-parents) + ALLOW_PARENTS=0 + ;; + *) + # Stop at the first argument that's not an option. + break + ;; + esac + shift +done + +function detail_chosen() { + detail $1 $2 +} + +if [ $# -eq 0 ] +then + help + exit 1 +fi + +CONSUMERS=($@) +OUT_LIST=() + +# Do a breadth first, non-recursive tracking of suppliers. The parent is also +# considered a "supplier" as a device can't probe without its parent. +i=0 +while [ $i -lt ${#CONSUMERS[@]} ] +do + CONSUMER=$(realpath ${CONSUMERS[$i]}) + i=$(($i+1)) + + if already_seen ${CONSUMER} + then + continue + fi + + # If this is not a device with a driver, we don't care about its + # suppliers. + if [ ! -e ${CONSUMER}/driver -a ${ALLOW_NO_DRIVER} -eq 0 ] + then + continue + fi + + ROOT=1 + + # Add suppliers to CONSUMERS list and output the consumer details. + # + # We don't need to worry about a cycle in the dependency chain causing + # infinite loops. That's because the kernel doesn't allow cycles in + # device links unless it's a sync_state_only device link. And we ignore + # sync_state_only device links inside add_suppliers. + if add_suppliers ${CONSUMER} + then + ROOT=0 + fi + + if add_parent ${CONSUMER} + then + ROOT=0 + fi + + if [ $ROOT -eq 1 ] + then + OUT_LIST+=(${CONSUMER} "ROOT") + fi +done + +# Can NOT combine sort and uniq using sort -suk2 because stable sort in toybox +# isn't really stable. +dev_to_detail | sort -k2 -k1 | uniq -f 1 | sort | cut -f2- + +exit 0 From a0bf06dc51dbbc5ad182b1bcf4d879db8d297c5e Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Fri, 4 Sep 2020 19:21:41 +0200 Subject: [PATCH 109/433] pinctrl: cherryview: Preserve CHV_PADCTRL1_INVRXTX_TXDATA flag on GPIOs One some devices the GPIO should output the inverted value from what device-drivers / ACPI code expects. The reason for this is unknown, perhaps these systems use an external buffer chip on the GPIO which inverts the signal. The BIOS makes this work by setting the CHV_PADCTRL1_INVRXTX_TXDATA flag. Before this commit we would unconditionally clear all INVRXTX flags, including the CHV_PADCTRL1_INVRXTX_TXDATA flag when a GPIO is requested by a driver (from chv_gpio_request_enable()). This breaks systems using this setup. Specifically it is causing problems for systems with a goodix touchscreen, where the BIOS sets the INVRXTX_TXDATA flag on the GPIO used for the touchscreen's reset pin. The goodix touchscreen driver by defaults configures this pin as input (relying on the pull-up to keep it high), but the clearing of the INVRXTX_TXDATA flag done by chv_gpio_request_enable() causes it to be driven low for a brief time before the GPIO gets set to input mode. This causes the touchscreen controller to get reset. On most CHT devs with this touchscreen this leads to: [ 31.596534] Goodix-TS i2c-GDIX1001:00: i2c test failed attempt 1: -121 The driver retries this though and then everything is fine. But during reset the touchscreen uses its interrupt pin as bootstrap to determine which i2c address to use and on the Acer One S1003 the spurious reset caused by the clearing of the INVRXTX_TXDATA flag causes the controller to come back up again on the wrong i2c address, breaking things. This commit fixes both the -121 errors, as well as the total breakage on the Acer One S1003, by making chv_gpio_clear_triggering() not clear the INVRXTX_TXDATA flag if the pin is already configured as a GPIO. Note that chv_pinmux_set_mux() does still unconditionally clear the flag, so this only affects GPIO usage. Fixes: a7d4b171660c ("Input: goodix - add support for getting IRQ + reset GPIOs on Cherry Trail devices") Signed-off-by: Hans de Goede Acked-by: Mika Westerberg Signed-off-by: Andy Shevchenko --- drivers/pinctrl/intel/pinctrl-cherryview.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/intel/pinctrl-cherryview.c b/drivers/pinctrl/intel/pinctrl-cherryview.c index e48d4445e932..2ed17cdf946d 100644 --- a/drivers/pinctrl/intel/pinctrl-cherryview.c +++ b/drivers/pinctrl/intel/pinctrl-cherryview.c @@ -58,6 +58,7 @@ #define CHV_PADCTRL1_CFGLOCK BIT(31) #define CHV_PADCTRL1_INVRXTX_SHIFT 4 #define CHV_PADCTRL1_INVRXTX_MASK GENMASK(7, 4) +#define CHV_PADCTRL1_INVRXTX_TXDATA BIT(7) #define CHV_PADCTRL1_INVRXTX_RXDATA BIT(6) #define CHV_PADCTRL1_INVRXTX_TXENABLE BIT(5) #define CHV_PADCTRL1_ODEN BIT(3) @@ -768,11 +769,22 @@ static int chv_pinmux_set_mux(struct pinctrl_dev *pctldev, static void chv_gpio_clear_triggering(struct intel_pinctrl *pctrl, unsigned int offset) { + u32 invrxtx_mask = CHV_PADCTRL1_INVRXTX_MASK; u32 value; + /* + * One some devices the GPIO should output the inverted value from what + * device-drivers / ACPI code expects (inverted external buffer?). The + * BIOS makes this work by setting the CHV_PADCTRL1_INVRXTX_TXDATA flag, + * preserve this flag if the pin is already setup as GPIO. + */ + value = chv_readl(pctrl, offset, CHV_PADCTRL0); + if (value & CHV_PADCTRL0_GPIOEN) + invrxtx_mask &= ~CHV_PADCTRL1_INVRXTX_TXDATA; + value = chv_readl(pctrl, offset, CHV_PADCTRL1); value &= ~CHV_PADCTRL1_INTWAKECFG_MASK; - value &= ~CHV_PADCTRL1_INVRXTX_MASK; + value &= ~invrxtx_mask; chv_writel(pctrl, offset, CHV_PADCTRL1, value); } From 180c284ce4d66d2fb386b81bea59f01bc7be150a Mon Sep 17 00:00:00 2001 From: Heikki Krogerus Date: Fri, 4 Sep 2020 15:51:20 +0300 Subject: [PATCH 110/433] device connection: Remove device_connection_find() There are no users for that function. Signed-off-by: Heikki Krogerus Link: https://lore.kernel.org/r/20200904125123.83725-2-heikki.krogerus@linux.intel.com Signed-off-by: Greg Kroah-Hartman --- drivers/base/devcon.c | 73 ------------------------------------------ include/linux/device.h | 2 -- 2 files changed, 75 deletions(-) diff --git a/drivers/base/devcon.c b/drivers/base/devcon.c index 14e2178e09f8..51ad546303dd 100644 --- a/drivers/base/devcon.c +++ b/drivers/base/devcon.c @@ -133,79 +133,6 @@ void *device_connection_find_match(struct device *dev, const char *con_id, } EXPORT_SYMBOL_GPL(device_connection_find_match); -extern struct bus_type platform_bus_type; -extern struct bus_type pci_bus_type; -extern struct bus_type i2c_bus_type; -extern struct bus_type spi_bus_type; - -static struct bus_type *generic_match_buses[] = { - &platform_bus_type, -#ifdef CONFIG_PCI - &pci_bus_type, -#endif -#ifdef CONFIG_I2C - &i2c_bus_type, -#endif -#ifdef CONFIG_SPI_MASTER - &spi_bus_type, -#endif - NULL, -}; - -static void *device_connection_fwnode_match(struct device_connection *con) -{ - struct bus_type *bus; - struct device *dev; - - for (bus = generic_match_buses[0]; bus; bus++) { - dev = bus_find_device_by_fwnode(bus, con->fwnode); - if (dev && !strncmp(dev_name(dev), con->id, strlen(con->id))) - return dev; - - put_device(dev); - } - return NULL; -} - -/* This tries to find the device from the most common bus types by name. */ -static void *generic_match(struct device_connection *con, int ep, void *data) -{ - struct bus_type *bus; - struct device *dev; - - if (con->fwnode) - return device_connection_fwnode_match(con); - - for (bus = generic_match_buses[0]; bus; bus++) { - dev = bus_find_device_by_name(bus, NULL, con->endpoint[ep]); - if (dev) - return dev; - } - - /* - * We only get called if a connection was found, tell the caller to - * wait for the other device to show up. - */ - return ERR_PTR(-EPROBE_DEFER); -} - -/** - * device_connection_find - Find two devices connected together - * @dev: Device with the connection - * @con_id: Identifier for the connection - * - * Find a connection with unique identifier @con_id between @dev and - * another device. On success returns handle to the device that is connected - * to @dev, with the reference count for the found device incremented. Returns - * NULL if no matching connection was found, or ERR_PTR(-EPROBE_DEFER) when a - * connection was found but the other device has not been enumerated yet. - */ -struct device *device_connection_find(struct device *dev, const char *con_id) -{ - return device_connection_find_match(dev, con_id, NULL, generic_match); -} -EXPORT_SYMBOL_GPL(device_connection_find); - /** * device_connection_add - Register a connection description * @con: The connection description to be registered diff --git a/include/linux/device.h b/include/linux/device.h index ca18da4768e3..0704461e8aad 100644 --- a/include/linux/device.h +++ b/include/linux/device.h @@ -319,8 +319,6 @@ void *fwnode_connection_find_match(struct fwnode_handle *fwnode, void *device_connection_find_match(struct device *dev, const char *con_id, void *data, devcon_match_fn_t match); -struct device *device_connection_find(struct device *dev, const char *con_id); - void device_connection_add(struct device_connection *con); void device_connection_remove(struct device_connection *con); From 87ea5926247f7e15f0b5bc5b36cb210536177d77 Mon Sep 17 00:00:00 2001 From: Heikki Krogerus Date: Fri, 4 Sep 2020 15:51:21 +0300 Subject: [PATCH 111/433] device connection: Remove device_connection_add() All the users of that API have now been converted to use software fwnodes instead. Signed-off-by: Heikki Krogerus Link: https://lore.kernel.org/r/20200904125123.83725-3-heikki.krogerus@linux.intel.com Signed-off-by: Greg Kroah-Hartman --- drivers/base/devcon.c | 59 +----------------------------------------- include/linux/device.h | 29 --------------------- 2 files changed, 1 insertion(+), 87 deletions(-) diff --git a/drivers/base/devcon.c b/drivers/base/devcon.c index 51ad546303dd..94ab22a451ce 100644 --- a/drivers/base/devcon.c +++ b/drivers/base/devcon.c @@ -9,9 +9,6 @@ #include #include -static DEFINE_MUTEX(devcon_lock); -static LIST_HEAD(devcon_list); - static void * fwnode_graph_devcon_match(struct fwnode_handle *fwnode, const char *con_id, void *data, devcon_match_fn_t match) @@ -99,60 +96,6 @@ EXPORT_SYMBOL_GPL(fwnode_connection_find_match); void *device_connection_find_match(struct device *dev, const char *con_id, void *data, devcon_match_fn_t match) { - struct fwnode_handle *fwnode = dev_fwnode(dev); - const char *devname = dev_name(dev); - struct device_connection *con; - void *ret = NULL; - int ep; - - if (!match) - return NULL; - - ret = fwnode_connection_find_match(fwnode, con_id, data, match); - if (ret) - return ret; - - mutex_lock(&devcon_lock); - - list_for_each_entry(con, &devcon_list, list) { - ep = match_string(con->endpoint, 2, devname); - if (ep < 0) - continue; - - if (con_id && strcmp(con->id, con_id)) - continue; - - ret = match(con, !ep, data); - if (ret) - break; - } - - mutex_unlock(&devcon_lock); - - return ret; + return fwnode_connection_find_match(dev_fwnode(dev), con_id, data, match); } EXPORT_SYMBOL_GPL(device_connection_find_match); - -/** - * device_connection_add - Register a connection description - * @con: The connection description to be registered - */ -void device_connection_add(struct device_connection *con) -{ - mutex_lock(&devcon_lock); - list_add_tail(&con->list, &devcon_list); - mutex_unlock(&devcon_lock); -} -EXPORT_SYMBOL_GPL(device_connection_add); - -/** - * device_connections_remove - Unregister connection description - * @con: The connection description to be unregistered - */ -void device_connection_remove(struct device_connection *con) -{ - mutex_lock(&devcon_lock); - list_del(&con->list); - mutex_unlock(&devcon_lock); -} -EXPORT_SYMBOL_GPL(device_connection_remove); diff --git a/include/linux/device.h b/include/linux/device.h index 0704461e8aad..ea37debb0a98 100644 --- a/include/linux/device.h +++ b/include/linux/device.h @@ -297,7 +297,6 @@ struct device_dma_parameters { * @fwnode: The device node of the connected device * @endpoint: The names of the two devices connected together * @id: Unique identifier for the connection - * @list: List head, private, for internal use only * * NOTE: @fwnode is not used together with @endpoint. @fwnode is used when * platform firmware defines the connection. When the connection is registered @@ -307,7 +306,6 @@ struct device_connection { struct fwnode_handle *fwnode; const char *endpoint[2]; const char *id; - struct list_head list; }; typedef void *(*devcon_match_fn_t)(struct device_connection *con, int ep, @@ -319,33 +317,6 @@ void *fwnode_connection_find_match(struct fwnode_handle *fwnode, void *device_connection_find_match(struct device *dev, const char *con_id, void *data, devcon_match_fn_t match); -void device_connection_add(struct device_connection *con); -void device_connection_remove(struct device_connection *con); - -/** - * device_connections_add - Add multiple device connections at once - * @cons: Zero terminated array of device connection descriptors - */ -static inline void device_connections_add(struct device_connection *cons) -{ - struct device_connection *c; - - for (c = cons; c->endpoint[0]; c++) - device_connection_add(c); -} - -/** - * device_connections_remove - Remove multiple device connections at once - * @cons: Zero terminated array of device connection descriptors - */ -static inline void device_connections_remove(struct device_connection *cons) -{ - struct device_connection *c; - - for (c = cons; c->endpoint[0]; c++) - device_connection_remove(c); -} - /** * enum device_link_state - Device link states. * @DL_STATE_NONE: The presence of the drivers is not being tracked. From f5514c91e9f72b719bfec64af6acac5ad41df7b5 Mon Sep 17 00:00:00 2001 From: Heikki Krogerus Date: Fri, 4 Sep 2020 15:51:22 +0300 Subject: [PATCH 112/433] device connection: Remove struct device_connection Since the connection descriptors can't be stored into the list anymore, there is no need for the data structure. Signed-off-by: Heikki Krogerus Link: https://lore.kernel.org/r/20200904125123.83725-4-heikki.krogerus@linux.intel.com Signed-off-by: Greg Kroah-Hartman --- drivers/base/devcon.c | 20 ++++++++++---------- drivers/usb/roles/class.c | 12 ++++-------- drivers/usb/typec/mux.c | 19 ++++++++++--------- include/linux/device.h | 18 +----------------- 4 files changed, 25 insertions(+), 44 deletions(-) diff --git a/drivers/base/devcon.c b/drivers/base/devcon.c index 94ab22a451ce..1790e84dbe7c 100644 --- a/drivers/base/devcon.c +++ b/drivers/base/devcon.c @@ -13,17 +13,17 @@ static void * fwnode_graph_devcon_match(struct fwnode_handle *fwnode, const char *con_id, void *data, devcon_match_fn_t match) { - struct device_connection con = { .id = con_id }; + struct fwnode_handle *node; struct fwnode_handle *ep; void *ret; fwnode_graph_for_each_endpoint(fwnode, ep) { - con.fwnode = fwnode_graph_get_remote_port_parent(ep); - if (!fwnode_device_is_available(con.fwnode)) + node = fwnode_graph_get_remote_port_parent(ep); + if (!fwnode_device_is_available(node)) continue; - ret = match(&con, -1, data); - fwnode_handle_put(con.fwnode); + ret = match(node, con_id, data); + fwnode_handle_put(node); if (ret) { fwnode_handle_put(ep); return ret; @@ -36,17 +36,17 @@ static void * fwnode_devcon_match(struct fwnode_handle *fwnode, const char *con_id, void *data, devcon_match_fn_t match) { - struct device_connection con = { }; + struct fwnode_handle *node; void *ret; int i; for (i = 0; ; i++) { - con.fwnode = fwnode_find_reference(fwnode, con_id, i); - if (IS_ERR(con.fwnode)) + node = fwnode_find_reference(fwnode, con_id, i); + if (IS_ERR(node)) break; - ret = match(&con, -1, data); - fwnode_handle_put(con.fwnode); + ret = match(node, NULL, data); + fwnode_handle_put(node); if (ret) return ret; } diff --git a/drivers/usb/roles/class.c b/drivers/usb/roles/class.c index 27d92af29635..97f37077b7f9 100644 --- a/drivers/usb/roles/class.c +++ b/drivers/usb/roles/class.c @@ -87,19 +87,15 @@ enum usb_role usb_role_switch_get_role(struct usb_role_switch *sw) } EXPORT_SYMBOL_GPL(usb_role_switch_get_role); -static void *usb_role_switch_match(struct device_connection *con, int ep, +static void *usb_role_switch_match(struct fwnode_handle *fwnode, const char *id, void *data) { struct device *dev; - if (con->fwnode) { - if (con->id && !fwnode_property_present(con->fwnode, con->id)) - return NULL; + if (id && !fwnode_property_present(fwnode, id)) + return NULL; - dev = class_find_device_by_fwnode(role_class, con->fwnode); - } else { - dev = class_find_device_by_name(role_class, con->endpoint[ep]); - } + dev = class_find_device_by_fwnode(role_class, fwnode); return dev ? to_role_switch(dev) : ERR_PTR(-EPROBE_DEFER); } diff --git a/drivers/usb/typec/mux.c b/drivers/usb/typec/mux.c index 52ad277e4565..b069a5122aaa 100644 --- a/drivers/usb/typec/mux.c +++ b/drivers/usb/typec/mux.c @@ -34,15 +34,15 @@ static int switch_fwnode_match(struct device *dev, const void *fwnode) return dev_fwnode(dev) == fwnode && dev_name_ends_with(dev, "-switch"); } -static void *typec_switch_match(struct device_connection *con, int ep, +static void *typec_switch_match(struct fwnode_handle *fwnode, const char *id, void *data) { struct device *dev; - if (con->id && !fwnode_property_present(con->fwnode, con->id)) + if (id && !fwnode_property_present(fwnode, id)) return NULL; - dev = class_find_device(&typec_mux_class, NULL, con->fwnode, + dev = class_find_device(&typec_mux_class, NULL, fwnode, switch_fwnode_match); return dev ? to_typec_switch(dev) : ERR_PTR(-EPROBE_DEFER); @@ -183,7 +183,8 @@ static int mux_fwnode_match(struct device *dev, const void *fwnode) return dev_fwnode(dev) == fwnode && dev_name_ends_with(dev, "-mux"); } -static void *typec_mux_match(struct device_connection *con, int ep, void *data) +static void *typec_mux_match(struct fwnode_handle *fwnode, const char *id, + void *data) { const struct typec_altmode_desc *desc = data; struct device *dev; @@ -196,20 +197,20 @@ static void *typec_mux_match(struct device_connection *con, int ep, void *data) * Check has the identifier already been "consumed". If it * has, no need to do any extra connection identification. */ - match = !con->id; + match = !id; if (match) goto find_mux; /* Accessory Mode muxes */ if (!desc) { - match = fwnode_property_present(con->fwnode, "accessory"); + match = fwnode_property_present(fwnode, "accessory"); if (match) goto find_mux; return NULL; } /* Alternate Mode muxes */ - nval = fwnode_property_count_u16(con->fwnode, "svid"); + nval = fwnode_property_count_u16(fwnode, "svid"); if (nval <= 0) return NULL; @@ -217,7 +218,7 @@ static void *typec_mux_match(struct device_connection *con, int ep, void *data) if (!val) return ERR_PTR(-ENOMEM); - nval = fwnode_property_read_u16_array(con->fwnode, "svid", val, nval); + nval = fwnode_property_read_u16_array(fwnode, "svid", val, nval); if (nval < 0) { kfree(val); return ERR_PTR(nval); @@ -234,7 +235,7 @@ static void *typec_mux_match(struct device_connection *con, int ep, void *data) return NULL; find_mux: - dev = class_find_device(&typec_mux_class, NULL, con->fwnode, + dev = class_find_device(&typec_mux_class, NULL, fwnode, mux_fwnode_match); return dev ? to_typec_switch(dev) : ERR_PTR(-EPROBE_DEFER); diff --git a/include/linux/device.h b/include/linux/device.h index ea37debb0a98..d4612efaab82 100644 --- a/include/linux/device.h +++ b/include/linux/device.h @@ -292,23 +292,7 @@ struct device_dma_parameters { unsigned long segment_boundary_mask; }; -/** - * struct device_connection - Device Connection Descriptor - * @fwnode: The device node of the connected device - * @endpoint: The names of the two devices connected together - * @id: Unique identifier for the connection - * - * NOTE: @fwnode is not used together with @endpoint. @fwnode is used when - * platform firmware defines the connection. When the connection is registered - * with device_connection_add() @endpoint is used instead. - */ -struct device_connection { - struct fwnode_handle *fwnode; - const char *endpoint[2]; - const char *id; -}; - -typedef void *(*devcon_match_fn_t)(struct device_connection *con, int ep, +typedef void *(*devcon_match_fn_t)(struct fwnode_handle *fwnode, const char *id, void *data); void *fwnode_connection_find_match(struct fwnode_handle *fwnode, From e1f82a0dcf388d98bcc7ad195c03bd812405e6b2 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Wed, 26 Aug 2020 13:44:59 +0300 Subject: [PATCH 113/433] driver core: Annotate dev_err_probe() with __must_check We have got already new users of this API which interpret it differently and miss the opportunity to optimize their code. In order to avoid similar cases in the future, annotate dev_err_probe() with __must_check. Fixes: a787e5400a1c ("driver core: add device probe log helper") Signed-off-by: Andy Shevchenko Link: https://lore.kernel.org/r/20200826104459.81979-1-andriy.shevchenko@linux.intel.com Signed-off-by: Greg Kroah-Hartman --- include/linux/device.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/linux/device.h b/include/linux/device.h index d4612efaab82..0b3dc72f64b2 100644 --- a/include/linux/device.h +++ b/include/linux/device.h @@ -931,7 +931,7 @@ void device_links_supplier_sync_state_pause(void); void device_links_supplier_sync_state_resume(void); extern __printf(3, 4) -int dev_err_probe(const struct device *dev, int err, const char *fmt, ...); +int __must_check dev_err_probe(const struct device *dev, int err, const char *fmt, ...); /* Create alias, so I can be autoloaded. */ #define MODULE_ALIAS_CHARDEV(major,minor) \ From 28d9fdf04573cfed6a205220fb038dd444568fa3 Mon Sep 17 00:00:00 2001 From: Randy Dunlap Date: Sat, 22 Aug 2020 21:04:43 -0700 Subject: [PATCH 114/433] lib: devres: delete duplicated words Drop the repeated word "the". Signed-off-by: Randy Dunlap Cc: Andrew Morton Cc: Arnd Bergmann Cc: Greg Kroah-Hartman Link: https://lore.kernel.org/r/20200823040443.25900-1-rdunlap@infradead.org Signed-off-by: Greg Kroah-Hartman --- lib/devres.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/devres.c b/lib/devres.c index ebb1573d9ae3..8bd3ed450614 100644 --- a/lib/devres.c +++ b/lib/devres.c @@ -217,7 +217,7 @@ void __iomem *devm_ioremap_resource_wc(struct device *dev, * Please Note: This is not a one-to-one replacement for of_iomap() because the * of_iomap() function does not track whether the region is already mapped. If * two drivers try to map the same memory, the of_iomap() function will succeed - * but the the devm_of_iomap() function will return -EBUSY. + * but the devm_of_iomap() function will return -EBUSY. * */ void __iomem *devm_of_iomap(struct device *dev, struct device_node *node, int index, From a47a2b98f341679807e6c64b520391f3630e8804 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Wed, 26 Aug 2020 09:09:17 +0200 Subject: [PATCH 115/433] backlight: tosa_lcd: Include the right header The Tosa backlight LCDE driver was converted to use GPIO descriptors in 0b0cb52bd80eda76c4b9921f5cf9c1b709d44e83 ("video: backlight: tosa: Use GPIO lookup table") but still includes rather than . Fix it. Cc: Arnd Bergmann Cc: Robert Jarzmik Signed-off-by: Linus Walleij Reviewed-by: Daniel Thompson Signed-off-by: Lee Jones --- drivers/video/backlight/tosa_lcd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/video/backlight/tosa_lcd.c b/drivers/video/backlight/tosa_lcd.c index 113116d3585c..38765544345b 100644 --- a/drivers/video/backlight/tosa_lcd.c +++ b/drivers/video/backlight/tosa_lcd.c @@ -12,7 +12,7 @@ #include #include #include -#include +#include #include #include #include From 97ecfda1a8ffc5ffc9681d0dfa65fd5b39839dfe Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Wed, 26 Aug 2020 09:05:40 +0200 Subject: [PATCH 116/433] backlight: tosa_bl: Include the right header The Tosa backlight driver was converted to use GPIO descriptors in 0b0cb52bd80eda76c4b9921f5cf9c1b709d44e83 ("video: backlight: tosa: Use GPIO lookup table") but still includes rather than . Fix it. Cc: Arnd Bergmann Cc: Robert Jarzmik Signed-off-by: Linus Walleij Reviewed-by: Daniel Thompson Signed-off-by: Lee Jones --- drivers/video/backlight/tosa_bl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/video/backlight/tosa_bl.c b/drivers/video/backlight/tosa_bl.c index cff5e96fd988..6df6fcd132e3 100644 --- a/drivers/video/backlight/tosa_bl.c +++ b/drivers/video/backlight/tosa_bl.c @@ -11,7 +11,7 @@ #include #include #include -#include +#include #include #include #include From d7cf5590393132993f2e6d2618fd23a20a6342ca Mon Sep 17 00:00:00 2001 From: Heikki Krogerus Date: Mon, 7 Sep 2020 15:05:31 +0300 Subject: [PATCH 117/433] device property: Move fwnode_connection_find_match() under drivers/base/property.c The function is now only a helper that searches the connection from device graph and then by checking if the supplied connection identifier matches a property that contains reference. Signed-off-by: Heikki Krogerus Link: https://lore.kernel.org/r/20200907120532.37611-2-heikki.krogerus@linux.intel.com Signed-off-by: Greg Kroah-Hartman --- drivers/base/Makefile | 2 +- drivers/base/devcon.c | 101 --------------------------------------- drivers/base/property.c | 73 ++++++++++++++++++++++++++++ include/linux/device.h | 9 ---- include/linux/property.h | 14 ++++++ 5 files changed, 88 insertions(+), 111 deletions(-) delete mode 100644 drivers/base/devcon.c diff --git a/drivers/base/Makefile b/drivers/base/Makefile index 157452080f3d..41369fc7004f 100644 --- a/drivers/base/Makefile +++ b/drivers/base/Makefile @@ -6,7 +6,7 @@ obj-y := component.o core.o bus.o dd.o syscore.o \ cpu.o firmware.o init.o map.o devres.o \ attribute_container.o transport_class.o \ topology.o container.o property.o cacheinfo.o \ - devcon.o swnode.o + swnode.o obj-$(CONFIG_DEVTMPFS) += devtmpfs.o obj-y += power/ obj-$(CONFIG_ISA_BUS_API) += isa.o diff --git a/drivers/base/devcon.c b/drivers/base/devcon.c deleted file mode 100644 index 1790e84dbe7c..000000000000 --- a/drivers/base/devcon.c +++ /dev/null @@ -1,101 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/** - * Device connections - * - * Copyright (C) 2018 Intel Corporation - * Author: Heikki Krogerus - */ - -#include -#include - -static void * -fwnode_graph_devcon_match(struct fwnode_handle *fwnode, const char *con_id, - void *data, devcon_match_fn_t match) -{ - struct fwnode_handle *node; - struct fwnode_handle *ep; - void *ret; - - fwnode_graph_for_each_endpoint(fwnode, ep) { - node = fwnode_graph_get_remote_port_parent(ep); - if (!fwnode_device_is_available(node)) - continue; - - ret = match(node, con_id, data); - fwnode_handle_put(node); - if (ret) { - fwnode_handle_put(ep); - return ret; - } - } - return NULL; -} - -static void * -fwnode_devcon_match(struct fwnode_handle *fwnode, const char *con_id, - void *data, devcon_match_fn_t match) -{ - struct fwnode_handle *node; - void *ret; - int i; - - for (i = 0; ; i++) { - node = fwnode_find_reference(fwnode, con_id, i); - if (IS_ERR(node)) - break; - - ret = match(node, NULL, data); - fwnode_handle_put(node); - if (ret) - return ret; - } - - return NULL; -} - -/** - * fwnode_connection_find_match - Find connection from a device node - * @fwnode: Device node with the connection - * @con_id: Identifier for the connection - * @data: Data for the match function - * @match: Function to check and convert the connection description - * - * Find a connection with unique identifier @con_id between @fwnode and another - * device node. @match will be used to convert the connection description to - * data the caller is expecting to be returned. - */ -void *fwnode_connection_find_match(struct fwnode_handle *fwnode, - const char *con_id, void *data, - devcon_match_fn_t match) -{ - void *ret; - - if (!fwnode || !match) - return NULL; - - ret = fwnode_graph_devcon_match(fwnode, con_id, data, match); - if (ret) - return ret; - - return fwnode_devcon_match(fwnode, con_id, data, match); -} -EXPORT_SYMBOL_GPL(fwnode_connection_find_match); - -/** - * device_connection_find_match - Find physical connection to a device - * @dev: Device with the connection - * @con_id: Identifier for the connection - * @data: Data for the match function - * @match: Function to check and convert the connection description - * - * Find a connection with unique identifier @con_id between @dev and another - * device. @match will be used to convert the connection description to data the - * caller is expecting to be returned. - */ -void *device_connection_find_match(struct device *dev, const char *con_id, - void *data, devcon_match_fn_t match) -{ - return fwnode_connection_find_match(dev_fwnode(dev), con_id, data, match); -} -EXPORT_SYMBOL_GPL(device_connection_find_match); diff --git a/drivers/base/property.c b/drivers/base/property.c index d58aa98fe964..4c43d30145c6 100644 --- a/drivers/base/property.c +++ b/drivers/base/property.c @@ -1184,3 +1184,76 @@ const void *device_get_match_data(struct device *dev) return fwnode_call_ptr_op(dev_fwnode(dev), device_get_match_data, dev); } EXPORT_SYMBOL_GPL(device_get_match_data); + +static void * +fwnode_graph_devcon_match(struct fwnode_handle *fwnode, const char *con_id, + void *data, devcon_match_fn_t match) +{ + struct fwnode_handle *node; + struct fwnode_handle *ep; + void *ret; + + fwnode_graph_for_each_endpoint(fwnode, ep) { + node = fwnode_graph_get_remote_port_parent(ep); + if (!fwnode_device_is_available(node)) + continue; + + ret = match(node, con_id, data); + fwnode_handle_put(node); + if (ret) { + fwnode_handle_put(ep); + return ret; + } + } + return NULL; +} + +static void * +fwnode_devcon_match(struct fwnode_handle *fwnode, const char *con_id, + void *data, devcon_match_fn_t match) +{ + struct fwnode_handle *node; + void *ret; + int i; + + for (i = 0; ; i++) { + node = fwnode_find_reference(fwnode, con_id, i); + if (IS_ERR(node)) + break; + + ret = match(node, NULL, data); + fwnode_handle_put(node); + if (ret) + return ret; + } + + return NULL; +} + +/** + * fwnode_connection_find_match - Find connection from a device node + * @fwnode: Device node with the connection + * @con_id: Identifier for the connection + * @data: Data for the match function + * @match: Function to check and convert the connection description + * + * Find a connection with unique identifier @con_id between @fwnode and another + * device node. @match will be used to convert the connection description to + * data the caller is expecting to be returned. + */ +void *fwnode_connection_find_match(struct fwnode_handle *fwnode, + const char *con_id, void *data, + devcon_match_fn_t match) +{ + void *ret; + + if (!fwnode || !match) + return NULL; + + ret = fwnode_graph_devcon_match(fwnode, con_id, data, match); + if (ret) + return ret; + + return fwnode_devcon_match(fwnode, con_id, data, match); +} +EXPORT_SYMBOL_GPL(fwnode_connection_find_match); diff --git a/include/linux/device.h b/include/linux/device.h index 0b3dc72f64b2..bf480dbe3375 100644 --- a/include/linux/device.h +++ b/include/linux/device.h @@ -292,15 +292,6 @@ struct device_dma_parameters { unsigned long segment_boundary_mask; }; -typedef void *(*devcon_match_fn_t)(struct fwnode_handle *fwnode, const char *id, - void *data); - -void *fwnode_connection_find_match(struct fwnode_handle *fwnode, - const char *con_id, void *data, - devcon_match_fn_t match); -void *device_connection_find_match(struct device *dev, const char *con_id, - void *data, devcon_match_fn_t match); - /** * enum device_link_state - Device link states. * @DL_STATE_NONE: The presence of the drivers is not being tracked. diff --git a/include/linux/property.h b/include/linux/property.h index 9f805c442819..aedae94dcf41 100644 --- a/include/linux/property.h +++ b/include/linux/property.h @@ -418,6 +418,20 @@ fwnode_graph_get_endpoint_by_id(const struct fwnode_handle *fwnode, int fwnode_graph_parse_endpoint(const struct fwnode_handle *fwnode, struct fwnode_endpoint *endpoint); +typedef void *(*devcon_match_fn_t)(struct fwnode_handle *fwnode, const char *id, + void *data); + +void *fwnode_connection_find_match(struct fwnode_handle *fwnode, + const char *con_id, void *data, + devcon_match_fn_t match); + +static inline void *device_connection_find_match(struct device *dev, + const char *con_id, void *data, + devcon_match_fn_t match) +{ + return fwnode_connection_find_match(dev_fwnode(dev), con_id, data, match); +} + /* -------------------------------------------------------------------------- */ /* Software fwnode support - when HW description is incomplete or missing */ From 291dace3daad416f80fe25d8f838e0a1d0edc762 Mon Sep 17 00:00:00 2001 From: Heikki Krogerus Date: Mon, 7 Sep 2020 15:05:32 +0300 Subject: [PATCH 118/433] Documentation: Remove device connection documentation The API that allowed device connection descriptions to be added is now removed, so removing also the documentation for it. Signed-off-by: Heikki Krogerus Link: https://lore.kernel.org/r/20200907120532.37611-3-heikki.krogerus@linux.intel.com Signed-off-by: Greg Kroah-Hartman --- .../driver-api/device_connection.rst | 43 ------------------- Documentation/driver-api/index.rst | 1 - 2 files changed, 44 deletions(-) delete mode 100644 Documentation/driver-api/device_connection.rst diff --git a/Documentation/driver-api/device_connection.rst b/Documentation/driver-api/device_connection.rst deleted file mode 100644 index ba364224c349..000000000000 --- a/Documentation/driver-api/device_connection.rst +++ /dev/null @@ -1,43 +0,0 @@ -================== -Device connections -================== - -Introduction ------------- - -Devices often have connections to other devices that are outside of the direct -child/parent relationship. A serial or network communication controller, which -could be a PCI device, may need to be able to get a reference to its PHY -component, which could be attached for example to the I2C bus. Some device -drivers need to be able to control the clocks or the GPIOs for their devices, -and so on. - -Device connections are generic descriptions of any type of connection between -two separate devices. - -Device connections alone do not create a dependency between the two devices. -They are only descriptions which are not tied to either of the devices directly. -A dependency between the two devices exists only if one of the two endpoint -devices requests a reference to the other. The descriptions themselves can be -defined in firmware (not yet supported) or they can be built-in. - -Usage ------ - -Device connections should exist before device ``->probe`` callback is called for -either endpoint device in the description. If the connections are defined in -firmware, this is not a problem. It should be considered if the connection -descriptions are "built-in", and need to be added separately. - -The connection description consists of the names of the two devices with the -connection, i.e. the endpoints, and unique identifier for the connection which -is needed if there are multiple connections between the two devices. - -After a description exists, the devices in it can request reference to the other -endpoint device, or they can request the description itself. - -API ---- - -.. kernel-doc:: drivers/base/devcon.c - :functions: device_connection_find_match device_connection_find device_connection_add device_connection_remove diff --git a/Documentation/driver-api/index.rst b/Documentation/driver-api/index.rst index 5ef2cfe3a16b..6e7c702e0268 100644 --- a/Documentation/driver-api/index.rst +++ b/Documentation/driver-api/index.rst @@ -22,7 +22,6 @@ available subsections can be seen below. pm/index clk device-io - device_connection dma-buf device_link component From f118dbf4e7f974493baa74f36ef8b8f1f5622e29 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jonathan=20Neusch=C3=A4fer?= Date: Sat, 5 Sep 2020 20:41:30 +0200 Subject: [PATCH 119/433] docs: driver-api: firmware: fallback-mechanisms: Fix rendering of bullet point MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Without this patch, the "Firmware is not accessible [...]" line is rendered in bold, which does not seem intentional. Signed-off-by: Jonathan Neuschäfer Link: https://lore.kernel.org/r/20200905184131.1280337-1-j.neuschaefer@gmx.net Signed-off-by: Greg Kroah-Hartman --- Documentation/driver-api/firmware/fallback-mechanisms.rst | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/driver-api/firmware/fallback-mechanisms.rst b/Documentation/driver-api/firmware/fallback-mechanisms.rst index 036383dad6d6..5f04c3bcdf0c 100644 --- a/Documentation/driver-api/firmware/fallback-mechanisms.rst +++ b/Documentation/driver-api/firmware/fallback-mechanisms.rst @@ -42,6 +42,7 @@ fallback mechanism: supported for request_firmware_into_buf(). * Firmware is not accessible through typical means: + * It cannot be installed into the root filesystem * The firmware provides very unique device specific data tailored for the unit gathered with local information. An example is calibration From 18efb2f9e897ac65e7a1b2892f4a53e404534eba Mon Sep 17 00:00:00 2001 From: Kees Cook Date: Wed, 29 Jul 2020 10:58:29 -0700 Subject: [PATCH 120/433] test_firmware: Test platform fw loading on non-EFI systems On non-EFI systems, it wasn't possible to test the platform firmware loader because it will have never set "checked_fw" during __init. Instead, allow the test code to override this check. Additionally split the declarations into a private header file so it there is greater enforcement of the symbol visibility. Fixes: 548193cba2a7 ("test_firmware: add support for firmware_request_platform") Cc: stable@vger.kernel.org Reviewed-by: Luis Chamberlain Acked-by: Scott Branden Signed-off-by: Kees Cook Link: https://lore.kernel.org/r/20200729175845.1745471-2-keescook@chromium.org Signed-off-by: Greg Kroah-Hartman --- drivers/firmware/efi/embedded-firmware.c | 23 +++++++++++++++++------ drivers/firmware/efi/embedded-firmware.h | 21 +++++++++++++++++++++ include/linux/efi_embedded_fw.h | 13 ------------- lib/test_firmware.c | 5 +++++ 4 files changed, 43 insertions(+), 19 deletions(-) create mode 100644 drivers/firmware/efi/embedded-firmware.h diff --git a/drivers/firmware/efi/embedded-firmware.c b/drivers/firmware/efi/embedded-firmware.c index e97a9c9d010c..f1330f55f7f4 100644 --- a/drivers/firmware/efi/embedded-firmware.c +++ b/drivers/firmware/efi/embedded-firmware.c @@ -14,11 +14,22 @@ #include #include -/* Exported for use by lib/test_firmware.c only */ -LIST_HEAD(efi_embedded_fw_list); -EXPORT_SYMBOL_GPL(efi_embedded_fw_list); +#include "embedded-firmware.h" -static bool checked_for_fw; +#ifdef CONFIG_TEST_FIRMWARE +# define EFI_EMBEDDED_FW_VISIBILITY +#else +# define EFI_EMBEDDED_FW_VISIBILITY static +#endif + +EFI_EMBEDDED_FW_VISIBILITY LIST_HEAD(efi_embedded_fw_list); +EFI_EMBEDDED_FW_VISIBILITY bool efi_embedded_fw_checked; + +/* Exported for use by lib/test_firmware.c only */ +#ifdef CONFIG_TEST_FIRMWARE +EXPORT_SYMBOL_GPL(efi_embedded_fw_list); +EXPORT_SYMBOL_GPL(efi_embedded_fw_checked); +#endif static const struct dmi_system_id * const embedded_fw_table[] = { #ifdef CONFIG_TOUCHSCREEN_DMI @@ -116,14 +127,14 @@ void __init efi_check_for_embedded_firmwares(void) } } - checked_for_fw = true; + efi_embedded_fw_checked = true; } int efi_get_embedded_fw(const char *name, const u8 **data, size_t *size) { struct efi_embedded_fw *iter, *fw = NULL; - if (!checked_for_fw) { + if (!efi_embedded_fw_checked) { pr_warn("Warning %s called while we did not check for embedded fw\n", __func__); return -ENOENT; diff --git a/drivers/firmware/efi/embedded-firmware.h b/drivers/firmware/efi/embedded-firmware.h new file mode 100644 index 000000000000..bb894eae0906 --- /dev/null +++ b/drivers/firmware/efi/embedded-firmware.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef _EFI_EMBEDDED_FW_INTERNAL_H_ +#define _EFI_EMBEDDED_FW_INTERNAL_H_ + +/* + * This struct and efi_embedded_fw_list are private to the efi-embedded fw + * implementation they only in separate header for use by lib/test_firmware.c. + */ +struct efi_embedded_fw { + struct list_head list; + const char *name; + const u8 *data; + size_t length; +}; + +#ifdef CONFIG_TEST_FIRMWARE +extern struct list_head efi_embedded_fw_list; +extern bool efi_embedded_fw_checked; +#endif + +#endif /* _EFI_EMBEDDED_FW_INTERNAL_H_ */ diff --git a/include/linux/efi_embedded_fw.h b/include/linux/efi_embedded_fw.h index 57eac5241303..4ad5db9f5312 100644 --- a/include/linux/efi_embedded_fw.h +++ b/include/linux/efi_embedded_fw.h @@ -7,19 +7,6 @@ #define EFI_EMBEDDED_FW_PREFIX_LEN 8 -/* - * This struct and efi_embedded_fw_list are private to the efi-embedded fw - * implementation they are in this header for use by lib/test_firmware.c only! - */ -struct efi_embedded_fw { - struct list_head list; - const char *name; - const u8 *data; - size_t length; -}; - -extern struct list_head efi_embedded_fw_list; - /** * struct efi_embedded_fw_desc - This struct is used by the EFI embedded-fw * code to search for embedded firmwares. diff --git a/lib/test_firmware.c b/lib/test_firmware.c index 9fee2b93a8d1..62af792e151c 100644 --- a/lib/test_firmware.c +++ b/lib/test_firmware.c @@ -489,6 +489,7 @@ out: static DEVICE_ATTR_WO(trigger_request); #ifdef CONFIG_EFI_EMBEDDED_FIRMWARE +#include "../drivers/firmware/efi/embedded-firmware.h" static ssize_t trigger_request_platform_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) @@ -501,6 +502,7 @@ static ssize_t trigger_request_platform_store(struct device *dev, }; struct efi_embedded_fw efi_embedded_fw; const struct firmware *firmware = NULL; + bool saved_efi_embedded_fw_checked; char *name; int rc; @@ -513,6 +515,8 @@ static ssize_t trigger_request_platform_store(struct device *dev, efi_embedded_fw.data = (void *)test_data; efi_embedded_fw.length = sizeof(test_data); list_add(&efi_embedded_fw.list, &efi_embedded_fw_list); + saved_efi_embedded_fw_checked = efi_embedded_fw_checked; + efi_embedded_fw_checked = true; pr_info("loading '%s'\n", name); rc = firmware_request_platform(&firmware, name, dev); @@ -530,6 +534,7 @@ static ssize_t trigger_request_platform_store(struct device *dev, rc = count; out: + efi_embedded_fw_checked = saved_efi_embedded_fw_checked; release_firmware(firmware); list_del(&efi_embedded_fw.list); kfree(name); From e3aa745ff9f6326e495c3f9c6095120b7c417a21 Mon Sep 17 00:00:00 2001 From: Zenghui Yu Date: Mon, 3 Aug 2020 11:33:43 +0800 Subject: [PATCH 121/433] driver core: Use the ktime_us_delta() helper Use the ktime_us_delta() helper to measure the driver probe time. Given the helpers already returns an s64 value, let's drop the unnecessary casting to s64 as well. There is no functional change. Signed-off-by: Zenghui Yu Link: https://lore.kernel.org/r/20200803033343.1178-1-yuzenghui@huawei.com Signed-off-by: Greg Kroah-Hartman --- drivers/base/dd.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/base/dd.c b/drivers/base/dd.c index 857b0a928e8d..6e7319ca5bde 100644 --- a/drivers/base/dd.c +++ b/drivers/base/dd.c @@ -658,15 +658,14 @@ done: */ static int really_probe_debug(struct device *dev, struct device_driver *drv) { - ktime_t calltime, delta, rettime; + ktime_t calltime, rettime; int ret; calltime = ktime_get(); ret = really_probe(dev, drv); rettime = ktime_get(); - delta = ktime_sub(rettime, calltime); pr_debug("probe of %s returned %d after %lld usecs\n", - dev_name(dev), ret, (s64) ktime_to_us(delta)); + dev_name(dev), ret, ktime_us_delta(rettime, calltime)); return ret; } From 81b142245b6f0249896325c7e8451cb5347d4d31 Mon Sep 17 00:00:00 2001 From: Stephen Boyd Date: Thu, 6 Aug 2020 14:46:33 -0700 Subject: [PATCH 122/433] syscore: Use pm_pr_dbg() for syscore_{suspend,resume}() The debug messages about what syscore suspend/resume hooks are called are only present if you have initcall debugging enabled. Let's move these messages to pm_pr_dbg() so that the syscore PM messages are included along with all the other PM debugging info that can be seen during suspend/resume debugging. Cc: "Rafael J. Wysocki" Signed-off-by: Stephen Boyd Link: https://lore.kernel.org/r/20200806214633.204472-1-swboyd@chromium.org Signed-off-by: Greg Kroah-Hartman --- drivers/base/syscore.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/base/syscore.c b/drivers/base/syscore.c index 0d346a307140..13db1f78d2ce 100644 --- a/drivers/base/syscore.c +++ b/drivers/base/syscore.c @@ -50,7 +50,7 @@ int syscore_suspend(void) int ret = 0; trace_suspend_resume(TPS("syscore_suspend"), 0, true); - pr_debug("Checking wakeup interrupts\n"); + pm_pr_dbg("Checking wakeup interrupts\n"); /* Return error code if there are any wakeup interrupts pending. */ if (pm_wakeup_pending()) @@ -61,8 +61,7 @@ int syscore_suspend(void) list_for_each_entry_reverse(ops, &syscore_ops_list, node) if (ops->suspend) { - if (initcall_debug) - pr_info("PM: Calling %pS\n", ops->suspend); + pm_pr_dbg("Calling %pS\n", ops->suspend); ret = ops->suspend(); if (ret) goto err_out; @@ -99,8 +98,7 @@ void syscore_resume(void) list_for_each_entry(ops, &syscore_ops_list, node) if (ops->resume) { - if (initcall_debug) - pr_info("PM: Calling %pS\n", ops->resume); + pm_pr_dbg("Calling %pS\n", ops->resume); ops->resume(); WARN_ONCE(!irqs_disabled(), "Interrupts enabled after %pS\n", ops->resume); From f82485722e5de5ebb08d3a1dd7302203346dbff9 Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Mon, 24 Aug 2020 19:38:57 +0200 Subject: [PATCH 123/433] devres: provide devm_krealloc() Implement the managed variant of krealloc(). This function works with all memory allocated by devm_kmalloc() (or devres functions using it implicitly like devm_kmemdup(), devm_kstrdup() etc.). Managed realloc'ed chunks can be manually released with devm_kfree(). Signed-off-by: Bartosz Golaszewski Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/20200824173859.4910-2-brgl@bgdev.pl Signed-off-by: Greg Kroah-Hartman --- .../driver-api/driver-model/devres.rst | 1 + drivers/base/devres.c | 105 ++++++++++++++++++ include/linux/device.h | 2 + 3 files changed, 108 insertions(+) diff --git a/Documentation/driver-api/driver-model/devres.rst b/Documentation/driver-api/driver-model/devres.rst index eaaaafc21134..f318a5c0033c 100644 --- a/Documentation/driver-api/driver-model/devres.rst +++ b/Documentation/driver-api/driver-model/devres.rst @@ -354,6 +354,7 @@ MEM devm_kmalloc() devm_kmalloc_array() devm_kmemdup() + devm_krealloc() devm_kstrdup() devm_kvasprintf() devm_kzalloc() diff --git a/drivers/base/devres.c b/drivers/base/devres.c index ed615d3b9cf1..586e9a75c840 100644 --- a/drivers/base/devres.c +++ b/drivers/base/devres.c @@ -126,6 +126,14 @@ static void add_dr(struct device *dev, struct devres_node *node) list_add_tail(&node->entry, &dev->devres_head); } +static void replace_dr(struct device *dev, + struct devres_node *old, struct devres_node *new) +{ + devres_log(dev, old, "REPLACE"); + BUG_ON(!list_empty(&new->entry)); + list_replace(&old->entry, &new->entry); +} + #ifdef CONFIG_DEBUG_DEVRES void * __devres_alloc_node(dr_release_t release, size_t size, gfp_t gfp, int nid, const char *name) @@ -837,6 +845,103 @@ void *devm_kmalloc(struct device *dev, size_t size, gfp_t gfp) } EXPORT_SYMBOL_GPL(devm_kmalloc); +/** + * devm_krealloc - Resource-managed krealloc() + * @dev: Device to re-allocate memory for + * @ptr: Pointer to the memory chunk to re-allocate + * @new_size: New allocation size + * @gfp: Allocation gfp flags + * + * Managed krealloc(). Resizes the memory chunk allocated with devm_kmalloc(). + * Behaves similarly to regular krealloc(): if @ptr is NULL or ZERO_SIZE_PTR, + * it's the equivalent of devm_kmalloc(). If new_size is zero, it frees the + * previously allocated memory and returns ZERO_SIZE_PTR. This function doesn't + * change the order in which the release callback for the re-alloc'ed devres + * will be called (except when falling back to devm_kmalloc() or when freeing + * resources when new_size is zero). The contents of the memory are preserved + * up to the lesser of new and old sizes. + */ +void *devm_krealloc(struct device *dev, void *ptr, size_t new_size, gfp_t gfp) +{ + size_t total_new_size, total_old_size; + struct devres *old_dr, *new_dr; + unsigned long flags; + + if (unlikely(!new_size)) { + devm_kfree(dev, ptr); + return ZERO_SIZE_PTR; + } + + if (unlikely(ZERO_OR_NULL_PTR(ptr))) + return devm_kmalloc(dev, new_size, gfp); + + if (WARN_ON(is_kernel_rodata((unsigned long)ptr))) + /* + * We cannot reliably realloc a const string returned by + * devm_kstrdup_const(). + */ + return NULL; + + if (!check_dr_size(new_size, &total_new_size)) + return NULL; + + total_old_size = ksize(container_of(ptr, struct devres, data)); + if (total_old_size == 0) { + WARN(1, "Pointer doesn't point to dynamically allocated memory."); + return NULL; + } + + /* + * If new size is smaller or equal to the actual number of bytes + * allocated previously - just return the same pointer. + */ + if (total_new_size <= total_old_size) + return ptr; + + /* + * Otherwise: allocate new, larger chunk. We need to allocate before + * taking the lock as most probably the caller uses GFP_KERNEL. + */ + new_dr = alloc_dr(devm_kmalloc_release, + total_new_size, gfp, dev_to_node(dev)); + if (!new_dr) + return NULL; + + /* + * The spinlock protects the linked list against concurrent + * modifications but not the resource itself. + */ + spin_lock_irqsave(&dev->devres_lock, flags); + + old_dr = find_dr(dev, devm_kmalloc_release, devm_kmalloc_match, ptr); + if (!old_dr) { + spin_unlock_irqrestore(&dev->devres_lock, flags); + kfree(new_dr); + WARN(1, "Memory chunk not managed or managed by a different device."); + return NULL; + } + + replace_dr(dev, &old_dr->node, &new_dr->node); + + spin_unlock_irqrestore(&dev->devres_lock, flags); + + /* + * We can copy the memory contents after releasing the lock as we're + * no longer modyfing the list links. + */ + memcpy(new_dr->data, old_dr->data, + total_old_size - offsetof(struct devres, data)); + /* + * Same for releasing the old devres - it's now been removed from the + * list. This is also the reason why we must not use devm_kfree() - the + * links are no longer valid. + */ + kfree(old_dr); + + return new_dr->data; +} +EXPORT_SYMBOL_GPL(devm_krealloc); + /** * devm_kstrdup - Allocate resource managed space and * copy an existing string into that. diff --git a/include/linux/device.h b/include/linux/device.h index bf480dbe3375..85d5c28bed93 100644 --- a/include/linux/device.h +++ b/include/linux/device.h @@ -206,6 +206,8 @@ int devres_release_group(struct device *dev, void *id); /* managed devm_k.alloc/kfree for device drivers */ void *devm_kmalloc(struct device *dev, size_t size, gfp_t gfp) __malloc; +void *devm_krealloc(struct device *dev, void *ptr, size_t size, + gfp_t gfp) __must_check; __printf(3, 0) char *devm_kvasprintf(struct device *dev, gfp_t gfp, const char *fmt, va_list ap) __malloc; __printf(3, 4) char *devm_kasprintf(struct device *dev, gfp_t gfp, From bb19133fc89b31eb6b490b25cb92626a10700c82 Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Mon, 24 Aug 2020 19:38:58 +0200 Subject: [PATCH 124/433] hwmon: pmbus: use more devres helpers Shrink pmbus code by using devm_hwmon_device_register_with_groups() and devm_krealloc() instead of their non-managed variants. Signed-off-by: Bartosz Golaszewski Acked-by: Guenter Roeck Link: https://lore.kernel.org/r/20200824173859.4910-3-brgl@bgdev.pl Signed-off-by: Greg Kroah-Hartman --- drivers/hwmon/pmbus/pmbus_core.c | 28 +++++++++------------------- 1 file changed, 9 insertions(+), 19 deletions(-) diff --git a/drivers/hwmon/pmbus/pmbus_core.c b/drivers/hwmon/pmbus/pmbus_core.c index 44535add3a4a..91839979cf6c 100644 --- a/drivers/hwmon/pmbus/pmbus_core.c +++ b/drivers/hwmon/pmbus/pmbus_core.c @@ -1018,9 +1018,9 @@ static int pmbus_add_attribute(struct pmbus_data *data, struct attribute *attr) { if (data->num_attributes >= data->max_attributes - 1) { int new_max_attrs = data->max_attributes + PMBUS_ATTR_ALLOC_SIZE; - void *new_attrs = krealloc(data->group.attrs, - new_max_attrs * sizeof(void *), - GFP_KERNEL); + void *new_attrs = devm_krealloc(data->dev, data->group.attrs, + new_max_attrs * sizeof(void *), + GFP_KERNEL); if (!new_attrs) return -ENOMEM; data->group.attrs = new_attrs; @@ -2534,7 +2534,7 @@ int pmbus_do_probe(struct i2c_client *client, const struct i2c_device_id *id, ret = pmbus_find_attributes(client, data); if (ret) - goto out_kfree; + return ret; /* * If there are no attributes, something is wrong. @@ -2542,35 +2542,27 @@ int pmbus_do_probe(struct i2c_client *client, const struct i2c_device_id *id, */ if (!data->num_attributes) { dev_err(dev, "No attributes found\n"); - ret = -ENODEV; - goto out_kfree; + return -ENODEV; } data->groups[0] = &data->group; memcpy(data->groups + 1, info->groups, sizeof(void *) * groups_num); - data->hwmon_dev = hwmon_device_register_with_groups(dev, client->name, - data, data->groups); + data->hwmon_dev = devm_hwmon_device_register_with_groups(dev, + client->name, data, data->groups); if (IS_ERR(data->hwmon_dev)) { - ret = PTR_ERR(data->hwmon_dev); dev_err(dev, "Failed to register hwmon device\n"); - goto out_kfree; + return PTR_ERR(data->hwmon_dev); } ret = pmbus_regulator_register(data); if (ret) - goto out_unregister; + return ret; ret = pmbus_init_debugfs(client, data); if (ret) dev_warn(dev, "Failed to register debugfs\n"); return 0; - -out_unregister: - hwmon_device_unregister(data->hwmon_dev); -out_kfree: - kfree(data->group.attrs); - return ret; } EXPORT_SYMBOL_GPL(pmbus_do_probe); @@ -2580,8 +2572,6 @@ int pmbus_do_remove(struct i2c_client *client) debugfs_remove_recursive(data->debugfs); - hwmon_device_unregister(data->hwmon_dev); - kfree(data->group.attrs); return 0; } EXPORT_SYMBOL_GPL(pmbus_do_remove); From 750628c79bb10ada3d404f576d476c3cef2da6fb Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Mon, 24 Aug 2020 19:38:59 +0200 Subject: [PATCH 125/433] iio: adc: xilinx-xadc: use devm_krealloc() Use the managed variant of krealloc() and shrink the code a bit. Signed-off-by: Bartosz Golaszewski Acked-by: Jonathan Cameron Link: https://lore.kernel.org/r/20200824173859.4910-4-brgl@bgdev.pl Signed-off-by: Greg Kroah-Hartman --- drivers/iio/adc/xilinx-xadc-core.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/iio/adc/xilinx-xadc-core.c b/drivers/iio/adc/xilinx-xadc-core.c index d0b7ef296afb..f93c34fe5873 100644 --- a/drivers/iio/adc/xilinx-xadc-core.c +++ b/drivers/iio/adc/xilinx-xadc-core.c @@ -1092,6 +1092,7 @@ MODULE_DEVICE_TABLE(of, xadc_of_match_table); static int xadc_parse_dt(struct iio_dev *indio_dev, struct device_node *np, unsigned int *conf) { + struct device *dev = indio_dev->dev.parent; struct xadc *xadc = iio_priv(indio_dev); struct iio_chan_spec *channels, *chan; struct device_node *chan_node, *child; @@ -1136,7 +1137,8 @@ static int xadc_parse_dt(struct iio_dev *indio_dev, struct device_node *np, *conf |= XADC_CONF0_MUX | XADC_CONF0_CHAN(ext_mux_chan); } - channels = kmemdup(xadc_channels, sizeof(xadc_channels), GFP_KERNEL); + channels = devm_kmemdup(dev, xadc_channels, + sizeof(xadc_channels), GFP_KERNEL); if (!channels) return -ENOMEM; @@ -1172,8 +1174,9 @@ static int xadc_parse_dt(struct iio_dev *indio_dev, struct device_node *np, of_node_put(chan_node); indio_dev->num_channels = num_channels; - indio_dev->channels = krealloc(channels, sizeof(*channels) * - num_channels, GFP_KERNEL); + indio_dev->channels = devm_krealloc(dev, channels, + sizeof(*channels) * num_channels, + GFP_KERNEL); /* If we can't resize the channels array, just use the original */ if (!indio_dev->channels) indio_dev->channels = channels; @@ -1225,14 +1228,14 @@ static int xadc_probe(struct platform_device *pdev) ret = xadc_parse_dt(indio_dev, pdev->dev.of_node, &conf0); if (ret) - goto err_device_free; + return ret; if (xadc->ops->flags & XADC_FLAGS_BUFFERED) { ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time, &xadc_trigger_handler, &xadc_buffer_ops); if (ret) - goto err_device_free; + return ret; xadc->convst_trigger = xadc_alloc_trigger(indio_dev, "convst"); if (IS_ERR(xadc->convst_trigger)) { @@ -1350,8 +1353,6 @@ err_free_convst_trigger: err_triggered_buffer_cleanup: if (xadc->ops->flags & XADC_FLAGS_BUFFERED) iio_triggered_buffer_cleanup(indio_dev); -err_device_free: - kfree(indio_dev->channels); return ret; } @@ -1371,7 +1372,6 @@ static int xadc_remove(struct platform_device *pdev) cancel_delayed_work_sync(&xadc->zynq_unmask_work); clk_disable_unprepare(xadc->clk); kfree(xadc->data); - kfree(indio_dev->channels); return 0; } From a85a4aa32ab9568751b7aff8bd33e1b44b1cd3a1 Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Fri, 28 Aug 2020 15:20:13 +0100 Subject: [PATCH 126/433] dt-bindings: timers: sp-804: Convert to json-schema This converts the DT binding documentation for the ARM SP-804 timer IP over to json-schema. Most properties are just carried over, the clocks property requirement (either one or three clocks) is now formalised and enforced. As the former binding didn't specify clock-names, and there is no common name used by the existing DTs, I refrained from adding them in detail (just allowing the property). The requirement for the APB clock is enforced by the primecell binding already. Signed-off-by: Andre Przywara Acked-by: Linus Walleij Link: https://lore.kernel.org/r/20200828142018.43298-2-andre.przywara@arm.com [robh: drop primecell.yaml] Signed-off-by: Rob Herring --- .../devicetree/bindings/timer/arm,sp804.txt | 29 ------ .../devicetree/bindings/timer/arm,sp804.yaml | 90 +++++++++++++++++++ 2 files changed, 90 insertions(+), 29 deletions(-) delete mode 100644 Documentation/devicetree/bindings/timer/arm,sp804.txt create mode 100644 Documentation/devicetree/bindings/timer/arm,sp804.yaml diff --git a/Documentation/devicetree/bindings/timer/arm,sp804.txt b/Documentation/devicetree/bindings/timer/arm,sp804.txt deleted file mode 100644 index 5cd8eee74af1..000000000000 --- a/Documentation/devicetree/bindings/timer/arm,sp804.txt +++ /dev/null @@ -1,29 +0,0 @@ -ARM sp804 Dual Timers ---------------------------------------- - -Required properties: -- compatible: Should be "arm,sp804" & "arm,primecell" -- interrupts: Should contain the list of Dual Timer interrupts. This is the - interrupt for timer 1 and timer 2. In the case of a single entry, it is - the combined interrupt or if "arm,sp804-has-irq" is present that - specifies which timer interrupt is connected. -- reg: Should contain location and length for dual timer register. -- clocks: clocks driving the dual timer hardware. This list should be 1 or 3 - clocks. With 3 clocks, the order is timer0 clock, timer1 clock, - apb_pclk. A single clock can also be specified if the same clock is - used for all clock inputs. - -Optional properties: -- arm,sp804-has-irq = <#>: In the case of only 1 timer irq line connected, this - specifies if the irq connection is for timer 1 or timer 2. A value of 1 - or 2 should be used. - -Example: - - timer0: timer@fc800000 { - compatible = "arm,sp804", "arm,primecell"; - reg = <0xfc800000 0x1000>; - interrupts = <0 0 4>, <0 1 4>; - clocks = <&timclk1 &timclk2 &pclk>; - clock-names = "timer1", "timer2", "apb_pclk"; - }; diff --git a/Documentation/devicetree/bindings/timer/arm,sp804.yaml b/Documentation/devicetree/bindings/timer/arm,sp804.yaml new file mode 100644 index 000000000000..ba0945cf799e --- /dev/null +++ b/Documentation/devicetree/bindings/timer/arm,sp804.yaml @@ -0,0 +1,90 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/timer/arm,sp804.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ARM sp804 Dual Timers + +maintainers: + - Haojian Zhuang + +description: |+ + The Arm SP804 IP implements two independent timers, configurable for + 16 or 32 bit operation and capable of running in one-shot, periodic, or + free-running mode. The input clock is shared, but can be gated and prescaled + independently for each timer. + +# Need a custom select here or 'arm,primecell' will match on lots of nodes +select: + properties: + compatible: + contains: + const: arm,sp804 + required: + - compatible + +properties: + compatible: + items: + - const: arm,sp804 + - const: arm,primecell + + interrupts: + description: | + If two interrupts are listed, those are the interrupts for timer + 1 and 2, respectively. If there is only a single interrupt, it is + either a combined interrupt or the sole interrupt of one timer, as + specified by the "arm,sp804-has-irq" property. + minItems: 1 + maxItems: 2 + + reg: + description: The physical base address of the SP804 IP. + maxItems: 1 + + clocks: + description: | + Clocks driving the dual timer hardware. This list should + be 1 or 3 clocks. With 3 clocks, the order is timer0 clock, timer1 + clock, apb_pclk. A single clock can also be specified if the same + clock is used for all clock inputs. + oneOf: + - items: + - description: clock for timer 1 + - description: clock for timer 2 + - description: bus clock + - items: + - description: unified clock for both timers and the bus + + clock-names: true + # The original binding did not specify any clock names, and there is no + # consistent naming used in the existing DTs. The primecell binding + # requires the "apb_pclk" name, so we need this property. + # Use "timer0clk", "timer1clk", "apb_pclk" for new DTs. + + arm,sp804-has-irq: + description: If only one interrupt line is connected to the interrupt + controller, this property specifies which timer is connected to this + line. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 1 + maximum: 2 + +required: + - compatible + - interrupts + - reg + - clocks + +additionalProperties: false + +examples: + - | + timer0: timer@fc800000 { + compatible = "arm,sp804", "arm,primecell"; + reg = <0xfc800000 0x1000>; + interrupts = <0 0 4>, <0 1 4>; + clocks = <&timclk1>, <&timclk2>, <&pclk>; + clock-names = "timer1", "timer2", "apb_pclk"; + }; From af4ed018849be4e17c259103599563b2df2a3484 Mon Sep 17 00:00:00 2001 From: Christian Lamparter Date: Sat, 22 Aug 2020 17:40:45 +0200 Subject: [PATCH 127/433] dt-bindings: vendor-prefixes: Add Cisco Meraki vendor prefix Meraki was founded in 2006. The start-up quickly rose to prominence by being based in part on the MIT Roofnet Project. In December 2012, Cisco Systems, Inc. bought Meraki. The "Meraki" branding is still around to this day. Web site of the company: https://meraki.cisco.com/ Signed-off-by: Christian Lamparter Link: https://lore.kernel.org/r/20200822154045.16036-1-chunkeey@gmail.com Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 2baee2c817c1..febe7f00b1f0 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -643,6 +643,8 @@ patternProperties: description: MEMSIC Inc. "^menlo,.*": description: Menlo Systems GmbH + "^meraki,.*": + description: Cisco Meraki, LLC "^merrii,.*": description: Merrii Technology Co., Ltd. "^micrel,.*": From f710b49e3c45ee2eae949f7cead736ba25c6ccf1 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 26 Aug 2020 06:36:49 +0200 Subject: [PATCH 128/433] dt-bindings: convert spmi.txt to spmi.yaml Convert the SPMI bus documentation to JSON/yaml. Signed-off-by: Mauro Carvalho Chehab Link: https://lore.kernel.org/r/ee4c4ca9f29a39f6af772b3a526a996176499da3.1598415179.git.mchehab+huawei@kernel.org [robh: Correct maintainer, unit-address should be hex] Signed-off-by: Rob Herring --- .../bindings/mfd/qcom,spmi-pmic.txt | 2 +- .../bindings/spmi/qcom,spmi-pmic-arb.txt | 4 +- .../devicetree/bindings/spmi/spmi.txt | 41 ---------- .../devicetree/bindings/spmi/spmi.yaml | 75 +++++++++++++++++++ 4 files changed, 78 insertions(+), 44 deletions(-) delete mode 100644 Documentation/devicetree/bindings/spmi/spmi.txt create mode 100644 Documentation/devicetree/bindings/spmi/spmi.yaml diff --git a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.txt b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.txt index fffc8fde3302..79367a43b27d 100644 --- a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.txt +++ b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.txt @@ -37,7 +37,7 @@ Required properties: or generalized "qcom,spmi-pmic". - reg: Specifies the SPMI USID slave address for this device. For more information see: - Documentation/devicetree/bindings/spmi/spmi.txt + Documentation/devicetree/bindings/spmi/spmi.yaml Required properties for peripheral child nodes: - compatible: Should contain "qcom,xxx", where "xxx" is a peripheral name. diff --git a/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.txt b/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.txt index e16b9b5afc70..ca645e21fe47 100644 --- a/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.txt +++ b/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.txt @@ -7,8 +7,8 @@ devices to control a single SPMI master. The PMIC Arbiter can also act as an interrupt controller, providing interrupts to slave devices. -See spmi.txt for the generic SPMI controller binding requirements for child -nodes. +See Documentation/devicetree/bindings/spmi/spmi.yaml for the generic SPMI +controller binding requirements for child nodes. See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt for generic interrupt controller binding documentation. diff --git a/Documentation/devicetree/bindings/spmi/spmi.txt b/Documentation/devicetree/bindings/spmi/spmi.txt deleted file mode 100644 index 4bb10d161a27..000000000000 --- a/Documentation/devicetree/bindings/spmi/spmi.txt +++ /dev/null @@ -1,41 +0,0 @@ -System Power Management Interface (SPMI) Controller - -This document defines a generic set of bindings for use by SPMI controllers. A -controller is modelled in device tree as a node with zero or more child nodes, -each representing a unique slave on the bus. - -Required properties: -- #address-cells : must be set to 2 -- #size-cells : must be set to 0 - -Child nodes: - -An SPMI controller node can contain zero or more child nodes representing slave -devices on the bus. Child 'reg' properties are specified as an address, type -pair. The address must be in the range 0-15 (4 bits). The type must be one of -SPMI_USID (0) or SPMI_GSID (1) for Unique Slave ID or Group Slave ID respectively. -These are the identifiers "statically assigned by the system integrator", as -per the SPMI spec. - -Each child node must have one and only one 'reg' entry of type SPMI_USID. - -#include - - spmi@.. { - compatible = "..."; - reg = <...>; - - #address-cells = <2>; - #size-cells = <0>; - - child@0 { - compatible = "..."; - reg = <0 SPMI_USID>; - }; - - child@7 { - compatible = "..."; - reg = <7 SPMI_USID - 3 SPMI_GSID>; - }; - }; diff --git a/Documentation/devicetree/bindings/spmi/spmi.yaml b/Documentation/devicetree/bindings/spmi/spmi.yaml new file mode 100644 index 000000000000..0cfbf56ba825 --- /dev/null +++ b/Documentation/devicetree/bindings/spmi/spmi.yaml @@ -0,0 +1,75 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spmi/spmi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: System Power Management Interface (SPMI) Controller + +maintainers: + - Stephen Boyd + +description: | + The System Power Management (SPMI) controller is a 2-wire bus defined + by the MIPI Alliance for power management control to be used on SoC designs. + + SPMI controllers are modelled in device tree using a generic set of + bindings defined here, plus any bus controller specific properties, if + needed. + + Each SPMI controller has zero or more child nodes (up to 16 ones), each + one representing an unique slave at the bus. + +properties: + $nodename: + pattern: "^spmi@.*" + + reg: + maxItems: 1 + + "#address-cells": + const: 2 + + "#size-cells": + const: 0 + +patternProperties: + "@[0-9a-f]$": + description: up to 16 child PMIC nodes + type: object + + properties: + reg: + minItems: 1 + maxItems: 2 + items: + - minimum: 0 + maximum: 0xf + - enum: [ 0 ] + description: | + 0 means user ID address. 1 is reserved for group ID address. + + required: + - reg + +required: + - reg + +examples: + - | + #include + + spmi@0 { + reg = <0 0>; + + #address-cells = <2>; + #size-cells = <0>; + + child@0 { + reg = <0 SPMI_USID>; + }; + + child@7 { + reg = <7 SPMI_USID>; + }; + }; From 7c69898b86b45842e1c2799df845e203c71a667e Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Wed, 9 Sep 2020 09:25:33 +0200 Subject: [PATCH 129/433] Revert "test_firmware: Test platform fw loading on non-EFI systems" This reverts commit 18efb2f9e897ac65e7a1b2892f4a53e404534eba as it is reported to break the build: https://lore.kernel.org/r/20200909154709.619fe9bb@canb.auug.org.au Reported-by: Stephen Rothwell Fixes: 18efb2f9e897 ("test_firmware: Test platform fw loading on non-EFI systems") Cc: stable@vger.kernel.org Cc: Luis Chamberlain Cc: Scott Branden Cc: Kees Cook Link: https://lore.kernel.org/r/20200909154709.619fe9bb@canb.auug.org.au Signed-off-by: Greg Kroah-Hartman --- drivers/firmware/efi/embedded-firmware.c | 21 +++++---------------- drivers/firmware/efi/embedded-firmware.h | 21 --------------------- include/linux/efi_embedded_fw.h | 13 +++++++++++++ lib/test_firmware.c | 5 ----- 4 files changed, 18 insertions(+), 42 deletions(-) delete mode 100644 drivers/firmware/efi/embedded-firmware.h diff --git a/drivers/firmware/efi/embedded-firmware.c b/drivers/firmware/efi/embedded-firmware.c index f1330f55f7f4..e97a9c9d010c 100644 --- a/drivers/firmware/efi/embedded-firmware.c +++ b/drivers/firmware/efi/embedded-firmware.c @@ -14,22 +14,11 @@ #include #include -#include "embedded-firmware.h" - -#ifdef CONFIG_TEST_FIRMWARE -# define EFI_EMBEDDED_FW_VISIBILITY -#else -# define EFI_EMBEDDED_FW_VISIBILITY static -#endif - -EFI_EMBEDDED_FW_VISIBILITY LIST_HEAD(efi_embedded_fw_list); -EFI_EMBEDDED_FW_VISIBILITY bool efi_embedded_fw_checked; - /* Exported for use by lib/test_firmware.c only */ -#ifdef CONFIG_TEST_FIRMWARE +LIST_HEAD(efi_embedded_fw_list); EXPORT_SYMBOL_GPL(efi_embedded_fw_list); -EXPORT_SYMBOL_GPL(efi_embedded_fw_checked); -#endif + +static bool checked_for_fw; static const struct dmi_system_id * const embedded_fw_table[] = { #ifdef CONFIG_TOUCHSCREEN_DMI @@ -127,14 +116,14 @@ void __init efi_check_for_embedded_firmwares(void) } } - efi_embedded_fw_checked = true; + checked_for_fw = true; } int efi_get_embedded_fw(const char *name, const u8 **data, size_t *size) { struct efi_embedded_fw *iter, *fw = NULL; - if (!efi_embedded_fw_checked) { + if (!checked_for_fw) { pr_warn("Warning %s called while we did not check for embedded fw\n", __func__); return -ENOENT; diff --git a/drivers/firmware/efi/embedded-firmware.h b/drivers/firmware/efi/embedded-firmware.h deleted file mode 100644 index bb894eae0906..000000000000 --- a/drivers/firmware/efi/embedded-firmware.h +++ /dev/null @@ -1,21 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef _EFI_EMBEDDED_FW_INTERNAL_H_ -#define _EFI_EMBEDDED_FW_INTERNAL_H_ - -/* - * This struct and efi_embedded_fw_list are private to the efi-embedded fw - * implementation they only in separate header for use by lib/test_firmware.c. - */ -struct efi_embedded_fw { - struct list_head list; - const char *name; - const u8 *data; - size_t length; -}; - -#ifdef CONFIG_TEST_FIRMWARE -extern struct list_head efi_embedded_fw_list; -extern bool efi_embedded_fw_checked; -#endif - -#endif /* _EFI_EMBEDDED_FW_INTERNAL_H_ */ diff --git a/include/linux/efi_embedded_fw.h b/include/linux/efi_embedded_fw.h index 4ad5db9f5312..57eac5241303 100644 --- a/include/linux/efi_embedded_fw.h +++ b/include/linux/efi_embedded_fw.h @@ -7,6 +7,19 @@ #define EFI_EMBEDDED_FW_PREFIX_LEN 8 +/* + * This struct and efi_embedded_fw_list are private to the efi-embedded fw + * implementation they are in this header for use by lib/test_firmware.c only! + */ +struct efi_embedded_fw { + struct list_head list; + const char *name; + const u8 *data; + size_t length; +}; + +extern struct list_head efi_embedded_fw_list; + /** * struct efi_embedded_fw_desc - This struct is used by the EFI embedded-fw * code to search for embedded firmwares. diff --git a/lib/test_firmware.c b/lib/test_firmware.c index 62af792e151c..9fee2b93a8d1 100644 --- a/lib/test_firmware.c +++ b/lib/test_firmware.c @@ -489,7 +489,6 @@ out: static DEVICE_ATTR_WO(trigger_request); #ifdef CONFIG_EFI_EMBEDDED_FIRMWARE -#include "../drivers/firmware/efi/embedded-firmware.h" static ssize_t trigger_request_platform_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) @@ -502,7 +501,6 @@ static ssize_t trigger_request_platform_store(struct device *dev, }; struct efi_embedded_fw efi_embedded_fw; const struct firmware *firmware = NULL; - bool saved_efi_embedded_fw_checked; char *name; int rc; @@ -515,8 +513,6 @@ static ssize_t trigger_request_platform_store(struct device *dev, efi_embedded_fw.data = (void *)test_data; efi_embedded_fw.length = sizeof(test_data); list_add(&efi_embedded_fw.list, &efi_embedded_fw_list); - saved_efi_embedded_fw_checked = efi_embedded_fw_checked; - efi_embedded_fw_checked = true; pr_info("loading '%s'\n", name); rc = firmware_request_platform(&firmware, name, dev); @@ -534,7 +530,6 @@ static ssize_t trigger_request_platform_store(struct device *dev, rc = count; out: - efi_embedded_fw_checked = saved_efi_embedded_fw_checked; release_firmware(firmware); list_del(&efi_embedded_fw.list); kfree(name); From f601e8f37c2c1c52f2923fffc48204a7f7dc023d Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Wed, 9 Sep 2020 09:37:40 +0200 Subject: [PATCH 130/433] Revert "driver core: Annotate dev_err_probe() with __must_check" This reverts commit e1f82a0dcf388d98bcc7ad195c03bd812405e6b2 as it's already starting to cause build warnings in linux-next for things that are "obviously correct". It's up to driver authors do "do the right thing" here with this function, and if they don't want to call it as the last line of a function, that's up to them, otherwise code that looks like: ret = dev_err_probe(..., ret, ...); does look really "odd". Reported-by: Stephen Rothwell Reported-by: Krzysztof Kozlowski Fixes: e1f82a0dcf38 ("driver core: Annotate dev_err_probe() with __must_check") Cc: Andy Shevchenko Signed-off-by: Greg Kroah-Hartman --- include/linux/device.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/linux/device.h b/include/linux/device.h index 85d5c28bed93..7a0938cf8bd7 100644 --- a/include/linux/device.h +++ b/include/linux/device.h @@ -924,7 +924,7 @@ void device_links_supplier_sync_state_pause(void); void device_links_supplier_sync_state_resume(void); extern __printf(3, 4) -int __must_check dev_err_probe(const struct device *dev, int err, const char *fmt, ...); +int dev_err_probe(const struct device *dev, int err, const char *fmt, ...); /* Create alias, so I can be autoloaded. */ #define MODULE_ALIAS_CHARDEV(major,minor) \ From 3d93edc77515c6f51fa9bbbe2185e2ec32bad024 Mon Sep 17 00:00:00 2001 From: Dan Murphy Date: Wed, 12 Aug 2020 14:32:48 -0500 Subject: [PATCH 131/433] dt: bindings: lp55xx: Updte yaml examples with new color ID Update the binding examples for the color ID to LED_COLOR_ID_RGB Signed-off-by: Dan Murphy Acked-by: Rob Herring Signed-off-by: Pavel Machek --- Documentation/devicetree/bindings/leds/leds-lp55xx.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/leds/leds-lp55xx.yaml b/Documentation/devicetree/bindings/leds/leds-lp55xx.yaml index b1bb3feb0f4d..89f69d62493e 100644 --- a/Documentation/devicetree/bindings/leds/leds-lp55xx.yaml +++ b/Documentation/devicetree/bindings/leds/leds-lp55xx.yaml @@ -189,7 +189,7 @@ examples: #address-cells = <1>; #size-cells = <0>; reg = <0x2>; - color = ; + color = ; function = LED_FUNCTION_STANDBY; linux,default-trigger = "heartbeat"; From dddb4e38c6ba3f7ff5202d556982a0c82fa9a240 Mon Sep 17 00:00:00 2001 From: Grant Feng Date: Tue, 25 Aug 2020 16:22:05 +0800 Subject: [PATCH 132/433] leds: is31fl319x: Add shutdown pin and generate a 5ms low pulse when startup generate a 5ms low pulse on shutdown pin when startup, then the chip becomes more stable in the complex EM environment. Signed-off-by: Grant Feng Signed-off-by: Pavel Machek --- drivers/leds/leds-is31fl319x.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/leds/leds-is31fl319x.c b/drivers/leds/leds-is31fl319x.c index ca6634b8683c..54ac50740d43 100644 --- a/drivers/leds/leds-is31fl319x.c +++ b/drivers/leds/leds-is31fl319x.c @@ -16,6 +16,8 @@ #include #include #include +#include +#include /* register numbers */ #define IS31FL319X_SHUTDOWN 0x00 @@ -61,6 +63,7 @@ struct is31fl319x_chip { const struct is31fl319x_chipdef *cdef; struct i2c_client *client; + struct gpio_desc *shutdown_gpio; struct regmap *regmap; struct mutex lock; u32 audio_gain_db; @@ -207,6 +210,15 @@ static int is31fl319x_parse_dt(struct device *dev, if (!np) return -ENODEV; + is31->shutdown_gpio = devm_gpiod_get_optional(dev, + "shutdown", + GPIOD_OUT_HIGH); + if (IS_ERR(is31->shutdown_gpio)) { + ret = PTR_ERR(is31->shutdown_gpio); + dev_err(dev, "Failed to get shutdown gpio: %d\n", ret); + return ret; + } + of_dev_id = of_match_device(of_is31fl319x_match, dev); if (!of_dev_id) { dev_err(dev, "Failed to match device with supported chips\n"); @@ -350,6 +362,12 @@ static int is31fl319x_probe(struct i2c_client *client, if (err) goto free_mutex; + if (is31->shutdown_gpio) { + gpiod_direction_output(is31->shutdown_gpio, 0); + mdelay(5); + gpiod_direction_output(is31->shutdown_gpio, 1); + } + is31->client = client; is31->regmap = devm_regmap_init_i2c(client, ®map_config); if (IS_ERR(is31->regmap)) { From 23bdfe00424c297051cea73cbdb7ef7398f3cb6e Mon Sep 17 00:00:00 2001 From: Grant Feng Date: Tue, 25 Aug 2020 16:22:06 +0800 Subject: [PATCH 133/433] DT: leds: Add an optional property named 'shutdown-gpios' The chip enters hardware shutdown when the SDB pin is pulled low. The chip releases hardware shutdown when the SDB pin is pulled high. Signed-off-by: Grant Feng Acked-by: Rob Herring Signed-off-by: Pavel Machek --- Documentation/devicetree/bindings/leds/leds-is31fl319x.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/leds/leds-is31fl319x.txt b/Documentation/devicetree/bindings/leds/leds-is31fl319x.txt index fc2603484544..676d43ec8169 100644 --- a/Documentation/devicetree/bindings/leds/leds-is31fl319x.txt +++ b/Documentation/devicetree/bindings/leds/leds-is31fl319x.txt @@ -16,6 +16,7 @@ Optional properties: - audio-gain-db : audio gain selection for external analog modulation input. Valid values: 0 - 21, step by 3 (rounded down) Default: 0 +- shutdown-gpios : Specifier of the GPIO connected to SDB pin of the chip. Each led is represented as a sub-node of the issi,is31fl319x device. There can be less leds subnodes than the chip can support but not more. @@ -44,6 +45,7 @@ fancy_leds: leds@65 { #address-cells = <1>; #size-cells = <0>; reg = <0x65>; + shutdown-gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>; red_aux: led@1 { label = "red:aux"; From 47eaa8ba12cc77895e2591ec57091bed7b3d9817 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 26 Aug 2020 16:50:10 +0200 Subject: [PATCH 134/433] leds: lm3692x: Simplify with dev_err_probe() Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and also it prints the error value. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Pavel Machek --- drivers/leds/leds-lm3692x.c | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/drivers/leds/leds-lm3692x.c b/drivers/leds/leds-lm3692x.c index e1e2d2b64a56..1d7ea1b76a12 100644 --- a/drivers/leds/leds-lm3692x.c +++ b/drivers/leds/leds-lm3692x.c @@ -394,13 +394,10 @@ static int lm3692x_probe_dt(struct lm3692x_led *led) led->regulator = devm_regulator_get_optional(&led->client->dev, "vled"); if (IS_ERR(led->regulator)) { ret = PTR_ERR(led->regulator); - if (ret != -ENODEV) { - if (ret != -EPROBE_DEFER) - dev_err(&led->client->dev, - "Failed to get vled regulator: %d\n", - ret); - return ret; - } + if (ret != -ENODEV) + return dev_err_probe(&led->client->dev, ret, + "Failed to get vled regulator\n"); + led->regulator = NULL; } From 7e8da60596b26c40483375f75297f45bd81d4096 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 26 Aug 2020 16:50:11 +0200 Subject: [PATCH 135/433] leds: pwm: Simplify with dev_err_probe() Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and also it prints the error value. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Pavel Machek --- drivers/leds/leds-pwm.c | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/drivers/leds/leds-pwm.c b/drivers/leds/leds-pwm.c index ef7b91bd2064..e35a97c1d828 100644 --- a/drivers/leds/leds-pwm.c +++ b/drivers/leds/leds-pwm.c @@ -78,13 +78,10 @@ static int led_pwm_add(struct device *dev, struct led_pwm_priv *priv, led_data->pwm = devm_fwnode_pwm_get(dev, fwnode, NULL); else led_data->pwm = devm_pwm_get(dev, led->name); - if (IS_ERR(led_data->pwm)) { - ret = PTR_ERR(led_data->pwm); - if (ret != -EPROBE_DEFER) - dev_err(dev, "unable to request PWM for %s: %d\n", - led->name, ret); - return ret; - } + if (IS_ERR(led_data->pwm)) + return dev_err_probe(dev, PTR_ERR(led_data->pwm), + "unable to request PWM for %s\n", + led->name); led_data->cdev.brightness_set_blocking = led_pwm_set; From 4582e783a2f481a813aa61178d77b2a5cb8f1d9e Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 26 Aug 2020 16:50:12 +0200 Subject: [PATCH 136/433] leds: sgm3140: Simplify with dev_err_probe() Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and also it prints the error value. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Pavel Machek --- drivers/leds/leds-sgm3140.c | 27 +++++++++------------------ 1 file changed, 9 insertions(+), 18 deletions(-) diff --git a/drivers/leds/leds-sgm3140.c b/drivers/leds/leds-sgm3140.c index 28c8b31fa952..f4f831570f11 100644 --- a/drivers/leds/leds-sgm3140.c +++ b/drivers/leds/leds-sgm3140.c @@ -195,30 +195,21 @@ static int sgm3140_probe(struct platform_device *pdev) priv->flash_gpio = devm_gpiod_get(&pdev->dev, "flash", GPIOD_OUT_LOW); ret = PTR_ERR_OR_ZERO(priv->flash_gpio); - if (ret) { - if (ret != -EPROBE_DEFER) - dev_err(&pdev->dev, - "Failed to request flash gpio: %d\n", ret); - return ret; - } + if (ret) + return dev_err_probe(&pdev->dev, ret, + "Failed to request flash gpio\n"); priv->enable_gpio = devm_gpiod_get(&pdev->dev, "enable", GPIOD_OUT_LOW); ret = PTR_ERR_OR_ZERO(priv->enable_gpio); - if (ret) { - if (ret != -EPROBE_DEFER) - dev_err(&pdev->dev, - "Failed to request enable gpio: %d\n", ret); - return ret; - } + if (ret) + return dev_err_probe(&pdev->dev, ret, + "Failed to request enable gpio\n"); priv->vin_regulator = devm_regulator_get(&pdev->dev, "vin"); ret = PTR_ERR_OR_ZERO(priv->vin_regulator); - if (ret) { - if (ret != -EPROBE_DEFER) - dev_err(&pdev->dev, - "Failed to request regulator: %d\n", ret); - return ret; - } + if (ret) + return dev_err_probe(&pdev->dev, ret, + "Failed to request regulator\n"); child_node = fwnode_get_next_available_child_node(pdev->dev.fwnode, NULL); From 03eb2ca44a95105d1482d5e7471016cf8b383f97 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 26 Aug 2020 16:50:13 +0200 Subject: [PATCH 137/433] leds: tlc591xx: Simplify with dev_err_probe() Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and also it prints the error value. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Pavel Machek --- drivers/leds/leds-tlc591xx.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/drivers/leds/leds-tlc591xx.c b/drivers/leds/leds-tlc591xx.c index 0929f1275814..1dc14051639c 100644 --- a/drivers/leds/leds-tlc591xx.c +++ b/drivers/leds/leds-tlc591xx.c @@ -213,12 +213,10 @@ tlc591xx_probe(struct i2c_client *client, led->ldev.max_brightness = TLC591XX_MAX_BRIGHTNESS; err = devm_led_classdev_register_ext(dev, &led->ldev, &init_data); - if (err < 0) { - if (err != -EPROBE_DEFER) - dev_err(dev, "couldn't register LED %s\n", - led->ldev.name); - return err; - } + if (err < 0) + return dev_err_probe(dev, err, + "couldn't register LED %s\n", + led->ldev.name); } return 0; } From d8db9dc348712bbe972e1edd952b67279e774ecc Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Thu, 27 Aug 2020 23:14:47 -0500 Subject: [PATCH 138/433] dt-bindings: hwlock: omap: Convert binding to YAML Convert the current OMAP hwspinlock binding from text format to YAML format/DT schema, and delete the legacy text binding file. The new YAML binding conversion is a slightly updated version compared to the original. The legacy "ti,hwmods" property is now obsolete and is dropped altogether, and the K3 example is updated to showcase the actual dts node usage. Signed-off-by: Suman Anna Link: https://lore.kernel.org/r/20200828041447.5900-1-s-anna@ti.com Signed-off-by: Rob Herring --- .../bindings/hwlock/omap-hwspinlock.txt | 41 ---------- .../bindings/hwlock/ti,omap-hwspinlock.yaml | 76 +++++++++++++++++++ 2 files changed, 76 insertions(+), 41 deletions(-) delete mode 100644 Documentation/devicetree/bindings/hwlock/omap-hwspinlock.txt create mode 100644 Documentation/devicetree/bindings/hwlock/ti,omap-hwspinlock.yaml diff --git a/Documentation/devicetree/bindings/hwlock/omap-hwspinlock.txt b/Documentation/devicetree/bindings/hwlock/omap-hwspinlock.txt deleted file mode 100644 index 8d365f89694c..000000000000 --- a/Documentation/devicetree/bindings/hwlock/omap-hwspinlock.txt +++ /dev/null @@ -1,41 +0,0 @@ -TI HwSpinlock for OMAP and K3 based SoCs -========================================= - -Required properties: -- compatible: Should be one of the following, - "ti,omap4-hwspinlock" for - OMAP44xx, OMAP54xx, AM33xx, AM43xx, DRA7xx SoCs - "ti,am654-hwspinlock" for - K3 AM65x and J721E SoCs -- reg: Contains the hwspinlock module register address space - (base address and length) -- ti,hwmods: Name of the hwmod associated with the hwspinlock device - (for OMAP architecture based SoCs only) -- #hwlock-cells: Should be 1. The OMAP hwspinlock users will use a - 0-indexed relative hwlock number as the argument - specifier value for requesting a specific hwspinlock - within a hwspinlock bank. - -Please look at the generic hwlock binding for usage information for consumers, -"Documentation/devicetree/bindings/hwlock/hwlock.txt" - -Example: - -1. OMAP4 SoCs -hwspinlock: spinlock@4a0f6000 { - compatible = "ti,omap4-hwspinlock"; - reg = <0x4a0f6000 0x1000>; - ti,hwmods = "spinlock"; - #hwlock-cells = <1>; -}; - -2. AM65x SoCs and J721E SoCs -&cbass_main { - cbass_main_navss: interconnect0 { - hwspinlock: spinlock@30e00000 { - compatible = "ti,am654-hwspinlock"; - reg = <0x00 0x30e00000 0x00 0x1000>; - #hwlock-cells = <1>; - }; - }; -}; diff --git a/Documentation/devicetree/bindings/hwlock/ti,omap-hwspinlock.yaml b/Documentation/devicetree/bindings/hwlock/ti,omap-hwspinlock.yaml new file mode 100644 index 000000000000..2765758d95e1 --- /dev/null +++ b/Documentation/devicetree/bindings/hwlock/ti,omap-hwspinlock.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwlock/ti,omap-hwspinlock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI HwSpinlock for OMAP and K3 based SoCs + +maintainers: + - Suman Anna + +properties: + compatible: + enum: + - ti,omap4-hwspinlock # for OMAP44xx, OMAP54xx, AM33xx, AM43xx, DRA7xx SoCs + - ti,am654-hwspinlock # for K3 AM65x, J721E and J7200 SoCs + + reg: + maxItems: 1 + + "#hwlock-cells": + const: 1 + description: | + The OMAP hwspinlock users will use a 0-indexed relative hwlock number as + the argument specifier value for requesting a specific hwspinlock within + a hwspinlock bank. + + Please look at the generic hwlock binding for usage information for + consumers, "Documentation/devicetree/bindings/hwlock/hwlock.txt" + +required: + - compatible + - reg + - "#hwlock-cells" + +additionalProperties: false + +examples: + + - | + /* OMAP4 SoCs */ + hwspinlock: spinlock@4a0f6000 { + compatible = "ti,omap4-hwspinlock"; + reg = <0x4a0f6000 0x1000>; + #hwlock-cells = <1>; + }; + + - | + / { + /* K3 AM65x SoCs */ + model = "Texas Instruments K3 AM654 SoC"; + compatible = "ti,am654"; + #address-cells = <2>; + #size-cells = <2>; + + bus@100000 { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */ + <0x00 0x30800000 0x00 0x30800000 0x00 0x0bc00000>; /* Main NavSS */ + + main_navss@30800000 { + compatible = "simple-mfd"; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x00 0x30800000 0x00 0x30800000 0x00 0x0bc00000>; + + spinlock@30e00000 { + compatible = "ti,am654-hwspinlock"; + reg = <0x00 0x30e00000 0x00 0x1000>; + #hwlock-cells = <1>; + }; + }; + }; + }; From 0c7a6b91d2276b09ade6e09766600f809f5a529a Mon Sep 17 00:00:00 2001 From: Stephen Boyd Date: Wed, 9 Sep 2020 23:04:40 -0700 Subject: [PATCH 139/433] driver core: platform: Document return type of more functions I can't always remember the return values of these functions, and so I usually jump to the function to read the kernel-doc and see that it doesn't tell me. Then I have to spend more time reading the code to jump to the function that actually tells me the return values. Let's document it here so that we don't all have to spend time digging through the code to understand the return values. Cc: Signed-off-by: Stephen Boyd Link: https://lore.kernel.org/r/20200910060440.2302925-1-swboyd@chromium.org Signed-off-by: Greg Kroah-Hartman --- drivers/base/platform.c | 14 ++++++++++++++ lib/devres.c | 18 ++++++++++++------ 2 files changed, 26 insertions(+), 6 deletions(-) diff --git a/drivers/base/platform.c b/drivers/base/platform.c index e5d8a0503b4f..4b3dc6813714 100644 --- a/drivers/base/platform.c +++ b/drivers/base/platform.c @@ -45,6 +45,8 @@ EXPORT_SYMBOL_GPL(platform_bus); * @dev: platform device * @type: resource type * @num: resource index + * + * Return: a pointer to the resource or NULL on failure. */ struct resource *platform_get_resource(struct platform_device *dev, unsigned int type, unsigned int num) @@ -70,6 +72,9 @@ EXPORT_SYMBOL_GPL(platform_get_resource); * resource management * @index: resource index * @res: optional output parameter to store a pointer to the obtained resource. + * + * Return: a pointer to the remapped memory or an ERR_PTR() encoded error code + * on failure. */ void __iomem * devm_platform_get_and_ioremap_resource(struct platform_device *pdev, @@ -91,6 +96,9 @@ EXPORT_SYMBOL_GPL(devm_platform_get_and_ioremap_resource); * @pdev: platform device to use both for memory resource lookup as well as * resource management * @index: resource index + * + * Return: a pointer to the remapped memory or an ERR_PTR() encoded error code + * on failure. */ void __iomem *devm_platform_ioremap_resource(struct platform_device *pdev, unsigned int index) @@ -106,6 +114,9 @@ EXPORT_SYMBOL_GPL(devm_platform_ioremap_resource); * @pdev: platform device to use both for memory resource lookup as well as * resource management * @index: resource index + * + * Return: a pointer to the remapped memory or an ERR_PTR() encoded error code + * on failure. */ void __iomem *devm_platform_ioremap_resource_wc(struct platform_device *pdev, unsigned int index) @@ -124,6 +135,9 @@ void __iomem *devm_platform_ioremap_resource_wc(struct platform_device *pdev, * @pdev: platform device to use both for memory resource lookup as well as * resource management * @name: name of the resource + * + * Return: a pointer to the remapped memory or an ERR_PTR() encoded error code + * on failure. */ void __iomem * devm_platform_ioremap_resource_byname(struct platform_device *pdev, diff --git a/lib/devres.c b/lib/devres.c index 8bd3ed450614..2a4ff5d64288 100644 --- a/lib/devres.c +++ b/lib/devres.c @@ -162,13 +162,15 @@ __devm_ioremap_resource(struct device *dev, const struct resource *res, * region and ioremaps it. All operations are managed and will be undone * on driver detach. * - * Returns a pointer to the remapped memory or an ERR_PTR() encoded error code - * on failure. Usage example: + * Usage example: * * res = platform_get_resource(pdev, IORESOURCE_MEM, 0); * base = devm_ioremap_resource(&pdev->dev, res); * if (IS_ERR(base)) * return PTR_ERR(base); + * + * Return: a pointer to the remapped memory or an ERR_PTR() encoded error code + * on failure. */ void __iomem *devm_ioremap_resource(struct device *dev, const struct resource *res) @@ -183,8 +185,8 @@ EXPORT_SYMBOL(devm_ioremap_resource); * @dev: generic device to handle the resource for * @res: resource to be handled * - * Returns a pointer to the remapped memory or an ERR_PTR() encoded error code - * on failure. Usage example: + * Return: a pointer to the remapped memory or an ERR_PTR() encoded error code + * on failure. */ void __iomem *devm_ioremap_resource_wc(struct device *dev, const struct resource *res) @@ -207,8 +209,8 @@ void __iomem *devm_ioremap_resource_wc(struct device *dev, * @node: The device-tree node where the resource resides * @index: index of the MMIO range in the "reg" property * @size: Returns the size of the resource (pass NULL if not needed) - * Returns a pointer to the requested and mapped memory or an ERR_PTR() encoded - * error code on failure. Usage example: + * + * Usage example: * * base = devm_of_iomap(&pdev->dev, node, 0, NULL); * if (IS_ERR(base)) @@ -219,6 +221,8 @@ void __iomem *devm_ioremap_resource_wc(struct device *dev, * two drivers try to map the same memory, the of_iomap() function will succeed * but the devm_of_iomap() function will return -EBUSY. * + * Return: a pointer to the requested and mapped memory or an ERR_PTR() encoded + * error code on failure. */ void __iomem *devm_of_iomap(struct device *dev, struct device_node *node, int index, resource_size_t *size) @@ -256,6 +260,8 @@ static int devm_ioport_map_match(struct device *dev, void *res, * * Managed ioport_map(). Map is automatically unmapped on driver * detach. + * + * Return: a pointer to the remapped memory or NULL on failure. */ void __iomem *devm_ioport_map(struct device *dev, unsigned long port, unsigned int nr) From 0de7511695680425aa1e6e1e1c7a7c24e6250491 Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Wed, 9 Sep 2020 20:02:48 +0200 Subject: [PATCH 140/433] platform_device: switch to simpler IDA interface We don't need to specify any ranges when allocating IDs so we can switch to ida_alloc() and ida_free() instead of the ida_simple_ counterparts. ida_simple_get(ida, 0, 0, gfp) is equivalent to ida_alloc_range(ida, 0, UINT_MAX, gfp) which is equivalent to ida_alloc(ida, gfp). Note: IDR will never actually allocate an ID larger than INT_MAX. Signed-off-by: Bartosz Golaszewski Link: https://lore.kernel.org/r/20200909180248.10093-1-brgl@bgdev.pl Signed-off-by: Greg Kroah-Hartman --- drivers/base/platform.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/base/platform.c b/drivers/base/platform.c index 4b3dc6813714..d90d92e63903 100644 --- a/drivers/base/platform.c +++ b/drivers/base/platform.c @@ -573,7 +573,7 @@ int platform_device_add(struct platform_device *pdev) * that we remember it must be freed, and we append a suffix * to avoid namespace collision with explicit IDs. */ - ret = ida_simple_get(&platform_devid_ida, 0, 0, GFP_KERNEL); + ret = ida_alloc(&platform_devid_ida, GFP_KERNEL); if (ret < 0) goto err_out; pdev->id = ret; @@ -614,7 +614,7 @@ int platform_device_add(struct platform_device *pdev) failed: if (pdev->id_auto) { - ida_simple_remove(&platform_devid_ida, pdev->id); + ida_free(&platform_devid_ida, pdev->id); pdev->id = PLATFORM_DEVID_AUTO; } @@ -645,7 +645,7 @@ void platform_device_del(struct platform_device *pdev) device_del(&pdev->dev); if (pdev->id_auto) { - ida_simple_remove(&platform_devid_ida, pdev->id); + ida_free(&platform_devid_ida, pdev->id); pdev->id = PLATFORM_DEVID_AUTO; } From b445f6237744df5e8d4f56f8733b2108c611220a Mon Sep 17 00:00:00 2001 From: Thomas Preston Date: Fri, 28 Aug 2020 22:32:25 +0100 Subject: [PATCH 141/433] pinctrl: mcp23s08: Fix mcp23x17_regmap initialiser The mcp23x17_regmap is initialised with structs named "mcp23x16". However, the mcp23s08 driver doesn't support the MCP23016 device yet, so this appears to be a typo. Fixes: 8f38910ba4f6 ("pinctrl: mcp23s08: switch to regmap caching") Signed-off-by: Thomas Preston Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/20200828213226.1734264-2-thomas.preston@codethink.co.uk Signed-off-by: Linus Walleij --- drivers/pinctrl/pinctrl-mcp23s08.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/pinctrl/pinctrl-mcp23s08.c b/drivers/pinctrl/pinctrl-mcp23s08.c index b4606811cf57..3f5fed28557b 100644 --- a/drivers/pinctrl/pinctrl-mcp23s08.c +++ b/drivers/pinctrl/pinctrl-mcp23s08.c @@ -87,7 +87,7 @@ const struct regmap_config mcp23x08_regmap = { }; EXPORT_SYMBOL_GPL(mcp23x08_regmap); -static const struct reg_default mcp23x16_defaults[] = { +static const struct reg_default mcp23x17_defaults[] = { {.reg = MCP_IODIR << 1, .def = 0xffff}, {.reg = MCP_IPOL << 1, .def = 0x0000}, {.reg = MCP_GPINTEN << 1, .def = 0x0000}, @@ -98,23 +98,23 @@ static const struct reg_default mcp23x16_defaults[] = { {.reg = MCP_OLAT << 1, .def = 0x0000}, }; -static const struct regmap_range mcp23x16_volatile_range = { +static const struct regmap_range mcp23x17_volatile_range = { .range_min = MCP_INTF << 1, .range_max = MCP_GPIO << 1, }; -static const struct regmap_access_table mcp23x16_volatile_table = { - .yes_ranges = &mcp23x16_volatile_range, +static const struct regmap_access_table mcp23x17_volatile_table = { + .yes_ranges = &mcp23x17_volatile_range, .n_yes_ranges = 1, }; -static const struct regmap_range mcp23x16_precious_range = { +static const struct regmap_range mcp23x17_precious_range = { .range_min = MCP_GPIO << 1, .range_max = MCP_GPIO << 1, }; -static const struct regmap_access_table mcp23x16_precious_table = { - .yes_ranges = &mcp23x16_precious_range, +static const struct regmap_access_table mcp23x17_precious_table = { + .yes_ranges = &mcp23x17_precious_range, .n_yes_ranges = 1, }; @@ -124,10 +124,10 @@ const struct regmap_config mcp23x17_regmap = { .reg_stride = 2, .max_register = MCP_OLAT << 1, - .volatile_table = &mcp23x16_volatile_table, - .precious_table = &mcp23x16_precious_table, - .reg_defaults = mcp23x16_defaults, - .num_reg_defaults = ARRAY_SIZE(mcp23x16_defaults), + .volatile_table = &mcp23x17_volatile_table, + .precious_table = &mcp23x17_precious_table, + .reg_defaults = mcp23x17_defaults, + .num_reg_defaults = ARRAY_SIZE(mcp23x17_defaults), .cache_type = REGCACHE_FLAT, .val_format_endian = REGMAP_ENDIAN_LITTLE, }; From b9b7fb29433b906635231d0a111224efa009198c Mon Sep 17 00:00:00 2001 From: Thomas Preston Date: Fri, 28 Aug 2020 22:32:26 +0100 Subject: [PATCH 142/433] pinctrl: mcp23s08: Fix mcp23x17 precious range On page 23 of the datasheet [0] it says "The register remains unchanged until the interrupt is cleared via a read of INTCAP or GPIO." Include INTCAPA and INTCAPB registers in precious range, so that they aren't accidentally cleared when we read via debugfs. [0] https://ww1.microchip.com/downloads/en/DeviceDoc/20001952C.pdf Fixes: 8f38910ba4f6 ("pinctrl: mcp23s08: switch to regmap caching") Signed-off-by: Thomas Preston Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/20200828213226.1734264-3-thomas.preston@codethink.co.uk Signed-off-by: Linus Walleij --- drivers/pinctrl/pinctrl-mcp23s08.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pinctrl/pinctrl-mcp23s08.c b/drivers/pinctrl/pinctrl-mcp23s08.c index 3f5fed28557b..ce2d8014b7e0 100644 --- a/drivers/pinctrl/pinctrl-mcp23s08.c +++ b/drivers/pinctrl/pinctrl-mcp23s08.c @@ -109,7 +109,7 @@ static const struct regmap_access_table mcp23x17_volatile_table = { }; static const struct regmap_range mcp23x17_precious_range = { - .range_min = MCP_GPIO << 1, + .range_min = MCP_INTCAP << 1, .range_max = MCP_GPIO << 1, }; From 8e2f830acaa4a05087bc637fff4434de50057c11 Mon Sep 17 00:00:00 2001 From: Rikard Falkeborn Date: Mon, 31 Aug 2020 00:43:09 +0200 Subject: [PATCH 143/433] pinctrl: actions: pinctrl-owl: Constify owl_pinctrl_ops and owl_pinmux_ops The only usage of owl_pinctrl_ops and owl_pinmux_ops is to assign their addresses to the pctlops and the pmxops fields in the pinctrl_desc struct, which are const pointers. Make them const to allow the compiler to put them in read-only memory. Signed-off-by: Rikard Falkeborn Reviewed-by: Manivannan Sadhasivam Link: https://lore.kernel.org/r/20200830224311.36994-2-rikard.falkeborn@gmail.com Signed-off-by: Linus Walleij --- drivers/pinctrl/actions/pinctrl-owl.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/actions/pinctrl-owl.c b/drivers/pinctrl/actions/pinctrl-owl.c index 7efdfb4f3e9b..903a4baf3846 100644 --- a/drivers/pinctrl/actions/pinctrl-owl.c +++ b/drivers/pinctrl/actions/pinctrl-owl.c @@ -125,7 +125,7 @@ static void owl_pin_dbg_show(struct pinctrl_dev *pctrldev, seq_printf(s, "%s", dev_name(pctrl->dev)); } -static struct pinctrl_ops owl_pinctrl_ops = { +static const struct pinctrl_ops owl_pinctrl_ops = { .get_groups_count = owl_get_groups_count, .get_group_name = owl_get_group_name, .get_group_pins = owl_get_group_pins, @@ -212,7 +212,7 @@ static int owl_set_mux(struct pinctrl_dev *pctrldev, return 0; } -static struct pinmux_ops owl_pinmux_ops = { +static const struct pinmux_ops owl_pinmux_ops = { .get_functions_count = owl_get_funcs_count, .get_function_name = owl_get_func_name, .get_function_groups = owl_get_func_groups, From d01afb7115b190a594441d152a5dd364b9e0d602 Mon Sep 17 00:00:00 2001 From: Rikard Falkeborn Date: Mon, 31 Aug 2020 00:43:10 +0200 Subject: [PATCH 144/433] pinctrl: actions: pinctrl-s700: Constify s700_padinfo[] The only usage of s700_padinfo[] is to assign it to the padinfo field in the owl_pinctrl_soc_data struct, which is a const pointer. Make it const to allow the compiler to put it in read-only memory. Signed-off-by: Rikard Falkeborn Reviewed-by: Manivannan Sadhasivam Link: https://lore.kernel.org/r/20200830224311.36994-3-rikard.falkeborn@gmail.com Signed-off-by: Linus Walleij --- drivers/pinctrl/actions/pinctrl-s700.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pinctrl/actions/pinctrl-s700.c b/drivers/pinctrl/actions/pinctrl-s700.c index f579a6593f37..fd00940a5799 100644 --- a/drivers/pinctrl/actions/pinctrl-s700.c +++ b/drivers/pinctrl/actions/pinctrl-s700.c @@ -1685,7 +1685,7 @@ static PAD_PULLCTL_CONF(I2C2_SDATA, 2, 8, 1); static PAD_PULLCTL_CONF(I2C2_SCLK, 2, 7, 1); /* Pad info table for the pinmux subsystem */ -static struct owl_padinfo s700_padinfo[NUM_PADS] = { +static const struct owl_padinfo s700_padinfo[NUM_PADS] = { [ETH_TXD0] = PAD_INFO_ST(ETH_TXD0), [ETH_TXD1] = PAD_INFO_ST(ETH_TXD1), [ETH_TXEN] = PAD_INFO_ST(ETH_TXEN), From 8a643cc8d56d12e56cdd08139566a28b6150b231 Mon Sep 17 00:00:00 2001 From: Rikard Falkeborn Date: Mon, 31 Aug 2020 00:43:11 +0200 Subject: [PATCH 145/433] pinctrl: actions: pinctrl-s900: Constify s900_padinfo[] The only usage of s900_padinfo[] is to assign it to the padinfo field in the owl_pinctrl_soc_data struct, which is a const pointer. Make it const to allow the compiler to put it in read-only memory. Signed-off-by: Rikard Falkeborn Reviewed-by: Manivannan Sadhasivam Link: https://lore.kernel.org/r/20200830224311.36994-4-rikard.falkeborn@gmail.com Signed-off-by: Linus Walleij --- drivers/pinctrl/actions/pinctrl-s900.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pinctrl/actions/pinctrl-s900.c b/drivers/pinctrl/actions/pinctrl-s900.c index 9492b86852e7..811249a8011e 100644 --- a/drivers/pinctrl/actions/pinctrl-s900.c +++ b/drivers/pinctrl/actions/pinctrl-s900.c @@ -1556,7 +1556,7 @@ static PAD_ST_CONF(I2S_BCLK0, 1, 1, 1); static PAD_ST_CONF(I2S_MCLK0, 1, 0, 1); /* Pad info table */ -static struct owl_padinfo s900_padinfo[NUM_PADS] = { +static const struct owl_padinfo s900_padinfo[NUM_PADS] = { [ETH_TXD0] = PAD_INFO_ST(ETH_TXD0), [ETH_TXD1] = PAD_INFO_ST(ETH_TXD1), [ETH_TXEN] = PAD_INFO_ST(ETH_TXEN), From 1825c1fe0057e1904f772574e16d9cbbcaf30f85 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Thu, 10 Sep 2020 05:43:29 +0900 Subject: [PATCH 146/433] pinctrl: Add DT bindings for Toshiba Visconti TMPV7700 SoC Add pinctrl bindings for Toshiba Visconti TMPV7700 SoC series. Signed-off-by: Nobuhiro Iwamatsu Reviewed-by: Punit Agrawal Link: https://lore.kernel.org/r/20200909204336.2558-2-nobuhiro1.iwamatsu@toshiba.co.jp Signed-off-by: Linus Walleij --- .../pinctrl/toshiba,visconti-pinctrl.yaml | 92 +++++++++++++++++++ 1 file changed, 92 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml diff --git a/Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml new file mode 100644 index 000000000000..d0d1a01140ea --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml @@ -0,0 +1,92 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/toshiba,visconti-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Toshiba Visconti TMPV770x pin mux/config controller + +maintainers: + - Nobuhiro Iwamatsu + +description: + Toshiba's Visconti ARM SoC a pin mux/config controller. + +properties: + compatible: + enum: + - toshiba,tmpv7708-pinctrl + + reg: + maxItems: 1 + +required: + - compatible + - reg + +patternProperties: + '-pins$': + type: object + description: | + A pinctrl node should contain at least one subnodes representing the + pinctrl groups available on the machine. Each subnode will list the + pins it needs, and how they should be configured, with regard to muxer + configuration, pullups, drive strength. + $ref: "pinmux-node.yaml" + + properties: + function: + description: + Function to mux. + $ref: "/schemas/types.yaml#/definitions/string" + enum: [i2c0, i2c1, i2c2, i2c3, i2c4, i2c5, i2c6, i2c7, i2c8, + spi0, spi1, spi2, spi3, spi4, spi5, spi6, + uart0, uart1, uart2, uart3, pwm, pcmif_out, pcmif_in] + + groups: + description: + Name of the pin group to use for the functions. + $ref: "/schemas/types.yaml#/definitions/string" + enum: [i2c0_grp, i2c1_grp, i2c2_grp, i2c3_grp, i2c4_grp, + i2c5_grp, i2c6_grp, i2c7_grp, i2c8_grp, + spi0_grp, spi0_cs0_grp, spi0_cs1_grp, spi0_cs2_grp, + spi1_grp, spi2_grp, spi3_grp, spi4_grp, spi5_grp, spi6_grp, + uart0_grp, uart1_grp, uart2_grp, uart3_grp, + pwm0_gpio4_grp, pwm0_gpio8_grp, pwm0_gpio12_grp, + pwm0_gpio16_grp, pwm1_gpio5_grp, pwm1_gpio9_grp, + pwm1_gpio13_grp, pwm1_gpio17_grp, pwm2_gpio6_grp, + pwm2_gpio10_grp, pwm2_gpio14_grp, pwm2_gpio18_grp, + pwm3_gpio7_grp, pwm3_gpio11_grp, pwm3_gpio15_grp, + pwm3_gpio19_grp, pcmif_out_grp, pcmif_in_grp] + + drive-strength: + enum: [2, 4, 6, 8, 16, 24, 32] + default: 2 + description: + Selects the drive strength for the specified pins, in mA. + + bias-pull-up: true + + bias-pull-down: true + + bias-disable: true + +additionalProperties: false + +examples: + # Pinmux controller node + - | + soc { + #address-cells = <2>; + #size-cells = <2>; + + pmux: pmux@24190000 { + compatible = "toshiba,tmpv7708-pinctrl"; + reg = <0 0x24190000 0 0x10000>; + + spi0_pins: spi0-pins { + function = "spi0"; + groups = "spi0_grp"; + }; + }; + }; From a68a7844264e4fb91dcc1c6525cdb275223ce79c Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Thu, 10 Sep 2020 05:43:30 +0900 Subject: [PATCH 147/433] pinctrl: visconti: Add Toshiba Visconti SoCs pinctrl support Add pinctrl support to Toshiba Visconti SoCs. Signed-off-by: Nobuhiro Iwamatsu Reviewed-by: Punit Agrawal Link: https://lore.kernel.org/r/20200909204336.2558-3-nobuhiro1.iwamatsu@toshiba.co.jp Signed-off-by: Linus Walleij --- drivers/pinctrl/Kconfig | 1 + drivers/pinctrl/Makefile | 1 + drivers/pinctrl/visconti/Kconfig | 14 + drivers/pinctrl/visconti/Makefile | 3 + drivers/pinctrl/visconti/pinctrl-common.c | 305 +++++++++++++++++ drivers/pinctrl/visconti/pinctrl-common.h | 96 ++++++ drivers/pinctrl/visconti/pinctrl-tmpv7700.c | 355 ++++++++++++++++++++ 7 files changed, 775 insertions(+) create mode 100644 drivers/pinctrl/visconti/Kconfig create mode 100644 drivers/pinctrl/visconti/Makefile create mode 100644 drivers/pinctrl/visconti/pinctrl-common.c create mode 100644 drivers/pinctrl/visconti/pinctrl-common.h create mode 100644 drivers/pinctrl/visconti/pinctrl-tmpv7700.c diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index 8828613c4e0e..6f62b9bb79bb 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -429,6 +429,7 @@ source "drivers/pinctrl/mediatek/Kconfig" source "drivers/pinctrl/zte/Kconfig" source "drivers/pinctrl/meson/Kconfig" source "drivers/pinctrl/cirrus/Kconfig" +source "drivers/pinctrl/visconti/Kconfig" config PINCTRL_XWAY bool diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile index 1731b2154df9..576cbedcbf73 100644 --- a/drivers/pinctrl/Makefile +++ b/drivers/pinctrl/Makefile @@ -74,3 +74,4 @@ obj-$(CONFIG_ARCH_VT8500) += vt8500/ obj-y += mediatek/ obj-$(CONFIG_PINCTRL_ZX) += zte/ obj-y += cirrus/ +obj-$(CONFIG_PINCTRL_VISCONTI) += visconti/ diff --git a/drivers/pinctrl/visconti/Kconfig b/drivers/pinctrl/visconti/Kconfig new file mode 100644 index 000000000000..198ec33189cc --- /dev/null +++ b/drivers/pinctrl/visconti/Kconfig @@ -0,0 +1,14 @@ +# SPDX-License-Identifier: GPL-2.0-only +config PINCTRL_VISCONTI + bool + select PINMUX + select GENERIC_PINCONF + select GENERIC_PINCTRL_GROUPS + select GENERIC_PINMUX_FUNCTIONS + +config PINCTRL_TMPV7700 + bool "Toshiba Visconti TMPV7700 series pinctrl driver" + depends on OF + depends on ARM64 || COMPILE_TEST + select PINCTRL_VISCONTI + default ARM64 && ARCH_VISCONTI diff --git a/drivers/pinctrl/visconti/Makefile b/drivers/pinctrl/visconti/Makefile new file mode 100644 index 000000000000..43b2eb663bce --- /dev/null +++ b/drivers/pinctrl/visconti/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0 +obj-$(CONFIG_PINCTRL_VISCONTI) += pinctrl-common.o +obj-$(CONFIG_PINCTRL_TMPV7700) += pinctrl-tmpv7700.o diff --git a/drivers/pinctrl/visconti/pinctrl-common.c b/drivers/pinctrl/visconti/pinctrl-common.c new file mode 100644 index 000000000000..0cb10b7b4430 --- /dev/null +++ b/drivers/pinctrl/visconti/pinctrl-common.c @@ -0,0 +1,305 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2020 TOSHIBA CORPORATION + * Copyright (c) 2020 Toshiba Electronic Devices & Storage Corporation + * Copyright (c) 2020 Nobuhiro Iwamatsu + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include "pinctrl-common.h" +#include "../core.h" +#include "../pinconf.h" +#include "../pinctrl-utils.h" + +#define DSEL_MASK GENMASK(3, 0) + +/* private data */ +struct visconti_pinctrl { + void __iomem *base; + struct device *dev; + struct pinctrl_dev *pctl; + struct pinctrl_desc pctl_desc; + + const struct visconti_pinctrl_devdata *devdata; + + spinlock_t lock; /* protect pinctrl register */ +}; + +/* pinconf */ +static int visconti_pin_config_set(struct pinctrl_dev *pctldev, + unsigned int _pin, + unsigned long *configs, + unsigned int num_configs) +{ + struct visconti_pinctrl *priv = pinctrl_dev_get_drvdata(pctldev); + const struct visconti_desc_pin *pin = &priv->devdata->pins[_pin]; + enum pin_config_param param; + unsigned int arg; + int i, ret = 0; + unsigned int val, set_val, pude_val; + unsigned long flags; + + dev_dbg(priv->dev, "%s: pin = %d (%s)\n", __func__, _pin, pin->pin.name); + + spin_lock_irqsave(&priv->lock, flags); + + for (i = 0; i < num_configs; i++) { + set_val = 0; + pude_val = 0; + + param = pinconf_to_config_param(configs[i]); + switch (param) { + case PIN_CONFIG_BIAS_PULL_UP: + set_val = 1; + fallthrough; + case PIN_CONFIG_BIAS_PULL_DOWN: + /* update pudsel setting */ + val = readl(priv->base + pin->pudsel_offset); + val &= ~BIT(pin->pud_shift); + val |= set_val << pin->pud_shift; + writel(val, priv->base + pin->pudsel_offset); + pude_val = 1; + fallthrough; + case PIN_CONFIG_BIAS_DISABLE: + /* update pude setting */ + val = readl(priv->base + pin->pude_offset); + val &= ~BIT(pin->pud_shift); + val |= pude_val << pin->pud_shift; + writel(val, priv->base + pin->pude_offset); + dev_dbg(priv->dev, "BIAS(%d): off = 0x%x val = 0x%x\n", + param, pin->pude_offset, val); + break; + + case PIN_CONFIG_DRIVE_STRENGTH: + arg = pinconf_to_config_argument(configs[i]); + dev_dbg(priv->dev, "DRV_STR arg = %d\n", arg); + switch (arg) { + case 2: + case 4: + case 8: + case 16: + case 24: + case 32: + /* + * I/O drive capacity setting: + * 2mA: 0 + * 4mA: 1 + * 8mA: 3 + * 16mA: 7 + * 24mA: 11 + * 32mA: 15 + */ + set_val = DIV_ROUND_CLOSEST(arg, 2) - 1; + break; + default: + ret = -EINVAL; + goto err; + } + /* update drive setting */ + val = readl(priv->base + pin->dsel_offset); + val &= ~(DSEL_MASK << pin->dsel_shift); + val |= set_val << pin->dsel_shift; + writel(val, priv->base + pin->dsel_offset); + break; + + default: + ret = -EOPNOTSUPP; + goto err; + } + } +err: + spin_unlock_irqrestore(&priv->lock, flags); + return ret; +} + +static int visconti_pin_config_group_set(struct pinctrl_dev *pctldev, + unsigned int selector, + unsigned long *configs, + unsigned int num_configs) +{ + struct visconti_pinctrl *priv = pinctrl_dev_get_drvdata(pctldev); + const unsigned int *pins; + unsigned int num_pins; + int i, ret; + + pins = priv->devdata->groups[selector].pins; + num_pins = priv->devdata->groups[selector].nr_pins; + + dev_dbg(priv->dev, "%s: select = %d, n_pin = %d, n_config = %d\n", + __func__, selector, num_pins, num_configs); + + for (i = 0; i < num_pins; i++) { + ret = visconti_pin_config_set(pctldev, pins[i], + configs, num_configs); + if (ret) + return ret; + } + + return 0; +} +static const struct pinconf_ops visconti_pinconf_ops = { + .is_generic = true, + .pin_config_set = visconti_pin_config_set, + .pin_config_group_set = visconti_pin_config_group_set, + .pin_config_config_dbg_show = pinconf_generic_dump_config, +}; + +/* pinctrl */ +static int visconti_get_groups_count(struct pinctrl_dev *pctldev) +{ + struct visconti_pinctrl *priv = pinctrl_dev_get_drvdata(pctldev); + + return priv->devdata->nr_groups; +} + +static const char *visconti_get_group_name(struct pinctrl_dev *pctldev, + unsigned int selector) +{ + struct visconti_pinctrl *priv = pinctrl_dev_get_drvdata(pctldev); + + return priv->devdata->groups[selector].name; +} + +static int visconti_get_group_pins(struct pinctrl_dev *pctldev, + unsigned int selector, + const unsigned int **pins, + unsigned int *num_pins) +{ + struct visconti_pinctrl *priv = pinctrl_dev_get_drvdata(pctldev); + + *pins = priv->devdata->groups[selector].pins; + *num_pins = priv->devdata->groups[selector].nr_pins; + + return 0; +} + +static const struct pinctrl_ops visconti_pinctrl_ops = { + .get_groups_count = visconti_get_groups_count, + .get_group_name = visconti_get_group_name, + .get_group_pins = visconti_get_group_pins, + .dt_node_to_map = pinconf_generic_dt_node_to_map_group, + .dt_free_map = pinctrl_utils_free_map, +}; + +/* pinmux */ +static int visconti_get_functions_count(struct pinctrl_dev *pctldev) +{ + struct visconti_pinctrl *priv = pinctrl_dev_get_drvdata(pctldev); + + return priv->devdata->nr_functions; +} + +static const char *visconti_get_function_name(struct pinctrl_dev *pctldev, + unsigned int selector) +{ + struct visconti_pinctrl *priv = pinctrl_dev_get_drvdata(pctldev); + + return priv->devdata->functions[selector].name; +} + +static int visconti_get_function_groups(struct pinctrl_dev *pctldev, + unsigned int selector, + const char * const **groups, + unsigned * const num_groups) +{ + struct visconti_pinctrl *priv = pinctrl_dev_get_drvdata(pctldev); + + *groups = priv->devdata->functions[selector].groups; + *num_groups = priv->devdata->functions[selector].nr_groups; + + return 0; +} + +static int visconti_set_mux(struct pinctrl_dev *pctldev, + unsigned int function, unsigned int group) +{ + struct visconti_pinctrl *priv = pinctrl_dev_get_drvdata(pctldev); + const struct visconti_pin_function *func = &priv->devdata->functions[function]; + const struct visconti_pin_group *grp = &priv->devdata->groups[group]; + const struct visconti_mux *mux = &grp->mux; + unsigned int val; + unsigned long flags; + + dev_dbg(priv->dev, "%s: function = %d(%s) group = %d(%s)\n", __func__, + function, func->name, group, grp->name); + + spin_lock_irqsave(&priv->lock, flags); + + /* update mux */ + val = readl(priv->base + mux->offset); + val &= ~mux->mask; + val |= mux->val; + writel(val, priv->base + mux->offset); + + spin_unlock_irqrestore(&priv->lock, flags); + + dev_dbg(priv->dev, "[%x]: 0x%x\n", mux->offset, val); + + return 0; +} + +static const struct pinmux_ops visconti_pinmux_ops = { + .get_functions_count = visconti_get_functions_count, + .get_function_name = visconti_get_function_name, + .get_function_groups = visconti_get_function_groups, + .set_mux = visconti_set_mux, + .strict = true, +}; + +int visconti_pinctrl_probe(struct platform_device *pdev, + const struct visconti_pinctrl_devdata *devdata) +{ + struct device *dev = &pdev->dev; + struct visconti_pinctrl *priv; + struct pinctrl_pin_desc *pins; + int i, ret; + + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->dev = dev; + priv->devdata = devdata; + spin_lock_init(&priv->lock); + + priv->base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(priv->base)) { + dev_err(dev, "unable to map I/O space\n"); + return PTR_ERR(priv->base); + } + + pins = devm_kcalloc(dev, devdata->nr_pins, + sizeof(*pins), GFP_KERNEL); + if (!pins) + return -ENOMEM; + + for (i = 0; i < devdata->nr_pins; i++) + pins[i] = devdata->pins[i].pin; + + priv->pctl_desc.name = dev_name(dev); + priv->pctl_desc.owner = THIS_MODULE; + priv->pctl_desc.pins = pins; + priv->pctl_desc.npins = devdata->nr_pins; + priv->pctl_desc.confops = &visconti_pinconf_ops; + priv->pctl_desc.pctlops = &visconti_pinctrl_ops; + priv->pctl_desc.pmxops = &visconti_pinmux_ops; + + ret = devm_pinctrl_register_and_init(dev, &priv->pctl_desc, + priv, &priv->pctl); + if (ret) { + dev_err(dev, "couldn't register pinctrl: %d\n", ret); + return ret; + } + + if (devdata->unlock) + devdata->unlock(priv->base); + + return pinctrl_enable(priv->pctl); +} diff --git a/drivers/pinctrl/visconti/pinctrl-common.h b/drivers/pinctrl/visconti/pinctrl-common.h new file mode 100644 index 000000000000..56a2eb0225fb --- /dev/null +++ b/drivers/pinctrl/visconti/pinctrl-common.h @@ -0,0 +1,96 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2020 TOSHIBA CORPORATION + * Copyright (c) 2020 Toshiba Electronic Devices & Storage Corporation + * Copyright (c) 2020 Nobuhiro Iwamatsu + */ + +#ifndef __VISCONTI_PINCTRL_COMMON_H__ +#define __VISCONTI_PINCTRL_COMMON_H__ + +struct pinctrl_pin_desc; + +/* PIN */ +#define VISCONTI_PINS(pins_name, ...) \ + static const unsigned int pins_name ## _pins[] = { __VA_ARGS__ } + +struct visconti_desc_pin { + struct pinctrl_pin_desc pin; + unsigned int dsel_offset; + unsigned int dsel_shift; + unsigned int pude_offset; + unsigned int pudsel_offset; + unsigned int pud_shift; +}; + +#define VISCONTI_PIN(_pin, dsel, d_sh, pude, pudsel, p_sh) \ +{ \ + .pin = _pin, \ + .dsel_offset = dsel, \ + .dsel_shift = d_sh, \ + .pude_offset = pude, \ + .pudsel_offset = pudsel, \ + .pud_shift = p_sh, \ +} + +/* Group */ +#define VISCONTI_GROUPS(groups_name, ...) \ + static const char * const groups_name ## _grps[] = { __VA_ARGS__ } + +struct visconti_mux { + unsigned int offset; + unsigned int mask; + unsigned int val; +}; + +struct visconti_pin_group { + const char *name; + const unsigned int *pins; + unsigned int nr_pins; + struct visconti_mux mux; +}; + +#define VISCONTI_PIN_GROUP(group_name, off, msk, v) \ +{ \ + .name = __stringify(group_name) "_grp", \ + .pins = group_name ## _pins, \ + .nr_pins = ARRAY_SIZE(group_name ## _pins), \ + .mux = { \ + .offset = off, \ + .mask = msk, \ + .val = v, \ + } \ +} + +/* MUX */ +struct visconti_pin_function { + const char *name; + const char * const *groups; + unsigned int nr_groups; +}; + +#define VISCONTI_PIN_FUNCTION(func) \ +{ \ + .name = #func, \ + .groups = func ## _grps, \ + .nr_groups = ARRAY_SIZE(func ## _grps), \ +} + +/* chip dependent data */ +struct visconti_pinctrl_devdata { + const struct visconti_desc_pin *pins; + unsigned int nr_pins; + const struct visconti_pin_group *groups; + unsigned int nr_groups; + const struct visconti_pin_function *functions; + unsigned int nr_functions; + + const struct visconti_mux *gpio_mux; + + void (*unlock)(void __iomem *base); +}; + +int visconti_pinctrl_probe(struct platform_device *pdev, + const struct visconti_pinctrl_devdata *devdata); + +#endif /* __VISCONTI_PINCTRL_COMMON_H__ */ diff --git a/drivers/pinctrl/visconti/pinctrl-tmpv7700.c b/drivers/pinctrl/visconti/pinctrl-tmpv7700.c new file mode 100644 index 000000000000..38a00d514f74 --- /dev/null +++ b/drivers/pinctrl/visconti/pinctrl-tmpv7700.c @@ -0,0 +1,355 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2020 TOSHIBA CORPORATION + * Copyright (c) 2020 Toshiba Electronic Devices & Storage Corporation + * Copyright (c) 2020 Nobuhiro Iwamatsu + */ + +#include +#include +#include +#include +#include +#include "pinctrl-common.h" + +#define tmpv7700_MAGIC_NUM 0x4932f70e + +/* register offset */ +#define REG_KEY_CTRL 0x0000 +#define REG_KEY_CMD 0x0004 +#define REG_PINMUX1 0x3000 +#define REG_PINMUX2 0x3004 +#define REG_PINMUX3 0x3008 +#define REG_PINMUX4 0x300c +#define REG_PINMUX5 0x3010 +#define REG_IOSET 0x3014 +#define REG_IO_VSEL 0x3018 +#define REG_IO_DSEL1 0x301c +#define REG_IO_DSEL2 0x3020 +#define REG_IO_DSEL3 0x3024 +#define REG_IO_DSEL4 0x3028 +#define REG_IO_DSEL5 0x302c +#define REG_IO_DSEL6 0x3030 +#define REG_IO_DSEL7 0x3034 +#define REG_IO_DSEL8 0x3038 +#define REG_IO_PUDE1 0x303c +#define REG_IO_PUDE2 0x3040 +#define REG_IO_PUDSEL1 0x3044 +#define REG_IO_PUDSEL2 0x3048 + +/* PIN */ +static const struct visconti_desc_pin pins_tmpv7700[] = { + VISCONTI_PIN(PINCTRL_PIN(0, "gpio0"), REG_IO_DSEL4, 24, + REG_IO_PUDE1, REG_IO_PUDSEL1, 30), + VISCONTI_PIN(PINCTRL_PIN(1, "gpio1"), REG_IO_DSEL4, 28, + REG_IO_PUDE1, REG_IO_PUDSEL1, 31), + VISCONTI_PIN(PINCTRL_PIN(2, "gpio2"), REG_IO_DSEL5, 0, + REG_IO_PUDE2, REG_IO_PUDSEL2, 0), + VISCONTI_PIN(PINCTRL_PIN(3, "gpio3"), REG_IO_DSEL5, 4, + REG_IO_PUDE2, REG_IO_PUDSEL2, 1), + VISCONTI_PIN(PINCTRL_PIN(4, "gpio4"), REG_IO_DSEL5, 8, + REG_IO_PUDE2, REG_IO_PUDSEL2, 2), + VISCONTI_PIN(PINCTRL_PIN(5, "gpio5"), REG_IO_DSEL5, 12, + REG_IO_PUDE2, REG_IO_PUDSEL2, 3), + VISCONTI_PIN(PINCTRL_PIN(6, "gpio6"), REG_IO_DSEL5, 16, + REG_IO_PUDE2, REG_IO_PUDSEL2, 4), + VISCONTI_PIN(PINCTRL_PIN(7, "gpio7"), REG_IO_DSEL5, 20, + REG_IO_PUDE2, REG_IO_PUDSEL2, 5), + VISCONTI_PIN(PINCTRL_PIN(8, "gpio8"), REG_IO_DSEL5, 24, + REG_IO_PUDE2, REG_IO_PUDSEL2, 6), + VISCONTI_PIN(PINCTRL_PIN(9, "gpio9"), REG_IO_DSEL5, 28, + REG_IO_PUDE2, REG_IO_PUDSEL2, 7), + VISCONTI_PIN(PINCTRL_PIN(10, "gpio10"), REG_IO_DSEL6, 0, + REG_IO_PUDE2, REG_IO_PUDSEL2, 8), + VISCONTI_PIN(PINCTRL_PIN(11, "gpio11"), REG_IO_DSEL6, 4, + REG_IO_PUDE2, REG_IO_PUDSEL2, 9), + VISCONTI_PIN(PINCTRL_PIN(12, "gpio12"), REG_IO_DSEL6, 8, + REG_IO_PUDE2, REG_IO_PUDSEL2, 10), + VISCONTI_PIN(PINCTRL_PIN(13, "gpio13"), REG_IO_DSEL6, 12, + REG_IO_PUDE2, REG_IO_PUDSEL2, 11), + VISCONTI_PIN(PINCTRL_PIN(14, "gpio14"), REG_IO_DSEL6, 16, + REG_IO_PUDE2, REG_IO_PUDSEL2, 12), + VISCONTI_PIN(PINCTRL_PIN(15, "gpio15"), REG_IO_DSEL6, 20, + REG_IO_PUDE2, REG_IO_PUDSEL2, 13), + VISCONTI_PIN(PINCTRL_PIN(16, "gpio16"), REG_IO_DSEL6, 24, + REG_IO_PUDE2, REG_IO_PUDSEL2, 14), + VISCONTI_PIN(PINCTRL_PIN(17, "gpio17"), REG_IO_DSEL6, 28, + REG_IO_PUDE2, REG_IO_PUDSEL2, 15), + VISCONTI_PIN(PINCTRL_PIN(18, "gpio18"), REG_IO_DSEL7, 0, + REG_IO_PUDE2, REG_IO_PUDSEL2, 16), + VISCONTI_PIN(PINCTRL_PIN(19, "gpio19"), REG_IO_DSEL7, 4, + REG_IO_PUDE2, REG_IO_PUDSEL2, 17), + VISCONTI_PIN(PINCTRL_PIN(20, "gpio20"), REG_IO_DSEL7, 8, + REG_IO_PUDE2, REG_IO_PUDSEL2, 18), + VISCONTI_PIN(PINCTRL_PIN(21, "gpio21"), REG_IO_DSEL7, 12, + REG_IO_PUDE2, REG_IO_PUDSEL2, 19), + VISCONTI_PIN(PINCTRL_PIN(22, "gpio22"), REG_IO_DSEL7, 16, + REG_IO_PUDE2, REG_IO_PUDSEL2, 20), + VISCONTI_PIN(PINCTRL_PIN(23, "gpio23"), REG_IO_DSEL7, 20, + REG_IO_PUDE2, REG_IO_PUDSEL2, 21), + VISCONTI_PIN(PINCTRL_PIN(24, "gpio24"), REG_IO_DSEL7, 24, + REG_IO_PUDE2, REG_IO_PUDSEL2, 22), + VISCONTI_PIN(PINCTRL_PIN(25, "gpio25"), REG_IO_DSEL7, 28, + REG_IO_PUDE2, REG_IO_PUDSEL2, 23), + VISCONTI_PIN(PINCTRL_PIN(26, "gpio26"), REG_IO_DSEL8, 0, + REG_IO_PUDE2, REG_IO_PUDSEL2, 24), + VISCONTI_PIN(PINCTRL_PIN(27, "gpio27"), REG_IO_DSEL8, 4, + REG_IO_PUDE2, REG_IO_PUDSEL2, 25), + VISCONTI_PIN(PINCTRL_PIN(28, "gpio28"), REG_IO_DSEL8, 8, + REG_IO_PUDE2, REG_IO_PUDSEL2, 26), + VISCONTI_PIN(PINCTRL_PIN(29, "gpio29"), REG_IO_DSEL4, 8, + REG_IO_PUDE1, REG_IO_PUDSEL1, 26), + VISCONTI_PIN(PINCTRL_PIN(30, "gpio30"), REG_IO_DSEL4, 4, + REG_IO_PUDE1, REG_IO_PUDSEL1, 25), + VISCONTI_PIN(PINCTRL_PIN(31, "gpio31"), REG_IO_DSEL4, 0, + REG_IO_PUDE1, REG_IO_PUDSEL1, 24), + VISCONTI_PIN(PINCTRL_PIN(32, "spi_sck"), REG_IO_DSEL4, 12, + REG_IO_PUDE1, REG_IO_PUDSEL1, 27), + VISCONTI_PIN(PINCTRL_PIN(33, "spi_sdo"), REG_IO_DSEL4, 16, + REG_IO_PUDE1, REG_IO_PUDSEL1, 28), + VISCONTI_PIN(PINCTRL_PIN(34, "spi_sdi"), REG_IO_DSEL4, 20, + REG_IO_PUDE1, REG_IO_PUDSEL1, 29), +}; + +/* Group */ +VISCONTI_PINS(i2c0, 0, 1); +VISCONTI_PINS(i2c1, 2, 3); +VISCONTI_PINS(i2c2, 12, 13); +VISCONTI_PINS(i2c3, 14, 15); +VISCONTI_PINS(i2c4, 16, 17); +VISCONTI_PINS(i2c5, 18, 19); +VISCONTI_PINS(i2c6, 33, 34); +VISCONTI_PINS(i2c7, 29, 32); +VISCONTI_PINS(i2c8, 30, 31); +VISCONTI_PINS(spi0_cs0, 29); +VISCONTI_PINS(spi0_cs1, 30); +VISCONTI_PINS(spi0_cs2, 31); +VISCONTI_PINS(spi1_cs, 3); +VISCONTI_PINS(spi2_cs, 7); +VISCONTI_PINS(spi3_cs, 11); +VISCONTI_PINS(spi4_cs, 15); +VISCONTI_PINS(spi5_cs, 19); +VISCONTI_PINS(spi6_cs, 27); +VISCONTI_PINS(spi0, 32, 33, 34); +VISCONTI_PINS(spi1, 0, 1, 2); +VISCONTI_PINS(spi2, 4, 5, 6); +VISCONTI_PINS(spi3, 8, 9, 10); +VISCONTI_PINS(spi4, 12, 13, 14); +VISCONTI_PINS(spi5, 16, 17, 18); +VISCONTI_PINS(spi6, 24, 25, 26); +VISCONTI_PINS(uart0, 4, 5, 6, 7); +VISCONTI_PINS(uart1, 8, 9, 10, 11); +VISCONTI_PINS(uart2, 12, 13, 14, 15); +VISCONTI_PINS(uart3, 16, 17, 18, 19); +VISCONTI_PINS(pwm0_gpio4, 4); +VISCONTI_PINS(pwm1_gpio5, 5); +VISCONTI_PINS(pwm2_gpio6, 6); +VISCONTI_PINS(pwm3_gpio7, 7); +VISCONTI_PINS(pwm0_gpio8, 8); +VISCONTI_PINS(pwm1_gpio9, 9); +VISCONTI_PINS(pwm2_gpio10, 10); +VISCONTI_PINS(pwm3_gpio11, 11); +VISCONTI_PINS(pwm0_gpio12, 12); +VISCONTI_PINS(pwm1_gpio13, 13); +VISCONTI_PINS(pwm2_gpio14, 14); +VISCONTI_PINS(pwm3_gpio15, 15); +VISCONTI_PINS(pwm0_gpio16, 16); +VISCONTI_PINS(pwm1_gpio17, 17); +VISCONTI_PINS(pwm2_gpio18, 18); +VISCONTI_PINS(pwm3_gpio19, 19); +VISCONTI_PINS(pcmif_out, 20, 21, 22); +VISCONTI_PINS(pcmif_in, 24, 25, 26); + +static const struct visconti_pin_group groups_tmpv7700[] = { + VISCONTI_PIN_GROUP(i2c0, REG_PINMUX2, GENMASK(7, 0), 0x00000022), + VISCONTI_PIN_GROUP(i2c1, REG_PINMUX2, GENMASK(15, 8), 0x00002200), + VISCONTI_PIN_GROUP(i2c2, REG_PINMUX3, GENMASK(23, 16), 0x00770000), + VISCONTI_PIN_GROUP(i2c3, REG_PINMUX3, GENMASK(31, 24), 0x77000000), + VISCONTI_PIN_GROUP(i2c4, REG_PINMUX4, GENMASK(7, 0), 0x00000077), + VISCONTI_PIN_GROUP(i2c5, REG_PINMUX4, GENMASK(15, 8), 0x00007700), + VISCONTI_PIN_GROUP(i2c6, REG_PINMUX1, GENMASK(3, 0), 0x0000002), + VISCONTI_PIN_GROUP(i2c7, REG_PINMUX5, GENMASK(23, 20), 0x00200000), + VISCONTI_PIN_GROUP(i2c8, REG_PINMUX5, GENMASK(31, 24), 0x22000000), + VISCONTI_PIN_GROUP(spi0_cs0, REG_PINMUX5, GENMASK(23, 20), 0x00100000), + VISCONTI_PIN_GROUP(spi0_cs1, REG_PINMUX5, GENMASK(27, 24), 0x01000000), + VISCONTI_PIN_GROUP(spi0_cs2, REG_PINMUX5, GENMASK(31, 28), 0x10000000), + VISCONTI_PIN_GROUP(spi1_cs, REG_PINMUX2, GENMASK(15, 12), 0x00001000), + VISCONTI_PIN_GROUP(spi2_cs, REG_PINMUX2, GENMASK(31, 28), 0x10000000), + VISCONTI_PIN_GROUP(spi3_cs, REG_PINMUX3, GENMASK(15, 12), 0x00001000), + VISCONTI_PIN_GROUP(spi4_cs, REG_PINMUX4, GENMASK(31, 28), 0x10000000), + VISCONTI_PIN_GROUP(spi5_cs, REG_PINMUX4, GENMASK(15, 12), 0x00001000), + VISCONTI_PIN_GROUP(spi6_cs, REG_PINMUX5, GENMASK(15, 12), 0x00001000), + VISCONTI_PIN_GROUP(spi0, REG_PINMUX1, GENMASK(3, 0), 0x00000001), + VISCONTI_PIN_GROUP(spi1, REG_PINMUX2, GENMASK(11, 0), 0x00000111), + VISCONTI_PIN_GROUP(spi2, REG_PINMUX2, GENMASK(27, 16), 0x01110000), + VISCONTI_PIN_GROUP(spi3, REG_PINMUX3, GENMASK(11, 0), 0x00000111), + VISCONTI_PIN_GROUP(spi4, REG_PINMUX3, GENMASK(27, 16), 0x01110000), + VISCONTI_PIN_GROUP(spi5, REG_PINMUX4, GENMASK(11, 0), 0x00000111), + VISCONTI_PIN_GROUP(spi6, REG_PINMUX5, GENMASK(11, 0), 0x00000111), + VISCONTI_PIN_GROUP(uart0, REG_PINMUX2, GENMASK(31, 16), 0x22220000), + VISCONTI_PIN_GROUP(uart1, REG_PINMUX3, GENMASK(15, 0), 0x00002222), + VISCONTI_PIN_GROUP(uart2, REG_PINMUX3, GENMASK(31, 16), 0x22220000), + VISCONTI_PIN_GROUP(uart3, REG_PINMUX4, GENMASK(15, 0), 0x00002222), + VISCONTI_PIN_GROUP(pwm0_gpio4, REG_PINMUX2, GENMASK(19, 16), 0x00050000), + VISCONTI_PIN_GROUP(pwm1_gpio5, REG_PINMUX2, GENMASK(23, 20), 0x00500000), + VISCONTI_PIN_GROUP(pwm2_gpio6, REG_PINMUX2, GENMASK(27, 24), 0x05000000), + VISCONTI_PIN_GROUP(pwm3_gpio7, REG_PINMUX2, GENMASK(31, 28), 0x50000000), + VISCONTI_PIN_GROUP(pwm0_gpio8, REG_PINMUX3, GENMASK(3, 0), 0x00000005), + VISCONTI_PIN_GROUP(pwm1_gpio9, REG_PINMUX3, GENMASK(7, 4), 0x00000050), + VISCONTI_PIN_GROUP(pwm2_gpio10, REG_PINMUX3, GENMASK(11, 8), 0x00000500), + VISCONTI_PIN_GROUP(pwm3_gpio11, REG_PINMUX3, GENMASK(15, 12), 0x00005000), + VISCONTI_PIN_GROUP(pwm0_gpio12, REG_PINMUX3, GENMASK(19, 16), 0x00050000), + VISCONTI_PIN_GROUP(pwm1_gpio13, REG_PINMUX3, GENMASK(23, 20), 0x00500000), + VISCONTI_PIN_GROUP(pwm2_gpio14, REG_PINMUX3, GENMASK(27, 24), 0x05000000), + VISCONTI_PIN_GROUP(pwm3_gpio15, REG_PINMUX3, GENMASK(31, 28), 0x50000000), + VISCONTI_PIN_GROUP(pwm0_gpio16, REG_PINMUX4, GENMASK(3, 0), 0x00000005), + VISCONTI_PIN_GROUP(pwm1_gpio17, REG_PINMUX4, GENMASK(7, 4), 0x00000050), + VISCONTI_PIN_GROUP(pwm2_gpio18, REG_PINMUX4, GENMASK(11, 8), 0x00000500), + VISCONTI_PIN_GROUP(pwm3_gpio19, REG_PINMUX4, GENMASK(15, 12), 0x00005000), + VISCONTI_PIN_GROUP(pcmif_out, REG_PINMUX4, GENMASK(27, 16), 0x01110000), + VISCONTI_PIN_GROUP(pcmif_in, REG_PINMUX5, GENMASK(11, 0), 0x00000222), +}; + +/* MUX */ +VISCONTI_GROUPS(i2c0, "i2c0_grp"); +VISCONTI_GROUPS(i2c1, "i2c1_grp"); +VISCONTI_GROUPS(i2c2, "i2c2_grp"); +VISCONTI_GROUPS(i2c3, "i2c3_grp"); +VISCONTI_GROUPS(i2c4, "i2c4_grp"); +VISCONTI_GROUPS(i2c5, "i2c5_grp"); +VISCONTI_GROUPS(i2c6, "i2c6_grp"); +VISCONTI_GROUPS(i2c7, "i2c7_grp"); +VISCONTI_GROUPS(i2c8, "i2c8_grp"); +VISCONTI_GROUPS(spi0, "spi0_grp", "spi0_cs0_grp", + "spi0_cs1_grp", "spi0_cs2_grp"); +VISCONTI_GROUPS(spi1, "spi1_grp", "spi1_cs_grp"); +VISCONTI_GROUPS(spi2, "spi2_grp", "spi2_cs_grp"); +VISCONTI_GROUPS(spi3, "spi3_grp", "spi3_cs_grp"); +VISCONTI_GROUPS(spi4, "spi4_grp", "spi4_cs_grp"); +VISCONTI_GROUPS(spi5, "spi5_grp", "spi5_cs_grp"); +VISCONTI_GROUPS(spi6, "spi6_grp", "spi6_cs_grp"); +VISCONTI_GROUPS(uart0, "uart0_grp"); +VISCONTI_GROUPS(uart1, "uart1_grp"); +VISCONTI_GROUPS(uart2, "uart2_grp"); +VISCONTI_GROUPS(uart3, "uart3_grp"); +VISCONTI_GROUPS(pwm, "pwm0_gpio4_grp", "pwm0_gpio8_grp", + "pwm0_gpio12_grp", "pwm0_gpio16_grp", + "pwm1_gpio5_grp", "pwm1_gpio9_grp", + "pwm1_gpio13_grp", "pwm1_gpio17_grp", + "pwm2_gpio6_grp", "pwm2_gpio10_grp", + "pwm2_gpio14_grp", "pwm2_gpio18_grp", + "pwm3_gpio7_grp", "pwm3_gpio11_grp", + "pwm3_gpio15_grp", "pwm3_gpio19_grp"); +VISCONTI_GROUPS(pcmif_out, "pcmif_out_grp"); +VISCONTI_GROUPS(pcmif_in, "pcmif_in_grp"); + +static const struct visconti_pin_function functions_tmpv7700[] = { + VISCONTI_PIN_FUNCTION(i2c0), + VISCONTI_PIN_FUNCTION(i2c1), + VISCONTI_PIN_FUNCTION(i2c2), + VISCONTI_PIN_FUNCTION(i2c3), + VISCONTI_PIN_FUNCTION(i2c4), + VISCONTI_PIN_FUNCTION(i2c5), + VISCONTI_PIN_FUNCTION(i2c6), + VISCONTI_PIN_FUNCTION(i2c7), + VISCONTI_PIN_FUNCTION(i2c8), + VISCONTI_PIN_FUNCTION(spi0), + VISCONTI_PIN_FUNCTION(spi1), + VISCONTI_PIN_FUNCTION(spi2), + VISCONTI_PIN_FUNCTION(spi3), + VISCONTI_PIN_FUNCTION(spi4), + VISCONTI_PIN_FUNCTION(spi5), + VISCONTI_PIN_FUNCTION(spi6), + VISCONTI_PIN_FUNCTION(uart0), + VISCONTI_PIN_FUNCTION(uart1), + VISCONTI_PIN_FUNCTION(uart2), + VISCONTI_PIN_FUNCTION(uart3), + VISCONTI_PIN_FUNCTION(pwm), + VISCONTI_PIN_FUNCTION(pcmif_in), + VISCONTI_PIN_FUNCTION(pcmif_out), +}; + +/* GPIO MUX */ +#define tmpv7700_GPIO_MUX(off, msk) \ +{ \ + .offset = off, \ + .mask = msk, \ + .val = 0, \ +} + +static const struct visconti_mux gpio_mux_tmpv7700[] = { + tmpv7700_GPIO_MUX(REG_PINMUX2, GENMASK(3, 0)), + tmpv7700_GPIO_MUX(REG_PINMUX2, GENMASK(7, 4)), + tmpv7700_GPIO_MUX(REG_PINMUX2, GENMASK(11, 8)), + tmpv7700_GPIO_MUX(REG_PINMUX2, GENMASK(15, 12)), + tmpv7700_GPIO_MUX(REG_PINMUX2, GENMASK(19, 16)), + tmpv7700_GPIO_MUX(REG_PINMUX2, GENMASK(23, 20)), + tmpv7700_GPIO_MUX(REG_PINMUX2, GENMASK(27, 24)), + tmpv7700_GPIO_MUX(REG_PINMUX2, GENMASK(31, 28)), + tmpv7700_GPIO_MUX(REG_PINMUX3, GENMASK(3, 0)), + tmpv7700_GPIO_MUX(REG_PINMUX3, GENMASK(7, 4)), + tmpv7700_GPIO_MUX(REG_PINMUX3, GENMASK(11, 8)), + tmpv7700_GPIO_MUX(REG_PINMUX3, GENMASK(15, 12)), + tmpv7700_GPIO_MUX(REG_PINMUX3, GENMASK(19, 16)), + tmpv7700_GPIO_MUX(REG_PINMUX3, GENMASK(23, 20)), + tmpv7700_GPIO_MUX(REG_PINMUX3, GENMASK(27, 24)), + tmpv7700_GPIO_MUX(REG_PINMUX3, GENMASK(31, 28)), + tmpv7700_GPIO_MUX(REG_PINMUX4, GENMASK(3, 0)), + tmpv7700_GPIO_MUX(REG_PINMUX4, GENMASK(7, 4)), + tmpv7700_GPIO_MUX(REG_PINMUX4, GENMASK(11, 8)), + tmpv7700_GPIO_MUX(REG_PINMUX4, GENMASK(15, 12)), + tmpv7700_GPIO_MUX(REG_PINMUX4, GENMASK(19, 16)), + tmpv7700_GPIO_MUX(REG_PINMUX4, GENMASK(23, 20)), + tmpv7700_GPIO_MUX(REG_PINMUX4, GENMASK(27, 24)), + tmpv7700_GPIO_MUX(REG_PINMUX4, GENMASK(31, 28)), + tmpv7700_GPIO_MUX(REG_PINMUX5, GENMASK(3, 0)), + tmpv7700_GPIO_MUX(REG_PINMUX5, GENMASK(7, 4)), + tmpv7700_GPIO_MUX(REG_PINMUX5, GENMASK(11, 8)), + tmpv7700_GPIO_MUX(REG_PINMUX5, GENMASK(15, 12)), + tmpv7700_GPIO_MUX(REG_PINMUX5, GENMASK(19, 16)), + tmpv7700_GPIO_MUX(REG_PINMUX5, GENMASK(23, 20)), + tmpv7700_GPIO_MUX(REG_PINMUX5, GENMASK(27, 24)), + tmpv7700_GPIO_MUX(REG_PINMUX5, GENMASK(31, 28)), +}; + +static void tmpv7700_pinctrl_unlock(void __iomem *base) +{ + writel(1, base + REG_KEY_CTRL); + writel(tmpv7700_MAGIC_NUM, base + REG_KEY_CMD); +} + +/* chip dependent data */ +static const struct visconti_pinctrl_devdata tmpv7700_pinctrl_data = { + .pins = pins_tmpv7700, + .nr_pins = ARRAY_SIZE(pins_tmpv7700), + .groups = groups_tmpv7700, + .nr_groups = ARRAY_SIZE(groups_tmpv7700), + .functions = functions_tmpv7700, + .nr_functions = ARRAY_SIZE(functions_tmpv7700), + .gpio_mux = gpio_mux_tmpv7700, + .unlock = tmpv7700_pinctrl_unlock, +}; + +static int tmpv7700_pinctrl_probe(struct platform_device *pdev) +{ + return visconti_pinctrl_probe(pdev, &tmpv7700_pinctrl_data); +} + +static const struct of_device_id tmpv7700_pctrl_of_match[] = { + { .compatible = "toshiba,tmpv7708-pinctrl", }, + {}, +}; + +static struct platform_driver tmpv7700_pinctrl_driver = { + .probe = tmpv7700_pinctrl_probe, + .driver = { + .name = "tmpv7700-pinctrl", + .of_match_table = tmpv7700_pctrl_of_match, + }, +}; + +static int __init tmpv7700_pinctrl_init(void) +{ + return platform_driver_register(&tmpv7700_pinctrl_driver); +} +arch_initcall(tmpv7700_pinctrl_init); From 96bef667ddbb82e891ed15b7087d1ae0a7081115 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Fri, 24 Jul 2020 15:00:31 +0800 Subject: [PATCH 148/433] dt-bindings: pinctrl: sunxi: Get rid of continual nesting Rather than a continual nesting of 'else' clauses, just make each 'if' a new entry under 'allOf' and get rid of the else. Signed-off-by: Yangtao Li Reviewed-by: Rob Herring Acked-by: Maxime Ripard Link: https://lore.kernel.org/r/229e4870dab1b34797304c384e68c7d04196423b.1595572867.git.frank@allwinnertech.com Signed-off-by: Linus Walleij --- .../pinctrl/allwinner,sun4i-a10-pinctrl.yaml | 112 ++++++++++-------- 1 file changed, 62 insertions(+), 50 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml index 7556be6e2754..35a26abb02e7 100644 --- a/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml @@ -155,62 +155,74 @@ allOf: minItems: 5 maxItems: 5 - else: - if: - properties: - compatible: - enum: - - allwinner,sun6i-a31-pinctrl - - allwinner,sun6i-a31s-pinctrl - - allwinner,sun50i-h6-pinctrl + - if: + properties: + compatible: + enum: + - allwinner,sun6i-a31-pinctrl + - allwinner,sun6i-a31s-pinctrl + - allwinner,sun50i-h6-pinctrl - then: - properties: - interrupts: - minItems: 4 - maxItems: 4 + then: + properties: + interrupts: + minItems: 4 + maxItems: 4 - else: - if: - properties: - compatible: - enum: - - allwinner,sun8i-a23-pinctrl - - allwinner,sun8i-a83t-pinctrl - - allwinner,sun50i-a64-pinctrl - - allwinner,sun50i-h5-pinctrl - - allwinner,suniv-f1c100s-pinctrl + - if: + properties: + compatible: + enum: + - allwinner,sun8i-a23-pinctrl + - allwinner,sun8i-a83t-pinctrl + - allwinner,sun50i-a64-pinctrl + - allwinner,sun50i-h5-pinctrl + - allwinner,suniv-f1c100s-pinctrl - then: - properties: - interrupts: - minItems: 3 - maxItems: 3 + then: + properties: + interrupts: + minItems: 3 + maxItems: 3 - else: - if: - properties: - compatible: - enum: - - allwinner,sun6i-a31-r-pinctrl - - allwinner,sun8i-a33-pinctrl - - allwinner,sun8i-h3-pinctrl - - allwinner,sun8i-v3-pinctrl - - allwinner,sun8i-v3s-pinctrl - - allwinner,sun9i-a80-r-pinctrl - - allwinner,sun50i-h6-r-pinctrl + - if: + properties: + compatible: + enum: + - allwinner,sun6i-a31-r-pinctrl + - allwinner,sun8i-a33-pinctrl + - allwinner,sun8i-h3-pinctrl + - allwinner,sun8i-v3-pinctrl + - allwinner,sun8i-v3s-pinctrl + - allwinner,sun9i-a80-r-pinctrl + - allwinner,sun50i-h6-r-pinctrl - then: - properties: - interrupts: - minItems: 2 - maxItems: 2 + then: + properties: + interrupts: + minItems: 2 + maxItems: 2 - else: - properties: - interrupts: - minItems: 1 - maxItems: 1 + - if: + properties: + compatible: + enum: + - allwinner,sun4i-a10-pinctrl + - allwinner,sun5i-a10s-pinctrl + - allwinner,sun5i-a13-pinctrl + - allwinner,sun7i-a20-pinctrl + - allwinner,sun8i-a23-r-pinctrl + - allwinner,sun8i-a83t-r-pinctrl + - allwinner,sun8i-h3-r-pinctrl + - allwinner,sun8i-r40-pinctrl + - allwinner,sun50i-a64-r-pinctrl + - nextthing,gr8-pinctrl + + then: + properties: + interrupts: + minItems: 1 + maxItems: 1 additionalProperties: false From 5e842dc23cd3a99051f615161bb0972b8dc10d66 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Fri, 24 Jul 2020 15:02:42 +0800 Subject: [PATCH 149/433] dt-bindings: pinctrl: sunxi: Add A100 pinctrl bindings Add device tree binding Documentation details for A100 pinctrl driver, which has a r pin controller and a pin controller with more irq lines. Signed-off-by: Yangtao Li Reviewed-by: Rob Herring Acked-by: Maxime Ripard Link: https://lore.kernel.org/r/a5773d677bcc89af3810cdd187fae54eced82f27.1595572867.git.frank@allwinnertech.com Signed-off-by: Linus Walleij --- .../pinctrl/allwinner,sun4i-a10-pinctrl.yaml | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml index 35a26abb02e7..34a17d5c6135 100644 --- a/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml @@ -48,6 +48,8 @@ properties: - allwinner,sun9i-a80-r-pinctrl - allwinner,sun50i-a64-pinctrl - allwinner,sun50i-a64-r-pinctrl + - allwinner,sun50i-a100-pinctrl + - allwinner,sun50i-a100-r-pinctrl - allwinner,sun50i-h5-pinctrl - allwinner,sun50i-h6-pinctrl - allwinner,sun50i-h6-r-pinctrl @@ -143,6 +145,18 @@ allOf: # boards are defining it at the moment so it would generate a lot of # warnings. + - if: + properties: + compatible: + enum: + - allwinner,sun50i-a100-pinctrl + + then: + properties: + interrupts: + minItems: 7 + maxItems: 7 + - if: properties: compatible: @@ -216,6 +230,7 @@ allOf: - allwinner,sun8i-h3-r-pinctrl - allwinner,sun8i-r40-pinctrl - allwinner,sun50i-a64-r-pinctrl + - allwinner,sun50i-a100-r-pinctrl - nextthing,gr8-pinctrl then: From 473436e7647d63dc8bc144edd4b970fd210509d7 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Fri, 24 Jul 2020 15:05:49 +0800 Subject: [PATCH 150/433] pinctrl: sunxi: add support for the Allwinner A100 pin controller This commit introduces support for the pin controller on A100. Signed-off-by: Yangtao Li Acked-by: Maxime Ripard Link: https://lore.kernel.org/r/4e331a2ed4a30c883df6157bc5c52bb686aa8e0d.1595572867.git.frank@allwinnertech.com Signed-off-by: Linus Walleij --- drivers/pinctrl/sunxi/Kconfig | 10 + drivers/pinctrl/sunxi/Makefile | 2 + drivers/pinctrl/sunxi/pinctrl-sun50i-a100-r.c | 105 +++ drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c | 708 ++++++++++++++++++ 4 files changed, 825 insertions(+) create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun50i-a100-r.c create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c diff --git a/drivers/pinctrl/sunxi/Kconfig b/drivers/pinctrl/sunxi/Kconfig index f7aae200ee15..593293584ecc 100644 --- a/drivers/pinctrl/sunxi/Kconfig +++ b/drivers/pinctrl/sunxi/Kconfig @@ -94,6 +94,16 @@ config PINCTRL_SUN50I_A64_R default ARM64 && ARCH_SUNXI select PINCTRL_SUNXI +config PINCTRL_SUN50I_A100 + bool "Support for the Allwinner A100 PIO" + default ARM64 && ARCH_SUNXI + select PINCTRL_SUNXI + +config PINCTRL_SUN50I_A100_R + bool "Support for the Allwinner A100 R-PIO" + default ARM64 && ARCH_SUNXI + select PINCTRL_SUNXI + config PINCTRL_SUN50I_H5 bool "Support for the Allwinner H5 PIO" default ARM64 && ARCH_SUNXI diff --git a/drivers/pinctrl/sunxi/Makefile b/drivers/pinctrl/sunxi/Makefile index fafcdae8134f..8b7ff0dc3bdf 100644 --- a/drivers/pinctrl/sunxi/Makefile +++ b/drivers/pinctrl/sunxi/Makefile @@ -13,6 +13,8 @@ obj-$(CONFIG_PINCTRL_SUN8I_A23_R) += pinctrl-sun8i-a23-r.o obj-$(CONFIG_PINCTRL_SUN8I_A33) += pinctrl-sun8i-a33.o obj-$(CONFIG_PINCTRL_SUN50I_A64) += pinctrl-sun50i-a64.o obj-$(CONFIG_PINCTRL_SUN50I_A64_R) += pinctrl-sun50i-a64-r.o +obj-$(CONFIG_PINCTRL_SUN50I_A100) += pinctrl-sun50i-a100.o +obj-$(CONFIG_PINCTRL_SUN50I_A100_R) += pinctrl-sun50i-a100-r.o obj-$(CONFIG_PINCTRL_SUN8I_A83T) += pinctrl-sun8i-a83t.o obj-$(CONFIG_PINCTRL_SUN8I_A83T_R) += pinctrl-sun8i-a83t-r.o obj-$(CONFIG_PINCTRL_SUN8I_H3) += pinctrl-sun8i-h3.o diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-a100-r.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-a100-r.c new file mode 100644 index 000000000000..21054fcacd34 --- /dev/null +++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-a100-r.c @@ -0,0 +1,105 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2020 Yangtao Li + * + * Based on: + * huangshuosheng + */ + +#include +#include +#include +#include +#include + +#include "pinctrl-sunxi.h" + +static const struct sunxi_desc_pin a100_r_pins[] = { + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "s_i2c0"), /* SCK */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "s_i2c0"), /* SDA */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "s_uart0"), /* TX */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 3), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "s_uart0"), /* RX */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 4), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "s_jtag"), /* MS */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "s_jtag"), /* CK */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "s_jtag"), /* DO */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "s_jtag"), /* DI */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "s_i2c1"), /* SCK */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 9), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "s_i2c1"), /* SDA */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 10), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "s_pwm"), + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 11), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x3, "s_cir"), /* IN */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 11)), +}; + +static const struct sunxi_pinctrl_desc a100_r_pinctrl_data = { + .pins = a100_r_pins, + .npins = ARRAY_SIZE(a100_r_pins), + .pin_base = PL_BASE, + .irq_banks = 1, +}; + +static int a100_r_pinctrl_probe(struct platform_device *pdev) +{ + return sunxi_pinctrl_init(pdev, &a100_r_pinctrl_data); +} + +static const struct of_device_id a100_r_pinctrl_match[] = { + { .compatible = "allwinner,sun50i-a100-r-pinctrl", }, + {} +}; +MODULE_DEVICE_TABLE(of, a100_r_pinctrl_match); + +static struct platform_driver a100_r_pinctrl_driver = { + .probe = a100_r_pinctrl_probe, + .driver = { + .name = "sun50iw10p1-r-pinctrl", + .of_match_table = a100_r_pinctrl_match, + }, +}; +module_platform_driver(a100_r_pinctrl_driver); diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c new file mode 100644 index 000000000000..19cfd1e76ee2 --- /dev/null +++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c @@ -0,0 +1,708 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2020 Yangtao Li + * + * Based on: + * huangshuosheng + */ + +#include +#include +#include +#include +#include + +#include "pinctrl-sunxi.h" + +static const struct sunxi_desc_pin a100_pins[] = { + SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "uart2"), /* TX */ + SUNXI_FUNCTION(0x3, "spi2"), /* CS */ + SUNXI_FUNCTION(0x4, "jtag"), /* MS */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "uart2"), /* RX */ + SUNXI_FUNCTION(0x3, "spi2"), /* CLK */ + SUNXI_FUNCTION(0x4, "jtag"), /* CK */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "uart2"), /* RTS */ + SUNXI_FUNCTION(0x3, "spi2"), /* MOSI */ + SUNXI_FUNCTION(0x4, "jtag"), /* DO */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "uart2"), /* CTS */ + SUNXI_FUNCTION(0x3, "spi2"), /* MISO */ + SUNXI_FUNCTION(0x4, "jtag"), /* DI */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "i2c1"), /* SCK */ + SUNXI_FUNCTION(0x3, "i2s0"), /* MCLK */ + SUNXI_FUNCTION(0x4, "jtag_gpu"), /* MS_GPU */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "i2c1"), /* SDA */ + SUNXI_FUNCTION(0x3, "i2s0"), /* BCLK */ + SUNXI_FUNCTION(0x4, "jtag_gpu"), /* CK_GPU */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x3, "i2s0"), /* LRCK */ + SUNXI_FUNCTION(0x4, "jtag_gpu"), /* DO_GPU */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "spdif"), /* DIN */ + SUNXI_FUNCTION(0x3, "i2s0_dout0"), /* DOUT0 */ + SUNXI_FUNCTION(0x4, "i2s0_din1"), /* DIN1 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 8), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "spdif"), /* DOUT */ + SUNXI_FUNCTION(0x3, "i2s0_din0"), /* DIN0 */ + SUNXI_FUNCTION(0x4, "i2s0_dout1"), /* DOUT1 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 9), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "uart0"), /* TX */ + SUNXI_FUNCTION(0x3, "i2c0"), /* SCK */ + SUNXI_FUNCTION(0x4, "jtag_gpu"), /* DI_GPU */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 10), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "uart0"), /* RX */ + SUNXI_FUNCTION(0x3, "i2c0"), /* SDA */ + SUNXI_FUNCTION(0x4, "pwm1"), + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)), + /* HOLE */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* WE */ + SUNXI_FUNCTION(0x3, "mmc2"), /* DS */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 0)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* ALE */ + SUNXI_FUNCTION(0x3, "mmc2"), /* RST */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 1)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* CLE */ + SUNXI_FUNCTION(0x4, "spi0"), /* MOSI */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 2)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* CE1 */ + SUNXI_FUNCTION(0x4, "spi0"), /* CS0 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 3)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* CE0 */ + SUNXI_FUNCTION(0x4, "spi0"), /* MISO */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 4)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* RE */ + SUNXI_FUNCTION(0x3, "mmc2"), /* CLK */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 5)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* RB0 */ + SUNXI_FUNCTION(0x3, "mmc2"), /* CMD */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 6)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* RB1 */ + SUNXI_FUNCTION(0x4, "spi0"), /* CS1 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 7)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* DQ7 */ + SUNXI_FUNCTION(0x3, "mmc2"), /* D3 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 8)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* DQ6 */ + SUNXI_FUNCTION(0x3, "mmc2"), /* D4 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 9)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* DQ5 */ + SUNXI_FUNCTION(0x3, "mmc2"), /* D0 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 10)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* DQ4 */ + SUNXI_FUNCTION(0x3, "mmc2"), /* D5 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 11)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* DQS */ + SUNXI_FUNCTION(0x4, "spi0"), /* CLK */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 12)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* DQ3 */ + SUNXI_FUNCTION(0x3, "mmc2"), /* D1 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 13)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* DQ2 */ + SUNXI_FUNCTION(0x3, "mmc2"), /* D6 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 14)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* DQ1 */ + SUNXI_FUNCTION(0x3, "mmc2"), /* D2 */ + SUNXI_FUNCTION(0x4, "spi0"), /* WP */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 15)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* DQ0 */ + SUNXI_FUNCTION(0x3, "mmc2"), /* D7 */ + SUNXI_FUNCTION(0x4, "spi0"), /* HOLD */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 16)), + /* HOLE */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D2 */ + SUNXI_FUNCTION(0x3, "lvds0"), /* D0P */ + SUNXI_FUNCTION(0x4, "dsi0"), /* DP0 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 0)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D3 */ + SUNXI_FUNCTION(0x3, "lvds0"), /* D0N */ + SUNXI_FUNCTION(0x4, "dsi0"), /* DM0 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 1)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D4 */ + SUNXI_FUNCTION(0x3, "lvds0"), /* D1P */ + SUNXI_FUNCTION(0x4, "dsi0"), /* DP1 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 2)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D5 */ + SUNXI_FUNCTION(0x3, "lvds0"), /* D1N */ + SUNXI_FUNCTION(0x4, "dsi0"), /* DM1 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 3)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D6 */ + SUNXI_FUNCTION(0x3, "lvds0"), /* D2P */ + SUNXI_FUNCTION(0x4, "dsi0"), /* CKP */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 4)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D7 */ + SUNXI_FUNCTION(0x3, "lvds0"), /* D2N */ + SUNXI_FUNCTION(0x4, "dsi0"), /* CKM */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 5)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D10 */ + SUNXI_FUNCTION(0x3, "lvds0"), /* CKP */ + SUNXI_FUNCTION(0x4, "dsi0"), /* DP2 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 6)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D11 */ + SUNXI_FUNCTION(0x3, "lvds0"), /* CKN */ + SUNXI_FUNCTION(0x4, "dsi0"), /* DM2 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 7)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D12 */ + SUNXI_FUNCTION(0x4, "dsi0"), /* DP3 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 8)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D13 */ + SUNXI_FUNCTION(0x4, "dsi0"), /* DM3 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 9)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D14 */ + SUNXI_FUNCTION(0x4, "spi1"), /* CS */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 10)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D15 */ + SUNXI_FUNCTION(0x4, "spi1"), /* CLK */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 11)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D18 */ + SUNXI_FUNCTION(0x4, "spi1"), /* MOSI */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 12)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D19 */ + SUNXI_FUNCTION(0x4, "spi1"), /* MISO */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 13)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D20 */ + SUNXI_FUNCTION(0x4, "uart3"), /* TX */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 14)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D21 */ + SUNXI_FUNCTION(0x4, "uart3"), /* RX */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 15)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D22 */ + SUNXI_FUNCTION(0x4, "uart3"), /* RTS */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 16)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D23 */ + SUNXI_FUNCTION(0x4, "uart3"), /* CTS */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 17)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* CLK */ + SUNXI_FUNCTION(0x4, "uart4"), /* TX */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 18)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* DE */ + SUNXI_FUNCTION(0x4, "uart4"), /* RX */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 19)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* HSYNC */ + SUNXI_FUNCTION(0x3, "pwm2"), + SUNXI_FUNCTION(0x4, "uart4"), /* RTS */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 20)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* VSYNC */ + SUNXI_FUNCTION(0x3, "pwm3"), + SUNXI_FUNCTION(0x4, "uart4"), /* CTS */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 21)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "pwm1"), + SUNXI_FUNCTION(0x4, "i2c0"), /* SCK */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 22)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "pwm0"), + SUNXI_FUNCTION(0x4, "i2c0"), /* SDA */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 23)), + /* HOLE */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "csi"), /* MCLK */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 0)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "i2c2"), /* SCK */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 1)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "i2c2"), /* SDA */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 2)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "i2c3"), /* SCK */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 3)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "i2c3"), /* SDA */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 4)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "csi"), /* MCLK */ + SUNXI_FUNCTION(0x3, "pll"), /* LOCK_DBG */ + SUNXI_FUNCTION(0x4, "i2s2"), /* MCLK */ + SUNXI_FUNCTION(0x5, "ledc"), /* LEDC */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 5)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x3, "bist0"), /* RESULT0 */ + SUNXI_FUNCTION(0x4, "i2s2"), /* BCLK */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 6)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "csi"), /* SM_VS */ + SUNXI_FUNCTION(0x3, "bist0"), /* RESULT1 */ + SUNXI_FUNCTION(0x4, "i2s2"), /* LRCK */ + SUNXI_FUNCTION(0x5, "tcon0"), /* TRIG */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 7)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x3, "bist0"), /* RESULT2 */ + SUNXI_FUNCTION(0x4, "i2s2"), /* DOUT0 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 8)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x3, "bist0"), /* RESULT3 */ + SUNXI_FUNCTION(0x4, "i2s2"), /* DIN0 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 9)), + /* HOLE */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "mmc0"), /* D1 */ + SUNXI_FUNCTION(0x3, "jtag"), /* MS1 */ + SUNXI_FUNCTION(0x4, "jtag_gpu"), /* MS_GPU */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 4, 0)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "mmc0"), /* D0 */ + SUNXI_FUNCTION(0x3, "jtag"), /* DI1 */ + SUNXI_FUNCTION(0x4, "jtag_gpu"), /* DI_GPU */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 4, 1)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "mmc0"), /* CLK */ + SUNXI_FUNCTION(0x3, "uart0"), /* TX */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 4, 2)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "mmc0"), /* CMD */ + SUNXI_FUNCTION(0x3, "jtag"), /* DO */ + SUNXI_FUNCTION(0x4, "jtag_gpu"), /* DO_GPU */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 4, 3)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */ + SUNXI_FUNCTION(0x3, "uart0"), /* RX */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 4, 4)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "mmc0"), /* D2 */ + SUNXI_FUNCTION(0x3, "jtag"), /* CK */ + SUNXI_FUNCTION(0x4, "jtag_gpu"), /* CK_GPU */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 4, 5)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 6), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION_IRQ_BANK(0x6, 4, 6)), + /* HOLE */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "mmc1"), /* CLK */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 0)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "mmc1"), /* CMD */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 1)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "mmc1"), /* D0 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 2)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "mmc1"), /* D1 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 3)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "mmc1"), /* D2 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 4)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "mmc1"), /* D3 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 5)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "uart1"), /* TX */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 6)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "uart1"), /* RX */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 7)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "uart1"), /* RTS */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 8)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "uart1"), /* CTS */ + SUNXI_FUNCTION(0x3, "i2s1"), /* MCLK */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 9)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x3, "i2s1"), /* BCLK */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 10)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x3, "i2s1"), /* LRCK */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 11)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 12), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x3, "i2s1_dout0"), /* DOUT0 */ + SUNXI_FUNCTION(0x4, "i2s1_din1"), /* DIN1 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 12)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 13), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x3, "i2s1_din0"), /* DIN0 */ + SUNXI_FUNCTION(0x4, "i2s1_dout1"), /* DOUT1 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 5, 13)), + /* HOLE */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 0), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "i2c0"), /* SCK */ + SUNXI_FUNCTION(0x5, "emac0"), /* RXD1 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 0)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "i2c0"), /* SDA */ + SUNXI_FUNCTION(0x5, "emac0"), /* RXD0 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 1)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "i2c1"), /* SCK */ + SUNXI_FUNCTION(0x5, "emac0"), /* RXCTL */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 2)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "i2c1"), /* SDA */ + SUNXI_FUNCTION(0x3, "cir0"), /* OUT */ + SUNXI_FUNCTION(0x5, "emac0"), /* CLKIN */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 3)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "uart3"), /* TX */ + SUNXI_FUNCTION(0x3, "spi1"), /* CS */ + SUNXI_FUNCTION(0x5, "emac0"), /* TXD1 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 4)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "uart3"), /* RX */ + SUNXI_FUNCTION(0x3, "spi1"), /* CLK */ + SUNXI_FUNCTION(0x4, "ledc"), + SUNXI_FUNCTION(0x5, "emac0"), /* TXD0 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 5)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "uart3"), /* RTS */ + SUNXI_FUNCTION(0x3, "spi1"), /* MOSI */ + SUNXI_FUNCTION(0x5, "emac0"), /* TXCK */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 6)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 7), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "uart3"), /* CTS */ + SUNXI_FUNCTION(0x3, "spi1"), /* MISO */ + SUNXI_FUNCTION(0x4, "spdif"), /* OUT */ + SUNXI_FUNCTION(0x5, "emac0"), /* TXCTL */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 7)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "dmic"), /* CLK */ + SUNXI_FUNCTION(0x3, "spi2"), /* CS */ + SUNXI_FUNCTION(0x4, "i2s2"), /* MCLK */ + SUNXI_FUNCTION(0x5, "i2s2_din2"), /* DIN2 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 8)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "dmic"), /* DATA0 */ + SUNXI_FUNCTION(0x3, "spi2"), /* CLK */ + SUNXI_FUNCTION(0x4, "i2s2"), /* BCLK */ + SUNXI_FUNCTION(0x5, "emac0"), /* MDC */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 9)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 10), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "dmic"), /* DATA1 */ + SUNXI_FUNCTION(0x3, "spi2"), /* MOSI */ + SUNXI_FUNCTION(0x4, "i2s2"), /* LRCK */ + SUNXI_FUNCTION(0x5, "emac0"), /* MDIO */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 10)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 11), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "dmic"), /* DATA2 */ + SUNXI_FUNCTION(0x3, "spi2"), /* MISO */ + SUNXI_FUNCTION(0x4, "i2s2_dout0"), /* DOUT0 */ + SUNXI_FUNCTION(0x5, "i2s2_din1"), /* DIN1 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 11)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 12), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "dmic"), /* DATA3 */ + SUNXI_FUNCTION(0x3, "i2c3"), /* SCK */ + SUNXI_FUNCTION(0x4, "i2s2_din0"), /* DIN0 */ + SUNXI_FUNCTION(0x5, "i2s2_dout1"), /* DOUT1 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 12)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 13), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x3, "i2c3"), /* SCK */ + SUNXI_FUNCTION(0x4, "i2s3"), /* MCLK */ + SUNXI_FUNCTION(0x5, "emac0"), /* EPHY */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 13)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 14), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x4, "i2s3"), /* BCLK */ + SUNXI_FUNCTION(0x5, "emac0"), /* RXD3 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 14)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 15), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x4, "i2s3"), /* LRCK */ + SUNXI_FUNCTION(0x5, "emac0"), /* RXD2 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 15)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 16), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x3, "i2s3_dout0"), /* DOUT0 */ + SUNXI_FUNCTION(0x4, "i2s3_din1"), /* DIN1 */ + SUNXI_FUNCTION(0x5, "emac0"), /* RXCK */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 16)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 17), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x3, "i2s3_dout1"), /* DOUT1 */ + SUNXI_FUNCTION(0x4, "i2s3_din0"), /* DIN0 */ + SUNXI_FUNCTION(0x5, "emac0"), /* TXD3 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 17)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 18), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "cir0"), /* OUT */ + SUNXI_FUNCTION(0x3, "i2s3_dout2"), /* DOUT2 */ + SUNXI_FUNCTION(0x4, "i2s3_din2"), /* DIN2 */ + SUNXI_FUNCTION(0x5, "emac0"), /* TXD2 */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 18)), + SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 19), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "cir0"), /* IN */ + SUNXI_FUNCTION(0x3, "i2s3_dout3"), /* DOUT3 */ + SUNXI_FUNCTION(0x4, "i2s3_din3"), /* DIN3 */ + SUNXI_FUNCTION(0x5, "ledc"), + SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 19)), +}; + +static const unsigned int a100_irq_bank_map[] = { 0, 1, 2, 3, 4, 5, 6}; + +static const struct sunxi_pinctrl_desc a100_pinctrl_data = { + .pins = a100_pins, + .npins = ARRAY_SIZE(a100_pins), + .irq_banks = 7, + .irq_bank_map = a100_irq_bank_map, + .io_bias_cfg_variant = BIAS_VOLTAGE_PIO_POW_MODE_SEL, +}; + +static int a100_pinctrl_probe(struct platform_device *pdev) +{ + return sunxi_pinctrl_init(pdev, &a100_pinctrl_data); +} + +static const struct of_device_id a100_pinctrl_match[] = { + { .compatible = "allwinner,sun50i-a100-pinctrl", }, + {} +}; +MODULE_DEVICE_TABLE(of, a100_pinctrl_match); + +static struct platform_driver a100_pinctrl_driver = { + .probe = a100_pinctrl_probe, + .driver = { + .name = "sun50i-a100-pinctrl", + .of_match_table = a100_pinctrl_match, + }, +}; +module_platform_driver(a100_pinctrl_driver); From 0662e4a190cfdb50df7a00bbc9aebe3ed3f09474 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Sat, 5 Sep 2020 23:49:55 +0200 Subject: [PATCH 151/433] pinctrl: rockchip: depend on OF The Rockchip pinctrl driver needs to handle information from Devicetree so only makes sense getting compiled on systems with CONFIG_OF enabled. This also fixes a problem found by the "kernel-test-robot" when compiling the driver on test-builds that do not have CONFIG_OF enabled: drivers/pinctrl/pinctrl-rockchip.c: In function 'rockchip_pinctrl_parse_groups': >> drivers/pinctrl/pinctrl-rockchip.c:2881:9: error: implicit declaration of function 'pinconf_generic_parse_dt_config'; did you mean 'pinconf_generic_dump_config'? [-Werror=implicit-function-declaration] 2881 | ret = pinconf_generic_parse_dt_config(np_config, NULL, | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | pinconf_generic_dump_config drivers/pinctrl/pinctrl-rockchip.c: In function 'rockchip_gpiolib_register': >> drivers/pinctrl/pinctrl-rockchip.c:3473:5: error: 'struct gpio_chip' has no member named 'of_node' 3473 | gc->of_node = bank->of_node; Reported-by: kernel test robot Signed-off-by: Heiko Stuebner Link: https://lore.kernel.org/r/20200905214955.907950-1-heiko@sntech.de Signed-off-by: Linus Walleij --- drivers/pinctrl/Kconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index 6f62b9bb79bb..029dd65eaa76 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -208,10 +208,12 @@ config PINCTRL_OXNAS config PINCTRL_ROCKCHIP bool + depends on OF select PINMUX select GENERIC_PINCONF select GENERIC_IRQ_CHIP select MFD_SYSCON + select OF_GPIO config PINCTRL_RZA1 bool "Renesas RZ/A1 gpio and pinctrl driver" From 6d8e04f9d38345770572a39125a47da37bb8ce9e Mon Sep 17 00:00:00 2001 From: Martin DEVERA Date: Wed, 5 Aug 2020 11:28:11 +0200 Subject: [PATCH 152/433] pinctrl: sx150x: Fix pinctrl enablement order bug MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit I encountered bug in SX1502 expander driver in 5.7.7. Here is relevant DTS part: compatible = "semtech,sx1502q"; gpio4_cfg_pins: gpio2-cfg {                         pins = "gpio5";                         output-high;     }; And part of OOPS: [    0.673996] [] (gpiochip_get_data) from [] (sx150x_gpio_direction_output+0xd) [    0.683259] [] (sx150x_gpio_direction_output) from [] (sx150x_pinconf_set+0x) [    0.692796] [] (sx150x_pinconf_set) from [] (pinconf_apply_setting+0x39/0x7e) [    0.701635] [] (pinconf_apply_setting) from [] (pinctrl_commit_state+0xa5/0x) [    0.710648] [] (pinctrl_commit_state) from [] (pinctrl_enable+0xff/0x1d4) [    0.719139] [] (pinctrl_enable) from [] (sx150x_probe+0x1a3/0x358) [    0.727027] [] (sx150x_probe) from [] (i2c_device_probe+0x1bb/0x1dc) The problem is that sx150x_pinconf_set uses sx150x_gpio_direction_output but gpio is not setup yet. Patch below fixes it but I'm not sure whether is it correct. Link: https://lore.kernel.org/r/f32130bf-cfd4-b1bf-538c-dbc9ee2d947a@eaxlabs.cz Signed-off-by: Martin DEVERA Signed-off-by: Linus Walleij --- drivers/pinctrl/pinctrl-sx150x.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/drivers/pinctrl/pinctrl-sx150x.c b/drivers/pinctrl/pinctrl-sx150x.c index b325a136ac48..c110f780407b 100644 --- a/drivers/pinctrl/pinctrl-sx150x.c +++ b/drivers/pinctrl/pinctrl-sx150x.c @@ -1154,12 +1154,6 @@ static int sx150x_probe(struct i2c_client *client, return ret; } - ret = pinctrl_enable(pctl->pctldev); - if (ret) { - dev_err(dev, "Failed to enable pinctrl device\n"); - return ret; - } - /* Register GPIO controller */ pctl->gpio.base = -1; pctl->gpio.ngpio = pctl->data->npins; @@ -1238,6 +1232,17 @@ static int sx150x_probe(struct i2c_client *client, if (ret) return ret; + /* + * Pin control functions need to be enabled AFTER registering the + * GPIO chip because sx150x_pinconf_set() calls + * sx150x_gpio_direction_output(). + */ + ret = pinctrl_enable(pctl->pctldev); + if (ret) { + dev_err(dev, "Failed to enable pinctrl device\n"); + return ret; + } + ret = gpiochip_add_pin_range(&pctl->gpio, dev_name(dev), 0, 0, pctl->data->npins); if (ret) From 84f28fc38d2ff99e2ac623325ba37809da611b8e Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Tue, 25 Aug 2020 16:33:48 +0200 Subject: [PATCH 153/433] pinctrl: devicetree: Keep deferring even on timeout driver_deferred_probe_check_state() may return -ETIMEDOUT instead of -EPROBE_DEFER after all built-in drivers have been probed. This can cause issues for built-in drivers that depend on resources provided by loadable modules. One such case happens on Tegra where I2C controllers are used during early boot to set up the system PMIC, so the I2C driver needs to be a built-in driver. At the same time, some instances of the I2C controller depend on the DPAUX hardware for pinmuxing. Since the DPAUX is handled by the display driver, which is usually not built-in, the pin control states will not become available until after the root filesystem has been mounted and the display driver loaded from it. Fixes: bec6c0ecb243 ("pinctrl: Remove use of driver_deferred_probe_check_state_continue()") Suggested-by: John Stultz Signed-off-by: Thierry Reding Link: https://lore.kernel.org/r/20200825143348.1358679-1-thierry.reding@gmail.com Signed-off-by: Linus Walleij --- drivers/pinctrl/devicetree.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/pinctrl/devicetree.c b/drivers/pinctrl/devicetree.c index 5eff8c296552..3fb238714718 100644 --- a/drivers/pinctrl/devicetree.c +++ b/drivers/pinctrl/devicetree.c @@ -130,9 +130,8 @@ static int dt_to_map_one_config(struct pinctrl *p, if (!np_pctldev || of_node_is_root(np_pctldev)) { of_node_put(np_pctldev); ret = driver_deferred_probe_check_state(p->dev); - /* keep deferring if modules are enabled unless we've timed out */ - if (IS_ENABLED(CONFIG_MODULES) && !allow_default && - (ret == -ENODEV)) + /* keep deferring if modules are enabled */ + if (IS_ENABLED(CONFIG_MODULES) && !allow_default && ret < 0) ret = -EPROBE_DEFER; return ret; } From 7c5798ab1fc537582a27e6f3a4319341859504ce Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 29 Aug 2020 16:24:56 +0200 Subject: [PATCH 154/433] dt-bindings: connector: Convert Samsung 11-pin USB bindings to dtschema Add Samsung 11-pin USB-C connector into standard dtschema bindings file. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20200829142501.31478-5-krzk@kernel.org Signed-off-by: Rob Herring --- .../connector/samsung,usb-connector-11pin.txt | 49 ------------------- .../bindings/connector/usb-connector.yaml | 44 +++++++++++++++++ 2 files changed, 44 insertions(+), 49 deletions(-) delete mode 100644 Documentation/devicetree/bindings/connector/samsung,usb-connector-11pin.txt diff --git a/Documentation/devicetree/bindings/connector/samsung,usb-connector-11pin.txt b/Documentation/devicetree/bindings/connector/samsung,usb-connector-11pin.txt deleted file mode 100644 index 3dd8961154ab..000000000000 --- a/Documentation/devicetree/bindings/connector/samsung,usb-connector-11pin.txt +++ /dev/null @@ -1,49 +0,0 @@ -Samsung micro-USB 11-pin connector -================================== - -Samsung micro-USB 11-pin connector is an extension of micro-USB connector. -It is present in multiple Samsung mobile devices. -It has additional pins to route MHL traffic simultanously with USB. - -The bindings are superset of usb-connector bindings for micro-USB connector[1]. - -Required properties: -- compatible: must be: "samsung,usb-connector-11pin", "usb-b-connector", -- type: must be "micro". - -Required nodes: -- any data bus to the connector should be modeled using the OF graph bindings - specified in bindings/graph.txt, unless the bus is between parent node and - the connector. Since single connector can have multpile data buses every bus - has assigned OF graph port number as follows: - 0: High Speed (HS), - 3: Mobile High-Definition Link (MHL), specific to 11-pin Samsung micro-USB. - -[1]: bindings/connector/usb-connector.yaml - -Example -------- - -Micro-USB connector with HS lines routed via controller (MUIC) and MHL lines -connected to HDMI-MHL bridge (sii8620): - -muic-max77843@66 { - ... - usb_con: connector { - compatible = "samsung,usb-connector-11pin", "usb-b-connector"; - label = "micro-USB"; - type = "micro"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@3 { - reg = <3>; - usb_con_mhl: endpoint { - remote-endpoint = <&sii8620_mhl>; - }; - }; - }; - }; -}; diff --git a/Documentation/devicetree/bindings/connector/usb-connector.yaml b/Documentation/devicetree/bindings/connector/usb-connector.yaml index 9bd52e63c935..dc6ff64422d4 100644 --- a/Documentation/devicetree/bindings/connector/usb-connector.yaml +++ b/Documentation/devicetree/bindings/connector/usb-connector.yaml @@ -25,6 +25,10 @@ properties: - const: gpio-usb-b-connector - const: usb-b-connector + - items: + - const: samsung,usb-connector-11pin + - const: usb-b-connector + label: description: Symbolic name for the connector. @@ -158,6 +162,16 @@ allOf: - required: - id-gpios + - if: + properties: + compatible: + contains: + const: samsung,usb-connector-11pin + then: + properties: + type: + const: micro + examples: # Micro-USB connector with HS lines routed via controller (MUIC). - | @@ -233,3 +247,33 @@ examples: vbus-supply = <&usb_p0_vbus>; }; }; + + # Micro-USB connector with HS lines routed via controller (MUIC) and MHL + # lines connected to HDMI-MHL bridge (sii8620) on Samsung Exynos5433-based + # mobile phone + - | + muic-max77843 { + usb_con4: connector { + compatible = "samsung,usb-connector-11pin", "usb-b-connector"; + label = "micro-USB"; + type = "micro"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + muic_to_usb: endpoint { + remote-endpoint = <&usb_to_muic>; + }; + }; + port@3 { + reg = <3>; + usb_con_mhl: endpoint { + remote-endpoint = <&sii8620_mhl>; + }; + }; + }; + }; + }; From af312c87774c96f271d277e9d97f38fb2a72b2d5 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 29 Aug 2020 19:25:29 +0200 Subject: [PATCH 155/433] dt-bindings: display: samsung,amoled-mipi-dsi: Do not require enable-gpios on samsung,s6e63j0x03 The samsung,s6e63j0x03 does not have enable GPIO, so do not require it. This fixes dtbs_check warning: arch/arm/boot/dts/exynos3250-rinato.dt.yaml: panel@0: 'enable-gpios' is a required property Acked-by: Sam Ravnborg Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20200829172532.29358-1-krzk@kernel.org Signed-off-by: Rob Herring --- .../display/panel/samsung,amoled-mipi-dsi.yaml | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/panel/samsung,amoled-mipi-dsi.yaml b/Documentation/devicetree/bindings/display/panel/samsung,amoled-mipi-dsi.yaml index 96bdde9298e0..ccc482570d6a 100644 --- a/Documentation/devicetree/bindings/display/panel/samsung,amoled-mipi-dsi.yaml +++ b/Documentation/devicetree/bindings/display/panel/samsung,amoled-mipi-dsi.yaml @@ -12,6 +12,17 @@ maintainers: allOf: - $ref: panel-common.yaml# + - if: + properties: + compatible: + contains: + enum: + - samsung,s6e3ha2 + - samsung,s6e3hf2 + then: + required: + - enable-gpios + properties: compatible: enum: @@ -39,7 +50,6 @@ required: - vdd3-supply - vci-supply - reset-gpios - - enable-gpios additionalProperties: false From 6b80c3d664a76d723096923de6fa879db6ff0576 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 3 Sep 2020 20:03:58 +0200 Subject: [PATCH 156/433] dt-bindings: crypto: slimsss: Correct a typo in compatible Correct a typo in the compatible - missing trailing 's'. Reviewed-by: Kamil Konieczny Acked-by: Kamil Konieczny Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20200903180400.2865-1-krzk@kernel.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/crypto/samsung-slimsss.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/crypto/samsung-slimsss.yaml b/Documentation/devicetree/bindings/crypto/samsung-slimsss.yaml index 04fe5dfa794a..7743eae049ab 100644 --- a/Documentation/devicetree/bindings/crypto/samsung-slimsss.yaml +++ b/Documentation/devicetree/bindings/crypto/samsung-slimsss.yaml @@ -19,7 +19,7 @@ description: |+ properties: compatible: items: - - const: samsung,exynos5433-slim-ss + - const: samsung,exynos5433-slim-sss reg: maxItems: 1 From 1c6d7e4b1fcea6781b59af42cb03306c39cfc4f1 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 3 Sep 2020 21:13:10 +0200 Subject: [PATCH 157/433] dt-bindings: arm: samsung: pmu: Add missing properties Add common properties appearing in DTSes (assigned-clock-parents, assigned-clocks) to fix dtbs_check warnings like: arch/arm64/boot/dts/exynos/exynos5433-tm2.dt.yaml: system-controller@105c0000: 'assigned-clock-parents', 'assigned-clocks' do not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20200903191311.12293-1-krzk@kernel.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/arm/samsung/pmu.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/samsung/pmu.yaml b/Documentation/devicetree/bindings/arm/samsung/pmu.yaml index c9651892710e..cde9c5ec28c8 100644 --- a/Documentation/devicetree/bindings/arm/samsung/pmu.yaml +++ b/Documentation/devicetree/bindings/arm/samsung/pmu.yaml @@ -45,6 +45,9 @@ properties: reg: maxItems: 1 + assigned-clock-parents: true + assigned-clocks: true + '#clock-cells': const: 1 From 6a1aa95508fc178ac855b3f68185417654489460 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 3 Sep 2020 21:13:11 +0200 Subject: [PATCH 158/433] dt-bindings: timer: exynos4210-mct: Add missing clocks The Exynos Multi Core Timer driver requires two clocks. This was never documented in the binding. Add it to fix dtschema warnings like: arch/arm64/boot/dts/exynos/exynos5433-tm2.dt.yaml: timer@101c0000: 'clock-names', 'clocks' do not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20200903191311.12293-2-krzk@kernel.org Signed-off-by: Rob Herring --- .../timer/samsung,exynos4210-mct.yaml | 25 +++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml index 37bd01a62c52..f11cbc7ccc14 100644 --- a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml +++ b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml @@ -23,6 +23,15 @@ properties: - samsung,exynos4210-mct - samsung,exynos4412-mct + clocks: + minItems: 2 + maxItems: 2 + + clock-names: + items: + - pattern: "^(fin_pll|mct)$" + - pattern: "^(fin_pll|mct)$" + reg: maxItems: 1 @@ -49,6 +58,8 @@ properties: required: - compatible + - clock-names + - clocks - interrupts - reg @@ -59,11 +70,15 @@ examples: // In this example, the IP contains two local timers, using separate // interrupts, so two local timer interrupts have been specified, // in addition to four global timer interrupts. + #include #include timer@10050000 { compatible = "samsung,exynos4210-mct"; reg = <0x10050000 0x800>; + clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>; + clock-names = "fin_pll", "mct"; + interrupts = , , , @@ -75,11 +90,15 @@ examples: - | // In this example, the timer interrupts are connected to two separate // interrupt controllers. Hence, an interrupts-extended is needed. + #include #include timer@101c0000 { compatible = "samsung,exynos4210-mct"; reg = <0x101C0000 0x800>; + clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>; + clock-names = "fin_pll", "mct"; + interrupts-extended = <&gic GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, <&gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>, <&combiner 12 6>, @@ -92,11 +111,14 @@ examples: // In this example, the IP contains four local timers, but using // a per-processor interrupt to handle them. Only one first local // interrupt is specified. + #include #include timer@10050000 { compatible = "samsung,exynos4412-mct"; reg = <0x10050000 0x800>; + clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>; + clock-names = "fin_pll", "mct"; interrupts = , , @@ -109,11 +131,14 @@ examples: // In this example, the IP contains four local timers, but using // a per-processor interrupt to handle them. All the local timer // interrupts are specified. + #include #include timer@10050000 { compatible = "samsung,exynos4412-mct"; reg = <0x10050000 0x800>; + clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>; + clock-names = "fin_pll", "mct"; interrupts = , , From 5d7fb8b80f5eb92e14d5bf28f5272d6d2e33ba09 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 3 Sep 2020 21:14:07 +0200 Subject: [PATCH 159/433] dt-bindings: mfd: google,cros-ec: Add missing properties Add common properties appearing in DTSes (controller-data, wakeup-source) to partially fix dtbs_check warnings like: arch/arm/boot/dts/exynos5250-snow.dt.yaml: embedded-controller@1e: 'keyboard-controller', 'wakeup-source' do not match any of the regexes: 'pinctrl-[0-9]+' arch/arm/boot/dts/exynos5800-peach-pi.dt.yaml: cros-ec@0: 'controller-data', 'i2c-tunnel', 'keyboard-controller' do not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20200903191407.12686-1-krzk@kernel.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/mfd/google,cros-ec.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml b/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml index 6a7279a85ec1..f49c0d5d31ad 100644 --- a/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml +++ b/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml @@ -30,6 +30,11 @@ properties: For implementations of the EC is connected through RPMSG. const: google,cros-ec-rpmsg + controller-data: + description: + SPI controller data, see bindings/spi/spi-samsung.txt + type: object + google,cros-ec-spi-pre-delay: description: This property specifies the delay in usecs between the @@ -63,6 +68,9 @@ properties: interrupts: maxItems: 1 + wakeup-source: + description: Button can wake-up the system. + required: - compatible From 95da350eeff325b534ad20996ac2874b24953e1a Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 3 Sep 2020 21:14:33 +0200 Subject: [PATCH 160/433] dt-bindings: gpu: arm,mali-midgard: Add missing properties Add common properties appearing in DTSes (opp-table) to fix dtbs_check warnings like: arch/arm64/boot/dts/exynos/exynos5433-tm2.dt.yaml: gpu@14ac0000: 'opp-table' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20200903191438.12781-1-krzk@kernel.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml index 80d519a76db2..e9c42b59f30f 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml +++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml @@ -74,6 +74,7 @@ properties: - const: bus mali-supply: true + opp-table: true power-domains: maxItems: 1 From 714872891415f53f5a55da5f37082125e2905c8b Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 3 Sep 2020 21:14:34 +0200 Subject: [PATCH 161/433] dt-bindings: gpu: arm,mali-utgard: Add missing properties Add common properties appearing in DTSes (opp-table) to fix dtbs_check warnings like: arch/arm/boot/dts/exynos4210-i9100.dt.yaml: gpu@13000000: 'opp-table' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20200903191438.12781-2-krzk@kernel.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml index 6226d31ec4b7..00976ad93943 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml +++ b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml @@ -100,6 +100,8 @@ properties: mali-supply: true + opp-table: true + power-domains: maxItems: 1 From 2c1fb9f408b2a3536118dff09e9e94a04bc81ec2 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 3 Sep 2020 21:14:35 +0200 Subject: [PATCH 162/433] dt-bindings: gpu: arm,mali-utgard: Correct Maxime's email Update the address of Maxime Ripard as one in @free-electrons.com does not work. Cc: Maxime Ripard Acked-by: Maxime Ripard Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20200903191438.12781-3-krzk@kernel.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml index 00976ad93943..53708fe9e004 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml +++ b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml @@ -8,7 +8,7 @@ title: ARM Mali Utgard GPU maintainers: - Rob Herring - - Maxime Ripard + - Maxime Ripard - Heiko Stuebner properties: From 5823417c942c5916c36f13c6878672d2ac560382 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 3 Sep 2020 21:53:23 +0200 Subject: [PATCH 163/433] dt-bindings: mailbox: fsl,mu: Fix i.MX 8QXP compatible matching The Mailbox on i.MX 8QXP (fsl,imx8qxp-mu) can also be compatible with fsl,imx8-mu-scu (for fast IPC) so adjust the compatibles to fix dtbs_check warnings like: arch/arm64/boot/dts/freescale/imx8qxp-mek.dt.yaml: mailbox@5d1f0000: compatible: ['fsl,imx8-mu-scu', 'fsl,imx8qxp-mu', 'fsl,imx6sx-mu'] is not valid under any of the given schemas (Possible causes of the failure): arch/arm64/boot/dts/freescale/imx8qxp-mek.dt.yaml: mailbox@5d1f0000: compatible: ['fsl,imx8-mu-scu', 'fsl,imx8qxp-mu', 'fsl,imx6sx-mu'] is too long Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20200903195325.5394-1-krzk@kernel.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/mailbox/fsl,mu.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml index 8a3470b64d06..7ed096360be2 100644 --- a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml +++ b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml @@ -38,8 +38,9 @@ properties: - const: fsl,imx6sx-mu - description: To communicate with i.MX8 SCU with fast IPC items: - - const: fsl,imx8qxp-mu - const: fsl,imx8-mu-scu + - const: fsl,imx8qxp-mu + - const: fsl,imx6sx-mu reg: maxItems: 1 From 5ed5807364a59f3adef2b21f718864d601d167ca Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Fri, 4 Sep 2020 09:58:34 +0200 Subject: [PATCH 164/433] dt-bindings: phy: convert phy-hi3660-usb3.txt to yaml Convert Hisilicon Kirin 960 USB3 PHY bindings to DT schema format using json-schema. Signed-off-by: Mauro Carvalho Chehab Link: https://lore.kernel.org/r/edfeafe6b5a60a84d08095fb380f32e61af46d40.1599206213.git.mchehab+huawei@kernel.org Signed-off-by: Rob Herring --- .../bindings/phy/hisilicon,hi3660-usb3.yaml | 60 +++++++++++++++++++ .../bindings/phy/phy-hi3660-usb3.txt | 26 -------- 2 files changed, 60 insertions(+), 26 deletions(-) create mode 100644 Documentation/devicetree/bindings/phy/hisilicon,hi3660-usb3.yaml delete mode 100644 Documentation/devicetree/bindings/phy/phy-hi3660-usb3.txt diff --git a/Documentation/devicetree/bindings/phy/hisilicon,hi3660-usb3.yaml b/Documentation/devicetree/bindings/phy/hisilicon,hi3660-usb3.yaml new file mode 100644 index 000000000000..c2e073e26190 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/hisilicon,hi3660-usb3.yaml @@ -0,0 +1,60 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/hisilicon,hi3660-usb3.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Hisilicon Kirin 960 USB PHY + +maintainers: + - Mauro Carvalho Chehab +description: |+ + Bindings for USB3 PHY on HiSilicon Kirin 960. + +properties: + compatible: + const: hisilicon,hi3660-usb-phy + + "#phy-cells": + const: 0 + + hisilicon,pericrg-syscon: + $ref: '/schemas/types.yaml#/definitions/phandle' + description: phandle of syscon used to control iso refclk. + + hisilicon,pctrl-syscon: + $ref: '/schemas/types.yaml#/definitions/phandle' + description: phandle of syscon used to control usb tcxo. + + hisilicon,eye-diagram-param: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Eye diagram for phy. + +required: + - compatible + - hisilicon,pericrg-syscon + - hisilicon,pctrl-syscon + - hisilicon,eye-diagram-param + - "#phy-cells" + +additionalProperties: false + +examples: + - | + bus { + #address-cells = <2>; + #size-cells = <2>; + + usb3_otg_bc: usb3_otg_bc@ff200000 { + compatible = "syscon", "simple-mfd"; + reg = <0x0 0xff200000 0x0 0x1000>; + + usb-phy { + compatible = "hisilicon,hi3660-usb-phy"; + #phy-cells = <0>; + hisilicon,pericrg-syscon = <&crg_ctrl>; + hisilicon,pctrl-syscon = <&pctrl>; + hisilicon,eye-diagram-param = <0x22466e4>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/phy/phy-hi3660-usb3.txt b/Documentation/devicetree/bindings/phy/phy-hi3660-usb3.txt deleted file mode 100644 index e88ba7d92dcb..000000000000 --- a/Documentation/devicetree/bindings/phy/phy-hi3660-usb3.txt +++ /dev/null @@ -1,26 +0,0 @@ -Hisilicon hi3660 USB PHY ------------------------ - -Required properties: -- compatible: should be "hisilicon,hi3660-usb-phy" -- #phy-cells: must be 0 -- hisilicon,pericrg-syscon: phandle of syscon used to control phy. -- hisilicon,pctrl-syscon: phandle of syscon used to control phy. -- hisilicon,eye-diagram-param: parameter set for phy -Refer to phy/phy-bindings.txt for the generic PHY binding properties - -This is a subnode of usb3_otg_bc register node. - -Example: - usb3_otg_bc: usb3_otg_bc@ff200000 { - compatible = "syscon", "simple-mfd"; - reg = <0x0 0xff200000 0x0 0x1000>; - - usb-phy { - compatible = "hisilicon,hi3660-usb-phy"; - #phy-cells = <0>; - hisilicon,pericrg-syscon = <&crg_ctrl>; - hisilicon,pctrl-syscon = <&pctrl>; - hisilicon,eye-diagram-param = <0x22466e4>; - }; - }; From 0309c683dd7e5e263bb16a2c4199df933ff2222c Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 4 Sep 2020 16:53:00 +0200 Subject: [PATCH 165/433] dt-bindings: power: fsl,imx-gpcv2: Document interrupt controller properties The i.MX General Power Controller v2 is also an interrupt controller so document additional properties to fix dtbs_check warnings like: arch/arm64/boot/dts/freescale/imx8mq-evk.dt.yaml: gpc@303a0000: '#interrupt-cells', 'interrupt-controller' do not match any of the regexes: 'pinctrl-[0-9]+' Reviewed-by: Lucas Stach Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20200904145312.10960-2-krzk@kernel.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml b/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml index bde09a0b2da3..a96e6dbf1858 100644 --- a/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml +++ b/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml @@ -33,6 +33,10 @@ properties: interrupts: maxItems: 1 + interrupt-controller: true + '#interrupt-cells': + const: 3 + pgc: type: object description: list of power domains provided by this controller. From 33f9e5070ccb95c17875bc4496de18c1db7a3891 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 4 Sep 2020 16:53:01 +0200 Subject: [PATCH 166/433] dt-bindings: display: bridge: nwl-dsi: Add common properties Add common properties appearing in DTSes (assigned-clocks and others) to fix dtbs_check warnings like: arch/arm64/boot/dts/freescale/imx8mq-evk.dt.yaml: mipi-dsi@30a00000: 'assigned-clock-parents', 'assigned-clock-rates', 'assigned-clocks' do not match any of the regexes: '^panel@[0-9]+$', 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20200904145312.10960-3-krzk@kernel.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml b/Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml index 04099f5bea3f..b8ba6eb482a1 100644 --- a/Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml +++ b/Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml @@ -30,6 +30,10 @@ properties: '#size-cells': const: 0 + assigned-clock-parents: true + assigned-clock-rates: true + assigned-clocks: true + clocks: items: - description: DSI core clock From feb39c74f2965ba3270239777a22b6a7e59332b2 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 4 Sep 2020 16:53:03 +0200 Subject: [PATCH 167/433] dt-bindings: gpu: vivante,gc: Add common properties Add common properties appearing in DTSes (cooling-cells, assigned-clocks and others) to fix dtbs_check warnings like: arch/arm64/boot/dts/freescale/imx8mq-evk.dt.yaml: gpu@38000000: '#cooling-cells', 'assigned-clock-parents', 'assigned-clock-rates', 'assigned-clocks' do not match any of the regexes: 'pinctrl-[0-9]+' Reviewed-by: Lucas Stach Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20200904145312.10960-5-krzk@kernel.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/gpu/vivante,gc.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/gpu/vivante,gc.yaml b/Documentation/devicetree/bindings/gpu/vivante,gc.yaml index 4843df1ddbb6..67b71cad7b3b 100644 --- a/Documentation/devicetree/bindings/gpu/vivante,gc.yaml +++ b/Documentation/devicetree/bindings/gpu/vivante,gc.yaml @@ -21,6 +21,13 @@ properties: interrupts: maxItems: 1 + '#cooling-cells': + const: 2 + + assigned-clock-parents: true + assigned-clock-rates: true + assigned-clocks: true + clocks: items: - description: AXI/master interface clock From 2745f888db7b62075c4ca9fd5fbc2f0a0c5565cf Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 4 Sep 2020 16:53:04 +0200 Subject: [PATCH 168/433] dt-bindings: gpu: vivante,gc: Remove trailing whitespace Remove whitespace at the end of line. Reviewed-by: Lucas Stach Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20200904145312.10960-6-krzk@kernel.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/gpu/vivante,gc.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/gpu/vivante,gc.yaml b/Documentation/devicetree/bindings/gpu/vivante,gc.yaml index 67b71cad7b3b..3ed172629974 100644 --- a/Documentation/devicetree/bindings/gpu/vivante,gc.yaml +++ b/Documentation/devicetree/bindings/gpu/vivante,gc.yaml @@ -33,7 +33,7 @@ properties: - description: AXI/master interface clock - description: GPU core clock - description: Shader clock (only required if GPU has feature PIPE_3D) - - description: AHB/slave interface clock (only required if GPU can gate + - description: AHB/slave interface clock (only required if GPU can gate slave interface independently) minItems: 1 maxItems: 4 From 7f1f43f436cb80ee64baf9dacda0e61d135f2ac2 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 4 Sep 2020 17:23:51 +0200 Subject: [PATCH 169/433] dt-bindings: perf: fsl-imx-ddr: Add i.MX 8M compatibles DTSes with new i.MX 8M SoCs introduce their own compatibles so add them to fix dtbs_check warnings like: arch/arm64/boot/dts/freescale/imx8mm-evk.dt.yaml: ddr-pmu@3d800000: compatible:0: 'fsl,imx8mm-ddr-pmu' is not one of ['fsl,imx8-ddr-pmu', 'fsl,imx8m-ddr-pmu', 'fsl,imx8mp-ddr-pmu'] From schema: Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml arch/arm64/boot/dts/freescale/imx8mm-evk.dt.yaml: ddr-pmu@3d800000: compatible: ['fsl,imx8mm-ddr-pmu', 'fsl,imx8m-ddr-pmu'] is too long arch/arm64/boot/dts/freescale/imx8mm-evk.dt.yaml: ddr-pmu@3d800000: compatible: Additional items are not allowed ('fsl,imx8m-ddr-pmu' was unexpected) Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring Signed-off-by: Rob Herring --- .../devicetree/bindings/perf/fsl-imx-ddr.yaml | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml b/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml index 9ed8f44adabe..5aad9f4e0b2a 100644 --- a/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml +++ b/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml @@ -11,10 +11,18 @@ maintainers: properties: compatible: - enum: - - fsl,imx8-ddr-pmu - - fsl,imx8m-ddr-pmu - - fsl,imx8mp-ddr-pmu + oneOf: + - enum: + - fsl,imx8-ddr-pmu + - fsl,imx8m-ddr-pmu + - fsl,imx8mp-ddr-pmu + - items: + - enum: + - fsl,imx8mm-ddr-pmu + - fsl,imx8mn-ddr-pmu + - fsl,imx8mq-ddr-pmu + - fsl,imx8mp-ddr-pmu + - const: fsl,imx8m-ddr-pmu reg: maxItems: 1 From d058717bdff46328cbcf8796785fa7f4157bb86c Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 4 Sep 2020 17:23:52 +0200 Subject: [PATCH 170/433] dt-bindings: pwm: imx-pwm: Add i.MX 8M compatibles DTSes with new i.MX 8M SoCs introduce their own compatibles so add them to fix dtbs_check warnings like: arch/arm64/boot/dts/freescale/imx8mm-evk.dt.yaml: pwm@30660000: compatible:0: 'fsl,imx8mm-pwm' is not one of ['fsl,imx1-pwm', 'fsl,imx27-pwm'] From schema: Documentation/devicetree/bindings/pwm/imx-pwm.yaml arch/arm64/boot/dts/freescale/imx8mm-evk.dt.yaml: pwm@30660000: compatible: ['fsl,imx8mm-pwm', 'fsl,imx27-pwm'] is too long arch/arm64/boot/dts/freescale/imx8mm-evk.dt.yaml: pwm@30660000: compatible: Additional items are not allowed ('fsl,imx27-pwm' was unexpected) Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/pwm/imx-pwm.yaml | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/pwm/imx-pwm.yaml b/Documentation/devicetree/bindings/pwm/imx-pwm.yaml index 01df06777cba..473863eb67e5 100644 --- a/Documentation/devicetree/bindings/pwm/imx-pwm.yaml +++ b/Documentation/devicetree/bindings/pwm/imx-pwm.yaml @@ -19,9 +19,17 @@ properties: - 3 compatible: - enum: - - fsl,imx1-pwm - - fsl,imx27-pwm + oneOf: + - enum: + - fsl,imx1-pwm + - fsl,imx27-pwm + - items: + - enum: + - fsl,imx8mm-pwm + - fsl,imx8mn-pwm + - fsl,imx8mp-pwm + - fsl,imx8mq-pwm + - const: fsl,imx27-pwm reg: maxItems: 1 From 669e8aa347e6bdd367bafd564fb160d5d701ddd1 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 4 Sep 2020 17:23:53 +0200 Subject: [PATCH 171/433] dt-bindings: serial: fsl-imx-uart: Add i.MX 8M compatibles DTSes with new i.MX 8M SoCs introduce their own compatibles so add them to fix dtbs_check warnings like: arch/arm64/boot/dts/freescale/imx8mm-evk.dt.yaml: pwm@30660000: compatible:0: 'fsl,imx8mm-pwm' is not one of ['fsl,imx1-pwm', 'fsl,imx27-pwm'] From schema: Documentation/devicetree/bindings/pwm/imx-pwm.yaml arch/arm64/boot/dts/freescale/imx8mm-evk.dt.yaml: pwm@30660000: compatible: ['fsl,imx8mm-pwm', 'fsl,imx27-pwm'] is too long arch/arm64/boot/dts/freescale/imx8mm-evk.dt.yaml: pwm@30660000: compatible: Additional items are not allowed ('fsl,imx27-pwm' was unexpected) Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/serial/fsl-imx-uart.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/serial/fsl-imx-uart.yaml b/Documentation/devicetree/bindings/serial/fsl-imx-uart.yaml index cba3f83ccd5f..3d896173b3b0 100644 --- a/Documentation/devicetree/bindings/serial/fsl-imx-uart.yaml +++ b/Documentation/devicetree/bindings/serial/fsl-imx-uart.yaml @@ -36,6 +36,10 @@ properties: - fsl,imx6sx-uart - fsl,imx6ul-uart - fsl,imx7d-uart + - fsl,imx8mm-uart + - fsl,imx8mn-uart + - fsl,imx8mp-uart + - fsl,imx8mq-uart - const: fsl,imx6q-uart reg: From cc4521cf8877a47a0ea4c452ecd93f3c3c7a5b74 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 4 Sep 2020 17:23:54 +0200 Subject: [PATCH 172/433] dt-bindings: serial: fsl-lpuart: Fix compatible matching The i.MX 8QXP DTSes use two compatibles so update the binding to fix dtbs_check warnings like: arch/arm64/boot/dts/freescale/imx8qxp-mek.dt.yaml: serial@5a060000: compatible: ['fsl,imx8qxp-lpuart', 'fsl,imx7ulp-lpuart'] is too long From schema: Documentation/devicetree/bindings/serial/fsl-lpuart.yaml arch/arm64/boot/dts/freescale/imx8qxp-mek.dt.yaml: serial@5a060000: compatible: Additional items are not allowed ('fsl,imx7ulp-lpuart' was unexpected) Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring Signed-off-by: Rob Herring --- .../devicetree/bindings/serial/fsl-lpuart.yaml | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/serial/fsl-lpuart.yaml b/Documentation/devicetree/bindings/serial/fsl-lpuart.yaml index e82c2cf9fef7..bd21060d26e0 100644 --- a/Documentation/devicetree/bindings/serial/fsl-lpuart.yaml +++ b/Documentation/devicetree/bindings/serial/fsl-lpuart.yaml @@ -14,13 +14,16 @@ allOf: properties: compatible: - enum: - - fsl,vf610-lpuart - - fsl,ls1021a-lpuart - - fsl,ls1028a-lpuart - - fsl,imx7ulp-lpuart - - fsl,imx8qxp-lpuart - - fsl,imx8qm-lpuart + oneOf: + - enum: + - fsl,vf610-lpuart + - fsl,ls1021a-lpuart + - fsl,ls1028a-lpuart + - fsl,imx7ulp-lpuart + - fsl,imx8qm-lpuart + - items: + - const: fsl,imx8qxp-lpuart + - const: fsl,imx7ulp-lpuart reg: maxItems: 1 From 10f77331f997960328f0cb910a63c2935fcef14d Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 4 Sep 2020 17:23:55 +0200 Subject: [PATCH 173/433] dt-bindings: watchdog: fsl-imx-wdt: Add i.MX 8M compatibles DTSes with new i.MX 8M SoCs introduce their own compatibles so add them to fix dtbs_check warnings like: arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dt.yaml: watchdog@30280000: compatible:0: 'fsl,imx8mm-wdt' is not one of ['fsl,imx21-wdt'] From schema: Documentation/devicetree/bindings/watchdog/fsl-imx-wdt.yaml arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dt.yaml: watchdog@30280000: compatible: ['fsl,imx8mm-wdt', 'fsl,imx21-wdt'] is too long arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dt.yaml: watchdog@30280000: compatible: Additional items are not allowed ('fsl,imx21-wdt' was unexpected) Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring Reviewed-by: Guenter Roeck Signed-off-by: Rob Herring --- .../devicetree/bindings/watchdog/fsl-imx-wdt.yaml | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/watchdog/fsl-imx-wdt.yaml b/Documentation/devicetree/bindings/watchdog/fsl-imx-wdt.yaml index d96b93b11fad..991b4e33486e 100644 --- a/Documentation/devicetree/bindings/watchdog/fsl-imx-wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/fsl-imx-wdt.yaml @@ -14,8 +14,15 @@ allOf: properties: compatible: - enum: - - fsl,imx21-wdt + oneOf: + - const: fsl,imx21-wdt + - items: + - enum: + - fsl,imx8mm-wdt + - fsl,imx8mn-wdt + - fsl,imx8mp-wdt + - fsl,imx8mq-wdt + - const: fsl,imx21-wdt reg: maxItems: 1 From e446eba1533a1284226f5ec4708fb62e6b38156a Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 4 Sep 2020 17:23:56 +0200 Subject: [PATCH 174/433] dt-bindings: reset: fsl,imx7-src: Add i.MX 8M compatibles DTSes with new i.MX 8M SoCs introduce their own compatibles so add them to fix dtbs_check warnings like: arch/arm64/boot/dts/freescale/imx8mm-evk.dt.yaml: reset-controller@30390000: compatible:0: 'fsl,imx8mm-src' is not one of ['fsl,imx7d-src', 'fsl,imx8mq-src', 'fsl,imx8mp-src'] From schema: Documentation/devicetree/bindings/reset/fsl,imx7-src.yaml arch/arm64/boot/dts/freescale/imx8mm-evk.dt.yaml: reset-controller@30390000: compatible:1: 'syscon' was expected arch/arm64/boot/dts/freescale/imx8mm-evk.dt.yaml: reset-controller@30390000: compatible: ['fsl,imx8mm-src', 'fsl,imx8mq-src', 'syscon'] is too long Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring Signed-off-by: Rob Herring --- .../bindings/reset/fsl,imx7-src.yaml | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/reset/fsl,imx7-src.yaml b/Documentation/devicetree/bindings/reset/fsl,imx7-src.yaml index 569cd3bd3a70..00430e2eabc8 100644 --- a/Documentation/devicetree/bindings/reset/fsl,imx7-src.yaml +++ b/Documentation/devicetree/bindings/reset/fsl,imx7-src.yaml @@ -22,12 +22,19 @@ description: | properties: compatible: - items: - - enum: - - fsl,imx7d-src - - fsl,imx8mq-src - - fsl,imx8mp-src - - const: syscon + oneOf: + - items: + - enum: + - fsl,imx7d-src + - fsl,imx8mq-src + - fsl,imx8mp-src + - const: syscon + - items: + - enum: + - fsl,imx8mm-src + - fsl,imx8mn-src + - const: fsl,imx8mq-src + - const: syscon reg: maxItems: 1 From c0310e49d315978a5b019c99957ff442ecf9f05a Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 4 Sep 2020 17:23:57 +0200 Subject: [PATCH 175/433] dt-bindings: thermal: imx8mm-thermal: Add i.MX 8M Nano compatible DTSes with new i.MX 8M SoCs introduce their own compatibles so add them to fix dtbs_check warnings like: arch/arm64/boot/dts/freescale/imx8mn-evk.dt.yaml: tmu@30260000: compatible:0: 'fsl,imx8mn-tmu' is not one of ['fsl,imx8mm-tmu', 'fsl,imx8mp-tmu'] From schema: Documentation/devicetree/bindings/thermal/imx8mm-thermal.yaml arch/arm64/boot/dts/freescale/imx8mn-evk.dt.yaml: tmu@30260000: compatible: ['fsl,imx8mn-tmu', 'fsl,imx8mm-tmu'] is too long arch/arm64/boot/dts/freescale/imx8mn-evk.dt.yaml: tmu@30260000: compatible: Additional items are not allowed ('fsl,imx8mm-tmu' was unexpected) Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring Signed-off-by: Rob Herring --- .../devicetree/bindings/thermal/imx8mm-thermal.yaml | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/thermal/imx8mm-thermal.yaml b/Documentation/devicetree/bindings/thermal/imx8mm-thermal.yaml index 38852877b8e3..89c54e08ee61 100644 --- a/Documentation/devicetree/bindings/thermal/imx8mm-thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/imx8mm-thermal.yaml @@ -18,9 +18,13 @@ description: | properties: compatible: - enum: - - fsl,imx8mm-tmu - - fsl,imx8mp-tmu + oneOf: + - enum: + - fsl,imx8mm-tmu + - fsl,imx8mp-tmu + - items: + - const: fsl,imx8mn-tmu + - const: fsl,imx8mm-tmu reg: maxItems: 1 From df3682987d1933a4bad3229d27f26bef2557a0de Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 4 Sep 2020 17:23:58 +0200 Subject: [PATCH 176/433] dt-bindings: nvmem: imx-ocotp: Update i.MX 8M compatibles DTSes with new i.MX 8M SoCs use two compatibles so update the binding to fix dtbs_check warnings like: arch/arm64/boot/dts/freescale/imx8mn-evk.dt.yaml: efuse@30350000: compatible:1: 'syscon' was expected From schema: Documentation/devicetree/bindings/nvmem/imx-ocotp.yaml arch/arm64/boot/dts/freescale/imx8mn-evk.dt.yaml: efuse@30350000: compatible: ['fsl,imx8mn-ocotp', 'fsl,imx8mm-ocotp', 'syscon'] is too long arch/arm64/boot/dts/freescale/imx8mn-evk.dt.yaml: efuse@30350000: compatible: Additional items are not allowed ('syscon' was unexpected) Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring Signed-off-by: Rob Herring --- .../devicetree/bindings/nvmem/imx-ocotp.yaml | 38 +++++++++++-------- 1 file changed, 23 insertions(+), 15 deletions(-) diff --git a/Documentation/devicetree/bindings/nvmem/imx-ocotp.yaml b/Documentation/devicetree/bindings/nvmem/imx-ocotp.yaml index 1c9d7f05f173..5a7284737229 100644 --- a/Documentation/devicetree/bindings/nvmem/imx-ocotp.yaml +++ b/Documentation/devicetree/bindings/nvmem/imx-ocotp.yaml @@ -19,21 +19,29 @@ allOf: properties: compatible: - items: - - enum: - - fsl,imx6q-ocotp - - fsl,imx6sl-ocotp - - fsl,imx6sx-ocotp - - fsl,imx6ul-ocotp - - fsl,imx6ull-ocotp - - fsl,imx7d-ocotp - - fsl,imx6sll-ocotp - - fsl,imx7ulp-ocotp - - fsl,imx8mq-ocotp - - fsl,imx8mm-ocotp - - fsl,imx8mn-ocotp - - fsl,imx8mp-ocotp - - const: syscon + oneOf: + - items: + - enum: + - fsl,imx6q-ocotp + - fsl,imx6sl-ocotp + - fsl,imx6sx-ocotp + - fsl,imx6ul-ocotp + - fsl,imx6ull-ocotp + - fsl,imx7d-ocotp + - fsl,imx6sll-ocotp + - fsl,imx7ulp-ocotp + - fsl,imx8mq-ocotp + - fsl,imx8mm-ocotp + - const: syscon + - items: + - enum: + - fsl,imx8mn-ocotp + # i.MX8MP not really compatible with fsl,imx8mm-ocotp, however + # the code for getting SoC revision depends on fsl,imx8mm-ocotp + # compatible. + - fsl,imx8mp-ocotp + - const: fsl,imx8mm-ocotp + - const: syscon reg: maxItems: 1 From ce214b10c643080f7309b2701815e18a7ab8c6bd Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 4 Sep 2020 17:23:59 +0200 Subject: [PATCH 177/433] dt-bindings: mfd: rohm,bd71847-pmic: Correct clock properties requirements The input clock and number of clock provider cells are not required for the PMIC to operate. They are needed only for the optional bd718x7 clock driver. Add also clock-output-names as driver takes use of it. This fixes dtbs_check warnings like: arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dt.yaml: pmic@4b: 'clocks' is a required property arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dt.yaml: pmic@4b: '#clock-cells' is a required property Signed-off-by: Krzysztof Kozlowski Acked-by: Matti Vaittinen Signed-off-by: Rob Herring --- .../devicetree/bindings/mfd/rohm,bd71847-pmic.yaml | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml b/Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml index 77bcca2d414f..5d531051a153 100644 --- a/Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml +++ b/Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml @@ -38,6 +38,9 @@ properties: "#clock-cells": const: 0 + clock-output-names: + maxItems: 1 + # The BD71847 abd BD71850 support two different HW states as reset target # states. States are called as SNVS and READY. At READY state all the PMIC # power outputs go down and OTP is reload. At the SNVS state all other logic @@ -116,12 +119,14 @@ required: - compatible - reg - interrupts - - clocks - - "#clock-cells" - regulators additionalProperties: false +dependencies: + '#clock-cells': [clocks] + clocks: ['#clock-cells'] + examples: - | #include From 2b5ee687ad86ec0f7fda92f29f5d4313e381c37a Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 4 Sep 2020 17:24:00 +0200 Subject: [PATCH 178/433] dt-bindings: interrupt-controller: fsl,irqsteer: Fix compatible matching The i.MX 8M DTSes use two compatibles so update the binding to fix dtbs_check warnings like: arch/arm64/boot/dts/freescale/imx8mq-thor96.dt.yaml: interrupt-controller@32e2d000: compatible: ['fsl,imx8m-irqsteer', 'fsl,imx-irqsteer'] is too long From schema: Domentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml arch/arm64/boot/dts/freescale/imx8mq-thor96.dt.yaml: interrupt-controller@32e2d000: compatible: Additional items are not allowed ('fsl,imx-irqsteer' was unexpected) Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring Signed-off-by: Rob Herring --- .../bindings/interrupt-controller/fsl,irqsteer.yaml | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml b/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml index 360a575ef8b0..3b11a1a15398 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml @@ -11,9 +11,11 @@ maintainers: properties: compatible: - enum: - - fsl,imx8m-irqsteer - - fsl,imx-irqsteer + oneOf: + - const: fsl,imx-irqsteer + - items: + - const: fsl,imx8m-irqsteer + - const: fsl,imx-irqsteer reg: maxItems: 1 From b781592c909a3145113a2655f3b200a8e26030c9 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 4 Sep 2020 17:24:01 +0200 Subject: [PATCH 179/433] dt-bindings: mtd: gpmi-nand: Add i.MX 8M compatibles DTSes with new i.MX 8M SoCs introduce their own compatibles so add them to fix dtbs_check warnings like: arch/arm64/boot/dts/freescale/imx8mm-evk.dt.yaml: nand-controller@33002000: compatible:0: 'fsl,imx8mm-gpmi-nand' is not one of ['fsl,imx23-gpmi-nand', 'fsl,imx28-gpmi-nand', 'fsl,imx6q-gpmi-nand', 'fsl,imx6sx-gpmi-nand', 'fsl,imx7d-gpmi-nand'] From schema: Documentation/devicetree/bindings/mtd/gpmi-nand.yaml arch/arm64/boot/dts/freescale/imx8mm-evk.dt.yaml: nand-controller@33002000: compatible: ['fsl,imx8mm-gpmi-nand', 'fsl,imx7d-gpmi-nand'] is too long arch/arm64/boot/dts/freescale/imx8mm-evk.dt.yaml: nand-controller@33002000: compatible: Additional items are not allowed ('fsl,imx7d-gpmi-nand' was unexpected) Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring Signed-off-by: Rob Herring --- .../devicetree/bindings/mtd/gpmi-nand.yaml | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/mtd/gpmi-nand.yaml b/Documentation/devicetree/bindings/mtd/gpmi-nand.yaml index 3201372b7f85..28ff8c581837 100644 --- a/Documentation/devicetree/bindings/mtd/gpmi-nand.yaml +++ b/Documentation/devicetree/bindings/mtd/gpmi-nand.yaml @@ -20,12 +20,18 @@ description: | properties: compatible: - enum: - - fsl,imx23-gpmi-nand - - fsl,imx28-gpmi-nand - - fsl,imx6q-gpmi-nand - - fsl,imx6sx-gpmi-nand - - fsl,imx7d-gpmi-nand + oneOf: + - enum: + - fsl,imx23-gpmi-nand + - fsl,imx28-gpmi-nand + - fsl,imx6q-gpmi-nand + - fsl,imx6sx-gpmi-nand + - fsl,imx7d-gpmi-nand + - items: + - enum: + - fsl,imx8mm-gpmi-nand + - fsl,imx8mn-gpmi-nand + - const: fsl,imx7d-gpmi-nand reg: items: From 2c226230705164e29e95226c1d148921375bc01d Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 4 Sep 2020 17:24:04 +0200 Subject: [PATCH 180/433] dt-bindings: clock: imx8m: Integrate duplicated i.MX 8M schemas The clock controller schemas for i.MX 8M Mini, 8M Nano, 8M Plus and 8M Quad are basically the same. The only minor difference appears on 8M Quad which needs one more clock. There is no point to have four schemas for almost the same binding. Any fixes or changes would have to be duplicated four times. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Rob Herring --- .../bindings/clock/imx8m-clock.yaml | 125 ++++++++++++++++++ .../bindings/clock/imx8mm-clock.yaml | 68 ---------- .../bindings/clock/imx8mn-clock.yaml | 70 ---------- .../bindings/clock/imx8mp-clock.yaml | 70 ---------- .../bindings/clock/imx8mq-clock.yaml | 72 ---------- 5 files changed, 125 insertions(+), 280 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/imx8m-clock.yaml delete mode 100644 Documentation/devicetree/bindings/clock/imx8mm-clock.yaml delete mode 100644 Documentation/devicetree/bindings/clock/imx8mn-clock.yaml delete mode 100644 Documentation/devicetree/bindings/clock/imx8mp-clock.yaml delete mode 100644 Documentation/devicetree/bindings/clock/imx8mq-clock.yaml diff --git a/Documentation/devicetree/bindings/clock/imx8m-clock.yaml b/Documentation/devicetree/bindings/clock/imx8m-clock.yaml new file mode 100644 index 000000000000..31e7cc9693c3 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/imx8m-clock.yaml @@ -0,0 +1,125 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/imx8m-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP i.MX8M Family Clock Control Module Binding + +maintainers: + - Anson Huang + +description: | + NXP i.MX8M Mini/Nano/Plus/Quad clock control module is an integrated clock + controller, which generates and supplies to all modules. + +properties: + compatible: + enum: + - fsl,imx8mm-ccm + - fsl,imx8mn-ccm + - fsl,imx8mp-ccm + - fsl,imx8mq-ccm + + reg: + maxItems: 1 + + clocks: + minItems: 6 + maxItems: 7 + + clock-names: + minItems: 6 + maxItems: 7 + + '#clock-cells': + const: 1 + description: + The clock consumer should specify the desired clock by having the clock + ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8m-clock.h + for the full list of i.MX8M clock IDs. + +required: + - compatible + - reg + - clocks + - clock-names + - '#clock-cells' + +allOf: + - if: + properties: + compatible: + contains: + const: fsl,imx8mq-ccm + then: + properties: + clocks: + minItems: 7 + maxItems: 7 + items: + - description: 32k osc + - description: 25m osc + - description: 27m osc + - description: ext1 clock input + - description: ext2 clock input + - description: ext3 clock input + - description: ext4 clock input + clock-names: + minItems: 7 + maxItems: 7 + items: + - const: ckil + - const: osc_25m + - const: osc_27m + - const: clk_ext1 + - const: clk_ext2 + - const: clk_ext3 + - const: clk_ext4 + else: + properties: + clocks: + items: + - description: 32k osc + - description: 24m osc + - description: ext1 clock input + - description: ext2 clock input + - description: ext3 clock input + - description: ext4 clock input + + clock-names: + items: + - const: osc_32k + - const: osc_24m + - const: clk_ext1 + - const: clk_ext2 + - const: clk_ext3 + - const: clk_ext4 + +unevaluatedProperties: false + +examples: + # Clock Control Module node: + - | + clock-controller@30380000 { + compatible = "fsl,imx8mm-ccm"; + reg = <0x30380000 0x10000>; + #clock-cells = <1>; + clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, <&clk_ext2>, + <&clk_ext3>, <&clk_ext4>; + clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2", + "clk_ext3", "clk_ext4"; + }; + + - | + clock-controller@30390000 { + compatible = "fsl,imx8mq-ccm"; + reg = <0x30380000 0x10000>; + #clock-cells = <1>; + clocks = <&ckil>, <&osc_25m>, <&osc_27m>, <&clk_ext1>, + <&clk_ext2>, <&clk_ext3>, <&clk_ext4>; + clock-names = "ckil", "osc_25m", "osc_27m", "clk_ext1", + "clk_ext2", "clk_ext3", "clk_ext4"; + }; + +... diff --git a/Documentation/devicetree/bindings/clock/imx8mm-clock.yaml b/Documentation/devicetree/bindings/clock/imx8mm-clock.yaml deleted file mode 100644 index ec830db1367b..000000000000 --- a/Documentation/devicetree/bindings/clock/imx8mm-clock.yaml +++ /dev/null @@ -1,68 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/clock/imx8mm-clock.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: NXP i.MX8M Mini Clock Control Module Binding - -maintainers: - - Anson Huang - -description: | - NXP i.MX8M Mini clock control module is an integrated clock controller, which - generates and supplies to all modules. - -properties: - compatible: - const: fsl,imx8mm-ccm - - reg: - maxItems: 1 - - clocks: - items: - - description: 32k osc - - description: 24m osc - - description: ext1 clock input - - description: ext2 clock input - - description: ext3 clock input - - description: ext4 clock input - - clock-names: - items: - - const: osc_32k - - const: osc_24m - - const: clk_ext1 - - const: clk_ext2 - - const: clk_ext3 - - const: clk_ext4 - - '#clock-cells': - const: 1 - description: - The clock consumer should specify the desired clock by having the clock - ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8mm-clock.h - for the full list of i.MX8M Mini clock IDs. - -required: - - compatible - - reg - - clocks - - clock-names - - '#clock-cells' - -examples: - # Clock Control Module node: - - | - clk: clock-controller@30380000 { - compatible = "fsl,imx8mm-ccm"; - reg = <0x30380000 0x10000>; - #clock-cells = <1>; - clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, <&clk_ext2>, - <&clk_ext3>, <&clk_ext4>; - clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2", - "clk_ext3", "clk_ext4"; - }; - -... diff --git a/Documentation/devicetree/bindings/clock/imx8mn-clock.yaml b/Documentation/devicetree/bindings/clock/imx8mn-clock.yaml deleted file mode 100644 index bdaa29616ab1..000000000000 --- a/Documentation/devicetree/bindings/clock/imx8mn-clock.yaml +++ /dev/null @@ -1,70 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/clock/imx8mn-clock.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: NXP i.MX8M Nano Clock Control Module Binding - -maintainers: - - Anson Huang - -description: | - NXP i.MX8M Nano clock control module is an integrated clock controller, which - generates and supplies to all modules. - -properties: - compatible: - const: fsl,imx8mn-ccm - - reg: - maxItems: 1 - - clocks: - items: - - description: 32k osc - - description: 24m osc - - description: ext1 clock input - - description: ext2 clock input - - description: ext3 clock input - - description: ext4 clock input - - clock-names: - items: - - const: osc_32k - - const: osc_24m - - const: clk_ext1 - - const: clk_ext2 - - const: clk_ext3 - - const: clk_ext4 - - '#clock-cells': - const: 1 - description: - The clock consumer should specify the desired clock by having the clock - ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8mn-clock.h - for the full list of i.MX8M Nano clock IDs. - -required: - - compatible - - reg - - clocks - - clock-names - - '#clock-cells' - -additionalProperties: false - -examples: - # Clock Control Module node: - - | - clk: clock-controller@30380000 { - compatible = "fsl,imx8mn-ccm"; - reg = <0x30380000 0x10000>; - #clock-cells = <1>; - clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, - <&clk_ext2>, <&clk_ext3>, <&clk_ext4>; - clock-names = "osc_32k", "osc_24m", "clk_ext1", - "clk_ext2", "clk_ext3", "clk_ext4"; - }; - -... diff --git a/Documentation/devicetree/bindings/clock/imx8mp-clock.yaml b/Documentation/devicetree/bindings/clock/imx8mp-clock.yaml deleted file mode 100644 index 4351a1dbb4f7..000000000000 --- a/Documentation/devicetree/bindings/clock/imx8mp-clock.yaml +++ /dev/null @@ -1,70 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/clock/imx8mp-clock.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: NXP i.MX8M Plus Clock Control Module Binding - -maintainers: - - Anson Huang - -description: - NXP i.MX8M Plus clock control module is an integrated clock controller, which - generates and supplies to all modules. - -properties: - compatible: - const: fsl,imx8mp-ccm - - reg: - maxItems: 1 - - clocks: - items: - - description: 32k osc - - description: 24m osc - - description: ext1 clock input - - description: ext2 clock input - - description: ext3 clock input - - description: ext4 clock input - - clock-names: - items: - - const: osc_32k - - const: osc_24m - - const: clk_ext1 - - const: clk_ext2 - - const: clk_ext3 - - const: clk_ext4 - - '#clock-cells': - const: 1 - description: - The clock consumer should specify the desired clock by having the clock - ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8mp-clock.h - for the full list of i.MX8M Plus clock IDs. - -required: - - compatible - - reg - - clocks - - clock-names - - '#clock-cells' - -additionalProperties: false - -examples: - # Clock Control Module node: - - | - clk: clock-controller@30380000 { - compatible = "fsl,imx8mp-ccm"; - reg = <0x30380000 0x10000>; - #clock-cells = <1>; - clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, - <&clk_ext2>, <&clk_ext3>, <&clk_ext4>; - clock-names = "osc_32k", "osc_24m", "clk_ext1", - "clk_ext2", "clk_ext3", "clk_ext4"; - }; - -... diff --git a/Documentation/devicetree/bindings/clock/imx8mq-clock.yaml b/Documentation/devicetree/bindings/clock/imx8mq-clock.yaml deleted file mode 100644 index 05d7d1471e0c..000000000000 --- a/Documentation/devicetree/bindings/clock/imx8mq-clock.yaml +++ /dev/null @@ -1,72 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/clock/imx8mq-clock.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: NXP i.MX8M Quad Clock Control Module Binding - -maintainers: - - Anson Huang - -description: | - NXP i.MX8M Quad clock control module is an integrated clock controller, which - generates and supplies to all modules. - -properties: - compatible: - const: fsl,imx8mq-ccm - - reg: - maxItems: 1 - - clocks: - items: - - description: 32k osc - - description: 25m osc - - description: 27m osc - - description: ext1 clock input - - description: ext2 clock input - - description: ext3 clock input - - description: ext4 clock input - - clock-names: - items: - - const: ckil - - const: osc_25m - - const: osc_27m - - const: clk_ext1 - - const: clk_ext2 - - const: clk_ext3 - - const: clk_ext4 - - '#clock-cells': - const: 1 - description: - The clock consumer should specify the desired clock by having the clock - ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8mq-clock.h - for the full list of i.MX8M Quad clock IDs. - -required: - - compatible - - reg - - clocks - - clock-names - - '#clock-cells' - -examples: - # Clock Control Module node: - - | - clk: clock-controller@30380000 { - compatible = "fsl,imx8mq-ccm"; - reg = <0x30380000 0x10000>; - #clock-cells = <1>; - clocks = <&ckil>, <&osc_25m>, <&osc_27m>, - <&clk_ext1>, <&clk_ext2>, - <&clk_ext3>, <&clk_ext4>; - clock-names = "ckil", "osc_25m", "osc_27m", - "clk_ext1", "clk_ext2", - "clk_ext3", "clk_ext4"; - }; - -... From 7b9ec811752c17c4c6e70d296ef8aa205a7acacd Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 21 Aug 2020 13:22:08 +0200 Subject: [PATCH 181/433] dt-bindings: pinctrl: sh-pfc: Convert to json-schema Convert the Renesas Pin Function Controller (PFC) Device Tree binding documentation to json-schema. Document missing properties. Drop deprecated and obsolete #gpio-range-cells property. Update the example to match reality. Drop consumer examples, as they do not belong here. Signed-off-by: Geert Uytterhoeven Reviewed-by: Rob Herring Reviewed-by: Linus Walleij Link: https://lore.kernel.org/r/20200821112208.5295-1-geert+renesas@glider.be --- .../bindings/pinctrl/renesas,pfc-pinctrl.txt | 188 ----------------- .../bindings/pinctrl/renesas,pfc.yaml | 193 ++++++++++++++++++ 2 files changed, 193 insertions(+), 188 deletions(-) delete mode 100644 Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt create mode 100644 Documentation/devicetree/bindings/pinctrl/renesas,pfc.yaml diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt deleted file mode 100644 index d75476e24514..000000000000 --- a/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt +++ /dev/null @@ -1,188 +0,0 @@ -* Renesas Pin Function Controller (GPIO and Pin Mux/Config) - -The Pin Function Controller (PFC) is a Pin Mux/Config controller. On SH73A0, -R8A73A4 and R8A7740 it also acts as a GPIO controller. - - -Pin Control ------------ - -Required Properties: - - - compatible: should be one of the following. - - "renesas,pfc-emev2": for EMEV2 (EMMA Mobile EV2) compatible pin-controller. - - "renesas,pfc-r8a73a4": for R8A73A4 (R-Mobile APE6) compatible pin-controller. - - "renesas,pfc-r8a7740": for R8A7740 (R-Mobile A1) compatible pin-controller. - - "renesas,pfc-r8a7742": for R8A7742 (RZ/G1H) compatible pin-controller. - - "renesas,pfc-r8a7743": for R8A7743 (RZ/G1M) compatible pin-controller. - - "renesas,pfc-r8a7744": for R8A7744 (RZ/G1N) compatible pin-controller. - - "renesas,pfc-r8a7745": for R8A7745 (RZ/G1E) compatible pin-controller. - - "renesas,pfc-r8a77470": for R8A77470 (RZ/G1C) compatible pin-controller. - - "renesas,pfc-r8a774a1": for R8A774A1 (RZ/G2M) compatible pin-controller. - - "renesas,pfc-r8a774b1": for R8A774B1 (RZ/G2N) compatible pin-controller. - - "renesas,pfc-r8a774c0": for R8A774C0 (RZ/G2E) compatible pin-controller. - - "renesas,pfc-r8a774e1": for R8A774E1 (RZ/G2H) compatible pin-controller. - - "renesas,pfc-r8a7778": for R8A7778 (R-Car M1) compatible pin-controller. - - "renesas,pfc-r8a7779": for R8A7779 (R-Car H1) compatible pin-controller. - - "renesas,pfc-r8a7790": for R8A7790 (R-Car H2) compatible pin-controller. - - "renesas,pfc-r8a7791": for R8A7791 (R-Car M2-W) compatible pin-controller. - - "renesas,pfc-r8a7792": for R8A7792 (R-Car V2H) compatible pin-controller. - - "renesas,pfc-r8a7793": for R8A7793 (R-Car M2-N) compatible pin-controller. - - "renesas,pfc-r8a7794": for R8A7794 (R-Car E2) compatible pin-controller. - - "renesas,pfc-r8a7795": for R8A7795 (R-Car H3) compatible pin-controller. - - "renesas,pfc-r8a7796": for R8A77960 (R-Car M3-W) compatible pin-controller. - - "renesas,pfc-r8a77961": for R8A77961 (R-Car M3-W+) compatible pin-controller. - - "renesas,pfc-r8a77965": for R8A77965 (R-Car M3-N) compatible pin-controller. - - "renesas,pfc-r8a77970": for R8A77970 (R-Car V3M) compatible pin-controller. - - "renesas,pfc-r8a77980": for R8A77980 (R-Car V3H) compatible pin-controller. - - "renesas,pfc-r8a77990": for R8A77990 (R-Car E3) compatible pin-controller. - - "renesas,pfc-r8a77995": for R8A77995 (R-Car D3) compatible pin-controller. - - "renesas,pfc-sh73a0": for SH73A0 (SH-Mobile AG5) compatible pin-controller. - - - reg: Base address and length of each memory resource used by the pin - controller hardware module. - -Optional properties: - - - #gpio-range-cells: Mandatory when the PFC doesn't handle GPIO, forbidden - otherwise. Should be 3. - - - interrupts-extended: Specify the interrupts associated with external - IRQ pins. This property is mandatory when the PFC handles GPIOs and - forbidden otherwise. When specified, it must contain one interrupt per - external IRQ, sorted by external IRQ number. - -The PFC node also acts as a container for pin configuration nodes. Please refer -to pinctrl-bindings.txt in this directory for the definition of the term "pin -configuration node" and for the common pinctrl bindings used by client devices. - -Each pin configuration node represents a desired configuration for a pin, a -pin group, or a list of pins or pin groups. The configuration can include the -function to select on those pin(s) and pin configuration parameters (such as -pull-up and pull-down). - -Pin configuration nodes contain pin configuration properties, either directly -or grouped in child subnodes. Both pin muxing and configuration parameters can -be grouped in that way and referenced as a single pin configuration node by -client devices. - -A configuration node or subnode must reference at least one pin (through the -pins or pin groups properties) and contain at least a function or one -configuration parameter. When the function is present only pin groups can be -used to reference pins. - -All pin configuration nodes and subnodes names are ignored. All of those nodes -are parsed through phandles and processed purely based on their content. - -Pin Configuration Node Properties: - -- pins : An array of strings, each string containing the name of a pin. -- groups : An array of strings, each string containing the name of a pin - group. - -- function: A string containing the name of the function to mux to the pin - group(s) specified by the groups property. - - Valid values for pin, group and function names can be found in the group and - function arrays of the PFC data file corresponding to the SoC - (drivers/pinctrl/sh-pfc/pfc-*.c) - -The pin configuration parameters use the generic pinconf bindings defined in -pinctrl-bindings.txt in this directory. The supported parameters are -bias-disable, bias-pull-up, bias-pull-down, drive-strength and power-source. For -pins that have a configurable I/O voltage, the power-source value should be the -nominal I/O voltage in millivolts. - - -GPIO ----- - -On SH73A0, R8A73A4 and R8A7740 the PFC node is also a GPIO controller node. - -Required Properties: - - - gpio-controller: Marks the device node as a gpio controller. - - - #gpio-cells: Should be 2. The first cell is the GPIO number and the second - cell specifies GPIO flags, as defined in . Only the - GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported. - -The syntax of the gpio specifier used by client nodes should be the following -with values derived from the SoC user manual. - - <[phandle of the gpio controller node] - [pin number within the gpio controller] - [flags]> - -On other mach-shmobile platforms GPIO is handled by the gpio-rcar driver. -Please refer to Documentation/devicetree/bindings/gpio/renesas,rcar-gpio.yaml -for documentation of the GPIO device tree bindings on those platforms. - - -Examples --------- - -Example 1: SH73A0 (SH-Mobile AG5) pin controller node - - pfc: pin-controller@e6050000 { - compatible = "renesas,pfc-sh73a0"; - reg = <0xe6050000 0x8000>, - <0xe605801c 0x1c>; - gpio-controller; - #gpio-cells = <2>; - interrupts-extended = - <&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>, - <&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>, - <&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>, - <&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>, - <&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>, - <&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>, - <&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>, - <&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>; - }; - -Example 2: A GPIO LED node that references a GPIO - - #include - - leds { - compatible = "gpio-leds"; - led1 { - gpios = <&pfc 20 GPIO_ACTIVE_LOW>; - }; - }; - -Example 3: KZM-A9-GT (SH-Mobile AG5) default pin state hog and pin control maps - for the MMCIF and SCIFA4 devices - - &pfc { - pinctrl-0 = <&scifa4_pins>; - pinctrl-names = "default"; - - mmcif_pins: mmcif { - mux { - groups = "mmc0_data8_0", "mmc0_ctrl_0"; - function = "mmc0"; - }; - cfg { - groups = "mmc0_data8_0"; - pins = "PORT279"; - bias-pull-up; - }; - }; - - scifa4_pins: scifa4 { - groups = "scifa4_data", "scifa4_ctrl"; - function = "scifa4"; - }; - }; - -Example 4: KZM-A9-GT (SH-Mobile AG5) default pin state for the MMCIF device - - &mmcif { - pinctrl-0 = <&mmcif_pins>; - pinctrl-names = "default"; - - bus-width = <8>; - vmmc-supply = <®_1p8v>; - }; diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,pfc.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,pfc.yaml new file mode 100644 index 000000000000..4efe117550bd --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/renesas,pfc.yaml @@ -0,0 +1,193 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/renesas,pfc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas Pin Function Controller (GPIO and Pin Mux/Config) + +maintainers: + - Geert Uytterhoeven + +description: + The Pin Function Controller (PFC) is a Pin Mux/Config controller. + On SH/R-Mobile SoCs it also acts as a GPIO controller. + +properties: + compatible: + enum: + - renesas,pfc-emev2 # EMMA Mobile EV2 + - renesas,pfc-r8a73a4 # R-Mobile APE6 + - renesas,pfc-r8a7740 # R-Mobile A1 + - renesas,pfc-r8a7742 # RZ/G1H + - renesas,pfc-r8a7743 # RZ/G1M + - renesas,pfc-r8a7744 # RZ/G1N + - renesas,pfc-r8a7745 # RZ/G1E + - renesas,pfc-r8a77470 # RZ/G1C + - renesas,pfc-r8a774a1 # RZ/G2M + - renesas,pfc-r8a774b1 # RZ/G2N + - renesas,pfc-r8a774c0 # RZ/G2E + - renesas,pfc-r8a774e1 # RZ/G2H + - renesas,pfc-r8a7778 # R-Car M1 + - renesas,pfc-r8a7779 # R-Car H1 + - renesas,pfc-r8a7790 # R-Car H2 + - renesas,pfc-r8a7791 # R-Car M2-W + - renesas,pfc-r8a7792 # R-Car V2H + - renesas,pfc-r8a7793 # R-Car M2-N + - renesas,pfc-r8a7794 # R-Car E2 + - renesas,pfc-r8a7795 # R-Car H3 + - renesas,pfc-r8a7796 # R-Car M3-W + - renesas,pfc-r8a77961 # R-Car M3-W+ + - renesas,pfc-r8a77965 # R-Car M3-N + - renesas,pfc-r8a77970 # R-Car V3M + - renesas,pfc-r8a77980 # R-Car V3H + - renesas,pfc-r8a77990 # R-Car E3 + - renesas,pfc-r8a77995 # R-Car D3 + - renesas,pfc-sh73a0 # SH-Mobile AG5 + + reg: + minItems: 1 + maxItems: 2 + + gpio-controller: true + + '#gpio-cells': + const: 2 + + gpio-ranges: + minItems: 1 + maxItems: 16 + + interrupts-extended: + minItems: 32 + maxItems: 64 + description: + Specify the interrupts associated with external IRQ pins on SoCs where + the PFC acts as a GPIO controller. It must contain one interrupt per + external IRQ, sorted by external IRQ number. + + power-domains: + maxItems: 1 + +required: + - compatible + - reg + +if: + properties: + compatible: + items: + enum: + - renesas,pfc-r8a73a4 + - renesas,pfc-r8a7740 + - renesas,pfc-sh73a0 +then: + required: + - interrupts-extended + - gpio-controller + - '#gpio-cells' + - gpio-ranges + - power-domains + +additionalProperties: + anyOf: + - type: object + allOf: + - $ref: pincfg-node.yaml# + - $ref: pinmux-node.yaml# + + description: + Pin controller client devices use pin configuration subnodes (children + and grandchildren) for desired pin configuration. + Client device subnodes use below standard properties. + + properties: + phandle: true + function: true + groups: true + pins: true + bias-disable: true + bias-pull-down: true + bias-pull-up: true + drive-strength: + enum: [ 3, 6, 9, 12, 15, 18, 21, 24 ] # Superset of supported values + power-source: + enum: [ 1800, 3300 ] + gpio-hog: true + gpios: true + input: true + output-high: true + output-low: true + + additionalProperties: false + + - type: object + properties: + phandle: true + + additionalProperties: + $ref: "#/additionalProperties/anyOf/0" + +examples: + - | + pfc: pinctrl@e6050000 { + compatible = "renesas,pfc-r8a7740"; + reg = <0xe6050000 0x8000>, + <0xe605800c 0x20>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pfc 0 0 212>; + interrupts-extended = + <&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>, + <&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>, + <&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>, + <&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>, + <&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>, + <&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>, + <&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>, + <&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>; + power-domains = <&pd_c5>; + + lcd0_mux { + /* DBGMD/LCDC0/FSIA MUX */ + gpio-hog; + gpios = <176 0>; + output-high; + }; + }; + + - | + pinctrl@e6060000 { + compatible = "renesas,pfc-r8a7795"; + reg = <0xe6060000 0x50c>; + + avb_pins: avb { + mux { + groups = "avb_link", "avb_mdio", "avb_mii"; + function = "avb"; + }; + + pins_mdio { + groups = "avb_mdio"; + drive-strength = <24>; + }; + + pins_mii_tx { + pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", + "PIN_AVB_TD0", "PIN_AVB_TD1", "PIN_AVB_TD2", + "PIN_AVB_TD3"; + drive-strength = <12>; + }; + }; + + keys_pins: keys { + pins = "GP_5_17", "GP_5_20", "GP_5_22", "GP_2_1"; + bias-pull-up; + }; + + sdhi0_pins: sd0 { + groups = "sdhi0_data4", "sdhi0_ctrl"; + function = "sdhi0"; + power-source = <3300>; + }; + }; From aa5b0f7e0f7e8a05c5bd9bfab33d98699735762f Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Mon, 24 Aug 2020 14:49:40 +0900 Subject: [PATCH 182/433] pinctrl: sh-pfc: Tidy up Emma Mobile EV2 It is "Emma Mobile EV2" not "AV2". This patch tidies it up. Reported-by: Geert Uytterhoeven Signed-off-by: Kuninori Morimoto Link: https://lore.kernel.org/r/87lfi4y4re.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven --- drivers/pinctrl/sh-pfc/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pinctrl/sh-pfc/Kconfig b/drivers/pinctrl/sh-pfc/Kconfig index 7fdc7ed8bd2e..8b2b1e1a9047 100644 --- a/drivers/pinctrl/sh-pfc/Kconfig +++ b/drivers/pinctrl/sh-pfc/Kconfig @@ -66,7 +66,7 @@ config PINCTRL_SH_FUNC_GPIO This enables legacy function GPIOs for SH platforms config PINCTRL_PFC_EMEV2 - bool "Emma Mobile AV2 pin control support" if COMPILE_TEST + bool "Emma Mobile EV2 pin control support" if COMPILE_TEST config PINCTRL_PFC_R8A73A4 bool "R-Mobile APE6 pin control support" if COMPILE_TEST From af028ecd546a71b4d3937b63e1b39707ef9c3b17 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Mon, 24 Aug 2020 14:49:48 +0900 Subject: [PATCH 183/433] pinctrl: sh-pfc: Collect Renesas related CONFIGs in one place Renesas related pinctrl CONFIGs are located in many places, which is confusing. This patch collects them into the same place, grouped in a new "Renesas pinctrl drivers" menu. This patch also moves pinctrl-rz{a1,a2,n1}.c into the sh-pfc folder. Signed-off-by: Kuninori Morimoto Link: https://lore.kernel.org/r/87k0xoy4r7.wl-kuninori.morimoto.gx@renesas.com [geert: Update path in MAINTAINERS] Signed-off-by: Geert Uytterhoeven --- MAINTAINERS | 1 - drivers/pinctrl/Kconfig | 32 ------------------ drivers/pinctrl/Makefile | 3 -- drivers/pinctrl/sh-pfc/Kconfig | 36 +++++++++++++++++++++ drivers/pinctrl/sh-pfc/Makefile | 4 +++ drivers/pinctrl/{ => sh-pfc}/pinctrl-rza1.c | 8 ++--- drivers/pinctrl/{ => sh-pfc}/pinctrl-rza2.c | 4 +-- drivers/pinctrl/{ => sh-pfc}/pinctrl-rzn1.c | 6 ++-- 8 files changed, 49 insertions(+), 45 deletions(-) rename drivers/pinctrl/{ => sh-pfc}/pinctrl-rza1.c (99%) rename drivers/pinctrl/{ => sh-pfc}/pinctrl-rza2.c (99%) rename drivers/pinctrl/{ => sh-pfc}/pinctrl-rzn1.c (99%) diff --git a/MAINTAINERS b/MAINTAINERS index deaafb617361..73242e16e327 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -13690,7 +13690,6 @@ L: linux-renesas-soc@vger.kernel.org S: Supported T: git git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git sh-pfc F: Documentation/devicetree/bindings/pinctrl/renesas,* -F: drivers/pinctrl/pinctrl-rz* F: drivers/pinctrl/sh-pfc/ PIN CONTROLLER - SAMSUNG diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index 8828613c4e0e..f63c5a04a3f7 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -213,38 +213,6 @@ config PINCTRL_ROCKCHIP select GENERIC_IRQ_CHIP select MFD_SYSCON -config PINCTRL_RZA1 - bool "Renesas RZ/A1 gpio and pinctrl driver" - depends on OF - depends on ARCH_R7S72100 || COMPILE_TEST - select GPIOLIB - select GENERIC_PINCTRL_GROUPS - select GENERIC_PINMUX_FUNCTIONS - select GENERIC_PINCONF - help - This selects pinctrl driver for Renesas RZ/A1 platforms. - -config PINCTRL_RZA2 - bool "Renesas RZ/A2 gpio and pinctrl driver" - depends on OF - depends on ARCH_R7S9210 || COMPILE_TEST - select GPIOLIB - select GENERIC_PINCTRL_GROUPS - select GENERIC_PINMUX_FUNCTIONS - select GENERIC_PINCONF - help - This selects GPIO and pinctrl driver for Renesas RZ/A2 platforms. - -config PINCTRL_RZN1 - bool "Renesas RZ/N1 pinctrl driver" - depends on OF - depends on ARCH_RZN1 || COMPILE_TEST - select GENERIC_PINCTRL_GROUPS - select GENERIC_PINMUX_FUNCTIONS - select GENERIC_PINCONF - help - This selects pinctrl driver for Renesas RZ/N1 devices. - config PINCTRL_SINGLE tristate "One-register-per-pin type device tree based pinctrl driver" depends on OF diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile index 1731b2154df9..1da9f28aecbd 100644 --- a/drivers/pinctrl/Makefile +++ b/drivers/pinctrl/Makefile @@ -30,9 +30,6 @@ obj-$(CONFIG_PINCTRL_PALMAS) += pinctrl-palmas.o obj-$(CONFIG_PINCTRL_PIC32) += pinctrl-pic32.o obj-$(CONFIG_PINCTRL_PISTACHIO) += pinctrl-pistachio.o obj-$(CONFIG_PINCTRL_ROCKCHIP) += pinctrl-rockchip.o -obj-$(CONFIG_PINCTRL_RZA1) += pinctrl-rza1.o -obj-$(CONFIG_PINCTRL_RZA2) += pinctrl-rza2.o -obj-$(CONFIG_PINCTRL_RZN1) += pinctrl-rzn1.o obj-$(CONFIG_PINCTRL_SINGLE) += pinctrl-single.o obj-$(CONFIG_PINCTRL_SIRF) += sirf/ obj-$(CONFIG_PINCTRL_SX150X) += pinctrl-sx150x.o diff --git a/drivers/pinctrl/sh-pfc/Kconfig b/drivers/pinctrl/sh-pfc/Kconfig index 8b2b1e1a9047..ff10bb2ed497 100644 --- a/drivers/pinctrl/sh-pfc/Kconfig +++ b/drivers/pinctrl/sh-pfc/Kconfig @@ -3,6 +3,8 @@ # Renesas SH and SH Mobile PINCTRL drivers # +menu "Renesas pinctrl drivers" + config PINCTRL_SH_PFC bool "Renesas SoC pin control support" if COMPILE_TEST && !(ARCH_RENESAS || SUPERH) default y if ARCH_RENESAS || SUPERH @@ -53,6 +55,38 @@ config PINCTRL_SH_PFC help This enables pin control drivers for Renesas SuperH and ARM platforms +config PINCTRL_RZA1 + bool "RZ/A1 gpio and pinctrl driver" + depends on OF + depends on ARCH_R7S72100 || COMPILE_TEST + select GPIOLIB + select GENERIC_PINCTRL_GROUPS + select GENERIC_PINMUX_FUNCTIONS + select GENERIC_PINCONF + help + This selects pinctrl driver for Renesas RZ/A1 platforms. + +config PINCTRL_RZA2 + bool "RZ/A2 gpio and pinctrl driver" + depends on OF + depends on ARCH_R7S9210 || COMPILE_TEST + select GPIOLIB + select GENERIC_PINCTRL_GROUPS + select GENERIC_PINMUX_FUNCTIONS + select GENERIC_PINCONF + help + This selects GPIO and pinctrl driver for Renesas RZ/A2 platforms. + +config PINCTRL_RZN1 + bool "RZ/N1 pinctrl driver" + depends on OF + depends on ARCH_RZN1 || COMPILE_TEST + select GENERIC_PINCTRL_GROUPS + select GENERIC_PINMUX_FUNCTIONS + select GENERIC_PINCONF + help + This selects pinctrl driver for Renesas RZ/N1 devices. + config PINCTRL_SH_PFC_GPIO select GPIOLIB bool @@ -203,3 +237,5 @@ config PINCTRL_PFC_SH7786 config PINCTRL_PFC_SHX3 bool "SH-X3 pin control support" if COMPILE_TEST select PINCTRL_SH_FUNC_GPIO + +endmenu diff --git a/drivers/pinctrl/sh-pfc/Makefile b/drivers/pinctrl/sh-pfc/Makefile index 7bb99187cd8e..0b5640cf457b 100644 --- a/drivers/pinctrl/sh-pfc/Makefile +++ b/drivers/pinctrl/sh-pfc/Makefile @@ -43,6 +43,10 @@ obj-$(CONFIG_PINCTRL_PFC_SH7785) += pfc-sh7785.o obj-$(CONFIG_PINCTRL_PFC_SH7786) += pfc-sh7786.o obj-$(CONFIG_PINCTRL_PFC_SHX3) += pfc-shx3.o +obj-$(CONFIG_PINCTRL_RZA1) += pinctrl-rza1.o +obj-$(CONFIG_PINCTRL_RZA2) += pinctrl-rza2.o +obj-$(CONFIG_PINCTRL_RZN1) += pinctrl-rzn1.o + ifeq ($(CONFIG_COMPILE_TEST),y) CFLAGS_pfc-sh7203.o += -I$(srctree)/arch/sh/include/cpu-sh2a CFLAGS_pfc-sh7264.o += -I$(srctree)/arch/sh/include/cpu-sh2a diff --git a/drivers/pinctrl/pinctrl-rza1.c b/drivers/pinctrl/sh-pfc/pinctrl-rza1.c similarity index 99% rename from drivers/pinctrl/pinctrl-rza1.c rename to drivers/pinctrl/sh-pfc/pinctrl-rza1.c index 511f232ab7bc..a0cb586a46b7 100644 --- a/drivers/pinctrl/pinctrl-rza1.c +++ b/drivers/pinctrl/sh-pfc/pinctrl-rza1.c @@ -26,10 +26,10 @@ #include #include -#include "core.h" -#include "devicetree.h" -#include "pinconf.h" -#include "pinmux.h" +#include "../core.h" +#include "../devicetree.h" +#include "../pinconf.h" +#include "../pinmux.h" #define DRIVER_NAME "pinctrl-rza1" diff --git a/drivers/pinctrl/pinctrl-rza2.c b/drivers/pinctrl/sh-pfc/pinctrl-rza2.c similarity index 99% rename from drivers/pinctrl/pinctrl-rza2.c rename to drivers/pinctrl/sh-pfc/pinctrl-rza2.c index c5bf98c86b2b..32829eb9656c 100644 --- a/drivers/pinctrl/pinctrl-rza2.c +++ b/drivers/pinctrl/sh-pfc/pinctrl-rza2.c @@ -17,8 +17,8 @@ #include #include -#include "core.h" -#include "pinmux.h" +#include "../core.h" +#include "../pinmux.h" #define DRIVER_NAME "pinctrl-rza2" diff --git a/drivers/pinctrl/pinctrl-rzn1.c b/drivers/pinctrl/sh-pfc/pinctrl-rzn1.c similarity index 99% rename from drivers/pinctrl/pinctrl-rzn1.c rename to drivers/pinctrl/sh-pfc/pinctrl-rzn1.c index 39538d40dbf3..ef5fb25b6016 100644 --- a/drivers/pinctrl/pinctrl-rzn1.c +++ b/drivers/pinctrl/sh-pfc/pinctrl-rzn1.c @@ -17,9 +17,9 @@ #include #include #include -#include "core.h" -#include "pinconf.h" -#include "pinctrl-utils.h" +#include "../core.h" +#include "../pinconf.h" +#include "../pinctrl-utils.h" /* Field positions and masks in the pinmux registers */ #define RZN1_L1_PIN_DRIVE_STRENGTH 10 From 16261dcd7cd17409b3f1235b0b89a805338eac28 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Mon, 24 Aug 2020 14:49:52 +0900 Subject: [PATCH 184/433] pinctrl: sh-pfc: Align driver description title Now, Renesas Pin Control drivers are under menu, but current descriptions are not aligned. This patch aligns them. - RZ/A2 gpio and pinctrl driver - RZ/N1 pinctrl driver - Emma Mobile EV2 pin control support - R-Mobile APE6 pin control support - R-Mobile A1 pin control support - RZ/G1H pin control support - RZ/G1M pin control support + pin control support for RZ/A2 + pin control support for RZ/N1 + pin control support for Emma Mobile EV2 + pin control support for R-Mobile APE6 + pin control support for R-Mobile A1 + pin control support for RZ/G1H + pin control support for RZ/G1M Signed-off-by: Kuninori Morimoto Link: https://lore.kernel.org/r/87imd8y4r2.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven --- drivers/pinctrl/sh-pfc/Kconfig | 88 +++++++++++++++++----------------- 1 file changed, 44 insertions(+), 44 deletions(-) diff --git a/drivers/pinctrl/sh-pfc/Kconfig b/drivers/pinctrl/sh-pfc/Kconfig index ff10bb2ed497..86e4d062ef99 100644 --- a/drivers/pinctrl/sh-pfc/Kconfig +++ b/drivers/pinctrl/sh-pfc/Kconfig @@ -56,7 +56,7 @@ config PINCTRL_SH_PFC This enables pin control drivers for Renesas SuperH and ARM platforms config PINCTRL_RZA1 - bool "RZ/A1 gpio and pinctrl driver" + bool "pin control support for RZ/A1" depends on OF depends on ARCH_R7S72100 || COMPILE_TEST select GPIOLIB @@ -67,7 +67,7 @@ config PINCTRL_RZA1 This selects pinctrl driver for Renesas RZ/A1 platforms. config PINCTRL_RZA2 - bool "RZ/A2 gpio and pinctrl driver" + bool "pin control support for RZ/A2" depends on OF depends on ARCH_R7S9210 || COMPILE_TEST select GPIOLIB @@ -78,7 +78,7 @@ config PINCTRL_RZA2 This selects GPIO and pinctrl driver for Renesas RZ/A2 platforms. config PINCTRL_RZN1 - bool "RZ/N1 pinctrl driver" + bool "pin control support for RZ/N1" depends on OF depends on ARCH_RZN1 || COMPILE_TEST select GENERIC_PINCTRL_GROUPS @@ -100,142 +100,142 @@ config PINCTRL_SH_FUNC_GPIO This enables legacy function GPIOs for SH platforms config PINCTRL_PFC_EMEV2 - bool "Emma Mobile EV2 pin control support" if COMPILE_TEST + bool "pin control support for Emma Mobile EV2" if COMPILE_TEST config PINCTRL_PFC_R8A73A4 - bool "R-Mobile APE6 pin control support" if COMPILE_TEST + bool "pin control support for R-Mobile APE6" if COMPILE_TEST select PINCTRL_SH_PFC_GPIO config PINCTRL_PFC_R8A7740 - bool "R-Mobile A1 pin control support" if COMPILE_TEST + bool "pin control support for R-Mobile A1" if COMPILE_TEST select PINCTRL_SH_PFC_GPIO config PINCTRL_PFC_R8A7742 - bool "RZ/G1H pin control support" if COMPILE_TEST + bool "pin control support for RZ/G1H" if COMPILE_TEST config PINCTRL_PFC_R8A7743 - bool "RZ/G1M pin control support" if COMPILE_TEST + bool "pin control support for RZ/G1M" if COMPILE_TEST config PINCTRL_PFC_R8A7744 - bool "RZ/G1N pin control support" if COMPILE_TEST + bool "pin control support for RZ/G1N" if COMPILE_TEST config PINCTRL_PFC_R8A7745 - bool "RZ/G1E pin control support" if COMPILE_TEST + bool "pin control support for RZ/G1E" if COMPILE_TEST config PINCTRL_PFC_R8A77470 - bool "RZ/G1C pin control support" if COMPILE_TEST + bool "pin control support for RZ/G1C" if COMPILE_TEST config PINCTRL_PFC_R8A774A1 - bool "RZ/G2M pin control support" if COMPILE_TEST + bool "pin control support for RZ/G2M" if COMPILE_TEST config PINCTRL_PFC_R8A774B1 - bool "RZ/G2N pin control support" if COMPILE_TEST + bool "pin control support for RZ/G2N" if COMPILE_TEST config PINCTRL_PFC_R8A774C0 - bool "RZ/G2E pin control support" if COMPILE_TEST + bool "pin control support for RZ/G2E" if COMPILE_TEST config PINCTRL_PFC_R8A774E1 - bool "RZ/G2H pin control support" if COMPILE_TEST + bool "pin control support for RZ/G2H" if COMPILE_TEST config PINCTRL_PFC_R8A7778 - bool "R-Car M1A pin control support" if COMPILE_TEST + bool "pin control support for R-Car M1A" if COMPILE_TEST config PINCTRL_PFC_R8A7779 - bool "R-Car H1 pin control support" if COMPILE_TEST + bool "pin control support for R-Car H1" if COMPILE_TEST config PINCTRL_PFC_R8A7790 - bool "R-Car H2 pin control support" if COMPILE_TEST + bool "pin control support for R-Car H2" if COMPILE_TEST config PINCTRL_PFC_R8A7791 - bool "R-Car M2-W pin control support" if COMPILE_TEST + bool "pin control support for R-Car M2-W" if COMPILE_TEST config PINCTRL_PFC_R8A7792 - bool "R-Car V2H pin control support" if COMPILE_TEST + bool "pin control support for R-Car V2H" if COMPILE_TEST config PINCTRL_PFC_R8A7793 - bool "R-Car M2-N pin control support" if COMPILE_TEST + bool "pin control support for R-Car M2-N" if COMPILE_TEST config PINCTRL_PFC_R8A7794 - bool "R-Car E2 pin control support" if COMPILE_TEST + bool "pin control support for R-Car E2" if COMPILE_TEST config PINCTRL_PFC_R8A77950 - bool "R-Car H3 ES1.x pin control support" if COMPILE_TEST + bool "pin control support for R-Car H3 ES1.x" if COMPILE_TEST config PINCTRL_PFC_R8A77951 - bool "R-Car H3 ES2.0+ pin control support" if COMPILE_TEST + bool "pin control support for R-Car H3 ES2.0+" if COMPILE_TEST config PINCTRL_PFC_R8A77960 - bool "R-Car M3-W pin control support" if COMPILE_TEST + bool "pin control support for R-Car M3-W" if COMPILE_TEST config PINCTRL_PFC_R8A77961 - bool "R-Car M3-W+ pin control support" if COMPILE_TEST + bool "pin control support for R-Car M3-W+" if COMPILE_TEST config PINCTRL_PFC_R8A77965 - bool "R-Car M3-N pin control support" if COMPILE_TEST + bool "pin control support for R-Car M3-N" if COMPILE_TEST config PINCTRL_PFC_R8A77970 - bool "R-Car V3M pin control support" if COMPILE_TEST + bool "pin control support for R-Car V3M" if COMPILE_TEST config PINCTRL_PFC_R8A77980 - bool "R-Car V3H pin control support" if COMPILE_TEST + bool "pin control support for R-Car V3H" if COMPILE_TEST config PINCTRL_PFC_R8A77990 - bool "R-Car E3 pin control support" if COMPILE_TEST + bool "pin control support for R-Car E3" if COMPILE_TEST config PINCTRL_PFC_R8A77995 - bool "R-Car D3 pin control support" if COMPILE_TEST + bool "pin control support for R-Car D3" if COMPILE_TEST config PINCTRL_PFC_SH7203 - bool "SH7203 pin control support" if COMPILE_TEST + bool "pin control support for SH7203" if COMPILE_TEST select PINCTRL_SH_FUNC_GPIO config PINCTRL_PFC_SH7264 - bool "SH7264 pin control support" if COMPILE_TEST + bool "pin control support for SH7264" if COMPILE_TEST select PINCTRL_SH_FUNC_GPIO config PINCTRL_PFC_SH7269 - bool "SH7269 pin control support" if COMPILE_TEST + bool "pin control support for SH7269" if COMPILE_TEST select PINCTRL_SH_FUNC_GPIO config PINCTRL_PFC_SH73A0 - bool "SH-Mobile AG5 pin control support" if COMPILE_TEST + bool "pin control support for SH-Mobile AG5" if COMPILE_TEST select PINCTRL_SH_PFC_GPIO select REGULATOR config PINCTRL_PFC_SH7720 - bool "SH7720 pin control support" if COMPILE_TEST + bool "pin control support for SH7720" if COMPILE_TEST select PINCTRL_SH_FUNC_GPIO config PINCTRL_PFC_SH7722 - bool "SH7722 pin control support" if COMPILE_TEST + bool "pin control support for SH7722" if COMPILE_TEST select PINCTRL_SH_FUNC_GPIO config PINCTRL_PFC_SH7723 - bool "SH-Mobile R2 pin control support" if COMPILE_TEST + bool "pin control support for SH-Mobile R2" if COMPILE_TEST select PINCTRL_SH_FUNC_GPIO config PINCTRL_PFC_SH7724 - bool "SH-Mobile R2R pin control support" if COMPILE_TEST + bool "pin control support for SH-Mobile R2R" if COMPILE_TEST select PINCTRL_SH_FUNC_GPIO config PINCTRL_PFC_SH7734 - bool "SH7734 pin control support" if COMPILE_TEST + bool "pin control support for SH7734" if COMPILE_TEST select PINCTRL_SH_FUNC_GPIO config PINCTRL_PFC_SH7757 - bool "SH7757 pin control support" if COMPILE_TEST + bool "pin control support for SH7757" if COMPILE_TEST select PINCTRL_SH_FUNC_GPIO config PINCTRL_PFC_SH7785 - bool "SH7785 pin control support" if COMPILE_TEST + bool "pin control support for SH7785" if COMPILE_TEST select PINCTRL_SH_FUNC_GPIO config PINCTRL_PFC_SH7786 - bool "SH7786 pin control support" if COMPILE_TEST + bool "pin control support for SH7786" if COMPILE_TEST select PINCTRL_SH_FUNC_GPIO config PINCTRL_PFC_SHX3 - bool "SH-X3 pin control support" if COMPILE_TEST + bool "pin control support for SH-X3" if COMPILE_TEST select PINCTRL_SH_FUNC_GPIO endmenu From d89a08f52b0dd30d8e13c91886788cd42333dba7 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Mon, 24 Aug 2020 14:49:56 +0900 Subject: [PATCH 185/433] pinctrl: sh-pfc: Tidy up driver description title Sort each driver by description title in alphabetical order. Signed-off-by: Kuninori Morimoto Link: https://lore.kernel.org/r/87h7ssy4qy.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven --- drivers/pinctrl/sh-pfc/Kconfig | 202 ++++++++++++++++----------------- 1 file changed, 101 insertions(+), 101 deletions(-) diff --git a/drivers/pinctrl/sh-pfc/Kconfig b/drivers/pinctrl/sh-pfc/Kconfig index 86e4d062ef99..2cff88684f36 100644 --- a/drivers/pinctrl/sh-pfc/Kconfig +++ b/drivers/pinctrl/sh-pfc/Kconfig @@ -55,6 +55,77 @@ config PINCTRL_SH_PFC help This enables pin control drivers for Renesas SuperH and ARM platforms +config PINCTRL_SH_PFC_GPIO + select GPIOLIB + bool + help + This enables pin control and GPIO drivers for SH/SH Mobile platforms + +config PINCTRL_SH_FUNC_GPIO + select PINCTRL_SH_PFC_GPIO + bool + help + This enables legacy function GPIOs for SH platforms + +config PINCTRL_PFC_EMEV2 + bool "pin control support for Emma Mobile EV2" if COMPILE_TEST + +config PINCTRL_PFC_R8A77995 + bool "pin control support for R-Car D3" if COMPILE_TEST + +config PINCTRL_PFC_R8A7794 + bool "pin control support for R-Car E2" if COMPILE_TEST + +config PINCTRL_PFC_R8A77990 + bool "pin control support for R-Car E3" if COMPILE_TEST + +config PINCTRL_PFC_R8A7779 + bool "pin control support for R-Car H1" if COMPILE_TEST + +config PINCTRL_PFC_R8A7790 + bool "pin control support for R-Car H2" if COMPILE_TEST + +config PINCTRL_PFC_R8A77950 + bool "pin control support for R-Car H3 ES1.x" if COMPILE_TEST + +config PINCTRL_PFC_R8A77951 + bool "pin control support for R-Car H3 ES2.0+" if COMPILE_TEST + +config PINCTRL_PFC_R8A7778 + bool "pin control support for R-Car M1A" if COMPILE_TEST + +config PINCTRL_PFC_R8A7793 + bool "pin control support for R-Car M2-N" if COMPILE_TEST + +config PINCTRL_PFC_R8A7791 + bool "pin control support for R-Car M2-W" if COMPILE_TEST + +config PINCTRL_PFC_R8A77965 + bool "pin control support for R-Car M3-N" if COMPILE_TEST + +config PINCTRL_PFC_R8A77960 + bool "pin control support for R-Car M3-W" if COMPILE_TEST + +config PINCTRL_PFC_R8A77961 + bool "pin control support for R-Car M3-W+" if COMPILE_TEST + +config PINCTRL_PFC_R8A7792 + bool "pin control support for R-Car V2H" if COMPILE_TEST + +config PINCTRL_PFC_R8A77980 + bool "pin control support for R-Car V3H" if COMPILE_TEST + +config PINCTRL_PFC_R8A77970 + bool "pin control support for R-Car V3M" if COMPILE_TEST + +config PINCTRL_PFC_R8A7740 + bool "pin control support for R-Mobile A1" if COMPILE_TEST + select PINCTRL_SH_PFC_GPIO + +config PINCTRL_PFC_R8A73A4 + bool "pin control support for R-Mobile APE6" if COMPILE_TEST + select PINCTRL_SH_PFC_GPIO + config PINCTRL_RZA1 bool "pin control support for RZ/A1" depends on OF @@ -77,38 +148,11 @@ config PINCTRL_RZA2 help This selects GPIO and pinctrl driver for Renesas RZ/A2 platforms. -config PINCTRL_RZN1 - bool "pin control support for RZ/N1" - depends on OF - depends on ARCH_RZN1 || COMPILE_TEST - select GENERIC_PINCTRL_GROUPS - select GENERIC_PINMUX_FUNCTIONS - select GENERIC_PINCONF - help - This selects pinctrl driver for Renesas RZ/N1 devices. +config PINCTRL_PFC_R8A77470 + bool "pin control support for RZ/G1C" if COMPILE_TEST -config PINCTRL_SH_PFC_GPIO - select GPIOLIB - bool - help - This enables pin control and GPIO drivers for SH/SH Mobile platforms - -config PINCTRL_SH_FUNC_GPIO - select PINCTRL_SH_PFC_GPIO - bool - help - This enables legacy function GPIOs for SH platforms - -config PINCTRL_PFC_EMEV2 - bool "pin control support for Emma Mobile EV2" if COMPILE_TEST - -config PINCTRL_PFC_R8A73A4 - bool "pin control support for R-Mobile APE6" if COMPILE_TEST - select PINCTRL_SH_PFC_GPIO - -config PINCTRL_PFC_R8A7740 - bool "pin control support for R-Mobile A1" if COMPILE_TEST - select PINCTRL_SH_PFC_GPIO +config PINCTRL_PFC_R8A7745 + bool "pin control support for RZ/G1E" if COMPILE_TEST config PINCTRL_PFC_R8A7742 bool "pin control support for RZ/G1H" if COMPILE_TEST @@ -119,11 +163,11 @@ config PINCTRL_PFC_R8A7743 config PINCTRL_PFC_R8A7744 bool "pin control support for RZ/G1N" if COMPILE_TEST -config PINCTRL_PFC_R8A7745 - bool "pin control support for RZ/G1E" if COMPILE_TEST +config PINCTRL_PFC_R8A774C0 + bool "pin control support for RZ/G2E" if COMPILE_TEST -config PINCTRL_PFC_R8A77470 - bool "pin control support for RZ/G1C" if COMPILE_TEST +config PINCTRL_PFC_R8A774E1 + bool "pin control support for RZ/G2H" if COMPILE_TEST config PINCTRL_PFC_R8A774A1 bool "pin control support for RZ/G2M" if COMPILE_TEST @@ -131,59 +175,15 @@ config PINCTRL_PFC_R8A774A1 config PINCTRL_PFC_R8A774B1 bool "pin control support for RZ/G2N" if COMPILE_TEST -config PINCTRL_PFC_R8A774C0 - bool "pin control support for RZ/G2E" if COMPILE_TEST - -config PINCTRL_PFC_R8A774E1 - bool "pin control support for RZ/G2H" if COMPILE_TEST - -config PINCTRL_PFC_R8A7778 - bool "pin control support for R-Car M1A" if COMPILE_TEST - -config PINCTRL_PFC_R8A7779 - bool "pin control support for R-Car H1" if COMPILE_TEST - -config PINCTRL_PFC_R8A7790 - bool "pin control support for R-Car H2" if COMPILE_TEST - -config PINCTRL_PFC_R8A7791 - bool "pin control support for R-Car M2-W" if COMPILE_TEST - -config PINCTRL_PFC_R8A7792 - bool "pin control support for R-Car V2H" if COMPILE_TEST - -config PINCTRL_PFC_R8A7793 - bool "pin control support for R-Car M2-N" if COMPILE_TEST - -config PINCTRL_PFC_R8A7794 - bool "pin control support for R-Car E2" if COMPILE_TEST - -config PINCTRL_PFC_R8A77950 - bool "pin control support for R-Car H3 ES1.x" if COMPILE_TEST - -config PINCTRL_PFC_R8A77951 - bool "pin control support for R-Car H3 ES2.0+" if COMPILE_TEST - -config PINCTRL_PFC_R8A77960 - bool "pin control support for R-Car M3-W" if COMPILE_TEST - -config PINCTRL_PFC_R8A77961 - bool "pin control support for R-Car M3-W+" if COMPILE_TEST - -config PINCTRL_PFC_R8A77965 - bool "pin control support for R-Car M3-N" if COMPILE_TEST - -config PINCTRL_PFC_R8A77970 - bool "pin control support for R-Car V3M" if COMPILE_TEST - -config PINCTRL_PFC_R8A77980 - bool "pin control support for R-Car V3H" if COMPILE_TEST - -config PINCTRL_PFC_R8A77990 - bool "pin control support for R-Car E3" if COMPILE_TEST - -config PINCTRL_PFC_R8A77995 - bool "pin control support for R-Car D3" if COMPILE_TEST +config PINCTRL_RZN1 + bool "pin control support for RZ/N1" + depends on OF + depends on ARCH_RZN1 || COMPILE_TEST + select GENERIC_PINCTRL_GROUPS + select GENERIC_PINMUX_FUNCTIONS + select GENERIC_PINCONF + help + This selects pinctrl driver for Renesas RZ/N1 devices. config PINCTRL_PFC_SH7203 bool "pin control support for SH7203" if COMPILE_TEST @@ -197,11 +197,6 @@ config PINCTRL_PFC_SH7269 bool "pin control support for SH7269" if COMPILE_TEST select PINCTRL_SH_FUNC_GPIO -config PINCTRL_PFC_SH73A0 - bool "pin control support for SH-Mobile AG5" if COMPILE_TEST - select PINCTRL_SH_PFC_GPIO - select REGULATOR - config PINCTRL_PFC_SH7720 bool "pin control support for SH7720" if COMPILE_TEST select PINCTRL_SH_FUNC_GPIO @@ -210,14 +205,6 @@ config PINCTRL_PFC_SH7722 bool "pin control support for SH7722" if COMPILE_TEST select PINCTRL_SH_FUNC_GPIO -config PINCTRL_PFC_SH7723 - bool "pin control support for SH-Mobile R2" if COMPILE_TEST - select PINCTRL_SH_FUNC_GPIO - -config PINCTRL_PFC_SH7724 - bool "pin control support for SH-Mobile R2R" if COMPILE_TEST - select PINCTRL_SH_FUNC_GPIO - config PINCTRL_PFC_SH7734 bool "pin control support for SH7734" if COMPILE_TEST select PINCTRL_SH_FUNC_GPIO @@ -234,6 +221,19 @@ config PINCTRL_PFC_SH7786 bool "pin control support for SH7786" if COMPILE_TEST select PINCTRL_SH_FUNC_GPIO +config PINCTRL_PFC_SH73A0 + bool "pin control support for SH-Mobile AG5" if COMPILE_TEST + select PINCTRL_SH_PFC_GPIO + select REGULATOR + +config PINCTRL_PFC_SH7723 + bool "pin control support for SH-Mobile R2" if COMPILE_TEST + select PINCTRL_SH_FUNC_GPIO + +config PINCTRL_PFC_SH7724 + bool "pin control support for SH-Mobile R2R" if COMPILE_TEST + select PINCTRL_SH_FUNC_GPIO + config PINCTRL_PFC_SHX3 bool "pin control support for SH-X3" if COMPILE_TEST select PINCTRL_SH_FUNC_GPIO From a4eb6afa7c2c3795ec693cd806fd69593c9ecca7 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 21 Aug 2020 13:14:01 +0200 Subject: [PATCH 186/433] pinctrl: rza1: Switch to using "output-enable" For pins requiring software driven IO output operations, the RZ/A1 Pin Controller uses either the "output-high" or "output-low" DT property to enable the corresponding output buffer. The actual line value doesn't matter, as it is ignored. Commit 425562429d4f3b13 ("pinctrl: generic: Add output-enable property") introduced a new DT property for this specific use case. Update the RZ/A1 Pin Controller DT bindings and driver to use this new property instead. Preserve backwards compatibility with old DTBs in the driver, as this comes at a very small cost. Notes: - The DT binding examples already used the new property, - There are no upstream users of the old properties. Signed-off-by: Geert Uytterhoeven Reviewed-by: Chris Brandt Acked-by: Jacopo Mondi Acked-by: Rob Herring Link: https://lore.kernel.org/r/20200821111401.4021-1-geert+renesas@glider.be --- .../devicetree/bindings/pinctrl/renesas,rza1-pinctrl.txt | 5 ++--- drivers/pinctrl/sh-pfc/pinctrl-rza1.c | 3 ++- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rza1-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/renesas,rza1-pinctrl.txt index fd3696eb36bf..38cdd23d3498 100644 --- a/Documentation/devicetree/bindings/pinctrl/renesas,rza1-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/renesas,rza1-pinctrl.txt @@ -117,10 +117,9 @@ function or a GPIO controller alternatively. - input-enable: enable input bufer for pins requiring software driven IO input operations. - - output-high: + - output-enable: enable output buffer for pins requiring software driven IO output - operations. output-low can be used alternatively, as line value is - ignored by the driver. + operations. The hardware reference manual specifies when a pin has to be configured to work in bi-directional mode and when the IO direction has to be specified diff --git a/drivers/pinctrl/sh-pfc/pinctrl-rza1.c b/drivers/pinctrl/sh-pfc/pinctrl-rza1.c index a0cb586a46b7..15dd007700c2 100644 --- a/drivers/pinctrl/sh-pfc/pinctrl-rza1.c +++ b/drivers/pinctrl/sh-pfc/pinctrl-rza1.c @@ -928,7 +928,8 @@ static int rza1_parse_pinmux_node(struct rza1_pinctrl *rza1_pctl, case PIN_CONFIG_INPUT_ENABLE: pinmux_flags |= MUX_FLAGS_SWIO_INPUT; break; - case PIN_CONFIG_OUTPUT: + case PIN_CONFIG_OUTPUT: /* for DT backwards compatibility */ + case PIN_CONFIG_OUTPUT_ENABLE: pinmux_flags |= MUX_FLAGS_SWIO_OUTPUT; default: break; From d4691b7f6231a022f20028ea27b6c49466b2acd6 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 21 Aug 2020 13:11:27 +0200 Subject: [PATCH 187/433] dt-bindings: pinctrl: renesas,rza2-pinctrl: Fix pin controller node name According to Devicetree Specification v0.2 and later, Section "Generic Names Recommendation", the node name for a pin controller device node should be "pinctrl". Signed-off-by: Geert Uytterhoeven Acked-by: Rob Herring Link: https://lore.kernel.org/r/20200821111127.3771-1-geert+renesas@glider.be --- .../devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml index b7911a994f3a..ce1f7343788f 100644 --- a/Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml @@ -84,7 +84,7 @@ additionalProperties: false examples: - | #include - pinctrl: pin-controller@fcffe000 { + pinctrl: pinctrl@fcffe000 { compatible = "renesas,r7s9210-pinctrl"; reg = <0xfcffe000 0x1000>; From 5398b2fa464722a3bb3cf4c264a19ac765974d98 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 21 Aug 2020 13:19:56 +0200 Subject: [PATCH 188/433] dt-bindings: pinctrl: rza1: Convert to json-schema Convert the Renesas RZ/A1 combined Pin and GPIO controller Device Tree binding documentation to json-schema. Rename "rza1-pinctrl" to "rza1-ports", to match the compatible value scheme. Use "pinctrl" generic node name. Drop generic and consumer examples, as they do not belong here. Signed-off-by: Geert Uytterhoeven Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20200821111956.4989-1-geert+renesas@glider.be --- .../bindings/pinctrl/renesas,rza1-pinctrl.txt | 222 ------------------ .../bindings/pinctrl/renesas,rza1-ports.yaml | 190 +++++++++++++++ 2 files changed, 190 insertions(+), 222 deletions(-) delete mode 100644 Documentation/devicetree/bindings/pinctrl/renesas,rza1-pinctrl.txt create mode 100644 Documentation/devicetree/bindings/pinctrl/renesas,rza1-ports.yaml diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rza1-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/renesas,rza1-pinctrl.txt deleted file mode 100644 index 38cdd23d3498..000000000000 --- a/Documentation/devicetree/bindings/pinctrl/renesas,rza1-pinctrl.txt +++ /dev/null @@ -1,222 +0,0 @@ -Renesas RZ/A1 combined Pin and GPIO controller - -The Renesas SoCs of the RZ/A1 family feature a combined Pin and GPIO controller, -named "Ports" in the hardware reference manual. -Pin multiplexing and GPIO configuration is performed on a per-pin basis -writing configuration values to per-port register sets. -Each "port" features up to 16 pins, each of them configurable for GPIO -function (port mode) or in alternate function mode. -Up to 8 different alternate function modes exist for each single pin. - -Pin controller node -------------------- - -Required properties: - - compatible: should be: - - "renesas,r7s72100-ports": for RZ/A1H - - "renesas,r7s72101-ports", "renesas,r7s72100-ports": for RZ/A1M - - "renesas,r7s72102-ports": for RZ/A1L - - - reg - address base and length of the memory area where the pin controller - hardware is mapped to. - -Example: -Pin controller node for RZ/A1H SoC (r7s72100) - -pinctrl: pin-controller@fcfe3000 { - compatible = "renesas,r7s72100-ports"; - - reg = <0xfcfe3000 0x4230>; -}; - -Sub-nodes ---------- - -The child nodes of the pin controller node describe a pin multiplexing -function or a GPIO controller alternatively. - -- Pin multiplexing sub-nodes: - A pin multiplexing sub-node describes how to configure a set of - (or a single) pin in some desired alternate function mode. - A single sub-node may define several pin configurations. - A few alternate function require special pin configuration flags to be - supplied along with the alternate function configuration number. - The hardware reference manual specifies when a pin function requires - "software IO driven" mode to be specified. To do so use the generic - properties from the header file - to instruct the pin controller to perform the desired pin configuration - operation. - Please refer to pinctrl-bindings.txt to get to know more on generic - pin properties usage. - - The allowed generic formats for a pin multiplexing sub-node are the - following ones: - - node-1 { - pinmux = , , ... ; - GENERIC_PINCONFIG; - }; - - node-2 { - sub-node-1 { - pinmux = , , ... ; - GENERIC_PINCONFIG; - }; - - sub-node-2 { - pinmux = , , ... ; - GENERIC_PINCONFIG; - }; - - ... - - sub-node-n { - pinmux = , , ... ; - GENERIC_PINCONFIG; - }; - }; - - Use the second format when pins part of the same logical group need to have - different generic pin configuration flags applied. - - Client sub-nodes shall refer to pin multiplexing sub-nodes using the phandle - of the most external one. - - Eg. - - client-1 { - ... - pinctrl-0 = <&node-1>; - ... - }; - - client-2 { - ... - pinctrl-0 = <&node-2>; - ... - }; - - Required properties: - - pinmux: - integer array representing pin number and pin multiplexing configuration. - When a pin has to be configured in alternate function mode, use this - property to identify the pin by its global index, and provide its - alternate function configuration number along with it. - When multiple pins are required to be configured as part of the same - alternate function they shall be specified as members of the same - argument list of a single "pinmux" property. - Helper macros to ease assembling the pin index from its position - (port where it sits on and pin number) and alternate function identifier - are provided by the pin controller header file at: - - Integers values in "pinmux" argument list are assembled as: - ((PORT * 16 + PIN) | MUX_FUNC << 16) - - Optional generic properties: - - input-enable: - enable input bufer for pins requiring software driven IO input - operations. - - output-enable: - enable output buffer for pins requiring software driven IO output - operations. - - The hardware reference manual specifies when a pin has to be configured to - work in bi-directional mode and when the IO direction has to be specified - by software. Bi-directional pins are managed by the pin controller driver - internally, while software driven IO direction has to be explicitly - selected when multiple options are available. - - Example: - A serial communication interface with a TX output pin and an RX input pin. - - &pinctrl { - scif2_pins: serial2 { - pinmux = , ; - }; - }; - - Pin #0 on port #3 is configured as alternate function #6. - Pin #2 on port #3 is configured as alternate function #4. - - Example 2: - I2c master: both SDA and SCL pins need bi-directional operations - - &pinctrl { - i2c2_pins: i2c2 { - pinmux = , ; - }; - }; - - Pin #4 on port #1 is configured as alternate function #1. - Pin #5 on port #1 is configured as alternate function #1. - Both need to work in bi-directional mode, the driver manages this internally. - - Example 3: - Multi-function timer input and output compare pins. - Configure TIOC0A as software driven input and TIOC0B as software driven - output. - - &pinctrl { - tioc0_pins: tioc0 { - tioc0_input_pins { - pinumx = ; - input-enable; - }; - - tioc0_output_pins { - pinmux = ; - output-enable; - }; - }; - }; - - &tioc0 { - ... - pinctrl-0 = <&tioc0_pins>; - ... - }; - - Pin #0 on port #4 is configured as alternate function #2 with IO direction - specified by software as input. - Pin #1 on port #4 is configured as alternate function #1 with IO direction - specified by software as output. - -- GPIO controller sub-nodes: - Each port of the r7s72100 pin controller hardware is itself a GPIO controller. - Different SoCs have different numbers of available pins per port, but - generally speaking, each of them can be configured in GPIO ("port") mode - on this hardware. - Describe GPIO controllers using sub-nodes with the following properties. - - Required properties: - - gpio-controller - empty property as defined by the GPIO bindings documentation. - - #gpio-cells - number of cells required to identify and configure a GPIO. - Shall be 2. - - gpio-ranges - Describes a GPIO controller specifying its specific pin base, the pin - base in the global pin numbering space, and the number of controlled - pins, as defined by the GPIO bindings documentation. Refer to - Documentation/devicetree/bindings/gpio/gpio.txt file for a more detailed - description. - - Example: - A GPIO controller node, controlling 16 pins indexed from 0. - The GPIO controller base in the global pin indexing space is pin 48, thus - pins [0 - 15] on this controller map to pins [48 - 63] in the global pin - indexing space. - - port3: gpio-3 { - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pinctrl 0 48 16>; - }; - - A device node willing to use pins controlled by this GPIO controller, shall - refer to it as follows: - - led1 { - gpios = <&port3 10 GPIO_ACTIVE_LOW>; - }; diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rza1-ports.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rza1-ports.yaml new file mode 100644 index 000000000000..7f80578dc229 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/renesas,rza1-ports.yaml @@ -0,0 +1,190 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/renesas,rza1-ports.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RZ/A1 combined Pin and GPIO controller + +maintainers: + - Jacopo Mondi + - Geert Uytterhoeven + +description: + The Renesas SoCs of the RZ/A1 family feature a combined Pin and GPIO + controller, named "Ports" in the hardware reference manual. + Pin multiplexing and GPIO configuration is performed on a per-pin basis + writing configuration values to per-port register sets. + Each "port" features up to 16 pins, each of them configurable for GPIO + function (port mode) or in alternate function mode. + Up to 8 different alternate function modes exist for each single pin. + +properties: + compatible: + oneOf: + - const: renesas,r7s72100-ports # RZ/A1H + - items: + - const: renesas,r7s72101-ports # RZ/A1M + - const: renesas,r7s72100-ports # fallback + - const: renesas,r7s72102-ports # RZ/A1L + + reg: + maxItems: 1 + +required: + - compatible + - reg + +patternProperties: + "^gpio-[0-9]*$": + type: object + + description: + Each port of the r7s72100 pin controller hardware is itself a GPIO + controller. + Different SoCs have different numbers of available pins per port, but + generally speaking, each of them can be configured in GPIO ("port") mode + on this hardware. + Describe GPIO controllers using sub-nodes with the following properties. + + properties: + gpio-controller: true + + '#gpio-cells': + const: 2 + + gpio-ranges: + maxItems: 1 + + required: + - gpio-controller + - '#gpio-cells' + - gpio-ranges + + +additionalProperties: + anyOf: + - type: object + allOf: + - $ref: pincfg-node.yaml# + - $ref: pinmux-node.yaml# + + description: + A pin multiplexing sub-node describes how to configure a set of (or a + single) pin in some desired alternate function mode. + A single sub-node may define several pin configurations. + A few alternate function require special pin configuration flags to be + supplied along with the alternate function configuration number. + The hardware reference manual specifies when a pin function requires + "software IO driven" mode to be specified. To do so use the generic + properties from the header + file to instruct the pin controller to perform the desired pin + configuration operation. + The hardware reference manual specifies when a pin has to be configured + to work in bi-directional mode and when the IO direction has to be + specified by software. Bi-directional pins must be managed by the pin + controller driver internally, while software driven IO direction has to + be explicitly selected when multiple options are available. + + properties: + pinmux: + description: | + Integer array representing pin number and pin multiplexing + configuration. + When a pin has to be configured in alternate function mode, use + this property to identify the pin by its global index, and provide + its alternate function configuration number along with it. + When multiple pins are required to be configured as part of the + same alternate function they shall be specified as members of the + same argument list of a single "pinmux" property. + Helper macros to ease assembling the pin index from its position + (port where it sits on and pin number) and alternate function + identifier are provided by the pin controller header file at: + + Integers values in "pinmux" argument list are assembled as: + ((PORT * 16 + PIN) | MUX_FUNC << 16) + + phandle: true + input-enable: true + output-enable: true + + required: + - pinmux + + additionalProperties: false + + - type: object + properties: + phandle: true + + additionalProperties: + $ref: "#/additionalProperties/anyOf/0" + +examples: + - | + #include + pinctrl: pinctrl@fcfe3000 { + compatible = "renesas,r7s72100-ports"; + + reg = <0xfcfe3000 0x4230>; + + /* + * A GPIO controller node, controlling 16 pins indexed from 0. + * The GPIO controller base in the global pin indexing space is pin + * 48, thus pins [0 - 15] on this controller map to pins [48 - 63] + * in the global pin indexing space. + */ + port3: gpio-3 { + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 48 16>; + }; + + /* + * A serial communication interface with a TX output pin and an RX + * input pin. + * Pin #0 on port #3 is configured as alternate function #6. + * Pin #2 on port #3 is configured as alternate function #4. + */ + scif2_pins: serial2 { + pinmux = , ; + }; + + + /* + * I2c master: both SDA and SCL pins need bi-directional operations + * Pin #4 on port #1 is configured as alternate function #1. + * Pin #5 on port #1 is configured as alternate function #1. + * Both need to work in bi-directional mode, the driver must manage + * this internally. + */ + i2c2_pins: i2c2 { + pinmux = , ; + }; + + + /* + * Multi-function timer input and output compare pins. + */ + tioc0_pins: tioc0 { + /* + * Configure TIOC0A as software driven input + * Pin #0 on port #4 is configured as alternate function #2 + * with IO direction specified by software as input. + */ + tioc0_input_pins { + pinmux = ; + input-enable; + }; + + /* + * Configure TIOC0B as software driven output + * Pin #1 on port #4 is configured as alternate function #1 + * with IO direction specified by software as output. + */ + tioc0_output_pins { + pinmux = ; + output-enable; + }; + }; + }; From 5f76771a4a4514277f4618ba2fe20cb1d9ed5afd Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 21 Aug 2020 13:20:59 +0200 Subject: [PATCH 189/433] dt-bindings: pinctrl: rzn1: Convert to json-schema Convert the Renesas RZ/N1 Pin controller Device Tree binding documentation to json-schema. Use "pinctrl" generic node name. Drop generic and consumer examples, as they do not belong here. Signed-off-by: Geert Uytterhoeven Tested-by: Gareth Williams Reviewed-by: Gareth Williams Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20200821112059.5133-1-geert+renesas@glider.be --- .../bindings/pinctrl/renesas,rzn1-pinctrl.txt | 153 ------------------ .../pinctrl/renesas,rzn1-pinctrl.yaml | 129 +++++++++++++++ 2 files changed, 129 insertions(+), 153 deletions(-) delete mode 100644 Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.txt create mode 100644 Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.txt deleted file mode 100644 index 25e53acd523e..000000000000 --- a/Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.txt +++ /dev/null @@ -1,153 +0,0 @@ -Renesas RZ/N1 SoC Pinctrl node description. - -Pin controller node -------------------- -Required properties: -- compatible: SoC-specific compatible string "renesas,-pinctrl" - followed by "renesas,rzn1-pinctrl" as fallback. The SoC-specific compatible - strings must be one of: - "renesas,r9a06g032-pinctrl" for RZ/N1D - "renesas,r9a06g033-pinctrl" for RZ/N1S -- reg: Address base and length of the memory area where the pin controller - hardware is mapped to. -- clocks: phandle for the clock, see the description of clock-names below. -- clock-names: Contains the name of the clock: - "bus", the bus clock, sometimes described as pclk, for register accesses. - -Example: - pinctrl: pin-controller@40067000 { - compatible = "renesas,r9a06g032-pinctrl", "renesas,rzn1-pinctrl"; - reg = <0x40067000 0x1000>, <0x51000000 0x480>; - clocks = <&sysctrl R9A06G032_HCLK_PINCONFIG>; - clock-names = "bus"; - }; - -Sub-nodes ---------- - -The child nodes of the pin controller node describe a pin multiplexing -function. - -- Pin multiplexing sub-nodes: - A pin multiplexing sub-node describes how to configure a set of - (or a single) pin in some desired alternate function mode. - A single sub-node may define several pin configurations. - Please refer to pinctrl-bindings.txt to get to know more on generic - pin properties usage. - - The allowed generic formats for a pin multiplexing sub-node are the - following ones: - - node-1 { - pinmux = , , ... ; - GENERIC_PINCONFIG; - }; - - node-2 { - sub-node-1 { - pinmux = , , ... ; - GENERIC_PINCONFIG; - }; - - sub-node-2 { - pinmux = , , ... ; - GENERIC_PINCONFIG; - }; - - ... - - sub-node-n { - pinmux = , , ... ; - GENERIC_PINCONFIG; - }; - }; - - node-3 { - pinmux = , , ... ; - GENERIC_PINCONFIG; - - sub-node-1 { - pinmux = , , ... ; - GENERIC_PINCONFIG; - }; - - ... - - sub-node-n { - pinmux = , , ... ; - GENERIC_PINCONFIG; - }; - }; - - Use the latter two formats when pins part of the same logical group need to - have different generic pin configuration flags applied. Note that the generic - pinconfig in node-3 does not apply to the sub-nodes. - - Client sub-nodes shall refer to pin multiplexing sub-nodes using the phandle - of the most external one. - - Eg. - - client-1 { - ... - pinctrl-0 = <&node-1>; - ... - }; - - client-2 { - ... - pinctrl-0 = <&node-2>; - ... - }; - - Required properties: - - pinmux: - integer array representing pin number and pin multiplexing configuration. - When a pin has to be configured in alternate function mode, use this - property to identify the pin by its global index, and provide its - alternate function configuration number along with it. - When multiple pins are required to be configured as part of the same - alternate function they shall be specified as members of the same - argument list of a single "pinmux" property. - Integers values in the "pinmux" argument list are assembled as: - (PIN | MUX_FUNC << 8) - where PIN directly corresponds to the pl_gpio pin number and MUX_FUNC is - one of the alternate function identifiers defined in: - - These identifiers collapse the IO Multiplex Configuration Level 1 and - Level 2 numbers that are detailed in the hardware reference manual into a - single number. The identifiers for Level 2 are simply offset by 10. - Additional identifiers are provided to specify the MDIO source peripheral. - - Optional generic pinconf properties: - - bias-disable - disable any pin bias - - bias-pull-up - pull up the pin with 50 KOhm - - bias-pull-down - pull down the pin with 50 KOhm - - bias-high-impedance - high impedance mode - - drive-strength - sink or source at most 4, 6, 8 or 12 mA - - Example: - A serial communication interface with a TX output pin and an RX input pin. - - &pinctrl { - pins_uart0: pins_uart0 { - pinmux = < - RZN1_PINMUX(103, RZN1_FUNC_UART0_I) /* UART0_TXD */ - RZN1_PINMUX(104, RZN1_FUNC_UART0_I) /* UART0_RXD */ - >; - }; - }; - - Example 2: - Here we set the pull up on the RXD pin of the UART. - - &pinctrl { - pins_uart0: pins_uart0 { - pinmux = ; /* TXD */ - - pins_uart6_rx { - pinmux = ; /* RXD */ - bias-pull-up; - }; - }; - }; diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml new file mode 100644 index 000000000000..4a43af0d6e02 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml @@ -0,0 +1,129 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/renesas,rzn1-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RZ/N1 Pin Controller + +maintainers: + - Gareth Williams + - Geert Uytterhoeven + +properties: + compatible: + items: + - enum: + - renesas,r9a06g032-pinctrl # RZ/N1D + - renesas,r9a06g033-pinctrl # RZ/N1S + - const: renesas,rzn1-pinctrl # Generic RZ/N1 + + reg: + items: + - description: GPIO Multiplexing Level1 Register Block + - description: GPIO Multiplexing Level2 Register Block + + clocks: + maxItems: 1 + + clock-names: + const: bus + description: + The bus clock, sometimes described as pclk, for register accesses. + +required: + - compatible + - reg + - clocks + - clock-names + +additionalProperties: + anyOf: + - type: object + allOf: + - $ref: pincfg-node.yaml# + - $ref: pinmux-node.yaml# + + description: + A pin multiplexing sub-node describes how to configure a set of (or a + single) pin in some desired alternate function mode. + A single sub-node may define several pin configurations. + + properties: + pinmux: + description: | + Integer array representing pin number and pin multiplexing + configuration. + When a pin has to be configured in alternate function mode, use + this property to identify the pin by its global index, and provide + its alternate function configuration number along with it. + When multiple pins are required to be configured as part of the + same alternate function they shall be specified as members of the + same argument list of a single "pinmux" property. + Integers values in the "pinmux" argument list are assembled as: + (PIN | MUX_FUNC << 8) + where PIN directly corresponds to the pl_gpio pin number and + MUX_FUNC is one of the alternate function identifiers defined in: + + These identifiers collapse the IO Multiplex Configuration Level 1 + and Level 2 numbers that are detailed in the hardware reference + manual into a single number. The identifiers for Level 2 are simply + offset by 10. Additional identifiers are provided to specify the + MDIO source peripheral. + + phandle: true + bias-disable: true + bias-pull-up: + description: Pull up the pin with 50 kOhm + bias-pull-down: + description: Pull down the pin with 50 kOhm + bias-high-impedance: true + drive-strength: + enum: [ 4, 6, 8, 12 ] + + required: + - pinmux + + additionalProperties: + $ref: "#/additionalProperties/anyOf/0" + + - type: object + properties: + phandle: true + + additionalProperties: + $ref: "#/additionalProperties/anyOf/0" + +examples: + - | + #include + #include + pinctrl: pinctrl@40067000 { + compatible = "renesas,r9a06g032-pinctrl", "renesas,rzn1-pinctrl"; + reg = <0x40067000 0x1000>, <0x51000000 0x480>; + clocks = <&sysctrl R9A06G032_HCLK_PINCONFIG>; + clock-names = "bus"; + + /* + * A serial communication interface with a TX output pin and an RX + * input pin. + */ + pins_uart0: pins_uart0 { + pinmux = < + RZN1_PINMUX(103, RZN1_FUNC_UART0_I) /* UART0_TXD */ + RZN1_PINMUX(104, RZN1_FUNC_UART0_I) /* UART0_RXD */ + >; + }; + + /* + * Set the pull-up on the RXD pin of the UART. + */ + pins_uart0_alt: pins_uart0_alt { + pinmux = ; + + pins_uart6_rx { + pinmux = ; + bias-pull-up; + }; + }; + }; From 1308fb4e4eae14e6189dece3b7cf5b5f453c5d02 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 9 Sep 2020 15:15:32 +0200 Subject: [PATCH 190/433] pinctrl: rzn1: Do not select GENERIC_PIN{CTRL_GROUPS,MUX_FUNCTIONS} The RZ/N1 pin control driver does not use pin groups or pin functions, so there is no need to select GENERIC_PINCTRL_GROUPS or GENERIC_PINMUX_FUNCTIONS. Signed-off-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20200909131534.12897-2-geert+renesas@glider.be --- drivers/pinctrl/sh-pfc/Kconfig | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/pinctrl/sh-pfc/Kconfig b/drivers/pinctrl/sh-pfc/Kconfig index 2cff88684f36..9eb793cb464b 100644 --- a/drivers/pinctrl/sh-pfc/Kconfig +++ b/drivers/pinctrl/sh-pfc/Kconfig @@ -179,8 +179,6 @@ config PINCTRL_RZN1 bool "pin control support for RZ/N1" depends on OF depends on ARCH_RZN1 || COMPILE_TEST - select GENERIC_PINCTRL_GROUPS - select GENERIC_PINMUX_FUNCTIONS select GENERIC_PINCONF help This selects pinctrl driver for Renesas RZ/N1 devices. From 077365a941166f3a7f5894017f9d26d17cdec00e Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 9 Sep 2020 15:15:33 +0200 Subject: [PATCH 191/433] pinctrl: Rename sh-pfc to renesas The drivers/pinctrl/sh-pfc subdirectory was originally created to group pin control drivers for various Renesas SuperH and SH-Mobile platforms. However, the name "sh-pfc" no longer reflects its contents, as the directory now contains pin control drivers for Renesas SuperH, ARM32, and ARM64 SoCs. Hence rename the subdirectory from drivers/pinctrl/sh-pfc to drivers/pinctrl/renesas, and the related Kconfig symbol from PINCTRL_SH_PFC to PINCTRL_RENESAS. Rename the git branch in MAINTAINERS, too, for consistency. Signed-off-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20200909131534.12897-3-geert+renesas@glider.be --- MAINTAINERS | 4 ++-- drivers/pinctrl/Kconfig | 2 +- drivers/pinctrl/Makefile | 2 +- drivers/pinctrl/{sh-pfc => renesas}/Kconfig | 2 +- drivers/pinctrl/{sh-pfc => renesas}/Makefile | 4 ++-- drivers/pinctrl/{sh-pfc => renesas}/core.c | 0 drivers/pinctrl/{sh-pfc => renesas}/core.h | 0 drivers/pinctrl/{sh-pfc => renesas}/gpio.c | 0 drivers/pinctrl/{sh-pfc => renesas}/pfc-emev2.c | 0 drivers/pinctrl/{sh-pfc => renesas}/pfc-r8a73a4.c | 0 drivers/pinctrl/{sh-pfc => renesas}/pfc-r8a7740.c | 0 drivers/pinctrl/{sh-pfc => renesas}/pfc-r8a77470.c | 0 drivers/pinctrl/{sh-pfc => renesas}/pfc-r8a7778.c | 0 drivers/pinctrl/{sh-pfc => renesas}/pfc-r8a7779.c | 0 drivers/pinctrl/{sh-pfc => renesas}/pfc-r8a7790.c | 0 drivers/pinctrl/{sh-pfc => renesas}/pfc-r8a7791.c | 0 drivers/pinctrl/{sh-pfc => renesas}/pfc-r8a7792.c | 0 drivers/pinctrl/{sh-pfc => renesas}/pfc-r8a7794.c | 0 drivers/pinctrl/{sh-pfc => renesas}/pfc-r8a77950.c | 0 drivers/pinctrl/{sh-pfc => renesas}/pfc-r8a77951.c | 0 drivers/pinctrl/{sh-pfc => renesas}/pfc-r8a7796.c | 2 +- drivers/pinctrl/{sh-pfc => renesas}/pfc-r8a77965.c | 2 +- drivers/pinctrl/{sh-pfc => renesas}/pfc-r8a77970.c | 2 +- drivers/pinctrl/{sh-pfc => renesas}/pfc-r8a77980.c | 2 +- drivers/pinctrl/{sh-pfc => renesas}/pfc-r8a77990.c | 2 +- drivers/pinctrl/{sh-pfc => renesas}/pfc-r8a77995.c | 2 +- drivers/pinctrl/{sh-pfc => renesas}/pfc-sh7203.c | 0 drivers/pinctrl/{sh-pfc => renesas}/pfc-sh7264.c | 0 drivers/pinctrl/{sh-pfc => renesas}/pfc-sh7269.c | 0 drivers/pinctrl/{sh-pfc => renesas}/pfc-sh73a0.c | 0 drivers/pinctrl/{sh-pfc => renesas}/pfc-sh7720.c | 0 drivers/pinctrl/{sh-pfc => renesas}/pfc-sh7722.c | 0 drivers/pinctrl/{sh-pfc => renesas}/pfc-sh7723.c | 0 drivers/pinctrl/{sh-pfc => renesas}/pfc-sh7724.c | 0 drivers/pinctrl/{sh-pfc => renesas}/pfc-sh7734.c | 0 drivers/pinctrl/{sh-pfc => renesas}/pfc-sh7757.c | 0 drivers/pinctrl/{sh-pfc => renesas}/pfc-sh7785.c | 0 drivers/pinctrl/{sh-pfc => renesas}/pfc-sh7786.c | 0 drivers/pinctrl/{sh-pfc => renesas}/pfc-shx3.c | 0 drivers/pinctrl/{sh-pfc => renesas}/pinctrl-rza1.c | 0 drivers/pinctrl/{sh-pfc => renesas}/pinctrl-rza2.c | 0 drivers/pinctrl/{sh-pfc => renesas}/pinctrl-rzn1.c | 0 drivers/pinctrl/{sh-pfc => renesas}/pinctrl.c | 0 drivers/pinctrl/{sh-pfc => renesas}/sh_pfc.h | 0 44 files changed, 13 insertions(+), 13 deletions(-) rename drivers/pinctrl/{sh-pfc => renesas}/Kconfig (99%) rename drivers/pinctrl/{sh-pfc => renesas}/Makefile (96%) rename drivers/pinctrl/{sh-pfc => renesas}/core.c (100%) rename drivers/pinctrl/{sh-pfc => renesas}/core.h (100%) rename drivers/pinctrl/{sh-pfc => renesas}/gpio.c (100%) rename drivers/pinctrl/{sh-pfc => renesas}/pfc-emev2.c (100%) rename drivers/pinctrl/{sh-pfc => renesas}/pfc-r8a73a4.c (100%) rename drivers/pinctrl/{sh-pfc => renesas}/pfc-r8a7740.c (100%) rename drivers/pinctrl/{sh-pfc => renesas}/pfc-r8a77470.c (100%) rename drivers/pinctrl/{sh-pfc => renesas}/pfc-r8a7778.c (100%) rename drivers/pinctrl/{sh-pfc => renesas}/pfc-r8a7779.c (100%) rename drivers/pinctrl/{sh-pfc => renesas}/pfc-r8a7790.c (100%) rename drivers/pinctrl/{sh-pfc => renesas}/pfc-r8a7791.c (100%) rename drivers/pinctrl/{sh-pfc => renesas}/pfc-r8a7792.c (100%) rename drivers/pinctrl/{sh-pfc => renesas}/pfc-r8a7794.c (100%) rename drivers/pinctrl/{sh-pfc => renesas}/pfc-r8a77950.c (100%) rename drivers/pinctrl/{sh-pfc => renesas}/pfc-r8a77951.c (100%) rename drivers/pinctrl/{sh-pfc => renesas}/pfc-r8a7796.c (99%) rename drivers/pinctrl/{sh-pfc => renesas}/pfc-r8a77965.c (99%) rename drivers/pinctrl/{sh-pfc => renesas}/pfc-r8a77970.c (99%) rename drivers/pinctrl/{sh-pfc => renesas}/pfc-r8a77980.c (99%) rename drivers/pinctrl/{sh-pfc => renesas}/pfc-r8a77990.c (99%) rename drivers/pinctrl/{sh-pfc => renesas}/pfc-r8a77995.c (99%) rename drivers/pinctrl/{sh-pfc => renesas}/pfc-sh7203.c (100%) rename drivers/pinctrl/{sh-pfc => renesas}/pfc-sh7264.c (100%) rename drivers/pinctrl/{sh-pfc => renesas}/pfc-sh7269.c (100%) rename drivers/pinctrl/{sh-pfc => renesas}/pfc-sh73a0.c (100%) rename drivers/pinctrl/{sh-pfc => renesas}/pfc-sh7720.c (100%) rename drivers/pinctrl/{sh-pfc => renesas}/pfc-sh7722.c (100%) rename drivers/pinctrl/{sh-pfc => renesas}/pfc-sh7723.c (100%) rename drivers/pinctrl/{sh-pfc => renesas}/pfc-sh7724.c (100%) rename drivers/pinctrl/{sh-pfc => renesas}/pfc-sh7734.c (100%) rename drivers/pinctrl/{sh-pfc => renesas}/pfc-sh7757.c (100%) rename drivers/pinctrl/{sh-pfc => renesas}/pfc-sh7785.c (100%) rename drivers/pinctrl/{sh-pfc => renesas}/pfc-sh7786.c (100%) rename drivers/pinctrl/{sh-pfc => renesas}/pfc-shx3.c (100%) rename drivers/pinctrl/{sh-pfc => renesas}/pinctrl-rza1.c (100%) rename drivers/pinctrl/{sh-pfc => renesas}/pinctrl-rza2.c (100%) rename drivers/pinctrl/{sh-pfc => renesas}/pinctrl-rzn1.c (100%) rename drivers/pinctrl/{sh-pfc => renesas}/pinctrl.c (100%) rename drivers/pinctrl/{sh-pfc => renesas}/sh_pfc.h (100%) diff --git a/MAINTAINERS b/MAINTAINERS index 73242e16e327..02c149ce75c8 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -13688,9 +13688,9 @@ PIN CONTROLLER - RENESAS M: Geert Uytterhoeven L: linux-renesas-soc@vger.kernel.org S: Supported -T: git git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git sh-pfc +T: git git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git renesas-pinctrl F: Documentation/devicetree/bindings/pinctrl/renesas,* -F: drivers/pinctrl/sh-pfc/ +F: drivers/pinctrl/renesas/ PIN CONTROLLER - SAMSUNG M: Tomasz Figa diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index f63c5a04a3f7..6ca1a6fc9756 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -383,8 +383,8 @@ source "drivers/pinctrl/nomadik/Kconfig" source "drivers/pinctrl/nuvoton/Kconfig" source "drivers/pinctrl/pxa/Kconfig" source "drivers/pinctrl/qcom/Kconfig" +source "drivers/pinctrl/renesas/Kconfig" source "drivers/pinctrl/samsung/Kconfig" -source "drivers/pinctrl/sh-pfc/Kconfig" source "drivers/pinctrl/spear/Kconfig" source "drivers/pinctrl/sprd/Kconfig" source "drivers/pinctrl/stm32/Kconfig" diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile index 1da9f28aecbd..113be648658f 100644 --- a/drivers/pinctrl/Makefile +++ b/drivers/pinctrl/Makefile @@ -59,8 +59,8 @@ obj-y += nomadik/ obj-$(CONFIG_ARCH_NPCM7XX) += nuvoton/ obj-$(CONFIG_PINCTRL_PXA) += pxa/ obj-$(CONFIG_ARCH_QCOM) += qcom/ +obj-$(CONFIG_PINCTRL_RENESAS) += renesas/ obj-$(CONFIG_PINCTRL_SAMSUNG) += samsung/ -obj-$(CONFIG_PINCTRL_SH_PFC) += sh-pfc/ obj-$(CONFIG_PINCTRL_SPEAR) += spear/ obj-y += sprd/ obj-$(CONFIG_PINCTRL_STM32) += stm32/ diff --git a/drivers/pinctrl/sh-pfc/Kconfig b/drivers/pinctrl/renesas/Kconfig similarity index 99% rename from drivers/pinctrl/sh-pfc/Kconfig rename to drivers/pinctrl/renesas/Kconfig index 9eb793cb464b..fc1f2611063b 100644 --- a/drivers/pinctrl/sh-pfc/Kconfig +++ b/drivers/pinctrl/renesas/Kconfig @@ -5,7 +5,7 @@ menu "Renesas pinctrl drivers" -config PINCTRL_SH_PFC +config PINCTRL_RENESAS bool "Renesas SoC pin control support" if COMPILE_TEST && !(ARCH_RENESAS || SUPERH) default y if ARCH_RENESAS || SUPERH select PINMUX diff --git a/drivers/pinctrl/sh-pfc/Makefile b/drivers/pinctrl/renesas/Makefile similarity index 96% rename from drivers/pinctrl/sh-pfc/Makefile rename to drivers/pinctrl/renesas/Makefile index 0b5640cf457b..c96008c9ab59 100644 --- a/drivers/pinctrl/sh-pfc/Makefile +++ b/drivers/pinctrl/renesas/Makefile @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 -obj-$(CONFIG_PINCTRL_SH_PFC) += core.o pinctrl.o +obj-$(CONFIG_PINCTRL_RENESAS) += core.o pinctrl.o obj-$(CONFIG_PINCTRL_SH_PFC_GPIO) += gpio.o -obj-$(CONFIG_PINCTRL_PFC_EMEV2) += pfc-emev2.o +obj-$(CONFIG_PINCTRL_PFC_EMEV2) += pfc-emev2.o obj-$(CONFIG_PINCTRL_PFC_R8A73A4) += pfc-r8a73a4.o obj-$(CONFIG_PINCTRL_PFC_R8A7740) += pfc-r8a7740.o obj-$(CONFIG_PINCTRL_PFC_R8A7742) += pfc-r8a7790.o diff --git a/drivers/pinctrl/sh-pfc/core.c b/drivers/pinctrl/renesas/core.c similarity index 100% rename from drivers/pinctrl/sh-pfc/core.c rename to drivers/pinctrl/renesas/core.c diff --git a/drivers/pinctrl/sh-pfc/core.h b/drivers/pinctrl/renesas/core.h similarity index 100% rename from drivers/pinctrl/sh-pfc/core.h rename to drivers/pinctrl/renesas/core.h diff --git a/drivers/pinctrl/sh-pfc/gpio.c b/drivers/pinctrl/renesas/gpio.c similarity index 100% rename from drivers/pinctrl/sh-pfc/gpio.c rename to drivers/pinctrl/renesas/gpio.c diff --git a/drivers/pinctrl/sh-pfc/pfc-emev2.c b/drivers/pinctrl/renesas/pfc-emev2.c similarity index 100% rename from drivers/pinctrl/sh-pfc/pfc-emev2.c rename to drivers/pinctrl/renesas/pfc-emev2.c diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c b/drivers/pinctrl/renesas/pfc-r8a73a4.c similarity index 100% rename from drivers/pinctrl/sh-pfc/pfc-r8a73a4.c rename to drivers/pinctrl/renesas/pfc-r8a73a4.c diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/renesas/pfc-r8a7740.c similarity index 100% rename from drivers/pinctrl/sh-pfc/pfc-r8a7740.c rename to drivers/pinctrl/renesas/pfc-r8a7740.c diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77470.c b/drivers/pinctrl/renesas/pfc-r8a77470.c similarity index 100% rename from drivers/pinctrl/sh-pfc/pfc-r8a77470.c rename to drivers/pinctrl/renesas/pfc-r8a77470.c diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c b/drivers/pinctrl/renesas/pfc-r8a7778.c similarity index 100% rename from drivers/pinctrl/sh-pfc/pfc-r8a7778.c rename to drivers/pinctrl/renesas/pfc-r8a7778.c diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7779.c b/drivers/pinctrl/renesas/pfc-r8a7779.c similarity index 100% rename from drivers/pinctrl/sh-pfc/pfc-r8a7779.c rename to drivers/pinctrl/renesas/pfc-r8a7779.c diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/renesas/pfc-r8a7790.c similarity index 100% rename from drivers/pinctrl/sh-pfc/pfc-r8a7790.c rename to drivers/pinctrl/renesas/pfc-r8a7790.c diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c b/drivers/pinctrl/renesas/pfc-r8a7791.c similarity index 100% rename from drivers/pinctrl/sh-pfc/pfc-r8a7791.c rename to drivers/pinctrl/renesas/pfc-r8a7791.c diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7792.c b/drivers/pinctrl/renesas/pfc-r8a7792.c similarity index 100% rename from drivers/pinctrl/sh-pfc/pfc-r8a7792.c rename to drivers/pinctrl/renesas/pfc-r8a7792.c diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7794.c b/drivers/pinctrl/renesas/pfc-r8a7794.c similarity index 100% rename from drivers/pinctrl/sh-pfc/pfc-r8a7794.c rename to drivers/pinctrl/renesas/pfc-r8a7794.c diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77950.c b/drivers/pinctrl/renesas/pfc-r8a77950.c similarity index 100% rename from drivers/pinctrl/sh-pfc/pfc-r8a77950.c rename to drivers/pinctrl/renesas/pfc-r8a77950.c diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77951.c b/drivers/pinctrl/renesas/pfc-r8a77951.c similarity index 100% rename from drivers/pinctrl/sh-pfc/pfc-r8a77951.c rename to drivers/pinctrl/renesas/pfc-r8a77951.c diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c b/drivers/pinctrl/renesas/pfc-r8a7796.c similarity index 99% rename from drivers/pinctrl/sh-pfc/pfc-r8a7796.c rename to drivers/pinctrl/renesas/pfc-r8a7796.c index a2496baca85d..55f0344a3d3e 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c +++ b/drivers/pinctrl/renesas/pfc-r8a7796.c @@ -4,7 +4,7 @@ * * Copyright (C) 2016-2019 Renesas Electronics Corp. * - * This file is based on the drivers/pinctrl/sh-pfc/pfc-r8a7795.c + * This file is based on the drivers/pinctrl/renesas/pfc-r8a7795.c * * R-Car Gen3 processor support - PFC hardware block. * diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77965.c b/drivers/pinctrl/renesas/pfc-r8a77965.c similarity index 99% rename from drivers/pinctrl/sh-pfc/pfc-r8a77965.c rename to drivers/pinctrl/renesas/pfc-r8a77965.c index 6616f5210b9d..7a50b9b69a7d 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a77965.c +++ b/drivers/pinctrl/renesas/pfc-r8a77965.c @@ -5,7 +5,7 @@ * Copyright (C) 2018 Jacopo Mondi * Copyright (C) 2016-2019 Renesas Electronics Corp. * - * This file is based on the drivers/pinctrl/sh-pfc/pfc-r8a7796.c + * This file is based on the drivers/pinctrl/renesas/pfc-r8a7796.c * * R-Car Gen3 processor support - PFC hardware block. * diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77970.c b/drivers/pinctrl/renesas/pfc-r8a77970.c similarity index 99% rename from drivers/pinctrl/sh-pfc/pfc-r8a77970.c rename to drivers/pinctrl/renesas/pfc-r8a77970.c index 9f7d9c9238fc..e8a0fc468eb2 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a77970.c +++ b/drivers/pinctrl/renesas/pfc-r8a77970.c @@ -5,7 +5,7 @@ * Copyright (C) 2016 Renesas Electronics Corp. * Copyright (C) 2017 Cogent Embedded, Inc. * - * This file is based on the drivers/pinctrl/sh-pfc/pfc-r8a7795.c + * This file is based on the drivers/pinctrl/renesas/pfc-r8a7795.c * * R-Car Gen3 processor support - PFC hardware block. * diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77980.c b/drivers/pinctrl/renesas/pfc-r8a77980.c similarity index 99% rename from drivers/pinctrl/sh-pfc/pfc-r8a77980.c rename to drivers/pinctrl/renesas/pfc-r8a77980.c index 1055f9853404..ebd07bebaeeb 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a77980.c +++ b/drivers/pinctrl/renesas/pfc-r8a77980.c @@ -5,7 +5,7 @@ * Copyright (C) 2018 Renesas Electronics Corp. * Copyright (C) 2018 Cogent Embedded, Inc. * - * This file is based on the drivers/pinctrl/sh-pfc/pfc-r8a7795.c + * This file is based on the drivers/pinctrl/renesas/pfc-r8a7795.c * * R-Car Gen3 processor support - PFC hardware block. * diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77990.c b/drivers/pinctrl/renesas/pfc-r8a77990.c similarity index 99% rename from drivers/pinctrl/sh-pfc/pfc-r8a77990.c rename to drivers/pinctrl/renesas/pfc-r8a77990.c index c926a59dd21c..aed04a4c6116 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a77990.c +++ b/drivers/pinctrl/renesas/pfc-r8a77990.c @@ -4,7 +4,7 @@ * * Copyright (C) 2018-2019 Renesas Electronics Corp. * - * This file is based on the drivers/pinctrl/sh-pfc/pfc-r8a7796.c + * This file is based on the drivers/pinctrl/renesas/pfc-r8a7796.c * * R8A7796 processor support - PFC hardware block. * diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c b/drivers/pinctrl/renesas/pfc-r8a77995.c similarity index 99% rename from drivers/pinctrl/sh-pfc/pfc-r8a77995.c rename to drivers/pinctrl/renesas/pfc-r8a77995.c index c10b756476b1..672251d86c2d 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c +++ b/drivers/pinctrl/renesas/pfc-r8a77995.c @@ -4,7 +4,7 @@ * * Copyright (C) 2017 Renesas Electronics Corp. * - * This file is based on the drivers/pinctrl/sh-pfc/pfc-r8a7796.c + * This file is based on the drivers/pinctrl/renesas/pfc-r8a7796.c * * R-Car Gen3 processor support - PFC hardware block. * diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7203.c b/drivers/pinctrl/renesas/pfc-sh7203.c similarity index 100% rename from drivers/pinctrl/sh-pfc/pfc-sh7203.c rename to drivers/pinctrl/renesas/pfc-sh7203.c diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7264.c b/drivers/pinctrl/renesas/pfc-sh7264.c similarity index 100% rename from drivers/pinctrl/sh-pfc/pfc-sh7264.c rename to drivers/pinctrl/renesas/pfc-sh7264.c diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7269.c b/drivers/pinctrl/renesas/pfc-sh7269.c similarity index 100% rename from drivers/pinctrl/sh-pfc/pfc-sh7269.c rename to drivers/pinctrl/renesas/pfc-sh7269.c diff --git a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c b/drivers/pinctrl/renesas/pfc-sh73a0.c similarity index 100% rename from drivers/pinctrl/sh-pfc/pfc-sh73a0.c rename to drivers/pinctrl/renesas/pfc-sh73a0.c diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7720.c b/drivers/pinctrl/renesas/pfc-sh7720.c similarity index 100% rename from drivers/pinctrl/sh-pfc/pfc-sh7720.c rename to drivers/pinctrl/renesas/pfc-sh7720.c diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7722.c b/drivers/pinctrl/renesas/pfc-sh7722.c similarity index 100% rename from drivers/pinctrl/sh-pfc/pfc-sh7722.c rename to drivers/pinctrl/renesas/pfc-sh7722.c diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7723.c b/drivers/pinctrl/renesas/pfc-sh7723.c similarity index 100% rename from drivers/pinctrl/sh-pfc/pfc-sh7723.c rename to drivers/pinctrl/renesas/pfc-sh7723.c diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7724.c b/drivers/pinctrl/renesas/pfc-sh7724.c similarity index 100% rename from drivers/pinctrl/sh-pfc/pfc-sh7724.c rename to drivers/pinctrl/renesas/pfc-sh7724.c diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7734.c b/drivers/pinctrl/renesas/pfc-sh7734.c similarity index 100% rename from drivers/pinctrl/sh-pfc/pfc-sh7734.c rename to drivers/pinctrl/renesas/pfc-sh7734.c diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7757.c b/drivers/pinctrl/renesas/pfc-sh7757.c similarity index 100% rename from drivers/pinctrl/sh-pfc/pfc-sh7757.c rename to drivers/pinctrl/renesas/pfc-sh7757.c diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7785.c b/drivers/pinctrl/renesas/pfc-sh7785.c similarity index 100% rename from drivers/pinctrl/sh-pfc/pfc-sh7785.c rename to drivers/pinctrl/renesas/pfc-sh7785.c diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7786.c b/drivers/pinctrl/renesas/pfc-sh7786.c similarity index 100% rename from drivers/pinctrl/sh-pfc/pfc-sh7786.c rename to drivers/pinctrl/renesas/pfc-sh7786.c diff --git a/drivers/pinctrl/sh-pfc/pfc-shx3.c b/drivers/pinctrl/renesas/pfc-shx3.c similarity index 100% rename from drivers/pinctrl/sh-pfc/pfc-shx3.c rename to drivers/pinctrl/renesas/pfc-shx3.c diff --git a/drivers/pinctrl/sh-pfc/pinctrl-rza1.c b/drivers/pinctrl/renesas/pinctrl-rza1.c similarity index 100% rename from drivers/pinctrl/sh-pfc/pinctrl-rza1.c rename to drivers/pinctrl/renesas/pinctrl-rza1.c diff --git a/drivers/pinctrl/sh-pfc/pinctrl-rza2.c b/drivers/pinctrl/renesas/pinctrl-rza2.c similarity index 100% rename from drivers/pinctrl/sh-pfc/pinctrl-rza2.c rename to drivers/pinctrl/renesas/pinctrl-rza2.c diff --git a/drivers/pinctrl/sh-pfc/pinctrl-rzn1.c b/drivers/pinctrl/renesas/pinctrl-rzn1.c similarity index 100% rename from drivers/pinctrl/sh-pfc/pinctrl-rzn1.c rename to drivers/pinctrl/renesas/pinctrl-rzn1.c diff --git a/drivers/pinctrl/sh-pfc/pinctrl.c b/drivers/pinctrl/renesas/pinctrl.c similarity index 100% rename from drivers/pinctrl/sh-pfc/pinctrl.c rename to drivers/pinctrl/renesas/pinctrl.c diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/renesas/sh_pfc.h similarity index 100% rename from drivers/pinctrl/sh-pfc/sh_pfc.h rename to drivers/pinctrl/renesas/sh_pfc.h From 540d9757cea8274a44d69cbadcff5b8c381bae8d Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 9 Sep 2020 15:15:34 +0200 Subject: [PATCH 192/433] pinctrl: renesas: Reintroduce SH_PFC for common sh-pfc code Most, but not all, Renesas pin control drivers use the "sh-pfc" pin control framework. As of commit 8449bfa9e6a9f7ec ("pinctrl: sh-pfc: Collect Renesas related CONFIGs in one place"), the code for this framework is always built when Renesas SoC pin control support is enabled, regardless of whether the enabled pin control drivers need it or not. Fix this by reintroducing the CONFIG_SH_PFC symbol to control inclusion of the "sh-pfc" framework and its dependencies, and selecting it when needed. This reduces kernel size of a typical RZ/A1 or RZ/A2 kernel by more than 6 resp. 11 KiB. Signed-off-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20200909131534.12897-4-geert+renesas@glider.be --- drivers/pinctrl/renesas/Kconfig | 52 ++++++++++++++++++++++++++------ drivers/pinctrl/renesas/Makefile | 2 +- 2 files changed, 43 insertions(+), 11 deletions(-) diff --git a/drivers/pinctrl/renesas/Kconfig b/drivers/pinctrl/renesas/Kconfig index fc1f2611063b..e941b8440dbc 100644 --- a/drivers/pinctrl/renesas/Kconfig +++ b/drivers/pinctrl/renesas/Kconfig @@ -8,9 +8,6 @@ menu "Renesas pinctrl drivers" config PINCTRL_RENESAS bool "Renesas SoC pin control support" if COMPILE_TEST && !(ARCH_RENESAS || SUPERH) default y if ARCH_RENESAS || SUPERH - select PINMUX - select PINCONF - select GENERIC_PINCONF select PINCTRL_PFC_EMEV2 if ARCH_EMEV2 select PINCTRL_PFC_R8A73A4 if ARCH_R8A73A4 select PINCTRL_PFC_R8A7740 if ARCH_R8A7740 @@ -55,68 +52,95 @@ config PINCTRL_RENESAS help This enables pin control drivers for Renesas SuperH and ARM platforms -config PINCTRL_SH_PFC_GPIO - select GPIOLIB +config PINCTRL_SH_PFC bool + select GENERIC_PINCONF + select PINMUX + select PINCONF + help + This enables common pin control functionality for EMMA Mobile, R-Car, + R-Mobile, RZ/G, SH, and SH-Mobile platforms. + +config PINCTRL_SH_PFC_GPIO + bool + select GPIOLIB + select PINCTRL_SH_PFC help This enables pin control and GPIO drivers for SH/SH Mobile platforms config PINCTRL_SH_FUNC_GPIO - select PINCTRL_SH_PFC_GPIO bool + select PINCTRL_SH_PFC_GPIO help This enables legacy function GPIOs for SH platforms config PINCTRL_PFC_EMEV2 bool "pin control support for Emma Mobile EV2" if COMPILE_TEST + select PINCTRL_SH_PFC config PINCTRL_PFC_R8A77995 bool "pin control support for R-Car D3" if COMPILE_TEST + select PINCTRL_SH_PFC config PINCTRL_PFC_R8A7794 bool "pin control support for R-Car E2" if COMPILE_TEST + select PINCTRL_SH_PFC config PINCTRL_PFC_R8A77990 bool "pin control support for R-Car E3" if COMPILE_TEST + select PINCTRL_SH_PFC config PINCTRL_PFC_R8A7779 bool "pin control support for R-Car H1" if COMPILE_TEST + select PINCTRL_SH_PFC config PINCTRL_PFC_R8A7790 bool "pin control support for R-Car H2" if COMPILE_TEST + select PINCTRL_SH_PFC config PINCTRL_PFC_R8A77950 bool "pin control support for R-Car H3 ES1.x" if COMPILE_TEST + select PINCTRL_SH_PFC config PINCTRL_PFC_R8A77951 bool "pin control support for R-Car H3 ES2.0+" if COMPILE_TEST + select PINCTRL_SH_PFC config PINCTRL_PFC_R8A7778 bool "pin control support for R-Car M1A" if COMPILE_TEST + select PINCTRL_SH_PFC config PINCTRL_PFC_R8A7793 bool "pin control support for R-Car M2-N" if COMPILE_TEST + select PINCTRL_SH_PFC config PINCTRL_PFC_R8A7791 bool "pin control support for R-Car M2-W" if COMPILE_TEST + select PINCTRL_SH_PFC config PINCTRL_PFC_R8A77965 bool "pin control support for R-Car M3-N" if COMPILE_TEST + select PINCTRL_SH_PFC config PINCTRL_PFC_R8A77960 bool "pin control support for R-Car M3-W" if COMPILE_TEST + select PINCTRL_SH_PFC config PINCTRL_PFC_R8A77961 bool "pin control support for R-Car M3-W+" if COMPILE_TEST + select PINCTRL_SH_PFC config PINCTRL_PFC_R8A7792 bool "pin control support for R-Car V2H" if COMPILE_TEST + select PINCTRL_SH_PFC config PINCTRL_PFC_R8A77980 bool "pin control support for R-Car V3H" if COMPILE_TEST + select PINCTRL_SH_PFC config PINCTRL_PFC_R8A77970 bool "pin control support for R-Car V3M" if COMPILE_TEST + select PINCTRL_SH_PFC config PINCTRL_PFC_R8A7740 bool "pin control support for R-Mobile A1" if COMPILE_TEST @@ -130,10 +154,10 @@ config PINCTRL_RZA1 bool "pin control support for RZ/A1" depends on OF depends on ARCH_R7S72100 || COMPILE_TEST - select GPIOLIB + select GENERIC_PINCONF select GENERIC_PINCTRL_GROUPS select GENERIC_PINMUX_FUNCTIONS - select GENERIC_PINCONF + select GPIOLIB help This selects pinctrl driver for Renesas RZ/A1 platforms. @@ -141,39 +165,47 @@ config PINCTRL_RZA2 bool "pin control support for RZ/A2" depends on OF depends on ARCH_R7S9210 || COMPILE_TEST - select GPIOLIB select GENERIC_PINCTRL_GROUPS select GENERIC_PINMUX_FUNCTIONS - select GENERIC_PINCONF + select GPIOLIB help This selects GPIO and pinctrl driver for Renesas RZ/A2 platforms. config PINCTRL_PFC_R8A77470 bool "pin control support for RZ/G1C" if COMPILE_TEST + select PINCTRL_SH_PFC config PINCTRL_PFC_R8A7745 bool "pin control support for RZ/G1E" if COMPILE_TEST + select PINCTRL_SH_PFC config PINCTRL_PFC_R8A7742 bool "pin control support for RZ/G1H" if COMPILE_TEST + select PINCTRL_SH_PFC config PINCTRL_PFC_R8A7743 bool "pin control support for RZ/G1M" if COMPILE_TEST + select PINCTRL_SH_PFC config PINCTRL_PFC_R8A7744 bool "pin control support for RZ/G1N" if COMPILE_TEST + select PINCTRL_SH_PFC config PINCTRL_PFC_R8A774C0 bool "pin control support for RZ/G2E" if COMPILE_TEST + select PINCTRL_SH_PFC config PINCTRL_PFC_R8A774E1 bool "pin control support for RZ/G2H" if COMPILE_TEST + select PINCTRL_SH_PFC config PINCTRL_PFC_R8A774A1 bool "pin control support for RZ/G2M" if COMPILE_TEST + select PINCTRL_SH_PFC config PINCTRL_PFC_R8A774B1 bool "pin control support for RZ/G2N" if COMPILE_TEST + select PINCTRL_SH_PFC config PINCTRL_RZN1 bool "pin control support for RZ/N1" diff --git a/drivers/pinctrl/renesas/Makefile b/drivers/pinctrl/renesas/Makefile index c96008c9ab59..1f6d7dd019d8 100644 --- a/drivers/pinctrl/renesas/Makefile +++ b/drivers/pinctrl/renesas/Makefile @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-2.0 -obj-$(CONFIG_PINCTRL_RENESAS) += core.o pinctrl.o +obj-$(CONFIG_PINCTRL_SH_PFC) += core.o pinctrl.o obj-$(CONFIG_PINCTRL_SH_PFC_GPIO) += gpio.o obj-$(CONFIG_PINCTRL_PFC_EMEV2) += pfc-emev2.o obj-$(CONFIG_PINCTRL_PFC_R8A73A4) += pfc-r8a73a4.o From 488e5947d975e161ff51407538248d42ef0011d1 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 8 Sep 2020 16:59:22 +0200 Subject: [PATCH 193/433] dt-bindings: power: Correct interrupt flags in examples GPIO_ACTIVE_x flags are not correct in the context of interrupt flags. These are simple defines so they could be used in DTS but they will not have the same meaning: 1. GPIO_ACTIVE_HIGH = 0 = IRQ_TYPE_NONE 2. GPIO_ACTIVE_LOW = 1 = IRQ_TYPE_EDGE_RISING Correct the interrupt flags, assuming the author of the code wanted some logical behavior behind the name "ACTIVE_xxx", this is: ACTIVE_LOW => IRQ_TYPE_LEVEL_LOW Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20200908145922.4502-1-krzk@kernel.org Signed-off-by: Rob Herring --- .../devicetree/bindings/power/supply/act8945a-charger.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/power/supply/act8945a-charger.txt b/Documentation/devicetree/bindings/power/supply/act8945a-charger.txt index c7dfb7cecf40..cb737a9e1f16 100644 --- a/Documentation/devicetree/bindings/power/supply/act8945a-charger.txt +++ b/Documentation/devicetree/bindings/power/supply/act8945a-charger.txt @@ -33,7 +33,7 @@ Example: pinctrl-names = "default"; pinctrl-0 = <&pinctrl_charger_chglev &pinctrl_charger_lbo &pinctrl_charger_irq>; interrupt-parent = <&pioA>; - interrupts = <45 GPIO_ACTIVE_LOW>; + interrupts = <45 IRQ_TYPE_LEVEL_LOW>; active-semi,chglev-gpios = <&pioA 12 GPIO_ACTIVE_HIGH>; active-semi,lbo-gpios = <&pioA 72 GPIO_ACTIVE_LOW>; From 73d3e43f9813edee4d7d9b95bd56ed89f7d807cf Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Wed, 9 Sep 2020 11:50:46 +0100 Subject: [PATCH 194/433] dt-bindings: watchdog: sp-805: Convert to Json-schema Convert the ARM SP-805 watchdog IP DT binding over to Json-schema. A straight-forward conversion, but the requirement for providing two clocks got strengthened from "should" to "must". Acked-by: Viresh Kumar Signed-off-by: Andre Przywara Link: https://lore.kernel.org/r/20200909105046.160991-1-andre.przywara@arm.com Signed-off-by: Rob Herring --- .../bindings/watchdog/arm,sp805.txt | 32 --------- .../bindings/watchdog/arm,sp805.yaml | 71 +++++++++++++++++++ 2 files changed, 71 insertions(+), 32 deletions(-) delete mode 100644 Documentation/devicetree/bindings/watchdog/arm,sp805.txt create mode 100644 Documentation/devicetree/bindings/watchdog/arm,sp805.yaml diff --git a/Documentation/devicetree/bindings/watchdog/arm,sp805.txt b/Documentation/devicetree/bindings/watchdog/arm,sp805.txt deleted file mode 100644 index bee6f1f0e41b..000000000000 --- a/Documentation/devicetree/bindings/watchdog/arm,sp805.txt +++ /dev/null @@ -1,32 +0,0 @@ -ARM AMBA Primecell SP805 Watchdog - -SP805 WDT is a ARM Primecell Peripheral and has a standard-id register that -can be used to identify the peripheral type, vendor, and revision. -This value can be used for driver matching. - -As SP805 WDT is a primecell IP, it follows the base bindings specified in -'arm/primecell.txt' - -Required properties: -- compatible: Should be "arm,sp805" & "arm,primecell" -- reg: Should contain location and length for watchdog timer register -- clocks: Clocks driving the watchdog timer hardware. This list should be - 2 clocks. With 2 clocks, the order is wdog_clk, apb_pclk - wdog_clk can be equal to or be a sub-multiple of the apb_pclk - frequency -- clock-names: Shall be "wdog_clk" for first clock and "apb_pclk" for the - second one - -Optional properties: -- interrupts: Should specify WDT interrupt number -- timeout-sec: Should specify default WDT timeout in seconds. If unset, the - default timeout is determined by the driver - -Example: - watchdog@66090000 { - compatible = "arm,sp805", "arm,primecell"; - reg = <0x66090000 0x1000>; - interrupts = ; - clocks = <&wdt_clk>, <&apb_pclk>; - clock-names = "wdog_clk", "apb_pclk"; - }; diff --git a/Documentation/devicetree/bindings/watchdog/arm,sp805.yaml b/Documentation/devicetree/bindings/watchdog/arm,sp805.yaml new file mode 100644 index 000000000000..a69cac8ec208 --- /dev/null +++ b/Documentation/devicetree/bindings/watchdog/arm,sp805.yaml @@ -0,0 +1,71 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/watchdog/arm,sp805.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ARM AMBA Primecell SP805 Watchdog + +maintainers: + - Viresh Kumar + +description: |+ + The Arm SP805 IP implements a watchdog device, which triggers an interrupt + after a configurable time period. If that interrupt has not been serviced + when the next interrupt would be triggered, the reset signal is asserted. + +allOf: + - $ref: /schemas/watchdog/watchdog.yaml# + +# Need a custom select here or 'arm,primecell' will match on lots of nodes +select: + properties: + compatible: + contains: + const: arm,sp805 + required: + - compatible + +properties: + compatible: + items: + - const: arm,sp805 + - const: arm,primecell + + interrupts: + maxItems: 1 + + reg: + maxItems: 1 + + clocks: + description: | + Clocks driving the watchdog timer hardware. The first clock is used + for the actual watchdog counter. The second clock drives the register + interface. + minItems: 2 + maxItems: 2 + + clock-names: + items: + - const: wdog_clk + - const: apb_pclk + +required: + - compatible + - reg + - clocks + - clock-names + +unevaluatedProperties: false + +examples: + - | + #include + watchdog@66090000 { + compatible = "arm,sp805", "arm,primecell"; + reg = <0x66090000 0x1000>; + interrupts = ; + clocks = <&wdt_clk>, <&apb_pclk>; + clock-names = "wdog_clk", "apb_pclk"; + }; From 5f40bb39ad555066589bfdcbfaaab1fad56ce1b0 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Thu, 10 Sep 2020 18:20:20 +0200 Subject: [PATCH 195/433] of: properties of reserved-memory nodes The reusable and the no-map property are mutually exclusive. Clarify this in the documentation. Acked-by: Grant Likely Signed-off-by: Heinrich Schuchardt Link: https://lore.kernel.org/r/20200910162020.3927-1-xypron.glpk@gmx.de Signed-off-by: Rob Herring --- .../devicetree/bindings/reserved-memory/reserved-memory.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt b/Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt index 4dd20de6977f..e8d3096d922c 100644 --- a/Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt +++ b/Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt @@ -64,6 +64,9 @@ reusable (optional) - empty property system can use that region to store volatile or cached data that can be otherwise regenerated or migrated elsewhere. +A node must not carry both the no-map and the reusable property as these are +logically contradictory. + Linux implementation note: - If a "linux,cma-default" property is present, then Linux will use the region for the default pool of the contiguous memory allocator. From 73f76a41c4ed7def5dc2ec7c33c7e9f94e601a20 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 10 Sep 2020 20:47:06 +0200 Subject: [PATCH 196/433] dt-bindings: example: Extend based on practice Extend the example schema with common rules which seems to be not that obvious: 1. Expecting arrays of phandles to be always ordered, regardless if "xxx-names" is provided (e.g. clocks), 2. Add example of altering a property based on presence of other property, 3. Document usage of unevaluatedProperties. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20200910184706.9677-1-krzk@kernel.org Signed-off-by: Rob Herring --- .../devicetree/bindings/example-schema.yaml | 33 ++++++++++++++----- 1 file changed, 25 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/example-schema.yaml b/Documentation/devicetree/bindings/example-schema.yaml index 822975dbeafa..4552f2b988d0 100644 --- a/Documentation/devicetree/bindings/example-schema.yaml +++ b/Documentation/devicetree/bindings/example-schema.yaml @@ -81,6 +81,8 @@ properties: maxItems: 1 description: bus clock. A description is only needed for a single item if there's something unique to add. + The items should be have a fixed order, so pattern matching names are + discouraged. clock-names: items: @@ -97,6 +99,8 @@ properties: A variable number of interrupts warrants a description of what conditions affect the number of interrupts. Otherwise, descriptions on standard properties are not necessary. + The items should be have a fixed order, so pattern matching names are + discouraged. interrupt-names: # minItems must be specified here because the default would be 2 @@ -196,14 +200,24 @@ required: # # If the conditionals become too unweldy, then it may be better to just split # the binding into separate schema documents. -if: - properties: - compatible: - contains: - const: vendor,soc2-ip -then: - required: - - foo-supply +allOf: + - if: + properties: + compatible: + contains: + const: vendor,soc2-ip + then: + required: + - foo-supply + # Altering schema depending on presence of properties is usually done by + # dependencies (see above), however some adjustments might require if: + - if: + required: + - vendor,bool-property + then: + properties: + vendor,int-property: + enum: [2, 4, 6] # Ideally, the schema should have this line otherwise any other properties # present are allowed. There's a few common properties such as 'status' and @@ -211,6 +225,9 @@ then: # # This can't be used in cases where another schema is referenced # (i.e. allOf: [{$ref: ...}]). +# If and only if another schema is referenced and arbitrary children nodes can +# appear, "unevaluatedProperties: false" could be used. Typical example is I2C +# controller where no name pattern matching for children can be added. additionalProperties: false examples: From 57cee071311800c59bb8735f24d83c95701dc04f Mon Sep 17 00:00:00 2001 From: YueHaibing Date: Wed, 9 Sep 2020 21:51:03 +0800 Subject: [PATCH 197/433] serial: 8250_pci: Remove unused function get_pci_irq() It is not used since commit 8428413b1d14 ("serial: 8250_pci: Implement MSI(-X) support") Signed-off-by: YueHaibing Link: https://lore.kernel.org/r/20200909135103.17768-1-yuehaibing@huawei.com Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/8250/8250_pci.c | 9 --------- 1 file changed, 9 deletions(-) diff --git a/drivers/tty/serial/8250/8250_pci.c b/drivers/tty/serial/8250/8250_pci.c index 85810b8b9d20..824c44ec25a8 100644 --- a/drivers/tty/serial/8250/8250_pci.c +++ b/drivers/tty/serial/8250/8250_pci.c @@ -2795,15 +2795,6 @@ static struct pci_serial_quirk *find_quirk(struct pci_dev *dev) return quirk; } -static inline int get_pci_irq(struct pci_dev *dev, - const struct pciserial_board *board) -{ - if (board->flags & FL_NOIRQ) - return 0; - else - return dev->irq; -} - /* * This is the configuration table for all of the PCI serial boards * which we support. It is directly indexed by the pci_board_num_t enum From 4be002f1dec8418d88bbc556a0dfbaa9adc38ab0 Mon Sep 17 00:00:00 2001 From: Jason Yan Date: Sat, 12 Sep 2020 11:38:34 +0800 Subject: [PATCH 198/433] serial: ucc_uart: make qe_uart_set_mctrl() static This eliminates the following sparse warning: drivers/tty/serial/ucc_uart.c:286:6: warning: symbol 'qe_uart_set_mctrl' was not declared. Should it be static? Reported-by: Hulk Robot Acked-by: Jiri Slaby Signed-off-by: Jason Yan Link: https://lore.kernel.org/r/20200912033834.143166-1-yanaijie@huawei.com Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/ucc_uart.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/tty/serial/ucc_uart.c b/drivers/tty/serial/ucc_uart.c index 3c8c662c69e2..d6a8604157ab 100644 --- a/drivers/tty/serial/ucc_uart.c +++ b/drivers/tty/serial/ucc_uart.c @@ -283,7 +283,7 @@ static unsigned int qe_uart_tx_empty(struct uart_port *port) * don't need that support. This function must exist, however, otherwise * the kernel will panic. */ -void qe_uart_set_mctrl(struct uart_port *port, unsigned int mctrl) +static void qe_uart_set_mctrl(struct uart_port *port, unsigned int mctrl) { } From f28295cc8ce14b7a78bc3900eaba2e6c34111595 Mon Sep 17 00:00:00 2001 From: Hsin-Yi Wang Date: Tue, 15 Sep 2020 13:48:25 +0800 Subject: [PATCH 199/433] tty: serial: print earlycon info after match->setup 8250 devices may modify iotype in their own earlycon setup. For example: 8250_mtk and 8250_uniphier force iotype to be MMIO32. Print earlycon info after match->setup to reflect actual earlycon info. Signed-off-by: Hsin-Yi Wang Link: https://lore.kernel.org/r/20200915054825.3289105-1-hsinyi@chromium.org Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/earlycon.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/tty/serial/earlycon.c b/drivers/tty/serial/earlycon.c index 2ae9190b64bb..b70877932d47 100644 --- a/drivers/tty/serial/earlycon.c +++ b/drivers/tty/serial/earlycon.c @@ -56,7 +56,6 @@ static void __init earlycon_init(struct earlycon_device *device, const char *name) { struct console *earlycon = device->con; - struct uart_port *port = &device->port; const char *s; size_t len; @@ -70,6 +69,12 @@ static void __init earlycon_init(struct earlycon_device *device, len = s - name; strlcpy(earlycon->name, name, min(len + 1, sizeof(earlycon->name))); earlycon->data = &early_console_dev; +} + +static void __init earlycon_print_info(struct earlycon_device *device) +{ + struct console *earlycon = device->con; + struct uart_port *port = &device->port; if (port->iotype == UPIO_MEM || port->iotype == UPIO_MEM16 || port->iotype == UPIO_MEM32 || port->iotype == UPIO_MEM32BE) @@ -140,6 +145,7 @@ static int __init register_earlycon(char *buf, const struct earlycon_id *match) earlycon_init(&early_console_dev, match->name); err = match->setup(&early_console_dev, buf); + earlycon_print_info(&early_console_dev); if (err < 0) return err; if (!early_console_dev.con->write) @@ -302,6 +308,7 @@ int __init of_setup_earlycon(const struct earlycon_id *match, } earlycon_init(&early_console_dev, match->name); err = match->setup(&early_console_dev, options); + earlycon_print_info(&early_console_dev); if (err < 0) return err; if (!early_console_dev.con->write) From ea4de367e57d53b37ecb32cea3b5c753162b070a Mon Sep 17 00:00:00 2001 From: Hsin-Yi Wang Date: Tue, 15 Sep 2020 13:48:27 +0800 Subject: [PATCH 200/433] tty: serial: 8250_mtk: set regshift for mmio32 To use mmio32, we also need to set regshift. Signed-off-by: Hsin-Yi Wang Acked-by: Eddie Huang Link: https://lore.kernel.org/r/20200915054825.3289105-2-hsinyi@chromium.org Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/8250/8250_mtk.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/tty/serial/8250/8250_mtk.c b/drivers/tty/serial/8250/8250_mtk.c index 7b0dec14c8b8..41f4120abdf2 100644 --- a/drivers/tty/serial/8250/8250_mtk.c +++ b/drivers/tty/serial/8250/8250_mtk.c @@ -669,6 +669,7 @@ static int __init early_mtk8250_setup(struct earlycon_device *device, return -ENODEV; device->port.iotype = UPIO_MEM32; + device->port.regshift = 2; return early_serial8250_setup(device, NULL); } From cb91e7519d5d81ebbe66f559d13949b1da4537c9 Mon Sep 17 00:00:00 2001 From: Qinglang Miao Date: Wed, 16 Sep 2020 14:21:38 +0800 Subject: [PATCH 201/433] serial: pmac_zilog: use for_each_child_of_node() macro Use for_each_child_of_node() macro instead of open coding it. Signed-off-by: Qinglang Miao Link: https://lore.kernel.org/r/20200916062138.191188-1-miaoqinglang@huawei.com Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/pmac_zilog.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/tty/serial/pmac_zilog.c b/drivers/tty/serial/pmac_zilog.c index 96e7aa479961..063484b22523 100644 --- a/drivers/tty/serial/pmac_zilog.c +++ b/drivers/tty/serial/pmac_zilog.c @@ -1644,7 +1644,7 @@ static int __init pmz_probe(void) * TODO: Add routines with proper locking to do that... */ node_a = node_b = NULL; - for (np = NULL; (np = of_get_next_child(node_p, np)) != NULL;) { + for_each_child_of_node(node_p, np) { if (of_node_name_prefix(np, "ch-a")) node_a = of_node_get(np); else if (of_node_name_prefix(np, "ch-b")) From 2ec812a04ff4ef8d4cba4005b7526691333a2973 Mon Sep 17 00:00:00 2001 From: Douglas Anderson Date: Fri, 11 Sep 2020 08:00:57 -0700 Subject: [PATCH 202/433] tty: serial: qcom_geni_serial: 115.2 is a better console default than 9600 Commit c5cbc78acf69 ("tty: serial: qcom_geni_serial: Initialize baud in qcom_geni_console_setup") fixed a bug by initting a variable that was used in some cases without initialization. However, the "default" baud rate picked by that CL was probably not the best choice. The chances that anyone out there is trying to run a system with kernel messages piped out over a 9600 baud serial port is just about nil. Console messages are printed in a blocking manner. At 9600 baud we print about 1 character per millisecond which means that printing a 40-byte message to the console will take ~40 ms. While it would probably work, it's going to make boot _very_ slow and probably cause the occasional timeout here and there in drivers (heck, even at 115200 console delays can wreck havoc). This has already bit at least two people that I'm aware of that tried to enable serial console by just adding "console=ttyMSM0" (instead of "console=ttyMSM0,115200n8") to the command line, so it seems like it'd be nice to fix. Let's switch the default to 115200. Reviewed-by: Nathan Chancellor Reviewed-by: Akash Asthana Reviewed-by: Bjorn Andersson Signed-off-by: Douglas Anderson Link: https://lore.kernel.org/r/20200911080054.1.I4c00b921c2f17b6988688046fa7be0f729f8d591@changeid Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/qcom_geni_serial.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/tty/serial/qcom_geni_serial.c b/drivers/tty/serial/qcom_geni_serial.c index f0b1b47c3abc..e390ffc8bbbd 100644 --- a/drivers/tty/serial/qcom_geni_serial.c +++ b/drivers/tty/serial/qcom_geni_serial.c @@ -1107,7 +1107,7 @@ static int qcom_geni_console_setup(struct console *co, char *options) { struct uart_port *uport; struct qcom_geni_serial_port *port; - int baud = 9600; + int baud = 115200; int bits = 8; int parity = 'n'; int flow = 'n'; From a4ced376fed0f90e5da56aad1612fc37ed5cfdac Mon Sep 17 00:00:00 2001 From: satya priya Date: Thu, 10 Sep 2020 18:23:58 +0530 Subject: [PATCH 203/433] tty: serial: qcom_geni_serial: Fix the UART wakeup issue As a part of system suspend uart_port_suspend is called from the Serial driver, which calls set_mctrl passing mctrl as 0. This makes RFR high(NOT_READY) during suspend. Due to this BT SoC is not able to send wakeup bytes to UART during suspend. Include if check for non-suspend case to keep RFR low during suspend. Signed-off-by: satya priya Reviewed-by: Akash Asthana Reviewed-by: Bjorn Andersson Link: https://lore.kernel.org/r/1599742438-16811-5-git-send-email-skakit@codeaurora.org Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/qcom_geni_serial.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/tty/serial/qcom_geni_serial.c b/drivers/tty/serial/qcom_geni_serial.c index e390ffc8bbbd..8da2eb2d1090 100644 --- a/drivers/tty/serial/qcom_geni_serial.c +++ b/drivers/tty/serial/qcom_geni_serial.c @@ -242,7 +242,7 @@ static void qcom_geni_serial_set_mctrl(struct uart_port *uport, if (mctrl & TIOCM_LOOP) port->loopback = RX_TX_CTS_RTS_SORTED; - if (!(mctrl & TIOCM_RTS)) + if (!(mctrl & TIOCM_RTS) && !uport->suspended) uart_manual_rfr = UART_MANUAL_RFR_EN | UART_RFR_NOT_READY; writel(uart_manual_rfr, uport->membase + SE_UART_MANUAL_RFR); } From e3976af5a475b7c189d1fabec557a6e0aefa7fcd Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Tue, 8 Sep 2020 14:34:47 +0200 Subject: [PATCH 204/433] scsi/qla4xxx: Convert to SPDX license identifiers All files in this driver directory contain the following notice: See LICENSE.qla4xxx for copyright and licensing details. LICENSE.qla4xxx can be found in Documentation/scsi/. The file contains: - A copyright notice This copyright notice is redundant as all files contain the same copyright notice already - A license notice You may modify and redistribute the device driver code under the GNU General Public License (a copy of which is attached hereto as Exhibit A) published by the Free Software Foundation (version 2). - The full GPLv2 license text This can be replaced with the corresponding SPDX license identifier (GPL-2.0-only) in the source files which reference this license file. - The full GPLv2 license text A redundant copy of LICENSES/preferred/GPL-2.0 Remove the notices and add the SPDX license identifier GPL-2.0-only to the source files. Finally remove the now redundant LICENSE.qla4xxx file. Reviewed-by: Richard Fontana Reviewed-by: Jilayne Lovejoy Reviewed-by: Alexios Zavras Signed-off-by: Thomas Gleixner Signed-off-by: Lukas Bulwahn Acked-by: Nilesh Javali Signed-off-by: Greg Kroah-Hartman --- Documentation/scsi/LICENSE.qla4xxx | 289 ----------------------------- MAINTAINERS | 1 - drivers/scsi/qla4xxx/ql4_83xx.c | 3 +- drivers/scsi/qla4xxx/ql4_83xx.h | 3 +- drivers/scsi/qla4xxx/ql4_attr.c | 3 +- drivers/scsi/qla4xxx/ql4_bsg.c | 3 +- drivers/scsi/qla4xxx/ql4_bsg.h | 3 +- drivers/scsi/qla4xxx/ql4_dbg.c | 3 +- drivers/scsi/qla4xxx/ql4_dbg.h | 3 +- drivers/scsi/qla4xxx/ql4_def.h | 3 +- drivers/scsi/qla4xxx/ql4_fw.h | 3 +- drivers/scsi/qla4xxx/ql4_glbl.h | 3 +- drivers/scsi/qla4xxx/ql4_init.c | 3 +- drivers/scsi/qla4xxx/ql4_inline.h | 3 +- drivers/scsi/qla4xxx/ql4_iocb.c | 3 +- drivers/scsi/qla4xxx/ql4_isr.c | 3 +- drivers/scsi/qla4xxx/ql4_mbx.c | 3 +- drivers/scsi/qla4xxx/ql4_nvram.c | 3 +- drivers/scsi/qla4xxx/ql4_nvram.h | 3 +- drivers/scsi/qla4xxx/ql4_nx.c | 3 +- drivers/scsi/qla4xxx/ql4_nx.h | 3 +- drivers/scsi/qla4xxx/ql4_os.c | 3 +- drivers/scsi/qla4xxx/ql4_version.h | 3 +- 23 files changed, 21 insertions(+), 332 deletions(-) delete mode 100644 Documentation/scsi/LICENSE.qla4xxx diff --git a/Documentation/scsi/LICENSE.qla4xxx b/Documentation/scsi/LICENSE.qla4xxx deleted file mode 100644 index fcc27ad27d74..000000000000 --- a/Documentation/scsi/LICENSE.qla4xxx +++ /dev/null @@ -1,289 +0,0 @@ -Copyright (c) 2003-2013 QLogic Corporation -QLogic Linux iSCSI Driver - -This program includes a device driver for Linux 3.x. -You may modify and redistribute the device driver code under the -GNU General Public License (a copy of which is attached hereto as -Exhibit A) published by the Free Software Foundation (version 2). - - -EXHIBIT A - - GNU GENERAL PUBLIC LICENSE - Version 2, June 1991 - - Copyright (C) 1989, 1991 Free Software Foundation, Inc. - 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA - Everyone is permitted to copy and distribute verbatim copies - of this license document, but changing it is not allowed. - - Preamble - - The licenses for most software are designed to take away your -freedom to share and change it. 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For software which is copyrighted by the Free -Software Foundation, write to the Free Software Foundation; we sometimes -make exceptions for this. Our decision will be guided by the two goals -of preserving the free status of all derivatives of our free software and -of promoting the sharing and reuse of software generally. - - NO WARRANTY - - 11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY -FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN -OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES -PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED -OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS -TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE -PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING, -REPAIR OR CORRECTION. - - 12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING -WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR -REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, -INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING -OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED -TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY -YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER -PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE -POSSIBILITY OF SUCH DAMAGES. diff --git a/MAINTAINERS b/MAINTAINERS index 0d0862b19ce5..10f3ee1b56b3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -14245,7 +14245,6 @@ QLOGIC QLA4XXX iSCSI DRIVER M: QLogic-Storage-Upstream@qlogic.com L: linux-scsi@vger.kernel.org S: Supported -F: Documentation/scsi/LICENSE.qla4xxx F: drivers/scsi/qla4xxx/ QLOGIC QLCNIC (1/10)Gb ETHERNET DRIVER diff --git a/drivers/scsi/qla4xxx/ql4_83xx.c b/drivers/scsi/qla4xxx/ql4_83xx.c index de10e67de8c0..5f56122f6664 100644 --- a/drivers/scsi/qla4xxx/ql4_83xx.c +++ b/drivers/scsi/qla4xxx/ql4_83xx.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic iSCSI HBA Driver * Copyright (c) 2003-2013 QLogic Corporation - * - * See LICENSE.qla4xxx for copyright and licensing details. */ #include diff --git a/drivers/scsi/qla4xxx/ql4_83xx.h b/drivers/scsi/qla4xxx/ql4_83xx.h index f34583e5f8de..f10167c71dd3 100644 --- a/drivers/scsi/qla4xxx/ql4_83xx.h +++ b/drivers/scsi/qla4xxx/ql4_83xx.h @@ -1,8 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * QLogic iSCSI HBA Driver * Copyright (c) 2003-2013 QLogic Corporation - * - * See LICENSE.qla4xxx for copyright and licensing details. */ #ifndef __QL483XX_H diff --git a/drivers/scsi/qla4xxx/ql4_attr.c b/drivers/scsi/qla4xxx/ql4_attr.c index 463239c972b0..ec4352818fbf 100644 --- a/drivers/scsi/qla4xxx/ql4_attr.c +++ b/drivers/scsi/qla4xxx/ql4_attr.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic iSCSI HBA Driver * Copyright (c) 2003-2013 QLogic Corporation - * - * See LICENSE.qla4xxx for copyright and licensing details. */ #include "ql4_def.h" diff --git a/drivers/scsi/qla4xxx/ql4_bsg.c b/drivers/scsi/qla4xxx/ql4_bsg.c index 9231917066d3..c447a9d598a1 100644 --- a/drivers/scsi/qla4xxx/ql4_bsg.c +++ b/drivers/scsi/qla4xxx/ql4_bsg.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic iSCSI HBA Driver * Copyright (c) 2011-2013 QLogic Corporation - * - * See LICENSE.qla4xxx for copyright and licensing details. */ #include "ql4_def.h" diff --git a/drivers/scsi/qla4xxx/ql4_bsg.h b/drivers/scsi/qla4xxx/ql4_bsg.h index 88c2401910c0..06db38561566 100644 --- a/drivers/scsi/qla4xxx/ql4_bsg.h +++ b/drivers/scsi/qla4xxx/ql4_bsg.h @@ -1,8 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * QLogic iSCSI HBA Driver * Copyright (c) 2011 QLogic Corporation - * - * See LICENSE.qla4xxx for copyright and licensing details. */ #ifndef __QL4_BSG_H #define __QL4_BSG_H diff --git a/drivers/scsi/qla4xxx/ql4_dbg.c b/drivers/scsi/qla4xxx/ql4_dbg.c index 5649e9ef59a8..f43e675c5693 100644 --- a/drivers/scsi/qla4xxx/ql4_dbg.c +++ b/drivers/scsi/qla4xxx/ql4_dbg.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic iSCSI HBA Driver * Copyright (c) 2003-2012 QLogic Corporation - * - * See LICENSE.qla4xxx for copyright and licensing details. */ #include "ql4_def.h" diff --git a/drivers/scsi/qla4xxx/ql4_dbg.h b/drivers/scsi/qla4xxx/ql4_dbg.h index 51c365bcf912..171c89165009 100644 --- a/drivers/scsi/qla4xxx/ql4_dbg.h +++ b/drivers/scsi/qla4xxx/ql4_dbg.h @@ -1,8 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * QLogic iSCSI HBA Driver * Copyright (c) 2003-2012 QLogic Corporation - * - * See LICENSE.qla4xxx for copyright and licensing details. */ /* diff --git a/drivers/scsi/qla4xxx/ql4_def.h b/drivers/scsi/qla4xxx/ql4_def.h index 817f312023a9..f5b382ed0a1b 100644 --- a/drivers/scsi/qla4xxx/ql4_def.h +++ b/drivers/scsi/qla4xxx/ql4_def.h @@ -1,8 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * QLogic iSCSI HBA Driver * Copyright (c) 2003-2013 QLogic Corporation - * - * See LICENSE.qla4xxx for copyright and licensing details. */ #ifndef __QL4_DEF_H diff --git a/drivers/scsi/qla4xxx/ql4_fw.h b/drivers/scsi/qla4xxx/ql4_fw.h index 699575efc9ba..b9142464d3f0 100644 --- a/drivers/scsi/qla4xxx/ql4_fw.h +++ b/drivers/scsi/qla4xxx/ql4_fw.h @@ -1,8 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * QLogic iSCSI HBA Driver * Copyright (c) 2003-2013 QLogic Corporation - * - * See LICENSE.qla4xxx for copyright and licensing details. */ #ifndef _QLA4X_FW_H diff --git a/drivers/scsi/qla4xxx/ql4_glbl.h b/drivers/scsi/qla4xxx/ql4_glbl.h index bce96a58f14e..b8f02210aeb0 100644 --- a/drivers/scsi/qla4xxx/ql4_glbl.h +++ b/drivers/scsi/qla4xxx/ql4_glbl.h @@ -1,8 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * QLogic iSCSI HBA Driver * Copyright (c) 2003-2013 QLogic Corporation - * - * See LICENSE.qla4xxx for copyright and licensing details. */ #ifndef __QLA4x_GBL_H diff --git a/drivers/scsi/qla4xxx/ql4_init.c b/drivers/scsi/qla4xxx/ql4_init.c index 4a7ef971a387..92d9868757af 100644 --- a/drivers/scsi/qla4xxx/ql4_init.c +++ b/drivers/scsi/qla4xxx/ql4_init.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic iSCSI HBA Driver * Copyright (c) 2003-2013 QLogic Corporation - * - * See LICENSE.qla4xxx for copyright and licensing details. */ #include diff --git a/drivers/scsi/qla4xxx/ql4_inline.h b/drivers/scsi/qla4xxx/ql4_inline.h index 655b7bb644d9..9ced6b325cb3 100644 --- a/drivers/scsi/qla4xxx/ql4_inline.h +++ b/drivers/scsi/qla4xxx/ql4_inline.h @@ -1,8 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * QLogic iSCSI HBA Driver * Copyright (c) 2003-2013 QLogic Corporation - * - * See LICENSE.qla4xxx for copyright and licensing details. */ /* diff --git a/drivers/scsi/qla4xxx/ql4_iocb.c b/drivers/scsi/qla4xxx/ql4_iocb.c index a8df2d7eb069..cbd1e6ffcd67 100644 --- a/drivers/scsi/qla4xxx/ql4_iocb.c +++ b/drivers/scsi/qla4xxx/ql4_iocb.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic iSCSI HBA Driver * Copyright (c) 2003-2013 QLogic Corporation - * - * See LICENSE.qla4xxx for copyright and licensing details. */ #include "ql4_def.h" diff --git a/drivers/scsi/qla4xxx/ql4_isr.c b/drivers/scsi/qla4xxx/ql4_isr.c index ade5eafdf81e..a51910ae9525 100644 --- a/drivers/scsi/qla4xxx/ql4_isr.c +++ b/drivers/scsi/qla4xxx/ql4_isr.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic iSCSI HBA Driver * Copyright (c) 2003-2013 QLogic Corporation - * - * See LICENSE.qla4xxx for copyright and licensing details. */ #include "ql4_def.h" diff --git a/drivers/scsi/qla4xxx/ql4_mbx.c b/drivers/scsi/qla4xxx/ql4_mbx.c index bc8de7d402d5..17b719a8b6fb 100644 --- a/drivers/scsi/qla4xxx/ql4_mbx.c +++ b/drivers/scsi/qla4xxx/ql4_mbx.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic iSCSI HBA Driver * Copyright (c) 2003-2013 QLogic Corporation - * - * See LICENSE.qla4xxx for copyright and licensing details. */ #include diff --git a/drivers/scsi/qla4xxx/ql4_nvram.c b/drivers/scsi/qla4xxx/ql4_nvram.c index 3bf418fbd432..f08a5abcb31a 100644 --- a/drivers/scsi/qla4xxx/ql4_nvram.c +++ b/drivers/scsi/qla4xxx/ql4_nvram.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic iSCSI HBA Driver * Copyright (c) 2003-2013 QLogic Corporation - * - * See LICENSE.qla4xxx for copyright and licensing details. */ #include "ql4_def.h" diff --git a/drivers/scsi/qla4xxx/ql4_nvram.h b/drivers/scsi/qla4xxx/ql4_nvram.h index e97d79ff16f7..b96c06f50402 100644 --- a/drivers/scsi/qla4xxx/ql4_nvram.h +++ b/drivers/scsi/qla4xxx/ql4_nvram.h @@ -1,8 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * QLogic iSCSI HBA Driver * Copyright (c) 2003-2013 QLogic Corporation - * - * See LICENSE.qla4xxx for copyright and licensing details. */ #ifndef _QL4XNVRM_H_ diff --git a/drivers/scsi/qla4xxx/ql4_nx.c b/drivers/scsi/qla4xxx/ql4_nx.c index 038e19b1e3c2..fd3aabb6a190 100644 --- a/drivers/scsi/qla4xxx/ql4_nx.c +++ b/drivers/scsi/qla4xxx/ql4_nx.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic iSCSI HBA Driver * Copyright (c) 2003-2013 QLogic Corporation - * - * See LICENSE.qla4xxx for copyright and licensing details. */ #include #include diff --git a/drivers/scsi/qla4xxx/ql4_nx.h b/drivers/scsi/qla4xxx/ql4_nx.h index b7a6e7f169ca..52a5209ae42a 100644 --- a/drivers/scsi/qla4xxx/ql4_nx.h +++ b/drivers/scsi/qla4xxx/ql4_nx.h @@ -1,8 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * QLogic iSCSI HBA Driver * Copyright (c) 2003-2013 QLogic Corporation - * - * See LICENSE.qla4xxx for copyright and licensing details. */ #ifndef __QLA_NX_H #define __QLA_NX_H diff --git a/drivers/scsi/qla4xxx/ql4_os.c b/drivers/scsi/qla4xxx/ql4_os.c index 676778cbc550..99ce284f53f2 100644 --- a/drivers/scsi/qla4xxx/ql4_os.c +++ b/drivers/scsi/qla4xxx/ql4_os.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic iSCSI HBA Driver * Copyright (c) 2003-2013 QLogic Corporation - * - * See LICENSE.qla4xxx for copyright and licensing details. */ #include #include diff --git a/drivers/scsi/qla4xxx/ql4_version.h b/drivers/scsi/qla4xxx/ql4_version.h index f11eaa773339..fb1c14269f00 100644 --- a/drivers/scsi/qla4xxx/ql4_version.h +++ b/drivers/scsi/qla4xxx/ql4_version.h @@ -1,8 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * QLogic iSCSI HBA Driver * Copyright (c) 2003-2013 QLogic Corporation - * - * See LICENSE.qla4xxx for copyright and licensing details. */ #define QLA4XXX_DRIVER_VERSION "5.04.00-k6" From 77adf3f01bf7a48eb27a466ac4d14f410b80afc1 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Tue, 8 Sep 2020 14:34:48 +0200 Subject: [PATCH 205/433] scsi/qla2xxx: Convert to SPDX license identifiers All files in this driver directory contain the following notice: See LICENSE.qla2xxx for copyright and licensing details. LICENSE.qla2xxx can be found in Documentation/scsi/. The file contains: - A copyright notice This copyright notice is redundant as all files contain the same copyright notice already - A license notice You may modify and redistribute the device driver code under the GNU General Public License (a copy of which is attached hereto as Exhibit A) published by the Free Software Foundation (version 2). This can be replaced with the corresponding SPDX license identifier (GPL-2.0-only) in the source files which reference this license file. - The full GPLv2 license text A redundant copy of LICENSES/preferred/GPL-2.0 Remove the notices and add the SPDX license identifier GPL-2.0-only to the source files. Finally remove the now redundant LICENSE.qla2xxx file. Reviewed-by: Richard Fontana Reviewed-by: Jilayne Lovejoy Reviewed-by: Alexios Zavras Acked-by: Igor Russkikh Signed-off-by: Thomas Gleixner Signed-off-by: Lukas Bulwahn Acked-by: Nilesh Javali Signed-off-by: Greg Kroah-Hartman --- Documentation/scsi/LICENSE.qla2xxx | 290 ---------------------------- MAINTAINERS | 1 - drivers/scsi/qla2xxx/qla_attr.c | 3 +- drivers/scsi/qla2xxx/qla_bsg.c | 3 +- drivers/scsi/qla2xxx/qla_bsg.h | 3 +- drivers/scsi/qla2xxx/qla_dbg.c | 3 +- drivers/scsi/qla2xxx/qla_dbg.h | 3 +- drivers/scsi/qla2xxx/qla_def.h | 3 +- drivers/scsi/qla2xxx/qla_dfs.c | 3 +- drivers/scsi/qla2xxx/qla_fw.h | 3 +- drivers/scsi/qla2xxx/qla_gbl.h | 3 +- drivers/scsi/qla2xxx/qla_gs.c | 3 +- drivers/scsi/qla2xxx/qla_init.c | 3 +- drivers/scsi/qla2xxx/qla_inline.h | 3 +- drivers/scsi/qla2xxx/qla_iocb.c | 3 +- drivers/scsi/qla2xxx/qla_isr.c | 3 +- drivers/scsi/qla2xxx/qla_mbx.c | 3 +- drivers/scsi/qla2xxx/qla_mid.c | 3 +- drivers/scsi/qla2xxx/qla_mr.c | 3 +- drivers/scsi/qla2xxx/qla_mr.h | 3 +- drivers/scsi/qla2xxx/qla_nvme.c | 3 +- drivers/scsi/qla2xxx/qla_nvme.h | 3 +- drivers/scsi/qla2xxx/qla_nx.c | 3 +- drivers/scsi/qla2xxx/qla_nx.h | 3 +- drivers/scsi/qla2xxx/qla_nx2.c | 3 +- drivers/scsi/qla2xxx/qla_nx2.h | 3 +- drivers/scsi/qla2xxx/qla_os.c | 3 +- drivers/scsi/qla2xxx/qla_settings.h | 3 +- drivers/scsi/qla2xxx/qla_sup.c | 3 +- drivers/scsi/qla2xxx/qla_tmpl.c | 3 +- drivers/scsi/qla2xxx/qla_tmpl.h | 3 +- drivers/scsi/qla2xxx/qla_version.h | 3 +- 32 files changed, 30 insertions(+), 351 deletions(-) delete mode 100644 Documentation/scsi/LICENSE.qla2xxx diff --git a/Documentation/scsi/LICENSE.qla2xxx b/Documentation/scsi/LICENSE.qla2xxx deleted file mode 100644 index 52f0b4359234..000000000000 --- a/Documentation/scsi/LICENSE.qla2xxx +++ /dev/null @@ -1,290 +0,0 @@ -Copyright (c) 2003-2014 QLogic Corporation -QLogic Linux FC-FCoE Driver - -This program includes a device driver for Linux 3.x. -You may modify and redistribute the device driver code under the -GNU General Public License (a copy of which is attached hereto as -Exhibit A) published by the Free Software Foundation (version 2). - - - -EXHIBIT A - - GNU GENERAL PUBLIC LICENSE - Version 2, June 1991 - - Copyright (C) 1989, 1991 Free Software Foundation, Inc. - 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA - Everyone is permitted to copy and distribute verbatim copies - of this license document, but changing it is not allowed. - - Preamble - - The licenses for most software are designed to take away your -freedom to share and change it. By contrast, the GNU General Public -License is intended to guarantee your freedom to share and change free -software--to make sure the software is free for all its users. This -General Public License applies to most of the Free Software -Foundation's software and to any other program whose authors commit to -using it. (Some other Free Software Foundation software is covered by -the GNU Lesser General Public License instead.) You can apply it to -your programs, too. - - When we speak of free software, we are referring to freedom, not -price. Our General Public Licenses are designed to make sure that you -have the freedom to distribute copies of free software (and charge for -this service if you wish), that you receive source code or can get it -if you want it, that you can change the software or use pieces of it -in new free programs; and that you know you can do these things. - - To protect your rights, we need to make restrictions that forbid -anyone to deny you these rights or to ask you to surrender the rights. -These restrictions translate to certain responsibilities for you if you -distribute copies of the software, or if you modify it. - - For example, if you distribute copies of such a program, whether -gratis or for a fee, you must give the recipients all the rights that -you have. You must make sure that they, too, receive or can get the -source code. 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Many people have made -generous contributions to the wide range of software distributed -through that system in reliance on consistent application of that -system; it is up to the author/donor to decide if he or she is willing -to distribute software through any other system and a licensee cannot -impose that choice. - -This section is intended to make thoroughly clear what is believed to -be a consequence of the rest of this License. - - 8. If the distribution and/or use of the Program is restricted in -certain countries either by patents or by copyrighted interfaces, the -original copyright holder who places the Program under this License -may add an explicit geographical distribution limitation excluding -those countries, so that distribution is permitted only in or among -countries not thus excluded. In such case, this License incorporates -the limitation as if written in the body of this License. - - 9. The Free Software Foundation may publish revised and/or new versions -of the General Public License from time to time. Such new versions will -be similar in spirit to the present version, but may differ in detail to -address new problems or concerns. - -Each version is given a distinguishing version number. If the Program -specifies a version number of this License which applies to it and "any -later version", you have the option of following the terms and conditions -either of that version or of any later version published by the Free -Software Foundation. If the Program does not specify a version number of -this License, you may choose any version ever published by the Free Software -Foundation. - - 10. If you wish to incorporate parts of the Program into other free -programs whose distribution conditions are different, write to the author -to ask for permission. For software which is copyrighted by the Free -Software Foundation, write to the Free Software Foundation; we sometimes -make exceptions for this. Our decision will be guided by the two goals -of preserving the free status of all derivatives of our free software and -of promoting the sharing and reuse of software generally. - - NO WARRANTY - - 11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY -FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN -OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES -PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED -OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS -TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE -PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING, -REPAIR OR CORRECTION. - - 12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING -WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR -REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, -INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING -OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED -TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY -YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER -PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE -POSSIBILITY OF SUCH DAMAGES. diff --git a/MAINTAINERS b/MAINTAINERS index 10f3ee1b56b3..259c8dc4ff78 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -14231,7 +14231,6 @@ M: Nilesh Javali M: GR-QLogic-Storage-Upstream@marvell.com L: linux-scsi@vger.kernel.org S: Supported -F: Documentation/scsi/LICENSE.qla2xxx F: drivers/scsi/qla2xxx/ QLOGIC QLA3XXX NETWORK DRIVER diff --git a/drivers/scsi/qla2xxx/qla_attr.c b/drivers/scsi/qla2xxx/qla_attr.c index 5d93ccc73153..69ae215a3160 100644 --- a/drivers/scsi/qla2xxx/qla_attr.c +++ b/drivers/scsi/qla2xxx/qla_attr.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic Fibre Channel HBA Driver * Copyright (c) 2003-2014 QLogic Corporation - * - * See LICENSE.qla2xxx for copyright and licensing details. */ #include "qla_def.h" #include "qla_target.h" diff --git a/drivers/scsi/qla2xxx/qla_bsg.c b/drivers/scsi/qla2xxx/qla_bsg.c index 67efde1d4b8e..23b604832a54 100644 --- a/drivers/scsi/qla2xxx/qla_bsg.c +++ b/drivers/scsi/qla2xxx/qla_bsg.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic Fibre Channel HBA Driver * Copyright (c) 2003-2014 QLogic Corporation - * - * See LICENSE.qla2xxx for copyright and licensing details. */ #include "qla_def.h" diff --git a/drivers/scsi/qla2xxx/qla_bsg.h b/drivers/scsi/qla2xxx/qla_bsg.h index 7594fad7b5b5..1a09b5512267 100644 --- a/drivers/scsi/qla2xxx/qla_bsg.h +++ b/drivers/scsi/qla2xxx/qla_bsg.h @@ -1,8 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * QLogic Fibre Channel HBA Driver * Copyright (c) 2003-2014 QLogic Corporation - * - * See LICENSE.qla2xxx for copyright and licensing details. */ #ifndef __QLA_BSG_H #define __QLA_BSG_H diff --git a/drivers/scsi/qla2xxx/qla_dbg.c b/drivers/scsi/qla2xxx/qla_dbg.c index 1be811a5d69d..75a008512d4c 100644 --- a/drivers/scsi/qla2xxx/qla_dbg.c +++ b/drivers/scsi/qla2xxx/qla_dbg.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic Fibre Channel HBA Driver * Copyright (c) 2003-2014 QLogic Corporation - * - * See LICENSE.qla2xxx for copyright and licensing details. */ /* diff --git a/drivers/scsi/qla2xxx/qla_dbg.h b/drivers/scsi/qla2xxx/qla_dbg.h index e1d7de63e8f8..2e59e75c62b5 100644 --- a/drivers/scsi/qla2xxx/qla_dbg.h +++ b/drivers/scsi/qla2xxx/qla_dbg.h @@ -1,8 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * QLogic Fibre Channel HBA Driver * Copyright (c) 2003-2014 QLogic Corporation - * - * See LICENSE.qla2xxx for copyright and licensing details. */ #include "qla_def.h" diff --git a/drivers/scsi/qla2xxx/qla_def.h b/drivers/scsi/qla2xxx/qla_def.h index a165120d2976..2b7c6d247a3e 100644 --- a/drivers/scsi/qla2xxx/qla_def.h +++ b/drivers/scsi/qla2xxx/qla_def.h @@ -1,8 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * QLogic Fibre Channel HBA Driver * Copyright (c) 2003-2014 QLogic Corporation - * - * See LICENSE.qla2xxx for copyright and licensing details. */ #ifndef __QLA_DEF_H #define __QLA_DEF_H diff --git a/drivers/scsi/qla2xxx/qla_dfs.c b/drivers/scsi/qla2xxx/qla_dfs.c index e62b2115235e..1db2eded569c 100644 --- a/drivers/scsi/qla2xxx/qla_dfs.c +++ b/drivers/scsi/qla2xxx/qla_dfs.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic Fibre Channel HBA Driver * Copyright (c) 2003-2014 QLogic Corporation - * - * See LICENSE.qla2xxx for copyright and licensing details. */ #include "qla_def.h" diff --git a/drivers/scsi/qla2xxx/qla_fw.h b/drivers/scsi/qla2xxx/qla_fw.h index bba1b77fba7e..bcb5eac7daa4 100644 --- a/drivers/scsi/qla2xxx/qla_fw.h +++ b/drivers/scsi/qla2xxx/qla_fw.h @@ -1,8 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * QLogic Fibre Channel HBA Driver * Copyright (c) 2003-2014 QLogic Corporation - * - * See LICENSE.qla2xxx for copyright and licensing details. */ #ifndef __QLA_FW_H #define __QLA_FW_H diff --git a/drivers/scsi/qla2xxx/qla_gbl.h b/drivers/scsi/qla2xxx/qla_gbl.h index 0ced18f3104e..2e0060a59353 100644 --- a/drivers/scsi/qla2xxx/qla_gbl.h +++ b/drivers/scsi/qla2xxx/qla_gbl.h @@ -1,8 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * QLogic Fibre Channel HBA Driver * Copyright (c) 2003-2014 QLogic Corporation - * - * See LICENSE.qla2xxx for copyright and licensing details. */ #ifndef __QLA_GBL_H #define __QLA_GBL_H diff --git a/drivers/scsi/qla2xxx/qla_gs.c b/drivers/scsi/qla2xxx/qla_gs.c index b569fd6e96d6..30fae605bacb 100644 --- a/drivers/scsi/qla2xxx/qla_gs.c +++ b/drivers/scsi/qla2xxx/qla_gs.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic Fibre Channel HBA Driver * Copyright (c) 2003-2014 QLogic Corporation - * - * See LICENSE.qla2xxx for copyright and licensing details. */ #include "qla_def.h" #include "qla_target.h" diff --git a/drivers/scsi/qla2xxx/qla_init.c b/drivers/scsi/qla2xxx/qla_init.c index 0bd04a62af83..005e67b8b4f0 100644 --- a/drivers/scsi/qla2xxx/qla_init.c +++ b/drivers/scsi/qla2xxx/qla_init.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic Fibre Channel HBA Driver * Copyright (c) 2003-2014 QLogic Corporation - * - * See LICENSE.qla2xxx for copyright and licensing details. */ #include "qla_def.h" #include "qla_gbl.h" diff --git a/drivers/scsi/qla2xxx/qla_inline.h b/drivers/scsi/qla2xxx/qla_inline.h index 861dc522723c..41e607d7211b 100644 --- a/drivers/scsi/qla2xxx/qla_inline.h +++ b/drivers/scsi/qla2xxx/qla_inline.h @@ -1,8 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * QLogic Fibre Channel HBA Driver * Copyright (c) 2003-2014 QLogic Corporation - * - * See LICENSE.qla2xxx for copyright and licensing details. */ #include "qla_target.h" diff --git a/drivers/scsi/qla2xxx/qla_iocb.c b/drivers/scsi/qla2xxx/qla_iocb.c index 0954fa41911c..146bed76bc44 100644 --- a/drivers/scsi/qla2xxx/qla_iocb.c +++ b/drivers/scsi/qla2xxx/qla_iocb.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic Fibre Channel HBA Driver * Copyright (c) 2003-2014 QLogic Corporation - * - * See LICENSE.qla2xxx for copyright and licensing details. */ #include "qla_def.h" #include "qla_target.h" diff --git a/drivers/scsi/qla2xxx/qla_isr.c b/drivers/scsi/qla2xxx/qla_isr.c index 25e0a1684763..ab16dcacf705 100644 --- a/drivers/scsi/qla2xxx/qla_isr.c +++ b/drivers/scsi/qla2xxx/qla_isr.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic Fibre Channel HBA Driver * Copyright (c) 2003-2014 QLogic Corporation - * - * See LICENSE.qla2xxx for copyright and licensing details. */ #include "qla_def.h" #include "qla_target.h" diff --git a/drivers/scsi/qla2xxx/qla_mbx.c b/drivers/scsi/qla2xxx/qla_mbx.c index 226f1428d3e5..e2b5408bd270 100644 --- a/drivers/scsi/qla2xxx/qla_mbx.c +++ b/drivers/scsi/qla2xxx/qla_mbx.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic Fibre Channel HBA Driver * Copyright (c) 2003-2014 QLogic Corporation - * - * See LICENSE.qla2xxx for copyright and licensing details. */ #include "qla_def.h" #include "qla_target.h" diff --git a/drivers/scsi/qla2xxx/qla_mid.c b/drivers/scsi/qla2xxx/qla_mid.c index 15efe2f04b86..afa59b485a4b 100644 --- a/drivers/scsi/qla2xxx/qla_mid.c +++ b/drivers/scsi/qla2xxx/qla_mid.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic Fibre Channel HBA Driver * Copyright (c) 2003-2014 QLogic Corporation - * - * See LICENSE.qla2xxx for copyright and licensing details. */ #include "qla_def.h" #include "qla_gbl.h" diff --git a/drivers/scsi/qla2xxx/qla_mr.c b/drivers/scsi/qla2xxx/qla_mr.c index a8fe4f725fa0..ca7306685325 100644 --- a/drivers/scsi/qla2xxx/qla_mr.c +++ b/drivers/scsi/qla2xxx/qla_mr.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic Fibre Channel HBA Driver * Copyright (c) 2003-2014 QLogic Corporation - * - * See LICENSE.qla2xxx for copyright and licensing details. */ #include "qla_def.h" #include diff --git a/drivers/scsi/qla2xxx/qla_mr.h b/drivers/scsi/qla2xxx/qla_mr.h index 762250891a8f..73be8348402a 100644 --- a/drivers/scsi/qla2xxx/qla_mr.h +++ b/drivers/scsi/qla2xxx/qla_mr.h @@ -1,8 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * QLogic Fibre Channel HBA Driver * Copyright (c) 2003-2014 QLogic Corporation - * - * See LICENSE.qla2xxx for copyright and licensing details. */ #ifndef __QLA_MR_H #define __QLA_MR_H diff --git a/drivers/scsi/qla2xxx/qla_nvme.c b/drivers/scsi/qla2xxx/qla_nvme.c index 90bbc61f361b..18c7d4b9c705 100644 --- a/drivers/scsi/qla2xxx/qla_nvme.c +++ b/drivers/scsi/qla2xxx/qla_nvme.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic Fibre Channel HBA Driver * Copyright (c) 2003-2017 QLogic Corporation - * - * See LICENSE.qla2xxx for copyright and licensing details. */ #include "qla_nvme.h" #include diff --git a/drivers/scsi/qla2xxx/qla_nvme.h b/drivers/scsi/qla2xxx/qla_nvme.h index fbb844226630..67206bb13b80 100644 --- a/drivers/scsi/qla2xxx/qla_nvme.h +++ b/drivers/scsi/qla2xxx/qla_nvme.h @@ -1,8 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * QLogic Fibre Channel HBA Driver * Copyright (c) 2003-2017 QLogic Corporation - * - * See LICENSE.qla2xxx for copyright and licensing details. */ #ifndef __QLA_NVME_H #define __QLA_NVME_H diff --git a/drivers/scsi/qla2xxx/qla_nx.c b/drivers/scsi/qla2xxx/qla_nx.c index 71273eb634d3..b3ba0de5d4fb 100644 --- a/drivers/scsi/qla2xxx/qla_nx.c +++ b/drivers/scsi/qla2xxx/qla_nx.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic Fibre Channel HBA Driver * Copyright (c) 2003-2014 QLogic Corporation - * - * See LICENSE.qla2xxx for copyright and licensing details. */ #include "qla_def.h" #include diff --git a/drivers/scsi/qla2xxx/qla_nx.h b/drivers/scsi/qla2xxx/qla_nx.h index 93344a05910a..8567eaf1bddd 100644 --- a/drivers/scsi/qla2xxx/qla_nx.h +++ b/drivers/scsi/qla2xxx/qla_nx.h @@ -1,8 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * QLogic Fibre Channel HBA Driver * Copyright (c) 2003-2014 QLogic Corporation - * - * See LICENSE.qla2xxx for copyright and licensing details. */ #ifndef __QLA_NX_H #define __QLA_NX_H diff --git a/drivers/scsi/qla2xxx/qla_nx2.c b/drivers/scsi/qla2xxx/qla_nx2.c index 50e57603ce3d..3a415b12dcec 100644 --- a/drivers/scsi/qla2xxx/qla_nx2.c +++ b/drivers/scsi/qla2xxx/qla_nx2.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic Fibre Channel HBA Driver * Copyright (c) 2003-2014 QLogic Corporation - * - * See LICENSE.qla2xxx for copyright and licensing details. */ #include diff --git a/drivers/scsi/qla2xxx/qla_nx2.h b/drivers/scsi/qla2xxx/qla_nx2.h index 8ba7c1db07c3..2fc902a9fade 100644 --- a/drivers/scsi/qla2xxx/qla_nx2.h +++ b/drivers/scsi/qla2xxx/qla_nx2.h @@ -1,8 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * QLogic Fibre Channel HBA Driver * Copyright (c) 2003-2014 QLogic Corporation - * - * See LICENSE.qla2xxx for copyright and licensing details. */ #ifndef __QLA_NX2_H diff --git a/drivers/scsi/qla2xxx/qla_os.c b/drivers/scsi/qla2xxx/qla_os.c index 8da00ba54aec..c8a4f83074ad 100644 --- a/drivers/scsi/qla2xxx/qla_os.c +++ b/drivers/scsi/qla2xxx/qla_os.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic Fibre Channel HBA Driver * Copyright (c) 2003-2014 QLogic Corporation - * - * See LICENSE.qla2xxx for copyright and licensing details. */ #include "qla_def.h" diff --git a/drivers/scsi/qla2xxx/qla_settings.h b/drivers/scsi/qla2xxx/qla_settings.h index 2fb7ebfbbc38..a5f3000ae53b 100644 --- a/drivers/scsi/qla2xxx/qla_settings.h +++ b/drivers/scsi/qla2xxx/qla_settings.h @@ -1,8 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * QLogic Fibre Channel HBA Driver * Copyright (c) 2003-2014 QLogic Corporation - * - * See LICENSE.qla2xxx for copyright and licensing details. */ #define MAX_RETRIES_OF_ISP_ABORT 5 diff --git a/drivers/scsi/qla2xxx/qla_sup.c b/drivers/scsi/qla2xxx/qla_sup.c index 411b8a9ff393..0f92e9a044dc 100644 --- a/drivers/scsi/qla2xxx/qla_sup.c +++ b/drivers/scsi/qla2xxx/qla_sup.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic Fibre Channel HBA Driver * Copyright (c) 2003-2014 QLogic Corporation - * - * See LICENSE.qla2xxx for copyright and licensing details. */ #include "qla_def.h" diff --git a/drivers/scsi/qla2xxx/qla_tmpl.c b/drivers/scsi/qla2xxx/qla_tmpl.c index 8dc82cfd38b2..03fff32b59cd 100644 --- a/drivers/scsi/qla2xxx/qla_tmpl.c +++ b/drivers/scsi/qla2xxx/qla_tmpl.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic Fibre Channel HBA Driver * Copyright (c) 2003-2014 QLogic Corporation - * - * See LICENSE.qla2xxx for copyright and licensing details. */ #include "qla_def.h" #include "qla_tmpl.h" diff --git a/drivers/scsi/qla2xxx/qla_tmpl.h b/drivers/scsi/qla2xxx/qla_tmpl.h index 89280b3477aa..c47184db5081 100644 --- a/drivers/scsi/qla2xxx/qla_tmpl.h +++ b/drivers/scsi/qla2xxx/qla_tmpl.h @@ -1,8 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * QLogic Fibre Channel HBA Driver * Copyright (c) 2003-2014 QLogic Corporation - * - * See LICENSE.qla2xxx for copyright and licensing details. */ #ifndef __QLA_DMP27_H__ diff --git a/drivers/scsi/qla2xxx/qla_version.h b/drivers/scsi/qla2xxx/qla_version.h index 8ccd9ba1ddef..3ca1fb96812a 100644 --- a/drivers/scsi/qla2xxx/qla_version.h +++ b/drivers/scsi/qla2xxx/qla_version.h @@ -1,8 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * QLogic Fibre Channel HBA Driver * Copyright (c) 2003-2014 QLogic Corporation - * - * See LICENSE.qla2xxx for copyright and licensing details. */ /* * Driver version From 004b26b8e1d85e750e9700b7dbf19f03f73565b1 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Tue, 8 Sep 2020 14:34:49 +0200 Subject: [PATCH 206/433] net/qlcnic: Convert to SPDX license identifiers All files in this driver directory contain the following notice: See LICENSE.qlcnic for copyright and licensing details. LICENSE.qlacnic can be found in Documentation/networking/device_drivers/qlogic/. The file contains: - A copyright notice This copyright notice is redundant as all files contain the same copyright notice already - A license notice You may modify and redistribute the device driver code under the GNU General Public License (a copy of which is attached hereto as Exhibit A) published by the Free Software Foundation (version 2). This can be replaced with the corresponding SPDX license identifier (GPL-2.0-only) in the source files which reference this license file. - The full GPLv2 license text A redundant copy of LICENSES/preferred/GPL-2.0 Remove the notices and add the SPDX license identifier GPL-2.0-only to the source files. Finally remove the now redundant LICENSE.qlcnic file. Reviewed-by: Richard Fontana Reviewed-by: Jilayne Lovejoy Reviewed-by: Alexios Zavras Acked-by: Igor Russkikh Signed-off-by: Thomas Gleixner Signed-off-by: Lukas Bulwahn Signed-off-by: Greg Kroah-Hartman --- .../device_drivers/qlogic/LICENSE.qlcnic | 288 ------------------ drivers/net/ethernet/qlogic/qlcnic/qlcnic.h | 3 +- .../ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c | 3 +- .../ethernet/qlogic/qlcnic/qlcnic_83xx_hw.h | 3 +- .../ethernet/qlogic/qlcnic/qlcnic_83xx_init.c | 3 +- .../ethernet/qlogic/qlcnic/qlcnic_83xx_vnic.c | 3 +- .../net/ethernet/qlogic/qlcnic/qlcnic_ctx.c | 3 +- .../net/ethernet/qlogic/qlcnic/qlcnic_dcb.c | 3 +- .../net/ethernet/qlogic/qlcnic/qlcnic_dcb.h | 3 +- .../ethernet/qlogic/qlcnic/qlcnic_ethtool.c | 3 +- .../net/ethernet/qlogic/qlcnic/qlcnic_hdr.h | 3 +- .../net/ethernet/qlogic/qlcnic/qlcnic_hw.c | 3 +- .../net/ethernet/qlogic/qlcnic/qlcnic_hw.h | 3 +- .../net/ethernet/qlogic/qlcnic/qlcnic_init.c | 3 +- .../net/ethernet/qlogic/qlcnic/qlcnic_io.c | 3 +- .../net/ethernet/qlogic/qlcnic/qlcnic_main.c | 3 +- .../ethernet/qlogic/qlcnic/qlcnic_minidump.c | 3 +- .../net/ethernet/qlogic/qlcnic/qlcnic_sriov.h | 3 +- .../qlogic/qlcnic/qlcnic_sriov_common.c | 3 +- .../ethernet/qlogic/qlcnic/qlcnic_sriov_pf.c | 3 +- .../net/ethernet/qlogic/qlcnic/qlcnic_sysfs.c | 3 +- 21 files changed, 20 insertions(+), 328 deletions(-) delete mode 100644 Documentation/networking/device_drivers/qlogic/LICENSE.qlcnic diff --git a/Documentation/networking/device_drivers/qlogic/LICENSE.qlcnic b/Documentation/networking/device_drivers/qlogic/LICENSE.qlcnic deleted file mode 100644 index 2ae3b64983ab..000000000000 --- a/Documentation/networking/device_drivers/qlogic/LICENSE.qlcnic +++ /dev/null @@ -1,288 +0,0 @@ -Copyright (c) 2009-2013 QLogic Corporation -QLogic Linux qlcnic NIC Driver - -You may modify and redistribute the device driver code under the -GNU General Public License (a copy of which is attached hereto as -Exhibit A) published by the Free Software Foundation (version 2). - - -EXHIBIT A - - GNU GENERAL PUBLIC LICENSE - Version 2, June 1991 - - Copyright (C) 1989, 1991 Free Software Foundation, Inc. - 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA - Everyone is permitted to copy and distribute verbatim copies - of this license document, but changing it is not allowed. - - Preamble - - The licenses for most software are designed to take away your -freedom to share and change it. By contrast, the GNU General Public -License is intended to guarantee your freedom to share and change free -software--to make sure the software is free for all its users. This -General Public License applies to most of the Free Software -Foundation's software and to any other program whose authors commit to -using it. (Some other Free Software Foundation software is covered by -the GNU Lesser General Public License instead.) You can apply it to -your programs, too. - - When we speak of free software, we are referring to freedom, not -price. Our General Public Licenses are designed to make sure that you -have the freedom to distribute copies of free software (and charge for -this service if you wish), that you receive source code or can get it -if you want it, that you can change the software or use pieces of it -in new free programs; and that you know you can do these things. - - To protect your rights, we need to make restrictions that forbid -anyone to deny you these rights or to ask you to surrender the rights. -These restrictions translate to certain responsibilities for you if you -distribute copies of the software, or if you modify it. - - For example, if you distribute copies of such a program, whether -gratis or for a fee, you must give the recipients all the rights that -you have. You must make sure that they, too, receive or can get the -source code. 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IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING -WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR -REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, -INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING -OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED -TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY -YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER -PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE -POSSIBILITY OF SUCH DAMAGES. diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic.h b/drivers/net/ethernet/qlogic/qlcnic/qlcnic.h index d67f8265724a..be7abee160e7 100644 --- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic.h +++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic.h @@ -1,8 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * QLogic qlcnic NIC Driver * Copyright (c) 2009-2013 QLogic Corporation - * - * See LICENSE.qlcnic for copyright and licensing details. */ #ifndef _QLCNIC_H_ diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c index 29b9c728a65e..31ad3a5cd128 100644 --- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c +++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic qlcnic NIC Driver * Copyright (c) 2009-2013 QLogic Corporation - * - * See LICENSE.qlcnic for copyright and licensing details. */ #include diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.h b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.h index 73fe2f64491d..6f1d9c1fd1b0 100644 --- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.h +++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.h @@ -1,8 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * QLogic qlcnic NIC Driver * Copyright (c) 2009-2013 QLogic Corporation - * - * See LICENSE.qlcnic for copyright and licensing details. */ #ifndef __QLCNIC_83XX_HW_H diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_init.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_init.c index 0e2f2fb6c3a9..b8af59fc1aa4 100644 --- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_init.c +++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_init.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic qlcnic NIC Driver * Copyright (c) 2009-2013 QLogic Corporation - * - * See LICENSE.qlcnic for copyright and licensing details. */ #include "qlcnic_sriov.h" diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_vnic.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_vnic.c index 34906750b7e7..c4297aea7d15 100644 --- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_vnic.c +++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_vnic.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic qlcnic NIC Driver * Copyright (c) 2009-2013 QLogic Corporation - * - * See LICENSE.qlcnic for copyright and licensing details. */ #include "qlcnic.h" diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_ctx.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_ctx.c index af38d3d73291..87f76bac2e46 100644 --- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_ctx.c +++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_ctx.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic qlcnic NIC Driver * Copyright (c) 2009-2013 QLogic Corporation - * - * See LICENSE.qlcnic for copyright and licensing details. */ #include "qlcnic.h" diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_dcb.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_dcb.c index 834208e55f7b..4d638f60f237 100644 --- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_dcb.c +++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_dcb.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic qlcnic NIC Driver * Copyright (c) 2009-2013 QLogic Corporation - * - * See LICENSE.qlcnic for copyright and licensing details. */ #include diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_dcb.h b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_dcb.h index f4aa6331b367..5d79ee4370bc 100644 --- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_dcb.h +++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_dcb.h @@ -1,8 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * QLogic qlcnic NIC Driver * Copyright (c) 2009-2013 QLogic Corporation - * - * See LICENSE.qlcnic for copyright and licensing details. */ #ifndef __QLCNIC_DCBX_H diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_ethtool.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_ethtool.c index b9894d54469c..d8a3ecaed3fc 100644 --- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_ethtool.c +++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_ethtool.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic qlcnic NIC Driver * Copyright (c) 2009-2013 QLogic Corporation - * - * See LICENSE.qlcnic for copyright and licensing details. */ #include diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h index 34e467b239a1..83a586d6fe43 100644 --- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h +++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h @@ -1,8 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * QLogic qlcnic NIC Driver * Copyright (c) 2009-2013 QLogic Corporation - * - * See LICENSE.qlcnic for copyright and licensing details. */ #ifndef __QLCNIC_HDR_H_ diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c index 35d891f4655a..e1b8490bed0a 100644 --- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c +++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic qlcnic NIC Driver * Copyright (c) 2009-2013 QLogic Corporation - * - * See LICENSE.qlcnic for copyright and licensing details. */ #include diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.h b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.h index 56a3bd9e37dc..601d22495a88 100644 --- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.h +++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.h @@ -1,8 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * QLogic qlcnic NIC Driver * Copyright (c) 2009-2013 QLogic Corporation - * - * See LICENSE.qlcnic for copyright and licensing details. */ #ifndef __QLCNIC_HW_H diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_init.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_init.c index c48a0e2d4d7e..e6784023bce4 100644 --- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_init.c +++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_init.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic qlcnic NIC Driver * Copyright (c) 2009-2013 QLogic Corporation - * - * See LICENSE.qlcnic for copyright and licensing details. */ #include "qlcnic.h" diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_io.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_io.c index ac61f614de37..bdf15d2a6431 100644 --- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_io.c +++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_io.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic qlcnic NIC Driver * Copyright (c) 2009-2013 QLogic Corporation - * - * See LICENSE.qlcnic for copyright and licensing details. */ #include diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c index 173c7300cdf7..5a7e240fd469 100644 --- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c +++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic qlcnic NIC Driver * Copyright (c) 2009-2013 QLogic Corporation - * - * See LICENSE.qlcnic for copyright and licensing details. */ #include diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_minidump.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_minidump.c index f34ae8c75bc5..7760a3394e93 100644 --- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_minidump.c +++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_minidump.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic qlcnic NIC Driver * Copyright (c) 2009-2013 QLogic Corporation - * - * See LICENSE.qlcnic for copyright and licensing details. */ #include diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov.h b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov.h index 5f327659efa7..7160b42f51dd 100644 --- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov.h +++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov.h @@ -1,8 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * QLogic qlcnic NIC Driver * Copyright (c) 2009-2013 QLogic Corporation - * - * See LICENSE.qlcnic for copyright and licensing details. */ #ifndef _QLCNIC_83XX_SRIOV_H_ diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c index 7adbb03cb931..30e52f969759 100644 --- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c +++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic qlcnic NIC Driver * Copyright (c) 2009-2013 QLogic Corporation - * - * See LICENSE.qlcnic for copyright and licensing details. */ #include diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_pf.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_pf.c index 5632da05145a..447720b93e5a 100644 --- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_pf.c +++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_pf.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic qlcnic NIC Driver * Copyright (c) 2009-2013 QLogic Corporation - * - * See LICENSE.qlcnic for copyright and licensing details. */ #include diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sysfs.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sysfs.c index 10037639ac2c..5c2edb715d3e 100644 --- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sysfs.c +++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sysfs.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic qlcnic NIC Driver * Copyright (c) 2009-2013 QLogic Corporation - * - * See LICENSE.qlcnic for copyright and licensing details. */ #include From 936303f8eace3d0a3f7f61ff00c0cd0b6f328ac1 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Tue, 8 Sep 2020 14:34:50 +0200 Subject: [PATCH 207/433] net/qlge: Convert to SPDX license identifiers All files related to this driver contain the following notice: See LICENSE.qlge for copyright and licensing details. LICENSE.qlge can be found in Documentation/networking/device_drivers/qlogic/. The file contains: - A copyright notice This copyright notice is redundant as all files contain the same copyright notice already - A license notice You may modify and redistribute the device driver code under the GNU General Public License (a copy of which is attached hereto as Exhibit A) published by the Free Software Foundation (version 2). This can be replaced with the corresponding SPDX license identifier (GPL-2.0-only) in the source files which reference this license file. - The full GPLv2 license text A redundant copy of LICENSES/preferred/GPL-2.0 Remove the notices and add the SPDX license identifier GPL-2.0-only to the source files. Finally remove the now redundant LICENSE.qlge file. Reviewed-by: Richard Fontana Reviewed-by: Jilayne Lovejoy Reviewed-by: Alexios Zavras Signed-off-by: Thomas Gleixner Signed-off-by: Lukas Bulwahn Signed-off-by: Greg Kroah-Hartman --- .../device_drivers/qlogic/LICENSE.qlge | 288 ------------------ drivers/staging/qlge/qlge.h | 3 +- drivers/staging/qlge/qlge_main.c | 2 +- 3 files changed, 2 insertions(+), 291 deletions(-) delete mode 100644 Documentation/networking/device_drivers/qlogic/LICENSE.qlge diff --git a/Documentation/networking/device_drivers/qlogic/LICENSE.qlge b/Documentation/networking/device_drivers/qlogic/LICENSE.qlge deleted file mode 100644 index ce64e4d15b21..000000000000 --- a/Documentation/networking/device_drivers/qlogic/LICENSE.qlge +++ /dev/null @@ -1,288 +0,0 @@ -Copyright (c) 2003-2011 QLogic Corporation -QLogic Linux qlge NIC Driver - -You may modify and redistribute the device driver code under the -GNU General Public License (a copy of which is attached hereto as -Exhibit A) published by the Free Software Foundation (version 2). - - -EXHIBIT A - - GNU GENERAL PUBLIC LICENSE - Version 2, June 1991 - - Copyright (C) 1989, 1991 Free Software Foundation, Inc. - 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA - Everyone is permitted to copy and distribute verbatim copies - of this license document, but changing it is not allowed. - - Preamble - - The licenses for most software are designed to take away your -freedom to share and change it. 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IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING -WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR -REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, -INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING -OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED -TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY -YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER -PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE -POSSIBILITY OF SUCH DAMAGES. diff --git a/drivers/staging/qlge/qlge.h b/drivers/staging/qlge/qlge.h index 483ce04789ed..48f346503979 100644 --- a/drivers/staging/qlge/qlge.h +++ b/drivers/staging/qlge/qlge.h @@ -1,8 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * QLogic QLA41xx NIC HBA Driver * Copyright (c) 2003-2006 QLogic Corporation - * - * See LICENSE.qlge for copyright and licensing details. */ #ifndef _QLGE_H_ #define _QLGE_H_ diff --git a/drivers/staging/qlge/qlge_main.c b/drivers/staging/qlge/qlge_main.c index 2028458bea6f..96f8356c4c1a 100644 --- a/drivers/staging/qlge/qlge_main.c +++ b/drivers/staging/qlge/qlge_main.c @@ -1,7 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * QLogic qlge NIC HBA Driver * Copyright (c) 2003-2008 QLogic Corporation - * See LICENSE.qlge for copyright and licensing details. * Author: Linux qlge network device driver by * Ron Mercer */ From 951f3e9f208603f582f20007f16098dbbb0ab76c Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Tue, 8 Sep 2020 14:34:51 +0200 Subject: [PATCH 208/433] net/qla3xxx: Convert to SPDX license identifiers All files related to this driver contain the following notice: See LICENSE.qla3xxx for copyright and licensing details. LICENSE.qla3xxx can be found in Documentation/networking/device_drivers/qlogic/. The file contains: - A copyright notice This copyright notice is redundant as all files contain the same copyright notice already - A license notice You may modify and redistribute the device driver code under the GNU General Public License (a copy of which is attached hereto as Exhibit A) published by the Free Software Foundation (version 2 or a later version). This can be replaced with the corresponding SPDX license identifier (GPL-2.0-or-later) in the source files which reference this license file. - A license for the device firmware This license is pointless in the context of the kernel as the firmware is not distributed as part of the kernel. LICENSE.qla2xxx contained exactly the same firmware license which was removed with commit bc3f957c069f ("[SCSI] qla2xxx: Update LICENSE.qla2xxx."). The firmware license is there due to the fact that the out of tree driver tarball which was available from the qlogic website contained the firmware binary. The firmware license in the qla3xxx license file got probably forgotten when the other qlogic license files were updated. Remove the notices and add the SPDX license identifier GPL-2.0-or-later to the source files. Finally remove the now redundant LICENSE.qla3xxx file. Reviewed-by: Richard Fontana Reviewed-by: Alexios Zavras Signed-off-by: Thomas Gleixner Signed-off-by: Lukas Bulwahn Signed-off-by: Greg Kroah-Hartman --- .../device_drivers/qlogic/LICENSE.qla3xxx | 46 ------------------- MAINTAINERS | 1 - drivers/net/ethernet/qlogic/qla3xxx.c | 3 +- drivers/net/ethernet/qlogic/qla3xxx.h | 3 +- 4 files changed, 2 insertions(+), 51 deletions(-) delete mode 100644 Documentation/networking/device_drivers/qlogic/LICENSE.qla3xxx diff --git a/Documentation/networking/device_drivers/qlogic/LICENSE.qla3xxx b/Documentation/networking/device_drivers/qlogic/LICENSE.qla3xxx deleted file mode 100644 index 2f2077e34d81..000000000000 --- a/Documentation/networking/device_drivers/qlogic/LICENSE.qla3xxx +++ /dev/null @@ -1,46 +0,0 @@ -Copyright (c) 2003-2006 QLogic Corporation -QLogic Linux Networking HBA Driver - -This program includes a device driver for Linux 2.6 that may be -distributed with QLogic hardware specific firmware binary file. -You may modify and redistribute the device driver code under the -GNU General Public License as published by the Free Software -Foundation (version 2 or a later version). - -You may redistribute the hardware specific firmware binary file -under the following terms: - - 1. Redistribution of source code (only if applicable), - must retain the above copyright notice, this list of - conditions and the following disclaimer. - - 2. Redistribution in binary form must reproduce the above - copyright notice, this list of conditions and the - following disclaimer in the documentation and/or other - materials provided with the distribution. - - 3. The name of QLogic Corporation may not be used to - endorse or promote products derived from this software - without specific prior written permission - -REGARDLESS OF WHAT LICENSING MECHANISM IS USED OR APPLICABLE, -THIS PROGRAM IS PROVIDED BY QLOGIC CORPORATION "AS IS'' AND ANY -EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A -PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR -BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, -EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED -TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, -OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -POSSIBILITY OF SUCH DAMAGE. - -USER ACKNOWLEDGES AND AGREES THAT USE OF THIS PROGRAM WILL NOT -CREATE OR GIVE GROUNDS FOR A LICENSE BY IMPLICATION, ESTOPPEL, OR -OTHERWISE IN ANY INTELLECTUAL PROPERTY RIGHTS (PATENT, COPYRIGHT, -TRADE SECRET, MASK WORK, OR OTHER PROPRIETARY RIGHT) EMBODIED IN -ANY OTHER QLOGIC HARDWARE OR SOFTWARE EITHER SOLELY OR IN -COMBINATION WITH THIS PROGRAM. - diff --git a/MAINTAINERS b/MAINTAINERS index 259c8dc4ff78..fd1a32315f0f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -14237,7 +14237,6 @@ QLOGIC QLA3XXX NETWORK DRIVER M: GR-Linux-NIC-Dev@marvell.com L: netdev@vger.kernel.org S: Supported -F: Documentation/networking/device_drivers/ethernet/qlogic/LICENSE.qla3xxx F: drivers/net/ethernet/qlogic/qla3xxx.* QLOGIC QLA4XXX iSCSI DRIVER diff --git a/drivers/net/ethernet/qlogic/qla3xxx.c b/drivers/net/ethernet/qlogic/qla3xxx.c index 569e2a7a64e5..27740c027681 100644 --- a/drivers/net/ethernet/qlogic/qla3xxx.c +++ b/drivers/net/ethernet/qlogic/qla3xxx.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-or-later /* * QLogic QLA3xxx NIC HBA Driver * Copyright (c) 2003-2006 QLogic Corporation - * - * See LICENSE.qla3xxx for copyright and licensing details. */ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt diff --git a/drivers/net/ethernet/qlogic/qla3xxx.h b/drivers/net/ethernet/qlogic/qla3xxx.h index 73e234366a82..fb4398303ae1 100644 --- a/drivers/net/ethernet/qlogic/qla3xxx.h +++ b/drivers/net/ethernet/qlogic/qla3xxx.h @@ -1,8 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /* * QLogic QLA3xxx NIC HBA Driver * Copyright (c) 2003-2006 QLogic Corporation - * - * See LICENSE.qla3xxx for copyright and licensing details. */ #ifndef _QLA3XXX_H_ #define _QLA3XXX_H_ From 509edd95ede8e8e331f617c083d43f2927442fa9 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 9 Sep 2020 07:14:32 +0200 Subject: [PATCH 209/433] LICENSE: add GFDL deprecated licenses There are some files under Documentation which uses deprecated versions of GNU Free Documentation License, on both versions 1.1 and 1.2. On all cases, the license is with no Invariant Sections, Front-Cover Texts or Back-Cover Texts. Add the text file for them, as we'll start using SPDX for those. Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Greg Kroah-Hartman --- LICENSES/deprecated/GFDL-1.1 | 377 +++++++++++++++++++++++++++++++ LICENSES/deprecated/GFDL-1.2 | 417 +++++++++++++++++++++++++++++++++++ 2 files changed, 794 insertions(+) create mode 100644 LICENSES/deprecated/GFDL-1.1 create mode 100644 LICENSES/deprecated/GFDL-1.2 diff --git a/LICENSES/deprecated/GFDL-1.1 b/LICENSES/deprecated/GFDL-1.1 new file mode 100644 index 000000000000..ae62699ab62c --- /dev/null +++ b/LICENSES/deprecated/GFDL-1.1 @@ -0,0 +1,377 @@ +Valid-License-Identifier: GPL-2.0 OR GFDL-1.1-no-invariants-or-later +Valid-License-Identifier: GPL-2.0 OR GFDL-1.1-no-invariants-only +Valid-License-Identifier: GFDL-1.1-no-invariants-or-later +Valid-License-Identifier: GFDL-1.1-no-invariants-only +SPDX-URL: https://spdx.org/licenses/GFDL-1.1-no-invariants-or-later.html +Usage-Guide: + The GNU Free Documentation License should only be used without + Invariant Sections, Front-Cover Texts or Back-Cover Texts. + It should not be used for new documents, except when they are + part of sections that are already using it (notably, the + userspace-api media documentation). + To use the license in source code, put the following SPDX tag/value pair + into a comment according to the placement guidelines in the licensing + rules documentation: + SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-no-invariants-or-later + or + SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-no-invariants-only + or + SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later + or + SPDX-License-Identifier: GFDL-1.1-no-invariants-only +License-Text: + GNU Free Documentation License + Version 1.1, March 2000 + + Copyright (C) 2000 Free Software Foundation, Inc. + 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + + +0. PREAMBLE + +The purpose of this License is to make a manual, textbook, or other +written document "free" in the sense of freedom: to assure everyone +the effective freedom to copy and redistribute it, with or without +modifying it, either commercially or noncommercially. Secondarily, +this License preserves for the author and publisher a way to get +credit for their work, while not being considered responsible for +modifications made by others. + +This License is a kind of "copyleft", which means that derivative +works of the document must themselves be free in the same sense. It +complements the GNU General Public License, which is a copyleft +license designed for free software. + +We have designed this License in order to use it for manuals for free +software, because free software needs free documentation: a free +program should come with manuals providing the same freedoms that the +software does. But this License is not limited to software manuals; +it can be used for any textual work, regardless of subject matter or +whether it is published as a printed book. We recommend this License +principally for works whose purpose is instruction or reference. + + +1. APPLICABILITY AND DEFINITIONS + +This License applies to any manual or other work that contains a +notice placed by the copyright holder saying it can be distributed +under the terms of this License. The "Document", below, refers to any +such manual or work. Any member of the public is a licensee, and is +addressed as "you". + +A "Modified Version" of the Document means any work containing the +Document or a portion of it, either copied verbatim, or with +modifications and/or translated into another language. + +A "Secondary Section" is a named appendix or a front-matter section of +the Document that deals exclusively with the relationship of the +publishers or authors of the Document to the Document's overall subject +(or to related matters) and contains nothing that could fall directly +within that overall subject. (For example, if the Document is in part a +textbook of mathematics, a Secondary Section may not explain any +mathematics.) The relationship could be a matter of historical +connection with the subject or with related matters, or of legal, +commercial, philosophical, ethical or political position regarding +them. + +The "Invariant Sections" are certain Secondary Sections whose titles +are designated, as being those of Invariant Sections, in the notice +that says that the Document is released under this License. + +The "Cover Texts" are certain short passages of text that are listed, +as Front-Cover Texts or Back-Cover Texts, in the notice that says that +the Document is released under this License. + +A "Transparent" copy of the Document means a machine-readable copy, +represented in a format whose specification is available to the +general public, whose contents can be viewed and edited directly and +straightforwardly with generic text editors or (for images composed of +pixels) generic paint programs or (for drawings) some widely available +drawing editor, and that is suitable for input to text formatters or +for automatic translation to a variety of formats suitable for input +to text formatters. A copy made in an otherwise Transparent file +format whose markup has been designed to thwart or discourage +subsequent modification by readers is not Transparent. A copy that is +not "Transparent" is called "Opaque". + +Examples of suitable formats for Transparent copies include plain +ASCII without markup, Texinfo input format, LaTeX input format, SGML +or XML using a publicly available DTD, and standard-conforming simple +HTML designed for human modification. Opaque formats include +PostScript, PDF, proprietary formats that can be read and edited only +by proprietary word processors, SGML or XML for which the DTD and/or +processing tools are not generally available, and the +machine-generated HTML produced by some word processors for output +purposes only. + +The "Title Page" means, for a printed book, the title page itself, +plus such following pages as are needed to hold, legibly, the material +this License requires to appear in the title page. For works in +formats which do not have any title page as such, "Title Page" means +the text near the most prominent appearance of the work's title, +preceding the beginning of the body of the text. + + +2. VERBATIM COPYING + +You may copy and distribute the Document in any medium, either +commercially or noncommercially, provided that this License, the +copyright notices, and the license notice saying this License applies +to the Document are reproduced in all copies, and that you add no other +conditions whatsoever to those of this License. You may not use +technical measures to obstruct or control the reading or further +copying of the copies you make or distribute. However, you may accept +compensation in exchange for copies. If you distribute a large enough +number of copies you must also follow the conditions in section 3. + +You may also lend copies, under the same conditions stated above, and +you may publicly display copies. + + +3. COPYING IN QUANTITY + +If you publish printed copies of the Document numbering more than 100, +and the Document's license notice requires Cover Texts, you must enclose +the copies in covers that carry, clearly and legibly, all these Cover +Texts: Front-Cover Texts on the front cover, and Back-Cover Texts on +the back cover. Both covers must also clearly and legibly identify +you as the publisher of these copies. The front cover must present +the full title with all words of the title equally prominent and +visible. You may add other material on the covers in addition. +Copying with changes limited to the covers, as long as they preserve +the title of the Document and satisfy these conditions, can be treated +as verbatim copying in other respects. + +If the required texts for either cover are too voluminous to fit +legibly, you should put the first ones listed (as many as fit +reasonably) on the actual cover, and continue the rest onto adjacent +pages. + +If you publish or distribute Opaque copies of the Document numbering +more than 100, you must either include a machine-readable Transparent +copy along with each Opaque copy, or state in or with each Opaque copy +a publicly-accessible computer-network location containing a complete +Transparent copy of the Document, free of added material, which the +general network-using public has access to download anonymously at no +charge using public-standard network protocols. If you use the latter +option, you must take reasonably prudent steps, when you begin +distribution of Opaque copies in quantity, to ensure that this +Transparent copy will remain thus accessible at the stated location +until at least one year after the last time you distribute an Opaque +copy (directly or through your agents or retailers) of that edition to +the public. + +It is requested, but not required, that you contact the authors of the +Document well before redistributing any large number of copies, to give +them a chance to provide you with an updated version of the Document. + + +4. MODIFICATIONS + +You may copy and distribute a Modified Version of the Document under +the conditions of sections 2 and 3 above, provided that you release +the Modified Version under precisely this License, with the Modified +Version filling the role of the Document, thus licensing distribution +and modification of the Modified Version to whoever possesses a copy +of it. In addition, you must do these things in the Modified Version: + +A. Use in the Title Page (and on the covers, if any) a title distinct + from that of the Document, and from those of previous versions + (which should, if there were any, be listed in the History section + of the Document). You may use the same title as a previous version + if the original publisher of that version gives permission. +B. List on the Title Page, as authors, one or more persons or entities + responsible for authorship of the modifications in the Modified + Version, together with at least five of the principal authors of the + Document (all of its principal authors, if it has less than five). +C. State on the Title page the name of the publisher of the + Modified Version, as the publisher. +D. Preserve all the copyright notices of the Document. +E. Add an appropriate copyright notice for your modifications + adjacent to the other copyright notices. +F. Include, immediately after the copyright notices, a license notice + giving the public permission to use the Modified Version under the + terms of this License, in the form shown in the Addendum below. +G. Preserve in that license notice the full lists of Invariant Sections + and required Cover Texts given in the Document's license notice. +H. Include an unaltered copy of this License. +I. Preserve the section entitled "History", and its title, and add to + it an item stating at least the title, year, new authors, and + publisher of the Modified Version as given on the Title Page. If + there is no section entitled "History" in the Document, create one + stating the title, year, authors, and publisher of the Document as + given on its Title Page, then add an item describing the Modified + Version as stated in the previous sentence. +J. Preserve the network location, if any, given in the Document for + public access to a Transparent copy of the Document, and likewise + the network locations given in the Document for previous versions + it was based on. These may be placed in the "History" section. + You may omit a network location for a work that was published at + least four years before the Document itself, or if the original + publisher of the version it refers to gives permission. +K. In any section entitled "Acknowledgements" or "Dedications", + preserve the section's title, and preserve in the section all the + substance and tone of each of the contributor acknowledgements + and/or dedications given therein. +L. Preserve all the Invariant Sections of the Document, + unaltered in their text and in their titles. Section numbers + or the equivalent are not considered part of the section titles. +M. Delete any section entitled "Endorsements". Such a section + may not be included in the Modified Version. +N. Do not retitle any existing section as "Endorsements" + or to conflict in title with any Invariant Section. + +If the Modified Version includes new front-matter sections or +appendices that qualify as Secondary Sections and contain no material +copied from the Document, you may at your option designate some or all +of these sections as invariant. To do this, add their titles to the +list of Invariant Sections in the Modified Version's license notice. +These titles must be distinct from any other section titles. + +You may add a section entitled "Endorsements", provided it contains +nothing but endorsements of your Modified Version by various +parties--for example, statements of peer review or that the text has +been approved by an organization as the authoritative definition of a +standard. + +You may add a passage of up to five words as a Front-Cover Text, and a +passage of up to 25 words as a Back-Cover Text, to the end of the list +of Cover Texts in the Modified Version. Only one passage of +Front-Cover Text and one of Back-Cover Text may be added by (or +through arrangements made by) any one entity. If the Document already +includes a cover text for the same cover, previously added by you or +by arrangement made by the same entity you are acting on behalf of, +you may not add another; but you may replace the old one, on explicit +permission from the previous publisher that added the old one. + +The author(s) and publisher(s) of the Document do not by this License +give permission to use their names for publicity for or to assert or +imply endorsement of any Modified Version. + + +5. COMBINING DOCUMENTS + +You may combine the Document with other documents released under this +License, under the terms defined in section 4 above for modified +versions, provided that you include in the combination all of the +Invariant Sections of all of the original documents, unmodified, and +list them all as Invariant Sections of your combined work in its +license notice. + +The combined work need only contain one copy of this License, and +multiple identical Invariant Sections may be replaced with a single +copy. If there are multiple Invariant Sections with the same name but +different contents, make the title of each such section unique by +adding at the end of it, in parentheses, the name of the original +author or publisher of that section if known, or else a unique number. +Make the same adjustment to the section titles in the list of +Invariant Sections in the license notice of the combined work. + +In the combination, you must combine any sections entitled "History" +in the various original documents, forming one section entitled +"History"; likewise combine any sections entitled "Acknowledgements", +and any sections entitled "Dedications". You must delete all sections +entitled "Endorsements." + + +6. COLLECTIONS OF DOCUMENTS + +You may make a collection consisting of the Document and other documents +released under this License, and replace the individual copies of this +License in the various documents with a single copy that is included in +the collection, provided that you follow the rules of this License for +verbatim copying of each of the documents in all other respects. + +You may extract a single document from such a collection, and distribute +it individually under this License, provided you insert a copy of this +License into the extracted document, and follow this License in all +other respects regarding verbatim copying of that document. + + +7. AGGREGATION WITH INDEPENDENT WORKS + +A compilation of the Document or its derivatives with other separate +and independent documents or works, in or on a volume of a storage or +distribution medium, does not as a whole count as a Modified Version +of the Document, provided no compilation copyright is claimed for the +compilation. Such a compilation is called an "aggregate", and this +License does not apply to the other self-contained works thus compiled +with the Document, on account of their being thus compiled, if they +are not themselves derivative works of the Document. + +If the Cover Text requirement of section 3 is applicable to these +copies of the Document, then if the Document is less than one quarter +of the entire aggregate, the Document's Cover Texts may be placed on +covers that surround only the Document within the aggregate. +Otherwise they must appear on covers around the whole aggregate. + + +8. TRANSLATION + +Translation is considered a kind of modification, so you may +distribute translations of the Document under the terms of section 4. +Replacing Invariant Sections with translations requires special +permission from their copyright holders, but you may include +translations of some or all Invariant Sections in addition to the +original versions of these Invariant Sections. You may include a +translation of this License provided that you also include the +original English version of this License. In case of a disagreement +between the translation and the original English version of this +License, the original English version will prevail. + + +9. TERMINATION + +You may not copy, modify, sublicense, or distribute the Document except +as expressly provided for under this License. Any other attempt to +copy, modify, sublicense or distribute the Document is void, and will +automatically terminate your rights under this License. However, +parties who have received copies, or rights, from you under this +License will not have their licenses terminated so long as such +parties remain in full compliance. + + +10. FUTURE REVISIONS OF THIS LICENSE + +The Free Software Foundation may publish new, revised versions +of the GNU Free Documentation License from time to time. Such new +versions will be similar in spirit to the present version, but may +differ in detail to address new problems or concerns. See +https://www.gnu.org/licenses/. + +Each version of the License is given a distinguishing version number. +If the Document specifies that a particular numbered version of this +License "or any later version" applies to it, you have the option of +following the terms and conditions either of that specified version or +of any later version that has been published (not as a draft) by the +Free Software Foundation. If the Document does not specify a version +number of this License, you may choose any version ever published (not +as a draft) by the Free Software Foundation. + + +ADDENDUM: How to use this License for your documents + +To use this License in a document you have written, include a copy of +the License in the document and put the following copyright and +license notices just after the title page: + + Copyright (c) YEAR YOUR NAME. + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.1 + or any later version published by the Free Software Foundation; + with the Invariant Sections being LIST THEIR TITLES, with the + Front-Cover Texts being LIST, and with the Back-Cover Texts being LIST. + A copy of the license is included in the section entitled "GNU + Free Documentation License". + +If you have no Invariant Sections, write "with no Invariant Sections" +instead of saying which ones are invariant. If you have no +Front-Cover Texts, write "no Front-Cover Texts" instead of +"Front-Cover Texts being LIST"; likewise for Back-Cover Texts. + +If your document contains nontrivial examples of program code, we +recommend releasing these examples in parallel under your choice of +free software license, such as the GNU General Public License, +to permit their use in free software. diff --git a/LICENSES/deprecated/GFDL-1.2 b/LICENSES/deprecated/GFDL-1.2 new file mode 100644 index 000000000000..b97e99a11d37 --- /dev/null +++ b/LICENSES/deprecated/GFDL-1.2 @@ -0,0 +1,417 @@ +Valid-License-Identifier: GPL-2.0 OR GFDL-1.2-no-invariants-or-later +Valid-License-Identifier: GPL-2.0 OR GFDL-1.2-no-invariants-only +Valid-License-Identifier: GFDL-1.2-no-invariants-or-later +Valid-License-Identifier: GFDL-1.2-no-invariants-only +SPDX-URL: https://spdx.org/licenses/GFDL-1.2-no-invariants-or-later.html +Usage-Guide: + The GNU Free Documentation License should only be used without + Invariant Sections, Front-Cover Texts or Back-Cover Texts. + It should not be used for new documents. + To use the license in source code, put the following SPDX tag/value pair + into a comment according to the placement guidelines in the licensing + rules documentation: + SPDX-License-Identifier: GPL-2.0 OR GFDL-1.2-no-invariants-or-later + or + SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-no-invariants-only + or + SPDX-License-Identifier: GFDL-1.2-no-invariants-or-later + or + SPDX-License-Identifier: GFDL-1.2-no-invariants-only +License-Text: + GNU Free Documentation License + Version 1.2, November 2002 + + + Copyright (C) 2000,2001,2002 Free Software Foundation, Inc. + 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + + +0. PREAMBLE + +The purpose of this License is to make a manual, textbook, or other +functional and useful document "free" in the sense of freedom: to +assure everyone the effective freedom to copy and redistribute it, +with or without modifying it, either commercially or noncommercially. +Secondarily, this License preserves for the author and publisher a way +to get credit for their work, while not being considered responsible +for modifications made by others. + +This License is a kind of "copyleft", which means that derivative +works of the document must themselves be free in the same sense. It +complements the GNU General Public License, which is a copyleft +license designed for free software. + +We have designed this License in order to use it for manuals for free +software, because free software needs free documentation: a free +program should come with manuals providing the same freedoms that the +software does. But this License is not limited to software manuals; +it can be used for any textual work, regardless of subject matter or +whether it is published as a printed book. We recommend this License +principally for works whose purpose is instruction or reference. + + +1. APPLICABILITY AND DEFINITIONS + +This License applies to any manual or other work, in any medium, that +contains a notice placed by the copyright holder saying it can be +distributed under the terms of this License. Such a notice grants a +world-wide, royalty-free license, unlimited in duration, to use that +work under the conditions stated herein. The "Document", below, +refers to any such manual or work. Any member of the public is a +licensee, and is addressed as "you". You accept the license if you +copy, modify or distribute the work in a way requiring permission +under copyright law. + +A "Modified Version" of the Document means any work containing the +Document or a portion of it, either copied verbatim, or with +modifications and/or translated into another language. + +A "Secondary Section" is a named appendix or a front-matter section of +the Document that deals exclusively with the relationship of the +publishers or authors of the Document to the Document's overall subject +(or to related matters) and contains nothing that could fall directly +within that overall subject. (Thus, if the Document is in part a +textbook of mathematics, a Secondary Section may not explain any +mathematics.) The relationship could be a matter of historical +connection with the subject or with related matters, or of legal, +commercial, philosophical, ethical or political position regarding +them. + +The "Invariant Sections" are certain Secondary Sections whose titles +are designated, as being those of Invariant Sections, in the notice +that says that the Document is released under this License. If a +section does not fit the above definition of Secondary then it is not +allowed to be designated as Invariant. The Document may contain zero +Invariant Sections. If the Document does not identify any Invariant +Sections then there are none. + +The "Cover Texts" are certain short passages of text that are listed, +as Front-Cover Texts or Back-Cover Texts, in the notice that says that +the Document is released under this License. A Front-Cover Text may +be at most 5 words, and a Back-Cover Text may be at most 25 words. + +A "Transparent" copy of the Document means a machine-readable copy, +represented in a format whose specification is available to the +general public, that is suitable for revising the document +straightforwardly with generic text editors or (for images composed of +pixels) generic paint programs or (for drawings) some widely available +drawing editor, and that is suitable for input to text formatters or +for automatic translation to a variety of formats suitable for input +to text formatters. A copy made in an otherwise Transparent file +format whose markup, or absence of markup, has been arranged to thwart +or discourage subsequent modification by readers is not Transparent. +An image format is not Transparent if used for any substantial amount +of text. A copy that is not "Transparent" is called "Opaque". + +Examples of suitable formats for Transparent copies include plain +ASCII without markup, Texinfo input format, LaTeX input format, SGML +or XML using a publicly available DTD, and standard-conforming simple +HTML, PostScript or PDF designed for human modification. Examples of +transparent image formats include PNG, XCF and JPG. Opaque formats +include proprietary formats that can be read and edited only by +proprietary word processors, SGML or XML for which the DTD and/or +processing tools are not generally available, and the +machine-generated HTML, PostScript or PDF produced by some word +processors for output purposes only. + +The "Title Page" means, for a printed book, the title page itself, +plus such following pages as are needed to hold, legibly, the material +this License requires to appear in the title page. For works in +formats which do not have any title page as such, "Title Page" means +the text near the most prominent appearance of the work's title, +preceding the beginning of the body of the text. + +A section "Entitled XYZ" means a named subunit of the Document whose +title either is precisely XYZ or contains XYZ in parentheses following +text that translates XYZ in another language. (Here XYZ stands for a +specific section name mentioned below, such as "Acknowledgements", +"Dedications", "Endorsements", or "History".) To "Preserve the Title" +of such a section when you modify the Document means that it remains a +section "Entitled XYZ" according to this definition. + +The Document may include Warranty Disclaimers next to the notice which +states that this License applies to the Document. These Warranty +Disclaimers are considered to be included by reference in this +License, but only as regards disclaiming warranties: any other +implication that these Warranty Disclaimers may have is void and has +no effect on the meaning of this License. + + +2. VERBATIM COPYING + +You may copy and distribute the Document in any medium, either +commercially or noncommercially, provided that this License, the +copyright notices, and the license notice saying this License applies +to the Document are reproduced in all copies, and that you add no other +conditions whatsoever to those of this License. You may not use +technical measures to obstruct or control the reading or further +copying of the copies you make or distribute. However, you may accept +compensation in exchange for copies. If you distribute a large enough +number of copies you must also follow the conditions in section 3. + +You may also lend copies, under the same conditions stated above, and +you may publicly display copies. + + +3. COPYING IN QUANTITY + +If you publish printed copies (or copies in media that commonly have +printed covers) of the Document, numbering more than 100, and the +Document's license notice requires Cover Texts, you must enclose the +copies in covers that carry, clearly and legibly, all these Cover +Texts: Front-Cover Texts on the front cover, and Back-Cover Texts on +the back cover. Both covers must also clearly and legibly identify +you as the publisher of these copies. The front cover must present +the full title with all words of the title equally prominent and +visible. You may add other material on the covers in addition. +Copying with changes limited to the covers, as long as they preserve +the title of the Document and satisfy these conditions, can be treated +as verbatim copying in other respects. + +If the required texts for either cover are too voluminous to fit +legibly, you should put the first ones listed (as many as fit +reasonably) on the actual cover, and continue the rest onto adjacent +pages. + +If you publish or distribute Opaque copies of the Document numbering +more than 100, you must either include a machine-readable Transparent +copy along with each Opaque copy, or state in or with each Opaque copy +a computer-network location from which the general network-using +public has access to download using public-standard network protocols +a complete Transparent copy of the Document, free of added material. +If you use the latter option, you must take reasonably prudent steps, +when you begin distribution of Opaque copies in quantity, to ensure +that this Transparent copy will remain thus accessible at the stated +location until at least one year after the last time you distribute an +Opaque copy (directly or through your agents or retailers) of that +edition to the public. + +It is requested, but not required, that you contact the authors of the +Document well before redistributing any large number of copies, to give +them a chance to provide you with an updated version of the Document. + + +4. MODIFICATIONS + +You may copy and distribute a Modified Version of the Document under +the conditions of sections 2 and 3 above, provided that you release +the Modified Version under precisely this License, with the Modified +Version filling the role of the Document, thus licensing distribution +and modification of the Modified Version to whoever possesses a copy +of it. In addition, you must do these things in the Modified Version: + +A. Use in the Title Page (and on the covers, if any) a title distinct + from that of the Document, and from those of previous versions + (which should, if there were any, be listed in the History section + of the Document). You may use the same title as a previous version + if the original publisher of that version gives permission. +B. List on the Title Page, as authors, one or more persons or entities + responsible for authorship of the modifications in the Modified + Version, together with at least five of the principal authors of the + Document (all of its principal authors, if it has fewer than five), + unless they release you from this requirement. +C. State on the Title page the name of the publisher of the + Modified Version, as the publisher. +D. Preserve all the copyright notices of the Document. +E. Add an appropriate copyright notice for your modifications + adjacent to the other copyright notices. +F. Include, immediately after the copyright notices, a license notice + giving the public permission to use the Modified Version under the + terms of this License, in the form shown in the Addendum below. +G. Preserve in that license notice the full lists of Invariant Sections + and required Cover Texts given in the Document's license notice. +H. Include an unaltered copy of this License. +I. Preserve the section Entitled "History", Preserve its Title, and add + to it an item stating at least the title, year, new authors, and + publisher of the Modified Version as given on the Title Page. If + there is no section Entitled "History" in the Document, create one + stating the title, year, authors, and publisher of the Document as + given on its Title Page, then add an item describing the Modified + Version as stated in the previous sentence. +J. Preserve the network location, if any, given in the Document for + public access to a Transparent copy of the Document, and likewise + the network locations given in the Document for previous versions + it was based on. These may be placed in the "History" section. + You may omit a network location for a work that was published at + least four years before the Document itself, or if the original + publisher of the version it refers to gives permission. +K. For any section Entitled "Acknowledgements" or "Dedications", + Preserve the Title of the section, and preserve in the section all + the substance and tone of each of the contributor acknowledgements + and/or dedications given therein. +L. Preserve all the Invariant Sections of the Document, + unaltered in their text and in their titles. Section numbers + or the equivalent are not considered part of the section titles. +M. Delete any section Entitled "Endorsements". Such a section + may not be included in the Modified Version. +N. Do not retitle any existing section to be Entitled "Endorsements" + or to conflict in title with any Invariant Section. +O. Preserve any Warranty Disclaimers. + +If the Modified Version includes new front-matter sections or +appendices that qualify as Secondary Sections and contain no material +copied from the Document, you may at your option designate some or all +of these sections as invariant. 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From 6bb951f193efc057c3242a878d70eb8c56efe505 Mon Sep 17 00:00:00 2001 From: Mikhail Zaslonko Date: Wed, 1 Apr 2020 23:13:16 +0200 Subject: [PATCH 210/433] LICENSES/deprecated: add Zlib license text The new files contributed to zlib have Zlib SPDX license identifier. Since there was no Zlib license text in LICENSES, scripts/spdxcheck.py reported the following errors: lib/zlib_dfltcc/dfltcc.c: 1:28 Invalid License ID: Zlib lib/zlib_dfltcc/dfltcc.h: 1:28 Invalid License ID: Zlib lib/zlib_dfltcc/dfltcc_deflate.c: 1:28 Invalid License ID: Zlib lib/zlib_dfltcc/dfltcc_inflate.c: 1:28 Invalid License ID: Zlib lib/zlib_dfltcc/dfltcc_util.h: 1:28 Invalid License ID: Zlib The patch adds Zlib SPDX license to LICENSES/deprecated, thus resolving the issues reported by spdxcheck. Suggested-by: Lukas Bulwahn Reviewed-by: Lukas Bulwahn Signed-off-by: Mikhail Zaslonko Signed-off-by: Greg Kroah-Hartman --- LICENSES/deprecated/Zlib | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) create mode 100644 LICENSES/deprecated/Zlib diff --git a/LICENSES/deprecated/Zlib b/LICENSES/deprecated/Zlib new file mode 100644 index 000000000000..b60d0d73f131 --- /dev/null +++ b/LICENSES/deprecated/Zlib @@ -0,0 +1,27 @@ +Valid-License-Identifier: Zlib +SPDX-URL: https://spdx.org/licenses/Zlib.html +Usage-Guide: + To use the Zlib License put the following SPDX tag/value pair into a + comment according to the placement guidelines in the licensing rules + documentation: + SPDX-License-Identifier: Zlib +License-Text: + +zlib License + +Copyright (c) + +This software is provided 'as-is', without any express or implied warranty. In +no event will the authors be held liable for any damages arising from the use +of this software. + +Permission is granted to anyone to use this software for any purpose, including +commercial applications, and to alter it and redistribute it freely, subject +to the following restrictions: + 1. The origin of this software must not be misrepresented; you must not +claim that you wrote the original software. If you use this software in a +product, an acknowledgment in the product documentation would be appreciated +but is not required. + 2. Altered source versions must be plainly marked as such, and must not be +misrepresented as being the original software. + 3. This notice may not be removed or altered from any source distribution. From 5ec4f0ce42210095e633081172a483cc39bac914 Mon Sep 17 00:00:00 2001 From: Lukas Bulwahn Date: Wed, 16 Sep 2020 10:58:24 +0200 Subject: [PATCH 211/433] net/mlx5: IPsec: make spdxcheck.py happy Commit 2d64663cd559 ("net/mlx5: IPsec: Add HW crypto offload support") provided a proper SPDX license expression, but slipped in a typo. Fortunately, ./scripts/spdxcheck.py warns: drivers/net/ethernet/mellanox/mlx5/core/accel/ipsec_offload.c: 1:39 \ Invalid License ID: Linux-OpenIBt Remove the typo and make spdxcheck.py happy. Signed-off-by: Lukas Bulwahn Signed-off-by: Greg Kroah-Hartman --- drivers/net/ethernet/mellanox/mlx5/core/accel/ipsec_offload.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/accel/ipsec_offload.c b/drivers/net/ethernet/mellanox/mlx5/core/accel/ipsec_offload.c index 2f13a250aab3..d6667d38e1de 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/accel/ipsec_offload.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/accel/ipsec_offload.c @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIBt +// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB /* Copyright (c) 2020, Mellanox Technologies inc. All rights reserved. */ #include "mlx5_core.h" From 1b24f46925d061b7fab70c828bac6774faf37f93 Mon Sep 17 00:00:00 2001 From: Tetsuo Handa Date: Tue, 15 Sep 2020 09:00:17 +0900 Subject: [PATCH 212/433] newport_con: remove no-op newport_set_origin() We don't need to call vc->vc_sw->con_set_origin() from set_origin() if it is no-op. Signed-off-by: Tetsuo Handa Link: https://lore.kernel.org/r/20200915000019.3422-1-penguin-kernel@I-love.SAKURA.ne.jp Signed-off-by: Greg Kroah-Hartman --- drivers/video/console/newport_con.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/drivers/video/console/newport_con.c b/drivers/video/console/newport_con.c index 0d0989040c58..d494108fce4c 100644 --- a/drivers/video/console/newport_con.c +++ b/drivers/video/console/newport_con.c @@ -678,11 +678,6 @@ static bool newport_scroll(struct vc_data *vc, unsigned int t, unsigned int b, return true; } -static int newport_set_origin(struct vc_data *vc) -{ - return 0; -} - static void newport_save_screen(struct vc_data *vc) { } const struct consw newport_con = { @@ -699,7 +694,6 @@ const struct consw newport_con = { .con_blank = newport_blank, .con_font_set = newport_font_set, .con_font_default = newport_font_default, - .con_set_origin = newport_set_origin, .con_save_screen = newport_save_screen }; From 23f87274f0ad4a9167de23a330ed88966634fdf6 Mon Sep 17 00:00:00 2001 From: Tetsuo Handa Date: Tue, 15 Sep 2020 09:00:18 +0900 Subject: [PATCH 213/433] sticon: remove no-op sticon_set_origin() We don't need to call vc->vc_sw->con_set_origin() from set_origin() if it is no-op. Signed-off-by: Tetsuo Handa Link: https://lore.kernel.org/r/20200915000019.3422-2-penguin-kernel@I-love.SAKURA.ne.jp Signed-off-by: Greg Kroah-Hartman --- drivers/video/console/sticon.c | 7 ------- 1 file changed, 7 deletions(-) diff --git a/drivers/video/console/sticon.c b/drivers/video/console/sticon.c index e21147e8a14e..e7fd995d3aea 100644 --- a/drivers/video/console/sticon.c +++ b/drivers/video/console/sticon.c @@ -217,11 +217,6 @@ static int sticon_switch(struct vc_data *conp) return 1; /* needs refreshing */ } -static int sticon_set_origin(struct vc_data *conp) -{ - return 0; -} - static int sticon_blank(struct vc_data *c, int blank, int mode_switch) { if (blank == 0) { @@ -229,7 +224,6 @@ static int sticon_blank(struct vc_data *c, int blank, int mode_switch) vga_is_gfx = 0; return 1; } - sticon_set_origin(c); sti_clear(sticon_sti, 0,0, c->vc_rows, c->vc_cols, BLANK); if (mode_switch) vga_is_gfx = 1; @@ -334,7 +328,6 @@ static const struct consw sti_con = { .con_scroll = sticon_scroll, .con_switch = sticon_switch, .con_blank = sticon_blank, - .con_set_origin = sticon_set_origin, .con_save_screen = sticon_save_screen, .con_build_attr = sticon_build_attr, .con_invert_region = sticon_invert_region, From b85300173d027131ced9a654c506785f15cfdd6f Mon Sep 17 00:00:00 2001 From: Oliver Neukum Date: Wed, 16 Sep 2020 21:15:44 +0200 Subject: [PATCH 214/433] driver core: force NOIO allocations during unplug There is one overlooked situation under which a driver must not do IO to allocate memory. You cannot do that while disconnecting a device. A device being disconnected is no longer functional in most cases, yet IO may fail only when the handler runs. Signed-off-by: Oliver Neukum Link: https://lore.kernel.org/r/20200916191544.5104-1-oneukum@suse.com Signed-off-by: Greg Kroah-Hartman --- drivers/base/core.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/base/core.c b/drivers/base/core.c index bb5806a2bd4c..b79783454293 100644 --- a/drivers/base/core.c +++ b/drivers/base/core.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include "base.h" @@ -3062,6 +3063,7 @@ void device_del(struct device *dev) struct device *parent = dev->parent; struct kobject *glue_dir = NULL; struct class_interface *class_intf; + unsigned int noio_flag; device_lock(dev); kill_device(dev); @@ -3073,6 +3075,7 @@ void device_del(struct device *dev) /* Notify clients of device removal. This call must come * before dpm_sysfs_remove(). */ + noio_flag = memalloc_noio_save(); if (dev->bus) blocking_notifier_call_chain(&dev->bus->p->bus_notifier, BUS_NOTIFY_DEL_DEVICE, dev); @@ -3114,6 +3117,7 @@ void device_del(struct device *dev) glue_dir = get_glue_dir(dev); kobject_del(&dev->kobj); cleanup_glue_dir(dev, glue_dir); + memalloc_noio_restore(noio_flag); put_device(parent); } EXPORT_SYMBOL_GPL(device_del); From 3abee4579484c554961bb0af92a77adc0ebd791d Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Mon, 14 Sep 2020 23:43:29 +0200 Subject: [PATCH 215/433] mfd: Add simple regmap based I2C driver There are I2C devices which contain several different functions but doesn't require any special access functions. For these kind of drivers an I2C regmap should be enough. Create an I2C driver which creates an I2C regmap and enumerates its children. If a device wants to use this as its MFD core driver, it has to add an individual compatible string. It may provide its own regmap configuration. Subdevices can use dev_get_regmap() on the parent to get their regmap instance. Signed-off-by: Michael Walle Signed-off-by: Lee Jones --- drivers/mfd/Kconfig | 12 ++++++++ drivers/mfd/Makefile | 1 + drivers/mfd/simple-mfd-i2c.c | 56 ++++++++++++++++++++++++++++++++++++ 3 files changed, 69 insertions(+) create mode 100644 drivers/mfd/simple-mfd-i2c.c diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 33df0837ab41..6e1a38944d28 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -1162,6 +1162,18 @@ config MFD_SI476X_CORE To compile this driver as a module, choose M here: the module will be called si476x-core. +config MFD_SIMPLE_MFD_I2C + tristate + depends on I2C + select REGMAP_I2C + help + This driver creates a single register map with the intention for it + to be shared by all sub-devices. + + Once the register map has been successfully initialised, any + sub-devices represented by child nodes in Device Tree will be + subsequently registered. + config MFD_SM501 tristate "Silicon Motion SM501" depends on HAS_DMA diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index a60e5f835283..78d24a3e7c9e 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -264,3 +264,4 @@ obj-$(CONFIG_MFD_STMFX) += stmfx.o obj-$(CONFIG_MFD_KHADAS_MCU) += khadas-mcu.o obj-$(CONFIG_SGI_MFD_IOC3) += ioc3.o +obj-$(CONFIG_MFD_SIMPLE_MFD_I2C) += simple-mfd-i2c.o diff --git a/drivers/mfd/simple-mfd-i2c.c b/drivers/mfd/simple-mfd-i2c.c new file mode 100644 index 000000000000..28e96a246be1 --- /dev/null +++ b/drivers/mfd/simple-mfd-i2c.c @@ -0,0 +1,56 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Simple MFD - I2C + * + * This driver creates a single register map with the intention for it to be + * shared by all sub-devices. Children can use their parent's device structure + * (dev.parent) in order to reference it. + * + * Once the register map has been successfully initialised, any sub-devices + * represented by child nodes in Device Tree will be subsequently registered. + */ + +#include +#include +#include +#include +#include + +static const struct regmap_config simple_regmap_config = { + .reg_bits = 8, + .val_bits = 8, +}; + +static int simple_mfd_i2c_probe(struct i2c_client *i2c) +{ + const struct regmap_config *config; + struct regmap *regmap; + + config = device_get_match_data(&i2c->dev); + if (!config) + config = &simple_regmap_config; + + regmap = devm_regmap_init_i2c(i2c, config); + if (IS_ERR(regmap)) + return PTR_ERR(regmap); + + return devm_of_platform_populate(&i2c->dev); +} + +static const struct of_device_id simple_mfd_i2c_of_match[] = { + {} +}; +MODULE_DEVICE_TABLE(of, simple_mfd_i2c_of_match); + +static struct i2c_driver simple_mfd_i2c_driver = { + .probe_new = simple_mfd_i2c_probe, + .driver = { + .name = "simple-mfd-i2c", + .of_match_table = simple_mfd_i2c_of_match, + }, +}; +module_i2c_driver(simple_mfd_i2c_driver); + +MODULE_AUTHOR("Michael Walle "); +MODULE_DESCRIPTION("Simple MFD - I2C driver"); +MODULE_LICENSE("GPL v2"); From 48e28a249e3bcc31e6a2d27267410a6f5a03e39e Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Mon, 14 Sep 2020 23:43:30 +0200 Subject: [PATCH 216/433] dt-bindings: mfd: Add bindings for sl28cpld Add a device tree bindings for the board management controller found on the Kontron SMARC-sAL28 board. Signed-off-by: Michael Walle Reviewed-by: Rob Herring Signed-off-by: Lee Jones --- .../bindings/gpio/kontron,sl28cpld-gpio.yaml | 54 +++++++ .../hwmon/kontron,sl28cpld-hwmon.yaml | 27 ++++ .../kontron,sl28cpld-intc.yaml | 54 +++++++ .../bindings/mfd/kontron,sl28cpld.yaml | 153 ++++++++++++++++++ .../bindings/pwm/kontron,sl28cpld-pwm.yaml | 35 ++++ .../watchdog/kontron,sl28cpld-wdt.yaml | 35 ++++ 6 files changed, 358 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/kontron,sl28cpld-gpio.yaml create mode 100644 Documentation/devicetree/bindings/hwmon/kontron,sl28cpld-hwmon.yaml create mode 100644 Documentation/devicetree/bindings/interrupt-controller/kontron,sl28cpld-intc.yaml create mode 100644 Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml create mode 100644 Documentation/devicetree/bindings/pwm/kontron,sl28cpld-pwm.yaml create mode 100644 Documentation/devicetree/bindings/watchdog/kontron,sl28cpld-wdt.yaml diff --git a/Documentation/devicetree/bindings/gpio/kontron,sl28cpld-gpio.yaml b/Documentation/devicetree/bindings/gpio/kontron,sl28cpld-gpio.yaml new file mode 100644 index 000000000000..e2d2c10e536a --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/kontron,sl28cpld-gpio.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/kontron,sl28cpld-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: GPIO driver for the sl28cpld board management controller + +maintainers: + - Michael Walle + +description: | + This module is part of the sl28cpld multi-function device. For more + details see ../mfd/kontron,sl28cpld.yaml. + + There are three flavors of the GPIO controller, one full featured + input/output with interrupt support (kontron,sl28cpld-gpio), one + output-only (kontron,sl28-gpo) and one input-only (kontron,sl28-gpi). + + Each controller supports 8 GPIO lines. + +properties: + compatible: + enum: + - kontron,sl28cpld-gpio + - kontron,sl28cpld-gpi + - kontron,sl28cpld-gpo + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + "#interrupt-cells": + const: 2 + + interrupt-controller: true + + "#gpio-cells": + const: 2 + + gpio-controller: true + + gpio-line-names: + minItems: 1 + maxItems: 8 + +required: + - compatible + - "#gpio-cells" + - gpio-controller + +additionalProperties: false diff --git a/Documentation/devicetree/bindings/hwmon/kontron,sl28cpld-hwmon.yaml b/Documentation/devicetree/bindings/hwmon/kontron,sl28cpld-hwmon.yaml new file mode 100644 index 000000000000..010333cb25c0 --- /dev/null +++ b/Documentation/devicetree/bindings/hwmon/kontron,sl28cpld-hwmon.yaml @@ -0,0 +1,27 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwmon/kontron,sl28cpld-hwmon.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Hardware monitoring driver for the sl28cpld board management controller + +maintainers: + - Michael Walle + +description: | + This module is part of the sl28cpld multi-function device. For more + details see ../mfd/kontron,sl28cpld.yaml. + +properties: + compatible: + enum: + - kontron,sl28cpld-fan + + reg: + maxItems: 1 + +required: + - compatible + +additionalProperties: false diff --git a/Documentation/devicetree/bindings/interrupt-controller/kontron,sl28cpld-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/kontron,sl28cpld-intc.yaml new file mode 100644 index 000000000000..e8dfa6507f64 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/kontron,sl28cpld-intc.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/kontron,sl28cpld-intc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Interrupt controller driver for the sl28cpld board management controller + +maintainers: + - Michael Walle + +description: | + This module is part of the sl28cpld multi-function device. For more + details see ../mfd/kontron,sl28cpld.yaml. + + The following interrupts are available. All types and levels are fixed + and handled by the board management controller. + + ==== ============= ================================== + IRQ line/device description + ==== ============= ================================== + 0 RTC_INT# Interrupt line from on-board RTC + 1 SMB_ALERT# Event on SMB_ALERT# line (P1) + 2 ESPI_ALERT0# Event on ESPI_ALERT0# line (S43) + 3 ESPI_ALERT1# Event on ESPI_ALERT1# line (S44) + 4 PWR_BTN# Event on PWR_BTN# line (P128) + 5 SLEEP# Event on SLEEP# line (S149) + 6 watchdog Interrupt of the internal watchdog + 7 n/a not used + ==== ============= ================================== + +properties: + compatible: + enum: + - kontron,sl28cpld-intc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + "#interrupt-cells": + const: 2 + + interrupt-controller: true + +required: + - compatible + - interrupts + - "#interrupt-cells" + - interrupt-controller + +additionalProperties: false diff --git a/Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml b/Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml new file mode 100644 index 000000000000..eb3b43547cb6 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml @@ -0,0 +1,153 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/kontron,sl28cpld.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Kontron's sl28cpld board management controller + +maintainers: + - Michael Walle + +description: | + The board management controller may contain different IP blocks like + watchdog, fan monitoring, PWM controller, interrupt controller and a + GPIO controller. + +properties: + compatible: + const: kontron,sl28cpld + + reg: + description: + I2C device address. + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + "#interrupt-cells": + const: 2 + + interrupts: + maxItems: 1 + + interrupt-controller: true + +patternProperties: + "^gpio(@[0-9a-f]+)?$": + $ref: ../gpio/kontron,sl28cpld-gpio.yaml + + "^hwmon(@[0-9a-f]+)?$": + $ref: ../hwmon/kontron,sl28cpld-hwmon.yaml + + "^interrupt-controller(@[0-9a-f]+)?$": + $ref: ../interrupt-controller/kontron,sl28cpld-intc.yaml + + "^pwm(@[0-9a-f]+)?$": + $ref: ../pwm/kontron,sl28cpld-pwm.yaml + + "^watchdog(@[0-9a-f]+)?$": + $ref: ../watchdog/kontron,sl28cpld-wdt.yaml + +required: + - "#address-cells" + - "#size-cells" + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + + sl28cpld@4a { + compatible = "kontron,sl28cpld"; + reg = <0x4a>; + #address-cells = <1>; + #size-cells = <0>; + + watchdog@4 { + compatible = "kontron,sl28cpld-wdt"; + reg = <0x4>; + kontron,assert-wdt-timeout-pin; + }; + + hwmon@b { + compatible = "kontron,sl28cpld-fan"; + reg = <0xb>; + }; + + pwm@c { + compatible = "kontron,sl28cpld-pwm"; + reg = <0xc>; + #pwm-cells = <2>; + }; + + pwm@e { + compatible = "kontron,sl28cpld-pwm"; + reg = <0xe>; + #pwm-cells = <2>; + }; + + gpio@10 { + compatible = "kontron,sl28cpld-gpio"; + reg = <0x10>; + interrupts-extended = <&gpio2 6 + IRQ_TYPE_EDGE_FALLING>; + + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = "a", "b", "c"; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio@15 { + compatible = "kontron,sl28cpld-gpio"; + reg = <0x15>; + interrupts-extended = <&gpio2 6 + IRQ_TYPE_EDGE_FALLING>; + + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio@1a { + compatible = "kontron,sl28cpld-gpo"; + reg = <0x1a>; + + gpio-controller; + #gpio-cells = <2>; + }; + + gpio@1b { + compatible = "kontron,sl28cpld-gpi"; + reg = <0x1b>; + + gpio-controller; + #gpio-cells = <2>; + }; + + interrupt-controller@1c { + compatible = "kontron,sl28cpld-intc"; + reg = <0x1c>; + interrupts-extended = <&gpio2 6 + IRQ_TYPE_EDGE_FALLING>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/pwm/kontron,sl28cpld-pwm.yaml b/Documentation/devicetree/bindings/pwm/kontron,sl28cpld-pwm.yaml new file mode 100644 index 000000000000..981cfec53f37 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/kontron,sl28cpld-pwm.yaml @@ -0,0 +1,35 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/kontron,sl28cpld-pwm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: PWM driver for the sl28cpld board management controller + +maintainers: + - Michael Walle + +description: | + This module is part of the sl28cpld multi-function device. For more + details see ../mfd/kontron,sl28cpld.yaml. + + The controller supports one PWM channel and supports only four distinct + frequencies (250Hz, 500Hz, 1kHz, 2kHz). + +allOf: + - $ref: pwm.yaml# + +properties: + compatible: + const: kontron,sl28cpld-pwm + + reg: + maxItems: 1 + + "#pwm-cells": + const: 2 + +required: + - compatible + +additionalProperties: false diff --git a/Documentation/devicetree/bindings/watchdog/kontron,sl28cpld-wdt.yaml b/Documentation/devicetree/bindings/watchdog/kontron,sl28cpld-wdt.yaml new file mode 100644 index 000000000000..179272f74de5 --- /dev/null +++ b/Documentation/devicetree/bindings/watchdog/kontron,sl28cpld-wdt.yaml @@ -0,0 +1,35 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/watchdog/kontron,sl28cpld-wdt.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Watchdog driver for the sl28cpld board management controller + +maintainers: + - Michael Walle + +description: | + This module is part of the sl28cpld multi-function device. For more + details see ../mfd/kontron,sl28cpld.yaml. + +allOf: + - $ref: watchdog.yaml# + +properties: + compatible: + const: kontron,sl28cpld-wdt + + reg: + maxItems: 1 + + kontron,assert-wdt-timeout-pin: + description: The SMARC standard defines a WDT_TIME_OUT# pin. If this + property is set, this output will be pulsed when the watchdog bites + and the system resets. + type: boolean + +required: + - compatible + +additionalProperties: false From a538ad229bbee4f8c68204c75b2e1ae43db875d6 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Mon, 14 Sep 2020 23:43:31 +0200 Subject: [PATCH 217/433] mfd: simple-mfd-i2c: Add sl28cpld support Add the core support for the board management controller found on the SMARC-sAL28 board. Also add a virtual symbol which pulls in the simple-mfd-i2c driver and provide a common symbol on which the subdevice drivers can depend on. At the moment, this controller is used on the Kontron SMARC-sAL28 board. Signed-off-by: Michael Walle Signed-off-by: Lee Jones --- drivers/mfd/Kconfig | 10 ++++++++++ drivers/mfd/simple-mfd-i2c.c | 1 + 2 files changed, 11 insertions(+) diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 6e1a38944d28..ed90eb5bdc83 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -1174,6 +1174,16 @@ config MFD_SIMPLE_MFD_I2C sub-devices represented by child nodes in Device Tree will be subsequently registered. +config MFD_SL28CPLD + tristate "Kontron sl28cpld Board Management Controller" + select MFD_SIMPLE_MFD_I2C + help + Say yes here to enable support for the Kontron sl28cpld board + management controller. + + It can be found on the following boards: + * SMARC-sAL28 + config MFD_SM501 tristate "Silicon Motion SM501" depends on HAS_DMA diff --git a/drivers/mfd/simple-mfd-i2c.c b/drivers/mfd/simple-mfd-i2c.c index 28e96a246be1..87f684cff9a1 100644 --- a/drivers/mfd/simple-mfd-i2c.c +++ b/drivers/mfd/simple-mfd-i2c.c @@ -38,6 +38,7 @@ static int simple_mfd_i2c_probe(struct i2c_client *i2c) } static const struct of_device_id simple_mfd_i2c_of_match[] = { + { .compatible = "kontron,sl28cpld" }, {} }; MODULE_DEVICE_TABLE(of, simple_mfd_i2c_of_match); From 03ac990e0ac0c2823282d5b8dd2d536d88bbe6c2 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Mon, 14 Sep 2020 23:43:32 +0200 Subject: [PATCH 218/433] irqchip: Add sl28cpld interrupt controller support Add support for the interrupt controller inside the sl28 CPLD management controller. The interrupt controller can handle at most 8 interrupts and is really simplistic and consists only of an interrupt mask and an interrupt pending register. Signed-off-by: Michael Walle Acked-by: Marc Zyngier Signed-off-by: Lee Jones --- drivers/irqchip/Kconfig | 8 +++ drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-sl28cpld.c | 96 ++++++++++++++++++++++++++++++++++ 3 files changed, 105 insertions(+) create mode 100644 drivers/irqchip/irq-sl28cpld.c diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index bb70b7177f94..19cd32ba2155 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -246,6 +246,14 @@ config RENESAS_RZA1_IRQC Enable support for the Renesas RZ/A1 Interrupt Controller, to use up to 8 external interrupts with configurable sense select. +config SL28CPLD_INTC + bool "Kontron sl28cpld IRQ controller" + depends on MFD_SL28CPLD=y || COMPILE_TEST + select REGMAP_IRQ + help + Interrupt controller driver for the board management controller + found on the Kontron sl28 CPLD. + config ST_IRQCHIP bool select REGMAP diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile index 133f9c45744a..39af7d89204d 100644 --- a/drivers/irqchip/Makefile +++ b/drivers/irqchip/Makefile @@ -111,3 +111,4 @@ obj-$(CONFIG_LOONGSON_HTPIC) += irq-loongson-htpic.o obj-$(CONFIG_LOONGSON_HTVEC) += irq-loongson-htvec.o obj-$(CONFIG_LOONGSON_PCH_PIC) += irq-loongson-pch-pic.o obj-$(CONFIG_LOONGSON_PCH_MSI) += irq-loongson-pch-msi.o +obj-$(CONFIG_SL28CPLD_INTC) += irq-sl28cpld.o diff --git a/drivers/irqchip/irq-sl28cpld.c b/drivers/irqchip/irq-sl28cpld.c new file mode 100644 index 000000000000..0aa50d025ef6 --- /dev/null +++ b/drivers/irqchip/irq-sl28cpld.c @@ -0,0 +1,96 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * sl28cpld interrupt controller driver + * + * Copyright 2020 Kontron Europe GmbH + */ + +#include +#include +#include +#include +#include +#include +#include + +#define INTC_IE 0x00 +#define INTC_IP 0x01 + +static const struct regmap_irq sl28cpld_irqs[] = { + REGMAP_IRQ_REG_LINE(0, 8), + REGMAP_IRQ_REG_LINE(1, 8), + REGMAP_IRQ_REG_LINE(2, 8), + REGMAP_IRQ_REG_LINE(3, 8), + REGMAP_IRQ_REG_LINE(4, 8), + REGMAP_IRQ_REG_LINE(5, 8), + REGMAP_IRQ_REG_LINE(6, 8), + REGMAP_IRQ_REG_LINE(7, 8), +}; + +struct sl28cpld_intc { + struct regmap *regmap; + struct regmap_irq_chip chip; + struct regmap_irq_chip_data *irq_data; +}; + +static int sl28cpld_intc_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct sl28cpld_intc *irqchip; + int irq; + u32 base; + int ret; + + if (!dev->parent) + return -ENODEV; + + irqchip = devm_kzalloc(dev, sizeof(*irqchip), GFP_KERNEL); + if (!irqchip) + return -ENOMEM; + + irqchip->regmap = dev_get_regmap(dev->parent, NULL); + if (!irqchip->regmap) + return -ENODEV; + + irq = platform_get_irq(pdev, 0); + if (irq < 0) + return irq; + + ret = device_property_read_u32(&pdev->dev, "reg", &base); + if (ret) + return -EINVAL; + + irqchip->chip.name = "sl28cpld-intc"; + irqchip->chip.irqs = sl28cpld_irqs; + irqchip->chip.num_irqs = ARRAY_SIZE(sl28cpld_irqs); + irqchip->chip.num_regs = 1; + irqchip->chip.status_base = base + INTC_IP; + irqchip->chip.mask_base = base + INTC_IE; + irqchip->chip.mask_invert = true, + irqchip->chip.ack_base = base + INTC_IP; + + return devm_regmap_add_irq_chip_fwnode(dev, dev_fwnode(dev), + irqchip->regmap, irq, + IRQF_SHARED | IRQF_ONESHOT, 0, + &irqchip->chip, + &irqchip->irq_data); +} + +static const struct of_device_id sl28cpld_intc_of_match[] = { + { .compatible = "kontron,sl28cpld-intc" }, + {} +}; +MODULE_DEVICE_TABLE(of, sl28cpld_intc_of_match); + +static struct platform_driver sl28cpld_intc_driver = { + .probe = sl28cpld_intc_probe, + .driver = { + .name = "sl28cpld-intc", + .of_match_table = sl28cpld_intc_of_match, + } +}; +module_platform_driver(sl28cpld_intc_driver); + +MODULE_DESCRIPTION("sl28cpld Interrupt Controller Driver"); +MODULE_AUTHOR("Michael Walle "); +MODULE_LICENSE("GPL"); From 85174ca663767c1c6f8dca3b0a2acfd4b5c37289 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Mon, 14 Sep 2020 23:43:33 +0200 Subject: [PATCH 219/433] watchdog: add support for sl28cpld watchdog Add support for the watchdog of the sl28cpld board management controller. This is part of a multi-function device driver. Signed-off-by: Michael Walle Acked-by: Guenter Roeck Signed-off-by: Lee Jones --- drivers/watchdog/Kconfig | 11 ++ drivers/watchdog/Makefile | 1 + drivers/watchdog/sl28cpld_wdt.c | 229 ++++++++++++++++++++++++++++++++ 3 files changed, 241 insertions(+) create mode 100644 drivers/watchdog/sl28cpld_wdt.c diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index ab7aad5a1e69..ba698340ed6f 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -340,6 +340,17 @@ config MLX_WDT To compile this driver as a module, choose M here: the module will be called mlx-wdt. +config SL28CPLD_WATCHDOG + tristate "Kontron sl28cpld Watchdog" + depends on MFD_SL28CPLD || COMPILE_TEST + select WATCHDOG_CORE + help + Say Y here to include support for the watchdog timer + on the Kontron sl28 CPLD. + + To compile this driver as a module, choose M here: the + module will be called sl28cpld_wdt. + # ALPHA Architecture # ARM Architecture diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile index 97bed1d3d97c..aa6e41126901 100644 --- a/drivers/watchdog/Makefile +++ b/drivers/watchdog/Makefile @@ -225,3 +225,4 @@ obj-$(CONFIG_MENF21BMC_WATCHDOG) += menf21bmc_wdt.o obj-$(CONFIG_MENZ069_WATCHDOG) += menz69_wdt.o obj-$(CONFIG_RAVE_SP_WATCHDOG) += rave-sp-wdt.o obj-$(CONFIG_STPMIC1_WATCHDOG) += stpmic1_wdt.o +obj-$(CONFIG_SL28CPLD_WATCHDOG) += sl28cpld_wdt.o diff --git a/drivers/watchdog/sl28cpld_wdt.c b/drivers/watchdog/sl28cpld_wdt.c new file mode 100644 index 000000000000..a45047d8d9ab --- /dev/null +++ b/drivers/watchdog/sl28cpld_wdt.c @@ -0,0 +1,229 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * sl28cpld watchdog driver + * + * Copyright 2020 Kontron Europe GmbH + */ + +#include +#include +#include +#include +#include +#include +#include + +/* + * Watchdog timer block registers. + */ +#define WDT_CTRL 0x00 +#define WDT_CTRL_EN BIT(0) +#define WDT_CTRL_LOCK BIT(2) +#define WDT_CTRL_ASSERT_SYS_RESET BIT(6) +#define WDT_CTRL_ASSERT_WDT_TIMEOUT BIT(7) +#define WDT_TIMEOUT 0x01 +#define WDT_KICK 0x02 +#define WDT_KICK_VALUE 0x6b +#define WDT_COUNT 0x03 + +#define WDT_DEFAULT_TIMEOUT 10 + +static bool nowayout = WATCHDOG_NOWAYOUT; +module_param(nowayout, bool, 0); +MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" + __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); + +static int timeout; +module_param(timeout, int, 0); +MODULE_PARM_DESC(timeout, "Initial watchdog timeout in seconds"); + +struct sl28cpld_wdt { + struct watchdog_device wdd; + struct regmap *regmap; + u32 offset; + bool assert_wdt_timeout; +}; + +static int sl28cpld_wdt_ping(struct watchdog_device *wdd) +{ + struct sl28cpld_wdt *wdt = watchdog_get_drvdata(wdd); + + return regmap_write(wdt->regmap, wdt->offset + WDT_KICK, + WDT_KICK_VALUE); +} + +static int sl28cpld_wdt_start(struct watchdog_device *wdd) +{ + struct sl28cpld_wdt *wdt = watchdog_get_drvdata(wdd); + unsigned int val; + + val = WDT_CTRL_EN | WDT_CTRL_ASSERT_SYS_RESET; + if (wdt->assert_wdt_timeout) + val |= WDT_CTRL_ASSERT_WDT_TIMEOUT; + if (nowayout) + val |= WDT_CTRL_LOCK; + + return regmap_update_bits(wdt->regmap, wdt->offset + WDT_CTRL, + val, val); +} + +static int sl28cpld_wdt_stop(struct watchdog_device *wdd) +{ + struct sl28cpld_wdt *wdt = watchdog_get_drvdata(wdd); + + return regmap_update_bits(wdt->regmap, wdt->offset + WDT_CTRL, + WDT_CTRL_EN, 0); +} + +static unsigned int sl28cpld_wdt_get_timeleft(struct watchdog_device *wdd) +{ + struct sl28cpld_wdt *wdt = watchdog_get_drvdata(wdd); + unsigned int val; + int ret; + + ret = regmap_read(wdt->regmap, wdt->offset + WDT_COUNT, &val); + if (ret) + return 0; + + return val; +} + +static int sl28cpld_wdt_set_timeout(struct watchdog_device *wdd, + unsigned int timeout) +{ + struct sl28cpld_wdt *wdt = watchdog_get_drvdata(wdd); + int ret; + + ret = regmap_write(wdt->regmap, wdt->offset + WDT_TIMEOUT, timeout); + if (ret) + return ret; + + wdd->timeout = timeout; + + return 0; +} + +static const struct watchdog_info sl28cpld_wdt_info = { + .options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING, + .identity = "sl28cpld watchdog", +}; + +static struct watchdog_ops sl28cpld_wdt_ops = { + .owner = THIS_MODULE, + .start = sl28cpld_wdt_start, + .stop = sl28cpld_wdt_stop, + .ping = sl28cpld_wdt_ping, + .set_timeout = sl28cpld_wdt_set_timeout, + .get_timeleft = sl28cpld_wdt_get_timeleft, +}; + +static int sl28cpld_wdt_probe(struct platform_device *pdev) +{ + struct watchdog_device *wdd; + struct sl28cpld_wdt *wdt; + unsigned int status; + unsigned int val; + int ret; + + if (!pdev->dev.parent) + return -ENODEV; + + wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL); + if (!wdt) + return -ENOMEM; + + wdt->regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!wdt->regmap) + return -ENODEV; + + ret = device_property_read_u32(&pdev->dev, "reg", &wdt->offset); + if (ret) + return -EINVAL; + + wdt->assert_wdt_timeout = device_property_read_bool(&pdev->dev, + "kontron,assert-wdt-timeout-pin"); + + /* initialize struct watchdog_device */ + wdd = &wdt->wdd; + wdd->parent = &pdev->dev; + wdd->info = &sl28cpld_wdt_info; + wdd->ops = &sl28cpld_wdt_ops; + wdd->min_timeout = 1; + wdd->max_timeout = 255; + + watchdog_set_drvdata(wdd, wdt); + watchdog_stop_on_reboot(wdd); + + /* + * Read the status early, in case of an error, we haven't modified the + * hardware. + */ + ret = regmap_read(wdt->regmap, wdt->offset + WDT_CTRL, &status); + if (ret) + return ret; + + /* + * Initial timeout value, may be overwritten by device tree or module + * parmeter in watchdog_init_timeout(). + * + * Reading a zero here means that either the hardware has a default + * value of zero (which is very unlikely and definitely a hardware + * bug) or the bootloader set it to zero. In any case, we handle + * this case gracefully and set out own timeout. + */ + ret = regmap_read(wdt->regmap, wdt->offset + WDT_TIMEOUT, &val); + if (ret) + return ret; + + if (val) + wdd->timeout = val; + else + wdd->timeout = WDT_DEFAULT_TIMEOUT; + + watchdog_init_timeout(wdd, timeout, &pdev->dev); + sl28cpld_wdt_set_timeout(wdd, wdd->timeout); + + /* if the watchdog is locked, we set nowayout */ + if (status & WDT_CTRL_LOCK) + nowayout = true; + watchdog_set_nowayout(wdd, nowayout); + + /* + * If watchdog is already running, keep it enabled, but make + * sure its mode is set correctly. + */ + if (status & WDT_CTRL_EN) { + sl28cpld_wdt_start(wdd); + set_bit(WDOG_HW_RUNNING, &wdd->status); + } + + ret = devm_watchdog_register_device(&pdev->dev, wdd); + if (ret < 0) { + dev_err(&pdev->dev, "failed to register watchdog device\n"); + return ret; + } + + dev_info(&pdev->dev, "initial timeout %d sec%s\n", + wdd->timeout, nowayout ? ", nowayout" : ""); + + return 0; +} + +static const struct of_device_id sl28cpld_wdt_of_match[] = { + { .compatible = "kontron,sl28cpld-wdt" }, + {} +}; +MODULE_DEVICE_TABLE(of, sl28cpld_wdt_of_match); + +static struct platform_driver sl28cpld_wdt_driver = { + .probe = sl28cpld_wdt_probe, + .driver = { + .name = "sl28cpld-wdt", + .of_match_table = sl28cpld_wdt_of_match, + }, +}; +module_platform_driver(sl28cpld_wdt_driver); + +MODULE_DESCRIPTION("sl28cpld Watchdog Driver"); +MODULE_AUTHOR("Michael Walle "); +MODULE_LICENSE("GPL"); From 9db33d221efcca9503ac481edcbf2b3f4404bdb8 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Mon, 14 Sep 2020 23:43:34 +0200 Subject: [PATCH 220/433] pwm: Add support for sl28cpld PWM controller MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add support for the PWM controller of the sl28cpld board management controller. This is part of a multi-function device driver. The controller has one PWM channel and can just generate four distinct frequencies. Signed-off-by: Michael Walle Acked-by: Thierry Reding Reviewed-by: Uwe Kleine-König Signed-off-by: Lee Jones --- drivers/pwm/Kconfig | 10 ++ drivers/pwm/Makefile | 1 + drivers/pwm/pwm-sl28cpld.c | 270 +++++++++++++++++++++++++++++++++++++ 3 files changed, 281 insertions(+) create mode 100644 drivers/pwm/pwm-sl28cpld.c diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig index 7dbcf6973d33..78ddc127e45e 100644 --- a/drivers/pwm/Kconfig +++ b/drivers/pwm/Kconfig @@ -428,6 +428,16 @@ config PWM_SIFIVE To compile this driver as a module, choose M here: the module will be called pwm-sifive. +config PWM_SL28CPLD + tristate "Kontron sl28cpld PWM support" + depends on MFD_SL28CPLD || COMPILE_TEST + help + Generic PWM framework driver for board management controller + found on the Kontron sl28 CPLD. + + To compile this driver as a module, choose M here: the module + will be called pwm-sl28cpld. + config PWM_SPEAR tristate "STMicroelectronics SPEAr PWM support" depends on PLAT_SPEAR || COMPILE_TEST diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile index 2c2ba0a03557..cbdcd55d69ee 100644 --- a/drivers/pwm/Makefile +++ b/drivers/pwm/Makefile @@ -40,6 +40,7 @@ obj-$(CONFIG_PWM_RENESAS_TPU) += pwm-renesas-tpu.o obj-$(CONFIG_PWM_ROCKCHIP) += pwm-rockchip.o obj-$(CONFIG_PWM_SAMSUNG) += pwm-samsung.o obj-$(CONFIG_PWM_SIFIVE) += pwm-sifive.o +obj-$(CONFIG_PWM_SL28CPLD) += pwm-sl28cpld.o obj-$(CONFIG_PWM_SPEAR) += pwm-spear.o obj-$(CONFIG_PWM_SPRD) += pwm-sprd.o obj-$(CONFIG_PWM_STI) += pwm-sti.o diff --git a/drivers/pwm/pwm-sl28cpld.c b/drivers/pwm/pwm-sl28cpld.c new file mode 100644 index 000000000000..5046b6b7fd35 --- /dev/null +++ b/drivers/pwm/pwm-sl28cpld.c @@ -0,0 +1,270 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * sl28cpld PWM driver + * + * Copyright (c) 2020 Michael Walle + * + * There is no public datasheet available for this PWM core. But it is easy + * enough to be briefly explained. It consists of one 8-bit counter. The PWM + * supports four distinct frequencies by selecting when to reset the counter. + * With the prescaler setting you can select which bit of the counter is used + * to reset it. This implies that the higher the frequency the less remaining + * bits are available for the actual counter. + * + * Let cnt[7:0] be the counter, clocked at 32kHz: + * +-----------+--------+--------------+-----------+---------------+ + * | prescaler | reset | counter bits | frequency | period length | + * +-----------+--------+--------------+-----------+---------------+ + * | 0 | cnt[7] | cnt[6:0] | 250 Hz | 4000000 ns | + * | 1 | cnt[6] | cnt[5:0] | 500 Hz | 2000000 ns | + * | 2 | cnt[5] | cnt[4:0] | 1 kHz | 1000000 ns | + * | 3 | cnt[4] | cnt[3:0] | 2 kHz | 500000 ns | + * +-----------+--------+--------------+-----------+---------------+ + * + * Limitations: + * - The hardware cannot generate a 100% duty cycle if the prescaler is 0. + * - The hardware cannot atomically set the prescaler and the counter value, + * which might lead to glitches and inconsistent states if a write fails. + * - The counter is not reset if you switch the prescaler which leads + * to glitches, too. + * - The duty cycle will switch immediately and not after a complete cycle. + * - Depending on the actual implementation, disabling the PWM might have + * side effects. For example, if the output pin is shared with a GPIO pin + * it will automatically switch back to GPIO mode. + */ + +#include +#include +#include +#include +#include +#include +#include + +/* + * PWM timer block registers. + */ +#define SL28CPLD_PWM_CTRL 0x00 +#define SL28CPLD_PWM_CTRL_ENABLE BIT(7) +#define SL28CPLD_PWM_CTRL_PRESCALER_MASK GENMASK(1, 0) +#define SL28CPLD_PWM_CYCLE 0x01 +#define SL28CPLD_PWM_CYCLE_MAX GENMASK(6, 0) + +#define SL28CPLD_PWM_CLK 32000 /* 32 kHz */ +#define SL28CPLD_PWM_MAX_DUTY_CYCLE(prescaler) (1 << (7 - (prescaler))) +#define SL28CPLD_PWM_PERIOD(prescaler) \ + (NSEC_PER_SEC / SL28CPLD_PWM_CLK * SL28CPLD_PWM_MAX_DUTY_CYCLE(prescaler)) + +/* + * We calculate the duty cycle like this: + * duty_cycle_ns = pwm_cycle_reg * max_period_ns / max_duty_cycle + * + * With + * max_period_ns = 1 << (7 - prescaler) / SL28CPLD_PWM_CLK * NSEC_PER_SEC + * max_duty_cycle = 1 << (7 - prescaler) + * this then simplifies to: + * duty_cycle_ns = pwm_cycle_reg / SL28CPLD_PWM_CLK * NSEC_PER_SEC + * = NSEC_PER_SEC / SL28CPLD_PWM_CLK * pwm_cycle_reg + * + * NSEC_PER_SEC is a multiple of SL28CPLD_PWM_CLK, therefore we're not losing + * precision by doing the divison first. + */ +#define SL28CPLD_PWM_TO_DUTY_CYCLE(reg) \ + (NSEC_PER_SEC / SL28CPLD_PWM_CLK * (reg)) +#define SL28CPLD_PWM_FROM_DUTY_CYCLE(duty_cycle) \ + (DIV_ROUND_DOWN_ULL((duty_cycle), NSEC_PER_SEC / SL28CPLD_PWM_CLK)) + +#define sl28cpld_pwm_read(priv, reg, val) \ + regmap_read((priv)->regmap, (priv)->offset + (reg), (val)) +#define sl28cpld_pwm_write(priv, reg, val) \ + regmap_write((priv)->regmap, (priv)->offset + (reg), (val)) + +struct sl28cpld_pwm { + struct pwm_chip pwm_chip; + struct regmap *regmap; + u32 offset; +}; + +static void sl28cpld_pwm_get_state(struct pwm_chip *chip, + struct pwm_device *pwm, + struct pwm_state *state) +{ + struct sl28cpld_pwm *priv = dev_get_drvdata(chip->dev); + unsigned int reg; + int prescaler; + + sl28cpld_pwm_read(priv, SL28CPLD_PWM_CTRL, ®); + + state->enabled = reg & SL28CPLD_PWM_CTRL_ENABLE; + + prescaler = FIELD_GET(SL28CPLD_PWM_CTRL_PRESCALER_MASK, reg); + state->period = SL28CPLD_PWM_PERIOD(prescaler); + + sl28cpld_pwm_read(priv, SL28CPLD_PWM_CYCLE, ®); + state->duty_cycle = SL28CPLD_PWM_TO_DUTY_CYCLE(reg); + state->polarity = PWM_POLARITY_NORMAL; + + /* + * Sanitize values for the PWM core. Depending on the prescaler it + * might happen that we calculate a duty_cycle greater than the actual + * period. This might happen if someone (e.g. the bootloader) sets an + * invalid combination of values. The behavior of the hardware is + * undefined in this case. But we need to report sane values back to + * the PWM core. + */ + state->duty_cycle = min(state->duty_cycle, state->period); +} + +static int sl28cpld_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, + const struct pwm_state *state) +{ + struct sl28cpld_pwm *priv = dev_get_drvdata(chip->dev); + unsigned int cycle, prescaler; + bool write_duty_cycle_first; + int ret; + u8 ctrl; + + /* Polarity inversion is not supported */ + if (state->polarity != PWM_POLARITY_NORMAL) + return -EINVAL; + + /* + * Calculate the prescaler. Pick the biggest period that isn't + * bigger than the requested period. + */ + prescaler = DIV_ROUND_UP_ULL(SL28CPLD_PWM_PERIOD(0), state->period); + prescaler = order_base_2(prescaler); + + if (prescaler > field_max(SL28CPLD_PWM_CTRL_PRESCALER_MASK)) + return -ERANGE; + + ctrl = FIELD_PREP(SL28CPLD_PWM_CTRL_PRESCALER_MASK, prescaler); + if (state->enabled) + ctrl |= SL28CPLD_PWM_CTRL_ENABLE; + + cycle = SL28CPLD_PWM_FROM_DUTY_CYCLE(state->duty_cycle); + cycle = min_t(unsigned int, cycle, SL28CPLD_PWM_MAX_DUTY_CYCLE(prescaler)); + + /* + * Work around the hardware limitation. See also above. Trap 100% duty + * cycle if the prescaler is 0. Set prescaler to 1 instead. We don't + * care about the frequency because its "all-one" in either case. + * + * We don't need to check the actual prescaler setting, because only + * if the prescaler is 0 we can have this particular value. + */ + if (cycle == SL28CPLD_PWM_MAX_DUTY_CYCLE(0)) { + ctrl &= ~SL28CPLD_PWM_CTRL_PRESCALER_MASK; + ctrl |= FIELD_PREP(SL28CPLD_PWM_CTRL_PRESCALER_MASK, 1); + cycle = SL28CPLD_PWM_MAX_DUTY_CYCLE(1); + } + + /* + * To avoid glitches when we switch the prescaler, we have to make sure + * we have a valid duty cycle for the new mode. + * + * Take the current prescaler (or the current period length) into + * account to decide whether we have to write the duty cycle or the new + * prescaler first. If the period length is decreasing we have to + * write the duty cycle first. + */ + write_duty_cycle_first = pwm->state.period > state->period; + + if (write_duty_cycle_first) { + ret = sl28cpld_pwm_write(priv, SL28CPLD_PWM_CYCLE, cycle); + if (ret) + return ret; + } + + ret = sl28cpld_pwm_write(priv, SL28CPLD_PWM_CTRL, ctrl); + if (ret) + return ret; + + if (!write_duty_cycle_first) { + ret = sl28cpld_pwm_write(priv, SL28CPLD_PWM_CYCLE, cycle); + if (ret) + return ret; + } + + return 0; +} + +static const struct pwm_ops sl28cpld_pwm_ops = { + .apply = sl28cpld_pwm_apply, + .get_state = sl28cpld_pwm_get_state, + .owner = THIS_MODULE, +}; + +static int sl28cpld_pwm_probe(struct platform_device *pdev) +{ + struct sl28cpld_pwm *priv; + struct pwm_chip *chip; + int ret; + + if (!pdev->dev.parent) { + dev_err(&pdev->dev, "no parent device\n"); + return -ENODEV; + } + + priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!priv->regmap) { + dev_err(&pdev->dev, "could not get parent regmap\n"); + return -ENODEV; + } + + ret = device_property_read_u32(&pdev->dev, "reg", &priv->offset); + if (ret) { + dev_err(&pdev->dev, "no 'reg' property found (%pe)\n", + ERR_PTR(ret)); + return -EINVAL; + } + + /* Initialize the pwm_chip structure */ + chip = &priv->pwm_chip; + chip->dev = &pdev->dev; + chip->ops = &sl28cpld_pwm_ops; + chip->base = -1; + chip->npwm = 1; + + ret = pwmchip_add(&priv->pwm_chip); + if (ret) { + dev_err(&pdev->dev, "failed to add PWM chip (%pe)", + ERR_PTR(ret)); + return ret; + } + + platform_set_drvdata(pdev, priv); + + return 0; +} + +static int sl28cpld_pwm_remove(struct platform_device *pdev) +{ + struct sl28cpld_pwm *priv = platform_get_drvdata(pdev); + + return pwmchip_remove(&priv->pwm_chip); +} + +static const struct of_device_id sl28cpld_pwm_of_match[] = { + { .compatible = "kontron,sl28cpld-pwm" }, + {} +}; +MODULE_DEVICE_TABLE(of, sl28cpld_pwm_of_match); + +static struct platform_driver sl28cpld_pwm_driver = { + .probe = sl28cpld_pwm_probe, + .remove = sl28cpld_pwm_remove, + .driver = { + .name = "sl28cpld-pwm", + .of_match_table = sl28cpld_pwm_of_match, + }, +}; +module_platform_driver(sl28cpld_pwm_driver); + +MODULE_DESCRIPTION("sl28cpld PWM Driver"); +MODULE_AUTHOR("Michael Walle "); +MODULE_LICENSE("GPL"); From b7536d8749e54923c9a7e8c4175e1e4f9b8c1541 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Mon, 14 Sep 2020 23:43:35 +0200 Subject: [PATCH 221/433] gpio: Add support for the sl28cpld GPIO controller Add support for the GPIO controller of the sl28 board management controller. This driver is part of a multi-function device. A controller has 8 lines. There are three different flavors: full-featured GPIO with interrupt support, input-only and output-only. Signed-off-by: Michael Walle Reviewed-by: Linus Walleij Reviewed-by: Andy Shevchenko Signed-off-by: Lee Jones --- drivers/gpio/Kconfig | 12 +++ drivers/gpio/Makefile | 1 + drivers/gpio/gpio-sl28cpld.c | 161 +++++++++++++++++++++++++++++++++++ 3 files changed, 174 insertions(+) create mode 100644 drivers/gpio/gpio-sl28cpld.c diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 8030fd91a3cc..3799cb6048a2 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -1223,6 +1223,18 @@ config GPIO_RC5T583 This driver provides the support for driving/reading the gpio pins of RC5T583 device through standard gpio library. +config GPIO_SL28CPLD + tristate "Kontron sl28cpld GPIO support" + depends on MFD_SL28CPLD || COMPILE_TEST + select GPIO_REGMAP + select GPIOLIB_IRQCHIP + select REGMAP_IRQ + help + This enables support for the GPIOs found on the Kontron sl28 CPLD. + + This driver can also be built as a module. If so, the module will be + called gpio-sl28cpld. + config GPIO_STMPE bool "STMPE GPIOs" depends on MFD_STMPE diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 4f9abff4f2dc..c3a4e7c94a91 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -132,6 +132,7 @@ obj-$(CONFIG_GPIO_SCH311X) += gpio-sch311x.o obj-$(CONFIG_GPIO_SCH) += gpio-sch.o obj-$(CONFIG_GPIO_SIFIVE) += gpio-sifive.o obj-$(CONFIG_GPIO_SIOX) += gpio-siox.o +obj-$(CONFIG_GPIO_SL28CPLD) += gpio-sl28cpld.o obj-$(CONFIG_GPIO_SODAVILLE) += gpio-sodaville.o obj-$(CONFIG_GPIO_SPEAR_SPICS) += gpio-spear-spics.o obj-$(CONFIG_GPIO_SPRD) += gpio-sprd.o diff --git a/drivers/gpio/gpio-sl28cpld.c b/drivers/gpio/gpio-sl28cpld.c new file mode 100644 index 000000000000..889b8f5622c2 --- /dev/null +++ b/drivers/gpio/gpio-sl28cpld.c @@ -0,0 +1,161 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * sl28cpld GPIO driver + * + * Copyright 2020 Michael Walle + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* GPIO flavor */ +#define GPIO_REG_DIR 0x00 +#define GPIO_REG_OUT 0x01 +#define GPIO_REG_IN 0x02 +#define GPIO_REG_IE 0x03 +#define GPIO_REG_IP 0x04 + +/* input-only flavor */ +#define GPI_REG_IN 0x00 + +/* output-only flavor */ +#define GPO_REG_OUT 0x00 + +enum sl28cpld_gpio_type { + SL28CPLD_GPIO = 1, + SL28CPLD_GPI, + SL28CPLD_GPO, +}; + +static const struct regmap_irq sl28cpld_gpio_irqs[] = { + REGMAP_IRQ_REG_LINE(0, 8), + REGMAP_IRQ_REG_LINE(1, 8), + REGMAP_IRQ_REG_LINE(2, 8), + REGMAP_IRQ_REG_LINE(3, 8), + REGMAP_IRQ_REG_LINE(4, 8), + REGMAP_IRQ_REG_LINE(5, 8), + REGMAP_IRQ_REG_LINE(6, 8), + REGMAP_IRQ_REG_LINE(7, 8), +}; + +static int sl28cpld_gpio_irq_init(struct platform_device *pdev, + unsigned int base, + struct gpio_regmap_config *config) +{ + struct regmap_irq_chip_data *irq_data; + struct regmap_irq_chip *irq_chip; + struct device *dev = &pdev->dev; + int irq, ret; + + if (!device_property_read_bool(dev, "interrupt-controller")) + return 0; + + irq = platform_get_irq(pdev, 0); + if (irq < 0) + return irq; + + irq_chip = devm_kzalloc(dev, sizeof(*irq_chip), GFP_KERNEL); + if (!irq_chip) + return -ENOMEM; + + irq_chip->name = "sl28cpld-gpio-irq", + irq_chip->irqs = sl28cpld_gpio_irqs; + irq_chip->num_irqs = ARRAY_SIZE(sl28cpld_gpio_irqs); + irq_chip->num_regs = 1; + irq_chip->status_base = base + GPIO_REG_IP; + irq_chip->mask_base = base + GPIO_REG_IE; + irq_chip->mask_invert = true, + irq_chip->ack_base = base + GPIO_REG_IP; + + ret = devm_regmap_add_irq_chip_fwnode(dev, dev_fwnode(dev), + config->regmap, irq, + IRQF_SHARED | IRQF_ONESHOT, + 0, irq_chip, &irq_data); + if (ret) + return ret; + + config->irq_domain = regmap_irq_get_domain(irq_data); + + return 0; +} + +static int sl28cpld_gpio_probe(struct platform_device *pdev) +{ + struct gpio_regmap_config config = {0}; + enum sl28cpld_gpio_type type; + struct regmap *regmap; + u32 base; + int ret; + + if (!pdev->dev.parent) + return -ENODEV; + + type = (uintptr_t)device_get_match_data(&pdev->dev); + if (!type) + return -ENODEV; + + ret = device_property_read_u32(&pdev->dev, "reg", &base); + if (ret) + return -EINVAL; + + regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!regmap) + return -ENODEV; + + config.regmap = regmap; + config.parent = &pdev->dev; + config.ngpio = 8; + + switch (type) { + case SL28CPLD_GPIO: + config.reg_dat_base = base + GPIO_REG_IN; + config.reg_set_base = base + GPIO_REG_OUT; + /* reg_dir_out_base might be zero */ + config.reg_dir_out_base = GPIO_REGMAP_ADDR(base + GPIO_REG_DIR); + + /* This type supports interrupts */ + ret = sl28cpld_gpio_irq_init(pdev, base, &config); + if (ret) + return ret; + break; + case SL28CPLD_GPO: + config.reg_set_base = base + GPO_REG_OUT; + break; + case SL28CPLD_GPI: + config.reg_dat_base = base + GPI_REG_IN; + break; + default: + dev_err(&pdev->dev, "unknown type %d\n", type); + return -ENODEV; + } + + return PTR_ERR_OR_ZERO(devm_gpio_regmap_register(&pdev->dev, &config)); +} + +static const struct of_device_id sl28cpld_gpio_of_match[] = { + { .compatible = "kontron,sl28cpld-gpio", .data = (void *)SL28CPLD_GPIO }, + { .compatible = "kontron,sl28cpld-gpi", .data = (void *)SL28CPLD_GPI }, + { .compatible = "kontron,sl28cpld-gpo", .data = (void *)SL28CPLD_GPO }, + {} +}; +MODULE_DEVICE_TABLE(of, sl28cpld_gpio_of_match); + +static struct platform_driver sl28cpld_gpio_driver = { + .probe = sl28cpld_gpio_probe, + .driver = { + .name = "sl28cpld-gpio", + .of_match_table = sl28cpld_gpio_of_match, + }, +}; +module_platform_driver(sl28cpld_gpio_driver); + +MODULE_DESCRIPTION("sl28cpld GPIO Driver"); +MODULE_AUTHOR("Michael Walle "); +MODULE_LICENSE("GPL"); From 3f697027bcb0959d7c24d59550ab1da07c2dd609 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Mon, 14 Sep 2020 23:43:36 +0200 Subject: [PATCH 222/433] hwmon: Add support for the sl28cpld hardware monitoring controller Add support for the hardware monitoring controller of the sl28cpld board management controller. This driver is part of a multi-function device. Signed-off-by: Michael Walle Acked-by: Guenter Roeck Reviewed-by: Andy Shevchenko Signed-off-by: Lee Jones --- Documentation/hwmon/index.rst | 1 + Documentation/hwmon/sl28cpld.rst | 36 ++++++++ drivers/hwmon/Kconfig | 10 +++ drivers/hwmon/Makefile | 1 + drivers/hwmon/sl28cpld-hwmon.c | 142 +++++++++++++++++++++++++++++++ 5 files changed, 190 insertions(+) create mode 100644 Documentation/hwmon/sl28cpld.rst create mode 100644 drivers/hwmon/sl28cpld-hwmon.c diff --git a/Documentation/hwmon/index.rst b/Documentation/hwmon/index.rst index 750d3a975d82..d90c43c82936 100644 --- a/Documentation/hwmon/index.rst +++ b/Documentation/hwmon/index.rst @@ -154,6 +154,7 @@ Hardware Monitoring Kernel Drivers sht3x shtc1 sis5595 + sl28cpld smm665 smsc47b397 smsc47m192 diff --git a/Documentation/hwmon/sl28cpld.rst b/Documentation/hwmon/sl28cpld.rst new file mode 100644 index 000000000000..7ed65f78250c --- /dev/null +++ b/Documentation/hwmon/sl28cpld.rst @@ -0,0 +1,36 @@ +.. SPDX-License-Identifier: GPL-2.0-only + +Kernel driver sl28cpld +====================== + +Supported chips: + + * Kontron sl28cpld + + Prefix: 'sl28cpld' + + Datasheet: not available + +Authors: Michael Walle + +Description +----------- + +The sl28cpld is a board management controller which also exposes a hardware +monitoring controller. At the moment this controller supports a single fan +supervisor. In the future there might be other flavours and additional +hardware monitoring might be supported. + +The fan supervisor has a 7 bit counter register and a counter period of 1 +second. If the 7 bit counter overflows, the supervisor will automatically +switch to x8 mode to support a wider input range at the loss of +granularity. + +Sysfs entries +------------- + +The following attributes are supported. + +======================= ======================================================== +fan1_input Fan RPM. Assuming 2 pulses per revolution. +======================= ======================================================== diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig index 8dc28b26916e..d98c0a6860d1 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig @@ -1479,6 +1479,16 @@ config SENSORS_RASPBERRYPI_HWMON This driver can also be built as a module. If so, the module will be called raspberrypi-hwmon. +config SENSORS_SL28CPLD + tristate "Kontron sl28cpld hardware monitoring driver" + depends on MFD_SL28CPLD || COMPILE_TEST + help + If you say yes here you get support for the fan supervisor of the + sl28cpld board management controller. + + This driver can also be built as a module. If so, the module + will be called sl28cpld-hwmon. + config SENSORS_SHT15 tristate "Sensiron humidity and temperature sensors. SHT15 and compat." depends on GPIOLIB || COMPILE_TEST diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile index a8f4b35b136b..dee8511f9348 100644 --- a/drivers/hwmon/Makefile +++ b/drivers/hwmon/Makefile @@ -159,6 +159,7 @@ obj-$(CONFIG_SENSORS_S3C) += s3c-hwmon.o obj-$(CONFIG_SENSORS_SCH56XX_COMMON)+= sch56xx-common.o obj-$(CONFIG_SENSORS_SCH5627) += sch5627.o obj-$(CONFIG_SENSORS_SCH5636) += sch5636.o +obj-$(CONFIG_SENSORS_SL28CPLD) += sl28cpld-hwmon.o obj-$(CONFIG_SENSORS_SHT15) += sht15.o obj-$(CONFIG_SENSORS_SHT21) += sht21.o obj-$(CONFIG_SENSORS_SHT3x) += sht3x.o diff --git a/drivers/hwmon/sl28cpld-hwmon.c b/drivers/hwmon/sl28cpld-hwmon.c new file mode 100644 index 000000000000..e48f58ec5b9c --- /dev/null +++ b/drivers/hwmon/sl28cpld-hwmon.c @@ -0,0 +1,142 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * sl28cpld hardware monitoring driver + * + * Copyright 2020 Kontron Europe GmbH + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define FAN_INPUT 0x00 +#define FAN_SCALE_X8 BIT(7) +#define FAN_VALUE_MASK GENMASK(6, 0) + +struct sl28cpld_hwmon { + struct regmap *regmap; + u32 offset; +}; + +static umode_t sl28cpld_hwmon_is_visible(const void *data, + enum hwmon_sensor_types type, + u32 attr, int channel) +{ + return 0444; +} + +static int sl28cpld_hwmon_read(struct device *dev, + enum hwmon_sensor_types type, u32 attr, + int channel, long *input) +{ + struct sl28cpld_hwmon *hwmon = dev_get_drvdata(dev); + unsigned int value; + int ret; + + switch (attr) { + case hwmon_fan_input: + ret = regmap_read(hwmon->regmap, hwmon->offset + FAN_INPUT, + &value); + if (ret) + return ret; + /* + * The register has a 7 bit value and 1 bit which indicates the + * scale. If the MSB is set, then the lower 7 bit has to be + * multiplied by 8, to get the correct reading. + */ + if (value & FAN_SCALE_X8) + value = FIELD_GET(FAN_VALUE_MASK, value) << 3; + + /* + * The counter period is 1000ms and the sysfs specification + * says we should asssume 2 pulses per revolution. + */ + value *= 60 / 2; + + break; + default: + return -EOPNOTSUPP; + } + + *input = value; + return 0; +} + +static const u32 sl28cpld_hwmon_fan_config[] = { + HWMON_F_INPUT, + 0 +}; + +static const struct hwmon_channel_info sl28cpld_hwmon_fan = { + .type = hwmon_fan, + .config = sl28cpld_hwmon_fan_config, +}; + +static const struct hwmon_channel_info *sl28cpld_hwmon_info[] = { + &sl28cpld_hwmon_fan, + NULL +}; + +static const struct hwmon_ops sl28cpld_hwmon_ops = { + .is_visible = sl28cpld_hwmon_is_visible, + .read = sl28cpld_hwmon_read, +}; + +static const struct hwmon_chip_info sl28cpld_hwmon_chip_info = { + .ops = &sl28cpld_hwmon_ops, + .info = sl28cpld_hwmon_info, +}; + +static int sl28cpld_hwmon_probe(struct platform_device *pdev) +{ + struct sl28cpld_hwmon *hwmon; + struct device *hwmon_dev; + int ret; + + if (!pdev->dev.parent) + return -ENODEV; + + hwmon = devm_kzalloc(&pdev->dev, sizeof(*hwmon), GFP_KERNEL); + if (!hwmon) + return -ENOMEM; + + hwmon->regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!hwmon->regmap) + return -ENODEV; + + ret = device_property_read_u32(&pdev->dev, "reg", &hwmon->offset); + if (ret) + return -EINVAL; + + hwmon_dev = devm_hwmon_device_register_with_info(&pdev->dev, + "sl28cpld_hwmon", hwmon, + &sl28cpld_hwmon_chip_info, NULL); + if (IS_ERR(hwmon_dev)) + dev_err(&pdev->dev, "failed to register as hwmon device"); + + return PTR_ERR_OR_ZERO(hwmon_dev); +} + +static const struct of_device_id sl28cpld_hwmon_of_match[] = { + { .compatible = "kontron,sl28cpld-fan" }, + {} +}; +MODULE_DEVICE_TABLE(of, sl28cpld_hwmon_of_match); + +static struct platform_driver sl28cpld_hwmon_driver = { + .probe = sl28cpld_hwmon_probe, + .driver = { + .name = "sl28cpld-fan", + .of_match_table = sl28cpld_hwmon_of_match, + }, +}; +module_platform_driver(sl28cpld_hwmon_driver); + +MODULE_DESCRIPTION("sl28cpld Hardware Monitoring Driver"); +MODULE_AUTHOR("Michael Walle "); +MODULE_LICENSE("GPL"); From eab1de67d292d0b88c148721a276897238150b89 Mon Sep 17 00:00:00 2001 From: Zhen Lei Date: Sat, 19 Sep 2020 20:44:12 +0800 Subject: [PATCH 223/433] dt-bindings: sp804: add support for Hisilicon sp804 timer Some Hisilicon SoCs, such as Hi1212, use the Hisilicon extended sp804 timer. Signed-off-by: Zhen Lei Link: https://lore.kernel.org/r/20200919124412.4135-2-thunder.leizhen@huawei.com Signed-off-by: Rob Herring --- .../devicetree/bindings/timer/arm,sp804.yaml | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/timer/arm,sp804.yaml b/Documentation/devicetree/bindings/timer/arm,sp804.yaml index ba0945cf799e..e35d3053250a 100644 --- a/Documentation/devicetree/bindings/timer/arm,sp804.yaml +++ b/Documentation/devicetree/bindings/timer/arm,sp804.yaml @@ -15,19 +15,26 @@ description: |+ free-running mode. The input clock is shared, but can be gated and prescaled independently for each timer. + There is a viriant of Arm SP804: Hisilicon 64-bit SP804 timer. Some Hisilicon + SoCs, such as Hi1212, should use the dedicated compatible: "hisilicon,sp804". + # Need a custom select here or 'arm,primecell' will match on lots of nodes select: properties: compatible: contains: - const: arm,sp804 + oneOf: + - const: arm,sp804 + - const: hisilicon,sp804 required: - compatible properties: compatible: items: - - const: arm,sp804 + - enum: + - arm,sp804 + - hisilicon,sp804 - const: arm,primecell interrupts: From de73f275a059a01c5b514c7762bc80821f8df6d9 Mon Sep 17 00:00:00 2001 From: Alexander Dahl Date: Sat, 19 Sep 2020 07:31:44 +0200 Subject: [PATCH 224/433] leds: pwm: Allow automatic labels for DT based devices MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit If LEDs are configured through device tree and the property 'label' is omitted, the label is supposed to be generated from the properties 'function' and 'color' if present. While this works fine for e.g. the 'leds-gpio' driver, it did not for 'leds-pwm'. The reason is, you get this label naming magic only if you add a LED device through 'devm_led_classdev_register_ext()' and pass a pointer to the current device tree node. For the following node from dts the LED appeared as 'led-5' in sysfs before and as 'red:debug' after this change. pwm_leds { compatible = "pwm-leds"; led-5 { function = LED_FUNCTION_DEBUG; color = ; pwms = <&pwm0 2 10000000 0>; max-brightness = <127>; linux,default-trigger = "heartbeat"; panic-indicator; }; }; Signed-off-by: Alexander Dahl Cc: Marek Behún Signed-off-by: Pavel Machek --- drivers/leds/leds-pwm.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/leds/leds-pwm.c b/drivers/leds/leds-pwm.c index e35a97c1d828..4a014d296412 100644 --- a/drivers/leds/leds-pwm.c +++ b/drivers/leds/leds-pwm.c @@ -65,6 +65,7 @@ static int led_pwm_add(struct device *dev, struct led_pwm_priv *priv, struct led_pwm *led, struct fwnode_handle *fwnode) { struct led_pwm_data *led_data = &priv->leds[priv->num_leds]; + struct led_init_data init_data = { .fwnode = fwnode }; int ret; led_data->active_low = led->active_low; @@ -87,7 +88,7 @@ static int led_pwm_add(struct device *dev, struct led_pwm_priv *priv, pwm_init_state(led_data->pwm, &led_data->pwmstate); - ret = devm_led_classdev_register(dev, &led_data->cdev); + ret = devm_led_classdev_register_ext(dev, &led_data->cdev, &init_data); if (ret) { dev_err(dev, "failed to register PWM led for %s: %d\n", led->name, ret); From f1b0a43bba3d1ed3fcd13478f8cce24c1275ba92 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Fri, 18 Sep 2020 00:32:49 +0200 Subject: [PATCH 225/433] leds: various: compile if COMPILE_TEST=y MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit These drivers can be compiled without modification when COMPILE_TEST=y: cobalt-qube, cobalt-raq, netxbig, ns2 and s3c24xx Signed-off-by: Marek Behún Cc: Pavel Machek Cc: Dan Murphy Signed-off-by: Pavel Machek --- drivers/leds/Kconfig | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig index 4f6464a169d5..96d54e36e3b5 100644 --- a/drivers/leds/Kconfig +++ b/drivers/leds/Kconfig @@ -274,7 +274,7 @@ config LEDS_MT6323 config LEDS_S3C24XX tristate "LED Support for Samsung S3C24XX GPIO LEDs" depends on LEDS_CLASS - depends on ARCH_S3C24XX + depends on ARCH_S3C24XX || COMPILE_TEST help This option enables support for LEDs connected to GPIO lines on Samsung S3C24XX series CPUs, such as the S3C2410 and S3C2440. @@ -304,13 +304,13 @@ config LEDS_WRAP config LEDS_COBALT_QUBE tristate "LED Support for the Cobalt Qube series front LED" depends on LEDS_CLASS - depends on MIPS_COBALT + depends on MIPS_COBALT || COMPILE_TEST help This option enables support for the front LED on Cobalt Qube series config LEDS_COBALT_RAQ bool "LED Support for the Cobalt Raq series" - depends on LEDS_CLASS=y && MIPS_COBALT + depends on LEDS_CLASS=y && (MIPS_COBALT || COMPILE_TEST) select LEDS_TRIGGERS help This option enables support for the Cobalt Raq series LEDs. @@ -644,7 +644,7 @@ config LEDS_MC13783 config LEDS_NS2 tristate "LED support for Network Space v2 GPIO LEDs" depends on LEDS_CLASS - depends on MACH_KIRKWOOD || MACH_ARMADA_370 + depends on MACH_KIRKWOOD || MACH_ARMADA_370 || COMPILE_TEST default y help This option enables support for the dual-GPIO LEDs found on the @@ -658,7 +658,7 @@ config LEDS_NS2 config LEDS_NETXBIG tristate "LED support for Big Network series LEDs" depends on LEDS_CLASS - depends on MACH_KIRKWOOD + depends on MACH_KIRKWOOD || COMPILE_TEST depends on OF_GPIO default y help From 2aebb78040e741949ac71f1203f003351061b93b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Fri, 18 Sep 2020 00:32:50 +0200 Subject: [PATCH 226/433] leds: ip30: compile if COMPILE_TEST=y MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This driver can be compiled on other platforms with small change if COMPILE_TEST=y. Signed-off-by: Marek Behún Cc: Pavel Machek Cc: Dan Murphy Cc: Thomas Bogendoerfer Signed-off-by: Pavel Machek --- drivers/leds/Kconfig | 2 +- drivers/leds/leds-ip30.c | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig index 96d54e36e3b5..a008170e73cd 100644 --- a/drivers/leds/Kconfig +++ b/drivers/leds/Kconfig @@ -905,7 +905,7 @@ config LEDS_TPS6105X config LEDS_IP30 tristate "LED support for SGI Octane machines" depends on LEDS_CLASS - depends on SGI_MFD_IOC3 + depends on SGI_MFD_IOC3 || COMPILE_TEST help This option enables support for the Red and White LEDs of SGI Octane machines. diff --git a/drivers/leds/leds-ip30.c b/drivers/leds/leds-ip30.c index d4ec7361c616..1f952bad0fe8 100644 --- a/drivers/leds/leds-ip30.c +++ b/drivers/leds/leds-ip30.c @@ -3,6 +3,7 @@ * LED Driver for SGI Octane machines */ +#include #include #include #include From 2779f4724b2ff0f296313e5987d10a6ec2c2ebd5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Fri, 18 Sep 2020 00:32:52 +0200 Subject: [PATCH 227/433] leds: various: use device_get_match_data MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Simply use device_get_match_data instead of matching against the match table again. Signed-off-by: Marek Behún Cc: H. Nikolaus Schaller Cc: David Rivshin Cc: Sebastian Reichel Cc: Christian Mauderer Cc: Andrew Lunn Signed-off-by: Pavel Machek --- drivers/leds/leds-cpcap.c | 7 +------ drivers/leds/leds-is31fl319x.c | 12 ++---------- drivers/leds/leds-is31fl32xx.c | 7 +------ drivers/leds/leds-spi-byte.c | 7 +------ drivers/leds/leds-tlc591xx.c | 7 +------ 5 files changed, 6 insertions(+), 34 deletions(-) diff --git a/drivers/leds/leds-cpcap.c b/drivers/leds/leds-cpcap.c index 9f3fa4737213..7d41ce8c9bb1 100644 --- a/drivers/leds/leds-cpcap.c +++ b/drivers/leds/leds-cpcap.c @@ -158,19 +158,14 @@ MODULE_DEVICE_TABLE(of, cpcap_led_of_match); static int cpcap_led_probe(struct platform_device *pdev) { - const struct of_device_id *match; struct cpcap_led *led; int err; - match = of_match_device(of_match_ptr(cpcap_led_of_match), &pdev->dev); - if (!match || !match->data) - return -EINVAL; - led = devm_kzalloc(&pdev->dev, sizeof(*led), GFP_KERNEL); if (!led) return -ENOMEM; platform_set_drvdata(pdev, led); - led->info = match->data; + led->info = device_get_match_data(&pdev->dev); led->dev = &pdev->dev; if (led->info->reg == 0x0000) { diff --git a/drivers/leds/leds-is31fl319x.c b/drivers/leds/leds-is31fl319x.c index 54ac50740d43..b039ffa33559 100644 --- a/drivers/leds/leds-is31fl319x.c +++ b/drivers/leds/leds-is31fl319x.c @@ -203,7 +203,6 @@ static int is31fl319x_parse_dt(struct device *dev, struct is31fl319x_chip *is31) { struct device_node *np = dev->of_node, *child; - const struct of_device_id *of_dev_id; int count; int ret; @@ -219,18 +218,11 @@ static int is31fl319x_parse_dt(struct device *dev, return ret; } - of_dev_id = of_match_device(of_is31fl319x_match, dev); - if (!of_dev_id) { - dev_err(dev, "Failed to match device with supported chips\n"); - return -EINVAL; - } - - is31->cdef = of_dev_id->data; + is31->cdef = device_get_match_data(dev); count = of_get_child_count(np); - dev_dbg(dev, "probe %s with %d leds defined in DT\n", - of_dev_id->compatible, count); + dev_dbg(dev, "probing with %d leds defined in DT\n", count); if (!count || count > is31->cdef->num_leds) { dev_err(dev, "Number of leds defined must be between 1 and %u\n", diff --git a/drivers/leds/leds-is31fl32xx.c b/drivers/leds/leds-is31fl32xx.c index cd768f991da1..acf51e17e8df 100644 --- a/drivers/leds/leds-is31fl32xx.c +++ b/drivers/leds/leds-is31fl32xx.c @@ -428,17 +428,12 @@ static int is31fl32xx_probe(struct i2c_client *client, const struct i2c_device_id *id) { const struct is31fl32xx_chipdef *cdef; - const struct of_device_id *of_dev_id; struct device *dev = &client->dev; struct is31fl32xx_priv *priv; int count; int ret = 0; - of_dev_id = of_match_device(of_is31fl32xx_match, dev); - if (!of_dev_id) - return -EINVAL; - - cdef = of_dev_id->data; + cdef = device_get_match_data(dev); count = of_get_child_count(dev->of_node); if (!count) diff --git a/drivers/leds/leds-spi-byte.c b/drivers/leds/leds-spi-byte.c index b231b563b7bb..9632eb84f8de 100644 --- a/drivers/leds/leds-spi-byte.c +++ b/drivers/leds/leds-spi-byte.c @@ -80,7 +80,6 @@ static int spi_byte_brightness_set_blocking(struct led_classdev *dev, static int spi_byte_probe(struct spi_device *spi) { - const struct of_device_id *of_dev_id; struct device_node *child; struct device *dev = &spi->dev; struct spi_byte_led *led; @@ -88,10 +87,6 @@ static int spi_byte_probe(struct spi_device *spi) const char *state; int ret; - of_dev_id = of_match_device(spi_byte_dt_ids, dev); - if (!of_dev_id) - return -EINVAL; - if (of_get_child_count(dev->of_node) != 1) { dev_err(dev, "Device must have exactly one LED sub-node."); return -EINVAL; @@ -106,7 +101,7 @@ static int spi_byte_probe(struct spi_device *spi) strlcpy(led->name, name, sizeof(led->name)); led->spi = spi; mutex_init(&led->mutex); - led->cdef = of_dev_id->data; + led->cdef = device_get_match_data(dev); led->ldev.name = led->name; led->ldev.brightness = LED_OFF; led->ldev.max_brightness = led->cdef->max_value - led->cdef->off_value; diff --git a/drivers/leds/leds-tlc591xx.c b/drivers/leds/leds-tlc591xx.c index 1dc14051639c..aeedf1aa6297 100644 --- a/drivers/leds/leds-tlc591xx.c +++ b/drivers/leds/leds-tlc591xx.c @@ -150,16 +150,11 @@ tlc591xx_probe(struct i2c_client *client, { struct device_node *np = client->dev.of_node, *child; struct device *dev = &client->dev; - const struct of_device_id *match; const struct tlc591xx *tlc591xx; struct tlc591xx_priv *priv; int err, count, reg; - match = of_match_device(of_tlc591xx_leds_match, dev); - if (!match) - return -ENODEV; - - tlc591xx = match->data; + tlc591xx = device_get_match_data(dev); if (!np) return -ENODEV; From 8853c95e997e0a3621bd8718bdaded81ed37bc9a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Fri, 18 Sep 2020 00:32:54 +0200 Subject: [PATCH 228/433] leds: various: use dev_of_node(dev) instead of dev->of_node MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The dev_of_node function should be preferred. Signed-off-by: Marek Behún Cc: Orson Zhai Cc: Baolin Wang Cc: Chunyan Zhang Cc: Sean Wang Cc: Matthias Brugger Cc: Riku Voipio Signed-off-by: Pavel Machek --- drivers/leds/leds-88pm860x.c | 4 ++-- drivers/leds/leds-aat1290.c | 2 +- drivers/leds/leds-an30259a.c | 2 +- drivers/leds/leds-aw2013.c | 2 +- drivers/leds/leds-bcm6328.c | 2 +- drivers/leds/leds-bcm6358.c | 2 +- drivers/leds/leds-is31fl319x.c | 2 +- drivers/leds/leds-is31fl32xx.c | 4 ++-- drivers/leds/leds-ktd2692.c | 4 ++-- drivers/leds/leds-lp5521.c | 2 +- drivers/leds/leds-lp5523.c | 2 +- drivers/leds/leds-lp5562.c | 2 +- drivers/leds/leds-lp8501.c | 2 +- drivers/leds/leds-lp8860.c | 2 +- drivers/leds/leds-lt3593.c | 2 +- drivers/leds/leds-max77693.c | 2 +- drivers/leds/leds-mc13783.c | 4 ++-- drivers/leds/leds-mt6323.c | 2 +- drivers/leds/leds-netxbig.c | 2 +- drivers/leds/leds-ns2.c | 2 +- drivers/leds/leds-pca9532.c | 2 +- drivers/leds/leds-pm8058.c | 2 +- drivers/leds/leds-sc27xx-bltc.c | 2 +- drivers/leds/leds-spi-byte.c | 4 ++-- drivers/leds/leds-syscon.c | 4 ++-- drivers/leds/leds-tca6507.c | 4 ++-- drivers/leds/leds-tlc591xx.c | 2 +- drivers/leds/leds-turris-omnia.c | 2 +- 28 files changed, 35 insertions(+), 35 deletions(-) diff --git a/drivers/leds/leds-88pm860x.c b/drivers/leds/leds-88pm860x.c index 465c3755cf2e..2d1b3269e0f7 100644 --- a/drivers/leds/leds-88pm860x.c +++ b/drivers/leds/leds-88pm860x.c @@ -118,9 +118,9 @@ static int pm860x_led_dt_init(struct platform_device *pdev, struct device_node *nproot, *np; int iset = 0; - if (!pdev->dev.parent->of_node) + if (!dev_of_node(pdev->dev.parent)) return -ENODEV; - nproot = of_get_child_by_name(pdev->dev.parent->of_node, "leds"); + nproot = of_get_child_by_name(dev_of_node(pdev->dev.parent), "leds"); if (!nproot) { dev_err(&pdev->dev, "failed to find leds node\n"); return -ENODEV; diff --git a/drivers/leds/leds-aat1290.c b/drivers/leds/leds-aat1290.c index 5a0fe7b7b8bc..589484b22c79 100644 --- a/drivers/leds/leds-aat1290.c +++ b/drivers/leds/leds-aat1290.c @@ -248,7 +248,7 @@ static int aat1290_led_parse_dt(struct aat1290_led *led, } #endif - child_node = of_get_next_available_child(dev->of_node, NULL); + child_node = of_get_next_available_child(dev_of_node(dev), NULL); if (!child_node) { dev_err(dev, "No DT child node found for connected LED.\n"); return -EINVAL; diff --git a/drivers/leds/leds-an30259a.c b/drivers/leds/leds-an30259a.c index 82350a28a564..8ec23ccd02d6 100644 --- a/drivers/leds/leds-an30259a.c +++ b/drivers/leds/leds-an30259a.c @@ -202,7 +202,7 @@ error: static int an30259a_dt_init(struct i2c_client *client, struct an30259a *chip) { - struct device_node *np = client->dev.of_node, *child; + struct device_node *np = dev_of_node(&client->dev), *child; int count, ret; int i = 0; const char *str; diff --git a/drivers/leds/leds-aw2013.c b/drivers/leds/leds-aw2013.c index d709cc1f949e..3aeed4f68a8a 100644 --- a/drivers/leds/leds-aw2013.c +++ b/drivers/leds/leds-aw2013.c @@ -261,7 +261,7 @@ out: static int aw2013_probe_dt(struct aw2013 *chip) { - struct device_node *np = chip->client->dev.of_node, *child; + struct device_node *np = dev_of_node(&chip->client->dev), *child; int count, ret = 0, i = 0; struct aw2013_led *led; diff --git a/drivers/leds/leds-bcm6328.c b/drivers/leds/leds-bcm6328.c index bad7efb75112..73b385d03c0e 100644 --- a/drivers/leds/leds-bcm6328.c +++ b/drivers/leds/leds-bcm6328.c @@ -395,7 +395,7 @@ static int bcm6328_led(struct device *dev, struct device_node *nc, u32 reg, static int bcm6328_leds_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; - struct device_node *np = pdev->dev.of_node; + struct device_node *np = dev_of_node(&pdev->dev); struct device_node *child; void __iomem *mem; spinlock_t *lock; /* memory lock */ diff --git a/drivers/leds/leds-bcm6358.c b/drivers/leds/leds-bcm6358.c index 94fefd456ba0..2f71f4b5b72e 100644 --- a/drivers/leds/leds-bcm6358.c +++ b/drivers/leds/leds-bcm6358.c @@ -149,7 +149,7 @@ static int bcm6358_led(struct device *dev, struct device_node *nc, u32 reg, static int bcm6358_leds_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; - struct device_node *np = pdev->dev.of_node; + struct device_node *np = dev_of_node(&pdev->dev); struct device_node *child; void __iomem *mem; spinlock_t *lock; /* memory lock */ diff --git a/drivers/leds/leds-is31fl319x.c b/drivers/leds/leds-is31fl319x.c index b039ffa33559..e6d185ad0b7e 100644 --- a/drivers/leds/leds-is31fl319x.c +++ b/drivers/leds/leds-is31fl319x.c @@ -202,7 +202,7 @@ static int is31fl319x_parse_child_dt(const struct device *dev, static int is31fl319x_parse_dt(struct device *dev, struct is31fl319x_chip *is31) { - struct device_node *np = dev->of_node, *child; + struct device_node *np = dev_of_node(dev), *child; int count; int ret; diff --git a/drivers/leds/leds-is31fl32xx.c b/drivers/leds/leds-is31fl32xx.c index acf51e17e8df..82bbf0290ff9 100644 --- a/drivers/leds/leds-is31fl32xx.c +++ b/drivers/leds/leds-is31fl32xx.c @@ -372,7 +372,7 @@ static int is31fl32xx_parse_dt(struct device *dev, struct device_node *child; int ret = 0; - for_each_child_of_node(dev->of_node, child) { + for_each_child_of_node(dev_of_node(dev), child) { struct is31fl32xx_led_data *led_data = &priv->leds[priv->num_leds]; const struct is31fl32xx_led_data *other_led_data; @@ -435,7 +435,7 @@ static int is31fl32xx_probe(struct i2c_client *client, cdef = device_get_match_data(dev); - count = of_get_child_count(dev->of_node); + count = of_get_child_count(dev_of_node(dev)); if (!count) return -EINVAL; diff --git a/drivers/leds/leds-ktd2692.c b/drivers/leds/leds-ktd2692.c index 670efee9b131..632f10db4b3f 100644 --- a/drivers/leds/leds-ktd2692.c +++ b/drivers/leds/leds-ktd2692.c @@ -259,11 +259,11 @@ static void ktd2692_setup(struct ktd2692_context *led) static int ktd2692_parse_dt(struct ktd2692_context *led, struct device *dev, struct ktd2692_led_config_data *cfg) { - struct device_node *np = dev->of_node; + struct device_node *np = dev_of_node(dev); struct device_node *child_node; int ret; - if (!dev->of_node) + if (!dev_of_node(dev)) return -ENXIO; led->ctrl_gpio = devm_gpiod_get(dev, "ctrl", GPIOD_ASIS); diff --git a/drivers/leds/leds-lp5521.c b/drivers/leds/leds-lp5521.c index ef8c3bfa8f3c..a9e7507c998c 100644 --- a/drivers/leds/leds-lp5521.c +++ b/drivers/leds/leds-lp5521.c @@ -523,7 +523,7 @@ static int lp5521_probe(struct i2c_client *client, struct lp55xx_chip *chip; struct lp55xx_led *led; struct lp55xx_platform_data *pdata = dev_get_platdata(&client->dev); - struct device_node *np = client->dev.of_node; + struct device_node *np = dev_of_node(&client->dev); chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); if (!chip) diff --git a/drivers/leds/leds-lp5523.c b/drivers/leds/leds-lp5523.c index f55d97258d5e..fc433e63b1dc 100644 --- a/drivers/leds/leds-lp5523.c +++ b/drivers/leds/leds-lp5523.c @@ -891,7 +891,7 @@ static int lp5523_probe(struct i2c_client *client, struct lp55xx_chip *chip; struct lp55xx_led *led; struct lp55xx_platform_data *pdata = dev_get_platdata(&client->dev); - struct device_node *np = client->dev.of_node; + struct device_node *np = dev_of_node(&client->dev); chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); if (!chip) diff --git a/drivers/leds/leds-lp5562.c b/drivers/leds/leds-lp5562.c index 7ecdd199d7ef..31c14016d289 100644 --- a/drivers/leds/leds-lp5562.c +++ b/drivers/leds/leds-lp5562.c @@ -518,7 +518,7 @@ static int lp5562_probe(struct i2c_client *client, struct lp55xx_chip *chip; struct lp55xx_led *led; struct lp55xx_platform_data *pdata = dev_get_platdata(&client->dev); - struct device_node *np = client->dev.of_node; + struct device_node *np = dev_of_node(&client->dev); chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); if (!chip) diff --git a/drivers/leds/leds-lp8501.c b/drivers/leds/leds-lp8501.c index ac2c31db4a65..2d2fda2ab104 100644 --- a/drivers/leds/leds-lp8501.c +++ b/drivers/leds/leds-lp8501.c @@ -306,7 +306,7 @@ static int lp8501_probe(struct i2c_client *client, struct lp55xx_chip *chip; struct lp55xx_led *led; struct lp55xx_platform_data *pdata = dev_get_platdata(&client->dev); - struct device_node *np = client->dev.of_node; + struct device_node *np = dev_of_node(&client->dev); chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); if (!chip) diff --git a/drivers/leds/leds-lp8860.c b/drivers/leds/leds-lp8860.c index ac2f5d6272dc..e9b16f3358d6 100644 --- a/drivers/leds/leds-lp8860.c +++ b/drivers/leds/leds-lp8860.c @@ -380,7 +380,7 @@ static int lp8860_probe(struct i2c_client *client, { int ret; struct lp8860_led *led; - struct device_node *np = client->dev.of_node; + struct device_node *np = dev_of_node(&client->dev); struct device_node *child_node; struct led_init_data init_data = {}; diff --git a/drivers/leds/leds-lt3593.c b/drivers/leds/leds-lt3593.c index 9079850e6ea4..c2d7ffebacc5 100644 --- a/drivers/leds/leds-lt3593.c +++ b/drivers/leds/leds-lt3593.c @@ -68,7 +68,7 @@ static int lt3593_led_probe(struct platform_device *pdev) struct led_init_data init_data = {}; const char *tmp; - if (!dev->of_node) + if (!dev_of_node(dev)) return -ENODEV; led_data = devm_kzalloc(dev, sizeof(*led_data), GFP_KERNEL); diff --git a/drivers/leds/leds-max77693.c b/drivers/leds/leds-max77693.c index fec56090c2ba..5c1faeb55a31 100644 --- a/drivers/leds/leds-max77693.c +++ b/drivers/leds/leds-max77693.c @@ -599,7 +599,7 @@ static int max77693_led_parse_dt(struct max77693_led_device *led, { struct device *dev = &led->pdev->dev; struct max77693_sub_led *sub_leds = led->sub_leds; - struct device_node *node = dev->of_node, *child_node; + struct device_node *node = dev_of_node(dev), *child_node; struct property *prop; u32 led_sources[2]; int i, ret, fled_id; diff --git a/drivers/leds/leds-mc13783.c b/drivers/leds/leds-mc13783.c index 5cd810c545f3..ee37f4a2d65b 100644 --- a/drivers/leds/leds-mc13783.c +++ b/drivers/leds/leds-mc13783.c @@ -121,7 +121,7 @@ static struct mc13xxx_leds_platform_data __init *mc13xxx_led_probe_dt( if (!pdata) return ERR_PTR(-ENOMEM); - parent = of_get_child_by_name(dev->parent->of_node, "leds"); + parent = of_get_child_by_name(dev_of_node(dev->parent), "leds"); if (!parent) goto out_node_put; @@ -192,7 +192,7 @@ static int __init mc13xxx_led_probe(struct platform_device *pdev) leds->master = mcdev; platform_set_drvdata(pdev, leds); - if (dev->parent->of_node) { + if (dev_of_node(dev->parent)) { pdata = mc13xxx_led_probe_dt(pdev); if (IS_ERR(pdata)) return PTR_ERR(pdata); diff --git a/drivers/leds/leds-mt6323.c b/drivers/leds/leds-mt6323.c index 7b240771e45b..88deec9d0ef4 100644 --- a/drivers/leds/leds-mt6323.c +++ b/drivers/leds/leds-mt6323.c @@ -369,7 +369,7 @@ static int mt6323_led_set_dt_default(struct led_classdev *cdev, static int mt6323_led_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; - struct device_node *np = pdev->dev.of_node; + struct device_node *np = dev_of_node(&pdev->dev); struct device_node *child; struct mt6397_chip *hw = dev_get_drvdata(pdev->dev.parent); struct mt6323_leds *leds; diff --git a/drivers/leds/leds-netxbig.c b/drivers/leds/leds-netxbig.c index ceceeb6a0e96..9a3b2d15764d 100644 --- a/drivers/leds/leds-netxbig.c +++ b/drivers/leds/leds-netxbig.c @@ -419,7 +419,7 @@ static int netxbig_gpio_ext_get(struct device *dev, static int netxbig_leds_get_of_pdata(struct device *dev, struct netxbig_led_platform_data *pdata) { - struct device_node *np = dev->of_node; + struct device_node *np = dev_of_node(dev); struct device_node *gpio_ext_np; struct platform_device *gpio_ext_pdev; struct device *gpio_ext_dev; diff --git a/drivers/leds/leds-ns2.c b/drivers/leds/leds-ns2.c index bd806e7c8017..9cbd2d7251af 100644 --- a/drivers/leds/leds-ns2.c +++ b/drivers/leds/leds-ns2.c @@ -246,7 +246,7 @@ static void delete_ns2_led(struct ns2_led_data *led_dat) static int ns2_leds_get_of_pdata(struct device *dev, struct ns2_led_platform_data *pdata) { - struct device_node *np = dev->of_node; + struct device_node *np = dev_of_node(dev); struct device_node *child; struct ns2_led *led, *leds; int ret, num_leds = 0; diff --git a/drivers/leds/leds-pca9532.c b/drivers/leds/leds-pca9532.c index 7d515d5e57bd..b1ae34e50958 100644 --- a/drivers/leds/leds-pca9532.c +++ b/drivers/leds/leds-pca9532.c @@ -507,7 +507,7 @@ static int pca9532_probe(struct i2c_client *client, struct pca9532_data *data = i2c_get_clientdata(client); struct pca9532_platform_data *pca9532_pdata = dev_get_platdata(&client->dev); - struct device_node *np = client->dev.of_node; + struct device_node *np = dev_of_node(&client->dev); if (!pca9532_pdata) { if (np) { diff --git a/drivers/leds/leds-pm8058.c b/drivers/leds/leds-pm8058.c index 7869ccdf70ce..69a7f7e63ea7 100644 --- a/drivers/leds/leds-pm8058.c +++ b/drivers/leds/leds-pm8058.c @@ -88,7 +88,7 @@ static enum led_brightness pm8058_led_get(struct led_classdev *cled) static int pm8058_led_probe(struct platform_device *pdev) { struct pm8058_led *led; - struct device_node *np = pdev->dev.of_node; + struct device_node *np = dev_of_node(&pdev->dev); int ret; struct regmap *map; const char *state; diff --git a/drivers/leds/leds-sc27xx-bltc.c b/drivers/leds/leds-sc27xx-bltc.c index 0ede87420bfc..f8fe09ecd0d1 100644 --- a/drivers/leds/leds-sc27xx-bltc.c +++ b/drivers/leds/leds-sc27xx-bltc.c @@ -276,7 +276,7 @@ static int sc27xx_led_register(struct device *dev, struct sc27xx_led_priv *priv) static int sc27xx_led_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; - struct device_node *np = dev->of_node, *child; + struct device_node *np = dev_of_node(dev), *child; struct sc27xx_led_priv *priv; u32 base, count, reg; int err; diff --git a/drivers/leds/leds-spi-byte.c b/drivers/leds/leds-spi-byte.c index 9632eb84f8de..ecfd349fa53b 100644 --- a/drivers/leds/leds-spi-byte.c +++ b/drivers/leds/leds-spi-byte.c @@ -87,11 +87,11 @@ static int spi_byte_probe(struct spi_device *spi) const char *state; int ret; - if (of_get_child_count(dev->of_node) != 1) { + if (of_get_child_count(dev_of_node(dev)) != 1) { dev_err(dev, "Device must have exactly one LED sub-node."); return -EINVAL; } - child = of_get_next_child(dev->of_node, NULL); + child = of_get_next_child(dev_of_node(dev), NULL); led = devm_kzalloc(dev, sizeof(*led), GFP_KERNEL); if (!led) diff --git a/drivers/leds/leds-syscon.c b/drivers/leds/leds-syscon.c index b58f3cafe16f..d7230da81543 100644 --- a/drivers/leds/leds-syscon.c +++ b/drivers/leds/leds-syscon.c @@ -56,7 +56,7 @@ static void syscon_led_set(struct led_classdev *led_cdev, static int syscon_led_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; - struct device_node *np = dev->of_node; + struct device_node *np = dev_of_node(dev); struct device *parent; struct regmap *map; struct syscon_led *sled; @@ -68,7 +68,7 @@ static int syscon_led_probe(struct platform_device *pdev) dev_err(dev, "no parent for syscon LED\n"); return -ENODEV; } - map = syscon_node_to_regmap(parent->of_node); + map = syscon_node_to_regmap(dev_of_node(parent)); if (IS_ERR(map)) { dev_err(dev, "no regmap for syscon LED parent\n"); return PTR_ERR(map); diff --git a/drivers/leds/leds-tca6507.c b/drivers/leds/leds-tca6507.c index 1128ac75443c..d44b64af6d6e 100644 --- a/drivers/leds/leds-tca6507.c +++ b/drivers/leds/leds-tca6507.c @@ -656,7 +656,7 @@ static int tca6507_probe_gpios(struct i2c_client *client, tca->gpio.set = tca6507_gpio_set_value; tca->gpio.parent = &client->dev; #ifdef CONFIG_OF_GPIO - tca->gpio.of_node = of_node_get(client->dev.of_node); + tca->gpio.of_node = of_node_get(dev_of_node(&client->dev)); #endif err = gpiochip_add_data(&tca->gpio, tca); if (err) { @@ -689,7 +689,7 @@ static void tca6507_remove_gpio(struct tca6507_chip *tca) static struct tca6507_platform_data * tca6507_led_dt_init(struct i2c_client *client) { - struct device_node *np = client->dev.of_node, *child; + struct device_node *np = dev_of_node(&client->dev), *child; struct tca6507_platform_data *pdata; struct led_info *tca_leds; int count; diff --git a/drivers/leds/leds-tlc591xx.c b/drivers/leds/leds-tlc591xx.c index aeedf1aa6297..f4d5785f0068 100644 --- a/drivers/leds/leds-tlc591xx.c +++ b/drivers/leds/leds-tlc591xx.c @@ -148,7 +148,7 @@ static int tlc591xx_probe(struct i2c_client *client, const struct i2c_device_id *id) { - struct device_node *np = client->dev.of_node, *child; + struct device_node *np = dev_of_node(&client->dev), *child; struct device *dev = &client->dev; const struct tlc591xx *tlc591xx; struct tlc591xx_priv *priv; diff --git a/drivers/leds/leds-turris-omnia.c b/drivers/leds/leds-turris-omnia.c index bb23d8e16614..ea7da8517220 100644 --- a/drivers/leds/leds-turris-omnia.c +++ b/drivers/leds/leds-turris-omnia.c @@ -210,7 +210,7 @@ static int omnia_leds_probe(struct i2c_client *client, const struct i2c_device_id *id) { struct device *dev = &client->dev; - struct device_node *np = dev->of_node, *child; + struct device_node *np = dev_of_node(dev), *child; struct omnia_leds *leds; struct omnia_led *led; int ret, count; From 05dec742bd20e8284e57559d53d38cffc2054fee Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Fri, 18 Sep 2020 00:32:55 +0200 Subject: [PATCH 229/433] leds: lt3593: do not rewrite .of_node of new LED device to wrong value MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The devm_led_classdev_register_ext is given init_data with fwnode set, so the LED core sets .of_node of the new LED classdev correctly. Do not rewrite this value to parent of_node. Signed-off-by: Marek Behún Cc: Daniel Mack Signed-off-by: Pavel Machek --- drivers/leds/leds-lt3593.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/leds/leds-lt3593.c b/drivers/leds/leds-lt3593.c index c2d7ffebacc5..061f02e3995a 100644 --- a/drivers/leds/leds-lt3593.c +++ b/drivers/leds/leds-lt3593.c @@ -107,7 +107,6 @@ static int lt3593_led_probe(struct platform_device *pdev) return ret; } - led_data->cdev.dev->of_node = dev->of_node; platform_set_drvdata(pdev, led_data); return 0; From 99a013c840a05083fd82d220685af7579238bfa8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Fri, 18 Sep 2020 00:32:56 +0200 Subject: [PATCH 230/433] leds: various: use only available OF children MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Various drivers count and iterate over OF children nodes via of_get_child_count and for_each_child_of_node. Instead they should use of_get_available_child_count and for_each_available_child_of_node, so that if a given node has the `status` property set to `disabled`, the child will be ignored. Signed-off-by: Marek Behún Cc: Andrew Lunn Cc: Andrey Utkin Cc: Baolin Wang Cc: Baolin Wang Cc: Benjamin Herrenschmidt Cc: Christian Mauderer Cc: Chunyan Zhang Cc: Dan Murphy Cc: David Rivshin Cc: Haojian Zhuang Cc: H. Nikolaus Schaller Cc: Michael Ellerman Cc: Milo Kim Cc: NeilBrown Cc: Nikita Travkin Cc: Orson Zhai Cc: Paul Mackerras Cc: Philippe Retornaz Cc: Riku Voipio Cc: Simon Guinot Cc: Simon Shields Cc: Vasant Hegde Cc: Xiaotong Lu Signed-off-by: Pavel Machek --- drivers/leds/leds-88pm860x.c | 2 +- drivers/leds/leds-an30259a.c | 2 +- drivers/leds/leds-aw2013.c | 2 +- drivers/leds/leds-is31fl319x.c | 4 ++-- drivers/leds/leds-is31fl32xx.c | 4 ++-- drivers/leds/leds-lp55xx-common.c | 6 +++--- drivers/leds/leds-mc13783.c | 4 ++-- drivers/leds/leds-netxbig.c | 4 ++-- drivers/leds/leds-ns2.c | 4 ++-- drivers/leds/leds-pca9532.c | 2 +- drivers/leds/leds-powernv.c | 2 +- drivers/leds/leds-sc27xx-bltc.c | 4 ++-- drivers/leds/leds-spi-byte.c | 4 ++-- drivers/leds/leds-tca6507.c | 4 ++-- drivers/leds/leds-tlc591xx.c | 4 ++-- 15 files changed, 26 insertions(+), 26 deletions(-) diff --git a/drivers/leds/leds-88pm860x.c b/drivers/leds/leds-88pm860x.c index 2d1b3269e0f7..508d0d859f2e 100644 --- a/drivers/leds/leds-88pm860x.c +++ b/drivers/leds/leds-88pm860x.c @@ -125,7 +125,7 @@ static int pm860x_led_dt_init(struct platform_device *pdev, dev_err(&pdev->dev, "failed to find leds node\n"); return -ENODEV; } - for_each_child_of_node(nproot, np) { + for_each_available_child_of_node(nproot, np) { if (of_node_name_eq(np, data->name)) { of_property_read_u32(np, "marvell,88pm860x-iset", &iset); diff --git a/drivers/leds/leds-an30259a.c b/drivers/leds/leds-an30259a.c index 8ec23ccd02d6..9749f1cc3e15 100644 --- a/drivers/leds/leds-an30259a.c +++ b/drivers/leds/leds-an30259a.c @@ -208,7 +208,7 @@ static int an30259a_dt_init(struct i2c_client *client, const char *str; struct an30259a_led *led; - count = of_get_child_count(np); + count = of_get_available_child_count(np); if (!count || count > AN30259A_MAX_LEDS) return -EINVAL; diff --git a/drivers/leds/leds-aw2013.c b/drivers/leds/leds-aw2013.c index 3aeed4f68a8a..9df7de042bca 100644 --- a/drivers/leds/leds-aw2013.c +++ b/drivers/leds/leds-aw2013.c @@ -265,7 +265,7 @@ static int aw2013_probe_dt(struct aw2013 *chip) int count, ret = 0, i = 0; struct aw2013_led *led; - count = of_get_child_count(np); + count = of_get_available_child_count(np); if (!count || count > AW2013_MAX_LEDS) return -EINVAL; diff --git a/drivers/leds/leds-is31fl319x.c b/drivers/leds/leds-is31fl319x.c index e6d185ad0b7e..4161b9dd7e48 100644 --- a/drivers/leds/leds-is31fl319x.c +++ b/drivers/leds/leds-is31fl319x.c @@ -220,7 +220,7 @@ static int is31fl319x_parse_dt(struct device *dev, is31->cdef = device_get_match_data(dev); - count = of_get_child_count(np); + count = of_get_available_child_count(np); dev_dbg(dev, "probing with %d leds defined in DT\n", count); @@ -230,7 +230,7 @@ static int is31fl319x_parse_dt(struct device *dev, return -ENODEV; } - for_each_child_of_node(np, child) { + for_each_available_child_of_node(np, child) { struct is31fl319x_led *led; u32 reg; diff --git a/drivers/leds/leds-is31fl32xx.c b/drivers/leds/leds-is31fl32xx.c index 82bbf0290ff9..b3faf050eece 100644 --- a/drivers/leds/leds-is31fl32xx.c +++ b/drivers/leds/leds-is31fl32xx.c @@ -372,7 +372,7 @@ static int is31fl32xx_parse_dt(struct device *dev, struct device_node *child; int ret = 0; - for_each_child_of_node(dev_of_node(dev), child) { + for_each_available_child_of_node(dev_of_node(dev), child) { struct is31fl32xx_led_data *led_data = &priv->leds[priv->num_leds]; const struct is31fl32xx_led_data *other_led_data; @@ -435,7 +435,7 @@ static int is31fl32xx_probe(struct i2c_client *client, cdef = device_get_match_data(dev); - count = of_get_child_count(dev_of_node(dev)); + count = of_get_available_child_count(dev_of_node(dev)); if (!count) return -EINVAL; diff --git a/drivers/leds/leds-lp55xx-common.c b/drivers/leds/leds-lp55xx-common.c index 56210f4ad919..50f7f5b87463 100644 --- a/drivers/leds/leds-lp55xx-common.c +++ b/drivers/leds/leds-lp55xx-common.c @@ -611,7 +611,7 @@ static int lp55xx_parse_multi_led(struct device_node *np, struct device_node *child; int num_colors = 0, ret; - for_each_child_of_node(np, child) { + for_each_available_child_of_node(np, child) { ret = lp55xx_parse_multi_led_child(child, cfg, child_number, num_colors); if (ret) @@ -665,7 +665,7 @@ struct lp55xx_platform_data *lp55xx_of_populate_pdata(struct device *dev, if (!pdata) return ERR_PTR(-ENOMEM); - num_channels = of_get_child_count(np); + num_channels = of_get_available_child_count(np); if (num_channels == 0) { dev_err(dev, "no LED channels\n"); return ERR_PTR(-EINVAL); @@ -679,7 +679,7 @@ struct lp55xx_platform_data *lp55xx_of_populate_pdata(struct device *dev, pdata->num_channels = num_channels; cfg->max_channel = chip->cfg->max_channel; - for_each_child_of_node(np, child) { + for_each_available_child_of_node(np, child) { ret = lp55xx_parse_logical_led(child, cfg, i); if (ret) return ERR_PTR(-EINVAL); diff --git a/drivers/leds/leds-mc13783.c b/drivers/leds/leds-mc13783.c index ee37f4a2d65b..675502c15c2b 100644 --- a/drivers/leds/leds-mc13783.c +++ b/drivers/leds/leds-mc13783.c @@ -131,7 +131,7 @@ static struct mc13xxx_leds_platform_data __init *mc13xxx_led_probe_dt( if (ret) goto out_node_put; - pdata->num_leds = of_get_child_count(parent); + pdata->num_leds = of_get_available_child_count(parent); pdata->led = devm_kcalloc(dev, pdata->num_leds, sizeof(*pdata->led), GFP_KERNEL); @@ -140,7 +140,7 @@ static struct mc13xxx_leds_platform_data __init *mc13xxx_led_probe_dt( goto out_node_put; } - for_each_child_of_node(parent, child) { + for_each_available_child_of_node(parent, child) { const char *str; u32 tmp; diff --git a/drivers/leds/leds-netxbig.c b/drivers/leds/leds-netxbig.c index 9a3b2d15764d..e6fd47365b58 100644 --- a/drivers/leds/leds-netxbig.c +++ b/drivers/leds/leds-netxbig.c @@ -485,7 +485,7 @@ static int netxbig_leds_get_of_pdata(struct device *dev, } /* LEDs */ - num_leds = of_get_child_count(np); + num_leds = of_get_available_child_count(np); if (!num_leds) { dev_err(dev, "No LED subnodes found in DT\n"); return -ENODEV; @@ -496,7 +496,7 @@ static int netxbig_leds_get_of_pdata(struct device *dev, return -ENOMEM; led = leds; - for_each_child_of_node(np, child) { + for_each_available_child_of_node(np, child) { const char *string; int *mode_val; int num_modes; diff --git a/drivers/leds/leds-ns2.c b/drivers/leds/leds-ns2.c index 9cbd2d7251af..22d38c83b6dc 100644 --- a/drivers/leds/leds-ns2.c +++ b/drivers/leds/leds-ns2.c @@ -251,7 +251,7 @@ ns2_leds_get_of_pdata(struct device *dev, struct ns2_led_platform_data *pdata) struct ns2_led *led, *leds; int ret, num_leds = 0; - num_leds = of_get_child_count(np); + num_leds = of_get_available_child_count(np); if (!num_leds) return -ENODEV; @@ -261,7 +261,7 @@ ns2_leds_get_of_pdata(struct device *dev, struct ns2_led_platform_data *pdata) return -ENOMEM; led = leds; - for_each_child_of_node(np, child) { + for_each_available_child_of_node(np, child) { const char *string; int i, num_modes; struct ns2_led_modval *modval; diff --git a/drivers/leds/leds-pca9532.c b/drivers/leds/leds-pca9532.c index b1ae34e50958..f834550999dd 100644 --- a/drivers/leds/leds-pca9532.c +++ b/drivers/leds/leds-pca9532.c @@ -478,7 +478,7 @@ pca9532_of_populate_pdata(struct device *dev, struct device_node *np) if (!pdata) return ERR_PTR(-ENOMEM); - for_each_child_of_node(np, child) { + for_each_available_child_of_node(np, child) { if (of_property_read_string(child, "label", &pdata->leds[i].name)) pdata->leds[i].name = child->name; diff --git a/drivers/leds/leds-powernv.c b/drivers/leds/leds-powernv.c index cd43d5dff7f4..743e2cdd0891 100644 --- a/drivers/leds/leds-powernv.c +++ b/drivers/leds/leds-powernv.c @@ -250,7 +250,7 @@ static int powernv_led_classdev(struct platform_device *pdev, struct powernv_led_data *powernv_led; struct device *dev = &pdev->dev; - for_each_child_of_node(led_node, np) { + for_each_available_child_of_node(led_node, np) { p = of_find_property(np, "led-types", NULL); while ((cur = of_prop_next_string(p, cur)) != NULL) { diff --git a/drivers/leds/leds-sc27xx-bltc.c b/drivers/leds/leds-sc27xx-bltc.c index f8fe09ecd0d1..e199ea15e406 100644 --- a/drivers/leds/leds-sc27xx-bltc.c +++ b/drivers/leds/leds-sc27xx-bltc.c @@ -281,7 +281,7 @@ static int sc27xx_led_probe(struct platform_device *pdev) u32 base, count, reg; int err; - count = of_get_child_count(np); + count = of_get_available_child_count(np); if (!count || count > SC27XX_LEDS_MAX) return -EINVAL; @@ -305,7 +305,7 @@ static int sc27xx_led_probe(struct platform_device *pdev) return err; } - for_each_child_of_node(np, child) { + for_each_available_child_of_node(np, child) { err = of_property_read_u32(child, "reg", ®); if (err) { of_node_put(child); diff --git a/drivers/leds/leds-spi-byte.c b/drivers/leds/leds-spi-byte.c index ecfd349fa53b..f1964c96fb15 100644 --- a/drivers/leds/leds-spi-byte.c +++ b/drivers/leds/leds-spi-byte.c @@ -87,11 +87,11 @@ static int spi_byte_probe(struct spi_device *spi) const char *state; int ret; - if (of_get_child_count(dev_of_node(dev)) != 1) { + if (of_get_available_child_count(dev_of_node(dev)) != 1) { dev_err(dev, "Device must have exactly one LED sub-node."); return -EINVAL; } - child = of_get_next_child(dev_of_node(dev), NULL); + child = of_get_next_available_child(dev_of_node(dev), NULL); led = devm_kzalloc(dev, sizeof(*led), GFP_KERNEL); if (!led) diff --git a/drivers/leds/leds-tca6507.c b/drivers/leds/leds-tca6507.c index d44b64af6d6e..a7e9fd85b6dd 100644 --- a/drivers/leds/leds-tca6507.c +++ b/drivers/leds/leds-tca6507.c @@ -694,7 +694,7 @@ tca6507_led_dt_init(struct i2c_client *client) struct led_info *tca_leds; int count; - count = of_get_child_count(np); + count = of_get_available_child_count(np); if (!count || count > NUM_LEDS) return ERR_PTR(-ENODEV); @@ -703,7 +703,7 @@ tca6507_led_dt_init(struct i2c_client *client) if (!tca_leds) return ERR_PTR(-ENOMEM); - for_each_child_of_node(np, child) { + for_each_available_child_of_node(np, child) { struct led_info led; u32 reg; int ret; diff --git a/drivers/leds/leds-tlc591xx.c b/drivers/leds/leds-tlc591xx.c index f4d5785f0068..5e84a0c7aacb 100644 --- a/drivers/leds/leds-tlc591xx.c +++ b/drivers/leds/leds-tlc591xx.c @@ -158,7 +158,7 @@ tlc591xx_probe(struct i2c_client *client, if (!np) return -ENODEV; - count = of_get_child_count(np); + count = of_get_available_child_count(np); if (!count || count > tlc591xx->max_leds) return -EINVAL; @@ -180,7 +180,7 @@ tlc591xx_probe(struct i2c_client *client, if (err < 0) return err; - for_each_child_of_node(np, child) { + for_each_available_child_of_node(np, child) { struct tlc591xx_led *led; struct led_init_data init_data = {}; From 2c67756254349d2b4a1af92c846e32f7e15fae89 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Fri, 18 Sep 2020 00:32:57 +0200 Subject: [PATCH 231/433] leds: various: fix OF node leaks MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fix OF node leaks by calling of_node_put in for_each_available_child_of_node when the cycle breaks or returns. Signed-off-by: Marek Behún Cc: Nikita Travkin Cc: Milo Kim Cc: Dan Murphy Signed-off-by: Pavel Machek Not-for-stable: untested, theoretical, insignificant leaks --- drivers/leds/leds-aw2013.c | 4 +++- drivers/leds/leds-lp55xx-common.c | 8 ++++++-- drivers/leds/leds-turris-omnia.c | 4 +++- 3 files changed, 12 insertions(+), 4 deletions(-) diff --git a/drivers/leds/leds-aw2013.c b/drivers/leds/leds-aw2013.c index 9df7de042bca..927c5ba32592 100644 --- a/drivers/leds/leds-aw2013.c +++ b/drivers/leds/leds-aw2013.c @@ -305,8 +305,10 @@ static int aw2013_probe_dt(struct aw2013 *chip) ret = devm_led_classdev_register_ext(&chip->client->dev, &led->cdev, &init_data); - if (ret < 0) + if (ret < 0) { + of_node_put(child); return ret; + } i++; } diff --git a/drivers/leds/leds-lp55xx-common.c b/drivers/leds/leds-lp55xx-common.c index 50f7f5b87463..81de1346bf5d 100644 --- a/drivers/leds/leds-lp55xx-common.c +++ b/drivers/leds/leds-lp55xx-common.c @@ -614,8 +614,10 @@ static int lp55xx_parse_multi_led(struct device_node *np, for_each_available_child_of_node(np, child) { ret = lp55xx_parse_multi_led_child(child, cfg, child_number, num_colors); - if (ret) + if (ret) { + of_node_put(child); return ret; + } num_colors++; } @@ -681,8 +683,10 @@ struct lp55xx_platform_data *lp55xx_of_populate_pdata(struct device *dev, for_each_available_child_of_node(np, child) { ret = lp55xx_parse_logical_led(child, cfg, i); - if (ret) + if (ret) { + of_node_put(child); return ERR_PTR(-EINVAL); + } i++; } diff --git a/drivers/leds/leds-turris-omnia.c b/drivers/leds/leds-turris-omnia.c index ea7da8517220..117976cf75c8 100644 --- a/drivers/leds/leds-turris-omnia.c +++ b/drivers/leds/leds-turris-omnia.c @@ -236,8 +236,10 @@ static int omnia_leds_probe(struct i2c_client *client, led = &leds->leds[0]; for_each_available_child_of_node(np, child) { ret = omnia_led_register(client, led, child); - if (ret < 0) + if (ret < 0) { + of_node_put(child); return ret; + } led += ret; } From ff5c89d44453e7ad99502b04bf798a3fc32c758b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Fri, 18 Sep 2020 00:32:58 +0200 Subject: [PATCH 232/433] leds: bcm6328, bcm6358: use devres LED registering function MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit These two drivers do not provide remove method and use devres for allocation of other resources, yet they use led_classdev_register instead of the devres variant, devm_led_classdev_register. Fix this. Signed-off-by: Marek Behún Cc: Álvaro Fernández Rojas Cc: Kevin Cernekee Cc: Jaedon Shin Signed-off-by: Pavel Machek Cc: stable@kernel.org --- drivers/leds/leds-bcm6328.c | 2 +- drivers/leds/leds-bcm6358.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/leds/leds-bcm6328.c b/drivers/leds/leds-bcm6328.c index 73b385d03c0e..d590a2d00bfd 100644 --- a/drivers/leds/leds-bcm6328.c +++ b/drivers/leds/leds-bcm6328.c @@ -383,7 +383,7 @@ static int bcm6328_led(struct device *dev, struct device_node *nc, u32 reg, led->cdev.brightness_set = bcm6328_led_set; led->cdev.blink_set = bcm6328_blink_set; - rc = led_classdev_register(dev, &led->cdev); + rc = devm_led_classdev_register(dev, &led->cdev); if (rc < 0) return rc; diff --git a/drivers/leds/leds-bcm6358.c b/drivers/leds/leds-bcm6358.c index 2f71f4b5b72e..eeec4f9c8fb7 100644 --- a/drivers/leds/leds-bcm6358.c +++ b/drivers/leds/leds-bcm6358.c @@ -137,7 +137,7 @@ static int bcm6358_led(struct device *dev, struct device_node *nc, u32 reg, led->cdev.brightness_set = bcm6358_led_set; - rc = led_classdev_register(dev, &led->cdev); + rc = devm_led_classdev_register(dev, &led->cdev); if (rc < 0) return rc; From e4e912a349b2e194b15163bef5d70fd1e67a7769 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Fri, 18 Sep 2020 00:32:59 +0200 Subject: [PATCH 233/433] leds: bcm6328, bcm6358: use struct led_init_data when registering MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit By using struct led_init_data when registering we do not need to parse `label` DT property. Moreover `label` is deprecated and if it is not present but `color` and `function` are, LED core will compose a name from these properties instead. Signed-off-by: Marek Behún Cc: Álvaro Fernández Rojas Cc: Kevin Cernekee Cc: Jaedon Shin Signed-off-by: Pavel Machek --- drivers/leds/leds-bcm6328.c | 5 +++-- drivers/leds/leds-bcm6358.c | 5 +++-- 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/leds/leds-bcm6328.c b/drivers/leds/leds-bcm6328.c index d590a2d00bfd..d79aeb956c9b 100644 --- a/drivers/leds/leds-bcm6328.c +++ b/drivers/leds/leds-bcm6328.c @@ -328,6 +328,7 @@ static int bcm6328_led(struct device *dev, struct device_node *nc, u32 reg, void __iomem *mem, spinlock_t *lock, unsigned long *blink_leds, unsigned long *blink_delay) { + struct led_init_data init_data = {}; struct bcm6328_led *led; const char *state; int rc; @@ -345,7 +346,6 @@ static int bcm6328_led(struct device *dev, struct device_node *nc, u32 reg, if (of_property_read_bool(nc, "active-low")) led->active_low = true; - led->cdev.name = of_get_property(nc, "label", NULL) ? : nc->name; led->cdev.default_trigger = of_get_property(nc, "linux,default-trigger", NULL); @@ -382,8 +382,9 @@ static int bcm6328_led(struct device *dev, struct device_node *nc, u32 reg, led->cdev.brightness_set = bcm6328_led_set; led->cdev.blink_set = bcm6328_blink_set; + init_data.fwnode = of_fwnode_handle(nc); - rc = devm_led_classdev_register(dev, &led->cdev); + rc = devm_led_classdev_register_ext(dev, &led->cdev, &init_data); if (rc < 0) return rc; diff --git a/drivers/leds/leds-bcm6358.c b/drivers/leds/leds-bcm6358.c index eeec4f9c8fb7..0fd495103a4d 100644 --- a/drivers/leds/leds-bcm6358.c +++ b/drivers/leds/leds-bcm6358.c @@ -94,6 +94,7 @@ static void bcm6358_led_set(struct led_classdev *led_cdev, static int bcm6358_led(struct device *dev, struct device_node *nc, u32 reg, void __iomem *mem, spinlock_t *lock) { + struct led_init_data init_data = {}; struct bcm6358_led *led; const char *state; int rc; @@ -109,7 +110,6 @@ static int bcm6358_led(struct device *dev, struct device_node *nc, u32 reg, if (of_property_read_bool(nc, "active-low")) led->active_low = true; - led->cdev.name = of_get_property(nc, "label", NULL) ? : nc->name; led->cdev.default_trigger = of_get_property(nc, "linux,default-trigger", NULL); @@ -136,8 +136,9 @@ static int bcm6358_led(struct device *dev, struct device_node *nc, u32 reg, bcm6358_led_set(&led->cdev, led->cdev.brightness); led->cdev.brightness_set = bcm6358_led_set; + init_data.fwnode = of_fwnode_handle(nc); - rc = devm_led_classdev_register(dev, &led->cdev); + rc = devm_led_classdev_register_ext(dev, &led->cdev, &init_data); if (rc < 0) return rc; From 3a953dc330e9ce9c00dc040e59faf66222f0c3b2 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Fri, 18 Sep 2020 00:33:02 +0200 Subject: [PATCH 234/433] leds: lm3697: use struct led_init_data when registering MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit By using struct led_init_data when registering we do not need to parse `label` DT property. Moreover `label` is deprecated and if it is not present but `color` and `function` are, LED core will compose a name from these properties instead. Previously if the `label` DT property was not present, the code composed name for the LED in the form "parent_name::" For backwards compatibility we therefore set init_data->default_label = ":"; so that the LED will not get a different name if `label` property is not present. Signed-off-by: Marek Behún Cc: Dan Murphy Signed-off-by: Pavel Machek --- drivers/leds/leds-lm3697.c | 18 ++++++++---------- 1 file changed, 8 insertions(+), 10 deletions(-) diff --git a/drivers/leds/leds-lm3697.c b/drivers/leds/leds-lm3697.c index 024983088d59..623e084c3b53 100644 --- a/drivers/leds/leds-lm3697.c +++ b/drivers/leds/leds-lm3697.c @@ -194,7 +194,6 @@ static int lm3697_probe_dt(struct lm3697 *priv) { struct fwnode_handle *child = NULL; struct lm3697_led *led; - const char *name; int control_bank; size_t i = 0; int ret = -EINVAL; @@ -214,6 +213,8 @@ static int lm3697_probe_dt(struct lm3697 *priv) priv->regulator = NULL; device_for_each_child_node(priv->dev, child) { + struct led_init_data init_data = {}; + ret = fwnode_property_read_u32(child, "reg", &control_bank); if (ret) { dev_err(&priv->client->dev, "reg property missing\n"); @@ -271,20 +272,17 @@ static int lm3697_probe_dt(struct lm3697 *priv) fwnode_property_read_string(child, "linux,default-trigger", &led->led_dev.default_trigger); - ret = fwnode_property_read_string(child, "label", &name); - if (ret) - snprintf(led->label, sizeof(led->label), - "%s::", priv->client->name); - else - snprintf(led->label, sizeof(led->label), - "%s:%s", priv->client->name, name); + init_data.fwnode = child; + init_data.devicename = priv->client->name; + /* for backwards compatibility if `label` is not present */ + init_data.default_label = ":"; led->priv = priv; - led->led_dev.name = led->label; led->led_dev.max_brightness = led->lmu_data.max_brightness; led->led_dev.brightness_set_blocking = lm3697_brightness_set; - ret = devm_led_classdev_register(priv->dev, &led->led_dev); + ret = devm_led_classdev_register_ext(priv->dev, &led->led_dev, + &init_data); if (ret) { dev_err(&priv->client->dev, "led register err: %d\n", ret); From 0b9e3572874802f0519e85832d09058fa1c9dcb7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Fri, 18 Sep 2020 00:33:03 +0200 Subject: [PATCH 235/433] leds: lm3697: cosmetic change: use helper variable, reverse christmas tree MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Use helper variable dev instead of always writing &client->dev, or &priv->client->dev, or even &led->priv->client->dev. With one more line moved reverse christmas tree is also achieved. Signed-off-by: Marek Behún Reviewed-by: Dan Murphy Signed-off-by: Pavel Machek --- drivers/leds/leds-lm3697.c | 75 ++++++++++++++++++-------------------- 1 file changed, 36 insertions(+), 39 deletions(-) diff --git a/drivers/leds/leds-lm3697.c b/drivers/leds/leds-lm3697.c index 623e084c3b53..a7779ce931ab 100644 --- a/drivers/leds/leds-lm3697.c +++ b/drivers/leds/leds-lm3697.c @@ -115,6 +115,7 @@ static int lm3697_brightness_set(struct led_classdev *led_cdev, struct lm3697_led *led = container_of(led_cdev, struct lm3697_led, led_dev); int ctrl_en_val = (1 << led->control_bank); + struct device *dev = led->priv->dev; int ret; mutex_lock(&led->priv->lock); @@ -123,7 +124,7 @@ static int lm3697_brightness_set(struct led_classdev *led_cdev, ret = regmap_update_bits(led->priv->regmap, LM3697_CTRL_ENABLE, ctrl_en_val, ~ctrl_en_val); if (ret) { - dev_err(&led->priv->client->dev, "Cannot write ctrl register\n"); + dev_err(dev, "Cannot write ctrl register\n"); goto brightness_out; } @@ -131,8 +132,7 @@ static int lm3697_brightness_set(struct led_classdev *led_cdev, } else { ret = ti_lmu_common_set_brightness(&led->lmu_data, brt_val); if (ret) { - dev_err(&led->priv->client->dev, - "Cannot write brightness\n"); + dev_err(dev, "Cannot write brightness\n"); goto brightness_out; } @@ -141,8 +141,7 @@ static int lm3697_brightness_set(struct led_classdev *led_cdev, LM3697_CTRL_ENABLE, ctrl_en_val, ctrl_en_val); if (ret) { - dev_err(&led->priv->client->dev, - "Cannot enable the device\n"); + dev_err(dev, "Cannot enable the device\n"); goto brightness_out; } @@ -157,6 +156,7 @@ brightness_out: static int lm3697_init(struct lm3697 *priv) { + struct device *dev = priv->dev; struct lm3697_led *led; int i, ret; @@ -165,26 +165,26 @@ static int lm3697_init(struct lm3697 *priv) } else { ret = regmap_write(priv->regmap, LM3697_RESET, LM3697_SW_RESET); if (ret) { - dev_err(&priv->client->dev, "Cannot reset the device\n"); + dev_err(dev, "Cannot reset the device\n"); goto out; } } ret = regmap_write(priv->regmap, LM3697_CTRL_ENABLE, 0x0); if (ret) { - dev_err(&priv->client->dev, "Cannot write ctrl enable\n"); + dev_err(dev, "Cannot write ctrl enable\n"); goto out; } ret = regmap_write(priv->regmap, LM3697_OUTPUT_CONFIG, priv->bank_cfg); if (ret) - dev_err(&priv->client->dev, "Cannot write OUTPUT config\n"); + dev_err(dev, "Cannot write OUTPUT config\n"); for (i = 0; i < LM3697_MAX_CONTROL_BANKS; i++) { led = &priv->leds[i]; ret = ti_lmu_common_set_ramp(&led->lmu_data); if (ret) - dev_err(&priv->client->dev, "Setting the ramp rate failed\n"); + dev_err(dev, "Setting the ramp rate failed\n"); } out: return ret; @@ -193,37 +193,37 @@ out: static int lm3697_probe_dt(struct lm3697 *priv) { struct fwnode_handle *child = NULL; + struct device *dev = priv->dev; struct lm3697_led *led; + int ret = -EINVAL; int control_bank; size_t i = 0; - int ret = -EINVAL; int j; - priv->enable_gpio = devm_gpiod_get_optional(&priv->client->dev, - "enable", GPIOD_OUT_LOW); + priv->enable_gpio = devm_gpiod_get_optional(dev, "enable", + GPIOD_OUT_LOW); if (IS_ERR(priv->enable_gpio)) { ret = PTR_ERR(priv->enable_gpio); - dev_err(&priv->client->dev, "Failed to get enable gpio: %d\n", - ret); + dev_err(dev, "Failed to get enable gpio: %d\n", ret); return ret; } - priv->regulator = devm_regulator_get(&priv->client->dev, "vled"); + priv->regulator = devm_regulator_get(dev, "vled"); if (IS_ERR(priv->regulator)) priv->regulator = NULL; - device_for_each_child_node(priv->dev, child) { + device_for_each_child_node(dev, child) { struct led_init_data init_data = {}; ret = fwnode_property_read_u32(child, "reg", &control_bank); if (ret) { - dev_err(&priv->client->dev, "reg property missing\n"); + dev_err(dev, "reg property missing\n"); fwnode_handle_put(child); goto child_out; } if (control_bank > LM3697_CONTROL_B) { - dev_err(&priv->client->dev, "reg property is invalid\n"); + dev_err(dev, "reg property is invalid\n"); ret = -EINVAL; fwnode_handle_put(child); goto child_out; @@ -231,10 +231,10 @@ static int lm3697_probe_dt(struct lm3697 *priv) led = &priv->leds[i]; - ret = ti_lmu_common_get_brt_res(&priv->client->dev, - child, &led->lmu_data); + ret = ti_lmu_common_get_brt_res(dev, child, &led->lmu_data); if (ret) - dev_warn(&priv->client->dev, "brightness resolution property missing\n"); + dev_warn(dev, + "brightness resolution property missing\n"); led->control_bank = control_bank; led->lmu_data.regmap = priv->regmap; @@ -247,7 +247,7 @@ static int lm3697_probe_dt(struct lm3697 *priv) led->num_leds = fwnode_property_count_u32(child, "led-sources"); if (led->num_leds > LM3697_MAX_LED_STRINGS) { - dev_err(&priv->client->dev, "Too many LED strings defined\n"); + dev_err(dev, "Too many LED strings defined\n"); continue; } @@ -255,7 +255,7 @@ static int lm3697_probe_dt(struct lm3697 *priv) led->hvled_strings, led->num_leds); if (ret) { - dev_err(&priv->client->dev, "led-sources property missing\n"); + dev_err(dev, "led-sources property missing\n"); fwnode_handle_put(child); goto child_out; } @@ -264,10 +264,9 @@ static int lm3697_probe_dt(struct lm3697 *priv) priv->bank_cfg |= (led->control_bank << led->hvled_strings[j]); - ret = ti_lmu_common_get_ramp_params(&priv->client->dev, - child, &led->lmu_data); + ret = ti_lmu_common_get_ramp_params(dev, child, &led->lmu_data); if (ret) - dev_warn(&priv->client->dev, "runtime-ramp properties missing\n"); + dev_warn(dev, "runtime-ramp properties missing\n"); fwnode_property_read_string(child, "linux,default-trigger", &led->led_dev.default_trigger); @@ -281,11 +280,10 @@ static int lm3697_probe_dt(struct lm3697 *priv) led->led_dev.max_brightness = led->lmu_data.max_brightness; led->led_dev.brightness_set_blocking = lm3697_brightness_set; - ret = devm_led_classdev_register_ext(priv->dev, &led->led_dev, + ret = devm_led_classdev_register_ext(dev, &led->led_dev, &init_data); if (ret) { - dev_err(&priv->client->dev, "led register err: %d\n", - ret); + dev_err(dev, "led register err: %d\n", ret); fwnode_handle_put(child); goto child_out; } @@ -300,18 +298,18 @@ child_out: static int lm3697_probe(struct i2c_client *client, const struct i2c_device_id *id) { + struct device *dev = &client->dev; struct lm3697 *led; int count; int ret; - count = device_get_child_node_count(&client->dev); + count = device_get_child_node_count(dev); if (!count) { - dev_err(&client->dev, "LEDs are not defined in device tree!"); + dev_err(dev, "LEDs are not defined in device tree!"); return -ENODEV; } - led = devm_kzalloc(&client->dev, struct_size(led, leds, count), - GFP_KERNEL); + led = devm_kzalloc(dev, struct_size(led, leds, count), GFP_KERNEL); if (!led) return -ENOMEM; @@ -319,12 +317,11 @@ static int lm3697_probe(struct i2c_client *client, i2c_set_clientdata(client, led); led->client = client; - led->dev = &client->dev; + led->dev = dev; led->regmap = devm_regmap_init_i2c(client, &lm3697_regmap_config); if (IS_ERR(led->regmap)) { ret = PTR_ERR(led->regmap); - dev_err(&client->dev, "Failed to allocate register map: %d\n", - ret); + dev_err(dev, "Failed to allocate register map: %d\n", ret); return ret; } @@ -338,12 +335,13 @@ static int lm3697_probe(struct i2c_client *client, static int lm3697_remove(struct i2c_client *client) { struct lm3697 *led = i2c_get_clientdata(client); + struct device *dev = &led->client->dev; int ret; ret = regmap_update_bits(led->regmap, LM3697_CTRL_ENABLE, LM3697_CTRL_A_B_EN, 0); if (ret) { - dev_err(&led->client->dev, "Failed to disable the device\n"); + dev_err(dev, "Failed to disable the device\n"); return ret; } @@ -353,8 +351,7 @@ static int lm3697_remove(struct i2c_client *client) if (led->regulator) { ret = regulator_disable(led->regulator); if (ret) - dev_err(&led->client->dev, - "Failed to disable regulator\n"); + dev_err(dev, "Failed to disable regulator\n"); } mutex_destroy(&led->lock); From d7d02b8af5bcaacec9e49993049f57faeb41689c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Fri, 18 Sep 2020 00:33:04 +0200 Subject: [PATCH 236/433] leds: max77650: use struct led_init_data when registering MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit By using struct led_init_data when registering we do not need to parse `label` DT property. Moreover `label` is deprecated and if it is not present but `color` and `function` are, LED core will compose a name from these properties instead. Previously if the `label` DT property was not present, the code composed name for the LED in the form "max77650::" For backwards compatibility we therefore set init_data->default_label = ":"; so that the LED will not get a different name if `label` property is not present. Signed-off-by: Marek Behún Cc: Bartosz Golaszewski Signed-off-by: Pavel Machek --- drivers/leds/leds-max77650.c | 23 +++++++++-------------- 1 file changed, 9 insertions(+), 14 deletions(-) diff --git a/drivers/leds/leds-max77650.c b/drivers/leds/leds-max77650.c index a0d4b725c917..acc1174197c3 100644 --- a/drivers/leds/leds-max77650.c +++ b/drivers/leds/leds-max77650.c @@ -66,7 +66,6 @@ static int max77650_led_probe(struct platform_device *pdev) struct max77650_led *leds, *led; struct device *dev; struct regmap *map; - const char *label; int rv, num_leds; u32 reg; @@ -86,6 +85,8 @@ static int max77650_led_probe(struct platform_device *pdev) return -ENODEV; device_for_each_child_node(dev, child) { + struct led_init_data init_data = {}; + rv = fwnode_property_read_u32(child, "reg", ®); if (rv || reg >= MAX77650_LED_NUM_LEDS) { rv = -EINVAL; @@ -99,22 +100,16 @@ static int max77650_led_probe(struct platform_device *pdev) led->cdev.brightness_set_blocking = max77650_led_brightness_set; led->cdev.max_brightness = MAX77650_LED_MAX_BRIGHTNESS; - rv = fwnode_property_read_string(child, "label", &label); - if (rv) { - led->cdev.name = "max77650::"; - } else { - led->cdev.name = devm_kasprintf(dev, GFP_KERNEL, - "max77650:%s", label); - if (!led->cdev.name) { - rv = -ENOMEM; - goto err_node_put; - } - } - fwnode_property_read_string(child, "linux,default-trigger", &led->cdev.default_trigger); - rv = devm_led_classdev_register(dev, &led->cdev); + init_data.fwnode = child; + init_data.devicename = "max77650"; + /* for backwards compatibility if `label` is not present */ + init_data.default_label = ":"; + + rv = devm_led_classdev_register_ext(dev, &led->cdev, + &init_data); if (rv) goto err_node_put; From 6b8274de375b0632cfbda1081011f18738c15221 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Fri, 18 Sep 2020 00:33:06 +0200 Subject: [PATCH 237/433] leds: mt6323: use struct led_init_data when registering MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit By using struct led_init_data when registering we do not need to parse `label` DT property. Moreover `label` is deprecated and if it is not present but `color` and `function` are, LED core will compose a name from these properties instead. Since init_data is passed with fwnode handle, we do not need to set the of_node member of the newly created LED classdev. Signed-off-by: Marek Behún Cc: Sean Wang Cc: John Crispin Cc: Ryder Lee Signed-off-by: Pavel Machek --- drivers/leds/leds-mt6323.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/leds/leds-mt6323.c b/drivers/leds/leds-mt6323.c index 88deec9d0ef4..f61ad8448351 100644 --- a/drivers/leds/leds-mt6323.c +++ b/drivers/leds/leds-mt6323.c @@ -342,7 +342,6 @@ static int mt6323_led_set_dt_default(struct led_classdev *cdev, const char *state; int ret = 0; - led->cdev.name = of_get_property(np, "label", NULL) ? : np->name; led->cdev.default_trigger = of_get_property(np, "linux,default-trigger", NULL); @@ -402,6 +401,8 @@ static int mt6323_led_probe(struct platform_device *pdev) } for_each_available_child_of_node(np, child) { + struct led_init_data init_data = {}; + ret = of_property_read_u32(child, "reg", ®); if (ret) { dev_err(dev, "Failed to read led 'reg' property\n"); @@ -437,13 +438,15 @@ static int mt6323_led_probe(struct platform_device *pdev) goto put_child_node; } - ret = devm_led_classdev_register(dev, &leds->led[reg]->cdev); + init_data.fwnode = of_fwnode_handle(child); + + ret = devm_led_classdev_register_ext(dev, &leds->led[reg]->cdev, + &init_data); if (ret) { dev_err(&pdev->dev, "Failed to register LED: %d\n", ret); goto put_child_node; } - leds->led[reg]->cdev.dev->of_node = child; } return 0; From b23ca98af6114ee24b3ba085514677db4bfda53c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Fri, 18 Sep 2020 00:33:07 +0200 Subject: [PATCH 238/433] leds: mt6323: cosmetic change: use helper variable MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Use helper variable dev instead of always writing &pdev->dev. Signed-off-by: Marek Behún Cc: Sean Wang Cc: John Crispin Cc: Ryder Lee Signed-off-by: Pavel Machek --- drivers/leds/leds-mt6323.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/leds/leds-mt6323.c b/drivers/leds/leds-mt6323.c index f61ad8448351..a1fceeb41d7e 100644 --- a/drivers/leds/leds-mt6323.c +++ b/drivers/leds/leds-mt6323.c @@ -368,9 +368,9 @@ static int mt6323_led_set_dt_default(struct led_classdev *cdev, static int mt6323_led_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; - struct device_node *np = dev_of_node(&pdev->dev); + struct device_node *np = dev_of_node(dev); struct device_node *child; - struct mt6397_chip *hw = dev_get_drvdata(pdev->dev.parent); + struct mt6397_chip *hw = dev_get_drvdata(dev->parent); struct mt6323_leds *leds; struct mt6323_led *led; int ret; @@ -443,8 +443,7 @@ static int mt6323_led_probe(struct platform_device *pdev) ret = devm_led_classdev_register_ext(dev, &leds->led[reg]->cdev, &init_data); if (ret) { - dev_err(&pdev->dev, "Failed to register LED: %d\n", - ret); + dev_err(dev, "Failed to register LED: %d\n", ret); goto put_child_node; } } From eed951bbf737bb728006b1d248af6341abf79cd8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Fri, 18 Sep 2020 00:33:08 +0200 Subject: [PATCH 239/433] leds: pm8058: use struct led_init_data when registering MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit By using struct led_init_data when registering we do not need to parse `label` DT property. Moreover `label` is deprecated and if it is not present but `color` and `function` are, LED core will compose a name from these properties instead. Signed-off-by: Marek Behún Cc: Linus Walleij Cc: Bjorn Andersson Signed-off-by: Pavel Machek --- drivers/leds/leds-pm8058.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/leds/leds-pm8058.c b/drivers/leds/leds-pm8058.c index 69a7f7e63ea7..f19bd0563ee5 100644 --- a/drivers/leds/leds-pm8058.c +++ b/drivers/leds/leds-pm8058.c @@ -87,6 +87,7 @@ static enum led_brightness pm8058_led_get(struct led_classdev *cled) static int pm8058_led_probe(struct platform_device *pdev) { + struct led_init_data init_data = {}; struct pm8058_led *led; struct device_node *np = dev_of_node(&pdev->dev); int ret; @@ -113,8 +114,6 @@ static int pm8058_led_probe(struct platform_device *pdev) return -EINVAL; } - /* Use label else node name */ - led->cdev.name = of_get_property(np, "label", NULL) ? : np->name; led->cdev.default_trigger = of_get_property(np, "linux,default-trigger", NULL); led->cdev.brightness_set = pm8058_led_set; @@ -142,10 +141,12 @@ static int pm8058_led_probe(struct platform_device *pdev) led->ledtype == PM8058_LED_TYPE_FLASH) led->cdev.flags = LED_CORE_SUSPENDRESUME; - ret = devm_led_classdev_register(&pdev->dev, &led->cdev); + init_data.fwnode = of_fwnode_handle(np); + + ret = devm_led_classdev_register_ext(&pdev->dev, &led->cdev, + &init_data); if (ret) { - dev_err(&pdev->dev, "unable to register led \"%s\"\n", - led->cdev.name); + dev_err(&pdev->dev, "Failed to register LED for %pOF\n", np); return ret; } From fb270ba0d9ba76bf40326ac328024fe35b05c1f6 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Fri, 18 Sep 2020 00:33:09 +0200 Subject: [PATCH 240/433] leds: pm8058: cosmetic change: use helper variable MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Use helper variable dev instead of always writing &pdev->dev. Signed-off-by: Marek Behún Cc: Linus Walleij Cc: Bjorn Andersson Signed-off-by: Pavel Machek --- drivers/leds/leds-pm8058.c | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) diff --git a/drivers/leds/leds-pm8058.c b/drivers/leds/leds-pm8058.c index f19bd0563ee5..db0699462e0d 100644 --- a/drivers/leds/leds-pm8058.c +++ b/drivers/leds/leds-pm8058.c @@ -88,29 +88,32 @@ static enum led_brightness pm8058_led_get(struct led_classdev *cled) static int pm8058_led_probe(struct platform_device *pdev) { struct led_init_data init_data = {}; + struct device *dev = &pdev->dev; struct pm8058_led *led; - struct device_node *np = dev_of_node(&pdev->dev); + struct device_node *np; int ret; struct regmap *map; const char *state; enum led_brightness maxbright; - led = devm_kzalloc(&pdev->dev, sizeof(*led), GFP_KERNEL); + led = devm_kzalloc(dev, sizeof(*led), GFP_KERNEL); if (!led) return -ENOMEM; - led->ledtype = (u32)(unsigned long)of_device_get_match_data(&pdev->dev); + led->ledtype = (u32)(unsigned long)of_device_get_match_data(dev); - map = dev_get_regmap(pdev->dev.parent, NULL); + map = dev_get_regmap(dev->parent, NULL); if (!map) { - dev_err(&pdev->dev, "Parent regmap unavailable.\n"); + dev_err(dev, "Parent regmap unavailable.\n"); return -ENXIO; } led->map = map; + np = dev_of_node(dev); + ret = of_property_read_u32(np, "reg", &led->reg); if (ret) { - dev_err(&pdev->dev, "no register offset specified\n"); + dev_err(dev, "no register offset specified\n"); return -EINVAL; } @@ -143,10 +146,9 @@ static int pm8058_led_probe(struct platform_device *pdev) init_data.fwnode = of_fwnode_handle(np); - ret = devm_led_classdev_register_ext(&pdev->dev, &led->cdev, - &init_data); + ret = devm_led_classdev_register_ext(dev, &led->cdev, &init_data); if (ret) { - dev_err(&pdev->dev, "Failed to register LED for %pOF\n", np); + dev_err(dev, "Failed to register LED for %pOF\n", np); return ret; } From 1016daf98179c657c226bfa820e65f286edc2d29 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Fri, 18 Sep 2020 00:33:10 +0200 Subject: [PATCH 241/433] leds: pm8058: cosmetic change: no need to return in if guard MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit We can return the last ret value. Signed-off-by: Marek Behún Cc: Linus Walleij Cc: Bjorn Andersson Signed-off-by: Pavel Machek --- drivers/leds/leds-pm8058.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/leds/leds-pm8058.c b/drivers/leds/leds-pm8058.c index db0699462e0d..5247b04abb7e 100644 --- a/drivers/leds/leds-pm8058.c +++ b/drivers/leds/leds-pm8058.c @@ -147,12 +147,10 @@ static int pm8058_led_probe(struct platform_device *pdev) init_data.fwnode = of_fwnode_handle(np); ret = devm_led_classdev_register_ext(dev, &led->cdev, &init_data); - if (ret) { + if (ret) dev_err(dev, "Failed to register LED for %pOF\n", np); - return ret; - } - return 0; + return ret; } static const struct of_device_id pm8058_leds_id_table[] = { From 6be2030dd752041fe35a948df78029aaec598b1e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Fri, 18 Sep 2020 00:33:12 +0200 Subject: [PATCH 242/433] leds: is31fl32xx: use struct led_init_data when registering MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit By using struct led_init_data when registering we do not need to parse `label` DT property. Moreover `label` is deprecated and if it is not present but `color` and `function` are, LED core will compose a name from these properties instead. Signed-off-by: Marek Behún Cc: H. Nikolaus Schaller Cc: David Rivshin Signed-off-by: Pavel Machek --- drivers/leds/leds-is31fl32xx.c | 19 +++++++++---------- 1 file changed, 9 insertions(+), 10 deletions(-) diff --git a/drivers/leds/leds-is31fl32xx.c b/drivers/leds/leds-is31fl32xx.c index b3faf050eece..ea589d1a8954 100644 --- a/drivers/leds/leds-is31fl32xx.c +++ b/drivers/leds/leds-is31fl32xx.c @@ -332,9 +332,6 @@ static int is31fl32xx_parse_child_dt(const struct device *dev, int ret = 0; u32 reg; - if (of_property_read_string(child, "label", &cdev->name)) - cdev->name = child->name; - ret = of_property_read_u32(child, "reg", ®); if (ret || reg < 1 || reg > led_data->priv->cdef->channels) { dev_err(dev, @@ -373,6 +370,7 @@ static int is31fl32xx_parse_dt(struct device *dev, int ret = 0; for_each_available_child_of_node(dev_of_node(dev), child) { + struct led_init_data init_data = {}; struct is31fl32xx_led_data *led_data = &priv->leds[priv->num_leds]; const struct is31fl32xx_led_data *other_led_data; @@ -388,17 +386,18 @@ static int is31fl32xx_parse_dt(struct device *dev, led_data->channel); if (other_led_data) { dev_err(dev, - "%s and %s both attempting to use channel %d\n", - led_data->cdev.name, - other_led_data->cdev.name, - led_data->channel); + "Node %pOF 'reg' conflicts with another LED\n", + child); goto err; } - ret = devm_led_classdev_register(dev, &led_data->cdev); + init_data.fwnode = of_fwnode_handle(child); + + ret = devm_led_classdev_register_ext(dev, &led_data->cdev, + &init_data); if (ret) { - dev_err(dev, "failed to register PWM led for %s: %d\n", - led_data->cdev.name, ret); + dev_err(dev, "Failed to register LED for %pOF: %d\n", + child, ret); goto err; } From 40f97281ff0540d43d3d0343d74a8e96573ed227 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Fri, 18 Sep 2020 00:33:24 +0200 Subject: [PATCH 243/433] leds: ns2: use devres LED registering function MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit By using devres version of LED registering function we can remove the .remove method from this driver. The probe method also gets simpler. Signed-off-by: Marek Behún Cc: Simon Guinot Cc: Simon Guinot Cc: Vincent Donnefort Cc: Thomas Petazzoni Cc: Linus Walleij Signed-off-by: Pavel Machek --- drivers/leds/leds-ns2.c | 30 ++---------------------------- 1 file changed, 2 insertions(+), 28 deletions(-) diff --git a/drivers/leds/leds-ns2.c b/drivers/leds/leds-ns2.c index 22d38c83b6dc..1a7ef66464b5 100644 --- a/drivers/leds/leds-ns2.c +++ b/drivers/leds/leds-ns2.c @@ -227,16 +227,7 @@ create_ns2_led(struct platform_device *pdev, struct ns2_led_data *led_dat, led_dat->cdev.brightness = (mode == NS_V2_LED_OFF) ? LED_OFF : LED_FULL; - ret = led_classdev_register(&pdev->dev, &led_dat->cdev); - if (ret < 0) - return ret; - - return 0; -} - -static void delete_ns2_led(struct ns2_led_data *led_dat) -{ - led_classdev_unregister(&led_dat->cdev); + return devm_led_classdev_register(&pdev->dev, &led_dat->cdev); } #ifdef CONFIG_OF_GPIO @@ -380,11 +371,8 @@ static int ns2_led_probe(struct platform_device *pdev) for (i = 0; i < priv->num_leds; i++) { ret = create_ns2_led(pdev, &priv->leds_data[i], &pdata->leds[i]); - if (ret < 0) { - for (i = i - 1; i >= 0; i--) - delete_ns2_led(&priv->leds_data[i]); + if (ret < 0) return ret; - } } platform_set_drvdata(pdev, priv); @@ -392,22 +380,8 @@ static int ns2_led_probe(struct platform_device *pdev) return 0; } -static int ns2_led_remove(struct platform_device *pdev) -{ - int i; - struct ns2_led_priv *priv; - - priv = platform_get_drvdata(pdev); - - for (i = 0; i < priv->num_leds; i++) - delete_ns2_led(&priv->leds_data[i]); - - return 0; -} - static struct platform_driver ns2_led_driver = { .probe = ns2_led_probe, - .remove = ns2_led_remove, .driver = { .name = "leds-ns2", .of_match_table = of_match_ptr(of_ns2_leds_match), From 19d4deb7b24024fa01c6dcaa781b9e508d4f09c0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Fri, 18 Sep 2020 00:33:25 +0200 Subject: [PATCH 244/433] leds: ns2: alloc simple array instead of struct ns2_led_priv MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Since .remove method is not needed now that we use devres, there is no need to remember the number of LEDs in struct ns2_led_priv. Alloc simple array of ns2_led_data structs. Signed-off-by: Marek Behún Cc: Simon Guinot Cc: Simon Guinot Cc: Vincent Donnefort Cc: Thomas Petazzoni Cc: Linus Walleij Signed-off-by: Pavel Machek --- drivers/leds/leds-ns2.c | 21 +++++++-------------- 1 file changed, 7 insertions(+), 14 deletions(-) diff --git a/drivers/leds/leds-ns2.c b/drivers/leds/leds-ns2.c index 1a7ef66464b5..8cd020b34084 100644 --- a/drivers/leds/leds-ns2.c +++ b/drivers/leds/leds-ns2.c @@ -334,15 +334,10 @@ static const struct of_device_id of_ns2_leds_match[] = { MODULE_DEVICE_TABLE(of, of_ns2_leds_match); #endif /* CONFIG_OF_GPIO */ -struct ns2_led_priv { - int num_leds; - struct ns2_led_data leds_data[]; -}; - static int ns2_led_probe(struct platform_device *pdev) { struct ns2_led_platform_data *pdata = dev_get_platdata(&pdev->dev); - struct ns2_led_priv *priv; + struct ns2_led_data *leds; int i; int ret; @@ -363,20 +358,18 @@ static int ns2_led_probe(struct platform_device *pdev) return -EINVAL; #endif /* CONFIG_OF_GPIO */ - priv = devm_kzalloc(&pdev->dev, struct_size(priv, leds_data, pdata->num_leds), GFP_KERNEL); - if (!priv) + leds = devm_kzalloc(&pdev->dev, array_size(sizeof(*leds), + pdata->num_leds), + GFP_KERNEL); + if (!leds) return -ENOMEM; - priv->num_leds = pdata->num_leds; - for (i = 0; i < priv->num_leds; i++) { - ret = create_ns2_led(pdev, &priv->leds_data[i], - &pdata->leds[i]); + for (i = 0; i < pdata->num_leds; i++) { + ret = create_ns2_led(pdev, &leds[i], &pdata->leds[i]); if (ret < 0) return ret; } - platform_set_drvdata(pdev, priv); - return 0; } From 01d0b14d0e52d74ff7e0fc9b39c13be04acf27dd Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Fri, 18 Sep 2020 00:33:26 +0200 Subject: [PATCH 245/433] leds: ns2: support OF probing only, forget platdata MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Move forward from platform data to device tree only. Since commit c7896490dd1a ("leds: ns2: Absorb platform data") the platform data structure is absorbed into the driver, because nothing else in the source tree uses it. Since nobody complained and all usage of this driver is via device tree, change the code to work with device tree only. As Linus Walleij wrote, the device tree should be the preferred way forward anyway. Signed-off-by: Marek Behún Cc: Simon Guinot Cc: Simon Guinot Cc: Vincent Donnefort Cc: Thomas Petazzoni Cc: Linus Walleij Signed-off-by: Pavel Machek --- drivers/leds/leds-ns2.c | 40 +++++++++++++++------------------------- 1 file changed, 15 insertions(+), 25 deletions(-) diff --git a/drivers/leds/leds-ns2.c b/drivers/leds/leds-ns2.c index 8cd020b34084..0e9c2f49b635 100644 --- a/drivers/leds/leds-ns2.c +++ b/drivers/leds/leds-ns2.c @@ -39,7 +39,7 @@ struct ns2_led { struct ns2_led_modval *modval; }; -struct ns2_led_platform_data { +struct ns2_led_of { int num_leds; struct ns2_led *leds; }; @@ -230,12 +230,11 @@ create_ns2_led(struct platform_device *pdev, struct ns2_led_data *led_dat, return devm_led_classdev_register(&pdev->dev, &led_dat->cdev); } -#ifdef CONFIG_OF_GPIO /* * Translate OpenFirmware node properties into platform_data. */ static int -ns2_leds_get_of_pdata(struct device *dev, struct ns2_led_platform_data *pdata) +ns2_leds_parse_of(struct device *dev, struct ns2_led_of *ofdata) { struct device_node *np = dev_of_node(dev); struct device_node *child; @@ -317,8 +316,8 @@ ns2_leds_get_of_pdata(struct device *dev, struct ns2_led_platform_data *pdata) led++; } - pdata->leds = leds; - pdata->num_leds = num_leds; + ofdata->leds = leds; + ofdata->num_leds = num_leds; return 0; @@ -332,40 +331,31 @@ static const struct of_device_id of_ns2_leds_match[] = { {}, }; MODULE_DEVICE_TABLE(of, of_ns2_leds_match); -#endif /* CONFIG_OF_GPIO */ static int ns2_led_probe(struct platform_device *pdev) { - struct ns2_led_platform_data *pdata = dev_get_platdata(&pdev->dev); + struct ns2_led_of *ofdata; struct ns2_led_data *leds; int i; int ret; -#ifdef CONFIG_OF_GPIO - if (!pdata) { - pdata = devm_kzalloc(&pdev->dev, - sizeof(struct ns2_led_platform_data), - GFP_KERNEL); - if (!pdata) - return -ENOMEM; + ofdata = devm_kzalloc(&pdev->dev, sizeof(struct ns2_led_of), + GFP_KERNEL); + if (!ofdata) + return -ENOMEM; - ret = ns2_leds_get_of_pdata(&pdev->dev, pdata); - if (ret) - return ret; - } -#else - if (!pdata) - return -EINVAL; -#endif /* CONFIG_OF_GPIO */ + ret = ns2_leds_parse_of(&pdev->dev, ofdata); + if (ret) + return ret; leds = devm_kzalloc(&pdev->dev, array_size(sizeof(*leds), - pdata->num_leds), + ofdata->num_leds), GFP_KERNEL); if (!leds) return -ENOMEM; - for (i = 0; i < pdata->num_leds; i++) { - ret = create_ns2_led(pdev, &leds[i], &pdata->leds[i]); + for (i = 0; i < ofdata->num_leds; i++) { + ret = create_ns2_led(pdev, &leds[i], &ofdata->leds[i]); if (ret < 0) return ret; } From f72deb717d5b80b3b90ebcb4e4b73b041e2eb465 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Fri, 18 Sep 2020 00:33:27 +0200 Subject: [PATCH 246/433] leds: ns2: move parsing of one LED into separate function MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Move parsing of DT properties of one LED into separate function. This saves indentation level and is nicer to read. Signed-off-by: Marek Behún Cc: Simon Guinot Cc: Simon Guinot Cc: Vincent Donnefort Cc: Thomas Petazzoni Cc: Linus Walleij Signed-off-by: Pavel Machek --- drivers/leds/leds-ns2.c | 120 ++++++++++++++++++---------------------- 1 file changed, 55 insertions(+), 65 deletions(-) diff --git a/drivers/leds/leds-ns2.c b/drivers/leds/leds-ns2.c index 0e9c2f49b635..46d4f7e963c0 100644 --- a/drivers/leds/leds-ns2.c +++ b/drivers/leds/leds-ns2.c @@ -230,6 +230,57 @@ create_ns2_led(struct platform_device *pdev, struct ns2_led_data *led_dat, return devm_led_classdev_register(&pdev->dev, &led_dat->cdev); } +static int ns2_leds_parse_one(struct device *dev, struct device_node *np, + struct ns2_led *led) +{ + struct ns2_led_modval *modval; + int nmodes, ret, i; + + ret = of_property_read_string(np, "label", &led->name); + if (ret) + led->name = np->name; + + led->cmd = gpiod_get_from_of_node(np, "cmd-gpio", 0, GPIOD_ASIS, + led->name); + if (IS_ERR(led->cmd)) + return PTR_ERR(led->cmd); + + led->slow = gpiod_get_from_of_node(np, "slow-gpio", 0, GPIOD_ASIS, + led->name); + if (IS_ERR(led->slow)) + return PTR_ERR(led->slow); + + of_property_read_string(np, "linux,default-trigger", + &led->default_trigger); + + ret = of_property_count_u32_elems(np, "modes-map"); + if (ret < 0 || ret % 3) { + dev_err(dev, "Missing or malformed modes-map for %pOF\n", np); + return -EINVAL; + } + + nmodes = ret / 3; + modval = devm_kcalloc(dev, nmodes, sizeof(*modval), GFP_KERNEL); + if (!modval) + return -ENOMEM; + + for (i = 0; i < nmodes; i++) { + u32 val; + + of_property_read_u32_index(np, "modes-map", 3 * i, &val); + modval[i].mode = val; + of_property_read_u32_index(np, "modes-map", 3 * i + 1, &val); + modval[i].cmd_level = val; + of_property_read_u32_index(np, "modes-map", 3 * i + 2, &val); + modval[i].slow_level = val; + } + + led->num_modes = nmodes; + led->modval = modval; + + return 0; +} + /* * Translate OpenFirmware node properties into platform_data. */ @@ -252,78 +303,17 @@ ns2_leds_parse_of(struct device *dev, struct ns2_led_of *ofdata) led = leds; for_each_available_child_of_node(np, child) { - const char *string; - int i, num_modes; - struct ns2_led_modval *modval; - struct gpio_desc *gd; - - ret = of_property_read_string(child, "label", &string); - led->name = (ret == 0) ? string : child->name; - - gd = gpiod_get_from_of_node(child, "cmd-gpio", 0, - GPIOD_ASIS, led->name); - if (IS_ERR(gd)) { - ret = PTR_ERR(gd); - goto err_node_put; + ret = ns2_leds_parse_one(dev, child, led++); + if (ret < 0) { + of_node_put(child); + return ret; } - led->cmd = gd; - gd = gpiod_get_from_of_node(child, "slow-gpio", 0, - GPIOD_ASIS, led->name); - if (IS_ERR(gd)) { - ret = PTR_ERR(gd); - goto err_node_put; - } - led->slow = gd; - - ret = of_property_read_string(child, "linux,default-trigger", - &string); - if (ret == 0) - led->default_trigger = string; - - ret = of_property_count_u32_elems(child, "modes-map"); - if (ret < 0 || ret % 3) { - dev_err(dev, - "Missing or malformed modes-map property\n"); - ret = -EINVAL; - goto err_node_put; - } - - num_modes = ret / 3; - modval = devm_kcalloc(dev, - num_modes, - sizeof(struct ns2_led_modval), - GFP_KERNEL); - if (!modval) { - ret = -ENOMEM; - goto err_node_put; - } - - for (i = 0; i < num_modes; i++) { - of_property_read_u32_index(child, - "modes-map", 3 * i, - (u32 *) &modval[i].mode); - of_property_read_u32_index(child, - "modes-map", 3 * i + 1, - (u32 *) &modval[i].cmd_level); - of_property_read_u32_index(child, - "modes-map", 3 * i + 2, - (u32 *) &modval[i].slow_level); - } - - led->num_modes = num_modes; - led->modval = modval; - - led++; } ofdata->leds = leds; ofdata->num_leds = num_leds; return 0; - -err_node_put: - of_node_put(child); - return ret; } static const struct of_device_id of_ns2_leds_match[] = { From 528c9515b28d48691f8ef545595be77857e211dc Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Fri, 18 Sep 2020 00:33:28 +0200 Subject: [PATCH 247/433] leds: ns2: use devres API for getting GPIO descriptors MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This drivers leaks GPIO descriptors on driver removal. Use devres API function devm_gpiod_get_from_of_node instead of gpiod_get_from_of_node to avoid this. Signed-off-by: Marek Behún Cc: Simon Guinot Cc: Simon Guinot Cc: Vincent Donnefort Cc: Thomas Petazzoni Cc: Linus Walleij Not-for-stable Signed-off-by: Pavel Machek --- drivers/leds/leds-ns2.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/leds/leds-ns2.c b/drivers/leds/leds-ns2.c index 46d4f7e963c0..fa06ab40ee14 100644 --- a/drivers/leds/leds-ns2.c +++ b/drivers/leds/leds-ns2.c @@ -240,13 +240,13 @@ static int ns2_leds_parse_one(struct device *dev, struct device_node *np, if (ret) led->name = np->name; - led->cmd = gpiod_get_from_of_node(np, "cmd-gpio", 0, GPIOD_ASIS, - led->name); + led->cmd = devm_gpiod_get_from_of_node(dev, np, "cmd-gpio", 0, + GPIOD_ASIS, led->name); if (IS_ERR(led->cmd)) return PTR_ERR(led->cmd); - led->slow = gpiod_get_from_of_node(np, "slow-gpio", 0, GPIOD_ASIS, - led->name); + led->slow = devm_gpiod_get_from_of_node(dev, np, "slow-gpio", 0, + GPIOD_ASIS, led->name); if (IS_ERR(led->slow)) return PTR_ERR(led->slow); From 01026cecf61998ddff76c280e7a710c5b396904e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Fri, 18 Sep 2020 00:33:29 +0200 Subject: [PATCH 248/433] leds: ns2: cosmetic structure rename MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Rename structures: ns2_led -> ns2_led_of_one ns2_led_data -> ns2_led. Signed-off-by: Marek Behún Cc: Simon Guinot Cc: Simon Guinot Cc: Vincent Donnefort Cc: Thomas Petazzoni Cc: Linus Walleij Signed-off-by: Pavel Machek --- drivers/leds/leds-ns2.c | 34 +++++++++++++++++----------------- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/drivers/leds/leds-ns2.c b/drivers/leds/leds-ns2.c index fa06ab40ee14..6dba6208433c 100644 --- a/drivers/leds/leds-ns2.c +++ b/drivers/leds/leds-ns2.c @@ -30,7 +30,7 @@ struct ns2_led_modval { int slow_level; }; -struct ns2_led { +struct ns2_led_of_one { const char *name; const char *default_trigger; struct gpio_desc *cmd; @@ -40,8 +40,8 @@ struct ns2_led { }; struct ns2_led_of { - int num_leds; - struct ns2_led *leds; + int num_leds; + struct ns2_led_of_one *leds; }; /* @@ -51,7 +51,7 @@ struct ns2_led_of { * for the command/slow GPIOs corresponds to a LED mode. */ -struct ns2_led_data { +struct ns2_led { struct led_classdev cdev; struct gpio_desc *cmd; struct gpio_desc *slow; @@ -62,7 +62,7 @@ struct ns2_led_data { struct ns2_led_modval *modval; }; -static int ns2_led_get_mode(struct ns2_led_data *led_dat, +static int ns2_led_get_mode(struct ns2_led *led_dat, enum ns2_led_modes *mode) { int i; @@ -85,7 +85,7 @@ static int ns2_led_get_mode(struct ns2_led_data *led_dat, return ret; } -static void ns2_led_set_mode(struct ns2_led_data *led_dat, +static void ns2_led_set_mode(struct ns2_led *led_dat, enum ns2_led_modes mode) { int i; @@ -121,8 +121,8 @@ exit_unlock: static void ns2_led_set(struct led_classdev *led_cdev, enum led_brightness value) { - struct ns2_led_data *led_dat = - container_of(led_cdev, struct ns2_led_data, cdev); + struct ns2_led *led_dat = + container_of(led_cdev, struct ns2_led, cdev); enum ns2_led_modes mode; if (value == LED_OFF) @@ -147,8 +147,8 @@ static ssize_t ns2_led_sata_store(struct device *dev, const char *buff, size_t count) { struct led_classdev *led_cdev = dev_get_drvdata(dev); - struct ns2_led_data *led_dat = - container_of(led_cdev, struct ns2_led_data, cdev); + struct ns2_led *led_dat = + container_of(led_cdev, struct ns2_led, cdev); int ret; unsigned long enable; @@ -179,8 +179,8 @@ static ssize_t ns2_led_sata_show(struct device *dev, struct device_attribute *attr, char *buf) { struct led_classdev *led_cdev = dev_get_drvdata(dev); - struct ns2_led_data *led_dat = - container_of(led_cdev, struct ns2_led_data, cdev); + struct ns2_led *led_dat = + container_of(led_cdev, struct ns2_led, cdev); return sprintf(buf, "%d\n", led_dat->sata); } @@ -194,8 +194,8 @@ static struct attribute *ns2_led_attrs[] = { ATTRIBUTE_GROUPS(ns2_led); static int -create_ns2_led(struct platform_device *pdev, struct ns2_led_data *led_dat, - const struct ns2_led *template) +create_ns2_led(struct platform_device *pdev, struct ns2_led *led_dat, + const struct ns2_led_of_one *template) { int ret; enum ns2_led_modes mode; @@ -231,7 +231,7 @@ create_ns2_led(struct platform_device *pdev, struct ns2_led_data *led_dat, } static int ns2_leds_parse_one(struct device *dev, struct device_node *np, - struct ns2_led *led) + struct ns2_led_of_one *led) { struct ns2_led_modval *modval; int nmodes, ret, i; @@ -289,7 +289,7 @@ ns2_leds_parse_of(struct device *dev, struct ns2_led_of *ofdata) { struct device_node *np = dev_of_node(dev); struct device_node *child; - struct ns2_led *led, *leds; + struct ns2_led_of_one *led, *leds; int ret, num_leds = 0; num_leds = of_get_available_child_count(np); @@ -325,7 +325,7 @@ MODULE_DEVICE_TABLE(of, of_ns2_leds_match); static int ns2_led_probe(struct platform_device *pdev) { struct ns2_led_of *ofdata; - struct ns2_led_data *leds; + struct ns2_led *leds; int i; int ret; From a78bd8f33fd7f76aded73a4f371270f70e1f5cb8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Fri, 18 Sep 2020 00:33:30 +0200 Subject: [PATCH 249/433] leds: ns2: cosmetic variable rename MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Rename variable led_dat to led in various functions. Signed-off-by: Marek Behún Cc: Simon Guinot Cc: Simon Guinot Cc: Vincent Donnefort Cc: Thomas Petazzoni Cc: Linus Walleij Signed-off-by: Pavel Machek --- drivers/leds/leds-ns2.c | 101 ++++++++++++++++++---------------------- 1 file changed, 46 insertions(+), 55 deletions(-) diff --git a/drivers/leds/leds-ns2.c b/drivers/leds/leds-ns2.c index 6dba6208433c..dde476420a73 100644 --- a/drivers/leds/leds-ns2.c +++ b/drivers/leds/leds-ns2.c @@ -62,21 +62,20 @@ struct ns2_led { struct ns2_led_modval *modval; }; -static int ns2_led_get_mode(struct ns2_led *led_dat, - enum ns2_led_modes *mode) +static int ns2_led_get_mode(struct ns2_led *led, enum ns2_led_modes *mode) { int i; int ret = -EINVAL; int cmd_level; int slow_level; - cmd_level = gpiod_get_value_cansleep(led_dat->cmd); - slow_level = gpiod_get_value_cansleep(led_dat->slow); + cmd_level = gpiod_get_value_cansleep(led->cmd); + slow_level = gpiod_get_value_cansleep(led->slow); - for (i = 0; i < led_dat->num_modes; i++) { - if (cmd_level == led_dat->modval[i].cmd_level && - slow_level == led_dat->modval[i].slow_level) { - *mode = led_dat->modval[i].mode; + for (i = 0; i < led->num_modes; i++) { + if (cmd_level == led->modval[i].cmd_level && + slow_level == led->modval[i].slow_level) { + *mode = led->modval[i].mode; ret = 0; break; } @@ -85,15 +84,14 @@ static int ns2_led_get_mode(struct ns2_led *led_dat, return ret; } -static void ns2_led_set_mode(struct ns2_led *led_dat, - enum ns2_led_modes mode) +static void ns2_led_set_mode(struct ns2_led *led, enum ns2_led_modes mode) { int i; bool found = false; unsigned long flags; - for (i = 0; i < led_dat->num_modes; i++) - if (mode == led_dat->modval[i].mode) { + for (i = 0; i < led->num_modes; i++) + if (mode == led->modval[i].mode) { found = true; break; } @@ -101,38 +99,35 @@ static void ns2_led_set_mode(struct ns2_led *led_dat, if (!found) return; - write_lock_irqsave(&led_dat->rw_lock, flags); + write_lock_irqsave(&led->rw_lock, flags); - if (!led_dat->can_sleep) { - gpiod_set_value(led_dat->cmd, - led_dat->modval[i].cmd_level); - gpiod_set_value(led_dat->slow, - led_dat->modval[i].slow_level); + if (!led->can_sleep) { + gpiod_set_value(led->cmd, led->modval[i].cmd_level); + gpiod_set_value(led->slow, led->modval[i].slow_level); goto exit_unlock; } - gpiod_set_value_cansleep(led_dat->cmd, led_dat->modval[i].cmd_level); - gpiod_set_value_cansleep(led_dat->slow, led_dat->modval[i].slow_level); + gpiod_set_value_cansleep(led->cmd, led->modval[i].cmd_level); + gpiod_set_value_cansleep(led->slow, led->modval[i].slow_level); exit_unlock: - write_unlock_irqrestore(&led_dat->rw_lock, flags); + write_unlock_irqrestore(&led->rw_lock, flags); } static void ns2_led_set(struct led_classdev *led_cdev, enum led_brightness value) { - struct ns2_led *led_dat = - container_of(led_cdev, struct ns2_led, cdev); + struct ns2_led *led = container_of(led_cdev, struct ns2_led, cdev); enum ns2_led_modes mode; if (value == LED_OFF) mode = NS_V2_LED_OFF; - else if (led_dat->sata) + else if (led->sata) mode = NS_V2_LED_SATA; else mode = NS_V2_LED_ON; - ns2_led_set_mode(led_dat, mode); + ns2_led_set_mode(led, mode); } static int ns2_led_set_blocking(struct led_classdev *led_cdev, @@ -147,8 +142,7 @@ static ssize_t ns2_led_sata_store(struct device *dev, const char *buff, size_t count) { struct led_classdev *led_cdev = dev_get_drvdata(dev); - struct ns2_led *led_dat = - container_of(led_cdev, struct ns2_led, cdev); + struct ns2_led *led = container_of(led_cdev, struct ns2_led, cdev); int ret; unsigned long enable; @@ -158,18 +152,18 @@ static ssize_t ns2_led_sata_store(struct device *dev, enable = !!enable; - if (led_dat->sata == enable) + if (led->sata == enable) goto exit; - led_dat->sata = enable; + led->sata = enable; if (!led_get_brightness(led_cdev)) goto exit; if (enable) - ns2_led_set_mode(led_dat, NS_V2_LED_SATA); + ns2_led_set_mode(led, NS_V2_LED_SATA); else - ns2_led_set_mode(led_dat, NS_V2_LED_ON); + ns2_led_set_mode(led, NS_V2_LED_ON); exit: return count; @@ -179,10 +173,9 @@ static ssize_t ns2_led_sata_show(struct device *dev, struct device_attribute *attr, char *buf) { struct led_classdev *led_cdev = dev_get_drvdata(dev); - struct ns2_led *led_dat = - container_of(led_cdev, struct ns2_led, cdev); + struct ns2_led *led = container_of(led_cdev, struct ns2_led, cdev); - return sprintf(buf, "%d\n", led_dat->sata); + return sprintf(buf, "%d\n", led->sata); } static DEVICE_ATTR(sata, 0644, ns2_led_sata_show, ns2_led_sata_store); @@ -194,40 +187,38 @@ static struct attribute *ns2_led_attrs[] = { ATTRIBUTE_GROUPS(ns2_led); static int -create_ns2_led(struct platform_device *pdev, struct ns2_led *led_dat, +create_ns2_led(struct platform_device *pdev, struct ns2_led *led, const struct ns2_led_of_one *template) { int ret; enum ns2_led_modes mode; - rwlock_init(&led_dat->rw_lock); + rwlock_init(&led->rw_lock); - led_dat->cdev.name = template->name; - led_dat->cdev.default_trigger = template->default_trigger; - led_dat->cdev.blink_set = NULL; - led_dat->cdev.flags |= LED_CORE_SUSPENDRESUME; - led_dat->cdev.groups = ns2_led_groups; - led_dat->cmd = template->cmd; - led_dat->slow = template->slow; - led_dat->can_sleep = gpiod_cansleep(led_dat->cmd) | - gpiod_cansleep(led_dat->slow); - if (led_dat->can_sleep) - led_dat->cdev.brightness_set_blocking = ns2_led_set_blocking; + led->cdev.name = template->name; + led->cdev.default_trigger = template->default_trigger; + led->cdev.blink_set = NULL; + led->cdev.flags |= LED_CORE_SUSPENDRESUME; + led->cdev.groups = ns2_led_groups; + led->cmd = template->cmd; + led->slow = template->slow; + led->can_sleep = gpiod_cansleep(led->cmd) | gpiod_cansleep(led->slow); + if (led->can_sleep) + led->cdev.brightness_set_blocking = ns2_led_set_blocking; else - led_dat->cdev.brightness_set = ns2_led_set; - led_dat->modval = template->modval; - led_dat->num_modes = template->num_modes; + led->cdev.brightness_set = ns2_led_set; + led->modval = template->modval; + led->num_modes = template->num_modes; - ret = ns2_led_get_mode(led_dat, &mode); + ret = ns2_led_get_mode(led, &mode); if (ret < 0) return ret; /* Set LED initial state. */ - led_dat->sata = (mode == NS_V2_LED_SATA) ? 1 : 0; - led_dat->cdev.brightness = - (mode == NS_V2_LED_OFF) ? LED_OFF : LED_FULL; + led->sata = (mode == NS_V2_LED_SATA) ? 1 : 0; + led->cdev.brightness = (mode == NS_V2_LED_OFF) ? LED_OFF : LED_FULL; - return devm_led_classdev_register(&pdev->dev, &led_dat->cdev); + return devm_led_classdev_register(&pdev->dev, &led->cdev); } static int ns2_leds_parse_one(struct device *dev, struct device_node *np, From a2fc703cc955c6b4b6c7fbed42df62bbadc46422 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Fri, 18 Sep 2020 00:33:31 +0200 Subject: [PATCH 250/433] leds: ns2: cosmetic change MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Return directly instead of setting result and breaking. Signed-off-by: Marek Behún Cc: Simon Guinot Cc: Simon Guinot Cc: Vincent Donnefort Cc: Thomas Petazzoni Cc: Linus Walleij Signed-off-by: Pavel Machek --- drivers/leds/leds-ns2.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/leds/leds-ns2.c b/drivers/leds/leds-ns2.c index dde476420a73..912db40c5118 100644 --- a/drivers/leds/leds-ns2.c +++ b/drivers/leds/leds-ns2.c @@ -65,7 +65,6 @@ struct ns2_led { static int ns2_led_get_mode(struct ns2_led *led, enum ns2_led_modes *mode) { int i; - int ret = -EINVAL; int cmd_level; int slow_level; @@ -76,12 +75,11 @@ static int ns2_led_get_mode(struct ns2_led *led, enum ns2_led_modes *mode) if (cmd_level == led->modval[i].cmd_level && slow_level == led->modval[i].slow_level) { *mode = led->modval[i].mode; - ret = 0; - break; + return 0; } } - return ret; + return -EINVAL; } static void ns2_led_set_mode(struct ns2_led *led, enum ns2_led_modes mode) From b3f96922839a589e8417c31a1837f78382d3f0ab Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Fri, 18 Sep 2020 00:33:32 +0200 Subject: [PATCH 251/433] leds: ns2: cosmetic change: use helper variable MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Use helper variable dev instead of always writing &pdev->dev. Signed-off-by: Marek Behún Cc: Simon Guinot Cc: Simon Guinot Cc: Vincent Donnefort Cc: Thomas Petazzoni Cc: Linus Walleij Signed-off-by: Pavel Machek --- drivers/leds/leds-ns2.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/drivers/leds/leds-ns2.c b/drivers/leds/leds-ns2.c index 912db40c5118..801b7f851be7 100644 --- a/drivers/leds/leds-ns2.c +++ b/drivers/leds/leds-ns2.c @@ -185,7 +185,7 @@ static struct attribute *ns2_led_attrs[] = { ATTRIBUTE_GROUPS(ns2_led); static int -create_ns2_led(struct platform_device *pdev, struct ns2_led *led, +create_ns2_led(struct device *dev, struct ns2_led *led, const struct ns2_led_of_one *template) { int ret; @@ -216,7 +216,7 @@ create_ns2_led(struct platform_device *pdev, struct ns2_led *led, led->sata = (mode == NS_V2_LED_SATA) ? 1 : 0; led->cdev.brightness = (mode == NS_V2_LED_OFF) ? LED_OFF : LED_FULL; - return devm_led_classdev_register(&pdev->dev, &led->cdev); + return devm_led_classdev_register(dev, &led->cdev); } static int ns2_leds_parse_one(struct device *dev, struct device_node *np, @@ -313,28 +313,27 @@ MODULE_DEVICE_TABLE(of, of_ns2_leds_match); static int ns2_led_probe(struct platform_device *pdev) { + struct device *dev = &pdev->dev; struct ns2_led_of *ofdata; struct ns2_led *leds; int i; int ret; - ofdata = devm_kzalloc(&pdev->dev, sizeof(struct ns2_led_of), - GFP_KERNEL); + ofdata = devm_kzalloc(dev, sizeof(struct ns2_led_of), GFP_KERNEL); if (!ofdata) return -ENOMEM; - ret = ns2_leds_parse_of(&pdev->dev, ofdata); + ret = ns2_leds_parse_of(dev, ofdata); if (ret) return ret; - leds = devm_kzalloc(&pdev->dev, array_size(sizeof(*leds), - ofdata->num_leds), + leds = devm_kzalloc(dev, array_size(sizeof(*leds), ofdata->num_leds), GFP_KERNEL); if (!leds) return -ENOMEM; for (i = 0; i < ofdata->num_leds; i++) { - ret = create_ns2_led(pdev, &leds[i], &ofdata->leds[i]); + ret = create_ns2_led(dev, &leds[i], &ofdata->leds[i]); if (ret < 0) return ret; } From a4a469b4314e95818521daef82aa7f9071123245 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Fri, 18 Sep 2020 00:33:33 +0200 Subject: [PATCH 252/433] leds: ns2: register LED immediately after parsing DT properties MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Register each LED immediately after parsing OF properties. This simplifies the driver. Signed-off-by: Marek Behún Cc: Simon Guinot Cc: Simon Guinot Cc: Vincent Donnefort Cc: Thomas Petazzoni Cc: Linus Walleij Signed-off-by: Pavel Machek --- drivers/leds/leds-ns2.c | 143 +++++++++++----------------------------- 1 file changed, 40 insertions(+), 103 deletions(-) diff --git a/drivers/leds/leds-ns2.c b/drivers/leds/leds-ns2.c index 801b7f851be7..9d9c9ff4dce6 100644 --- a/drivers/leds/leds-ns2.c +++ b/drivers/leds/leds-ns2.c @@ -30,20 +30,6 @@ struct ns2_led_modval { int slow_level; }; -struct ns2_led_of_one { - const char *name; - const char *default_trigger; - struct gpio_desc *cmd; - struct gpio_desc *slow; - int num_modes; - struct ns2_led_modval *modval; -}; - -struct ns2_led_of { - int num_leds; - struct ns2_led_of_one *leds; -}; - /* * The Network Space v2 dual-GPIO LED is wired to a CPLD. Three different LED * modes are available: off, on and SATA activity blinking. The LED modes are @@ -184,63 +170,29 @@ static struct attribute *ns2_led_attrs[] = { }; ATTRIBUTE_GROUPS(ns2_led); -static int -create_ns2_led(struct device *dev, struct ns2_led *led, - const struct ns2_led_of_one *template) -{ - int ret; - enum ns2_led_modes mode; - - rwlock_init(&led->rw_lock); - - led->cdev.name = template->name; - led->cdev.default_trigger = template->default_trigger; - led->cdev.blink_set = NULL; - led->cdev.flags |= LED_CORE_SUSPENDRESUME; - led->cdev.groups = ns2_led_groups; - led->cmd = template->cmd; - led->slow = template->slow; - led->can_sleep = gpiod_cansleep(led->cmd) | gpiod_cansleep(led->slow); - if (led->can_sleep) - led->cdev.brightness_set_blocking = ns2_led_set_blocking; - else - led->cdev.brightness_set = ns2_led_set; - led->modval = template->modval; - led->num_modes = template->num_modes; - - ret = ns2_led_get_mode(led, &mode); - if (ret < 0) - return ret; - - /* Set LED initial state. */ - led->sata = (mode == NS_V2_LED_SATA) ? 1 : 0; - led->cdev.brightness = (mode == NS_V2_LED_OFF) ? LED_OFF : LED_FULL; - - return devm_led_classdev_register(dev, &led->cdev); -} - -static int ns2_leds_parse_one(struct device *dev, struct device_node *np, - struct ns2_led_of_one *led) +static int ns2_led_register(struct device *dev, struct device_node *np, + struct ns2_led *led) { struct ns2_led_modval *modval; + enum ns2_led_modes mode; int nmodes, ret, i; - ret = of_property_read_string(np, "label", &led->name); + ret = of_property_read_string(np, "label", &led->cdev.name); if (ret) - led->name = np->name; + led->cdev.name = np->name; led->cmd = devm_gpiod_get_from_of_node(dev, np, "cmd-gpio", 0, - GPIOD_ASIS, led->name); + GPIOD_ASIS, np->name); if (IS_ERR(led->cmd)) return PTR_ERR(led->cmd); led->slow = devm_gpiod_get_from_of_node(dev, np, "slow-gpio", 0, - GPIOD_ASIS, led->name); + GPIOD_ASIS, np->name); if (IS_ERR(led->slow)) return PTR_ERR(led->slow); of_property_read_string(np, "linux,default-trigger", - &led->default_trigger); + &led->cdev.default_trigger); ret = of_property_count_u32_elems(np, "modes-map"); if (ret < 0 || ret % 3) { @@ -264,45 +216,32 @@ static int ns2_leds_parse_one(struct device *dev, struct device_node *np, modval[i].slow_level = val; } + rwlock_init(&led->rw_lock); + + led->cdev.blink_set = NULL; + led->cdev.flags |= LED_CORE_SUSPENDRESUME; + led->cdev.groups = ns2_led_groups; + led->can_sleep = gpiod_cansleep(led->cmd) || gpiod_cansleep(led->slow); + if (led->can_sleep) + led->cdev.brightness_set_blocking = ns2_led_set_blocking; + else + led->cdev.brightness_set = ns2_led_set; led->num_modes = nmodes; led->modval = modval; - return 0; -} + ret = ns2_led_get_mode(led, &mode); + if (ret < 0) + return ret; -/* - * Translate OpenFirmware node properties into platform_data. - */ -static int -ns2_leds_parse_of(struct device *dev, struct ns2_led_of *ofdata) -{ - struct device_node *np = dev_of_node(dev); - struct device_node *child; - struct ns2_led_of_one *led, *leds; - int ret, num_leds = 0; + /* Set LED initial state. */ + led->sata = (mode == NS_V2_LED_SATA) ? 1 : 0; + led->cdev.brightness = (mode == NS_V2_LED_OFF) ? LED_OFF : LED_FULL; - num_leds = of_get_available_child_count(np); - if (!num_leds) - return -ENODEV; + ret = devm_led_classdev_register(dev, &led->cdev); + if (ret) + dev_err(dev, "Failed to register LED for node %pOF\n", np); - leds = devm_kcalloc(dev, num_leds, sizeof(struct ns2_led), - GFP_KERNEL); - if (!leds) - return -ENOMEM; - - led = leds; - for_each_available_child_of_node(np, child) { - ret = ns2_leds_parse_one(dev, child, led++); - if (ret < 0) { - of_node_put(child); - return ret; - } - } - - ofdata->leds = leds; - ofdata->num_leds = num_leds; - - return 0; + return ret; } static const struct of_device_id of_ns2_leds_match[] = { @@ -314,28 +253,26 @@ MODULE_DEVICE_TABLE(of, of_ns2_leds_match); static int ns2_led_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; - struct ns2_led_of *ofdata; + struct device_node *np, *child; struct ns2_led *leds; - int i; + int count; int ret; - ofdata = devm_kzalloc(dev, sizeof(struct ns2_led_of), GFP_KERNEL); - if (!ofdata) - return -ENOMEM; + np = dev_of_node(dev); + count = of_get_available_child_count(np); + if (!count) + return -ENODEV; - ret = ns2_leds_parse_of(dev, ofdata); - if (ret) - return ret; - - leds = devm_kzalloc(dev, array_size(sizeof(*leds), ofdata->num_leds), - GFP_KERNEL); + leds = devm_kzalloc(dev, array_size(sizeof(*leds), count), GFP_KERNEL); if (!leds) return -ENOMEM; - for (i = 0; i < ofdata->num_leds; i++) { - ret = create_ns2_led(dev, &leds[i], &ofdata->leds[i]); - if (ret < 0) + for_each_available_child_of_node(np, child) { + ret = ns2_led_register(dev, child, leds++); + if (ret) { + of_node_put(child); return ret; + } } return 0; From 48b77cdca50a180fd1f22f4ae3b3d1e4ec7d2e5c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Fri, 18 Sep 2020 00:33:34 +0200 Subject: [PATCH 253/433] leds: ns2: remove unneeded variable MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit No need to use variable found, we can determine whether the mode was found by comparing iterator variable to its limit. Signed-off-by: Marek Behún Cc: Simon Guinot Cc: Simon Guinot Cc: Vincent Donnefort Cc: Thomas Petazzoni Cc: Linus Walleij Signed-off-by: Pavel Machek --- drivers/leds/leds-ns2.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/drivers/leds/leds-ns2.c b/drivers/leds/leds-ns2.c index 9d9c9ff4dce6..e94bb8535f0a 100644 --- a/drivers/leds/leds-ns2.c +++ b/drivers/leds/leds-ns2.c @@ -71,16 +71,13 @@ static int ns2_led_get_mode(struct ns2_led *led, enum ns2_led_modes *mode) static void ns2_led_set_mode(struct ns2_led *led, enum ns2_led_modes mode) { int i; - bool found = false; unsigned long flags; for (i = 0; i < led->num_modes; i++) - if (mode == led->modval[i].mode) { - found = true; + if (mode == led->modval[i].mode) break; - } - if (!found) + if (i == led->num_modes) return; write_lock_irqsave(&led->rw_lock, flags); From f847ef543ce45c917bcbcafb2555aa9e5968c385 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Fri, 18 Sep 2020 00:33:37 +0200 Subject: [PATCH 254/433] leds: ns2: use struct led_init_data when registering MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit By using struct led_init_data when registering we do not need to parse `label` DT property. Moreover `label` is deprecated and if it is not present but `color` and `function` are, LED core will compose a name from these properties instead. Signed-off-by: Marek Behún Cc: Simon Guinot Cc: Simon Guinot Cc: Vincent Donnefort Cc: Thomas Petazzoni Cc: Linus Walleij Signed-off-by: Pavel Machek --- drivers/leds/leds-ns2.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/leds/leds-ns2.c b/drivers/leds/leds-ns2.c index e94bb8535f0a..030f426af3d7 100644 --- a/drivers/leds/leds-ns2.c +++ b/drivers/leds/leds-ns2.c @@ -170,14 +170,11 @@ ATTRIBUTE_GROUPS(ns2_led); static int ns2_led_register(struct device *dev, struct device_node *np, struct ns2_led *led) { + struct led_init_data init_data = {}; struct ns2_led_modval *modval; enum ns2_led_modes mode; int nmodes, ret, i; - ret = of_property_read_string(np, "label", &led->cdev.name); - if (ret) - led->cdev.name = np->name; - led->cmd = devm_gpiod_get_from_of_node(dev, np, "cmd-gpio", 0, GPIOD_ASIS, np->name); if (IS_ERR(led->cmd)) @@ -234,7 +231,9 @@ static int ns2_led_register(struct device *dev, struct device_node *np, led->sata = (mode == NS_V2_LED_SATA) ? 1 : 0; led->cdev.brightness = (mode == NS_V2_LED_OFF) ? LED_OFF : LED_FULL; - ret = devm_led_classdev_register(dev, &led->cdev); + init_data.fwnode = of_fwnode_handle(np); + + ret = devm_led_classdev_register_ext(dev, &led->cdev, &init_data); if (ret) dev_err(dev, "Failed to register LED for node %pOF\n", np); From c4241abcd50019adafb11d8aa8269d242c4f42b4 Mon Sep 17 00:00:00 2001 From: Liu Shixin Date: Sat, 19 Sep 2020 18:08:53 +0800 Subject: [PATCH 255/433] leds: pca9532 - simplify the return expression of pca9532_remove Simplify the return expression. Signed-off-by: Liu Shixin Signed-off-by: Pavel Machek --- drivers/leds/leds-pca9532.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/drivers/leds/leds-pca9532.c b/drivers/leds/leds-pca9532.c index f834550999dd..41229f775d35 100644 --- a/drivers/leds/leds-pca9532.c +++ b/drivers/leds/leds-pca9532.c @@ -545,13 +545,8 @@ static int pca9532_probe(struct i2c_client *client, static int pca9532_remove(struct i2c_client *client) { struct pca9532_data *data = i2c_get_clientdata(client); - int err; - err = pca9532_destroy_devices(data, data->chip_info->num_leds); - if (err) - return err; - - return 0; + return pca9532_destroy_devices(data, data->chip_info->num_leds); } module_i2c_driver(pca9532_driver); From 1ece06acd29e028734431f9ccc79a57c3fc6281e Mon Sep 17 00:00:00 2001 From: Dmitry Osipenko Date: Sun, 6 Sep 2020 22:51:02 +0300 Subject: [PATCH 256/433] leds: Add driver for Acer Iconia Tab A500 Acer Iconia Tab A500 is an Android tablet device which has two LEDs embedded into the Power Button. Orange LED indicates "battery charging" status and white LED indicates "wake-up/charge-done" status. The new LED driver provides control over both LEDs to userspace. Signed-off-by: Dmitry Osipenko Signed-off-by: Pavel Machek --- drivers/leds/Kconfig | 7 ++ drivers/leds/Makefile | 1 + drivers/leds/leds-acer-a500.c | 129 ++++++++++++++++++++++++++++++++++ 3 files changed, 137 insertions(+) create mode 100644 drivers/leds/leds-acer-a500.c diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig index a008170e73cd..849d3c5f908e 100644 --- a/drivers/leds/Kconfig +++ b/drivers/leds/Kconfig @@ -921,6 +921,13 @@ config LEDS_SGM3140 This option enables support for the SGM3140 500mA Buck/Boost Charge Pump LED Driver. +config LEDS_ACER_A500 + tristate "Power button LED support for Acer Iconia Tab A500" + depends on LEDS_CLASS && MFD_ACER_A500_EC + help + This option enables support for the Power Button LED of + Acer Iconia Tab A500. + comment "LED Triggers" source "drivers/leds/trigger/Kconfig" diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile index 778cb4bb8c52..73e603e1727e 100644 --- a/drivers/leds/Makefile +++ b/drivers/leds/Makefile @@ -10,6 +10,7 @@ obj-$(CONFIG_LEDS_TRIGGERS) += led-triggers.o # LED Platform Drivers (keep this sorted, M-| sort) obj-$(CONFIG_LEDS_88PM860X) += leds-88pm860x.o obj-$(CONFIG_LEDS_AAT1290) += leds-aat1290.o +obj-$(CONFIG_LEDS_ACER_A500) += leds-acer-a500.o obj-$(CONFIG_LEDS_ADP5520) += leds-adp5520.o obj-$(CONFIG_LEDS_AN30259A) += leds-an30259a.o obj-$(CONFIG_LEDS_APU) += leds-apu.o diff --git a/drivers/leds/leds-acer-a500.c b/drivers/leds/leds-acer-a500.c new file mode 100644 index 000000000000..8cf0b11f4390 --- /dev/null +++ b/drivers/leds/leds-acer-a500.c @@ -0,0 +1,129 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include +#include +#include +#include + +#define A500_EC_LED_DELAY_USEC (100 * 1000) + +enum { + REG_RESET_LEDS = 0x40, + REG_POWER_LED_ON = 0x42, + REG_CHARGE_LED_ON = 0x43, + REG_ANDROID_LEDS_OFF = 0x5a, +}; + +struct a500_led { + struct led_classdev cdev; + const struct reg_sequence *enable_seq; + struct a500_led *other; + struct regmap *rmap; +}; + +static const struct reg_sequence a500_ec_leds_reset_seq[] = { + REG_SEQ(REG_RESET_LEDS, 0x0, A500_EC_LED_DELAY_USEC), + REG_SEQ(REG_ANDROID_LEDS_OFF, 0x0, A500_EC_LED_DELAY_USEC), +}; + +static const struct reg_sequence a500_ec_white_led_enable_seq[] = { + REG_SEQ(REG_POWER_LED_ON, 0x0, A500_EC_LED_DELAY_USEC), +}; + +static const struct reg_sequence a500_ec_orange_led_enable_seq[] = { + REG_SEQ(REG_CHARGE_LED_ON, 0x0, A500_EC_LED_DELAY_USEC), +}; + +static int a500_ec_led_brightness_set(struct led_classdev *led_cdev, + enum led_brightness value) +{ + struct a500_led *led = container_of(led_cdev, struct a500_led, cdev); + struct reg_sequence control_seq[2]; + unsigned int num_regs = 1; + + if (value) { + control_seq[0] = led->enable_seq[0]; + } else { + /* + * There is no separate controls which can disable LEDs + * individually, there is only RESET_LEDS command that turns + * off both LEDs. + * + * RESET_LEDS turns off both LEDs, thus restore other LED if + * it's turned ON. + */ + if (led->other->cdev.brightness) + num_regs = 2; + + control_seq[0] = a500_ec_leds_reset_seq[0]; + control_seq[1] = led->other->enable_seq[0]; + } + + return regmap_multi_reg_write(led->rmap, control_seq, num_regs); +} + +static int a500_ec_leds_probe(struct platform_device *pdev) +{ + struct a500_led *white_led, *orange_led; + struct regmap *rmap; + int err; + + rmap = dev_get_regmap(pdev->dev.parent, "KB930"); + if (!rmap) + return -EINVAL; + + /* reset and turn off LEDs */ + regmap_multi_reg_write(rmap, a500_ec_leds_reset_seq, 2); + + white_led = devm_kzalloc(&pdev->dev, sizeof(*white_led), GFP_KERNEL); + if (!white_led) + return -ENOMEM; + + white_led->cdev.name = "power:white"; + white_led->cdev.brightness_set_blocking = a500_ec_led_brightness_set; + white_led->cdev.flags = LED_CORE_SUSPENDRESUME; + white_led->cdev.max_brightness = 1; + white_led->enable_seq = a500_ec_white_led_enable_seq; + white_led->rmap = rmap; + + orange_led = devm_kzalloc(&pdev->dev, sizeof(*orange_led), GFP_KERNEL); + if (!orange_led) + return -ENOMEM; + + orange_led->cdev.name = "power:orange"; + orange_led->cdev.brightness_set_blocking = a500_ec_led_brightness_set; + orange_led->cdev.flags = LED_CORE_SUSPENDRESUME; + orange_led->cdev.max_brightness = 1; + orange_led->enable_seq = a500_ec_orange_led_enable_seq; + orange_led->rmap = rmap; + + white_led->other = orange_led; + orange_led->other = white_led; + + err = devm_led_classdev_register(&pdev->dev, &white_led->cdev); + if (err) { + dev_err(&pdev->dev, "failed to register white LED\n"); + return err; + } + + err = devm_led_classdev_register(&pdev->dev, &orange_led->cdev); + if (err) { + dev_err(&pdev->dev, "failed to register orange LED\n"); + return err; + } + + return 0; +} + +static struct platform_driver a500_ec_leds_driver = { + .driver = { + .name = "acer-a500-iconia-leds", + }, + .probe = a500_ec_leds_probe, +}; +module_platform_driver(a500_ec_leds_driver); + +MODULE_DESCRIPTION("LED driver for Acer Iconia Tab A500 Power Button"); +MODULE_AUTHOR("Dmitry Osipenko "); +MODULE_ALIAS("platform:acer-a500-iconia-leds"); +MODULE_LICENSE("GPL"); From d3ab963cf980151f5f0ba16d842ddc80b232d9c0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Sat, 19 Sep 2020 20:02:56 +0200 Subject: [PATCH 257/433] leds: lm36274: cosmetic: rename lm36274_data to chip MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Rename this variable so that it is easier to read and easier to write in 80 columns. Also rename variable of this type in lm36274_brightness_set from led to chip, to be consistent. Signed-off-by: Marek Behún Tested-by: Dan Murphy Signed-off-by: Pavel Machek --- drivers/leds/leds-lm36274.c | 82 ++++++++++++++++++------------------- 1 file changed, 40 insertions(+), 42 deletions(-) diff --git a/drivers/leds/leds-lm36274.c b/drivers/leds/leds-lm36274.c index bfeee03a0053..4a9f786bb972 100644 --- a/drivers/leds/leds-lm36274.c +++ b/drivers/leds/leds-lm36274.c @@ -41,37 +41,36 @@ struct lm36274 { }; static int lm36274_brightness_set(struct led_classdev *led_cdev, - enum led_brightness brt_val) + enum led_brightness brt_val) { - struct lm36274 *led = container_of(led_cdev, struct lm36274, led_dev); + struct lm36274 *chip = container_of(led_cdev, struct lm36274, led_dev); - return ti_lmu_common_set_brightness(&led->lmu_data, brt_val); + return ti_lmu_common_set_brightness(&chip->lmu_data, brt_val); } -static int lm36274_init(struct lm36274 *lm36274_data) +static int lm36274_init(struct lm36274 *chip) { int enable_val = 0; int i; - for (i = 0; i < lm36274_data->num_leds; i++) - enable_val |= (1 << lm36274_data->led_sources[i]); + for (i = 0; i < chip->num_leds; i++) + enable_val |= (1 << chip->led_sources[i]); if (!enable_val) { - dev_err(lm36274_data->dev, "No LEDs were enabled\n"); + dev_err(chip->dev, "No LEDs were enabled\n"); return -EINVAL; } enable_val |= LM36274_BL_EN; - return regmap_write(lm36274_data->regmap, LM36274_REG_BL_EN, - enable_val); + return regmap_write(chip->regmap, LM36274_REG_BL_EN, enable_val); } -static int lm36274_parse_dt(struct lm36274 *lm36274_data) +static int lm36274_parse_dt(struct lm36274 *chip) { struct fwnode_handle *child = NULL; char label[LED_MAX_NAME_SIZE]; - struct device *dev = &lm36274_data->pdev->dev; + struct device *dev = &chip->pdev->dev; const char *name; int child_cnt; int ret = -EINVAL; @@ -84,37 +83,37 @@ static int lm36274_parse_dt(struct lm36274 *lm36274_data) device_for_each_child_node(dev, child) { ret = fwnode_property_read_string(child, "label", &name); if (ret) - snprintf(label, sizeof(label), - "%s::", lm36274_data->pdev->name); + snprintf(label, sizeof(label), "%s::", + chip->pdev->name); else - snprintf(label, sizeof(label), - "%s:%s", lm36274_data->pdev->name, name); + snprintf(label, sizeof(label), "%s:%s", + chip->pdev->name, name); - lm36274_data->num_leds = fwnode_property_count_u32(child, "led-sources"); - if (lm36274_data->num_leds <= 0) + chip->num_leds = fwnode_property_count_u32(child, "led-sources"); + if (chip->num_leds <= 0) return -ENODEV; ret = fwnode_property_read_u32_array(child, "led-sources", - lm36274_data->led_sources, - lm36274_data->num_leds); + chip->led_sources, + chip->num_leds); if (ret) { dev_err(dev, "led-sources property missing\n"); return ret; } fwnode_property_read_string(child, "linux,default-trigger", - &lm36274_data->led_dev.default_trigger); + &chip->led_dev.default_trigger); } - lm36274_data->lmu_data.regmap = lm36274_data->regmap; - lm36274_data->lmu_data.max_brightness = MAX_BRIGHTNESS_11BIT; - lm36274_data->lmu_data.msb_brightness_reg = LM36274_REG_BRT_MSB; - lm36274_data->lmu_data.lsb_brightness_reg = LM36274_REG_BRT_LSB; + chip->lmu_data.regmap = chip->regmap; + chip->lmu_data.max_brightness = MAX_BRIGHTNESS_11BIT; + chip->lmu_data.msb_brightness_reg = LM36274_REG_BRT_MSB; + chip->lmu_data.lsb_brightness_reg = LM36274_REG_BRT_LSB; - lm36274_data->led_dev.name = label; - lm36274_data->led_dev.max_brightness = MAX_BRIGHTNESS_11BIT; - lm36274_data->led_dev.brightness_set_blocking = lm36274_brightness_set; + chip->led_dev.name = label; + chip->led_dev.max_brightness = MAX_BRIGHTNESS_11BIT; + chip->led_dev.brightness_set_blocking = lm36274_brightness_set; return 0; } @@ -122,39 +121,38 @@ static int lm36274_parse_dt(struct lm36274 *lm36274_data) static int lm36274_probe(struct platform_device *pdev) { struct ti_lmu *lmu = dev_get_drvdata(pdev->dev.parent); - struct lm36274 *lm36274_data; + struct lm36274 *chip; int ret; - lm36274_data = devm_kzalloc(&pdev->dev, sizeof(*lm36274_data), - GFP_KERNEL); - if (!lm36274_data) + chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL); + if (!chip) return -ENOMEM; - lm36274_data->pdev = pdev; - lm36274_data->dev = lmu->dev; - lm36274_data->regmap = lmu->regmap; - platform_set_drvdata(pdev, lm36274_data); + chip->pdev = pdev; + chip->dev = lmu->dev; + chip->regmap = lmu->regmap; + platform_set_drvdata(pdev, chip); - ret = lm36274_parse_dt(lm36274_data); + ret = lm36274_parse_dt(chip); if (ret) { - dev_err(lm36274_data->dev, "Failed to parse DT node\n"); + dev_err(chip->dev, "Failed to parse DT node\n"); return ret; } - ret = lm36274_init(lm36274_data); + ret = lm36274_init(chip); if (ret) { - dev_err(lm36274_data->dev, "Failed to init the device\n"); + dev_err(chip->dev, "Failed to init the device\n"); return ret; } - return led_classdev_register(lm36274_data->dev, &lm36274_data->led_dev); + return led_classdev_register(chip->dev, &chip->led_dev); } static int lm36274_remove(struct platform_device *pdev) { - struct lm36274 *lm36274_data = platform_get_drvdata(pdev); + struct lm36274 *chip = platform_get_drvdata(pdev); - led_classdev_unregister(&lm36274_data->led_dev); + led_classdev_unregister(&chip->led_dev); return 0; } From a448fcf19c9c5d3ddd9066accbd8d28c4950bb9f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Sat, 19 Sep 2020 20:02:57 +0200 Subject: [PATCH 258/433] leds: lm36274: don't iterate through children since there is only one MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Do not use device_for_each_child_node. Since this driver works only with once child node present, use device_get_next_child_node instead. This also saves one level of indentation. Signed-off-by: Marek Behún Reviewed-by: Dan Murphy Tested-by: Dan Murphy Signed-off-by: Pavel Machek --- drivers/leds/leds-lm36274.c | 46 +++++++++++++++++-------------------- 1 file changed, 21 insertions(+), 25 deletions(-) diff --git a/drivers/leds/leds-lm36274.c b/drivers/leds/leds-lm36274.c index 4a9f786bb972..e0fce74a7667 100644 --- a/drivers/leds/leds-lm36274.c +++ b/drivers/leds/leds-lm36274.c @@ -72,40 +72,36 @@ static int lm36274_parse_dt(struct lm36274 *chip) char label[LED_MAX_NAME_SIZE]; struct device *dev = &chip->pdev->dev; const char *name; - int child_cnt; - int ret = -EINVAL; + int ret; /* There should only be 1 node */ - child_cnt = device_get_child_node_count(dev); - if (child_cnt != 1) + if (device_get_child_node_count(dev) != 1) return -EINVAL; - device_for_each_child_node(dev, child) { - ret = fwnode_property_read_string(child, "label", &name); - if (ret) - snprintf(label, sizeof(label), "%s::", - chip->pdev->name); - else - snprintf(label, sizeof(label), "%s:%s", - chip->pdev->name, name); + child = device_get_next_child_node(dev, NULL); - chip->num_leds = fwnode_property_count_u32(child, "led-sources"); - if (chip->num_leds <= 0) - return -ENODEV; + ret = fwnode_property_read_string(child, "label", &name); + if (ret) + snprintf(label, sizeof(label), "%s::", chip->pdev->name); + else + snprintf(label, sizeof(label), "%s:%s", chip->pdev->name, name); - ret = fwnode_property_read_u32_array(child, "led-sources", - chip->led_sources, - chip->num_leds); - if (ret) { - dev_err(dev, "led-sources property missing\n"); - return ret; - } - - fwnode_property_read_string(child, "linux,default-trigger", - &chip->led_dev.default_trigger); + chip->num_leds = fwnode_property_count_u32(child, "led-sources"); + if (chip->num_leds <= 0) + return -ENODEV; + ret = fwnode_property_read_u32_array(child, "led-sources", + chip->led_sources, chip->num_leds); + if (ret) { + dev_err(dev, "led-sources property missing\n"); + return ret; } + fwnode_property_read_string(child, "linux,default-trigger", + &chip->led_dev.default_trigger); + + fwnode_handle_put(child); + chip->lmu_data.regmap = chip->regmap; chip->lmu_data.max_brightness = MAX_BRIGHTNESS_11BIT; chip->lmu_data.msb_brightness_reg = LM36274_REG_BRT_MSB; From 1aeef38c6a4a87d04bf5fc596dbf91a15525c987 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Sat, 19 Sep 2020 20:02:58 +0200 Subject: [PATCH 259/433] leds: lm36274: use struct led_init_data when registering MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit By using struct led_init_data when registering we do not need to parse `label` DT property. Moreover `label` is deprecated and if it is not present but `color` and `function` are, LED core will compose a name from these properties instead. Previously if the `label` DT property was not present, the code composed name for the LED in the form "parent_name::" For backwards compatibility we therefore set init_data->default_label = ":"; so that the LED will not get a different name if `label` property is not present, nor are `color` and `function`. Signed-off-by: Marek Behún Tested-by: Dan Murphy Signed-off-by: Pavel Machek --- drivers/leds/leds-lm36274.c | 42 ++++++++++++++++++++++--------------- 1 file changed, 25 insertions(+), 17 deletions(-) diff --git a/drivers/leds/leds-lm36274.c b/drivers/leds/leds-lm36274.c index e0fce74a7667..ee4f90f04f19 100644 --- a/drivers/leds/leds-lm36274.c +++ b/drivers/leds/leds-lm36274.c @@ -66,12 +66,11 @@ static int lm36274_init(struct lm36274 *chip) return regmap_write(chip->regmap, LM36274_REG_BL_EN, enable_val); } -static int lm36274_parse_dt(struct lm36274 *chip) +static int lm36274_parse_dt(struct lm36274 *chip, + struct led_init_data *init_data) { - struct fwnode_handle *child = NULL; - char label[LED_MAX_NAME_SIZE]; struct device *dev = &chip->pdev->dev; - const char *name; + struct fwnode_handle *child; int ret; /* There should only be 1 node */ @@ -80,43 +79,45 @@ static int lm36274_parse_dt(struct lm36274 *chip) child = device_get_next_child_node(dev, NULL); - ret = fwnode_property_read_string(child, "label", &name); - if (ret) - snprintf(label, sizeof(label), "%s::", chip->pdev->name); - else - snprintf(label, sizeof(label), "%s:%s", chip->pdev->name, name); + init_data->fwnode = child; + init_data->devicename = chip->pdev->name; + /* for backwards compatibility when `label` property is not present */ + init_data->default_label = ":"; chip->num_leds = fwnode_property_count_u32(child, "led-sources"); - if (chip->num_leds <= 0) - return -ENODEV; + if (chip->num_leds <= 0) { + ret = -ENODEV; + goto err; + } ret = fwnode_property_read_u32_array(child, "led-sources", chip->led_sources, chip->num_leds); if (ret) { dev_err(dev, "led-sources property missing\n"); - return ret; + goto err; } fwnode_property_read_string(child, "linux,default-trigger", &chip->led_dev.default_trigger); - fwnode_handle_put(child); - chip->lmu_data.regmap = chip->regmap; chip->lmu_data.max_brightness = MAX_BRIGHTNESS_11BIT; chip->lmu_data.msb_brightness_reg = LM36274_REG_BRT_MSB; chip->lmu_data.lsb_brightness_reg = LM36274_REG_BRT_LSB; - chip->led_dev.name = label; chip->led_dev.max_brightness = MAX_BRIGHTNESS_11BIT; chip->led_dev.brightness_set_blocking = lm36274_brightness_set; return 0; +err: + fwnode_handle_put(child); + return ret; } static int lm36274_probe(struct platform_device *pdev) { struct ti_lmu *lmu = dev_get_drvdata(pdev->dev.parent); + struct led_init_data init_data = {}; struct lm36274 *chip; int ret; @@ -129,7 +130,7 @@ static int lm36274_probe(struct platform_device *pdev) chip->regmap = lmu->regmap; platform_set_drvdata(pdev, chip); - ret = lm36274_parse_dt(chip); + ret = lm36274_parse_dt(chip, &init_data); if (ret) { dev_err(chip->dev, "Failed to parse DT node\n"); return ret; @@ -141,7 +142,14 @@ static int lm36274_probe(struct platform_device *pdev) return ret; } - return led_classdev_register(chip->dev, &chip->led_dev); + ret = led_classdev_register_ext(chip->dev, &chip->led_dev, &init_data); + if (ret) + dev_err(chip->dev, "Failed to register LED for node %pfw\n", + init_data.fwnode); + + fwnode_handle_put(init_data.fwnode); + + return ret; } static int lm36274_remove(struct platform_device *pdev) From 484456712de44c516b016b23027ad500acac4d29 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Sat, 19 Sep 2020 20:02:59 +0200 Subject: [PATCH 260/433] leds: lm36274: do not set chip settings in DT parsing function MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit These settings are not parsed from DT and therefore semantically should not be set in function with a name lm36274_parse_dt. Signed-off-by: Marek Behún Tested-by: Dan Murphy Signed-off-by: Pavel Machek --- drivers/leds/leds-lm36274.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/leds/leds-lm36274.c b/drivers/leds/leds-lm36274.c index ee4f90f04f19..85a58a5cbdf9 100644 --- a/drivers/leds/leds-lm36274.c +++ b/drivers/leds/leds-lm36274.c @@ -100,14 +100,6 @@ static int lm36274_parse_dt(struct lm36274 *chip, fwnode_property_read_string(child, "linux,default-trigger", &chip->led_dev.default_trigger); - chip->lmu_data.regmap = chip->regmap; - chip->lmu_data.max_brightness = MAX_BRIGHTNESS_11BIT; - chip->lmu_data.msb_brightness_reg = LM36274_REG_BRT_MSB; - chip->lmu_data.lsb_brightness_reg = LM36274_REG_BRT_LSB; - - chip->led_dev.max_brightness = MAX_BRIGHTNESS_11BIT; - chip->led_dev.brightness_set_blocking = lm36274_brightness_set; - return 0; err: fwnode_handle_put(child); @@ -142,6 +134,14 @@ static int lm36274_probe(struct platform_device *pdev) return ret; } + chip->lmu_data.regmap = chip->regmap; + chip->lmu_data.max_brightness = MAX_BRIGHTNESS_11BIT; + chip->lmu_data.msb_brightness_reg = LM36274_REG_BRT_MSB; + chip->lmu_data.lsb_brightness_reg = LM36274_REG_BRT_LSB; + + chip->led_dev.max_brightness = MAX_BRIGHTNESS_11BIT; + chip->led_dev.brightness_set_blocking = lm36274_brightness_set; + ret = led_classdev_register_ext(chip->dev, &chip->led_dev, &init_data); if (ret) dev_err(chip->dev, "Failed to register LED for node %pfw\n", From 5c0d20a968ae878ccdb2a42a0438610cf02cff13 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Sat, 19 Sep 2020 20:03:00 +0200 Subject: [PATCH 261/433] leds: lm36274: use platform device as parent of LED MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Instead of registering LED under the MFD device, this driver sets the parent of the LED it is registering to the parent of the MFD device (the I2C client device). Because of this we cannot use devres for LED registration, since it can result in use-after-free, see commit a0972fff0947 ("leds: lm36274: fix use-after-free on unbind"). The only other in-tree driver that also registers under the MFD device (drivers/regulator/lm363x-regulator.c) sets the parent to the MFD device. Set the parent of this LED to the MFD device, instead of the I2C client device. Signed-off-by: Marek Behún Tested-by: Dan Murphy Signed-off-by: Pavel Machek --- drivers/leds/leds-lm36274.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/leds/leds-lm36274.c b/drivers/leds/leds-lm36274.c index 85a58a5cbdf9..74c236d1a60c 100644 --- a/drivers/leds/leds-lm36274.c +++ b/drivers/leds/leds-lm36274.c @@ -69,7 +69,7 @@ static int lm36274_init(struct lm36274 *chip) static int lm36274_parse_dt(struct lm36274 *chip, struct led_init_data *init_data) { - struct device *dev = &chip->pdev->dev; + struct device *dev = chip->dev; struct fwnode_handle *child; int ret; @@ -118,7 +118,7 @@ static int lm36274_probe(struct platform_device *pdev) return -ENOMEM; chip->pdev = pdev; - chip->dev = lmu->dev; + chip->dev = &pdev->dev; chip->regmap = lmu->regmap; platform_set_drvdata(pdev, chip); From 60bbd9d411e32328dbecaff9ec5dfab29b546aba Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Sat, 19 Sep 2020 20:03:01 +0200 Subject: [PATCH 262/433] leds: lm36274: use devres LED registering function MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Now that the potential use-after-free issue is resolved we can use devres for LED registration in this driver. By using devres version of LED registering function we can remove the .remove method from this driver. Signed-off-by: Marek Behún Tested-by: Dan Murphy Signed-off-by: Pavel Machek --- drivers/leds/leds-lm36274.c | 13 ++----------- 1 file changed, 2 insertions(+), 11 deletions(-) diff --git a/drivers/leds/leds-lm36274.c b/drivers/leds/leds-lm36274.c index 74c236d1a60c..10a63b7f2ecc 100644 --- a/drivers/leds/leds-lm36274.c +++ b/drivers/leds/leds-lm36274.c @@ -142,7 +142,8 @@ static int lm36274_probe(struct platform_device *pdev) chip->led_dev.max_brightness = MAX_BRIGHTNESS_11BIT; chip->led_dev.brightness_set_blocking = lm36274_brightness_set; - ret = led_classdev_register_ext(chip->dev, &chip->led_dev, &init_data); + ret = devm_led_classdev_register_ext(chip->dev, &chip->led_dev, + &init_data); if (ret) dev_err(chip->dev, "Failed to register LED for node %pfw\n", init_data.fwnode); @@ -152,15 +153,6 @@ static int lm36274_probe(struct platform_device *pdev) return ret; } -static int lm36274_remove(struct platform_device *pdev) -{ - struct lm36274 *chip = platform_get_drvdata(pdev); - - led_classdev_unregister(&chip->led_dev); - - return 0; -} - static const struct of_device_id of_lm36274_leds_match[] = { { .compatible = "ti,lm36274-backlight", }, {}, @@ -169,7 +161,6 @@ MODULE_DEVICE_TABLE(of, of_lm36274_leds_match); static struct platform_driver lm36274_driver = { .probe = lm36274_probe, - .remove = lm36274_remove, .driver = { .name = "lm36274-leds", }, From 4b64c0510b66d3d779d1c195de1d5662bb28e948 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Sat, 19 Sep 2020 20:03:02 +0200 Subject: [PATCH 263/433] leds: lm3532: don't parse label DT property MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This driver uses extended LED registration, so we do not need to parse the `label` DT property on our own. Signed-off-by: Marek Behún Signed-off-by: Pavel Machek --- drivers/leds/leds-lm3532.c | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/drivers/leds/leds-lm3532.c b/drivers/leds/leds-lm3532.c index 946ad67eaecb..9b6973217cc0 100644 --- a/drivers/leds/leds-lm3532.c +++ b/drivers/leds/leds-lm3532.c @@ -129,7 +129,6 @@ struct lm3532_als_data { * @full_scale_current - The full-scale current setting for the current sink. * @led_strings - The LED strings supported in this array * @enabled - Enabled status - * @label - LED label */ struct lm3532_led { struct led_classdev led_dev; @@ -142,7 +141,6 @@ struct lm3532_led { int full_scale_current; unsigned int enabled:1; u32 led_strings[LM3532_MAX_CONTROL_BANKS]; - char label[LED_MAX_NAME_SIZE]; }; /** @@ -548,7 +546,6 @@ static int lm3532_parse_node(struct lm3532_data *priv) { struct fwnode_handle *child = NULL; struct lm3532_led *led; - const char *name; int control_bank; u32 ramp_time; size_t i = 0; @@ -646,16 +643,7 @@ static int lm3532_parse_node(struct lm3532_data *priv) fwnode_property_read_string(child, "linux,default-trigger", &led->led_dev.default_trigger); - ret = fwnode_property_read_string(child, "label", &name); - if (ret) - snprintf(led->label, sizeof(led->label), - "%s::", priv->client->name); - else - snprintf(led->label, sizeof(led->label), - "%s:%s", priv->client->name, name); - led->priv = priv; - led->led_dev.name = led->label; led->led_dev.brightness_set_blocking = lm3532_brightness_set; ret = devm_led_classdev_register_ext(priv->dev, &led->led_dev, &idata); From 006631969880fdc58a585d310c7e8d98dc648e47 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Sat, 19 Sep 2020 20:03:03 +0200 Subject: [PATCH 264/433] leds: syscon: use struct led_init_data when registering MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit By using struct led_init_data when registering we do not need to parse `label` DT property. Moreover `label` is deprecated and if it is not present but `color` and `function` are, LED core will compose a name from these properties instead. Signed-off-by: Marek Behún Cc: Linus Walleij Signed-off-by: Pavel Machek --- drivers/leds/leds-syscon.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/leds/leds-syscon.c b/drivers/leds/leds-syscon.c index d7230da81543..f54935fa650a 100644 --- a/drivers/leds/leds-syscon.c +++ b/drivers/leds/leds-syscon.c @@ -55,6 +55,7 @@ static void syscon_led_set(struct led_classdev *led_cdev, static int syscon_led_probe(struct platform_device *pdev) { + struct led_init_data init_data = {}; struct device *dev = &pdev->dev; struct device_node *np = dev_of_node(dev); struct device *parent; @@ -84,8 +85,6 @@ static int syscon_led_probe(struct platform_device *pdev) return -EINVAL; if (of_property_read_u32(np, "mask", &sled->mask)) return -EINVAL; - sled->cdev.name = - of_get_property(np, "label", NULL) ? : np->name; sled->cdev.default_trigger = of_get_property(np, "linux,default-trigger", NULL); @@ -115,7 +114,9 @@ static int syscon_led_probe(struct platform_device *pdev) } sled->cdev.brightness_set = syscon_led_set; - ret = devm_led_classdev_register(dev, &sled->cdev); + init_data.fwnode = of_fwnode_handle(np); + + ret = devm_led_classdev_register_ext(dev, &sled->cdev, &init_data); if (ret < 0) return ret; From c49d6cab0d7fde39297949c4da257db69999292e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Sat, 19 Sep 2020 20:03:04 +0200 Subject: [PATCH 265/433] leds: parse linux,default-trigger DT property in LED core MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Do the parsing of `linux,default-trigger` DT property to LED core. Currently it is done in many different drivers and the code is repeated. This patch removes the parsing from 23 drivers: an30259a, aw2013, bcm6328, bcm6358, cr0014114, el15203000, gpio, is31fl32xx, lm3532, lm36274, lm3692x, lm3697, lp50xx, lp8860, lt3593, max77650, mt6323, ns2, pm8058, pwm, syscon, tlc591xx and turris-omnia. There is one driver in drivers/input which parses this property on it's own. I shall send a separate patch there after this is applied. There are still 8 drivers that parse this property on their own because they do not pass the led_init_data structure to the registering function. I will try to refactor those in the future. Signed-off-by: Marek Behún Signed-off-by: Pavel Machek --- drivers/leds/led-class.c | 5 +++++ drivers/leds/leds-an30259a.c | 3 --- drivers/leds/leds-aw2013.c | 3 --- drivers/leds/leds-bcm6328.c | 4 ---- drivers/leds/leds-bcm6358.c | 4 ---- drivers/leds/leds-cr0014114.c | 3 --- drivers/leds/leds-el15203000.c | 3 --- drivers/leds/leds-gpio.c | 3 --- drivers/leds/leds-is31fl32xx.c | 3 --- drivers/leds/leds-lm3532.c | 3 --- drivers/leds/leds-lm36274.c | 3 --- drivers/leds/leds-lm3692x.c | 3 --- drivers/leds/leds-lm3697.c | 3 --- drivers/leds/leds-lp50xx.c | 3 --- drivers/leds/leds-lp8860.c | 4 ---- drivers/leds/leds-lt3593.c | 3 --- drivers/leds/leds-max77650.c | 3 --- drivers/leds/leds-mt6323.c | 4 ---- drivers/leds/leds-ns2.c | 3 --- drivers/leds/leds-pm8058.c | 2 -- drivers/leds/leds-pwm.c | 5 ----- drivers/leds/leds-syscon.c | 2 -- drivers/leds/leds-tlc591xx.c | 3 --- drivers/leds/leds-turris-omnia.c | 2 -- 24 files changed, 5 insertions(+), 72 deletions(-) diff --git a/drivers/leds/led-class.c b/drivers/leds/led-class.c index cc3929f858b6..131ca83f5fb3 100644 --- a/drivers/leds/led-class.c +++ b/drivers/leds/led-class.c @@ -354,6 +354,11 @@ int led_classdev_register_ext(struct device *parent, ret = led_compose_name(parent, init_data, composed_name); if (ret < 0) return ret; + + if (init_data->fwnode) + fwnode_property_read_string(init_data->fwnode, + "linux,default-trigger", + &led_cdev->default_trigger); } else { proposed_name = led_cdev->name; } diff --git a/drivers/leds/leds-an30259a.c b/drivers/leds/leds-an30259a.c index 9749f1cc3e15..a0df1fb28774 100644 --- a/drivers/leds/leds-an30259a.c +++ b/drivers/leds/leds-an30259a.c @@ -238,9 +238,6 @@ static int an30259a_dt_init(struct i2c_client *client, led->default_state = STATE_OFF; } - of_property_read_string(child, "linux,default-trigger", - &led->cdev.default_trigger); - i++; } diff --git a/drivers/leds/leds-aw2013.c b/drivers/leds/leds-aw2013.c index 927c5ba32592..80d937454aee 100644 --- a/drivers/leds/leds-aw2013.c +++ b/drivers/leds/leds-aw2013.c @@ -297,9 +297,6 @@ static int aw2013_probe_dt(struct aw2013 *chip) "DT property led-max-microamp is missing\n"); } - of_property_read_string(child, "linux,default-trigger", - &led->cdev.default_trigger); - led->cdev.brightness_set_blocking = aw2013_brightness_set; led->cdev.blink_set = aw2013_blink_set; diff --git a/drivers/leds/leds-bcm6328.c b/drivers/leds/leds-bcm6328.c index d79aeb956c9b..226d17d253ed 100644 --- a/drivers/leds/leds-bcm6328.c +++ b/drivers/leds/leds-bcm6328.c @@ -346,10 +346,6 @@ static int bcm6328_led(struct device *dev, struct device_node *nc, u32 reg, if (of_property_read_bool(nc, "active-low")) led->active_low = true; - led->cdev.default_trigger = of_get_property(nc, - "linux,default-trigger", - NULL); - if (!of_property_read_string(nc, "default-state", &state)) { if (!strcmp(state, "on")) { led->cdev.brightness = LED_FULL; diff --git a/drivers/leds/leds-bcm6358.c b/drivers/leds/leds-bcm6358.c index 0fd495103a4d..9d2e487fa08a 100644 --- a/drivers/leds/leds-bcm6358.c +++ b/drivers/leds/leds-bcm6358.c @@ -110,10 +110,6 @@ static int bcm6358_led(struct device *dev, struct device_node *nc, u32 reg, if (of_property_read_bool(nc, "active-low")) led->active_low = true; - led->cdev.default_trigger = of_get_property(nc, - "linux,default-trigger", - NULL); - if (!of_property_read_string(nc, "default-state", &state)) { if (!strcmp(state, "on")) { led->cdev.brightness = LED_FULL; diff --git a/drivers/leds/leds-cr0014114.c b/drivers/leds/leds-cr0014114.c index 2da448ae718e..d03cfd3c0bfb 100644 --- a/drivers/leds/leds-cr0014114.c +++ b/drivers/leds/leds-cr0014114.c @@ -188,9 +188,6 @@ static int cr0014114_probe_dt(struct cr0014114 *priv) device_for_each_child_node(priv->dev, child) { led = &priv->leds[i]; - fwnode_property_read_string(child, "linux,default-trigger", - &led->ldev.default_trigger); - led->priv = priv; led->ldev.max_brightness = CR_MAX_BRIGHTNESS; led->ldev.brightness_set_blocking = cr0014114_set_sync; diff --git a/drivers/leds/leds-el15203000.c b/drivers/leds/leds-el15203000.c index 298b13e4807a..6ca47f2a2004 100644 --- a/drivers/leds/leds-el15203000.c +++ b/drivers/leds/leds-el15203000.c @@ -263,9 +263,6 @@ static int el15203000_probe_dt(struct el15203000 *priv) return -EINVAL; } - fwnode_property_read_string(child, "linux,default-trigger", - &led->ldev.default_trigger); - led->priv = priv; led->ldev.max_brightness = LED_ON; led->ldev.brightness_set_blocking = el15203000_set_blocking; diff --git a/drivers/leds/leds-gpio.c b/drivers/leds/leds-gpio.c index cf84096d88ce..93f5b1b60fde 100644 --- a/drivers/leds/leds-gpio.c +++ b/drivers/leds/leds-gpio.c @@ -160,9 +160,6 @@ static struct gpio_leds_priv *gpio_leds_create(struct platform_device *pdev) led_dat->gpiod = led.gpiod; - fwnode_property_read_string(child, "linux,default-trigger", - &led.default_trigger); - if (!fwnode_property_read_string(child, "default-state", &state)) { if (!strcmp(state, "keep")) diff --git a/drivers/leds/leds-is31fl32xx.c b/drivers/leds/leds-is31fl32xx.c index ea589d1a8954..2180255ad339 100644 --- a/drivers/leds/leds-is31fl32xx.c +++ b/drivers/leds/leds-is31fl32xx.c @@ -341,9 +341,6 @@ static int is31fl32xx_parse_child_dt(const struct device *dev, } led_data->channel = reg; - of_property_read_string(child, "linux,default-trigger", - &cdev->default_trigger); - cdev->brightness_set_blocking = is31fl32xx_brightness_set; return 0; diff --git a/drivers/leds/leds-lm3532.c b/drivers/leds/leds-lm3532.c index 9b6973217cc0..10ded9192fb1 100644 --- a/drivers/leds/leds-lm3532.c +++ b/drivers/leds/leds-lm3532.c @@ -640,9 +640,6 @@ static int lm3532_parse_node(struct lm3532_data *priv) goto child_out; } - fwnode_property_read_string(child, "linux,default-trigger", - &led->led_dev.default_trigger); - led->priv = priv; led->led_dev.brightness_set_blocking = lm3532_brightness_set; diff --git a/drivers/leds/leds-lm36274.c b/drivers/leds/leds-lm36274.c index 10a63b7f2ecc..582c6a821dc8 100644 --- a/drivers/leds/leds-lm36274.c +++ b/drivers/leds/leds-lm36274.c @@ -97,9 +97,6 @@ static int lm36274_parse_dt(struct lm36274 *chip, goto err; } - fwnode_property_read_string(child, "linux,default-trigger", - &chip->led_dev.default_trigger); - return 0; err: fwnode_handle_put(child); diff --git a/drivers/leds/leds-lm3692x.c b/drivers/leds/leds-lm3692x.c index 1d7ea1b76a12..e945de45388c 100644 --- a/drivers/leds/leds-lm3692x.c +++ b/drivers/leds/leds-lm3692x.c @@ -433,9 +433,6 @@ static int lm3692x_probe_dt(struct lm3692x_led *led) return -ENODEV; } - fwnode_property_read_string(child, "linux,default-trigger", - &led->led_dev.default_trigger); - ret = fwnode_property_read_u32(child, "reg", &led->led_enable); if (ret) { dev_err(&led->client->dev, "reg DT property missing\n"); diff --git a/drivers/leds/leds-lm3697.c b/drivers/leds/leds-lm3697.c index a7779ce931ab..64c0794801e6 100644 --- a/drivers/leds/leds-lm3697.c +++ b/drivers/leds/leds-lm3697.c @@ -268,9 +268,6 @@ static int lm3697_probe_dt(struct lm3697 *priv) if (ret) dev_warn(dev, "runtime-ramp properties missing\n"); - fwnode_property_read_string(child, "linux,default-trigger", - &led->led_dev.default_trigger); - init_data.fwnode = child; init_data.devicename = priv->client->name; /* for backwards compatibility if `label` is not present */ diff --git a/drivers/leds/leds-lp50xx.c b/drivers/leds/leds-lp50xx.c index 47144a37cb94..5fb4f24aeb2e 100644 --- a/drivers/leds/leds-lp50xx.c +++ b/drivers/leds/leds-lp50xx.c @@ -508,9 +508,6 @@ static int lp50xx_probe_dt(struct lp50xx *priv) led_cdev = &led->mc_cdev.led_cdev; led_cdev->brightness_set_blocking = lp50xx_brightness_set; - fwnode_property_read_string(child, "linux,default-trigger", - &led_cdev->default_trigger); - ret = devm_led_classdev_multicolor_register_ext(&priv->client->dev, &led->mc_cdev, &init_data); diff --git a/drivers/leds/leds-lp8860.c b/drivers/leds/leds-lp8860.c index e9b16f3358d6..f0533a337bc1 100644 --- a/drivers/leds/leds-lp8860.c +++ b/drivers/leds/leds-lp8860.c @@ -392,10 +392,6 @@ static int lp8860_probe(struct i2c_client *client, if (!child_node) return -EINVAL; - led->led_dev.default_trigger = of_get_property(child_node, - "linux,default-trigger", - NULL); - led->enable_gpio = devm_gpiod_get_optional(&client->dev, "enable", GPIOD_OUT_LOW); if (IS_ERR(led->enable_gpio)) { diff --git a/drivers/leds/leds-lt3593.c b/drivers/leds/leds-lt3593.c index 061f02e3995a..68e06434ac08 100644 --- a/drivers/leds/leds-lt3593.c +++ b/drivers/leds/leds-lt3593.c @@ -86,9 +86,6 @@ static int lt3593_led_probe(struct platform_device *pdev) child = device_get_next_child_node(dev, NULL); - fwnode_property_read_string(child, "linux,default-trigger", - &led_data->cdev.default_trigger); - if (!fwnode_property_read_string(child, "default-state", &tmp)) { if (!strcmp(tmp, "on")) state = LEDS_GPIO_DEFSTATE_ON; diff --git a/drivers/leds/leds-max77650.c b/drivers/leds/leds-max77650.c index acc1174197c3..1eeac56b0014 100644 --- a/drivers/leds/leds-max77650.c +++ b/drivers/leds/leds-max77650.c @@ -100,9 +100,6 @@ static int max77650_led_probe(struct platform_device *pdev) led->cdev.brightness_set_blocking = max77650_led_brightness_set; led->cdev.max_brightness = MAX77650_LED_MAX_BRIGHTNESS; - fwnode_property_read_string(child, "linux,default-trigger", - &led->cdev.default_trigger); - init_data.fwnode = child; init_data.devicename = "max77650"; /* for backwards compatibility if `label` is not present */ diff --git a/drivers/leds/leds-mt6323.c b/drivers/leds/leds-mt6323.c index a1fceeb41d7e..f59e0e8bda8b 100644 --- a/drivers/leds/leds-mt6323.c +++ b/drivers/leds/leds-mt6323.c @@ -342,10 +342,6 @@ static int mt6323_led_set_dt_default(struct led_classdev *cdev, const char *state; int ret = 0; - led->cdev.default_trigger = of_get_property(np, - "linux,default-trigger", - NULL); - state = of_get_property(np, "default-state", NULL); if (state) { if (!strcmp(state, "keep")) { diff --git a/drivers/leds/leds-ns2.c b/drivers/leds/leds-ns2.c index 030f426af3d7..e1ec5cbed07e 100644 --- a/drivers/leds/leds-ns2.c +++ b/drivers/leds/leds-ns2.c @@ -185,9 +185,6 @@ static int ns2_led_register(struct device *dev, struct device_node *np, if (IS_ERR(led->slow)) return PTR_ERR(led->slow); - of_property_read_string(np, "linux,default-trigger", - &led->cdev.default_trigger); - ret = of_property_count_u32_elems(np, "modes-map"); if (ret < 0 || ret % 3) { dev_err(dev, "Missing or malformed modes-map for %pOF\n", np); diff --git a/drivers/leds/leds-pm8058.c b/drivers/leds/leds-pm8058.c index 5247b04abb7e..fb2ab72c0c40 100644 --- a/drivers/leds/leds-pm8058.c +++ b/drivers/leds/leds-pm8058.c @@ -117,8 +117,6 @@ static int pm8058_led_probe(struct platform_device *pdev) return -EINVAL; } - led->cdev.default_trigger = - of_get_property(np, "linux,default-trigger", NULL); led->cdev.brightness_set = pm8058_led_set; led->cdev.brightness_get = pm8058_led_get; if (led->ledtype == PM8058_LED_TYPE_COMMON) diff --git a/drivers/leds/leds-pwm.c b/drivers/leds/leds-pwm.c index 4a014d296412..2a16ae0bf022 100644 --- a/drivers/leds/leds-pwm.c +++ b/drivers/leds/leds-pwm.c @@ -20,7 +20,6 @@ struct led_pwm { const char *name; - const char *default_trigger; u8 active_low; unsigned int max_brightness; }; @@ -70,7 +69,6 @@ static int led_pwm_add(struct device *dev, struct led_pwm_priv *priv, led_data->active_low = led->active_low; led_data->cdev.name = led->name; - led_data->cdev.default_trigger = led->default_trigger; led_data->cdev.brightness = LED_OFF; led_data->cdev.max_brightness = led->max_brightness; led_data->cdev.flags = LED_CORE_SUSPENDRESUME; @@ -124,9 +122,6 @@ static int led_pwm_create_fwnode(struct device *dev, struct led_pwm_priv *priv) return -EINVAL; } - fwnode_property_read_string(fwnode, "linux,default-trigger", - &led.default_trigger); - led.active_low = fwnode_property_read_bool(fwnode, "active-low"); fwnode_property_read_u32(fwnode, "max-brightness", diff --git a/drivers/leds/leds-syscon.c b/drivers/leds/leds-syscon.c index f54935fa650a..7eddb8ecb44e 100644 --- a/drivers/leds/leds-syscon.c +++ b/drivers/leds/leds-syscon.c @@ -85,8 +85,6 @@ static int syscon_led_probe(struct platform_device *pdev) return -EINVAL; if (of_property_read_u32(np, "mask", &sled->mask)) return -EINVAL; - sled->cdev.default_trigger = - of_get_property(np, "linux,default-trigger", NULL); state = of_get_property(np, "default-state", NULL); if (state) { diff --git a/drivers/leds/leds-tlc591xx.c b/drivers/leds/leds-tlc591xx.c index 5e84a0c7aacb..f24271337bd8 100644 --- a/drivers/leds/leds-tlc591xx.c +++ b/drivers/leds/leds-tlc591xx.c @@ -199,9 +199,6 @@ tlc591xx_probe(struct i2c_client *client, led = &priv->leds[reg]; led->active = true; - led->ldev.default_trigger = - of_get_property(child, "linux,default-trigger", NULL); - led->priv = priv; led->led_no = reg; led->ldev.brightness_set_blocking = tlc591xx_brightness_set; diff --git a/drivers/leds/leds-turris-omnia.c b/drivers/leds/leds-turris-omnia.c index 117976cf75c8..8c5bdc3847ee 100644 --- a/drivers/leds/leds-turris-omnia.c +++ b/drivers/leds/leds-turris-omnia.c @@ -121,8 +121,6 @@ static int omnia_led_register(struct i2c_client *client, struct omnia_led *led, cdev->max_brightness = 255; cdev->brightness_set_blocking = omnia_led_brightness_set_blocking; - of_property_read_string(np, "linux,default-trigger", &cdev->default_trigger); - /* put the LED into software mode */ ret = i2c_smbus_write_byte_data(client, CMD_LED_MODE, CMD_LED_MODE_LED(led->reg) | From 3c41f0609e63dbef49435263198cb8b5c5d9dede Mon Sep 17 00:00:00 2001 From: Fabien Parent Date: Mon, 7 Sep 2020 13:02:20 +0200 Subject: [PATCH 266/433] pinctrl: mt65xx: add OF bindings for MT8167 Add binding documentation of pinctrl-mt65xx for MT8167 SoC. Signed-off-by: Fabien Parent Acked-by: Rob Herring Link: https://lore.kernel.org/r/20200907110221.1691168-1-fparent@baylibre.com Signed-off-by: Linus Walleij --- Documentation/devicetree/bindings/pinctrl/pinctrl-mt65xx.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt65xx.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt65xx.txt index 205be98ae078..931a18cd1e23 100644 --- a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt65xx.txt +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt65xx.txt @@ -10,6 +10,7 @@ Required properties: "mediatek,mt7623-pinctrl", compatible with mt7623 pinctrl. "mediatek,mt8127-pinctrl", compatible with mt8127 pinctrl. "mediatek,mt8135-pinctrl", compatible with mt8135 pinctrl. + "mediatek,mt8167-pinctrl", compatible with mt8167 pinctrl. "mediatek,mt8173-pinctrl", compatible with mt8173 pinctrl. "mediatek,mt8516-pinctrl", compatible with mt8516 pinctrl. - pins-are-numbered: Specify the subnodes are using numbered pinmux to From 82d70627e94a04a8de0df5b9f417da3841effbd2 Mon Sep 17 00:00:00 2001 From: Fabien Parent Date: Mon, 7 Sep 2020 13:02:21 +0200 Subject: [PATCH 267/433] pinctrl: mediatek: Add MT8167 Pinctrl driver This commit adds the pinctrl driver for the MediaTek's MT8167 SoC. Signed-off-by: Fabien Parent Link: https://lore.kernel.org/r/20200907110221.1691168-2-fparent@baylibre.com Signed-off-by: Linus Walleij --- drivers/pinctrl/mediatek/Kconfig | 7 + drivers/pinctrl/mediatek/Makefile | 1 + drivers/pinctrl/mediatek/pinctrl-mt8167.c | 362 +++++ drivers/pinctrl/mediatek/pinctrl-mtk-mt8167.h | 1248 +++++++++++++++++ 4 files changed, 1618 insertions(+) create mode 100644 drivers/pinctrl/mediatek/pinctrl-mt8167.c create mode 100644 drivers/pinctrl/mediatek/pinctrl-mtk-mt8167.h diff --git a/drivers/pinctrl/mediatek/Kconfig b/drivers/pinctrl/mediatek/Kconfig index 7d336370d767..eef17f228669 100644 --- a/drivers/pinctrl/mediatek/Kconfig +++ b/drivers/pinctrl/mediatek/Kconfig @@ -119,6 +119,13 @@ config PINCTRL_MT7622 default ARM64 && ARCH_MEDIATEK select PINCTRL_MTK_MOORE +config PINCTRL_MT8167 + bool "Mediatek MT8167 pin control" + depends on OF + depends on ARM64 || COMPILE_TEST + default ARM64 && ARCH_MEDIATEK + select PINCTRL_MTK + config PINCTRL_MT8173 bool "Mediatek MT8173 pin control" depends on OF diff --git a/drivers/pinctrl/mediatek/Makefile b/drivers/pinctrl/mediatek/Makefile index 1966a5299da4..01218bf4dc30 100644 --- a/drivers/pinctrl/mediatek/Makefile +++ b/drivers/pinctrl/mediatek/Makefile @@ -17,6 +17,7 @@ obj-$(CONFIG_PINCTRL_MT6797) += pinctrl-mt6797.o obj-$(CONFIG_PINCTRL_MT7622) += pinctrl-mt7622.o obj-$(CONFIG_PINCTRL_MT7623) += pinctrl-mt7623.o obj-$(CONFIG_PINCTRL_MT7629) += pinctrl-mt7629.o +obj-$(CONFIG_PINCTRL_MT8167) += pinctrl-mt8167.o obj-$(CONFIG_PINCTRL_MT8173) += pinctrl-mt8173.o obj-$(CONFIG_PINCTRL_MT8183) += pinctrl-mt8183.o obj-$(CONFIG_PINCTRL_MT8192) += pinctrl-mt8192.o diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8167.c b/drivers/pinctrl/mediatek/pinctrl-mt8167.c new file mode 100644 index 000000000000..7b68886bad16 --- /dev/null +++ b/drivers/pinctrl/mediatek/pinctrl-mt8167.c @@ -0,0 +1,362 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2020 MediaTek Inc. + * Author: Min.Guo + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "pinctrl-mtk-common.h" +#include "pinctrl-mtk-mt8167.h" + +static const struct mtk_drv_group_desc mt8167_drv_grp[] = { + /* 0E4E8SR 4/8/12/16 */ + MTK_DRV_GRP(4, 16, 1, 2, 4), + /* 0E2E4SR 2/4/6/8 */ + MTK_DRV_GRP(2, 8, 1, 2, 2), + /* E8E4E2 2/4/6/8/10/12/14/16 */ + MTK_DRV_GRP(2, 16, 0, 2, 2) +}; + +static const struct mtk_pin_drv_grp mt8167_pin_drv[] = { + MTK_PIN_DRV_GRP(0, 0xd00, 0, 0), + MTK_PIN_DRV_GRP(1, 0xd00, 0, 0), + MTK_PIN_DRV_GRP(2, 0xd00, 0, 0), + MTK_PIN_DRV_GRP(3, 0xd00, 0, 0), + MTK_PIN_DRV_GRP(4, 0xd00, 0, 0), + + MTK_PIN_DRV_GRP(5, 0xd00, 4, 0), + MTK_PIN_DRV_GRP(6, 0xd00, 4, 0), + MTK_PIN_DRV_GRP(7, 0xd00, 4, 0), + MTK_PIN_DRV_GRP(8, 0xd00, 4, 0), + MTK_PIN_DRV_GRP(9, 0xd00, 4, 0), + MTK_PIN_DRV_GRP(10, 0xd00, 4, 0), + + MTK_PIN_DRV_GRP(11, 0xd00, 8, 0), + MTK_PIN_DRV_GRP(12, 0xd00, 8, 0), + MTK_PIN_DRV_GRP(13, 0xd00, 8, 0), + + MTK_PIN_DRV_GRP(14, 0xd00, 12, 2), + MTK_PIN_DRV_GRP(15, 0xd00, 12, 2), + MTK_PIN_DRV_GRP(16, 0xd00, 12, 2), + MTK_PIN_DRV_GRP(17, 0xd00, 12, 2), + + MTK_PIN_DRV_GRP(18, 0xd10, 0, 0), + MTK_PIN_DRV_GRP(19, 0xd10, 0, 0), + MTK_PIN_DRV_GRP(20, 0xd10, 0, 0), + + MTK_PIN_DRV_GRP(21, 0xd00, 12, 2), + MTK_PIN_DRV_GRP(22, 0xd00, 12, 2), + MTK_PIN_DRV_GRP(23, 0xd00, 12, 2), + + MTK_PIN_DRV_GRP(24, 0xd00, 8, 0), + MTK_PIN_DRV_GRP(25, 0xd00, 8, 0), + + MTK_PIN_DRV_GRP(26, 0xd10, 4, 1), + MTK_PIN_DRV_GRP(27, 0xd10, 4, 1), + MTK_PIN_DRV_GRP(28, 0xd10, 4, 1), + MTK_PIN_DRV_GRP(29, 0xd10, 4, 1), + MTK_PIN_DRV_GRP(30, 0xd10, 4, 1), + + MTK_PIN_DRV_GRP(31, 0xd10, 8, 1), + MTK_PIN_DRV_GRP(32, 0xd10, 8, 1), + MTK_PIN_DRV_GRP(33, 0xd10, 8, 1), + + MTK_PIN_DRV_GRP(34, 0xd10, 12, 0), + MTK_PIN_DRV_GRP(35, 0xd10, 12, 0), + + MTK_PIN_DRV_GRP(36, 0xd20, 0, 0), + MTK_PIN_DRV_GRP(37, 0xd20, 0, 0), + MTK_PIN_DRV_GRP(38, 0xd20, 0, 0), + MTK_PIN_DRV_GRP(39, 0xd20, 0, 0), + + MTK_PIN_DRV_GRP(40, 0xd20, 4, 1), + + MTK_PIN_DRV_GRP(41, 0xd20, 8, 1), + MTK_PIN_DRV_GRP(42, 0xd20, 8, 1), + MTK_PIN_DRV_GRP(43, 0xd20, 8, 1), + + MTK_PIN_DRV_GRP(44, 0xd20, 12, 1), + MTK_PIN_DRV_GRP(45, 0xd20, 12, 1), + MTK_PIN_DRV_GRP(46, 0xd20, 12, 1), + MTK_PIN_DRV_GRP(47, 0xd20, 12, 1), + + MTK_PIN_DRV_GRP(48, 0xd30, 0, 1), + MTK_PIN_DRV_GRP(49, 0xd30, 0, 1), + MTK_PIN_DRV_GRP(50, 0xd30, 0, 1), + MTK_PIN_DRV_GRP(51, 0xd30, 0, 1), + + MTK_PIN_DRV_GRP(54, 0xd30, 8, 1), + + MTK_PIN_DRV_GRP(55, 0xd30, 12, 1), + MTK_PIN_DRV_GRP(56, 0xd30, 12, 1), + MTK_PIN_DRV_GRP(57, 0xd30, 12, 1), + + MTK_PIN_DRV_GRP(62, 0xd40, 8, 1), + MTK_PIN_DRV_GRP(63, 0xd40, 8, 1), + MTK_PIN_DRV_GRP(64, 0xd40, 8, 1), + MTK_PIN_DRV_GRP(65, 0xd40, 8, 1), + MTK_PIN_DRV_GRP(66, 0xd40, 8, 1), + MTK_PIN_DRV_GRP(67, 0xd40, 8, 1), + + MTK_PIN_DRV_GRP(68, 0xd40, 12, 2), + + MTK_PIN_DRV_GRP(69, 0xd50, 0, 2), + + MTK_PIN_DRV_GRP(70, 0xd50, 4, 2), + MTK_PIN_DRV_GRP(71, 0xd50, 4, 2), + MTK_PIN_DRV_GRP(72, 0xd50, 4, 2), + MTK_PIN_DRV_GRP(73, 0xd50, 4, 2), + + MTK_PIN_DRV_GRP(100, 0xd50, 8, 1), + MTK_PIN_DRV_GRP(101, 0xd50, 8, 1), + MTK_PIN_DRV_GRP(102, 0xd50, 8, 1), + MTK_PIN_DRV_GRP(103, 0xd50, 8, 1), + + MTK_PIN_DRV_GRP(104, 0xd50, 12, 2), + + MTK_PIN_DRV_GRP(105, 0xd60, 0, 2), + + MTK_PIN_DRV_GRP(106, 0xd60, 4, 2), + MTK_PIN_DRV_GRP(107, 0xd60, 4, 2), + MTK_PIN_DRV_GRP(108, 0xd60, 4, 2), + MTK_PIN_DRV_GRP(109, 0xd60, 4, 2), + + MTK_PIN_DRV_GRP(110, 0xd70, 0, 2), + MTK_PIN_DRV_GRP(111, 0xd70, 0, 2), + MTK_PIN_DRV_GRP(112, 0xd70, 0, 2), + MTK_PIN_DRV_GRP(113, 0xd70, 0, 2), + + MTK_PIN_DRV_GRP(114, 0xd70, 4, 2), + + MTK_PIN_DRV_GRP(115, 0xd60, 12, 2), + + MTK_PIN_DRV_GRP(116, 0xd60, 8, 2), + + MTK_PIN_DRV_GRP(117, 0xd70, 0, 2), + MTK_PIN_DRV_GRP(118, 0xd70, 0, 2), + MTK_PIN_DRV_GRP(119, 0xd70, 0, 2), + MTK_PIN_DRV_GRP(120, 0xd70, 0, 2), +}; + +static const struct mtk_pin_spec_pupd_set_samereg mt8167_spec_pupd[] = { + MTK_PIN_PUPD_SPEC_SR(14, 0xe50, 14, 13, 12), + MTK_PIN_PUPD_SPEC_SR(15, 0xe60, 2, 1, 0), + MTK_PIN_PUPD_SPEC_SR(16, 0xe60, 6, 5, 4), + MTK_PIN_PUPD_SPEC_SR(17, 0xe60, 10, 9, 8), + + MTK_PIN_PUPD_SPEC_SR(21, 0xe60, 14, 13, 12), + MTK_PIN_PUPD_SPEC_SR(22, 0xe70, 2, 1, 0), + MTK_PIN_PUPD_SPEC_SR(23, 0xe70, 6, 5, 4), + + MTK_PIN_PUPD_SPEC_SR(40, 0xe80, 2, 1, 0), + MTK_PIN_PUPD_SPEC_SR(41, 0xe80, 6, 5, 4), + MTK_PIN_PUPD_SPEC_SR(42, 0xe90, 2, 1, 0), + MTK_PIN_PUPD_SPEC_SR(43, 0xe90, 6, 5, 4), + + MTK_PIN_PUPD_SPEC_SR(68, 0xe50, 10, 9, 8), + MTK_PIN_PUPD_SPEC_SR(69, 0xe50, 6, 5, 4), + MTK_PIN_PUPD_SPEC_SR(70, 0xe40, 6, 5, 4), + MTK_PIN_PUPD_SPEC_SR(71, 0xe40, 10, 9, 8), + MTK_PIN_PUPD_SPEC_SR(72, 0xe40, 14, 13, 12), + MTK_PIN_PUPD_SPEC_SR(73, 0xe50, 2, 1, 0), + + MTK_PIN_PUPD_SPEC_SR(104, 0xe40, 2, 1, 0), + MTK_PIN_PUPD_SPEC_SR(105, 0xe30, 14, 13, 12), + MTK_PIN_PUPD_SPEC_SR(106, 0xe20, 14, 13, 12), + MTK_PIN_PUPD_SPEC_SR(107, 0xe30, 2, 1, 0), + MTK_PIN_PUPD_SPEC_SR(108, 0xe30, 6, 5, 4), + MTK_PIN_PUPD_SPEC_SR(109, 0xe30, 10, 9, 8), + MTK_PIN_PUPD_SPEC_SR(110, 0xe10, 14, 13, 12), + MTK_PIN_PUPD_SPEC_SR(111, 0xe10, 10, 9, 8), + MTK_PIN_PUPD_SPEC_SR(112, 0xe10, 6, 5, 4), + MTK_PIN_PUPD_SPEC_SR(113, 0xe10, 2, 1, 0), + MTK_PIN_PUPD_SPEC_SR(114, 0xe20, 10, 9, 8), + MTK_PIN_PUPD_SPEC_SR(115, 0xe20, 2, 1, 0), + MTK_PIN_PUPD_SPEC_SR(116, 0xe20, 6, 5, 4), + MTK_PIN_PUPD_SPEC_SR(117, 0xe00, 14, 13, 12), + MTK_PIN_PUPD_SPEC_SR(118, 0xe00, 10, 9, 8), + MTK_PIN_PUPD_SPEC_SR(119, 0xe00, 6, 5, 4), + MTK_PIN_PUPD_SPEC_SR(120, 0xe00, 2, 1, 0), +}; + +static int mt8167_spec_pull_set(struct regmap *regmap, unsigned int pin, + unsigned char align, bool isup, unsigned int r1r0) +{ + return mtk_pctrl_spec_pull_set_samereg(regmap, mt8167_spec_pupd, + ARRAY_SIZE(mt8167_spec_pupd), pin, align, isup, r1r0); +} + +static const struct mtk_pin_ies_smt_set mt8167_ies_set[] = { + MTK_PIN_IES_SMT_SPEC(0, 6, 0x900, 2), + MTK_PIN_IES_SMT_SPEC(7, 10, 0x900, 3), + MTK_PIN_IES_SMT_SPEC(11, 13, 0x900, 12), + MTK_PIN_IES_SMT_SPEC(14, 17, 0x900, 13), + MTK_PIN_IES_SMT_SPEC(18, 20, 0x910, 10), + MTK_PIN_IES_SMT_SPEC(21, 23, 0x900, 13), + MTK_PIN_IES_SMT_SPEC(24, 25, 0x900, 12), + MTK_PIN_IES_SMT_SPEC(26, 30, 0x900, 0), + MTK_PIN_IES_SMT_SPEC(31, 33, 0x900, 1), + MTK_PIN_IES_SMT_SPEC(34, 39, 0x900, 2), + MTK_PIN_IES_SMT_SPEC(40, 40, 0x910, 11), + MTK_PIN_IES_SMT_SPEC(41, 43, 0x900, 10), + MTK_PIN_IES_SMT_SPEC(44, 47, 0x900, 11), + MTK_PIN_IES_SMT_SPEC(48, 51, 0x900, 14), + MTK_PIN_IES_SMT_SPEC(52, 53, 0x910, 0), + MTK_PIN_IES_SMT_SPEC(54, 54, 0x910, 2), + MTK_PIN_IES_SMT_SPEC(55, 57, 0x910, 4), + MTK_PIN_IES_SMT_SPEC(58, 59, 0x900, 15), + MTK_PIN_IES_SMT_SPEC(60, 61, 0x910, 1), + MTK_PIN_IES_SMT_SPEC(62, 65, 0x910, 5), + MTK_PIN_IES_SMT_SPEC(66, 67, 0x910, 6), + MTK_PIN_IES_SMT_SPEC(68, 68, 0x930, 2), + MTK_PIN_IES_SMT_SPEC(69, 69, 0x930, 1), + MTK_PIN_IES_SMT_SPEC(70, 70, 0x930, 6), + MTK_PIN_IES_SMT_SPEC(71, 71, 0x930, 5), + MTK_PIN_IES_SMT_SPEC(72, 72, 0x930, 4), + MTK_PIN_IES_SMT_SPEC(73, 73, 0x930, 3), + MTK_PIN_IES_SMT_SPEC(100, 103, 0x910, 7), + MTK_PIN_IES_SMT_SPEC(104, 104, 0x920, 12), + MTK_PIN_IES_SMT_SPEC(105, 105, 0x920, 11), + MTK_PIN_IES_SMT_SPEC(106, 106, 0x930, 0), + MTK_PIN_IES_SMT_SPEC(107, 107, 0x920, 15), + MTK_PIN_IES_SMT_SPEC(108, 108, 0x920, 14), + MTK_PIN_IES_SMT_SPEC(109, 109, 0x920, 13), + MTK_PIN_IES_SMT_SPEC(110, 110, 0x920, 9), + MTK_PIN_IES_SMT_SPEC(111, 111, 0x920, 8), + MTK_PIN_IES_SMT_SPEC(112, 112, 0x920, 7), + MTK_PIN_IES_SMT_SPEC(113, 113, 0x920, 6), + MTK_PIN_IES_SMT_SPEC(114, 114, 0x920, 10), + MTK_PIN_IES_SMT_SPEC(115, 115, 0x920, 1), + MTK_PIN_IES_SMT_SPEC(116, 116, 0x920, 0), + MTK_PIN_IES_SMT_SPEC(117, 117, 0x920, 5), + MTK_PIN_IES_SMT_SPEC(118, 118, 0x920, 4), + MTK_PIN_IES_SMT_SPEC(119, 119, 0x920, 3), + MTK_PIN_IES_SMT_SPEC(120, 120, 0x920, 2), + MTK_PIN_IES_SMT_SPEC(121, 124, 0x910, 9), +}; + +static const struct mtk_pin_ies_smt_set mt8167_smt_set[] = { + MTK_PIN_IES_SMT_SPEC(0, 6, 0xA00, 2), + MTK_PIN_IES_SMT_SPEC(7, 10, 0xA00, 3), + MTK_PIN_IES_SMT_SPEC(11, 13, 0xA00, 12), + MTK_PIN_IES_SMT_SPEC(14, 17, 0xA00, 13), + MTK_PIN_IES_SMT_SPEC(18, 20, 0xA10, 10), + MTK_PIN_IES_SMT_SPEC(21, 23, 0xA00, 13), + MTK_PIN_IES_SMT_SPEC(24, 25, 0xA00, 12), + MTK_PIN_IES_SMT_SPEC(26, 30, 0xA00, 0), + MTK_PIN_IES_SMT_SPEC(31, 33, 0xA00, 1), + MTK_PIN_IES_SMT_SPEC(34, 39, 0xA900, 2), + MTK_PIN_IES_SMT_SPEC(40, 40, 0xA10, 11), + MTK_PIN_IES_SMT_SPEC(41, 43, 0xA00, 10), + MTK_PIN_IES_SMT_SPEC(44, 47, 0xA00, 11), + MTK_PIN_IES_SMT_SPEC(48, 51, 0xA00, 14), + MTK_PIN_IES_SMT_SPEC(52, 53, 0xA10, 0), + MTK_PIN_IES_SMT_SPEC(54, 54, 0xA10, 2), + MTK_PIN_IES_SMT_SPEC(55, 57, 0xA10, 4), + MTK_PIN_IES_SMT_SPEC(58, 59, 0xA00, 15), + MTK_PIN_IES_SMT_SPEC(60, 61, 0xA10, 1), + MTK_PIN_IES_SMT_SPEC(62, 65, 0xA10, 5), + MTK_PIN_IES_SMT_SPEC(66, 67, 0xA10, 6), + MTK_PIN_IES_SMT_SPEC(68, 68, 0xA30, 2), + MTK_PIN_IES_SMT_SPEC(69, 69, 0xA30, 1), + MTK_PIN_IES_SMT_SPEC(70, 70, 0xA30, 3), + MTK_PIN_IES_SMT_SPEC(71, 71, 0xA30, 4), + MTK_PIN_IES_SMT_SPEC(72, 72, 0xA30, 5), + MTK_PIN_IES_SMT_SPEC(73, 73, 0xA30, 6), + + MTK_PIN_IES_SMT_SPEC(100, 103, 0xA10, 7), + MTK_PIN_IES_SMT_SPEC(104, 104, 0xA20, 12), + MTK_PIN_IES_SMT_SPEC(105, 105, 0xA20, 11), + MTK_PIN_IES_SMT_SPEC(106, 106, 0xA30, 13), + MTK_PIN_IES_SMT_SPEC(107, 107, 0xA20, 14), + MTK_PIN_IES_SMT_SPEC(108, 108, 0xA20, 15), + MTK_PIN_IES_SMT_SPEC(109, 109, 0xA30, 0), + MTK_PIN_IES_SMT_SPEC(110, 110, 0xA20, 9), + MTK_PIN_IES_SMT_SPEC(111, 111, 0xA20, 8), + MTK_PIN_IES_SMT_SPEC(112, 112, 0xA20, 7), + MTK_PIN_IES_SMT_SPEC(113, 113, 0xA20, 6), + MTK_PIN_IES_SMT_SPEC(114, 114, 0xA20, 10), + MTK_PIN_IES_SMT_SPEC(115, 115, 0xA20, 1), + MTK_PIN_IES_SMT_SPEC(116, 116, 0xA20, 0), + MTK_PIN_IES_SMT_SPEC(117, 117, 0xA20, 5), + MTK_PIN_IES_SMT_SPEC(118, 118, 0xA20, 4), + MTK_PIN_IES_SMT_SPEC(119, 119, 0xA20, 3), + MTK_PIN_IES_SMT_SPEC(120, 120, 0xA20, 2), + MTK_PIN_IES_SMT_SPEC(121, 124, 0xA10, 9), +}; + +static int mt8167_ies_smt_set(struct regmap *regmap, unsigned int pin, + unsigned char align, int value, enum pin_config_param arg) +{ + if (arg == PIN_CONFIG_INPUT_ENABLE) + return mtk_pconf_spec_set_ies_smt_range(regmap, mt8167_ies_set, + ARRAY_SIZE(mt8167_ies_set), pin, align, value); + else if (arg == PIN_CONFIG_INPUT_SCHMITT_ENABLE) + return mtk_pconf_spec_set_ies_smt_range(regmap, mt8167_smt_set, + ARRAY_SIZE(mt8167_smt_set), pin, align, value); + return -EINVAL; +} + +static const struct mtk_pinctrl_devdata mt8167_pinctrl_data = { + .pins = mtk_pins_mt8167, + .npins = ARRAY_SIZE(mtk_pins_mt8167), + .grp_desc = mt8167_drv_grp, + .n_grp_cls = ARRAY_SIZE(mt8167_drv_grp), + .pin_drv_grp = mt8167_pin_drv, + .n_pin_drv_grps = ARRAY_SIZE(mt8167_pin_drv), + .spec_pull_set = mt8167_spec_pull_set, + .spec_ies_smt_set = mt8167_ies_smt_set, + .dir_offset = 0x0000, + .pullen_offset = 0x0500, + .pullsel_offset = 0x0600, + .dout_offset = 0x0100, + .din_offset = 0x0200, + .pinmux_offset = 0x0300, + .type1_start = 125, + .type1_end = 125, + .port_shf = 4, + .port_mask = 0xf, + .port_align = 4, + .eint_hw = { + .port_mask = 7, + .ports = 6, + .ap_num = 169, + .db_cnt = 64, + }, +}; + +static int mt8167_pinctrl_probe(struct platform_device *pdev) +{ + return mtk_pctrl_init(pdev, &mt8167_pinctrl_data, NULL); +} + +static const struct of_device_id mt8167_pctrl_match[] = { + { + .compatible = "mediatek,mt8167-pinctrl", + }, + {} +}; + +MODULE_DEVICE_TABLE(of, mt8167_pctrl_match); + +static struct platform_driver mtk_pinctrl_driver = { + .probe = mt8167_pinctrl_probe, + .driver = { + .name = "mediatek-mt8167-pinctrl", + .of_match_table = mt8167_pctrl_match, + .pm = &mtk_eint_pm_ops, + }, +}; + +static int __init mtk_pinctrl_init(void) +{ + return platform_driver_register(&mtk_pinctrl_driver); +} +arch_initcall(mtk_pinctrl_init); diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-mt8167.h b/drivers/pinctrl/mediatek/pinctrl-mtk-mt8167.h new file mode 100644 index 000000000000..225c41fc9b75 --- /dev/null +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-mt8167.h @@ -0,0 +1,1248 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2020 MediaTek Inc. + */ +#ifndef __PINCTRL_MTK_MT8167_H +#define __PINCTRL_MTK_MT8167_H + +#include +#include "pinctrl-mtk-common.h" + +static const struct mtk_desc_pin mtk_pins_mt8167[] = { + MTK_PIN( + PINCTRL_PIN(0, "EINT0"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 0), + MTK_FUNCTION(0, "GPIO0"), + MTK_FUNCTION(1, "PWM_B"), + MTK_FUNCTION(2, "DPI_CK"), + MTK_FUNCTION(3, "I2S2_BCK"), + MTK_FUNCTION(4, "EXT_TXD0"), + MTK_FUNCTION(6, "SQICS"), + MTK_FUNCTION(7, "DBG_MON_A[6]") + ), + MTK_PIN( + PINCTRL_PIN(1, "EINT1"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 1), + MTK_FUNCTION(0, "GPIO1"), + MTK_FUNCTION(1, "PWM_C"), + MTK_FUNCTION(2, "DPI_D12"), + MTK_FUNCTION(3, "I2S2_DI"), + MTK_FUNCTION(4, "EXT_TXD1"), + MTK_FUNCTION(5, "CONN_MCU_TDO"), + MTK_FUNCTION(6, "SQISO"), + MTK_FUNCTION(7, "DBG_MON_A[7]") + ), + MTK_PIN( + PINCTRL_PIN(2, "EINT2"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 2), + MTK_FUNCTION(0, "GPIO2"), + MTK_FUNCTION(1, "CLKM0"), + MTK_FUNCTION(2, "DPI_D13"), + MTK_FUNCTION(3, "I2S2_LRCK"), + MTK_FUNCTION(4, "EXT_TXD2"), + MTK_FUNCTION(5, "CONN_MCU_DBGACK_N"), + MTK_FUNCTION(6, "SQISI"), + MTK_FUNCTION(7, "DBG_MON_A[8]") + ), + MTK_PIN( + PINCTRL_PIN(3, "EINT3"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 3), + MTK_FUNCTION(0, "GPIO3"), + MTK_FUNCTION(1, "CLKM1"), + MTK_FUNCTION(2, "DPI_D14"), + MTK_FUNCTION(3, "SPI_MI"), + MTK_FUNCTION(4, "EXT_TXD3"), + MTK_FUNCTION(5, "CONN_MCU_DBGI_N"), + MTK_FUNCTION(6, "SQIWP"), + MTK_FUNCTION(7, "DBG_MON_A[9]") + ), + MTK_PIN( + PINCTRL_PIN(4, "EINT4"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 4), + MTK_FUNCTION(0, "GPIO4"), + MTK_FUNCTION(1, "CLKM2"), + MTK_FUNCTION(2, "DPI_D15"), + MTK_FUNCTION(3, "SPI_MO"), + MTK_FUNCTION(4, "EXT_TXC"), + MTK_FUNCTION(5, "CONN_MCU_TCK"), + MTK_FUNCTION(6, "CONN_MCU_AICE_JCKC"), + MTK_FUNCTION(7, "DBG_MON_A[10]") + ), + MTK_PIN( + PINCTRL_PIN(5, "EINT5"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 5), + MTK_FUNCTION(0, "GPIO5"), + MTK_FUNCTION(1, "UCTS2"), + MTK_FUNCTION(2, "DPI_D16"), + MTK_FUNCTION(3, "SPI_CSB"), + MTK_FUNCTION(4, "EXT_RXER"), + MTK_FUNCTION(5, "CONN_MCU_TDI"), + MTK_FUNCTION(6, "CONN_TEST_CK"), + MTK_FUNCTION(7, "DBG_MON_A[11]") + ), + MTK_PIN( + PINCTRL_PIN(6, "EINT6"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 6), + MTK_FUNCTION(0, "GPIO6"), + MTK_FUNCTION(1, "URTS2"), + MTK_FUNCTION(2, "DPI_D17"), + MTK_FUNCTION(3, "SPI_CLK"), + MTK_FUNCTION(4, "EXT_RXC"), + MTK_FUNCTION(5, "CONN_MCU_TRST_B"), + MTK_FUNCTION(6, "MM_TEST_CK"), + MTK_FUNCTION(7, "DBG_MON_A[12]") + ), + MTK_PIN( + PINCTRL_PIN(7, "EINT7"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 7), + MTK_FUNCTION(0, "GPIO7"), + MTK_FUNCTION(1, "SQIRST"), + MTK_FUNCTION(2, "DPI_D6"), + MTK_FUNCTION(3, "SDA1_0"), + MTK_FUNCTION(4, "EXT_RXDV"), + MTK_FUNCTION(5, "CONN_MCU_TMS"), + MTK_FUNCTION(6, "CONN_MCU_AICE_JMSC"), + MTK_FUNCTION(7, "DBG_MON_A[13]") + ), + MTK_PIN( + PINCTRL_PIN(8, "EINT8"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 8), + MTK_FUNCTION(0, "GPIO8"), + MTK_FUNCTION(1, "SQICK"), + MTK_FUNCTION(2, "CLKM3"), + MTK_FUNCTION(3, "SCL1_0"), + MTK_FUNCTION(4, "EXT_RXD0"), + MTK_FUNCTION(5, "ANT_SEL0"), + MTK_FUNCTION(6, "DPI_D7"), + MTK_FUNCTION(7, "DBG_MON_A[14]") + ), + MTK_PIN( + PINCTRL_PIN(9, "EINT9"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 9), + MTK_FUNCTION(0, "GPIO9"), + MTK_FUNCTION(1, "CLKM4"), + MTK_FUNCTION(2, "SDA2_0"), + MTK_FUNCTION(3, "EXT_FRAME_SYNC"), + MTK_FUNCTION(4, "EXT_RXD1"), + MTK_FUNCTION(5, "ANT_SEL1"), + MTK_FUNCTION(6, "DPI_D8"), + MTK_FUNCTION(7, "DBG_MON_A[15]") + ), + MTK_PIN( + PINCTRL_PIN(10, "EINT10"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 10), + MTK_FUNCTION(0, "GPIO10"), + MTK_FUNCTION(1, "CLKM5"), + MTK_FUNCTION(2, "SCL2_0"), + MTK_FUNCTION(3, "EXT_FRAME_SYNC"), + MTK_FUNCTION(4, "EXT_RXD2"), + MTK_FUNCTION(5, "ANT_SEL2"), + MTK_FUNCTION(6, "DPI_D9"), + MTK_FUNCTION(7, "DBG_MON_A[16]") + ), + MTK_PIN( + PINCTRL_PIN(11, "EINT11"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 11), + MTK_FUNCTION(0, "GPIO11"), + MTK_FUNCTION(1, "CLKM4"), + MTK_FUNCTION(2, "PWM_C"), + MTK_FUNCTION(3, "CONN_TEST_CK"), + MTK_FUNCTION(4, "ANT_SEL3"), + MTK_FUNCTION(5, "DPI_D10"), + MTK_FUNCTION(6, "EXT_RXD3"), + MTK_FUNCTION(7, "DBG_MON_A[17]") + ), + MTK_PIN( + PINCTRL_PIN(12, "EINT12"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 12), + MTK_FUNCTION(0, "GPIO12"), + MTK_FUNCTION(1, "CLKM5"), + MTK_FUNCTION(2, "PWM_A"), + MTK_FUNCTION(3, "SPDIF_OUT"), + MTK_FUNCTION(4, "ANT_SEL4"), + MTK_FUNCTION(5, "DPI_D11"), + MTK_FUNCTION(6, "EXT_TXEN"), + MTK_FUNCTION(7, "DBG_MON_A[18]") + ), + MTK_PIN( + PINCTRL_PIN(13, "EINT13"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 13), + MTK_FUNCTION(0, "GPIO13"), + MTK_FUNCTION(3, "TSF_IN"), + MTK_FUNCTION(4, "ANT_SEL5"), + MTK_FUNCTION(5, "DPI_D0"), + MTK_FUNCTION(6, "SPDIF_IN"), + MTK_FUNCTION(7, "DBG_MON_A[19]") + ), + MTK_PIN( + PINCTRL_PIN(14, "EINT14"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 14), + MTK_FUNCTION(0, "GPIO14"), + MTK_FUNCTION(2, "I2S_8CH_DO1"), + MTK_FUNCTION(3, "TDM_RX_MCK"), + MTK_FUNCTION(4, "ANT_SEL1"), + MTK_FUNCTION(5, "CONN_MCU_DBGACK_N"), + MTK_FUNCTION(6, "NCLE"), + MTK_FUNCTION(7, "DBG_MON_B[8]") + ), + MTK_PIN( + PINCTRL_PIN(15, "EINT15"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 15), + MTK_FUNCTION(0, "GPIO15"), + MTK_FUNCTION(2, "I2S_8CH_LRCK"), + MTK_FUNCTION(3, "TDM_RX_BCK"), + MTK_FUNCTION(4, "ANT_SEL2"), + MTK_FUNCTION(5, "CONN_MCU_DBGI_N"), + MTK_FUNCTION(6, "NCEB1"), + MTK_FUNCTION(7, "DBG_MON_B[9]") + ), + MTK_PIN( + PINCTRL_PIN(16, "EINT16"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 16), + MTK_FUNCTION(0, "GPIO16"), + MTK_FUNCTION(2, "I2S_8CH_BCK"), + MTK_FUNCTION(3, "TDM_RX_LRCK"), + MTK_FUNCTION(4, "ANT_SEL3"), + MTK_FUNCTION(5, "CONN_MCU_TRST_B"), + MTK_FUNCTION(6, "NCEB0"), + MTK_FUNCTION(7, "DBG_MON_B[10]") + ), + MTK_PIN( + PINCTRL_PIN(17, "EINT17"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 17), + MTK_FUNCTION(0, "GPIO17"), + MTK_FUNCTION(2, "I2S_8CH_MCK"), + MTK_FUNCTION(3, "TDM_RX_DI"), + MTK_FUNCTION(4, "IDDIG"), + MTK_FUNCTION(5, "ANT_SEL4"), + MTK_FUNCTION(6, "NREB"), + MTK_FUNCTION(7, "DBG_MON_B[11]") + ), + MTK_PIN( + PINCTRL_PIN(18, "EINT18"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 18), + MTK_FUNCTION(0, "GPIO18"), + MTK_FUNCTION(2, "USB_DRVVBUS"), + MTK_FUNCTION(3, "I2S3_LRCK"), + MTK_FUNCTION(4, "CLKM1"), + MTK_FUNCTION(5, "ANT_SEL3"), + MTK_FUNCTION(6, "I2S2_BCK"), + MTK_FUNCTION(7, "DBG_MON_A[20]") + ), + MTK_PIN( + PINCTRL_PIN(19, "EINT19"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 19), + MTK_FUNCTION(0, "GPIO19"), + MTK_FUNCTION(1, "UCTS1"), + MTK_FUNCTION(2, "IDDIG"), + MTK_FUNCTION(3, "I2S3_BCK"), + MTK_FUNCTION(4, "CLKM2"), + MTK_FUNCTION(5, "ANT_SEL4"), + MTK_FUNCTION(6, "I2S2_DI"), + MTK_FUNCTION(7, "DBG_MON_A[21]") + ), + MTK_PIN( + PINCTRL_PIN(20, "EINT20"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 20), + MTK_FUNCTION(0, "GPIO20"), + MTK_FUNCTION(1, "URTS1"), + MTK_FUNCTION(3, "I2S3_DO"), + MTK_FUNCTION(4, "CLKM3"), + MTK_FUNCTION(5, "ANT_SEL5"), + MTK_FUNCTION(6, "I2S2_LRCK"), + MTK_FUNCTION(7, "DBG_MON_A[22]") + ), + MTK_PIN( + PINCTRL_PIN(21, "EINT21"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 21), + MTK_FUNCTION(0, "GPIO21"), + MTK_FUNCTION(1, "NRNB"), + MTK_FUNCTION(2, "ANT_SEL0"), + MTK_FUNCTION(3, "I2S_8CH_DO4"), + MTK_FUNCTION(7, "DBG_MON_B[31]") + ), + MTK_PIN( + PINCTRL_PIN(22, "EINT22"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 22), + MTK_FUNCTION(0, "GPIO22"), + MTK_FUNCTION(2, "I2S_8CH_DO2"), + MTK_FUNCTION(3, "TSF_IN"), + MTK_FUNCTION(4, "USB_DRVVBUS"), + MTK_FUNCTION(5, "SPDIF_OUT"), + MTK_FUNCTION(6, "NRE_C"), + MTK_FUNCTION(7, "DBG_MON_B[12]") + ), + MTK_PIN( + PINCTRL_PIN(23, "EINT23"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 23), + MTK_FUNCTION(0, "GPIO23"), + MTK_FUNCTION(2, "I2S_8CH_DO3"), + MTK_FUNCTION(3, "CLKM0"), + MTK_FUNCTION(4, "IR"), + MTK_FUNCTION(5, "SPDIF_IN"), + MTK_FUNCTION(6, "NDQS_C"), + MTK_FUNCTION(7, "DBG_MON_B[13]") + ), + MTK_PIN( + PINCTRL_PIN(24, "EINT24"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 24), + MTK_FUNCTION(0, "GPIO24"), + MTK_FUNCTION(1, "DPI_D20"), + MTK_FUNCTION(2, "DPI_DE"), + MTK_FUNCTION(3, "ANT_SEL1"), + MTK_FUNCTION(4, "UCTS2"), + MTK_FUNCTION(5, "PWM_A"), + MTK_FUNCTION(6, "I2S0_MCK"), + MTK_FUNCTION(7, "DBG_MON_A[0]") + ), + MTK_PIN( + PINCTRL_PIN(25, "EINT25"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 25), + MTK_FUNCTION(0, "GPIO25"), + MTK_FUNCTION(1, "DPI_D19"), + MTK_FUNCTION(2, "DPI_VSYNC"), + MTK_FUNCTION(3, "ANT_SEL0"), + MTK_FUNCTION(4, "URTS2"), + MTK_FUNCTION(5, "PWM_B"), + MTK_FUNCTION(6, "I2S_8CH_MCK"), + MTK_FUNCTION(7, "DBG_MON_A[1]") + ), + MTK_PIN( + PINCTRL_PIN(26, "PWRAP_SPI0_MI"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 26), + MTK_FUNCTION(0, "GPIO26"), + MTK_FUNCTION(1, "PWRAP_SPI0_MO"), + MTK_FUNCTION(2, "PWRAP_SPI0_MI") + ), + MTK_PIN( + PINCTRL_PIN(27, "PWRAP_SPI0_MO"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 27), + MTK_FUNCTION(0, "GPIO27"), + MTK_FUNCTION(1, "PWRAP_SPI0_MI"), + MTK_FUNCTION(2, "PWRAP_SPI0_MO") + ), + MTK_PIN( + PINCTRL_PIN(28, "PWRAP_INT"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 28), + MTK_FUNCTION(0, "GPIO28"), + MTK_FUNCTION(1, "I2S0_MCK"), + MTK_FUNCTION(4, "I2S_8CH_MCK"), + MTK_FUNCTION(5, "I2S2_MCK"), + MTK_FUNCTION(6, "I2S3_MCK") + ), + MTK_PIN( + PINCTRL_PIN(29, "PWRAP_SPI0_CK"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 29), + MTK_FUNCTION(0, "GPIO29"), + MTK_FUNCTION(1, "PWRAP_SPI0_CK") + ), + MTK_PIN( + PINCTRL_PIN(30, "PWRAP_SPI0_CSN"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 30), + MTK_FUNCTION(0, "GPIO30"), + MTK_FUNCTION(1, "PWRAP_SPI0_CSN") + ), + MTK_PIN( + PINCTRL_PIN(31, "RTC32K_CK"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 31), + MTK_FUNCTION(0, "GPIO31"), + MTK_FUNCTION(1, "RTC32K_CK") + ), + MTK_PIN( + PINCTRL_PIN(32, "WATCHDOG"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 32), + MTK_FUNCTION(0, "GPIO32"), + MTK_FUNCTION(1, "WATCHDOG") + ), + MTK_PIN( + PINCTRL_PIN(33, "SRCLKENA"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 33), + MTK_FUNCTION(0, "GPIO33"), + MTK_FUNCTION(1, "SRCLKENA0") + ), + MTK_PIN( + PINCTRL_PIN(34, "URXD2"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 34), + MTK_FUNCTION(0, "GPIO34"), + MTK_FUNCTION(1, "URXD2"), + MTK_FUNCTION(2, "DPI_D5"), + MTK_FUNCTION(3, "UTXD2"), + MTK_FUNCTION(4, "DBG_SCL"), + MTK_FUNCTION(6, "I2S2_MCK"), + MTK_FUNCTION(7, "DBG_MON_B[0]") + ), + MTK_PIN( + PINCTRL_PIN(35, "UTXD2"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 35), + MTK_FUNCTION(0, "GPIO35"), + MTK_FUNCTION(1, "UTXD2"), + MTK_FUNCTION(2, "DPI_HSYNC"), + MTK_FUNCTION(3, "URXD2"), + MTK_FUNCTION(4, "DBG_SDA"), + MTK_FUNCTION(5, "DPI_D18"), + MTK_FUNCTION(6, "I2S3_MCK"), + MTK_FUNCTION(7, "DBG_MON_B[1]") + ), + MTK_PIN( + PINCTRL_PIN(36, "MRG_CLK"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 36), + MTK_FUNCTION(0, "GPIO36"), + MTK_FUNCTION(1, "MRG_CLK"), + MTK_FUNCTION(2, "DPI_D4"), + MTK_FUNCTION(3, "I2S0_BCK"), + MTK_FUNCTION(4, "I2S3_BCK"), + MTK_FUNCTION(5, "PCM0_CLK"), + MTK_FUNCTION(6, "IR"), + MTK_FUNCTION(7, "DBG_MON_A[2]") + ), + MTK_PIN( + PINCTRL_PIN(37, "MRG_SYNC"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 37), + MTK_FUNCTION(0, "GPIO37"), + MTK_FUNCTION(1, "MRG_SYNC"), + MTK_FUNCTION(2, "DPI_D3"), + MTK_FUNCTION(3, "I2S0_LRCK"), + MTK_FUNCTION(4, "I2S3_LRCK"), + MTK_FUNCTION(5, "PCM0_SYNC"), + MTK_FUNCTION(6, "EXT_COL"), + MTK_FUNCTION(7, "DBG_MON_A[3]") + ), + MTK_PIN( + PINCTRL_PIN(38, "MRG_DI"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 38), + MTK_FUNCTION(0, "GPIO38"), + MTK_FUNCTION(1, "MRG_DI"), + MTK_FUNCTION(2, "DPI_D1"), + MTK_FUNCTION(3, "I2S0_DI"), + MTK_FUNCTION(4, "I2S3_DO"), + MTK_FUNCTION(5, "PCM0_DI"), + MTK_FUNCTION(6, "EXT_MDIO"), + MTK_FUNCTION(7, "DBG_MON_A[4]") + ), + MTK_PIN( + PINCTRL_PIN(39, "MRG_DO"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 39), + MTK_FUNCTION(0, "GPIO39"), + MTK_FUNCTION(1, "MRG_DO"), + MTK_FUNCTION(2, "DPI_D2"), + MTK_FUNCTION(3, "I2S0_MCK"), + MTK_FUNCTION(4, "I2S3_MCK"), + MTK_FUNCTION(5, "PCM0_DO"), + MTK_FUNCTION(6, "EXT_MDC"), + MTK_FUNCTION(7, "DBG_MON_A[5]") + ), + MTK_PIN( + PINCTRL_PIN(40, "KPROW0"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 40), + MTK_FUNCTION(0, "GPIO40"), + MTK_FUNCTION(1, "KPROW0"), + MTK_FUNCTION(4, "IMG_TEST_CK"), + MTK_FUNCTION(7, "DBG_MON_B[4]") + ), + MTK_PIN( + PINCTRL_PIN(41, "KPROW1"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 41), + MTK_FUNCTION(0, "GPIO41"), + MTK_FUNCTION(1, "KPROW1"), + MTK_FUNCTION(2, "IDDIG"), + MTK_FUNCTION(3, "EXT_FRAME_SYNC"), + MTK_FUNCTION(4, "MFG_TEST_CK"), + MTK_FUNCTION(7, "DBG_MON_B[5]") + ), + MTK_PIN( + PINCTRL_PIN(42, "KPCOL0"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 42), + MTK_FUNCTION(0, "GPIO42"), + MTK_FUNCTION(1, "KPCOL0"), + MTK_FUNCTION(7, "DBG_MON_B[6]") + ), + MTK_PIN( + PINCTRL_PIN(43, "KPCOL1"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 43), + MTK_FUNCTION(0, "GPIO43"), + MTK_FUNCTION(1, "KPCOL1"), + MTK_FUNCTION(2, "USB_DRVVBUS"), + MTK_FUNCTION(3, "EXT_FRAME_SYNC"), + MTK_FUNCTION(4, "TSF_IN"), + MTK_FUNCTION(5, "DFD_NTRST_XI"), + MTK_FUNCTION(6, "UDI_NTRST_XI"), + MTK_FUNCTION(7, "DBG_MON_B[7]") + ), + MTK_PIN( + PINCTRL_PIN(44, "JTMS"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 44), + MTK_FUNCTION(0, "GPIO44"), + MTK_FUNCTION(1, "JTMS"), + MTK_FUNCTION(2, "CONN_MCU_TMS"), + MTK_FUNCTION(3, "CONN_MCU_AICE_JMSC"), + MTK_FUNCTION(4, "GPUDFD_TMS_XI"), + MTK_FUNCTION(5, "DFD_TMS_XI"), + MTK_FUNCTION(6, "UDI_TMS_XI") + ), + MTK_PIN( + PINCTRL_PIN(45, "JTCK"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 45), + MTK_FUNCTION(0, "GPIO45"), + MTK_FUNCTION(1, "JTCK"), + MTK_FUNCTION(2, "CONN_MCU_TCK"), + MTK_FUNCTION(3, "CONN_MCU_AICE_JCKC"), + MTK_FUNCTION(4, "GPUDFD_TCK_XI"), + MTK_FUNCTION(5, "DFD_TCK_XI"), + MTK_FUNCTION(6, "UDI_TCK_XI") + ), + MTK_PIN( + PINCTRL_PIN(46, "JTDI"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 46), + MTK_FUNCTION(0, "GPIO46"), + MTK_FUNCTION(1, "JTDI"), + MTK_FUNCTION(2, "CONN_MCU_TDI"), + MTK_FUNCTION(4, "GPUDFD_TDI_XI"), + MTK_FUNCTION(5, "DFD_TDI_XI"), + MTK_FUNCTION(6, "UDI_TDI_XI") + ), + MTK_PIN( + PINCTRL_PIN(47, "JTDO"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 47), + MTK_FUNCTION(0, "GPIO47"), + MTK_FUNCTION(1, "JTDO"), + MTK_FUNCTION(2, "CONN_MCU_TDO"), + MTK_FUNCTION(4, "GPUDFD_TDO"), + MTK_FUNCTION(5, "DFD_TDO"), + MTK_FUNCTION(6, "UDI_TDO") + ), + MTK_PIN( + PINCTRL_PIN(48, "SPI_CS"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 48), + MTK_FUNCTION(0, "GPIO48"), + MTK_FUNCTION(1, "SPI_CSB"), + MTK_FUNCTION(3, "I2S0_DI"), + MTK_FUNCTION(4, "I2S2_BCK"), + MTK_FUNCTION(7, "DBG_MON_A[23]") + ), + MTK_PIN( + PINCTRL_PIN(49, "SPI_CK"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 49), + MTK_FUNCTION(0, "GPIO49"), + MTK_FUNCTION(1, "SPI_CLK"), + MTK_FUNCTION(3, "I2S0_LRCK"), + MTK_FUNCTION(4, "I2S2_DI"), + MTK_FUNCTION(7, "DBG_MON_A[24]") + ), + MTK_PIN( + PINCTRL_PIN(50, "SPI_MI"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 50), + MTK_FUNCTION(0, "GPIO50"), + MTK_FUNCTION(1, "SPI_MI"), + MTK_FUNCTION(2, "SPI_MO"), + MTK_FUNCTION(3, "I2S0_BCK"), + MTK_FUNCTION(4, "I2S2_LRCK"), + MTK_FUNCTION(7, "DBG_MON_A[25]") + ), + MTK_PIN( + PINCTRL_PIN(51, "SPI_MO"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 51), + MTK_FUNCTION(0, "GPIO51"), + MTK_FUNCTION(1, "SPI_MO"), + MTK_FUNCTION(2, "SPI_MI"), + MTK_FUNCTION(3, "I2S0_MCK"), + MTK_FUNCTION(4, "I2S2_MCK"), + MTK_FUNCTION(7, "DBG_MON_A[26]") + ), + MTK_PIN( + PINCTRL_PIN(52, "SDA1"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 52), + MTK_FUNCTION(0, "GPIO52"), + MTK_FUNCTION(1, "SDA1_0") + ), + MTK_PIN( + PINCTRL_PIN(53, "SCL1"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 53), + MTK_FUNCTION(0, "GPIO53"), + MTK_FUNCTION(1, "SCL1_0") + ), + MTK_PIN( + PINCTRL_PIN(54, "DISP_PWM"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 54), + MTK_FUNCTION(0, "GPIO54"), + MTK_FUNCTION(1, "DISP_PWM"), + MTK_FUNCTION(2, "PWM_B"), + MTK_FUNCTION(7, "DBG_MON_B[2]") + ), + MTK_PIN( + PINCTRL_PIN(55, "I2S_DATA_IN"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 55), + MTK_FUNCTION(0, "GPIO55"), + MTK_FUNCTION(1, "I2S0_DI"), + MTK_FUNCTION(2, "UCTS0"), + MTK_FUNCTION(3, "I2S3_DO"), + MTK_FUNCTION(4, "I2S_8CH_DO1"), + MTK_FUNCTION(5, "PWM_A"), + MTK_FUNCTION(6, "I2S2_BCK"), + MTK_FUNCTION(7, "DBG_MON_A[28]") + ), + MTK_PIN( + PINCTRL_PIN(56, "I2S_LRCK"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 56), + MTK_FUNCTION(0, "GPIO56"), + MTK_FUNCTION(1, "I2S0_LRCK"), + MTK_FUNCTION(3, "I2S3_LRCK"), + MTK_FUNCTION(4, "I2S_8CH_LRCK"), + MTK_FUNCTION(5, "PWM_B"), + MTK_FUNCTION(6, "I2S2_DI"), + MTK_FUNCTION(7, "DBG_MON_A[29]") + ), + MTK_PIN( + PINCTRL_PIN(57, "I2S_BCK"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 57), + MTK_FUNCTION(0, "GPIO57"), + MTK_FUNCTION(1, "I2S0_BCK"), + MTK_FUNCTION(2, "URTS0"), + MTK_FUNCTION(3, "I2S3_BCK"), + MTK_FUNCTION(4, "I2S_8CH_BCK"), + MTK_FUNCTION(5, "PWM_C"), + MTK_FUNCTION(6, "I2S2_LRCK"), + MTK_FUNCTION(7, "DBG_MON_A[30]") + ), + MTK_PIN( + PINCTRL_PIN(58, "SDA0"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 58), + MTK_FUNCTION(0, "GPIO58"), + MTK_FUNCTION(1, "SDA0_0") + ), + MTK_PIN( + PINCTRL_PIN(59, "SCL0"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 59), + MTK_FUNCTION(0, "GPIO59"), + MTK_FUNCTION(1, "SCL0_0") + ), + MTK_PIN( + PINCTRL_PIN(60, "SDA2"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 60), + MTK_FUNCTION(0, "GPIO60"), + MTK_FUNCTION(1, "SDA2_0"), + MTK_FUNCTION(2, "PWM_B") + ), + MTK_PIN( + PINCTRL_PIN(61, "SCL2"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 61), + MTK_FUNCTION(0, "GPIO61"), + MTK_FUNCTION(1, "SCL2_0"), + MTK_FUNCTION(2, "PWM_C") + ), + MTK_PIN( + PINCTRL_PIN(62, "URXD0"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 62), + MTK_FUNCTION(0, "GPIO62"), + MTK_FUNCTION(1, "URXD0"), + MTK_FUNCTION(2, "UTXD0") + ), + MTK_PIN( + PINCTRL_PIN(63, "UTXD0"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 63), + MTK_FUNCTION(0, "GPIO63"), + MTK_FUNCTION(1, "UTXD0"), + MTK_FUNCTION(2, "URXD0") + ), + MTK_PIN( + PINCTRL_PIN(64, "URXD1"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 64), + MTK_FUNCTION(0, "GPIO64"), + MTK_FUNCTION(1, "URXD1"), + MTK_FUNCTION(2, "UTXD1"), + MTK_FUNCTION(7, "DBG_MON_A[27]") + ), + MTK_PIN( + PINCTRL_PIN(65, "UTXD1"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 65), + MTK_FUNCTION(0, "GPIO65"), + MTK_FUNCTION(1, "UTXD1"), + MTK_FUNCTION(2, "URXD1"), + MTK_FUNCTION(7, "DBG_MON_A[31]") + ), + MTK_PIN( + PINCTRL_PIN(66, "LCM_RST"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 66), + MTK_FUNCTION(0, "GPIO66"), + MTK_FUNCTION(1, "LCM_RST"), + MTK_FUNCTION(3, "I2S0_MCK"), + MTK_FUNCTION(7, "DBG_MON_B[3]") + ), + MTK_PIN( + PINCTRL_PIN(67, "DSI_TE"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 67), + MTK_FUNCTION(0, "GPIO67"), + MTK_FUNCTION(1, "DSI_TE"), + MTK_FUNCTION(3, "I2S_8CH_MCK"), + MTK_FUNCTION(7, "DBG_MON_B[14]") + ), + MTK_PIN( + PINCTRL_PIN(68, "MSDC2_CMD"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 68), + MTK_FUNCTION(0, "GPIO68"), + MTK_FUNCTION(1, "MSDC2_CMD"), + MTK_FUNCTION(2, "I2S_8CH_DO4"), + MTK_FUNCTION(3, "SDA1_0"), + MTK_FUNCTION(5, "USB_SDA"), + MTK_FUNCTION(6, "I2S3_BCK"), + MTK_FUNCTION(7, "DBG_MON_B[15]") + ), + MTK_PIN( + PINCTRL_PIN(69, "MSDC2_CLK"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 69), + MTK_FUNCTION(0, "GPIO69"), + MTK_FUNCTION(1, "MSDC2_CLK"), + MTK_FUNCTION(2, "I2S_8CH_DO3"), + MTK_FUNCTION(3, "SCL1_0"), + MTK_FUNCTION(4, "DPI_D21"), + MTK_FUNCTION(5, "USB_SCL"), + MTK_FUNCTION(6, "I2S3_LRCK"), + MTK_FUNCTION(7, "DBG_MON_B[16]") + ), + MTK_PIN( + PINCTRL_PIN(70, "MSDC2_DAT0"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 70), + MTK_FUNCTION(0, "GPIO70"), + MTK_FUNCTION(1, "MSDC2_DAT0"), + MTK_FUNCTION(2, "I2S_8CH_DO2"), + MTK_FUNCTION(4, "DPI_D22"), + MTK_FUNCTION(5, "UTXD0"), + MTK_FUNCTION(6, "I2S3_DO"), + MTK_FUNCTION(7, "DBG_MON_B[17]") + ), + MTK_PIN( + PINCTRL_PIN(71, "MSDC2_DAT1"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 71), + MTK_FUNCTION(0, "GPIO71"), + MTK_FUNCTION(1, "MSDC2_DAT1"), + MTK_FUNCTION(2, "I2S_8CH_DO1"), + MTK_FUNCTION(3, "PWM_A"), + MTK_FUNCTION(4, "I2S3_MCK"), + MTK_FUNCTION(5, "URXD0"), + MTK_FUNCTION(6, "PWM_B"), + MTK_FUNCTION(7, "DBG_MON_B[18]") + ), + MTK_PIN( + PINCTRL_PIN(72, "MSDC2_DAT2"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 72), + MTK_FUNCTION(0, "GPIO72"), + MTK_FUNCTION(1, "MSDC2_DAT2"), + MTK_FUNCTION(2, "I2S_8CH_LRCK"), + MTK_FUNCTION(3, "SDA2_0"), + MTK_FUNCTION(4, "DPI_D23"), + MTK_FUNCTION(5, "UTXD1"), + MTK_FUNCTION(6, "PWM_C"), + MTK_FUNCTION(7, "DBG_MON_B[19]") + ), + MTK_PIN( + PINCTRL_PIN(73, "MSDC2_DAT3"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 73), + MTK_FUNCTION(0, "GPIO73"), + MTK_FUNCTION(1, "MSDC2_DAT3"), + MTK_FUNCTION(2, "I2S_8CH_BCK"), + MTK_FUNCTION(3, "SCL2_0"), + MTK_FUNCTION(4, "EXT_FRAME_SYNC"), + MTK_FUNCTION(5, "URXD1"), + MTK_FUNCTION(6, "PWM_A"), + MTK_FUNCTION(7, "DBG_MON_B[20]") + ), + MTK_PIN( + PINCTRL_PIN(74, "TDN3"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 74), + MTK_FUNCTION(0, "GPI74"), + MTK_FUNCTION(1, "TDN3") + ), + MTK_PIN( + PINCTRL_PIN(75, "TDP3"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 75), + MTK_FUNCTION(0, "GPI75"), + MTK_FUNCTION(1, "TDP3") + ), + MTK_PIN( + PINCTRL_PIN(76, "TDN2"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 76), + MTK_FUNCTION(0, "GPI76"), + MTK_FUNCTION(1, "TDN2") + ), + MTK_PIN( + PINCTRL_PIN(77, "TDP2"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 77), + MTK_FUNCTION(0, "GPI77"), + MTK_FUNCTION(1, "TDP2") + ), + MTK_PIN( + PINCTRL_PIN(78, "TCN"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 78), + MTK_FUNCTION(0, "GPI78"), + MTK_FUNCTION(1, "TCN") + ), + MTK_PIN( + PINCTRL_PIN(79, "TCP"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 79), + MTK_FUNCTION(0, "GPI79"), + MTK_FUNCTION(1, "TCP") + ), + MTK_PIN( + PINCTRL_PIN(80, "TDN1"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 80), + MTK_FUNCTION(0, "GPI80"), + MTK_FUNCTION(1, "TDN1") + ), + MTK_PIN( + PINCTRL_PIN(81, "TDP1"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 81), + MTK_FUNCTION(0, "GPI81"), + MTK_FUNCTION(1, "TDP1") + ), + MTK_PIN( + PINCTRL_PIN(82, "TDN0"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 82), + MTK_FUNCTION(0, "GPI82"), + MTK_FUNCTION(1, "TDN0") + ), + MTK_PIN( + PINCTRL_PIN(83, "TDP0"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 83), + MTK_FUNCTION(0, "GPI83"), + MTK_FUNCTION(1, "TDP0") + ), + MTK_PIN( + PINCTRL_PIN(84, "RDN0"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 84), + MTK_FUNCTION(0, "GPI84"), + MTK_FUNCTION(1, "RDN0") + ), + MTK_PIN( + PINCTRL_PIN(85, "RDP0"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 85), + MTK_FUNCTION(0, "GPI85"), + MTK_FUNCTION(1, "RDP0") + ), + MTK_PIN( + PINCTRL_PIN(86, "RDN1"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 86), + MTK_FUNCTION(0, "GPI86"), + MTK_FUNCTION(1, "RDN1") + ), + MTK_PIN( + PINCTRL_PIN(87, "RDP1"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 87), + MTK_FUNCTION(0, "GPI87"), + MTK_FUNCTION(1, "RDP1") + ), + MTK_PIN( + PINCTRL_PIN(88, "RCN"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 88), + MTK_FUNCTION(0, "GPI88"), + MTK_FUNCTION(1, "RCN") + ), + MTK_PIN( + PINCTRL_PIN(89, "RCP"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 89), + MTK_FUNCTION(0, "GPI89"), + MTK_FUNCTION(1, "RCP") + ), + MTK_PIN( + PINCTRL_PIN(90, "RDN2"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 90), + MTK_FUNCTION(0, "GPI90"), + MTK_FUNCTION(1, "RDN2"), + MTK_FUNCTION(2, "CMDAT8") + ), + MTK_PIN( + PINCTRL_PIN(91, "RDP2"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 91), + MTK_FUNCTION(0, "GPI91"), + MTK_FUNCTION(1, "RDP2"), + MTK_FUNCTION(2, "CMDAT9") + ), + MTK_PIN( + PINCTRL_PIN(92, "RDN3"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 92), + MTK_FUNCTION(0, "GPI92"), + MTK_FUNCTION(1, "RDN3"), + MTK_FUNCTION(2, "CMDAT4") + ), + MTK_PIN( + PINCTRL_PIN(93, "RDP3"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 93), + MTK_FUNCTION(0, "GPI93"), + MTK_FUNCTION(1, "RDP3"), + MTK_FUNCTION(2, "CMDAT5") + ), + MTK_PIN( + PINCTRL_PIN(94, "RCN_A"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 94), + MTK_FUNCTION(0, "GPI94"), + MTK_FUNCTION(1, "RCN_A"), + MTK_FUNCTION(2, "CMDAT6") + ), + MTK_PIN( + PINCTRL_PIN(95, "RCP_A"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 95), + MTK_FUNCTION(0, "GPI95"), + MTK_FUNCTION(1, "RCP_A"), + MTK_FUNCTION(2, "CMDAT7") + ), + MTK_PIN( + PINCTRL_PIN(96, "RDN1_A"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 96), + MTK_FUNCTION(0, "GPI96"), + MTK_FUNCTION(1, "RDN1_A"), + MTK_FUNCTION(2, "CMDAT2"), + MTK_FUNCTION(3, "CMCSD2") + ), + MTK_PIN( + PINCTRL_PIN(97, "RDP1_A"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 97), + MTK_FUNCTION(0, "GPI97"), + MTK_FUNCTION(1, "RDP1_A"), + MTK_FUNCTION(2, "CMDAT3"), + MTK_FUNCTION(3, "CMCSD3") + ), + MTK_PIN( + PINCTRL_PIN(98, "RDN0_A"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 98), + MTK_FUNCTION(0, "GPI98"), + MTK_FUNCTION(1, "RDN0_A"), + MTK_FUNCTION(2, "CMHSYNC") + ), + MTK_PIN( + PINCTRL_PIN(99, "RDP0_A"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 99), + MTK_FUNCTION(0, "GPI99"), + MTK_FUNCTION(1, "RDP0_A"), + MTK_FUNCTION(2, "CMVSYNC") + ), + MTK_PIN( + PINCTRL_PIN(100, "CMDAT0"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 100), + MTK_FUNCTION(0, "GPIO100"), + MTK_FUNCTION(1, "CMDAT0"), + MTK_FUNCTION(2, "CMCSD0"), + MTK_FUNCTION(3, "ANT_SEL2"), + MTK_FUNCTION(5, "TDM_RX_MCK"), + MTK_FUNCTION(7, "DBG_MON_B[21]") + ), + MTK_PIN( + PINCTRL_PIN(101, "CMDAT1"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 101), + MTK_FUNCTION(0, "GPIO101"), + MTK_FUNCTION(1, "CMDAT1"), + MTK_FUNCTION(2, "CMCSD1"), + MTK_FUNCTION(3, "ANT_SEL3"), + MTK_FUNCTION(4, "CMFLASH"), + MTK_FUNCTION(5, "TDM_RX_BCK"), + MTK_FUNCTION(7, "DBG_MON_B[22]") + ), + MTK_PIN( + PINCTRL_PIN(102, "CMMCLK"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 102), + MTK_FUNCTION(0, "GPIO102"), + MTK_FUNCTION(1, "CMMCLK"), + MTK_FUNCTION(3, "ANT_SEL4"), + MTK_FUNCTION(5, "TDM_RX_LRCK"), + MTK_FUNCTION(7, "DBG_MON_B[23]") + ), + MTK_PIN( + PINCTRL_PIN(103, "CMPCLK"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 103), + MTK_FUNCTION(0, "GPIO103"), + MTK_FUNCTION(1, "CMPCLK"), + MTK_FUNCTION(2, "CMCSK"), + MTK_FUNCTION(3, "ANT_SEL5"), + MTK_FUNCTION(5, " TDM_RX_DI"), + MTK_FUNCTION(7, "DBG_MON_B[24]") + ), + MTK_PIN( + PINCTRL_PIN(104, "MSDC1_CMD"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 104), + MTK_FUNCTION(0, "GPIO104"), + MTK_FUNCTION(1, "MSDC1_CMD"), + MTK_FUNCTION(4, "SQICS"), + MTK_FUNCTION(7, "DBG_MON_B[25]") + ), + MTK_PIN( + PINCTRL_PIN(105, "MSDC1_CLK"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 105), + MTK_FUNCTION(0, "GPIO105"), + MTK_FUNCTION(1, "MSDC1_CLK"), + MTK_FUNCTION(2, "UDI_NTRST_XI"), + MTK_FUNCTION(3, "DFD_NTRST_XI"), + MTK_FUNCTION(4, "SQISO"), + MTK_FUNCTION(5, "GPUEJ_NTRST_XI"), + MTK_FUNCTION(7, "DBG_MON_B[26]") + ), + MTK_PIN( + PINCTRL_PIN(106, "MSDC1_DAT0"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 106), + MTK_FUNCTION(0, "GPIO106"), + MTK_FUNCTION(1, "MSDC1_DAT0"), + MTK_FUNCTION(2, "UDI_TMS_XI"), + MTK_FUNCTION(3, "DFD_TMS_XI"), + MTK_FUNCTION(4, "SQISI"), + MTK_FUNCTION(5, "GPUEJ_TMS_XI"), + MTK_FUNCTION(7, "DBG_MON_B[27]") + ), + MTK_PIN( + PINCTRL_PIN(107, "MSDC1_DAT1"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 107), + MTK_FUNCTION(0, "GPIO107"), + MTK_FUNCTION(1, "MSDC1_DAT1"), + MTK_FUNCTION(2, "UDI_TCK_XI"), + MTK_FUNCTION(3, "DFD_TCK_XI"), + MTK_FUNCTION(4, "SQIWP"), + MTK_FUNCTION(5, "GPUEJ_TCK_XI"), + MTK_FUNCTION(7, "DBG_MON_B[28]") + ), + MTK_PIN( + PINCTRL_PIN(108, "MSDC1_DAT2"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 108), + MTK_FUNCTION(0, "GPIO108"), + MTK_FUNCTION(1, "MSDC1_DAT2"), + MTK_FUNCTION(2, "UDI_TDI_XI"), + MTK_FUNCTION(3, "DFD_TDI_XI"), + MTK_FUNCTION(4, "SQIRST"), + MTK_FUNCTION(5, "GPUEJ_TDI_XI"), + MTK_FUNCTION(7, "DBG_MON_B[29]") + ), + MTK_PIN( + PINCTRL_PIN(109, "MSDC1_DAT3"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 109), + MTK_FUNCTION(0, "GPIO109"), + MTK_FUNCTION(1, "MSDC1_DAT3"), + MTK_FUNCTION(2, "UDI_TDO"), + MTK_FUNCTION(3, "DFD_TDO"), + MTK_FUNCTION(4, "SQICK"), + MTK_FUNCTION(5, "GPUEJ_TDO"), + MTK_FUNCTION(7, "DBG_MON_B[30]") + ), + MTK_PIN( + PINCTRL_PIN(110, "MSDC0_DAT7"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 110), + MTK_FUNCTION(0, "GPIO110"), + MTK_FUNCTION(1, "MSDC0_DAT7"), + MTK_FUNCTION(4, "NLD7") + ), + MTK_PIN( + PINCTRL_PIN(111, "MSDC0_DAT6"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 111), + MTK_FUNCTION(0, "GPIO111"), + MTK_FUNCTION(1, "MSDC0_DAT6"), + MTK_FUNCTION(4, "NLD6") + ), + MTK_PIN( + PINCTRL_PIN(112, "MSDC0_DAT5"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 112), + MTK_FUNCTION(0, "GPIO112"), + MTK_FUNCTION(1, "MSDC0_DAT5"), + MTK_FUNCTION(4, "NLD4") + ), + MTK_PIN( + PINCTRL_PIN(113, "MSDC0_DAT4"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 113), + MTK_FUNCTION(0, "GPIO113"), + MTK_FUNCTION(1, "MSDC0_DAT4"), + MTK_FUNCTION(4, "NLD3") + ), + MTK_PIN( + PINCTRL_PIN(114, "MSDC0_RSTB"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 114), + MTK_FUNCTION(0, "GPIO114"), + MTK_FUNCTION(1, "MSDC0_RSTB"), + MTK_FUNCTION(4, "NLD0") + ), + MTK_PIN( + PINCTRL_PIN(115, "MSDC0_CMD"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 115), + MTK_FUNCTION(0, "GPIO115"), + MTK_FUNCTION(1, "MSDC0_CMD"), + MTK_FUNCTION(4, "NALE") + ), + MTK_PIN( + PINCTRL_PIN(116, "MSDC0_CLK"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 116), + MTK_FUNCTION(0, "GPIO116"), + MTK_FUNCTION(1, "MSDC0_CLK"), + MTK_FUNCTION(4, "NWEB") + ), + MTK_PIN( + PINCTRL_PIN(117, "MSDC0_DAT3"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 117), + MTK_FUNCTION(0, "GPIO117"), + MTK_FUNCTION(1, "MSDC0_DAT3"), + MTK_FUNCTION(4, "NLD1") + ), + MTK_PIN( + PINCTRL_PIN(118, "MSDC0_DAT2"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 118), + MTK_FUNCTION(0, "GPIO118"), + MTK_FUNCTION(1, "MSDC0_DAT2"), + MTK_FUNCTION(4, "NLD5") + ), + MTK_PIN( + PINCTRL_PIN(119, "MSDC0_DAT1"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 119), + MTK_FUNCTION(0, "GPIO119"), + MTK_FUNCTION(1, "MSDC0_DAT1"), + MTK_FUNCTION(4, "NLD8") + ), + MTK_PIN( + PINCTRL_PIN(120, "MSDC0_DAT0"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 120), + MTK_FUNCTION(0, "GPIO120"), + MTK_FUNCTION(1, "MSDC0_DAT0"), + MTK_FUNCTION(4, "WATCHDOG"), + MTK_FUNCTION(5, "NLD2") + ), + MTK_PIN( + PINCTRL_PIN(121, "CEC"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 121), + MTK_FUNCTION(0, "GPIO121"), + MTK_FUNCTION(1, "CEC") + ), + MTK_PIN( + PINCTRL_PIN(122, "HTPLG"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 122), + MTK_FUNCTION(0, "GPIO122"), + MTK_FUNCTION(1, "HTPLG") + ), + MTK_PIN( + PINCTRL_PIN(123, "HDMISCK"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 123), + MTK_FUNCTION(0, "GPIO123"), + MTK_FUNCTION(1, "HDMISCK") + ), + MTK_PIN( + PINCTRL_PIN(124, "HDMISD"), + NULL, "mt8167", + MTK_EINT_FUNCTION(0, 124), + MTK_FUNCTION(0, "GPIO124"), + MTK_FUNCTION(1, "HDMISD") + ), +}; + +#endif /* __PINCTRL_MTK_MT8167_H */ From c8d55a22bc54e9b91f8d37feaa154313d3798847 Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Wed, 8 Jul 2020 18:48:24 +0100 Subject: [PATCH 268/433] dt-bindings: serial: renesas, scif: Document r8a774e1 bindings RZ/G2H (R8A774E1) SoC also has the R-Car gen3 compatible SCIF ports, so document the SoC specific bindings. Reviewed-by: Geert Uytterhoeven Acked-by: Rob Herring Signed-off-by: Lad Prabhakar Link: https://lore.kernel.org/r/1594230511-24790-2-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/serial/renesas,scif.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/serial/renesas,scif.yaml b/Documentation/devicetree/bindings/serial/renesas,scif.yaml index 570b379f9f19..f589ac7577ae 100644 --- a/Documentation/devicetree/bindings/serial/renesas,scif.yaml +++ b/Documentation/devicetree/bindings/serial/renesas,scif.yaml @@ -51,6 +51,7 @@ properties: - renesas,scif-r8a774a1 # RZ/G2M - renesas,scif-r8a774b1 # RZ/G2N - renesas,scif-r8a774c0 # RZ/G2E + - renesas,scif-r8a774e1 # RZ/G2H - renesas,scif-r8a7795 # R-Car H3 - renesas,scif-r8a7796 # R-Car M3-W - renesas,scif-r8a77961 # R-Car M3-W+ From 7d2bfdf1fa310728d9ce8baca3b691b4eecdeef0 Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Wed, 8 Jul 2020 18:48:25 +0100 Subject: [PATCH 269/433] dt-bindings: serial: renesas, hscif: Document r8a774e1 bindings RZ/G2H (R8A774E1) SoC also has the R-Car gen3 compatible HSCIF ports, so document the SoC specific bindings. Reviewed-by: Geert Uytterhoeven Acked-by: Rob Herring Signed-off-by: Lad Prabhakar Link: https://lore.kernel.org/r/1594230511-24790-3-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/serial/renesas,hscif.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/serial/renesas,hscif.yaml b/Documentation/devicetree/bindings/serial/renesas,hscif.yaml index 6b04c0451d41..9fb87a648c1b 100644 --- a/Documentation/devicetree/bindings/serial/renesas,hscif.yaml +++ b/Documentation/devicetree/bindings/serial/renesas,hscif.yaml @@ -42,6 +42,7 @@ properties: - renesas,hscif-r8a774a1 # RZ/G2M - renesas,hscif-r8a774b1 # RZ/G2N - renesas,hscif-r8a774c0 # RZ/G2E + - renesas,hscif-r8a774e1 # RZ/G2H - renesas,hscif-r8a7795 # R-Car H3 - renesas,hscif-r8a7796 # R-Car M3-W - renesas,hscif-r8a77961 # R-Car M3-W+ From 290ff182e92a3de286440c33990c98569ac329f4 Mon Sep 17 00:00:00 2001 From: Julia Lawall Date: Sun, 20 Sep 2020 13:26:13 +0200 Subject: [PATCH 270/433] pch_uart: drop double zeroing sg_init_table zeroes its first argument, so the allocation of that argument doesn't have to. the semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // @@ expression x,n,flags; @@ x = - kcalloc + kmalloc_array (n,sizeof(struct scatterlist),flags) ... sg_init_table(x,n) // Signed-off-by: Julia Lawall Link: https://lore.kernel.org/r/1600601186-7420-2-git-send-email-Julia.Lawall@inria.fr Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/pch_uart.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/tty/serial/pch_uart.c b/drivers/tty/serial/pch_uart.c index 67aca8cb9cd4..a7363bc66c11 100644 --- a/drivers/tty/serial/pch_uart.c +++ b/drivers/tty/serial/pch_uart.c @@ -981,7 +981,7 @@ static unsigned int dma_handle_tx(struct eg20t_port *priv) priv->tx_dma_use = 1; - priv->sg_tx_p = kcalloc(num, sizeof(struct scatterlist), GFP_ATOMIC); + priv->sg_tx_p = kmalloc_array(num, sizeof(struct scatterlist), GFP_ATOMIC); if (!priv->sg_tx_p) { dev_err(priv->port.dev, "%s:kzalloc Failed\n", __func__); return 0; From 75fc65079d8253e1c25a5f8348111a85d71e0f01 Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Sat, 19 Sep 2020 14:35:35 +0800 Subject: [PATCH 271/433] tty: hvc: fix link error with CONFIG_SERIAL_CORE_CONSOLE=n aarch64-linux-gnu-ld: drivers/tty/hvc/hvc_dcc.o: in function `dcc_early_write': hvc_dcc.c:(.text+0x164): undefined reference to `uart_console_write' The driver uses the uart_console_write(), but SERIAL_CORE_CONSOLE is not selected, so uart_console_write is not defined, then we get the error. Fix this by selecting SERIAL_CORE_CONSOLE. Fixes: d1a1af2cdf19 ("hvc: dcc: Add earlycon support") Reported-by: Hulk Robot Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20200919063535.2809707-1-yangyingliang@huawei.com Signed-off-by: Greg Kroah-Hartman --- drivers/tty/hvc/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/tty/hvc/Kconfig b/drivers/tty/hvc/Kconfig index d1b27b0522a3..8d60e0ff67b4 100644 --- a/drivers/tty/hvc/Kconfig +++ b/drivers/tty/hvc/Kconfig @@ -81,6 +81,7 @@ config HVC_DCC bool "ARM JTAG DCC console" depends on ARM || ARM64 select HVC_DRIVER + select SERIAL_CORE_CONSOLE help This console uses the JTAG DCC on ARM to create a console under the HVC driver. This console is used through a JTAG only on ARM. If you don't have From 24c796926e2f88b383a76ddc871a7cdd62484f3a Mon Sep 17 00:00:00 2001 From: Yang Yingliang Date: Sat, 19 Sep 2020 14:32:40 +0800 Subject: [PATCH 272/433] tty: serial: imx: fix link error with CONFIG_SERIAL_CORE_CONSOLE=n aarch64-linux-gnu-ld: drivers/tty/serial/imx_earlycon.o: in function `imx_uart_console_early_write': imx_earlycon.c:(.text+0x84): undefined reference to `uart_console_write' The driver uses the uart_console_write(), but SERIAL_CORE_CONSOLE is not selected, so uart_console_write is not defined, then we get the error. Fix this by selecting SERIAL_CORE_CONSOLE. Fixes: 699cc4dfd140 ("tty: serial: imx: add imx earlycon driver") Reported-by: Hulk Robot Signed-off-by: Yang Yingliang Link: https://lore.kernel.org/r/20200919063240.2754965-1-yangyingliang@huawei.com Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig index 54586c1aba60..20b98a3ba046 100644 --- a/drivers/tty/serial/Kconfig +++ b/drivers/tty/serial/Kconfig @@ -521,6 +521,7 @@ config SERIAL_IMX_EARLYCON depends on ARCH_MXC || COMPILE_TEST depends on OF select SERIAL_EARLYCON + select SERIAL_CORE_CONSOLE help If you have enabled the earlycon on the Freescale IMX CPU you can make it the earlycon by answering Y to this option. From b63537020db34ac3f88086095cc49df65283fb61 Mon Sep 17 00:00:00 2001 From: Qinglang Miao Date: Mon, 21 Sep 2020 21:11:05 +0800 Subject: [PATCH 273/433] serial: mvebu-uart: simplify the return expression of mvebu_uart_probe() Simplify the return expression. Signed-off-by: Qinglang Miao Link: https://lore.kernel.org/r/20200921131105.93177-1-miaoqinglang@huawei.com Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/mvebu-uart.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/tty/serial/mvebu-uart.c b/drivers/tty/serial/mvebu-uart.c index 4e9a590712cb..7443c0506eb4 100644 --- a/drivers/tty/serial/mvebu-uart.c +++ b/drivers/tty/serial/mvebu-uart.c @@ -912,10 +912,7 @@ static int mvebu_uart_probe(struct platform_device *pdev) udelay(1); writel(0, port->membase + UART_CTRL(port)); - ret = uart_add_one_port(&mvebu_uart_driver, port); - if (ret) - return ret; - return 0; + return uart_add_one_port(&mvebu_uart_driver, port); } static struct mvebu_uart_driver_data uart_std_driver_data = { From 988d0763361bb65690d60e2bc53a6b72777040c3 Mon Sep 17 00:00:00 2001 From: Tetsuo Handa Date: Sun, 27 Sep 2020 20:46:30 +0900 Subject: [PATCH 274/433] vt_ioctl: make VT_RESIZEX behave like VT_RESIZE syzbot is reporting UAF/OOB read at bit_putcs()/soft_cursor() [1][2], for vt_resizex() from ioctl(VT_RESIZEX) allows setting font height larger than actual font height calculated by con_font_set() from ioctl(PIO_FONT). Since fbcon_set_font() from con_font_set() allocates minimal amount of memory based on actual font height calculated by con_font_set(), use of vt_resizex() can cause UAF/OOB read for font data. VT_RESIZEX was introduced in Linux 1.3.3, but it is unclear that what comes to the "+ more" part, and I couldn't find a user of VT_RESIZEX. #define VT_RESIZE 0x5609 /* set kernel's idea of screensize */ #define VT_RESIZEX 0x560A /* set kernel's idea of screensize + more */ So far we are not aware of syzbot reports caused by setting non-zero value to v_vlin parameter. But given that it is possible that nobody is using VT_RESIZEX, we can try removing support for v_clin and v_vlin parameters. Therefore, this patch effectively makes VT_RESIZEX behave like VT_RESIZE, with emitting a message if somebody is still using v_clin and/or v_vlin parameters. [1] https://syzkaller.appspot.com/bug?id=32577e96d88447ded2d3b76d71254fb855245837 [2] https://syzkaller.appspot.com/bug?id=6b8355d27b2b94fb5cedf4655e3a59162d9e48e3 Reported-by: syzbot Reported-by: syzbot Signed-off-by: Tetsuo Handa Cc: stable Link: https://lore.kernel.org/r/4933b81b-9b1a-355b-df0e-9b31e8280ab9@i-love.sakura.ne.jp Signed-off-by: Greg Kroah-Hartman --- drivers/tty/vt/vt_ioctl.c | 57 +++++++-------------------------------- 1 file changed, 10 insertions(+), 47 deletions(-) diff --git a/drivers/tty/vt/vt_ioctl.c b/drivers/tty/vt/vt_ioctl.c index 2ea76a09e07f..0a33b8ababe3 100644 --- a/drivers/tty/vt/vt_ioctl.c +++ b/drivers/tty/vt/vt_ioctl.c @@ -772,58 +772,21 @@ static int vt_resizex(struct vc_data *vc, struct vt_consize __user *cs) if (copy_from_user(&v, cs, sizeof(struct vt_consize))) return -EFAULT; - /* FIXME: Should check the copies properly */ - if (!v.v_vlin) - v.v_vlin = vc->vc_scan_lines; - - if (v.v_clin) { - int rows = v.v_vlin / v.v_clin; - if (v.v_rows != rows) { - if (v.v_rows) /* Parameters don't add up */ - return -EINVAL; - v.v_rows = rows; - } - } - - if (v.v_vcol && v.v_ccol) { - int cols = v.v_vcol / v.v_ccol; - if (v.v_cols != cols) { - if (v.v_cols) - return -EINVAL; - v.v_cols = cols; - } - } - - if (v.v_clin > 32) - return -EINVAL; + if (v.v_vlin) + pr_info_once("\"struct vt_consize\"->v_vlin is ignored. Please report if you need this.\n"); + if (v.v_clin) + pr_info_once("\"struct vt_consize\"->v_clin is ignored. Please report if you need this.\n"); + console_lock(); for (i = 0; i < MAX_NR_CONSOLES; i++) { - struct vc_data *vcp; + vc = vc_cons[i].d; - if (!vc_cons[i].d) - continue; - console_lock(); - vcp = vc_cons[i].d; - if (vcp) { - int ret; - int save_scan_lines = vcp->vc_scan_lines; - int save_font_height = vcp->vc_font.height; - - if (v.v_vlin) - vcp->vc_scan_lines = v.v_vlin; - if (v.v_clin) - vcp->vc_font.height = v.v_clin; - vcp->vc_resize_user = 1; - ret = vc_resize(vcp, v.v_cols, v.v_rows); - if (ret) { - vcp->vc_scan_lines = save_scan_lines; - vcp->vc_font.height = save_font_height; - console_unlock(); - return ret; - } + if (vc) { + vc->vc_resize_user = 1; + vc_resize(vc, v.v_cols, v.v_rows); } - console_unlock(); } + console_unlock(); return 0; } From e5e5fcef600e94d83c6542cdcca3ab6dada95946 Mon Sep 17 00:00:00 2001 From: Jim Cromie Date: Mon, 21 Sep 2020 13:04:33 -0600 Subject: [PATCH 275/433] dyndbg: use keyword, arg varnames for query term pairs optimize for clarity by replacing word[i,i+1] refs with temps. no functional changes. Signed-off-by: Jim Cromie Link: https://lore.kernel.org/r/20200921190433.1149521-3-jim.cromie@gmail.com Signed-off-by: Greg Kroah-Hartman --- lib/dynamic_debug.c | 27 +++++++++++++++------------ 1 file changed, 15 insertions(+), 12 deletions(-) diff --git a/lib/dynamic_debug.c b/lib/dynamic_debug.c index 2d4dfd44b0fa..bd7b3aaa93c3 100644 --- a/lib/dynamic_debug.c +++ b/lib/dynamic_debug.c @@ -384,10 +384,13 @@ static int ddebug_parse_query(char *words[], int nwords, query->module = modname; for (i = 0; i < nwords; i += 2) { - if (!strcmp(words[i], "func")) { - rc = check_set(&query->function, words[i+1], "func"); - } else if (!strcmp(words[i], "file")) { - if (check_set(&query->filename, words[i+1], "file")) + char *keyword = words[i]; + char *arg = words[i+1]; + + if (!strcmp(keyword, "func")) { + rc = check_set(&query->function, arg, "func"); + } else if (!strcmp(keyword, "file")) { + if (check_set(&query->filename, arg, "file")) return -EINVAL; /* tail :$info is function or line-range */ @@ -403,18 +406,18 @@ static int ddebug_parse_query(char *words[], int nwords, if (parse_linerange(query, fline)) return -EINVAL; } - } else if (!strcmp(words[i], "module")) { - rc = check_set(&query->module, words[i+1], "module"); - } else if (!strcmp(words[i], "format")) { - string_unescape_inplace(words[i+1], UNESCAPE_SPACE | + } else if (!strcmp(keyword, "module")) { + rc = check_set(&query->module, arg, "module"); + } else if (!strcmp(keyword, "format")) { + string_unescape_inplace(arg, UNESCAPE_SPACE | UNESCAPE_OCTAL | UNESCAPE_SPECIAL); - rc = check_set(&query->format, words[i+1], "format"); - } else if (!strcmp(words[i], "line")) { - if (parse_linerange(query, words[i+1])) + rc = check_set(&query->format, arg, "format"); + } else if (!strcmp(keyword, "line")) { + if (parse_linerange(query, arg)) return -EINVAL; } else { - pr_err("unknown keyword \"%s\"\n", words[i]); + pr_err("unknown keyword \"%s\"\n", keyword); return -EINVAL; } if (rc) From 58e49346672f738cf6eeb62009a5b0ae194374c4 Mon Sep 17 00:00:00 2001 From: Qinglang Miao Date: Tue, 29 Sep 2020 16:56:51 +0800 Subject: [PATCH 276/433] serial: mvebu-uart: fix unused variable warning There's a warning shows that 'ret' becomes an unused variable after simplify the return expression of mvebu_uart_probe(). So remove it. Fixes: b63537020db3 ("serial: mvebu-uart: simplify the return expression of mvebu_uart_probe()") Reported-by: Stephen Rothwell Signed-off-by: Qinglang Miao Link: https://lore.kernel.org/r/20200929085651.158283-1-miaoqinglang@huawei.com Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/mvebu-uart.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/tty/serial/mvebu-uart.c b/drivers/tty/serial/mvebu-uart.c index 7443c0506eb4..118b29912289 100644 --- a/drivers/tty/serial/mvebu-uart.c +++ b/drivers/tty/serial/mvebu-uart.c @@ -803,7 +803,7 @@ static int mvebu_uart_probe(struct platform_device *pdev) &pdev->dev); struct uart_port *port; struct mvebu_uart *mvuart; - int ret, id, irq; + int id, irq; if (!reg) { dev_err(&pdev->dev, "no registers defined\n"); From 07ae3f0784c14c3ae8e20ed11c62139f45a8ac7b Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Tue, 8 Sep 2020 16:11:59 +0800 Subject: [PATCH 277/433] pinctrl: imx: Use function callbacks for SCU related functions Use function callbacks for SCU related functions in pinctrl-imx.c in order to support the scenario of PINCTRL_IMX is built in while PINCTRL_IMX_SCU is built as module, all drivers using SCU pinctrl driver need to initialize the SCU related function callback, and no need to check CONFIG_PINCTRL_IMX_SCU anymore, hence stub functions also can be removed. Signed-off-by: Anson Huang Reviewed-by: Dong Aisheng Link: https://lore.kernel.org/r/1599552721-24872-1-git-send-email-Anson.Huang@nxp.com Signed-off-by: Linus Walleij --- drivers/pinctrl/freescale/pinctrl-imx.c | 8 +-- drivers/pinctrl/freescale/pinctrl-imx.h | 57 ++++++++------------- drivers/pinctrl/freescale/pinctrl-imx8dxl.c | 3 ++ drivers/pinctrl/freescale/pinctrl-imx8qm.c | 3 ++ drivers/pinctrl/freescale/pinctrl-imx8qxp.c | 3 ++ 5 files changed, 35 insertions(+), 39 deletions(-) diff --git a/drivers/pinctrl/freescale/pinctrl-imx.c b/drivers/pinctrl/freescale/pinctrl-imx.c index 507e4affcd73..b80c450819e5 100644 --- a/drivers/pinctrl/freescale/pinctrl-imx.c +++ b/drivers/pinctrl/freescale/pinctrl-imx.c @@ -373,7 +373,7 @@ static int imx_pinconf_get(struct pinctrl_dev *pctldev, const struct imx_pinctrl_soc_info *info = ipctl->info; if (info->flags & IMX_USE_SCU) - return imx_pinconf_get_scu(pctldev, pin_id, config); + return info->imx_pinconf_get(pctldev, pin_id, config); else return imx_pinconf_get_mmio(pctldev, pin_id, config); } @@ -423,7 +423,7 @@ static int imx_pinconf_set(struct pinctrl_dev *pctldev, const struct imx_pinctrl_soc_info *info = ipctl->info; if (info->flags & IMX_USE_SCU) - return imx_pinconf_set_scu(pctldev, pin_id, + return info->imx_pinconf_set(pctldev, pin_id, configs, num_configs); else return imx_pinconf_set_mmio(pctldev, pin_id, @@ -440,7 +440,7 @@ static void imx_pinconf_dbg_show(struct pinctrl_dev *pctldev, int ret; if (info->flags & IMX_USE_SCU) { - ret = imx_pinconf_get_scu(pctldev, pin_id, &config); + ret = info->imx_pinconf_get(pctldev, pin_id, &config); if (ret) { dev_err(ipctl->dev, "failed to get %s pinconf\n", pin_get_name(pctldev, pin_id)); @@ -629,7 +629,7 @@ static int imx_pinctrl_parse_groups(struct device_node *np, for (i = 0; i < grp->num_pins; i++) { pin = &((struct imx_pin *)(grp->data))[i]; if (info->flags & IMX_USE_SCU) - imx_pinctrl_parse_pin_scu(ipctl, &grp->pins[i], + info->imx_pinctrl_parse_pin(ipctl, &grp->pins[i], pin, &list); else imx_pinctrl_parse_pin_mmio(ipctl, &grp->pins[i], diff --git a/drivers/pinctrl/freescale/pinctrl-imx.h b/drivers/pinctrl/freescale/pinctrl-imx.h index 333d32b947b1..fd8c4b6b3e36 100644 --- a/drivers/pinctrl/freescale/pinctrl-imx.h +++ b/drivers/pinctrl/freescale/pinctrl-imx.h @@ -75,6 +75,21 @@ struct imx_cfg_params_decode { bool invert; }; +/** + * @dev: a pointer back to containing device + * @base: the offset to the controller in virtual memory + */ +struct imx_pinctrl { + struct device *dev; + struct pinctrl_dev *pctl; + void __iomem *base; + void __iomem *input_sel_base; + const struct imx_pinctrl_soc_info *info; + struct imx_pin_reg *pin_regs; + unsigned int group_index; + struct mutex mutex; +}; + struct imx_pinctrl_soc_info { const struct pinctrl_pin_desc *pins; unsigned int npins; @@ -98,21 +113,13 @@ struct imx_pinctrl_soc_info { struct pinctrl_gpio_range *range, unsigned offset, bool input); -}; - -/** - * @dev: a pointer back to containing device - * @base: the offset to the controller in virtual memory - */ -struct imx_pinctrl { - struct device *dev; - struct pinctrl_dev *pctl; - void __iomem *base; - void __iomem *input_sel_base; - const struct imx_pinctrl_soc_info *info; - struct imx_pin_reg *pin_regs; - unsigned int group_index; - struct mutex mutex; + int (*imx_pinconf_get)(struct pinctrl_dev *pctldev, unsigned int pin_id, + unsigned long *config); + int (*imx_pinconf_set)(struct pinctrl_dev *pctldev, unsigned int pin_id, + unsigned long *configs, unsigned int num_configs); + void (*imx_pinctrl_parse_pin)(struct imx_pinctrl *ipctl, + unsigned int *pin_id, struct imx_pin *pin, + const __be32 **list_p); }; #define IMX_CFG_PARAMS_DECODE(p, m, o) \ @@ -137,7 +144,6 @@ struct imx_pinctrl { int imx_pinctrl_probe(struct platform_device *pdev, const struct imx_pinctrl_soc_info *info); -#ifdef CONFIG_PINCTRL_IMX_SCU #define BM_PAD_CTL_GP_ENABLE BIT(30) #define BM_PAD_CTL_IFMUX_ENABLE BIT(31) #define BP_PAD_CTL_IFMUX 27 @@ -150,23 +156,4 @@ int imx_pinconf_set_scu(struct pinctrl_dev *pctldev, unsigned pin_id, void imx_pinctrl_parse_pin_scu(struct imx_pinctrl *ipctl, unsigned int *pin_id, struct imx_pin *pin, const __be32 **list_p); -#else -static inline int imx_pinconf_get_scu(struct pinctrl_dev *pctldev, - unsigned pin_id, unsigned long *config) -{ - return -EINVAL; -} -static inline int imx_pinconf_set_scu(struct pinctrl_dev *pctldev, - unsigned pin_id, unsigned long *configs, - unsigned num_configs) -{ - return -EINVAL; -} -static inline void imx_pinctrl_parse_pin_scu(struct imx_pinctrl *ipctl, - unsigned int *pin_id, - struct imx_pin *pin, - const __be32 **list_p) -{ -} -#endif #endif /* __DRIVERS_PINCTRL_IMX_H */ diff --git a/drivers/pinctrl/freescale/pinctrl-imx8dxl.c b/drivers/pinctrl/freescale/pinctrl-imx8dxl.c index 12b97daa0407..d3020c0cd55d 100644 --- a/drivers/pinctrl/freescale/pinctrl-imx8dxl.c +++ b/drivers/pinctrl/freescale/pinctrl-imx8dxl.c @@ -159,6 +159,9 @@ static struct imx_pinctrl_soc_info imx8dxl_pinctrl_info = { .pins = imx8dxl_pinctrl_pads, .npins = ARRAY_SIZE(imx8dxl_pinctrl_pads), .flags = IMX_USE_SCU, + .imx_pinconf_get = imx_pinconf_get_scu, + .imx_pinconf_set = imx_pinconf_set_scu, + .imx_pinctrl_parse_pin = imx_pinctrl_parse_pin_scu, }; static const struct of_device_id imx8dxl_pinctrl_of_match[] = { diff --git a/drivers/pinctrl/freescale/pinctrl-imx8qm.c b/drivers/pinctrl/freescale/pinctrl-imx8qm.c index 095acf494641..8f46b9404cd7 100644 --- a/drivers/pinctrl/freescale/pinctrl-imx8qm.c +++ b/drivers/pinctrl/freescale/pinctrl-imx8qm.c @@ -292,6 +292,9 @@ static const struct imx_pinctrl_soc_info imx8qm_pinctrl_info = { .pins = imx8qm_pinctrl_pads, .npins = ARRAY_SIZE(imx8qm_pinctrl_pads), .flags = IMX_USE_SCU, + .imx_pinconf_get = imx_pinconf_get_scu, + .imx_pinconf_set = imx_pinconf_set_scu, + .imx_pinctrl_parse_pin = imx_pinctrl_parse_pin_scu, }; static const struct of_device_id imx8qm_pinctrl_of_match[] = { diff --git a/drivers/pinctrl/freescale/pinctrl-imx8qxp.c b/drivers/pinctrl/freescale/pinctrl-imx8qxp.c index 81ebd4c952ec..6776ad6a3a27 100644 --- a/drivers/pinctrl/freescale/pinctrl-imx8qxp.c +++ b/drivers/pinctrl/freescale/pinctrl-imx8qxp.c @@ -198,6 +198,9 @@ static struct imx_pinctrl_soc_info imx8qxp_pinctrl_info = { .pins = imx8qxp_pinctrl_pads, .npins = ARRAY_SIZE(imx8qxp_pinctrl_pads), .flags = IMX_USE_SCU, + .imx_pinconf_get = imx_pinconf_get_scu, + .imx_pinconf_set = imx_pinconf_set_scu, + .imx_pinctrl_parse_pin = imx_pinctrl_parse_pin_scu, }; static const struct of_device_id imx8qxp_pinctrl_of_match[] = { From 0080c5342826ad2b0df7e8804f94dd65836ecff6 Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Tue, 8 Sep 2020 16:12:00 +0800 Subject: [PATCH 278/433] pinctrl: imx: Support building SCU pinctrl core driver as module Change PINCTR_IMX_SCU to tristate, add module author, description and license to support building SCU pinctrl core driver as module. Signed-off-by: Anson Huang Reviewed-by: Dong Aisheng Link: https://lore.kernel.org/r/1599552721-24872-2-git-send-email-Anson.Huang@nxp.com Signed-off-by: Linus Walleij --- drivers/pinctrl/freescale/Kconfig | 2 +- drivers/pinctrl/freescale/pinctrl-scu.c | 5 +++++ 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/freescale/Kconfig b/drivers/pinctrl/freescale/Kconfig index 08fcf5c79296..71989162c4bc 100644 --- a/drivers/pinctrl/freescale/Kconfig +++ b/drivers/pinctrl/freescale/Kconfig @@ -7,7 +7,7 @@ config PINCTRL_IMX select REGMAP config PINCTRL_IMX_SCU - bool + tristate depends on IMX_SCU select PINCTRL_IMX diff --git a/drivers/pinctrl/freescale/pinctrl-scu.c b/drivers/pinctrl/freescale/pinctrl-scu.c index 9df45d3e3226..59b5f8a35111 100644 --- a/drivers/pinctrl/freescale/pinctrl-scu.c +++ b/drivers/pinctrl/freescale/pinctrl-scu.c @@ -7,6 +7,7 @@ #include #include +#include #include #include #include @@ -123,3 +124,7 @@ void imx_pinctrl_parse_pin_scu(struct imx_pinctrl *ipctl, pin_scu->mux_mode, pin_scu->config); } EXPORT_SYMBOL_GPL(imx_pinctrl_parse_pin_scu); + +MODULE_AUTHOR("Dong Aisheng "); +MODULE_DESCRIPTION("NXP i.MX SCU common pinctrl driver"); +MODULE_LICENSE("GPL v2"); From 7233f7cf4b025ce3bddf9ae34cab45fba74c9ea0 Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Tue, 8 Sep 2020 16:12:01 +0800 Subject: [PATCH 279/433] pinctrl: imx: Support building i.MX pinctrl core driver as module Change PINCTRL_IMX to tristate to support loadable module build. And i.MX common pinctrl driver should depend on CONFIG_OF to make sure no build error when i.MX common pinctrl driver is enabled for different architectures without CONFIG_OF. Also add module author, description and license. Signed-off-by: Anson Huang Reviewed-by: Dong Aisheng Link: https://lore.kernel.org/r/1599552721-24872-3-git-send-email-Anson.Huang@nxp.com Signed-off-by: Linus Walleij --- drivers/pinctrl/freescale/Kconfig | 3 ++- drivers/pinctrl/freescale/pinctrl-imx.c | 5 +++++ 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/freescale/Kconfig b/drivers/pinctrl/freescale/Kconfig index 71989162c4bc..a1fbb3b9ae34 100644 --- a/drivers/pinctrl/freescale/Kconfig +++ b/drivers/pinctrl/freescale/Kconfig @@ -1,6 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only config PINCTRL_IMX - bool + tristate + depends on OF select GENERIC_PINCTRL_GROUPS select GENERIC_PINMUX_FUNCTIONS select GENERIC_PINCONF diff --git a/drivers/pinctrl/freescale/pinctrl-imx.c b/drivers/pinctrl/freescale/pinctrl-imx.c index b80c450819e5..daf28bc5661d 100644 --- a/drivers/pinctrl/freescale/pinctrl-imx.c +++ b/drivers/pinctrl/freescale/pinctrl-imx.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -898,3 +899,7 @@ const struct dev_pm_ops imx_pinctrl_pm_ops = { imx_pinctrl_resume) }; EXPORT_SYMBOL_GPL(imx_pinctrl_pm_ops); + +MODULE_AUTHOR("Dong Aisheng "); +MODULE_DESCRIPTION("NXP i.MX common pinctrl driver"); +MODULE_LICENSE("GPL v2"); From cdfd8606e096a94265984efc247e938f8dad8034 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 28 Sep 2020 20:45:15 +0200 Subject: [PATCH 280/433] dt-bindings: pinctrl: renesas,pfc: align example GPIO hog name with dtschema The convention for node names is to use hyphens, not underscores. dtschema expects GPIO hogs to end with 'hog' suffix. Adjust the example DTS in the binding. No changes to binding itself. Reported-by: Rob Herring Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20200928184515.7345-1-krzk@kernel.org Signed-off-by: Linus Walleij --- Documentation/devicetree/bindings/pinctrl/renesas,pfc.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,pfc.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,pfc.yaml index 4efe117550bd..5b5b1b9d2ec7 100644 --- a/Documentation/devicetree/bindings/pinctrl/renesas,pfc.yaml +++ b/Documentation/devicetree/bindings/pinctrl/renesas,pfc.yaml @@ -148,7 +148,7 @@ examples: <&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>; power-domains = <&pd_c5>; - lcd0_mux { + lcd0-mux-hog { /* DBGMD/LCDC0/FSIA MUX */ gpio-hog; gpios = <176 0>; From 7e8d8ac78f35b2fc8cb1548f4ea5f5d9eaf3b3f8 Mon Sep 17 00:00:00 2001 From: Andrew Jeffery Date: Thu, 10 Sep 2020 12:26:29 +0930 Subject: [PATCH 281/433] pinctrl: aspeed: Format pinconf debug consistent with pinmux When displaying which pinconf register and field is being touched, format the field mask so that it's consistent with the way the pinmux portion formats the mask. Signed-off-by: Andrew Jeffery Reviewed-by: Joel Stanley Link: https://lore.kernel.org/r/20200910025631.2996342-2-andrew@aj.id.au Signed-off-by: Linus Walleij --- drivers/pinctrl/aspeed/pinctrl-aspeed.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed.c b/drivers/pinctrl/aspeed/pinctrl-aspeed.c index 53f3f8aec695..2e0260c1a57c 100644 --- a/drivers/pinctrl/aspeed/pinctrl-aspeed.c +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed.c @@ -539,9 +539,9 @@ int aspeed_pin_config_set(struct pinctrl_dev *pctldev, unsigned int offset, if (rc < 0) return rc; - pr_debug("%s: Set SCU%02X[%lu]=%d for param %d(=%d) on pin %d\n", - __func__, pconf->reg, __ffs(pconf->mask), - pmap->val, param, arg, offset); + pr_debug("%s: Set SCU%02X[0x%08X]=0x%X for param %d(=%d) on pin %d\n", + __func__, pconf->reg, pconf->mask, + val, param, arg, offset); } return 0; From 1d6db5ae6b090d1a8edfcb36b9bf47c5f4fe27f6 Mon Sep 17 00:00:00 2001 From: Andrew Jeffery Date: Thu, 10 Sep 2020 12:26:30 +0930 Subject: [PATCH 282/433] pinctrl: aspeed: Use the right pinconf mask The Aspeed pinconf data structures are split into 'conf' and 'map' types, where the 'conf' struct defines which register and bitfield to manipulate, while the 'map' struct defines what value to write to the register and bitfield. Both structs have a mask member, and the wrong mask was being used to tell the regmap which bits to update. A todo is to look at whether we can remove the mask from the 'map' struct. Fixes: 5f52c853847f ("pinctrl: aspeed: Use masks to describe pinconf bitfields") Signed-off-by: Andrew Jeffery Reviewed-by: Joel Stanley Cc: Johnny Huang Link: https://lore.kernel.org/r/20200910025631.2996342-3-andrew@aj.id.au Signed-off-by: Linus Walleij --- drivers/pinctrl/aspeed/pinctrl-aspeed.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed.c b/drivers/pinctrl/aspeed/pinctrl-aspeed.c index 2e0260c1a57c..6a94eaecf638 100644 --- a/drivers/pinctrl/aspeed/pinctrl-aspeed.c +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed.c @@ -534,7 +534,7 @@ int aspeed_pin_config_set(struct pinctrl_dev *pctldev, unsigned int offset, val = pmap->val << __ffs(pconf->mask); rc = regmap_update_bits(pdata->scu, pconf->reg, - pmap->mask, val); + pconf->mask, val); if (rc < 0) return rc; From 05c0a8a9feda386f7ba4ee65f07f2541cead369f Mon Sep 17 00:00:00 2001 From: Andrew Jeffery Date: Thu, 10 Sep 2020 12:26:31 +0930 Subject: [PATCH 283/433] pinctrl: aspeed-g6: Add bias controls for 1.8V GPIO banks These were skipped in the original patches adding pinconf support for the AST2600. Signed-off-by: Andrew Jeffery Reviewed-by: Joel Stanley Cc: Johnny Huang Link: https://lore.kernel.org/r/20200910025631.2996342-4-andrew@aj.id.au Signed-off-by: Linus Walleij --- drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c index 7efe6dbe4398..34803a6c7664 100644 --- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c @@ -19,6 +19,7 @@ #define SCU400 0x400 /* Multi-function Pin Control #1 */ #define SCU404 0x404 /* Multi-function Pin Control #2 */ +#define SCU40C 0x40C /* Multi-function Pin Control #3 */ #define SCU410 0x410 /* Multi-function Pin Control #4 */ #define SCU414 0x414 /* Multi-function Pin Control #5 */ #define SCU418 0x418 /* Multi-function Pin Control #6 */ @@ -2591,6 +2592,22 @@ static struct aspeed_pin_config aspeed_g6_configs[] = { /* MAC4 */ { PIN_CONFIG_POWER_SOURCE, { F24, B24 }, SCU458, BIT_MASK(5)}, { PIN_CONFIG_DRIVE_STRENGTH, { F24, B24 }, SCU458, GENMASK(3, 2)}, + + /* GPIO18E */ + ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, Y1, Y4, SCU40C, 4), + ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, Y1, Y4, SCU40C, 4), + /* GPIO18D */ + ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, AB4, AC5, SCU40C, 3), + ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, AB4, AC5, SCU40C, 3), + /* GPIO18C */ + ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, E4, E1, SCU40C, 2), + ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, E4, E1, SCU40C, 2), + /* GPIO18B */ + ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, B2, D3, SCU40C, 1), + ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, B2, D3, SCU40C, 1), + /* GPIO18A */ + ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, C6, A2, SCU40C, 0), + ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, C6, A2, SCU40C, 0), }; /** From d3ef8c6b22861232d38934aa9b85123fdd6563b5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=E5=91=A8=E7=90=B0=E6=9D=B0=20=28Zhou=20Yanjie=29?= Date: Sun, 13 Sep 2020 14:58:34 +0800 Subject: [PATCH 284/433] pinctrl: Ingenic: Add SSI pins support for JZ4770 and JZ4780. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add SSI pins support for the JZ4770 SoC and the JZ4780 SoC from Ingenic. Signed-off-by: 周琰杰 (Zhou Yanjie) Reviewed-by: Paul Cercueil Link: https://lore.kernel.org/r/20200913065836.12156-2-zhouyanjie@wanyeetech.com Signed-off-by: Linus Walleij --- drivers/pinctrl/pinctrl-ingenic.c | 267 ++++++++++++++++++++++++++++++ 1 file changed, 267 insertions(+) diff --git a/drivers/pinctrl/pinctrl-ingenic.c b/drivers/pinctrl/pinctrl-ingenic.c index a8d1b53ec4c1..00f29fd684fa 100644 --- a/drivers/pinctrl/pinctrl-ingenic.c +++ b/drivers/pinctrl/pinctrl-ingenic.c @@ -633,6 +633,46 @@ static int jz4770_uart2_data_pins[] = { 0x5c, 0x5e, }; static int jz4770_uart2_hwflow_pins[] = { 0x5d, 0x5f, }; static int jz4770_uart3_data_pins[] = { 0x6c, 0x85, }; static int jz4770_uart3_hwflow_pins[] = { 0x88, 0x89, }; +static int jz4770_ssi0_dt_a_pins[] = { 0x15, }; +static int jz4770_ssi0_dt_b_pins[] = { 0x35, }; +static int jz4770_ssi0_dt_d_pins[] = { 0x55, }; +static int jz4770_ssi0_dt_e_pins[] = { 0x71, }; +static int jz4770_ssi0_dr_a_pins[] = { 0x14, }; +static int jz4770_ssi0_dr_b_pins[] = { 0x34, }; +static int jz4770_ssi0_dr_d_pins[] = { 0x54, }; +static int jz4770_ssi0_dr_e_pins[] = { 0x6e, }; +static int jz4770_ssi0_clk_a_pins[] = { 0x12, }; +static int jz4770_ssi0_clk_b_pins[] = { 0x3c, }; +static int jz4770_ssi0_clk_d_pins[] = { 0x58, }; +static int jz4770_ssi0_clk_e_pins[] = { 0x6f, }; +static int jz4770_ssi0_gpc_b_pins[] = { 0x3e, }; +static int jz4770_ssi0_gpc_d_pins[] = { 0x56, }; +static int jz4770_ssi0_gpc_e_pins[] = { 0x73, }; +static int jz4770_ssi0_ce0_a_pins[] = { 0x13, }; +static int jz4770_ssi0_ce0_b_pins[] = { 0x3d, }; +static int jz4770_ssi0_ce0_d_pins[] = { 0x59, }; +static int jz4770_ssi0_ce0_e_pins[] = { 0x70, }; +static int jz4770_ssi0_ce1_b_pins[] = { 0x3f, }; +static int jz4770_ssi0_ce1_d_pins[] = { 0x57, }; +static int jz4770_ssi0_ce1_e_pins[] = { 0x72, }; +static int jz4770_ssi1_dt_b_pins[] = { 0x35, }; +static int jz4770_ssi1_dt_d_pins[] = { 0x55, }; +static int jz4770_ssi1_dt_e_pins[] = { 0x71, }; +static int jz4770_ssi1_dr_b_pins[] = { 0x34, }; +static int jz4770_ssi1_dr_d_pins[] = { 0x54, }; +static int jz4770_ssi1_dr_e_pins[] = { 0x6e, }; +static int jz4770_ssi1_clk_b_pins[] = { 0x3c, }; +static int jz4770_ssi1_clk_d_pins[] = { 0x58, }; +static int jz4770_ssi1_clk_e_pins[] = { 0x6f, }; +static int jz4770_ssi1_gpc_b_pins[] = { 0x3e, }; +static int jz4770_ssi1_gpc_d_pins[] = { 0x56, }; +static int jz4770_ssi1_gpc_e_pins[] = { 0x73, }; +static int jz4770_ssi1_ce0_b_pins[] = { 0x3d, }; +static int jz4770_ssi1_ce0_d_pins[] = { 0x59, }; +static int jz4770_ssi1_ce0_e_pins[] = { 0x70, }; +static int jz4770_ssi1_ce1_b_pins[] = { 0x3f, }; +static int jz4770_ssi1_ce1_d_pins[] = { 0x57, }; +static int jz4770_ssi1_ce1_e_pins[] = { 0x72, }; static int jz4770_mmc0_1bit_a_pins[] = { 0x12, 0x13, 0x14, }; static int jz4770_mmc0_4bit_a_pins[] = { 0x15, 0x16, 0x17, }; static int jz4770_mmc0_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, }; @@ -703,6 +743,46 @@ static int jz4770_uart2_data_funcs[] = { 0, 0, }; static int jz4770_uart2_hwflow_funcs[] = { 0, 0, }; static int jz4770_uart3_data_funcs[] = { 0, 1, }; static int jz4770_uart3_hwflow_funcs[] = { 0, 0, }; +static int jz4770_ssi0_dt_a_funcs[] = { 2, }; +static int jz4770_ssi0_dt_b_funcs[] = { 1, }; +static int jz4770_ssi0_dt_d_funcs[] = { 1, }; +static int jz4770_ssi0_dt_e_funcs[] = { 0, }; +static int jz4770_ssi0_dr_a_funcs[] = { 1, }; +static int jz4770_ssi0_dr_b_funcs[] = { 1, }; +static int jz4770_ssi0_dr_d_funcs[] = { 1, }; +static int jz4770_ssi0_dr_e_funcs[] = { 0, }; +static int jz4770_ssi0_clk_a_funcs[] = { 2, }; +static int jz4770_ssi0_clk_b_funcs[] = { 1, }; +static int jz4770_ssi0_clk_d_funcs[] = { 1, }; +static int jz4770_ssi0_clk_e_funcs[] = { 0, }; +static int jz4770_ssi0_gpc_b_funcs[] = { 1, }; +static int jz4770_ssi0_gpc_d_funcs[] = { 1, }; +static int jz4770_ssi0_gpc_e_funcs[] = { 0, }; +static int jz4770_ssi0_ce0_a_funcs[] = { 2, }; +static int jz4770_ssi0_ce0_b_funcs[] = { 1, }; +static int jz4770_ssi0_ce0_d_funcs[] = { 1, }; +static int jz4770_ssi0_ce0_e_funcs[] = { 0, }; +static int jz4770_ssi0_ce1_b_funcs[] = { 1, }; +static int jz4770_ssi0_ce1_d_funcs[] = { 1, }; +static int jz4770_ssi0_ce1_e_funcs[] = { 0, }; +static int jz4770_ssi1_dt_b_funcs[] = { 2, }; +static int jz4770_ssi1_dt_d_funcs[] = { 2, }; +static int jz4770_ssi1_dt_e_funcs[] = { 1, }; +static int jz4770_ssi1_dr_b_funcs[] = { 2, }; +static int jz4770_ssi1_dr_d_funcs[] = { 2, }; +static int jz4770_ssi1_dr_e_funcs[] = { 1, }; +static int jz4770_ssi1_clk_b_funcs[] = { 2, }; +static int jz4770_ssi1_clk_d_funcs[] = { 2, }; +static int jz4770_ssi1_clk_e_funcs[] = { 1, }; +static int jz4770_ssi1_gpc_b_funcs[] = { 2, }; +static int jz4770_ssi1_gpc_d_funcs[] = { 2, }; +static int jz4770_ssi1_gpc_e_funcs[] = { 1, }; +static int jz4770_ssi1_ce0_b_funcs[] = { 2, }; +static int jz4770_ssi1_ce0_d_funcs[] = { 2, }; +static int jz4770_ssi1_ce0_e_funcs[] = { 1, }; +static int jz4770_ssi1_ce1_b_funcs[] = { 2, }; +static int jz4770_ssi1_ce1_d_funcs[] = { 2, }; +static int jz4770_ssi1_ce1_e_funcs[] = { 1, }; static int jz4770_mmc0_1bit_a_funcs[] = { 1, 1, 0, }; static int jz4770_mmc0_4bit_a_funcs[] = { 1, 1, 1, }; static int jz4770_mmc0_1bit_e_funcs[] = { 0, 0, 0, }; @@ -763,6 +843,46 @@ static const struct group_desc jz4770_groups[] = { INGENIC_PIN_GROUP("uart2-hwflow", jz4770_uart2_hwflow), INGENIC_PIN_GROUP("uart3-data", jz4770_uart3_data), INGENIC_PIN_GROUP("uart3-hwflow", jz4770_uart3_hwflow), + INGENIC_PIN_GROUP("ssi0-dt-a", jz4770_ssi0_dt_a), + INGENIC_PIN_GROUP("ssi0-dt-b", jz4770_ssi0_dt_b), + INGENIC_PIN_GROUP("ssi0-dt-d", jz4770_ssi0_dt_d), + INGENIC_PIN_GROUP("ssi0-dt-e", jz4770_ssi0_dt_e), + INGENIC_PIN_GROUP("ssi0-dr-a", jz4770_ssi0_dr_a), + INGENIC_PIN_GROUP("ssi0-dr-b", jz4770_ssi0_dr_b), + INGENIC_PIN_GROUP("ssi0-dr-d", jz4770_ssi0_dr_d), + INGENIC_PIN_GROUP("ssi0-dr-e", jz4770_ssi0_dr_e), + INGENIC_PIN_GROUP("ssi0-clk-a", jz4770_ssi0_clk_a), + INGENIC_PIN_GROUP("ssi0-clk-b", jz4770_ssi0_clk_b), + INGENIC_PIN_GROUP("ssi0-clk-d", jz4770_ssi0_clk_d), + INGENIC_PIN_GROUP("ssi0-clk-e", jz4770_ssi0_clk_e), + INGENIC_PIN_GROUP("ssi0-gpc-b", jz4770_ssi0_gpc_b), + INGENIC_PIN_GROUP("ssi0-gpc-d", jz4770_ssi0_gpc_d), + INGENIC_PIN_GROUP("ssi0-gpc-e", jz4770_ssi0_gpc_e), + INGENIC_PIN_GROUP("ssi0-ce0-a", jz4770_ssi0_ce0_a), + INGENIC_PIN_GROUP("ssi0-ce0-b", jz4770_ssi0_ce0_b), + INGENIC_PIN_GROUP("ssi0-ce0-d", jz4770_ssi0_ce0_d), + INGENIC_PIN_GROUP("ssi0-ce0-e", jz4770_ssi0_ce0_e), + INGENIC_PIN_GROUP("ssi0-ce1-b", jz4770_ssi0_ce1_b), + INGENIC_PIN_GROUP("ssi0-ce1-d", jz4770_ssi0_ce1_d), + INGENIC_PIN_GROUP("ssi0-ce1-e", jz4770_ssi0_ce1_e), + INGENIC_PIN_GROUP("ssi1-dt-b", jz4770_ssi1_dt_b), + INGENIC_PIN_GROUP("ssi1-dt-d", jz4770_ssi1_dt_d), + INGENIC_PIN_GROUP("ssi1-dt-e", jz4770_ssi1_dt_e), + INGENIC_PIN_GROUP("ssi1-dr-b", jz4770_ssi1_dr_b), + INGENIC_PIN_GROUP("ssi1-dr-d", jz4770_ssi1_dr_d), + INGENIC_PIN_GROUP("ssi1-dr-e", jz4770_ssi1_dr_e), + INGENIC_PIN_GROUP("ssi1-clk-b", jz4770_ssi1_clk_b), + INGENIC_PIN_GROUP("ssi1-clk-d", jz4770_ssi1_clk_d), + INGENIC_PIN_GROUP("ssi1-clk-e", jz4770_ssi1_clk_e), + INGENIC_PIN_GROUP("ssi1-gpc-b", jz4770_ssi1_gpc_b), + INGENIC_PIN_GROUP("ssi1-gpc-d", jz4770_ssi1_gpc_d), + INGENIC_PIN_GROUP("ssi1-gpc-e", jz4770_ssi1_gpc_e), + INGENIC_PIN_GROUP("ssi1-ce0-b", jz4770_ssi1_ce0_b), + INGENIC_PIN_GROUP("ssi1-ce0-d", jz4770_ssi1_ce0_d), + INGENIC_PIN_GROUP("ssi1-ce0-e", jz4770_ssi1_ce0_e), + INGENIC_PIN_GROUP("ssi1-ce1-b", jz4770_ssi1_ce1_b), + INGENIC_PIN_GROUP("ssi1-ce1-d", jz4770_ssi1_ce1_d), + INGENIC_PIN_GROUP("ssi1-ce1-e", jz4770_ssi1_ce1_e), INGENIC_PIN_GROUP("mmc0-1bit-a", jz4770_mmc0_1bit_a), INGENIC_PIN_GROUP("mmc0-4bit-a", jz4770_mmc0_4bit_a), INGENIC_PIN_GROUP("mmc0-1bit-e", jz4770_mmc0_1bit_e), @@ -815,6 +935,22 @@ static const char *jz4770_uart0_groups[] = { "uart0-data", "uart0-hwflow", }; static const char *jz4770_uart1_groups[] = { "uart1-data", "uart1-hwflow", }; static const char *jz4770_uart2_groups[] = { "uart2-data", "uart2-hwflow", }; static const char *jz4770_uart3_groups[] = { "uart3-data", "uart3-hwflow", }; +static const char *jz4770_ssi0_groups[] = { + "ssi0-dt-a", "ssi0-dt-b", "ssi0-dt-d", "ssi0-dt-e", + "ssi0-dr-a", "ssi0-dr-b", "ssi0-dr-d", "ssi0-dr-e", + "ssi0-clk-a", "ssi0-clk-b", "ssi0-clk-d", "ssi0-clk-e", + "ssi0-gpc-b", "ssi0-gpc-d", "ssi0-gpc-e", + "ssi0-ce0-a", "ssi0-ce0-b", "ssi0-ce0-d", "ssi0-ce0-e", + "ssi0-ce1-b", "ssi0-ce1-d", "ssi0-ce1-e", +}; +static const char *jz4770_ssi1_groups[] = { + "ssi1-dt-b", "ssi1-dt-d", "ssi1-dt-e", + "ssi1-dr-b", "ssi1-dr-d", "ssi1-dr-e", + "ssi1-clk-b", "ssi1-clk-d", "ssi1-clk-e", + "ssi1-gpc-b", "ssi1-gpc-d", "ssi1-gpc-e", + "ssi1-ce0-b", "ssi1-ce0-d", "ssi1-ce0-e", + "ssi1-ce1-b", "ssi1-ce1-d", "ssi1-ce1-e", +}; static const char *jz4770_mmc0_groups[] = { "mmc0-1bit-a", "mmc0-4bit-a", "mmc0-1bit-e", "mmc0-4bit-e", "mmc0-8bit-e", @@ -858,6 +994,8 @@ static const struct function_desc jz4770_functions[] = { { "uart1", jz4770_uart1_groups, ARRAY_SIZE(jz4770_uart1_groups), }, { "uart2", jz4770_uart2_groups, ARRAY_SIZE(jz4770_uart2_groups), }, { "uart3", jz4770_uart3_groups, ARRAY_SIZE(jz4770_uart3_groups), }, + { "ssi0", jz4770_ssi0_groups, ARRAY_SIZE(jz4770_ssi0_groups), }, + { "ssi1", jz4770_ssi1_groups, ARRAY_SIZE(jz4770_ssi1_groups), }, { "mmc0", jz4770_mmc0_groups, ARRAY_SIZE(jz4770_mmc0_groups), }, { "mmc1", jz4770_mmc1_groups, ARRAY_SIZE(jz4770_mmc1_groups), }, { "mmc2", jz4770_mmc2_groups, ARRAY_SIZE(jz4770_mmc2_groups), }, @@ -900,6 +1038,39 @@ static const struct ingenic_chip_info jz4770_chip_info = { static int jz4780_uart2_data_pins[] = { 0x66, 0x67, }; static int jz4780_uart2_hwflow_pins[] = { 0x65, 0x64, }; static int jz4780_uart4_data_pins[] = { 0x54, 0x4a, }; +static int jz4780_ssi0_dt_a_19_pins[] = { 0x13, }; +static int jz4780_ssi0_dt_a_21_pins[] = { 0x15, }; +static int jz4780_ssi0_dt_a_28_pins[] = { 0x1c, }; +static int jz4780_ssi0_dt_b_pins[] = { 0x3d, }; +static int jz4780_ssi0_dt_d_pins[] = { 0x59, }; +static int jz4780_ssi0_dr_a_20_pins[] = { 0x14, }; +static int jz4780_ssi0_dr_a_27_pins[] = { 0x1b, }; +static int jz4780_ssi0_dr_b_pins[] = { 0x34, }; +static int jz4780_ssi0_dr_d_pins[] = { 0x54, }; +static int jz4780_ssi0_clk_a_pins[] = { 0x12, }; +static int jz4780_ssi0_clk_b_5_pins[] = { 0x25, }; +static int jz4780_ssi0_clk_b_28_pins[] = { 0x3c, }; +static int jz4780_ssi0_clk_d_pins[] = { 0x58, }; +static int jz4780_ssi0_gpc_b_pins[] = { 0x3e, }; +static int jz4780_ssi0_gpc_d_pins[] = { 0x56, }; +static int jz4780_ssi0_ce0_a_23_pins[] = { 0x17, }; +static int jz4780_ssi0_ce0_a_25_pins[] = { 0x19, }; +static int jz4780_ssi0_ce0_b_pins[] = { 0x3f, }; +static int jz4780_ssi0_ce0_d_pins[] = { 0x57, }; +static int jz4780_ssi0_ce1_b_pins[] = { 0x35, }; +static int jz4780_ssi0_ce1_d_pins[] = { 0x55, }; +static int jz4780_ssi1_dt_b_pins[] = { 0x3d, }; +static int jz4780_ssi1_dt_d_pins[] = { 0x59, }; +static int jz4780_ssi1_dr_b_pins[] = { 0x34, }; +static int jz4780_ssi1_dr_d_pins[] = { 0x54, }; +static int jz4780_ssi1_clk_b_pins[] = { 0x3c, }; +static int jz4780_ssi1_clk_d_pins[] = { 0x58, }; +static int jz4780_ssi1_gpc_b_pins[] = { 0x3e, }; +static int jz4780_ssi1_gpc_d_pins[] = { 0x56, }; +static int jz4780_ssi1_ce0_b_pins[] = { 0x3f, }; +static int jz4780_ssi1_ce0_d_pins[] = { 0x57, }; +static int jz4780_ssi1_ce1_b_pins[] = { 0x35, }; +static int jz4780_ssi1_ce1_d_pins[] = { 0x55, }; static int jz4780_mmc0_8bit_a_pins[] = { 0x04, 0x05, 0x06, 0x07, 0x18, }; static int jz4780_i2c3_pins[] = { 0x6a, 0x6b, }; static int jz4780_i2c4_e_pins[] = { 0x8c, 0x8d, }; @@ -909,6 +1080,39 @@ static int jz4780_hdmi_ddc_pins[] = { 0xb9, 0xb8, }; static int jz4780_uart2_data_funcs[] = { 1, 1, }; static int jz4780_uart2_hwflow_funcs[] = { 1, 1, }; static int jz4780_uart4_data_funcs[] = { 2, 2, }; +static int jz4780_ssi0_dt_a_19_funcs[] = { 2, }; +static int jz4780_ssi0_dt_a_21_funcs[] = { 2, }; +static int jz4780_ssi0_dt_a_28_funcs[] = { 2, }; +static int jz4780_ssi0_dt_b_funcs[] = { 1, }; +static int jz4780_ssi0_dt_d_funcs[] = { 1, }; +static int jz4780_ssi0_dr_a_20_funcs[] = { 2, }; +static int jz4780_ssi0_dr_a_27_funcs[] = { 2, }; +static int jz4780_ssi0_dr_b_funcs[] = { 1, }; +static int jz4780_ssi0_dr_d_funcs[] = { 1, }; +static int jz4780_ssi0_clk_a_funcs[] = { 2, }; +static int jz4780_ssi0_clk_b_5_funcs[] = { 1, }; +static int jz4780_ssi0_clk_b_28_funcs[] = { 1, }; +static int jz4780_ssi0_clk_d_funcs[] = { 1, }; +static int jz4780_ssi0_gpc_b_funcs[] = { 1, }; +static int jz4780_ssi0_gpc_d_funcs[] = { 1, }; +static int jz4780_ssi0_ce0_a_23_funcs[] = { 2, }; +static int jz4780_ssi0_ce0_a_25_funcs[] = { 2, }; +static int jz4780_ssi0_ce0_b_funcs[] = { 1, }; +static int jz4780_ssi0_ce0_d_funcs[] = { 1, }; +static int jz4780_ssi0_ce1_b_funcs[] = { 1, }; +static int jz4780_ssi0_ce1_d_funcs[] = { 1, }; +static int jz4780_ssi1_dt_b_funcs[] = { 2, }; +static int jz4780_ssi1_dt_d_funcs[] = { 2, }; +static int jz4780_ssi1_dr_b_funcs[] = { 2, }; +static int jz4780_ssi1_dr_d_funcs[] = { 2, }; +static int jz4780_ssi1_clk_b_funcs[] = { 2, }; +static int jz4780_ssi1_clk_d_funcs[] = { 2, }; +static int jz4780_ssi1_gpc_b_funcs[] = { 2, }; +static int jz4780_ssi1_gpc_d_funcs[] = { 2, }; +static int jz4780_ssi1_ce0_b_funcs[] = { 2, }; +static int jz4780_ssi1_ce0_d_funcs[] = { 2, }; +static int jz4780_ssi1_ce1_b_funcs[] = { 2, }; +static int jz4780_ssi1_ce1_d_funcs[] = { 2, }; static int jz4780_mmc0_8bit_a_funcs[] = { 1, 1, 1, 1, 1, }; static int jz4780_i2c3_funcs[] = { 1, 1, }; static int jz4780_i2c4_e_funcs[] = { 1, 1, }; @@ -925,6 +1129,51 @@ static const struct group_desc jz4780_groups[] = { INGENIC_PIN_GROUP("uart3-data", jz4770_uart3_data), INGENIC_PIN_GROUP("uart3-hwflow", jz4770_uart3_hwflow), INGENIC_PIN_GROUP("uart4-data", jz4780_uart4_data), + INGENIC_PIN_GROUP("ssi0-dt-a-19", jz4780_ssi0_dt_a_19), + INGENIC_PIN_GROUP("ssi0-dt-a-21", jz4780_ssi0_dt_a_21), + INGENIC_PIN_GROUP("ssi0-dt-a-28", jz4780_ssi0_dt_a_28), + INGENIC_PIN_GROUP("ssi0-dt-b", jz4780_ssi0_dt_b), + INGENIC_PIN_GROUP("ssi0-dt-d", jz4780_ssi0_dt_d), + INGENIC_PIN_GROUP("ssi0-dt-e", jz4770_ssi0_dt_e), + INGENIC_PIN_GROUP("ssi0-dr-a-20", jz4780_ssi0_dr_a_20), + INGENIC_PIN_GROUP("ssi0-dr-a-27", jz4780_ssi0_dr_a_27), + INGENIC_PIN_GROUP("ssi0-dr-b", jz4780_ssi0_dr_b), + INGENIC_PIN_GROUP("ssi0-dr-d", jz4780_ssi0_dr_d), + INGENIC_PIN_GROUP("ssi0-dr-e", jz4770_ssi0_dr_e), + INGENIC_PIN_GROUP("ssi0-clk-a", jz4780_ssi0_clk_a), + INGENIC_PIN_GROUP("ssi0-clk-b-5", jz4780_ssi0_clk_b_5), + INGENIC_PIN_GROUP("ssi0-clk-b-28", jz4780_ssi0_clk_b_28), + INGENIC_PIN_GROUP("ssi0-clk-d", jz4780_ssi0_clk_d), + INGENIC_PIN_GROUP("ssi0-clk-e", jz4770_ssi0_clk_e), + INGENIC_PIN_GROUP("ssi0-gpc-b", jz4780_ssi0_gpc_b), + INGENIC_PIN_GROUP("ssi0-gpc-d", jz4780_ssi0_gpc_d), + INGENIC_PIN_GROUP("ssi0-gpc-e", jz4770_ssi0_gpc_e), + INGENIC_PIN_GROUP("ssi0-ce0-a-23", jz4780_ssi0_ce0_a_23), + INGENIC_PIN_GROUP("ssi0-ce0-a-25", jz4780_ssi0_ce0_a_25), + INGENIC_PIN_GROUP("ssi0-ce0-b", jz4780_ssi0_ce0_b), + INGENIC_PIN_GROUP("ssi0-ce0-d", jz4780_ssi0_ce0_d), + INGENIC_PIN_GROUP("ssi0-ce0-e", jz4770_ssi0_ce0_e), + INGENIC_PIN_GROUP("ssi0-ce1-b", jz4780_ssi0_ce1_b), + INGENIC_PIN_GROUP("ssi0-ce1-d", jz4780_ssi0_ce1_d), + INGENIC_PIN_GROUP("ssi0-ce1-e", jz4770_ssi0_ce1_e), + INGENIC_PIN_GROUP("ssi1-dt-b", jz4780_ssi1_dt_b), + INGENIC_PIN_GROUP("ssi1-dt-d", jz4780_ssi1_dt_d), + INGENIC_PIN_GROUP("ssi1-dt-e", jz4770_ssi1_dt_e), + INGENIC_PIN_GROUP("ssi1-dr-b", jz4780_ssi1_dr_b), + INGENIC_PIN_GROUP("ssi1-dr-d", jz4780_ssi1_dr_d), + INGENIC_PIN_GROUP("ssi1-dr-e", jz4770_ssi1_dr_e), + INGENIC_PIN_GROUP("ssi1-clk-b", jz4780_ssi1_clk_b), + INGENIC_PIN_GROUP("ssi1-clk-d", jz4780_ssi1_clk_d), + INGENIC_PIN_GROUP("ssi1-clk-e", jz4770_ssi1_clk_e), + INGENIC_PIN_GROUP("ssi1-gpc-b", jz4780_ssi1_gpc_b), + INGENIC_PIN_GROUP("ssi1-gpc-d", jz4780_ssi1_gpc_d), + INGENIC_PIN_GROUP("ssi1-gpc-e", jz4770_ssi1_gpc_e), + INGENIC_PIN_GROUP("ssi1-ce0-b", jz4780_ssi1_ce0_b), + INGENIC_PIN_GROUP("ssi1-ce0-d", jz4780_ssi1_ce0_d), + INGENIC_PIN_GROUP("ssi1-ce0-e", jz4770_ssi1_ce0_e), + INGENIC_PIN_GROUP("ssi1-ce1-b", jz4780_ssi1_ce1_b), + INGENIC_PIN_GROUP("ssi1-ce1-d", jz4780_ssi1_ce1_d), + INGENIC_PIN_GROUP("ssi1-ce1-e", jz4770_ssi1_ce1_e), INGENIC_PIN_GROUP("mmc0-1bit-a", jz4770_mmc0_1bit_a), INGENIC_PIN_GROUP("mmc0-4bit-a", jz4770_mmc0_4bit_a), INGENIC_PIN_GROUP("mmc0-8bit-a", jz4780_mmc0_8bit_a), @@ -972,6 +1221,22 @@ static const struct group_desc jz4780_groups[] = { static const char *jz4780_uart2_groups[] = { "uart2-data", "uart2-hwflow", }; static const char *jz4780_uart4_groups[] = { "uart4-data", }; +static const char *jz4780_ssi0_groups[] = { + "ssi0-dt-a-19", "ssi0-dt-a-21", "ssi0-dt-a-28", "ssi0-dt-b", "ssi0-dt-d", "ssi0-dt-e", + "ssi0-dr-a-20", "ssi0-dr-a-27", "ssi0-dr-b", "ssi0-dr-d", "ssi0-dr-e", + "ssi0-clk-a", "ssi0-clk-b-5", "ssi0-clk-b-28", "ssi0-clk-d", "ssi0-clk-e", + "ssi0-gpc-b", "ssi0-gpc-d", "ssi0-gpc-e", + "ssi0-ce0-a-23", "ssi0-ce0-a-25", "ssi0-ce0-b", "ssi0-ce0-d", "ssi0-ce0-e", + "ssi0-ce1-b", "ssi0-ce1-d", "ssi0-ce1-e", +}; +static const char *jz4780_ssi1_groups[] = { + "ssi1-dt-b", "ssi1-dt-d", "ssi1-dt-e", + "ssi1-dr-b", "ssi1-dr-d", "ssi1-dr-e", + "ssi1-clk-b", "ssi1-clk-d", "ssi1-clk-e", + "ssi1-gpc-b", "ssi1-gpc-d", "ssi1-gpc-e", + "ssi1-ce0-b", "ssi1-ce0-d", "ssi1-ce0-e", + "ssi1-ce1-b", "ssi1-ce1-d", "ssi1-ce1-e", +}; static const char *jz4780_mmc0_groups[] = { "mmc0-1bit-a", "mmc0-4bit-a", "mmc0-8bit-a", "mmc0-1bit-e", "mmc0-4bit-e", @@ -997,6 +1262,8 @@ static const struct function_desc jz4780_functions[] = { { "uart2", jz4780_uart2_groups, ARRAY_SIZE(jz4780_uart2_groups), }, { "uart3", jz4770_uart3_groups, ARRAY_SIZE(jz4770_uart3_groups), }, { "uart4", jz4780_uart4_groups, ARRAY_SIZE(jz4780_uart4_groups), }, + { "ssi0", jz4780_ssi0_groups, ARRAY_SIZE(jz4780_ssi0_groups), }, + { "ssi1", jz4780_ssi1_groups, ARRAY_SIZE(jz4780_ssi1_groups), }, { "mmc0", jz4780_mmc0_groups, ARRAY_SIZE(jz4780_mmc0_groups), }, { "mmc1", jz4780_mmc1_groups, ARRAY_SIZE(jz4780_mmc1_groups), }, { "mmc2", jz4780_mmc2_groups, ARRAY_SIZE(jz4780_mmc2_groups), }, From d9f5dc495278605c42fb9e649688d1f03ac9a6da Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=E5=91=A8=E7=90=B0=E6=9D=B0=20=28Zhou=20Yanjie=29?= Date: Sun, 13 Sep 2020 14:58:35 +0800 Subject: [PATCH 285/433] pinctrl: Ingenic: Correct the pullup and pulldown parameters of JZ4780. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Correct the pullup and pulldown parameters of JZ4780 to make them consistent with the parameters on the datasheet. Signed-off-by: 周琰杰 (Zhou Yanjie) Reviewed-by: Paul Cercueil Link: https://lore.kernel.org/r/20200913065836.12156-3-zhouyanjie@wanyeetech.com Signed-off-by: Linus Walleij --- drivers/pinctrl/pinctrl-ingenic.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/pinctrl-ingenic.c b/drivers/pinctrl/pinctrl-ingenic.c index 00f29fd684fa..d5ac8489ba3d 100644 --- a/drivers/pinctrl/pinctrl-ingenic.c +++ b/drivers/pinctrl/pinctrl-ingenic.c @@ -1035,6 +1035,14 @@ static const struct ingenic_chip_info jz4770_chip_info = { .pull_downs = jz4770_pull_downs, }; +static const u32 jz4780_pull_ups[6] = { + 0x3fffffff, 0xfff0f3fc, 0x0fffffff, 0xffff4fff, 0xfffffb7c, 0x7fa7f00f, +}; + +static const u32 jz4780_pull_downs[6] = { + 0x00000000, 0x000f0c03, 0x00000000, 0x0000b000, 0x00000483, 0x00580ff0, +}; + static int jz4780_uart2_data_pins[] = { 0x66, 0x67, }; static int jz4780_uart2_hwflow_pins[] = { 0x65, 0x64, }; static int jz4780_uart4_data_pins[] = { 0x54, 0x4a, }; @@ -1301,8 +1309,8 @@ static const struct ingenic_chip_info jz4780_chip_info = { .num_groups = ARRAY_SIZE(jz4780_groups), .functions = jz4780_functions, .num_functions = ARRAY_SIZE(jz4780_functions), - .pull_ups = jz4770_pull_ups, - .pull_downs = jz4770_pull_downs, + .pull_ups = jz4780_pull_ups, + .pull_downs = jz4780_pull_downs, }; static const u32 x1000_pull_ups[4] = { From f4b5c348d65b7c76931a7f36e8240a85e4cbad29 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=E5=91=A8=E7=90=B0=E6=9D=B0=20=28Zhou=20Yanjie=29?= Date: Sun, 13 Sep 2020 14:58:36 +0800 Subject: [PATCH 286/433] pinctrl: Ingenic: Add I2S pins support for Ingenic SoCs. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit 1.Add I2S pins support for the JZ4780 SoC. 2.Add I2S pins support for the X1000 SoC. 3.Add I2S pins support for the X1500 SoC. 4.Add I2S pins support for the X1830 SoC. Signed-off-by: 周琰杰 (Zhou Yanjie) Reviewed-by: Paul Cercueil Link: https://lore.kernel.org/r/20200913065836.12156-4-zhouyanjie@wanyeetech.com Signed-off-by: Linus Walleij --- drivers/pinctrl/pinctrl-ingenic.c | 70 +++++++++++++++++++++++++++++++ 1 file changed, 70 insertions(+) diff --git a/drivers/pinctrl/pinctrl-ingenic.c b/drivers/pinctrl/pinctrl-ingenic.c index d5ac8489ba3d..c8e50a58a5e5 100644 --- a/drivers/pinctrl/pinctrl-ingenic.c +++ b/drivers/pinctrl/pinctrl-ingenic.c @@ -1083,6 +1083,11 @@ static int jz4780_mmc0_8bit_a_pins[] = { 0x04, 0x05, 0x06, 0x07, 0x18, }; static int jz4780_i2c3_pins[] = { 0x6a, 0x6b, }; static int jz4780_i2c4_e_pins[] = { 0x8c, 0x8d, }; static int jz4780_i2c4_f_pins[] = { 0xb9, 0xb8, }; +static int jz4780_i2s_data_tx_pins[] = { 0x87, }; +static int jz4780_i2s_data_rx_pins[] = { 0x86, }; +static int jz4780_i2s_clk_txrx_pins[] = { 0x6c, 0x6d, }; +static int jz4780_i2s_clk_rx_pins[] = { 0x88, 0x89, }; +static int jz4780_i2s_sysclk_pins[] = { 0x85, }; static int jz4780_hdmi_ddc_pins[] = { 0xb9, 0xb8, }; static int jz4780_uart2_data_funcs[] = { 1, 1, }; @@ -1125,6 +1130,11 @@ static int jz4780_mmc0_8bit_a_funcs[] = { 1, 1, 1, 1, 1, }; static int jz4780_i2c3_funcs[] = { 1, 1, }; static int jz4780_i2c4_e_funcs[] = { 1, 1, }; static int jz4780_i2c4_f_funcs[] = { 1, 1, }; +static int jz4780_i2s_data_tx_funcs[] = { 0, }; +static int jz4780_i2s_data_rx_funcs[] = { 0, }; +static int jz4780_i2s_clk_txrx_funcs[] = { 1, 0, }; +static int jz4780_i2s_clk_rx_funcs[] = { 1, 1, }; +static int jz4780_i2s_sysclk_funcs[] = { 2, }; static int jz4780_hdmi_ddc_funcs[] = { 0, 0, }; static const struct group_desc jz4780_groups[] = { @@ -1213,6 +1223,11 @@ static const struct group_desc jz4780_groups[] = { INGENIC_PIN_GROUP("i2c3-data", jz4780_i2c3), INGENIC_PIN_GROUP("i2c4-data-e", jz4780_i2c4_e), INGENIC_PIN_GROUP("i2c4-data-f", jz4780_i2c4_f), + INGENIC_PIN_GROUP("i2s-data-tx", jz4780_i2s_data_tx), + INGENIC_PIN_GROUP("i2s-data-rx", jz4780_i2s_data_rx), + INGENIC_PIN_GROUP("i2s-clk-txrx", jz4780_i2s_clk_txrx), + INGENIC_PIN_GROUP("i2s-clk-rx", jz4780_i2s_clk_rx), + INGENIC_PIN_GROUP("i2s-sysclk", jz4780_i2s_sysclk), INGENIC_PIN_GROUP("hdmi-ddc", jz4780_hdmi_ddc), INGENIC_PIN_GROUP("cim-data", jz4770_cim_8bit), INGENIC_PIN_GROUP("lcd-24bit", jz4770_lcd_24bit), @@ -1261,6 +1276,9 @@ static const char *jz4780_nemc_groups[] = { }; static const char *jz4780_i2c3_groups[] = { "i2c3-data", }; static const char *jz4780_i2c4_groups[] = { "i2c4-data-e", "i2c4-data-f", }; +static const char *jz4780_i2s_groups[] = { + "i2s-data-tx", "i2s-data-rx", "i2s-clk-txrx", "i2s-clk-rx", "i2s-sysclk", +}; static const char *jz4780_cim_groups[] = { "cim-data", }; static const char *jz4780_hdmi_ddc_groups[] = { "hdmi-ddc", }; @@ -1287,6 +1305,7 @@ static const struct function_desc jz4780_functions[] = { { "i2c2", jz4770_i2c2_groups, ARRAY_SIZE(jz4770_i2c2_groups), }, { "i2c3", jz4780_i2c3_groups, ARRAY_SIZE(jz4780_i2c3_groups), }, { "i2c4", jz4780_i2c4_groups, ARRAY_SIZE(jz4780_i2c4_groups), }, + { "i2s", jz4780_i2s_groups, ARRAY_SIZE(jz4780_i2s_groups), }, { "cim", jz4780_cim_groups, ARRAY_SIZE(jz4780_cim_groups), }, { "lcd", jz4770_lcd_groups, ARRAY_SIZE(jz4770_lcd_groups), }, { "pwm0", jz4770_pwm0_groups, ARRAY_SIZE(jz4770_pwm0_groups), }, @@ -1368,6 +1387,10 @@ static int x1000_i2c0_pins[] = { 0x38, 0x37, }; static int x1000_i2c1_a_pins[] = { 0x01, 0x00, }; static int x1000_i2c1_c_pins[] = { 0x5b, 0x5a, }; static int x1000_i2c2_pins[] = { 0x61, 0x60, }; +static int x1000_i2s_data_tx_pins[] = { 0x24, }; +static int x1000_i2s_data_rx_pins[] = { 0x23, }; +static int x1000_i2s_clk_txrx_pins[] = { 0x21, 0x22, }; +static int x1000_i2s_sysclk_pins[] = { 0x20, }; static int x1000_cim_pins[] = { 0x08, 0x09, 0x0a, 0x0b, 0x13, 0x12, 0x11, 0x10, 0x0f, 0x0e, 0x0d, 0x0c, @@ -1430,6 +1453,10 @@ static int x1000_i2c0_funcs[] = { 0, 0, }; static int x1000_i2c1_a_funcs[] = { 2, 2, }; static int x1000_i2c1_c_funcs[] = { 0, 0, }; static int x1000_i2c2_funcs[] = { 1, 1, }; +static int x1000_i2s_data_tx_funcs[] = { 1, }; +static int x1000_i2s_data_rx_funcs[] = { 1, }; +static int x1000_i2s_clk_txrx_funcs[] = { 1, 1, }; +static int x1000_i2s_sysclk_funcs[] = { 1, }; static int x1000_cim_funcs[] = { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, }; static int x1000_lcd_8bit_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, @@ -1483,6 +1510,10 @@ static const struct group_desc x1000_groups[] = { INGENIC_PIN_GROUP("i2c1-data-a", x1000_i2c1_a), INGENIC_PIN_GROUP("i2c1-data-c", x1000_i2c1_c), INGENIC_PIN_GROUP("i2c2-data", x1000_i2c2), + INGENIC_PIN_GROUP("i2s-data-tx", x1000_i2s_data_tx), + INGENIC_PIN_GROUP("i2s-data-rx", x1000_i2s_data_rx), + INGENIC_PIN_GROUP("i2s-clk-txrx", x1000_i2s_clk_txrx), + INGENIC_PIN_GROUP("i2s-sysclk", x1000_i2s_sysclk), INGENIC_PIN_GROUP("cim-data", x1000_cim), INGENIC_PIN_GROUP("lcd-8bit", x1000_lcd_8bit), INGENIC_PIN_GROUP("lcd-16bit", x1000_lcd_16bit), @@ -1524,6 +1555,9 @@ static const char *x1000_cs2_groups[] = { "emc-cs2", }; static const char *x1000_i2c0_groups[] = { "i2c0-data", }; static const char *x1000_i2c1_groups[] = { "i2c1-data-a", "i2c1-data-c", }; static const char *x1000_i2c2_groups[] = { "i2c2-data", }; +static const char *x1000_i2s_groups[] = { + "i2s-data-tx", "i2s-data-rx", "i2s-clk-txrx", "i2s-sysclk", +}; static const char *x1000_cim_groups[] = { "cim-data", }; static const char *x1000_lcd_groups[] = { "lcd-8bit", "lcd-16bit", "lcd-no-pins", @@ -1549,6 +1583,7 @@ static const struct function_desc x1000_functions[] = { { "i2c0", x1000_i2c0_groups, ARRAY_SIZE(x1000_i2c0_groups), }, { "i2c1", x1000_i2c1_groups, ARRAY_SIZE(x1000_i2c1_groups), }, { "i2c2", x1000_i2c2_groups, ARRAY_SIZE(x1000_i2c2_groups), }, + { "i2s", x1000_i2s_groups, ARRAY_SIZE(x1000_i2s_groups), }, { "cim", x1000_cim_groups, ARRAY_SIZE(x1000_cim_groups), }, { "lcd", x1000_lcd_groups, ARRAY_SIZE(x1000_lcd_groups), }, { "pwm0", x1000_pwm0_groups, ARRAY_SIZE(x1000_pwm0_groups), }, @@ -1584,6 +1619,10 @@ static int x1500_i2c0_pins[] = { 0x38, 0x37, }; static int x1500_i2c1_a_pins[] = { 0x01, 0x00, }; static int x1500_i2c1_c_pins[] = { 0x5b, 0x5a, }; static int x1500_i2c2_pins[] = { 0x61, 0x60, }; +static int x1500_i2s_data_tx_pins[] = { 0x24, }; +static int x1500_i2s_data_rx_pins[] = { 0x23, }; +static int x1500_i2s_clk_txrx_pins[] = { 0x21, 0x22, }; +static int x1500_i2s_sysclk_pins[] = { 0x20, }; static int x1500_cim_pins[] = { 0x08, 0x09, 0x0a, 0x0b, 0x13, 0x12, 0x11, 0x10, 0x0f, 0x0e, 0x0d, 0x0c, @@ -1607,6 +1646,10 @@ static int x1500_i2c0_funcs[] = { 0, 0, }; static int x1500_i2c1_a_funcs[] = { 2, 2, }; static int x1500_i2c1_c_funcs[] = { 0, 0, }; static int x1500_i2c2_funcs[] = { 1, 1, }; +static int x1500_i2s_data_tx_funcs[] = { 1, }; +static int x1500_i2s_data_rx_funcs[] = { 1, }; +static int x1500_i2s_clk_txrx_funcs[] = { 1, 1, }; +static int x1500_i2s_sysclk_funcs[] = { 1, }; static int x1500_cim_funcs[] = { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, }; static int x1500_pwm_pwm0_funcs[] = { 0, }; static int x1500_pwm_pwm1_funcs[] = { 1, }; @@ -1629,6 +1672,10 @@ static const struct group_desc x1500_groups[] = { INGENIC_PIN_GROUP("i2c1-data-a", x1500_i2c1_a), INGENIC_PIN_GROUP("i2c1-data-c", x1500_i2c1_c), INGENIC_PIN_GROUP("i2c2-data", x1500_i2c2), + INGENIC_PIN_GROUP("i2s-data-tx", x1500_i2s_data_tx), + INGENIC_PIN_GROUP("i2s-data-rx", x1500_i2s_data_rx), + INGENIC_PIN_GROUP("i2s-clk-txrx", x1500_i2s_clk_txrx), + INGENIC_PIN_GROUP("i2s-sysclk", x1500_i2s_sysclk), INGENIC_PIN_GROUP("cim-data", x1500_cim), { "lcd-no-pins", }, INGENIC_PIN_GROUP("pwm0", x1500_pwm_pwm0), @@ -1647,6 +1694,9 @@ static const char *x1500_mmc_groups[] = { "mmc-1bit", "mmc-4bit", }; static const char *x1500_i2c0_groups[] = { "i2c0-data", }; static const char *x1500_i2c1_groups[] = { "i2c1-data-a", "i2c1-data-c", }; static const char *x1500_i2c2_groups[] = { "i2c2-data", }; +static const char *x1500_i2s_groups[] = { + "i2s-data-tx", "i2s-data-rx", "i2s-clk-txrx", "i2s-sysclk", +}; static const char *x1500_cim_groups[] = { "cim-data", }; static const char *x1500_lcd_groups[] = { "lcd-no-pins", }; static const char *x1500_pwm0_groups[] = { "pwm0", }; @@ -1664,6 +1714,7 @@ static const struct function_desc x1500_functions[] = { { "i2c0", x1500_i2c0_groups, ARRAY_SIZE(x1500_i2c0_groups), }, { "i2c1", x1500_i2c1_groups, ARRAY_SIZE(x1500_i2c1_groups), }, { "i2c2", x1500_i2c2_groups, ARRAY_SIZE(x1500_i2c2_groups), }, + { "i2s", x1500_i2s_groups, ARRAY_SIZE(x1500_i2s_groups), }, { "cim", x1500_cim_groups, ARRAY_SIZE(x1500_cim_groups), }, { "lcd", x1500_lcd_groups, ARRAY_SIZE(x1500_lcd_groups), }, { "pwm0", x1500_pwm0_groups, ARRAY_SIZE(x1500_pwm0_groups), }, @@ -1722,6 +1773,11 @@ static int x1830_mmc1_4bit_pins[] = { 0x45, 0x46, 0x47, }; static int x1830_i2c0_pins[] = { 0x0c, 0x0d, }; static int x1830_i2c1_pins[] = { 0x39, 0x3a, }; static int x1830_i2c2_pins[] = { 0x5b, 0x5c, }; +static int x1830_i2s_data_tx_pins[] = { 0x53, }; +static int x1830_i2s_data_rx_pins[] = { 0x54, }; +static int x1830_i2s_clk_txrx_pins[] = { 0x58, 0x52, }; +static int x1830_i2s_clk_rx_pins[] = { 0x56, 0x55, }; +static int x1830_i2s_sysclk_pins[] = { 0x57, }; static int x1830_lcd_rgb_18bit_pins[] = { 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6c, 0x6d, 0x6e, 0x6f, @@ -1784,6 +1840,11 @@ static int x1830_mmc1_4bit_funcs[] = { 0, 0, 0, }; static int x1830_i2c0_funcs[] = { 1, 1, }; static int x1830_i2c1_funcs[] = { 0, 0, }; static int x1830_i2c2_funcs[] = { 1, 1, }; +static int x1830_i2s_data_tx_funcs[] = { 0, }; +static int x1830_i2s_data_rx_funcs[] = { 0, }; +static int x1830_i2s_clk_txrx_funcs[] = { 0, 0, }; +static int x1830_i2s_clk_rx_funcs[] = { 0, 0, }; +static int x1830_i2s_sysclk_funcs[] = { 0, }; static int x1830_lcd_rgb_18bit_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, @@ -1842,6 +1903,11 @@ static const struct group_desc x1830_groups[] = { INGENIC_PIN_GROUP("i2c0-data", x1830_i2c0), INGENIC_PIN_GROUP("i2c1-data", x1830_i2c1), INGENIC_PIN_GROUP("i2c2-data", x1830_i2c2), + INGENIC_PIN_GROUP("i2s-data-tx", x1830_i2s_data_tx), + INGENIC_PIN_GROUP("i2s-data-rx", x1830_i2s_data_rx), + INGENIC_PIN_GROUP("i2s-clk-txrx", x1830_i2s_clk_txrx), + INGENIC_PIN_GROUP("i2s-clk-rx", x1830_i2s_clk_rx), + INGENIC_PIN_GROUP("i2s-sysclk", x1830_i2s_sysclk), INGENIC_PIN_GROUP("lcd-rgb-18bit", x1830_lcd_rgb_18bit), INGENIC_PIN_GROUP("lcd-slcd-8bit", x1830_lcd_slcd_8bit), INGENIC_PIN_GROUP("lcd-slcd-16bit", x1830_lcd_slcd_16bit), @@ -1884,6 +1950,9 @@ static const char *x1830_mmc1_groups[] = { "mmc1-1bit", "mmc1-4bit", }; static const char *x1830_i2c0_groups[] = { "i2c0-data", }; static const char *x1830_i2c1_groups[] = { "i2c1-data", }; static const char *x1830_i2c2_groups[] = { "i2c2-data", }; +static const char *x1830_i2s_groups[] = { + "i2s-data-tx", "i2s-data-rx", "i2s-clk-txrx", "i2s-clk-rx", "i2s-sysclk", +}; static const char *x1830_lcd_groups[] = { "lcd-rgb-18bit", "lcd-slcd-8bit", "lcd-slcd-16bit", "lcd-no-pins", }; @@ -1908,6 +1977,7 @@ static const struct function_desc x1830_functions[] = { { "i2c0", x1830_i2c0_groups, ARRAY_SIZE(x1830_i2c0_groups), }, { "i2c1", x1830_i2c1_groups, ARRAY_SIZE(x1830_i2c1_groups), }, { "i2c2", x1830_i2c2_groups, ARRAY_SIZE(x1830_i2c2_groups), }, + { "i2s", x1830_i2s_groups, ARRAY_SIZE(x1830_i2s_groups), }, { "lcd", x1830_lcd_groups, ARRAY_SIZE(x1830_lcd_groups), }, { "pwm0", x1830_pwm0_groups, ARRAY_SIZE(x1830_pwm0_groups), }, { "pwm1", x1830_pwm1_groups, ARRAY_SIZE(x1830_pwm1_groups), }, From da2ab12f99d36b233d2bba0aecf55204c1bfa9e3 Mon Sep 17 00:00:00 2001 From: Liu Shixin Date: Mon, 14 Sep 2020 14:54:02 +0800 Subject: [PATCH 287/433] pinctrl: sprd: use module_platform_driver to simplify the code module_platform_driver() makes the code simpler by eliminating boilerplate code. Signed-off-by: Liu Shixin Acked-by: Chunyan Zhang Link: https://lore.kernel.org/r/20200914065402.3726408-1-liushixin2@huawei.com Signed-off-by: Linus Walleij --- drivers/pinctrl/sprd/pinctrl-sprd-sc9860.c | 13 +------------ 1 file changed, 1 insertion(+), 12 deletions(-) diff --git a/drivers/pinctrl/sprd/pinctrl-sprd-sc9860.c b/drivers/pinctrl/sprd/pinctrl-sprd-sc9860.c index 06c8671b40e7..d14f382f2392 100644 --- a/drivers/pinctrl/sprd/pinctrl-sprd-sc9860.c +++ b/drivers/pinctrl/sprd/pinctrl-sprd-sc9860.c @@ -946,18 +946,7 @@ static struct platform_driver sprd_pinctrl_driver = { .remove = sprd_pinctrl_remove, .shutdown = sprd_pinctrl_shutdown, }; - -static int sprd_pinctrl_init(void) -{ - return platform_driver_register(&sprd_pinctrl_driver); -} -module_init(sprd_pinctrl_init); - -static void sprd_pinctrl_exit(void) -{ - platform_driver_unregister(&sprd_pinctrl_driver); -} -module_exit(sprd_pinctrl_exit); +module_platform_driver(sprd_pinctrl_driver); MODULE_DESCRIPTION("SPREADTRUM Pin Controller Driver"); MODULE_AUTHOR("Baolin Wang "); From 43b7229ef86ffb1c6720316cda8bea330fc8bc2c Mon Sep 17 00:00:00 2001 From: Liu Shixin Date: Mon, 21 Sep 2020 16:24:48 +0800 Subject: [PATCH 288/433] pinctrl: spear: simplify the return expression of spear310_pinctrl_probe Simplify the return expression. Signed-off-by: Liu Shixin Acked-by: Viresh Kumar Link: https://lore.kernel.org/r/20200921082448.2591929-1-liushixin2@huawei.com Signed-off-by: Linus Walleij --- drivers/pinctrl/spear/pinctrl-spear310.c | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/drivers/pinctrl/spear/pinctrl-spear310.c b/drivers/pinctrl/spear/pinctrl-spear310.c index 393b2b97d527..9d9facc4a6e4 100644 --- a/drivers/pinctrl/spear/pinctrl-spear310.c +++ b/drivers/pinctrl/spear/pinctrl-spear310.c @@ -379,8 +379,6 @@ static const struct of_device_id spear310_pinctrl_of_match[] = { static int spear310_pinctrl_probe(struct platform_device *pdev) { - int ret; - spear3xx_machdata.groups = spear310_pingroups; spear3xx_machdata.ngroups = ARRAY_SIZE(spear310_pingroups); spear3xx_machdata.functions = spear310_functions; @@ -392,11 +390,7 @@ static int spear310_pinctrl_probe(struct platform_device *pdev) spear3xx_machdata.modes_supported = false; - ret = spear_pinctrl_probe(pdev, &spear3xx_machdata); - if (ret) - return ret; - - return 0; + return spear_pinctrl_probe(pdev, &spear3xx_machdata); } static struct platform_driver spear310_pinctrl_driver = { From 5608215665b905632dc0dd43c075aeffc00b3818 Mon Sep 17 00:00:00 2001 From: Qinglang Miao Date: Mon, 21 Sep 2020 21:10:58 +0800 Subject: [PATCH 289/433] pinctrl: spear: simplify the return expression of tvc_connect() Simplify the return expression. Signed-off-by: Qinglang Miao Acked-by: Viresh Kumar Link: https://lore.kernel.org/r/20200921131058.92941-1-miaoqinglang@huawei.com Signed-off-by: Linus Walleij --- drivers/pinctrl/spear/pinctrl-spear320.c | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/drivers/pinctrl/spear/pinctrl-spear320.c b/drivers/pinctrl/spear/pinctrl-spear320.c index 99c10fc3d9b5..e629e3035543 100644 --- a/drivers/pinctrl/spear/pinctrl-spear320.c +++ b/drivers/pinctrl/spear/pinctrl-spear320.c @@ -3418,8 +3418,6 @@ static const struct of_device_id spear320_pinctrl_of_match[] = { static int spear320_pinctrl_probe(struct platform_device *pdev) { - int ret; - spear3xx_machdata.groups = spear320_pingroups; spear3xx_machdata.ngroups = ARRAY_SIZE(spear320_pingroups); spear3xx_machdata.functions = spear320_functions; @@ -3433,11 +3431,7 @@ static int spear320_pinctrl_probe(struct platform_device *pdev) pmx_init_gpio_pingroup_addr(spear3xx_machdata.gpio_pingroups, spear3xx_machdata.ngpio_pingroups, PMX_CONFIG_REG); - ret = spear_pinctrl_probe(pdev, &spear3xx_machdata); - if (ret) - return ret; - - return 0; + return spear_pinctrl_probe(pdev, &spear3xx_machdata); } static struct platform_driver spear320_pinctrl_driver = { From 1e871d0c0bde1f7180c610d1f01f25250be20f7d Mon Sep 17 00:00:00 2001 From: Eugen Hristev Date: Thu, 17 Sep 2020 16:12:56 +0300 Subject: [PATCH 290/433] dt-bindings: pinctrl: at91-pio4: add microchip,sama7g5 Add compatible string for microchip sama7g5 SoC. Signed-off-by: Eugen Hristev Reviewed-by: Nicolas Ferre Acked-by: Ludovic Desroches Acked-by: Rob Herring Link: https://lore.kernel.org/r/20200917131257.273882-1-eugen.hristev@microchip.com Signed-off-by: Linus Walleij --- .../devicetree/bindings/pinctrl/atmel,at91-pio4-pinctrl.txt | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pio4-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pio4-pinctrl.txt index 04d16fb69eb7..265015bc0603 100644 --- a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pio4-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pio4-pinctrl.txt @@ -4,7 +4,9 @@ The Atmel PIO4 controller is used to select the function of a pin and to configure it. Required properties: -- compatible: "atmel,sama5d2-pinctrl". +- compatible: + "atmel,sama5d2-pinctrl" + "microchip,sama7g5-pinctrl" - reg: base address and length of the PIO controller. - interrupts: interrupt outputs from the controller, one for each bank. - interrupt-controller: mark the device node as an interrupt controller. From 737894d2654395d88e12c196b129ea018daa4bdf Mon Sep 17 00:00:00 2001 From: Eugen Hristev Date: Thu, 17 Sep 2020 16:12:57 +0300 Subject: [PATCH 291/433] pinctrl: at91-pio4: add support for sama7g5 SoC Add support for sama7g5 pinctrl block, which has 5 PIO banks. Signed-off-by: Eugen Hristev Reviewed-by: Nicolas Ferre Acked-by: Ludovic Desroches Link: https://lore.kernel.org/r/20200917131257.273882-2-eugen.hristev@microchip.com Signed-off-by: Linus Walleij --- drivers/pinctrl/pinctrl-at91-pio4.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/pinctrl/pinctrl-at91-pio4.c b/drivers/pinctrl/pinctrl-at91-pio4.c index 8e5a5053a47e..578b387100d9 100644 --- a/drivers/pinctrl/pinctrl-at91-pio4.c +++ b/drivers/pinctrl/pinctrl-at91-pio4.c @@ -983,10 +983,17 @@ static const struct atmel_pioctrl_data atmel_sama5d2_pioctrl_data = { .nbanks = 4, }; +static const struct atmel_pioctrl_data microchip_sama7g5_pioctrl_data = { + .nbanks = 5, +}; + static const struct of_device_id atmel_pctrl_of_match[] = { { .compatible = "atmel,sama5d2-pinctrl", .data = &atmel_sama5d2_pioctrl_data, + }, { + .compatible = "microchip,sama7g5-pinctrl", + .data = µchip_sama7g5_pioctrl_data, }, { /* sentinel */ } From 17f2c8d36f8c37d230bda4d2e6e9a903f57dcd19 Mon Sep 17 00:00:00 2001 From: Qinglang Miao Date: Mon, 21 Sep 2020 21:10:57 +0800 Subject: [PATCH 292/433] pinctrl: ocelot: simplify the return expression of ocelot_gpiochip_register() Simplify the return expression. Signed-off-by: Qinglang Miao Link: https://lore.kernel.org/r/20200921131057.92895-1-miaoqinglang@huawei.com Signed-off-by: Linus Walleij --- drivers/pinctrl/pinctrl-ocelot.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/drivers/pinctrl/pinctrl-ocelot.c b/drivers/pinctrl/pinctrl-ocelot.c index 425a3d764f00..a4a1b00f7f0d 100644 --- a/drivers/pinctrl/pinctrl-ocelot.c +++ b/drivers/pinctrl/pinctrl-ocelot.c @@ -1120,7 +1120,7 @@ static int ocelot_gpiochip_register(struct platform_device *pdev, { struct gpio_chip *gc; struct gpio_irq_chip *girq; - int ret, irq; + int irq; info->gpio_chip = ocelot_gpiolib_chip; @@ -1147,11 +1147,7 @@ static int ocelot_gpiochip_register(struct platform_device *pdev, girq->handler = handle_edge_irq; } - ret = devm_gpiochip_add_data(&pdev->dev, gc, info); - if (ret) - return ret; - - return 0; + return devm_gpiochip_add_data(&pdev->dev, gc, info); } static const struct of_device_id ocelot_pinctrl_of_match[] = { From 19f599e83ac56dda5b35df1d23fb24efeecfadad Mon Sep 17 00:00:00 2001 From: Chuanhong Guo Date: Wed, 23 Sep 2020 00:41:57 +0800 Subject: [PATCH 293/433] pinctrl: mediatek: mt7622: add antsel pins/groups These pins are named ANTSEL[0~29] in datasheet and are used by wmac for various functions. Signed-off-by: Chuanhong Guo Link: https://lore.kernel.org/r/20200922164159.120920-1-gch981213@gmail.com Signed-off-by: Linus Walleij --- drivers/pinctrl/mediatek/pinctrl-mt7622.c | 103 ++++++++++++++++++++++ 1 file changed, 103 insertions(+) diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7622.c b/drivers/pinctrl/mediatek/pinctrl-mt7622.c index ce4a8a0cc19c..38c5e166fd0f 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt7622.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt7622.c @@ -263,6 +263,68 @@ static const struct mtk_pin_desc mt7622_pins[] = { * hardware probably has multiple combinations of these pinouts. */ +/* ANTSEL */ +static int mt7622_antsel0_pins[] = { 91, }; +static int mt7622_antsel0_funcs[] = { 5, }; +static int mt7622_antsel1_pins[] = { 92, }; +static int mt7622_antsel1_funcs[] = { 5, }; +static int mt7622_antsel2_pins[] = { 93, }; +static int mt7622_antsel2_funcs[] = { 5, }; +static int mt7622_antsel3_pins[] = { 94, }; +static int mt7622_antsel3_funcs[] = { 5, }; +static int mt7622_antsel4_pins[] = { 95, }; +static int mt7622_antsel4_funcs[] = { 5, }; +static int mt7622_antsel5_pins[] = { 96, }; +static int mt7622_antsel5_funcs[] = { 5, }; +static int mt7622_antsel6_pins[] = { 97, }; +static int mt7622_antsel6_funcs[] = { 5, }; +static int mt7622_antsel7_pins[] = { 98, }; +static int mt7622_antsel7_funcs[] = { 5, }; +static int mt7622_antsel8_pins[] = { 99, }; +static int mt7622_antsel8_funcs[] = { 5, }; +static int mt7622_antsel9_pins[] = { 100, }; +static int mt7622_antsel9_funcs[] = { 5, }; +static int mt7622_antsel10_pins[] = { 101, }; +static int mt7622_antsel10_funcs[] = { 5, }; +static int mt7622_antsel11_pins[] = { 102, }; +static int mt7622_antsel11_funcs[] = { 5, }; +static int mt7622_antsel12_pins[] = { 73, }; +static int mt7622_antsel12_funcs[] = { 5, }; +static int mt7622_antsel13_pins[] = { 74, }; +static int mt7622_antsel13_funcs[] = { 5, }; +static int mt7622_antsel14_pins[] = { 75, }; +static int mt7622_antsel14_funcs[] = { 5, }; +static int mt7622_antsel15_pins[] = { 76, }; +static int mt7622_antsel15_funcs[] = { 5, }; +static int mt7622_antsel16_pins[] = { 77, }; +static int mt7622_antsel16_funcs[] = { 5, }; +static int mt7622_antsel17_pins[] = { 22, }; +static int mt7622_antsel17_funcs[] = { 5, }; +static int mt7622_antsel18_pins[] = { 79, }; +static int mt7622_antsel18_funcs[] = { 5, }; +static int mt7622_antsel19_pins[] = { 80, }; +static int mt7622_antsel19_funcs[] = { 5, }; +static int mt7622_antsel20_pins[] = { 81, }; +static int mt7622_antsel20_funcs[] = { 5, }; +static int mt7622_antsel21_pins[] = { 82, }; +static int mt7622_antsel21_funcs[] = { 5, }; +static int mt7622_antsel22_pins[] = { 14, }; +static int mt7622_antsel22_funcs[] = { 5, }; +static int mt7622_antsel23_pins[] = { 15, }; +static int mt7622_antsel23_funcs[] = { 5, }; +static int mt7622_antsel24_pins[] = { 16, }; +static int mt7622_antsel24_funcs[] = { 5, }; +static int mt7622_antsel25_pins[] = { 17, }; +static int mt7622_antsel25_funcs[] = { 5, }; +static int mt7622_antsel26_pins[] = { 18, }; +static int mt7622_antsel26_funcs[] = { 5, }; +static int mt7622_antsel27_pins[] = { 19, }; +static int mt7622_antsel27_funcs[] = { 5, }; +static int mt7622_antsel28_pins[] = { 20, }; +static int mt7622_antsel28_funcs[] = { 5, }; +static int mt7622_antsel29_pins[] = { 21, }; +static int mt7622_antsel29_funcs[] = { 5, }; + /* EMMC */ static int mt7622_emmc_pins[] = { 40, 41, 42, 43, 44, 45, 47, 48, 49, 50, }; static int mt7622_emmc_funcs[] = { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, }; @@ -543,6 +605,36 @@ static int mt7622_wled_pins[] = { 85, }; static int mt7622_wled_funcs[] = { 0, }; static const struct group_desc mt7622_groups[] = { + PINCTRL_PIN_GROUP("antsel0", mt7622_antsel0), + PINCTRL_PIN_GROUP("antsel1", mt7622_antsel1), + PINCTRL_PIN_GROUP("antsel2", mt7622_antsel2), + PINCTRL_PIN_GROUP("antsel3", mt7622_antsel3), + PINCTRL_PIN_GROUP("antsel4", mt7622_antsel4), + PINCTRL_PIN_GROUP("antsel5", mt7622_antsel5), + PINCTRL_PIN_GROUP("antsel6", mt7622_antsel6), + PINCTRL_PIN_GROUP("antsel7", mt7622_antsel7), + PINCTRL_PIN_GROUP("antsel8", mt7622_antsel8), + PINCTRL_PIN_GROUP("antsel9", mt7622_antsel9), + PINCTRL_PIN_GROUP("antsel10", mt7622_antsel10), + PINCTRL_PIN_GROUP("antsel11", mt7622_antsel11), + PINCTRL_PIN_GROUP("antsel12", mt7622_antsel12), + PINCTRL_PIN_GROUP("antsel13", mt7622_antsel13), + PINCTRL_PIN_GROUP("antsel14", mt7622_antsel14), + PINCTRL_PIN_GROUP("antsel15", mt7622_antsel15), + PINCTRL_PIN_GROUP("antsel16", mt7622_antsel16), + PINCTRL_PIN_GROUP("antsel17", mt7622_antsel17), + PINCTRL_PIN_GROUP("antsel18", mt7622_antsel18), + PINCTRL_PIN_GROUP("antsel19", mt7622_antsel19), + PINCTRL_PIN_GROUP("antsel20", mt7622_antsel20), + PINCTRL_PIN_GROUP("antsel21", mt7622_antsel21), + PINCTRL_PIN_GROUP("antsel22", mt7622_antsel22), + PINCTRL_PIN_GROUP("antsel23", mt7622_antsel23), + PINCTRL_PIN_GROUP("antsel24", mt7622_antsel24), + PINCTRL_PIN_GROUP("antsel25", mt7622_antsel25), + PINCTRL_PIN_GROUP("antsel26", mt7622_antsel26), + PINCTRL_PIN_GROUP("antsel27", mt7622_antsel27), + PINCTRL_PIN_GROUP("antsel28", mt7622_antsel28), + PINCTRL_PIN_GROUP("antsel29", mt7622_antsel29), PINCTRL_PIN_GROUP("emmc", mt7622_emmc), PINCTRL_PIN_GROUP("emmc_rst", mt7622_emmc_rst), PINCTRL_PIN_GROUP("ephy_leds", mt7622_ephy_leds), @@ -663,6 +755,16 @@ static const struct group_desc mt7622_groups[] = { /* Joint those groups owning the same capability in user point of view which * allows that people tend to use through the device tree. */ +static const char *mt7622_antsel_groups[] = { "antsel0", "antsel1", "antsel2", + "antsel3", "antsel4", "antsel5", + "antsel6", "antsel7", "antsel8", + "antsel9", "antsel10", "antsel11", + "antsel12", "antsel13", "antsel14", + "antsel15", "antsel16", "antsel17", + "antsel18", "antsel19", "antsel20", + "antsel21", "antsel22", "antsel23", + "antsel24", "antsel25", "antsel26", + "antsel27", "antsel28", "antsel29",}; static const char *mt7622_emmc_groups[] = { "emmc", "emmc_rst", }; static const char *mt7622_ethernet_groups[] = { "esw", "esw_p0_p1", "esw_p2_p3_p4", "mdc_mdio", @@ -732,6 +834,7 @@ static const char *mt7622_uart_groups[] = { "uart0_0_tx_rx", static const char *mt7622_wdt_groups[] = { "watchdog", }; static const struct function_desc mt7622_functions[] = { + {"antsel", mt7622_antsel_groups, ARRAY_SIZE(mt7622_antsel_groups)}, {"emmc", mt7622_emmc_groups, ARRAY_SIZE(mt7622_emmc_groups)}, {"eth", mt7622_ethernet_groups, ARRAY_SIZE(mt7622_ethernet_groups)}, {"i2c", mt7622_i2c_groups, ARRAY_SIZE(mt7622_i2c_groups)}, From 1c36e50f05d93d5485202eed05e1743897a766f0 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sun, 20 Sep 2020 21:58:48 +0200 Subject: [PATCH 294/433] dt-bindings: gpio: gpio-vf610: fix iMX 7ULP compatible matching The i.MX 7ULP DTSes use two compatibles so update the binding to fix dtbs_check warnings like: arch/arm/boot/dts/imx7ulp-com.dt.yaml: gpio@40ae0000: compatible: ['fsl,imx7ulp-gpio', 'fsl,vf610-gpio'] is too long arch/arm/boot/dts/imx7ulp-com.dt.yaml: gpio@40ae0000: compatible: Additional items are not allowed ('fsl,vf610-gpio' was unexpected) Signed-off-by: Krzysztof Kozlowski Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/gpio/gpio-vf610.yaml | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml b/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml index 6ac5a78ad3da..19738a457a58 100644 --- a/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml +++ b/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml @@ -19,9 +19,11 @@ description: | properties: compatible: - enum: - - fsl,vf610-gpio - - fsl,imx7ulp-gpio + oneOf: + - const: fsl,vf610-gpio + - items: + - const: fsl,imx7ulp-gpio + - const: fsl,vf610-gpio reg: description: The first reg tuple represents the PORT module, the second tuple From 8bccbeb6e501dae165a63da8a8903bb6b3f95b3b Mon Sep 17 00:00:00 2001 From: Chris Packham Date: Wed, 23 Sep 2020 17:16:37 +1200 Subject: [PATCH 295/433] dt-bindings: Add LM81 and DS1780 as trivial devices The LM81 and DS1780 are close relatives of the ADM9240 and already supported by the same driver. Document them as trivial devices. Signed-off-by: Chris Packham Link: https://lore.kernel.org/r/20200923051637.30464-1-chris.packham@alliedtelesis.co.nz Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/trivial-devices.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml index 4ace8039840a..6cfeee1b4527 100644 --- a/Documentation/devicetree/bindings/trivial-devices.yaml +++ b/Documentation/devicetree/bindings/trivial-devices.yaml @@ -54,6 +54,8 @@ properties: - dallas,ds1682 # Tiny Digital Thermometer and Thermostat - dallas,ds1775 + # CPU Peripheral Monitor + - dallas,ds1780 # CPU Supervisor with Nonvolatile Memory and Programmable I/O - dallas,ds4510 # Digital Thermometer and Thermostat @@ -296,6 +298,8 @@ properties: - national,lm75 # Serial Interface ACPI-Compatible Microprocessor System Hardware Monitor - national,lm80 + # Serial Interface ACPI-Compatible Microprocessor System Hardware Monitor + - national,lm81 # Temperature sensor with integrated fan control - national,lm85 # I2C ±0.33°C Accurate, 12-Bit + Sign Temperature Sensor and Thermal Window Comparator From b38b4183d282474de2e220b9953f021c4983da05 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 23 Sep 2020 17:03:39 +0200 Subject: [PATCH 296/433] dt-bindings: gpu: samsung-rotator: Add missing properties Add common properties appearing in DTSes (iommus, power-domains) to fix dtbs_check warnings like: arch/arm/boot/dts/exynos4210-i9100.dt.yaml: rotator@12810000: 'iommus', 'power-domains' do not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20200923150339.12497-1-krzk@kernel.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/gpu/samsung-rotator.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/gpu/samsung-rotator.yaml b/Documentation/devicetree/bindings/gpu/samsung-rotator.yaml index 665c6e3b31d3..62486f55177d 100644 --- a/Documentation/devicetree/bindings/gpu/samsung-rotator.yaml +++ b/Documentation/devicetree/bindings/gpu/samsung-rotator.yaml @@ -22,6 +22,12 @@ properties: interrupts: maxItems: 1 + iommus: + maxItems: 1 + + power-domains: + maxItems: 1 + clocks: maxItems: 1 From 873462adb0b3eef225efc756d18de6c27df178f2 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 25 Sep 2020 13:14:29 +0200 Subject: [PATCH 297/433] dt-bindings: example: Grammar improvements Improve grammar in recently added sentences: - Drop superfluous "be" in front of "have", - Add missing articles. Fixes: 73f76a41c4ed7def ("dt-bindings: example: Extend based on practice") Reviewed-by: Krzysztof Kozlowski Signed-off-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20200925111429.3146-1-geert+renesas@glider.be Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/example-schema.yaml | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/example-schema.yaml b/Documentation/devicetree/bindings/example-schema.yaml index 4552f2b988d0..a97f39109f8d 100644 --- a/Documentation/devicetree/bindings/example-schema.yaml +++ b/Documentation/devicetree/bindings/example-schema.yaml @@ -81,7 +81,7 @@ properties: maxItems: 1 description: bus clock. A description is only needed for a single item if there's something unique to add. - The items should be have a fixed order, so pattern matching names are + The items should have a fixed order, so pattern matching names are discouraged. clock-names: @@ -99,7 +99,7 @@ properties: A variable number of interrupts warrants a description of what conditions affect the number of interrupts. Otherwise, descriptions on standard properties are not necessary. - The items should be have a fixed order, so pattern matching names are + The items should have a fixed order, so pattern matching names are discouraged. interrupt-names: @@ -226,8 +226,8 @@ allOf: # This can't be used in cases where another schema is referenced # (i.e. allOf: [{$ref: ...}]). # If and only if another schema is referenced and arbitrary children nodes can -# appear, "unevaluatedProperties: false" could be used. Typical example is I2C -# controller where no name pattern matching for children can be added. +# appear, "unevaluatedProperties: false" could be used. A typical example is +# an I2C controller where no name pattern matching for children can be added. additionalProperties: false examples: From 4a3c53ce68c80c0a86cdf9f05cbf9037bfbebada Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 26 Sep 2020 18:27:58 +0200 Subject: [PATCH 298/433] dt-bindings: vendor-prefixes: add DFI Document binding for DFI Inc. company (https://www.dfi.com). Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20200926162811.5335-1-krzk@kernel.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index febe7f00b1f0..37784cbcbdbb 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -263,6 +263,8 @@ patternProperties: description: Denx Software Engineering "^devantech,.*": description: Devantech, Ltd. + "^dfi,.*": + description: DFI Inc. "^dh,.*": description: DH electronics GmbH "^difrnce,.*": From cdfd07d0e284ca114e966c82bbcfd08e1b00a633 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 26 Sep 2020 18:27:59 +0200 Subject: [PATCH 299/433] dt-bindings: vendor-prefixes: add iMX6 Rex Project Document vendor prefix for iMX6 Rex Project. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20200926162811.5335-2-krzk@kernel.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 37784cbcbdbb..2e302fecc9c1 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -878,6 +878,8 @@ patternProperties: description: Realtek Semiconductor Corp. "^renesas,.*": description: Renesas Electronics Corporation + "^rex,.*": + description: iMX6 Rex Project "^rervision,.*": description: Shenzhen Rervision Technology Co., Ltd. "^richtek,.*": From 2c72cdba6cc7b512915783862e2234e47c7cb9d3 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 26 Sep 2020 18:28:00 +0200 Subject: [PATCH 300/433] dt-bindings: vendor-prefixes: add Embest RIoT Document vendor prefix for Embest RIoT. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20200926162811.5335-3-krzk@kernel.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 2e302fecc9c1..b40c08aa39cb 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -890,6 +890,8 @@ patternProperties: description: Rikomagic Tech Corp. Ltd "^riscv,.*": description: RISC-V Foundation + "^riot,.*": + description: Embest RIoT "^rockchip,.*": description: Fuzhou Rockchip Electronics Co., Ltd "^rocktech,.*": From 83c84b8b9e6adb76c8b9efc1334f6ba0ac0b33d3 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 26 Sep 2020 18:28:01 +0200 Subject: [PATCH 301/433] dt-bindings: vendor-prefixes: add Wandbord/Technexion Document vendor prefix for Wandbord/Technexion. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20200926162811.5335-4-krzk@kernel.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index b40c08aa39cb..ac01dda0fa7e 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1144,6 +1144,8 @@ patternProperties: description: Vision Optical Technology Co., Ltd. "^vxt,.*": description: VXT Ltd + "^wand,.*": + description: Wandbord (Technexion) "^waveshare,.*": description: Waveshare Electronics "^wd,.*": From 99db399876f6ee8ebe15bb6ba4d38fdab3a52678 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 26 Sep 2020 18:28:02 +0200 Subject: [PATCH 302/433] dt-bindings: vendor-prefixes: add Zealz Document vendor prefix for Zealz. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20200926162811.5335-5-krzk@kernel.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index ac01dda0fa7e..844c25a24818 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1200,6 +1200,8 @@ patternProperties: description: Yones Toptech Co., Ltd. "^ysoft,.*": description: Y Soft Corporation a.s. + "^zealz,.*": + description: Zealz "^zarlink,.*": description: Zarlink Semiconductor "^zeitec,.*": From c9ca43d42ed8d5fd635d327a664ed1d8579eb2af Mon Sep 17 00:00:00 2001 From: Paras Sharma Date: Wed, 30 Sep 2020 11:35:26 +0530 Subject: [PATCH 303/433] serial: qcom_geni_serial: To correct QUP Version detection logic For QUP IP versions 2.5 and above the oversampling rate is halved from 32 to 16. Commit ce734600545f ("tty: serial: qcom_geni_serial: Update the oversampling rate") is pushed to handle this scenario. But the existing logic is failing to classify QUP Version 3.0 into the correct group ( 2.5 and above). As result Serial Engine clocks are not configured properly for baud rate and garbage data is sampled to FIFOs from the line. So, fix the logic to detect QUP with versions 2.5 and above. Fixes: ce734600545f ("tty: serial: qcom_geni_serial: Update the oversampling rate") Cc: stable Signed-off-by: Paras Sharma Reviewed-by: Akash Asthana Link: https://lore.kernel.org/r/1601445926-23673-1-git-send-email-parashar@codeaurora.org Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/qcom_geni_serial.c | 2 +- include/linux/qcom-geni-se.h | 3 +++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/tty/serial/qcom_geni_serial.c b/drivers/tty/serial/qcom_geni_serial.c index 8da2eb2d1090..291649f02821 100644 --- a/drivers/tty/serial/qcom_geni_serial.c +++ b/drivers/tty/serial/qcom_geni_serial.c @@ -1000,7 +1000,7 @@ static void qcom_geni_serial_set_termios(struct uart_port *uport, sampling_rate = UART_OVERSAMPLING; /* Sampling rate is halved for IP versions >= 2.5 */ ver = geni_se_get_qup_hw_version(&port->se); - if (GENI_SE_VERSION_MAJOR(ver) >= 2 && GENI_SE_VERSION_MINOR(ver) >= 5) + if (ver >= QUP_SE_VERSION_2_5) sampling_rate /= 2; clk_rate = get_clk_div_rate(baud, sampling_rate, &clk_div); diff --git a/include/linux/qcom-geni-se.h b/include/linux/qcom-geni-se.h index 8f385fbe5a0e..1c31f26ccc7a 100644 --- a/include/linux/qcom-geni-se.h +++ b/include/linux/qcom-geni-se.h @@ -248,6 +248,9 @@ struct geni_se { #define GENI_SE_VERSION_MINOR(ver) ((ver & HW_VER_MINOR_MASK) >> HW_VER_MINOR_SHFT) #define GENI_SE_VERSION_STEP(ver) (ver & HW_VER_STEP_MASK) +/* QUP SE VERSION value for major number 2 and minor number 5 */ +#define QUP_SE_VERSION_2_5 0x20050000 + /* * Define bandwidth thresholds that cause the underlying Core 2X interconnect * clock to run at the named frequency. These baseline values are recommended From 98a40a34e0b669d10a09fd90ec7dc425280e9e7f Mon Sep 17 00:00:00 2001 From: Rikard Falkeborn Date: Sat, 26 Sep 2020 22:23:42 +0200 Subject: [PATCH 304/433] pinctrl: nuvoton: npcm7xx: Constify static ops structs The only usage of these structs is to assign their address to various ops fields in the pinctrl_desc struct, which are const pointers. Make them const to allow the compiler to put them in read-only memory. Signed-off-by: Rikard Falkeborn Link: https://lore.kernel.org/r/20200926202342.31014-1-rikard.falkeborn@gmail.com Signed-off-by: Linus Walleij --- drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c index a935065cdac4..6de31b5ee358 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c @@ -1601,7 +1601,7 @@ static void npcm7xx_dt_free_map(struct pinctrl_dev *pctldev, kfree(map); } -static struct pinctrl_ops npcm7xx_pinctrl_ops = { +static const struct pinctrl_ops npcm7xx_pinctrl_ops = { .get_groups_count = npcm7xx_get_groups_count, .get_group_name = npcm7xx_get_group_name, .get_group_pins = npcm7xx_get_group_pins, @@ -1701,7 +1701,7 @@ static int npcm_gpio_set_direction(struct pinctrl_dev *pctldev, return 0; } -static struct pinmux_ops npcm7xx_pinmux_ops = { +static const struct pinmux_ops npcm7xx_pinmux_ops = { .get_functions_count = npcm7xx_get_functions_count, .get_function_name = npcm7xx_get_function_name, .get_function_groups = npcm7xx_get_function_groups, @@ -1842,7 +1842,7 @@ static int npcm7xx_config_set(struct pinctrl_dev *pctldev, unsigned int pin, return 0; } -static struct pinconf_ops npcm7xx_pinconf_ops = { +static const struct pinconf_ops npcm7xx_pinconf_ops = { .is_generic = true, .pin_config_get = npcm7xx_config_get, .pin_config_set = npcm7xx_config_set, From 48548c786572f96cae5b7238da5338aa11cc9d34 Mon Sep 17 00:00:00 2001 From: Wang Xiaojun Date: Thu, 17 Sep 2020 14:41:51 +0800 Subject: [PATCH 305/433] pinctrl: mediatek: use devm_platform_ioremap_resource_byname() Use the devm_platform_ioremap_resource_byname() helper instead of calling platform_get_resource_byname() and devm_ioremap_resource() separately. Signed-off-by: Wang Xiaojun Acked-by: Sean Wang Link: https://lore.kernel.org/r/20200917064151.2184010-1-wangxiaojun11@huawei.com Signed-off-by: Linus Walleij --- drivers/pinctrl/mediatek/pinctrl-moore.c | 11 ++--------- drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c | 9 +-------- drivers/pinctrl/mediatek/pinctrl-paris.c | 11 ++--------- 3 files changed, 5 insertions(+), 26 deletions(-) diff --git a/drivers/pinctrl/mediatek/pinctrl-moore.c b/drivers/pinctrl/mediatek/pinctrl-moore.c index aa1068d2867f..5e00f93ac998 100644 --- a/drivers/pinctrl/mediatek/pinctrl-moore.c +++ b/drivers/pinctrl/mediatek/pinctrl-moore.c @@ -589,7 +589,6 @@ int mtk_moore_pinctrl_probe(struct platform_device *pdev, const struct mtk_pin_soc *soc) { struct pinctrl_pin_desc *pins; - struct resource *res; struct mtk_pinctrl *hw; int err, i; @@ -612,14 +611,8 @@ int mtk_moore_pinctrl_probe(struct platform_device *pdev, return -ENOMEM; for (i = 0; i < hw->soc->nbase_names; i++) { - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, - hw->soc->base_names[i]); - if (!res) { - dev_err(&pdev->dev, "missing IO resource\n"); - return -ENXIO; - } - - hw->base[i] = devm_ioremap_resource(&pdev->dev, res); + hw->base[i] = devm_platform_ioremap_resource_byname(pdev, + hw->soc->base_names[i]); if (IS_ERR(hw->base[i])) return PTR_ERR(hw->base[i]); } diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c index 2f3dfb56c3fa..e8622c7e117a 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c @@ -354,7 +354,6 @@ static const struct mtk_eint_xt mtk_eint_xt = { int mtk_build_eint(struct mtk_pinctrl *hw, struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; - struct resource *res; if (!IS_ENABLED(CONFIG_EINT_MTK)) return 0; @@ -366,13 +365,7 @@ int mtk_build_eint(struct mtk_pinctrl *hw, struct platform_device *pdev) if (!hw->eint) return -ENOMEM; - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "eint"); - if (!res) { - dev_err(&pdev->dev, "Unable to get eint resource\n"); - return -ENODEV; - } - - hw->eint->base = devm_ioremap_resource(&pdev->dev, res); + hw->eint->base = devm_platform_ioremap_resource_byname(pdev, "eint"); if (IS_ERR(hw->eint->base)) return PTR_ERR(hw->eint->base); diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.c b/drivers/pinctrl/mediatek/pinctrl-paris.c index a23c18251965..623af4410b07 100644 --- a/drivers/pinctrl/mediatek/pinctrl-paris.c +++ b/drivers/pinctrl/mediatek/pinctrl-paris.c @@ -940,7 +940,6 @@ int mtk_paris_pinctrl_probe(struct platform_device *pdev, { struct pinctrl_pin_desc *pins; struct mtk_pinctrl *hw; - struct resource *res; int err, i; hw = devm_kzalloc(&pdev->dev, sizeof(*hw), GFP_KERNEL); @@ -963,14 +962,8 @@ int mtk_paris_pinctrl_probe(struct platform_device *pdev, return -ENOMEM; for (i = 0; i < hw->soc->nbase_names; i++) { - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, - hw->soc->base_names[i]); - if (!res) { - dev_err(&pdev->dev, "missing IO resource\n"); - return -ENXIO; - } - - hw->base[i] = devm_ioremap_resource(&pdev->dev, res); + hw->base[i] = devm_platform_ioremap_resource_byname(pdev, + hw->soc->base_names[i]); if (IS_ERR(hw->base[i])) return PTR_ERR(hw->base[i]); } From 3163508b207f4622ba6f288127d68656a98e36a6 Mon Sep 17 00:00:00 2001 From: Drew Fustini Date: Sat, 19 Sep 2020 22:08:37 +0200 Subject: [PATCH 306/433] pinctrl: Document pinctrl-single,pins when #pinctrl-cells = 2 Document the values in pinctrl-single,pins when #pinctrl-cells = <2> Fixes: 27c90e5e48d0 ("ARM: dts: am33xx-l4: change #pinctrl-cells from 1 to 2") Reported-by: Trent Piepho Signed-off-by: Drew Fustini Reviewed-by: Rob Herring Acked-by: Tony Lindgren Link: https://lore.kernel.org/linux-omap/3139716.CMS8C0sQ7x@zen.local/ Link: https://lore.kernel.org/r/20200919200836.3218536-1-drew@beagleboard.org Signed-off-by: Linus Walleij --- .../bindings/pinctrl/pinctrl-single.txt | 21 ++++++++++++------- 1 file changed, 14 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt index e705acd3612c..f903eb4471f8 100644 --- a/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt @@ -94,16 +94,23 @@ pinctrl-single,bit-per-mux is set), and uses the common pinctrl bindings as specified in the pinctrl-bindings.txt document in this directory. The pin configuration nodes for pinctrl-single are specified as pinctrl -register offset and value pairs using pinctrl-single,pins. Only the bits -specified in pinctrl-single,function-mask are updated. For example, setting -a pin for a device could be done with: +register offset and values using pinctrl-single,pins. Only the bits specified +in pinctrl-single,function-mask are updated. + +When #pinctrl-cells = 1, then setting a pin for a device could be done with: pinctrl-single,pins = <0xdc 0x118>; -Where 0xdc is the offset from the pinctrl register base address for the -device pinctrl register, and 0x118 contains the desired value of the -pinctrl register. See the device example and static board pins example -below for more information. +Where 0xdc is the offset from the pinctrl register base address for the device +pinctrl register, and 0x118 contains the desired value of the pinctrl register. + +When #pinctrl-cells = 2, then setting a pin for a device could be done with: + + pinctrl-single,pins = <0xdc 0x30 0x07>; + +Where 0x30 is the pin configuration value and 0x07 is the pin mux mode value. +These two values are OR'd together to produce the value stored at offset 0xdc. +See the device example and static board pins example below for more information. In case when one register changes more than one pin's mux the pinctrl-single,bits need to be used which takes three parameters: From cb8cc18508fb0cad74929ffd080bebafe91609e2 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Tue, 29 Sep 2020 14:03:04 +0300 Subject: [PATCH 307/433] pinctrl: tigerlake: Fix register offsets for TGL-H variant It appears that almost traditionally the H variants have some deviations in the register offsets in comparison to LP ones. This is the case for Intel Tiger Lake as well. Fix register offsets for TGL-H variant. Fixes: 653d96455e1e ("pinctrl: tigerlake: Add support for Tiger Lake-H") Reported-by: Pierre-Louis Bossart Signed-off-by: Andy Shevchenko Acked-by: Mika Westerberg Link: https://lore.kernel.org/r/20200929110306.40852-1-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij --- drivers/pinctrl/intel/pinctrl-tigerlake.c | 42 ++++++++++++++--------- 1 file changed, 25 insertions(+), 17 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-tigerlake.c b/drivers/pinctrl/intel/pinctrl-tigerlake.c index 8c162dd5f5a1..3e354e02f408 100644 --- a/drivers/pinctrl/intel/pinctrl-tigerlake.c +++ b/drivers/pinctrl/intel/pinctrl-tigerlake.c @@ -15,11 +15,13 @@ #include "pinctrl-intel.h" -#define TGL_PAD_OWN 0x020 -#define TGL_PADCFGLOCK 0x080 -#define TGL_HOSTSW_OWN 0x0b0 -#define TGL_GPI_IS 0x100 -#define TGL_GPI_IE 0x120 +#define TGL_PAD_OWN 0x020 +#define TGL_LP_PADCFGLOCK 0x080 +#define TGL_H_PADCFGLOCK 0x090 +#define TGL_LP_HOSTSW_OWN 0x0b0 +#define TGL_H_HOSTSW_OWN 0x0c0 +#define TGL_GPI_IS 0x100 +#define TGL_GPI_IE 0x120 #define TGL_GPP(r, s, e, g) \ { \ @@ -29,12 +31,12 @@ .gpio_base = (g), \ } -#define TGL_COMMUNITY(b, s, e, g) \ +#define TGL_COMMUNITY(b, s, e, pl, ho, g) \ { \ .barno = (b), \ .padown_offset = TGL_PAD_OWN, \ - .padcfglock_offset = TGL_PADCFGLOCK, \ - .hostown_offset = TGL_HOSTSW_OWN, \ + .padcfglock_offset = (pl), \ + .hostown_offset = (ho), \ .is_offset = TGL_GPI_IS, \ .ie_offset = TGL_GPI_IE, \ .pin_base = (s), \ @@ -43,6 +45,12 @@ .ngpps = ARRAY_SIZE(g), \ } +#define TGL_LP_COMMUNITY(b, s, e, g) \ + TGL_COMMUNITY(b, s, e, TGL_LP_PADCFGLOCK, TGL_LP_HOSTSW_OWN, g) + +#define TGL_H_COMMUNITY(b, s, e, g) \ + TGL_COMMUNITY(b, s, e, TGL_H_PADCFGLOCK, TGL_H_HOSTSW_OWN, g) + /* Tiger Lake-LP */ static const struct pinctrl_pin_desc tgllp_pins[] = { /* GPP_B */ @@ -367,10 +375,10 @@ static const struct intel_padgroup tgllp_community5_gpps[] = { }; static const struct intel_community tgllp_communities[] = { - TGL_COMMUNITY(0, 0, 66, tgllp_community0_gpps), - TGL_COMMUNITY(1, 67, 170, tgllp_community1_gpps), - TGL_COMMUNITY(2, 171, 259, tgllp_community4_gpps), - TGL_COMMUNITY(3, 260, 276, tgllp_community5_gpps), + TGL_LP_COMMUNITY(0, 0, 66, tgllp_community0_gpps), + TGL_LP_COMMUNITY(1, 67, 170, tgllp_community1_gpps), + TGL_LP_COMMUNITY(2, 171, 259, tgllp_community4_gpps), + TGL_LP_COMMUNITY(3, 260, 276, tgllp_community5_gpps), }; static const struct intel_pinctrl_soc_data tgllp_soc_data = { @@ -723,11 +731,11 @@ static const struct intel_padgroup tglh_community5_gpps[] = { }; static const struct intel_community tglh_communities[] = { - TGL_COMMUNITY(0, 0, 78, tglh_community0_gpps), - TGL_COMMUNITY(1, 79, 180, tglh_community1_gpps), - TGL_COMMUNITY(2, 181, 217, tglh_community3_gpps), - TGL_COMMUNITY(3, 218, 266, tglh_community4_gpps), - TGL_COMMUNITY(4, 267, 290, tglh_community5_gpps), + TGL_H_COMMUNITY(0, 0, 78, tglh_community0_gpps), + TGL_H_COMMUNITY(1, 79, 180, tglh_community1_gpps), + TGL_H_COMMUNITY(2, 181, 217, tglh_community3_gpps), + TGL_H_COMMUNITY(3, 218, 266, tglh_community4_gpps), + TGL_H_COMMUNITY(4, 267, 290, tglh_community5_gpps), }; static const struct intel_pinctrl_soc_data tglh_soc_data = { From 701372c7e8f173f9cd6d1d353606950e77444692 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Tue, 29 Sep 2020 14:03:05 +0300 Subject: [PATCH 308/433] pinctrl: cannonlake: Modify COMMUNITY macros to be consistent Modify COMMUNITY macros to be consistent with Tiger Lake and others. No functional change intended. Signed-off-by: Andy Shevchenko Acked-by: Mika Westerberg Link: https://lore.kernel.org/r/20200929110306.40852-2-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij --- drivers/pinctrl/intel/pinctrl-cannonlake.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-cannonlake.c b/drivers/pinctrl/intel/pinctrl-cannonlake.c index 515f57a0d180..8078c7739d6a 100644 --- a/drivers/pinctrl/intel/pinctrl-cannonlake.c +++ b/drivers/pinctrl/intel/pinctrl-cannonlake.c @@ -30,12 +30,12 @@ .gpio_base = (g), \ } -#define CNL_COMMUNITY(b, s, e, o, g) \ +#define CNL_COMMUNITY(b, s, e, ho, g) \ { \ .barno = (b), \ .padown_offset = CNL_PAD_OWN, \ .padcfglock_offset = CNL_PADCFGLOCK, \ - .hostown_offset = (o), \ + .hostown_offset = (ho), \ .is_offset = CNL_GPI_IS, \ .ie_offset = CNL_GPI_IE, \ .pin_base = (s), \ @@ -44,10 +44,10 @@ .ngpps = ARRAY_SIZE(g), \ } -#define CNLLP_COMMUNITY(b, s, e, g) \ +#define CNL_LP_COMMUNITY(b, s, e, g) \ CNL_COMMUNITY(b, s, e, CNL_LP_HOSTSW_OWN, g) -#define CNLH_COMMUNITY(b, s, e, g) \ +#define CNL_H_COMMUNITY(b, s, e, g) \ CNL_COMMUNITY(b, s, e, CNL_H_HOSTSW_OWN, g) /* Cannon Lake-H */ @@ -449,10 +449,10 @@ static const struct intel_function cnlh_functions[] = { }; static const struct intel_community cnlh_communities[] = { - CNLH_COMMUNITY(0, 0, 50, cnlh_community0_gpps), - CNLH_COMMUNITY(1, 51, 154, cnlh_community1_gpps), - CNLH_COMMUNITY(2, 155, 248, cnlh_community3_gpps), - CNLH_COMMUNITY(3, 249, 298, cnlh_community4_gpps), + CNL_H_COMMUNITY(0, 0, 50, cnlh_community0_gpps), + CNL_H_COMMUNITY(1, 51, 154, cnlh_community1_gpps), + CNL_H_COMMUNITY(2, 155, 248, cnlh_community3_gpps), + CNL_H_COMMUNITY(3, 249, 298, cnlh_community4_gpps), }; static const struct intel_pinctrl_soc_data cnlh_soc_data = { @@ -810,9 +810,9 @@ static const struct intel_padgroup cnllp_community4_gpps[] = { }; static const struct intel_community cnllp_communities[] = { - CNLLP_COMMUNITY(0, 0, 67, cnllp_community0_gpps), - CNLLP_COMMUNITY(1, 68, 180, cnllp_community1_gpps), - CNLLP_COMMUNITY(2, 181, 243, cnllp_community4_gpps), + CNL_LP_COMMUNITY(0, 0, 67, cnllp_community0_gpps), + CNL_LP_COMMUNITY(1, 68, 180, cnllp_community1_gpps), + CNL_LP_COMMUNITY(2, 181, 243, cnllp_community4_gpps), }; static const struct intel_pinctrl_soc_data cnllp_soc_data = { From a0cec28c965285c4debc00b035552f8096f2aee4 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Tue, 29 Sep 2020 14:03:06 +0300 Subject: [PATCH 309/433] pinctrl: sunrisepoint: Modify COMMUNITY macros to be consistent Modify COMMUNITY macros to be consistent with Tiger Lake and others. No functional change intended. Signed-off-by: Andy Shevchenko Acked-by: Mika Westerberg Link: https://lore.kernel.org/r/20200929110306.40852-3-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij --- drivers/pinctrl/intel/pinctrl-sunrisepoint.c | 60 +++++++++----------- 1 file changed, 27 insertions(+), 33 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-sunrisepoint.c b/drivers/pinctrl/intel/pinctrl-sunrisepoint.c index 4d7a86a5a37b..14eac924d43d 100644 --- a/drivers/pinctrl/intel/pinctrl-sunrisepoint.c +++ b/drivers/pinctrl/intel/pinctrl-sunrisepoint.c @@ -22,21 +22,26 @@ #define SPT_GPI_IS 0x100 #define SPT_GPI_IE 0x120 -#define SPT_COMMUNITY(b, s, e) \ +#define SPT_COMMUNITY(b, s, e, pl, gs, gn, g, n) \ { \ .barno = (b), \ .padown_offset = SPT_PAD_OWN, \ - .padcfglock_offset = SPT_LP_PADCFGLOCK, \ + .padcfglock_offset = (pl), \ .hostown_offset = SPT_HOSTSW_OWN, \ .is_offset = SPT_GPI_IS, \ .ie_offset = SPT_GPI_IE, \ - .gpp_size = 24, \ - .gpp_num_padown_regs = 4, \ + .gpp_size = (gs), \ + .gpp_num_padown_regs = (gn), \ .pin_base = (s), \ .npins = ((e) - (s) + 1), \ + .gpps = (g), \ + .ngpps = (n), \ } -#define SPTH_GPP(r, s, e, g) \ +#define SPT_LP_COMMUNITY(b, s, e) \ + SPT_COMMUNITY(b, s, e, SPT_LP_PADCFGLOCK, 24, 4, NULL, 0) + +#define SPT_H_GPP(r, s, e, g) \ { \ .reg_num = (r), \ .base = (s), \ @@ -44,19 +49,8 @@ .gpio_base = (g), \ } -#define SPTH_COMMUNITY(b, s, e, g) \ - { \ - .barno = (b), \ - .padown_offset = SPT_PAD_OWN, \ - .padcfglock_offset = SPT_H_PADCFGLOCK, \ - .hostown_offset = SPT_HOSTSW_OWN, \ - .is_offset = SPT_GPI_IS, \ - .ie_offset = SPT_GPI_IE, \ - .pin_base = (s), \ - .npins = ((e) - (s) + 1), \ - .gpps = (g), \ - .ngpps = ARRAY_SIZE(g), \ - } +#define SPT_H_COMMUNITY(b, s, e, g) \ + SPT_COMMUNITY(b, s, e, SPT_H_PADCFGLOCK, 0, 0, g, ARRAY_SIZE(g)) /* Sunrisepoint-LP */ static const struct pinctrl_pin_desc sptlp_pins[] = { @@ -292,9 +286,9 @@ static const struct intel_function sptlp_functions[] = { }; static const struct intel_community sptlp_communities[] = { - SPT_COMMUNITY(0, 0, 47), - SPT_COMMUNITY(1, 48, 119), - SPT_COMMUNITY(2, 120, 151), + SPT_LP_COMMUNITY(0, 0, 47), + SPT_LP_COMMUNITY(1, 48, 119), + SPT_LP_COMMUNITY(2, 120, 151), }; static const struct intel_pinctrl_soc_data sptlp_soc_data = { @@ -554,27 +548,27 @@ static const struct intel_function spth_functions[] = { }; static const struct intel_padgroup spth_community0_gpps[] = { - SPTH_GPP(0, 0, 23, 0), /* GPP_A */ - SPTH_GPP(1, 24, 47, 24), /* GPP_B */ + SPT_H_GPP(0, 0, 23, 0), /* GPP_A */ + SPT_H_GPP(1, 24, 47, 24), /* GPP_B */ }; static const struct intel_padgroup spth_community1_gpps[] = { - SPTH_GPP(0, 48, 71, 48), /* GPP_C */ - SPTH_GPP(1, 72, 95, 72), /* GPP_D */ - SPTH_GPP(2, 96, 108, 96), /* GPP_E */ - SPTH_GPP(3, 109, 132, 120), /* GPP_F */ - SPTH_GPP(4, 133, 156, 144), /* GPP_G */ - SPTH_GPP(5, 157, 180, 168), /* GPP_H */ + SPT_H_GPP(0, 48, 71, 48), /* GPP_C */ + SPT_H_GPP(1, 72, 95, 72), /* GPP_D */ + SPT_H_GPP(2, 96, 108, 96), /* GPP_E */ + SPT_H_GPP(3, 109, 132, 120), /* GPP_F */ + SPT_H_GPP(4, 133, 156, 144), /* GPP_G */ + SPT_H_GPP(5, 157, 180, 168), /* GPP_H */ }; static const struct intel_padgroup spth_community3_gpps[] = { - SPTH_GPP(0, 181, 191, 192), /* GPP_I */ + SPT_H_GPP(0, 181, 191, 192), /* GPP_I */ }; static const struct intel_community spth_communities[] = { - SPTH_COMMUNITY(0, 0, 47, spth_community0_gpps), - SPTH_COMMUNITY(1, 48, 180, spth_community1_gpps), - SPTH_COMMUNITY(2, 181, 191, spth_community3_gpps), + SPT_H_COMMUNITY(0, 0, 47, spth_community0_gpps), + SPT_H_COMMUNITY(1, 48, 180, spth_community1_gpps), + SPT_H_COMMUNITY(2, 181, 191, spth_community3_gpps), }; static const struct intel_pinctrl_soc_data spth_soc_data = { From 9ea40db477c024dcb87321b7f32bd6ea12130ac2 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Tue, 29 Sep 2020 17:19:20 +0800 Subject: [PATCH 310/433] tty: serial: lpuart: fix lpuart32_write usage The 2nd and 3rd parameter were wrongly used, and cause kernel abort when doing kgdb debug. Fixes: 1da17d7cf8e2 ("tty: serial: fsl_lpuart: Use appropriate lpuart32_* I/O funcs") Cc: stable Signed-off-by: Peng Fan Link: https://lore.kernel.org/r/20200929091920.22612-1-peng.fan@nxp.com Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/fsl_lpuart.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c index 5a5a22d77841..645bbb24b433 100644 --- a/drivers/tty/serial/fsl_lpuart.c +++ b/drivers/tty/serial/fsl_lpuart.c @@ -649,26 +649,24 @@ static int lpuart32_poll_init(struct uart_port *port) spin_lock_irqsave(&sport->port.lock, flags); /* Disable Rx & Tx */ - lpuart32_write(&sport->port, UARTCTRL, 0); + lpuart32_write(&sport->port, 0, UARTCTRL); temp = lpuart32_read(&sport->port, UARTFIFO); /* Enable Rx and Tx FIFO */ - lpuart32_write(&sport->port, UARTFIFO, - temp | UARTFIFO_RXFE | UARTFIFO_TXFE); + lpuart32_write(&sport->port, temp | UARTFIFO_RXFE | UARTFIFO_TXFE, UARTFIFO); /* flush Tx and Rx FIFO */ - lpuart32_write(&sport->port, UARTFIFO, - UARTFIFO_TXFLUSH | UARTFIFO_RXFLUSH); + lpuart32_write(&sport->port, UARTFIFO_TXFLUSH | UARTFIFO_RXFLUSH, UARTFIFO); /* explicitly clear RDRF */ if (lpuart32_read(&sport->port, UARTSTAT) & UARTSTAT_RDRF) { lpuart32_read(&sport->port, UARTDATA); - lpuart32_write(&sport->port, UARTFIFO, UARTFIFO_RXUF); + lpuart32_write(&sport->port, UARTFIFO_RXUF, UARTFIFO); } /* Enable Rx and Tx */ - lpuart32_write(&sport->port, UARTCTRL, UARTCTRL_RE | UARTCTRL_TE); + lpuart32_write(&sport->port, UARTCTRL_RE | UARTCTRL_TE, UARTCTRL); spin_unlock_irqrestore(&sport->port.lock, flags); return 0; @@ -677,7 +675,7 @@ static int lpuart32_poll_init(struct uart_port *port) static void lpuart32_poll_put_char(struct uart_port *port, unsigned char c) { lpuart32_wait_bit_set(port, UARTSTAT, UARTSTAT_TDRE); - lpuart32_write(port, UARTDATA, c); + lpuart32_write(port, c, UARTDATA); } static int lpuart32_poll_get_char(struct uart_port *port) From 29788ab1d2bf26c130de8f44f9553ee78a27e8d5 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Tue, 29 Sep 2020 17:55:09 +0800 Subject: [PATCH 311/433] tty: serial: fsl_lpuart: fix lpuart32_poll_get_char The watermark is set to 1, so we need to input two chars to trigger RDRF using the original logic. With the new logic, we could always get the char when there is data in FIFO. Suggested-by: Fugang Duan Signed-off-by: Peng Fan Link: https://lore.kernel.org/r/20200929095509.21680-1-peng.fan@nxp.com Cc: stable Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/fsl_lpuart.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c index 645bbb24b433..590c901a1fc5 100644 --- a/drivers/tty/serial/fsl_lpuart.c +++ b/drivers/tty/serial/fsl_lpuart.c @@ -680,7 +680,7 @@ static void lpuart32_poll_put_char(struct uart_port *port, unsigned char c) static int lpuart32_poll_get_char(struct uart_port *port) { - if (!(lpuart32_read(port, UARTSTAT) & UARTSTAT_RDRF)) + if (!(lpuart32_read(port, UARTWATER) >> UARTWATER_RXCNT_OFF)) return NO_POLL_CHAR; return lpuart32_read(port, UARTDATA); From 534cf755d9df99e214ddbe26b91cd4d81d2603e2 Mon Sep 17 00:00:00 2001 From: Peter Zijlstra Date: Wed, 30 Sep 2020 13:04:32 +0100 Subject: [PATCH 312/433] serial: pl011: Fix lockdep splat when handling magic-sysrq interrupt Issuing a magic-sysrq via the PL011 causes the following lockdep splat, which is easily reproducible under QEMU: | sysrq: Changing Loglevel | sysrq: Loglevel set to 9 | | ====================================================== | WARNING: possible circular locking dependency detected | 5.9.0-rc7 #1 Not tainted | ------------------------------------------------------ | systemd-journal/138 is trying to acquire lock: | ffffab133ad950c0 (console_owner){-.-.}-{0:0}, at: console_lock_spinning_enable+0x34/0x70 | | but task is already holding lock: | ffff0001fd47b098 (&port_lock_key){-.-.}-{2:2}, at: pl011_int+0x40/0x488 | | which lock already depends on the new lock. [...] | Possible unsafe locking scenario: | | CPU0 CPU1 | ---- ---- | lock(&port_lock_key); | lock(console_owner); | lock(&port_lock_key); | lock(console_owner); | | *** DEADLOCK *** The issue being that CPU0 takes 'port_lock' on the irq path in pl011_int() before taking 'console_owner' on the printk() path, whereas CPU1 takes the two locks in the opposite order on the printk() path due to setting the "console_owner" prior to calling into into the actual console driver. Fix this in the same way as the msm-serial driver by dropping 'port_lock' before handling the sysrq. Cc: # 4.19+ Cc: Russell King Cc: Greg Kroah-Hartman Cc: Jiri Slaby Link: https://lore.kernel.org/r/20200811101313.GA6970@willie-the-truck Signed-off-by: Peter Zijlstra Tested-by: Will Deacon Signed-off-by: Will Deacon Link: https://lore.kernel.org/r/20200930120432.16551-1-will@kernel.org Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/amba-pl011.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c index 67498594d7d7..87dc3fc15694 100644 --- a/drivers/tty/serial/amba-pl011.c +++ b/drivers/tty/serial/amba-pl011.c @@ -308,8 +308,9 @@ static void pl011_write(unsigned int val, const struct uart_amba_port *uap, */ static int pl011_fifo_to_tty(struct uart_amba_port *uap) { - u16 status; unsigned int ch, flag, fifotaken; + int sysrq; + u16 status; for (fifotaken = 0; fifotaken != 256; fifotaken++) { status = pl011_read(uap, REG_FR); @@ -344,10 +345,12 @@ static int pl011_fifo_to_tty(struct uart_amba_port *uap) flag = TTY_FRAME; } - if (uart_handle_sysrq_char(&uap->port, ch & 255)) - continue; + spin_unlock(&uap->port.lock); + sysrq = uart_handle_sysrq_char(&uap->port, ch & 255); + spin_lock(&uap->port.lock); - uart_insert_char(&uap->port, ch, UART011_DR_OE, ch, flag); + if (!sysrq) + uart_insert_char(&uap->port, ch, UART011_DR_OE, ch, flag); } return fifotaken; From 409cc4541ade015acd11f2566dcda599363a87a3 Mon Sep 17 00:00:00 2001 From: Andrij Abyzov Date: Mon, 28 Sep 2020 16:41:27 +0200 Subject: [PATCH 313/433] serial: 8250_fsl: Fix TX interrupt handling condition This is the port of the commit db1b5bc047b3 ("serial: 8250: Fix TX interrupt handling condition") to the 8250_fsl irq handling logic. Interrupt handler checked THRE bit (transmitter holding register empty) in LSR to detect if TX fifo is empty. In case when there is only receive interrupts the TX handling got called because THRE bit in LSR is set when there is no transmission (FIFO empty). TX handling caused TX stop, which in RS-485 half-duplex mode actually resets receiver FIFO. This is not desired during reception because of possible data loss. The fix is to check if THRI is set in IER in addition of the TX fifo status. THRI in IER is set when TX is started and cleared when TX is stopped. This ensures that TX handling is only called when there is really transmission on going and an interrupt for THRE and not when there are only RX interrupts. Signed-off-by: Andrij Abyzov Link: https://lore.kernel.org/r/20200928144127.87156-1-aabyzov@slb.com Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/8250/8250_fsl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/tty/serial/8250/8250_fsl.c b/drivers/tty/serial/8250/8250_fsl.c index c3582d8938d6..fbcc90c31ca1 100644 --- a/drivers/tty/serial/8250/8250_fsl.c +++ b/drivers/tty/serial/8250/8250_fsl.c @@ -78,7 +78,7 @@ int fsl8250_handle_irq(struct uart_port *port) serial8250_modem_status(up); - if (lsr & UART_LSR_THRE) + if ((lsr & UART_LSR_THRE) && (up->ier & UART_IER_THRI)) serial8250_tx_chars(up); up->lsr_saved_flags = orig_lsr; From edd64f30792dca1aee1fc27381b7c9c1ec0e9e58 Mon Sep 17 00:00:00 2001 From: Matthias Schiffer Date: Fri, 25 Sep 2020 10:24:12 +0200 Subject: [PATCH 314/433] tty: serial: imx: disable TXDC IRQ in imx_uart_shutdown() to avoid IRQ storm The IPG clock is disabled at the end of imx_uart_shutdown(); we really don't want to run any IRQ handlers after this point. At least on i.MX8MN, the UART will happily continue to generate interrupts even with its clocks disabled, but in this state, all register writes are ignored (which will cause the shadow registers to differ from the actual register values, resulting in all kinds of weirdness). In a transfer without DMA, this could lead to the following sequence of events: - The UART finishes its transmission while imx_uart_shutdown() is run, triggering the TXDC interrupt (we can trigger this fairly reliably by writing a single byte to the TTY and closing it right away) - imx_uart_shutdown() finishes, disabling the UART clocks - imx_uart_int() -> imx_uart_transmit_buffer() -> imx_uart_stop_tx() imx_uart_stop_tx() should now clear UCR4_TCEN to disable the TXDC interrupt, but this register write is ineffective. This results in an interrupt storm. To disable all interrupts in the same place, and to avoid setting UCR4 twice, clearing UCR4_OREN is moved below del_timer_sync() as well; this should be harmless. Signed-off-by: Matthias Schiffer Link: https://lore.kernel.org/r/20200925082412.12960-1-matthias.schiffer@ew.tq-group.com Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/imx.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c index 4e6ead1f650e..1731d9728865 100644 --- a/drivers/tty/serial/imx.c +++ b/drivers/tty/serial/imx.c @@ -1552,10 +1552,6 @@ static void imx_uart_shutdown(struct uart_port *port) ucr2 = imx_uart_readl(sport, UCR2); ucr2 &= ~(UCR2_TXEN | UCR2_ATEN); imx_uart_writel(sport, ucr2, UCR2); - - ucr4 = imx_uart_readl(sport, UCR4); - ucr4 &= ~UCR4_OREN; - imx_uart_writel(sport, ucr4, UCR4); spin_unlock_irqrestore(&sport->port.lock, flags); /* @@ -1568,10 +1564,15 @@ static void imx_uart_shutdown(struct uart_port *port) */ spin_lock_irqsave(&sport->port.lock, flags); + ucr1 = imx_uart_readl(sport, UCR1); ucr1 &= ~(UCR1_TRDYEN | UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN | UCR1_RXDMAEN | UCR1_ATDMAEN); - imx_uart_writel(sport, ucr1, UCR1); + + ucr4 = imx_uart_readl(sport, UCR4); + ucr4 &= ~(UCR4_OREN | UCR4_TCEN); + imx_uart_writel(sport, ucr4, UCR4); + spin_unlock_irqrestore(&sport->port.lock, flags); clk_disable_unprepare(sport->clk_per); From 7718453e36960dadb8dc46f2b514b309659e1270 Mon Sep 17 00:00:00 2001 From: Serge Semin Date: Wed, 23 Sep 2020 19:19:48 +0300 Subject: [PATCH 315/433] serial: 8250: Discard RTS/DTS setting from clock update method It has been a mistake to add the MCR register RTS/DTS fields setting in the generic method of the UART reference clock update. There is no point in asserting these lines at that procedure. Just discard the serial8250_out_MCR() mathod invocation from there then. Fixes: 868f3ee6e452 ("serial: 8250: Add 8250 port clock update method") Tested-by: Hans de Goede Signed-off-by: Serge Semin Link: https://lore.kernel.org/r/20200923161950.6237-2-Sergey.Semin@baikalelectronics.ru Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/8250/8250_port.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/8250_port.c index c71d647eb87a..1259fb6b66b3 100644 --- a/drivers/tty/serial/8250/8250_port.c +++ b/drivers/tty/serial/8250/8250_port.c @@ -2665,7 +2665,6 @@ void serial8250_update_uartclk(struct uart_port *port, unsigned int uartclk) serial8250_set_divisor(port, baud, quot, frac); serial_port_out(port, UART_LCR, up->lcr); - serial8250_out_MCR(up, UART_MCR_DTR | UART_MCR_RTS); spin_unlock_irqrestore(&port->lock, flags); serial8250_rpm_put(up); From c8dff3aa824177013d90967687f09f713a55d13f Mon Sep 17 00:00:00 2001 From: Serge Semin Date: Wed, 23 Sep 2020 19:19:49 +0300 Subject: [PATCH 316/433] serial: 8250: Skip uninitialized TTY port baud rate update It is erroneous to update the TTY port baud rate if it hasn't been initialized yet, because in that case the TTY struct isn't set. So there is no termios structure to get and re-calculate the baud if the current baud can't be reached. Let's skip the baud rate update then until the port is fully initialized. Note the update UART clock method still sets the uartclk member with a new ref clock value even if the port is turned off. The new UART ref clock rate will be used later on the port starting up procedure. Fixes: 868f3ee6e452 ("serial: 8250: Add 8250 port clock update method") Tested-by: Hans de Goede Signed-off-by: Serge Semin Link: https://lore.kernel.org/r/20200923161950.6237-3-Sergey.Semin@baikalelectronics.ru Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/8250/8250_port.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/8250_port.c index 1259fb6b66b3..b0af13074cd3 100644 --- a/drivers/tty/serial/8250/8250_port.c +++ b/drivers/tty/serial/8250/8250_port.c @@ -2653,6 +2653,10 @@ void serial8250_update_uartclk(struct uart_port *port, unsigned int uartclk) goto out_lock; port->uartclk = uartclk; + + if (!tty_port_initialized(&port->state->port)) + goto out_lock; + termios = &port->state->port.tty->termios; baud = serial8250_get_baud_rate(port, termios, NULL); From 85985a3dcd7415dd849cf62ec14f931cd905099a Mon Sep 17 00:00:00 2001 From: Serge Semin Date: Wed, 23 Sep 2020 19:19:50 +0300 Subject: [PATCH 317/433] serial: 8250_dw: Fix clk-notifier/port suspend deadlock It has been discovered that there is a potential deadlock between the clock-change-notifier thread and the UART port suspending one: CPU0 (suspend CPU/UART) CPU1 (update clock) ---- ---- lock(&port->mutex); lock((work_completion)(&data->clk_work)); lock(&port->mutex); lock((work_completion)(&data->clk_work)); *** DEADLOCK *** The best way to fix this is to eliminate the CPU0 port->mutex/work-completion scenario. So we suggest to register and unregister the clock-notifier during the DW APB UART port probe/remove procedures, instead of doing that at the points of the port startup/shutdown. Link: https://lore.kernel.org/linux-serial/f1cd5c75-9cda-6896-a4e2-42c5bfc3f5c3@redhat.com Fixes: cc816969d7b5 ("serial: 8250_dw: Fix common clocks usage race condition") Reported-by: Hans de Goede Tested-by: Hans de Goede Signed-off-by: Serge Semin Link: https://lore.kernel.org/r/20200923161950.6237-4-Sergey.Semin@baikalelectronics.ru Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/8250/8250_dw.c | 54 +++++++++++-------------------- 1 file changed, 19 insertions(+), 35 deletions(-) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index 87f450b7c177..9e204f9b799a 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -373,39 +373,6 @@ static void dw8250_set_ldisc(struct uart_port *p, struct ktermios *termios) serial8250_do_set_ldisc(p, termios); } -static int dw8250_startup(struct uart_port *p) -{ - struct dw8250_data *d = to_dw8250_data(p->private_data); - int ret; - - /* - * Some platforms may provide a reference clock shared between several - * devices. In this case before using the serial port first we have to - * make sure that any clock state change is known to the UART port at - * least post factum. - */ - if (d->clk) { - ret = clk_notifier_register(d->clk, &d->clk_notifier); - if (ret) - dev_warn(p->dev, "Failed to set the clock notifier\n"); - } - - return serial8250_do_startup(p); -} - -static void dw8250_shutdown(struct uart_port *p) -{ - struct dw8250_data *d = to_dw8250_data(p->private_data); - - serial8250_do_shutdown(p); - - if (d->clk) { - clk_notifier_unregister(d->clk, &d->clk_notifier); - - flush_work(&d->clk_work); - } -} - /* * dw8250_fallback_dma_filter will prevent the UART from getting just any free * channel on platforms that have DMA engines, but don't have any channels @@ -501,8 +468,6 @@ static int dw8250_probe(struct platform_device *pdev) p->serial_out = dw8250_serial_out; p->set_ldisc = dw8250_set_ldisc; p->set_termios = dw8250_set_termios; - p->startup = dw8250_startup; - p->shutdown = dw8250_shutdown; p->membase = devm_ioremap(dev, regs->start, resource_size(regs)); if (!p->membase) @@ -622,6 +587,19 @@ static int dw8250_probe(struct platform_device *pdev) goto err_reset; } + /* + * Some platforms may provide a reference clock shared between several + * devices. In this case any clock state change must be known to the + * UART port at least post factum. + */ + if (data->clk) { + err = clk_notifier_register(data->clk, &data->clk_notifier); + if (err) + dev_warn(p->dev, "Failed to set the clock notifier\n"); + else + queue_work(system_unbound_wq, &data->clk_work); + } + platform_set_drvdata(pdev, data); pm_runtime_set_active(dev); @@ -648,6 +626,12 @@ static int dw8250_remove(struct platform_device *pdev) pm_runtime_get_sync(dev); + if (data->clk) { + clk_notifier_unregister(data->clk, &data->clk_notifier); + + flush_work(&data->clk_work); + } + serial8250_unregister_port(data->data.line); reset_control_assert(data->rst); From 31c53962d65fb813eded2332b0fff60ffaaf2368 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 12 Aug 2020 14:29:03 +0200 Subject: [PATCH 318/433] mfd: Kconfig: Fix typo of 'individual' individul -> individual Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Lee Jones --- drivers/mfd/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index ed90eb5bdc83..4b918fdcc7c7 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -493,7 +493,7 @@ config MFD_HI6421_PMIC Add support for HiSilicon Hi6421 PMIC. Hi6421 includes multi- functions, such as regulators, RTC, codec, Coulomb counter, etc. This driver includes core APIs _only_. You have to select - individul components like voltage regulators under corresponding + individual components like voltage regulators under corresponding menus in order to enable them. We communicate with the Hi6421 via memory-mapped I/O. From d1264a075ed65d6b174a4742e69186125e66fd27 Mon Sep 17 00:00:00 2001 From: Andreas Kemnade Date: Sat, 15 Aug 2020 18:56:10 +0200 Subject: [PATCH 319/433] mfd: rn5t618: Add a power supply subdevice The RN5T618 and RC5T619 both have a charger and a fuel gauge, so add a subdevice for it. According to drivers in the wild, things should be at least similar, but since it is not tested, add it only to the RC5T619. Signed-off-by: Andreas Kemnade Signed-off-by: Lee Jones --- drivers/mfd/rn5t618.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mfd/rn5t618.c b/drivers/mfd/rn5t618.c index e25407ed3ad4..dc452df1f1bf 100644 --- a/drivers/mfd/rn5t618.c +++ b/drivers/mfd/rn5t618.c @@ -25,6 +25,7 @@ static const struct mfd_cell rn5t618_cells[] = { static const struct mfd_cell rc5t619_cells[] = { { .name = "rn5t618-adc" }, + { .name = "rn5t618-power" }, { .name = "rn5t618-regulator" }, { .name = "rc5t619-rtc" }, { .name = "rn5t618-wdt" }, From e26ea09b6e0995cb65760e44042e26d3e40452a7 Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Fri, 28 Aug 2020 09:37:04 +0100 Subject: [PATCH 320/433] mfd: khadas-mcu: Fix randconfig 'unused-const-variable' warning When testing with !OF, the build system reports: >> drivers/mfd/khadas-mcu.c:125:34: warning: unused variable 'khadas_mcu_of_match' [-Wunused-const-variable] static const struct of_device_id khadas_mcu_of_match[] = { ^ Reported-by: kernel test robot Acked-by: Neil Armstrong Signed-off-by: Lee Jones --- drivers/mfd/khadas-mcu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mfd/khadas-mcu.c b/drivers/mfd/khadas-mcu.c index 44d5bb462dab..f3d418810693 100644 --- a/drivers/mfd/khadas-mcu.c +++ b/drivers/mfd/khadas-mcu.c @@ -122,11 +122,13 @@ static int khadas_mcu_probe(struct i2c_client *client, return 0; } +#ifdef CONFIG_OF static const struct of_device_id khadas_mcu_of_match[] = { { .compatible = "khadas,mcu", }, {}, }; MODULE_DEVICE_TABLE(of, khadas_mcu_of_match); +#endif static struct i2c_driver khadas_mcu_driver = { .driver = { From ffa9cda9e62fe0afb5e7899985d615bdb36a2a03 Mon Sep 17 00:00:00 2001 From: Lubomir Rintel Date: Fri, 10 Jul 2020 01:12:27 +0200 Subject: [PATCH 321/433] dt-bindings: mfd: Add ENE KB3930 Embedded Controller binding Add binding document for the ENE KB3930 Embedded Controller. Signed-off-by: Lubomir Rintel Reviewed-by: Rob Herring Reviewed-by: Dmitry Osipenko Signed-off-by: Lee Jones --- .../devicetree/bindings/mfd/ene-kb3930.yaml | 55 +++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/ene-kb3930.yaml diff --git a/Documentation/devicetree/bindings/mfd/ene-kb3930.yaml b/Documentation/devicetree/bindings/mfd/ene-kb3930.yaml new file mode 100644 index 000000000000..074243c40891 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/ene-kb3930.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/ene-kb3930.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ENE KB3930 Embedded Controller bindings + +description: | + This binding describes the ENE KB3930 Embedded Controller attached to an + I2C bus. + +maintainers: + - Lubomir Rintel + +properties: + compatible: + items: + - enum: + - dell,wyse-ariel-ec # Dell Wyse Ariel board (3020) + - const: ene,kb3930 + reg: + maxItems: 1 + + off-gpios: + description: GPIO used with the shutdown protocol on Ariel + maxItems: 2 + + system-power-controller: true + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + embedded-controller@58 { + compatible = "dell,wyse-ariel-ec", "ene,kb3930"; + reg = <0x58>; + system-power-controller; + + off-gpios = <&gpio 126 GPIO_ACTIVE_HIGH>, + <&gpio 127 GPIO_ACTIVE_HIGH>; + }; + }; + +... From ede6b2d1dfc0d6a7b0b3161a2e911d464e28e0ad Mon Sep 17 00:00:00 2001 From: Lubomir Rintel Date: Fri, 10 Jul 2020 01:12:28 +0200 Subject: [PATCH 322/433] mfd: ene-kb3930: Add driver for ENE KB3930 Embedded Controller This driver provides access to the EC RAM of said embedded controller attached to the I2C bus as well as optionally supporting its slightly weird power-off/restart protocol. A particular implementation of the EC firmware can be identified by a model byte. If this driver identifies the Dell Ariel platform, it registers the appropriate cells. Signed-off-by: Lubomir Rintel Signed-off-by: Lee Jones --- drivers/mfd/Kconfig | 11 ++ drivers/mfd/Makefile | 1 + drivers/mfd/ene-kb3930.c | 212 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 224 insertions(+) create mode 100644 drivers/mfd/ene-kb3930.c diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 4b918fdcc7c7..e1d3bf77b245 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -398,6 +398,17 @@ config MFD_DLN2 etc. must be enabled in order to use the functionality of the device. +config MFD_ENE_KB3930 + tristate "ENE KB3930 Embedded Controller support" + depends on I2C + depends on MACH_MMP3_DT || COMPILE_TEST + select MFD_CORE + help + This adds support for the power-off functionality and access to + the registers that control LEDS and USB port power on ENE KB3930 + Embedded Controller. To use the LED functionality LEDS_ARIEL must + be enabled. + config MFD_EXYNOS_LPASS tristate "Samsung Exynos SoC Low Power Audio Subsystem" depends on ARCH_EXYNOS || COMPILE_TEST diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 78d24a3e7c9e..e6c7520ed129 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -14,6 +14,7 @@ obj-$(CONFIG_ARCH_BCM2835) += bcm2835-pm.o obj-$(CONFIG_MFD_BCM590XX) += bcm590xx.o obj-$(CONFIG_MFD_BD9571MWV) += bd9571mwv.o obj-$(CONFIG_MFD_CROS_EC_DEV) += cros_ec_dev.o +obj-$(CONFIG_MFD_ENE_KB3930) += ene-kb3930.o obj-$(CONFIG_MFD_EXYNOS_LPASS) += exynos-lpass.o obj-$(CONFIG_MFD_GATEWORKS_GSC) += gateworks-gsc.o diff --git a/drivers/mfd/ene-kb3930.c b/drivers/mfd/ene-kb3930.c new file mode 100644 index 000000000000..1c32ff586816 --- /dev/null +++ b/drivers/mfd/ene-kb3930.c @@ -0,0 +1,212 @@ +// SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0-or-later +/* + * ENE KB3930 Embedded Controller Driver + * + * Copyright (C) 2020 Lubomir Rintel + */ + +#include +#include +#include +#include +#include +#include +#include + +/* I2C registers that are multiplexing access to the EC RAM. */ +enum { + EC_DATA_IN = 0x00, + EC_RAM_OUT = 0x80, + EC_RAM_IN = 0x81, +}; + +/* EC RAM registers. */ +enum { + EC_MODEL = 0x30, + EC_VERSION_MAJ = 0x31, + EC_VERSION_MIN = 0x32, +}; + +struct kb3930 { + struct i2c_client *client; + struct regmap *ram_regmap; + struct gpio_descs *off_gpios; +}; + +struct kb3930 *kb3930_power_off; + +#define EC_GPIO_WAVE 0 +#define EC_GPIO_OFF_MODE 1 + +#define EC_OFF_MODE_REBOOT 0 +#define EC_OFF_MODE_POWER 1 + +static void kb3930_off(struct kb3930 *ddata, int off_mode) +{ + gpiod_direction_output(ddata->off_gpios->desc[EC_GPIO_OFF_MODE], + off_mode); + + /* + * This creates a 10 Hz wave on EC_GPIO_WAVE that signals a + * shutdown request to the EC. Once the EC detects it, it will + * proceed to turn the power off or reset the board depending on + * the value of EC_GPIO_OFF_MODE. + */ + while (1) { + mdelay(50); + gpiod_direction_output(ddata->off_gpios->desc[EC_GPIO_WAVE], 0); + mdelay(50); + gpiod_direction_output(ddata->off_gpios->desc[EC_GPIO_WAVE], 1); + } +} + +static int kb3930_restart(struct notifier_block *this, + unsigned long mode, void *cmd) +{ + kb3930_off(kb3930_power_off, EC_OFF_MODE_REBOOT); + return NOTIFY_DONE; +} + +static void kb3930_pm_power_off(void) +{ + kb3930_off(kb3930_power_off, EC_OFF_MODE_POWER); +} + +static struct notifier_block kb3930_restart_nb = { + .notifier_call = kb3930_restart, +}; + +static const struct mfd_cell ariel_ec_cells[] = { + { .name = "dell-wyse-ariel-led", }, + { .name = "dell-wyse-ariel-power", }, +}; + +static int kb3930_ec_ram_reg_write(void *context, unsigned int reg, + unsigned int val) +{ + struct kb3930 *ddata = context; + + return i2c_smbus_write_word_data(ddata->client, EC_RAM_OUT, + (val << 8) | reg); +} + +static int kb3930_ec_ram_reg_read(void *context, unsigned int reg, + unsigned int *val) +{ + struct kb3930 *ddata = context; + int ret; + + ret = i2c_smbus_write_word_data(ddata->client, EC_RAM_IN, reg); + if (ret < 0) + return ret; + + ret = i2c_smbus_read_word_data(ddata->client, EC_DATA_IN); + if (ret < 0) + return ret; + + *val = ret >> 8; + return 0; +} + +static const struct regmap_config kb3930_ram_regmap_config = { + .name = "ec_ram", + .reg_bits = 8, + .val_bits = 8, + .reg_stride = 1, + .max_register = 0xff, + .reg_write = kb3930_ec_ram_reg_write, + .reg_read = kb3930_ec_ram_reg_read, + .fast_io = false, +}; + +static int kb3930_probe(struct i2c_client *client) +{ + struct device *dev = &client->dev; + struct device_node *np = dev->of_node; + struct kb3930 *ddata; + unsigned int model; + int ret; + + ddata = devm_kzalloc(dev, sizeof(*ddata), GFP_KERNEL); + if (!ddata) + return -ENOMEM; + + kb3930_power_off = ddata; + ddata->client = client; + i2c_set_clientdata(client, ddata); + + ddata->ram_regmap = devm_regmap_init(dev, NULL, ddata, + &kb3930_ram_regmap_config); + if (IS_ERR(ddata->ram_regmap)) + return PTR_ERR(ddata->ram_regmap); + + ret = regmap_read(ddata->ram_regmap, EC_MODEL, &model); + if (ret < 0) + return ret; + + /* Currently we only support the cells present on Dell Ariel model. */ + if (model != 'J') { + dev_err(dev, "unknown board model: %02x\n", model); + return -ENODEV; + } + + ret = devm_mfd_add_devices(dev, PLATFORM_DEVID_AUTO, + ariel_ec_cells, + ARRAY_SIZE(ariel_ec_cells), + NULL, 0, NULL); + if (ret) + return ret; + + if (of_property_read_bool(np, "system-power-controller")) { + ddata->off_gpios = + devm_gpiod_get_array_optional(dev, "off", GPIOD_IN); + if (IS_ERR(ddata->off_gpios)) + return PTR_ERR(ddata->off_gpios); + if (ddata->off_gpios->ndescs < 2) { + dev_err(dev, "invalid off-gpios property\n"); + return -EINVAL; + } + } + + if (ddata->off_gpios) { + register_restart_handler(&kb3930_restart_nb); + if (!pm_power_off) + pm_power_off = kb3930_pm_power_off; + } + + return 0; +} + +static int kb3930_remove(struct i2c_client *client) +{ + struct kb3930 *ddata = i2c_get_clientdata(client); + + if (ddata->off_gpios) { + if (pm_power_off == kb3930_pm_power_off) + pm_power_off = NULL; + unregister_restart_handler(&kb3930_restart_nb); + } + kb3930_power_off = NULL; + + return 0; +} + +static const struct of_device_id kb3930_dt_ids[] = { + { .compatible = "ene,kb3930" }, + { } +}; +MODULE_DEVICE_TABLE(of, kb3930_dt_ids); + +static struct i2c_driver kb3930_driver = { + .probe_new = kb3930_probe, + .remove = kb3930_remove, + .driver = { + .name = "ene-kb3930", + .of_match_table = of_match_ptr(kb3930_dt_ids), + }, +}; +module_i2c_driver(kb3930_driver); + +MODULE_AUTHOR("Lubomir Rintel "); +MODULE_DESCRIPTION("ENE KB3930 Embedded Controller Driver"); +MODULE_LICENSE("Dual BSD/GPL"); From f104563fe08047b18cd3c96b41de0bc9c16739c7 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 26 Aug 2020 16:49:33 +0200 Subject: [PATCH 323/433] mfd: madera: Simplify with dev_err_probe() Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and also it prints the error value. Signed-off-by: Krzysztof Kozlowski Acked-by: Charles Keepax Signed-off-by: Lee Jones --- drivers/mfd/madera-core.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/drivers/mfd/madera-core.c b/drivers/mfd/madera-core.c index 8a8d733fdce5..4ed6ad8ce002 100644 --- a/drivers/mfd/madera-core.c +++ b/drivers/mfd/madera-core.c @@ -369,19 +369,14 @@ EXPORT_SYMBOL_GPL(madera_of_match); static int madera_get_reset_gpio(struct madera *madera) { struct gpio_desc *reset; - int ret; if (madera->pdata.reset) return 0; reset = devm_gpiod_get_optional(madera->dev, "reset", GPIOD_OUT_LOW); - if (IS_ERR(reset)) { - ret = PTR_ERR(reset); - if (ret != -EPROBE_DEFER) - dev_err(madera->dev, "Failed to request /RESET: %d\n", - ret); - return ret; - } + if (IS_ERR(reset)) + return dev_err_probe(madera->dev, PTR_ERR(reset), + "Failed to request /RESET"); /* * A hard reset is needed for full reset of the chip. We allow running From 41c9c06c491a92e186e41ff64163fa74f08e15e6 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 26 Aug 2020 16:49:34 +0200 Subject: [PATCH 324/433] mfd: stmfx: Simplify with dev_err_probe() Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and also it prints the error value. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Lee Jones --- drivers/mfd/stmfx.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/mfd/stmfx.c b/drivers/mfd/stmfx.c index 711979afd90a..5e680bfdf5c9 100644 --- a/drivers/mfd/stmfx.c +++ b/drivers/mfd/stmfx.c @@ -331,11 +331,9 @@ static int stmfx_chip_init(struct i2c_client *client) ret = PTR_ERR_OR_ZERO(stmfx->vdd); if (ret == -ENODEV) { stmfx->vdd = NULL; - } else if (ret == -EPROBE_DEFER) { - return ret; - } else if (ret) { - dev_err(&client->dev, "Failed to get VDD regulator: %d\n", ret); - return ret; + } else { + return dev_err_probe(&client->dev, ret, + "Failed to get VDD regulator\n"); } if (stmfx->vdd) { From 0f1b1b899521e3380a01f9f88a1bcb6163b7ee9f Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 26 Aug 2020 16:49:35 +0200 Subject: [PATCH 325/433] mfd: wcd934x: Simplify with dev_err_probe() Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and also it prints the error value. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Lee Jones --- drivers/mfd/wcd934x.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/drivers/mfd/wcd934x.c b/drivers/mfd/wcd934x.c index da910302d51a..c274d733b656 100644 --- a/drivers/mfd/wcd934x.c +++ b/drivers/mfd/wcd934x.c @@ -219,12 +219,9 @@ static int wcd934x_slim_probe(struct slim_device *sdev) return -ENOMEM; ddata->irq = of_irq_get(np, 0); - if (ddata->irq < 0) { - if (ddata->irq != -EPROBE_DEFER) - dev_err(ddata->dev, "Failed to get IRQ: err = %d\n", - ddata->irq); - return ddata->irq; - } + if (ddata->irq < 0) + return dev_err_probe(ddata->dev, ddata->irq, + "Failed to get IRQ\n"); reset_gpio = of_get_named_gpio(np, "reset-gpios", 0); if (reset_gpio < 0) { From b6d213fb0b503683c0c6d33d80c85babd36bf0fc Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Wed, 26 Aug 2020 22:21:49 +0200 Subject: [PATCH 326/433] mfd: dm355evm_msp: Convert LEDs to GPIO descriptor table This converts the DaVinci DM355EVM LEDs to use GPIO descriptor look-ups. Cc: Sekhar Nori Cc: Bartosz Golaszewski Signed-off-by: Linus Walleij Signed-off-by: Lee Jones --- drivers/mfd/dm355evm_msp.c | 76 +++++++++++++++++++++++++------------- 1 file changed, 50 insertions(+), 26 deletions(-) diff --git a/drivers/mfd/dm355evm_msp.c b/drivers/mfd/dm355evm_msp.c index 151c36ce7343..54fb6cbd2aa0 100644 --- a/drivers/mfd/dm355evm_msp.c +++ b/drivers/mfd/dm355evm_msp.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -116,6 +117,54 @@ static const u8 msp_gpios[] = { MSP_GPIO(4, SDMMC), MSP_GPIO(3, SDMMC), /* mmc1 WP, nCD */ }; +static struct gpio_led evm_leds[] = { + { .name = "dm355evm::ds14", + .default_trigger = "heartbeat", }, + { .name = "dm355evm::ds15", + .default_trigger = "mmc0", }, + { .name = "dm355evm::ds16", + /* could also be a CE-ATA drive */ + .default_trigger = "mmc1", }, + { .name = "dm355evm::ds17", + .default_trigger = "nand-disk", }, + { .name = "dm355evm::ds18", }, + { .name = "dm355evm::ds19", }, + { .name = "dm355evm::ds20", }, + { .name = "dm355evm::ds21", }, +}; + +static struct gpio_led_platform_data evm_led_data = { + .num_leds = ARRAY_SIZE(evm_leds), + .leds = evm_leds, +}; + +static struct gpiod_lookup_table evm_leds_gpio_table = { + .dev_id = "leds-gpio", + .table = { + /* + * These GPIOs are on the dm355evm_msp + * GPIO chip at index 0..7 + */ + GPIO_LOOKUP_IDX("dm355evm_msp", 0, NULL, + 0, GPIO_ACTIVE_LOW), + GPIO_LOOKUP_IDX("dm355evm_msp", 1, NULL, + 1, GPIO_ACTIVE_LOW), + GPIO_LOOKUP_IDX("dm355evm_msp", 2, NULL, + 2, GPIO_ACTIVE_LOW), + GPIO_LOOKUP_IDX("dm355evm_msp", 3, NULL, + 3, GPIO_ACTIVE_LOW), + GPIO_LOOKUP_IDX("dm355evm_msp", 4, NULL, + 4, GPIO_ACTIVE_LOW), + GPIO_LOOKUP_IDX("dm355evm_msp", 5, NULL, + 5, GPIO_ACTIVE_LOW), + GPIO_LOOKUP_IDX("dm355evm_msp", 6, NULL, + 6, GPIO_ACTIVE_LOW), + GPIO_LOOKUP_IDX("dm355evm_msp", 7, NULL, + 7, GPIO_ACTIVE_LOW), + { }, + }, +}; + #define MSP_GPIO_REG(offset) (msp_gpios[(offset)] >> 3) #define MSP_GPIO_MASK(offset) BIT(msp_gpios[(offset)] & 0x07) @@ -260,32 +309,7 @@ static int add_children(struct i2c_client *client) /* LED output */ if (msp_has_leds()) { -#define GPIO_LED(l) .name = l, .active_low = true - static struct gpio_led evm_leds[] = { - { GPIO_LED("dm355evm::ds14"), - .default_trigger = "heartbeat", }, - { GPIO_LED("dm355evm::ds15"), - .default_trigger = "mmc0", }, - { GPIO_LED("dm355evm::ds16"), - /* could also be a CE-ATA drive */ - .default_trigger = "mmc1", }, - { GPIO_LED("dm355evm::ds17"), - .default_trigger = "nand-disk", }, - { GPIO_LED("dm355evm::ds18"), }, - { GPIO_LED("dm355evm::ds19"), }, - { GPIO_LED("dm355evm::ds20"), }, - { GPIO_LED("dm355evm::ds21"), }, - }; -#undef GPIO_LED - - struct gpio_led_platform_data evm_led_data = { - .num_leds = ARRAY_SIZE(evm_leds), - .leds = evm_leds, - }; - - for (i = 0; i < ARRAY_SIZE(evm_leds); i++) - evm_leds[i].gpio = i + dm355evm_msp_gpio.base; - + gpiod_add_lookup_table(&evm_leds_gpio_table); /* NOTE: these are the only fully programmable LEDs * on the board, since GPIO-61/ds22 (and many signals * going to DC7) must be used for AEMIF address lines From 5f039fa742b6d8b4bbb7eb1a91c0dd251f03712d Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Fri, 21 Aug 2020 17:25:09 +0300 Subject: [PATCH 327/433] mfd: intel-lpss: Add device IDs for UART ports for Lakefield Add PCI IDs for Lakefield to the list of supported UARTs. Cc: Jarkko Nikula Cc: Mika Westerberg Cc: "Ravi V. Shankar" Signed-off-by: Ricardo Neri Signed-off-by: Andy Shevchenko Signed-off-by: Lee Jones --- drivers/mfd/intel-lpss-pci.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/mfd/intel-lpss-pci.c b/drivers/mfd/intel-lpss-pci.c index 9a58032f818a..2d7c588ef1ed 100644 --- a/drivers/mfd/intel-lpss-pci.c +++ b/drivers/mfd/intel-lpss-pci.c @@ -293,6 +293,10 @@ static const struct pci_device_id intel_lpss_pci_ids[] = { { PCI_VDEVICE(INTEL, 0x5ac4), (kernel_ulong_t)&bxt_info }, { PCI_VDEVICE(INTEL, 0x5ac6), (kernel_ulong_t)&bxt_info }, { PCI_VDEVICE(INTEL, 0x5aee), (kernel_ulong_t)&bxt_uart_info }, + /* LKF */ + { PCI_VDEVICE(INTEL, 0x98a8), (kernel_ulong_t)&bxt_uart_info }, + { PCI_VDEVICE(INTEL, 0x98a9), (kernel_ulong_t)&bxt_uart_info }, + { PCI_VDEVICE(INTEL, 0x98c7), (kernel_ulong_t)&bxt_uart_info }, /* SPT-LP */ { PCI_VDEVICE(INTEL, 0x9d27), (kernel_ulong_t)&spt_uart_info }, { PCI_VDEVICE(INTEL, 0x9d28), (kernel_ulong_t)&spt_uart_info }, From a75bfc824a2d33f57ebdc003bfe6b7a9e11e9cb9 Mon Sep 17 00:00:00 2001 From: Baolin Wang Date: Tue, 18 Aug 2020 11:41:58 +0800 Subject: [PATCH 328/433] mfd: sprd: Add wakeup capability for PMIC IRQ When changing to use suspend-to-idle to save power, the PMIC irq can not wakeup the system due to lack of wakeup capability, which will cause the sub-irqs (such as power key) of the PMIC can not wake up the system. Thus we can add the wakeup capability for PMIC irq to solve this issue, as well as removing the IRQF_NO_SUSPEND flag to allow PMIC irq to be a wakeup source. Reported-by: Chunyan Zhang Signed-off-by: Baolin Wang Tested-by: Chunyan Zhang Signed-off-by: Lee Jones --- drivers/mfd/sprd-sc27xx-spi.c | 28 +++++++++++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-) diff --git a/drivers/mfd/sprd-sc27xx-spi.c b/drivers/mfd/sprd-sc27xx-spi.c index f8a8b918c60d..6b7956604a0f 100644 --- a/drivers/mfd/sprd-sc27xx-spi.c +++ b/drivers/mfd/sprd-sc27xx-spi.c @@ -189,7 +189,7 @@ static int sprd_pmic_probe(struct spi_device *spi) ddata->irqs[i].mask = BIT(i); ret = devm_regmap_add_irq_chip(&spi->dev, ddata->regmap, ddata->irq, - IRQF_ONESHOT | IRQF_NO_SUSPEND, 0, + IRQF_ONESHOT, 0, &ddata->irq_chip, &ddata->irq_data); if (ret) { dev_err(&spi->dev, "Failed to add PMIC irq chip %d\n", ret); @@ -202,9 +202,34 @@ static int sprd_pmic_probe(struct spi_device *spi) return ret; } + device_init_wakeup(&spi->dev, true); return 0; } +#ifdef CONFIG_PM_SLEEP +static int sprd_pmic_suspend(struct device *dev) +{ + struct sprd_pmic *ddata = dev_get_drvdata(dev); + + if (device_may_wakeup(dev)) + enable_irq_wake(ddata->irq); + + return 0; +} + +static int sprd_pmic_resume(struct device *dev) +{ + struct sprd_pmic *ddata = dev_get_drvdata(dev); + + if (device_may_wakeup(dev)) + disable_irq_wake(ddata->irq); + + return 0; +} +#endif + +static SIMPLE_DEV_PM_OPS(sprd_pmic_pm_ops, sprd_pmic_suspend, sprd_pmic_resume); + static const struct of_device_id sprd_pmic_match[] = { { .compatible = "sprd,sc2731", .data = &sc2731_data }, {}, @@ -215,6 +240,7 @@ static struct spi_driver sprd_pmic_driver = { .driver = { .name = "sc27xx-pmic", .of_match_table = sprd_pmic_match, + .pm = &sprd_pmic_pm_ops, }, .probe = sprd_pmic_probe, }; From a09813283981f9e9ceefd7d6a1edb8f391aad00e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jonathan=20Neusch=C3=A4fer?= Date: Sat, 5 Sep 2020 20:58:03 +0200 Subject: [PATCH 329/433] dt-bindings: mfd: ab8500: Remove weird Unicode characters MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit There are stray Unicode quotation marks (U+201C DOUBLE TURNED COMMA QUOTATION MARK) in the file. Remove them, as they don't serve a purpose. Signed-off-by: Jonathan Neuschäfer Signed-off-by: Lee Jones --- Documentation/devicetree/bindings/mfd/ab8500.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/mfd/ab8500.txt b/Documentation/devicetree/bindings/mfd/ab8500.txt index 5c6eabeed341..d2a6e835c257 100644 --- a/Documentation/devicetree/bindings/mfd/ab8500.txt +++ b/Documentation/devicetree/bindings/mfd/ab8500.txt @@ -31,8 +31,8 @@ ab8500-btemp : : vtvout : Battery Temperature : BAT_CTRL_INDB : : Battery Removal Indicator : BTEMP_LOW : : Btemp < BtempLow, if battery temperature is lower than -10°C : BTEMP_LOW_MEDIUM : : BtempLow < Btemp < BtempMedium,if battery temperature is between -10 and 0°C - : BTEMP_MEDIUM_HIGH : : BtempMedium < Btemp < BtempHigh,if battery temperature is between 0°C and“MaxTemp - : BTEMP_HIGH : : Btemp > BtempHigh, if battery temperature is higher than “MaxTemp + : BTEMP_MEDIUM_HIGH : : BtempMedium < Btemp < BtempHigh,if battery temperature is between 0°C and MaxTemp + : BTEMP_HIGH : : Btemp > BtempHigh, if battery temperature is higher than MaxTemp ab8500-charger : : vddadc : Charger interface : MAIN_CH_UNPLUG_DET : : main charger unplug detection management (not in 8505) : MAIN_CHARGE_PLUG_DET : : main charger plug detection management (not in 8505) From 18394297562a235d41c2b410188533ea78bd0d3e Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 2 Sep 2020 18:14:51 +0200 Subject: [PATCH 330/433] dt-bindings: mfd: syscon: Merge Samsung Exynos Sysreg bindings The Samsung Exynos System Registers (Sysreg) bindings are quite simple - just additional compatible to the syscon. They do not have any value so merge them into generic MFD syscon bindings. Suggested-by: Sylwester Nawrocki Signed-off-by: Krzysztof Kozlowski Reviewed-by: Sylwester Nawrocki Signed-off-by: Lee Jones --- .../bindings/arm/samsung/sysreg.yaml | 45 ------------------- .../devicetree/bindings/mfd/syscon.yaml | 2 + 2 files changed, 2 insertions(+), 45 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/samsung/sysreg.yaml diff --git a/Documentation/devicetree/bindings/arm/samsung/sysreg.yaml b/Documentation/devicetree/bindings/arm/samsung/sysreg.yaml deleted file mode 100644 index 3b7811804cb4..000000000000 --- a/Documentation/devicetree/bindings/arm/samsung/sysreg.yaml +++ /dev/null @@ -1,45 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/arm/samsung/sysreg.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Samsung S5P/Exynos SoC series System Registers (SYSREG) - -maintainers: - - Krzysztof Kozlowski - -# Custom select to avoid matching all nodes with 'syscon' -select: - properties: - compatible: - contains: - enum: - - samsung,exynos4-sysreg - - samsung,exynos5-sysreg - required: - - compatible - -properties: - compatible: - allOf: - - items: - - enum: - - samsung,exynos4-sysreg - - samsung,exynos5-sysreg - - const: syscon - - reg: - maxItems: 1 - -examples: - - | - syscon@10010000 { - compatible = "samsung,exynos4-sysreg", "syscon"; - reg = <0x10010000 0x400>; - }; - - syscon@10050000 { - compatible = "samsung,exynos5-sysreg", "syscon"; - reg = <0x10050000 0x5000>; - }; diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index 049ec2ffc7f9..a34c9e2ab1ca 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -40,6 +40,8 @@ properties: - allwinner,sun50i-a64-system-controller - microchip,sparx5-cpu-syscon - mstar,msc313-pmsleep + - samsung,exynos4-sysreg + - samsung,exynos5-sysreg - const: syscon From 05027df1b94fcb9e23e1af170733a570f5a90356 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 2 Sep 2020 18:14:52 +0200 Subject: [PATCH 331/433] dt-bindings: mfd: syscon: Document Exynos3 and Exynos5433 compatibles Document Samsung Exynos3 and Exynos5433 compatibles for system registers. Reviewed-by: Sylwester Nawrocki Signed-off-by: Krzysztof Kozlowski Signed-off-by: Lee Jones --- Documentation/devicetree/bindings/mfd/syscon.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index a34c9e2ab1ca..0f21943dea28 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -40,8 +40,10 @@ properties: - allwinner,sun50i-a64-system-controller - microchip,sparx5-cpu-syscon - mstar,msc313-pmsleep + - samsung,exynos3-sysreg - samsung,exynos4-sysreg - samsung,exynos5-sysreg + - samsung,exynos5433-sysreg - const: syscon From 529a1101212a785c5df92c314b0e718287150c3b Mon Sep 17 00:00:00 2001 From: Marc Zyngier Date: Thu, 3 Sep 2020 17:02:37 +0100 Subject: [PATCH 332/433] mfd: syscon: Don't free allocated name for regmap_config The name allocated for the regmap_config structure is freed pretty early, right after the registration of the MMIO region. Unfortunately, that doesn't follow the life cycle that debugfs expects, as it can access the name field long after the free has occurred. Move the free on the error path, and keep it forever otherwise. Fixes: e15d7f2b81d2 ("mfd: syscon: Use a unique name with regmap_config") Signed-off-by: Marc Zyngier Signed-off-by: Lee Jones --- drivers/mfd/syscon.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mfd/syscon.c b/drivers/mfd/syscon.c index 75859e492984..7a660411c562 100644 --- a/drivers/mfd/syscon.c +++ b/drivers/mfd/syscon.c @@ -108,7 +108,6 @@ static struct syscon *of_syscon_register(struct device_node *np, bool check_clk) syscon_config.max_register = resource_size(&res) - reg_io_width; regmap = regmap_init_mmio(NULL, base, &syscon_config); - kfree(syscon_config.name); if (IS_ERR(regmap)) { pr_err("regmap init failed\n"); ret = PTR_ERR(regmap); @@ -145,6 +144,7 @@ err_clk: regmap_exit(regmap); err_regmap: iounmap(base); + kfree(syscon_config.name); err_map: kfree(syscon); return ERR_PTR(ret); From 8ce24f8967df2836b4557a23e74dc4bb098249f1 Mon Sep 17 00:00:00 2001 From: Dan Carpenter Date: Fri, 11 Sep 2020 14:33:26 +0300 Subject: [PATCH 333/433] mfd: sm501: Fix leaks in probe() This code should clean up if sm501_init_dev() fails. Fixes: b6d6454fdb66 ("[PATCH] mfd: SM501 core driver") Signed-off-by: Dan Carpenter Signed-off-by: Lee Jones --- drivers/mfd/sm501.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/mfd/sm501.c b/drivers/mfd/sm501.c index ccd62b963952..6d2f4a0a901d 100644 --- a/drivers/mfd/sm501.c +++ b/drivers/mfd/sm501.c @@ -1415,8 +1415,14 @@ static int sm501_plat_probe(struct platform_device *dev) goto err_claim; } - return sm501_init_dev(sm); + ret = sm501_init_dev(sm); + if (ret) + goto err_unmap; + return 0; + + err_unmap: + iounmap(sm->regs); err_claim: release_mem_region(sm->io_res->start, 0x100); err_res: From d38eac299151e4715c3b22e0253126440fa513b4 Mon Sep 17 00:00:00 2001 From: YueHaibing Date: Mon, 14 Sep 2020 22:25:18 +0800 Subject: [PATCH 334/433] mfd: mt6360: Remove unused include This file does not make use of it. Reported-by: Hulk Robot Signed-off-by: YueHaibing Signed-off-by: Lee Jones --- drivers/mfd/mt6360-core.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/mfd/mt6360-core.c b/drivers/mfd/mt6360-core.c index e9cacc27d980..4661c1b29a72 100644 --- a/drivers/mfd/mt6360-core.c +++ b/drivers/mfd/mt6360-core.c @@ -13,7 +13,6 @@ #include #include #include -#include #include From 326fa4399f6723201c10d77d3a18675915c56097 Mon Sep 17 00:00:00 2001 From: Luca Ceresoli Date: Wed, 2 Sep 2020 16:22:57 +0200 Subject: [PATCH 335/433] dt-bindings: mfd: lp87565: Convert to yaml Also apply a few smaller improvements: - document that the only possible I2C slave address is 0x60 as per the datasheet and fix the second example accordingly - The definition of "xxx-in-supply" was generic, thus define in detail the possible cases for each chip variant - remove "MFD driver" from the title as it is implementation specific - replace "PMIC" with "buck converter" in title as it is more informative Signed-off-by: Luca Ceresoli Reviewed-by: Rob Herring Signed-off-by: Lee Jones --- .../devicetree/bindings/mfd/lp87565.txt | 79 -------------- .../bindings/mfd/ti,lp87561-q1.yaml | 83 ++++++++++++++ .../bindings/mfd/ti,lp87565-q1.yaml | 101 ++++++++++++++++++ 3 files changed, 184 insertions(+), 79 deletions(-) delete mode 100644 Documentation/devicetree/bindings/mfd/lp87565.txt create mode 100644 Documentation/devicetree/bindings/mfd/ti,lp87561-q1.yaml create mode 100644 Documentation/devicetree/bindings/mfd/ti,lp87565-q1.yaml diff --git a/Documentation/devicetree/bindings/mfd/lp87565.txt b/Documentation/devicetree/bindings/mfd/lp87565.txt deleted file mode 100644 index 41671e0dc26b..000000000000 --- a/Documentation/devicetree/bindings/mfd/lp87565.txt +++ /dev/null @@ -1,79 +0,0 @@ -TI LP87565 PMIC MFD driver - -Required properties: - - compatible: "ti,lp87565", "ti,lp87565-q1" - - reg: I2C slave address. - - gpio-controller: Marks the device node as a GPIO Controller. - - #gpio-cells: Should be two. The first cell is the pin number and - the second cell is used to specify flags. - See ../gpio/gpio.txt for more information. - - xxx-in-supply: Phandle to parent supply node of each regulator - populated under regulators node. xxx should match - the supply_name populated in driver. -Example: - -lp87565_pmic: pmic@60 { - compatible = "ti,lp87565-q1"; - reg = <0x60>; - gpio-controller; - #gpio-cells = <2>; - - buck10-in-supply = <&vsys_3v3>; - buck23-in-supply = <&vsys_3v3>; - - regulators: regulators { - buck10_reg: buck10 { - /* VDD_MPU */ - regulator-name = "buck10"; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <1250000>; - regulator-always-on; - regulator-boot-on; - }; - - buck23_reg: buck23 { - /* VDD_GPU */ - regulator-name = "buck23"; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <1250000>; - regulator-boot-on; - regulator-always-on; - }; - }; -}; - -TI LP87561 PMIC: - -This is a single output 4-phase regulator configuration - -Required properties: - - compatible: "ti,lp87561-q1" - - reg: I2C slave address. - - gpio-controller: Marks the device node as a GPIO Controller. - - #gpio-cells: Should be two. The first cell is the pin number and - the second cell is used to specify flags. - See ../gpio/gpio.txt for more information. - - xxx-in-supply: Phandle to parent supply node of each regulator - populated under regulators node. xxx should match - the supply_name populated in driver. -Example: - -lp87561_pmic: pmic@62 { - compatible = "ti,lp87561-q1"; - reg = <0x62>; - gpio-controller; - #gpio-cells = <2>; - - buck3210-in-supply = <&vsys_3v3>; - - regulators: regulators { - buck3210_reg: buck3210 { - /* VDD_CORE */ - regulator-name = "buck3210"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <800000>; - regulator-always-on; - regulator-boot-on; - }; - }; -}; diff --git a/Documentation/devicetree/bindings/mfd/ti,lp87561-q1.yaml b/Documentation/devicetree/bindings/mfd/ti,lp87561-q1.yaml new file mode 100644 index 000000000000..a7e57c0913e1 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/ti,lp87561-q1.yaml @@ -0,0 +1,83 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/ti,lp87561-q1.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI LP87561-Q1 single 4-phase output buck converter + +maintainers: + - Keerthy + +properties: + compatible: + const: ti,lp87561-q1 + + reg: + description: I2C slave address + const: 0x60 + + gpio-controller: true + + '#gpio-cells': + description: + The first cell is the pin number. + The second cell is is used to specify flags. + See ../gpio/gpio.txt for more information. + const: 2 + + buck3210-in-supply: + description: + Voltage regulator supply for all the four BUCK converters. + + regulators: + type: object + + properties: + buck3210: + type: object + $ref: /schemas/regulator/regulator.yaml# + + required: + - buck3210 + + additionalProperties: false + +required: + - compatible + - reg + - gpio-controller + - '#gpio-cells' + - buck3210-in-supply + +additionalProperties: false + +examples: + - | + i2c@0 { + reg = <0x0 0x100>; + #address-cells = <1>; + #size-cells = <0>; + + pmic@60 { + compatible = "ti,lp87561-q1"; + reg = <0x60>; + gpio-controller; + #gpio-cells = <2>; + + buck3210-in-supply = <&vsys_3v3>; + + regulators { + buck3210_reg: buck3210 { + /* VDD_CORE */ + regulator-name = "buck3210"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <800000>; + regulator-always-on; + regulator-boot-on; + }; + }; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/mfd/ti,lp87565-q1.yaml b/Documentation/devicetree/bindings/mfd/ti,lp87565-q1.yaml new file mode 100644 index 000000000000..1da6d6a958c9 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/ti,lp87565-q1.yaml @@ -0,0 +1,101 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/ti,lp87565-q1.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI LP87565-Q1 / LP87565 dual 2-phase output buck converter + +maintainers: + - Keerthy + +properties: + compatible: + oneOf: + - const: ti,lp87565 + - const: ti,lp87565-q1 + + reg: + description: I2C slave address + const: 0x60 + + gpio-controller: true + + '#gpio-cells': + description: + The first cell is the pin number. + The second cell is is used to specify flags. + See ../gpio/gpio.txt for more information. + const: 2 + + buck10-in-supply: + description: + Voltage regulator supply for BUCK0 and BUCK1 converters. + + buck23-in-supply: + description: + Voltage regulator supply for BUCK2 and BUCK3 converters. + + regulators: + type: object + + patternProperties: + "^buck(10|23)$": + type: object + $ref: /schemas/regulator/regulator.yaml# + + required: + - buck10 + - buck23 + + additionalProperties: false + +required: + - compatible + - reg + - gpio-controller + - '#gpio-cells' + - buck10-in-supply + - buck23-in-supply + +additionalProperties: false + +examples: + - | + i2c@0 { + reg = <0x0 0x100>; + #address-cells = <1>; + #size-cells = <0>; + + pmic@60 { + compatible = "ti,lp87565-q1"; + reg = <0x60>; + gpio-controller; + #gpio-cells = <2>; + + buck10-in-supply = <&vsys_3v3>; + buck23-in-supply = <&vsys_3v3>; + + regulators { + buck10_reg: buck10 { + /* VDD_MPU */ + regulator-name = "buck10"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1250000>; + regulator-always-on; + regulator-boot-on; + }; + + buck23_reg: buck23 { + /* VDD_GPU */ + regulator-name = "buck23"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1250000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; + }; + +... From f9c6785c0c5ecc7c09e38550c785184958a67201 Mon Sep 17 00:00:00 2001 From: Luca Ceresoli Date: Wed, 2 Sep 2020 16:22:58 +0200 Subject: [PATCH 336/433] dt-bindings: mfd: Add LP87524-Q1 Add the LP87524-Q1 to the bindings along with an example. This is a variant of the LP87565-Q1 and LP87561-Q1 chips which already have bindings. Signed-off-by: Luca Ceresoli Reviewed-by: Rob Herring Signed-off-by: Lee Jones --- .../bindings/mfd/ti,lp87524-q1.yaml | 112 ++++++++++++++++++ 1 file changed, 112 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/ti,lp87524-q1.yaml diff --git a/Documentation/devicetree/bindings/mfd/ti,lp87524-q1.yaml b/Documentation/devicetree/bindings/mfd/ti,lp87524-q1.yaml new file mode 100644 index 000000000000..c4fc5345d38d --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/ti,lp87524-q1.yaml @@ -0,0 +1,112 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/ti,lp87524-q1.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI LP87524-Q1 four 1-phase output buck converter + +maintainers: + - Keerthy + +properties: + compatible: + const: ti,lp87524-q1 + + reg: + description: I2C slave address + const: 0x60 + + gpio-controller: true + + '#gpio-cells': + description: + The first cell is the pin number. + The second cell is is used to specify flags. + See ../gpio/gpio.txt for more information. + const: 2 + + regulators: + type: object + + patternProperties: + "^buck[0123]$": + type: object + $ref: /schemas/regulator/regulator.yaml# + + required: + - buck0 + - buck1 + - buck2 + - buck3 + + additionalProperties: false + +patternProperties: + "^buck[0123]-in-supply$": + description: Voltage regulator supply for each BUCK converter + +required: + - compatible + - reg + - gpio-controller + - '#gpio-cells' + - buck0-in-supply + - buck1-in-supply + - buck2-in-supply + - buck3-in-supply + - regulators + +additionalProperties: false + +examples: + - | + i2c@0 { + reg = <0x0 0x100>; + #address-cells = <1>; + #size-cells = <0>; + + pmic@60 { + compatible = "ti,lp87524-q1"; + reg = <0x60>; + gpio-controller; + #gpio-cells = <2>; + + buck0-in-supply = <&vdd_5v0>; + buck1-in-supply = <&vdd_5v0>; + buck2-in-supply = <&vdd_5v0>; + buck3-in-supply = <&vdd_5v0>; + + regulators { + buck0_reg: buck0 { + regulator-name = "buck0"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + buck1_reg: buck1 { + regulator-name = "buck1"; + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + }; + + buck2_reg: buck2 { + regulator-name = "buck2"; + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <950000>; + regulator-always-on; + }; + + buck3_reg: buck3 { + regulator-name = "buck3"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + }; + }; + }; + +... From 4b6ec08fd21ee3179cbfccf3605ad13d9f38b623 Mon Sep 17 00:00:00 2001 From: Luca Ceresoli Date: Wed, 2 Sep 2020 16:22:59 +0200 Subject: [PATCH 337/433] mfd: lp87565: Add LP87524-Q1 variant Add support for the LP87524B/J/P-Q1 Four 4-MHz Buck Converter. This is a variant of the LP87565 having 4 single-phase outputs and up to 10 A of total output current. Signed-off-by: Luca Ceresoli Signed-off-by: Lee Jones --- drivers/mfd/lp87565.c | 4 ++++ include/linux/mfd/lp87565.h | 1 + 2 files changed, 5 insertions(+) diff --git a/drivers/mfd/lp87565.c b/drivers/mfd/lp87565.c index 2268be9113f1..9c21483d9653 100644 --- a/drivers/mfd/lp87565.c +++ b/drivers/mfd/lp87565.c @@ -26,6 +26,10 @@ static const struct mfd_cell lp87565_cells[] = { static const struct of_device_id of_lp87565_match_table[] = { { .compatible = "ti,lp87565", }, + { + .compatible = "ti,lp87524-q1", + .data = (void *)LP87565_DEVICE_TYPE_LP87524_Q1, + }, { .compatible = "ti,lp87565-q1", .data = (void *)LP87565_DEVICE_TYPE_LP87565_Q1, diff --git a/include/linux/mfd/lp87565.h b/include/linux/mfd/lp87565.h index 43716aca46fa..d44ddfb6bb63 100644 --- a/include/linux/mfd/lp87565.h +++ b/include/linux/mfd/lp87565.h @@ -14,6 +14,7 @@ enum lp87565_device_type { LP87565_DEVICE_TYPE_UNKNOWN = 0, + LP87565_DEVICE_TYPE_LP87524_Q1, LP87565_DEVICE_TYPE_LP87561_Q1, LP87565_DEVICE_TYPE_LP87565_Q1, }; From 876611c493b10cbb59e0e2143d3e744d0442de63 Mon Sep 17 00:00:00 2001 From: Xu Yilun Date: Tue, 15 Sep 2020 11:44:21 +0800 Subject: [PATCH 338/433] mfd: intel-m10-bmc: Add Intel MAX 10 BMC chip support for Intel FPGA PAC This patch implements the basic functions of the BMC chip for some Intel FPGA PCIe Acceleration Cards (PAC). The BMC is implemented using the Intel MAX 10 CPLD. This BMC chip is connected to the FPGA by a SPI bus. To provide direct register access from the FPGA, the "SPI slave to Avalon Master Bridge" (spi-avmm) IP is integrated in the chip. It converts encoded streams of bytes from the host to the internal register read/write on the Avalon bus. So This driver uses the regmap-spi-avmm for register accessing. Signed-off-by: Xu Yilun Signed-off-by: Wu Hao Signed-off-by: Matthew Gerlach Signed-off-by: Russ Weight Reviewed-by: Tom Rix Signed-off-by: Lee Jones --- .../ABI/testing/sysfs-driver-intel-m10-bmc | 15 ++ drivers/mfd/Kconfig | 13 ++ drivers/mfd/Makefile | 1 + drivers/mfd/intel-m10-bmc.c | 164 ++++++++++++++++++ include/linux/mfd/intel-m10-bmc.h | 65 +++++++ 5 files changed, 258 insertions(+) create mode 100644 Documentation/ABI/testing/sysfs-driver-intel-m10-bmc create mode 100644 drivers/mfd/intel-m10-bmc.c create mode 100644 include/linux/mfd/intel-m10-bmc.h diff --git a/Documentation/ABI/testing/sysfs-driver-intel-m10-bmc b/Documentation/ABI/testing/sysfs-driver-intel-m10-bmc new file mode 100644 index 000000000000..979a2d62513f --- /dev/null +++ b/Documentation/ABI/testing/sysfs-driver-intel-m10-bmc @@ -0,0 +1,15 @@ +What: /sys/bus/spi/devices/.../bmc_version +Date: June 2020 +KernelVersion: 5.10 +Contact: Xu Yilun +Description: Read only. Returns the hardware build version of Intel + MAX10 BMC chip. + Format: "0x%x". + +What: /sys/bus/spi/devices/.../bmcfw_version +Date: June 2020 +KernelVersion: 5.10 +Contact: Xu Yilun +Description: Read only. Returns the firmware version of Intel MAX10 + BMC chip. + Format: "0x%x". diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index e1d3bf77b245..2ba269429e25 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -2151,5 +2151,18 @@ config SGI_MFD_IOC3 If you have an SGI Origin, Octane, or a PCI IOC3 card, then say Y. Otherwise say N. +config MFD_INTEL_M10_BMC + tristate "Intel MAX 10 Board Management Controller" + depends on SPI_MASTER + select REGMAP_SPI_AVMM + select MFD_CORE + help + Support for the Intel MAX 10 board management controller using the + SPI interface. + + This driver provides common support for accessing the device, + additional drivers must be enabled in order to use the functionality + of the device. + endmenu endif diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index e6c7520ed129..1780019d2474 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -266,3 +266,4 @@ obj-$(CONFIG_MFD_KHADAS_MCU) += khadas-mcu.o obj-$(CONFIG_SGI_MFD_IOC3) += ioc3.o obj-$(CONFIG_MFD_SIMPLE_MFD_I2C) += simple-mfd-i2c.o +obj-$(CONFIG_MFD_INTEL_M10_BMC) += intel-m10-bmc.o diff --git a/drivers/mfd/intel-m10-bmc.c b/drivers/mfd/intel-m10-bmc.c new file mode 100644 index 000000000000..b84579b7b4f0 --- /dev/null +++ b/drivers/mfd/intel-m10-bmc.c @@ -0,0 +1,164 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Intel MAX 10 Board Management Controller chip + * + * Copyright (C) 2018-2020 Intel Corporation. All rights reserved. + */ +#include +#include +#include +#include +#include +#include +#include +#include + +enum m10bmc_type { + M10_N3000, +}; + +static struct mfd_cell m10bmc_pacn3000_subdevs[] = { + { .name = "n3000bmc-hwmon" }, + { .name = "n3000bmc-retimer" }, + { .name = "n3000bmc-secure" }, +}; + +static struct regmap_config intel_m10bmc_regmap_config = { + .reg_bits = 32, + .val_bits = 32, + .reg_stride = 4, + .max_register = M10BMC_MEM_END, +}; + +static ssize_t bmc_version_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct intel_m10bmc *ddata = dev_get_drvdata(dev); + unsigned int val; + int ret; + + ret = m10bmc_sys_read(ddata, M10BMC_BUILD_VER, &val); + if (ret) + return ret; + + return sprintf(buf, "0x%x\n", val); +} +static DEVICE_ATTR_RO(bmc_version); + +static ssize_t bmcfw_version_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct intel_m10bmc *ddata = dev_get_drvdata(dev); + unsigned int val; + int ret; + + ret = m10bmc_sys_read(ddata, NIOS2_FW_VERSION, &val); + if (ret) + return ret; + + return sprintf(buf, "0x%x\n", val); +} +static DEVICE_ATTR_RO(bmcfw_version); + +static struct attribute *m10bmc_attrs[] = { + &dev_attr_bmc_version.attr, + &dev_attr_bmcfw_version.attr, + NULL, +}; +ATTRIBUTE_GROUPS(m10bmc); + +static int check_m10bmc_version(struct intel_m10bmc *ddata) +{ + unsigned int v; + int ret; + + /* + * This check is to filter out the very old legacy BMC versions, + * M10BMC_LEGACY_SYS_BASE is the offset to this old block of mmio + * registers. In the old BMC chips, the BMC version info is stored + * in this old version register (M10BMC_LEGACY_SYS_BASE + + * M10BMC_BUILD_VER), so its read out value would have not been + * LEGACY_INVALID (0xffffffff). But in new BMC chips that the + * driver supports, the value of this register should be + * LEGACY_INVALID. + */ + ret = m10bmc_raw_read(ddata, + M10BMC_LEGACY_SYS_BASE + M10BMC_BUILD_VER, &v); + if (ret) + return -ENODEV; + + if (v != M10BMC_VER_LEGACY_INVALID) { + dev_err(ddata->dev, "bad version M10BMC detected\n"); + return -ENODEV; + } + + return 0; +} + +static int intel_m10_bmc_spi_probe(struct spi_device *spi) +{ + const struct spi_device_id *id = spi_get_device_id(spi); + struct device *dev = &spi->dev; + struct mfd_cell *cells; + struct intel_m10bmc *ddata; + int ret, n_cell; + + ddata = devm_kzalloc(dev, sizeof(*ddata), GFP_KERNEL); + if (!ddata) + return -ENOMEM; + + ddata->dev = dev; + + ddata->regmap = + devm_regmap_init_spi_avmm(spi, &intel_m10bmc_regmap_config); + if (IS_ERR(ddata->regmap)) { + ret = PTR_ERR(ddata->regmap); + dev_err(dev, "Failed to allocate regmap: %d\n", ret); + return ret; + } + + spi_set_drvdata(spi, ddata); + + ret = check_m10bmc_version(ddata); + if (ret) { + dev_err(dev, "Failed to identify m10bmc hardware\n"); + return ret; + } + + switch (id->driver_data) { + case M10_N3000: + cells = m10bmc_pacn3000_subdevs; + n_cell = ARRAY_SIZE(m10bmc_pacn3000_subdevs); + break; + default: + return -ENODEV; + } + + ret = devm_mfd_add_devices(dev, PLATFORM_DEVID_AUTO, cells, n_cell, + NULL, 0, NULL); + if (ret) + dev_err(dev, "Failed to register sub-devices: %d\n", ret); + + return ret; +} + +static const struct spi_device_id m10bmc_spi_id[] = { + { "m10-n3000", M10_N3000 }, + { } +}; +MODULE_DEVICE_TABLE(spi, m10bmc_spi_id); + +static struct spi_driver intel_m10bmc_spi_driver = { + .driver = { + .name = "intel-m10-bmc", + .dev_groups = m10bmc_groups, + }, + .probe = intel_m10_bmc_spi_probe, + .id_table = m10bmc_spi_id, +}; +module_spi_driver(intel_m10bmc_spi_driver); + +MODULE_DESCRIPTION("Intel MAX 10 BMC Device Driver"); +MODULE_AUTHOR("Intel Corporation"); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("spi:intel-m10-bmc"); diff --git a/include/linux/mfd/intel-m10-bmc.h b/include/linux/mfd/intel-m10-bmc.h new file mode 100644 index 000000000000..c8ef2f1654a4 --- /dev/null +++ b/include/linux/mfd/intel-m10-bmc.h @@ -0,0 +1,65 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Intel MAX 10 Board Management Controller chip. + * + * Copyright (C) 2018-2020 Intel Corporation, Inc. + */ +#ifndef __MFD_INTEL_M10_BMC_H +#define __MFD_INTEL_M10_BMC_H + +#include + +#define M10BMC_LEGACY_SYS_BASE 0x300400 +#define M10BMC_SYS_BASE 0x300800 +#define M10BMC_MEM_END 0x200000fc + +/* Register offset of system registers */ +#define NIOS2_FW_VERSION 0x0 +#define M10BMC_TEST_REG 0x3c +#define M10BMC_BUILD_VER 0x68 +#define M10BMC_VER_MAJOR_MSK GENMASK(23, 16) +#define M10BMC_VER_PCB_INFO_MSK GENMASK(31, 24) +#define M10BMC_VER_LEGACY_INVALID 0xffffffff + +/** + * struct intel_m10bmc - Intel MAX 10 BMC parent driver data structure + * @dev: this device + * @regmap: the regmap used to access registers by m10bmc itself + */ +struct intel_m10bmc { + struct device *dev; + struct regmap *regmap; +}; + +/* + * register access helper functions. + * + * m10bmc_raw_read - read m10bmc register per addr + * m10bmc_sys_read - read m10bmc system register per offset + */ +static inline int +m10bmc_raw_read(struct intel_m10bmc *m10bmc, unsigned int addr, + unsigned int *val) +{ + int ret; + + ret = regmap_read(m10bmc->regmap, addr, val); + if (ret) + dev_err(m10bmc->dev, "fail to read raw reg %x: %d\n", + addr, ret); + + return ret; +} + +/* + * The base of the system registers could be configured by HW developers, and + * in HW SPEC, the base is not added to the addresses of the system registers. + * + * This macro helps to simplify the accessing of the system registers. And if + * the base is reconfigured in HW, SW developers could simply change the + * M10BMC_SYS_BASE accordingly. + */ +#define m10bmc_sys_read(m10bmc, offset, val) \ + m10bmc_raw_read(m10bmc, M10BMC_SYS_BASE + (offset), val) + +#endif /* __MFD_INTEL_M10_BMC_H */ From e8299c7313af857254bc4304bc37482e9b952481 Mon Sep 17 00:00:00 2001 From: Michael Brunner Date: Thu, 20 Aug 2020 15:39:14 +0000 Subject: [PATCH 339/433] mfd: Add ACPI support to Kontron PLD driver Recent Kontron COMe modules identify the PLD device using the hardware id KEM0001 in the ACPI table. This patch adds support for probing the device using the HID and also retrieving the resources. As this is not available for all products, the DMI based detection still needs to be around for older systems. It is executed if no matching ACPI HID is found during registering the platform driver or no specific device id is forced. If a device is detected using ACPI and no resource information is available, the default io resource is used. Forcing a device id with the force_device_id parameter and therefore manually generating a platform device takes precedence over ACPI during probing. Signed-off-by: Michael Brunner Signed-off-by: Lee Jones --- drivers/mfd/kempld-core.c | 115 ++++++++++++++++++++++++++++++++++++-- 1 file changed, 109 insertions(+), 6 deletions(-) diff --git a/drivers/mfd/kempld-core.c b/drivers/mfd/kempld-core.c index 52bec01149e5..1dfe556df038 100644 --- a/drivers/mfd/kempld-core.c +++ b/drivers/mfd/kempld-core.c @@ -13,6 +13,7 @@ #include #include #include +#include #define MAX_ID_LEN 4 static char force_device_id[MAX_ID_LEN + 1] = ""; @@ -124,6 +125,7 @@ static const struct kempld_platform_data kempld_platform_data_generic = { }; static struct platform_device *kempld_pdev; +static bool kempld_acpi_mode; static int kempld_create_platform_device(const struct dmi_system_id *id) { @@ -426,13 +428,93 @@ static int kempld_detect_device(struct kempld_device_data *pld) return ret; } +#ifdef CONFIG_ACPI +static int kempld_get_acpi_data(struct platform_device *pdev) +{ + struct list_head resource_list; + struct resource *resources; + struct resource_entry *rentry; + struct device *dev = &pdev->dev; + struct acpi_device *acpi_dev = ACPI_COMPANION(dev); + const struct kempld_platform_data *pdata; + int ret; + int count; + + pdata = acpi_device_get_match_data(dev); + ret = platform_device_add_data(pdev, pdata, + sizeof(struct kempld_platform_data)); + if (ret) + return ret; + + INIT_LIST_HEAD(&resource_list); + ret = acpi_dev_get_resources(acpi_dev, &resource_list, NULL, NULL); + if (ret < 0) + goto out; + + count = ret; + + if (count == 0) { + ret = platform_device_add_resources(pdev, pdata->ioresource, 1); + goto out; + } + + resources = devm_kcalloc(&acpi_dev->dev, count, sizeof(*resources), + GFP_KERNEL); + if (!resources) { + ret = -ENOMEM; + goto out; + } + + count = 0; + list_for_each_entry(rentry, &resource_list, node) { + memcpy(&resources[count], rentry->res, + sizeof(*resources)); + count++; + } + ret = platform_device_add_resources(pdev, resources, count); + +out: + acpi_dev_free_resource_list(&resource_list); + + return ret; +} +#else +static int kempld_get_acpi_data(struct platform_device *pdev) +{ + return -ENODEV; +} +#endif /* CONFIG_ACPI */ + static int kempld_probe(struct platform_device *pdev) { - const struct kempld_platform_data *pdata = - dev_get_platdata(&pdev->dev); + const struct kempld_platform_data *pdata; struct device *dev = &pdev->dev; struct kempld_device_data *pld; struct resource *ioport; + int ret; + + if (kempld_pdev == NULL) { + /* + * No kempld_pdev device has been registered in kempld_init, + * so we seem to be probing an ACPI platform device. + */ + ret = kempld_get_acpi_data(pdev); + if (ret) + return ret; + + kempld_acpi_mode = true; + } else if (kempld_pdev != pdev) { + /* + * The platform device we are probing is not the one we + * registered in kempld_init using the DMI table, so this one + * comes from ACPI. + * As we can only probe one - abort here and use the DMI + * based one instead. + */ + dev_notice(dev, "platform device exists - not using ACPI\n"); + return -ENODEV; + } + pdata = dev_get_platdata(dev); pld = devm_kzalloc(dev, sizeof(*pld), GFP_KERNEL); if (!pld) @@ -471,9 +553,17 @@ static int kempld_remove(struct platform_device *pdev) return 0; } +static const struct acpi_device_id kempld_acpi_table[] = { + { "KEM0001", (kernel_ulong_t)&kempld_platform_data_generic }, + {} +}; +MODULE_DEVICE_TABLE(acpi, kempld_acpi_table); + static struct platform_driver kempld_driver = { .driver = { .name = "kempld", + .acpi_match_table = ACPI_PTR(kempld_acpi_table), + .probe_type = PROBE_FORCE_SYNCHRONOUS, }, .probe = kempld_probe, .remove = kempld_remove, @@ -792,6 +882,7 @@ MODULE_DEVICE_TABLE(dmi, kempld_dmi_table); static int __init kempld_init(void) { const struct dmi_system_id *id; + int ret; if (force_device_id[0]) { for (id = kempld_dmi_table; @@ -801,12 +892,24 @@ static int __init kempld_init(void) break; if (id->matches[0].slot == DMI_NONE) return -ENODEV; - } else { - if (!dmi_check_system(kempld_dmi_table)) - return -ENODEV; } - return platform_driver_register(&kempld_driver); + ret = platform_driver_register(&kempld_driver); + if (ret) + return ret; + + /* + * With synchronous probing the device should already be probed now. + * If no device id is forced and also no ACPI definition for the + * device was found, scan DMI table as fallback. + * + * If drivers_autoprobing is disabled and the device is found here, + * only that device can be bound manually later. + */ + if (!kempld_pdev && !kempld_acpi_mode) + dmi_check_system(kempld_dmi_table); + + return 0; } static void __exit kempld_exit(void) From b727db94e3ba451a6941b0f8d8714f9f260ab110 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 17 Sep 2020 20:56:13 +0200 Subject: [PATCH 340/433] dt-bindings: mfd: Correct interrupt flags in examples GPIO_ACTIVE_x flags are not correct in the context of interrupt flags. These are simple defines so they could be used in DTS but they will not have the same meaning: 1. GPIO_ACTIVE_HIGH = 0 = IRQ_TYPE_NONE 2. GPIO_ACTIVE_LOW = 1 = IRQ_TYPE_EDGE_RISING Correct the interrupt flags, assuming the author of the code wanted same logical behavior behind the name "ACTIVE_xxx", this is: ACTIVE_LOW => IRQ_TYPE_LEVEL_LOW Signed-off-by: Krzysztof Kozlowski Acked-by: Matti Vaittinen # for BD70528 Acked-by: Tim Harvey # for gateworks-gsc.yaml Acked-by: Rob Herring Signed-off-by: Lee Jones --- Documentation/devicetree/bindings/mfd/act8945a.txt | 2 +- Documentation/devicetree/bindings/mfd/gateworks-gsc.yaml | 3 ++- Documentation/devicetree/bindings/mfd/rohm,bd70528-pmic.txt | 2 +- 3 files changed, 4 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/mfd/act8945a.txt b/Documentation/devicetree/bindings/mfd/act8945a.txt index e6f168db6c72..5ca75d888b4a 100644 --- a/Documentation/devicetree/bindings/mfd/act8945a.txt +++ b/Documentation/devicetree/bindings/mfd/act8945a.txt @@ -71,7 +71,7 @@ Example: pinctrl-names = "default"; pinctrl-0 = <&pinctrl_charger_chglev &pinctrl_charger_lbo &pinctrl_charger_irq>; interrupt-parent = <&pioA>; - interrupts = <45 GPIO_ACTIVE_LOW>; + interrupts = <45 IRQ_TYPE_LEVEL_LOW>; active-semi,chglev-gpios = <&pioA 12 GPIO_ACTIVE_HIGH>; active-semi,lbo-gpios = <&pioA 72 GPIO_ACTIVE_LOW>; diff --git a/Documentation/devicetree/bindings/mfd/gateworks-gsc.yaml b/Documentation/devicetree/bindings/mfd/gateworks-gsc.yaml index 9b6eb50606e8..e541eb0d02ed 100644 --- a/Documentation/devicetree/bindings/mfd/gateworks-gsc.yaml +++ b/Documentation/devicetree/bindings/mfd/gateworks-gsc.yaml @@ -147,6 +147,7 @@ required: examples: - | #include + #include i2c { #address-cells = <1>; #size-cells = <0>; @@ -155,7 +156,7 @@ examples: compatible = "gw,gsc"; reg = <0x20>; interrupt-parent = <&gpio1>; - interrupts = <4 GPIO_ACTIVE_LOW>; + interrupts = <4 IRQ_TYPE_LEVEL_LOW>; interrupt-controller; #interrupt-cells = <1>; #address-cells = <1>; diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd70528-pmic.txt b/Documentation/devicetree/bindings/mfd/rohm,bd70528-pmic.txt index c3c02ce73cde..386eec06cf08 100644 --- a/Documentation/devicetree/bindings/mfd/rohm,bd70528-pmic.txt +++ b/Documentation/devicetree/bindings/mfd/rohm,bd70528-pmic.txt @@ -39,7 +39,7 @@ pmic: pmic@4b { compatible = "rohm,bd70528"; reg = <0x4b>; interrupt-parent = <&gpio1>; - interrupts = <29 GPIO_ACTIVE_LOW>; + interrupts = <29 IRQ_TYPE_LEVEL_LOW>; clocks = <&osc 0>; #clock-cells = <0>; clock-output-names = "bd70528-32k-out"; From 1586d3a964c9b273ca982b750f757fbedcb57afb Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Thu, 17 Sep 2020 21:31:40 +0200 Subject: [PATCH 341/433] mfd: asic3: Build if COMPILE_TEST=y MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Build this driver on another platforms if COMPILE_TEST=y. Another drivers may depend on this, for example leds-asic3. Signed-off-by: Marek Behún Signed-off-by: Lee Jones --- drivers/mfd/Kconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 2ba269429e25..bdf8cb962027 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -290,7 +290,8 @@ config MFD_CS47L92 config MFD_ASIC3 bool "Compaq ASIC3" - depends on GPIOLIB && ARM + depends on GPIOLIB + depends on ARM || COMPILE_TEST select MFD_CORE help This driver supports the ASIC3 multifunction chip found on many From 38b393fec298569c8ec154c750a107299bc8385d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Sun, 20 Sep 2020 00:15:36 +0200 Subject: [PATCH 342/433] leds: tca6507: Absorb platform data MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The only in-tree usage of this driver is via device-tree. No on else includes linux/leds-tca6507.h, so absorb the definition of platdata structure. Signed-off-by: Marek Behún Cc: NeilBrown Reviewed-by: Linus Walleij Tested-by: H. Nikolaus Schaller Signed-off-by: Pavel Machek --- drivers/leds/leds-tca6507.c | 11 ++++++++++- include/linux/leds-tca6507.h | 21 --------------------- 2 files changed, 10 insertions(+), 22 deletions(-) delete mode 100644 include/linux/leds-tca6507.h diff --git a/drivers/leds/leds-tca6507.c b/drivers/leds/leds-tca6507.c index a7e9fd85b6dd..b5b5bafe2176 100644 --- a/drivers/leds/leds-tca6507.c +++ b/drivers/leds/leds-tca6507.c @@ -95,7 +95,6 @@ #include #include #include -#include #include /* LED select registers determine the source that drives LED outputs */ @@ -108,6 +107,16 @@ #define TCA6507_LS_BLINK0 0x6 /* Blink at Bank0 rate */ #define TCA6507_LS_BLINK1 0x7 /* Blink at Bank1 rate */ +struct tca6507_platform_data { + struct led_platform_data leds; +#ifdef CONFIG_GPIOLIB + int gpio_base; + void (*setup)(unsigned gpio_base, unsigned ngpio); +#endif +}; + +#define TCA6507_MAKE_GPIO 1 + enum { BANK0, BANK1, diff --git a/include/linux/leds-tca6507.h b/include/linux/leds-tca6507.h deleted file mode 100644 index 50d330ed1100..000000000000 --- a/include/linux/leds-tca6507.h +++ /dev/null @@ -1,21 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * TCA6507 LED chip driver. - * - * Copyright (C) 2011 Neil Brown - */ - -#ifndef __LINUX_TCA6507_H -#define __LINUX_TCA6507_H -#include - -struct tca6507_platform_data { - struct led_platform_data leds; -#ifdef CONFIG_GPIOLIB - int gpio_base; - void (*setup)(unsigned gpio_base, unsigned ngpio); -#endif -}; - -#define TCA6507_MAKE_GPIO 1 -#endif /* __LINUX_TCA6507_H*/ From 96f524105b9c62904b8452dff2c2531a84e44e2c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Sun, 20 Sep 2020 00:15:37 +0200 Subject: [PATCH 343/433] leds: tca6507: use fwnode API instead of OF MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Convert to use fwnode API instead of OF. It is more generic and if someone wants to use this driver without device-tree yet still, they will be able to via swnode fwnodes. Remove the gpio setup function from platdata. Signed-off-by: Marek Behún Cc: NeilBrown Cc: Linus Walleij Tested-by: H. Nikolaus Schaller Signed-off-by: Pavel Machek --- drivers/leds/leds-tca6507.c | 66 ++++++++++++++++--------------------- 1 file changed, 29 insertions(+), 37 deletions(-) diff --git a/drivers/leds/leds-tca6507.c b/drivers/leds/leds-tca6507.c index b5b5bafe2176..3e01fe2510f7 100644 --- a/drivers/leds/leds-tca6507.c +++ b/drivers/leds/leds-tca6507.c @@ -94,8 +94,8 @@ #include #include #include +#include #include -#include /* LED select registers determine the source that drives LED outputs */ #define TCA6507_LS_LED_OFF 0x0 /* Output HI-Z (off) */ @@ -111,7 +111,6 @@ struct tca6507_platform_data { struct led_platform_data leds; #ifdef CONFIG_GPIOLIB int gpio_base; - void (*setup)(unsigned gpio_base, unsigned ngpio); #endif }; @@ -672,8 +671,6 @@ static int tca6507_probe_gpios(struct i2c_client *client, tca->gpio.ngpio = 0; return err; } - if (pdata->setup) - pdata->setup(tca->gpio.base, tca->gpio.ngpio); return 0; } @@ -694,44 +691,50 @@ static void tca6507_remove_gpio(struct tca6507_chip *tca) } #endif /* CONFIG_GPIOLIB */ -#ifdef CONFIG_OF static struct tca6507_platform_data * tca6507_led_dt_init(struct i2c_client *client) { - struct device_node *np = dev_of_node(&client->dev), *child; struct tca6507_platform_data *pdata; + struct fwnode_handle *child; struct led_info *tca_leds; int count; - count = of_get_available_child_count(np); + count = device_get_child_node_count(&client->dev); if (!count || count > NUM_LEDS) return ERR_PTR(-ENODEV); - tca_leds = devm_kcalloc(&client->dev, - NUM_LEDS, sizeof(struct led_info), GFP_KERNEL); + tca_leds = devm_kcalloc(&client->dev, NUM_LEDS, sizeof(struct led_info), + GFP_KERNEL); if (!tca_leds) return ERR_PTR(-ENOMEM); - for_each_available_child_of_node(np, child) { + device_for_each_child_node(&client->dev, child) { struct led_info led; u32 reg; int ret; - led.name = - of_get_property(child, "label", NULL) ? : child->name; - led.default_trigger = - of_get_property(child, "linux,default-trigger", NULL); + if (fwnode_property_read_string(child, "label", &led.name)) + led.name = fwnode_get_name(child); + + fwnode_property_read_string(child, "linux,default-trigger", + &led.default_trigger); + led.flags = 0; - if (of_property_match_string(child, "compatible", "gpio") >= 0) + if (fwnode_property_match_string(child, "compatible", + "gpio") >= 0) led.flags |= TCA6507_MAKE_GPIO; - ret = of_property_read_u32(child, "reg", ®); - if (ret != 0 || reg >= NUM_LEDS) - continue; + + ret = fwnode_property_read_u32(child, "reg", ®); + if (ret || reg >= NUM_LEDS) { + fwnode_handle_put(child); + return ERR_PTR(ret); + } tca_leds[reg] = led; } - pdata = devm_kzalloc(&client->dev, - sizeof(struct tca6507_platform_data), GFP_KERNEL); + + pdata = devm_kzalloc(&client->dev, sizeof(struct tca6507_platform_data), + GFP_KERNEL); if (!pdata) return ERR_PTR(-ENOMEM); @@ -740,6 +743,7 @@ tca6507_led_dt_init(struct i2c_client *client) #ifdef CONFIG_GPIOLIB pdata->gpio_base = -1; #endif + return pdata; } @@ -749,15 +753,6 @@ static const struct of_device_id of_tca6507_leds_match[] = { }; MODULE_DEVICE_TABLE(of, of_tca6507_leds_match); -#else -static struct tca6507_platform_data * -tca6507_led_dt_init(struct i2c_client *client) -{ - return ERR_PTR(-ENODEV); -} - -#endif - static int tca6507_probe(struct i2c_client *client, const struct i2c_device_id *id) { @@ -768,18 +763,15 @@ static int tca6507_probe(struct i2c_client *client, int i = 0; adapter = client->adapter; - pdata = dev_get_platdata(&client->dev); if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) return -EIO; - if (!pdata || pdata->leds.num_leds != NUM_LEDS) { - pdata = tca6507_led_dt_init(client); - if (IS_ERR(pdata)) { - dev_err(&client->dev, "Need %d entries in platform-data list\n", - NUM_LEDS); - return PTR_ERR(pdata); - } + pdata = tca6507_led_dt_init(client); + if (IS_ERR(pdata)) { + dev_err(&client->dev, "Need %d entries in platform-data list\n", + NUM_LEDS); + return PTR_ERR(pdata); } tca = devm_kzalloc(&client->dev, sizeof(*tca), GFP_KERNEL); if (!tca) From e8b7dabc6565d9bf74e66312cf7b8b87450c7caa Mon Sep 17 00:00:00 2001 From: Pavel Machek Date: Fri, 25 Sep 2020 11:24:12 +0200 Subject: [PATCH 344/433] leds: tca6507: fix warning triggered by fwnode conversion. Robot complains about: All warnings (new ones prefixed by >>): >> drivers/leds/leds-tca6507.c:750:34: warning: unused variable 'of_tca6507_leds_match' [-Wunused-const-variable] static const struct of_device_id of_tca6507_leds_match[] = { Fix it. Reported-by: kernel test robot Signed-off-by: Pavel Machek --- drivers/leds/leds-tca6507.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/leds/leds-tca6507.c b/drivers/leds/leds-tca6507.c index 3e01fe2510f7..4b10ef9ae221 100644 --- a/drivers/leds/leds-tca6507.c +++ b/drivers/leds/leds-tca6507.c @@ -747,7 +747,7 @@ tca6507_led_dt_init(struct i2c_client *client) return pdata; } -static const struct of_device_id of_tca6507_leds_match[] = { +static const struct of_device_id __maybe_unused of_tca6507_leds_match[] = { { .compatible = "ti,tca6507", }, {}, }; From a238098251b690b7408f26d7c5b4c6ba44d7084c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Sat, 26 Sep 2020 21:43:02 +0200 Subject: [PATCH 345/433] leds: tca6507: fix potential zero passed to ERR_PTR MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fix potential ERR_PTR(0). Signed-off-by: Marek Behún Fixes: d78b10f5713d9 ("leds: tca6507: use fwnode API instead of OF") Reported-by: kernel test robot Reported-by: Dan Carpenter Signed-off-by: Pavel Machek --- drivers/leds/leds-tca6507.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/leds/leds-tca6507.c b/drivers/leds/leds-tca6507.c index 4b10ef9ae221..d589c89930fd 100644 --- a/drivers/leds/leds-tca6507.c +++ b/drivers/leds/leds-tca6507.c @@ -727,7 +727,7 @@ tca6507_led_dt_init(struct i2c_client *client) ret = fwnode_property_read_u32(child, "reg", ®); if (ret || reg >= NUM_LEDS) { fwnode_handle_put(child); - return ERR_PTR(ret); + return ERR_PTR(ret ? : -EINVAL); } tca_leds[reg] = led; From 39118499a62623d32c67ffd93d94ed5f27bfc736 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Sun, 20 Sep 2020 02:24:54 +0200 Subject: [PATCH 346/433] leds: pca963x: cosmetic: use helper variables, better indentation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Use helper variables: instead of writing &client->dev at many places, write only dev. The same with pca963x->chip->chipdef, pca963x->chip->client). Use helper variable u8 val for i2c_smbus_write_byte_data, for better indentation. Indent better on various places. Signed-off-by: Marek Behún Cc: Peter Meerwald Cc: Ricardo Ribalda Cc: Zahari Petkov Signed-off-by: Pavel Machek --- drivers/leds/leds-pca963x.c | 139 ++++++++++++++++++------------------ 1 file changed, 71 insertions(+), 68 deletions(-) diff --git a/drivers/leds/leds-pca963x.c b/drivers/leds/leds-pca963x.c index d288acbc99c7..c03871f92fec 100644 --- a/drivers/leds/leds-pca963x.c +++ b/drivers/leds/leds-pca963x.c @@ -116,35 +116,38 @@ struct pca963x_led { }; static int pca963x_brightness(struct pca963x_led *pca963x, - enum led_brightness brightness) + enum led_brightness brightness) { - u8 ledout_addr = pca963x->chip->chipdef->ledout_base - + (pca963x->led_num / 4); - u8 ledout; - int shift = 2 * (pca963x->led_num % 4); - u8 mask = 0x3 << shift; + struct i2c_client *client = pca963x->chip->client; + struct pca963x_chipdef *chipdef = pca963x->chip->chipdef; + u8 ledout_addr, ledout, mask, val; + int shift; int ret; - ledout = i2c_smbus_read_byte_data(pca963x->chip->client, ledout_addr); + ledout_addr = chipdef->ledout_base + (pca963x->led_num / 4); + shift = 2 * (pca963x->led_num % 4); + mask = 0x3 << shift; + ledout = i2c_smbus_read_byte_data(client, ledout_addr); + switch (brightness) { case LED_FULL: - ret = i2c_smbus_write_byte_data(pca963x->chip->client, - ledout_addr, - (ledout & ~mask) | (PCA963X_LED_ON << shift)); + val = (ledout & ~mask) | (PCA963X_LED_ON << shift); + ret = i2c_smbus_write_byte_data(client, ledout_addr, val); break; case LED_OFF: - ret = i2c_smbus_write_byte_data(pca963x->chip->client, - ledout_addr, ledout & ~mask); + val = ledout & ~mask; + ret = i2c_smbus_write_byte_data(client, ledout_addr, val); break; default: - ret = i2c_smbus_write_byte_data(pca963x->chip->client, - PCA963X_PWM_BASE + pca963x->led_num, - brightness); + ret = i2c_smbus_write_byte_data(client, + PCA963X_PWM_BASE + + pca963x->led_num, + brightness); if (ret < 0) return ret; - ret = i2c_smbus_write_byte_data(pca963x->chip->client, - ledout_addr, - (ledout & ~mask) | (PCA963X_LED_PWM << shift)); + + val = (ledout & ~mask) | (PCA963X_LED_PWM << shift); + ret = i2c_smbus_write_byte_data(client, ledout_addr, val); break; } @@ -153,36 +156,40 @@ static int pca963x_brightness(struct pca963x_led *pca963x, static void pca963x_blink(struct pca963x_led *pca963x) { - u8 ledout_addr = pca963x->chip->chipdef->ledout_base + - (pca963x->led_num / 4); - u8 ledout; - u8 mode2 = i2c_smbus_read_byte_data(pca963x->chip->client, - PCA963X_MODE2); - int shift = 2 * (pca963x->led_num % 4); - u8 mask = 0x3 << shift; + struct i2c_client *client = pca963x->chip->client; + struct pca963x_chipdef *chipdef = pca963x->chip->chipdef; + u8 ledout_addr, ledout, mask, val, mode2; + int shift; - i2c_smbus_write_byte_data(pca963x->chip->client, - pca963x->chip->chipdef->grppwm, pca963x->gdc); + ledout_addr = chipdef->ledout_base + (pca963x->led_num / 4); + shift = 2 * (pca963x->led_num % 4); + mask = 0x3 << shift; + mode2 = i2c_smbus_read_byte_data(client, PCA963X_MODE2); - i2c_smbus_write_byte_data(pca963x->chip->client, - pca963x->chip->chipdef->grpfreq, pca963x->gfrq); + i2c_smbus_write_byte_data(client, chipdef->grppwm, pca963x->gdc); + + i2c_smbus_write_byte_data(client, chipdef->grpfreq, pca963x->gfrq); if (!(mode2 & PCA963X_MODE2_DMBLNK)) - i2c_smbus_write_byte_data(pca963x->chip->client, PCA963X_MODE2, - mode2 | PCA963X_MODE2_DMBLNK); + i2c_smbus_write_byte_data(client, PCA963X_MODE2, + mode2 | PCA963X_MODE2_DMBLNK); mutex_lock(&pca963x->chip->mutex); - ledout = i2c_smbus_read_byte_data(pca963x->chip->client, ledout_addr); - if ((ledout & mask) != (PCA963X_LED_GRP_PWM << shift)) - i2c_smbus_write_byte_data(pca963x->chip->client, ledout_addr, - (ledout & ~mask) | (PCA963X_LED_GRP_PWM << shift)); + + ledout = i2c_smbus_read_byte_data(client, ledout_addr); + if ((ledout & mask) != (PCA963X_LED_GRP_PWM << shift)) { + val = (ledout & ~mask) | (PCA963X_LED_GRP_PWM << shift); + i2c_smbus_write_byte_data(client, ledout_addr, val); + } + mutex_unlock(&pca963x->chip->mutex); } static int pca963x_power_state(struct pca963x_led *pca963x) { + struct i2c_client *client = pca963x->chip->client; unsigned long *leds_on = &pca963x->chip->leds_on; - unsigned long cached_leds = pca963x->chip->leds_on; + unsigned long cached_leds = *leds_on; if (pca963x->led_cdev.brightness) set_bit(pca963x->led_num, leds_on); @@ -190,14 +197,14 @@ static int pca963x_power_state(struct pca963x_led *pca963x) clear_bit(pca963x->led_num, leds_on); if (!(*leds_on) != !cached_leds) - return i2c_smbus_write_byte_data(pca963x->chip->client, - PCA963X_MODE1, *leds_on ? 0 : BIT(4)); + return i2c_smbus_write_byte_data(client, PCA963X_MODE1, + *leds_on ? 0 : BIT(4)); return 0; } static int pca963x_led_set(struct led_classdev *led_cdev, - enum led_brightness value) + enum led_brightness value) { struct pca963x_led *pca963x; int ret; @@ -217,7 +224,7 @@ unlock: } static unsigned int pca963x_period_scale(struct pca963x_led *pca963x, - unsigned int val) + unsigned int val) { unsigned int scaling = pca963x->chip->chipdef->scaling; @@ -225,7 +232,7 @@ static unsigned int pca963x_period_scale(struct pca963x_led *pca963x, } static int pca963x_blink_set(struct led_classdev *led_cdev, - unsigned long *delay_on, unsigned long *delay_off) + unsigned long *delay_on, unsigned long *delay_off) { struct pca963x_led *pca963x; unsigned long time_on, time_off, period; @@ -278,23 +285,23 @@ static int pca963x_blink_set(struct led_classdev *led_cdev, } static struct pca963x_platform_data * -pca963x_get_pdata(struct i2c_client *client, struct pca963x_chipdef *chip) +pca963x_get_pdata(struct device *dev, struct pca963x_chipdef *chip) { struct pca963x_platform_data *pdata; struct led_info *pca963x_leds; struct fwnode_handle *child; int count; - count = device_get_child_node_count(&client->dev); + count = device_get_child_node_count(dev); if (!count || count > chip->n_leds) return ERR_PTR(-ENODEV); - pca963x_leds = devm_kcalloc(&client->dev, - chip->n_leds, sizeof(struct led_info), GFP_KERNEL); + pca963x_leds = devm_kcalloc(dev, chip->n_leds, sizeof(struct led_info), + GFP_KERNEL); if (!pca963x_leds) return ERR_PTR(-ENOMEM); - device_for_each_child_node(&client->dev, child) { + device_for_each_child_node(dev, child) { struct led_info led = {}; u32 reg; int res; @@ -312,8 +319,8 @@ pca963x_get_pdata(struct i2c_client *client, struct pca963x_chipdef *chip) pca963x_leds[reg] = led; } - pdata = devm_kzalloc(&client->dev, - sizeof(struct pca963x_platform_data), GFP_KERNEL); + pdata = devm_kzalloc(dev, sizeof(struct pca963x_platform_data), + GFP_KERNEL); if (!pdata) return ERR_PTR(-ENOMEM); @@ -321,23 +328,23 @@ pca963x_get_pdata(struct i2c_client *client, struct pca963x_chipdef *chip) pdata->leds.num_leds = chip->n_leds; /* default to open-drain unless totem pole (push-pull) is specified */ - if (device_property_read_bool(&client->dev, "nxp,totem-pole")) + if (device_property_read_bool(dev, "nxp,totem-pole")) pdata->outdrv = PCA963X_TOTEM_POLE; else pdata->outdrv = PCA963X_OPEN_DRAIN; /* default to software blinking unless hardware blinking is specified */ - if (device_property_read_bool(&client->dev, "nxp,hw-blink")) + if (device_property_read_bool(dev, "nxp,hw-blink")) pdata->blink_type = PCA963X_HW_BLINK; else pdata->blink_type = PCA963X_SW_BLINK; - if (device_property_read_u32(&client->dev, "nxp,period-scale", + if (device_property_read_u32(dev, "nxp,period-scale", &chip->scaling)) chip->scaling = 1000; /* default to non-inverted output, unless inverted is specified */ - if (device_property_read_bool(&client->dev, "nxp,inverted-out")) + if (device_property_read_bool(dev, "nxp,inverted-out")) pdata->dir = PCA963X_INVERTED; else pdata->dir = PCA963X_NORMAL; @@ -355,8 +362,9 @@ static const struct of_device_id of_pca963x_match[] = { MODULE_DEVICE_TABLE(of, of_pca963x_match); static int pca963x_probe(struct i2c_client *client, - const struct i2c_device_id *id) + const struct i2c_device_id *id) { + struct device *dev = &client->dev; struct pca963x *pca963x_chip; struct pca963x_led *pca963x; struct pca963x_platform_data *pdata; @@ -364,29 +372,26 @@ static int pca963x_probe(struct i2c_client *client, int i, err; chip = &pca963x_chipdefs[id->driver_data]; - pdata = dev_get_platdata(&client->dev); + pdata = dev_get_platdata(dev); if (!pdata) { - pdata = pca963x_get_pdata(client, chip); + pdata = pca963x_get_pdata(dev, chip); if (IS_ERR(pdata)) { - dev_warn(&client->dev, "could not parse configuration\n"); + dev_warn(dev, "could not parse configuration\n"); pdata = NULL; } } if (pdata && (pdata->leds.num_leds < 1 || - pdata->leds.num_leds > chip->n_leds)) { - dev_err(&client->dev, "board info must claim 1-%d LEDs", - chip->n_leds); + pdata->leds.num_leds > chip->n_leds)) { + dev_err(dev, "board info must claim 1-%d LEDs", chip->n_leds); return -EINVAL; } - pca963x_chip = devm_kzalloc(&client->dev, sizeof(*pca963x_chip), - GFP_KERNEL); + pca963x_chip = devm_kzalloc(dev, sizeof(*pca963x_chip), GFP_KERNEL); if (!pca963x_chip) return -ENOMEM; - pca963x = devm_kcalloc(&client->dev, chip->n_leds, sizeof(*pca963x), - GFP_KERNEL); + pca963x = devm_kcalloc(dev, chip->n_leds, sizeof(*pca963x), GFP_KERNEL); if (!pca963x) return -ENOMEM; @@ -427,7 +432,7 @@ static int pca963x_probe(struct i2c_client *client, if (pdata && pdata->blink_type == PCA963X_HW_BLINK) pca963x[i].led_cdev.blink_set = pca963x_blink_set; - err = led_classdev_register(&client->dev, &pca963x[i].led_cdev); + err = led_classdev_register(dev, &pca963x[i].led_cdev); if (err < 0) goto exit; } @@ -436,8 +441,7 @@ static int pca963x_probe(struct i2c_client *client, i2c_smbus_write_byte_data(client, PCA963X_MODE1, BIT(4)); if (pdata) { - u8 mode2 = i2c_smbus_read_byte_data(pca963x->chip->client, - PCA963X_MODE2); + u8 mode2 = i2c_smbus_read_byte_data(client, PCA963X_MODE2); /* Configure output: open-drain or totem pole (push-pull) */ if (pdata->outdrv == PCA963X_OPEN_DRAIN) mode2 &= ~PCA963X_MODE2_OUTDRV; @@ -446,8 +450,7 @@ static int pca963x_probe(struct i2c_client *client, /* Configure direction: normal or inverted */ if (pdata->dir == PCA963X_INVERTED) mode2 |= PCA963X_MODE2_INVRT; - i2c_smbus_write_byte_data(pca963x->chip->client, PCA963X_MODE2, - mode2); + i2c_smbus_write_byte_data(client, PCA963X_MODE2, mode2); } return 0; From af26bebea1199d8cbefd39b42ade40698504afba Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Sun, 20 Sep 2020 02:24:55 +0200 Subject: [PATCH 347/433] leds: pca963x: use devres LED registering function MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit By using devres version of LED registering function we can remove the .remove method from this driver. The probe method also gets simpler. Signed-off-by: Marek Behún Cc: Peter Meerwald Cc: Ricardo Ribalda Cc: Zahari Petkov Signed-off-by: Pavel Machek --- drivers/leds/leds-pca963x.c | 22 ++-------------------- 1 file changed, 2 insertions(+), 20 deletions(-) diff --git a/drivers/leds/leds-pca963x.c b/drivers/leds/leds-pca963x.c index c03871f92fec..cbb3bf6c044f 100644 --- a/drivers/leds/leds-pca963x.c +++ b/drivers/leds/leds-pca963x.c @@ -432,9 +432,9 @@ static int pca963x_probe(struct i2c_client *client, if (pdata && pdata->blink_type == PCA963X_HW_BLINK) pca963x[i].led_cdev.blink_set = pca963x_blink_set; - err = led_classdev_register(dev, &pca963x[i].led_cdev); + err = devm_led_classdev_register(dev, &pca963x[i].led_cdev); if (err < 0) - goto exit; + return err; } /* Disable LED all-call address, and power down initially */ @@ -454,23 +454,6 @@ static int pca963x_probe(struct i2c_client *client, } return 0; - -exit: - while (i--) - led_classdev_unregister(&pca963x[i].led_cdev); - - return err; -} - -static int pca963x_remove(struct i2c_client *client) -{ - struct pca963x *pca963x = i2c_get_clientdata(client); - int i; - - for (i = 0; i < pca963x->chipdef->n_leds; i++) - led_classdev_unregister(&pca963x->leds[i].led_cdev); - - return 0; } static struct i2c_driver pca963x_driver = { @@ -479,7 +462,6 @@ static struct i2c_driver pca963x_driver = { .of_match_table = of_pca963x_match, }, .probe = pca963x_probe, - .remove = pca963x_remove, .id_table = pca963x_id, }; From fc0b1eca2ef0d2e5a8ea9ddfd45d6858df8fb02c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Sun, 20 Sep 2020 02:24:56 +0200 Subject: [PATCH 348/433] leds: pca963x: cosmetic: rename variables MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Rename variables chip and pca963x_chip to chipdef and chip, respectively, so that their names correspond to the names of their types. Signed-off-by: Marek Behún Cc: Peter Meerwald Cc: Ricardo Ribalda Cc: Zahari Petkov Signed-off-by: Pavel Machek --- drivers/leds/leds-pca963x.c | 55 +++++++++++++++++++------------------ 1 file changed, 28 insertions(+), 27 deletions(-) diff --git a/drivers/leds/leds-pca963x.c b/drivers/leds/leds-pca963x.c index cbb3bf6c044f..bdb014c76a07 100644 --- a/drivers/leds/leds-pca963x.c +++ b/drivers/leds/leds-pca963x.c @@ -285,7 +285,7 @@ static int pca963x_blink_set(struct led_classdev *led_cdev, } static struct pca963x_platform_data * -pca963x_get_pdata(struct device *dev, struct pca963x_chipdef *chip) +pca963x_get_pdata(struct device *dev, struct pca963x_chipdef *chipdef) { struct pca963x_platform_data *pdata; struct led_info *pca963x_leds; @@ -293,11 +293,11 @@ pca963x_get_pdata(struct device *dev, struct pca963x_chipdef *chip) int count; count = device_get_child_node_count(dev); - if (!count || count > chip->n_leds) + if (!count || count > chipdef->n_leds) return ERR_PTR(-ENODEV); - pca963x_leds = devm_kcalloc(dev, chip->n_leds, sizeof(struct led_info), - GFP_KERNEL); + pca963x_leds = devm_kcalloc(dev, chipdef->n_leds, + sizeof(struct led_info), GFP_KERNEL); if (!pca963x_leds) return ERR_PTR(-ENOMEM); @@ -307,7 +307,7 @@ pca963x_get_pdata(struct device *dev, struct pca963x_chipdef *chip) int res; res = fwnode_property_read_u32(child, "reg", ®); - if ((res != 0) || (reg >= chip->n_leds)) + if ((res != 0) || (reg >= chipdef->n_leds)) continue; res = fwnode_property_read_string(child, "label", &led.name); @@ -325,7 +325,7 @@ pca963x_get_pdata(struct device *dev, struct pca963x_chipdef *chip) return ERR_PTR(-ENOMEM); pdata->leds.leds = pca963x_leds; - pdata->leds.num_leds = chip->n_leds; + pdata->leds.num_leds = chipdef->n_leds; /* default to open-drain unless totem pole (push-pull) is specified */ if (device_property_read_bool(dev, "nxp,totem-pole")) @@ -340,8 +340,8 @@ pca963x_get_pdata(struct device *dev, struct pca963x_chipdef *chip) pdata->blink_type = PCA963X_SW_BLINK; if (device_property_read_u32(dev, "nxp,period-scale", - &chip->scaling)) - chip->scaling = 1000; + &chipdef->scaling)) + chipdef->scaling = 1000; /* default to non-inverted output, unless inverted is specified */ if (device_property_read_bool(dev, "nxp,inverted-out")) @@ -365,17 +365,17 @@ static int pca963x_probe(struct i2c_client *client, const struct i2c_device_id *id) { struct device *dev = &client->dev; - struct pca963x *pca963x_chip; - struct pca963x_led *pca963x; + struct pca963x_chipdef *chipdef; struct pca963x_platform_data *pdata; - struct pca963x_chipdef *chip; + struct pca963x_led *pca963x; + struct pca963x *chip; int i, err; - chip = &pca963x_chipdefs[id->driver_data]; + chipdef = &pca963x_chipdefs[id->driver_data]; pdata = dev_get_platdata(dev); if (!pdata) { - pdata = pca963x_get_pdata(dev, chip); + pdata = pca963x_get_pdata(dev, chipdef); if (IS_ERR(pdata)) { dev_warn(dev, "could not parse configuration\n"); pdata = NULL; @@ -383,32 +383,33 @@ static int pca963x_probe(struct i2c_client *client, } if (pdata && (pdata->leds.num_leds < 1 || - pdata->leds.num_leds > chip->n_leds)) { - dev_err(dev, "board info must claim 1-%d LEDs", chip->n_leds); + pdata->leds.num_leds > chipdef->n_leds)) { + dev_err(dev, "board info must claim 1-%d LEDs", + chipdef->n_leds); return -EINVAL; } - pca963x_chip = devm_kzalloc(dev, sizeof(*pca963x_chip), GFP_KERNEL); - if (!pca963x_chip) + chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL); + if (!chip) return -ENOMEM; - pca963x = devm_kcalloc(dev, chip->n_leds, sizeof(*pca963x), GFP_KERNEL); + pca963x = devm_kcalloc(dev, chipdef->n_leds, sizeof(*pca963x), GFP_KERNEL); if (!pca963x) return -ENOMEM; - i2c_set_clientdata(client, pca963x_chip); + i2c_set_clientdata(client, chip); - mutex_init(&pca963x_chip->mutex); - pca963x_chip->chipdef = chip; - pca963x_chip->client = client; - pca963x_chip->leds = pca963x; + mutex_init(&chip->mutex); + chip->chipdef = chipdef; + chip->client = client; + chip->leds = pca963x; /* Turn off LEDs by default*/ - for (i = 0; i < chip->n_leds / 4; i++) - i2c_smbus_write_byte_data(client, chip->ledout_base + i, 0x00); + for (i = 0; i < chipdef->n_leds / 4; i++) + i2c_smbus_write_byte_data(client, chipdef->ledout_base + i, 0x00); - for (i = 0; i < chip->n_leds; i++) { + for (i = 0; i < chipdef->n_leds; i++) { pca963x[i].led_num = i; - pca963x[i].chip = pca963x_chip; + pca963x[i].chip = chip; /* Platform data can specify LED names and default triggers */ if (pdata && i < pdata->leds.num_leds) { From 5db8509349cea5df0e6562537d84f3e90fda3270 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Sun, 20 Sep 2020 02:24:57 +0200 Subject: [PATCH 349/433] leds: pca963x: cosmetic: rename variables MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Rename variable of type struct pca963x_led from pca963x to simple led. Signed-off-by: Marek Behún Cc: Peter Meerwald Cc: Ricardo Ribalda Cc: Zahari Petkov Signed-off-by: Pavel Machek --- drivers/leds/leds-pca963x.c | 104 ++++++++++++++++++------------------ 1 file changed, 53 insertions(+), 51 deletions(-) diff --git a/drivers/leds/leds-pca963x.c b/drivers/leds/leds-pca963x.c index bdb014c76a07..a4096694925f 100644 --- a/drivers/leds/leds-pca963x.c +++ b/drivers/leds/leds-pca963x.c @@ -115,17 +115,17 @@ struct pca963x_led { u8 gfrq; }; -static int pca963x_brightness(struct pca963x_led *pca963x, +static int pca963x_brightness(struct pca963x_led *led, enum led_brightness brightness) { - struct i2c_client *client = pca963x->chip->client; - struct pca963x_chipdef *chipdef = pca963x->chip->chipdef; + struct i2c_client *client = led->chip->client; + struct pca963x_chipdef *chipdef = led->chip->chipdef; u8 ledout_addr, ledout, mask, val; int shift; int ret; - ledout_addr = chipdef->ledout_base + (pca963x->led_num / 4); - shift = 2 * (pca963x->led_num % 4); + ledout_addr = chipdef->ledout_base + (led->led_num / 4); + shift = 2 * (led->led_num % 4); mask = 0x3 << shift; ledout = i2c_smbus_read_byte_data(client, ledout_addr); @@ -141,7 +141,7 @@ static int pca963x_brightness(struct pca963x_led *pca963x, default: ret = i2c_smbus_write_byte_data(client, PCA963X_PWM_BASE + - pca963x->led_num, + led->led_num, brightness); if (ret < 0) return ret; @@ -154,27 +154,27 @@ static int pca963x_brightness(struct pca963x_led *pca963x, return ret; } -static void pca963x_blink(struct pca963x_led *pca963x) +static void pca963x_blink(struct pca963x_led *led) { - struct i2c_client *client = pca963x->chip->client; - struct pca963x_chipdef *chipdef = pca963x->chip->chipdef; + struct i2c_client *client = led->chip->client; + struct pca963x_chipdef *chipdef = led->chip->chipdef; u8 ledout_addr, ledout, mask, val, mode2; int shift; - ledout_addr = chipdef->ledout_base + (pca963x->led_num / 4); - shift = 2 * (pca963x->led_num % 4); + ledout_addr = chipdef->ledout_base + (led->led_num / 4); + shift = 2 * (led->led_num % 4); mask = 0x3 << shift; mode2 = i2c_smbus_read_byte_data(client, PCA963X_MODE2); - i2c_smbus_write_byte_data(client, chipdef->grppwm, pca963x->gdc); + i2c_smbus_write_byte_data(client, chipdef->grppwm, led->gdc); - i2c_smbus_write_byte_data(client, chipdef->grpfreq, pca963x->gfrq); + i2c_smbus_write_byte_data(client, chipdef->grpfreq, led->gfrq); if (!(mode2 & PCA963X_MODE2_DMBLNK)) i2c_smbus_write_byte_data(client, PCA963X_MODE2, mode2 | PCA963X_MODE2_DMBLNK); - mutex_lock(&pca963x->chip->mutex); + mutex_lock(&led->chip->mutex); ledout = i2c_smbus_read_byte_data(client, ledout_addr); if ((ledout & mask) != (PCA963X_LED_GRP_PWM << shift)) { @@ -182,19 +182,19 @@ static void pca963x_blink(struct pca963x_led *pca963x) i2c_smbus_write_byte_data(client, ledout_addr, val); } - mutex_unlock(&pca963x->chip->mutex); + mutex_unlock(&led->chip->mutex); } -static int pca963x_power_state(struct pca963x_led *pca963x) +static int pca963x_power_state(struct pca963x_led *led) { - struct i2c_client *client = pca963x->chip->client; - unsigned long *leds_on = &pca963x->chip->leds_on; + struct i2c_client *client = led->chip->client; + unsigned long *leds_on = &led->chip->leds_on; unsigned long cached_leds = *leds_on; - if (pca963x->led_cdev.brightness) - set_bit(pca963x->led_num, leds_on); + if (led->led_cdev.brightness) + set_bit(led->led_num, leds_on); else - clear_bit(pca963x->led_num, leds_on); + clear_bit(led->led_num, leds_on); if (!(*leds_on) != !cached_leds) return i2c_smbus_write_byte_data(client, PCA963X_MODE1, @@ -206,27 +206,27 @@ static int pca963x_power_state(struct pca963x_led *pca963x) static int pca963x_led_set(struct led_classdev *led_cdev, enum led_brightness value) { - struct pca963x_led *pca963x; + struct pca963x_led *led; int ret; - pca963x = container_of(led_cdev, struct pca963x_led, led_cdev); + led = container_of(led_cdev, struct pca963x_led, led_cdev); - mutex_lock(&pca963x->chip->mutex); + mutex_lock(&led->chip->mutex); - ret = pca963x_brightness(pca963x, value); + ret = pca963x_brightness(led, value); if (ret < 0) goto unlock; - ret = pca963x_power_state(pca963x); + ret = pca963x_power_state(led); unlock: - mutex_unlock(&pca963x->chip->mutex); + mutex_unlock(&led->chip->mutex); return ret; } -static unsigned int pca963x_period_scale(struct pca963x_led *pca963x, +static unsigned int pca963x_period_scale(struct pca963x_led *led, unsigned int val) { - unsigned int scaling = pca963x->chip->chipdef->scaling; + unsigned int scaling = led->chip->chipdef->scaling; return scaling ? DIV_ROUND_CLOSEST(val * scaling, 1000) : val; } @@ -234,11 +234,11 @@ static unsigned int pca963x_period_scale(struct pca963x_led *pca963x, static int pca963x_blink_set(struct led_classdev *led_cdev, unsigned long *delay_on, unsigned long *delay_off) { - struct pca963x_led *pca963x; unsigned long time_on, time_off, period; + struct pca963x_led *led; u8 gdc, gfrq; - pca963x = container_of(led_cdev, struct pca963x_led, led_cdev); + led = container_of(led_cdev, struct pca963x_led, led_cdev); time_on = *delay_on; time_off = *delay_off; @@ -249,14 +249,14 @@ static int pca963x_blink_set(struct led_classdev *led_cdev, time_off = 500; } - period = pca963x_period_scale(pca963x, time_on + time_off); + period = pca963x_period_scale(led, time_on + time_off); /* If period not supported by hardware, default to someting sane. */ if ((period < PCA963X_BLINK_PERIOD_MIN) || (period > PCA963X_BLINK_PERIOD_MAX)) { time_on = 500; time_off = 500; - period = pca963x_period_scale(pca963x, 1000); + period = pca963x_period_scale(led, 1000); } /* @@ -264,7 +264,7 @@ static int pca963x_blink_set(struct led_classdev *led_cdev, * (time_on / period) = (GDC / 256) -> * GDC = ((time_on * 256) / period) */ - gdc = (pca963x_period_scale(pca963x, time_on) * 256) / period; + gdc = (pca963x_period_scale(led, time_on) * 256) / period; /* * From manual: period = ((GFRQ + 1) / 24) in seconds. @@ -273,10 +273,10 @@ static int pca963x_blink_set(struct led_classdev *led_cdev, */ gfrq = (period * 24 / 1000) - 1; - pca963x->gdc = gdc; - pca963x->gfrq = gfrq; + led->gdc = gdc; + led->gfrq = gfrq; - pca963x_blink(pca963x); + pca963x_blink(led); *delay_on = time_on; *delay_off = time_off; @@ -367,7 +367,7 @@ static int pca963x_probe(struct i2c_client *client, struct device *dev = &client->dev; struct pca963x_chipdef *chipdef; struct pca963x_platform_data *pdata; - struct pca963x_led *pca963x; + struct pca963x_led *leds; struct pca963x *chip; int i, err; @@ -392,8 +392,8 @@ static int pca963x_probe(struct i2c_client *client, chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL); if (!chip) return -ENOMEM; - pca963x = devm_kcalloc(dev, chipdef->n_leds, sizeof(*pca963x), GFP_KERNEL); - if (!pca963x) + leds = devm_kcalloc(dev, chipdef->n_leds, sizeof(*leds), GFP_KERNEL); + if (!leds) return -ENOMEM; i2c_set_clientdata(client, chip); @@ -401,39 +401,41 @@ static int pca963x_probe(struct i2c_client *client, mutex_init(&chip->mutex); chip->chipdef = chipdef; chip->client = client; - chip->leds = pca963x; + chip->leds = leds; /* Turn off LEDs by default*/ for (i = 0; i < chipdef->n_leds / 4; i++) i2c_smbus_write_byte_data(client, chipdef->ledout_base + i, 0x00); for (i = 0; i < chipdef->n_leds; i++) { - pca963x[i].led_num = i; - pca963x[i].chip = chip; + struct pca963x_led *led = &leds[i]; + + led->led_num = i; + led->chip = chip; /* Platform data can specify LED names and default triggers */ if (pdata && i < pdata->leds.num_leds) { if (pdata->leds.leds[i].name) - snprintf(pca963x[i].name, - sizeof(pca963x[i].name), "pca963x:%s", + snprintf(led->name, + sizeof(led->name), "pca963x:%s", pdata->leds.leds[i].name); if (pdata->leds.leds[i].default_trigger) - pca963x[i].led_cdev.default_trigger = + led->led_cdev.default_trigger = pdata->leds.leds[i].default_trigger; } if (!pdata || i >= pdata->leds.num_leds || !pdata->leds.leds[i].name) - snprintf(pca963x[i].name, sizeof(pca963x[i].name), + snprintf(led->name, sizeof(led->name), "pca963x:%d:%.2x:%d", client->adapter->nr, client->addr, i); - pca963x[i].led_cdev.name = pca963x[i].name; - pca963x[i].led_cdev.brightness_set_blocking = pca963x_led_set; + led->led_cdev.name = led->name; + led->led_cdev.brightness_set_blocking = pca963x_led_set; if (pdata && pdata->blink_type == PCA963X_HW_BLINK) - pca963x[i].led_cdev.blink_set = pca963x_blink_set; + led->led_cdev.blink_set = pca963x_blink_set; - err = devm_led_classdev_register(dev, &pca963x[i].led_cdev); + err = devm_led_classdev_register(dev, &led->led_cdev); if (err < 0) return err; } From b5a3b44f2ddc4af49420f430b208ff8060ab7555 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Sun, 20 Sep 2020 02:24:58 +0200 Subject: [PATCH 350/433] leds: pca963x: use flexible array MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Instead of doing two allocations, allocate only once, by utilizing flexible array members. Signed-off-by: Marek Behún Cc: Peter Meerwald Cc: Ricardo Ribalda Cc: Zahari Petkov Signed-off-by: Pavel Machek --- drivers/leds/leds-pca963x.c | 28 ++++++++++++---------------- 1 file changed, 12 insertions(+), 16 deletions(-) diff --git a/drivers/leds/leds-pca963x.c b/drivers/leds/leds-pca963x.c index a4096694925f..73dc00787bee 100644 --- a/drivers/leds/leds-pca963x.c +++ b/drivers/leds/leds-pca963x.c @@ -96,15 +96,7 @@ static const struct i2c_device_id pca963x_id[] = { }; MODULE_DEVICE_TABLE(i2c, pca963x_id); -struct pca963x_led; - -struct pca963x { - struct pca963x_chipdef *chipdef; - struct mutex mutex; - struct i2c_client *client; - struct pca963x_led *leds; - unsigned long leds_on; -}; +struct pca963x; struct pca963x_led { struct pca963x *chip; @@ -115,6 +107,14 @@ struct pca963x_led { u8 gfrq; }; +struct pca963x { + struct pca963x_chipdef *chipdef; + struct mutex mutex; + struct i2c_client *client; + unsigned long leds_on; + struct pca963x_led leds[]; +}; + static int pca963x_brightness(struct pca963x_led *led, enum led_brightness brightness) { @@ -367,7 +367,6 @@ static int pca963x_probe(struct i2c_client *client, struct device *dev = &client->dev; struct pca963x_chipdef *chipdef; struct pca963x_platform_data *pdata; - struct pca963x_led *leds; struct pca963x *chip; int i, err; @@ -389,26 +388,23 @@ static int pca963x_probe(struct i2c_client *client, return -EINVAL; } - chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL); + chip = devm_kzalloc(dev, struct_size(chip, leds, chipdef->n_leds), + GFP_KERNEL); if (!chip) return -ENOMEM; - leds = devm_kcalloc(dev, chipdef->n_leds, sizeof(*leds), GFP_KERNEL); - if (!leds) - return -ENOMEM; i2c_set_clientdata(client, chip); mutex_init(&chip->mutex); chip->chipdef = chipdef; chip->client = client; - chip->leds = leds; /* Turn off LEDs by default*/ for (i = 0; i < chipdef->n_leds / 4; i++) i2c_smbus_write_byte_data(client, chipdef->ledout_base + i, 0x00); for (i = 0; i < chipdef->n_leds; i++) { - struct pca963x_led *led = &leds[i]; + struct pca963x_led *led = &chip->leds[i]; led->led_num = i; led->chip = chip; From 9e955a421d1586bfc56c667b9f2e81f4f226cfef Mon Sep 17 00:00:00 2001 From: Dan Murphy Date: Tue, 22 Sep 2020 14:06:37 -0500 Subject: [PATCH 351/433] leds: lm3532: Fix warnings for undefined parameters MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fix warnings for undefined parameters when W=1 is used. Signed-off-by: Dan Murphy Reviewed-by: Marek Behún Signed-off-by: Pavel Machek --- drivers/leds/leds-lm3532.c | 50 +++++++++++++++++++------------------- 1 file changed, 25 insertions(+), 25 deletions(-) diff --git a/drivers/leds/leds-lm3532.c b/drivers/leds/leds-lm3532.c index 10ded9192fb1..0bf25bdde02f 100644 --- a/drivers/leds/leds-lm3532.c +++ b/drivers/leds/leds-lm3532.c @@ -96,15 +96,15 @@ /* * struct lm3532_als_data - * @config - value of ALS configuration register - * @als1_imp_sel - value of ALS1 resistor select register - * @als2_imp_sel - value of ALS2 resistor select register - * @als_avrg_time - ALS averaging time - * @als_input_mode - ALS input mode for brightness control - * @als_vmin - Minimum ALS voltage - * @als_vmax - Maximum ALS voltage - * @zone_lo - values of ALS lo ZB(Zone Boundary) registers - * @zone_hi - values of ALS hi ZB(Zone Boundary) registers + * @config: value of ALS configuration register + * @als1_imp_sel: value of ALS1 resistor select register + * @als2_imp_sel: value of ALS2 resistor select register + * @als_avrg_time: ALS averaging time + * @als_input_mode: ALS input mode for brightness control + * @als_vmin: Minimum ALS voltage + * @als_vmax: Maximum ALS voltage + * @zone_lo: values of ALS lo ZB(Zone Boundary) registers + * @zone_hi: values of ALS hi ZB(Zone Boundary) registers */ struct lm3532_als_data { u8 config; @@ -121,14 +121,14 @@ struct lm3532_als_data { /** * struct lm3532_led * @led_dev: led class device - * @priv - Pointer the device data structure - * @control_bank - Control bank the LED is associated to - * @mode - Mode of the LED string - * @ctrl_brt_pointer - Zone target register that controls the sink - * @num_leds - Number of LED strings are supported in this array - * @full_scale_current - The full-scale current setting for the current sink. - * @led_strings - The LED strings supported in this array - * @enabled - Enabled status + * @priv: Pointer the device data structure + * @control_bank: Control bank the LED is associated to + * @mode: Mode of the LED string + * @ctrl_brt_pointer: Zone target register that controls the sink + * @num_leds: Number of LED strings are supported in this array + * @full_scale_current: The full-scale current setting for the current sink. + * @led_strings: The LED strings supported in this array + * @enabled: Enabled status */ struct lm3532_led { struct led_classdev led_dev; @@ -145,16 +145,16 @@ struct lm3532_led { /** * struct lm3532_data - * @enable_gpio - Hardware enable gpio + * @enable_gpio: Hardware enable gpio * @regulator: regulator * @client: i2c client - * @regmap - Devices register map - * @dev - Pointer to the devices device struct - * @lock - Lock for reading/writing the device - * @als_data - Pointer to the als data struct - * @runtime_ramp_up - Runtime ramp up setting - * @runtime_ramp_down - Runtime ramp down setting - * @leds - Array of LED strings + * @regmap: Devices register map + * @dev: Pointer to the devices device struct + * @lock: Lock for reading/writing the device + * @als_data: Pointer to the als data struct + * @runtime_ramp_up: Runtime ramp up setting + * @runtime_ramp_down: Runtime ramp down setting + * @leds: Array of LED strings */ struct lm3532_data { struct gpio_desc *enable_gpio; From 9adc8af4c2f414a03235ae5403433ff1090a00ff Mon Sep 17 00:00:00 2001 From: Dan Murphy Date: Tue, 22 Sep 2020 14:06:38 -0500 Subject: [PATCH 352/433] leds: lm36274: Fix warning for undefined parameters MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fix warnings for undefined parameters when building with W=1. Signed-off-by: Dan Murphy Reviewed-by: Marek Behún Signed-off-by: Pavel Machek --- drivers/leds/leds-lm36274.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/leds/leds-lm36274.c b/drivers/leds/leds-lm36274.c index 582c6a821dc8..aadb03468a40 100644 --- a/drivers/leds/leds-lm36274.c +++ b/drivers/leds/leds-lm36274.c @@ -26,8 +26,8 @@ * @lmu_data: Register and setting values for common code * @regmap: Devices register map * @dev: Pointer to the devices device struct - * @led_sources - The LED strings supported in this array - * @num_leds - Number of LED strings are supported in this array + * @led_sources: The LED strings supported in this array + * @num_leds: Number of LED strings are supported in this array */ struct lm36274 { struct platform_device *pdev; @@ -160,6 +160,7 @@ static struct platform_driver lm36274_driver = { .probe = lm36274_probe, .driver = { .name = "lm36274-leds", + .of_match_table = of_lm36274_leds_match, }, }; module_platform_driver(lm36274_driver) From 2a378856e32c98f747bde3fd338ca0e322aae8cb Mon Sep 17 00:00:00 2001 From: Markus Moll Date: Tue, 22 Sep 2020 21:28:35 +0200 Subject: [PATCH 353/433] leds: pca9532: correct shift computation in pca9532_getled Each led setting occupies two bits in a corresponding led register. Accessing these bits requires shifting and masking, which was implemented incorrectly in pca9532_getled. Two new helper macros concentrate the computation of those masks in one place. Signed-off-by: Markus Moll Signed-off-by: Pavel Machek --- drivers/leds/leds-pca9532.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/leds/leds-pca9532.c b/drivers/leds/leds-pca9532.c index 41229f775d35..d37fd9577d4b 100644 --- a/drivers/leds/leds-pca9532.c +++ b/drivers/leds/leds-pca9532.c @@ -27,6 +27,8 @@ #define PCA9532_REG_PWM(m, i) (PCA9532_REG_OFFSET(m) + 0x2 + (i) * 2) #define LED_REG(m, led) (PCA9532_REG_OFFSET(m) + 0x5 + (led >> 2)) #define LED_NUM(led) (led & 0x3) +#define LED_SHIFT(led) (LED_NUM(led) * 2) +#define LED_MASK(led) (0x3 << LED_SHIFT(led)) #define ldev_to_led(c) container_of(c, struct pca9532_led, ldev) @@ -162,9 +164,9 @@ static void pca9532_setled(struct pca9532_led *led) mutex_lock(&data->update_lock); reg = i2c_smbus_read_byte_data(client, LED_REG(maxleds, led->id)); /* zero led bits */ - reg = reg & ~(0x3<id)*2); + reg = reg & ~LED_MASK(led->id); /* set the new value */ - reg = reg | (led->state << LED_NUM(led->id)*2); + reg = reg | (led->state << LED_SHIFT(led->id)); i2c_smbus_write_byte_data(client, LED_REG(maxleds, led->id), reg); mutex_unlock(&data->update_lock); } @@ -260,7 +262,7 @@ static enum pca9532_state pca9532_getled(struct pca9532_led *led) mutex_lock(&data->update_lock); reg = i2c_smbus_read_byte_data(client, LED_REG(maxleds, led->id)); - ret = reg >> LED_NUM(led->id)/2; + ret = (reg & LED_MASK(led->id)) >> LED_SHIFT(led->id); mutex_unlock(&data->update_lock); return ret; } From 7ac5338c3c7c849729f629b6a35d88ac3d43cc56 Mon Sep 17 00:00:00 2001 From: Markus Moll Date: Tue, 22 Sep 2020 21:31:15 +0200 Subject: [PATCH 354/433] leds: pca9532: read pwm settings from device tree While the two pca9532 pwms can be configured in the platform data struct, there was no corresponding dt binding. Users need to configure the pwm if some leds should blink or continue blinking during boot. Signed-off-by: Markus Moll Signed-off-by: Pavel Machek --- drivers/leds/leds-pca9532.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/leds/leds-pca9532.c b/drivers/leds/leds-pca9532.c index d37fd9577d4b..27d027165472 100644 --- a/drivers/leds/leds-pca9532.c +++ b/drivers/leds/leds-pca9532.c @@ -480,6 +480,11 @@ pca9532_of_populate_pdata(struct device *dev, struct device_node *np) if (!pdata) return ERR_PTR(-ENOMEM); + of_property_read_u8_array(np, "nxp,pwm", &pdata->pwm[0], + ARRAY_SIZE(pdata->pwm)); + of_property_read_u8_array(np, "nxp,psc", &pdata->psc[0], + ARRAY_SIZE(pdata->psc)); + for_each_available_child_of_node(np, child) { if (of_property_read_string(child, "label", &pdata->leds[i].name)) From 364682d1bc16277b67f31e411a00e13c50002d2e Mon Sep 17 00:00:00 2001 From: Pavel Machek Date: Fri, 25 Sep 2020 11:29:17 +0200 Subject: [PATCH 355/433] leds: TODO: Add documentation about possible subsystem improvements Help welcome :-). Signed-off-by: Pavel Machek --- drivers/leds/TODO | 75 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 75 insertions(+) create mode 100644 drivers/leds/TODO diff --git a/drivers/leds/TODO b/drivers/leds/TODO new file mode 100644 index 000000000000..bfa60fa1d812 --- /dev/null +++ b/drivers/leds/TODO @@ -0,0 +1,75 @@ +-*- org -*- + +* On/off LEDs should have max_brightness of 1 +* Get rid of enum led_brightness + +It is really an integer, as maximum is configurable. Get rid of it, or +make it into typedef or something. + +* Review atomicity requirements in LED subsystem + +Calls that may and that may not block are mixed in same structure, and +semantics is sometimes non-intuitive. (For example blink callback may +not sleep.) Review the requirements for any bugs and document them +clearly. + +* LED names are still a mess + +No two LEDs have same name, so the names are probably unusable for the +userland. Nudge authors into creating common LED names for common +functionality. + +? Perhaps check for known LED names during boot, and warn if there are +LEDs not on the list? + +* Split drivers into subdirectories + +The number of drivers is getting big, and driver for on/off LED on a +i/o port is really quite different from camera flash LED, which is +really different from driver for RGB color LED that can run its own +microcode. Split the drivers somehow. + +* Figure out what to do with RGB leds + +Multicolor is a bit too abstract. Yes, we can have +Green-Magenta-Ultraviolet LED, but so far all the LEDs we support are +RGB, and not even RGB-White or RGB-Yellow variants emerged. + +Multicolor is not a good fit for RGB LED. It does not really know +about LED color. In particular, there's no way to make LED "white". + +Userspace is interested in knowing "this LED can produce arbitrary +color", which not all multicolor LEDs can. + + Proposal: let's add "rgb" to led_colors in drivers/leds/led-core.c, + add corresponding device tree defines, and use that, instead of + multicolor for RGB LEDs. + + We really need to do that now; "white" stuff can wait. + +RGB LEDs are quite common, and it would be good to be able to turn LED +white and to turn it into any arbitrary color. It is essential that +userspace is able to set arbitrary colors, and it might be good to +have that ability from kernel, too... to allow full-color triggers. + +* Command line utility to manipulate the LEDs? + +/sys interface is not really suitable to use by hand, should we have +an utility to perform LED control? + +In particular, LED names are still a mess (see above) and utility +could help there by presenting both old and new names while we clean +them up. + +In future, I'd like utility to accept both old and new names while we +clean them up. + +It would be also nice to have useful listing mode -- name, type, +current brightness/trigger... + +In future, it would be good to be able to set rgb led to particular +color. + +And probably user-friendly interface to access LEDs for particular +ethernet interface would be nice. + From abcc131292aa8c7de2c5f0ed76a717436c21de63 Mon Sep 17 00:00:00 2001 From: Pavel Machek Date: Sat, 19 Sep 2020 11:34:58 +0200 Subject: [PATCH 356/433] ledtrig-cpu: Limit to 8 CPUs Some machines have thousands of CPUs... and trigger mechanisms was not really meant for thousands of triggers. I doubt anyone uses this trigger on many-CPU machine; but if they do, they'll need to do it properly. Signed-off-by: Pavel Machek --- drivers/leds/trigger/ledtrig-cpu.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/drivers/leds/trigger/ledtrig-cpu.c b/drivers/leds/trigger/ledtrig-cpu.c index 869976d1b734..fca62d503590 100644 --- a/drivers/leds/trigger/ledtrig-cpu.c +++ b/drivers/leds/trigger/ledtrig-cpu.c @@ -2,14 +2,18 @@ /* * ledtrig-cpu.c - LED trigger based on CPU activity * - * This LED trigger will be registered for each possible CPU and named as - * cpu0, cpu1, cpu2, cpu3, etc. + * This LED trigger will be registered for first 8 CPUs and named + * as cpu0..cpu7. There's additional trigger called cpu that + * is on when any CPU is active. + * + * If you want support for arbitrary number of CPUs, make it one trigger, + * with additional sysfs file selecting which CPU to watch. * * It can be bound to any LED just like other triggers using either a * board file or via sysfs interface. * * An API named ledtrig_cpu is exported for any user, who want to add CPU - * activity indication in their code + * activity indication in their code. * * Copyright 2011 Linus Walleij * Copyright 2011 - 2012 Bryan Wu @@ -145,6 +149,9 @@ static int __init ledtrig_cpu_init(void) for_each_possible_cpu(cpu) { struct led_trigger_cpu *trig = &per_cpu(cpu_trig, cpu); + if (cpu >= 8) + continue; + snprintf(trig->name, MAX_NAME_LEN, "cpu%d", cpu); led_trigger_register_simple(trig->name, &trig->_trig); From 9694881d92f4163d556ac9e4c6d2614cb90d74e3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Sun, 20 Sep 2020 00:15:38 +0200 Subject: [PATCH 357/433] dt-bindings: leds: tca6507: convert to YAML MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This converts the tca6507 LED binding to yaml. Signed-off-by: Marek Behún Cc: NeilBrown Cc: Linus Walleij Cc: H. Nikolaus Schaller Cc: Tony Lindgren Cc: Adam Ford Cc: Viresh Kumar Reviewed-by: Rob Herring Cc: devicetree@vger.kernel.org Signed-off-by: Pavel Machek --- .../devicetree/bindings/leds/tca6507.txt | 49 ------- .../devicetree/bindings/leds/ti,tca6507.yaml | 134 ++++++++++++++++++ 2 files changed, 134 insertions(+), 49 deletions(-) delete mode 100644 Documentation/devicetree/bindings/leds/tca6507.txt create mode 100644 Documentation/devicetree/bindings/leds/ti,tca6507.yaml diff --git a/Documentation/devicetree/bindings/leds/tca6507.txt b/Documentation/devicetree/bindings/leds/tca6507.txt deleted file mode 100644 index bad9102796f3..000000000000 --- a/Documentation/devicetree/bindings/leds/tca6507.txt +++ /dev/null @@ -1,49 +0,0 @@ -LEDs connected to tca6507 - -Required properties: -- compatible : should be : "ti,tca6507". -- #address-cells: must be 1 -- #size-cells: must be 0 -- reg: typically 0x45. - -Optional properties: -- gpio-controller: allows lines to be used as output-only GPIOs. -- #gpio-cells: if present, must not be 0. - -Each led is represented as a sub-node of the ti,tca6507 device. - -LED sub-node properties: -- label : (optional) see Documentation/devicetree/bindings/leds/common.txt -- reg : number of LED line (could be from 0 to 6) -- linux,default-trigger : (optional) - see Documentation/devicetree/bindings/leds/common.txt -- compatible: either "led" (the default) or "gpio". - -Examples: - -tca6507@45 { - compatible = "ti,tca6507"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x45>; - - gpio-controller; - #gpio-cells = <2>; - - led0: red-aux@0 { - label = "red:aux"; - reg = <0x0>; - }; - - led1: green-aux@1 { - label = "green:aux"; - reg = <0x5>; - linux,default-trigger = "default-on"; - }; - - wifi-reset@6 { - reg = <0x6>; - compatible = "gpio"; - }; -}; - diff --git a/Documentation/devicetree/bindings/leds/ti,tca6507.yaml b/Documentation/devicetree/bindings/leds/ti,tca6507.yaml new file mode 100644 index 000000000000..94c307c98762 --- /dev/null +++ b/Documentation/devicetree/bindings/leds/ti,tca6507.yaml @@ -0,0 +1,134 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/leds/ti,tca6507.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TCA6507 LED and GPIO controller + +maintainers: + - NeilBrown + +description: + The TCA6507 is a programmable LED controller connected via I2C that can drive + 7 separate lines either by holding them low, or by pulsing them with modulated + width. + +properties: + compatible: + const: ti,tca6507 + + reg: + description: I2C slave address of the controller. + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + gpio-controller: true + + "#gpio-cells": + const: 2 + + gpio-line-names: true + +patternProperties: + "^led@[0-6]$": + type: object + + $ref: common.yaml# + + properties: + reg: + minimum: 0 + maximum: 6 + + required: + - reg + + "^gpio@[0-6]$": + type: object + + properties: + compatible: + const: gpio + + reg: + minimum: 0 + maximum: 6 + + additionalProperties: false + + required: + - reg + - compatible + +if: + patternProperties: + "^gpio@[0-6]$": + properties: + compatible: + contains: + const: gpio +then: + required: + - gpio-controller + - "#gpio-cells" + +additionalProperties: false + +examples: + - | + + #include + #include + + i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + led-controller@45 { + compatible = "ti,tca6507"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x45>; + + gpio-controller; + #gpio-cells = <2>; + + gpio-line-names = "wifi_reset@6"; + + led@0 { + label = "gta04:red:aux"; + reg = <0x0>; + }; + + led@1 { + label = "gta04:green:aux"; + reg = <0x1>; + }; + + led@3 { + reg = <0x3>; + color = ; + function = LED_FUNCTION_POWER; + linux,default-trigger = "default-on"; + }; + + led@4 { + color = ; + function = LED_FUNCTION_POWER; + reg = <0x4>; + }; + + gpio@6 { + compatible = "gpio"; + reg = <0x6>; + }; + }; + }; + +... From b7f0b3bd1fe362160164a3dec3e8063ba3389549 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Sun, 20 Sep 2020 00:15:40 +0200 Subject: [PATCH 358/433] leds: tca6507: do not set GPIO names MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Do not set GPIO names. Let gpiolib determine GPIO names from the DT property `gpio-line-names`. Signed-off-by: Marek Behún Cc: NeilBrown Cc: Linus Walleij Cc: H. Nikolaus Schaller Signed-off-by: Pavel Machek --- drivers/leds/leds-tca6507.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/leds/leds-tca6507.c b/drivers/leds/leds-tca6507.c index d589c89930fd..5004278c6b99 100644 --- a/drivers/leds/leds-tca6507.c +++ b/drivers/leds/leds-tca6507.c @@ -197,7 +197,6 @@ struct tca6507_chip { } leds[NUM_LEDS]; #ifdef CONFIG_GPIOLIB struct gpio_chip gpio; - const char *gpio_name[NUM_LEDS]; int gpio_map[NUM_LEDS]; #endif }; @@ -647,7 +646,6 @@ static int tca6507_probe_gpios(struct i2c_client *client, for (i = 0; i < NUM_LEDS; i++) if (pdata->leds.leds[i].name && pdata->leds.leds[i].flags) { /* Configure as a gpio */ - tca->gpio_name[gpios] = pdata->leds.leds[i].name; tca->gpio_map[gpios] = i; gpios++; } @@ -656,7 +654,6 @@ static int tca6507_probe_gpios(struct i2c_client *client, return 0; tca->gpio.label = "gpio-tca6507"; - tca->gpio.names = tca->gpio_name; tca->gpio.ngpio = gpios; tca->gpio.base = pdata->gpio_base; tca->gpio.owner = THIS_MODULE; From c1ff1a1d3598964bd4bfe1effff1100aa0e79f9d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Sun, 20 Sep 2020 00:15:41 +0200 Subject: [PATCH 359/433] leds: tca6507: cosmetic change: use helper variable MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Use helper variable dev instead of always writing &client->dev. Signed-off-by: Marek Behún Cc: NeilBrown Cc: Linus Walleij Cc: H. Nikolaus Schaller Signed-off-by: Pavel Machek --- drivers/leds/leds-tca6507.c | 33 ++++++++++++++++----------------- 1 file changed, 16 insertions(+), 17 deletions(-) diff --git a/drivers/leds/leds-tca6507.c b/drivers/leds/leds-tca6507.c index 5004278c6b99..80505da55e37 100644 --- a/drivers/leds/leds-tca6507.c +++ b/drivers/leds/leds-tca6507.c @@ -635,7 +635,7 @@ static int tca6507_gpio_direction_output(struct gpio_chip *gc, return 0; } -static int tca6507_probe_gpios(struct i2c_client *client, +static int tca6507_probe_gpios(struct device *dev, struct tca6507_chip *tca, struct tca6507_platform_data *pdata) { @@ -659,9 +659,9 @@ static int tca6507_probe_gpios(struct i2c_client *client, tca->gpio.owner = THIS_MODULE; tca->gpio.direction_output = tca6507_gpio_direction_output; tca->gpio.set = tca6507_gpio_set_value; - tca->gpio.parent = &client->dev; + tca->gpio.parent = dev; #ifdef CONFIG_OF_GPIO - tca->gpio.of_node = of_node_get(dev_of_node(&client->dev)); + tca->gpio.of_node = of_node_get(dev_of_node(dev)); #endif err = gpiochip_add_data(&tca->gpio, tca); if (err) { @@ -677,7 +677,7 @@ static void tca6507_remove_gpio(struct tca6507_chip *tca) gpiochip_remove(&tca->gpio); } #else /* CONFIG_GPIOLIB */ -static int tca6507_probe_gpios(struct i2c_client *client, +static int tca6507_probe_gpios(struct device *dev, struct tca6507_chip *tca, struct tca6507_platform_data *pdata) { @@ -689,23 +689,23 @@ static void tca6507_remove_gpio(struct tca6507_chip *tca) #endif /* CONFIG_GPIOLIB */ static struct tca6507_platform_data * -tca6507_led_dt_init(struct i2c_client *client) +tca6507_led_dt_init(struct device *dev) { struct tca6507_platform_data *pdata; struct fwnode_handle *child; struct led_info *tca_leds; int count; - count = device_get_child_node_count(&client->dev); + count = device_get_child_node_count(dev); if (!count || count > NUM_LEDS) return ERR_PTR(-ENODEV); - tca_leds = devm_kcalloc(&client->dev, NUM_LEDS, sizeof(struct led_info), + tca_leds = devm_kcalloc(dev, NUM_LEDS, sizeof(struct led_info), GFP_KERNEL); if (!tca_leds) return ERR_PTR(-ENOMEM); - device_for_each_child_node(&client->dev, child) { + device_for_each_child_node(dev, child) { struct led_info led; u32 reg; int ret; @@ -730,7 +730,7 @@ tca6507_led_dt_init(struct i2c_client *client) tca_leds[reg] = led; } - pdata = devm_kzalloc(&client->dev, sizeof(struct tca6507_platform_data), + pdata = devm_kzalloc(dev, sizeof(struct tca6507_platform_data), GFP_KERNEL); if (!pdata) return ERR_PTR(-ENOMEM); @@ -753,8 +753,9 @@ MODULE_DEVICE_TABLE(of, of_tca6507_leds_match); static int tca6507_probe(struct i2c_client *client, const struct i2c_device_id *id) { - struct tca6507_chip *tca; + struct device *dev = &client->dev; struct i2c_adapter *adapter; + struct tca6507_chip *tca; struct tca6507_platform_data *pdata; int err; int i = 0; @@ -764,13 +765,12 @@ static int tca6507_probe(struct i2c_client *client, if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) return -EIO; - pdata = tca6507_led_dt_init(client); + pdata = tca6507_led_dt_init(dev); if (IS_ERR(pdata)) { - dev_err(&client->dev, "Need %d entries in platform-data list\n", - NUM_LEDS); + dev_err(dev, "Need %d entries in platform-data list\n", NUM_LEDS); return PTR_ERR(pdata); } - tca = devm_kzalloc(&client->dev, sizeof(*tca), GFP_KERNEL); + tca = devm_kzalloc(dev, sizeof(*tca), GFP_KERNEL); if (!tca) return -ENOMEM; @@ -791,13 +791,12 @@ static int tca6507_probe(struct i2c_client *client, l->led_cdev.brightness_set = tca6507_brightness_set; l->led_cdev.blink_set = tca6507_blink_set; l->bank = -1; - err = led_classdev_register(&client->dev, - &l->led_cdev); + err = led_classdev_register(dev, &l->led_cdev); if (err < 0) goto exit; } } - err = tca6507_probe_gpios(client, tca, pdata); + err = tca6507_probe_gpios(dev, tca, pdata); if (err) goto exit; /* set all registers to known state - zero */ From 7e2dc43da2c0e9352766de5d578edbcfd2c548eb Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Sun, 20 Sep 2020 00:15:43 +0200 Subject: [PATCH 360/433] leds: tca6507: remove binding comment MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Remove the binding comment at the beginning. The information for platdata is now obsolete and DT binding is documented in device-tree bindings. Signed-off-by: Marek Behún Cc: NeilBrown Cc: Linus Walleij Cc: H. Nikolaus Schaller Signed-off-by: Pavel Machek --- drivers/leds/leds-tca6507.c | 17 ----------------- 1 file changed, 17 deletions(-) diff --git a/drivers/leds/leds-tca6507.c b/drivers/leds/leds-tca6507.c index 80505da55e37..225b765830bd 100644 --- a/drivers/leds/leds-tca6507.c +++ b/drivers/leds/leds-tca6507.c @@ -69,23 +69,6 @@ * defaulted. Similarly the banks know if each time was explicit or a * default. Defaults are permitted to be changed freely - they are * not recognised when matching. - * - * - * An led-tca6507 device must be provided with platform data or - * configured via devicetree. - * - * The platform-data lists for each output: the name, default trigger, - * and whether the signal is being used as a GPIO rather than an LED. - * 'struct led_plaform_data' is used for this. If 'name' is NULL, the - * output isn't used. If 'flags' is TCA6507_MAKE_GPIO, the output is - * a GPO. The "struct led_platform_data" can be embedded in a "struct - * tca6507_platform_data" which adds a 'gpio_base' for the GPIOs, and - * a 'setup' callback which is called once the GPIOs are available. - * - * When configured via devicetree there is one child for each output. - * The "reg" determines the output number and "compatible" determines - * whether it is an LED or a GPIO. "linux,default-trigger" can set a - * default trigger. */ #include From 85fc8efe85d405b80904f73e4e23184a84283753 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Sun, 20 Sep 2020 02:24:59 +0200 Subject: [PATCH 361/433] leds: pca963x: register LEDs immediately after parsing, get rid of platdata MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Register LEDs immediately after parsing their properties. This allows us to get rid of platdata, and since no one in tree uses header linux/platform_data/leds-pca963x.h, remove it. Signed-off-by: Marek Behún Cc: Peter Meerwald Cc: Ricardo Ribalda Cc: Zahari Petkov Signed-off-by: Pavel Machek --- drivers/leds/leds-pca963x.c | 196 ++++++++------------- include/linux/platform_data/leds-pca963x.h | 35 ---- 2 files changed, 75 insertions(+), 156 deletions(-) delete mode 100644 include/linux/platform_data/leds-pca963x.h diff --git a/drivers/leds/leds-pca963x.c b/drivers/leds/leds-pca963x.c index 73dc00787bee..5083ccce1a51 100644 --- a/drivers/leds/leds-pca963x.c +++ b/drivers/leds/leds-pca963x.c @@ -32,7 +32,6 @@ #include #include #include -#include /* LED select registers determine the source that drives LED outputs */ #define PCA963X_LED_OFF 0x0 /* LED driver off */ @@ -102,7 +101,6 @@ struct pca963x_led { struct pca963x *chip; struct led_classdev led_cdev; int led_num; /* 0 .. 15 potentially */ - char name[32]; u8 gdc; u8 gfrq; }; @@ -284,72 +282,85 @@ static int pca963x_blink_set(struct led_classdev *led_cdev, return 0; } -static struct pca963x_platform_data * -pca963x_get_pdata(struct device *dev, struct pca963x_chipdef *chipdef) +static int pca963x_register_leds(struct i2c_client *client, + struct pca963x *chip) { - struct pca963x_platform_data *pdata; - struct led_info *pca963x_leds; + struct pca963x_chipdef *chipdef = chip->chipdef; + struct pca963x_led *led = chip->leds; + struct device *dev = &client->dev; struct fwnode_handle *child; - int count; - - count = device_get_child_node_count(dev); - if (!count || count > chipdef->n_leds) - return ERR_PTR(-ENODEV); - - pca963x_leds = devm_kcalloc(dev, chipdef->n_leds, - sizeof(struct led_info), GFP_KERNEL); - if (!pca963x_leds) - return ERR_PTR(-ENOMEM); - - device_for_each_child_node(dev, child) { - struct led_info led = {}; - u32 reg; - int res; - - res = fwnode_property_read_u32(child, "reg", ®); - if ((res != 0) || (reg >= chipdef->n_leds)) - continue; - - res = fwnode_property_read_string(child, "label", &led.name); - if ((res != 0) && is_of_node(child)) - led.name = to_of_node(child)->name; - - fwnode_property_read_string(child, "linux,default-trigger", - &led.default_trigger); - - pca963x_leds[reg] = led; - } - pdata = devm_kzalloc(dev, sizeof(struct pca963x_platform_data), - GFP_KERNEL); - if (!pdata) - return ERR_PTR(-ENOMEM); - - pdata->leds.leds = pca963x_leds; - pdata->leds.num_leds = chipdef->n_leds; - - /* default to open-drain unless totem pole (push-pull) is specified */ - if (device_property_read_bool(dev, "nxp,totem-pole")) - pdata->outdrv = PCA963X_TOTEM_POLE; - else - pdata->outdrv = PCA963X_OPEN_DRAIN; - - /* default to software blinking unless hardware blinking is specified */ - if (device_property_read_bool(dev, "nxp,hw-blink")) - pdata->blink_type = PCA963X_HW_BLINK; - else - pdata->blink_type = PCA963X_SW_BLINK; + const char *name; + char label[64]; + bool hw_blink; + s32 mode2; + u32 reg; + int ret; if (device_property_read_u32(dev, "nxp,period-scale", &chipdef->scaling)) chipdef->scaling = 1000; + hw_blink = device_property_read_bool(dev, "nxp,hw-blink"); + + mode2 = i2c_smbus_read_byte_data(client, PCA963X_MODE2); + if (mode2 < 0) + return mode2; + + /* default to open-drain unless totem pole (push-pull) is specified */ + if (device_property_read_bool(dev, "nxp,totem-pole")) + mode2 |= PCA963X_MODE2_OUTDRV; + else + mode2 &= ~PCA963X_MODE2_OUTDRV; + /* default to non-inverted output, unless inverted is specified */ if (device_property_read_bool(dev, "nxp,inverted-out")) - pdata->dir = PCA963X_INVERTED; + mode2 |= PCA963X_MODE2_INVRT; else - pdata->dir = PCA963X_NORMAL; + mode2 &= ~PCA963X_MODE2_INVRT; - return pdata; + ret = i2c_smbus_write_byte_data(client, PCA963X_MODE2, mode2); + if (ret < 0) + return ret; + + device_for_each_child_node(dev, child) { + ret = fwnode_property_read_u32(child, "reg", ®); + if (ret || reg >= chipdef->n_leds) { + dev_err(dev, "Invalid 'reg' property for node %pfw\n", + child); + ret = -EINVAL; + goto err; + } + + ret = fwnode_property_read_string(child, "label", &name); + if (!fwnode_property_read_string(child, "label", &name)) + snprintf(label, sizeof(label), "pca963x:%s", name); + else + snprintf(label, sizeof(label), "pca963x::"); + + fwnode_property_read_string(child, "linux,default-trigger", + &led->led_cdev.default_trigger); + + led->led_num = reg; + led->chip = chip; + led->led_cdev.name = label; + led->led_cdev.brightness_set_blocking = pca963x_led_set; + if (hw_blink) + led->led_cdev.blink_set = pca963x_blink_set; + + ret = devm_led_classdev_register(dev, &led->led_cdev); + if (ret) { + dev_err(dev, "Failed to register LED for node %pfw\n", + child); + goto err; + } + + ++led; + } + + return 0; +err: + fwnode_handle_put(child); + return ret; } static const struct of_device_id of_pca963x_match[] = { @@ -366,30 +377,19 @@ static int pca963x_probe(struct i2c_client *client, { struct device *dev = &client->dev; struct pca963x_chipdef *chipdef; - struct pca963x_platform_data *pdata; struct pca963x *chip; - int i, err; + int i, count; chipdef = &pca963x_chipdefs[id->driver_data]; - pdata = dev_get_platdata(dev); - if (!pdata) { - pdata = pca963x_get_pdata(dev, chipdef); - if (IS_ERR(pdata)) { - dev_warn(dev, "could not parse configuration\n"); - pdata = NULL; - } - } - - if (pdata && (pdata->leds.num_leds < 1 || - pdata->leds.num_leds > chipdef->n_leds)) { - dev_err(dev, "board info must claim 1-%d LEDs", - chipdef->n_leds); + count = device_get_child_node_count(dev); + if (!count || count > chipdef->n_leds) { + dev_err(dev, "Node %pfw must define between 1 and %d LEDs\n", + dev_fwnode(dev), chipdef->n_leds); return -EINVAL; } - chip = devm_kzalloc(dev, struct_size(chip, leds, chipdef->n_leds), - GFP_KERNEL); + chip = devm_kzalloc(dev, struct_size(chip, leds, count), GFP_KERNEL); if (!chip) return -ENOMEM; @@ -403,56 +403,10 @@ static int pca963x_probe(struct i2c_client *client, for (i = 0; i < chipdef->n_leds / 4; i++) i2c_smbus_write_byte_data(client, chipdef->ledout_base + i, 0x00); - for (i = 0; i < chipdef->n_leds; i++) { - struct pca963x_led *led = &chip->leds[i]; - - led->led_num = i; - led->chip = chip; - - /* Platform data can specify LED names and default triggers */ - if (pdata && i < pdata->leds.num_leds) { - if (pdata->leds.leds[i].name) - snprintf(led->name, - sizeof(led->name), "pca963x:%s", - pdata->leds.leds[i].name); - if (pdata->leds.leds[i].default_trigger) - led->led_cdev.default_trigger = - pdata->leds.leds[i].default_trigger; - } - if (!pdata || i >= pdata->leds.num_leds || - !pdata->leds.leds[i].name) - snprintf(led->name, sizeof(led->name), - "pca963x:%d:%.2x:%d", client->adapter->nr, - client->addr, i); - - led->led_cdev.name = led->name; - led->led_cdev.brightness_set_blocking = pca963x_led_set; - - if (pdata && pdata->blink_type == PCA963X_HW_BLINK) - led->led_cdev.blink_set = pca963x_blink_set; - - err = devm_led_classdev_register(dev, &led->led_cdev); - if (err < 0) - return err; - } - /* Disable LED all-call address, and power down initially */ i2c_smbus_write_byte_data(client, PCA963X_MODE1, BIT(4)); - if (pdata) { - u8 mode2 = i2c_smbus_read_byte_data(client, PCA963X_MODE2); - /* Configure output: open-drain or totem pole (push-pull) */ - if (pdata->outdrv == PCA963X_OPEN_DRAIN) - mode2 &= ~PCA963X_MODE2_OUTDRV; - else - mode2 |= PCA963X_MODE2_OUTDRV; - /* Configure direction: normal or inverted */ - if (pdata->dir == PCA963X_INVERTED) - mode2 |= PCA963X_MODE2_INVRT; - i2c_smbus_write_byte_data(client, PCA963X_MODE2, mode2); - } - - return 0; + return pca963x_register_leds(client, chip); } static struct i2c_driver pca963x_driver = { diff --git a/include/linux/platform_data/leds-pca963x.h b/include/linux/platform_data/leds-pca963x.h deleted file mode 100644 index 6091337ce4bf..000000000000 --- a/include/linux/platform_data/leds-pca963x.h +++ /dev/null @@ -1,35 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * PCA963X LED chip driver. - * - * Copyright 2012 bct electronic GmbH - * Copyright 2013 Qtechnology A/S - */ - -#ifndef __LINUX_PCA963X_H -#define __LINUX_PCA963X_H -#include - -enum pca963x_outdrv { - PCA963X_OPEN_DRAIN, - PCA963X_TOTEM_POLE, /* aka push-pull */ -}; - -enum pca963x_blink_type { - PCA963X_SW_BLINK, - PCA963X_HW_BLINK, -}; - -enum pca963x_direction { - PCA963X_NORMAL, - PCA963X_INVERTED, -}; - -struct pca963x_platform_data { - struct led_platform_data leds; - enum pca963x_outdrv outdrv; - enum pca963x_blink_type blink_type; - enum pca963x_direction dir; -}; - -#endif /* __LINUX_PCA963X_H*/ From 564ead1280d7590f0015d8225637d546e9fa94eb Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Sun, 20 Sep 2020 02:25:00 +0200 Subject: [PATCH 362/433] leds: pca963x: use struct led_init_data when registering MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit By using struct led_init_data when registering we do not need to parse `label` DT property. Moreover `label` is deprecated and if it is not present but `color` and `function` are, LED core will compose a name from these properties instead. Previously if the `label` DT property was not present, the code composed name for the LED in the form "pca963x:%d:%.2x:%u" For backwards compatibility we therefore set init_data->default_label to this value so that the LED will not get a different name if `label` property is not present, nor are `color` and `function`. Signed-off-by: Marek Behún Cc: Peter Meerwald Cc: Ricardo Ribalda Cc: Zahari Petkov Signed-off-by: Pavel Machek --- drivers/leds/leds-pca963x.c | 25 ++++++++++++------------- 1 file changed, 12 insertions(+), 13 deletions(-) diff --git a/drivers/leds/leds-pca963x.c b/drivers/leds/leds-pca963x.c index 5083ccce1a51..00aecd67e348 100644 --- a/drivers/leds/leds-pca963x.c +++ b/drivers/leds/leds-pca963x.c @@ -289,8 +289,6 @@ static int pca963x_register_leds(struct i2c_client *client, struct pca963x_led *led = chip->leds; struct device *dev = &client->dev; struct fwnode_handle *child; - const char *name; - char label[64]; bool hw_blink; s32 mode2; u32 reg; @@ -323,6 +321,9 @@ static int pca963x_register_leds(struct i2c_client *client, return ret; device_for_each_child_node(dev, child) { + struct led_init_data init_data = {}; + char default_label[32]; + ret = fwnode_property_read_u32(child, "reg", ®); if (ret || reg >= chipdef->n_leds) { dev_err(dev, "Invalid 'reg' property for node %pfw\n", @@ -331,23 +332,21 @@ static int pca963x_register_leds(struct i2c_client *client, goto err; } - ret = fwnode_property_read_string(child, "label", &name); - if (!fwnode_property_read_string(child, "label", &name)) - snprintf(label, sizeof(label), "pca963x:%s", name); - else - snprintf(label, sizeof(label), "pca963x::"); - - fwnode_property_read_string(child, "linux,default-trigger", - &led->led_cdev.default_trigger); - led->led_num = reg; led->chip = chip; - led->led_cdev.name = label; led->led_cdev.brightness_set_blocking = pca963x_led_set; if (hw_blink) led->led_cdev.blink_set = pca963x_blink_set; - ret = devm_led_classdev_register(dev, &led->led_cdev); + init_data.fwnode = child; + /* for backwards compatibility */ + init_data.devicename = "pca963x"; + snprintf(default_label, sizeof(default_label), "%d:%.2x:%u", + client->adapter->nr, client->addr, reg); + init_data.default_label = default_label; + + ret = devm_led_classdev_register_ext(dev, &led->led_cdev, + &init_data); if (ret) { dev_err(dev, "Failed to register LED for node %pfw\n", child); From 108f4664e3449828114780a05393eb8d2be7fdd0 Mon Sep 17 00:00:00 2001 From: Tobias Jordan Date: Sat, 26 Sep 2020 02:51:17 +0200 Subject: [PATCH 363/433] leds: tlc591xx: fix leak of device node iterator MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit In one of the error paths of the for_each_child_of_node loop in tlc591xx_probe, add missing call to of_node_put. Fixes: 1ab4531ad132 ("leds: tlc591xx: simplify driver by using the managed led API") Signed-off-by: Tobias Jordan Reviewed-by: Marek Behún Reviewed-by: Tomi Valkeinen Signed-off-by: Pavel Machek --- drivers/leds/leds-tlc591xx.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/leds/leds-tlc591xx.c b/drivers/leds/leds-tlc591xx.c index f24271337bd8..5b9dfdf743ec 100644 --- a/drivers/leds/leds-tlc591xx.c +++ b/drivers/leds/leds-tlc591xx.c @@ -205,10 +205,12 @@ tlc591xx_probe(struct i2c_client *client, led->ldev.max_brightness = TLC591XX_MAX_BRIGHTNESS; err = devm_led_classdev_register_ext(dev, &led->ldev, &init_data); - if (err < 0) + if (err < 0) { + of_node_put(child); return dev_err_probe(dev, err, "couldn't register LED %s\n", led->ldev.name); + } } return 0; } From 940cca1ab5d6c3bc1f8db0c804cf7c5e0caf1853 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Sat, 26 Sep 2020 22:11:30 +0200 Subject: [PATCH 364/433] leds: ns2: convert to fwnode API MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Convert from OF api to fwnode API, so that it is possible to bind this driver without device-tree. The fwnode API does not expose a function to read a specific element of an array. We therefore change the types of the ns2_led_modval structure so that we can read the whole modval array with one fwnode call. Signed-off-by: Marek Behún Tested-by: Simon Guinot Signed-off-by: Pavel Machek --- drivers/leds/leds-ns2.c | 55 +++++++++++++++++++---------------------- 1 file changed, 26 insertions(+), 29 deletions(-) diff --git a/drivers/leds/leds-ns2.c b/drivers/leds/leds-ns2.c index e1ec5cbed07e..dba6bdfa861b 100644 --- a/drivers/leds/leds-ns2.c +++ b/drivers/leds/leds-ns2.c @@ -24,11 +24,16 @@ enum ns2_led_modes { NS_V2_LED_SATA, }; +/* + * If the size of this structure or types of its members is changed, + * the filling of array modval in function ns2_led_register must be changed + * accordingly. + */ struct ns2_led_modval { - enum ns2_led_modes mode; - int cmd_level; - int slow_level; -}; + u32 mode; + u32 cmd_level; + u32 slow_level; +} __packed; /* * The Network Space v2 dual-GPIO LED is wired to a CPLD. Three different LED @@ -167,27 +172,28 @@ static struct attribute *ns2_led_attrs[] = { }; ATTRIBUTE_GROUPS(ns2_led); -static int ns2_led_register(struct device *dev, struct device_node *np, +static int ns2_led_register(struct device *dev, struct fwnode_handle *node, struct ns2_led *led) { struct led_init_data init_data = {}; struct ns2_led_modval *modval; enum ns2_led_modes mode; - int nmodes, ret, i; + int nmodes, ret; - led->cmd = devm_gpiod_get_from_of_node(dev, np, "cmd-gpio", 0, - GPIOD_ASIS, np->name); + led->cmd = devm_fwnode_gpiod_get_index(dev, node, "cmd", 0, GPIOD_ASIS, + fwnode_get_name(node)); if (IS_ERR(led->cmd)) return PTR_ERR(led->cmd); - led->slow = devm_gpiod_get_from_of_node(dev, np, "slow-gpio", 0, - GPIOD_ASIS, np->name); + led->slow = devm_fwnode_gpiod_get_index(dev, node, "slow", 0, + GPIOD_ASIS, + fwnode_get_name(node)); if (IS_ERR(led->slow)) return PTR_ERR(led->slow); - ret = of_property_count_u32_elems(np, "modes-map"); + ret = fwnode_property_count_u32(node, "modes-map"); if (ret < 0 || ret % 3) { - dev_err(dev, "Missing or malformed modes-map for %pOF\n", np); + dev_err(dev, "Missing or malformed modes-map for %pfw\n", node); return -EINVAL; } @@ -196,16 +202,8 @@ static int ns2_led_register(struct device *dev, struct device_node *np, if (!modval) return -ENOMEM; - for (i = 0; i < nmodes; i++) { - u32 val; - - of_property_read_u32_index(np, "modes-map", 3 * i, &val); - modval[i].mode = val; - of_property_read_u32_index(np, "modes-map", 3 * i + 1, &val); - modval[i].cmd_level = val; - of_property_read_u32_index(np, "modes-map", 3 * i + 2, &val); - modval[i].slow_level = val; - } + fwnode_property_read_u32_array(node, "modes-map", (void *)modval, + nmodes * 3); rwlock_init(&led->rw_lock); @@ -228,11 +226,11 @@ static int ns2_led_register(struct device *dev, struct device_node *np, led->sata = (mode == NS_V2_LED_SATA) ? 1 : 0; led->cdev.brightness = (mode == NS_V2_LED_OFF) ? LED_OFF : LED_FULL; - init_data.fwnode = of_fwnode_handle(np); + init_data.fwnode = node; ret = devm_led_classdev_register_ext(dev, &led->cdev, &init_data); if (ret) - dev_err(dev, "Failed to register LED for node %pOF\n", np); + dev_err(dev, "Failed to register LED for node %pfw\n", node); return ret; } @@ -246,13 +244,12 @@ MODULE_DEVICE_TABLE(of, of_ns2_leds_match); static int ns2_led_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; - struct device_node *np, *child; + struct fwnode_handle *child; struct ns2_led *leds; int count; int ret; - np = dev_of_node(dev); - count = of_get_available_child_count(np); + count = device_get_child_node_count(dev); if (!count) return -ENODEV; @@ -260,10 +257,10 @@ static int ns2_led_probe(struct platform_device *pdev) if (!leds) return -ENOMEM; - for_each_available_child_of_node(np, child) { + device_for_each_child_node(dev, child) { ret = ns2_led_register(dev, child, leds++); if (ret) { - of_node_put(child); + fwnode_handle_put(child); return ret; } } From 8fd8f94235c2c925d80b2316e0ab2bdd00af9bae Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Sat, 26 Sep 2020 22:11:31 +0200 Subject: [PATCH 365/433] leds: ns2: do not guard OF match pointer with of_match_ptr MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Do not match OF match pointer with of_match_ptr, so that even if CONFIG_OF is disabled, the driver can still be bound via another method. Move definition of of_ns2_leds_match just before ns2_led_driver definition, since it is not needed sooner. Signed-off-by: Marek Behún Tested-by: Simon Guinot Signed-off-by: Pavel Machek --- drivers/leds/leds-ns2.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/leds/leds-ns2.c b/drivers/leds/leds-ns2.c index dba6bdfa861b..1677d66d8b0e 100644 --- a/drivers/leds/leds-ns2.c +++ b/drivers/leds/leds-ns2.c @@ -235,12 +235,6 @@ static int ns2_led_register(struct device *dev, struct fwnode_handle *node, return ret; } -static const struct of_device_id of_ns2_leds_match[] = { - { .compatible = "lacie,ns2-leds", }, - {}, -}; -MODULE_DEVICE_TABLE(of, of_ns2_leds_match); - static int ns2_led_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -268,11 +262,17 @@ static int ns2_led_probe(struct platform_device *pdev) return 0; } +static const struct of_device_id of_ns2_leds_match[] = { + { .compatible = "lacie,ns2-leds", }, + {}, +}; +MODULE_DEVICE_TABLE(of, of_ns2_leds_match); + static struct platform_driver ns2_led_driver = { .probe = ns2_led_probe, .driver = { .name = "leds-ns2", - .of_match_table = of_match_ptr(of_ns2_leds_match), + .of_match_table = of_ns2_leds_match, }, }; From 9b9448f39e83d8e6fdfed006c5db8c304a98c2cd Mon Sep 17 00:00:00 2001 From: Drew Fustini Date: Wed, 30 Sep 2020 12:48:40 -0500 Subject: [PATCH 366/433] pinctrl: single: fix pinctrl_spec.args_count bounds check The property #pinctrl-cells can either be 1 or 2: - if #pinctrl-cells = <1>, then pinctrl_spec.args_count = 2 - if #pinctrl-cells = <2>, then pinctrl_spec.args_count = 3 All other values of pinctrl_spec.args_count are incorrect. This fix checks the upper bound instead of just the lower bound. Fixes: a13395418888 ("pinctrl: single: parse #pinctrl-cells = 2") Reported-by: Trent Piepho Signed-off-by: Drew Fustini Acked-by: Tony Lindgren Link: https://lore.kernel.org/linux-omap/3139716.CMS8C0sQ7x@zen.local/ Link: https://lore.kernel.org/r/20200930174839.1308344-1-drew@beagleboard.org Signed-off-by: Linus Walleij --- drivers/pinctrl/pinctrl-single.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c index efe41abc5d47..5cbf0e55087c 100644 --- a/drivers/pinctrl/pinctrl-single.c +++ b/drivers/pinctrl/pinctrl-single.c @@ -1014,7 +1014,7 @@ static int pcs_parse_one_pinctrl_entry(struct pcs_device *pcs, if (res) return res; - if (pinctrl_spec.args_count < 2) { + if (pinctrl_spec.args_count < 2 || pinctrl_spec.args_count > 3) { dev_err(pcs->dev, "invalid args_count for spec: %i\n", pinctrl_spec.args_count); break; From f4a2b19c37caf40f3b8487ccb9032b974a84a3a7 Mon Sep 17 00:00:00 2001 From: Drew Fustini Date: Mon, 14 Sep 2020 01:03:07 +0200 Subject: [PATCH 367/433] pinctrl: single: fix debug output when #pinctrl-cells = 2 The debug output in pcs_parse_one_pinctrl_entry() needs to be updated to print the correct pinctrl register value when #pinctrl-cells is 2. Fixes: a13395418888 ("pinctrl: single: parse #pinctrl-cells = 2") Reported-by: Trent Piepho Signed-off-by: Drew Fustini Acked-by: Tony Lindgren Link: https://lore.kernel.org/linux-omap/3139716.CMS8C0sQ7x@zen.local/ Link: https://lore.kernel.org/r/20200913230306.2061645-1-drew@beagleboard.org Signed-off-by: Linus Walleij --- drivers/pinctrl/pinctrl-single.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c index 5cbf0e55087c..f3cd7e296712 100644 --- a/drivers/pinctrl/pinctrl-single.c +++ b/drivers/pinctrl/pinctrl-single.c @@ -1033,7 +1033,7 @@ static int pcs_parse_one_pinctrl_entry(struct pcs_device *pcs, } dev_dbg(pcs->dev, "%pOFn index: 0x%x value: 0x%x\n", - pinctrl_spec.np, offset, pinctrl_spec.args[1]); + pinctrl_spec.np, offset, vals[found].val); pin = pcs_get_pin_by_offset(pcs, offset); if (pin < 0) { From fce3c5c1a2d9cd888f2987662ce17c0c651916b2 Mon Sep 17 00:00:00 2001 From: Thomas Petazzoni Date: Thu, 1 Oct 2020 09:44:15 +0200 Subject: [PATCH 368/433] serial: max310x: rework RX interrupt handling Currently, the RX interrupt logic uses the RXEMPTY interrupt, with the RXEMPTYINV bit set, which means we get an RX interrupt as soon as the RX FIFO is non-empty. However, with the MAX310X having a FIFO of 128 bytes, this makes very poor use of the FIFO: we trigger an interrupt as soon as the RX FIFO has one byte, which means a lot of interrupts, each only collecting a few bytes from the FIFO, causing a significant CPU load. Instead this commit relies on two other RX interrupt events: - MAX310X_IRQ_RXFIFO_BIT, which triggers when the RX FIFO has reached a certain threshold, which we define to be half of the FIFO size. This ensure we get an interrupt before the RX FIFO fills up. - MAX310X_LSR_RXTO_BIT, which triggers when the RX FIFO has received some bytes, and then no more bytes are received for a certain time. Arbitrarily, this time is defined to the time is takes to receive 4 characters. On a Microchip SAMA5D3 platform that is receiving 20 bytes every 16ms over one MAX310X UART, this patch has allowed to reduce the CPU consumption of the interrupt handler thread from ~25% to 6-7%. Signed-off-by: Thomas Petazzoni Link: https://lore.kernel.org/r/20201001074415.349739-1-thomas.petazzoni@bootlin.com Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/max310x.c | 29 ++++++++++++++++++++++++----- 1 file changed, 24 insertions(+), 5 deletions(-) diff --git a/drivers/tty/serial/max310x.c b/drivers/tty/serial/max310x.c index 8434bd5a8ec7..21130af106bb 100644 --- a/drivers/tty/serial/max310x.c +++ b/drivers/tty/serial/max310x.c @@ -1056,9 +1056,9 @@ static int max310x_startup(struct uart_port *port) max310x_port_update(port, MAX310X_MODE1_REG, MAX310X_MODE1_TRNSCVCTRL_BIT, 0); - /* Configure MODE2 register & Reset FIFOs*/ - val = MAX310X_MODE2_RXEMPTINV_BIT | MAX310X_MODE2_FIFORST_BIT; - max310x_port_write(port, MAX310X_MODE2_REG, val); + /* Reset FIFOs */ + max310x_port_write(port, MAX310X_MODE2_REG, + MAX310X_MODE2_FIFORST_BIT); max310x_port_update(port, MAX310X_MODE2_REG, MAX310X_MODE2_FIFORST_BIT, 0); @@ -1086,8 +1086,27 @@ static int max310x_startup(struct uart_port *port) /* Clear IRQ status register */ max310x_port_read(port, MAX310X_IRQSTS_REG); - /* Enable RX, TX, CTS change interrupts */ - val = MAX310X_IRQ_RXEMPTY_BIT | MAX310X_IRQ_TXEMPTY_BIT; + /* + * Let's ask for an interrupt after a timeout equivalent to + * the receiving time of 4 characters after the last character + * has been received. + */ + max310x_port_write(port, MAX310X_RXTO_REG, 4); + + /* + * Make sure we also get RX interrupts when the RX FIFO is + * filling up quickly, so get an interrupt when half of the RX + * FIFO has been filled in. + */ + max310x_port_write(port, MAX310X_FIFOTRIGLVL_REG, + MAX310X_FIFOTRIGLVL_RX(MAX310X_FIFO_SIZE / 2)); + + /* Enable RX timeout interrupt in LSR */ + max310x_port_write(port, MAX310X_LSR_IRQEN_REG, + MAX310X_LSR_RXTO_BIT); + + /* Enable LSR, RX FIFO trigger, CTS change interrupts */ + val = MAX310X_IRQ_LSR_BIT | MAX310X_IRQ_RXFIFO_BIT | MAX310X_IRQ_TXEMPTY_BIT; max310x_port_write(port, MAX310X_IRQEN_REG, val | MAX310X_IRQ_CTS_BIT); return 0; From 5376471b2c4c71b1eddf24a9da48cef0584eb107 Mon Sep 17 00:00:00 2001 From: Zhen Lei Date: Tue, 29 Sep 2020 22:14:38 +0800 Subject: [PATCH 369/433] dt-bindings: mfd: syscon: add some compatible strings for Hisilicon Add some compatible strings for Hisilicon controllers: hisilicon,hi6220-sramctrl --> Hi6220 SRAM controller hisilicon,pcie-sas-subctrl --> HiP05/HiP06 PCIe-SAS subsystem controller hisilicon,peri-subctrl --> HiP05/HiP06 PERI subsystem controller hisilicon,dsa-subctrl --> HiP05/HiP06 DSA subsystem controller Signed-off-by: Zhen Lei Link: https://lore.kernel.org/r/20200929141454.2312-2-thunder.leizhen@huawei.com [robh: sort entries alphabetically] Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/mfd/syscon.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index 049ec2ffc7f9..844ee2a6ce05 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -38,6 +38,10 @@ properties: - allwinner,sun8i-h3-system-controller - allwinner,sun8i-v3s-system-controller - allwinner,sun50i-a64-system-controller + - hisilicon,dsa-subctrl + - hisilicon,hi6220-sramctrl + - hisilicon,pcie-sas-subctrl + - hisilicon,peri-subctrl - microchip,sparx5-cpu-syscon - mstar,msc313-pmsleep From 4041a78249cdb6f43ddb3cb37a1b98b86cf82b4b Mon Sep 17 00:00:00 2001 From: Zhen Lei Date: Tue, 29 Sep 2020 22:14:39 +0800 Subject: [PATCH 370/433] dt-bindings: arm: hisilicon: delete the descriptions of HiP05/HiP06 controllers The compatible strings of Hi6220 SRAM controller, HiP05/HiP06 PCIe-SAS subsystem controller, HiP05/HiP06 PERI subsystem controller and HiP05/HiP06 DSA subsystem controller is in syscon.yaml now. Signed-off-by: Zhen Lei Link: https://lore.kernel.org/r/20200929141454.2312-3-thunder.leizhen@huawei.com Signed-off-by: Rob Herring --- .../bindings/arm/hisilicon/hisilicon.txt | 68 ------------------- 1 file changed, 68 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt index a97f643e7d1c..54f423d87a80 100644 --- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt +++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt @@ -186,24 +186,6 @@ Example: #clock-cells = <1>; }; - -Hisilicon Hi6220 SRAM controller - -Required properties: -- compatible : "hisilicon,hi6220-sramctrl", "syscon" -- reg : Register address and size - -Hisilicon's SoCs use sram for multiple purpose; on Hi6220 there have several -SRAM banks for power management, modem, security, etc. Further, use "syscon" -managing the common sram which can be shared by multiple modules. - -Example: - /*for Hi6220*/ - sram: sram@fff80000 { - compatible = "hisilicon,hi6220-sramctrl", "syscon"; - reg = <0x0 0xfff80000 0x0 0x12000>; - }; - ----------------------------------------------------------------------- Hisilicon HiP01 system controller @@ -225,56 +207,6 @@ Example: reboot-offset = <0x4>; }; ------------------------------------------------------------------------ -Hisilicon HiP05/HiP06 PCIe-SAS sub system controller - -Required properties: -- compatible : "hisilicon,pcie-sas-subctrl", "syscon"; -- reg : Register address and size - -The PCIe-SAS sub system controller is shared by PCIe and SAS controllers in -HiP05 or HiP06 Soc to implement some basic configurations. - -Example: - /* for HiP05 PCIe-SAS sub system */ - pcie_sas: system_controller@b0000000 { - compatible = "hisilicon,pcie-sas-subctrl", "syscon"; - reg = <0xb0000000 0x10000>; - }; - -Hisilicon HiP05/HiP06 PERI sub system controller - -Required properties: -- compatible : "hisilicon,peri-subctrl", "syscon"; -- reg : Register address and size - -The PERI sub system controller is shared by peripheral controllers in -HiP05 or HiP06 Soc to implement some basic configurations. The peripheral -controllers include mdio, ddr, iic, uart, timer and so on. - -Example: - /* for HiP05 sub peri system */ - peri_c_subctrl: syscon@80000000 { - compatible = "hisilicon,peri-subctrl", "syscon"; - reg = <0x0 0x80000000 0x0 0x10000>; - }; - -Hisilicon HiP05/HiP06 DSA sub system controller - -Required properties: -- compatible : "hisilicon,dsa-subctrl", "syscon"; -- reg : Register address and size - -The DSA sub system controller is shared by peripheral controllers in -HiP05 or HiP06 Soc to implement some basic configurations. - -Example: - /* for HiP05 dsa sub system */ - pcie_sas: system_controller@a0000000 { - compatible = "hisilicon,dsa-subctrl", "syscon"; - reg = <0xa0000000 0x10000>; - }; - ----------------------------------------------------------------------- Hisilicon CPU controller From 921a31639cb537e1cae78d5e9228a2ae74fffbb4 Mon Sep 17 00:00:00 2001 From: Zhen Lei Date: Tue, 29 Sep 2020 22:14:40 +0800 Subject: [PATCH 371/433] dt-bindings: arm: hisilicon: split the dt-bindings of each controller into a separate file Split the devicetree bindings of each Hisilicon controller from hisilicon.txt into a separate file, the file name is the compatible name attach the .txt file name extension. Signed-off-by: Zhen Lei Link: https://lore.kernel.org/r/20200929141454.2312-4-thunder.leizhen@huawei.com Signed-off-by: Rob Herring --- .../controller/hisilicon,cpuctrl.txt | 8 + .../hisilicon,hi3798cv200-perictrl.txt | 21 ++ .../controller/hisilicon,hi6220-aoctrl.txt | 18 ++ .../controller/hisilicon,hi6220-mediactrl.txt | 18 ++ .../controller/hisilicon,hi6220-pmctrl.txt | 18 ++ .../controller/hisilicon,hi6220-sysctrl.txt | 19 ++ .../controller/hisilicon,hip01-sysctrl.txt | 19 ++ .../hisilicon,hip04-bootwrapper.txt | 9 + .../controller/hisilicon,hip04-fabric.txt | 5 + .../hisilicon/controller/hisilicon,pctrl.txt | 13 ++ .../controller/hisilicon,sysctrl.txt | 25 +++ .../bindings/arm/hisilicon/hisilicon.txt | 194 ------------------ 12 files changed, 173 insertions(+), 194 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,cpuctrl.txt create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi3798cv200-perictrl.txt create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-aoctrl.txt create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-mediactrl.txt create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-pmctrl.txt create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-sysctrl.txt create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip01-sysctrl.txt create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-bootwrapper.txt create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-fabric.txt create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,pctrl.txt create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,sysctrl.txt diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,cpuctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,cpuctrl.txt new file mode 100644 index 000000000000..ceffac537671 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,cpuctrl.txt @@ -0,0 +1,8 @@ +Hisilicon CPU controller + +Required properties: +- compatible : "hisilicon,cpuctrl" +- reg : Register address and size + +The clock registers and power registers of secondary cores are defined +in CPU controller, especially in HIX5HD2 SoC. diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi3798cv200-perictrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi3798cv200-perictrl.txt new file mode 100644 index 000000000000..0d5282f46706 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi3798cv200-perictrl.txt @@ -0,0 +1,21 @@ +Hisilicon Hi3798CV200 Peripheral Controller + +The Hi3798CV200 Peripheral Controller controls peripherals, queries +their status, and configures some functions of peripherals. + +Required properties: +- compatible: Should contain "hisilicon,hi3798cv200-perictrl", "syscon" + and "simple-mfd". +- reg: Register address and size of Peripheral Controller. +- #address-cells: Should be 1. +- #size-cells: Should be 1. + +Examples: + + perictrl: peripheral-controller@8a20000 { + compatible = "hisilicon,hi3798cv200-perictrl", "syscon", + "simple-mfd"; + reg = <0x8a20000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + }; diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-aoctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-aoctrl.txt new file mode 100644 index 000000000000..5a723c1d45f4 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-aoctrl.txt @@ -0,0 +1,18 @@ +Hisilicon Hi6220 Power Always ON domain controller + +Required properties: +- compatible : "hisilicon,hi6220-aoctrl" +- reg : Register address and size +- #clock-cells: should be set to 1, many clock registers are defined + under this controller and this property must be present. + +Hisilicon designs this system controller to control the power always +on domain for mobile platform. + +Example: + /*for Hi6220*/ + ao_ctrl: ao_ctrl@f7800000 { + compatible = "hisilicon,hi6220-aoctrl", "syscon"; + reg = <0x0 0xf7800000 0x0 0x2000>; + #clock-cells = <1>; + }; diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-mediactrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-mediactrl.txt new file mode 100644 index 000000000000..dcfdcbcb6455 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-mediactrl.txt @@ -0,0 +1,18 @@ +Hisilicon Hi6220 Media domain controller + +Required properties: +- compatible : "hisilicon,hi6220-mediactrl" +- reg : Register address and size +- #clock-cells: should be set to 1, many clock registers are defined + under this controller and this property must be present. + +Hisilicon designs this system controller to control the multimedia +domain(e.g. codec, G3D ...) for mobile platform. + +Example: + /*for Hi6220*/ + media_ctrl: media_ctrl@f4410000 { + compatible = "hisilicon,hi6220-mediactrl", "syscon"; + reg = <0x0 0xf4410000 0x0 0x1000>; + #clock-cells = <1>; + }; diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-pmctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-pmctrl.txt new file mode 100644 index 000000000000..972842f07b5a --- /dev/null +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-pmctrl.txt @@ -0,0 +1,18 @@ +Hisilicon Hi6220 Power Management domain controller + +Required properties: +- compatible : "hisilicon,hi6220-pmctrl" +- reg : Register address and size +- #clock-cells: should be set to 1, some clock registers are define + under this controller and this property must be present. + +Hisilicon designs this system controller to control the power management +domain for mobile platform. + +Example: + /*for Hi6220*/ + pm_ctrl: pm_ctrl@f7032000 { + compatible = "hisilicon,hi6220-pmctrl", "syscon"; + reg = <0x0 0xf7032000 0x0 0x1000>; + #clock-cells = <1>; + }; diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-sysctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-sysctrl.txt new file mode 100644 index 000000000000..07e318eda254 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-sysctrl.txt @@ -0,0 +1,19 @@ +Hisilicon Hi6220 system controller + +Required properties: +- compatible : "hisilicon,hi6220-sysctrl" +- reg : Register address and size +- #clock-cells: should be set to 1, many clock registers are defined + under this controller and this property must be present. + +Hisilicon designs this controller as one of the system controllers, +its main functions are the same as Hisilicon system controller, but +the register offset of some core modules are different. + +Example: + /*for Hi6220*/ + sys_ctrl: sys_ctrl@f7030000 { + compatible = "hisilicon,hi6220-sysctrl", "syscon"; + reg = <0x0 0xf7030000 0x0 0x2000>; + #clock-cells = <1>; + }; diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip01-sysctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip01-sysctrl.txt new file mode 100644 index 000000000000..db2dfdce799d --- /dev/null +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip01-sysctrl.txt @@ -0,0 +1,19 @@ +Hisilicon HiP01 system controller + +Required properties: +- compatible : "hisilicon,hip01-sysctrl" +- reg : Register address and size + +The HiP01 system controller is mostly compatible with hisilicon +system controller,but it has some specific control registers for +HIP01 SoC family, such as slave core boot, and also some same +registers located at different offset. + +Example: + + /* for hip01-ca9x2 */ + sysctrl: system-controller@10000000 { + compatible = "hisilicon,hip01-sysctrl", "hisilicon,sysctrl"; + reg = <0x10000000 0x1000>; + reboot-offset = <0x4>; + }; diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-bootwrapper.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-bootwrapper.txt new file mode 100644 index 000000000000..b0d53333f4fd --- /dev/null +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-bootwrapper.txt @@ -0,0 +1,9 @@ +Bootwrapper boot method (software protocol on SMP): + +Required Properties: +- compatible: "hisilicon,hip04-bootwrapper"; +- boot-method: Address and size of boot method. + [0]: bootwrapper physical address + [1]: bootwrapper size + [2]: relocation physical address + [3]: relocation size diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-fabric.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-fabric.txt new file mode 100644 index 000000000000..40453d02f202 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-fabric.txt @@ -0,0 +1,5 @@ +Fabric: + +Required Properties: +- compatible: "hisilicon,hip04-fabric"; +- reg: Address and size of Fabric diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,pctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,pctrl.txt new file mode 100644 index 000000000000..deec777bc3a8 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,pctrl.txt @@ -0,0 +1,13 @@ +PCTRL: Peripheral misc control register + +Required Properties: +- compatible: "hisilicon,pctrl" +- reg: Address and size of pctrl. + +Example: + + /* for Hi3620 */ + pctrl: pctrl@fca09000 { + compatible = "hisilicon,pctrl"; + reg = <0xfca09000 0x1000>; + }; diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,sysctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,sysctrl.txt new file mode 100644 index 000000000000..963f7f1ca7a2 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,sysctrl.txt @@ -0,0 +1,25 @@ +Hisilicon system controller + +Required properties: +- compatible : "hisilicon,sysctrl" +- reg : Register address and size + +Optional properties: +- smp-offset : offset in sysctrl for notifying slave cpu booting + cpu 1, reg; + cpu 2, reg + 0x4; + cpu 3, reg + 0x8; + If reg value is not zero, cpun exit wfi and go +- resume-offset : offset in sysctrl for notifying cpu0 when resume +- reboot-offset : offset in sysctrl for system reboot + +Example: + + /* for Hi3620 */ + sysctrl: system-controller@fc802000 { + compatible = "hisilicon,sysctrl"; + reg = <0xfc802000 0x1000>; + smp-offset = <0x31c>; + resume-offset = <0x308>; + reboot-offset = <0x4>; + }; diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt index 54f423d87a80..ffe760a636b5 100644 --- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt +++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt @@ -55,197 +55,3 @@ Required root node properties: HiP07 D05 Board Required root node properties: - compatible = "hisilicon,hip07-d05"; - -Hisilicon system controller - -Required properties: -- compatible : "hisilicon,sysctrl" -- reg : Register address and size - -Optional properties: -- smp-offset : offset in sysctrl for notifying slave cpu booting - cpu 1, reg; - cpu 2, reg + 0x4; - cpu 3, reg + 0x8; - If reg value is not zero, cpun exit wfi and go -- resume-offset : offset in sysctrl for notifying cpu0 when resume -- reboot-offset : offset in sysctrl for system reboot - -Example: - - /* for Hi3620 */ - sysctrl: system-controller@fc802000 { - compatible = "hisilicon,sysctrl"; - reg = <0xfc802000 0x1000>; - smp-offset = <0x31c>; - resume-offset = <0x308>; - reboot-offset = <0x4>; - }; - ------------------------------------------------------------------------ -Hisilicon Hi3798CV200 Peripheral Controller - -The Hi3798CV200 Peripheral Controller controls peripherals, queries -their status, and configures some functions of peripherals. - -Required properties: -- compatible: Should contain "hisilicon,hi3798cv200-perictrl", "syscon" - and "simple-mfd". -- reg: Register address and size of Peripheral Controller. -- #address-cells: Should be 1. -- #size-cells: Should be 1. - -Examples: - - perictrl: peripheral-controller@8a20000 { - compatible = "hisilicon,hi3798cv200-perictrl", "syscon", - "simple-mfd"; - reg = <0x8a20000 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - }; - ------------------------------------------------------------------------ -Hisilicon Hi6220 system controller - -Required properties: -- compatible : "hisilicon,hi6220-sysctrl" -- reg : Register address and size -- #clock-cells: should be set to 1, many clock registers are defined - under this controller and this property must be present. - -Hisilicon designs this controller as one of the system controllers, -its main functions are the same as Hisilicon system controller, but -the register offset of some core modules are different. - -Example: - /*for Hi6220*/ - sys_ctrl: sys_ctrl@f7030000 { - compatible = "hisilicon,hi6220-sysctrl", "syscon"; - reg = <0x0 0xf7030000 0x0 0x2000>; - #clock-cells = <1>; - }; - - -Hisilicon Hi6220 Power Always ON domain controller - -Required properties: -- compatible : "hisilicon,hi6220-aoctrl" -- reg : Register address and size -- #clock-cells: should be set to 1, many clock registers are defined - under this controller and this property must be present. - -Hisilicon designs this system controller to control the power always -on domain for mobile platform. - -Example: - /*for Hi6220*/ - ao_ctrl: ao_ctrl@f7800000 { - compatible = "hisilicon,hi6220-aoctrl", "syscon"; - reg = <0x0 0xf7800000 0x0 0x2000>; - #clock-cells = <1>; - }; - - -Hisilicon Hi6220 Media domain controller - -Required properties: -- compatible : "hisilicon,hi6220-mediactrl" -- reg : Register address and size -- #clock-cells: should be set to 1, many clock registers are defined - under this controller and this property must be present. - -Hisilicon designs this system controller to control the multimedia -domain(e.g. codec, G3D ...) for mobile platform. - -Example: - /*for Hi6220*/ - media_ctrl: media_ctrl@f4410000 { - compatible = "hisilicon,hi6220-mediactrl", "syscon"; - reg = <0x0 0xf4410000 0x0 0x1000>; - #clock-cells = <1>; - }; - - -Hisilicon Hi6220 Power Management domain controller - -Required properties: -- compatible : "hisilicon,hi6220-pmctrl" -- reg : Register address and size -- #clock-cells: should be set to 1, some clock registers are define - under this controller and this property must be present. - -Hisilicon designs this system controller to control the power management -domain for mobile platform. - -Example: - /*for Hi6220*/ - pm_ctrl: pm_ctrl@f7032000 { - compatible = "hisilicon,hi6220-pmctrl", "syscon"; - reg = <0x0 0xf7032000 0x0 0x1000>; - #clock-cells = <1>; - }; - ------------------------------------------------------------------------ -Hisilicon HiP01 system controller - -Required properties: -- compatible : "hisilicon,hip01-sysctrl" -- reg : Register address and size - -The HiP01 system controller is mostly compatible with hisilicon -system controller,but it has some specific control registers for -HIP01 SoC family, such as slave core boot, and also some same -registers located at different offset. - -Example: - - /* for hip01-ca9x2 */ - sysctrl: system-controller@10000000 { - compatible = "hisilicon,hip01-sysctrl", "hisilicon,sysctrl"; - reg = <0x10000000 0x1000>; - reboot-offset = <0x4>; - }; - ------------------------------------------------------------------------ -Hisilicon CPU controller - -Required properties: -- compatible : "hisilicon,cpuctrl" -- reg : Register address and size - -The clock registers and power registers of secondary cores are defined -in CPU controller, especially in HIX5HD2 SoC. - ------------------------------------------------------------------------ -PCTRL: Peripheral misc control register - -Required Properties: -- compatible: "hisilicon,pctrl" -- reg: Address and size of pctrl. - -Example: - - /* for Hi3620 */ - pctrl: pctrl@fca09000 { - compatible = "hisilicon,pctrl"; - reg = <0xfca09000 0x1000>; - }; - ------------------------------------------------------------------------ -Fabric: - -Required Properties: -- compatible: "hisilicon,hip04-fabric"; -- reg: Address and size of Fabric - ------------------------------------------------------------------------ -Bootwrapper boot method (software protocol on SMP): - -Required Properties: -- compatible: "hisilicon,hip04-bootwrapper"; -- boot-method: Address and size of boot method. - [0]: bootwrapper physical address - [1]: bootwrapper size - [2]: relocation physical address - [3]: relocation size From 1d86b08953240579c5d920aee7aad73d4a5ebee2 Mon Sep 17 00:00:00 2001 From: Zhen Lei Date: Tue, 29 Sep 2020 22:14:41 +0800 Subject: [PATCH 372/433] dt-bindings: arm: hisilicon: convert Hisilicon board/soc bindings to json-schema Convert Hisilicon SoC bindings to DT schema format using json-schema. Signed-off-by: Zhen Lei Reviewed-by: Rob Herring Signed-off-by: Rob Herring --- .../bindings/arm/hisilicon/hisilicon.txt | 57 ----------------- .../bindings/arm/hisilicon/hisilicon.yaml | 62 +++++++++++++++++++ 2 files changed, 62 insertions(+), 57 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt deleted file mode 100644 index ffe760a636b5..000000000000 --- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt +++ /dev/null @@ -1,57 +0,0 @@ -Hisilicon Platforms Device Tree Bindings ----------------------------------------------------- -Hi3660 SoC -Required root node properties: - - compatible = "hisilicon,hi3660"; - -HiKey960 Board -Required root node properties: - - compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660"; - -Hi3670 SoC -Required root node properties: - - compatible = "hisilicon,hi3670"; - -HiKey970 Board -Required root node properties: - - compatible = "hisilicon,hi3670-hikey970", "hisilicon,hi3670"; - -Hi3798cv200 SoC -Required root node properties: - - compatible = "hisilicon,hi3798cv200"; - -Hi3798cv200 Poplar Board -Required root node properties: - - compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200"; - -Hi4511 Board -Required root node properties: - - compatible = "hisilicon,hi3620-hi4511"; - -Hi6220 SoC -Required root node properties: - - compatible = "hisilicon,hi6220"; - -HiKey Board -Required root node properties: - - compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220"; - -HiP01 ca9x2 Board -Required root node properties: - - compatible = "hisilicon,hip01-ca9x2"; - -HiP04 D01 Board -Required root node properties: - - compatible = "hisilicon,hip04-d01"; - -HiP05 D02 Board -Required root node properties: - - compatible = "hisilicon,hip05-d02"; - -HiP06 D03 Board -Required root node properties: - - compatible = "hisilicon,hip06-d03"; - -HiP07 D05 Board -Required root node properties: - - compatible = "hisilicon,hip07-d05"; diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml new file mode 100644 index 000000000000..6d17309c7c84 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/hisilicon/hisilicon.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Hisilicon Platforms Device Tree Bindings + +maintainers: + - Wei Xu + +properties: + $nodename: + const: '/' + + compatible: + oneOf: + - description: Hi3660 based boards. + items: + - const: hisilicon,hi3660-hikey960 + - const: hisilicon,hi3660 + + - description: Hi3670 based boards. + items: + - const: hisilicon,hi3670-hikey970 + - const: hisilicon,hi3670 + + - description: Hi3798cv200 based boards. + items: + - const: hisilicon,hi3798cv200-poplar + - const: hisilicon,hi3798cv200 + + - description: Hi4511 Board + items: + - const: hisilicon,hi3620-hi4511 + + - description: Hi6220 based boards. + items: + - const: hisilicon,hi6220-hikey + - const: hisilicon,hi6220 + + - description: HiP01 based boards. + items: + - const: hisilicon,hip01-ca9x2 + - const: hisilicon,hip01 + + - description: HiP04 D01 Board + items: + - const: hisilicon,hip04-d01 + + - description: HiP05 D02 Board + items: + - const: hisilicon,hip05-d02 + + - description: HiP06 D03 Board + items: + - const: hisilicon,hip06-d03 + + - description: HiP07 D05 Board + items: + - const: hisilicon,hip07-d05 +... From 42f2445fe84c0e22f4014a29c99ed0c96bb4a7ed Mon Sep 17 00:00:00 2001 From: Zhen Lei Date: Tue, 29 Sep 2020 22:14:42 +0800 Subject: [PATCH 373/433] dt-bindings: arm: hisilicon: add binding for SD5203 SoC Add devicetree binding for Hisilicon SD5203 SoC. Signed-off-by: Zhen Lei Link: https://lore.kernel.org/r/20200929141454.2312-6-thunder.leizhen@huawei.com Signed-off-by: Rob Herring --- .../devicetree/bindings/arm/hisilicon/hisilicon.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml index 6d17309c7c84..43b8ce2227aa 100644 --- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml +++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml @@ -59,4 +59,9 @@ properties: - description: HiP07 D05 Board items: - const: hisilicon,hip07-d05 + + - description: SD5203 based boards + items: + - const: H836ASDJ + - const: hisilicon,sd5203 ... From f1d60fbb491194019c1ac4a5ea2b6f4e420614fc Mon Sep 17 00:00:00 2001 From: Zhen Lei Date: Tue, 29 Sep 2020 22:14:47 +0800 Subject: [PATCH 374/433] dt-bindings: arm: hisilicon: convert system controller bindings to json-schema Convert the Hisilicon system controller and its variants binding to DT schema format using json-schema. All of them are grouped into one yaml file, to help users understand differences and avoid repeated descriptions. Signed-off-by: Zhen Lei Link: https://lore.kernel.org/r/20200929141454.2312-11-thunder.leizhen@huawei.com Signed-off-by: Rob Herring --- .../controller/hisilicon,hi6220-sysctrl.txt | 19 --- .../controller/hisilicon,hip01-sysctrl.txt | 19 --- .../controller/hisilicon,sysctrl.txt | 25 ---- .../arm/hisilicon/controller/sysctrl.yaml | 110 ++++++++++++++++++ .../bindings/arm/hisilicon/hi3519-sysctrl.txt | 14 --- 5 files changed, 110 insertions(+), 77 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-sysctrl.txt delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip01-sysctrl.txt delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,sysctrl.txt create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/hi3519-sysctrl.txt diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-sysctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-sysctrl.txt deleted file mode 100644 index 07e318eda254..000000000000 --- a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-sysctrl.txt +++ /dev/null @@ -1,19 +0,0 @@ -Hisilicon Hi6220 system controller - -Required properties: -- compatible : "hisilicon,hi6220-sysctrl" -- reg : Register address and size -- #clock-cells: should be set to 1, many clock registers are defined - under this controller and this property must be present. - -Hisilicon designs this controller as one of the system controllers, -its main functions are the same as Hisilicon system controller, but -the register offset of some core modules are different. - -Example: - /*for Hi6220*/ - sys_ctrl: sys_ctrl@f7030000 { - compatible = "hisilicon,hi6220-sysctrl", "syscon"; - reg = <0x0 0xf7030000 0x0 0x2000>; - #clock-cells = <1>; - }; diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip01-sysctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip01-sysctrl.txt deleted file mode 100644 index db2dfdce799d..000000000000 --- a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip01-sysctrl.txt +++ /dev/null @@ -1,19 +0,0 @@ -Hisilicon HiP01 system controller - -Required properties: -- compatible : "hisilicon,hip01-sysctrl" -- reg : Register address and size - -The HiP01 system controller is mostly compatible with hisilicon -system controller,but it has some specific control registers for -HIP01 SoC family, such as slave core boot, and also some same -registers located at different offset. - -Example: - - /* for hip01-ca9x2 */ - sysctrl: system-controller@10000000 { - compatible = "hisilicon,hip01-sysctrl", "hisilicon,sysctrl"; - reg = <0x10000000 0x1000>; - reboot-offset = <0x4>; - }; diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,sysctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,sysctrl.txt deleted file mode 100644 index 963f7f1ca7a2..000000000000 --- a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,sysctrl.txt +++ /dev/null @@ -1,25 +0,0 @@ -Hisilicon system controller - -Required properties: -- compatible : "hisilicon,sysctrl" -- reg : Register address and size - -Optional properties: -- smp-offset : offset in sysctrl for notifying slave cpu booting - cpu 1, reg; - cpu 2, reg + 0x4; - cpu 3, reg + 0x8; - If reg value is not zero, cpun exit wfi and go -- resume-offset : offset in sysctrl for notifying cpu0 when resume -- reboot-offset : offset in sysctrl for system reboot - -Example: - - /* for Hi3620 */ - sysctrl: system-controller@fc802000 { - compatible = "hisilicon,sysctrl"; - reg = <0xfc802000 0x1000>; - smp-offset = <0x31c>; - resume-offset = <0x308>; - reboot-offset = <0x4>; - }; diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml new file mode 100644 index 000000000000..449140f89ddb --- /dev/null +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml @@ -0,0 +1,110 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/hisilicon/controller/sysctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Hisilicon system controller + +maintainers: + - Wei Xu + +description: | + The Hisilicon system controller is used on many Hisilicon boards, it can be + used to assist the slave core startup, reboot the system, etc. + + There are some variants of the Hisilicon system controller, such as HiP01, + Hi3519, Hi6220 system controller, each of them is mostly compatible with the + Hisilicon system controller, but some same registers located at different + offset. In addition, the HiP01 system controller has some specific control + registers for HIP01 SoC family, such as slave core boot. + + The compatible names of each system controller are as follows: + Hisilicon system controller --> hisilicon,sysctrl + HiP01 system controller --> hisilicon,hip01-sysctrl + Hi6220 system controller --> hisilicon,hi6220-sysctrl + Hi3519 system controller --> hisilicon,hi3519-sysctrl + +allOf: + - if: + properties: + compatible: + contains: + const: hisilicon,hi6220-sysctrl + then: + required: + - '#clock-cells' + +properties: + compatible: + oneOf: + - items: + - enum: + - hisilicon,sysctrl + - hisilicon,hi6220-sysctrl + - hisilicon,hi3519-sysctrl + - const: syscon + - items: + - const: hisilicon,hip01-sysctrl + - const: hisilicon,sysctrl + + reg: + maxItems: 1 + + smp-offset: + description: | + offset in sysctrl for notifying slave cpu booting + cpu 1, reg; + cpu 2, reg + 0x4; + cpu 3, reg + 0x8; + If reg value is not zero, cpun exit wfi and go + $ref: /schemas/types.yaml#/definitions/uint32 + + resume-offset: + description: offset in sysctrl for notifying cpu0 when resume + $ref: /schemas/types.yaml#/definitions/uint32 + + reboot-offset: + description: offset in sysctrl for system reboot + $ref: /schemas/types.yaml#/definitions/uint32 + + '#clock-cells': + const: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + /* Hisilicon system controller */ + system-controller@fc802000 { + compatible = "hisilicon,sysctrl", "syscon"; + reg = <0xfc802000 0x1000>; + smp-offset = <0x31c>; + resume-offset = <0x308>; + reboot-offset = <0x4>; + }; + + /* HiP01 system controller */ + system-controller@10000000 { + compatible = "hisilicon,hip01-sysctrl", "hisilicon,sysctrl"; + reg = <0x10000000 0x1000>; + reboot-offset = <0x4>; + }; + + /* Hi6220 system controller */ + system-controller@f7030000 { + compatible = "hisilicon,hi6220-sysctrl", "syscon"; + reg = <0xf7030000 0x2000>; + #clock-cells = <1>; + }; + + /* Hi3519 system controller */ + system-controller@12010000 { + compatible = "hisilicon,hi3519-sysctrl", "syscon"; + reg = <0x12010000 0x1000>; + }; +... diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hi3519-sysctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/hi3519-sysctrl.txt deleted file mode 100644 index 8defacc44dd5..000000000000 --- a/Documentation/devicetree/bindings/arm/hisilicon/hi3519-sysctrl.txt +++ /dev/null @@ -1,14 +0,0 @@ -* Hisilicon Hi3519 System Controller Block - -This bindings use the following binding: -Documentation/devicetree/bindings/mfd/syscon.yaml - -Required properties: -- compatible: "hisilicon,hi3519-sysctrl". -- reg: the register region of this block - -Examples: -sysctrl: system-controller@12010000 { - compatible = "hisilicon,hi3519-sysctrl", "syscon"; - reg = <0x12010000 0x1000>; -}; From 5b6b3e21ec4a554583a018c46d06a75d8d460bd2 Mon Sep 17 00:00:00 2001 From: Zhen Lei Date: Tue, 29 Sep 2020 22:14:48 +0800 Subject: [PATCH 375/433] dt-bindings: arm: hisilicon: convert hisilicon,cpuctrl bindings to json-schema Convert the Hisilicon CPU controller binding to DT schema format using json-schema. Signed-off-by: Zhen Lei Link: https://lore.kernel.org/r/20200929141454.2312-12-thunder.leizhen@huawei.com Signed-off-by: Rob Herring --- .../arm/hisilicon/controller/cpuctrl.yaml | 29 +++++++++++++++++++ .../controller/hisilicon,cpuctrl.txt | 8 ----- 2 files changed, 29 insertions(+), 8 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,cpuctrl.txt diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml new file mode 100644 index 000000000000..f6a314db3a59 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml @@ -0,0 +1,29 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/hisilicon/controller/cpuctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Hisilicon CPU controller + +maintainers: + - Wei Xu + +description: | + The clock registers and power registers of secondary cores are defined + in CPU controller, especially in HIX5HD2 SoC. + +properties: + compatible: + items: + - const: hisilicon,cpuctrl + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false +... diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,cpuctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,cpuctrl.txt deleted file mode 100644 index ceffac537671..000000000000 --- a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,cpuctrl.txt +++ /dev/null @@ -1,8 +0,0 @@ -Hisilicon CPU controller - -Required properties: -- compatible : "hisilicon,cpuctrl" -- reg : Register address and size - -The clock registers and power registers of secondary cores are defined -in CPU controller, especially in HIX5HD2 SoC. From 65eb73b87c0eabe2d6b16a61b948b15eb4af02af Mon Sep 17 00:00:00 2001 From: Zhen Lei Date: Tue, 29 Sep 2020 22:14:49 +0800 Subject: [PATCH 376/433] dt-bindings: arm: hisilicon: convert hisilicon,pctrl bindings to json-schema Convert the Hisilicon peripheral misc control register binding to DT schema format using json-schema. Signed-off-by: Zhen Lei Link: https://lore.kernel.org/r/20200929141454.2312-13-thunder.leizhen@huawei.com Signed-off-by: Rob Herring --- .../hisilicon/controller/hisilicon,pctrl.txt | 13 ------- .../arm/hisilicon/controller/pctrl.yaml | 34 +++++++++++++++++++ 2 files changed, 34 insertions(+), 13 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,pctrl.txt create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/pctrl.yaml diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,pctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,pctrl.txt deleted file mode 100644 index deec777bc3a8..000000000000 --- a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,pctrl.txt +++ /dev/null @@ -1,13 +0,0 @@ -PCTRL: Peripheral misc control register - -Required Properties: -- compatible: "hisilicon,pctrl" -- reg: Address and size of pctrl. - -Example: - - /* for Hi3620 */ - pctrl: pctrl@fca09000 { - compatible = "hisilicon,pctrl"; - reg = <0xfca09000 0x1000>; - }; diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/pctrl.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/pctrl.yaml new file mode 100644 index 000000000000..6d5065872809 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/pctrl.yaml @@ -0,0 +1,34 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/hisilicon/controller/pctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Peripheral misc control register + +maintainers: + - Wei Xu + +description: Peripheral misc control register + +properties: + compatible: + items: + - const: hisilicon,pctrl + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + pctrl@fca09000 { + compatible = "hisilicon,pctrl"; + reg = <0xfca09000 0x1000>; + }; +... From 1dc0041db230709caf01caa38497ded973ece87f Mon Sep 17 00:00:00 2001 From: Zhen Lei Date: Tue, 29 Sep 2020 22:14:50 +0800 Subject: [PATCH 377/433] dt-bindings: arm: hisilicon: convert hisilicon,hip04-fabric bindings to json-schema Convert the Hisilicon Fabric controller binding to DT schema format using json-schema. Signed-off-by: Zhen Lei Link: https://lore.kernel.org/r/20200929141454.2312-14-thunder.leizhen@huawei.com Signed-off-by: Rob Herring --- .../hisilicon/controller/hip04-fabric.yaml | 27 +++++++++++++++++++ .../controller/hisilicon,hip04-fabric.txt | 5 ---- 2 files changed, 27 insertions(+), 5 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hip04-fabric.yaml delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-fabric.txt diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hip04-fabric.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/hip04-fabric.yaml new file mode 100644 index 000000000000..60c516a04ad5 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hip04-fabric.yaml @@ -0,0 +1,27 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/hisilicon/controller/hip04-fabric.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Hisilicon Fabric controller + +maintainers: + - Wei Xu + +description: Hisilicon Fabric controller + +properties: + compatible: + items: + - const: hisilicon,hip04-fabric + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false +... diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-fabric.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-fabric.txt deleted file mode 100644 index 40453d02f202..000000000000 --- a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-fabric.txt +++ /dev/null @@ -1,5 +0,0 @@ -Fabric: - -Required Properties: -- compatible: "hisilicon,hip04-fabric"; -- reg: Address and size of Fabric From aeb9dd8491c2b05405ffba583272cac9b47fdc08 Mon Sep 17 00:00:00 2001 From: Zhen Lei Date: Tue, 29 Sep 2020 22:14:51 +0800 Subject: [PATCH 378/433] dt-bindings: arm: hisilicon: convert hisilicon,hip04-bootwrapper bindings to json-schema Convert the Hisilicon Bootwrapper boot method binding to DT schema format using json-schema. The property boot-method contains two groups of physical address range information: bootwrapper and relocation. The "uint32-array" type is not suitable for it, because the field "address" and "size" may occupy one or two cells respectively. Use "minItems: 1" and "maxItems: 2" to allow it can be written in "" or ", " format. Signed-off-by: Zhen Lei Link: https://lore.kernel.org/r/20200929141454.2312-15-thunder.leizhen@huawei.com Signed-off-by: Rob Herring --- .../controller/hip04-bootwrapper.yaml | 34 +++++++++++++++++++ .../hisilicon,hip04-bootwrapper.txt | 9 ----- 2 files changed, 34 insertions(+), 9 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hip04-bootwrapper.yaml delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-bootwrapper.txt diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hip04-bootwrapper.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/hip04-bootwrapper.yaml new file mode 100644 index 000000000000..7378159e61df --- /dev/null +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hip04-bootwrapper.yaml @@ -0,0 +1,34 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/hisilicon/controller/hip04-bootwrapper.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Bootwrapper boot method + +maintainers: + - Wei Xu + +description: Bootwrapper boot method (software protocol on SMP) + +properties: + compatible: + items: + - const: hisilicon,hip04-bootwrapper + + boot-method: + description: | + Address and size of boot method. + [0]: bootwrapper physical address + [1]: bootwrapper size + [2]: relocation physical address + [3]: relocation size + minItems: 1 + maxItems: 2 + +required: + - compatible + - boot-method + +additionalProperties: false +... diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-bootwrapper.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-bootwrapper.txt deleted file mode 100644 index b0d53333f4fd..000000000000 --- a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-bootwrapper.txt +++ /dev/null @@ -1,9 +0,0 @@ -Bootwrapper boot method (software protocol on SMP): - -Required Properties: -- compatible: "hisilicon,hip04-bootwrapper"; -- boot-method: Address and size of boot method. - [0]: bootwrapper physical address - [1]: bootwrapper size - [2]: relocation physical address - [3]: relocation size From 9266ff505a77bed5cf92018d53a2c165900ff912 Mon Sep 17 00:00:00 2001 From: Zhen Lei Date: Tue, 29 Sep 2020 22:14:53 +0800 Subject: [PATCH 379/433] dt-bindings: arm: hisilicon: convert hisilicon,hi3798cv200-perictrl bindings to json-schema Convert the Hisilicon Hi3798CV200 Peripheral Controller binding to DT schema format using json-schema. Signed-off-by: Zhen Lei Link: https://lore.kernel.org/r/20200929141454.2312-17-thunder.leizhen@huawei.com Signed-off-by: Rob Herring --- .../controller/hi3798cv200-perictrl.yaml | 64 +++++++++++++++++++ .../hisilicon,hi3798cv200-perictrl.txt | 21 ------ 2 files changed, 64 insertions(+), 21 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hi3798cv200-perictrl.yaml delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi3798cv200-perictrl.txt diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hi3798cv200-perictrl.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/hi3798cv200-perictrl.yaml new file mode 100644 index 000000000000..cba1937aad9a --- /dev/null +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hi3798cv200-perictrl.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/hisilicon/controller/hi3798cv200-perictrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Hisilicon Hi3798CV200 Peripheral Controller + +maintainers: + - Wei Xu + +description: | + The Hi3798CV200 Peripheral Controller controls peripherals, queries + their status, and configures some functions of peripherals. + +properties: + compatible: + items: + - const: hisilicon,hi3798cv200-perictrl + - const: syscon + - const: simple-mfd + + reg: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + ranges: true + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + - ranges + +additionalProperties: + type: object + +examples: + - | + peripheral-controller@8a20000 { + compatible = "hisilicon,hi3798cv200-perictrl", "syscon", "simple-mfd"; + reg = <0x8a20000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x8a20000 0x1000>; + + phy@850 { + compatible = "hisilicon,hi3798cv200-combphy"; + reg = <0x850 0x8>; + #phy-cells = <1>; + clocks = <&crg 42>; + resets = <&crg 0x188 4>; + assigned-clocks = <&crg 42>; + assigned-clock-rates = <100000000>; + hisilicon,fixed-mode = <4>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi3798cv200-perictrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi3798cv200-perictrl.txt deleted file mode 100644 index 0d5282f46706..000000000000 --- a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi3798cv200-perictrl.txt +++ /dev/null @@ -1,21 +0,0 @@ -Hisilicon Hi3798CV200 Peripheral Controller - -The Hi3798CV200 Peripheral Controller controls peripherals, queries -their status, and configures some functions of peripherals. - -Required properties: -- compatible: Should contain "hisilicon,hi3798cv200-perictrl", "syscon" - and "simple-mfd". -- reg: Register address and size of Peripheral Controller. -- #address-cells: Should be 1. -- #size-cells: Should be 1. - -Examples: - - perictrl: peripheral-controller@8a20000 { - compatible = "hisilicon,hi3798cv200-perictrl", "syscon", - "simple-mfd"; - reg = <0x8a20000 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - }; From 6db13e108eb695552363280221b67c20820b8710 Mon Sep 17 00:00:00 2001 From: Zhen Lei Date: Tue, 29 Sep 2020 22:14:54 +0800 Subject: [PATCH 380/433] dt-bindings: arm: hisilicon: convert LPC controller bindings to json-schema Convert the Hisilicon Hip06 SoCs implement a Low Pin Count (LPC) controller binding to DT schema format using json-schema. Signed-off-by: Zhen Lei Link: https://lore.kernel.org/r/20200929141454.2312-18-thunder.leizhen@huawei.com Signed-off-by: Rob Herring --- .../arm/hisilicon/hisilicon-low-pin-count.txt | 33 ---------- .../bindings/arm/hisilicon/low-pin-count.yaml | 61 +++++++++++++++++++ 2 files changed, 61 insertions(+), 33 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/hisilicon-low-pin-count.txt create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/low-pin-count.yaml diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon-low-pin-count.txt b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon-low-pin-count.txt deleted file mode 100644 index 10bd35f9207f..000000000000 --- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon-low-pin-count.txt +++ /dev/null @@ -1,33 +0,0 @@ -Hisilicon Hip06 Low Pin Count device - Hisilicon Hip06 SoCs implement a Low Pin Count (LPC) controller, which - provides I/O access to some legacy ISA devices. - Hip06 is based on arm64 architecture where there is no I/O space. So, the - I/O ports here are not CPU addresses, and there is no 'ranges' property in - LPC device node. - -Required properties: -- compatible: value should be as follows: - (a) "hisilicon,hip06-lpc" - (b) "hisilicon,hip07-lpc" -- #address-cells: must be 2 which stick to the ISA/EISA binding doc. -- #size-cells: must be 1 which stick to the ISA/EISA binding doc. -- reg: base memory range where the LPC register set is mapped. - -Note: - The node name before '@' must be "isa" to represent the binding stick to the - ISA/EISA binding specification. - -Example: - -isa@a01b0000 { - compatible = "hisilicon,hip06-lpc"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0x0 0xa01b0000 0x0 0x1000>; - - ipmi0: bt@e4 { - compatible = "ipmi-bt"; - device_type = "ipmi"; - reg = <0x01 0xe4 0x04>; - }; -}; diff --git a/Documentation/devicetree/bindings/arm/hisilicon/low-pin-count.yaml b/Documentation/devicetree/bindings/arm/hisilicon/low-pin-count.yaml new file mode 100644 index 000000000000..3b36e683bb15 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/hisilicon/low-pin-count.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/hisilicon/low-pin-count.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Hisilicon HiP06 Low Pin Count device + +maintainers: + - Wei Xu + +description: | + Hisilicon HiP06 SoCs implement a Low Pin Count (LPC) controller, which + provides I/O access to some legacy ISA devices. + HiP06 is based on arm64 architecture where there is no I/O space. So, the + I/O ports here are not CPU addresses, and there is no 'ranges' property in + LPC device node. + +properties: + $nodename: + pattern: '^isa@[0-9a-f]+$' + description: | + The node name before '@' must be "isa" to represent the binding stick + to the ISA/EISA binding specification. + + compatible: + enum: + - hisilicon,hip06-lpc + - hisilicon,hip07-lpc + + reg: + maxItems: 1 + + '#address-cells': + const: 2 + + '#size-cells': + const: 1 + +required: + - compatible + - reg + +additionalProperties: + type: object + +examples: + - | + isa@a01b0000 { + compatible = "hisilicon,hip06-lpc"; + #address-cells = <2>; + #size-cells = <1>; + reg = <0xa01b0000 0x1000>; + + ipmi0: bt@e4 { + compatible = "ipmi-bt"; + device_type = "ipmi"; + reg = <0x01 0xe4 0x04>; + }; + }; +... From 993dcfac64ebe71cc25cbdb59ebe9a0eba46a34b Mon Sep 17 00:00:00 2001 From: Sagar Kadam Date: Tue, 29 Sep 2020 17:48:16 +0530 Subject: [PATCH 381/433] dt-bindings: riscv: sifive-l2-cache: convert bindings to json-schema Convert the device tree bindings for the SiFive's FU540-C000 SoC's L2 Cache controller to YAML format. Signed-off-by: Sagar Kadam Link: https://lore.kernel.org/r/1601381896-29716-2-git-send-email-sagar.kadam@sifive.com Signed-off-by: Rob Herring --- .../bindings/riscv/sifive-l2-cache.txt | 51 ---------- .../bindings/riscv/sifive-l2-cache.yaml | 98 +++++++++++++++++++ 2 files changed, 98 insertions(+), 51 deletions(-) delete mode 100644 Documentation/devicetree/bindings/riscv/sifive-l2-cache.txt create mode 100644 Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml diff --git a/Documentation/devicetree/bindings/riscv/sifive-l2-cache.txt b/Documentation/devicetree/bindings/riscv/sifive-l2-cache.txt deleted file mode 100644 index 73d8f19c3bd9..000000000000 --- a/Documentation/devicetree/bindings/riscv/sifive-l2-cache.txt +++ /dev/null @@ -1,51 +0,0 @@ -SiFive L2 Cache Controller --------------------------- -The SiFive Level 2 Cache Controller is used to provide access to fast copies -of memory for masters in a Core Complex. The Level 2 Cache Controller also -acts as directory-based coherency manager. -All the properties in ePAPR/DeviceTree specification applies for this platform - -Required Properties: --------------------- -- compatible: Should be "sifive,fu540-c000-ccache" and "cache" - -- cache-block-size: Specifies the block size in bytes of the cache. - Should be 64 - -- cache-level: Should be set to 2 for a level 2 cache - -- cache-sets: Specifies the number of associativity sets of the cache. - Should be 1024 - -- cache-size: Specifies the size in bytes of the cache. Should be 2097152 - -- cache-unified: Specifies the cache is a unified cache - -- interrupts: Must contain 3 entries (DirError, DataError and DataFail signals) - -- reg: Physical base address and size of L2 cache controller registers map - -Optional Properties: --------------------- -- next-level-cache: phandle to the next level cache if present. - -- memory-region: reference to the reserved-memory for the L2 Loosely Integrated - Memory region. The reserved memory node should be defined as per the bindings - in reserved-memory.txt - - -Example: - - cache-controller@2010000 { - compatible = "sifive,fu540-c000-ccache", "cache"; - cache-block-size = <64>; - cache-level = <2>; - cache-sets = <1024>; - cache-size = <2097152>; - cache-unified; - interrupt-parent = <&plic0>; - interrupts = <1 2 3>; - reg = <0x0 0x2010000 0x0 0x1000>; - next-level-cache = <&L25 &L40 &L36>; - memory-region = <&l2_lim>; - }; diff --git a/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml b/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml new file mode 100644 index 000000000000..3f4a1939554d --- /dev/null +++ b/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml @@ -0,0 +1,98 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright (C) 2020 SiFive, Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/riscv/sifive-l2-cache.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SiFive L2 Cache Controller + +maintainers: + - Sagar Kadam + - Yash Shah + - Paul Walmsley + +description: + The SiFive Level 2 Cache Controller is used to provide access to fast copies + of memory for masters in a Core Complex. The Level 2 Cache Controller also + acts as directory-based coherency manager. + All the properties in ePAPR/DeviceTree specification applies for this platform. + +allOf: + - $ref: /schemas/cache-controller.yaml# + +select: + properties: + compatible: + items: + - enum: + - sifive,fu540-c000-ccache + + required: + - compatible + +properties: + compatible: + items: + - const: sifive,fu540-c000-ccache + - const: cache + + cache-block-size: + const: 64 + + cache-level: + const: 2 + + cache-sets: + const: 1024 + + cache-size: + const: 2097152 + + cache-unified: true + + interrupts: + description: | + Must contain entries for DirError, DataError and DataFail signals. + minItems: 3 + maxItems: 3 + + reg: + maxItems: 1 + + next-level-cache: true + + memory-region: + description: | + The reference to the reserved-memory for the L2 Loosely Integrated Memory region. + The reserved memory node should be defined as per the bindings in reserved-memory.txt. + +additionalProperties: false + +required: + - compatible + - cache-block-size + - cache-level + - cache-sets + - cache-size + - cache-unified + - interrupts + - reg + +examples: + - | + cache-controller@2010000 { + compatible = "sifive,fu540-c000-ccache", "cache"; + cache-block-size = <64>; + cache-level = <2>; + cache-sets = <1024>; + cache-size = <2097152>; + cache-unified; + reg = <0x2010000 0x1000>; + interrupt-parent = <&plic0>; + interrupts = <1>, + <2>, + <3>; + next-level-cache = <&L25>; + memory-region = <&l2_lim>; + }; From c5c553850899e2662ecf749ac21fff95d17f59a4 Mon Sep 17 00:00:00 2001 From: Lukas Bulwahn Date: Sat, 26 Sep 2020 21:03:54 +0200 Subject: [PATCH 382/433] scripts/spdxcheck.py: handle license identifiers in XML comments Commit cc9539e7884c ("media: docs: use the new SPDX header for GFDL-1.1 on *.svg files") adds SPDX-License-Identifiers enclosed in XML comments, i.e., , for svg files. Unfortunately, ./scripts/spdxcheck.py does not handle SPDX-License-Identifiers in XML comments, so it simply fails on checking these files with 'Invalid License ID: --'. Strip the XML comment ending simply by copying how it was done for comments in C. With that, ./scripts/spdxcheck.py handles the svg files properly. Signed-off-by: Lukas Bulwahn Signed-off-by: Greg Kroah-Hartman --- scripts/spdxcheck.py | 3 +++ 1 file changed, 3 insertions(+) diff --git a/scripts/spdxcheck.py b/scripts/spdxcheck.py index 6374e078a5f2..bc87200f9c7c 100755 --- a/scripts/spdxcheck.py +++ b/scripts/spdxcheck.py @@ -180,6 +180,9 @@ class id_parser(object): # Remove trailing comment closure if line.strip().endswith('*/'): expr = expr.rstrip('*/').strip() + # Remove trailing xml comment closure + if line.strip().endswith('-->'): + expr = expr.rstrip('-->').strip() # Special case for SH magic boot code files if line.startswith('LIST \"'): expr = expr.rstrip('\"').strip() From 2efc459d06f1630001e3984854848a5647086232 Mon Sep 17 00:00:00 2001 From: Joe Perches Date: Wed, 16 Sep 2020 13:40:38 -0700 Subject: [PATCH 383/433] sysfs: Add sysfs_emit and sysfs_emit_at to format sysfs output Output defects can exist in sysfs content using sprintf and snprintf. sprintf does not know the PAGE_SIZE maximum of the temporary buffer used for outputting sysfs content and it's possible to overrun the PAGE_SIZE buffer length. Add a generic sysfs_emit function that knows that the size of the temporary buffer and ensures that no overrun is done. Add a generic sysfs_emit_at function that can be used in multiple call situations that also ensures that no overrun is done. Validate the output buffer argument to be page aligned. Validate the offset len argument to be within the PAGE_SIZE buf. Signed-off-by: Joe Perches Link: https://lore.kernel.org/r/884235202216d464d61ee975f7465332c86f76b2.1600285923.git.joe@perches.com Signed-off-by: Greg Kroah-Hartman --- Documentation/filesystems/sysfs.rst | 8 ++--- fs/sysfs/file.c | 55 +++++++++++++++++++++++++++++ include/linux/sysfs.h | 15 ++++++++ 3 files changed, 73 insertions(+), 5 deletions(-) diff --git a/Documentation/filesystems/sysfs.rst b/Documentation/filesystems/sysfs.rst index ab0f7795792b..d44249050f4a 100644 --- a/Documentation/filesystems/sysfs.rst +++ b/Documentation/filesystems/sysfs.rst @@ -242,12 +242,10 @@ Other notes: is 4096. - show() methods should return the number of bytes printed into the - buffer. This is the return value of scnprintf(). + buffer. -- show() must not use snprintf() when formatting the value to be - returned to user space. If you can guarantee that an overflow - will never happen you can use sprintf() otherwise you must use - scnprintf(). +- show() should only use sysfs_emit() or sysfs_emit_at() when formatting + the value to be returned to user space. - store() should return the number of bytes used from the buffer. If the entire buffer has been used, just return the count argument. diff --git a/fs/sysfs/file.c b/fs/sysfs/file.c index eb6897ab78e7..96d0da65e088 100644 --- a/fs/sysfs/file.c +++ b/fs/sysfs/file.c @@ -15,6 +15,7 @@ #include #include #include +#include #include "sysfs.h" @@ -707,3 +708,57 @@ int sysfs_change_owner(struct kobject *kobj, kuid_t kuid, kgid_t kgid) return 0; } EXPORT_SYMBOL_GPL(sysfs_change_owner); + +/** + * sysfs_emit - scnprintf equivalent, aware of PAGE_SIZE buffer. + * @buf: start of PAGE_SIZE buffer. + * @fmt: format + * @...: optional arguments to @format + * + * + * Returns number of characters written to @buf. + */ +int sysfs_emit(char *buf, const char *fmt, ...) +{ + va_list args; + int len; + + if (WARN(!buf || offset_in_page(buf), + "invalid sysfs_emit: buf:%p\n", buf)) + return 0; + + va_start(args, fmt); + len = vscnprintf(buf, PAGE_SIZE, fmt, args); + va_end(args); + + return len; +} +EXPORT_SYMBOL_GPL(sysfs_emit); + +/** + * sysfs_emit_at - scnprintf equivalent, aware of PAGE_SIZE buffer. + * @buf: start of PAGE_SIZE buffer. + * @at: offset in @buf to start write in bytes + * @at must be >= 0 && < PAGE_SIZE + * @fmt: format + * @...: optional arguments to @fmt + * + * + * Returns number of characters written starting at &@buf[@at]. + */ +int sysfs_emit_at(char *buf, int at, const char *fmt, ...) +{ + va_list args; + int len; + + if (WARN(!buf || offset_in_page(buf) || at < 0 || at >= PAGE_SIZE, + "invalid sysfs_emit_at: buf:%p at:%d\n", buf, at)) + return 0; + + va_start(args, fmt); + len = vscnprintf(buf + at, PAGE_SIZE - at, fmt, args); + va_end(args); + + return len; +} +EXPORT_SYMBOL_GPL(sysfs_emit_at); diff --git a/include/linux/sysfs.h b/include/linux/sysfs.h index 34e84122f635..2caa34c1ca1a 100644 --- a/include/linux/sysfs.h +++ b/include/linux/sysfs.h @@ -329,6 +329,10 @@ int sysfs_groups_change_owner(struct kobject *kobj, int sysfs_group_change_owner(struct kobject *kobj, const struct attribute_group *groups, kuid_t kuid, kgid_t kgid); +__printf(2, 3) +int sysfs_emit(char *buf, const char *fmt, ...); +__printf(3, 4) +int sysfs_emit_at(char *buf, int at, const char *fmt, ...); #else /* CONFIG_SYSFS */ @@ -576,6 +580,17 @@ static inline int sysfs_group_change_owner(struct kobject *kobj, return 0; } +__printf(2, 3) +static inline int sysfs_emit(char *buf, const char *fmt, ...) +{ + return 0; +} + +__printf(3, 4) +static inline int sysfs_emit_at(char *buf, int at, const char *fmt, ...) +{ + return 0; +} #endif /* CONFIG_SYSFS */ static inline int __must_check sysfs_create_file(struct kobject *kobj, From aa838896d87af561a33ecefea1caa4c15a68bc47 Mon Sep 17 00:00:00 2001 From: Joe Perches Date: Wed, 16 Sep 2020 13:40:39 -0700 Subject: [PATCH 384/433] drivers core: Use sysfs_emit and sysfs_emit_at for show(device *...) functions Convert the various sprintf fmaily calls in sysfs device show functions to sysfs_emit and sysfs_emit_at for PAGE_SIZE buffer safety. Done with: $ spatch -sp-file sysfs_emit_dev.cocci --in-place --max-width=80 . And cocci script: $ cat sysfs_emit_dev.cocci @@ identifier d_show; identifier dev, attr, buf; @@ ssize_t d_show(struct device *dev, struct device_attribute *attr, char *buf) { <... return - sprintf(buf, + sysfs_emit(buf, ...); ...> } @@ identifier d_show; identifier dev, attr, buf; @@ ssize_t d_show(struct device *dev, struct device_attribute *attr, char *buf) { <... return - snprintf(buf, PAGE_SIZE, + sysfs_emit(buf, ...); ...> } @@ identifier d_show; identifier dev, attr, buf; @@ ssize_t d_show(struct device *dev, struct device_attribute *attr, char *buf) { <... return - scnprintf(buf, PAGE_SIZE, + sysfs_emit(buf, ...); ...> } @@ identifier d_show; identifier dev, attr, buf; expression chr; @@ ssize_t d_show(struct device *dev, struct device_attribute *attr, char *buf) { <... return - strcpy(buf, chr); + sysfs_emit(buf, chr); ...> } @@ identifier d_show; identifier dev, attr, buf; identifier len; @@ ssize_t d_show(struct device *dev, struct device_attribute *attr, char *buf) { <... len = - sprintf(buf, + sysfs_emit(buf, ...); ...> return len; } @@ identifier d_show; identifier dev, attr, buf; identifier len; @@ ssize_t d_show(struct device *dev, struct device_attribute *attr, char *buf) { <... len = - snprintf(buf, PAGE_SIZE, + sysfs_emit(buf, ...); ...> return len; } @@ identifier d_show; identifier dev, attr, buf; identifier len; @@ ssize_t d_show(struct device *dev, struct device_attribute *attr, char *buf) { <... len = - scnprintf(buf, PAGE_SIZE, + sysfs_emit(buf, ...); ...> return len; } @@ identifier d_show; identifier dev, attr, buf; identifier len; @@ ssize_t d_show(struct device *dev, struct device_attribute *attr, char *buf) { <... - len += scnprintf(buf + len, PAGE_SIZE - len, + len += sysfs_emit_at(buf, len, ...); ...> return len; } @@ identifier d_show; identifier dev, attr, buf; expression chr; @@ ssize_t d_show(struct device *dev, struct device_attribute *attr, char *buf) { ... - strcpy(buf, chr); - return strlen(buf); + return sysfs_emit(buf, chr); } Signed-off-by: Joe Perches Link: https://lore.kernel.org/r/3d033c33056d88bbe34d4ddb62afd05ee166ab9a.1600285923.git.joe@perches.com Signed-off-by: Greg Kroah-Hartman --- drivers/base/arch_topology.c | 2 +- drivers/base/cacheinfo.c | 18 ++++----- drivers/base/core.c | 19 +++++----- drivers/base/cpu.c | 32 ++++++++-------- drivers/base/dd.c | 2 +- drivers/base/firmware_loader/fallback.c | 2 +- drivers/base/memory.c | 24 ++++++------ drivers/base/node.c | 28 +++++++------- drivers/base/platform.c | 4 +- drivers/base/power/sysfs.c | 50 ++++++++++++------------- drivers/base/power/wakeup_stats.c | 12 +++--- drivers/base/soc.c | 10 ++--- 12 files changed, 102 insertions(+), 101 deletions(-) diff --git a/drivers/base/arch_topology.c b/drivers/base/arch_topology.c index 75f72d684294..744d4618db33 100644 --- a/drivers/base/arch_topology.c +++ b/drivers/base/arch_topology.c @@ -71,7 +71,7 @@ static ssize_t cpu_capacity_show(struct device *dev, { struct cpu *cpu = container_of(dev, struct cpu, dev); - return sprintf(buf, "%lu\n", topology_get_cpu_scale(cpu->dev.id)); + return sysfs_emit(buf, "%lu\n", topology_get_cpu_scale(cpu->dev.id)); } static void update_topology_flags_workfn(struct work_struct *work); diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c index 8d553c92cd32..6a8c2b5881be 100644 --- a/drivers/base/cacheinfo.c +++ b/drivers/base/cacheinfo.c @@ -377,7 +377,7 @@ static ssize_t size_show(struct device *dev, { struct cacheinfo *this_leaf = dev_get_drvdata(dev); - return sprintf(buf, "%uK\n", this_leaf->size >> 10); + return sysfs_emit(buf, "%uK\n", this_leaf->size >> 10); } static ssize_t shared_cpumap_show_func(struct device *dev, bool list, char *buf) @@ -407,11 +407,11 @@ static ssize_t type_show(struct device *dev, switch (this_leaf->type) { case CACHE_TYPE_DATA: - return sprintf(buf, "Data\n"); + return sysfs_emit(buf, "Data\n"); case CACHE_TYPE_INST: - return sprintf(buf, "Instruction\n"); + return sysfs_emit(buf, "Instruction\n"); case CACHE_TYPE_UNIFIED: - return sprintf(buf, "Unified\n"); + return sysfs_emit(buf, "Unified\n"); default: return -EINVAL; } @@ -425,11 +425,11 @@ static ssize_t allocation_policy_show(struct device *dev, int n = 0; if ((ci_attr & CACHE_READ_ALLOCATE) && (ci_attr & CACHE_WRITE_ALLOCATE)) - n = sprintf(buf, "ReadWriteAllocate\n"); + n = sysfs_emit(buf, "ReadWriteAllocate\n"); else if (ci_attr & CACHE_READ_ALLOCATE) - n = sprintf(buf, "ReadAllocate\n"); + n = sysfs_emit(buf, "ReadAllocate\n"); else if (ci_attr & CACHE_WRITE_ALLOCATE) - n = sprintf(buf, "WriteAllocate\n"); + n = sysfs_emit(buf, "WriteAllocate\n"); return n; } @@ -441,9 +441,9 @@ static ssize_t write_policy_show(struct device *dev, int n = 0; if (ci_attr & CACHE_WRITE_THROUGH) - n = sprintf(buf, "WriteThrough\n"); + n = sysfs_emit(buf, "WriteThrough\n"); else if (ci_attr & CACHE_WRITE_BACK) - n = sprintf(buf, "WriteBack\n"); + n = sysfs_emit(buf, "WriteBack\n"); return n; } diff --git a/drivers/base/core.c b/drivers/base/core.c index b79783454293..b1f8762ac451 100644 --- a/drivers/base/core.c +++ b/drivers/base/core.c @@ -260,7 +260,7 @@ static ssize_t status_show(struct device *dev, default: status = "unknown"; break; } - return sprintf(buf, "%s\n", status); + return sysfs_emit(buf, "%s\n", status); } static DEVICE_ATTR_RO(status); @@ -277,7 +277,7 @@ static ssize_t auto_remove_on_show(struct device *dev, else str = "never"; - return sprintf(buf, "%s\n", str); + return sysfs_emit(buf, "%s\n", str); } static DEVICE_ATTR_RO(auto_remove_on); @@ -286,7 +286,7 @@ static ssize_t runtime_pm_show(struct device *dev, { struct device_link *link = to_devlink(dev); - return sprintf(buf, "%d\n", !!(link->flags & DL_FLAG_PM_RUNTIME)); + return sysfs_emit(buf, "%d\n", !!(link->flags & DL_FLAG_PM_RUNTIME)); } static DEVICE_ATTR_RO(runtime_pm); @@ -295,7 +295,8 @@ static ssize_t sync_state_only_show(struct device *dev, { struct device_link *link = to_devlink(dev); - return sprintf(buf, "%d\n", !!(link->flags & DL_FLAG_SYNC_STATE_ONLY)); + return sysfs_emit(buf, "%d\n", + !!(link->flags & DL_FLAG_SYNC_STATE_ONLY)); } static DEVICE_ATTR_RO(sync_state_only); @@ -1060,7 +1061,7 @@ static ssize_t waiting_for_supplier_show(struct device *dev, && dev->links.need_for_probe; mutex_unlock(&wfs_lock); device_unlock(dev); - return sprintf(buf, "%u\n", val); + return sysfs_emit(buf, "%u\n", val); } static DEVICE_ATTR_RO(waiting_for_supplier); @@ -1710,7 +1711,7 @@ ssize_t device_show_ulong(struct device *dev, char *buf) { struct dev_ext_attribute *ea = to_ext_attr(attr); - return snprintf(buf, PAGE_SIZE, "%lx\n", *(unsigned long *)(ea->var)); + return sysfs_emit(buf, "%lx\n", *(unsigned long *)(ea->var)); } EXPORT_SYMBOL_GPL(device_show_ulong); @@ -1740,7 +1741,7 @@ ssize_t device_show_int(struct device *dev, { struct dev_ext_attribute *ea = to_ext_attr(attr); - return snprintf(buf, PAGE_SIZE, "%d\n", *(int *)(ea->var)); + return sysfs_emit(buf, "%d\n", *(int *)(ea->var)); } EXPORT_SYMBOL_GPL(device_show_int); @@ -1761,7 +1762,7 @@ ssize_t device_show_bool(struct device *dev, struct device_attribute *attr, { struct dev_ext_attribute *ea = to_ext_attr(attr); - return snprintf(buf, PAGE_SIZE, "%d\n", *(bool *)(ea->var)); + return sysfs_emit(buf, "%d\n", *(bool *)(ea->var)); } EXPORT_SYMBOL_GPL(device_show_bool); @@ -1993,7 +1994,7 @@ static ssize_t online_show(struct device *dev, struct device_attribute *attr, device_lock(dev); val = !dev->offline; device_unlock(dev); - return sprintf(buf, "%u\n", val); + return sysfs_emit(buf, "%u\n", val); } static ssize_t online_store(struct device *dev, struct device_attribute *attr, diff --git a/drivers/base/cpu.c b/drivers/base/cpu.c index d2136ab9b14a..232f8146a8c4 100644 --- a/drivers/base/cpu.c +++ b/drivers/base/cpu.c @@ -156,7 +156,7 @@ static ssize_t show_crash_notes(struct device *dev, struct device_attribute *att * operation should be safe. No locking required. */ addr = per_cpu_ptr_to_phys(per_cpu_ptr(crash_notes, cpunum)); - rc = sprintf(buf, "%Lx\n", addr); + rc = sysfs_emit(buf, "%Lx\n", addr); return rc; } static DEVICE_ATTR(crash_notes, 0400, show_crash_notes, NULL); @@ -167,7 +167,7 @@ static ssize_t show_crash_notes_size(struct device *dev, { ssize_t rc; - rc = sprintf(buf, "%zu\n", sizeof(note_buf_t)); + rc = sysfs_emit(buf, "%zu\n", sizeof(note_buf_t)); return rc; } static DEVICE_ATTR(crash_notes_size, 0400, show_crash_notes_size, NULL); @@ -231,7 +231,7 @@ static struct cpu_attr cpu_attrs[] = { static ssize_t print_cpus_kernel_max(struct device *dev, struct device_attribute *attr, char *buf) { - return sprintf(buf, "%d\n", NR_CPUS - 1); + return sysfs_emit(buf, "%d\n", NR_CPUS - 1); } static DEVICE_ATTR(kernel_max, 0444, print_cpus_kernel_max, NULL); @@ -279,7 +279,7 @@ static ssize_t print_cpus_isolated(struct device *dev, cpumask_andnot(isolated, cpu_possible_mask, housekeeping_cpumask(HK_FLAG_DOMAIN)); - n = sprintf(buf, "%*pbl\n", cpumask_pr_args(isolated)); + n = sysfs_emit(buf, "%*pbl\n", cpumask_pr_args(isolated)); free_cpumask_var(isolated); @@ -291,7 +291,7 @@ static DEVICE_ATTR(isolated, 0444, print_cpus_isolated, NULL); static ssize_t print_cpus_nohz_full(struct device *dev, struct device_attribute *attr, char *buf) { - return sprintf(buf, "%*pbl\n", cpumask_pr_args(tick_nohz_full_mask)); + return sysfs_emit(buf, "%*pbl\n", cpumask_pr_args(tick_nohz_full_mask)); } static DEVICE_ATTR(nohz_full, 0444, print_cpus_nohz_full, NULL); #endif @@ -323,8 +323,8 @@ static ssize_t print_cpu_modalias(struct device *dev, ssize_t n; u32 i; - n = sprintf(buf, "cpu:type:" CPU_FEATURE_TYPEFMT ":feature:", - CPU_FEATURE_TYPEVAL); + n = sysfs_emit(buf, "cpu:type:" CPU_FEATURE_TYPEFMT ":feature:", + CPU_FEATURE_TYPEVAL); for (i = 0; i < MAX_CPU_FEATURES; i++) if (cpu_have_feature(i)) { @@ -516,56 +516,56 @@ static void __init cpu_dev_register_generic(void) ssize_t __weak cpu_show_meltdown(struct device *dev, struct device_attribute *attr, char *buf) { - return sprintf(buf, "Not affected\n"); + return sysfs_emit(buf, "Not affected\n"); } ssize_t __weak cpu_show_spectre_v1(struct device *dev, struct device_attribute *attr, char *buf) { - return sprintf(buf, "Not affected\n"); + return sysfs_emit(buf, "Not affected\n"); } ssize_t __weak cpu_show_spectre_v2(struct device *dev, struct device_attribute *attr, char *buf) { - return sprintf(buf, "Not affected\n"); + return sysfs_emit(buf, "Not affected\n"); } ssize_t __weak cpu_show_spec_store_bypass(struct device *dev, struct device_attribute *attr, char *buf) { - return sprintf(buf, "Not affected\n"); + return sysfs_emit(buf, "Not affected\n"); } ssize_t __weak cpu_show_l1tf(struct device *dev, struct device_attribute *attr, char *buf) { - return sprintf(buf, "Not affected\n"); + return sysfs_emit(buf, "Not affected\n"); } ssize_t __weak cpu_show_mds(struct device *dev, struct device_attribute *attr, char *buf) { - return sprintf(buf, "Not affected\n"); + return sysfs_emit(buf, "Not affected\n"); } ssize_t __weak cpu_show_tsx_async_abort(struct device *dev, struct device_attribute *attr, char *buf) { - return sprintf(buf, "Not affected\n"); + return sysfs_emit(buf, "Not affected\n"); } ssize_t __weak cpu_show_itlb_multihit(struct device *dev, struct device_attribute *attr, char *buf) { - return sprintf(buf, "Not affected\n"); + return sysfs_emit(buf, "Not affected\n"); } ssize_t __weak cpu_show_srbds(struct device *dev, struct device_attribute *attr, char *buf) { - return sprintf(buf, "Not affected\n"); + return sysfs_emit(buf, "Not affected\n"); } static DEVICE_ATTR(meltdown, 0444, cpu_show_meltdown, NULL); diff --git a/drivers/base/dd.c b/drivers/base/dd.c index 6e7319ca5bde..123a1c3e9f18 100644 --- a/drivers/base/dd.c +++ b/drivers/base/dd.c @@ -486,7 +486,7 @@ static ssize_t state_synced_show(struct device *dev, device_lock(dev); val = dev->state_synced; device_unlock(dev); - return sprintf(buf, "%u\n", val); + return sysfs_emit(buf, "%u\n", val); } static DEVICE_ATTR_RO(state_synced); diff --git a/drivers/base/firmware_loader/fallback.c b/drivers/base/firmware_loader/fallback.c index 283ca2de76d4..7e9598a1577a 100644 --- a/drivers/base/firmware_loader/fallback.c +++ b/drivers/base/firmware_loader/fallback.c @@ -219,7 +219,7 @@ static ssize_t firmware_loading_show(struct device *dev, loading = fw_sysfs_loading(fw_sysfs->fw_priv); mutex_unlock(&fw_lock); - return sprintf(buf, "%d\n", loading); + return sysfs_emit(buf, "%d\n", loading); } /** diff --git a/drivers/base/memory.c b/drivers/base/memory.c index 4db3c660de83..2fdab1ea036b 100644 --- a/drivers/base/memory.c +++ b/drivers/base/memory.c @@ -119,7 +119,7 @@ static ssize_t phys_index_show(struct device *dev, unsigned long phys_index; phys_index = mem->start_section_nr / sections_per_block; - return sprintf(buf, "%08lx\n", phys_index); + return sysfs_emit(buf, "%08lx\n", phys_index); } /* @@ -129,7 +129,7 @@ static ssize_t phys_index_show(struct device *dev, static ssize_t removable_show(struct device *dev, struct device_attribute *attr, char *buf) { - return sprintf(buf, "%d\n", (int)IS_ENABLED(CONFIG_MEMORY_HOTREMOVE)); + return sysfs_emit(buf, "%d\n", (int)IS_ENABLED(CONFIG_MEMORY_HOTREMOVE)); } /* @@ -147,17 +147,17 @@ static ssize_t state_show(struct device *dev, struct device_attribute *attr, */ switch (mem->state) { case MEM_ONLINE: - len = sprintf(buf, "online\n"); + len = sysfs_emit(buf, "online\n"); break; case MEM_OFFLINE: - len = sprintf(buf, "offline\n"); + len = sysfs_emit(buf, "offline\n"); break; case MEM_GOING_OFFLINE: - len = sprintf(buf, "going-offline\n"); + len = sysfs_emit(buf, "going-offline\n"); break; default: - len = sprintf(buf, "ERROR-UNKNOWN-%ld\n", - mem->state); + len = sysfs_emit(buf, "ERROR-UNKNOWN-%ld\n", + mem->state); WARN_ON(1); break; } @@ -303,7 +303,7 @@ static ssize_t phys_device_show(struct device *dev, struct device_attribute *attr, char *buf) { struct memory_block *mem = to_memory_block(dev); - return sprintf(buf, "%d\n", mem->phys_device); + return sysfs_emit(buf, "%d\n", mem->phys_device); } #ifdef CONFIG_MEMORY_HOTREMOVE @@ -341,7 +341,7 @@ static ssize_t valid_zones_show(struct device *dev, default_zone = test_pages_in_a_zone(start_pfn, start_pfn + nr_pages); if (!default_zone) - return sprintf(buf, "none\n"); + return sysfs_emit(buf, "none\n"); strcat(buf, default_zone->name); goto out; } @@ -374,7 +374,7 @@ static DEVICE_ATTR_RO(removable); static ssize_t block_size_bytes_show(struct device *dev, struct device_attribute *attr, char *buf) { - return sprintf(buf, "%lx\n", memory_block_size_bytes()); + return sysfs_emit(buf, "%lx\n", memory_block_size_bytes()); } static DEVICE_ATTR_RO(block_size_bytes); @@ -386,8 +386,8 @@ static DEVICE_ATTR_RO(block_size_bytes); static ssize_t auto_online_blocks_show(struct device *dev, struct device_attribute *attr, char *buf) { - return sprintf(buf, "%s\n", - online_type_to_str[memhp_default_online_type]); + return sysfs_emit(buf, "%s\n", + online_type_to_str[memhp_default_online_type]); } static ssize_t auto_online_blocks_store(struct device *dev, diff --git a/drivers/base/node.c b/drivers/base/node.c index 508b80f6329b..60abdb27137b 100644 --- a/drivers/base/node.c +++ b/drivers/base/node.c @@ -370,7 +370,7 @@ static ssize_t node_read_meminfo(struct device *dev, si_meminfo_node(&i, nid); sreclaimable = node_page_state_pages(pgdat, NR_SLAB_RECLAIMABLE_B); sunreclaimable = node_page_state_pages(pgdat, NR_SLAB_UNRECLAIMABLE_B); - n = sprintf(buf, + n = sysfs_emit(buf, "Node %d MemTotal: %8lu kB\n" "Node %d MemFree: %8lu kB\n" "Node %d MemUsed: %8lu kB\n" @@ -477,19 +477,19 @@ static DEVICE_ATTR(meminfo, S_IRUGO, node_read_meminfo, NULL); static ssize_t node_read_numastat(struct device *dev, struct device_attribute *attr, char *buf) { - return sprintf(buf, - "numa_hit %lu\n" - "numa_miss %lu\n" - "numa_foreign %lu\n" - "interleave_hit %lu\n" - "local_node %lu\n" - "other_node %lu\n", - sum_zone_numa_state(dev->id, NUMA_HIT), - sum_zone_numa_state(dev->id, NUMA_MISS), - sum_zone_numa_state(dev->id, NUMA_FOREIGN), - sum_zone_numa_state(dev->id, NUMA_INTERLEAVE_HIT), - sum_zone_numa_state(dev->id, NUMA_LOCAL), - sum_zone_numa_state(dev->id, NUMA_OTHER)); + return sysfs_emit(buf, + "numa_hit %lu\n" + "numa_miss %lu\n" + "numa_foreign %lu\n" + "interleave_hit %lu\n" + "local_node %lu\n" + "other_node %lu\n", + sum_zone_numa_state(dev->id, NUMA_HIT), + sum_zone_numa_state(dev->id, NUMA_MISS), + sum_zone_numa_state(dev->id, NUMA_FOREIGN), + sum_zone_numa_state(dev->id, NUMA_INTERLEAVE_HIT), + sum_zone_numa_state(dev->id, NUMA_LOCAL), + sum_zone_numa_state(dev->id, NUMA_OTHER)); } static DEVICE_ATTR(numastat, S_IRUGO, node_read_numastat, NULL); diff --git a/drivers/base/platform.c b/drivers/base/platform.c index d90d92e63903..f0f8cfcc3621 100644 --- a/drivers/base/platform.c +++ b/drivers/base/platform.c @@ -1084,7 +1084,7 @@ static ssize_t driver_override_show(struct device *dev, ssize_t len; device_lock(dev); - len = sprintf(buf, "%s\n", pdev->driver_override); + len = sysfs_emit(buf, "%s\n", pdev->driver_override); device_unlock(dev); return len; } @@ -1093,7 +1093,7 @@ static DEVICE_ATTR_RW(driver_override); static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr, char *buf) { - return sprintf(buf, "%d\n", dev_to_node(dev)); + return sysfs_emit(buf, "%d\n", dev_to_node(dev)); } static DEVICE_ATTR_RO(numa_node); diff --git a/drivers/base/power/sysfs.c b/drivers/base/power/sysfs.c index c7b24812523c..4276b792d0aa 100644 --- a/drivers/base/power/sysfs.c +++ b/drivers/base/power/sysfs.c @@ -101,7 +101,7 @@ static const char ctrl_on[] = "on"; static ssize_t control_show(struct device *dev, struct device_attribute *attr, char *buf) { - return sprintf(buf, "%s\n", + return sysfs_emit(buf, "%s\n", dev->power.runtime_auto ? ctrl_auto : ctrl_on); } @@ -127,7 +127,7 @@ static ssize_t runtime_active_time_show(struct device *dev, int ret; u64 tmp = pm_runtime_active_time(dev); do_div(tmp, NSEC_PER_MSEC); - ret = sprintf(buf, "%llu\n", tmp); + ret = sysfs_emit(buf, "%llu\n", tmp); return ret; } @@ -139,7 +139,7 @@ static ssize_t runtime_suspended_time_show(struct device *dev, int ret; u64 tmp = pm_runtime_suspended_time(dev); do_div(tmp, NSEC_PER_MSEC); - ret = sprintf(buf, "%llu\n", tmp); + ret = sysfs_emit(buf, "%llu\n", tmp); return ret; } @@ -172,7 +172,7 @@ static ssize_t runtime_status_show(struct device *dev, return -EIO; } } - return sprintf(buf, p); + return sysfs_emit(buf, p); } static DEVICE_ATTR_RO(runtime_status); @@ -182,7 +182,7 @@ static ssize_t autosuspend_delay_ms_show(struct device *dev, { if (!dev->power.use_autosuspend) return -EIO; - return sprintf(buf, "%d\n", dev->power.autosuspend_delay); + return sysfs_emit(buf, "%d\n", dev->power.autosuspend_delay); } static ssize_t autosuspend_delay_ms_store(struct device *dev, @@ -211,11 +211,11 @@ static ssize_t pm_qos_resume_latency_us_show(struct device *dev, s32 value = dev_pm_qos_requested_resume_latency(dev); if (value == 0) - return sprintf(buf, "n/a\n"); + return sysfs_emit(buf, "n/a\n"); if (value == PM_QOS_RESUME_LATENCY_NO_CONSTRAINT) value = 0; - return sprintf(buf, "%d\n", value); + return sysfs_emit(buf, "%d\n", value); } static ssize_t pm_qos_resume_latency_us_store(struct device *dev, @@ -255,11 +255,11 @@ static ssize_t pm_qos_latency_tolerance_us_show(struct device *dev, s32 value = dev_pm_qos_get_user_latency_tolerance(dev); if (value < 0) - return sprintf(buf, "auto\n"); + return sysfs_emit(buf, "auto\n"); if (value == PM_QOS_LATENCY_ANY) - return sprintf(buf, "any\n"); + return sysfs_emit(buf, "any\n"); - return sprintf(buf, "%d\n", value); + return sysfs_emit(buf, "%d\n", value); } static ssize_t pm_qos_latency_tolerance_us_store(struct device *dev, @@ -291,8 +291,8 @@ static ssize_t pm_qos_no_power_off_show(struct device *dev, struct device_attribute *attr, char *buf) { - return sprintf(buf, "%d\n", !!(dev_pm_qos_requested_flags(dev) - & PM_QOS_FLAG_NO_POWER_OFF)); + return sysfs_emit(buf, "%d\n", !!(dev_pm_qos_requested_flags(dev) + & PM_QOS_FLAG_NO_POWER_OFF)); } static ssize_t pm_qos_no_power_off_store(struct device *dev, @@ -320,9 +320,9 @@ static const char _disabled[] = "disabled"; static ssize_t wakeup_show(struct device *dev, struct device_attribute *attr, char *buf) { - return sprintf(buf, "%s\n", device_can_wakeup(dev) - ? (device_may_wakeup(dev) ? _enabled : _disabled) - : ""); + return sysfs_emit(buf, "%s\n", device_can_wakeup(dev) + ? (device_may_wakeup(dev) ? _enabled : _disabled) + : ""); } static ssize_t wakeup_store(struct device *dev, struct device_attribute *attr, @@ -522,7 +522,7 @@ static inline int dpm_sysfs_wakeup_change_owner(struct device *dev, kuid_t kuid, static ssize_t runtime_usage_show(struct device *dev, struct device_attribute *attr, char *buf) { - return sprintf(buf, "%d\n", atomic_read(&dev->power.usage_count)); + return sysfs_emit(buf, "%d\n", atomic_read(&dev->power.usage_count)); } static DEVICE_ATTR_RO(runtime_usage); @@ -530,8 +530,8 @@ static ssize_t runtime_active_kids_show(struct device *dev, struct device_attribute *attr, char *buf) { - return sprintf(buf, "%d\n", dev->power.ignore_children ? - 0 : atomic_read(&dev->power.child_count)); + return sysfs_emit(buf, "%d\n", dev->power.ignore_children ? + 0 : atomic_read(&dev->power.child_count)); } static DEVICE_ATTR_RO(runtime_active_kids); @@ -539,12 +539,12 @@ static ssize_t runtime_enabled_show(struct device *dev, struct device_attribute *attr, char *buf) { if (dev->power.disable_depth && (dev->power.runtime_auto == false)) - return sprintf(buf, "disabled & forbidden\n"); + return sysfs_emit(buf, "disabled & forbidden\n"); if (dev->power.disable_depth) - return sprintf(buf, "disabled\n"); + return sysfs_emit(buf, "disabled\n"); if (dev->power.runtime_auto == false) - return sprintf(buf, "forbidden\n"); - return sprintf(buf, "enabled\n"); + return sysfs_emit(buf, "forbidden\n"); + return sysfs_emit(buf, "enabled\n"); } static DEVICE_ATTR_RO(runtime_enabled); @@ -552,9 +552,9 @@ static DEVICE_ATTR_RO(runtime_enabled); static ssize_t async_show(struct device *dev, struct device_attribute *attr, char *buf) { - return sprintf(buf, "%s\n", - device_async_suspend_enabled(dev) ? - _enabled : _disabled); + return sysfs_emit(buf, "%s\n", + device_async_suspend_enabled(dev) ? + _enabled : _disabled); } static ssize_t async_store(struct device *dev, struct device_attribute *attr, diff --git a/drivers/base/power/wakeup_stats.c b/drivers/base/power/wakeup_stats.c index c7734914d914..5568e25d7c9c 100644 --- a/drivers/base/power/wakeup_stats.c +++ b/drivers/base/power/wakeup_stats.c @@ -42,7 +42,7 @@ static ssize_t active_time_ms_show(struct device *dev, ktime_t active_time = ws->active ? ktime_sub(ktime_get(), ws->last_time) : 0; - return sprintf(buf, "%lld\n", ktime_to_ms(active_time)); + return sysfs_emit(buf, "%lld\n", ktime_to_ms(active_time)); } static DEVICE_ATTR_RO(active_time_ms); @@ -57,7 +57,7 @@ static ssize_t total_time_ms_show(struct device *dev, active_time = ktime_sub(ktime_get(), ws->last_time); total_time = ktime_add(total_time, active_time); } - return sprintf(buf, "%lld\n", ktime_to_ms(total_time)); + return sysfs_emit(buf, "%lld\n", ktime_to_ms(total_time)); } static DEVICE_ATTR_RO(total_time_ms); @@ -73,7 +73,7 @@ static ssize_t max_time_ms_show(struct device *dev, if (active_time > max_time) max_time = active_time; } - return sprintf(buf, "%lld\n", ktime_to_ms(max_time)); + return sysfs_emit(buf, "%lld\n", ktime_to_ms(max_time)); } static DEVICE_ATTR_RO(max_time_ms); @@ -82,7 +82,7 @@ static ssize_t last_change_ms_show(struct device *dev, { struct wakeup_source *ws = dev_get_drvdata(dev); - return sprintf(buf, "%lld\n", ktime_to_ms(ws->last_time)); + return sysfs_emit(buf, "%lld\n", ktime_to_ms(ws->last_time)); } static DEVICE_ATTR_RO(last_change_ms); @@ -91,7 +91,7 @@ static ssize_t name_show(struct device *dev, struct device_attribute *attr, { struct wakeup_source *ws = dev_get_drvdata(dev); - return sprintf(buf, "%s\n", ws->name); + return sysfs_emit(buf, "%s\n", ws->name); } static DEVICE_ATTR_RO(name); @@ -106,7 +106,7 @@ static ssize_t prevent_suspend_time_ms_show(struct device *dev, prevent_sleep_time = ktime_add(prevent_sleep_time, ktime_sub(ktime_get(), ws->start_prevent_time)); } - return sprintf(buf, "%lld\n", ktime_to_ms(prevent_sleep_time)); + return sysfs_emit(buf, "%lld\n", ktime_to_ms(prevent_sleep_time)); } static DEVICE_ATTR_RO(prevent_suspend_time_ms); diff --git a/drivers/base/soc.c b/drivers/base/soc.c index a5bae551167d..fc6536a7eac6 100644 --- a/drivers/base/soc.c +++ b/drivers/base/soc.c @@ -76,15 +76,15 @@ static ssize_t soc_info_get(struct device *dev, struct soc_device *soc_dev = container_of(dev, struct soc_device, dev); if (attr == &dev_attr_machine) - return sprintf(buf, "%s\n", soc_dev->attr->machine); + return sysfs_emit(buf, "%s\n", soc_dev->attr->machine); if (attr == &dev_attr_family) - return sprintf(buf, "%s\n", soc_dev->attr->family); + return sysfs_emit(buf, "%s\n", soc_dev->attr->family); if (attr == &dev_attr_revision) - return sprintf(buf, "%s\n", soc_dev->attr->revision); + return sysfs_emit(buf, "%s\n", soc_dev->attr->revision); if (attr == &dev_attr_serial_number) - return sprintf(buf, "%s\n", soc_dev->attr->serial_number); + return sysfs_emit(buf, "%s\n", soc_dev->attr->serial_number); if (attr == &dev_attr_soc_id) - return sprintf(buf, "%s\n", soc_dev->attr->soc_id); + return sysfs_emit(buf, "%s\n", soc_dev->attr->soc_id); return -EINVAL; From 973c39115cb308b6b1fe64b4f342996f3eef06d0 Mon Sep 17 00:00:00 2001 From: Joe Perches Date: Wed, 16 Sep 2020 13:40:40 -0700 Subject: [PATCH 385/433] drivers core: Remove strcat uses around sysfs_emit and neaten strcat is no longer necessary for sysfs_emit and sysfs_emit_at uses. Convert the strcat uses to sysfs_emit calls and neaten other block uses of direct returns to use an intermediate const char *. Signed-off-by: Joe Perches Link: https://lore.kernel.org/r/5d606519698ce4c8f1203a2b35797d8254c6050a.1600285923.git.joe@perches.com Signed-off-by: Greg Kroah-Hartman --- drivers/base/cacheinfo.c | 25 +++++++++++++------- drivers/base/core.c | 10 ++++---- drivers/base/memory.c | 47 ++++++++++++++++++-------------------- drivers/base/power/sysfs.c | 23 +++++++++++-------- 4 files changed, 58 insertions(+), 47 deletions(-) diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c index 6a8c2b5881be..96f8af414a48 100644 --- a/drivers/base/cacheinfo.c +++ b/drivers/base/cacheinfo.c @@ -404,17 +404,23 @@ static ssize_t type_show(struct device *dev, struct device_attribute *attr, char *buf) { struct cacheinfo *this_leaf = dev_get_drvdata(dev); + const char *output; switch (this_leaf->type) { case CACHE_TYPE_DATA: - return sysfs_emit(buf, "Data\n"); + output = "Data"; + break; case CACHE_TYPE_INST: - return sysfs_emit(buf, "Instruction\n"); + output = "Instruction"; + break; case CACHE_TYPE_UNIFIED: - return sysfs_emit(buf, "Unified\n"); + output = "Unified"; + break; default: return -EINVAL; } + + return sysfs_emit(buf, "%s\n", output); } static ssize_t allocation_policy_show(struct device *dev, @@ -422,15 +428,18 @@ static ssize_t allocation_policy_show(struct device *dev, { struct cacheinfo *this_leaf = dev_get_drvdata(dev); unsigned int ci_attr = this_leaf->attributes; - int n = 0; + const char *output; if ((ci_attr & CACHE_READ_ALLOCATE) && (ci_attr & CACHE_WRITE_ALLOCATE)) - n = sysfs_emit(buf, "ReadWriteAllocate\n"); + output = "ReadWriteAllocate"; else if (ci_attr & CACHE_READ_ALLOCATE) - n = sysfs_emit(buf, "ReadAllocate\n"); + output = "ReadAllocate"; else if (ci_attr & CACHE_WRITE_ALLOCATE) - n = sysfs_emit(buf, "WriteAllocate\n"); - return n; + output = "WriteAllocate"; + else + return 0; + + return sysfs_emit(buf, "%s\n", output); } static ssize_t write_policy_show(struct device *dev, diff --git a/drivers/base/core.c b/drivers/base/core.c index b1f8762ac451..cfeb06f054d0 100644 --- a/drivers/base/core.c +++ b/drivers/base/core.c @@ -268,16 +268,16 @@ static ssize_t auto_remove_on_show(struct device *dev, struct device_attribute *attr, char *buf) { struct device_link *link = to_devlink(dev); - char *str; + const char *output; if (link->flags & DL_FLAG_AUTOREMOVE_SUPPLIER) - str = "supplier unbind"; + output = "supplier unbind"; else if (link->flags & DL_FLAG_AUTOREMOVE_CONSUMER) - str = "consumer unbind"; + output = "consumer unbind"; else - str = "never"; + output = "never"; - return sysfs_emit(buf, "%s\n", str); + return sysfs_emit(buf, "%s\n", output); } static DEVICE_ATTR_RO(auto_remove_on); diff --git a/drivers/base/memory.c b/drivers/base/memory.c index 2fdab1ea036b..1e0526b6b9db 100644 --- a/drivers/base/memory.c +++ b/drivers/base/memory.c @@ -139,7 +139,7 @@ static ssize_t state_show(struct device *dev, struct device_attribute *attr, char *buf) { struct memory_block *mem = to_memory_block(dev); - ssize_t len = 0; + const char *output; /* * We can probably put these states in a nice little array @@ -147,22 +147,20 @@ static ssize_t state_show(struct device *dev, struct device_attribute *attr, */ switch (mem->state) { case MEM_ONLINE: - len = sysfs_emit(buf, "online\n"); + output = "online"; break; case MEM_OFFLINE: - len = sysfs_emit(buf, "offline\n"); + output = "offline"; break; case MEM_GOING_OFFLINE: - len = sysfs_emit(buf, "going-offline\n"); + output = "going-offline"; break; default: - len = sysfs_emit(buf, "ERROR-UNKNOWN-%ld\n", - mem->state); WARN_ON(1); - break; + return sysfs_emit(buf, "ERROR-UNKNOWN-%ld\n", mem->state); } - return len; + return sysfs_emit(buf, "%s\n", output); } int memory_notify(unsigned long val, void *v) @@ -307,17 +305,16 @@ static ssize_t phys_device_show(struct device *dev, } #ifdef CONFIG_MEMORY_HOTREMOVE -static void print_allowed_zone(char *buf, int nid, unsigned long start_pfn, - unsigned long nr_pages, int online_type, - struct zone *default_zone) +static int print_allowed_zone(char *buf, int len, int nid, + unsigned long start_pfn, unsigned long nr_pages, + int online_type, struct zone *default_zone) { struct zone *zone; zone = zone_for_pfn_range(online_type, nid, start_pfn, nr_pages); - if (zone != default_zone) { - strcat(buf, " "); - strcat(buf, zone->name); - } + if (zone == default_zone) + return 0; + return sysfs_emit_at(buf, len, " %s", zone->name); } static ssize_t valid_zones_show(struct device *dev, @@ -327,6 +324,7 @@ static ssize_t valid_zones_show(struct device *dev, unsigned long start_pfn = section_nr_to_pfn(mem->start_section_nr); unsigned long nr_pages = PAGES_PER_SECTION * sections_per_block; struct zone *default_zone; + int len = 0; int nid; /* @@ -341,24 +339,23 @@ static ssize_t valid_zones_show(struct device *dev, default_zone = test_pages_in_a_zone(start_pfn, start_pfn + nr_pages); if (!default_zone) - return sysfs_emit(buf, "none\n"); - strcat(buf, default_zone->name); + return sysfs_emit(buf, "%s\n", "none"); + len += sysfs_emit_at(buf, len, "%s", default_zone->name); goto out; } nid = mem->nid; default_zone = zone_for_pfn_range(MMOP_ONLINE, nid, start_pfn, nr_pages); - strcat(buf, default_zone->name); - print_allowed_zone(buf, nid, start_pfn, nr_pages, MMOP_ONLINE_KERNEL, - default_zone); - print_allowed_zone(buf, nid, start_pfn, nr_pages, MMOP_ONLINE_MOVABLE, - default_zone); + len += sysfs_emit_at(buf, len, "%s", default_zone->name); + len += print_allowed_zone(buf, len, nid, start_pfn, nr_pages, + MMOP_ONLINE_KERNEL, default_zone); + len += print_allowed_zone(buf, len, nid, start_pfn, nr_pages, + MMOP_ONLINE_MOVABLE, default_zone); out: - strcat(buf, "\n"); - - return strlen(buf); + len += sysfs_emit_at(buf, len, "%s", "\n"); + return len; } static DEVICE_ATTR_RO(valid_zones); #endif diff --git a/drivers/base/power/sysfs.c b/drivers/base/power/sysfs.c index 4276b792d0aa..61e16786f6c5 100644 --- a/drivers/base/power/sysfs.c +++ b/drivers/base/power/sysfs.c @@ -255,9 +255,9 @@ static ssize_t pm_qos_latency_tolerance_us_show(struct device *dev, s32 value = dev_pm_qos_get_user_latency_tolerance(dev); if (value < 0) - return sysfs_emit(buf, "auto\n"); + return sysfs_emit(buf, "%s\n", "auto"); if (value == PM_QOS_LATENCY_ANY) - return sysfs_emit(buf, "any\n"); + return sysfs_emit(buf, "%s\n", "any"); return sysfs_emit(buf, "%d\n", value); } @@ -538,13 +538,18 @@ static DEVICE_ATTR_RO(runtime_active_kids); static ssize_t runtime_enabled_show(struct device *dev, struct device_attribute *attr, char *buf) { - if (dev->power.disable_depth && (dev->power.runtime_auto == false)) - return sysfs_emit(buf, "disabled & forbidden\n"); - if (dev->power.disable_depth) - return sysfs_emit(buf, "disabled\n"); - if (dev->power.runtime_auto == false) - return sysfs_emit(buf, "forbidden\n"); - return sysfs_emit(buf, "enabled\n"); + const char *output; + + if (dev->power.disable_depth && !dev->power.runtime_auto) + output = "disabled & forbidden"; + else if (dev->power.disable_depth) + output = "disabled"; + else if (!dev->power.runtime_auto) + output = "forbidden"; + else + output = "enabled"; + + return sysfs_emit(buf, "%s\n", output); } static DEVICE_ATTR_RO(runtime_enabled); From 27275d301813d1f3b1b2fe5576d4afd690df6b99 Mon Sep 17 00:00:00 2001 From: Joe Perches Date: Wed, 16 Sep 2020 13:40:41 -0700 Subject: [PATCH 386/433] drivers core: Reindent a couple uses around sysfs_emit Just a couple of whitespace realignment to open parenthesis for multi-line statements. Signed-off-by: Joe Perches Link: https://lore.kernel.org/r/33224191421dbb56015eded428edfddcba997d63.1600285923.git.joe@perches.com Signed-off-by: Greg Kroah-Hartman --- drivers/base/node.c | 4 ++-- drivers/base/power/sysfs.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/base/node.c b/drivers/base/node.c index 60abdb27137b..f10e8236aba8 100644 --- a/drivers/base/node.c +++ b/drivers/base/node.c @@ -386,9 +386,9 @@ static ssize_t node_read_meminfo(struct device *dev, nid, K(i.freeram), nid, K(i.totalram - i.freeram), nid, K(node_page_state(pgdat, NR_ACTIVE_ANON) + - node_page_state(pgdat, NR_ACTIVE_FILE)), + node_page_state(pgdat, NR_ACTIVE_FILE)), nid, K(node_page_state(pgdat, NR_INACTIVE_ANON) + - node_page_state(pgdat, NR_INACTIVE_FILE)), + node_page_state(pgdat, NR_INACTIVE_FILE)), nid, K(node_page_state(pgdat, NR_ACTIVE_ANON)), nid, K(node_page_state(pgdat, NR_INACTIVE_ANON)), nid, K(node_page_state(pgdat, NR_ACTIVE_FILE)), diff --git a/drivers/base/power/sysfs.c b/drivers/base/power/sysfs.c index 61e16786f6c5..e05207abb99e 100644 --- a/drivers/base/power/sysfs.c +++ b/drivers/base/power/sysfs.c @@ -102,7 +102,7 @@ static ssize_t control_show(struct device *dev, struct device_attribute *attr, char *buf) { return sysfs_emit(buf, "%s\n", - dev->power.runtime_auto ? ctrl_auto : ctrl_on); + dev->power.runtime_auto ? ctrl_auto : ctrl_on); } static ssize_t control_store(struct device * dev, struct device_attribute *attr, From 948b3edba8988306b635578a72b0dab6091a5eb0 Mon Sep 17 00:00:00 2001 From: Joe Perches Date: Wed, 16 Sep 2020 13:40:42 -0700 Subject: [PATCH 387/433] drivers core: Miscellaneous changes for sysfs_emit Change additional instances that could use sysfs_emit and sysfs_emit_at that the coccinelle script could not convert. o macros creating show functions with ## concatenation o unbound sprintf uses with buf+len for start of output to sysfs_emit_at o returns with ?: tests and sprintf to sysfs_emit o sysfs output with struct class * not struct device * arguments Miscellanea: o remove unnecessary initializations around these changes o consistently use int len for return length of show functions o use octal permissions and not S_ o rename a few show function names so DEVICE_ATTR_ can be used o use DEVICE_ATTR_ADMIN_RO where appropriate o consistently use const char *output for strings o checkpatch/style neatening Signed-off-by: Joe Perches Link: https://lore.kernel.org/r/8bc24444fe2049a9b2de6127389b57edfdfe324d.1600285923.git.joe@perches.com Signed-off-by: Greg Kroah-Hartman --- drivers/base/bus.c | 2 +- drivers/base/cacheinfo.c | 2 +- drivers/base/class.c | 2 +- drivers/base/core.c | 34 +-- drivers/base/cpu.c | 64 +++--- drivers/base/dd.c | 1 + drivers/base/devcoredump.c | 2 +- drivers/base/firmware_loader/fallback.c | 2 +- drivers/base/memory.c | 5 +- drivers/base/node.c | 268 ++++++++++++------------ drivers/base/platform.c | 13 +- drivers/base/power/sysfs.c | 103 +++++---- drivers/base/power/wakeup_stats.c | 5 +- drivers/base/soc.c | 62 +++--- drivers/base/topology.c | 10 +- 15 files changed, 308 insertions(+), 267 deletions(-) diff --git a/drivers/base/bus.c b/drivers/base/bus.c index 886e9054999a..a9c23ecebc7c 100644 --- a/drivers/base/bus.c +++ b/drivers/base/bus.c @@ -229,7 +229,7 @@ static DRIVER_ATTR_IGNORE_LOCKDEP(bind, S_IWUSR, NULL, bind_store); static ssize_t drivers_autoprobe_show(struct bus_type *bus, char *buf) { - return sprintf(buf, "%d\n", bus->p->drivers_autoprobe); + return sysfs_emit(buf, "%d\n", bus->p->drivers_autoprobe); } static ssize_t drivers_autoprobe_store(struct bus_type *bus, diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c index 96f8af414a48..4946647bd985 100644 --- a/drivers/base/cacheinfo.c +++ b/drivers/base/cacheinfo.c @@ -362,7 +362,7 @@ static ssize_t file_name##_show(struct device *dev, \ struct device_attribute *attr, char *buf) \ { \ struct cacheinfo *this_leaf = dev_get_drvdata(dev); \ - return sprintf(buf, "%u\n", this_leaf->object); \ + return sysfs_emit(buf, "%u\n", this_leaf->object); \ } show_one(id, id); diff --git a/drivers/base/class.c b/drivers/base/class.c index bcd410e6d70a..c3451481194e 100644 --- a/drivers/base/class.c +++ b/drivers/base/class.c @@ -478,7 +478,7 @@ ssize_t show_class_attr_string(struct class *class, struct class_attribute_string *cs; cs = container_of(attr, struct class_attribute_string, attr); - return snprintf(buf, PAGE_SIZE, "%s\n", cs->str); + return sysfs_emit(buf, "%s\n", cs->str); } EXPORT_SYMBOL_GPL(show_class_attr_string); diff --git a/drivers/base/core.c b/drivers/base/core.c index cfeb06f054d0..398f8bb04412 100644 --- a/drivers/base/core.c +++ b/drivers/base/core.c @@ -240,27 +240,35 @@ void device_pm_move_to_tail(struct device *dev) #define to_devlink(dev) container_of((dev), struct device_link, link_dev) static ssize_t status_show(struct device *dev, - struct device_attribute *attr, char *buf) + struct device_attribute *attr, char *buf) { - char *status; + const char *output; switch (to_devlink(dev)->status) { case DL_STATE_NONE: - status = "not tracked"; break; + output = "not tracked"; + break; case DL_STATE_DORMANT: - status = "dormant"; break; + output = "dormant"; + break; case DL_STATE_AVAILABLE: - status = "available"; break; + output = "available"; + break; case DL_STATE_CONSUMER_PROBE: - status = "consumer probing"; break; + output = "consumer probing"; + break; case DL_STATE_ACTIVE: - status = "active"; break; + output = "active"; + break; case DL_STATE_SUPPLIER_UNBIND: - status = "supplier unbinding"; break; + output = "supplier unbinding"; + break; default: - status = "unknown"; break; + output = "unknown"; + break; } - return sysfs_emit(buf, "%s\n", status); + + return sysfs_emit(buf, "%s\n", output); } static DEVICE_ATTR_RO(status); @@ -1934,7 +1942,7 @@ static ssize_t uevent_show(struct device *dev, struct device_attribute *attr, struct kset *kset; struct kobj_uevent_env *env = NULL; int i; - size_t count = 0; + int len = 0; int retval; /* search the kset, the device belongs to */ @@ -1964,10 +1972,10 @@ static ssize_t uevent_show(struct device *dev, struct device_attribute *attr, /* copy keys to file */ for (i = 0; i < env->envp_idx; i++) - count += sprintf(&buf[count], "%s\n", env->envp[i]); + len += sysfs_emit_at(buf, len, "%s\n", env->envp[i]); out: kfree(env); - return count; + return len; } static ssize_t uevent_store(struct device *dev, struct device_attribute *attr, diff --git a/drivers/base/cpu.c b/drivers/base/cpu.c index 232f8146a8c4..8f1d6569564c 100644 --- a/drivers/base/cpu.c +++ b/drivers/base/cpu.c @@ -139,11 +139,11 @@ EXPORT_SYMBOL_GPL(cpu_subsys); #ifdef CONFIG_KEXEC #include -static ssize_t show_crash_notes(struct device *dev, struct device_attribute *attr, +static ssize_t crash_notes_show(struct device *dev, + struct device_attribute *attr, char *buf) { struct cpu *cpu = container_of(dev, struct cpu, dev); - ssize_t rc; unsigned long long addr; int cpunum; @@ -156,21 +156,18 @@ static ssize_t show_crash_notes(struct device *dev, struct device_attribute *att * operation should be safe. No locking required. */ addr = per_cpu_ptr_to_phys(per_cpu_ptr(crash_notes, cpunum)); - rc = sysfs_emit(buf, "%Lx\n", addr); - return rc; -} -static DEVICE_ATTR(crash_notes, 0400, show_crash_notes, NULL); -static ssize_t show_crash_notes_size(struct device *dev, + return sysfs_emit(buf, "%llx\n", addr); +} +static DEVICE_ATTR_ADMIN_RO(crash_notes); + +static ssize_t crash_notes_size_show(struct device *dev, struct device_attribute *attr, char *buf) { - ssize_t rc; - - rc = sysfs_emit(buf, "%zu\n", sizeof(note_buf_t)); - return rc; + return sysfs_emit(buf, "%zu\n", sizeof(note_buf_t)); } -static DEVICE_ATTR(crash_notes_size, 0400, show_crash_notes_size, NULL); +static DEVICE_ATTR_ADMIN_RO(crash_notes_size); static struct attribute *crash_note_cpu_attrs[] = { &dev_attr_crash_notes.attr, @@ -241,37 +238,37 @@ unsigned int total_cpus; static ssize_t print_cpus_offline(struct device *dev, struct device_attribute *attr, char *buf) { - int n = 0, len = PAGE_SIZE-2; + int len = 0; cpumask_var_t offline; /* display offline cpus < nr_cpu_ids */ if (!alloc_cpumask_var(&offline, GFP_KERNEL)) return -ENOMEM; cpumask_andnot(offline, cpu_possible_mask, cpu_online_mask); - n = scnprintf(buf, len, "%*pbl", cpumask_pr_args(offline)); + len += sysfs_emit_at(buf, len, "%*pbl", cpumask_pr_args(offline)); free_cpumask_var(offline); /* display offline cpus >= nr_cpu_ids */ if (total_cpus && nr_cpu_ids < total_cpus) { - if (n && n < len) - buf[n++] = ','; + len += sysfs_emit_at(buf, len, ","); if (nr_cpu_ids == total_cpus-1) - n += scnprintf(&buf[n], len - n, "%u", nr_cpu_ids); + len += sysfs_emit_at(buf, len, "%u", nr_cpu_ids); else - n += scnprintf(&buf[n], len - n, "%u-%d", - nr_cpu_ids, total_cpus-1); + len += sysfs_emit_at(buf, len, "%u-%d", + nr_cpu_ids, total_cpus - 1); } - n += scnprintf(&buf[n], len - n, "\n"); - return n; + len += sysfs_emit_at(buf, len, "\n"); + + return len; } static DEVICE_ATTR(offline, 0444, print_cpus_offline, NULL); static ssize_t print_cpus_isolated(struct device *dev, struct device_attribute *attr, char *buf) { - int n; + int len; cpumask_var_t isolated; if (!alloc_cpumask_var(&isolated, GFP_KERNEL)) @@ -279,17 +276,17 @@ static ssize_t print_cpus_isolated(struct device *dev, cpumask_andnot(isolated, cpu_possible_mask, housekeeping_cpumask(HK_FLAG_DOMAIN)); - n = sysfs_emit(buf, "%*pbl\n", cpumask_pr_args(isolated)); + len = sysfs_emit(buf, "%*pbl\n", cpumask_pr_args(isolated)); free_cpumask_var(isolated); - return n; + return len; } static DEVICE_ATTR(isolated, 0444, print_cpus_isolated, NULL); #ifdef CONFIG_NO_HZ_FULL static ssize_t print_cpus_nohz_full(struct device *dev, - struct device_attribute *attr, char *buf) + struct device_attribute *attr, char *buf) { return sysfs_emit(buf, "%*pbl\n", cpumask_pr_args(tick_nohz_full_mask)); } @@ -320,22 +317,23 @@ static ssize_t print_cpu_modalias(struct device *dev, struct device_attribute *attr, char *buf) { - ssize_t n; + int len = 0; u32 i; - n = sysfs_emit(buf, "cpu:type:" CPU_FEATURE_TYPEFMT ":feature:", - CPU_FEATURE_TYPEVAL); + len += sysfs_emit_at(buf, len, + "cpu:type:" CPU_FEATURE_TYPEFMT ":feature:", + CPU_FEATURE_TYPEVAL); for (i = 0; i < MAX_CPU_FEATURES; i++) if (cpu_have_feature(i)) { - if (PAGE_SIZE < n + sizeof(",XXXX\n")) { + if (len + sizeof(",XXXX\n") >= PAGE_SIZE) { WARN(1, "CPU features overflow page\n"); break; } - n += sprintf(&buf[n], ",%04X", i); + len += sysfs_emit_at(buf, len, ",%04X", i); } - buf[n++] = '\n'; - return n; + len += sysfs_emit_at(buf, len, "\n"); + return len; } static int cpu_uevent(struct device *dev, struct kobj_uevent_env *env) @@ -557,7 +555,7 @@ ssize_t __weak cpu_show_tsx_async_abort(struct device *dev, } ssize_t __weak cpu_show_itlb_multihit(struct device *dev, - struct device_attribute *attr, char *buf) + struct device_attribute *attr, char *buf) { return sysfs_emit(buf, "Not affected\n"); } diff --git a/drivers/base/dd.c b/drivers/base/dd.c index 123a1c3e9f18..b52d69eb4e71 100644 --- a/drivers/base/dd.c +++ b/drivers/base/dd.c @@ -486,6 +486,7 @@ static ssize_t state_synced_show(struct device *dev, device_lock(dev); val = dev->state_synced; device_unlock(dev); + return sysfs_emit(buf, "%u\n", val); } static DEVICE_ATTR_RO(state_synced); diff --git a/drivers/base/devcoredump.c b/drivers/base/devcoredump.c index e42d0b514384..9243468e2c99 100644 --- a/drivers/base/devcoredump.c +++ b/drivers/base/devcoredump.c @@ -123,7 +123,7 @@ static int devcd_free(struct device *dev, void *data) static ssize_t disabled_show(struct class *class, struct class_attribute *attr, char *buf) { - return sprintf(buf, "%d\n", devcd_disabled); + return sysfs_emit(buf, "%d\n", devcd_disabled); } static ssize_t disabled_store(struct class *class, struct class_attribute *attr, diff --git a/drivers/base/firmware_loader/fallback.c b/drivers/base/firmware_loader/fallback.c index 7e9598a1577a..d60e6d8c967c 100644 --- a/drivers/base/firmware_loader/fallback.c +++ b/drivers/base/firmware_loader/fallback.c @@ -124,7 +124,7 @@ void kill_pending_fw_fallback_reqs(bool only_kill_custom) static ssize_t timeout_show(struct class *class, struct class_attribute *attr, char *buf) { - return sprintf(buf, "%d\n", __firmware_loading_timeout()); + return sysfs_emit(buf, "%d\n", __firmware_loading_timeout()); } /** diff --git a/drivers/base/memory.c b/drivers/base/memory.c index 1e0526b6b9db..adf828dfccf0 100644 --- a/drivers/base/memory.c +++ b/drivers/base/memory.c @@ -119,6 +119,7 @@ static ssize_t phys_index_show(struct device *dev, unsigned long phys_index; phys_index = mem->start_section_nr / sections_per_block; + return sysfs_emit(buf, "%08lx\n", phys_index); } @@ -301,6 +302,7 @@ static ssize_t phys_device_show(struct device *dev, struct device_attribute *attr, char *buf) { struct memory_block *mem = to_memory_block(dev); + return sysfs_emit(buf, "%d\n", mem->phys_device); } @@ -314,6 +316,7 @@ static int print_allowed_zone(char *buf, int len, int nid, zone = zone_for_pfn_range(online_type, nid, start_pfn, nr_pages); if (zone == default_zone) return 0; + return sysfs_emit_at(buf, len, " %s", zone->name); } @@ -354,7 +357,7 @@ static ssize_t valid_zones_show(struct device *dev, len += print_allowed_zone(buf, len, nid, start_pfn, nr_pages, MMOP_ONLINE_MOVABLE, default_zone); out: - len += sysfs_emit_at(buf, len, "%s", "\n"); + len += sysfs_emit_at(buf, len, "\n"); return len; } static DEVICE_ATTR_RO(valid_zones); diff --git a/drivers/base/node.c b/drivers/base/node.c index f10e8236aba8..96d820f979a2 100644 --- a/drivers/base/node.c +++ b/drivers/base/node.c @@ -46,19 +46,23 @@ static ssize_t node_read_cpumap(struct device *dev, bool list, char *buf) return n; } -static inline ssize_t node_read_cpumask(struct device *dev, - struct device_attribute *attr, char *buf) +static inline ssize_t cpumap_show(struct device *dev, + struct device_attribute *attr, + char *buf) { return node_read_cpumap(dev, false, buf); } -static inline ssize_t node_read_cpulist(struct device *dev, - struct device_attribute *attr, char *buf) + +static DEVICE_ATTR_RO(cpumap); + +static inline ssize_t cpulist_show(struct device *dev, + struct device_attribute *attr, + char *buf) { return node_read_cpumap(dev, true, buf); } -static DEVICE_ATTR(cpumap, S_IRUGO, node_read_cpumask, NULL); -static DEVICE_ATTR(cpulist, S_IRUGO, node_read_cpulist, NULL); +static DEVICE_ATTR_RO(cpulist); /** * struct node_access_nodes - Access class device to hold user visible @@ -153,13 +157,14 @@ free: } #ifdef CONFIG_HMEM_REPORTING -#define ACCESS_ATTR(name) \ -static ssize_t name##_show(struct device *dev, \ - struct device_attribute *attr, \ - char *buf) \ -{ \ - return sprintf(buf, "%u\n", to_access_nodes(dev)->hmem_attrs.name); \ -} \ +#define ACCESS_ATTR(name) \ +static ssize_t name##_show(struct device *dev, \ + struct device_attribute *attr, \ + char *buf) \ +{ \ + return sysfs_emit(buf, "%u\n", \ + to_access_nodes(dev)->hmem_attrs.name); \ +} \ static DEVICE_ATTR_RO(name); ACCESS_ATTR(read_bandwidth) @@ -225,7 +230,8 @@ static ssize_t name##_show(struct device *dev, \ struct device_attribute *attr, \ char *buf) \ { \ - return sprintf(buf, fmt "\n", to_cache_info(dev)->cache_attrs.name);\ + return sysfs_emit(buf, fmt "\n", \ + to_cache_info(dev)->cache_attrs.name); \ } \ DEVICE_ATTR_RO(name); @@ -361,7 +367,7 @@ static void node_remove_caches(struct node *node) { } static ssize_t node_read_meminfo(struct device *dev, struct device_attribute *attr, char *buf) { - int n; + int len = 0; int nid = dev->id; struct pglist_data *pgdat = NODE_DATA(nid); struct sysinfo i; @@ -370,112 +376,112 @@ static ssize_t node_read_meminfo(struct device *dev, si_meminfo_node(&i, nid); sreclaimable = node_page_state_pages(pgdat, NR_SLAB_RECLAIMABLE_B); sunreclaimable = node_page_state_pages(pgdat, NR_SLAB_UNRECLAIMABLE_B); - n = sysfs_emit(buf, - "Node %d MemTotal: %8lu kB\n" - "Node %d MemFree: %8lu kB\n" - "Node %d MemUsed: %8lu kB\n" - "Node %d Active: %8lu kB\n" - "Node %d Inactive: %8lu kB\n" - "Node %d Active(anon): %8lu kB\n" - "Node %d Inactive(anon): %8lu kB\n" - "Node %d Active(file): %8lu kB\n" - "Node %d Inactive(file): %8lu kB\n" - "Node %d Unevictable: %8lu kB\n" - "Node %d Mlocked: %8lu kB\n", - nid, K(i.totalram), - nid, K(i.freeram), - nid, K(i.totalram - i.freeram), - nid, K(node_page_state(pgdat, NR_ACTIVE_ANON) + - node_page_state(pgdat, NR_ACTIVE_FILE)), - nid, K(node_page_state(pgdat, NR_INACTIVE_ANON) + - node_page_state(pgdat, NR_INACTIVE_FILE)), - nid, K(node_page_state(pgdat, NR_ACTIVE_ANON)), - nid, K(node_page_state(pgdat, NR_INACTIVE_ANON)), - nid, K(node_page_state(pgdat, NR_ACTIVE_FILE)), - nid, K(node_page_state(pgdat, NR_INACTIVE_FILE)), - nid, K(node_page_state(pgdat, NR_UNEVICTABLE)), - nid, K(sum_zone_node_page_state(nid, NR_MLOCK))); + len = sysfs_emit_at(buf, len, + "Node %d MemTotal: %8lu kB\n" + "Node %d MemFree: %8lu kB\n" + "Node %d MemUsed: %8lu kB\n" + "Node %d Active: %8lu kB\n" + "Node %d Inactive: %8lu kB\n" + "Node %d Active(anon): %8lu kB\n" + "Node %d Inactive(anon): %8lu kB\n" + "Node %d Active(file): %8lu kB\n" + "Node %d Inactive(file): %8lu kB\n" + "Node %d Unevictable: %8lu kB\n" + "Node %d Mlocked: %8lu kB\n", + nid, K(i.totalram), + nid, K(i.freeram), + nid, K(i.totalram - i.freeram), + nid, K(node_page_state(pgdat, NR_ACTIVE_ANON) + + node_page_state(pgdat, NR_ACTIVE_FILE)), + nid, K(node_page_state(pgdat, NR_INACTIVE_ANON) + + node_page_state(pgdat, NR_INACTIVE_FILE)), + nid, K(node_page_state(pgdat, NR_ACTIVE_ANON)), + nid, K(node_page_state(pgdat, NR_INACTIVE_ANON)), + nid, K(node_page_state(pgdat, NR_ACTIVE_FILE)), + nid, K(node_page_state(pgdat, NR_INACTIVE_FILE)), + nid, K(node_page_state(pgdat, NR_UNEVICTABLE)), + nid, K(sum_zone_node_page_state(nid, NR_MLOCK))); #ifdef CONFIG_HIGHMEM - n += sprintf(buf + n, - "Node %d HighTotal: %8lu kB\n" - "Node %d HighFree: %8lu kB\n" - "Node %d LowTotal: %8lu kB\n" - "Node %d LowFree: %8lu kB\n", - nid, K(i.totalhigh), - nid, K(i.freehigh), - nid, K(i.totalram - i.totalhigh), - nid, K(i.freeram - i.freehigh)); + len += sysfs_emit_at(buf, len, + "Node %d HighTotal: %8lu kB\n" + "Node %d HighFree: %8lu kB\n" + "Node %d LowTotal: %8lu kB\n" + "Node %d LowFree: %8lu kB\n", + nid, K(i.totalhigh), + nid, K(i.freehigh), + nid, K(i.totalram - i.totalhigh), + nid, K(i.freeram - i.freehigh)); #endif - n += sprintf(buf + n, - "Node %d Dirty: %8lu kB\n" - "Node %d Writeback: %8lu kB\n" - "Node %d FilePages: %8lu kB\n" - "Node %d Mapped: %8lu kB\n" - "Node %d AnonPages: %8lu kB\n" - "Node %d Shmem: %8lu kB\n" - "Node %d KernelStack: %8lu kB\n" + len += sysfs_emit_at(buf, len, + "Node %d Dirty: %8lu kB\n" + "Node %d Writeback: %8lu kB\n" + "Node %d FilePages: %8lu kB\n" + "Node %d Mapped: %8lu kB\n" + "Node %d AnonPages: %8lu kB\n" + "Node %d Shmem: %8lu kB\n" + "Node %d KernelStack: %8lu kB\n" #ifdef CONFIG_SHADOW_CALL_STACK - "Node %d ShadowCallStack:%8lu kB\n" + "Node %d ShadowCallStack:%8lu kB\n" #endif - "Node %d PageTables: %8lu kB\n" - "Node %d NFS_Unstable: %8lu kB\n" - "Node %d Bounce: %8lu kB\n" - "Node %d WritebackTmp: %8lu kB\n" - "Node %d KReclaimable: %8lu kB\n" - "Node %d Slab: %8lu kB\n" - "Node %d SReclaimable: %8lu kB\n" - "Node %d SUnreclaim: %8lu kB\n" + "Node %d PageTables: %8lu kB\n" + "Node %d NFS_Unstable: %8lu kB\n" + "Node %d Bounce: %8lu kB\n" + "Node %d WritebackTmp: %8lu kB\n" + "Node %d KReclaimable: %8lu kB\n" + "Node %d Slab: %8lu kB\n" + "Node %d SReclaimable: %8lu kB\n" + "Node %d SUnreclaim: %8lu kB\n" #ifdef CONFIG_TRANSPARENT_HUGEPAGE - "Node %d AnonHugePages: %8lu kB\n" - "Node %d ShmemHugePages: %8lu kB\n" - "Node %d ShmemPmdMapped: %8lu kB\n" - "Node %d FileHugePages: %8lu kB\n" - "Node %d FilePmdMapped: %8lu kB\n" + "Node %d AnonHugePages: %8lu kB\n" + "Node %d ShmemHugePages: %8lu kB\n" + "Node %d ShmemPmdMapped: %8lu kB\n" + "Node %d FileHugePages: %8lu kB\n" + "Node %d FilePmdMapped: %8lu kB\n" #endif - , - nid, K(node_page_state(pgdat, NR_FILE_DIRTY)), - nid, K(node_page_state(pgdat, NR_WRITEBACK)), - nid, K(node_page_state(pgdat, NR_FILE_PAGES)), - nid, K(node_page_state(pgdat, NR_FILE_MAPPED)), - nid, K(node_page_state(pgdat, NR_ANON_MAPPED)), - nid, K(i.sharedram), - nid, node_page_state(pgdat, NR_KERNEL_STACK_KB), + , + nid, K(node_page_state(pgdat, NR_FILE_DIRTY)), + nid, K(node_page_state(pgdat, NR_WRITEBACK)), + nid, K(node_page_state(pgdat, NR_FILE_PAGES)), + nid, K(node_page_state(pgdat, NR_FILE_MAPPED)), + nid, K(node_page_state(pgdat, NR_ANON_MAPPED)), + nid, K(i.sharedram), + nid, node_page_state(pgdat, NR_KERNEL_STACK_KB), #ifdef CONFIG_SHADOW_CALL_STACK - nid, node_page_state(pgdat, NR_KERNEL_SCS_KB), + nid, node_page_state(pgdat, NR_KERNEL_SCS_KB), #endif - nid, K(sum_zone_node_page_state(nid, NR_PAGETABLE)), - nid, 0UL, - nid, K(sum_zone_node_page_state(nid, NR_BOUNCE)), - nid, K(node_page_state(pgdat, NR_WRITEBACK_TEMP)), - nid, K(sreclaimable + - node_page_state(pgdat, NR_KERNEL_MISC_RECLAIMABLE)), - nid, K(sreclaimable + sunreclaimable), - nid, K(sreclaimable), - nid, K(sunreclaimable) + nid, K(sum_zone_node_page_state(nid, NR_PAGETABLE)), + nid, 0UL, + nid, K(sum_zone_node_page_state(nid, NR_BOUNCE)), + nid, K(node_page_state(pgdat, NR_WRITEBACK_TEMP)), + nid, K(sreclaimable + + node_page_state(pgdat, NR_KERNEL_MISC_RECLAIMABLE)), + nid, K(sreclaimable + sunreclaimable), + nid, K(sreclaimable), + nid, K(sunreclaimable) #ifdef CONFIG_TRANSPARENT_HUGEPAGE - , - nid, K(node_page_state(pgdat, NR_ANON_THPS) * - HPAGE_PMD_NR), - nid, K(node_page_state(pgdat, NR_SHMEM_THPS) * - HPAGE_PMD_NR), - nid, K(node_page_state(pgdat, NR_SHMEM_PMDMAPPED) * - HPAGE_PMD_NR), - nid, K(node_page_state(pgdat, NR_FILE_THPS) * - HPAGE_PMD_NR), - nid, K(node_page_state(pgdat, NR_FILE_PMDMAPPED) * - HPAGE_PMD_NR) + , + nid, K(node_page_state(pgdat, NR_ANON_THPS) * + HPAGE_PMD_NR), + nid, K(node_page_state(pgdat, NR_SHMEM_THPS) * + HPAGE_PMD_NR), + nid, K(node_page_state(pgdat, NR_SHMEM_PMDMAPPED) * + HPAGE_PMD_NR), + nid, K(node_page_state(pgdat, NR_FILE_THPS) * + HPAGE_PMD_NR), + nid, K(node_page_state(pgdat, NR_FILE_PMDMAPPED) * + HPAGE_PMD_NR) #endif - ); - n += hugetlb_report_node_meminfo(nid, buf + n); - return n; + ); + len += hugetlb_report_node_meminfo(nid, buf + len); + return len; } #undef K -static DEVICE_ATTR(meminfo, S_IRUGO, node_read_meminfo, NULL); +static DEVICE_ATTR(meminfo, 0444, node_read_meminfo, NULL); static ssize_t node_read_numastat(struct device *dev, - struct device_attribute *attr, char *buf) + struct device_attribute *attr, char *buf) { return sysfs_emit(buf, "numa_hit %lu\n" @@ -491,7 +497,7 @@ static ssize_t node_read_numastat(struct device *dev, sum_zone_numa_state(dev->id, NUMA_LOCAL), sum_zone_numa_state(dev->id, NUMA_OTHER)); } -static DEVICE_ATTR(numastat, S_IRUGO, node_read_numastat, NULL); +static DEVICE_ATTR(numastat, 0444, node_read_numastat, NULL); static ssize_t node_read_vmstat(struct device *dev, struct device_attribute *attr, char *buf) @@ -499,28 +505,31 @@ static ssize_t node_read_vmstat(struct device *dev, int nid = dev->id; struct pglist_data *pgdat = NODE_DATA(nid); int i; - int n = 0; + int len = 0; for (i = 0; i < NR_VM_ZONE_STAT_ITEMS; i++) - n += sprintf(buf+n, "%s %lu\n", zone_stat_name(i), - sum_zone_node_page_state(nid, i)); + len += sysfs_emit_at(buf, len, "%s %lu\n", + zone_stat_name(i), + sum_zone_node_page_state(nid, i)); #ifdef CONFIG_NUMA for (i = 0; i < NR_VM_NUMA_STAT_ITEMS; i++) - n += sprintf(buf+n, "%s %lu\n", numa_stat_name(i), - sum_zone_numa_state(nid, i)); + len += sysfs_emit_at(buf, len, "%s %lu\n", + numa_stat_name(i), + sum_zone_numa_state(nid, i)); + #endif - for (i = 0; i < NR_VM_NODE_STAT_ITEMS; i++) - n += sprintf(buf+n, "%s %lu\n", node_stat_name(i), - node_page_state_pages(pgdat, i)); + len += sysfs_emit_at(buf, len, "%s %lu\n", + node_stat_name(i), + node_page_state_pages(pgdat, i)); - return n; + return len; } -static DEVICE_ATTR(vmstat, S_IRUGO, node_read_vmstat, NULL); +static DEVICE_ATTR(vmstat, 0444, node_read_vmstat, NULL); static ssize_t node_read_distance(struct device *dev, - struct device_attribute *attr, char *buf) + struct device_attribute *attr, char *buf) { int nid = dev->id; int len = 0; @@ -532,13 +541,15 @@ static ssize_t node_read_distance(struct device *dev, */ BUILD_BUG_ON(MAX_NUMNODES * 4 > PAGE_SIZE); - for_each_online_node(i) - len += sprintf(buf + len, "%s%d", i ? " " : "", node_distance(nid, i)); + for_each_online_node(i) { + len += sysfs_emit_at(buf, len, "%s%d", + i ? " " : "", node_distance(nid, i)); + } - len += sprintf(buf + len, "\n"); + len += sysfs_emit_at(buf, len, "\n"); return len; } -static DEVICE_ATTR(distance, S_IRUGO, node_read_distance, NULL); +static DEVICE_ATTR(distance, 0444, node_read_distance, NULL); static struct attribute *node_dev_attrs[] = { &dev_attr_cpumap.attr, @@ -945,17 +956,6 @@ void unregister_one_node(int nid) * node states attributes */ -static ssize_t print_nodes_state(enum node_states state, char *buf) -{ - int n; - - n = scnprintf(buf, PAGE_SIZE - 1, "%*pbl", - nodemask_pr_args(&node_states[state])); - buf[n++] = '\n'; - buf[n] = '\0'; - return n; -} - struct node_attr { struct device_attribute attr; enum node_states state; @@ -965,7 +965,9 @@ static ssize_t show_node_state(struct device *dev, struct device_attribute *attr, char *buf) { struct node_attr *na = container_of(attr, struct node_attr, attr); - return print_nodes_state(na->state, buf); + + return sysfs_emit(buf, "%*pbl\n", + nodemask_pr_args(&node_states[na->state])); } #define _NODE_ATTR(name, state) \ diff --git a/drivers/base/platform.c b/drivers/base/platform.c index f0f8cfcc3621..88aef93eb4dd 100644 --- a/drivers/base/platform.c +++ b/drivers/base/platform.c @@ -1023,10 +1023,10 @@ EXPORT_SYMBOL_GPL(platform_unregister_drivers); * (b) sysfs attribute lets new-style coldplug recover from hotplug events * mishandled before system is fully running: "modprobe $(cat modalias)" */ -static ssize_t modalias_show(struct device *dev, struct device_attribute *a, - char *buf) +static ssize_t modalias_show(struct device *dev, + struct device_attribute *attr, char *buf) { - struct platform_device *pdev = to_platform_device(dev); + struct platform_device *pdev = to_platform_device(dev); int len; len = of_device_modalias(dev, buf, PAGE_SIZE); @@ -1037,9 +1037,7 @@ static ssize_t modalias_show(struct device *dev, struct device_attribute *a, if (len != -ENODEV) return len; - len = snprintf(buf, PAGE_SIZE, "platform:%s\n", pdev->name); - - return (len >= PAGE_SIZE) ? (PAGE_SIZE - 1) : len; + return sysfs_emit(buf, "platform:%s\n", pdev->name); } static DEVICE_ATTR_RO(modalias); @@ -1086,12 +1084,13 @@ static ssize_t driver_override_show(struct device *dev, device_lock(dev); len = sysfs_emit(buf, "%s\n", pdev->driver_override); device_unlock(dev); + return len; } static DEVICE_ATTR_RW(driver_override); static ssize_t numa_node_show(struct device *dev, - struct device_attribute *attr, char *buf) + struct device_attribute *attr, char *buf) { return sysfs_emit(buf, "%d\n", dev_to_node(dev)); } diff --git a/drivers/base/power/sysfs.c b/drivers/base/power/sysfs.c index e05207abb99e..a1474fb67db9 100644 --- a/drivers/base/power/sysfs.c +++ b/drivers/base/power/sysfs.c @@ -122,66 +122,70 @@ static ssize_t control_store(struct device * dev, struct device_attribute *attr, static DEVICE_ATTR_RW(control); static ssize_t runtime_active_time_show(struct device *dev, - struct device_attribute *attr, char *buf) + struct device_attribute *attr, + char *buf) { - int ret; u64 tmp = pm_runtime_active_time(dev); + do_div(tmp, NSEC_PER_MSEC); - ret = sysfs_emit(buf, "%llu\n", tmp); - return ret; + + return sysfs_emit(buf, "%llu\n", tmp); } static DEVICE_ATTR_RO(runtime_active_time); static ssize_t runtime_suspended_time_show(struct device *dev, - struct device_attribute *attr, char *buf) + struct device_attribute *attr, + char *buf) { - int ret; u64 tmp = pm_runtime_suspended_time(dev); + do_div(tmp, NSEC_PER_MSEC); - ret = sysfs_emit(buf, "%llu\n", tmp); - return ret; + + return sysfs_emit(buf, "%llu\n", tmp); } static DEVICE_ATTR_RO(runtime_suspended_time); static ssize_t runtime_status_show(struct device *dev, - struct device_attribute *attr, char *buf) + struct device_attribute *attr, char *buf) { - const char *p; + const char *output; if (dev->power.runtime_error) { - p = "error\n"; + output = "error"; } else if (dev->power.disable_depth) { - p = "unsupported\n"; + output = "unsupported"; } else { switch (dev->power.runtime_status) { case RPM_SUSPENDED: - p = "suspended\n"; + output = "suspended"; break; case RPM_SUSPENDING: - p = "suspending\n"; + output = "suspending"; break; case RPM_RESUMING: - p = "resuming\n"; + output = "resuming"; break; case RPM_ACTIVE: - p = "active\n"; + output = "active"; break; default: return -EIO; } } - return sysfs_emit(buf, p); + return sysfs_emit(buf, "%s\n", output); } static DEVICE_ATTR_RO(runtime_status); static ssize_t autosuspend_delay_ms_show(struct device *dev, - struct device_attribute *attr, char *buf) + struct device_attribute *attr, + char *buf) { if (!dev->power.use_autosuspend) return -EIO; + return sysfs_emit(buf, "%d\n", dev->power.autosuspend_delay); } @@ -345,7 +349,7 @@ static DEVICE_ATTR_RW(wakeup); static ssize_t wakeup_count_show(struct device *dev, struct device_attribute *attr, char *buf) { - unsigned long count = 0; + unsigned long count; bool enabled = false; spin_lock_irq(&dev->power.lock); @@ -354,7 +358,10 @@ static ssize_t wakeup_count_show(struct device *dev, enabled = true; } spin_unlock_irq(&dev->power.lock); - return enabled ? sprintf(buf, "%lu\n", count) : sprintf(buf, "\n"); + + if (!enabled) + return sysfs_emit(buf, "\n"); + return sysfs_emit(buf, "%lu\n", count); } static DEVICE_ATTR_RO(wakeup_count); @@ -363,7 +370,7 @@ static ssize_t wakeup_active_count_show(struct device *dev, struct device_attribute *attr, char *buf) { - unsigned long count = 0; + unsigned long count; bool enabled = false; spin_lock_irq(&dev->power.lock); @@ -372,7 +379,10 @@ static ssize_t wakeup_active_count_show(struct device *dev, enabled = true; } spin_unlock_irq(&dev->power.lock); - return enabled ? sprintf(buf, "%lu\n", count) : sprintf(buf, "\n"); + + if (!enabled) + return sysfs_emit(buf, "\n"); + return sysfs_emit(buf, "%lu\n", count); } static DEVICE_ATTR_RO(wakeup_active_count); @@ -381,7 +391,7 @@ static ssize_t wakeup_abort_count_show(struct device *dev, struct device_attribute *attr, char *buf) { - unsigned long count = 0; + unsigned long count; bool enabled = false; spin_lock_irq(&dev->power.lock); @@ -390,7 +400,10 @@ static ssize_t wakeup_abort_count_show(struct device *dev, enabled = true; } spin_unlock_irq(&dev->power.lock); - return enabled ? sprintf(buf, "%lu\n", count) : sprintf(buf, "\n"); + + if (!enabled) + return sysfs_emit(buf, "\n"); + return sysfs_emit(buf, "%lu\n", count); } static DEVICE_ATTR_RO(wakeup_abort_count); @@ -399,7 +412,7 @@ static ssize_t wakeup_expire_count_show(struct device *dev, struct device_attribute *attr, char *buf) { - unsigned long count = 0; + unsigned long count; bool enabled = false; spin_lock_irq(&dev->power.lock); @@ -408,7 +421,10 @@ static ssize_t wakeup_expire_count_show(struct device *dev, enabled = true; } spin_unlock_irq(&dev->power.lock); - return enabled ? sprintf(buf, "%lu\n", count) : sprintf(buf, "\n"); + + if (!enabled) + return sysfs_emit(buf, "\n"); + return sysfs_emit(buf, "%lu\n", count); } static DEVICE_ATTR_RO(wakeup_expire_count); @@ -416,7 +432,7 @@ static DEVICE_ATTR_RO(wakeup_expire_count); static ssize_t wakeup_active_show(struct device *dev, struct device_attribute *attr, char *buf) { - unsigned int active = 0; + unsigned int active; bool enabled = false; spin_lock_irq(&dev->power.lock); @@ -425,7 +441,10 @@ static ssize_t wakeup_active_show(struct device *dev, enabled = true; } spin_unlock_irq(&dev->power.lock); - return enabled ? sprintf(buf, "%u\n", active) : sprintf(buf, "\n"); + + if (!enabled) + return sysfs_emit(buf, "\n"); + return sysfs_emit(buf, "%u\n", active); } static DEVICE_ATTR_RO(wakeup_active); @@ -434,7 +453,7 @@ static ssize_t wakeup_total_time_ms_show(struct device *dev, struct device_attribute *attr, char *buf) { - s64 msec = 0; + s64 msec; bool enabled = false; spin_lock_irq(&dev->power.lock); @@ -443,7 +462,10 @@ static ssize_t wakeup_total_time_ms_show(struct device *dev, enabled = true; } spin_unlock_irq(&dev->power.lock); - return enabled ? sprintf(buf, "%lld\n", msec) : sprintf(buf, "\n"); + + if (!enabled) + return sysfs_emit(buf, "\n"); + return sysfs_emit(buf, "%lld\n", msec); } static DEVICE_ATTR_RO(wakeup_total_time_ms); @@ -451,7 +473,7 @@ static DEVICE_ATTR_RO(wakeup_total_time_ms); static ssize_t wakeup_max_time_ms_show(struct device *dev, struct device_attribute *attr, char *buf) { - s64 msec = 0; + s64 msec; bool enabled = false; spin_lock_irq(&dev->power.lock); @@ -460,7 +482,10 @@ static ssize_t wakeup_max_time_ms_show(struct device *dev, enabled = true; } spin_unlock_irq(&dev->power.lock); - return enabled ? sprintf(buf, "%lld\n", msec) : sprintf(buf, "\n"); + + if (!enabled) + return sysfs_emit(buf, "\n"); + return sysfs_emit(buf, "%lld\n", msec); } static DEVICE_ATTR_RO(wakeup_max_time_ms); @@ -469,7 +494,7 @@ static ssize_t wakeup_last_time_ms_show(struct device *dev, struct device_attribute *attr, char *buf) { - s64 msec = 0; + s64 msec; bool enabled = false; spin_lock_irq(&dev->power.lock); @@ -478,7 +503,10 @@ static ssize_t wakeup_last_time_ms_show(struct device *dev, enabled = true; } spin_unlock_irq(&dev->power.lock); - return enabled ? sprintf(buf, "%lld\n", msec) : sprintf(buf, "\n"); + + if (!enabled) + return sysfs_emit(buf, "\n"); + return sysfs_emit(buf, "%lld\n", msec); } static inline int dpm_sysfs_wakeup_change_owner(struct device *dev, kuid_t kuid, @@ -496,7 +524,7 @@ static ssize_t wakeup_prevent_sleep_time_ms_show(struct device *dev, struct device_attribute *attr, char *buf) { - s64 msec = 0; + s64 msec; bool enabled = false; spin_lock_irq(&dev->power.lock); @@ -505,7 +533,10 @@ static ssize_t wakeup_prevent_sleep_time_ms_show(struct device *dev, enabled = true; } spin_unlock_irq(&dev->power.lock); - return enabled ? sprintf(buf, "%lld\n", msec) : sprintf(buf, "\n"); + + if (!enabled) + return sysfs_emit(buf, "\n"); + return sysfs_emit(buf, "%lld\n", msec); } static DEVICE_ATTR_RO(wakeup_prevent_sleep_time_ms); diff --git a/drivers/base/power/wakeup_stats.c b/drivers/base/power/wakeup_stats.c index 5568e25d7c9c..d638259b829a 100644 --- a/drivers/base/power/wakeup_stats.c +++ b/drivers/base/power/wakeup_stats.c @@ -26,7 +26,7 @@ static ssize_t _name##_show(struct device *dev, \ { \ struct wakeup_source *ws = dev_get_drvdata(dev); \ \ - return sprintf(buf, "%lu\n", ws->_name); \ + return sysfs_emit(buf, "%lu\n", ws->_name); \ } \ static DEVICE_ATTR_RO(_name) @@ -57,6 +57,7 @@ static ssize_t total_time_ms_show(struct device *dev, active_time = ktime_sub(ktime_get(), ws->last_time); total_time = ktime_add(total_time, active_time); } + return sysfs_emit(buf, "%lld\n", ktime_to_ms(total_time)); } static DEVICE_ATTR_RO(total_time_ms); @@ -73,6 +74,7 @@ static ssize_t max_time_ms_show(struct device *dev, if (active_time > max_time) max_time = active_time; } + return sysfs_emit(buf, "%lld\n", ktime_to_ms(max_time)); } static DEVICE_ATTR_RO(max_time_ms); @@ -106,6 +108,7 @@ static ssize_t prevent_suspend_time_ms_show(struct device *dev, prevent_sleep_time = ktime_add(prevent_sleep_time, ktime_sub(ktime_get(), ws->start_prevent_time)); } + return sysfs_emit(buf, "%lld\n", ktime_to_ms(prevent_sleep_time)); } static DEVICE_ATTR_RO(prevent_suspend_time_ms); diff --git a/drivers/base/soc.c b/drivers/base/soc.c index fc6536a7eac6..d34609bb7386 100644 --- a/drivers/base/soc.c +++ b/drivers/base/soc.c @@ -17,9 +17,9 @@ static DEFINE_IDA(soc_ida); -static ssize_t soc_info_get(struct device *dev, - struct device_attribute *attr, - char *buf); +/* Prototype to allow declarations of DEVICE_ATTR() before soc_info_show */ +static ssize_t soc_info_show(struct device *dev, struct device_attribute *attr, + char *buf); struct soc_device { struct device dev; @@ -31,11 +31,11 @@ static struct bus_type soc_bus_type = { .name = "soc", }; -static DEVICE_ATTR(machine, S_IRUGO, soc_info_get, NULL); -static DEVICE_ATTR(family, S_IRUGO, soc_info_get, NULL); -static DEVICE_ATTR(serial_number, S_IRUGO, soc_info_get, NULL); -static DEVICE_ATTR(soc_id, S_IRUGO, soc_info_get, NULL); -static DEVICE_ATTR(revision, S_IRUGO, soc_info_get, NULL); +static DEVICE_ATTR(machine, 0444, soc_info_show, NULL); +static DEVICE_ATTR(family, 0444, soc_info_show, NULL); +static DEVICE_ATTR(serial_number, 0444, soc_info_show, NULL); +static DEVICE_ATTR(soc_id, 0444, soc_info_show, NULL); +static DEVICE_ATTR(revision, 0444, soc_info_show, NULL); struct device *soc_device_to_device(struct soc_device *soc_dev) { @@ -49,45 +49,41 @@ static umode_t soc_attribute_mode(struct kobject *kobj, struct device *dev = kobj_to_dev(kobj); struct soc_device *soc_dev = container_of(dev, struct soc_device, dev); - if ((attr == &dev_attr_machine.attr) - && (soc_dev->attr->machine != NULL)) + if ((attr == &dev_attr_machine.attr) && soc_dev->attr->machine) return attr->mode; - if ((attr == &dev_attr_family.attr) - && (soc_dev->attr->family != NULL)) + if ((attr == &dev_attr_family.attr) && soc_dev->attr->family) return attr->mode; - if ((attr == &dev_attr_revision.attr) - && (soc_dev->attr->revision != NULL)) + if ((attr == &dev_attr_revision.attr) && soc_dev->attr->revision) return attr->mode; - if ((attr == &dev_attr_serial_number.attr) - && (soc_dev->attr->serial_number != NULL)) + if ((attr == &dev_attr_serial_number.attr) && soc_dev->attr->serial_number) return attr->mode; - if ((attr == &dev_attr_soc_id.attr) - && (soc_dev->attr->soc_id != NULL)) + if ((attr == &dev_attr_soc_id.attr) && soc_dev->attr->soc_id) return attr->mode; - /* Unknown or unfilled attribute. */ + /* Unknown or unfilled attribute */ return 0; } -static ssize_t soc_info_get(struct device *dev, - struct device_attribute *attr, - char *buf) +static ssize_t soc_info_show(struct device *dev, struct device_attribute *attr, + char *buf) { struct soc_device *soc_dev = container_of(dev, struct soc_device, dev); + const char *output; if (attr == &dev_attr_machine) - return sysfs_emit(buf, "%s\n", soc_dev->attr->machine); - if (attr == &dev_attr_family) - return sysfs_emit(buf, "%s\n", soc_dev->attr->family); - if (attr == &dev_attr_revision) - return sysfs_emit(buf, "%s\n", soc_dev->attr->revision); - if (attr == &dev_attr_serial_number) - return sysfs_emit(buf, "%s\n", soc_dev->attr->serial_number); - if (attr == &dev_attr_soc_id) - return sysfs_emit(buf, "%s\n", soc_dev->attr->soc_id); - - return -EINVAL; + output = soc_dev->attr->machine; + else if (attr == &dev_attr_family) + output = soc_dev->attr->family; + else if (attr == &dev_attr_revision) + output = soc_dev->attr->revision; + else if (attr == &dev_attr_serial_number) + output = soc_dev->attr->serial_number; + else if (attr == &dev_attr_soc_id) + output = soc_dev->attr->soc_id; + else + return -EINVAL; + return sysfs_emit(buf, "%s\n", output); } static struct attribute *soc_attr[] = { diff --git a/drivers/base/topology.c b/drivers/base/topology.c index ad8d33c6077b..4d254fcc93d1 100644 --- a/drivers/base/topology.c +++ b/drivers/base/topology.c @@ -14,11 +14,11 @@ #include #include -#define define_id_show_func(name) \ -static ssize_t name##_show(struct device *dev, \ - struct device_attribute *attr, char *buf) \ -{ \ - return sprintf(buf, "%d\n", topology_##name(dev->id)); \ +#define define_id_show_func(name) \ +static ssize_t name##_show(struct device *dev, \ + struct device_attribute *attr, char *buf) \ +{ \ + return sysfs_emit(buf, "%d\n", topology_##name(dev->id)); \ } #define define_siblings_show_map(name, mask) \ From 7981593bf083801035b1f1377661849805acb216 Mon Sep 17 00:00:00 2001 From: Joe Perches Date: Wed, 16 Sep 2020 13:40:43 -0700 Subject: [PATCH 388/433] mm: and drivers core: Convert hugetlb_report_node_meminfo to sysfs_emit Convert the unbound sprintf in hugetlb_report_node_meminfo to use sysfs_emit_at so that no possible overrun of a PAGE_SIZE buf can occur. Signed-off-by: Joe Perches Acked-by: Mike Kravetz Link: https://lore.kernel.org/r/894b351b82da6013cde7f36ff4b5493cd0ec30d0.1600285923.git.joe@perches.com Signed-off-by: Greg Kroah-Hartman --- drivers/base/node.c | 2 +- include/linux/hugetlb.h | 4 ++-- mm/hugetlb.c | 18 ++++++++++-------- 3 files changed, 13 insertions(+), 11 deletions(-) diff --git a/drivers/base/node.c b/drivers/base/node.c index 96d820f979a2..6366f94f8afb 100644 --- a/drivers/base/node.c +++ b/drivers/base/node.c @@ -473,7 +473,7 @@ static ssize_t node_read_meminfo(struct device *dev, HPAGE_PMD_NR) #endif ); - len += hugetlb_report_node_meminfo(nid, buf + len); + len += hugetlb_report_node_meminfo(buf, len, nid); return len; } diff --git a/include/linux/hugetlb.h b/include/linux/hugetlb.h index d5cc5f802dd4..ebca2ef02212 100644 --- a/include/linux/hugetlb.h +++ b/include/linux/hugetlb.h @@ -129,7 +129,7 @@ void __unmap_hugepage_range(struct mmu_gather *tlb, struct vm_area_struct *vma, unsigned long start, unsigned long end, struct page *ref_page); void hugetlb_report_meminfo(struct seq_file *); -int hugetlb_report_node_meminfo(int, char *); +int hugetlb_report_node_meminfo(char *buf, int len, int nid); void hugetlb_show_meminfo(void); unsigned long hugetlb_total_pages(void); vm_fault_t hugetlb_fault(struct mm_struct *mm, struct vm_area_struct *vma, @@ -245,7 +245,7 @@ static inline void hugetlb_report_meminfo(struct seq_file *m) { } -static inline int hugetlb_report_node_meminfo(int nid, char *buf) +static inline int hugetlb_report_node_meminfo(char *buf, int len, int nid) { return 0; } diff --git a/mm/hugetlb.c b/mm/hugetlb.c index 67fc6383995b..365ef52a5b29 100644 --- a/mm/hugetlb.c +++ b/mm/hugetlb.c @@ -3582,18 +3582,20 @@ void hugetlb_report_meminfo(struct seq_file *m) seq_printf(m, "Hugetlb: %8lu kB\n", total / 1024); } -int hugetlb_report_node_meminfo(int nid, char *buf) +int hugetlb_report_node_meminfo(char *buf, int len, int nid) { struct hstate *h = &default_hstate; + if (!hugepages_supported()) return 0; - return sprintf(buf, - "Node %d HugePages_Total: %5u\n" - "Node %d HugePages_Free: %5u\n" - "Node %d HugePages_Surp: %5u\n", - nid, h->nr_huge_pages_node[nid], - nid, h->free_huge_pages_node[nid], - nid, h->surplus_huge_pages_node[nid]); + + return sysfs_emit_at(buf, len, + "Node %d HugePages_Total: %5u\n" + "Node %d HugePages_Free: %5u\n" + "Node %d HugePages_Surp: %5u\n", + nid, h->nr_huge_pages_node[nid], + nid, h->free_huge_pages_node[nid], + nid, h->surplus_huge_pages_node[nid]); } void hugetlb_show_meminfo(void) From e015e036aea58fe5b7f92d2d4fff9f4364e649c8 Mon Sep 17 00:00:00 2001 From: Joe Perches Date: Wed, 16 Sep 2020 13:40:44 -0700 Subject: [PATCH 389/433] drivers core: Use sysfs_emit for shared_cpu_map_show and shared_cpu_list_show Do not indirect the bitmap printing of these shared_cpu show functions by using cpumap_print_to_pagebuf/bitmap_print_to_pagebuf. Use the more typical style with the vsnprintf %*pb and %*pbl extensions directly so there is no possible mixup about the use of offset_in_page(buf) by bitmap_print_to_pagebuf. Signed-off-by: Joe Perches Link: https://lore.kernel.org/r/80457b467ab6cde13a173cfd8a4f49cd8467a7fd.1600285923.git.joe@perches.com Signed-off-by: Greg Kroah-Hartman --- drivers/base/cacheinfo.c | 16 +++++++--------- 1 file changed, 7 insertions(+), 9 deletions(-) diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c index 4946647bd985..bfc095956dd1 100644 --- a/drivers/base/cacheinfo.c +++ b/drivers/base/cacheinfo.c @@ -380,24 +380,22 @@ static ssize_t size_show(struct device *dev, return sysfs_emit(buf, "%uK\n", this_leaf->size >> 10); } -static ssize_t shared_cpumap_show_func(struct device *dev, bool list, char *buf) +static ssize_t shared_cpu_map_show(struct device *dev, + struct device_attribute *attr, char *buf) { struct cacheinfo *this_leaf = dev_get_drvdata(dev); const struct cpumask *mask = &this_leaf->shared_cpu_map; - return cpumap_print_to_pagebuf(list, buf, mask); -} - -static ssize_t shared_cpu_map_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - return shared_cpumap_show_func(dev, false, buf); + return sysfs_emit(buf, "%*pb\n", nr_cpu_ids, mask); } static ssize_t shared_cpu_list_show(struct device *dev, struct device_attribute *attr, char *buf) { - return shared_cpumap_show_func(dev, true, buf); + struct cacheinfo *this_leaf = dev_get_drvdata(dev); + const struct cpumask *mask = &this_leaf->shared_cpu_map; + + return sysfs_emit(buf, "%*pbl\n", nr_cpu_ids, mask); } static ssize_t type_show(struct device *dev, From 6284a6e8940341beb71ea7970388418eb3dd473d Mon Sep 17 00:00:00 2001 From: Joe Perches Date: Wed, 16 Sep 2020 13:40:45 -0700 Subject: [PATCH 390/433] drivers core: node: Use a more typical macro definition style for ACCESS_ATTR Remove the trailing semicolon from the macro and add it to its uses. Signed-off-by: Joe Perches Link: https://lore.kernel.org/r/faf51a671160cf884efa68fb458d3e8a44b1a7a7.1600285923.git.joe@perches.com Signed-off-by: Greg Kroah-Hartman --- drivers/base/node.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/base/node.c b/drivers/base/node.c index 6366f94f8afb..9b0c257554fd 100644 --- a/drivers/base/node.c +++ b/drivers/base/node.c @@ -165,12 +165,12 @@ static ssize_t name##_show(struct device *dev, \ return sysfs_emit(buf, "%u\n", \ to_access_nodes(dev)->hmem_attrs.name); \ } \ -static DEVICE_ATTR_RO(name); +static DEVICE_ATTR_RO(name) -ACCESS_ATTR(read_bandwidth) -ACCESS_ATTR(read_latency) -ACCESS_ATTR(write_bandwidth) -ACCESS_ATTR(write_latency) +ACCESS_ATTR(read_bandwidth); +ACCESS_ATTR(read_latency); +ACCESS_ATTR(write_bandwidth); +ACCESS_ATTR(write_latency); static struct attribute *access_attrs[] = { &dev_attr_read_bandwidth.attr, From a27eb0cb4b2104461de1a1284059b3ac875e45b5 Mon Sep 17 00:00:00 2001 From: Andrzej Pietrasiewicz Date: Tue, 18 Aug 2020 13:28:24 +0200 Subject: [PATCH 391/433] tty/sysrq: Extend the sysrq_key_table to cover capital letters All slots in sysrq_key_table[] are either used, reserved or at least commented with their intended use. This patch adds capital letter versions available, which means adding 26 more entries. For already existing SysRq operations the user presses Alt-SysRq-, and for the newly added ones Alt-Shift-SysRq-. Signed-off-by: Andrzej Pietrasiewicz Acked-by: Daniel Vetter Link: https://lore.kernel.org/r/20200818112825.6445-2-andrzej.p@collabora.com Signed-off-by: Greg Kroah-Hartman --- Documentation/admin-guide/sysrq.rst | 2 ++ drivers/gpu/drm/drm_fb_helper.c | 2 +- drivers/tty/sysrq.c | 49 +++++++++++++++++++++++++++-- 3 files changed, 50 insertions(+), 3 deletions(-) diff --git a/Documentation/admin-guide/sysrq.rst b/Documentation/admin-guide/sysrq.rst index e6424d8c5846..67dfa4c29093 100644 --- a/Documentation/admin-guide/sysrq.rst +++ b/Documentation/admin-guide/sysrq.rst @@ -79,6 +79,8 @@ On all echo t > /proc/sysrq-trigger +The :kbd:`` is case sensitive. + What are the 'command' keys? ~~~~~~~~~~~~~~~~~~~~~~~~~~~~ diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c index 8697554ccd41..1543d9d10970 100644 --- a/drivers/gpu/drm/drm_fb_helper.c +++ b/drivers/gpu/drm/drm_fb_helper.c @@ -325,7 +325,7 @@ static void drm_fb_helper_sysrq(int dummy1) static const struct sysrq_key_op sysrq_drm_fb_helper_restore_op = { .handler = drm_fb_helper_sysrq, - .help_msg = "force-fb(V)", + .help_msg = "force-fb(v)", .action_msg = "Restore framebuffer console", }; #else diff --git a/drivers/tty/sysrq.c b/drivers/tty/sysrq.c index a8e39b2cdd55..959f9e121cc6 100644 --- a/drivers/tty/sysrq.c +++ b/drivers/tty/sysrq.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -440,7 +441,7 @@ static const struct sysrq_key_op sysrq_unrt_op = { /* Key Operations table and lock */ static DEFINE_SPINLOCK(sysrq_key_table_lock); -static const struct sysrq_key_op *sysrq_key_table[36] = { +static const struct sysrq_key_op *sysrq_key_table[62] = { &sysrq_loglevel_op, /* 0 */ &sysrq_loglevel_op, /* 1 */ &sysrq_loglevel_op, /* 2 */ @@ -497,6 +498,32 @@ static const struct sysrq_key_op *sysrq_key_table[36] = { /* y: May be registered on sparc64 for global register dump */ NULL, /* y */ &sysrq_ftrace_dump_op, /* z */ + NULL, /* A */ + NULL, /* B */ + NULL, /* C */ + NULL, /* D */ + NULL, /* E */ + NULL, /* F */ + NULL, /* G */ + NULL, /* H */ + NULL, /* I */ + NULL, /* J */ + NULL, /* K */ + NULL, /* L */ + NULL, /* M */ + NULL, /* N */ + NULL, /* O */ + NULL, /* P */ + NULL, /* Q */ + NULL, /* R */ + NULL, /* S */ + NULL, /* T */ + NULL, /* U */ + NULL, /* V */ + NULL, /* W */ + NULL, /* X */ + NULL, /* Y */ + NULL, /* Z */ }; /* key2index calculation, -1 on invalid index */ @@ -508,6 +535,8 @@ static int sysrq_key_table_key2index(int key) retval = key - '0'; else if ((key >= 'a') && (key <= 'z')) retval = key + 10 - 'a'; + else if ((key >= 'A') && (key <= 'Z')) + retval = key + 36 - 'A'; else retval = -1; return retval; @@ -621,6 +650,8 @@ struct sysrq_state { unsigned long key_down[BITS_TO_LONGS(KEY_CNT)]; unsigned int alt; unsigned int alt_use; + unsigned int shift; + unsigned int shift_use; bool active; bool need_reinject; bool reinjecting; @@ -805,10 +836,20 @@ static bool sysrq_handle_keypress(struct sysrq_state *sysrq, } break; + case KEY_LEFTSHIFT: + case KEY_RIGHTSHIFT: + if (!value) + sysrq->shift = KEY_RESERVED; + else if (value != 2) + sysrq->shift = code; + break; + case KEY_SYSRQ: if (value == 1 && sysrq->alt != KEY_RESERVED) { sysrq->active = true; sysrq->alt_use = sysrq->alt; + /* either RESERVED (for released) or actual code */ + sysrq->shift_use = sysrq->shift; /* * If nothing else will be pressed we'll need * to re-inject Alt-SysRq keysroke. @@ -831,8 +872,12 @@ static bool sysrq_handle_keypress(struct sysrq_state *sysrq, default: if (sysrq->active && value && value != 2) { + unsigned char c = sysrq_xlate[code]; + sysrq->need_reinject = false; - __handle_sysrq(sysrq_xlate[code], true); + if (sysrq->shift_use != KEY_RESERVED) + c = toupper(c); + __handle_sysrq(c, true); } break; } From 44577f1d98545fff565df81793418e40eecc7394 Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Wed, 23 Sep 2020 20:48:03 +0200 Subject: [PATCH 392/433] platform/x86: intel_pmc_core: do not create a static struct device A struct device is a dynamic structure, with reference counting. "Tricking" the kernel to make a dynamic structure static, by working around the driver core release detection logic, is not nice. Because of this, this code has been used as an example for others on "how to do things", which is just about the worst thing possible to have happen. Fix this all up by making the platform device dynamic and providing a real release function. Fixes: b02f6a2ef0a1 ("platform/x86: intel_pmc_core: Attach using APCI HID "INT33A1"") Cc: Rajneesh Bhardwaj Cc: Vishwanath Somayaji Cc: Darren Hart Cc: Andy Shevchenko Reported-by: Maximilian Luz Reviewed-by: Hans de Goede Acked-by: Rajat Jain Link: https://lore.kernel.org/r/20200923184803.192265-1-gregkh@linuxfoundation.org Signed-off-by: Greg Kroah-Hartman --- drivers/platform/x86/intel_pmc_core_pltdrv.c | 26 +++++++++++++------- 1 file changed, 17 insertions(+), 9 deletions(-) diff --git a/drivers/platform/x86/intel_pmc_core_pltdrv.c b/drivers/platform/x86/intel_pmc_core_pltdrv.c index 731281855cc8..73797680b895 100644 --- a/drivers/platform/x86/intel_pmc_core_pltdrv.c +++ b/drivers/platform/x86/intel_pmc_core_pltdrv.c @@ -20,15 +20,10 @@ static void intel_pmc_core_release(struct device *dev) { - /* Nothing to do. */ + kfree(dev); } -static struct platform_device pmc_core_device = { - .name = "intel_pmc_core", - .dev = { - .release = intel_pmc_core_release, - }, -}; +static struct platform_device *pmc_core_device; /* * intel_pmc_core_platform_ids is the list of platforms where we want to @@ -52,6 +47,8 @@ MODULE_DEVICE_TABLE(x86cpu, intel_pmc_core_platform_ids); static int __init pmc_core_platform_init(void) { + int retval; + /* Skip creating the platform device if ACPI already has a device */ if (acpi_dev_present("INT33A1", NULL, -1)) return -ENODEV; @@ -59,12 +56,23 @@ static int __init pmc_core_platform_init(void) if (!x86_match_cpu(intel_pmc_core_platform_ids)) return -ENODEV; - return platform_device_register(&pmc_core_device); + pmc_core_device = kzalloc(sizeof(*pmc_core_device), GFP_KERNEL); + if (!pmc_core_device) + return -ENOMEM; + + pmc_core_device->name = "intel_pmc_core"; + pmc_core_device->dev.release = intel_pmc_core_release; + + retval = platform_device_register(pmc_core_device); + if (retval) + kfree(pmc_core_device); + + return retval; } static void __exit pmc_core_platform_exit(void) { - platform_device_unregister(&pmc_core_device); + platform_device_unregister(pmc_core_device); } module_init(pmc_core_platform_init); From ee4906770ee931394179bcd42cabb196bc952276 Mon Sep 17 00:00:00 2001 From: Julia Lawall Date: Sun, 27 Sep 2020 21:12:24 +0200 Subject: [PATCH 393/433] regmap: debugfs: use semicolons rather than commas to separate statements Replace commas with semicolons. What is done is essentially described by the following Coccinelle semantic patch (http://coccinelle.lip6.fr/): // @@ expression e1,e2; @@ e1 -, +; e2 ... when any // Signed-off-by: Julia Lawall Link: https://lore.kernel.org/r/1601233948-11629-15-git-send-email-Julia.Lawall@inria.fr Signed-off-by: Greg Kroah-Hartman --- drivers/base/regmap/regmap-debugfs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/base/regmap/regmap-debugfs.c b/drivers/base/regmap/regmap-debugfs.c index f58baff2be0a..d177924e6375 100644 --- a/drivers/base/regmap/regmap-debugfs.c +++ b/drivers/base/regmap/regmap-debugfs.c @@ -184,7 +184,7 @@ static inline void regmap_calc_tot_len(struct regmap *map, { /* Calculate the length of a fixed format */ if (!map->debugfs_tot_len) { - map->debugfs_reg_len = regmap_calc_reg_len(map->max_register), + map->debugfs_reg_len = regmap_calc_reg_len(map->max_register); map->debugfs_val_len = 2 * map->format.val_bytes; map->debugfs_tot_len = map->debugfs_reg_len + map->debugfs_val_len + 3; /* : \n */ From bfeb28539d1f61829232883ced0986569218c4de Mon Sep 17 00:00:00 2001 From: Tetsuo Handa Date: Tue, 15 Sep 2020 09:00:19 +0900 Subject: [PATCH 394/433] fbcon: remove no-op fbcon_set_origin() We don't need to call vc->vc_sw->con_set_origin() from set_origin() if it is no-op. Signed-off-by: Tetsuo Handa Link: https://lore.kernel.org/r/20200915000019.3422-3-penguin-kernel@I-love.SAKURA.ne.jp Signed-off-by: Greg Kroah-Hartman --- drivers/video/fbdev/core/fbcon.c | 8 -------- 1 file changed, 8 deletions(-) diff --git a/drivers/video/fbdev/core/fbcon.c b/drivers/video/fbdev/core/fbcon.c index 6fea22c4642c..ad0862d6c1a9 100644 --- a/drivers/video/fbdev/core/fbcon.c +++ b/drivers/video/fbdev/core/fbcon.c @@ -163,8 +163,6 @@ static const struct consw fb_con; #define advance_row(p, delta) (unsigned short *)((unsigned long)(p) + (delta) * vc->vc_size_row) -static int fbcon_set_origin(struct vc_data *); - static int fbcon_cursor_noblink; #define divides(a, b) ((!(a) || (b)%(a)) ? 0 : 1) @@ -2635,11 +2633,6 @@ static void fbcon_invert_region(struct vc_data *vc, u16 * p, int cnt) } } -static int fbcon_set_origin(struct vc_data *vc) -{ - return 0; -} - void fbcon_suspended(struct fb_info *info) { struct vc_data *vc = NULL; @@ -3110,7 +3103,6 @@ static const struct consw fb_con = { .con_font_default = fbcon_set_def_font, .con_font_copy = fbcon_copy_font, .con_set_palette = fbcon_set_palette, - .con_set_origin = fbcon_set_origin, .con_invert_region = fbcon_invert_region, .con_screen_pos = fbcon_screen_pos, .con_getxy = fbcon_getxy, From 328162a8824cfefe4f891200bc77c0bf3e7fe5ff Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Fri, 2 Oct 2020 07:53:36 +0100 Subject: [PATCH 395/433] mfd: sl28cpld: Depend on I2C Fixes the following randconfig build error: ld: drivers/mfd/simple-mfd-i2c.o: in function `simple_mfd_i2c_probe': simple-mfd-i2c.c:(.text+0x48): undefined reference to `__devm_regmap_init_i2c' ld: drivers/mfd/simple-mfd-i2c.o: in function `simple_mfd_i2c_driver_init': simple-mfd-i2c.c:(.init.text+0x14): undefined reference to `i2c_register_driver' ld: drivers/mfd/simple-mfd-i2c.o: in function `simple_mfd_i2c_driver_exit': simple-mfd-i2c.c:(.exit.text+0xd): undefined reference to `i2c_del_driver' Reported-by: Randy Dunlap Tested-by: Randy Dunlap # build-tested Acked-by: Randy Dunlap Signed-off-by: Lee Jones --- drivers/mfd/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index bdf8cb962027..8b99a13669bf 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -1188,6 +1188,7 @@ config MFD_SIMPLE_MFD_I2C config MFD_SL28CPLD tristate "Kontron sl28cpld Board Management Controller" + depends on I2C select MFD_SIMPLE_MFD_I2C help Say yes here to enable support for the Kontron sl28cpld board From 6d81dc3c79d46b66b29712eb1ac5ad2cbe4231d2 Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Fri, 2 Oct 2020 07:56:18 +0100 Subject: [PATCH 396/433] mfd: kempld-core: Fix unused variable 'kempld_acpi_table' when !ACPI drivers/mfd/kempld-core.c:556:36: warning: unused variable 'kempld_acpi_table' [-Wunused-const-variable] Signed-off-by: Lee Jones --- drivers/mfd/kempld-core.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mfd/kempld-core.c b/drivers/mfd/kempld-core.c index 1dfe556df038..2c9295953c11 100644 --- a/drivers/mfd/kempld-core.c +++ b/drivers/mfd/kempld-core.c @@ -553,11 +553,13 @@ static int kempld_remove(struct platform_device *pdev) return 0; } +#ifdef CONFIG_ACPI static const struct acpi_device_id kempld_acpi_table[] = { { "KEM0001", (kernel_ulong_t)&kempld_platform_data_generic }, {} }; MODULE_DEVICE_TABLE(acpi, kempld_acpi_table); +#endif static struct platform_driver kempld_driver = { .driver = { From f4eef224a09f4ea4344211dabfb875dd865df479 Mon Sep 17 00:00:00 2001 From: Angelo Dureghello Date: Sun, 4 Oct 2020 18:11:44 +0200 Subject: [PATCH 397/433] serial: fsl_lpuart: add sysrq support when using dma Add handling of magic sysrq keys when using dma/edma. Tested by sending BREAK followed by a sysrq command inside a 5 secs time window, by: echo 1 > /proc/sys/kernel/sysrq BREAK + h, t, e, b, c Tested also sending a command after 5 secs after BREAK, that's properly ignored. Signed-off-by: Angelo Dureghello Link: https://lore.kernel.org/r/20201004161144.1307174-1-angelo.dureghello@timesys.com Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/fsl_lpuart.c | 57 +++++++++++++++++++++++++++++++++ 1 file changed, 57 insertions(+) diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c index 590c901a1fc5..ff4b88c637d0 100644 --- a/drivers/tty/serial/fsl_lpuart.c +++ b/drivers/tty/serial/fsl_lpuart.c @@ -976,6 +976,15 @@ static irqreturn_t lpuart_int(int irq, void *dev_id) sts = readb(sport->port.membase + UARTSR1); + /* SysRq, using dma, check for linebreak by framing err. */ + if (sts & UARTSR1_FE && sport->lpuart_dma_rx_use) { + readb(sport->port.membase + UARTDR); + uart_handle_break(&sport->port); + /* linebreak produces some garbage, removing it */ + writeb(UARTCFIFO_RXFLUSH, sport->port.membase + UARTCFIFO); + return IRQ_HANDLED; + } + if (sts & UARTSR1_RDRF && !sport->lpuart_dma_rx_use) lpuart_rxint(sport); @@ -1004,6 +1013,37 @@ static irqreturn_t lpuart32_int(int irq, void *dev_id) return IRQ_HANDLED; } + +static inline void lpuart_handle_sysrq_chars(struct uart_port *port, + unsigned char *p, int count) +{ + while (count--) { + if (*p && uart_handle_sysrq_char(port, *p)) + return; + p++; + } +} + +static void lpuart_handle_sysrq(struct lpuart_port *sport) +{ + struct circ_buf *ring = &sport->rx_ring; + int count; + + if (ring->head < ring->tail) { + count = sport->rx_sgl.length - ring->tail; + lpuart_handle_sysrq_chars(&sport->port, + ring->buf + ring->tail, count); + ring->tail = 0; + } + + if (ring->head > ring->tail) { + count = ring->head - ring->tail; + lpuart_handle_sysrq_chars(&sport->port, + ring->buf + ring->tail, count); + ring->tail = ring->head; + } +} + static void lpuart_copy_rx_to_tty(struct lpuart_port *sport) { struct tty_port *port = &sport->port.state->port; @@ -1090,6 +1130,15 @@ static void lpuart_copy_rx_to_tty(struct lpuart_port *sport) */ ring->head = sport->rx_sgl.length - state.residue; BUG_ON(ring->head > sport->rx_sgl.length); + + /* + * Silent handling of keys pressed in the sysrq timeframe + */ + if (sport->port.sysrq) { + lpuart_handle_sysrq(sport); + goto exit; + } + /* * At this point ring->head may point to the first byte right after the * last byte of the dma buffer: @@ -1121,6 +1170,7 @@ static void lpuart_copy_rx_to_tty(struct lpuart_port *sport) sport->port.icount.rx += count; } +exit: dma_sync_sg_for_device(chan->device->dev, &sport->rx_sgl, 1, DMA_FROM_DEVICE); @@ -1557,6 +1607,7 @@ err: static void lpuart_rx_dma_startup(struct lpuart_port *sport) { int ret; + unsigned char cr3; if (!sport->dma_rx_chan) goto err; @@ -1573,6 +1624,12 @@ static void lpuart_rx_dma_startup(struct lpuart_port *sport) sport->lpuart_dma_rx_use = true; rx_dma_timer_init(sport); + if (sport->port.has_sysrq) { + cr3 = readb(sport->port.membase + UARTCR3); + cr3 |= UARTCR3_FEIE; + writeb(cr3, sport->port.membase + UARTCR3); + } + return; err: From 4be87603b6dc9e49c2e07151bb51180dc0b6964a Mon Sep 17 00:00:00 2001 From: Angelo Dureghello Date: Fri, 2 Oct 2020 16:05:45 +0200 Subject: [PATCH 398/433] serial: mcf: add sysrq capability After some unsuccessful attempts to use sysrq over console, figured out that port->has_sysrq should likely be enabled, as per other architectures, this when CONFIG_SERIAL_MCF_CONSOLE is also enabled. Tested some magic sysrq commands (h, p, t, b), they works now properly. Commands works inside 5 secs after BREAK is sent, as expected. Signed-off-by: Angelo Dureghello Link: https://lore.kernel.org/r/20201002140545.477481-1-angelo.dureghello@timesys.com Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/mcf.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/tty/serial/mcf.c b/drivers/tty/serial/mcf.c index 7dbfb4cde124..09c88c48fb7b 100644 --- a/drivers/tty/serial/mcf.c +++ b/drivers/tty/serial/mcf.c @@ -632,6 +632,7 @@ static int mcf_probe(struct platform_device *pdev) port->ops = &mcf_uart_ops; port->flags = UPF_BOOT_AUTOCONF; port->rs485_config = mcf_config_rs485; + port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_MCF_CONSOLE); uart_add_one_port(&mcf_driver, port); } From c34095fab1052a9042ae588706705894b5aeb320 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Thu, 1 Oct 2020 15:09:43 -0500 Subject: [PATCH 399/433] dt-bindings: arm: Add missing root node constraint for board/SoC bindings MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Board/SoC top-level compatible bindings should be constrained to the root node. Add the missing constraints that the node name must be "/". Cc: Baruch Siach Cc: Imre Kaloz Cc: Krzysztof Halasa Cc: Andy Gross Cc: Bjorn Andersson Cc: Maxime Coquelin Cc: Jonathan Hunter Cc: Dinh Nguyen Cc: Anders Berg Reviewed-by: Linus Walleij Reviewed-by: Andreas Färber Reviewed-by: Manivannan Sadhasivam Reviewed-by: Alexandre TORGUE Acked-by: Thierry Reding Link: https://lore.kernel.org/r/20201001200943.1193870-1-robh@kernel.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/arm/actions.yaml | 2 ++ Documentation/devicetree/bindings/arm/altera.yaml | 2 ++ Documentation/devicetree/bindings/arm/axxia.yaml | 2 ++ Documentation/devicetree/bindings/arm/bitmain.yaml | 2 ++ Documentation/devicetree/bindings/arm/digicolor.yaml | 2 ++ Documentation/devicetree/bindings/arm/intel-ixp4xx.yaml | 2 ++ Documentation/devicetree/bindings/arm/qcom.yaml | 2 ++ Documentation/devicetree/bindings/arm/rda.yaml | 2 ++ Documentation/devicetree/bindings/arm/stm32/stm32.yaml | 2 ++ Documentation/devicetree/bindings/arm/tegra.yaml | 2 ++ 10 files changed, 20 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/actions.yaml b/Documentation/devicetree/bindings/arm/actions.yaml index ace3fdaa8396..14023f0a8552 100644 --- a/Documentation/devicetree/bindings/arm/actions.yaml +++ b/Documentation/devicetree/bindings/arm/actions.yaml @@ -11,6 +11,8 @@ maintainers: - Manivannan Sadhasivam properties: + $nodename: + const: "/" compatible: oneOf: # The Actions Semi S500 is a quad-core ARM Cortex-A9 SoC. diff --git a/Documentation/devicetree/bindings/arm/altera.yaml b/Documentation/devicetree/bindings/arm/altera.yaml index b388c5aa7984..0bc5020b7539 100644 --- a/Documentation/devicetree/bindings/arm/altera.yaml +++ b/Documentation/devicetree/bindings/arm/altera.yaml @@ -10,6 +10,8 @@ maintainers: - Dinh Nguyen properties: + $nodename: + const: "/" compatible: items: - enum: diff --git a/Documentation/devicetree/bindings/arm/axxia.yaml b/Documentation/devicetree/bindings/arm/axxia.yaml index 98780a569f22..3ea5f2fdcd96 100644 --- a/Documentation/devicetree/bindings/arm/axxia.yaml +++ b/Documentation/devicetree/bindings/arm/axxia.yaml @@ -10,6 +10,8 @@ maintainers: - Anders Berg properties: + $nodename: + const: "/" compatible: description: LSI AXM5516 Validation board (Amarillo) items: diff --git a/Documentation/devicetree/bindings/arm/bitmain.yaml b/Documentation/devicetree/bindings/arm/bitmain.yaml index 5cd5b36cff2d..5880083ab8d0 100644 --- a/Documentation/devicetree/bindings/arm/bitmain.yaml +++ b/Documentation/devicetree/bindings/arm/bitmain.yaml @@ -10,6 +10,8 @@ maintainers: - Manivannan Sadhasivam properties: + $nodename: + const: "/" compatible: items: - enum: diff --git a/Documentation/devicetree/bindings/arm/digicolor.yaml b/Documentation/devicetree/bindings/arm/digicolor.yaml index d9c80b827e9b..849e20518339 100644 --- a/Documentation/devicetree/bindings/arm/digicolor.yaml +++ b/Documentation/devicetree/bindings/arm/digicolor.yaml @@ -10,6 +10,8 @@ maintainers: - Baruch Siach properties: + $nodename: + const: "/" compatible: const: cnxt,cx92755 diff --git a/Documentation/devicetree/bindings/arm/intel-ixp4xx.yaml b/Documentation/devicetree/bindings/arm/intel-ixp4xx.yaml index f4f7451e5e8a..f18302efb90e 100644 --- a/Documentation/devicetree/bindings/arm/intel-ixp4xx.yaml +++ b/Documentation/devicetree/bindings/arm/intel-ixp4xx.yaml @@ -10,6 +10,8 @@ maintainers: - Linus Walleij properties: + $nodename: + const: "/" compatible: oneOf: - items: diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 6031aee0f5a8..ae6284be9fef 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -73,6 +73,8 @@ description: | foundry 2. properties: + $nodename: + const: "/" compatible: oneOf: - items: diff --git a/Documentation/devicetree/bindings/arm/rda.yaml b/Documentation/devicetree/bindings/arm/rda.yaml index 51cec2b63b04..9672aa0c760d 100644 --- a/Documentation/devicetree/bindings/arm/rda.yaml +++ b/Documentation/devicetree/bindings/arm/rda.yaml @@ -10,6 +10,8 @@ maintainers: - Manivannan Sadhasivam properties: + $nodename: + const: "/" compatible: items: - enum: diff --git a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml index 790e6dd48e34..696a0101ebcc 100644 --- a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml +++ b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml @@ -10,6 +10,8 @@ maintainers: - Alexandre Torgue properties: + $nodename: + const: "/" compatible: oneOf: - items: diff --git a/Documentation/devicetree/bindings/arm/tegra.yaml b/Documentation/devicetree/bindings/arm/tegra.yaml index e0b3debaee9e..b4d53290c5f0 100644 --- a/Documentation/devicetree/bindings/arm/tegra.yaml +++ b/Documentation/devicetree/bindings/arm/tegra.yaml @@ -11,6 +11,8 @@ maintainers: - Jonathan Hunter properties: + $nodename: + const: "/" compatible: oneOf: - items: From 24d5979549d26227f3209d05a715a91d68649e80 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Fri, 2 Oct 2020 17:59:24 -0500 Subject: [PATCH 400/433] dt-bindings: display: Add dsi-controller.yaml in DSI controller schemas MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Some DSI controllers are missing a reference to the recently added dsi-controller.yaml schema. Add it and we can drop the duplicate parts. Cc: Chen-Yu Tsai Cc: Eric Anholt Cc: Nicolas Saenz Julienne Cc: Florian Fainelli Cc: Ray Jui Cc: Scott Branden Cc: Maxime Coquelin Cc: Alexandre Torgue Cc: Robert Chiras Cc: Philippe Cornu Cc: Yannick Fertre Reviewed-by: Guido Günther Acked-by: Maxime Ripard Link: https://lore.kernel.org/r/20201002225924.3513700-1-robh@kernel.org Signed-off-by: Rob Herring --- .../display/allwinner,sun6i-a31-mipi-dsi.yaml | 11 ++------- .../bindings/display/brcm,bcm2835-dsi0.yaml | 3 +++ .../bindings/display/bridge/nwl-dsi.yaml | 11 ++++----- .../bindings/display/st,stm32-dsi.yaml | 23 ++++--------------- 4 files changed, 14 insertions(+), 34 deletions(-) diff --git a/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml b/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml index 63f948175239..7aa330dabc44 100644 --- a/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml +++ b/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml @@ -11,9 +11,6 @@ maintainers: - Maxime Ripard properties: - "#address-cells": true - "#size-cells": true - compatible: enum: - allwinner,sun6i-a31-mipi-dsi @@ -57,12 +54,7 @@ properties: port should be the input endpoint, usually coming from the associated TCON. -patternProperties: - "^panel@[0-9]+$": true - required: - - "#address-cells" - - "#size-cells" - compatible - reg - interrupts @@ -74,6 +66,7 @@ required: - port allOf: + - $ref: dsi-controller.yaml# - if: properties: compatible: @@ -99,7 +92,7 @@ allOf: clocks: minItems: 1 -additionalProperties: false +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/display/brcm,bcm2835-dsi0.yaml b/Documentation/devicetree/bindings/display/brcm,bcm2835-dsi0.yaml index 3c643b227a70..eb44e072b6e5 100644 --- a/Documentation/devicetree/bindings/display/brcm,bcm2835-dsi0.yaml +++ b/Documentation/devicetree/bindings/display/brcm,bcm2835-dsi0.yaml @@ -9,6 +9,9 @@ title: Broadcom VC4 (VideoCore4) DSI Controller maintainers: - Eric Anholt +allOf: + - $ref: dsi-controller.yaml# + properties: "#clock-cells": const: 1 diff --git a/Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml b/Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml index b8ba6eb482a1..a125b2dd3a2f 100644 --- a/Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml +++ b/Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml @@ -14,6 +14,9 @@ description: | NWL MIPI-DSI host controller found on i.MX8 platforms. This is a dsi bridge for the SOCs NWL MIPI-DSI host controller. +allOf: + - $ref: ../dsi-controller.yaml# + properties: compatible: const: fsl,imx8mq-nwl-dsi @@ -144,10 +147,6 @@ properties: additionalProperties: false -patternProperties: - "^panel@[0-9]+$": - type: object - required: - '#address-cells' - '#size-cells' @@ -163,7 +162,7 @@ required: - reset-names - resets -additionalProperties: false +unevaluatedProperties: false examples: - | @@ -172,7 +171,7 @@ examples: #include #include - mipi_dsi: mipi_dsi@30a00000 { + dsi@30a00000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx8mq-nwl-dsi"; diff --git a/Documentation/devicetree/bindings/display/st,stm32-dsi.yaml b/Documentation/devicetree/bindings/display/st,stm32-dsi.yaml index 69cc7e8bf15a..327a14d85df8 100644 --- a/Documentation/devicetree/bindings/display/st,stm32-dsi.yaml +++ b/Documentation/devicetree/bindings/display/st,stm32-dsi.yaml @@ -13,6 +13,9 @@ maintainers: description: The STMicroelectronics STM32 DSI controller uses the Synopsys DesignWare MIPI-DSI host controller. +allOf: + - $ref: dsi-controller.yaml# + properties: compatible: const: st,stm32-dsi @@ -65,24 +68,6 @@ properties: description: DSI output port node, connected to a panel or a bridge input port" -patternProperties: - "^(panel|panel-dsi)@[0-9]$": - type: object - description: - A node containing the panel or bridge description as documented in - Documentation/devicetree/bindings/display/mipi-dsi-bus.txt - properties: - port: - type: object - description: - Panel or bridge port node, connected to the DSI output port (port@1) - - "#address-cells": - const: 1 - - "#size-cells": - const: 0 - required: - "#address-cells" - "#size-cells" @@ -92,7 +77,7 @@ required: - clock-names - ports -additionalProperties: false +unevaluatedProperties: false examples: - | From 1b25b207d207f2bdbc7aeff81426e6a0428a6012 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Fri, 2 Oct 2020 18:06:06 -0500 Subject: [PATCH 401/433] dt-bindings: mfd: ti,j721e-system-controller: Fix incorrect pattern property Pattern properties go under 'patternProperties', not 'properties'. Otherwise, the pattern is treated as a literal string. A corresponding meta-schema check has been added to catch bad DT property names like this. Fixes: e0f946915b23 ("dt-bindings: mfd: ti,j721e-system-controller.yaml: Add J721e system controller") Cc: Roger Quadros Cc: Tero Kristo Cc: Kishon Vijay Abraham I Acked-by: Lee Jones Link: https://lore.kernel.org/r/20201002230606.3522954-1-robh@kernel.org Signed-off-by: Rob Herring --- .../devicetree/bindings/mfd/ti,j721e-system-controller.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml b/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml index c8fd5d3e3071..da3d9ab758b9 100644 --- a/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml +++ b/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml @@ -38,8 +38,8 @@ properties: ranges: true -# Optional children - +patternProperties: + # Optional children "^serdes-ln-ctrl@[0-9a-f]+$": type: object description: | From 98d278ca00bd8f62c8bc98bd9e65372d16eb6956 Mon Sep 17 00:00:00 2001 From: Gabriel David Date: Fri, 2 Oct 2020 18:27:00 -0400 Subject: [PATCH 402/433] leds: lm3697: Fix out-of-bound access If both LED banks aren't used in device tree, an out-of-bounds condition in lm3697_init occurs because of the for loop assuming that all the banks are used. Fix it by adding a variable that contains the number of used banks. Signed-off-by: Gabriel David [removed extra rename, minor tweaks] Signed-off-by: Pavel Machek Cc: stable@kernel.org --- drivers/leds/leds-lm3697.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/leds/leds-lm3697.c b/drivers/leds/leds-lm3697.c index 64c0794801e6..7d216cdb91a8 100644 --- a/drivers/leds/leds-lm3697.c +++ b/drivers/leds/leds-lm3697.c @@ -78,6 +78,7 @@ struct lm3697 { struct mutex lock; int bank_cfg; + int num_banks; struct lm3697_led leds[]; }; @@ -180,7 +181,7 @@ static int lm3697_init(struct lm3697 *priv) if (ret) dev_err(dev, "Cannot write OUTPUT config\n"); - for (i = 0; i < LM3697_MAX_CONTROL_BANKS; i++) { + for (i = 0; i < priv->num_banks; i++) { led = &priv->leds[i]; ret = ti_lmu_common_set_ramp(&led->lmu_data); if (ret) @@ -301,8 +302,8 @@ static int lm3697_probe(struct i2c_client *client, int ret; count = device_get_child_node_count(dev); - if (!count) { - dev_err(dev, "LEDs are not defined in device tree!"); + if (!count || count > LM3697_MAX_CONTROL_BANKS) { + dev_err(dev, "Strange device tree!"); return -ENODEV; } @@ -315,6 +316,7 @@ static int lm3697_probe(struct i2c_client *client, led->client = client; led->dev = dev; + led->num_banks = count; led->regmap = devm_regmap_init_i2c(client, &lm3697_regmap_config); if (IS_ERR(led->regmap)) { ret = PTR_ERR(led->regmap); From 8c465e220bbcbf0866d6e0c14fc800ae2e96049e Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 2 Oct 2020 18:18:37 +0200 Subject: [PATCH 403/433] dt-bindings: mailbox: fsl,mu: Add missing power-domains Add quite common property - power-domains - to fix dtbs_check warnings like: arch/arm64/boot/dts/freescale/imx8qxp-mek.dt.yaml: mailbox@5d280000: 'power-domains' does not match any of the regexes: 'pinctrl-[0-9]+' Reviewed-by: Dong Aisheng Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20201002161837.5784-1-krzk@kernel.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/mailbox/fsl,mu.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml index 7ed096360be2..15cef82cd356 100644 --- a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml +++ b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml @@ -72,6 +72,9 @@ properties: description: boolean, if present, means it is for side B MU. type: boolean + power-domains: + maxItems: 1 + required: - compatible - reg From 7a64ed02ca2df68191fda98fa4f76c3cb68ae356 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 25 Sep 2020 23:26:49 +0200 Subject: [PATCH 404/433] dt-bindings: serial: fsl-imx-uart: fix i.MX 53 and 6 compatible matching The i.MX 53 and i.MX6Q DTS use two compatibles, i.MX 6SL/6SLL/SX three so update the binding to fix dtbs_check warnings like: serial@21ec000: compatible: ['fsl,imx6q-uart', 'fsl,imx21-uart'] is not valid under any of the given schemas Acked-by: Rob Herring Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20200925212649.23183-1-krzk@kernel.org Signed-off-by: Rob Herring --- .../devicetree/bindings/serial/fsl-imx-uart.yaml | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/serial/fsl-imx-uart.yaml b/Documentation/devicetree/bindings/serial/fsl-imx-uart.yaml index 3d896173b3b0..9ff85bc6859c 100644 --- a/Documentation/devicetree/bindings/serial/fsl-imx-uart.yaml +++ b/Documentation/devicetree/bindings/serial/fsl-imx-uart.yaml @@ -18,8 +18,6 @@ properties: oneOf: - const: fsl,imx1-uart - const: fsl,imx21-uart - - const: fsl,imx53-uart - - const: fsl,imx6q-uart - items: - enum: - fsl,imx25-uart @@ -28,12 +26,18 @@ properties: - fsl,imx35-uart - fsl,imx50-uart - fsl,imx51-uart + - fsl,imx53-uart + - fsl,imx6q-uart - const: fsl,imx21-uart - items: - enum: - fsl,imx6sl-uart - fsl,imx6sll-uart - fsl,imx6sx-uart + - const: fsl,imx6q-uart + - const: fsl,imx21-uart + - items: + - enum: - fsl,imx6ul-uart - fsl,imx7d-uart - fsl,imx8mm-uart From 891adc1303fe482cd683d8a3054040577484051a Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Mon, 28 Sep 2020 17:51:55 -0500 Subject: [PATCH 405/433] dt-bindings: hwlock: omap: Fix warnings with k3.yaml Update the AM65x HwSpinlock example to fix couple of warnings that started showing up after the conversion of K3 bindings to YAML format in commit 66e06509aa37 ("dt-bindings: arm: ti: Convert K3 board/soc bindings to DT schema"). compatible: ['ti,am654'] is not valid under any of the given schemas (Possible causes of the failure): compatible: ['ti,am654'] is too short compatible:0: 'ti,am654' is not one of ['ti,am654-evm'] Also, fix one of the node names while at this. Reviewed-by: Rob Herring Signed-off-by: Suman Anna Link: https://lore.kernel.org/r/20200928225155.12432-1-s-anna@ti.com Signed-off-by: Rob Herring --- .../devicetree/bindings/hwlock/ti,omap-hwspinlock.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/hwlock/ti,omap-hwspinlock.yaml b/Documentation/devicetree/bindings/hwlock/ti,omap-hwspinlock.yaml index 2765758d95e1..ac35491a6f65 100644 --- a/Documentation/devicetree/bindings/hwlock/ti,omap-hwspinlock.yaml +++ b/Documentation/devicetree/bindings/hwlock/ti,omap-hwspinlock.yaml @@ -49,7 +49,7 @@ examples: / { /* K3 AM65x SoCs */ model = "Texas Instruments K3 AM654 SoC"; - compatible = "ti,am654"; + compatible = "ti,am654-evm", "ti,am654"; #address-cells = <2>; #size-cells = <2>; @@ -60,7 +60,7 @@ examples: ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */ <0x00 0x30800000 0x00 0x30800000 0x00 0x0bc00000>; /* Main NavSS */ - main_navss@30800000 { + bus@30800000 { compatible = "simple-mfd"; #address-cells = <2>; #size-cells = <2>; From 5be478f9c24fbdf8162b8118b8da8cc685e2efb4 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Fri, 2 Oct 2020 18:41:43 -0500 Subject: [PATCH 406/433] dt-bindings: Another round of adding missing 'additionalProperties' Another round of wack-a-mole. The json-schema default is additional unknown properties are allowed, but for DT all properties should be defined. Cc: Linus Walleij Cc: Stephen Boyd Cc: Shawn Guo Cc: Bjorn Andersson Cc: Baolin Wang Cc: Mauro Carvalho Chehab Cc: Laurent Pinchart Cc: "David S. Miller" Cc: Bjorn Helgaas Cc: Liam Girdwood Cc: Daniel Lezcano Reviewed-by: Guenter Roeck Reviewed-by: Greg Kroah-Hartman Acked-By: Vinod Koul Acked-by: Lee Jones Acked-by: Ulf Hansson Acked-by: Jonathan Cameron # for iio Acked-by: Thierry Reding Acked-by: Mark Brown Reviewd-by: Corey Minyard Acked-by: Pavel Machek Acked-by: Sebastian Reichel Link: https://lore.kernel.org/r/20201002234143.3570746-1-robh@kernel.org Signed-off-by: Rob Herring --- .../arm/bcm/raspberrypi,bcm2835-firmware.yaml | 2 ++ .../arm/mediatek/mediatek,pericfg.yaml | 2 ++ .../devicetree/bindings/arm/pmu.yaml | 2 ++ .../devicetree/bindings/arm/primecell.yaml | 3 +++ .../arm/tegra/nvidia,tegra20-pmc.yaml | 2 ++ .../bindings/bus/mti,mips-cdmm.yaml | 2 ++ .../bus/socionext,uniphier-system-bus.yaml | 7 +++++++ .../bindings/clock/arm,syscon-icst.yaml | 2 ++ .../bindings/clock/idt,versaclock5.yaml | 20 ++++++++++--------- .../bindings/clock/imx6q-clock.yaml | 2 ++ .../bindings/clock/imx6sl-clock.yaml | 2 ++ .../bindings/clock/imx6sll-clock.yaml | 2 ++ .../bindings/clock/imx6sx-clock.yaml | 2 ++ .../bindings/clock/imx6ul-clock.yaml | 2 ++ .../bindings/clock/intel,cgu-lgm.yaml | 2 ++ .../bindings/clock/qcom,gcc-sm8250.yaml | 2 ++ .../bindings/clock/sprd,sc9863a-clk.yaml | 2 ++ .../bindings/clock/ti,am654-ehrpwm-tbclk.yaml | 2 ++ .../bindings/display/bridge/ite,it6505.yaml | 5 +++++ .../bindings/display/bridge/lvds-codec.yaml | 3 +++ .../devicetree/bindings/display/msm/gmu.yaml | 2 ++ .../devicetree/bindings/edac/dmc-520.yaml | 2 ++ .../devicetree/bindings/fsi/ibm,fsi2spi.yaml | 2 ++ .../gpio/socionext,uniphier-gpio.yaml | 2 ++ .../bindings/hwmon/adi,axi-fan-control.yaml | 2 ++ .../devicetree/bindings/hwmon/adt7475.yaml | 2 ++ .../bindings/iio/accel/kionix,kxsd9.yaml | 4 ++++ .../bindings/iio/adc/maxim,max1238.yaml | 2 ++ .../bindings/iio/adc/maxim,max1363.yaml | 2 ++ .../bindings/iio/adc/qcom,spmi-vadc.yaml | 4 ++++ .../bindings/iio/adc/ti,ads8688.yaml | 4 ++++ .../bindings/iio/amplifiers/adi,hmc425a.yaml | 2 ++ .../bindings/iio/imu/invensense,icm42600.yaml | 6 ++++++ .../bindings/iio/light/amstaos,tsl2563.yaml | 2 ++ .../bindings/iio/light/dynaimage,al3010.yaml | 2 ++ .../bindings/iio/light/dynaimage,al3320a.yaml | 2 ++ .../bindings/iio/light/sharp,gp2ap002.yaml | 2 ++ .../iio/magnetometer/asahi-kasei,ak8975.yaml | 2 ++ .../iio/proximity/vishay,vcnl3020.yaml | 2 ++ .../interrupt-controller/ingenic,intc.yaml | 2 ++ .../loongson,pch-msi.yaml | 2 ++ .../loongson,pch-pic.yaml | 2 ++ .../devicetree/bindings/ipmi/ipmi-smic.yaml | 2 ++ .../devicetree/bindings/leds/leds-lp55xx.yaml | 8 ++++++++ .../bindings/media/i2c/chrontel,ch7322.yaml | 2 ++ .../bindings/media/i2c/imi,rdacm2x-gmsl.yaml | 2 ++ .../bindings/media/nxp,imx8mq-vpu.yaml | 2 ++ .../bindings/media/qcom,msm8916-venus.yaml | 2 ++ .../bindings/media/qcom,msm8996-venus.yaml | 2 ++ .../bindings/media/qcom,sc7180-venus.yaml | 2 ++ .../bindings/media/qcom,sdm845-venus-v2.yaml | 2 ++ .../bindings/media/qcom,sdm845-venus.yaml | 2 ++ .../bindings/memory-controllers/fsl/mmdc.yaml | 2 ++ .../memory-controllers/st,stm32-fmc2-ebi.yaml | 2 ++ .../bindings/mfd/gateworks-gsc.yaml | 2 ++ .../bindings/mfd/xylon,logicvc.yaml | 14 +++++++++++-- .../bindings/mips/ingenic/ingenic,cpu.yaml | 6 ++++-- .../bindings/mips/loongson/rs780e-acpi.yaml | 2 ++ .../bindings/mmc/mmc-pwrseq-emmc.yaml | 2 ++ .../bindings/mmc/mmc-pwrseq-sd8787.yaml | 2 ++ .../bindings/mmc/mmc-pwrseq-simple.yaml | 2 ++ .../devicetree/bindings/net/qcom,ipa.yaml | 2 ++ .../bindings/net/realtek-bluetooth.yaml | 4 +++- .../net/wireless/microchip,wilc1000.yaml | 4 ++++ .../devicetree/bindings/pci/rcar-pci-ep.yaml | 2 ++ .../phy/amlogic,meson-g12a-usb2-phy.yaml | 2 ++ .../bindings/phy/qcom,ipq806x-usb-phy-hs.yaml | 2 ++ .../bindings/phy/qcom,ipq806x-usb-phy-ss.yaml | 2 ++ .../bindings/phy/qcom,qusb2-phy.yaml | 1 + .../bindings/phy/qcom-usb-ipq4019-phy.yaml | 2 ++ .../bindings/pinctrl/cirrus,lochnagar.yaml | 2 ++ .../pinctrl/socionext,uniphier-pinctrl.yaml | 2 ++ .../power/amlogic,meson-sec-pwrc.yaml | 2 ++ .../bindings/power/domain-idle-state.yaml | 2 ++ .../bindings/power/mti,mips-cpc.yaml | 2 ++ .../bindings/power/supply/cw2015_battery.yaml | 2 ++ .../bindings/power/supply/rohm,bd99954.yaml | 8 ++++++++ .../bindings/regulator/silergy,sy8827n.yaml | 2 ++ .../bindings/remoteproc/qcom,pil-info.yaml | 2 ++ .../bindings/serial/samsung_uart.yaml | 2 ++ .../serial/socionext,uniphier-uart.yaml | 2 ++ .../devicetree/bindings/serial/sprd-uart.yaml | 2 ++ .../bindings/soc/qcom/qcom,geni-se.yaml | 1 + .../bindings/sound/amlogic,g12a-toacodec.yaml | 2 ++ .../bindings/sound/amlogic,gx-sound-card.yaml | 2 ++ .../bindings/sound/amlogic,t9015.yaml | 2 ++ .../bindings/sound/cirrus,cs42l51.yaml | 2 ++ .../devicetree/bindings/sound/fsl,easrc.yaml | 2 ++ .../bindings/sound/intel,keembay-i2s.yaml | 2 ++ .../bindings/sound/nvidia,tegra186-dspk.yaml | 2 ++ .../sound/nvidia,tegra210-admaif.yaml | 2 ++ .../bindings/sound/nvidia,tegra210-dmic.yaml | 2 ++ .../bindings/sound/nvidia,tegra210-i2s.yaml | 2 ++ .../bindings/sound/rockchip,rk3328-codec.yaml | 2 ++ .../bindings/sound/tlv320adcx140.yaml | 2 ++ .../bindings/thermal/rcar-thermal.yaml | 5 +++++ .../bindings/thermal/sprd-thermal.yaml | 4 ++++ .../bindings/thermal/thermal-idle.yaml | 2 ++ .../bindings/thermal/thermal-zones.yaml | 2 ++ .../devicetree/bindings/timer/cdns,ttc.yaml | 2 ++ .../bindings/usb/nvidia,tegra-xudc.yaml | 2 ++ .../devicetree/bindings/usb/qcom,dwc3.yaml | 2 ++ .../devicetree/bindings/usb/ti,j721e-usb.yaml | 18 +++++++++++++++++ 103 files changed, 281 insertions(+), 14 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml b/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml index 6834f5e8df5f..9fdb319dcf19 100644 --- a/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml +++ b/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml @@ -54,6 +54,8 @@ required: - compatible - mboxes +additionalProperties: false + examples: - | firmware { diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml index 1af30174b2d0..8723dfe34bab 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml @@ -47,6 +47,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | pericfg@10003000 { diff --git a/Documentation/devicetree/bindings/arm/pmu.yaml b/Documentation/devicetree/bindings/arm/pmu.yaml index 97df36d301c9..693ef3f185a8 100644 --- a/Documentation/devicetree/bindings/arm/pmu.yaml +++ b/Documentation/devicetree/bindings/arm/pmu.yaml @@ -93,4 +93,6 @@ properties: required: - compatible +additionalProperties: false + ... diff --git a/Documentation/devicetree/bindings/arm/primecell.yaml b/Documentation/devicetree/bindings/arm/primecell.yaml index 5aae37f1c563..e15fe00aafb2 100644 --- a/Documentation/devicetree/bindings/arm/primecell.yaml +++ b/Documentation/devicetree/bindings/arm/primecell.yaml @@ -33,4 +33,7 @@ properties: contains: const: apb_pclk additionalItems: true + +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml index b71a20af5f70..43fd2f8927d0 100644 --- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml @@ -308,6 +308,8 @@ required: - clocks - '#clock-cells' +additionalProperties: false + dependencies: "nvidia,suspend-mode": ["nvidia,core-pwr-off-time", "nvidia,cpu-pwr-off-time"] "nvidia,core-pwr-off-time": ["nvidia,core-pwr-good-time"] diff --git a/Documentation/devicetree/bindings/bus/mti,mips-cdmm.yaml b/Documentation/devicetree/bindings/bus/mti,mips-cdmm.yaml index 9cc2d5f1beef..6a7b26b049f1 100644 --- a/Documentation/devicetree/bindings/bus/mti,mips-cdmm.yaml +++ b/Documentation/devicetree/bindings/bus/mti,mips-cdmm.yaml @@ -26,6 +26,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | cdmm@1bde8000 { diff --git a/Documentation/devicetree/bindings/bus/socionext,uniphier-system-bus.yaml b/Documentation/devicetree/bindings/bus/socionext,uniphier-system-bus.yaml index a0c6c5d2b70f..49df13fc2f89 100644 --- a/Documentation/devicetree/bindings/bus/socionext,uniphier-system-bus.yaml +++ b/Documentation/devicetree/bindings/bus/socionext,uniphier-system-bus.yaml @@ -57,6 +57,11 @@ properties: "ranges" property should provide a "reasonable" default that is known to work. The software should initialize the bus controller according to it. +patternProperties: + "^.*@[1-5],[1-9a-f][0-9a-f]+$": + description: Devices attached to chip selects + type: object + required: - compatible - reg @@ -64,6 +69,8 @@ required: - "#size-cells" - ranges +additionalProperties: false + examples: - | // In this example, diff --git a/Documentation/devicetree/bindings/clock/arm,syscon-icst.yaml b/Documentation/devicetree/bindings/clock/arm,syscon-icst.yaml index 444aeea27db8..eb241587efd1 100644 --- a/Documentation/devicetree/bindings/clock/arm,syscon-icst.yaml +++ b/Documentation/devicetree/bindings/clock/arm,syscon-icst.yaml @@ -89,6 +89,8 @@ required: - compatible - clocks +additionalProperties: false + examples: - | vco1: clock { diff --git a/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml b/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml index 28c6461b9a9a..2ac1131fd922 100644 --- a/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml +++ b/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml @@ -50,6 +50,15 @@ properties: '#clock-cells': const: 1 + clock-names: + minItems: 1 + maxItems: 2 + items: + enum: [ xin, clkin ] + clocks: + minItems: 1 + maxItems: 2 + patternProperties: "^OUT[1-4]$": type: object @@ -93,19 +102,12 @@ allOf: maxItems: 1 else: # Devices without builtin crystal - properties: - clock-names: - minItems: 1 - maxItems: 2 - items: - enum: [ xin, clkin ] - clocks: - minItems: 1 - maxItems: 2 required: - clock-names - clocks +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/clock/imx6q-clock.yaml b/Documentation/devicetree/bindings/clock/imx6q-clock.yaml index 92a8e545e212..4f4637eddb8b 100644 --- a/Documentation/devicetree/bindings/clock/imx6q-clock.yaml +++ b/Documentation/devicetree/bindings/clock/imx6q-clock.yaml @@ -57,6 +57,8 @@ required: - interrupts - '#clock-cells' +additionalProperties: false + examples: # Clock Control Module node: - | diff --git a/Documentation/devicetree/bindings/clock/imx6sl-clock.yaml b/Documentation/devicetree/bindings/clock/imx6sl-clock.yaml index c97bf95b4150..b83c8f43d664 100644 --- a/Documentation/devicetree/bindings/clock/imx6sl-clock.yaml +++ b/Documentation/devicetree/bindings/clock/imx6sl-clock.yaml @@ -33,6 +33,8 @@ required: - interrupts - '#clock-cells' +additionalProperties: false + examples: # Clock Control Module node: - | diff --git a/Documentation/devicetree/bindings/clock/imx6sll-clock.yaml b/Documentation/devicetree/bindings/clock/imx6sll-clock.yaml index de48924be191..484894a4b23f 100644 --- a/Documentation/devicetree/bindings/clock/imx6sll-clock.yaml +++ b/Documentation/devicetree/bindings/clock/imx6sll-clock.yaml @@ -49,6 +49,8 @@ required: - clocks - clock-names +additionalProperties: false + examples: # Clock Control Module node: - | diff --git a/Documentation/devicetree/bindings/clock/imx6sx-clock.yaml b/Documentation/devicetree/bindings/clock/imx6sx-clock.yaml index e50cddee43c3..e6c795657c24 100644 --- a/Documentation/devicetree/bindings/clock/imx6sx-clock.yaml +++ b/Documentation/devicetree/bindings/clock/imx6sx-clock.yaml @@ -53,6 +53,8 @@ required: - clocks - clock-names +additionalProperties: false + examples: # Clock Control Module node: - | diff --git a/Documentation/devicetree/bindings/clock/imx6ul-clock.yaml b/Documentation/devicetree/bindings/clock/imx6ul-clock.yaml index 36ce7667c972..6a51a3f51cd9 100644 --- a/Documentation/devicetree/bindings/clock/imx6ul-clock.yaml +++ b/Documentation/devicetree/bindings/clock/imx6ul-clock.yaml @@ -49,6 +49,8 @@ required: - clocks - clock-names +additionalProperties: false + examples: # Clock Control Module node: - | diff --git a/Documentation/devicetree/bindings/clock/intel,cgu-lgm.yaml b/Documentation/devicetree/bindings/clock/intel,cgu-lgm.yaml index 6dc1414bfb7f..f3e1a700a2ca 100644 --- a/Documentation/devicetree/bindings/clock/intel,cgu-lgm.yaml +++ b/Documentation/devicetree/bindings/clock/intel,cgu-lgm.yaml @@ -33,6 +33,8 @@ required: - reg - '#clock-cells' +additionalProperties: false + examples: - | cgu: clock-controller@e0200000 { diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8250.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8250.yaml index a5766ff89082..80bd6caf5bc9 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8250.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8250.yaml @@ -56,6 +56,8 @@ required: - '#reset-cells' - '#power-domain-cells' +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.yaml b/Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.yaml index c6d091518650..4069e09cb62d 100644 --- a/Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.yaml +++ b/Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.yaml @@ -73,6 +73,8 @@ else: The 'reg' property for the clock node is also required if there is a sub range of registers for the clocks. +additionalProperties: false + examples: - | ap_clk: clock-controller@21500000 { diff --git a/Documentation/devicetree/bindings/clock/ti,am654-ehrpwm-tbclk.yaml b/Documentation/devicetree/bindings/clock/ti,am654-ehrpwm-tbclk.yaml index 869b18ac88d7..6b419a9878f3 100644 --- a/Documentation/devicetree/bindings/clock/ti,am654-ehrpwm-tbclk.yaml +++ b/Documentation/devicetree/bindings/clock/ti,am654-ehrpwm-tbclk.yaml @@ -26,6 +26,8 @@ required: - "#clock-cells" - reg +additionalProperties: false + examples: - | ehrpwm_tbclk: syscon@4140 { diff --git a/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml b/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml index 2c500166c65d..efbb3d0117dc 100644 --- a/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml +++ b/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml @@ -31,6 +31,9 @@ properties: compatible: const: ite,it6505 + reg: + maxItems: 1 + ovdd-supply: maxItems: 1 description: I/O voltage @@ -63,6 +66,8 @@ required: - reset-gpios - extcon +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml b/Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml index 68951d56ebba..e8fa8e901c9f 100644 --- a/Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml +++ b/Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml @@ -83,6 +83,9 @@ required: - compatible - ports +additionalProperties: false + + examples: - | lvds-encoder { diff --git a/Documentation/devicetree/bindings/display/msm/gmu.yaml b/Documentation/devicetree/bindings/display/msm/gmu.yaml index 53056dd02597..fe55611d2603 100644 --- a/Documentation/devicetree/bindings/display/msm/gmu.yaml +++ b/Documentation/devicetree/bindings/display/msm/gmu.yaml @@ -89,6 +89,8 @@ required: - iommus - operating-points-v2 +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/edac/dmc-520.yaml b/Documentation/devicetree/bindings/edac/dmc-520.yaml index 9272d2bd8634..3b6842e92d1b 100644 --- a/Documentation/devicetree/bindings/edac/dmc-520.yaml +++ b/Documentation/devicetree/bindings/edac/dmc-520.yaml @@ -49,6 +49,8 @@ required: - interrupts - interrupt-names +additionalProperties: false + examples: - | dmc0: dmc@200000 { diff --git a/Documentation/devicetree/bindings/fsi/ibm,fsi2spi.yaml b/Documentation/devicetree/bindings/fsi/ibm,fsi2spi.yaml index b26d4b4be743..e2ca0b000471 100644 --- a/Documentation/devicetree/bindings/fsi/ibm,fsi2spi.yaml +++ b/Documentation/devicetree/bindings/fsi/ibm,fsi2spi.yaml @@ -28,6 +28,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | fsi2spi@1c00 { diff --git a/Documentation/devicetree/bindings/gpio/socionext,uniphier-gpio.yaml b/Documentation/devicetree/bindings/gpio/socionext,uniphier-gpio.yaml index c58ff9a94f45..1a54db04f29d 100644 --- a/Documentation/devicetree/bindings/gpio/socionext,uniphier-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/socionext,uniphier-gpio.yaml @@ -64,6 +64,8 @@ required: - gpio-ranges - socionext,interrupt-ranges +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/hwmon/adi,axi-fan-control.yaml b/Documentation/devicetree/bindings/hwmon/adi,axi-fan-control.yaml index 7898b9dba5a5..6747b870f297 100644 --- a/Documentation/devicetree/bindings/hwmon/adi,axi-fan-control.yaml +++ b/Documentation/devicetree/bindings/hwmon/adi,axi-fan-control.yaml @@ -44,6 +44,8 @@ required: - interrupts - pulses-per-revolution +additionalProperties: false + examples: - | fpga_axi: fpga-axi { diff --git a/Documentation/devicetree/bindings/hwmon/adt7475.yaml b/Documentation/devicetree/bindings/hwmon/adt7475.yaml index dfa821c0aacc..ad0ec9f35bd8 100644 --- a/Documentation/devicetree/bindings/hwmon/adt7475.yaml +++ b/Documentation/devicetree/bindings/hwmon/adt7475.yaml @@ -65,6 +65,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | i2c { diff --git a/Documentation/devicetree/bindings/iio/accel/kionix,kxsd9.yaml b/Documentation/devicetree/bindings/iio/accel/kionix,kxsd9.yaml index d61ab4fa3d71..390b87242fcb 100644 --- a/Documentation/devicetree/bindings/iio/accel/kionix,kxsd9.yaml +++ b/Documentation/devicetree/bindings/iio/accel/kionix,kxsd9.yaml @@ -29,10 +29,14 @@ properties: mount-matrix: description: an optional 3x3 mounting rotation matrix. + spi-max-frequency: true + required: - compatible - reg +additionalProperties: false + examples: - | # include diff --git a/Documentation/devicetree/bindings/iio/adc/maxim,max1238.yaml b/Documentation/devicetree/bindings/iio/adc/maxim,max1238.yaml index cccd3033a55b..50bcd72ac9d6 100644 --- a/Documentation/devicetree/bindings/iio/adc/maxim,max1238.yaml +++ b/Documentation/devicetree/bindings/iio/adc/maxim,max1238.yaml @@ -62,6 +62,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | i2c { diff --git a/Documentation/devicetree/bindings/iio/adc/maxim,max1363.yaml b/Documentation/devicetree/bindings/iio/adc/maxim,max1363.yaml index 48377549c39a..e04f09f35601 100644 --- a/Documentation/devicetree/bindings/iio/adc/maxim,max1363.yaml +++ b/Documentation/devicetree/bindings/iio/adc/maxim,max1363.yaml @@ -36,6 +36,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | i2c { diff --git a/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.yaml b/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.yaml index 0ca992465a21..7f4f827c57a7 100644 --- a/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.yaml @@ -48,6 +48,8 @@ properties: description: End of conversion interrupt. + io-channel-ranges: true + required: - compatible - reg @@ -232,6 +234,8 @@ allOf: enum: [ 1, 2, 4, 8, 16 ] default: 1 +additionalProperties: false + examples: - | spmi_bus { diff --git a/Documentation/devicetree/bindings/iio/adc/ti,ads8688.yaml b/Documentation/devicetree/bindings/iio/adc/ti,ads8688.yaml index 97fe6cbb2efa..a0af4b24877f 100644 --- a/Documentation/devicetree/bindings/iio/adc/ti,ads8688.yaml +++ b/Documentation/devicetree/bindings/iio/adc/ti,ads8688.yaml @@ -25,10 +25,14 @@ properties: description: Optional external reference. If not supplied, assume REFSEL input tied low to enable the internal reference. + spi-max-frequency: true + required: - compatible - reg +additionalProperties: false + examples: - | spi { diff --git a/Documentation/devicetree/bindings/iio/amplifiers/adi,hmc425a.yaml b/Documentation/devicetree/bindings/iio/amplifiers/adi,hmc425a.yaml index 5342360e96b1..a557761d8016 100644 --- a/Documentation/devicetree/bindings/iio/amplifiers/adi,hmc425a.yaml +++ b/Documentation/devicetree/bindings/iio/amplifiers/adi,hmc425a.yaml @@ -33,6 +33,8 @@ required: - compatible - ctrl-gpios +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/iio/imu/invensense,icm42600.yaml b/Documentation/devicetree/bindings/iio/imu/invensense,icm42600.yaml index abd8d25e1136..4c1c083d0e92 100644 --- a/Documentation/devicetree/bindings/iio/imu/invensense,icm42600.yaml +++ b/Documentation/devicetree/bindings/iio/imu/invensense,icm42600.yaml @@ -47,11 +47,17 @@ properties: vddio-supply: description: Regulator that provides power to the bus + spi-max-frequency: true + spi-cpha: true + spi-cpol: true + required: - compatible - reg - interrupts +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/iio/light/amstaos,tsl2563.yaml b/Documentation/devicetree/bindings/iio/light/amstaos,tsl2563.yaml index e201a06d8fdc..60e76bc035a5 100644 --- a/Documentation/devicetree/bindings/iio/light/amstaos,tsl2563.yaml +++ b/Documentation/devicetree/bindings/iio/light/amstaos,tsl2563.yaml @@ -32,6 +32,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | i2c { diff --git a/Documentation/devicetree/bindings/iio/light/dynaimage,al3010.yaml b/Documentation/devicetree/bindings/iio/light/dynaimage,al3010.yaml index f671edda6641..a3a979553e32 100644 --- a/Documentation/devicetree/bindings/iio/light/dynaimage,al3010.yaml +++ b/Documentation/devicetree/bindings/iio/light/dynaimage,al3010.yaml @@ -26,6 +26,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/iio/light/dynaimage,al3320a.yaml b/Documentation/devicetree/bindings/iio/light/dynaimage,al3320a.yaml index 497300239d93..8249be99cff9 100644 --- a/Documentation/devicetree/bindings/iio/light/dynaimage,al3320a.yaml +++ b/Documentation/devicetree/bindings/iio/light/dynaimage,al3320a.yaml @@ -26,6 +26,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/iio/light/sharp,gp2ap002.yaml b/Documentation/devicetree/bindings/iio/light/sharp,gp2ap002.yaml index 12aa16f24772..f8a932be0d10 100644 --- a/Documentation/devicetree/bindings/iio/light/sharp,gp2ap002.yaml +++ b/Documentation/devicetree/bindings/iio/light/sharp,gp2ap002.yaml @@ -61,6 +61,8 @@ required: - sharp,proximity-far-hysteresis - sharp,proximity-close-hysteresis +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/iio/magnetometer/asahi-kasei,ak8975.yaml b/Documentation/devicetree/bindings/iio/magnetometer/asahi-kasei,ak8975.yaml index f0b336ac39c9..a25590a16ba7 100644 --- a/Documentation/devicetree/bindings/iio/magnetometer/asahi-kasei,ak8975.yaml +++ b/Documentation/devicetree/bindings/iio/magnetometer/asahi-kasei,ak8975.yaml @@ -55,6 +55,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/iio/proximity/vishay,vcnl3020.yaml b/Documentation/devicetree/bindings/iio/proximity/vishay,vcnl3020.yaml index 51dba64037f6..fbd3a2e32280 100644 --- a/Documentation/devicetree/bindings/iio/proximity/vishay,vcnl3020.yaml +++ b/Documentation/devicetree/bindings/iio/proximity/vishay,vcnl3020.yaml @@ -47,6 +47,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | i2c { diff --git a/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.yaml index 02a3cf470518..0a046be8d1cd 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.yaml @@ -49,6 +49,8 @@ required: - "#interrupt-cells" - interrupt-controller +additionalProperties: false + examples: - | intc: interrupt-controller@10001000 { diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-msi.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-msi.yaml index 1b256d9dd92a..1f6fd73d4624 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-msi.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-msi.yaml @@ -46,6 +46,8 @@ required: - loongson,msi-base-vec - loongson,msi-num-vecs +additionalProperties: true #fixme + examples: - | #include diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml index a6dcbb2971a9..fdd6a38a31db 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml @@ -41,6 +41,8 @@ required: - interrupt-controller - '#interrupt-cells' +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/ipmi/ipmi-smic.yaml b/Documentation/devicetree/bindings/ipmi/ipmi-smic.yaml index 58fa76ee6176..898e3267893a 100644 --- a/Documentation/devicetree/bindings/ipmi/ipmi-smic.yaml +++ b/Documentation/devicetree/bindings/ipmi/ipmi-smic.yaml @@ -49,6 +49,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | smic@fff3a000 { diff --git a/Documentation/devicetree/bindings/leds/leds-lp55xx.yaml b/Documentation/devicetree/bindings/leds/leds-lp55xx.yaml index b1bb3feb0f4d..cd877e817ad1 100644 --- a/Documentation/devicetree/bindings/leds/leds-lp55xx.yaml +++ b/Documentation/devicetree/bindings/leds/leds-lp55xx.yaml @@ -58,6 +58,12 @@ properties: - 2 # D1~6 with VOUT, D7~9 with VDD - 3 # D1~9 are connected to VOUT + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + patternProperties: "(^led@[0-9a-f]$|led)": type: object @@ -98,6 +104,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/media/i2c/chrontel,ch7322.yaml b/Documentation/devicetree/bindings/media/i2c/chrontel,ch7322.yaml index daa2869377c5..63e5b89d2e0b 100644 --- a/Documentation/devicetree/bindings/media/i2c/chrontel,ch7322.yaml +++ b/Documentation/devicetree/bindings/media/i2c/chrontel,ch7322.yaml @@ -49,6 +49,8 @@ required: - reg - interrupts +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/media/i2c/imi,rdacm2x-gmsl.yaml b/Documentation/devicetree/bindings/media/i2c/imi,rdacm2x-gmsl.yaml index 107c862a7fc7..3dc06c628e64 100644 --- a/Documentation/devicetree/bindings/media/i2c/imi,rdacm2x-gmsl.yaml +++ b/Documentation/devicetree/bindings/media/i2c/imi,rdacm2x-gmsl.yaml @@ -119,6 +119,8 @@ required: - reg - port +additionalProperties: false + examples: - | i2c@e66d8000 { diff --git a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml index a2d1cd77c1e2..762be3f96ce9 100644 --- a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml +++ b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml @@ -55,6 +55,8 @@ required: - clocks - clock-names +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/media/qcom,msm8916-venus.yaml b/Documentation/devicetree/bindings/media/qcom,msm8916-venus.yaml index f9606df02d70..59ab16ad12f1 100644 --- a/Documentation/devicetree/bindings/media/qcom,msm8916-venus.yaml +++ b/Documentation/devicetree/bindings/media/qcom,msm8916-venus.yaml @@ -92,6 +92,8 @@ required: - video-decoder - video-encoder +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/media/qcom,msm8996-venus.yaml b/Documentation/devicetree/bindings/media/qcom,msm8996-venus.yaml index fa0dc6c47f1d..199f45217b4a 100644 --- a/Documentation/devicetree/bindings/media/qcom,msm8996-venus.yaml +++ b/Documentation/devicetree/bindings/media/qcom,msm8996-venus.yaml @@ -119,6 +119,8 @@ required: - video-decoder - video-encoder +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml b/Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml index 55f2d67ae34e..3cec6dae1139 100644 --- a/Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml @@ -108,6 +108,8 @@ required: - video-decoder - video-encoder +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/media/qcom,sdm845-venus-v2.yaml b/Documentation/devicetree/bindings/media/qcom,sdm845-venus-v2.yaml index 157dff8057e9..55f5d439fa61 100644 --- a/Documentation/devicetree/bindings/media/qcom,sdm845-venus-v2.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sdm845-venus-v2.yaml @@ -103,6 +103,8 @@ required: - video-core0 - video-core1 +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/media/qcom,sdm845-venus.yaml b/Documentation/devicetree/bindings/media/qcom,sdm845-venus.yaml index 084e45e2df62..680f37726fdf 100644 --- a/Documentation/devicetree/bindings/media/qcom,sdm845-venus.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sdm845-venus.yaml @@ -120,6 +120,8 @@ required: - video-core0 - video-core1 +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl/mmdc.yaml b/Documentation/devicetree/bindings/memory-controllers/fsl/mmdc.yaml index 68484136a510..71547eee9919 100644 --- a/Documentation/devicetree/bindings/memory-controllers/fsl/mmdc.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/fsl/mmdc.yaml @@ -33,6 +33,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/memory-controllers/st,stm32-fmc2-ebi.yaml b/Documentation/devicetree/bindings/memory-controllers/st,stm32-fmc2-ebi.yaml index 70eaf739036b..cba74205846a 100644 --- a/Documentation/devicetree/bindings/memory-controllers/st,stm32-fmc2-ebi.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/st,stm32-fmc2-ebi.yaml @@ -194,6 +194,8 @@ required: - clocks - ranges +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/mfd/gateworks-gsc.yaml b/Documentation/devicetree/bindings/mfd/gateworks-gsc.yaml index 9b6eb50606e8..95e47f317ed2 100644 --- a/Documentation/devicetree/bindings/mfd/gateworks-gsc.yaml +++ b/Documentation/devicetree/bindings/mfd/gateworks-gsc.yaml @@ -144,6 +144,8 @@ required: - "#address-cells" - "#size-cells" +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/mfd/xylon,logicvc.yaml b/Documentation/devicetree/bindings/mfd/xylon,logicvc.yaml index abc9937506e0..8a1a6625c782 100644 --- a/Documentation/devicetree/bindings/mfd/xylon,logicvc.yaml +++ b/Documentation/devicetree/bindings/mfd/xylon,logicvc.yaml @@ -26,6 +26,12 @@ properties: reg: maxItems: 1 + '#address-cells': + const: 1 + + '#size-cells': + const: 1 + select: properties: compatible: @@ -36,15 +42,19 @@ select: required: - compatible +patternProperties: + "^gpio@[0-9a-f]+$": + $ref: /schemas/gpio/xylon,logicvc-gpio.yaml# + required: - compatible - reg +additionalProperties: false + examples: - | logicvc: logicvc@43c00000 { compatible = "xylon,logicvc-3.02.a", "syscon", "simple-mfd"; reg = <0x43c00000 0x6000>; - #address-cells = <1>; - #size-cells = <1>; }; diff --git a/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml b/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml index 16fa03d65ad5..6df1a9470d8f 100644 --- a/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml +++ b/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml @@ -32,12 +32,16 @@ properties: clocks: maxItems: 1 + device_type: true + required: - device_type - compatible - reg - clocks +additionalProperties: false + examples: - | #include @@ -52,7 +56,6 @@ examples: reg = <0>; clocks = <&cgu JZ4780_CLK_CPU>; - clock-names = "cpu"; }; cpu1: cpu@1 { @@ -61,7 +64,6 @@ examples: reg = <1>; clocks = <&cgu JZ4780_CLK_CORE1>; - clock-names = "cpu"; }; }; ... diff --git a/Documentation/devicetree/bindings/mips/loongson/rs780e-acpi.yaml b/Documentation/devicetree/bindings/mips/loongson/rs780e-acpi.yaml index d317897e1115..7c0f9022202c 100644 --- a/Documentation/devicetree/bindings/mips/loongson/rs780e-acpi.yaml +++ b/Documentation/devicetree/bindings/mips/loongson/rs780e-acpi.yaml @@ -23,6 +23,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | isa@0 { diff --git a/Documentation/devicetree/bindings/mmc/mmc-pwrseq-emmc.yaml b/Documentation/devicetree/bindings/mmc/mmc-pwrseq-emmc.yaml index 77f746f57284..1fc7e620f328 100644 --- a/Documentation/devicetree/bindings/mmc/mmc-pwrseq-emmc.yaml +++ b/Documentation/devicetree/bindings/mmc/mmc-pwrseq-emmc.yaml @@ -36,6 +36,8 @@ required: - compatible - reset-gpios +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/mmc/mmc-pwrseq-sd8787.yaml b/Documentation/devicetree/bindings/mmc/mmc-pwrseq-sd8787.yaml index a68820d31d50..e0169a285aa2 100644 --- a/Documentation/devicetree/bindings/mmc/mmc-pwrseq-sd8787.yaml +++ b/Documentation/devicetree/bindings/mmc/mmc-pwrseq-sd8787.yaml @@ -28,6 +28,8 @@ required: - powerdown-gpios - reset-gpios +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.yaml b/Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.yaml index 449215444723..06bbd8590544 100644 --- a/Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.yaml +++ b/Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.yaml @@ -50,6 +50,8 @@ properties: required: - compatible +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/net/qcom,ipa.yaml b/Documentation/devicetree/bindings/net/qcom,ipa.yaml index 8594f114f016..4d8464b2676d 100644 --- a/Documentation/devicetree/bindings/net/qcom,ipa.yaml +++ b/Documentation/devicetree/bindings/net/qcom,ipa.yaml @@ -144,6 +144,8 @@ oneOf: - required: - memory-region +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/net/realtek-bluetooth.yaml b/Documentation/devicetree/bindings/net/realtek-bluetooth.yaml index c488f24ed38f..4f485df69ac3 100644 --- a/Documentation/devicetree/bindings/net/realtek-bluetooth.yaml +++ b/Documentation/devicetree/bindings/net/realtek-bluetooth.yaml @@ -37,6 +37,8 @@ properties: required: - compatible +additionalProperties: false + examples: - | #include @@ -49,6 +51,6 @@ examples: bluetooth { compatible = "realtek,rtl8723bs-bt"; device-wake-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */ - host-wakeup-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */ + host-wake-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */ }; }; diff --git a/Documentation/devicetree/bindings/net/wireless/microchip,wilc1000.yaml b/Documentation/devicetree/bindings/net/wireless/microchip,wilc1000.yaml index 2c320eb2a8c4..6c35682377e6 100644 --- a/Documentation/devicetree/bindings/net/wireless/microchip,wilc1000.yaml +++ b/Documentation/devicetree/bindings/net/wireless/microchip,wilc1000.yaml @@ -18,6 +18,8 @@ properties: compatible: const: microchip,wilc1000 + reg: true + spi-max-frequency: true interrupts: @@ -34,6 +36,8 @@ required: - compatible - interrupts +additionalProperties: false + examples: - | spi { diff --git a/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml b/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml index aa483c7f27fd..53d5952b7e57 100644 --- a/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml +++ b/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml @@ -55,6 +55,8 @@ required: - clock-names - max-functions +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb2-phy.yaml b/Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb2-phy.yaml index 0d2557bb0bcc..399ebde45409 100644 --- a/Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb2-phy.yaml +++ b/Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb2-phy.yaml @@ -63,6 +63,8 @@ then: required: - power-domains +additionalProperties: false + examples: - | phy@36000 { diff --git a/Documentation/devicetree/bindings/phy/qcom,ipq806x-usb-phy-hs.yaml b/Documentation/devicetree/bindings/phy/qcom,ipq806x-usb-phy-hs.yaml index 23887ebe08fd..17f132ce5516 100644 --- a/Documentation/devicetree/bindings/phy/qcom,ipq806x-usb-phy-hs.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,ipq806x-usb-phy-hs.yaml @@ -42,6 +42,8 @@ required: - clocks - clock-names +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/phy/qcom,ipq806x-usb-phy-ss.yaml b/Documentation/devicetree/bindings/phy/qcom,ipq806x-usb-phy-ss.yaml index fa30c24b4405..17fd7f6b83bb 100644 --- a/Documentation/devicetree/bindings/phy/qcom,ipq806x-usb-phy-ss.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,ipq806x-usb-phy-ss.yaml @@ -60,6 +60,8 @@ required: - clocks - clock-names +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml index ccda92859eca..d457fb6a4779 100644 --- a/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml @@ -158,6 +158,7 @@ required: - vdda-phy-dpdm-supply - resets +additionalProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/phy/qcom-usb-ipq4019-phy.yaml b/Documentation/devicetree/bindings/phy/qcom-usb-ipq4019-phy.yaml index 1118fe69b611..3e7191b168fb 100644 --- a/Documentation/devicetree/bindings/phy/qcom-usb-ipq4019-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom-usb-ipq4019-phy.yaml @@ -36,6 +36,8 @@ required: - reset-names - "#phy-cells" +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/pinctrl/cirrus,lochnagar.yaml b/Documentation/devicetree/bindings/pinctrl/cirrus,lochnagar.yaml index 420d74856032..a07dd197176a 100644 --- a/Documentation/devicetree/bindings/pinctrl/cirrus,lochnagar.yaml +++ b/Documentation/devicetree/bindings/pinctrl/cirrus,lochnagar.yaml @@ -188,3 +188,5 @@ required: - gpio-ranges - pinctrl-0 - pinctrl-names + +additionalProperties: false diff --git a/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml index f8a93d8680f9..502480a19f49 100644 --- a/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml @@ -28,6 +28,8 @@ properties: required: - compatible +additionalProperties: false + examples: - | // The UniPhier pinctrl should be a subnode of a "syscon" compatible node. diff --git a/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml index bc4e037f3f73..5dae04d2936c 100644 --- a/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml +++ b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml @@ -27,6 +27,8 @@ required: - compatible - "#power-domain-cells" +additionalProperties: false + examples: - | secure-monitor { diff --git a/Documentation/devicetree/bindings/power/domain-idle-state.yaml b/Documentation/devicetree/bindings/power/domain-idle-state.yaml index dfba1af9abe5..6a12efdf436a 100644 --- a/Documentation/devicetree/bindings/power/domain-idle-state.yaml +++ b/Documentation/devicetree/bindings/power/domain-idle-state.yaml @@ -50,6 +50,8 @@ patternProperties: - exit-latency-us - min-residency-us +additionalProperties: false + examples: - | diff --git a/Documentation/devicetree/bindings/power/mti,mips-cpc.yaml b/Documentation/devicetree/bindings/power/mti,mips-cpc.yaml index ccdeaece169e..be447ccfdcb8 100644 --- a/Documentation/devicetree/bindings/power/mti,mips-cpc.yaml +++ b/Documentation/devicetree/bindings/power/mti,mips-cpc.yaml @@ -26,6 +26,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | cpc@1bde0000 { diff --git a/Documentation/devicetree/bindings/power/supply/cw2015_battery.yaml b/Documentation/devicetree/bindings/power/supply/cw2015_battery.yaml index 2036977ecc2f..ee92e6a076ac 100644 --- a/Documentation/devicetree/bindings/power/supply/cw2015_battery.yaml +++ b/Documentation/devicetree/bindings/power/supply/cw2015_battery.yaml @@ -52,6 +52,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | i2c { diff --git a/Documentation/devicetree/bindings/power/supply/rohm,bd99954.yaml b/Documentation/devicetree/bindings/power/supply/rohm,bd99954.yaml index 7e0f73a898c7..9852d2febf65 100644 --- a/Documentation/devicetree/bindings/power/supply/rohm,bd99954.yaml +++ b/Documentation/devicetree/bindings/power/supply/rohm,bd99954.yaml @@ -112,6 +112,12 @@ properties: # threshold, and the current is below this setting (7 in above chart) # See also Documentation/devicetree/bindings/power/supply/battery.txt + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + monitored-battery: description: phandle of battery characteristics devicetree node @@ -137,6 +143,8 @@ properties: required: - compatible +additionalProperties: false + examples: - | i2c { diff --git a/Documentation/devicetree/bindings/regulator/silergy,sy8827n.yaml b/Documentation/devicetree/bindings/regulator/silergy,sy8827n.yaml index 15983cdc7c28..b222adabc7b4 100644 --- a/Documentation/devicetree/bindings/regulator/silergy,sy8827n.yaml +++ b/Documentation/devicetree/bindings/regulator/silergy,sy8827n.yaml @@ -31,6 +31,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | i2c { diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,pil-info.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,pil-info.yaml index 87c52316ddbd..9282837d64ba 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,pil-info.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,pil-info.yaml @@ -25,6 +25,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | imem@146bf000 { diff --git a/Documentation/devicetree/bindings/serial/samsung_uart.yaml b/Documentation/devicetree/bindings/serial/samsung_uart.yaml index 96414ac65d06..21ee627b2ced 100644 --- a/Documentation/devicetree/bindings/serial/samsung_uart.yaml +++ b/Documentation/devicetree/bindings/serial/samsung_uart.yaml @@ -68,6 +68,8 @@ required: - interrupts - reg +additionalProperties: false + allOf: - if: properties: diff --git a/Documentation/devicetree/bindings/serial/socionext,uniphier-uart.yaml b/Documentation/devicetree/bindings/serial/socionext,uniphier-uart.yaml index 09a30300850c..d490c7c4b967 100644 --- a/Documentation/devicetree/bindings/serial/socionext,uniphier-uart.yaml +++ b/Documentation/devicetree/bindings/serial/socionext,uniphier-uart.yaml @@ -32,6 +32,8 @@ required: - interrupts - clocks +additionalProperties: false + examples: - | aliases { diff --git a/Documentation/devicetree/bindings/serial/sprd-uart.yaml b/Documentation/devicetree/bindings/serial/sprd-uart.yaml index e66b2e92a7fc..09f6283f3cae 100644 --- a/Documentation/devicetree/bindings/serial/sprd-uart.yaml +++ b/Documentation/devicetree/bindings/serial/sprd-uart.yaml @@ -56,6 +56,8 @@ required: - reg - interrupts +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml index bd04fdb57414..84671950ca0d 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml @@ -173,6 +173,7 @@ patternProperties: - compatible - interrupts +additionalProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/sound/amlogic,g12a-toacodec.yaml b/Documentation/devicetree/bindings/sound/amlogic,g12a-toacodec.yaml index b4b3828c40af..3c3891d17238 100644 --- a/Documentation/devicetree/bindings/sound/amlogic,g12a-toacodec.yaml +++ b/Documentation/devicetree/bindings/sound/amlogic,g12a-toacodec.yaml @@ -37,6 +37,8 @@ required: - reg - resets +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml b/Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml index fb374c659be1..db61f0731a20 100644 --- a/Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml +++ b/Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml @@ -84,6 +84,8 @@ required: - model - dai-link-0 +additionalProperties: false + examples: - | sound { diff --git a/Documentation/devicetree/bindings/sound/amlogic,t9015.yaml b/Documentation/devicetree/bindings/sound/amlogic,t9015.yaml index 04014e658c90..c7613ea728d4 100644 --- a/Documentation/devicetree/bindings/sound/amlogic,t9015.yaml +++ b/Documentation/devicetree/bindings/sound/amlogic,t9015.yaml @@ -42,6 +42,8 @@ required: - clock-names - resets +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/sound/cirrus,cs42l51.yaml b/Documentation/devicetree/bindings/sound/cirrus,cs42l51.yaml index 5bcb643c288f..0d87e2c86a42 100644 --- a/Documentation/devicetree/bindings/sound/cirrus,cs42l51.yaml +++ b/Documentation/devicetree/bindings/sound/cirrus,cs42l51.yaml @@ -46,6 +46,8 @@ required: - reg - "#sound-dai-cells" +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/sound/fsl,easrc.yaml b/Documentation/devicetree/bindings/sound/fsl,easrc.yaml index 32d547af9ce7..bdde68a1059c 100644 --- a/Documentation/devicetree/bindings/sound/fsl,easrc.yaml +++ b/Documentation/devicetree/bindings/sound/fsl,easrc.yaml @@ -74,6 +74,8 @@ required: - fsl,asrc-rate - fsl,asrc-format +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/sound/intel,keembay-i2s.yaml b/Documentation/devicetree/bindings/sound/intel,keembay-i2s.yaml index 2e0bbc1c868a..6cbdd8857ea2 100644 --- a/Documentation/devicetree/bindings/sound/intel,keembay-i2s.yaml +++ b/Documentation/devicetree/bindings/sound/intel,keembay-i2s.yaml @@ -52,6 +52,8 @@ required: - clock-names - interrupts +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra186-dspk.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra186-dspk.yaml index 2f2fcffa65cb..ed2fb32fcdd4 100644 --- a/Documentation/devicetree/bindings/sound/nvidia,tegra186-dspk.yaml +++ b/Documentation/devicetree/bindings/sound/nvidia,tegra186-dspk.yaml @@ -64,6 +64,8 @@ required: - assigned-clock-parents - sound-name-prefix +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-admaif.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-admaif.yaml index 41c77f45d2fd..c028b259e822 100644 --- a/Documentation/devicetree/bindings/sound/nvidia,tegra210-admaif.yaml +++ b/Documentation/devicetree/bindings/sound/nvidia,tegra210-admaif.yaml @@ -81,6 +81,8 @@ required: - dmas - dma-names +additionalProperties: false + examples: - | admaif@702d0000 { diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-dmic.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-dmic.yaml index 8689d9f18c11..2a3207b550e7 100644 --- a/Documentation/devicetree/bindings/sound/nvidia,tegra210-dmic.yaml +++ b/Documentation/devicetree/bindings/sound/nvidia,tegra210-dmic.yaml @@ -64,6 +64,8 @@ required: - assigned-clocks - assigned-clock-parents +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-i2s.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-i2s.yaml index 9bbf18153d63..dfc1bf7b7722 100644 --- a/Documentation/devicetree/bindings/sound/nvidia,tegra210-i2s.yaml +++ b/Documentation/devicetree/bindings/sound/nvidia,tegra210-i2s.yaml @@ -82,6 +82,8 @@ required: - assigned-clocks - assigned-clock-parents +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/sound/rockchip,rk3328-codec.yaml b/Documentation/devicetree/bindings/sound/rockchip,rk3328-codec.yaml index 5b85ad5e4834..75b3b33b5f1f 100644 --- a/Documentation/devicetree/bindings/sound/rockchip,rk3328-codec.yaml +++ b/Documentation/devicetree/bindings/sound/rockchip,rk3328-codec.yaml @@ -53,6 +53,8 @@ required: - rockchip,grf - "#sound-dai-cells" +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/sound/tlv320adcx140.yaml b/Documentation/devicetree/bindings/sound/tlv320adcx140.yaml index f578f17f3e04..1bff53d37118 100644 --- a/Documentation/devicetree/bindings/sound/tlv320adcx140.yaml +++ b/Documentation/devicetree/bindings/sound/tlv320adcx140.yaml @@ -138,6 +138,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/thermal/rcar-thermal.yaml b/Documentation/devicetree/bindings/thermal/rcar-thermal.yaml index 0994693d240f..7e9557ac0e4a 100644 --- a/Documentation/devicetree/bindings/thermal/rcar-thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/rcar-thermal.yaml @@ -59,6 +59,9 @@ properties: resets: maxItems: 1 + "#thermal-sensor-cells": + const: 0 + if: properties: compatible: @@ -79,6 +82,8 @@ else: - power-domains - resets +additionalProperties: false + examples: # Example (non interrupt support) - | diff --git a/Documentation/devicetree/bindings/thermal/sprd-thermal.yaml b/Documentation/devicetree/bindings/thermal/sprd-thermal.yaml index af2ff930646a..6d65a3cf2af2 100644 --- a/Documentation/devicetree/bindings/thermal/sprd-thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/sprd-thermal.yaml @@ -68,6 +68,8 @@ patternProperties: - nvmem-cells - nvmem-cell-names + additionalProperties: false + required: - compatible - reg @@ -79,6 +81,8 @@ required: - "#address-cells" - "#size-cells" +additionalProperties: false + examples: - | ap_thm0: thermal@32200000 { diff --git a/Documentation/devicetree/bindings/thermal/thermal-idle.yaml b/Documentation/devicetree/bindings/thermal/thermal-idle.yaml index a832d427e9d5..6278ccf16f3f 100644 --- a/Documentation/devicetree/bindings/thermal/thermal-idle.yaml +++ b/Documentation/devicetree/bindings/thermal/thermal-idle.yaml @@ -44,6 +44,8 @@ properties: required: - '#cooling-cells' +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/thermal/thermal-zones.yaml b/Documentation/devicetree/bindings/thermal/thermal-zones.yaml index 3ec9cc87ec50..164f71598c59 100644 --- a/Documentation/devicetree/bindings/thermal/thermal-zones.yaml +++ b/Documentation/devicetree/bindings/thermal/thermal-zones.yaml @@ -218,6 +218,8 @@ patternProperties: - trips additionalProperties: false +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/timer/cdns,ttc.yaml b/Documentation/devicetree/bindings/timer/cdns,ttc.yaml index c532b60b9c63..8615353f69b4 100644 --- a/Documentation/devicetree/bindings/timer/cdns,ttc.yaml +++ b/Documentation/devicetree/bindings/timer/cdns,ttc.yaml @@ -36,6 +36,8 @@ required: - interrupts - clocks +additionalProperties: false + examples: - | ttc0: ttc0@f8001000 { diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.yaml b/Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.yaml index 196589c93373..e60e590dbe12 100644 --- a/Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.yaml +++ b/Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.yaml @@ -155,6 +155,8 @@ allOf: clock-names: maxItems: 4 +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml index dac10848dd7f..2cf525d21e05 100644 --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml @@ -121,6 +121,8 @@ required: - interrupts - interrupt-names +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/usb/ti,j721e-usb.yaml b/Documentation/devicetree/bindings/usb/ti,j721e-usb.yaml index 484fc1091d7c..388245b91a55 100644 --- a/Documentation/devicetree/bindings/usb/ti,j721e-usb.yaml +++ b/Documentation/devicetree/bindings/usb/ti,j721e-usb.yaml @@ -46,6 +46,22 @@ properties: VBUS pin of the SoC via a 1/3 voltage divider. type: boolean + assigned-clocks: + maxItems: 1 + + assigned-clock-parents: + maxItems: 1 + + '#address-cells': + const: 2 + + '#size-cells': + const: 2 + +patternProperties: + "^usb@": + type: object + required: - compatible - reg @@ -53,6 +69,8 @@ required: - clocks - clock-names +additionalProperties: false + examples: - | #include From 36705c6fc4980aa7fe72c7a588e78ac7a0833009 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 3 Oct 2020 12:33:35 +0200 Subject: [PATCH 407/433] dt-bindings: vendor-prefixes: favor "gateworks" over "gw" There are two vendor prefixes for Gateworks: "gw" and "gateworks". Favor the longer one (more descriptive) and mark "gw" as deprecated so it will not be used in new bindings. Reviewed-by: Linus Walleij Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20201003103335.23404-1-krzk@kernel.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index d36e309b7d76..d92399226f26 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -425,6 +425,8 @@ patternProperties: description: Gumstix, Inc. "^gw,.*": description: Gateworks Corporation + use "gateworks" vendor prefix + deprecated: true "^hannstar,.*": description: HannStar Display Corporation "^haoyu,.*": From 406171bf9a19b15dcf80173048e444ce164381fe Mon Sep 17 00:00:00 2001 From: Sagar Kadam Date: Tue, 29 Sep 2020 21:02:09 +0530 Subject: [PATCH 408/433] dt-bindings: fu540: prci: convert PRCI bindings to json-schema FU540-C000 SoC from SiFive has a PRCI block, here we convert the device tree bindings from txt to YAML. Signed-off-by: Sagar Kadam Link: https://lore.kernel.org/r/1601393531-2402-2-git-send-email-sagar.kadam@sifive.com Signed-off-by: Rob Herring --- .../bindings/clock/sifive/fu540-prci.txt | 46 -------------- .../bindings/clock/sifive/fu540-prci.yaml | 60 +++++++++++++++++++ 2 files changed, 60 insertions(+), 46 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/sifive/fu540-prci.txt create mode 100644 Documentation/devicetree/bindings/clock/sifive/fu540-prci.yaml diff --git a/Documentation/devicetree/bindings/clock/sifive/fu540-prci.txt b/Documentation/devicetree/bindings/clock/sifive/fu540-prci.txt deleted file mode 100644 index 349808f4fb8c..000000000000 --- a/Documentation/devicetree/bindings/clock/sifive/fu540-prci.txt +++ /dev/null @@ -1,46 +0,0 @@ -SiFive FU540 PRCI bindings - -On the FU540 family of SoCs, most system-wide clock and reset integration -is via the PRCI IP block. - -Required properties: -- compatible: Should be "sifive,-prci". Only one value is - supported: "sifive,fu540-c000-prci" -- reg: Should describe the PRCI's register target physical address region -- clocks: Should point to the hfclk device tree node and the rtcclk - device tree node. The RTC clock here is not a time-of-day clock, - but is instead a high-stability clock source for system timers - and cycle counters. -- #clock-cells: Should be <1> - -The clock consumer should specify the desired clock via the clock ID -macros defined in include/dt-bindings/clock/sifive-fu540-prci.h. -These macros begin with PRCI_CLK_. - -The hfclk and rtcclk nodes are required, and represent physical -crystals or resonators located on the PCB. These nodes should be present -underneath /, rather than /soc. - -Examples: - -/* under /, in PCB-specific DT data */ -hfclk: hfclk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <33333333>; - clock-output-names = "hfclk"; -}; -rtcclk: rtcclk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <1000000>; - clock-output-names = "rtcclk"; -}; - -/* under /soc, in SoC-specific DT data */ -prci: clock-controller@10000000 { - compatible = "sifive,fu540-c000-prci"; - reg = <0x0 0x10000000 0x0 0x1000>; - clocks = <&hfclk>, <&rtcclk>; - #clock-cells = <1>; -}; diff --git a/Documentation/devicetree/bindings/clock/sifive/fu540-prci.yaml b/Documentation/devicetree/bindings/clock/sifive/fu540-prci.yaml new file mode 100644 index 000000000000..c3be1b600007 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/sifive/fu540-prci.yaml @@ -0,0 +1,60 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (C) 2020 SiFive, Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/sifive/fu540-prci.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SiFive FU540 Power Reset Clock Interrupt Controller (PRCI) + +maintainers: + - Sagar Kadam + - Paul Walmsley + +description: + On the FU540 family of SoCs, most system-wide clock and reset integration + is via the PRCI IP block. + The clock consumer should specify the desired clock via the clock ID + macros defined in include/dt-bindings/clock/sifive-fu540-prci.h. + These macros begin with PRCI_CLK_. + + The hfclk and rtcclk nodes are required, and represent physical + crystals or resonators located on the PCB. These nodes should be present + underneath /, rather than /soc. + +properties: + compatible: + const: sifive,fu540-c000-prci + + reg: + maxItems: 1 + + clocks: + items: + - description: high frequency clock. + - description: RTL clock. + + clock-names: + items: + - const: hfclk + - const: rtcclk + + "#clock-cells": + const: 1 + +required: + - compatible + - reg + - clocks + - "#clock-cells" + +additionalProperties: false + +examples: + - | + prci: clock-controller@10000000 { + compatible = "sifive,fu540-c000-prci"; + reg = <0x10000000 0x1000>; + clocks = <&hfclk>, <&rtcclk>; + #clock-cells = <1>; + }; From c825a081c169cc7f2b956a4b29c878662834e672 Mon Sep 17 00:00:00 2001 From: Sagar Kadam Date: Tue, 29 Sep 2020 21:02:10 +0530 Subject: [PATCH 409/433] dt-bindings: riscv: convert plic bindings to json-schema Convert device tree bindings for SiFive's PLIC to YAML format Signed-off-by: Sagar Kadam Link: https://lore.kernel.org/r/1601393531-2402-3-git-send-email-sagar.kadam@sifive.com Signed-off-by: Rob Herring --- .../sifive,plic-1.0.0.txt | 58 ----------- .../sifive,plic-1.0.0.yaml | 97 +++++++++++++++++++ 2 files changed, 97 insertions(+), 58 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml diff --git a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.txt b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.txt deleted file mode 100644 index 6adf7a6e8825..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.txt +++ /dev/null @@ -1,58 +0,0 @@ -SiFive Platform-Level Interrupt Controller (PLIC) -------------------------------------------------- - -SiFive SOCs include an implementation of the Platform-Level Interrupt Controller -(PLIC) high-level specification in the RISC-V Privileged Architecture -specification. The PLIC connects all external interrupts in the system to all -hart contexts in the system, via the external interrupt source in each hart. - -A hart context is a privilege mode in a hardware execution thread. For example, -in an 4 core system with 2-way SMT, you have 8 harts and probably at least two -privilege modes per hart; machine mode and supervisor mode. - -Each interrupt can be enabled on per-context basis. Any context can claim -a pending enabled interrupt and then release it once it has been handled. - -Each interrupt has a configurable priority. Higher priority interrupts are -serviced first. Each context can specify a priority threshold. Interrupts -with priority below this threshold will not cause the PLIC to raise its -interrupt line leading to the context. - -While the PLIC supports both edge-triggered and level-triggered interrupts, -interrupt handlers are oblivious to this distinction and therefore it is not -specified in the PLIC device-tree binding. - -While the RISC-V ISA doesn't specify a memory layout for the PLIC, the -"sifive,plic-1.0.0" device is a concrete implementation of the PLIC that -contains a specific memory layout, which is documented in chapter 8 of the -SiFive U5 Coreplex Series Manual . - -Required properties: -- compatible : "sifive,plic-1.0.0" and a string identifying the actual - detailed implementation in case that specific bugs need to be worked around. -- #address-cells : should be <0> or more. -- #interrupt-cells : should be <1> or more. -- interrupt-controller : Identifies the node as an interrupt controller. -- reg : Should contain 1 register range (address and length). -- interrupts-extended : Specifies which contexts are connected to the PLIC, - with "-1" specifying that a context is not present. Each node pointed - to should be a riscv,cpu-intc node, which has a riscv node as parent. -- riscv,ndev: Specifies how many external interrupts are supported by - this controller. - -Example: - - plic: interrupt-controller@c000000 { - #address-cells = <0>; - #interrupt-cells = <1>; - compatible = "sifive,plic-1.0.0", "sifive,fu540-c000-plic"; - interrupt-controller; - interrupts-extended = < - &cpu0-intc 11 - &cpu1-intc 11 &cpu1-intc 9 - &cpu2-intc 11 &cpu2-intc 9 - &cpu3-intc 11 &cpu3-intc 9 - &cpu4-intc 11 &cpu4-intc 9>; - reg = <0xc000000 0x4000000>; - riscv,ndev = <10>; - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml new file mode 100644 index 000000000000..b9a61c9f7530 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml @@ -0,0 +1,97 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +# Copyright (C) 2020 SiFive, Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/sifive,plic-1.0.0.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SiFive Platform-Level Interrupt Controller (PLIC) + +description: + SiFive SOCs include an implementation of the Platform-Level Interrupt Controller + (PLIC) high-level specification in the RISC-V Privileged Architecture + specification. The PLIC connects all external interrupts in the system to all + hart contexts in the system, via the external interrupt source in each hart. + + A hart context is a privilege mode in a hardware execution thread. For example, + in an 4 core system with 2-way SMT, you have 8 harts and probably at least two + privilege modes per hart; machine mode and supervisor mode. + + Each interrupt can be enabled on per-context basis. Any context can claim + a pending enabled interrupt and then release it once it has been handled. + + Each interrupt has a configurable priority. Higher priority interrupts are + serviced first. Each context can specify a priority threshold. Interrupts + with priority below this threshold will not cause the PLIC to raise its + interrupt line leading to the context. + + While the PLIC supports both edge-triggered and level-triggered interrupts, + interrupt handlers are oblivious to this distinction and therefore it is not + specified in the PLIC device-tree binding. + + While the RISC-V ISA doesn't specify a memory layout for the PLIC, the + "sifive,plic-1.0.0" device is a concrete implementation of the PLIC that + contains a specific memory layout, which is documented in chapter 8 of the + SiFive U5 Coreplex Series Manual . + +maintainers: + - Sagar Kadam + - Paul Walmsley + - Palmer Dabbelt + +properties: + compatible: + items: + - const: sifive,fu540-c000-plic + - const: sifive,plic-1.0.0 + + reg: + maxItems: 1 + + '#address-cells': + const: 0 + + '#interrupt-cells': + const: 1 + + interrupt-controller: true + + interrupts-extended: + minItems: 1 + description: + Specifies which contexts are connected to the PLIC, with "-1" specifying + that a context is not present. Each node pointed to should be a + riscv,cpu-intc node, which has a riscv node as parent. + + riscv,ndev: + $ref: "/schemas/types.yaml#/definitions/uint32" + description: + Specifies how many external interrupts are supported by this controller. + +required: + - compatible + - '#address-cells' + - '#interrupt-cells' + - interrupt-controller + - reg + - interrupts-extended + - riscv,ndev + +additionalProperties: false + +examples: + - | + plic: interrupt-controller@c000000 { + #address-cells = <0>; + #interrupt-cells = <1>; + compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0"; + interrupt-controller; + interrupts-extended = < + &cpu0_intc 11 + &cpu1_intc 11 &cpu1_intc 9 + &cpu2_intc 11 &cpu2_intc 9 + &cpu3_intc 11 &cpu3_intc 9 + &cpu4_intc 11 &cpu4_intc 9>; + reg = <0xc000000 0x4000000>; + riscv,ndev = <10>; + }; From 6b49329ae68caeefbd0d69ff85475cd54a4b0d03 Mon Sep 17 00:00:00 2001 From: Sagar Kadam Date: Tue, 29 Sep 2020 21:02:11 +0530 Subject: [PATCH 410/433] dt-bindings: riscv: convert pwm bindings to json-schema Convert device tree bindings for SiFive's PWM controller to YAML format. Signed-off-by: Sagar Kadam Link: https://lore.kernel.org/r/1601393531-2402-4-git-send-email-sagar.kadam@sifive.com Signed-off-by: Rob Herring --- .../devicetree/bindings/pwm/pwm-sifive.txt | 33 --------- .../devicetree/bindings/pwm/pwm-sifive.yaml | 69 +++++++++++++++++++ 2 files changed, 69 insertions(+), 33 deletions(-) delete mode 100644 Documentation/devicetree/bindings/pwm/pwm-sifive.txt create mode 100644 Documentation/devicetree/bindings/pwm/pwm-sifive.yaml diff --git a/Documentation/devicetree/bindings/pwm/pwm-sifive.txt b/Documentation/devicetree/bindings/pwm/pwm-sifive.txt deleted file mode 100644 index 3d1dd7b06efc..000000000000 --- a/Documentation/devicetree/bindings/pwm/pwm-sifive.txt +++ /dev/null @@ -1,33 +0,0 @@ -SiFive PWM controller - -Unlike most other PWM controllers, the SiFive PWM controller currently only -supports one period for all channels in the PWM. All PWMs need to run at -the same period. The period also has significant restrictions on the values -it can achieve, which the driver rounds to the nearest achievable period. -PWM RTL that corresponds to the IP block version numbers can be found -here: - -https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/pwm - -Required properties: -- compatible: Should be "sifive,-pwm" and "sifive,pwm". - Supported compatible strings are: "sifive,fu540-c000-pwm" for the SiFive - PWM v0 as integrated onto the SiFive FU540 chip, and "sifive,pwm0" for the - SiFive PWM v0 IP block with no chip integration tweaks. - Please refer to sifive-blocks-ip-versioning.txt for details. -- reg: physical base address and length of the controller's registers -- clocks: Should contain a clock identifier for the PWM's parent clock. -- #pwm-cells: Should be 3. See pwm.yaml in this directory - for a description of the cell format. -- interrupts: one interrupt per PWM channel - -Examples: - -pwm: pwm@10020000 { - compatible = "sifive,fu540-c000-pwm", "sifive,pwm0"; - reg = <0x0 0x10020000 0x0 0x1000>; - clocks = <&tlclk>; - interrupt-parent = <&plic>; - interrupts = <42 43 44 45>; - #pwm-cells = <3>; -}; diff --git a/Documentation/devicetree/bindings/pwm/pwm-sifive.yaml b/Documentation/devicetree/bindings/pwm/pwm-sifive.yaml new file mode 100644 index 000000000000..5ac25275d8bf --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/pwm-sifive.yaml @@ -0,0 +1,69 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (C) 2020 SiFive, Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/pwm-sifive.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SiFive PWM controller + +maintainers: + - Yash Shah + - Sagar Kadam + - Paul Walmsley + +description: + Unlike most other PWM controllers, the SiFive PWM controller currently + only supports one period for all channels in the PWM. All PWMs need to + run at the same period. The period also has significant restrictions on + the values it can achieve, which the driver rounds to the nearest + achievable period. PWM RTL that corresponds to the IP block version + numbers can be found here - + + https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/pwm + +properties: + compatible: + items: + - const: sifive,fu540-c000-pwm + - const: sifive,pwm0 + description: + Should be "sifive,-pwm" and "sifive,pwm". Supported + compatible strings are "sifive,fu540-c000-pwm" for the SiFive PWM v0 + as integrated onto the SiFive FU540 chip, and "sifive,pwm0" for the + SiFive PWM v0 IP block with no chip integration tweaks. + Please refer to sifive-blocks-ip-versioning.txt for details. + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + "#pwm-cells": + const: 3 + + interrupts: + maxItems: 4 + description: + Each PWM instance in FU540-C000 has 4 comparators. One interrupt per comparator. + +required: + - compatible + - reg + - clocks + - "#pwm-cells" + - interrupts + +additionalProperties: false + +examples: + - | + pwm: pwm@10020000 { + compatible = "sifive,fu540-c000-pwm", "sifive,pwm0"; + reg = <0x10020000 0x1000>; + clocks = <&tlclk>; + interrupt-parent = <&plic>; + interrupts = <42>, <43>, <44>, <45>; + #pwm-cells = <3>; + }; From 12d1f4c30ec53df24b973cbb11835989be6a643c Mon Sep 17 00:00:00 2001 From: Zhen Lei Date: Wed, 30 Sep 2020 11:17:10 +0800 Subject: [PATCH 411/433] dt-bindings: arm: hisilicon: convert Hi6220 domain controller bindings to json-schema Convert the Hisilicon Hi6220 domain controllers binding to DT schema format using json-schema. All of them are grouped into one yaml file, to help users understand differences and avoid repeated descriptions. Signed-off-by: Zhen Lei Link: https://lore.kernel.org/r/20200930031712.2365-16-thunder.leizhen@huawei.com Signed-off-by: Rob Herring --- .../controller/hi6220-domain-ctrl.yaml | 68 +++++++++++++++++++ .../controller/hisilicon,hi6220-aoctrl.txt | 18 ----- .../controller/hisilicon,hi6220-mediactrl.txt | 18 ----- .../controller/hisilicon,hi6220-pmctrl.txt | 18 ----- 4 files changed, 68 insertions(+), 54 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hi6220-domain-ctrl.yaml delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-aoctrl.txt delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-mediactrl.txt delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-pmctrl.txt diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hi6220-domain-ctrl.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/hi6220-domain-ctrl.yaml new file mode 100644 index 000000000000..6ea6d7ee7a14 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hi6220-domain-ctrl.yaml @@ -0,0 +1,68 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/hisilicon/controller/hi6220-domain-ctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Hisilicon Hi6220 domain controller + +maintainers: + - Wei Xu + +description: | + Hisilicon designs some special domain controllers for mobile platform, + such as: the power Always On domain controller, the Media domain + controller(e.g. codec, G3D ...) and the Power Management domain + controller. + + The compatible names of each domain controller are as follows: + Power Always ON domain controller --> hisilicon,hi6220-aoctrl + Media domain controller --> hisilicon,hi6220-mediactrl + Power Management domain controller --> hisilicon,hi6220-pmctrl + +properties: + compatible: + items: + - enum: + - hisilicon,hi6220-aoctrl + - hisilicon,hi6220-mediactrl + - hisilicon,hi6220-pmctrl + - const: syscon + + reg: + maxItems: 1 + + '#clock-cells': + const: 1 + + '#reset-cells': + const: 1 + +required: + - compatible + - reg + - '#clock-cells' + +additionalProperties: false + +examples: + - | + ao_ctrl@f7800000 { + compatible = "hisilicon,hi6220-aoctrl", "syscon"; + reg = <0xf7800000 0x2000>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + media_ctrl@f4410000 { + compatible = "hisilicon,hi6220-mediactrl", "syscon"; + reg = <0xf4410000 0x1000>; + #clock-cells = <1>; + }; + + pm_ctrl@f7032000 { + compatible = "hisilicon,hi6220-pmctrl", "syscon"; + reg = <0xf7032000 0x1000>; + #clock-cells = <1>; + }; +... diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-aoctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-aoctrl.txt deleted file mode 100644 index 5a723c1d45f4..000000000000 --- a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-aoctrl.txt +++ /dev/null @@ -1,18 +0,0 @@ -Hisilicon Hi6220 Power Always ON domain controller - -Required properties: -- compatible : "hisilicon,hi6220-aoctrl" -- reg : Register address and size -- #clock-cells: should be set to 1, many clock registers are defined - under this controller and this property must be present. - -Hisilicon designs this system controller to control the power always -on domain for mobile platform. - -Example: - /*for Hi6220*/ - ao_ctrl: ao_ctrl@f7800000 { - compatible = "hisilicon,hi6220-aoctrl", "syscon"; - reg = <0x0 0xf7800000 0x0 0x2000>; - #clock-cells = <1>; - }; diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-mediactrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-mediactrl.txt deleted file mode 100644 index dcfdcbcb6455..000000000000 --- a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-mediactrl.txt +++ /dev/null @@ -1,18 +0,0 @@ -Hisilicon Hi6220 Media domain controller - -Required properties: -- compatible : "hisilicon,hi6220-mediactrl" -- reg : Register address and size -- #clock-cells: should be set to 1, many clock registers are defined - under this controller and this property must be present. - -Hisilicon designs this system controller to control the multimedia -domain(e.g. codec, G3D ...) for mobile platform. - -Example: - /*for Hi6220*/ - media_ctrl: media_ctrl@f4410000 { - compatible = "hisilicon,hi6220-mediactrl", "syscon"; - reg = <0x0 0xf4410000 0x0 0x1000>; - #clock-cells = <1>; - }; diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-pmctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-pmctrl.txt deleted file mode 100644 index 972842f07b5a..000000000000 --- a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-pmctrl.txt +++ /dev/null @@ -1,18 +0,0 @@ -Hisilicon Hi6220 Power Management domain controller - -Required properties: -- compatible : "hisilicon,hi6220-pmctrl" -- reg : Register address and size -- #clock-cells: should be set to 1, some clock registers are define - under this controller and this property must be present. - -Hisilicon designs this system controller to control the power management -domain for mobile platform. - -Example: - /*for Hi6220*/ - pm_ctrl: pm_ctrl@f7032000 { - compatible = "hisilicon,hi6220-pmctrl", "syscon"; - reg = <0x0 0xf7032000 0x0 0x1000>; - #clock-cells = <1>; - }; From db7515783b99f6ae8b21470cab9ee871956b57fb Mon Sep 17 00:00:00 2001 From: Enric Balletbo i Serra Date: Thu, 1 Oct 2020 16:25:11 +0200 Subject: [PATCH 412/433] pinctrl: mediatek: Free eint data on failure The pinctrl driver can work without the EINT resource, but, if it is expected to have this resource but the mtk_build_eint() function fails after allocating their data (because can't get the resource or can't map the irq), the data is not freed and you end with a NULL pointer dereference. Fix this by freeing the data if mtk_build_eint() fails, so pinctrl still works and doesn't hang. This is noticeable after commit f97dbf48ca43 ("irqchip/mtk-sysirq: Convert to a platform driver") on MT8183 because, due this commit, the pinctrl driver fails to map the irq and spots the following bug: [ 1.947597] Unable to handle kernel NULL pointer dereference at virtual address 0000000000000004 [ 1.956404] Mem abort info: [ 1.959203] ESR = 0x96000004 [ 1.962259] EC = 0x25: DABT (current EL), IL = 32 bits [ 1.967565] SET = 0, FnV = 0 [ 1.970613] EA = 0, S1PTW = 0 [ 1.973747] Data abort info: [ 1.976619] ISV = 0, ISS = 0x00000004 [ 1.980447] CM = 0, WnR = 0 [ 1.983410] [0000000000000004] user address but active_mm is swapper [ 1.989759] Internal error: Oops: 96000004 [#1] PREEMPT SMP [ 1.995322] Modules linked in: [ 1.998371] CPU: 7 PID: 1 Comm: swapper/0 Not tainted 5.9.0-rc1+ #44 [ 2.004715] Hardware name: MediaTek krane sku176 board (DT) [ 2.010280] pstate: 60000005 (nZCv daif -PAN -UAO BTYPE=--) [ 2.015850] pc : mtk_eint_set_debounce+0x48/0x1b8 [ 2.020546] lr : mtk_eint_set_debounce+0x34/0x1b8 [ 2.025239] sp : ffff80001008baa0 [ 2.028544] x29: ffff80001008baa0 x28: ffff0000ff7ff790 [ 2.033847] x27: ffff0000f9ec34b0 x26: ffff0000f9ec3480 [ 2.039150] x25: ffff0000fa576410 x24: ffff0000fa502800 [ 2.044453] x23: 0000000000001388 x22: ffff0000fa635f80 [ 2.049755] x21: 0000000000000008 x20: 0000000000000000 [ 2.055058] x19: 0000000000000071 x18: 0000000000000001 [ 2.060360] x17: 0000000000000000 x16: 0000000000000000 [ 2.065662] x15: ffff0000facc8470 x14: ffffffffffffffff [ 2.070965] x13: 0000000000000001 x12: 00000000000000c0 [ 2.076267] x11: 0000000000000040 x10: 0000000000000070 [ 2.081569] x9 : ffffaec0063d24d8 x8 : ffff0000fa800270 [ 2.086872] x7 : 0000000000000000 x6 : 0000000000000011 [ 2.092174] x5 : ffff0000fa800248 x4 : ffff0000fa800270 [ 2.097476] x3 : ffff8000100c5000 x2 : 0000000000000000 [ 2.102778] x1 : 0000000000000000 x0 : 0000000000000000 [ 2.108081] Call trace: [ 2.110520] mtk_eint_set_debounce+0x48/0x1b8 [ 2.114870] mtk_gpio_set_config+0x5c/0x78 [ 2.118958] gpiod_set_config+0x5c/0x78 [ 2.122786] gpiod_set_debounce+0x18/0x28 [ 2.126789] gpio_keys_probe+0x50c/0x910 [ 2.130705] platform_drv_probe+0x54/0xa8 [ 2.134705] really_probe+0xe4/0x3b0 [ 2.138271] driver_probe_device+0x58/0xb8 [ 2.142358] device_driver_attach+0x74/0x80 [ 2.146532] __driver_attach+0x58/0xe0 [ 2.150274] bus_for_each_dev+0x70/0xc0 [ 2.154100] driver_attach+0x24/0x30 [ 2.157666] bus_add_driver+0x14c/0x1f0 [ 2.161493] driver_register+0x64/0x120 [ 2.165319] __platform_driver_register+0x48/0x58 [ 2.170017] gpio_keys_init+0x1c/0x28 [ 2.173672] do_one_initcall+0x54/0x1b4 [ 2.177499] kernel_init_freeable+0x1d0/0x238 [ 2.181848] kernel_init+0x14/0x118 [ 2.185328] ret_from_fork+0x10/0x34 [ 2.188899] Code: a9438ac1 12001266 f94006c3 121e766a (b9400421) [ 2.194991] ---[ end trace 168cf7b3324b6570 ]--- [ 2.199611] Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b [ 2.207260] SMP: stopping secondary CPUs [ 2.211294] Kernel Offset: 0x2ebff4800000 from 0xffff800010000000 [ 2.217377] PHYS_OFFSET: 0xffffb50500000000 [ 2.221551] CPU features: 0x0240002,2188200c [ 2.225811] Memory Limit: none [ 2.228860] ---[ end Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b ]--- Fixes: 89132dd8ffd2 ("pinctrl: mediatek: extend eint build to pinctrl-mtk-common-v2.c") Signed-off-by: Enric Balletbo i Serra Acked-by: Sean Wang Link: https://lore.kernel.org/r/20201001142511.3560143-1-enric.balletbo@collabora.com [rebased on changed infrastructure] Signed-off-by: Linus Walleij --- .../pinctrl/mediatek/pinctrl-mtk-common-v2.c | 24 ++++++++++++++----- 1 file changed, 18 insertions(+), 6 deletions(-) diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c index e8622c7e117a..ebc049792623 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c @@ -354,6 +354,7 @@ static const struct mtk_eint_xt mtk_eint_xt = { int mtk_build_eint(struct mtk_pinctrl *hw, struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; + int ret; if (!IS_ENABLED(CONFIG_EINT_MTK)) return 0; @@ -366,15 +367,21 @@ int mtk_build_eint(struct mtk_pinctrl *hw, struct platform_device *pdev) return -ENOMEM; hw->eint->base = devm_platform_ioremap_resource_byname(pdev, "eint"); - if (IS_ERR(hw->eint->base)) - return PTR_ERR(hw->eint->base); + if (IS_ERR(hw->eint->base)) { + ret = PTR_ERR(hw->eint->base); + goto err_free_eint; + } hw->eint->irq = irq_of_parse_and_map(np, 0); - if (!hw->eint->irq) - return -EINVAL; + if (!hw->eint->irq) { + ret = -EINVAL; + goto err_free_eint; + } - if (!hw->soc->eint_hw) - return -ENODEV; + if (!hw->soc->eint_hw) { + ret = -ENODEV; + goto err_free_eint; + } hw->eint->dev = &pdev->dev; hw->eint->hw = hw->soc->eint_hw; @@ -382,6 +389,11 @@ int mtk_build_eint(struct mtk_pinctrl *hw, struct platform_device *pdev) hw->eint->gpio_xlate = &mtk_eint_xt; return mtk_eint_do_init(hw->eint); + +err_free_eint: + devm_kfree(hw->dev, hw->eint); + hw->eint = NULL; + return ret; } EXPORT_SYMBOL_GPL(mtk_build_eint); From c6662da804c465f73d2faa61dd33f1e9376cac3d Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Mon, 5 Oct 2020 14:50:49 +0200 Subject: [PATCH 413/433] pinctrl: visconti: PINCTRL_TMPV7700 should depend on ARCH_VISCONTI The Toshiba Visconti TMPV7700 series pin controller is only present on Visconti SoCs. Hence add a dependency on ARCH_VISCONTI, to prevent asking the user about this driver when configuring a kernel without Visconti platform support. Fixes: a68a7844264e4fb9 ("pinctrl: visconti: Add Toshiba Visconti SoCs pinctrl support") Signed-off-by: Geert Uytterhoeven Acked-by: Nobuhiro Iwamatsu Link: https://lore.kernel.org/r/20201005125049.26926-1-geert+renesas@glider.be Signed-off-by: Linus Walleij --- drivers/pinctrl/visconti/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/visconti/Kconfig b/drivers/pinctrl/visconti/Kconfig index 198ec33189cc..42653fc60413 100644 --- a/drivers/pinctrl/visconti/Kconfig +++ b/drivers/pinctrl/visconti/Kconfig @@ -9,6 +9,6 @@ config PINCTRL_VISCONTI config PINCTRL_TMPV7700 bool "Toshiba Visconti TMPV7700 series pinctrl driver" depends on OF - depends on ARM64 || COMPILE_TEST + depends on ARCH_VISCONTI || COMPILE_TEST select PINCTRL_VISCONTI - default ARM64 && ARCH_VISCONTI + default ARCH_VISCONTI From 4e787e0405342e9c21558ead99d39d1cdef1b388 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Cl=C3=A9ment=20P=C3=A9ron?= Date: Mon, 5 Oct 2020 21:09:39 +0200 Subject: [PATCH 414/433] dt-bindings: pinctrl: sunxi: Allow pinctrl with more interrupt banks MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Recently introduced Allwinner A100 pinctrl block has 7 interrupts. This trig a warning when running dtb_checks: sun50i-a100-allwinner-perf1.dt.yaml: pinctrl@300b000: interrupts: [...] is too long From schema: .../allwinner,sun4i-a10-pinctrl.yaml Fix this by allowing up to 7 interrupts. Signed-off-by: Clément Péron Acked-by: Rob Herring Link: https://lore.kernel.org/r/20201005190939.21016-1-peron.clem@gmail.com Signed-off-by: Linus Walleij --- .../bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml index 34a17d5c6135..5240487dfe50 100644 --- a/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml @@ -61,7 +61,7 @@ properties: interrupts: minItems: 1 - maxItems: 5 + maxItems: 7 description: One interrupt per external interrupt bank supported on the controller, sorted by bank number ascending order. From 19d2e0cef0b14f8c7210162f58327485f5fa7c51 Mon Sep 17 00:00:00 2001 From: Alexander Dahl Date: Mon, 5 Oct 2020 22:34:40 +0200 Subject: [PATCH 415/433] leds: pwm: Remove platform_data support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Since commit 141f15c66d94 ("leds: pwm: remove header") that platform interface is not usable from outside and there seems to be no in tree user anymore. All in-tree users of the leds-pwm driver seem to use DT currently. Getting rid of the old platform interface allows the leds-pwm driver to switch over from 'devm_led_classdev_register()' to 'devm_led_classdev_register_ext()'. Signed-off-by: Alexander Dahl Cc: Denis Osterland-Heim Reviewed-by: Marek Behún Signed-off-by: Pavel Machek --- drivers/leds/leds-pwm.c | 30 +++++------------------------- 1 file changed, 5 insertions(+), 25 deletions(-) diff --git a/drivers/leds/leds-pwm.c b/drivers/leds/leds-pwm.c index 2a16ae0bf022..f53f9309ca6c 100644 --- a/drivers/leds/leds-pwm.c +++ b/drivers/leds/leds-pwm.c @@ -24,11 +24,6 @@ struct led_pwm { unsigned int max_brightness; }; -struct led_pwm_platform_data { - int num_leds; - struct led_pwm *leds; -}; - struct led_pwm_data { struct led_classdev cdev; struct pwm_device *pwm; @@ -60,6 +55,7 @@ static int led_pwm_set(struct led_classdev *led_cdev, return pwm_apply_state(led_dat->pwm, &led_dat->pwmstate); } +__attribute__((nonnull)) static int led_pwm_add(struct device *dev, struct led_pwm_priv *priv, struct led_pwm *led, struct fwnode_handle *fwnode) { @@ -73,10 +69,7 @@ static int led_pwm_add(struct device *dev, struct led_pwm_priv *priv, led_data->cdev.max_brightness = led->max_brightness; led_data->cdev.flags = LED_CORE_SUSPENDRESUME; - if (fwnode) - led_data->pwm = devm_fwnode_pwm_get(dev, fwnode, NULL); - else - led_data->pwm = devm_pwm_get(dev, led->name); + led_data->pwm = devm_fwnode_pwm_get(dev, fwnode, NULL); if (IS_ERR(led_data->pwm)) return dev_err_probe(dev, PTR_ERR(led_data->pwm), "unable to request PWM for %s\n", @@ -139,15 +132,11 @@ static int led_pwm_create_fwnode(struct device *dev, struct led_pwm_priv *priv) static int led_pwm_probe(struct platform_device *pdev) { - struct led_pwm_platform_data *pdata = dev_get_platdata(&pdev->dev); struct led_pwm_priv *priv; - int count, i; int ret = 0; + int count; - if (pdata) - count = pdata->num_leds; - else - count = device_get_child_node_count(&pdev->dev); + count = device_get_child_node_count(&pdev->dev); if (!count) return -EINVAL; @@ -157,16 +146,7 @@ static int led_pwm_probe(struct platform_device *pdev) if (!priv) return -ENOMEM; - if (pdata) { - for (i = 0; i < count; i++) { - ret = led_pwm_add(&pdev->dev, priv, &pdata->leds[i], - NULL); - if (ret) - break; - } - } else { - ret = led_pwm_create_fwnode(&pdev->dev, priv); - } + ret = led_pwm_create_fwnode(&pdev->dev, priv); if (ret) return ret; From 55596c5445566cf43b83238198fd038d21172d99 Mon Sep 17 00:00:00 2001 From: Shyam Sundar S K Date: Wed, 7 Oct 2020 16:42:20 +0530 Subject: [PATCH 416/433] pinctrl: amd: Add missing pins to the pin group list Some of the pins were not exposed in the initial driver or kept as reserved. Exposing all of them now. Signed-off-by: Shyam Sundar S K Link: https://lore.kernel.org/r/20201007111220.744348-1-Shyam-sundar.S-k@amd.com Signed-off-by: Linus Walleij --- drivers/pinctrl/pinctrl-amd.h | 69 ++++++++++++++++++++++++++++++++++- 1 file changed, 68 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/pinctrl-amd.h b/drivers/pinctrl/pinctrl-amd.h index d4a192df5fab..95e763424042 100644 --- a/drivers/pinctrl/pinctrl-amd.h +++ b/drivers/pinctrl/pinctrl-amd.h @@ -123,13 +123,31 @@ static const struct pinctrl_pin_desc kerncz_pins[] = { PINCTRL_PIN(18, "GPIO_18"), PINCTRL_PIN(19, "GPIO_19"), PINCTRL_PIN(20, "GPIO_20"), + PINCTRL_PIN(21, "GPIO_21"), + PINCTRL_PIN(22, "GPIO_22"), PINCTRL_PIN(23, "GPIO_23"), PINCTRL_PIN(24, "GPIO_24"), PINCTRL_PIN(25, "GPIO_25"), PINCTRL_PIN(26, "GPIO_26"), + PINCTRL_PIN(27, "GPIO_27"), + PINCTRL_PIN(28, "GPIO_28"), + PINCTRL_PIN(29, "GPIO_29"), + PINCTRL_PIN(30, "GPIO_30"), + PINCTRL_PIN(31, "GPIO_31"), + PINCTRL_PIN(32, "GPIO_32"), + PINCTRL_PIN(33, "GPIO_33"), + PINCTRL_PIN(34, "GPIO_34"), + PINCTRL_PIN(35, "GPIO_35"), + PINCTRL_PIN(36, "GPIO_36"), + PINCTRL_PIN(37, "GPIO_37"), + PINCTRL_PIN(38, "GPIO_38"), PINCTRL_PIN(39, "GPIO_39"), PINCTRL_PIN(40, "GPIO_40"), - PINCTRL_PIN(43, "GPIO_42"), + PINCTRL_PIN(41, "GPIO_41"), + PINCTRL_PIN(42, "GPIO_42"), + PINCTRL_PIN(43, "GPIO_43"), + PINCTRL_PIN(44, "GPIO_44"), + PINCTRL_PIN(45, "GPIO_45"), PINCTRL_PIN(46, "GPIO_46"), PINCTRL_PIN(47, "GPIO_47"), PINCTRL_PIN(48, "GPIO_48"), @@ -150,14 +168,23 @@ static const struct pinctrl_pin_desc kerncz_pins[] = { PINCTRL_PIN(64, "GPIO_64"), PINCTRL_PIN(65, "GPIO_65"), PINCTRL_PIN(66, "GPIO_66"), + PINCTRL_PIN(67, "GPIO_67"), PINCTRL_PIN(68, "GPIO_68"), PINCTRL_PIN(69, "GPIO_69"), PINCTRL_PIN(70, "GPIO_70"), PINCTRL_PIN(71, "GPIO_71"), PINCTRL_PIN(72, "GPIO_72"), + PINCTRL_PIN(73, "GPIO_73"), PINCTRL_PIN(74, "GPIO_74"), PINCTRL_PIN(75, "GPIO_75"), PINCTRL_PIN(76, "GPIO_76"), + PINCTRL_PIN(77, "GPIO_77"), + PINCTRL_PIN(78, "GPIO_78"), + PINCTRL_PIN(79, "GPIO_79"), + PINCTRL_PIN(80, "GPIO_80"), + PINCTRL_PIN(81, "GPIO_81"), + PINCTRL_PIN(82, "GPIO_82"), + PINCTRL_PIN(83, "GPIO_83"), PINCTRL_PIN(84, "GPIO_84"), PINCTRL_PIN(85, "GPIO_85"), PINCTRL_PIN(86, "GPIO_86"), @@ -168,6 +195,7 @@ static const struct pinctrl_pin_desc kerncz_pins[] = { PINCTRL_PIN(91, "GPIO_91"), PINCTRL_PIN(92, "GPIO_92"), PINCTRL_PIN(93, "GPIO_93"), + PINCTRL_PIN(94, "GPIO_94"), PINCTRL_PIN(95, "GPIO_95"), PINCTRL_PIN(96, "GPIO_96"), PINCTRL_PIN(97, "GPIO_97"), @@ -176,6 +204,16 @@ static const struct pinctrl_pin_desc kerncz_pins[] = { PINCTRL_PIN(100, "GPIO_100"), PINCTRL_PIN(101, "GPIO_101"), PINCTRL_PIN(102, "GPIO_102"), + PINCTRL_PIN(103, "GPIO_103"), + PINCTRL_PIN(104, "GPIO_104"), + PINCTRL_PIN(105, "GPIO_105"), + PINCTRL_PIN(106, "GPIO_106"), + PINCTRL_PIN(107, "GPIO_107"), + PINCTRL_PIN(108, "GPIO_108"), + PINCTRL_PIN(109, "GPIO_109"), + PINCTRL_PIN(110, "GPIO_110"), + PINCTRL_PIN(111, "GPIO_111"), + PINCTRL_PIN(112, "GPIO_112"), PINCTRL_PIN(113, "GPIO_113"), PINCTRL_PIN(114, "GPIO_114"), PINCTRL_PIN(115, "GPIO_115"), @@ -186,12 +224,18 @@ static const struct pinctrl_pin_desc kerncz_pins[] = { PINCTRL_PIN(120, "GPIO_120"), PINCTRL_PIN(121, "GPIO_121"), PINCTRL_PIN(122, "GPIO_122"), + PINCTRL_PIN(123, "GPIO_123"), + PINCTRL_PIN(124, "GPIO_124"), + PINCTRL_PIN(125, "GPIO_125"), PINCTRL_PIN(126, "GPIO_126"), + PINCTRL_PIN(127, "GPIO_127"), + PINCTRL_PIN(128, "GPIO_128"), PINCTRL_PIN(129, "GPIO_129"), PINCTRL_PIN(130, "GPIO_130"), PINCTRL_PIN(131, "GPIO_131"), PINCTRL_PIN(132, "GPIO_132"), PINCTRL_PIN(133, "GPIO_133"), + PINCTRL_PIN(134, "GPIO_134"), PINCTRL_PIN(135, "GPIO_135"), PINCTRL_PIN(136, "GPIO_136"), PINCTRL_PIN(137, "GPIO_137"), @@ -206,6 +250,23 @@ static const struct pinctrl_pin_desc kerncz_pins[] = { PINCTRL_PIN(146, "GPIO_146"), PINCTRL_PIN(147, "GPIO_147"), PINCTRL_PIN(148, "GPIO_148"), + PINCTRL_PIN(149, "GPIO_149"), + PINCTRL_PIN(150, "GPIO_150"), + PINCTRL_PIN(151, "GPIO_151"), + PINCTRL_PIN(152, "GPIO_152"), + PINCTRL_PIN(153, "GPIO_153"), + PINCTRL_PIN(154, "GPIO_154"), + PINCTRL_PIN(155, "GPIO_155"), + PINCTRL_PIN(156, "GPIO_156"), + PINCTRL_PIN(157, "GPIO_157"), + PINCTRL_PIN(158, "GPIO_158"), + PINCTRL_PIN(159, "GPIO_159"), + PINCTRL_PIN(160, "GPIO_160"), + PINCTRL_PIN(161, "GPIO_161"), + PINCTRL_PIN(162, "GPIO_162"), + PINCTRL_PIN(163, "GPIO_163"), + PINCTRL_PIN(164, "GPIO_164"), + PINCTRL_PIN(165, "GPIO_165"), PINCTRL_PIN(166, "GPIO_166"), PINCTRL_PIN(167, "GPIO_167"), PINCTRL_PIN(168, "GPIO_168"), @@ -218,6 +279,12 @@ static const struct pinctrl_pin_desc kerncz_pins[] = { PINCTRL_PIN(175, "GPIO_175"), PINCTRL_PIN(176, "GPIO_176"), PINCTRL_PIN(177, "GPIO_177"), + PINCTRL_PIN(178, "GPIO_178"), + PINCTRL_PIN(179, "GPIO_179"), + PINCTRL_PIN(180, "GPIO_180"), + PINCTRL_PIN(181, "GPIO_181"), + PINCTRL_PIN(182, "GPIO_182"), + PINCTRL_PIN(183, "GPIO_183"), }; static const unsigned i2c0_pins[] = {145, 146}; From 5f3ae016a68ff5400febe91885aba794ab5b0af4 Mon Sep 17 00:00:00 2001 From: Marlon Rac Cambasis Date: Wed, 7 Oct 2020 18:17:05 +1100 Subject: [PATCH 417/433] Docs: Fixing spelling errors in Documentation/devicetree/bindings/ Revised patch fixing six spelling errors within Documentation/devicetree/bindings/. "specfied" replaced with "specified" in all three files modified. "atleast" seperated into "at least" three times in samsung-pinctrl.txt. This should remove any confusion that a reader might have. Signed-off-by: Marlon Rac Cambasis Link: https://lore.kernel.org/r/20201007071705.GA11381@marlonpc-debian Signed-off-by: Rob Herring --- .../devicetree/bindings/pinctrl/samsung-pinctrl.txt | 6 +++--- .../devicetree/bindings/reset/nuvoton,npcm-reset.txt | 2 +- Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt index 70659c917bdc..7734ab6fec44 100644 --- a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt @@ -65,7 +65,7 @@ Required Properties: - Pin mux/config groups as child nodes: The pin mux (selecting pin function mode) and pin config (pull up/down, driver strength) settings are represented - as child nodes of the pin-controller node. There should be atleast one + as child nodes of the pin-controller node. There should be at least one child node and there is no limit on the count of these child nodes. It is also possible for a child node to consist of several further child nodes to allow grouping multiple pinctrl groups into one. The format of second @@ -75,7 +75,7 @@ Required Properties: The child node should contain a list of pin(s) on which a particular pin function selection or pin configuration (or both) have to applied. This list of pins is specified using the property name "samsung,pins". There - should be atleast one pin specfied for this property and there is no upper + should be at least one pin specified for this property and there is no upper limit on the count of pins that can be specified. The pins are specified using pin names which are derived from the hardware manual of the SoC. As an example, the pins in GPA0 bank of the pin controller can be represented @@ -107,7 +107,7 @@ Required Properties: hardware manual and these values are programmed as-is into the pin pull up/down and driver strength register of the pin-controller. - Note: A child should include atleast a pin function selection property or + Note: A child should include at least a pin function selection property or pin configuration property (one or more) or both. The client nodes that require a particular pin function selection and/or diff --git a/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.txt b/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.txt index 6e802703af60..17b7a6a43a29 100644 --- a/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.txt +++ b/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.txt @@ -9,7 +9,7 @@ Optional property: - nuvoton,sw-reset-number - Contains the software reset number to restart the SoC. NPCM7xx contain four software reset that represent numbers 1 to 4. - If 'nuvoton,sw-reset-number' is not specfied software reset is disabled. + If 'nuvoton,sw-reset-number' is not specified software reset is disabled. Example: rstc: rstc@f0801000 { diff --git a/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt b/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt index d78d4a8fb868..a8197632d6d2 100644 --- a/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt +++ b/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt @@ -20,7 +20,7 @@ Optional properties: This is useful in situations where another watchdog engine on chip is to perform the reset. - If 'aspeed,reset-type=' is not specfied the default is to enable system + If 'aspeed,reset-type=' is not specified the default is to enable system reset. Reset types: From 6fdc6e23a7d13e4f7f7908b42d39595195716a61 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Mon, 5 Oct 2020 13:38:27 -0500 Subject: [PATCH 418/433] dt-bindings: Add missing 'unevaluatedProperties' This doesn't yet do anything in the tools, but make it explicit so we can check either 'unevaluatedProperties' or 'additionalProperties' is present in schemas. 'unevaluatedProperties' is appropriate when including another schema (via '$ref') and all possible properties and/or child nodes are not explicitly listed in the schema with the '$ref'. This is in preparation to add a meta-schema to check for missing 'unevaluatedProperties' or 'additionalProperties'. This has been a constant source of review issues. Acked-by: Mark Brown Acked-by: Wolfram Sang Acked-by: Krzysztof Kozlowski Acked-By: Vinod Koul Acked-by: Geert Uytterhoeven Acked-by: Ulf Hansson Acked-by: Guenter Roeck Acked-by: Mathieu Poirier Acked-by: Dmitry Torokhov Link: https://lore.kernel.org/r/20201005183830.486085-2-robh@kernel.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/arm/coresight-cti.yaml | 2 ++ Documentation/devicetree/bindings/arm/stm32/st,mlahb.yaml | 2 ++ Documentation/devicetree/bindings/ata/faraday,ftide010.yaml | 2 ++ Documentation/devicetree/bindings/bus/renesas,bsc.yaml | 2 ++ .../devicetree/bindings/display/panel/tpo,tpg110.yaml | 2 ++ Documentation/devicetree/bindings/dma/ingenic,dma.yaml | 2 ++ Documentation/devicetree/bindings/dma/st,stm32-dma.yaml | 2 ++ Documentation/devicetree/bindings/dma/st,stm32-dmamux.yaml | 2 ++ Documentation/devicetree/bindings/dma/st,stm32-mdma.yaml | 2 ++ Documentation/devicetree/bindings/dma/ti/k3-udma.yaml | 2 ++ .../devicetree/bindings/i2c/amlogic,meson6-i2c.yaml | 2 ++ Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml | 2 ++ Documentation/devicetree/bindings/i2c/i2c-gpio.yaml | 2 ++ Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml | 2 ++ .../devicetree/bindings/i2c/socionext,uniphier-fi2c.yaml | 2 ++ .../devicetree/bindings/i2c/socionext,uniphier-i2c.yaml | 2 ++ Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml | 2 ++ .../devicetree/bindings/i2c/xlnx,xps-iic-2.00.a.yaml | 2 ++ .../devicetree/bindings/iio/accel/adi,adis16240.yaml | 2 ++ Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml | 2 ++ Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml | 2 ++ Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml | 2 ++ Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml | 2 ++ Documentation/devicetree/bindings/iio/adc/adi,ad7292.yaml | 2 ++ Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml | 2 ++ Documentation/devicetree/bindings/iio/adc/adi,ad7923.yaml | 2 ++ Documentation/devicetree/bindings/iio/adc/maxim,max1241.yaml | 2 ++ Documentation/devicetree/bindings/iio/dac/adi,ad5770r.yaml | 2 ++ Documentation/devicetree/bindings/iio/frequency/adf4371.yaml | 2 ++ Documentation/devicetree/bindings/iio/imu/adi,adis16460.yaml | 2 ++ Documentation/devicetree/bindings/iio/imu/adi,adis16475.yaml | 2 ++ Documentation/devicetree/bindings/iio/imu/bosch,bmi160.yaml | 2 ++ Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml | 2 ++ .../devicetree/bindings/input/fsl,mpr121-touchkey.yaml | 2 ++ .../bindings/interrupt-controller/loongson,htpic.yaml | 2 ++ .../bindings/interrupt-controller/loongson,liointc.yaml | 2 ++ .../bindings/memory-controllers/renesas,rpc-if.yaml | 2 ++ .../devicetree/bindings/mmc/amlogic,meson-mx-sdhc.yaml | 2 ++ Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml | 2 ++ Documentation/devicetree/bindings/mmc/ingenic,mmc.yaml | 2 ++ Documentation/devicetree/bindings/mmc/owl-mmc.yaml | 2 ++ Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml | 2 ++ Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml | 2 ++ .../devicetree/bindings/mmc/socionext,uniphier-sd.yaml | 2 ++ Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.yaml | 2 ++ Documentation/devicetree/bindings/mtd/denali,nand.yaml | 2 ++ Documentation/devicetree/bindings/mtd/ingenic,nand.yaml | 2 ++ .../devicetree/bindings/mtd/st,stm32-fmc2-nand.yaml | 2 ++ Documentation/devicetree/bindings/net/adi,adin.yaml | 2 ++ .../devicetree/bindings/net/amlogic,meson-dwmac.yaml | 2 ++ .../devicetree/bindings/net/aspeed,ast2600-mdio.yaml | 2 ++ Documentation/devicetree/bindings/net/marvell,mvusb.yaml | 2 ++ .../devicetree/bindings/net/mediatek,star-emac.yaml | 2 ++ Documentation/devicetree/bindings/net/nxp,tja11xx.yaml | 2 ++ Documentation/devicetree/bindings/net/qca,ar71xx.yaml | 2 ++ Documentation/devicetree/bindings/net/qca,ar803x.yaml | 2 ++ Documentation/devicetree/bindings/net/qcom,ipq4019-mdio.yaml | 2 ++ Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yaml | 2 ++ Documentation/devicetree/bindings/net/stm32-dwmac.yaml | 2 ++ Documentation/devicetree/bindings/net/ti,davinci-mdio.yaml | 2 ++ Documentation/devicetree/bindings/net/ti,dp83867.yaml | 2 ++ Documentation/devicetree/bindings/net/ti,dp83869.yaml | 2 ++ Documentation/devicetree/bindings/nvmem/imx-ocotp.yaml | 2 ++ Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml | 2 ++ Documentation/devicetree/bindings/nvmem/qcom,spmi-sdam.yaml | 2 ++ Documentation/devicetree/bindings/nvmem/rockchip-efuse.yaml | 2 ++ Documentation/devicetree/bindings/nvmem/st,stm32-romem.yaml | 2 ++ Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml | 2 ++ .../devicetree/bindings/pci/cdns,cdns-pcie-host.yaml | 2 ++ Documentation/devicetree/bindings/pci/host-generic-pci.yaml | 2 ++ Documentation/devicetree/bindings/pci/loongson.yaml | 2 ++ Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml | 2 ++ Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml | 2 ++ Documentation/devicetree/bindings/pci/versatile.yaml | 2 ++ Documentation/devicetree/bindings/power/pd-samsung.yaml | 2 ++ .../devicetree/bindings/regulator/fixed-regulator.yaml | 2 ++ .../bindings/regulator/google,cros-ec-regulator.yaml | 2 ++ .../devicetree/bindings/regulator/gpio-regulator.yaml | 2 ++ .../devicetree/bindings/regulator/st,stm32-booster.yaml | 2 ++ .../devicetree/bindings/regulator/st,stm32-vrefbuf.yaml | 2 ++ .../bindings/regulator/vqmmc-ipq4019-regulator.yaml | 2 ++ Documentation/devicetree/bindings/rtc/ingenic,rtc.yaml | 2 ++ Documentation/devicetree/bindings/rtc/s3c-rtc.yaml | 2 ++ Documentation/devicetree/bindings/serial/ingenic,uart.yaml | 5 +++++ Documentation/devicetree/bindings/serial/renesas,hscif.yaml | 2 ++ Documentation/devicetree/bindings/serial/renesas,sci.yaml | 2 ++ Documentation/devicetree/bindings/serial/renesas,scif.yaml | 2 ++ Documentation/devicetree/bindings/serial/renesas,scifa.yaml | 2 ++ Documentation/devicetree/bindings/serial/renesas,scifb.yaml | 2 ++ .../devicetree/bindings/serial/snps-dw-apb-uart.yaml | 2 ++ .../devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml | 2 ++ .../devicetree/bindings/spi/amlogic,meson6-spifc.yaml | 2 ++ .../devicetree/bindings/spi/mikrotik,rb4xx-spi.yaml | 2 ++ Documentation/devicetree/bindings/spi/qca,ar934x-spi.yaml | 2 ++ .../devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml | 2 ++ Documentation/devicetree/bindings/spi/renesas,hspi.yaml | 2 ++ Documentation/devicetree/bindings/spi/renesas,rspi.yaml | 2 ++ Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml | 2 ++ .../devicetree/bindings/spi/socionext,uniphier-spi.yaml | 2 ++ Documentation/devicetree/bindings/spi/spi-gpio.yaml | 2 ++ Documentation/devicetree/bindings/spi/spi-mux.yaml | 2 ++ Documentation/devicetree/bindings/spi/spi-pl022.yaml | 2 ++ Documentation/devicetree/bindings/spi/spi-rockchip.yaml | 2 ++ Documentation/devicetree/bindings/spi/spi-sifive.yaml | 2 ++ Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml | 2 ++ Documentation/devicetree/bindings/spi/st,stm32-spi.yaml | 2 ++ .../devicetree/bindings/watchdog/amlogic,meson-gxbb-wdt.yaml | 2 ++ Documentation/devicetree/bindings/watchdog/arm-smc-wdt.yaml | 2 ++ Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml | 2 ++ Documentation/devicetree/bindings/watchdog/samsung-wdt.yaml | 2 ++ .../devicetree/bindings/watchdog/st,stm32-iwdg.yaml | 2 ++ Documentation/devicetree/bindings/watchdog/ti,rti-wdt.yaml | 2 ++ 112 files changed, 227 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/coresight-cti.yaml b/Documentation/devicetree/bindings/arm/coresight-cti.yaml index e42ff69d8bfb..21e3515491f4 100644 --- a/Documentation/devicetree/bindings/arm/coresight-cti.yaml +++ b/Documentation/devicetree/bindings/arm/coresight-cti.yaml @@ -220,6 +220,8 @@ then: required: - cpu +unevaluatedProperties: false + examples: # minimum CTI definition. DEVID register used to set number of triggers. - | diff --git a/Documentation/devicetree/bindings/arm/stm32/st,mlahb.yaml b/Documentation/devicetree/bindings/arm/stm32/st,mlahb.yaml index 9f276bc9efa0..8e711bd202fd 100644 --- a/Documentation/devicetree/bindings/arm/stm32/st,mlahb.yaml +++ b/Documentation/devicetree/bindings/arm/stm32/st,mlahb.yaml @@ -50,6 +50,8 @@ required: - '#size-cells' - dma-ranges +unevaluatedProperties: false + examples: - | mlahb: ahb@38000000 { diff --git a/Documentation/devicetree/bindings/ata/faraday,ftide010.yaml b/Documentation/devicetree/bindings/ata/faraday,ftide010.yaml index 6451928dd2ce..fa16f3767c6a 100644 --- a/Documentation/devicetree/bindings/ata/faraday,ftide010.yaml +++ b/Documentation/devicetree/bindings/ata/faraday,ftide010.yaml @@ -64,6 +64,8 @@ allOf: required: - sata +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/bus/renesas,bsc.yaml b/Documentation/devicetree/bindings/bus/renesas,bsc.yaml index 7d10b62a52d5..f53a37785413 100644 --- a/Documentation/devicetree/bindings/bus/renesas,bsc.yaml +++ b/Documentation/devicetree/bindings/bus/renesas,bsc.yaml @@ -44,6 +44,8 @@ properties: required: - reg +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/display/panel/tpo,tpg110.yaml b/Documentation/devicetree/bindings/display/panel/tpo,tpg110.yaml index a51660b73f28..6f1f02044b4b 100644 --- a/Documentation/devicetree/bindings/display/panel/tpo,tpg110.yaml +++ b/Documentation/devicetree/bindings/display/panel/tpo,tpg110.yaml @@ -72,6 +72,8 @@ required: - spi-max-frequency - port +unevaluatedProperties: false + examples: - |+ spi { diff --git a/Documentation/devicetree/bindings/dma/ingenic,dma.yaml b/Documentation/devicetree/bindings/dma/ingenic,dma.yaml index 92794c500589..00f19b3cac31 100644 --- a/Documentation/devicetree/bindings/dma/ingenic,dma.yaml +++ b/Documentation/devicetree/bindings/dma/ingenic,dma.yaml @@ -62,6 +62,8 @@ required: - interrupts - clocks +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/dma/st,stm32-dma.yaml b/Documentation/devicetree/bindings/dma/st,stm32-dma.yaml index 71987878e4ae..2a5325f480f6 100644 --- a/Documentation/devicetree/bindings/dma/st,stm32-dma.yaml +++ b/Documentation/devicetree/bindings/dma/st,stm32-dma.yaml @@ -81,6 +81,8 @@ required: - clocks - interrupts +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/dma/st,stm32-dmamux.yaml b/Documentation/devicetree/bindings/dma/st,stm32-dmamux.yaml index 915bc4af9568..c8d2b51d8410 100644 --- a/Documentation/devicetree/bindings/dma/st,stm32-dmamux.yaml +++ b/Documentation/devicetree/bindings/dma/st,stm32-dmamux.yaml @@ -33,6 +33,8 @@ required: - reg - dma-masters +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/dma/st,stm32-mdma.yaml b/Documentation/devicetree/bindings/dma/st,stm32-mdma.yaml index c66543d0c267..c30be840be1c 100644 --- a/Documentation/devicetree/bindings/dma/st,stm32-mdma.yaml +++ b/Documentation/devicetree/bindings/dma/st,stm32-mdma.yaml @@ -84,6 +84,8 @@ required: - clocks - interrupts +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/dma/ti/k3-udma.yaml b/Documentation/devicetree/bindings/dma/ti/k3-udma.yaml index dd70ddab4fd1..9a87fd9041eb 100644 --- a/Documentation/devicetree/bindings/dma/ti/k3-udma.yaml +++ b/Documentation/devicetree/bindings/dma/ti/k3-udma.yaml @@ -141,6 +141,8 @@ then: required: - ti,udma-atype +unevaluatedProperties: false + examples: - |+ cbass_main { diff --git a/Documentation/devicetree/bindings/i2c/amlogic,meson6-i2c.yaml b/Documentation/devicetree/bindings/i2c/amlogic,meson6-i2c.yaml index 49cad273c8e5..6ecb0270d88d 100644 --- a/Documentation/devicetree/bindings/i2c/amlogic,meson6-i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/amlogic,meson6-i2c.yaml @@ -36,6 +36,8 @@ required: - interrupts - clocks +unevaluatedProperties: false + examples: - | i2c@c8100500 { diff --git a/Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml b/Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml index dc0952f3780f..1ca1cd19bd1d 100644 --- a/Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml +++ b/Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml @@ -44,6 +44,8 @@ required: - clocks - interrupts +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/i2c/i2c-gpio.yaml b/Documentation/devicetree/bindings/i2c/i2c-gpio.yaml index 78ffcab2428c..cc3aa2a5e70b 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-gpio.yaml +++ b/Documentation/devicetree/bindings/i2c/i2c-gpio.yaml @@ -70,4 +70,6 @@ required: - sda-gpios - scl-gpios +unevaluatedProperties: false + ... diff --git a/Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml b/Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml index 790aa7218ee0..7f254d79558c 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml +++ b/Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml @@ -117,6 +117,8 @@ then: required: - rockchip,grf +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/i2c/socionext,uniphier-fi2c.yaml b/Documentation/devicetree/bindings/i2c/socionext,uniphier-fi2c.yaml index 15abc022968e..c76131902b77 100644 --- a/Documentation/devicetree/bindings/i2c/socionext,uniphier-fi2c.yaml +++ b/Documentation/devicetree/bindings/i2c/socionext,uniphier-fi2c.yaml @@ -37,6 +37,8 @@ required: - interrupts - clocks +unevaluatedProperties: false + examples: - | i2c0: i2c@58780000 { diff --git a/Documentation/devicetree/bindings/i2c/socionext,uniphier-i2c.yaml b/Documentation/devicetree/bindings/i2c/socionext,uniphier-i2c.yaml index ef998def554e..ddde08636ab0 100644 --- a/Documentation/devicetree/bindings/i2c/socionext,uniphier-i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/socionext,uniphier-i2c.yaml @@ -37,6 +37,8 @@ required: - interrupts - clocks +unevaluatedProperties: false + examples: - | i2c0: i2c@58400000 { diff --git a/Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml b/Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml index f2fcbb361180..d747f4990ad8 100644 --- a/Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml @@ -94,6 +94,8 @@ required: - resets - clocks +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/i2c/xlnx,xps-iic-2.00.a.yaml b/Documentation/devicetree/bindings/i2c/xlnx,xps-iic-2.00.a.yaml index 67c1c84ba3dc..ffb2ed039a5e 100644 --- a/Documentation/devicetree/bindings/i2c/xlnx,xps-iic-2.00.a.yaml +++ b/Documentation/devicetree/bindings/i2c/xlnx,xps-iic-2.00.a.yaml @@ -36,6 +36,8 @@ required: - interrupts - clocks +unevaluatedProperties: false + examples: - | axi_iic_0: i2c@40800000 { diff --git a/Documentation/devicetree/bindings/iio/accel/adi,adis16240.yaml b/Documentation/devicetree/bindings/iio/accel/adi,adis16240.yaml index 4147f02b5e3c..8589b722028d 100644 --- a/Documentation/devicetree/bindings/iio/accel/adi,adis16240.yaml +++ b/Documentation/devicetree/bindings/iio/accel/adi,adis16240.yaml @@ -30,6 +30,8 @@ required: - reg - interrupts +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml b/Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml index fd4eaa3d0ab4..591ca32181b0 100644 --- a/Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml +++ b/Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml @@ -40,6 +40,8 @@ required: - reg - interrupts +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml b/Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml index e7daffec88d3..64f275c8e2d9 100644 --- a/Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml +++ b/Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml @@ -30,6 +30,8 @@ required: - reg - interrupts +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml index deb34deff0e8..d0d2880626c2 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml @@ -108,6 +108,8 @@ patternProperties: - reg - diff-channels +unevaluatedProperties: false + examples: - | spi { diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml index d0913034b1d8..ed363a796e50 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml @@ -92,6 +92,8 @@ required: - spi-cpol - spi-cpha +unevaluatedProperties: false + examples: - | spi0 { diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7292.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7292.yaml index e1f6d64bdccd..55e973c6449c 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7292.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7292.yaml @@ -63,6 +63,8 @@ patternProperties: required: - reg +unevaluatedProperties: false + examples: - | spi { diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml index cbb8819d7069..014b020ed0c2 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml @@ -102,6 +102,8 @@ required: - interrupts - adi,conversion-start-gpios +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7923.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7923.yaml index a11b918e0016..2a17641faed5 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7923.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7923.yaml @@ -47,6 +47,8 @@ required: - compatible - reg +unevaluatedProperties: false + examples: - | spi { diff --git a/Documentation/devicetree/bindings/iio/adc/maxim,max1241.yaml b/Documentation/devicetree/bindings/iio/adc/maxim,max1241.yaml index f562505f5ecd..181213b862db 100644 --- a/Documentation/devicetree/bindings/iio/adc/maxim,max1241.yaml +++ b/Documentation/devicetree/bindings/iio/adc/maxim,max1241.yaml @@ -45,6 +45,8 @@ required: - vdd-supply - vref-supply +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ad5770r.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ad5770r.yaml index 82424e06be27..faef288b7148 100644 --- a/Documentation/devicetree/bindings/iio/dac/adi,ad5770r.yaml +++ b/Documentation/devicetree/bindings/iio/dac/adi,ad5770r.yaml @@ -130,6 +130,8 @@ required: - channel@4 - channel@5 +unevaluatedProperties: false + examples: - | spi { diff --git a/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml b/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml index 7ec3ec94356b..11d445f7010e 100644 --- a/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml +++ b/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml @@ -46,6 +46,8 @@ required: - clocks - clock-names +unevaluatedProperties: false + examples: - | spi0 { diff --git a/Documentation/devicetree/bindings/iio/imu/adi,adis16460.yaml b/Documentation/devicetree/bindings/iio/imu/adi,adis16460.yaml index 0c53009ba7d6..07c8ed4ee0f1 100644 --- a/Documentation/devicetree/bindings/iio/imu/adi,adis16460.yaml +++ b/Documentation/devicetree/bindings/iio/imu/adi,adis16460.yaml @@ -33,6 +33,8 @@ required: - reg - interrupts +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/iio/imu/adi,adis16475.yaml b/Documentation/devicetree/bindings/iio/imu/adi,adis16475.yaml index 208faaffa58d..c29385697bbf 100644 --- a/Documentation/devicetree/bindings/iio/imu/adi,adis16475.yaml +++ b/Documentation/devicetree/bindings/iio/imu/adi,adis16475.yaml @@ -116,6 +116,8 @@ allOf: dependencies: adi,sync-mode: [ clocks ] +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/iio/imu/bosch,bmi160.yaml b/Documentation/devicetree/bindings/iio/imu/bosch,bmi160.yaml index 33d8e9fd14b7..4f215399c8df 100644 --- a/Documentation/devicetree/bindings/iio/imu/bosch,bmi160.yaml +++ b/Documentation/devicetree/bindings/iio/imu/bosch,bmi160.yaml @@ -50,6 +50,8 @@ required: - compatible - reg +unevaluatedProperties: false + examples: - | // Example for I2C diff --git a/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml b/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml index 63bcb73ae309..716731c2b794 100644 --- a/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml +++ b/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml @@ -40,6 +40,8 @@ required: - compatible - reg +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/input/fsl,mpr121-touchkey.yaml b/Documentation/devicetree/bindings/input/fsl,mpr121-touchkey.yaml index 5b37be0be4e9..378a85c09d34 100644 --- a/Documentation/devicetree/bindings/input/fsl,mpr121-touchkey.yaml +++ b/Documentation/devicetree/bindings/input/fsl,mpr121-touchkey.yaml @@ -48,6 +48,8 @@ required: - vdd-supply - linux,keycodes +unevaluatedProperties: false + examples: - | // Example with interrupts diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,htpic.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,htpic.yaml index c8861cbbb8b5..d1d52d1db2be 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/loongson,htpic.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/loongson,htpic.yaml @@ -41,6 +41,8 @@ required: - interrupt-controller - '#interrupt-cells' +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml index 03fc4f5b4b39..f38e0113f360 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml @@ -67,6 +67,8 @@ required: - 'loongson,parent_int_map' +unevaluatedProperties: false + examples: - | iointc: interrupt-controller@3ff01400 { diff --git a/Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml b/Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml index 7bfe120e14c3..6d6ba608fd22 100644 --- a/Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml @@ -61,6 +61,8 @@ patternProperties: - cfi-flash - jedec,spi-nor +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/mmc/amlogic,meson-mx-sdhc.yaml b/Documentation/devicetree/bindings/mmc/amlogic,meson-mx-sdhc.yaml index 0cd74c3116f8..60955acb8e57 100644 --- a/Documentation/devicetree/bindings/mmc/amlogic,meson-mx-sdhc.yaml +++ b/Documentation/devicetree/bindings/mmc/amlogic,meson-mx-sdhc.yaml @@ -50,6 +50,8 @@ required: - clocks - clock-names +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml index d93f7794a85f..af7442f73881 100644 --- a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml @@ -117,6 +117,8 @@ required: - interrupts - clocks +unevaluatedProperties: false + examples: - | emmc: mmc@5a000000 { diff --git a/Documentation/devicetree/bindings/mmc/ingenic,mmc.yaml b/Documentation/devicetree/bindings/mmc/ingenic,mmc.yaml index 9b63df1c22fb..04ba8b7fc054 100644 --- a/Documentation/devicetree/bindings/mmc/ingenic,mmc.yaml +++ b/Documentation/devicetree/bindings/mmc/ingenic,mmc.yaml @@ -56,6 +56,8 @@ required: - dmas - dma-names +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/mmc/owl-mmc.yaml b/Documentation/devicetree/bindings/mmc/owl-mmc.yaml index 1380501fb8f0..5cee3a82a712 100644 --- a/Documentation/devicetree/bindings/mmc/owl-mmc.yaml +++ b/Documentation/devicetree/bindings/mmc/owl-mmc.yaml @@ -43,6 +43,8 @@ required: - dmas - dma-names +unevaluatedProperties: false + examples: - | mmc0: mmc@e0330000 { diff --git a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml index 01316185e771..3762f1c8de96 100644 --- a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml +++ b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml @@ -102,6 +102,8 @@ required: - clocks - clock-names +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml b/Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml index a58715c860b7..aa12480648a5 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml +++ b/Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml @@ -73,6 +73,8 @@ required: - clocks - clock-names +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/mmc/socionext,uniphier-sd.yaml b/Documentation/devicetree/bindings/mmc/socionext,uniphier-sd.yaml index 8d6413f48823..56f9ff12742d 100644 --- a/Documentation/devicetree/bindings/mmc/socionext,uniphier-sd.yaml +++ b/Documentation/devicetree/bindings/mmc/socionext,uniphier-sd.yaml @@ -77,6 +77,8 @@ required: - reset-names - resets +unevaluatedProperties: false + examples: - | sd: mmc@5a400000 { diff --git a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.yaml b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.yaml index dd2c1b147142..240abb6f102c 100644 --- a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.yaml +++ b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.yaml @@ -42,6 +42,8 @@ required: - clocks - clock-names +unevaluatedProperties: false + examples: - | mmc@12200000 { diff --git a/Documentation/devicetree/bindings/mtd/denali,nand.yaml b/Documentation/devicetree/bindings/mtd/denali,nand.yaml index c07b91592cbd..1307ed7e7fc6 100644 --- a/Documentation/devicetree/bindings/mtd/denali,nand.yaml +++ b/Documentation/devicetree/bindings/mtd/denali,nand.yaml @@ -128,6 +128,8 @@ required: - clock-names - clocks +unevaluatedProperties: false + examples: - | nand-controller@ff900000 { diff --git a/Documentation/devicetree/bindings/mtd/ingenic,nand.yaml b/Documentation/devicetree/bindings/mtd/ingenic,nand.yaml index 8abb6d463cb6..89aa3ceda592 100644 --- a/Documentation/devicetree/bindings/mtd/ingenic,nand.yaml +++ b/Documentation/devicetree/bindings/mtd/ingenic,nand.yaml @@ -51,6 +51,8 @@ required: - compatible - reg +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/mtd/st,stm32-fmc2-nand.yaml b/Documentation/devicetree/bindings/mtd/st,stm32-fmc2-nand.yaml index 28a08ff407db..29c5ef24ac6a 100644 --- a/Documentation/devicetree/bindings/mtd/st,stm32-fmc2-nand.yaml +++ b/Documentation/devicetree/bindings/mtd/st,stm32-fmc2-nand.yaml @@ -94,6 +94,8 @@ required: - reg - interrupts +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/net/adi,adin.yaml b/Documentation/devicetree/bindings/net/adi,adin.yaml index d95cc691a65f..1129f2b58e98 100644 --- a/Documentation/devicetree/bindings/net/adi,adin.yaml +++ b/Documentation/devicetree/bindings/net/adi,adin.yaml @@ -36,6 +36,8 @@ properties: enum: [ 4, 8, 12, 16, 20, 24 ] default: 8 +unevaluatedProperties: false + examples: - | ethernet { diff --git a/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml b/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml index 85fefe3a0444..6b057b117aa0 100644 --- a/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml +++ b/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml @@ -120,6 +120,8 @@ required: - clock-names - phy-mode +unevaluatedProperties: false + examples: - | ethmac: ethernet@c9410000 { diff --git a/Documentation/devicetree/bindings/net/aspeed,ast2600-mdio.yaml b/Documentation/devicetree/bindings/net/aspeed,ast2600-mdio.yaml index 71808e78a495..1c88820cbcdf 100644 --- a/Documentation/devicetree/bindings/net/aspeed,ast2600-mdio.yaml +++ b/Documentation/devicetree/bindings/net/aspeed,ast2600-mdio.yaml @@ -30,6 +30,8 @@ required: - "#address-cells" - "#size-cells" +unevaluatedProperties: false + examples: - | mdio0: mdio@1e650000 { diff --git a/Documentation/devicetree/bindings/net/marvell,mvusb.yaml b/Documentation/devicetree/bindings/net/marvell,mvusb.yaml index 68573762294b..8e288ab38fd7 100644 --- a/Documentation/devicetree/bindings/net/marvell,mvusb.yaml +++ b/Documentation/devicetree/bindings/net/marvell,mvusb.yaml @@ -35,6 +35,8 @@ required: - "#address-cells" - "#size-cells" +unevaluatedProperties: false + examples: - | /* USB host controller */ diff --git a/Documentation/devicetree/bindings/net/mediatek,star-emac.yaml b/Documentation/devicetree/bindings/net/mediatek,star-emac.yaml index aea88e621792..0bbd598704e9 100644 --- a/Documentation/devicetree/bindings/net/mediatek,star-emac.yaml +++ b/Documentation/devicetree/bindings/net/mediatek,star-emac.yaml @@ -61,6 +61,8 @@ required: - mediatek,pericfg - phy-handle +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml b/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml index 42be0255512b..d51da24f3505 100644 --- a/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml +++ b/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml @@ -34,6 +34,8 @@ patternProperties: required: - reg +unevaluatedProperties: false + examples: - | mdio { diff --git a/Documentation/devicetree/bindings/net/qca,ar71xx.yaml b/Documentation/devicetree/bindings/net/qca,ar71xx.yaml index f99a5aabe923..f0db22645d73 100644 --- a/Documentation/devicetree/bindings/net/qca,ar71xx.yaml +++ b/Documentation/devicetree/bindings/net/qca,ar71xx.yaml @@ -72,6 +72,8 @@ required: - resets - reset-names +unevaluatedProperties: false + examples: # Lager board - | diff --git a/Documentation/devicetree/bindings/net/qca,ar803x.yaml b/Documentation/devicetree/bindings/net/qca,ar803x.yaml index 1788884b8c28..64b3357ade8a 100644 --- a/Documentation/devicetree/bindings/net/qca,ar803x.yaml +++ b/Documentation/devicetree/bindings/net/qca,ar803x.yaml @@ -59,6 +59,8 @@ properties: regulator to VDDIO. $ref: /schemas/regulator/regulator.yaml +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/net/qcom,ipq4019-mdio.yaml b/Documentation/devicetree/bindings/net/qcom,ipq4019-mdio.yaml index 13555a89975f..0c973310ada0 100644 --- a/Documentation/devicetree/bindings/net/qcom,ipq4019-mdio.yaml +++ b/Documentation/devicetree/bindings/net/qcom,ipq4019-mdio.yaml @@ -31,6 +31,8 @@ required: - "#address-cells" - "#size-cells" +unevaluatedProperties: false + examples: - | mdio@90000 { diff --git a/Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yaml b/Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yaml index 67df3fe861ee..948677ade6d1 100644 --- a/Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yaml +++ b/Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yaml @@ -33,6 +33,8 @@ required: - "#address-cells" - "#size-cells" +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/net/stm32-dwmac.yaml b/Documentation/devicetree/bindings/net/stm32-dwmac.yaml index e5dff66df481..27eb6066793f 100644 --- a/Documentation/devicetree/bindings/net/stm32-dwmac.yaml +++ b/Documentation/devicetree/bindings/net/stm32-dwmac.yaml @@ -88,6 +88,8 @@ required: - clock-names - st,syscon +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/net/ti,davinci-mdio.yaml b/Documentation/devicetree/bindings/net/ti,davinci-mdio.yaml index d454c1fab930..5728fe23f530 100644 --- a/Documentation/devicetree/bindings/net/ti,davinci-mdio.yaml +++ b/Documentation/devicetree/bindings/net/ti,davinci-mdio.yaml @@ -58,6 +58,8 @@ required: - "#address-cells" - "#size-cells" +unevaluatedProperties: false + examples: - | davinci_mdio: mdio@4a101000 { diff --git a/Documentation/devicetree/bindings/net/ti,dp83867.yaml b/Documentation/devicetree/bindings/net/ti,dp83867.yaml index c6716ac6cbcc..4050a3608658 100644 --- a/Documentation/devicetree/bindings/net/ti,dp83867.yaml +++ b/Documentation/devicetree/bindings/net/ti,dp83867.yaml @@ -109,6 +109,8 @@ properties: required: - reg +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/net/ti,dp83869.yaml b/Documentation/devicetree/bindings/net/ti,dp83869.yaml index cf40b469c719..c3235f08e326 100644 --- a/Documentation/devicetree/bindings/net/ti,dp83869.yaml +++ b/Documentation/devicetree/bindings/net/ti,dp83869.yaml @@ -79,6 +79,8 @@ properties: required: - reg +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/nvmem/imx-ocotp.yaml b/Documentation/devicetree/bindings/nvmem/imx-ocotp.yaml index 5a7284737229..8a43dc1283fe 100644 --- a/Documentation/devicetree/bindings/nvmem/imx-ocotp.yaml +++ b/Documentation/devicetree/bindings/nvmem/imx-ocotp.yaml @@ -76,6 +76,8 @@ patternProperties: additionalProperties: false +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml b/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml index 59aca6d22ff9..1a18b6bab35e 100644 --- a/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml +++ b/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml @@ -49,6 +49,8 @@ required: - compatible - reg +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/nvmem/qcom,spmi-sdam.yaml b/Documentation/devicetree/bindings/nvmem/qcom,spmi-sdam.yaml index 7bbd4e62044e..a835e64bc6f5 100644 --- a/Documentation/devicetree/bindings/nvmem/qcom,spmi-sdam.yaml +++ b/Documentation/devicetree/bindings/nvmem/qcom,spmi-sdam.yaml @@ -66,6 +66,8 @@ patternProperties: additionalProperties: false +unevaluatedProperties: false + examples: - | sdam_1: nvram@b000 { diff --git a/Documentation/devicetree/bindings/nvmem/rockchip-efuse.yaml b/Documentation/devicetree/bindings/nvmem/rockchip-efuse.yaml index 3ae00b0b23bc..104dd508565e 100644 --- a/Documentation/devicetree/bindings/nvmem/rockchip-efuse.yaml +++ b/Documentation/devicetree/bindings/nvmem/rockchip-efuse.yaml @@ -51,6 +51,8 @@ required: - clocks - clock-names +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/nvmem/st,stm32-romem.yaml b/Documentation/devicetree/bindings/nvmem/st,stm32-romem.yaml index c11c99f085d7..0b80ce22a2f8 100644 --- a/Documentation/devicetree/bindings/nvmem/st,stm32-romem.yaml +++ b/Documentation/devicetree/bindings/nvmem/st,stm32-romem.yaml @@ -42,6 +42,8 @@ required: - compatible - reg +unevaluatedProperties: false + examples: - | efuse@1fff7800 { diff --git a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml index 50ce5d79d2c7..651eee88989d 100644 --- a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml @@ -29,6 +29,8 @@ required: - reg - reg-names +unevaluatedProperties: false + examples: - | bus { diff --git a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml index 6d67067843bf..293b8ec318bc 100644 --- a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml +++ b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml @@ -31,6 +31,8 @@ required: - reg - reg-names +unevaluatedProperties: false + examples: - | bus { diff --git a/Documentation/devicetree/bindings/pci/host-generic-pci.yaml b/Documentation/devicetree/bindings/pci/host-generic-pci.yaml index 47353d0cd394..6bcaa8f2c3cf 100644 --- a/Documentation/devicetree/bindings/pci/host-generic-pci.yaml +++ b/Documentation/devicetree/bindings/pci/host-generic-pci.yaml @@ -137,6 +137,8 @@ allOf: reg: maxItems: 1 +unevaluatedProperties: false + examples: - | diff --git a/Documentation/devicetree/bindings/pci/loongson.yaml b/Documentation/devicetree/bindings/pci/loongson.yaml index 30e7cf1aeb87..81bae060cbde 100644 --- a/Documentation/devicetree/bindings/pci/loongson.yaml +++ b/Documentation/devicetree/bindings/pci/loongson.yaml @@ -39,6 +39,8 @@ required: - reg - ranges +unevaluatedProperties: false + examples: - | diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml index b3c3d0c3c390..3ae3e1a2d4b0 100644 --- a/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml +++ b/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml @@ -63,6 +63,8 @@ required: - phys - phy-names +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml index 8200ba00bc09..ee7a8eade3f6 100644 --- a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml +++ b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml @@ -72,6 +72,8 @@ required: - phys - phy-names +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/pci/versatile.yaml b/Documentation/devicetree/bindings/pci/versatile.yaml index 07a48c27db1f..09748ef6b94f 100644 --- a/Documentation/devicetree/bindings/pci/versatile.yaml +++ b/Documentation/devicetree/bindings/pci/versatile.yaml @@ -48,6 +48,8 @@ required: - interrupt-map - interrupt-map-mask +unevaluatedProperties: false + examples: - | pci@10001000 { diff --git a/Documentation/devicetree/bindings/power/pd-samsung.yaml b/Documentation/devicetree/bindings/power/pd-samsung.yaml index 09bdd96c1ec1..9c2c51133457 100644 --- a/Documentation/devicetree/bindings/power/pd-samsung.yaml +++ b/Documentation/devicetree/bindings/power/pd-samsung.yaml @@ -49,6 +49,8 @@ required: - "#power-domain-cells" - reg +unevaluatedProperties: false + examples: - | lcd0_pd: power-domain@10023c80 { diff --git a/Documentation/devicetree/bindings/regulator/fixed-regulator.yaml b/Documentation/devicetree/bindings/regulator/fixed-regulator.yaml index 3dbb9cf86f15..92211f2b3b0c 100644 --- a/Documentation/devicetree/bindings/regulator/fixed-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/fixed-regulator.yaml @@ -73,6 +73,8 @@ required: - compatible - regulator-name +unevaluatedProperties: false + examples: - | reg_1v8: regulator-1v8 { diff --git a/Documentation/devicetree/bindings/regulator/google,cros-ec-regulator.yaml b/Documentation/devicetree/bindings/regulator/google,cros-ec-regulator.yaml index c9453d7ce227..69e5402da761 100644 --- a/Documentation/devicetree/bindings/regulator/google,cros-ec-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/google,cros-ec-regulator.yaml @@ -28,6 +28,8 @@ required: - compatible - reg +unevaluatedProperties: false + examples: - | spi0 { diff --git a/Documentation/devicetree/bindings/regulator/gpio-regulator.yaml b/Documentation/devicetree/bindings/regulator/gpio-regulator.yaml index 605590384b48..f7e3d8fd3bf3 100644 --- a/Documentation/devicetree/bindings/regulator/gpio-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/gpio-regulator.yaml @@ -91,6 +91,8 @@ required: - gpios - states +unevaluatedProperties: false + examples: - | gpio-regulator { diff --git a/Documentation/devicetree/bindings/regulator/st,stm32-booster.yaml b/Documentation/devicetree/bindings/regulator/st,stm32-booster.yaml index cb336b2c16af..9f1c70381b82 100644 --- a/Documentation/devicetree/bindings/regulator/st,stm32-booster.yaml +++ b/Documentation/devicetree/bindings/regulator/st,stm32-booster.yaml @@ -34,6 +34,8 @@ required: - st,syscfg - vdda-supply +unevaluatedProperties: false + examples: - | regulator-booster { diff --git a/Documentation/devicetree/bindings/regulator/st,stm32-vrefbuf.yaml b/Documentation/devicetree/bindings/regulator/st,stm32-vrefbuf.yaml index 33cdaeb25aee..3cd4a254e4cb 100644 --- a/Documentation/devicetree/bindings/regulator/st,stm32-vrefbuf.yaml +++ b/Documentation/devicetree/bindings/regulator/st,stm32-vrefbuf.yaml @@ -36,6 +36,8 @@ required: - clocks - vdda-supply +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/regulator/vqmmc-ipq4019-regulator.yaml b/Documentation/devicetree/bindings/regulator/vqmmc-ipq4019-regulator.yaml index d1a79d2ffa1e..6f45582c914e 100644 --- a/Documentation/devicetree/bindings/regulator/vqmmc-ipq4019-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/vqmmc-ipq4019-regulator.yaml @@ -28,6 +28,8 @@ required: - compatible - reg +unevaluatedProperties: false + examples: - | regulator@1948000 { diff --git a/Documentation/devicetree/bindings/rtc/ingenic,rtc.yaml b/Documentation/devicetree/bindings/rtc/ingenic,rtc.yaml index bc2c7e53a28e..60e93e86ad9d 100644 --- a/Documentation/devicetree/bindings/rtc/ingenic,rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/ingenic,rtc.yaml @@ -68,6 +68,8 @@ required: - clocks - clock-names +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/rtc/s3c-rtc.yaml b/Documentation/devicetree/bindings/rtc/s3c-rtc.yaml index 76bbf8b7555b..d51b236939bf 100644 --- a/Documentation/devicetree/bindings/rtc/s3c-rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/s3c-rtc.yaml @@ -74,6 +74,8 @@ allOf: items: - const: rtc +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/serial/ingenic,uart.yaml b/Documentation/devicetree/bindings/serial/ingenic,uart.yaml index dc8349322c83..559213899d73 100644 --- a/Documentation/devicetree/bindings/serial/ingenic,uart.yaml +++ b/Documentation/devicetree/bindings/serial/ingenic,uart.yaml @@ -9,6 +9,9 @@ title: Ingenic SoCs UART controller devicetree bindings maintainers: - Paul Cercueil +allOf: + - $ref: /schemas/serial.yaml# + properties: $nodename: pattern: "^serial@[0-9a-f]+$" @@ -64,6 +67,8 @@ required: - dmas - dma-names +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/serial/renesas,hscif.yaml b/Documentation/devicetree/bindings/serial/renesas,hscif.yaml index 6b04c0451d41..2f30dc79b444 100644 --- a/Documentation/devicetree/bindings/serial/renesas,hscif.yaml +++ b/Documentation/devicetree/bindings/serial/renesas,hscif.yaml @@ -100,6 +100,8 @@ required: - clock-names - power-domains +unevaluatedProperties: false + if: properties: compatible: diff --git a/Documentation/devicetree/bindings/serial/renesas,sci.yaml b/Documentation/devicetree/bindings/serial/renesas,sci.yaml index 4183b7311f37..22ed2f0b1dc3 100644 --- a/Documentation/devicetree/bindings/serial/renesas,sci.yaml +++ b/Documentation/devicetree/bindings/serial/renesas,sci.yaml @@ -54,6 +54,8 @@ required: - clocks - clock-names +unevaluatedProperties: false + examples: - | aliases { diff --git a/Documentation/devicetree/bindings/serial/renesas,scif.yaml b/Documentation/devicetree/bindings/serial/renesas,scif.yaml index 570b379f9f19..45042bf20b36 100644 --- a/Documentation/devicetree/bindings/serial/renesas,scif.yaml +++ b/Documentation/devicetree/bindings/serial/renesas,scif.yaml @@ -149,6 +149,8 @@ then: required: - resets +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/serial/renesas,scifa.yaml b/Documentation/devicetree/bindings/serial/renesas,scifa.yaml index 78b8e20dd34d..dbffb9534835 100644 --- a/Documentation/devicetree/bindings/serial/renesas,scifa.yaml +++ b/Documentation/devicetree/bindings/serial/renesas,scifa.yaml @@ -75,6 +75,8 @@ required: - clock-names - power-domains +unevaluatedProperties: false + if: properties: compatible: diff --git a/Documentation/devicetree/bindings/serial/renesas,scifb.yaml b/Documentation/devicetree/bindings/serial/renesas,scifb.yaml index b083970c16a9..147f8a37e02a 100644 --- a/Documentation/devicetree/bindings/serial/renesas,scifb.yaml +++ b/Documentation/devicetree/bindings/serial/renesas,scifb.yaml @@ -75,6 +75,8 @@ required: - clock-names - power-domains +unevaluatedProperties: false + if: properties: compatible: diff --git a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml index b962f8db4ce9..87ef1e218152 100644 --- a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml +++ b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml @@ -101,6 +101,8 @@ required: - reg - interrupts +unevaluatedProperties: false + examples: - | serial@80230000 { diff --git a/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml b/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml index 38efb50081e3..667dedefd69f 100644 --- a/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml +++ b/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml @@ -77,6 +77,8 @@ required: - clocks - clock-names +unevaluatedProperties: false + examples: - | spi@c1108d80 { diff --git a/Documentation/devicetree/bindings/spi/amlogic,meson6-spifc.yaml b/Documentation/devicetree/bindings/spi/amlogic,meson6-spifc.yaml index 5f33c39d820b..54b6f15eca18 100644 --- a/Documentation/devicetree/bindings/spi/amlogic,meson6-spifc.yaml +++ b/Documentation/devicetree/bindings/spi/amlogic,meson6-spifc.yaml @@ -35,6 +35,8 @@ required: - reg - clocks +unevaluatedProperties: false + examples: - | spi@c1108c80 { diff --git a/Documentation/devicetree/bindings/spi/mikrotik,rb4xx-spi.yaml b/Documentation/devicetree/bindings/spi/mikrotik,rb4xx-spi.yaml index e0c55dd235d8..3fd0a8adfe9a 100644 --- a/Documentation/devicetree/bindings/spi/mikrotik,rb4xx-spi.yaml +++ b/Documentation/devicetree/bindings/spi/mikrotik,rb4xx-spi.yaml @@ -24,6 +24,8 @@ required: - compatible - reg +unevaluatedProperties: false + examples: - | spi: spi@1f000000 { diff --git a/Documentation/devicetree/bindings/spi/qca,ar934x-spi.yaml b/Documentation/devicetree/bindings/spi/qca,ar934x-spi.yaml index 2aa766759d59..7b19f2c1cb59 100644 --- a/Documentation/devicetree/bindings/spi/qca,ar934x-spi.yaml +++ b/Documentation/devicetree/bindings/spi/qca,ar934x-spi.yaml @@ -29,6 +29,8 @@ required: - '#address-cells' - '#size-cells' +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml b/Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml index 0178831b0662..ef5698f426b2 100644 --- a/Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml +++ b/Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml @@ -56,6 +56,8 @@ required: - clock-names - clocks +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/spi/renesas,hspi.yaml b/Documentation/devicetree/bindings/spi/renesas,hspi.yaml index f492cb9fea12..c0eccf703039 100644 --- a/Documentation/devicetree/bindings/spi/renesas,hspi.yaml +++ b/Documentation/devicetree/bindings/spi/renesas,hspi.yaml @@ -40,6 +40,8 @@ required: - '#address-cells' - '#size-cells' +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/spi/renesas,rspi.yaml b/Documentation/devicetree/bindings/spi/renesas,rspi.yaml index c54ac059043f..b56d76ec0364 100644 --- a/Documentation/devicetree/bindings/spi/renesas,rspi.yaml +++ b/Documentation/devicetree/bindings/spi/renesas,rspi.yaml @@ -123,6 +123,8 @@ allOf: required: - resets +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml b/Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml index 9f7b118adcaf..e8afd26bbeb2 100644 --- a/Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml +++ b/Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml @@ -140,6 +140,8 @@ required: - '#address-cells' - '#size-cells' +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/spi/socionext,uniphier-spi.yaml b/Documentation/devicetree/bindings/spi/socionext,uniphier-spi.yaml index c25409298bdf..597fc4e6b01c 100644 --- a/Documentation/devicetree/bindings/spi/socionext,uniphier-spi.yaml +++ b/Documentation/devicetree/bindings/spi/socionext,uniphier-spi.yaml @@ -44,6 +44,8 @@ required: - "#address-cells" - "#size-cells" +unevaluatedProperties: false + examples: - | spi0: spi@54006000 { diff --git a/Documentation/devicetree/bindings/spi/spi-gpio.yaml b/Documentation/devicetree/bindings/spi/spi-gpio.yaml index 55c4f1705f07..0d0b6d9dad1c 100644 --- a/Documentation/devicetree/bindings/spi/spi-gpio.yaml +++ b/Documentation/devicetree/bindings/spi/spi-gpio.yaml @@ -53,6 +53,8 @@ required: - num-chipselects - sck-gpios +unevaluatedProperties: false + examples: - | spi { diff --git a/Documentation/devicetree/bindings/spi/spi-mux.yaml b/Documentation/devicetree/bindings/spi/spi-mux.yaml index 3d3fed63409b..6c21a132b51f 100644 --- a/Documentation/devicetree/bindings/spi/spi-mux.yaml +++ b/Documentation/devicetree/bindings/spi/spi-mux.yaml @@ -48,6 +48,8 @@ required: - spi-max-frequency - mux-controls +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/spi/spi-pl022.yaml b/Documentation/devicetree/bindings/spi/spi-pl022.yaml index 22999024477f..a91d868e40c5 100644 --- a/Documentation/devicetree/bindings/spi/spi-pl022.yaml +++ b/Documentation/devicetree/bindings/spi/spi-pl022.yaml @@ -128,6 +128,8 @@ required: - reg - interrupts +unevaluatedProperties: false + examples: - | spi@e0100000 { diff --git a/Documentation/devicetree/bindings/spi/spi-rockchip.yaml b/Documentation/devicetree/bindings/spi/spi-rockchip.yaml index 74dc6185eced..1e6cf29e6388 100644 --- a/Documentation/devicetree/bindings/spi/spi-rockchip.yaml +++ b/Documentation/devicetree/bindings/spi/spi-rockchip.yaml @@ -85,6 +85,8 @@ required: - clocks - clock-names +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/spi/spi-sifive.yaml b/Documentation/devicetree/bindings/spi/spi-sifive.yaml index 4932205d1cba..56dcf1d35da4 100644 --- a/Documentation/devicetree/bindings/spi/spi-sifive.yaml +++ b/Documentation/devicetree/bindings/spi/spi-sifive.yaml @@ -66,6 +66,8 @@ required: - interrupts - clocks +unevaluatedProperties: false + examples: - | spi: spi@10040000 { diff --git a/Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml b/Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml index 1a342ce1f798..983c4e54c0be 100644 --- a/Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml +++ b/Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml @@ -53,6 +53,8 @@ required: - clocks - interrupts +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml b/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml index e49ecbf715ba..d11806b1ede3 100644 --- a/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml +++ b/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml @@ -76,6 +76,8 @@ required: - clocks - interrupts +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/watchdog/amlogic,meson-gxbb-wdt.yaml b/Documentation/devicetree/bindings/watchdog/amlogic,meson-gxbb-wdt.yaml index 4ddae6feef3b..c7459cf70e30 100644 --- a/Documentation/devicetree/bindings/watchdog/amlogic,meson-gxbb-wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/amlogic,meson-gxbb-wdt.yaml @@ -31,6 +31,8 @@ required: - reg - clocks +unevaluatedProperties: false + examples: - | watchdog@98d0 { diff --git a/Documentation/devicetree/bindings/watchdog/arm-smc-wdt.yaml b/Documentation/devicetree/bindings/watchdog/arm-smc-wdt.yaml index 8e4c7c69bc1c..e3a1d79574e2 100644 --- a/Documentation/devicetree/bindings/watchdog/arm-smc-wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/arm-smc-wdt.yaml @@ -25,6 +25,8 @@ properties: required: - compatible +unevaluatedProperties: false + examples: - | watchdog { diff --git a/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml b/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml index 0709ddf0b6a5..8e3760a3822b 100644 --- a/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml @@ -38,6 +38,8 @@ required: - reg - clocks +unevaluatedProperties: false + examples: - | watchdog@208a038 { diff --git a/Documentation/devicetree/bindings/watchdog/samsung-wdt.yaml b/Documentation/devicetree/bindings/watchdog/samsung-wdt.yaml index 2fa40d8864b2..76cb9586ee00 100644 --- a/Documentation/devicetree/bindings/watchdog/samsung-wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/samsung-wdt.yaml @@ -62,6 +62,8 @@ allOf: required: - samsung,syscon-phandle +unevaluatedProperties: false + examples: - | watchdog@101d0000 { diff --git a/Documentation/devicetree/bindings/watchdog/st,stm32-iwdg.yaml b/Documentation/devicetree/bindings/watchdog/st,stm32-iwdg.yaml index a27c504e2e4f..3f1ba1d6c6b5 100644 --- a/Documentation/devicetree/bindings/watchdog/st,stm32-iwdg.yaml +++ b/Documentation/devicetree/bindings/watchdog/st,stm32-iwdg.yaml @@ -43,6 +43,8 @@ required: - clocks - clock-names +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/watchdog/ti,rti-wdt.yaml b/Documentation/devicetree/bindings/watchdog/ti,rti-wdt.yaml index f0452791c598..c1348db59374 100644 --- a/Documentation/devicetree/bindings/watchdog/ti,rti-wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/ti,rti-wdt.yaml @@ -46,6 +46,8 @@ required: - clocks - power-domains +unevaluatedProperties: false + examples: - | /* From 4828556dca12b294f1c548f05348068d141c3a36 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Mon, 5 Oct 2020 13:38:28 -0500 Subject: [PATCH 419/433] dt-bindings: Use 'additionalProperties' instead of 'unevaluatedProperties' In cases where we don't reference another schema, 'additionalProperties' can be used instead. This is preferred for now as 'unevaluatedProperties' support isn't implemented yet. In a few cases, this means adding some missing property definitions of which most are for SPI bus properties. 'unevaluatedProperties' is not going to work for the SPI bus properties anyways as they are evaluated from the parent node, not the SPI child node. Acked-by: Mark Brown Acked-by: Krzysztof Kozlowski Acked-by: Lee Jones Acked-by: Jonathan Cameron Acked-by: Guenter Roeck Link: https://lore.kernel.org/r/20201005183830.486085-3-robh@kernel.org Signed-off-by: Rob Herring --- .../devicetree/bindings/clock/baikal,bt1-ccu-div.yaml | 6 +++++- .../devicetree/bindings/clock/baikal,bt1-ccu-pll.yaml | 2 +- .../devicetree/bindings/clock/imx8m-clock.yaml | 2 +- .../devicetree/bindings/hwmon/baikal,bt1-pvt.yaml | 4 ++-- .../devicetree/bindings/iio/accel/adi,adis16240.yaml | 4 +++- .../devicetree/bindings/iio/accel/adi,adxl345.yaml | 4 +++- .../devicetree/bindings/iio/accel/adi,adxl372.yaml | 4 +++- .../devicetree/bindings/iio/adc/adi,ad7124.yaml | 4 +++- .../devicetree/bindings/iio/adc/adi,ad7192.yaml | 4 +++- .../devicetree/bindings/iio/adc/adi,ad7292.yaml | 4 +++- .../devicetree/bindings/iio/adc/adi,ad7606.yaml | 6 +++++- .../devicetree/bindings/iio/adc/adi,ad7923.yaml | 4 +++- .../devicetree/bindings/iio/adc/maxim,max1241.yaml | 4 +++- .../devicetree/bindings/iio/dac/adi,ad5770r.yaml | 10 +++++++++- .../devicetree/bindings/iio/frequency/adf4371.yaml | 4 +++- .../devicetree/bindings/iio/imu/adi,adis16460.yaml | 4 +++- .../devicetree/bindings/iio/imu/adi,adis16475.yaml | 2 +- .../devicetree/bindings/iio/imu/bosch,bmi160.yaml | 4 +++- .../devicetree/bindings/iio/imu/nxp,fxos8700.yaml | 4 +++- .../bindings/interrupt-controller/mti,gic.yaml | 2 +- .../devicetree/bindings/mfd/cirrus,lochnagar.yaml | 10 +++++++++- .../bindings/mfd/ti,j721e-system-controller.yaml | 5 ++++- .../devicetree/bindings/misc/olpc,xo1.75-ec.yaml | 4 +++- .../opp/allwinner,sun50i-h6-operating-points.yaml | 4 +++- .../bindings/regulator/qcom-labibb-regulator.yaml | 2 +- .../devicetree/bindings/timer/snps,dw-apb-timer.yaml | 2 +- 26 files changed, 82 insertions(+), 27 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/baikal,bt1-ccu-div.yaml b/Documentation/devicetree/bindings/clock/baikal,bt1-ccu-div.yaml index 2821425ee445..bd4cefbb1244 100644 --- a/Documentation/devicetree/bindings/clock/baikal,bt1-ccu-div.yaml +++ b/Documentation/devicetree/bindings/clock/baikal,bt1-ccu-div.yaml @@ -134,7 +134,11 @@ properties: "#reset-cells": const: 1 -unevaluatedProperties: false + clocks: true + + clock-names: true + +additionalProperties: false required: - compatible diff --git a/Documentation/devicetree/bindings/clock/baikal,bt1-ccu-pll.yaml b/Documentation/devicetree/bindings/clock/baikal,bt1-ccu-pll.yaml index 97131bfa6f87..624984d51c10 100644 --- a/Documentation/devicetree/bindings/clock/baikal,bt1-ccu-pll.yaml +++ b/Documentation/devicetree/bindings/clock/baikal,bt1-ccu-pll.yaml @@ -101,7 +101,7 @@ properties: clock-names: const: ref_clk -unevaluatedProperties: false +additionalProperties: false required: - compatible diff --git a/Documentation/devicetree/bindings/clock/imx8m-clock.yaml b/Documentation/devicetree/bindings/clock/imx8m-clock.yaml index 31e7cc9693c3..625f573a7b90 100644 --- a/Documentation/devicetree/bindings/clock/imx8m-clock.yaml +++ b/Documentation/devicetree/bindings/clock/imx8m-clock.yaml @@ -96,7 +96,7 @@ allOf: - const: clk_ext3 - const: clk_ext4 -unevaluatedProperties: false +additionalProperties: false examples: # Clock Control Module node: diff --git a/Documentation/devicetree/bindings/hwmon/baikal,bt1-pvt.yaml b/Documentation/devicetree/bindings/hwmon/baikal,bt1-pvt.yaml index 84ae4cdd08ed..00a6511354e6 100644 --- a/Documentation/devicetree/bindings/hwmon/baikal,bt1-pvt.yaml +++ b/Documentation/devicetree/bindings/hwmon/baikal,bt1-pvt.yaml @@ -79,7 +79,7 @@ properties: minimum: 0 maximum: 7130 -unevaluatedProperties: false +additionalProperties: false required: - compatible @@ -99,7 +99,7 @@ examples: interrupts = ; - baikal,pvt-temp-trim-millicelsius = <1000>; + baikal,pvt-temp-offset-millicelsius = <1000>; clocks = <&ccu_sys>, <&ccu_sys>; clock-names = "ref", "pclk"; diff --git a/Documentation/devicetree/bindings/iio/accel/adi,adis16240.yaml b/Documentation/devicetree/bindings/iio/accel/adi,adis16240.yaml index 8589b722028d..4fcbfd93e218 100644 --- a/Documentation/devicetree/bindings/iio/accel/adi,adis16240.yaml +++ b/Documentation/devicetree/bindings/iio/accel/adi,adis16240.yaml @@ -25,12 +25,14 @@ properties: interrupts: maxItems: 1 + spi-max-frequency: true + required: - compatible - reg - interrupts -unevaluatedProperties: false +additionalProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml b/Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml index 591ca32181b0..11d32a288535 100644 --- a/Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml +++ b/Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml @@ -32,6 +32,8 @@ properties: spi-cpol: true + spi-max-frequency: true + interrupts: maxItems: 1 @@ -40,7 +42,7 @@ required: - reg - interrupts -unevaluatedProperties: false +additionalProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml b/Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml index 64f275c8e2d9..38b59b6454ce 100644 --- a/Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml +++ b/Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml @@ -25,12 +25,14 @@ properties: interrupts: maxItems: 1 + spi-max-frequency: true + required: - compatible - reg - interrupts -unevaluatedProperties: false +additionalProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml index d0d2880626c2..f1c574c896cb 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml @@ -52,6 +52,8 @@ properties: avdd-supply: description: avdd supply can be used as reference for conversion. + spi-max-frequency: true + required: - compatible - reg @@ -108,7 +110,7 @@ patternProperties: - reg - diff-channels -unevaluatedProperties: false +additionalProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml index ed363a796e50..e0cc3b2e8957 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml @@ -30,6 +30,8 @@ properties: spi-cpha: true + spi-max-frequency: true + clocks: maxItems: 1 description: phandle to the master clock (mclk) @@ -92,7 +94,7 @@ required: - spi-cpol - spi-cpha -unevaluatedProperties: false +additionalProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7292.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7292.yaml index 55e973c6449c..108d202b288f 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7292.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7292.yaml @@ -30,6 +30,8 @@ properties: spi-cpha: true + spi-max-frequency: true + '#address-cells': const: 1 @@ -63,7 +65,7 @@ patternProperties: required: - reg -unevaluatedProperties: false +additionalProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml index 014b020ed0c2..73775174cf57 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml @@ -31,6 +31,10 @@ properties: spi-cpha: true + spi-cpol: true + + spi-max-frequency: true + avcc-supply: true interrupts: @@ -102,7 +106,7 @@ required: - interrupts - adi,conversion-start-gpios -unevaluatedProperties: false +additionalProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7923.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7923.yaml index 2a17641faed5..e82194974eea 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7923.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7923.yaml @@ -43,11 +43,13 @@ properties: '#size-cells': const: 0 + spi-max-frequency: true + required: - compatible - reg -unevaluatedProperties: false +additionalProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/adc/maxim,max1241.yaml b/Documentation/devicetree/bindings/iio/adc/maxim,max1241.yaml index 181213b862db..4c7e0d94bff1 100644 --- a/Documentation/devicetree/bindings/iio/adc/maxim,max1241.yaml +++ b/Documentation/devicetree/bindings/iio/adc/maxim,max1241.yaml @@ -39,13 +39,15 @@ properties: thus enabling power-down mode. maxItems: 1 + spi-max-frequency: true + required: - compatible - reg - vdd-supply - vref-supply -unevaluatedProperties: false +additionalProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ad5770r.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ad5770r.yaml index faef288b7148..fb2c48fc7ce4 100644 --- a/Documentation/devicetree/bindings/iio/dac/adi,ad5770r.yaml +++ b/Documentation/devicetree/bindings/iio/dac/adi,ad5770r.yaml @@ -49,6 +49,14 @@ properties: asserted during driver probe. maxItems: 1 + spi-max-frequency: true + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + channel@0: description: Represents an external channel which are connected to the DAC. Channel 0 can act both as a current @@ -130,7 +138,7 @@ required: - channel@4 - channel@5 -unevaluatedProperties: false +additionalProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml b/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml index 11d445f7010e..6b3a611e1cf1 100644 --- a/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml +++ b/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml @@ -40,13 +40,15 @@ properties: output stage will shut down until the ADF4371/ADF4372 achieves lock as measured by the digital lock detect circuitry. + spi-max-frequency: true + required: - compatible - reg - clocks - clock-names -unevaluatedProperties: false +additionalProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/imu/adi,adis16460.yaml b/Documentation/devicetree/bindings/iio/imu/adi,adis16460.yaml index 07c8ed4ee0f1..340be256f283 100644 --- a/Documentation/devicetree/bindings/iio/imu/adi,adis16460.yaml +++ b/Documentation/devicetree/bindings/iio/imu/adi,adis16460.yaml @@ -25,6 +25,8 @@ properties: spi-cpol: true + spi-max-frequency: true + interrupts: maxItems: 1 @@ -33,7 +35,7 @@ required: - reg - interrupts -unevaluatedProperties: false +additionalProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/imu/adi,adis16475.yaml b/Documentation/devicetree/bindings/iio/imu/adi,adis16475.yaml index c29385697bbf..79fba1508e89 100644 --- a/Documentation/devicetree/bindings/iio/imu/adi,adis16475.yaml +++ b/Documentation/devicetree/bindings/iio/imu/adi,adis16475.yaml @@ -116,7 +116,7 @@ allOf: dependencies: adi,sync-mode: [ clocks ] -unevaluatedProperties: false +additionalProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/imu/bosch,bmi160.yaml b/Documentation/devicetree/bindings/iio/imu/bosch,bmi160.yaml index 4f215399c8df..6e73cd889b5c 100644 --- a/Documentation/devicetree/bindings/iio/imu/bosch,bmi160.yaml +++ b/Documentation/devicetree/bindings/iio/imu/bosch,bmi160.yaml @@ -46,11 +46,13 @@ properties: mount-matrix: description: an optional 3x3 mounting rotation matrix + spi-max-frequency: true + required: - compatible - reg -unevaluatedProperties: false +additionalProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml b/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml index 716731c2b794..479e7065d4eb 100644 --- a/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml +++ b/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml @@ -36,11 +36,13 @@ properties: drive-open-drain: type: boolean + spi-max-frequency: true + required: - compatible - reg -unevaluatedProperties: false +additionalProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/interrupt-controller/mti,gic.yaml b/Documentation/devicetree/bindings/interrupt-controller/mti,gic.yaml index ce6aaff15214..039e08af98bb 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/mti,gic.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/mti,gic.yaml @@ -95,7 +95,7 @@ properties: additionalProperties: false -unevaluatedProperties: false +additionalProperties: false required: - compatible diff --git a/Documentation/devicetree/bindings/mfd/cirrus,lochnagar.yaml b/Documentation/devicetree/bindings/mfd/cirrus,lochnagar.yaml index 7a616577ac63..c00ad3e21c21 100644 --- a/Documentation/devicetree/bindings/mfd/cirrus,lochnagar.yaml +++ b/Documentation/devicetree/bindings/mfd/cirrus,lochnagar.yaml @@ -130,6 +130,14 @@ properties: type: object $ref: /schemas/pinctrl/cirrus,lochnagar.yaml# + lochnagar-hwmon: + type: object + $ref: /schemas/hwmon/cirrus,lochnagar.yaml# + + lochnagar-sc: + type: object + $ref: /schemas/sound/cirrus,lochnagar.yaml# + VDDCORE: description: Initialisation data for the VDDCORE regulator, which supplies the @@ -249,7 +257,7 @@ required: - lochnagar-clk - lochnagar-pinctrl -unevaluatedProperties: false +additionalProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml b/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml index da3d9ab758b9..19fcf59fd2fe 100644 --- a/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml +++ b/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml @@ -30,6 +30,9 @@ properties: - const: syscon - const: simple-mfd + reg: + maxItems: 1 + "#address-cells": const: 1 @@ -54,7 +57,7 @@ required: - "#size-cells" - ranges -unevaluatedProperties: false +additionalProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/misc/olpc,xo1.75-ec.yaml b/Documentation/devicetree/bindings/misc/olpc,xo1.75-ec.yaml index e75d77beec6a..ade733cd60f7 100644 --- a/Documentation/devicetree/bindings/misc/olpc,xo1.75-ec.yaml +++ b/Documentation/devicetree/bindings/misc/olpc,xo1.75-ec.yaml @@ -28,11 +28,13 @@ properties: description: GPIO uspecifier of the CMD pin maxItems: 1 + spi-cpha: true + required: - compatible - cmd-gpios -unevaluatedProperties: false +additionalProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml b/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml index aef87a33a7c9..aeff2bd774dd 100644 --- a/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml +++ b/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml @@ -31,6 +31,8 @@ properties: Documentation/devicetree/bindings/nvmem/nvmem.txt and also examples below. + opp-shared: true + required: - compatible - nvmem-cells @@ -53,7 +55,7 @@ patternProperties: unevaluatedProperties: false -unevaluatedProperties: false +additionalProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/regulator/qcom-labibb-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom-labibb-regulator.yaml index fb111e2d5b99..53853ec20fe2 100644 --- a/Documentation/devicetree/bindings/regulator/qcom-labibb-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/qcom-labibb-regulator.yaml @@ -47,7 +47,7 @@ properties: required: - compatible -unevaluatedProperties: false +additionalProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/timer/snps,dw-apb-timer.yaml b/Documentation/devicetree/bindings/timer/snps,dw-apb-timer.yaml index 7b39e3204fb3..2fc617377e2c 100644 --- a/Documentation/devicetree/bindings/timer/snps,dw-apb-timer.yaml +++ b/Documentation/devicetree/bindings/timer/snps,dw-apb-timer.yaml @@ -45,7 +45,7 @@ properties: frequency in HZ, but is defined only for the backwards compatibility with the picoxcell platform. -unevaluatedProperties: false +additionalProperties: false required: - compatible From 6a0e321ea735691e726d84ee29a1a3fd3fc3541a Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Mon, 5 Oct 2020 13:38:30 -0500 Subject: [PATCH 420/433] dt-bindings: Explicitly allow additional properties in common schemas In order to add meta-schema checks for additional/unevaluatedProperties being present, all schema need to make this explicit. As common/shared schema are included by other schemas, they should always allow for additionalProperties. Acked-by: Mark Brown Acked-by: Krzysztof Kozlowski Acked-by: Sebastian Reichel Acked-by: Chanwoo Choi Acked-By: Vinod Koul Acked-by: Lee Jones Acked-by: Geert Uytterhoeven Acked-by: Srinivas Kandagatla Acked-by: Ulf Hansson Acked-by: Jonathan Cameron Acked-by: Guenter Roeck Link: https://lore.kernel.org/r/20201005183830.486085-5-robh@kernel.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/arm/cpus.yaml | 2 ++ .../devicetree/bindings/arm/nvidia,tegra194-ccplex.yaml | 2 ++ Documentation/devicetree/bindings/ata/pata-common.yaml | 2 ++ Documentation/devicetree/bindings/ata/sata-common.yaml | 2 ++ Documentation/devicetree/bindings/bus/simple-pm-bus.yaml | 2 ++ .../devicetree/bindings/chrome/google,cros-ec-typec.yaml | 2 ++ .../devicetree/bindings/connector/usb-connector.yaml | 2 ++ .../devicetree/bindings/display/bridge/snps,dw-mipi-dsi.yaml | 2 ++ .../devicetree/bindings/display/dsi-controller.yaml | 2 ++ Documentation/devicetree/bindings/display/panel/lvds.yaml | 2 ++ .../devicetree/bindings/display/panel/panel-common.yaml | 2 ++ Documentation/devicetree/bindings/dma/dma-common.yaml | 2 ++ Documentation/devicetree/bindings/dma/dma-controller.yaml | 2 ++ Documentation/devicetree/bindings/dma/dma-router.yaml | 2 ++ Documentation/devicetree/bindings/extcon/wlf,arizona.yaml | 2 ++ .../devicetree/bindings/iio/adc/samsung,exynos-adc.yaml | 5 +++++ Documentation/devicetree/bindings/iio/common.yaml | 2 ++ Documentation/devicetree/bindings/input/input.yaml | 2 ++ Documentation/devicetree/bindings/input/matrix-keymap.yaml | 2 ++ .../devicetree/bindings/input/touchscreen/touchscreen.yaml | 2 ++ Documentation/devicetree/bindings/leds/common.yaml | 2 ++ .../devicetree/bindings/leds/leds-class-multicolor.yaml | 3 +++ Documentation/devicetree/bindings/leds/trigger-source.yaml | 2 ++ Documentation/devicetree/bindings/media/rc.yaml | 2 ++ Documentation/devicetree/bindings/mfd/syscon.yaml | 2 +- Documentation/devicetree/bindings/mmc/mmc-controller.yaml | 2 ++ .../devicetree/bindings/mmc/synopsys-dw-mshc-common.yaml | 2 ++ Documentation/devicetree/bindings/mtd/nand-controller.yaml | 2 ++ .../devicetree/bindings/net/can/can-transceiver.yaml | 2 ++ Documentation/devicetree/bindings/net/dsa/dsa.yaml | 2 ++ .../devicetree/bindings/net/ethernet-controller.yaml | 2 ++ Documentation/devicetree/bindings/net/ethernet-phy.yaml | 2 ++ Documentation/devicetree/bindings/net/mdio.yaml | 2 ++ Documentation/devicetree/bindings/net/snps,dwmac.yaml | 2 ++ Documentation/devicetree/bindings/nvmem/nvmem-consumer.yaml | 2 ++ Documentation/devicetree/bindings/nvmem/nvmem.yaml | 2 ++ Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml | 2 ++ Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml | 2 ++ Documentation/devicetree/bindings/pci/cdns-pcie.yaml | 2 ++ Documentation/devicetree/bindings/pci/pci-ep.yaml | 2 ++ Documentation/devicetree/bindings/pinctrl/cirrus,madera.yaml | 2 ++ Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml | 2 ++ Documentation/devicetree/bindings/pinctrl/pinmux-node.yaml | 2 ++ Documentation/devicetree/bindings/power/power-domain.yaml | 2 ++ .../devicetree/bindings/power/supply/power-supply.yaml | 2 ++ Documentation/devicetree/bindings/pwm/pwm.yaml | 2 ++ Documentation/devicetree/bindings/regulator/regulator.yaml | 2 ++ Documentation/devicetree/bindings/regulator/wlf,arizona.yaml | 2 ++ Documentation/devicetree/bindings/riscv/cpus.yaml | 2 ++ Documentation/devicetree/bindings/rtc/rtc.yaml | 2 ++ Documentation/devicetree/bindings/serial/rs485.yaml | 3 +++ Documentation/devicetree/bindings/serial/serial.yaml | 2 ++ Documentation/devicetree/bindings/soc/imx/fsl,aips-bus.yaml | 2 ++ Documentation/devicetree/bindings/sound/amlogic,aiu.yaml | 2 ++ Documentation/devicetree/bindings/sound/cirrus,madera.yaml | 2 ++ .../devicetree/bindings/sound/nvidia,tegra210-ahub.yaml | 3 +++ Documentation/devicetree/bindings/sound/wlf,arizona.yaml | 2 ++ .../devicetree/bindings/soundwire/soundwire-controller.yaml | 2 ++ Documentation/devicetree/bindings/spi/spi-controller.yaml | 2 ++ Documentation/devicetree/bindings/spmi/spmi.yaml | 2 ++ .../devicetree/bindings/thermal/thermal-cooling-devices.yaml | 2 ++ .../devicetree/bindings/thermal/thermal-sensor.yaml | 2 ++ Documentation/devicetree/bindings/usb/ti,tps6598x.yaml | 2 ++ Documentation/devicetree/bindings/usb/usb-hcd.yaml | 2 ++ Documentation/devicetree/bindings/watchdog/watchdog.yaml | 2 ++ 65 files changed, 135 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index 1222bf1831fa..14cd727d3c4b 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -341,6 +341,8 @@ required: dependencies: rockchip,pmu: [enable-method] +additionalProperties: true + examples: - | cpus { diff --git a/Documentation/devicetree/bindings/arm/nvidia,tegra194-ccplex.yaml b/Documentation/devicetree/bindings/arm/nvidia,tegra194-ccplex.yaml index 1043e4be4fca..c9675c4cdc1b 100644 --- a/Documentation/devicetree/bindings/arm/nvidia,tegra194-ccplex.yaml +++ b/Documentation/devicetree/bindings/arm/nvidia,tegra194-ccplex.yaml @@ -30,6 +30,8 @@ properties: Specifies the bpmp node that needs to be queried to get operating point data for all CPUs. +additionalProperties: true + examples: - | cpus { diff --git a/Documentation/devicetree/bindings/ata/pata-common.yaml b/Documentation/devicetree/bindings/ata/pata-common.yaml index fc5ebbe7108d..2412894a255d 100644 --- a/Documentation/devicetree/bindings/ata/pata-common.yaml +++ b/Documentation/devicetree/bindings/ata/pata-common.yaml @@ -47,4 +47,6 @@ patternProperties: The ID number of the drive port, 0 for the master port and 1 for the slave port. +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/ata/sata-common.yaml b/Documentation/devicetree/bindings/ata/sata-common.yaml index 6783a4dec6b5..7ac77b1c5850 100644 --- a/Documentation/devicetree/bindings/ata/sata-common.yaml +++ b/Documentation/devicetree/bindings/ata/sata-common.yaml @@ -47,4 +47,6 @@ patternProperties: multiplier making it possible to connect up to 15 disks to a single SATA port. +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/bus/simple-pm-bus.yaml b/Documentation/devicetree/bindings/bus/simple-pm-bus.yaml index 33326ffdb266..182134d7a6a3 100644 --- a/Documentation/devicetree/bindings/bus/simple-pm-bus.yaml +++ b/Documentation/devicetree/bindings/bus/simple-pm-bus.yaml @@ -61,6 +61,8 @@ anyOf: - required: - power-domains +additionalProperties: true + examples: - | #include diff --git a/Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml b/Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml index 6d7396ab8bee..2d98f7c4d3bc 100644 --- a/Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml +++ b/Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml @@ -26,6 +26,8 @@ properties: required: - compatible +additionalProperties: true #fixme + examples: - |+ spi0 { diff --git a/Documentation/devicetree/bindings/connector/usb-connector.yaml b/Documentation/devicetree/bindings/connector/usb-connector.yaml index dc6ff64422d4..f037d65b018e 100644 --- a/Documentation/devicetree/bindings/connector/usb-connector.yaml +++ b/Documentation/devicetree/bindings/connector/usb-connector.yaml @@ -172,6 +172,8 @@ allOf: type: const: micro +additionalProperties: true + examples: # Micro-USB connector with HS lines routed via controller (MUIC). - | diff --git a/Documentation/devicetree/bindings/display/bridge/snps,dw-mipi-dsi.yaml b/Documentation/devicetree/bindings/display/bridge/snps,dw-mipi-dsi.yaml index 012aa8e7cb8c..e42cb610f545 100644 --- a/Documentation/devicetree/bindings/display/bridge/snps,dw-mipi-dsi.yaml +++ b/Documentation/devicetree/bindings/display/bridge/snps,dw-mipi-dsi.yaml @@ -66,3 +66,5 @@ required: - clocks - ports - reg + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/display/dsi-controller.yaml b/Documentation/devicetree/bindings/display/dsi-controller.yaml index a02039e3aca0..ca21671f6bdd 100644 --- a/Documentation/devicetree/bindings/display/dsi-controller.yaml +++ b/Documentation/devicetree/bindings/display/dsi-controller.yaml @@ -73,6 +73,8 @@ patternProperties: required: - reg +additionalProperties: true + examples: - | #include diff --git a/Documentation/devicetree/bindings/display/panel/lvds.yaml b/Documentation/devicetree/bindings/display/panel/lvds.yaml index 946dd354256c..31164608ba1d 100644 --- a/Documentation/devicetree/bindings/display/panel/lvds.yaml +++ b/Documentation/devicetree/bindings/display/panel/lvds.yaml @@ -112,4 +112,6 @@ oneOf: - required: - ports +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/display/panel/panel-common.yaml b/Documentation/devicetree/bindings/display/panel/panel-common.yaml index 45fe8fe5faba..cd6dc5461721 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-common.yaml +++ b/Documentation/devicetree/bindings/display/panel/panel-common.yaml @@ -163,4 +163,6 @@ dependencies: width-mm: [ height-mm ] height-mm: [ width-mm ] +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/dma/dma-common.yaml b/Documentation/devicetree/bindings/dma/dma-common.yaml index c36592683340..307b499e8968 100644 --- a/Documentation/devicetree/bindings/dma/dma-common.yaml +++ b/Documentation/devicetree/bindings/dma/dma-common.yaml @@ -49,3 +49,5 @@ properties: required: - "#dma-cells" + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/dma/dma-controller.yaml b/Documentation/devicetree/bindings/dma/dma-controller.yaml index c39f6de76670..0043b91da95e 100644 --- a/Documentation/devicetree/bindings/dma/dma-controller.yaml +++ b/Documentation/devicetree/bindings/dma/dma-controller.yaml @@ -17,6 +17,8 @@ properties: $nodename: pattern: "^dma-controller(@.*)?$" +additionalProperties: true + examples: - | dma: dma-controller@48000000 { diff --git a/Documentation/devicetree/bindings/dma/dma-router.yaml b/Documentation/devicetree/bindings/dma/dma-router.yaml index 5b5f07393135..4cee5667b8a8 100644 --- a/Documentation/devicetree/bindings/dma/dma-router.yaml +++ b/Documentation/devicetree/bindings/dma/dma-router.yaml @@ -36,6 +36,8 @@ required: - "#dma-cells" - dma-masters +additionalProperties: true + examples: - | sdma_xbar: dma-router@4a002b78 { diff --git a/Documentation/devicetree/bindings/extcon/wlf,arizona.yaml b/Documentation/devicetree/bindings/extcon/wlf,arizona.yaml index f9845dc2f5ae..5fe784f487c5 100644 --- a/Documentation/devicetree/bindings/extcon/wlf,arizona.yaml +++ b/Documentation/devicetree/bindings/extcon/wlf,arizona.yaml @@ -123,3 +123,5 @@ properties: $ref: "/schemas/types.yaml#/definitions/uint32" minimum: 0 maximum: 3 + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml b/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml index cc3c8ea6a894..7ed6afc36228 100644 --- a/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml @@ -46,6 +46,8 @@ properties: "#io-channel-cells": const: 1 + io-channel-ranges: true + vdd-supply: true samsung,syscon-phandle: @@ -68,6 +70,9 @@ required: - "#io-channel-cells" - vdd-supply +additionalProperties: + type: object + allOf: - if: properties: diff --git a/Documentation/devicetree/bindings/iio/common.yaml b/Documentation/devicetree/bindings/iio/common.yaml index 97ffcb77043d..f845b41d74c4 100644 --- a/Documentation/devicetree/bindings/iio/common.yaml +++ b/Documentation/devicetree/bindings/iio/common.yaml @@ -32,4 +32,6 @@ properties: considered 'near' to the device (an object is near to the sensor). +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/input/input.yaml b/Documentation/devicetree/bindings/input/input.yaml index 8edcb3c31270..ab407f266bef 100644 --- a/Documentation/devicetree/bindings/input/input.yaml +++ b/Documentation/devicetree/bindings/input/input.yaml @@ -33,3 +33,5 @@ properties: power off automatically. Device with key pressed shutdown feature can specify this property. $ref: /schemas/types.yaml#/definitions/uint32 + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/input/matrix-keymap.yaml b/Documentation/devicetree/bindings/input/matrix-keymap.yaml index c3bf09156783..6699d5e32dca 100644 --- a/Documentation/devicetree/bindings/input/matrix-keymap.yaml +++ b/Documentation/devicetree/bindings/input/matrix-keymap.yaml @@ -35,6 +35,8 @@ properties: $ref: /schemas/types.yaml#/definitions/uint32 description: Number of column lines connected to the keypad controller. +additionalProperties: true + examples: - | keypad { diff --git a/Documentation/devicetree/bindings/input/touchscreen/touchscreen.yaml b/Documentation/devicetree/bindings/input/touchscreen/touchscreen.yaml index 36dc7b56a453..a771a15f053f 100644 --- a/Documentation/devicetree/bindings/input/touchscreen/touchscreen.yaml +++ b/Documentation/devicetree/bindings/input/touchscreen/touchscreen.yaml @@ -81,3 +81,5 @@ dependencies: touchscreen-size-y: [ touchscreen-size-x ] touchscreen-x-mm: [ touchscreen-y-mm ] touchscreen-y-mm: [ touchscreen-x-mm ] + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/leds/common.yaml b/Documentation/devicetree/bindings/leds/common.yaml index a2a541bca73c..08b6700ca61e 100644 --- a/Documentation/devicetree/bindings/leds/common.yaml +++ b/Documentation/devicetree/bindings/leds/common.yaml @@ -156,6 +156,8 @@ properties: Maximum timeout in microseconds after which the flash LED is turned off. Required for flash LED nodes with configurable timeout. +additionalProperties: true + examples: - | #include diff --git a/Documentation/devicetree/bindings/leds/leds-class-multicolor.yaml b/Documentation/devicetree/bindings/leds/leds-class-multicolor.yaml index b55e1f1308a4..b1a53f054b89 100644 --- a/Documentation/devicetree/bindings/leds/leds-class-multicolor.yaml +++ b/Documentation/devicetree/bindings/leds/leds-class-multicolor.yaml @@ -34,4 +34,7 @@ patternProperties: required: - color + +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/leds/trigger-source.yaml b/Documentation/devicetree/bindings/leds/trigger-source.yaml index 0618003e40bd..89a1cde2b8aa 100644 --- a/Documentation/devicetree/bindings/leds/trigger-source.yaml +++ b/Documentation/devicetree/bindings/leds/trigger-source.yaml @@ -21,4 +21,6 @@ properties: trigger sources (e.g. a specific USB port). enum: [ 0, 1 ] +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/media/rc.yaml b/Documentation/devicetree/bindings/media/rc.yaml index ded2ac43237d..8ad2cba5f61f 100644 --- a/Documentation/devicetree/bindings/media/rc.yaml +++ b/Documentation/devicetree/bindings/media/rc.yaml @@ -150,3 +150,5 @@ properties: - rc-x96max - rc-xbox-dvd - rc-zx-irdec + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index 844ee2a6ce05..5317a7d69aa5 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -71,7 +71,7 @@ required: - compatible - reg -unevaluatedProperties: false +additionalProperties: true examples: - | diff --git a/Documentation/devicetree/bindings/mmc/mmc-controller.yaml b/Documentation/devicetree/bindings/mmc/mmc-controller.yaml index b96da0c7f819..57319b425eaa 100644 --- a/Documentation/devicetree/bindings/mmc/mmc-controller.yaml +++ b/Documentation/devicetree/bindings/mmc/mmc-controller.yaml @@ -349,6 +349,8 @@ dependencies: cd-debounce-delay-ms: [ cd-gpios ] fixed-emmc-driver-type: [ non-removable ] +additionalProperties: true + examples: - | mmc@ab000000 { diff --git a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc-common.yaml b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc-common.yaml index 85bd528e9a14..8dfad89c78a7 100644 --- a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc-common.yaml +++ b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc-common.yaml @@ -62,3 +62,5 @@ properties: dma-names: const: rx-tx + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/mtd/nand-controller.yaml b/Documentation/devicetree/bindings/mtd/nand-controller.yaml index 40fc5b0b2b8c..274bbe6a365e 100644 --- a/Documentation/devicetree/bindings/mtd/nand-controller.yaml +++ b/Documentation/devicetree/bindings/mtd/nand-controller.yaml @@ -128,6 +128,8 @@ required: - "#address-cells" - "#size-cells" +additionalProperties: true + examples: - | nand-controller { diff --git a/Documentation/devicetree/bindings/net/can/can-transceiver.yaml b/Documentation/devicetree/bindings/net/can/can-transceiver.yaml index 6396977d29e5..d1ef1fe6ab29 100644 --- a/Documentation/devicetree/bindings/net/can/can-transceiver.yaml +++ b/Documentation/devicetree/bindings/net/can/can-transceiver.yaml @@ -16,3 +16,5 @@ properties: $ref: /schemas/types.yaml#/definitions/uint32 description: a positive non 0 value that determines the max speed that CAN/CAN-FD can run. minimum: 1 + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/net/dsa/dsa.yaml b/Documentation/devicetree/bindings/net/dsa/dsa.yaml index 6a1ec50ad4fd..a765ceba28c6 100644 --- a/Documentation/devicetree/bindings/net/dsa/dsa.yaml +++ b/Documentation/devicetree/bindings/net/dsa/dsa.yaml @@ -89,4 +89,6 @@ oneOf: - required: - ethernet-ports +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/net/ethernet-controller.yaml b/Documentation/devicetree/bindings/net/ethernet-controller.yaml index fa2baca8c726..3fd85ce37e9c 100644 --- a/Documentation/devicetree/bindings/net/ethernet-controller.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-controller.yaml @@ -205,4 +205,6 @@ properties: required: - speed +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/net/ethernet-phy.yaml b/Documentation/devicetree/bindings/net/ethernet-phy.yaml index a9e547ac7905..6dd72faebd89 100644 --- a/Documentation/devicetree/bindings/net/ethernet-phy.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-phy.yaml @@ -177,6 +177,8 @@ properties: required: - reg +additionalProperties: true + examples: - | ethernet { diff --git a/Documentation/devicetree/bindings/net/mdio.yaml b/Documentation/devicetree/bindings/net/mdio.yaml index 26afb556dfae..e811e0fd851c 100644 --- a/Documentation/devicetree/bindings/net/mdio.yaml +++ b/Documentation/devicetree/bindings/net/mdio.yaml @@ -100,6 +100,8 @@ patternProperties: required: - reg +additionalProperties: true + examples: - | davinci_mdio: mdio@5c030000 { diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml index 30a1efd26626..11a6fdb657c9 100644 --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -356,6 +356,8 @@ allOf: Enables the TSO feature otherwise it will be managed by MAC HW capability register. +additionalProperties: true + examples: - | stmmac_axi_setup: stmmac-axi-config { diff --git a/Documentation/devicetree/bindings/nvmem/nvmem-consumer.yaml b/Documentation/devicetree/bindings/nvmem/nvmem-consumer.yaml index b7c00ed31085..d5d7f113bade 100644 --- a/Documentation/devicetree/bindings/nvmem/nvmem-consumer.yaml +++ b/Documentation/devicetree/bindings/nvmem/nvmem-consumer.yaml @@ -36,6 +36,8 @@ dependencies: nvmem-names: [ nvmem ] nvmem-cell-names: [ nvmem-cells ] +additionalProperties: true + examples: - | tsens { diff --git a/Documentation/devicetree/bindings/nvmem/nvmem.yaml b/Documentation/devicetree/bindings/nvmem/nvmem.yaml index b459f9dba6c9..7481a9e48f19 100644 --- a/Documentation/devicetree/bindings/nvmem/nvmem.yaml +++ b/Documentation/devicetree/bindings/nvmem/nvmem.yaml @@ -67,6 +67,8 @@ patternProperties: required: - reg +additionalProperties: true + examples: - | #include diff --git a/Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml index 016a5f61592d..60b8baf299bb 100644 --- a/Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml @@ -22,3 +22,5 @@ properties: required: - cdns,max-outbound-regions + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml b/Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml index 303078a7b7a8..a944f9bfffff 100644 --- a/Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml +++ b/Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml @@ -33,3 +33,5 @@ properties: deprecated: true msi-parent: true + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/pci/cdns-pcie.yaml b/Documentation/devicetree/bindings/pci/cdns-pcie.yaml index 02553d5e6c51..df4fe28222b0 100644 --- a/Documentation/devicetree/bindings/pci/cdns-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/cdns-pcie.yaml @@ -21,3 +21,5 @@ properties: items: - const: pcie-phy # FIXME: names when more than 1 + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/pci/pci-ep.yaml b/Documentation/devicetree/bindings/pci/pci-ep.yaml index 0f8e575ac01a..7847bbcd4a03 100644 --- a/Documentation/devicetree/bindings/pci/pci-ep.yaml +++ b/Documentation/devicetree/bindings/pci/pci-ep.yaml @@ -36,3 +36,5 @@ properties: required: - compatible + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/pinctrl/cirrus,madera.yaml b/Documentation/devicetree/bindings/pinctrl/cirrus,madera.yaml index 6bfc25d0e1b3..4cb174bf31ff 100644 --- a/Documentation/devicetree/bindings/pinctrl/cirrus,madera.yaml +++ b/Documentation/devicetree/bindings/pinctrl/cirrus,madera.yaml @@ -120,3 +120,5 @@ properties: required: - pinctrl-0 - pinctrl-names + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml b/Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml index 13b7ab9dd6d5..71ed0a9def84 100644 --- a/Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml +++ b/Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml @@ -138,3 +138,5 @@ properties: and the delay before latching a value to an output pin. Typically indicates how many double-inverters are used to delay the signal. + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/pinctrl/pinmux-node.yaml b/Documentation/devicetree/bindings/pinctrl/pinmux-node.yaml index ef8877ddb1eb..551df3d9b809 100644 --- a/Documentation/devicetree/bindings/pinctrl/pinmux-node.yaml +++ b/Documentation/devicetree/bindings/pinctrl/pinmux-node.yaml @@ -129,3 +129,5 @@ properties: pinctrl-pin-array: $ref: /schemas/types.yaml#/definitions/uint32-array + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/power/power-domain.yaml b/Documentation/devicetree/bindings/power/power-domain.yaml index dd564349aa53..aed51e9dcb11 100644 --- a/Documentation/devicetree/bindings/power/power-domain.yaml +++ b/Documentation/devicetree/bindings/power/power-domain.yaml @@ -69,6 +69,8 @@ properties: required: - "#power-domain-cells" +additionalProperties: true + examples: - | power: power-controller@12340000 { diff --git a/Documentation/devicetree/bindings/power/supply/power-supply.yaml b/Documentation/devicetree/bindings/power/supply/power-supply.yaml index 3bb02bb3a2d8..c5c55f627251 100644 --- a/Documentation/devicetree/bindings/power/supply/power-supply.yaml +++ b/Documentation/devicetree/bindings/power/supply/power-supply.yaml @@ -16,6 +16,8 @@ properties: This property is added to a supply in order to list the devices which supply it power, referenced by their phandles. +additionalProperties: true + examples: - | power { diff --git a/Documentation/devicetree/bindings/pwm/pwm.yaml b/Documentation/devicetree/bindings/pwm/pwm.yaml index fa4f9de92090..7d1f687cee9c 100644 --- a/Documentation/devicetree/bindings/pwm/pwm.yaml +++ b/Documentation/devicetree/bindings/pwm/pwm.yaml @@ -20,6 +20,8 @@ properties: required: - "#pwm-cells" +additionalProperties: true + examples: - | pwm: pwm@7000a000 { diff --git a/Documentation/devicetree/bindings/regulator/regulator.yaml b/Documentation/devicetree/bindings/regulator/regulator.yaml index ec505dbbf87c..6d0bc9cd4040 100644 --- a/Documentation/devicetree/bindings/regulator/regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/regulator.yaml @@ -188,6 +188,8 @@ patternProperties: additionalProperties: false +additionalProperties: true + examples: - | xyzreg: regulator { diff --git a/Documentation/devicetree/bindings/regulator/wlf,arizona.yaml b/Documentation/devicetree/bindings/regulator/wlf,arizona.yaml index a0aea73bf412..7b4ae5d23351 100644 --- a/Documentation/devicetree/bindings/regulator/wlf,arizona.yaml +++ b/Documentation/devicetree/bindings/regulator/wlf,arizona.yaml @@ -35,3 +35,5 @@ properties: Initial data for the MICVDD regulator. $ref: "regulator.yaml#" type: object + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml index f80ba2c66f71..c6925e0b16e4 100644 --- a/Documentation/devicetree/bindings/riscv/cpus.yaml +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml @@ -91,6 +91,8 @@ required: - riscv,isa - interrupt-controller +additionalProperties: true + examples: - | // Example 1: SiFive Freedom U540G Development Kit diff --git a/Documentation/devicetree/bindings/rtc/rtc.yaml b/Documentation/devicetree/bindings/rtc/rtc.yaml index ee237b2ed66a..2d055e37e6f7 100644 --- a/Documentation/devicetree/bindings/rtc/rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/rtc.yaml @@ -47,4 +47,6 @@ properties: description: Enables wake up of host system on alarm. +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/serial/rs485.yaml b/Documentation/devicetree/bindings/serial/rs485.yaml index fe90569475e1..0c9fa694f85c 100644 --- a/Documentation/devicetree/bindings/serial/rs485.yaml +++ b/Documentation/devicetree/bindings/serial/rs485.yaml @@ -45,4 +45,7 @@ properties: rs485-term-gpios: description: GPIO pin to enable RS485 bus termination. maxItems: 1 + +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/serial/serial.yaml b/Documentation/devicetree/bindings/serial/serial.yaml index 8645d0e526b4..65e75d040521 100644 --- a/Documentation/devicetree/bindings/serial/serial.yaml +++ b/Documentation/devicetree/bindings/serial/serial.yaml @@ -124,6 +124,8 @@ patternProperties: required: - compatible +additionalProperties: true + examples: - | serial@1234 { diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,aips-bus.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,aips-bus.yaml index 3cbf2d28a188..80d99861fec5 100644 --- a/Documentation/devicetree/bindings/soc/imx/fsl,aips-bus.yaml +++ b/Documentation/devicetree/bindings/soc/imx/fsl,aips-bus.yaml @@ -35,6 +35,8 @@ required: - compatible - reg +additionalProperties: true + examples: - | bus@30000000 { diff --git a/Documentation/devicetree/bindings/sound/amlogic,aiu.yaml b/Documentation/devicetree/bindings/sound/amlogic,aiu.yaml index 7a7f28469624..f50558ed914f 100644 --- a/Documentation/devicetree/bindings/sound/amlogic,aiu.yaml +++ b/Documentation/devicetree/bindings/sound/amlogic,aiu.yaml @@ -75,6 +75,8 @@ required: - reg - resets +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/sound/cirrus,madera.yaml b/Documentation/devicetree/bindings/sound/cirrus,madera.yaml index c4cd58b5acd4..23138ddcb62d 100644 --- a/Documentation/devicetree/bindings/sound/cirrus,madera.yaml +++ b/Documentation/devicetree/bindings/sound/cirrus,madera.yaml @@ -111,3 +111,5 @@ properties: $ref: /schemas/types.yaml#/definitions/uint32-array minItems: 2 maxItems: 2 + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-ahub.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-ahub.yaml index 44ee9d844ae0..d77219727768 100644 --- a/Documentation/devicetree/bindings/sound/nvidia,tegra210-ahub.yaml +++ b/Documentation/devicetree/bindings/sound/nvidia,tegra210-ahub.yaml @@ -67,6 +67,9 @@ required: - "#size-cells" - ranges +additionalProperties: + type: object + examples: - | #include diff --git a/Documentation/devicetree/bindings/sound/wlf,arizona.yaml b/Documentation/devicetree/bindings/sound/wlf,arizona.yaml index 22d54be7900a..1627c0bb69be 100644 --- a/Documentation/devicetree/bindings/sound/wlf,arizona.yaml +++ b/Documentation/devicetree/bindings/sound/wlf,arizona.yaml @@ -112,3 +112,5 @@ properties: $ref: /schemas/types.yaml#/definitions/uint32-array minItems: 1 maxItems: 12 + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/soundwire/soundwire-controller.yaml b/Documentation/devicetree/bindings/soundwire/soundwire-controller.yaml index 330924b8618e..4aad121eff3f 100644 --- a/Documentation/devicetree/bindings/soundwire/soundwire-controller.yaml +++ b/Documentation/devicetree/bindings/soundwire/soundwire-controller.yaml @@ -57,6 +57,8 @@ required: - "#address-cells" - "#size-cells" +additionalProperties: true + examples: - | soundwire@c2d0000 { diff --git a/Documentation/devicetree/bindings/spi/spi-controller.yaml b/Documentation/devicetree/bindings/spi/spi-controller.yaml index c6a2f543648b..2b154803b181 100644 --- a/Documentation/devicetree/bindings/spi/spi-controller.yaml +++ b/Documentation/devicetree/bindings/spi/spi-controller.yaml @@ -140,6 +140,8 @@ patternProperties: - compatible - reg +additionalProperties: true + examples: - | spi@f00 { diff --git a/Documentation/devicetree/bindings/spmi/spmi.yaml b/Documentation/devicetree/bindings/spmi/spmi.yaml index 0cfbf56ba825..173940930719 100644 --- a/Documentation/devicetree/bindings/spmi/spmi.yaml +++ b/Documentation/devicetree/bindings/spmi/spmi.yaml @@ -55,6 +55,8 @@ patternProperties: required: - reg +additionalProperties: true + examples: - | #include diff --git a/Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml b/Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml index ad4beaf02842..f004779ba9b3 100644 --- a/Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml +++ b/Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml @@ -49,6 +49,8 @@ properties: and the second cell is the maximum cooling state requested. const: 2 +additionalProperties: true + examples: - | #include diff --git a/Documentation/devicetree/bindings/thermal/thermal-sensor.yaml b/Documentation/devicetree/bindings/thermal/thermal-sensor.yaml index 727d04550324..9f747921e851 100644 --- a/Documentation/devicetree/bindings/thermal/thermal-sensor.yaml +++ b/Documentation/devicetree/bindings/thermal/thermal-sensor.yaml @@ -36,6 +36,8 @@ properties: containing several internal sensors. enum: [0, 1] +additionalProperties: true + examples: - | #include diff --git a/Documentation/devicetree/bindings/usb/ti,tps6598x.yaml b/Documentation/devicetree/bindings/usb/ti,tps6598x.yaml index 8eaf4b6c4735..f6819bf2a3b5 100644 --- a/Documentation/devicetree/bindings/usb/ti,tps6598x.yaml +++ b/Documentation/devicetree/bindings/usb/ti,tps6598x.yaml @@ -32,6 +32,8 @@ required: - interrupts - interrupt-names +additionalProperties: true + examples: - | #include diff --git a/Documentation/devicetree/bindings/usb/usb-hcd.yaml b/Documentation/devicetree/bindings/usb/usb-hcd.yaml index 7263b7f2b510..b545b087b342 100644 --- a/Documentation/devicetree/bindings/usb/usb-hcd.yaml +++ b/Documentation/devicetree/bindings/usb/usb-hcd.yaml @@ -22,6 +22,8 @@ properties: description: Name specifier for the USB PHY +additionalProperties: true + examples: - | usb { diff --git a/Documentation/devicetree/bindings/watchdog/watchdog.yaml b/Documentation/devicetree/bindings/watchdog/watchdog.yaml index 187bf6cb62bf..4e2c26cd981d 100644 --- a/Documentation/devicetree/bindings/watchdog/watchdog.yaml +++ b/Documentation/devicetree/bindings/watchdog/watchdog.yaml @@ -23,4 +23,6 @@ properties: description: Contains the watchdog timeout in seconds. +additionalProperties: true + ... From ab6ccab6df2488bf168fdca6c5455d16e55ef007 Mon Sep 17 00:00:00 2001 From: Naoki Hayama Date: Thu, 8 Oct 2020 17:47:35 +0900 Subject: [PATCH 421/433] dt-bindings: pinctrl: qcom: Fix typo abitrary Fix comment typo. s/abitrary/arbitrary/ Signed-off-by: Naoki Hayama Link: https://lore.kernel.org/r/7d1856e2-84c7-ab19-863d-2d500569d58c@lineo.co.jp Signed-off-by: Rob Herring --- .../devicetree/bindings/pinctrl/qcom,ipq4019-pinctrl.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,ipq4019-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/qcom,ipq4019-pinctrl.txt index 0861afeccfc9..97858a7c07a2 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,ipq4019-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/qcom,ipq4019-pinctrl.txt @@ -26,7 +26,7 @@ Please refer to pinctrl-bindings.txt in this directory for details of the common pinctrl bindings used by client devices, including the meaning of the phrase "pin configuration node". -The pin configuration nodes act as a container for an abitrary number of +The pin configuration nodes act as a container for an arbitrary number of subnodes. Each of these subnodes represents some desired configuration for a pin, a group, or a list of pins or groups. This configuration can include the mux function to select on those pin(s)/group(s), and various pin configuration From ec9e656854f3916fc363bb3feb9e92372fbe0b0c Mon Sep 17 00:00:00 2001 From: Naoki Hayama Date: Thu, 8 Oct 2020 17:47:42 +0900 Subject: [PATCH 422/433] dt-bindings: pinctrl: sirf: Fix typo abitrary Fix comment typo. s/abitrary/arbitrary/ Signed-off-by: Naoki Hayama Link: https://lore.kernel.org/r/614fe604-ab8e-21cb-0c3a-db6ddeff2a4e@lineo.co.jp Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/pinctrl/pinctrl-atlas7.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-atlas7.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-atlas7.txt index bf9b07016c87..fbdd1a716a1e 100644 --- a/Documentation/devicetree/bindings/pinctrl/pinctrl-atlas7.txt +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-atlas7.txt @@ -60,7 +60,7 @@ For example, pinctrl might have properties like the following: Please refer to pinctrl-bindings.txt in this directory for details of the common pinctrl bindings used by client devices. -SiRFatlas7's pinmux nodes act as a container for an abitrary number of subnodes. +SiRFatlas7's pinmux nodes act as a container for an arbitrary number of subnodes. Each of these subnodes represents some desired configuration for a group of pins. Required subnode-properties: From 16b0b2baaf83f0fed8fa561d40a1bd3cefae454a Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Thu, 8 Oct 2020 09:24:19 -0500 Subject: [PATCH 423/433] dt-bindings: powerpc: Add a schema for the 'sleep' property Document the PowerPC specific 'sleep' property as a schema. It is currently only documented in booting-without-of.rst which is getting removed. Cc: Michael Ellerman Cc: Benjamin Herrenschmidt Cc: Paul Mackerras Signed-off-by: Rob Herring Link: https://lore.kernel.org/r/20201008142420.2083861-1-robh@kernel.org Signed-off-by: Rob Herring --- .../devicetree/bindings/powerpc/sleep.yaml | 47 +++++++++++++++++++ 1 file changed, 47 insertions(+) create mode 100644 Documentation/devicetree/bindings/powerpc/sleep.yaml diff --git a/Documentation/devicetree/bindings/powerpc/sleep.yaml b/Documentation/devicetree/bindings/powerpc/sleep.yaml new file mode 100644 index 000000000000..6494c7d08b93 --- /dev/null +++ b/Documentation/devicetree/bindings/powerpc/sleep.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/powerpc/sleep.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: PowerPC sleep property + +maintainers: + - Rob Herring + +description: | + Devices on SOCs often have mechanisms for placing devices into low-power + states that are decoupled from the devices' own register blocks. Sometimes, + this information is more complicated than a cell-index property can + reasonably describe. Thus, each device controlled in such a manner + may contain a "sleep" property which describes these connections. + + The sleep property consists of one or more sleep resources, each of + which consists of a phandle to a sleep controller, followed by a + controller-specific sleep specifier of zero or more cells. + + The semantics of what type of low power modes are possible are defined + by the sleep controller. Some examples of the types of low power modes + that may be supported are: + + - Dynamic: The device may be disabled or enabled at any time. + - System Suspend: The device may request to be disabled or remain + awake during system suspend, but will not be disabled until then. + - Permanent: The device is disabled permanently (until the next hard + reset). + + Some devices may share a clock domain with each other, such that they should + only be suspended when none of the devices are in use. Where reasonable, + such nodes should be placed on a virtual bus, where the bus has the sleep + property. If the clock domain is shared among devices that cannot be + reasonably grouped in this manner, then create a virtual sleep controller + (similar to an interrupt nexus, except that defining a standardized + sleep-map should wait until its necessity is demonstrated). + +select: true + +properties: + sleep: + $ref: /schemas/types.yaml#definitions/phandle-array + +additionalProperties: true From 44ec8b20d1e9ceabe49bc6af059220e099bbee20 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Fri, 9 Oct 2020 12:05:57 -0500 Subject: [PATCH 424/433] dt-bindings: Add running yamllint to dt_binding_check Add a yamllint config file and support for running yamllint on DT binding schema files. This runs on the whole tree as yamllint is Python and suffers from Python's slow startup times. Users can run on individual files doing: yamllint -c Documentation/devicetree/bindings/.yamllint Link: https://lore.kernel.org/r/20201009170557.168785-1-robh@kernel.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/.yamllint | 39 +++++++++++++++++++++ Documentation/devicetree/bindings/Makefile | 9 ++++- 2 files changed, 47 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/.yamllint diff --git a/Documentation/devicetree/bindings/.yamllint b/Documentation/devicetree/bindings/.yamllint new file mode 100644 index 000000000000..214abd3ec440 --- /dev/null +++ b/Documentation/devicetree/bindings/.yamllint @@ -0,0 +1,39 @@ +extends: relaxed + +rules: + line-length: + # 80 chars should be enough, but don't fail if a line is longer + max: 110 + allow-non-breakable-words: true + level: warning + braces: + min-spaces-inside: 0 + max-spaces-inside: 1 + min-spaces-inside-empty: 0 + max-spaces-inside-empty: 0 + brackets: + min-spaces-inside: 0 + max-spaces-inside: 1 + min-spaces-inside-empty: 0 + max-spaces-inside-empty: 0 + colons: {max-spaces-before: 0, max-spaces-after: 1} + commas: {min-spaces-after: 1, max-spaces-after: 1} + comments: + require-starting-space: false + min-spaces-from-content: 1 + comments-indentation: disable + document-start: + present: true + empty-lines: + max: 3 + max-end: 1 + empty-values: + forbid-in-block-mappings: true + forbid-in-flow-mappings: true + hyphens: + max-spaces-after: 1 + indentation: + spaces: 2 + indent-sequences: true + check-multi-line-strings: false + trailing-spaces: false diff --git a/Documentation/devicetree/bindings/Makefile b/Documentation/devicetree/bindings/Makefile index ec8073cb2e71..f50420099a55 100644 --- a/Documentation/devicetree/bindings/Makefile +++ b/Documentation/devicetree/bindings/Makefile @@ -3,6 +3,8 @@ DT_DOC_CHECKER ?= dt-doc-validate DT_EXTRACT_EX ?= dt-extract-example DT_MK_SCHEMA ?= dt-mk-schema +DT_SCHEMA_LINT = $(shell which yamllint) + DT_SCHEMA_MIN_VERSION = 2020.8.1 PHONY += check_dtschema_version @@ -24,6 +26,10 @@ find_cmd = find $(srctree)/$(src) \( -name '*.yaml' ! \ -name 'processed-schema*' ! \ -name '*.example.dt.yaml' \) +quiet_cmd_yamllint = LINT $(src) + cmd_yamllint = $(find_cmd) | \ + xargs $(DT_SCHEMA_LINT) -f parsable -c $(srctree)/$(src)/.yamllint + quiet_cmd_chk_bindings = CHKDT $@ cmd_chk_bindings = $(find_cmd) | \ xargs -n200 -P$$(nproc) $(DT_DOC_CHECKER) -u $(srctree)/$(src) @@ -37,6 +43,7 @@ quiet_cmd_mk_schema = SCHEMA $@ rm -f $$f define rule_chkdt + $(if $(DT_SCHEMA_LINT),$(call cmd,yamllint),) $(call cmd,chk_bindings) $(call cmd,mk_schema) endef @@ -48,7 +55,7 @@ override DTC_FLAGS := \ -Wno-graph_child_address \ -Wno-interrupt_provider -$(obj)/processed-schema-examples.json: $(DT_DOCS) check_dtschema_version FORCE +$(obj)/processed-schema-examples.json: $(DT_DOCS) $(src)/.yamllint check_dtschema_version FORCE $(call if_changed_rule,chkdt) ifeq ($(DT_SCHEMA_FILES),) From 6e9c9686d826564f44c93cdd6f111b1c0a9dc224 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Mon, 12 Oct 2020 09:58:15 -0500 Subject: [PATCH 425/433] scripts/dtc: Update to upstream version v1.6.0-31-gcbca977ea121 This adds the following commits from upstream: cbca977ea121 checks: Allow PCI bridge child nodes without an address 73e0f143b73d libfdt: fdt_strerror(): Fix comparison warning 6c2be7d85315 libfdt: fdt_get_string(): Fix sequential write comparison warnings 82525f41d59e libfdt: libfdt_wip: Fix comparison warning fb1f65f15832 libfdt: fdt_create_with_flags(): Fix comparison warning f28aa271000b libfdt: fdt_move(): Fix comparison warnings 3d7c6f44195a libfdt: fdt_add_string_(): Fix comparison warning 10f682788c30 libfdt: fdt_node_offset_by_phandle(): Fix comparison warning 07158f4cf2a2 libfdt: overlay: Fix comparison warning ce9e1f25a7de libfdt: fdt_resize(): Fix comparison warning faa76fc10bc5 libfdt: fdt_splice_(): Fix comparison warning 54dca0985316 libfdt: fdt_get_string(): Fix comparison warnings f8e11e61624e libfdt: fdt_grab_space_(): Fix comparison warning 0c43d4d7bf5a libfdt: fdt_mem_rsv(): Fix comparison warnings 442ea3dd1579 libfdt: fdt_offset_ptr(): Fix comparison warnings ca19c3db2bf6 Makefile: Specify cflags for libyaml 7bb86f1c0956 libfdt: fix fdt_check_node_offset_ w/ VALID_INPUT 3d522abc7571 dtc: Include stdlib.h in util.h 808cdaaf524f dtc: Avoid UB when shifting 3e3138b4a956 libfdt: fix fdt_check_full buffer overrun Signed-off-by: Rob Herring --- scripts/dtc/checks.c | 4 +--- scripts/dtc/dtc-parser.y | 4 ++-- scripts/dtc/libfdt/fdt.c | 31 +++++++++++++++++++++---------- scripts/dtc/libfdt/fdt_overlay.c | 3 ++- scripts/dtc/libfdt/fdt_ro.c | 20 +++++++++++--------- scripts/dtc/libfdt/fdt_rw.c | 2 +- scripts/dtc/libfdt/fdt_strerror.c | 4 ++-- scripts/dtc/libfdt/fdt_sw.c | 27 +++++++++++++++------------ scripts/dtc/libfdt/fdt_wip.c | 2 +- scripts/dtc/util.h | 1 + scripts/dtc/version_gen.h | 2 +- 11 files changed, 58 insertions(+), 42 deletions(-) diff --git a/scripts/dtc/checks.c b/scripts/dtc/checks.c index b7955dbd71ca..17cb6890d45a 100644 --- a/scripts/dtc/checks.c +++ b/scripts/dtc/checks.c @@ -891,10 +891,8 @@ static void check_pci_device_reg(struct check *c, struct dt_info *dti, struct no return; prop = get_property(node, "reg"); - if (!prop) { - FAIL(c, dti, node, "missing PCI reg property"); + if (!prop) return; - } cells = (cell_t *)prop->val.val; if (cells[1] || cells[2]) diff --git a/scripts/dtc/dtc-parser.y b/scripts/dtc/dtc-parser.y index 40dcf4f149da..a0316a3cc309 100644 --- a/scripts/dtc/dtc-parser.y +++ b/scripts/dtc/dtc-parser.y @@ -476,8 +476,8 @@ integer_rela: ; integer_shift: - integer_shift DT_LSHIFT integer_add { $$ = $1 << $3; } - | integer_shift DT_RSHIFT integer_add { $$ = $1 >> $3; } + integer_shift DT_LSHIFT integer_add { $$ = ($3 < 64) ? ($1 << $3) : 0; } + | integer_shift DT_RSHIFT integer_add { $$ = ($3 < 64) ? ($1 >> $3) : 0; } | integer_add ; diff --git a/scripts/dtc/libfdt/fdt.c b/scripts/dtc/libfdt/fdt.c index c28fcc115771..6cf2fa03b037 100644 --- a/scripts/dtc/libfdt/fdt.c +++ b/scripts/dtc/libfdt/fdt.c @@ -134,16 +134,20 @@ int fdt_check_header(const void *fdt) const void *fdt_offset_ptr(const void *fdt, int offset, unsigned int len) { - unsigned absoffset = offset + fdt_off_dt_struct(fdt); + unsigned int uoffset = offset; + unsigned int absoffset = offset + fdt_off_dt_struct(fdt); + + if (offset < 0) + return NULL; if (!can_assume(VALID_INPUT)) - if ((absoffset < offset) + if ((absoffset < uoffset) || ((absoffset + len) < absoffset) || (absoffset + len) > fdt_totalsize(fdt)) return NULL; if (can_assume(LATEST) || fdt_version(fdt) >= 0x11) - if (((offset + len) < offset) + if (((uoffset + len) < uoffset) || ((offset + len) > fdt_size_dt_struct(fdt))) return NULL; @@ -206,10 +210,11 @@ uint32_t fdt_next_tag(const void *fdt, int startoffset, int *nextoffset) int fdt_check_node_offset_(const void *fdt, int offset) { - if (can_assume(VALID_INPUT)) - return offset; - if ((offset < 0) || (offset % FDT_TAGSIZE) - || (fdt_next_tag(fdt, offset, &offset) != FDT_BEGIN_NODE)) + if (!can_assume(VALID_INPUT) + && ((offset < 0) || (offset % FDT_TAGSIZE))) + return -FDT_ERR_BADOFFSET; + + if (fdt_next_tag(fdt, offset, &offset) != FDT_BEGIN_NODE) return -FDT_ERR_BADOFFSET; return offset; @@ -217,8 +222,11 @@ int fdt_check_node_offset_(const void *fdt, int offset) int fdt_check_prop_offset_(const void *fdt, int offset) { - if ((offset < 0) || (offset % FDT_TAGSIZE) - || (fdt_next_tag(fdt, offset, &offset) != FDT_PROP)) + if (!can_assume(VALID_INPUT) + && ((offset < 0) || (offset % FDT_TAGSIZE))) + return -FDT_ERR_BADOFFSET; + + if (fdt_next_tag(fdt, offset, &offset) != FDT_PROP) return -FDT_ERR_BADOFFSET; return offset; @@ -306,9 +314,12 @@ const char *fdt_find_string_(const char *strtab, int tabsize, const char *s) int fdt_move(const void *fdt, void *buf, int bufsize) { + if (!can_assume(VALID_INPUT) && bufsize < 0) + return -FDT_ERR_NOSPACE; + FDT_RO_PROBE(fdt); - if (fdt_totalsize(fdt) > bufsize) + if (fdt_totalsize(fdt) > (unsigned int)bufsize) return -FDT_ERR_NOSPACE; memmove(buf, fdt, fdt_totalsize(fdt)); diff --git a/scripts/dtc/libfdt/fdt_overlay.c b/scripts/dtc/libfdt/fdt_overlay.c index b310e49a698e..d217e79b6722 100644 --- a/scripts/dtc/libfdt/fdt_overlay.c +++ b/scripts/dtc/libfdt/fdt_overlay.c @@ -241,6 +241,7 @@ static int overlay_update_local_node_references(void *fdto, if (fixup_len % sizeof(uint32_t)) return -FDT_ERR_BADOVERLAY; + fixup_len /= sizeof(uint32_t); tree_val = fdt_getprop(fdto, tree_node, name, &tree_len); if (!tree_val) { @@ -250,7 +251,7 @@ static int overlay_update_local_node_references(void *fdto, return tree_len; } - for (i = 0; i < (fixup_len / sizeof(uint32_t)); i++) { + for (i = 0; i < fixup_len; i++) { fdt32_t adj_val; uint32_t poffset; diff --git a/scripts/dtc/libfdt/fdt_ro.c b/scripts/dtc/libfdt/fdt_ro.c index e03570a56eb5..91cc6fefe374 100644 --- a/scripts/dtc/libfdt/fdt_ro.c +++ b/scripts/dtc/libfdt/fdt_ro.c @@ -53,7 +53,7 @@ const char *fdt_get_string(const void *fdt, int stroffset, int *lenp) err = -FDT_ERR_BADOFFSET; absoffset = stroffset + fdt_off_dt_strings(fdt); - if (absoffset >= totalsize) + if (absoffset >= (unsigned)totalsize) goto fail; len = totalsize - absoffset; @@ -61,17 +61,19 @@ const char *fdt_get_string(const void *fdt, int stroffset, int *lenp) if (stroffset < 0) goto fail; if (can_assume(LATEST) || fdt_version(fdt) >= 17) { - if (stroffset >= fdt_size_dt_strings(fdt)) + if ((unsigned)stroffset >= fdt_size_dt_strings(fdt)) goto fail; if ((fdt_size_dt_strings(fdt) - stroffset) < len) len = fdt_size_dt_strings(fdt) - stroffset; } } else if (fdt_magic(fdt) == FDT_SW_MAGIC) { - if ((stroffset >= 0) - || (stroffset < -fdt_size_dt_strings(fdt))) + unsigned int sw_stroffset = -stroffset; + + if ((stroffset >= 0) || + (sw_stroffset > fdt_size_dt_strings(fdt))) goto fail; - if ((-stroffset) < len) - len = -stroffset; + if (sw_stroffset < len) + len = sw_stroffset; } else { err = -FDT_ERR_INTERNAL; goto fail; @@ -157,8 +159,8 @@ int fdt_generate_phandle(const void *fdt, uint32_t *phandle) static const struct fdt_reserve_entry *fdt_mem_rsv(const void *fdt, int n) { - int offset = n * sizeof(struct fdt_reserve_entry); - int absoffset = fdt_off_mem_rsvmap(fdt) + offset; + unsigned int offset = n * sizeof(struct fdt_reserve_entry); + unsigned int absoffset = fdt_off_mem_rsvmap(fdt) + offset; if (!can_assume(VALID_INPUT)) { if (absoffset < fdt_off_mem_rsvmap(fdt)) @@ -680,7 +682,7 @@ int fdt_node_offset_by_phandle(const void *fdt, uint32_t phandle) { int offset; - if ((phandle == 0) || (phandle == -1)) + if ((phandle == 0) || (phandle == ~0U)) return -FDT_ERR_BADPHANDLE; FDT_RO_PROBE(fdt); diff --git a/scripts/dtc/libfdt/fdt_rw.c b/scripts/dtc/libfdt/fdt_rw.c index 93e4a2b56348..68887b969a45 100644 --- a/scripts/dtc/libfdt/fdt_rw.c +++ b/scripts/dtc/libfdt/fdt_rw.c @@ -59,7 +59,7 @@ static int fdt_splice_(void *fdt, void *splicepoint, int oldlen, int newlen) if ((oldlen < 0) || (soff + oldlen < soff) || (soff + oldlen > dsize)) return -FDT_ERR_BADOFFSET; - if ((p < (char *)fdt) || (dsize + newlen < oldlen)) + if ((p < (char *)fdt) || (dsize + newlen < (unsigned)oldlen)) return -FDT_ERR_BADOFFSET; if (dsize - oldlen + newlen > fdt_totalsize(fdt)) return -FDT_ERR_NOSPACE; diff --git a/scripts/dtc/libfdt/fdt_strerror.c b/scripts/dtc/libfdt/fdt_strerror.c index 768db66eada5..b4356931b06d 100644 --- a/scripts/dtc/libfdt/fdt_strerror.c +++ b/scripts/dtc/libfdt/fdt_strerror.c @@ -40,7 +40,7 @@ static struct fdt_errtabent fdt_errtable[] = { FDT_ERRTABENT(FDT_ERR_NOPHANDLES), FDT_ERRTABENT(FDT_ERR_BADFLAGS), }; -#define FDT_ERRTABSIZE (sizeof(fdt_errtable) / sizeof(fdt_errtable[0])) +#define FDT_ERRTABSIZE ((int)(sizeof(fdt_errtable) / sizeof(fdt_errtable[0]))) const char *fdt_strerror(int errval) { @@ -48,7 +48,7 @@ const char *fdt_strerror(int errval) return ""; else if (errval == 0) return ""; - else if (errval > -FDT_ERRTABSIZE) { + else if (-errval < FDT_ERRTABSIZE) { const char *s = fdt_errtable[-errval].str; if (s) diff --git a/scripts/dtc/libfdt/fdt_sw.c b/scripts/dtc/libfdt/fdt_sw.c index 94ce4bb91a00..68b543c4dfa2 100644 --- a/scripts/dtc/libfdt/fdt_sw.c +++ b/scripts/dtc/libfdt/fdt_sw.c @@ -93,8 +93,8 @@ static inline uint32_t sw_flags(void *fdt) static void *fdt_grab_space_(void *fdt, size_t len) { - int offset = fdt_size_dt_struct(fdt); - int spaceleft; + unsigned int offset = fdt_size_dt_struct(fdt); + unsigned int spaceleft; spaceleft = fdt_totalsize(fdt) - fdt_off_dt_struct(fdt) - fdt_size_dt_strings(fdt); @@ -108,8 +108,8 @@ static void *fdt_grab_space_(void *fdt, size_t len) int fdt_create_with_flags(void *buf, int bufsize, uint32_t flags) { - const size_t hdrsize = FDT_ALIGN(sizeof(struct fdt_header), - sizeof(struct fdt_reserve_entry)); + const int hdrsize = FDT_ALIGN(sizeof(struct fdt_header), + sizeof(struct fdt_reserve_entry)); void *fdt = buf; if (bufsize < hdrsize) @@ -152,6 +152,9 @@ int fdt_resize(void *fdt, void *buf, int bufsize) FDT_SW_PROBE(fdt); + if (bufsize < 0) + return -FDT_ERR_NOSPACE; + headsize = fdt_off_dt_struct(fdt) + fdt_size_dt_struct(fdt); tailsize = fdt_size_dt_strings(fdt); @@ -159,7 +162,7 @@ int fdt_resize(void *fdt, void *buf, int bufsize) headsize + tailsize > fdt_totalsize(fdt)) return -FDT_ERR_INTERNAL; - if ((headsize + tailsize) > bufsize) + if ((headsize + tailsize) > (unsigned)bufsize) return -FDT_ERR_NOSPACE; oldtail = (char *)fdt + fdt_totalsize(fdt) - tailsize; @@ -247,18 +250,18 @@ int fdt_end_node(void *fdt) static int fdt_add_string_(void *fdt, const char *s) { char *strtab = (char *)fdt + fdt_totalsize(fdt); - int strtabsize = fdt_size_dt_strings(fdt); - int len = strlen(s) + 1; - int struct_top, offset; + unsigned int strtabsize = fdt_size_dt_strings(fdt); + unsigned int len = strlen(s) + 1; + unsigned int struct_top, offset; - offset = -strtabsize - len; + offset = strtabsize + len; struct_top = fdt_off_dt_struct(fdt) + fdt_size_dt_struct(fdt); - if (fdt_totalsize(fdt) + offset < struct_top) + if (fdt_totalsize(fdt) - offset < struct_top) return 0; /* no more room :( */ - memcpy(strtab + offset, s, len); + memcpy(strtab - offset, s, len); fdt_set_size_dt_strings(fdt, strtabsize + len); - return offset; + return -offset; } /* Must only be used to roll back in case of error */ diff --git a/scripts/dtc/libfdt/fdt_wip.c b/scripts/dtc/libfdt/fdt_wip.c index f64139e0b3dc..c2d7566a67dc 100644 --- a/scripts/dtc/libfdt/fdt_wip.c +++ b/scripts/dtc/libfdt/fdt_wip.c @@ -23,7 +23,7 @@ int fdt_setprop_inplace_namelen_partial(void *fdt, int nodeoffset, if (!propval) return proplen; - if (proplen < (len + idx)) + if ((unsigned)proplen < (len + idx)) return -FDT_ERR_NOSPACE; memcpy((char *)propval + idx, val, len); diff --git a/scripts/dtc/util.h b/scripts/dtc/util.h index 5a4172dd0f84..a771b4654c76 100644 --- a/scripts/dtc/util.h +++ b/scripts/dtc/util.h @@ -2,6 +2,7 @@ #ifndef UTIL_H #define UTIL_H +#include #include #include #include diff --git a/scripts/dtc/version_gen.h b/scripts/dtc/version_gen.h index 0714799446f8..054cdd0fdbe8 100644 --- a/scripts/dtc/version_gen.h +++ b/scripts/dtc/version_gen.h @@ -1 +1 @@ -#define DTC_VERSION "DTC 1.6.0-g9d7888cb" +#define DTC_VERSION "DTC 1.6.0-gcbca977e" From a5917fa876946f54566a59ab59a746efc8d50226 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 25 Sep 2020 23:26:09 +0200 Subject: [PATCH 426/433] dt-bindings: pwm: imx: document i.MX compatibles Document all ARMv5, ARMv6 and ARMv7 i.MX compatibles to fix dtbs_check warnings like: arch/arm/boot/dts/imx6dl-colibri-eval-v3.dt.yaml: pwm@2080000: compatible:0: 'fsl,imx6q-pwm' is not one of ['fsl,imx8mm-pwm', 'fsl,imx8mn-pwm', 'fsl,imx8mp-pwm', 'fsl,imx8mq-pwm'] Acked-by: Thierry Reding Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20200925212609.23093-1-krzk@kernel.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/pwm/imx-pwm.yaml | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/Documentation/devicetree/bindings/pwm/imx-pwm.yaml b/Documentation/devicetree/bindings/pwm/imx-pwm.yaml index 473863eb67e5..379d693889f6 100644 --- a/Documentation/devicetree/bindings/pwm/imx-pwm.yaml +++ b/Documentation/devicetree/bindings/pwm/imx-pwm.yaml @@ -25,6 +25,17 @@ properties: - fsl,imx27-pwm - items: - enum: + - fsl,imx25-pwm + - fsl,imx31-pwm + - fsl,imx50-pwm + - fsl,imx51-pwm + - fsl,imx53-pwm + - fsl,imx6q-pwm + - fsl,imx6sl-pwm + - fsl,imx6sll-pwm + - fsl,imx6sx-pwm + - fsl,imx6ul-pwm + - fsl,imx7d-pwm - fsl,imx8mm-pwm - fsl,imx8mn-pwm - fsl,imx8mp-pwm From 879baf11777cdfa5a04c266c7a987907887c7443 Mon Sep 17 00:00:00 2001 From: Zhen Lei Date: Mon, 12 Oct 2020 14:12:24 +0800 Subject: [PATCH 427/433] dt-bindings: arm: hisilicon: add missing properties into sysctrl.yaml Add properties: #reset-cells, #address-cells, #size-cells and ranges. Due to the Hisilicon system controller node may contains child nodes, change the value of "additionalProperties" from "false" to "type: object". The examples have also been updated. Signed-off-by: Zhen Lei Link: https://lore.kernel.org/r/20201012061225.1597-10-thunder.leizhen@huawei.com Signed-off-by: Rob Herring --- .../arm/hisilicon/controller/sysctrl.yaml | 28 +++++++++++++++++-- 1 file changed, 25 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml index 449140f89ddb..5a53d433b6f0 100644 --- a/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml @@ -71,21 +71,43 @@ properties: '#clock-cells': const: 1 + '#reset-cells': + const: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 1 + + ranges: true + required: - compatible - reg -additionalProperties: false +additionalProperties: + type: object examples: - | /* Hisilicon system controller */ - system-controller@fc802000 { + system-controller@802000 { compatible = "hisilicon,sysctrl", "syscon"; - reg = <0xfc802000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x802000 0x1000>; + reg = <0x802000 0x1000>; + smp-offset = <0x31c>; resume-offset = <0x308>; reboot-offset = <0x4>; + + clock: clock@0 { + compatible = "hisilicon,hi3620-clock"; + reg = <0 0x10000>; + #clock-cells = <1>; + }; }; /* HiP01 system controller */ From 0450d1f9a295646af84455e4e5b745d151ff81e1 Mon Sep 17 00:00:00 2001 From: Zhen Lei Date: Mon, 12 Oct 2020 14:12:25 +0800 Subject: [PATCH 428/433] dt-bindings: arm: hisilicon: add missing properties into cpuctrl.yaml Add properties: #address-cells, #size-cells and ranges. Due to the Hisilicon CPU controller node may contains child nodes, change the value of "additionalProperties" from "false" to "type: object". The corresponding examples are also added. Signed-off-by: Zhen Lei Link: https://lore.kernel.org/r/20201012061225.1597-11-thunder.leizhen@huawei.com Signed-off-by: Rob Herring --- .../arm/hisilicon/controller/cpuctrl.yaml | 27 ++++++++++++++++++- 1 file changed, 26 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml index f6a314db3a59..528dad4cde3c 100644 --- a/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml @@ -21,9 +21,34 @@ properties: reg: maxItems: 1 + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + ranges: true + required: - compatible - reg -additionalProperties: false +additionalProperties: + type: object + +examples: + - | + cpuctrl@a22000 { + compatible = "hisilicon,cpuctrl"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x00a22000 0x2000>; + ranges = <0 0x00a22000 0x2000>; + + clock: clock@0 { + compatible = "hisilicon,hix5hd2-clock"; + reg = <0 0x2000>; + #clock-cells = <1>; + }; + }; ... From 588614be61b7cb46f697c3e141b2aef7f6b49347 Mon Sep 17 00:00:00 2001 From: Biju Das Date: Sun, 20 Sep 2020 14:49:00 +0100 Subject: [PATCH 429/433] dt-bindings: update usb-c-connector example Some hardware designs have USB typec connector attached to both SoC and super speed mux. We need to use separate connector node for such design. Signed-off-by: Biju Das Link: https://lore.kernel.org/r/20200920134905.4370-2-biju.das.jz@bp.renesas.com Signed-off-by: Rob Herring --- .../bindings/connector/usb-connector.yaml | 30 ++++++++++++++++++- 1 file changed, 29 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/connector/usb-connector.yaml b/Documentation/devicetree/bindings/connector/usb-connector.yaml index f037d65b018e..728f82db073d 100644 --- a/Documentation/devicetree/bindings/connector/usb-connector.yaml +++ b/Documentation/devicetree/bindings/connector/usb-connector.yaml @@ -11,7 +11,8 @@ maintainers: description: A USB connector node represents a physical USB connector. It should be a child - of a USB interface controller. + of a USB interface controller or a separate node when it is attached to both + MUX and USB interface controller. properties: compatible: @@ -237,6 +238,33 @@ examples: }; }; + # USB-C connector attached to SoC and USB3 typec port controller(hd3ss3220) + # with SS 2:1 MUX. HS lines routed to SoC, SS lines routed to the MUX and + # the output of MUX is connected to the SoC. + - | + connector { + compatible = "usb-c-connector"; + label = "USB-C"; + data-role = "dual"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + hs_ep: endpoint { + remote-endpoint = <&usb3_hs_ep>; + }; + }; + port@1 { + reg = <1>; + ss_ep: endpoint { + remote-endpoint = <&hd3ss3220_in_ep>; + }; + }; + }; + }; + # USB connector with GPIO control lines - | #include From 441848282c59038b6e9a57b233ac6a9449430648 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Thu, 8 Oct 2020 09:24:20 -0500 Subject: [PATCH 430/433] dt: Remove booting-without-of.rst booting-without-of.rst is an ancient document that first outlined Flattened DeviceTree on PowerPC initially. The DT world has evolved a lot in the 15 years since and booting-without-of.rst is pretty stale. The name of the document itself is confusing if you don't understand the evolution from real 'OpenFirmware'. Most of what booting-without-of.rst contains is now in the DT specification (which evolved out of the ePAPR). The few things that weren't documented in the DT specification are now. All that remains is the boot entry details, so let's move these to arch specific documents. The exception is arm which already has the same details documented. Cc: Frank Rowand Cc: Mauro Carvalho Chehab Cc: Geert Uytterhoeven Cc: Michael Ellerman Cc: Thomas Bogendoerfer Cc: Jonathan Corbet Cc: Paul Mackerras Cc: Yoshinori Sato Cc: Rich Felker Cc: Thomas Gleixner Cc: Ingo Molnar Cc: Borislav Petkov Cc: "H. Peter Anvin" Cc: x86@kernel.org Cc: linuxppc-dev@lists.ozlabs.org Cc: linux-mips@vger.kernel.org Cc: linux-doc@vger.kernel.org Cc: linux-sh@vger.kernel.org Acked-by: Benjamin Herrenschmidt Acked-by: Borislav Petkov Acked-by: Michael Ellerman (powerpc) Signed-off-by: Rob Herring --- .../devicetree/booting-without-of.rst | 1585 ----------------- Documentation/devicetree/index.rst | 1 - Documentation/mips/booting.rst | 28 + Documentation/mips/index.rst | 1 + Documentation/powerpc/booting.rst | 110 ++ Documentation/powerpc/index.rst | 1 + Documentation/sh/booting.rst | 12 + Documentation/sh/index.rst | 1 + Documentation/x86/booting-dt.rst | 21 + Documentation/x86/index.rst | 1 + 10 files changed, 175 insertions(+), 1586 deletions(-) delete mode 100644 Documentation/devicetree/booting-without-of.rst create mode 100644 Documentation/mips/booting.rst create mode 100644 Documentation/powerpc/booting.rst create mode 100644 Documentation/sh/booting.rst create mode 100644 Documentation/x86/booting-dt.rst diff --git a/Documentation/devicetree/booting-without-of.rst b/Documentation/devicetree/booting-without-of.rst deleted file mode 100644 index e9433350a20f..000000000000 --- a/Documentation/devicetree/booting-without-of.rst +++ /dev/null @@ -1,1585 +0,0 @@ -.. SPDX-License-Identifier: GPL-2.0 - -================================================== -Booting the Linux/ppc kernel without Open Firmware -================================================== - -Copyright (c) 2005 Benjamin Herrenschmidt , -IBM Corp. - -Copyright (c) 2005 Becky Bruce , -Freescale Semiconductor, FSL SOC and 32-bit additions - -Copyright (c) 2006 MontaVista Software, Inc. -Flash chip node definition - -.. Table of Contents - - I - Introduction - 1) Entry point for arch/arm - 2) Entry point for arch/powerpc - 3) Entry point for arch/x86 - 4) Entry point for arch/mips/bmips - 5) Entry point for arch/sh - - II - The DT block format - 1) Header - 2) Device tree generalities - 3) Device tree "structure" block - 4) Device tree "strings" block - - III - Required content of the device tree - 1) Note about cells and address representation - 2) Note about "compatible" properties - 3) Note about "name" properties - 4) Note about node and property names and character set - 5) Required nodes and properties - a) The root node - b) The /cpus node - c) The /cpus/* nodes - d) the /memory node(s) - e) The /chosen node - f) the /soc node - - IV - "dtc", the device tree compiler - - V - Recommendations for a bootloader - - VI - System-on-a-chip devices and nodes - 1) Defining child nodes of an SOC - 2) Representing devices without a current OF specification - - VII - Specifying interrupt information for devices - 1) interrupts property - 2) interrupt-parent property - 3) OpenPIC Interrupt Controllers - 4) ISA Interrupt Controllers - - VIII - Specifying device power management information (sleep property) - - IX - Specifying dma bus information - - Appendix A - Sample SOC node for MPC8540 - - -Revision Information -==================== - - May 18, 2005: Rev 0.1 - - Initial draft, no chapter III yet. - - May 19, 2005: Rev 0.2 - - Add chapter III and bits & pieces here or - clarifies the fact that a lot of things are - optional, the kernel only requires a very - small device tree, though it is encouraged - to provide an as complete one as possible. - - May 24, 2005: Rev 0.3 - - Precise that DT block has to be in RAM - - Misc fixes - - Define version 3 and new format version 16 - for the DT block (version 16 needs kernel - patches, will be fwd separately). - String block now has a size, and full path - is replaced by unit name for more - compactness. - linux,phandle is made optional, only nodes - that are referenced by other nodes need it. - "name" property is now automatically - deduced from the unit name - - June 1, 2005: Rev 0.4 - - Correct confusion between OF_DT_END and - OF_DT_END_NODE in structure definition. - - Change version 16 format to always align - property data to 4 bytes. Since tokens are - already aligned, that means no specific - required alignment between property size - and property data. The old style variable - alignment would make it impossible to do - "simple" insertion of properties using - memmove (thanks Milton for - noticing). Updated kernel patch as well - - Correct a few more alignment constraints - - Add a chapter about the device-tree - compiler and the textural representation of - the tree that can be "compiled" by dtc. - - November 21, 2005: Rev 0.5 - - Additions/generalizations for 32-bit - - Changed to reflect the new arch/powerpc - structure - - Added chapter VI - - - ToDo: - - Add some definitions of interrupt tree (simple/complex) - - Add some definitions for PCI host bridges - - Add some common address format examples - - Add definitions for standard properties and "compatible" - names for cells that are not already defined by the existing - OF spec. - - Compare FSL SOC use of PCI to standard and make sure no new - node definition required. - - Add more information about node definitions for SOC devices - that currently have no standard, like the FSL CPM. - - -I - Introduction -================ - -During the development of the Linux/ppc64 kernel, and more -specifically, the addition of new platform types outside of the old -IBM pSeries/iSeries pair, it was decided to enforce some strict rules -regarding the kernel entry and bootloader <-> kernel interfaces, in -order to avoid the degeneration that had become the ppc32 kernel entry -point and the way a new platform should be added to the kernel. The -legacy iSeries platform breaks those rules as it predates this scheme, -but no new board support will be accepted in the main tree that -doesn't follow them properly. In addition, since the advent of the -arch/powerpc merged architecture for ppc32 and ppc64, new 32-bit -platforms and 32-bit platforms which move into arch/powerpc will be -required to use these rules as well. - -The main requirement that will be defined in more detail below is -the presence of a device-tree whose format is defined after Open -Firmware specification. However, in order to make life easier -to embedded board vendors, the kernel doesn't require the device-tree -to represent every device in the system and only requires some nodes -and properties to be present. This will be described in detail in -section III, but, for example, the kernel does not require you to -create a node for every PCI device in the system. It is a requirement -to have a node for PCI host bridges in order to provide interrupt -routing information and memory/IO ranges, among others. It is also -recommended to define nodes for on chip devices and other buses that -don't specifically fit in an existing OF specification. This creates a -great flexibility in the way the kernel can then probe those and match -drivers to device, without having to hard code all sorts of tables. It -also makes it more flexible for board vendors to do minor hardware -upgrades without significantly impacting the kernel code or cluttering -it with special cases. - - -1) Entry point for arch/arm ---------------------------- - - There is one single entry point to the kernel, at the start - of the kernel image. That entry point supports two calling - conventions. A summary of the interface is described here. A full - description of the boot requirements is documented in - Documentation/arm/booting.rst - - a) ATAGS interface. Minimal information is passed from firmware - to the kernel with a tagged list of predefined parameters. - - r0 : 0 - - r1 : Machine type number - - r2 : Physical address of tagged list in system RAM - - b) Entry with a flattened device-tree block. Firmware loads the - physical address of the flattened device tree block (dtb) into r2, - r1 is not used, but it is considered good practice to use a valid - machine number as described in Documentation/arm/booting.rst. - - r0 : 0 - - r1 : Valid machine type number. When using a device tree, - a single machine type number will often be assigned to - represent a class or family of SoCs. - - r2 : physical pointer to the device-tree block - (defined in chapter II) in RAM. Device tree can be located - anywhere in system RAM, but it should be aligned on a 64 bit - boundary. - - The kernel will differentiate between ATAGS and device tree booting by - reading the memory pointed to by r2 and looking for either the flattened - device tree block magic value (0xd00dfeed) or the ATAG_CORE value at - offset 0x4 from r2 (0x54410001). - -2) Entry point for arch/powerpc -------------------------------- - - There is one single entry point to the kernel, at the start - of the kernel image. That entry point supports two calling - conventions: - - a) Boot from Open Firmware. If your firmware is compatible - with Open Firmware (IEEE 1275) or provides an OF compatible - client interface API (support for "interpret" callback of - forth words isn't required), you can enter the kernel with: - - r5 : OF callback pointer as defined by IEEE 1275 - bindings to powerpc. Only the 32-bit client interface - is currently supported - - r3, r4 : address & length of an initrd if any or 0 - - The MMU is either on or off; the kernel will run the - trampoline located in arch/powerpc/kernel/prom_init.c to - extract the device-tree and other information from open - firmware and build a flattened device-tree as described - in b). prom_init() will then re-enter the kernel using - the second method. This trampoline code runs in the - context of the firmware, which is supposed to handle all - exceptions during that time. - - b) Direct entry with a flattened device-tree block. This entry - point is called by a) after the OF trampoline and can also be - called directly by a bootloader that does not support the Open - Firmware client interface. It is also used by "kexec" to - implement "hot" booting of a new kernel from a previous - running one. This method is what I will describe in more - details in this document, as method a) is simply standard Open - Firmware, and thus should be implemented according to the - various standard documents defining it and its binding to the - PowerPC platform. The entry point definition then becomes: - - r3 : physical pointer to the device-tree block - (defined in chapter II) in RAM - - r4 : physical pointer to the kernel itself. This is - used by the assembly code to properly disable the MMU - in case you are entering the kernel with MMU enabled - and a non-1:1 mapping. - - r5 : NULL (as to differentiate with method a) - - Note about SMP entry: Either your firmware puts your other - CPUs in some sleep loop or spin loop in ROM where you can get - them out via a soft reset or some other means, in which case - you don't need to care, or you'll have to enter the kernel - with all CPUs. The way to do that with method b) will be - described in a later revision of this document. - - Board supports (platforms) are not exclusive config options. An - arbitrary set of board supports can be built in a single kernel - image. The kernel will "know" what set of functions to use for a - given platform based on the content of the device-tree. Thus, you - should: - - a) add your platform support as a _boolean_ option in - arch/powerpc/Kconfig, following the example of PPC_PSERIES, - PPC_PMAC and PPC_MAPLE. The later is probably a good - example of a board support to start from. - - b) create your main platform file as - "arch/powerpc/platforms/myplatform/myboard_setup.c" and add it - to the Makefile under the condition of your ``CONFIG_`` - option. This file will define a structure of type "ppc_md" - containing the various callbacks that the generic code will - use to get to your platform specific code - - A kernel image may support multiple platforms, but only if the - platforms feature the same core architecture. A single kernel build - cannot support both configurations with Book E and configurations - with classic Powerpc architectures. - -3) Entry point for arch/x86 ---------------------------- - - There is one single 32bit entry point to the kernel at code32_start, - the decompressor (the real mode entry point goes to the same 32bit - entry point once it switched into protected mode). That entry point - supports one calling convention which is documented in - Documentation/x86/boot.rst - The physical pointer to the device-tree block (defined in chapter II) - is passed via setup_data which requires at least boot protocol 2.09. - The type filed is defined as:: - - #define SETUP_DTB 2 - - This device-tree is used as an extension to the "boot page". As such it - does not parse / consider data which is already covered by the boot - page. This includes memory size, reserved ranges, command line arguments - or initrd address. It simply holds information which can not be retrieved - otherwise like interrupt routing or a list of devices behind an I2C bus. - -4) Entry point for arch/mips/bmips ----------------------------------- - - Some bootloaders only support a single entry point, at the start of the - kernel image. Other bootloaders will jump to the ELF start address. - Both schemes are supported; CONFIG_BOOT_RAW=y and CONFIG_NO_EXCEPT_FILL=y, - so the first instruction immediately jumps to kernel_entry(). - - Similar to the arch/arm case (b), a DT-aware bootloader is expected to - set up the following registers: - - a0 : 0 - - a1 : 0xffffffff - - a2 : Physical pointer to the device tree block (defined in chapter - II) in RAM. The device tree can be located anywhere in the first - 512MB of the physical address space (0x00000000 - 0x1fffffff), - aligned on a 64 bit boundary. - - Legacy bootloaders do not use this convention, and they do not pass in a - DT block. In this case, Linux will look for a builtin DTB, selected via - CONFIG_DT_*. - - This convention is defined for 32-bit systems only, as there are not - currently any 64-bit BMIPS implementations. - -5) Entry point for arch/sh --------------------------- - - Device-tree-compatible SH bootloaders are expected to provide the physical - address of the device tree blob in r4. Since legacy bootloaders did not - guarantee any particular initial register state, kernels built to - inter-operate with old bootloaders must either use a builtin DTB or - select a legacy board option (something other than CONFIG_SH_DEVICE_TREE) - that does not use device tree. Support for the latter is being phased out - in favor of device tree. - - -II - The DT block format -======================== - - -This chapter defines the actual format of the flattened device-tree -passed to the kernel. The actual content of it and kernel requirements -are described later. You can find example of code manipulating that -format in various places, including arch/powerpc/kernel/prom_init.c -which will generate a flattened device-tree from the Open Firmware -representation, or the fs2dt utility which is part of the kexec tools -which will generate one from a filesystem representation. It is -expected that a bootloader like uboot provides a bit more support, -that will be discussed later as well. - -Note: The block has to be in main memory. It has to be accessible in -both real mode and virtual mode with no mapping other than main -memory. If you are writing a simple flash bootloader, it should copy -the block to RAM before passing it to the kernel. - - -1) Header ---------- - - The kernel is passed the physical address pointing to an area of memory - that is roughly described in include/linux/of_fdt.h by the structure - boot_param_header::: - - struct boot_param_header { - u32 magic; /* magic word OF_DT_HEADER */ - u32 totalsize; /* total size of DT block */ - u32 off_dt_struct; /* offset to structure */ - u32 off_dt_strings; /* offset to strings */ - u32 off_mem_rsvmap; /* offset to memory reserve map - */ - u32 version; /* format version */ - u32 last_comp_version; /* last compatible version */ - - /* version 2 fields below */ - u32 boot_cpuid_phys; /* Which physical CPU id we're - booting on */ - /* version 3 fields below */ - u32 size_dt_strings; /* size of the strings block */ - - /* version 17 fields below */ - u32 size_dt_struct; /* size of the DT structure block */ - }; - - Along with the constants:: - - /* Definitions used by the flattened device tree */ - #define OF_DT_HEADER 0xd00dfeed /* 4: version, - 4: total size */ - #define OF_DT_BEGIN_NODE 0x1 /* Start node: full name - */ - #define OF_DT_END_NODE 0x2 /* End node */ - #define OF_DT_PROP 0x3 /* Property: name off, - size, content */ - #define OF_DT_END 0x9 - - All values in this header are in big endian format, the various - fields in this header are defined more precisely below. All - "offset" values are in bytes from the start of the header; that is - from the physical base address of the device tree block. - - - magic - - This is a magic value that "marks" the beginning of the - device-tree block header. It contains the value 0xd00dfeed and is - defined by the constant OF_DT_HEADER - - - totalsize - - This is the total size of the DT block including the header. The - "DT" block should enclose all data structures defined in this - chapter (who are pointed to by offsets in this header). That is, - the device-tree structure, strings, and the memory reserve map. - - - off_dt_struct - - This is an offset from the beginning of the header to the start - of the "structure" part the device tree. (see 2) device tree) - - - off_dt_strings - - This is an offset from the beginning of the header to the start - of the "strings" part of the device-tree - - - off_mem_rsvmap - - This is an offset from the beginning of the header to the start - of the reserved memory map. This map is a list of pairs of 64- - bit integers. Each pair is a physical address and a size. The - list is terminated by an entry of size 0. This map provides the - kernel with a list of physical memory areas that are "reserved" - and thus not to be used for memory allocations, especially during - early initialization. The kernel needs to allocate memory during - boot for things like un-flattening the device-tree, allocating an - MMU hash table, etc... Those allocations must be done in such a - way to avoid overriding critical things like, on Open Firmware - capable machines, the RTAS instance, or on some pSeries, the TCE - tables used for the iommu. Typically, the reserve map should - contain **at least** this DT block itself (header,total_size). If - you are passing an initrd to the kernel, you should reserve it as - well. You do not need to reserve the kernel image itself. The map - should be 64-bit aligned. - - - version - - This is the version of this structure. Version 1 stops - here. Version 2 adds an additional field boot_cpuid_phys. - Version 3 adds the size of the strings block, allowing the kernel - to reallocate it easily at boot and free up the unused flattened - structure after expansion. Version 16 introduces a new more - "compact" format for the tree itself that is however not backward - compatible. Version 17 adds an additional field, size_dt_struct, - allowing it to be reallocated or moved more easily (this is - particularly useful for bootloaders which need to make - adjustments to a device tree based on probed information). You - should always generate a structure of the highest version defined - at the time of your implementation. Currently that is version 17, - unless you explicitly aim at being backward compatible. - - - last_comp_version - - Last compatible version. This indicates down to what version of - the DT block you are backward compatible. For example, version 2 - is backward compatible with version 1 (that is, a kernel build - for version 1 will be able to boot with a version 2 format). You - should put a 1 in this field if you generate a device tree of - version 1 to 3, or 16 if you generate a tree of version 16 or 17 - using the new unit name format. - - - boot_cpuid_phys - - This field only exist on version 2 headers. It indicate which - physical CPU ID is calling the kernel entry point. This is used, - among others, by kexec. If you are on an SMP system, this value - should match the content of the "reg" property of the CPU node in - the device-tree corresponding to the CPU calling the kernel entry - point (see further chapters for more information on the required - device-tree contents) - - - size_dt_strings - - This field only exists on version 3 and later headers. It - gives the size of the "strings" section of the device tree (which - starts at the offset given by off_dt_strings). - - - size_dt_struct - - This field only exists on version 17 and later headers. It gives - the size of the "structure" section of the device tree (which - starts at the offset given by off_dt_struct). - - So the typical layout of a DT block (though the various parts don't - need to be in that order) looks like this (addresses go from top to - bottom):: - - - ------------------------------ - base -> | struct boot_param_header | - ------------------------------ - | (alignment gap) (*) | - ------------------------------ - | memory reserve map | - ------------------------------ - | (alignment gap) | - ------------------------------ - | | - | device-tree structure | - | | - ------------------------------ - | (alignment gap) | - ------------------------------ - | | - | device-tree strings | - | | - -----> ------------------------------ - | - | - --- (base + totalsize) - - (*) The alignment gaps are not necessarily present; their presence - and size are dependent on the various alignment requirements of - the individual data blocks. - - -2) Device tree generalities ---------------------------- - -This device-tree itself is separated in two different blocks, a -structure block and a strings block. Both need to be aligned to a 4 -byte boundary. - -First, let's quickly describe the device-tree concept before detailing -the storage format. This chapter does _not_ describe the detail of the -required types of nodes & properties for the kernel, this is done -later in chapter III. - -The device-tree layout is strongly inherited from the definition of -the Open Firmware IEEE 1275 device-tree. It's basically a tree of -nodes, each node having two or more named properties. A property can -have a value or not. - -It is a tree, so each node has one and only one parent except for the -root node who has no parent. - -A node has 2 names. The actual node name is generally contained in a -property of type "name" in the node property list whose value is a -zero terminated string and is mandatory for version 1 to 3 of the -format definition (as it is in Open Firmware). Version 16 makes it -optional as it can generate it from the unit name defined below. - -There is also a "unit name" that is used to differentiate nodes with -the same name at the same level, it is usually made of the node -names, the "@" sign, and a "unit address", which definition is -specific to the bus type the node sits on. - -The unit name doesn't exist as a property per-se but is included in -the device-tree structure. It is typically used to represent "path" in -the device-tree. More details about the actual format of these will be -below. - -The kernel generic code does not make any formal use of the -unit address (though some board support code may do) so the only real -requirement here for the unit address is to ensure uniqueness of -the node unit name at a given level of the tree. Nodes with no notion -of address and no possible sibling of the same name (like /memory or -/cpus) may omit the unit address in the context of this specification, -or use the "@0" default unit address. The unit name is used to define -a node "full path", which is the concatenation of all parent node -unit names separated with "/". - -The root node doesn't have a defined name, and isn't required to have -a name property either if you are using version 3 or earlier of the -format. It also has no unit address (no @ symbol followed by a unit -address). The root node unit name is thus an empty string. The full -path to the root node is "/". - -Every node which actually represents an actual device (that is, a node -which isn't only a virtual "container" for more nodes, like "/cpus" -is) is also required to have a "compatible" property indicating the -specific hardware and an optional list of devices it is fully -backwards compatible with. - -Finally, every node that can be referenced from a property in another -node is required to have either a "phandle" or a "linux,phandle" -property. Real Open Firmware implementations provide a unique -"phandle" value for every node that the "prom_init()" trampoline code -turns into "linux,phandle" properties. However, this is made optional -if the flattened device tree is used directly. An example of a node -referencing another node via "phandle" is when laying out the -interrupt tree which will be described in a further version of this -document. - -The "phandle" property is a 32-bit value that uniquely -identifies a node. You are free to use whatever values or system of -values, internal pointers, or whatever to generate these, the only -requirement is that every node for which you provide that property has -a unique value for it. - -Here is an example of a simple device-tree. In this example, an "o" -designates a node followed by the node unit name. Properties are -presented with their name followed by their content. "content" -represents an ASCII string (zero terminated) value, while -represents a 32-bit value, specified in decimal or hexadecimal (the -latter prefixed 0x). The various nodes in this example will be -discussed in a later chapter. At this point, it is only meant to give -you a idea of what a device-tree looks like. I have purposefully kept -the "name" and "linux,phandle" properties which aren't necessary in -order to give you a better idea of what the tree looks like in -practice:: - - / o device-tree - |- name = "device-tree" - |- model = "MyBoardName" - |- compatible = "MyBoardFamilyName" - |- #address-cells = <2> - |- #size-cells = <2> - |- linux,phandle = <0> - | - o cpus - | | - name = "cpus" - | | - linux,phandle = <1> - | | - #address-cells = <1> - | | - #size-cells = <0> - | | - | o PowerPC,970@0 - | |- name = "PowerPC,970" - | |- device_type = "cpu" - | |- reg = <0> - | |- clock-frequency = <0x5f5e1000> - | |- 64-bit - | |- linux,phandle = <2> - | - o memory@0 - | |- name = "memory" - | |- device_type = "memory" - | |- reg = <0x00000000 0x00000000 0x00000000 0x20000000> - | |- linux,phandle = <3> - | - o chosen - |- name = "chosen" - |- bootargs = "root=/dev/sda2" - |- linux,phandle = <4> - -This tree is almost a minimal tree. It pretty much contains the -minimal set of required nodes and properties to boot a linux kernel; -that is, some basic model information at the root, the CPUs, and the -physical memory layout. It also includes misc information passed -through /chosen, like in this example, the platform type (mandatory) -and the kernel command line arguments (optional). - -The /cpus/PowerPC,970@0/64-bit property is an example of a -property without a value. All other properties have a value. The -significance of the #address-cells and #size-cells properties will be -explained in chapter IV which defines precisely the required nodes and -properties and their content. - - -3) Device tree "structure" block --------------------------------- - -The structure of the device tree is a linearized tree structure. The -"OF_DT_BEGIN_NODE" token starts a new node, and the "OF_DT_END_NODE" -ends that node definition. Child nodes are simply defined before -"OF_DT_END_NODE" (that is nodes within the node). A 'token' is a 32 -bit value. The tree has to be "finished" with a OF_DT_END token - -Here's the basic structure of a single node: - - * token OF_DT_BEGIN_NODE (that is 0x00000001) - * for version 1 to 3, this is the node full path as a zero - terminated string, starting with "/". For version 16 and later, - this is the node unit name only (or an empty string for the - root node) - * [align gap to next 4 bytes boundary] - * for each property: - - * token OF_DT_PROP (that is 0x00000003) - * 32-bit value of property value size in bytes (or 0 if no - value) - * 32-bit value of offset in string block of property name - * property value data if any - * [align gap to next 4 bytes boundary] - - * [child nodes if any] - * token OF_DT_END_NODE (that is 0x00000002) - -So the node content can be summarized as a start token, a full path, -a list of properties, a list of child nodes, and an end token. Every -child node is a full node structure itself as defined above. - -NOTE: The above definition requires that all property definitions for -a particular node MUST precede any subnode definitions for that node. -Although the structure would not be ambiguous if properties and -subnodes were intermingled, the kernel parser requires that the -properties come first (up until at least 2.6.22). Any tools -manipulating a flattened tree must take care to preserve this -constraint. - -4) Device tree "strings" block ------------------------------- - -In order to save space, property names, which are generally redundant, -are stored separately in the "strings" block. This block is simply the -whole bunch of zero terminated strings for all property names -concatenated together. The device-tree property definitions in the -structure block will contain offset values from the beginning of the -strings block. - - -III - Required content of the device tree -========================================= - -.. Warning:: - - All ``linux,*`` properties defined in this document apply only - to a flattened device-tree. If your platform uses a real - implementation of Open Firmware or an implementation compatible with - the Open Firmware client interface, those properties will be created - by the trampoline code in the kernel's prom_init() file. For example, - that's where you'll have to add code to detect your board model and - set the platform number. However, when using the flattened device-tree - entry point, there is no prom_init() pass, and thus you have to - provide those properties yourself. - - -1) Note about cells and address representation ----------------------------------------------- - -The general rule is documented in the various Open Firmware -documentations. If you choose to describe a bus with the device-tree -and there exist an OF bus binding, then you should follow the -specification. However, the kernel does not require every single -device or bus to be described by the device tree. - -In general, the format of an address for a device is defined by the -parent bus type, based on the #address-cells and #size-cells -properties. Note that the parent's parent definitions of #address-cells -and #size-cells are not inherited so every node with children must specify -them. The kernel requires the root node to have those properties defining -addresses format for devices directly mapped on the processor bus. - -Those 2 properties define 'cells' for representing an address and a -size. A "cell" is a 32-bit number. For example, if both contain 2 -like the example tree given above, then an address and a size are both -composed of 2 cells, and each is a 64-bit number (cells are -concatenated and expected to be in big endian format). Another example -is the way Apple firmware defines them, with 2 cells for an address -and one cell for a size. Most 32-bit implementations should define -#address-cells and #size-cells to 1, which represents a 32-bit value. -Some 32-bit processors allow for physical addresses greater than 32 -bits; these processors should define #address-cells as 2. - -"reg" properties are always a tuple of the type "address size" where -the number of cells of address and size is specified by the bus -#address-cells and #size-cells. When a bus supports various address -spaces and other flags relative to a given address allocation (like -prefetchable, etc...) those flags are usually added to the top level -bits of the physical address. For example, a PCI physical address is -made of 3 cells, the bottom two containing the actual address itself -while the top cell contains address space indication, flags, and pci -bus & device numbers. - -For buses that support dynamic allocation, it's the accepted practice -to then not provide the address in "reg" (keep it 0) though while -providing a flag indicating the address is dynamically allocated, and -then, to provide a separate "assigned-addresses" property that -contains the fully allocated addresses. See the PCI OF bindings for -details. - -In general, a simple bus with no address space bits and no dynamic -allocation is preferred if it reflects your hardware, as the existing -kernel address parsing functions will work out of the box. If you -define a bus type with a more complex address format, including things -like address space bits, you'll have to add a bus translator to the -prom_parse.c file of the recent kernels for your bus type. - -The "reg" property only defines addresses and sizes (if #size-cells is -non-0) within a given bus. In order to translate addresses upward -(that is into parent bus addresses, and possibly into CPU physical -addresses), all buses must contain a "ranges" property. If the -"ranges" property is missing at a given level, it's assumed that -translation isn't possible, i.e., the registers are not visible on the -parent bus. The format of the "ranges" property for a bus is a list -of:: - - bus address, parent bus address, size - -"bus address" is in the format of the bus this bus node is defining, -that is, for a PCI bridge, it would be a PCI address. Thus, (bus -address, size) defines a range of addresses for child devices. "parent -bus address" is in the format of the parent bus of this bus. For -example, for a PCI host controller, that would be a CPU address. For a -PCI<->ISA bridge, that would be a PCI address. It defines the base -address in the parent bus where the beginning of that range is mapped. - -For new 64-bit board support, I recommend either the 2/2 format or -Apple's 2/1 format which is slightly more compact since sizes usually -fit in a single 32-bit word. New 32-bit board support should use a -1/1 format, unless the processor supports physical addresses greater -than 32-bits, in which case a 2/1 format is recommended. - -Alternatively, the "ranges" property may be empty, indicating that the -registers are visible on the parent bus using an identity mapping -translation. In other words, the parent bus address space is the same -as the child bus address space. - -2) Note about "compatible" properties -------------------------------------- - -These properties are optional, but recommended in devices and the root -node. The format of a "compatible" property is a list of concatenated -zero terminated strings. They allow a device to express its -compatibility with a family of similar devices, in some cases, -allowing a single driver to match against several devices regardless -of their actual names. - -3) Note about "name" properties -------------------------------- - -While earlier users of Open Firmware like OldWorld macintoshes tended -to use the actual device name for the "name" property, it's nowadays -considered a good practice to use a name that is closer to the device -class (often equal to device_type). For example, nowadays, Ethernet -controllers are named "ethernet", an additional "model" property -defining precisely the chip type/model, and "compatible" property -defining the family in case a single driver can driver more than one -of these chips. However, the kernel doesn't generally put any -restriction on the "name" property; it is simply considered good -practice to follow the standard and its evolutions as closely as -possible. - -Note also that the new format version 16 makes the "name" property -optional. If it's absent for a node, then the node's unit name is then -used to reconstruct the name. That is, the part of the unit name -before the "@" sign is used (or the entire unit name if no "@" sign -is present). - -4) Note about node and property names and character set -------------------------------------------------------- - -While Open Firmware provides more flexible usage of 8859-1, this -specification enforces more strict rules. Nodes and properties should -be comprised only of ASCII characters 'a' to 'z', '0' to -'9', ',', '.', '_', '+', '#', '?', and '-'. Node names additionally -allow uppercase characters 'A' to 'Z' (property names should be -lowercase. The fact that vendors like Apple don't respect this rule is -irrelevant here). Additionally, node and property names should always -begin with a character in the range 'a' to 'z' (or 'A' to 'Z' for node -names). - -The maximum number of characters for both nodes and property names -is 31. In the case of node names, this is only the leftmost part of -a unit name (the pure "name" property), it doesn't include the unit -address which can extend beyond that limit. - - -5) Required nodes and properties --------------------------------- - These are all that are currently required. However, it is strongly - recommended that you expose PCI host bridges as documented in the - PCI binding to Open Firmware, and your interrupt tree as documented - in OF interrupt tree specification. - - a) The root node - - The root node requires some properties to be present: - - - model : this is your board name/model - - #address-cells : address representation for "root" devices - - #size-cells: the size representation for "root" devices - - compatible : the board "family" generally finds its way here, - for example, if you have 2 board models with a similar layout, - that typically get driven by the same platform code in the - kernel, you would specify the exact board model in the - compatible property followed by an entry that represents the SoC - model. - - The root node is also generally where you add additional properties - specific to your board like the serial number if any, that sort of - thing. It is recommended that if you add any "custom" property whose - name may clash with standard defined ones, you prefix them with your - vendor name and a comma. - - Additional properties for the root node: - - - serial-number : a string representing the device's serial number - - b) The /cpus node - - This node is the parent of all individual CPU nodes. It doesn't - have any specific requirements, though it's generally good practice - to have at least:: - - #address-cells = <00000001> - #size-cells = <00000000> - - This defines that the "address" for a CPU is a single cell, and has - no meaningful size. This is not necessary but the kernel will assume - that format when reading the "reg" properties of a CPU node, see - below - - c) The ``/cpus/*`` nodes - - So under /cpus, you are supposed to create a node for every CPU on - the machine. There is no specific restriction on the name of the - CPU, though it's common to call it ,. For - example, Apple uses PowerPC,G5 while IBM uses PowerPC,970FX. - However, the Generic Names convention suggests that it would be - better to simply use 'cpu' for each cpu node and use the compatible - property to identify the specific cpu core. - - Required properties: - - - device_type : has to be "cpu" - - reg : This is the physical CPU number, it's a single 32-bit cell - and is also used as-is as the unit number for constructing the - unit name in the full path. For example, with 2 CPUs, you would - have the full path:: - - /cpus/PowerPC,970FX@0 - /cpus/PowerPC,970FX@1 - - (unit addresses do not require leading zeroes) - - d-cache-block-size : one cell, L1 data cache block size in bytes [#]_ - - i-cache-block-size : one cell, L1 instruction cache block size in - bytes - - d-cache-size : one cell, size of L1 data cache in bytes - - i-cache-size : one cell, size of L1 instruction cache in bytes - - .. [#] The cache "block" size is the size on which the cache management - instructions operate. Historically, this document used the cache - "line" size here which is incorrect. The kernel will prefer the cache - block size and will fallback to cache line size for backward - compatibility. - - Recommended properties: - - - timebase-frequency : a cell indicating the frequency of the - timebase in Hz. This is not directly used by the generic code, - but you are welcome to copy/paste the pSeries code for setting - the kernel timebase/decrementer calibration based on this - value. - - clock-frequency : a cell indicating the CPU core clock frequency - in Hz. A new property will be defined for 64-bit values, but if - your frequency is < 4Ghz, one cell is enough. Here as well as - for the above, the common code doesn't use that property, but - you are welcome to re-use the pSeries or Maple one. A future - kernel version might provide a common function for this. - - d-cache-line-size : one cell, L1 data cache line size in bytes - if different from the block size - - i-cache-line-size : one cell, L1 instruction cache line size in - bytes if different from the block size - - You are welcome to add any property you find relevant to your board, - like some information about the mechanism used to soft-reset the - CPUs. For example, Apple puts the GPIO number for CPU soft reset - lines in there as a "soft-reset" property since they start secondary - CPUs by soft-resetting them. - - - d) the /memory node(s) - - To define the physical memory layout of your board, you should - create one or more memory node(s). You can either create a single - node with all memory ranges in its reg property, or you can create - several nodes, as you wish. The unit address (@ part) used for the - full path is the address of the first range of memory defined by a - given node. If you use a single memory node, this will typically be - @0. - - Required properties: - - - device_type : has to be "memory" - - reg : This property contains all the physical memory ranges of - your board. It's a list of addresses/sizes concatenated - together, with the number of cells of each defined by the - #address-cells and #size-cells of the root node. For example, - with both of these properties being 2 like in the example given - earlier, a 970 based machine with 6Gb of RAM could typically - have a "reg" property here that looks like:: - - 00000000 00000000 00000000 80000000 - 00000001 00000000 00000001 00000000 - - That is a range starting at 0 of 0x80000000 bytes and a range - starting at 0x100000000 and of 0x100000000 bytes. You can see - that there is no memory covering the IO hole between 2Gb and - 4Gb. Some vendors prefer splitting those ranges into smaller - segments, but the kernel doesn't care. - - Additional properties: - - - hotpluggable : The presence of this property provides an explicit - hint to the operating system that this memory may potentially be - removed later. The kernel can take this into consideration when - doing nonmovable allocations and when laying out memory zones. - - e) The /chosen node - - This node is a bit "special". Normally, that's where Open Firmware - puts some variable environment information, like the arguments, or - the default input/output devices. - - This specification makes a few of these mandatory, but also defines - some linux-specific properties that would be normally constructed by - the prom_init() trampoline when booting with an OF client interface, - but that you have to provide yourself when using the flattened format. - - Recommended properties: - - - bootargs : This zero-terminated string is passed as the kernel - command line - - linux,stdout-path : This is the full path to your standard - console device if any. Typically, if you have serial devices on - your board, you may want to put the full path to the one set as - the default console in the firmware here, for the kernel to pick - it up as its own default console. - - Note that u-boot creates and fills in the chosen node for platforms - that use it. - - (Note: a practice that is now obsolete was to include a property - under /chosen called interrupt-controller which had a phandle value - that pointed to the main interrupt controller) - - f) the /soc node - - This node is used to represent a system-on-a-chip (SoC) and must be - present if the processor is a SoC. The top-level soc node contains - information that is global to all devices on the SoC. The node name - should contain a unit address for the SoC, which is the base address - of the memory-mapped register set for the SoC. The name of an SoC - node should start with "soc", and the remainder of the name should - represent the part number for the soc. For example, the MPC8540's - soc node would be called "soc8540". - - Required properties: - - - ranges : Should be defined as specified in 1) to describe the - translation of SoC addresses for memory mapped SoC registers. - - bus-frequency: Contains the bus frequency for the SoC node. - Typically, the value of this field is filled in by the boot - loader. - - compatible : Exact model of the SoC - - - Recommended properties: - - - reg : This property defines the address and size of the - memory-mapped registers that are used for the SOC node itself. - It does not include the child device registers - these will be - defined inside each child node. The address specified in the - "reg" property should match the unit address of the SOC node. - - #address-cells : Address representation for "soc" devices. The - format of this field may vary depending on whether or not the - device registers are memory mapped. For memory mapped - registers, this field represents the number of cells needed to - represent the address of the registers. For SOCs that do not - use MMIO, a special address format should be defined that - contains enough cells to represent the required information. - See 1) above for more details on defining #address-cells. - - #size-cells : Size representation for "soc" devices - - #interrupt-cells : Defines the width of cells used to represent - interrupts. Typically this value is <2>, which includes a - 32-bit number that represents the interrupt number, and a - 32-bit number that represents the interrupt sense and level. - This field is only needed if the SOC contains an interrupt - controller. - - The SOC node may contain child nodes for each SOC device that the - platform uses. Nodes should not be created for devices which exist - on the SOC but are not used by a particular platform. See chapter VI - for more information on how to specify devices that are part of a SOC. - - Example SOC node for the MPC8540:: - - soc8540@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - #interrupt-cells = <2>; - device_type = "soc"; - ranges = <0x00000000 0xe0000000 0x00100000> - reg = <0xe0000000 0x00003000>; - bus-frequency = <0>; - } - - - -IV - "dtc", the device tree compiler -==================================== - - -dtc source code can be found at - - -.. Warning:: - - This version is still in early development stage; the - resulting device-tree "blobs" have not yet been validated with the - kernel. The current generated block lacks a useful reserve map (it will - be fixed to generate an empty one, it's up to the bootloader to fill - it up) among others. The error handling needs work, bugs are lurking, - etc... - -dtc basically takes a device-tree in a given format and outputs a -device-tree in another format. The currently supported formats are: - -Input formats -------------- - - - "dtb": "blob" format, that is a flattened device-tree block - with - header all in a binary blob. - - "dts": "source" format. This is a text file containing a - "source" for a device-tree. The format is defined later in this - chapter. - - "fs" format. This is a representation equivalent to the - output of /proc/device-tree, that is nodes are directories and - properties are files - -Output formats --------------- - - - "dtb": "blob" format - - "dts": "source" format - - "asm": assembly language file. This is a file that can be - sourced by gas to generate a device-tree "blob". That file can - then simply be added to your Makefile. Additionally, the - assembly file exports some symbols that can be used. - - -The syntax of the dtc tool is:: - - dtc [-I ] [-O ] - [-o output-filename] [-V output_version] input_filename - - -The "output_version" defines what version of the "blob" format will be -generated. Supported versions are 1,2,3 and 16. The default is -currently version 3 but that may change in the future to version 16. - -Additionally, dtc performs various sanity checks on the tree, like the -uniqueness of linux, phandle properties, validity of strings, etc... - -The format of the .dts "source" file is "C" like, supports C and C++ -style comments:: - - / { - } - -The above is the "device-tree" definition. It's the only statement -supported currently at the toplevel. - -:: - - / { - property1 = "string_value"; /* define a property containing a 0 - * terminated string - */ - - property2 = <0x1234abcd>; /* define a property containing a - * numerical 32-bit value (hexadecimal) - */ - - property3 = <0x12345678 0x12345678 0xdeadbeef>; - /* define a property containing 3 - * numerical 32-bit values (cells) in - * hexadecimal - */ - property4 = [0x0a 0x0b 0x0c 0x0d 0xde 0xea 0xad 0xbe 0xef]; - /* define a property whose content is - * an arbitrary array of bytes - */ - - childnode@address { /* define a child node named "childnode" - * whose unit name is "childnode at - * address" - */ - - childprop = "hello\n"; /* define a property "childprop" of - * childnode (in this case, a string) - */ - }; - }; - -Nodes can contain other nodes etc... thus defining the hierarchical -structure of the tree. - -Strings support common escape sequences from C: "\n", "\t", "\r", -"\(octal value)", "\x(hex value)". - -It is also suggested that you pipe your source file through cpp (gcc -preprocessor) so you can use #include's, #define for constants, etc... - -Finally, various options are planned but not yet implemented, like -automatic generation of phandles, labels (exported to the asm file so -you can point to a property content and change it easily from whatever -you link the device-tree with), label or path instead of numeric value -in some cells to "point" to a node (replaced by a phandle at compile -time), export of reserve map address to the asm file, ability to -specify reserve map content at compile time, etc... - -We may provide a .h include file with common definitions of that -proves useful for some properties (like building PCI properties or -interrupt maps) though it may be better to add a notion of struct -definitions to the compiler... - - -V - Recommendations for a bootloader -==================================== - - -Here are some various ideas/recommendations that have been proposed -while all this has been defined and implemented. - - - The bootloader may want to be able to use the device-tree itself - and may want to manipulate it (to add/edit some properties, - like physical memory size or kernel arguments). At this point, 2 - choices can be made. Either the bootloader works directly on the - flattened format, or the bootloader has its own internal tree - representation with pointers (similar to the kernel one) and - re-flattens the tree when booting the kernel. The former is a bit - more difficult to edit/modify, the later requires probably a bit - more code to handle the tree structure. Note that the structure - format has been designed so it's relatively easy to "insert" - properties or nodes or delete them by just memmoving things - around. It contains no internal offsets or pointers for this - purpose. - - - An example of code for iterating nodes & retrieving properties - directly from the flattened tree format can be found in the kernel - file drivers/of/fdt.c. Look at the of_scan_flat_dt() function, - its usage in early_init_devtree(), and the corresponding various - early_init_dt_scan_*() callbacks. That code can be re-used in a - GPL bootloader, and as the author of that code, I would be happy - to discuss possible free licensing to any vendor who wishes to - integrate all or part of this code into a non-GPL bootloader. - (reference needed; who is 'I' here? ---gcl Jan 31, 2011) - - - -VI - System-on-a-chip devices and nodes -======================================= - -Many companies are now starting to develop system-on-a-chip -processors, where the processor core (CPU) and many peripheral devices -exist on a single piece of silicon. For these SOCs, an SOC node -should be used that defines child nodes for the devices that make -up the SOC. While platforms are not required to use this model in -order to boot the kernel, it is highly encouraged that all SOC -implementations define as complete a flat-device-tree as possible to -describe the devices on the SOC. This will allow for the -genericization of much of the kernel code. - - -1) Defining child nodes of an SOC ---------------------------------- - -Each device that is part of an SOC may have its own node entry inside -the SOC node. For each device that is included in the SOC, the unit -address property represents the address offset for this device's -memory-mapped registers in the parent's address space. The parent's -address space is defined by the "ranges" property in the top-level soc -node. The "reg" property for each node that exists directly under the -SOC node should contain the address mapping from the child address space -to the parent SOC address space and the size of the device's -memory-mapped register file. - -For many devices that may exist inside an SOC, there are predefined -specifications for the format of the device tree node. All SOC child -nodes should follow these specifications, except where noted in this -document. - -See appendix A for an example partial SOC node definition for the -MPC8540. - - -2) Representing devices without a current OF specification ----------------------------------------------------------- - -Currently, there are many devices on SoCs that do not have a standard -representation defined as part of the Open Firmware specifications, -mainly because the boards that contain these SoCs are not currently -booted using Open Firmware. Binding documentation for new devices -should be added to the Documentation/devicetree/bindings directory. -That directory will expand as device tree support is added to more and -more SoCs. - - -VII - Specifying interrupt information for devices -=================================================== - -The device tree represents the buses and devices of a hardware -system in a form similar to the physical bus topology of the -hardware. - -In addition, a logical 'interrupt tree' exists which represents the -hierarchy and routing of interrupts in the hardware. - -The interrupt tree model is fully described in the -document "Open Firmware Recommended Practice: Interrupt -Mapping Version 0.9". The document is available at: - - -1) interrupts property ----------------------- - -Devices that generate interrupts to a single interrupt controller -should use the conventional OF representation described in the -OF interrupt mapping documentation. - -Each device which generates interrupts must have an 'interrupt' -property. The interrupt property value is an arbitrary number of -of 'interrupt specifier' values which describe the interrupt or -interrupts for the device. - -The encoding of an interrupt specifier is determined by the -interrupt domain in which the device is located in the -interrupt tree. The root of an interrupt domain specifies in -its #interrupt-cells property the number of 32-bit cells -required to encode an interrupt specifier. See the OF interrupt -mapping documentation for a detailed description of domains. - -For example, the binding for the OpenPIC interrupt controller -specifies an #interrupt-cells value of 2 to encode the interrupt -number and level/sense information. All interrupt children in an -OpenPIC interrupt domain use 2 cells per interrupt in their interrupts -property. - -The PCI bus binding specifies a #interrupt-cells value of 1 to encode -which interrupt pin (INTA,INTB,INTC,INTD) is used. - -2) interrupt-parent property ----------------------------- - -The interrupt-parent property is specified to define an explicit -link between a device node and its interrupt parent in -the interrupt tree. The value of interrupt-parent is the -phandle of the parent node. - -If the interrupt-parent property is not defined for a node, its -interrupt parent is assumed to be an ancestor in the node's -*device tree* hierarchy. - -3) OpenPIC Interrupt Controllers --------------------------------- - -OpenPIC interrupt controllers require 2 cells to encode -interrupt information. The first cell defines the interrupt -number. The second cell defines the sense and level -information. - -Sense and level information should be encoded as follows: - - == ======================================== - 0 low to high edge sensitive type enabled - 1 active low level sensitive type enabled - 2 active high level sensitive type enabled - 3 high to low edge sensitive type enabled - == ======================================== - -4) ISA Interrupt Controllers ----------------------------- - -ISA PIC interrupt controllers require 2 cells to encode -interrupt information. The first cell defines the interrupt -number. The second cell defines the sense and level -information. - -ISA PIC interrupt controllers should adhere to the ISA PIC -encodings listed below: - - == ======================================== - 0 active low level sensitive type enabled - 1 active high level sensitive type enabled - 2 high to low edge sensitive type enabled - 3 low to high edge sensitive type enabled - == ======================================== - -VIII - Specifying Device Power Management Information (sleep property) -====================================================================== - -Devices on SOCs often have mechanisms for placing devices into low-power -states that are decoupled from the devices' own register blocks. Sometimes, -this information is more complicated than a cell-index property can -reasonably describe. Thus, each device controlled in such a manner -may contain a "sleep" property which describes these connections. - -The sleep property consists of one or more sleep resources, each of -which consists of a phandle to a sleep controller, followed by a -controller-specific sleep specifier of zero or more cells. - -The semantics of what type of low power modes are possible are defined -by the sleep controller. Some examples of the types of low power modes -that may be supported are: - - - Dynamic: The device may be disabled or enabled at any time. - - System Suspend: The device may request to be disabled or remain - awake during system suspend, but will not be disabled until then. - - Permanent: The device is disabled permanently (until the next hard - reset). - -Some devices may share a clock domain with each other, such that they should -only be suspended when none of the devices are in use. Where reasonable, -such nodes should be placed on a virtual bus, where the bus has the sleep -property. If the clock domain is shared among devices that cannot be -reasonably grouped in this manner, then create a virtual sleep controller -(similar to an interrupt nexus, except that defining a standardized -sleep-map should wait until its necessity is demonstrated). - -IX - Specifying dma bus information -=================================== - -Some devices may have DMA memory range shifted relatively to the beginning of -RAM, or even placed outside of kernel RAM. For example, the Keystone 2 SoC -worked in LPAE mode with 4G memory has: -- RAM range: [0x8 0000 0000, 0x8 FFFF FFFF] -- DMA range: [ 0x8000 0000, 0xFFFF FFFF] -and DMA range is aliased into first 2G of RAM in HW. - -In such cases, DMA addresses translation should be performed between CPU phys -and DMA addresses. The "dma-ranges" property is intended to be used -for describing the configuration of such system in DT. - -In addition, each DMA master device on the DMA bus may or may not support -coherent DMA operations. The "dma-coherent" property is intended to be used -for identifying devices supported coherent DMA operations in DT. - -* DMA Bus master - -Optional property: - -- dma-ranges: encoded as arbitrary number of triplets of - (child-bus-address, parent-bus-address, length). Each triplet specified - describes a contiguous DMA address range. - The dma-ranges property is used to describe the direct memory access (DMA) - structure of a memory-mapped bus whose device tree parent can be accessed - from DMA operations originating from the bus. It provides a means of - defining a mapping or translation between the physical address space of - the bus and the physical address space of the parent of the bus. - (for more information see the Devicetree Specification) - -* DMA Bus child - -Optional property: - -- dma-ranges: value. if present - It means that DMA addresses - translation has to be enabled for this device. -- dma-coherent: Present if dma operations are coherent - -Example:: - - soc { - compatible = "ti,keystone","simple-bus"; - ranges = <0x0 0x0 0x0 0xc0000000>; - dma-ranges = <0x80000000 0x8 0x00000000 0x80000000>; - - [...] - - usb: usb@2680000 { - compatible = "ti,keystone-dwc3"; - - [...] - dma-coherent; - }; - }; - -Appendix A - Sample SOC node for MPC8540 -======================================== - -:: - - soc@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8540-ccsr", "simple-bus"; - device_type = "soc"; - ranges = <0x00000000 0xe0000000 0x00100000> - bus-frequency = <0>; - interrupt-parent = <&pic>; - - ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar", "simple-bus"; - reg = <0x24000 0x1000>; - local-mac-address = [ 0x00 0xE0 0x0C 0x00 0x73 0x00 ]; - interrupts = <0x29 2 0x30 2 0x34 2>; - phy-handle = <&phy0>; - sleep = <&pmc 0x00000080>; - ranges; - - mdio@24520 { - reg = <0x24520 0x20>; - compatible = "fsl,gianfar-mdio"; - - phy0: ethernet-phy@0 { - interrupts = <5 1>; - reg = <0>; - }; - - phy1: ethernet-phy@1 { - interrupts = <5 1>; - reg = <1>; - }; - - phy3: ethernet-phy@3 { - interrupts = <7 1>; - reg = <3>; - }; - }; - }; - - ethernet@25000 { - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - local-mac-address = [ 0x00 0xE0 0x0C 0x00 0x73 0x01 ]; - interrupts = <0x13 2 0x14 2 0x18 2>; - phy-handle = <&phy1>; - sleep = <&pmc 0x00000040>; - }; - - ethernet@26000 { - device_type = "network"; - model = "FEC"; - compatible = "gianfar"; - reg = <0x26000 0x1000>; - local-mac-address = [ 0x00 0xE0 0x0C 0x00 0x73 0x02 ]; - interrupts = <0x41 2>; - phy-handle = <&phy3>; - sleep = <&pmc 0x00000020>; - }; - - serial@4500 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8540-duart", "simple-bus"; - sleep = <&pmc 0x00000002>; - ranges; - - serial@4500 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <0x42 2>; - }; - - serial@4600 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <0x42 2>; - }; - }; - - pic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - i2c@3000 { - interrupts = <0x43 2>; - reg = <0x3000 0x100>; - compatible = "fsl-i2c"; - dfsrr; - sleep = <&pmc 0x00000004>; - }; - - pmc: power@e0070 { - compatible = "fsl,mpc8540-pmc", "fsl,mpc8548-pmc"; - reg = <0xe0070 0x20>; - }; - }; diff --git a/Documentation/devicetree/index.rst b/Documentation/devicetree/index.rst index d2a96e1af23e..54026763916d 100644 --- a/Documentation/devicetree/index.rst +++ b/Documentation/devicetree/index.rst @@ -15,4 +15,3 @@ Open Firmware and Device Tree overlay-notes bindings/index - booting-without-of diff --git a/Documentation/mips/booting.rst b/Documentation/mips/booting.rst new file mode 100644 index 000000000000..7c18a4eab48b --- /dev/null +++ b/Documentation/mips/booting.rst @@ -0,0 +1,28 @@ +.. SPDX-License-Identifier: GPL-2.0 + +BMIPS DeviceTree Booting +------------------------ + + Some bootloaders only support a single entry point, at the start of the + kernel image. Other bootloaders will jump to the ELF start address. + Both schemes are supported; CONFIG_BOOT_RAW=y and CONFIG_NO_EXCEPT_FILL=y, + so the first instruction immediately jumps to kernel_entry(). + + Similar to the arch/arm case (b), a DT-aware bootloader is expected to + set up the following registers: + + a0 : 0 + + a1 : 0xffffffff + + a2 : Physical pointer to the device tree block (defined in chapter + II) in RAM. The device tree can be located anywhere in the first + 512MB of the physical address space (0x00000000 - 0x1fffffff), + aligned on a 64 bit boundary. + + Legacy bootloaders do not use this convention, and they do not pass in a + DT block. In this case, Linux will look for a builtin DTB, selected via + CONFIG_DT_*. + + This convention is defined for 32-bit systems only, as there are not + currently any 64-bit BMIPS implementations. diff --git a/Documentation/mips/index.rst b/Documentation/mips/index.rst index d5ad8c00f0bd..35cceea4e8bc 100644 --- a/Documentation/mips/index.rst +++ b/Documentation/mips/index.rst @@ -8,6 +8,7 @@ MIPS-specific Documentation :maxdepth: 2 :numbered: + booting ingenic-tcu .. only:: subproject and html diff --git a/Documentation/powerpc/booting.rst b/Documentation/powerpc/booting.rst new file mode 100644 index 000000000000..2d0ec2ff2b57 --- /dev/null +++ b/Documentation/powerpc/booting.rst @@ -0,0 +1,110 @@ +.. SPDX-License-Identifier: GPL-2.0 + +DeviceTree Booting +------------------ + +During the development of the Linux/ppc64 kernel, and more specifically, the +addition of new platform types outside of the old IBM pSeries/iSeries pair, it +was decided to enforce some strict rules regarding the kernel entry and +bootloader <-> kernel interfaces, in order to avoid the degeneration that had +become the ppc32 kernel entry point and the way a new platform should be added +to the kernel. The legacy iSeries platform breaks those rules as it predates +this scheme, but no new board support will be accepted in the main tree that +doesn't follow them properly. In addition, since the advent of the arch/powerpc +merged architecture for ppc32 and ppc64, new 32-bit platforms and 32-bit +platforms which move into arch/powerpc will be required to use these rules as +well. + +The main requirement that will be defined in more detail below is the presence +of a device-tree whose format is defined after Open Firmware specification. +However, in order to make life easier to embedded board vendors, the kernel +doesn't require the device-tree to represent every device in the system and only +requires some nodes and properties to be present. For example, the kernel does +not require you to create a node for every PCI device in the system. It is a +requirement to have a node for PCI host bridges in order to provide interrupt +routing information and memory/IO ranges, among others. It is also recommended +to define nodes for on chip devices and other buses that don't specifically fit +in an existing OF specification. This creates a great flexibility in the way the +kernel can then probe those and match drivers to device, without having to hard +code all sorts of tables. It also makes it more flexible for board vendors to do +minor hardware upgrades without significantly impacting the kernel code or +cluttering it with special cases. + + +Entry point +~~~~~~~~~~~ + +There is one single entry point to the kernel, at the start +of the kernel image. That entry point supports two calling +conventions: + + a) Boot from Open Firmware. If your firmware is compatible + with Open Firmware (IEEE 1275) or provides an OF compatible + client interface API (support for "interpret" callback of + forth words isn't required), you can enter the kernel with: + + r5 : OF callback pointer as defined by IEEE 1275 + bindings to powerpc. Only the 32-bit client interface + is currently supported + + r3, r4 : address & length of an initrd if any or 0 + + The MMU is either on or off; the kernel will run the + trampoline located in arch/powerpc/kernel/prom_init.c to + extract the device-tree and other information from open + firmware and build a flattened device-tree as described + in b). prom_init() will then re-enter the kernel using + the second method. This trampoline code runs in the + context of the firmware, which is supposed to handle all + exceptions during that time. + + b) Direct entry with a flattened device-tree block. This entry + point is called by a) after the OF trampoline and can also be + called directly by a bootloader that does not support the Open + Firmware client interface. It is also used by "kexec" to + implement "hot" booting of a new kernel from a previous + running one. This method is what I will describe in more + details in this document, as method a) is simply standard Open + Firmware, and thus should be implemented according to the + various standard documents defining it and its binding to the + PowerPC platform. The entry point definition then becomes: + + r3 : physical pointer to the device-tree block + (defined in chapter II) in RAM + + r4 : physical pointer to the kernel itself. This is + used by the assembly code to properly disable the MMU + in case you are entering the kernel with MMU enabled + and a non-1:1 mapping. + + r5 : NULL (as to differentiate with method a) + +Note about SMP entry: Either your firmware puts your other +CPUs in some sleep loop or spin loop in ROM where you can get +them out via a soft reset or some other means, in which case +you don't need to care, or you'll have to enter the kernel +with all CPUs. The way to do that with method b) will be +described in a later revision of this document. + +Board supports (platforms) are not exclusive config options. An +arbitrary set of board supports can be built in a single kernel +image. The kernel will "know" what set of functions to use for a +given platform based on the content of the device-tree. Thus, you +should: + + a) add your platform support as a _boolean_ option in + arch/powerpc/Kconfig, following the example of PPC_PSERIES, + PPC_PMAC and PPC_MAPLE. The later is probably a good + example of a board support to start from. + + b) create your main platform file as + "arch/powerpc/platforms/myplatform/myboard_setup.c" and add it + to the Makefile under the condition of your ``CONFIG_`` + option. This file will define a structure of type "ppc_md" + containing the various callbacks that the generic code will + use to get to your platform specific code + +A kernel image may support multiple platforms, but only if the +platforms feature the same core architecture. A single kernel build +cannot support both configurations with Book E and configurations +with classic Powerpc architectures. diff --git a/Documentation/powerpc/index.rst b/Documentation/powerpc/index.rst index 748bf483b1c2..6ec64b0d5257 100644 --- a/Documentation/powerpc/index.rst +++ b/Documentation/powerpc/index.rst @@ -7,6 +7,7 @@ powerpc .. toctree:: :maxdepth: 1 + booting bootwrapper cpu_families cpu_features diff --git a/Documentation/sh/booting.rst b/Documentation/sh/booting.rst new file mode 100644 index 000000000000..d851c49a01bf --- /dev/null +++ b/Documentation/sh/booting.rst @@ -0,0 +1,12 @@ +.. SPDX-License-Identifier: GPL-2.0 + +DeviceTree Booting +------------------ + + Device-tree compatible SH bootloaders are expected to provide the physical + address of the device tree blob in r4. Since legacy bootloaders did not + guarantee any particular initial register state, kernels built to + inter-operate with old bootloaders must either use a builtin DTB or + select a legacy board option (something other than CONFIG_SH_DEVICE_TREE) + that does not use device tree. Support for the latter is being phased out + in favor of device tree. diff --git a/Documentation/sh/index.rst b/Documentation/sh/index.rst index b5933fd399f3..7b9a79a28167 100644 --- a/Documentation/sh/index.rst +++ b/Documentation/sh/index.rst @@ -7,6 +7,7 @@ SuperH Interfaces Guide .. toctree:: :maxdepth: 1 + booting new-machine register-banks diff --git a/Documentation/x86/booting-dt.rst b/Documentation/x86/booting-dt.rst new file mode 100644 index 000000000000..965a374071ab --- /dev/null +++ b/Documentation/x86/booting-dt.rst @@ -0,0 +1,21 @@ +.. SPDX-License-Identifier: GPL-2.0 + +DeviceTree Booting +------------------ + + There is one single 32bit entry point to the kernel at code32_start, + the decompressor (the real mode entry point goes to the same 32bit + entry point once it switched into protected mode). That entry point + supports one calling convention which is documented in + Documentation/x86/boot.rst + The physical pointer to the device-tree block is passed via setup_data + which requires at least boot protocol 2.09. + The type filed is defined as + + #define SETUP_DTB 2 + + This device-tree is used as an extension to the "boot page". As such it + does not parse / consider data which is already covered by the boot + page. This includes memory size, reserved ranges, command line arguments + or initrd address. It simply holds information which can not be retrieved + otherwise like interrupt routing or a list of devices behind an I2C bus. diff --git a/Documentation/x86/index.rst b/Documentation/x86/index.rst index 265d9e9a093b..1faf44f551bd 100644 --- a/Documentation/x86/index.rst +++ b/Documentation/x86/index.rst @@ -9,6 +9,7 @@ x86-specific Documentation :numbered: boot + booting-dt topology exception-tables kernel-stacks From faaa30dd1f4bb6ec5eeea751ebde8076375b916c Mon Sep 17 00:00:00 2001 From: Zhen Lei Date: Wed, 14 Oct 2020 00:08:42 +0800 Subject: [PATCH 431/433] spi: dt-bindings: spi-controller: explicitly require #address-cells=<0> for slave mode scripts/dtc/checks.c: if (get_property(node, "spi-slave")) spi_addr_cells = 0; if (node_addr_cells(node) != spi_addr_cells) FAIL(c, dti, node, "incorrect #address-cells for SPI bus"); if (node_size_cells(node) != 0) FAIL(c, dti, node, "incorrect #size-cells for SPI bus"); The above code in check_spi_bus_bridge() require that the number of address cells must be 0. So we should explicitly declare "#address-cells = <0>". Signed-off-by: Zhen Lei Link: https://lore.kernel.org/r/20201013160845.1772-4-thunder.leizhen@huawei.com Signed-off-by: Rob Herring --- .../bindings/spi/spi-controller.yaml | 20 +++++++++++++------ 1 file changed, 14 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/spi/spi-controller.yaml b/Documentation/devicetree/bindings/spi/spi-controller.yaml index 2b154803b181..1b56d5e40f1f 100644 --- a/Documentation/devicetree/bindings/spi/spi-controller.yaml +++ b/Documentation/devicetree/bindings/spi/spi-controller.yaml @@ -20,7 +20,7 @@ properties: pattern: "^spi(@.*|-[0-9a-f])*$" "#address-cells": - const: 1 + enum: [0, 1] "#size-cells": const: 0 @@ -52,11 +52,19 @@ properties: description: The SPI controller acts as a slave, instead of a master. -oneOf: - - required: - - "#address-cells" - - required: - - spi-slave +allOf: + - if: + not: + required: + - spi-slave + then: + properties: + "#address-cells": + const: 1 + else: + properties: + "#address-cells": + const: 0 patternProperties: "^slave$": From bd36e51d10e7c2b7d39ffa7d075aed98a8e7473c Mon Sep 17 00:00:00 2001 From: Zhen Lei Date: Wed, 14 Oct 2020 00:08:43 +0800 Subject: [PATCH 432/433] dt-bindings: misc: explicitly add #address-cells for slave mode Explicitly add "#address-cells = <0>" and "#size-cells = <0>" to eliminate below warnings. (spi_bus_bridge): /example-0/spi: incorrect #address-cells for SPI bus (spi_bus_bridge): /example-0/spi: incorrect #size-cells for SPI bus (spi_bus_reg): Failed prerequisite 'spi_bus_bridge' Signed-off-by: Zhen Lei Link: https://lore.kernel.org/r/20201013160845.1772-5-thunder.leizhen@huawei.com Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/misc/olpc,xo1.75-ec.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/misc/olpc,xo1.75-ec.yaml b/Documentation/devicetree/bindings/misc/olpc,xo1.75-ec.yaml index ade733cd60f7..b3c45c046ba5 100644 --- a/Documentation/devicetree/bindings/misc/olpc,xo1.75-ec.yaml +++ b/Documentation/devicetree/bindings/misc/olpc,xo1.75-ec.yaml @@ -42,6 +42,8 @@ examples: spi { spi-slave; + #address-cells = <0>; + #size-cells = <0>; ready-gpios = <&gpio 125 GPIO_ACTIVE_HIGH>; slave { From e6037a753e8e9a4146f7d94c32eb30a6717c9c70 Mon Sep 17 00:00:00 2001 From: "Jason A. Donenfeld" Date: Thu, 15 Oct 2020 01:02:09 +0200 Subject: [PATCH 433/433] powerpc32: don't adjust unmoved stack pointer in csum_partial_copy_generic() epilogue A recent change to the checksum code removed usage of some extra arguments, alongside with storage on the stack for those, and the stack pointer no longer needed to be adjusted in the function prologue. But a left over subtraction wasn't removed in the function epilogue, causing the function to return with the stack pointer moved 16 bytes away from where it should have. This corrupted local state and lead to weird crashes. This simply removes the leftover instruction from the epilogue. Fixes: 70d65cd555c5 ("ppc: propagate the calling conventions change down to csum_partial_copy_generic()") Cc: Al Viro Signed-off-by: Jason A. Donenfeld Signed-off-by: Linus Torvalds --- arch/powerpc/lib/checksum_32.S | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/powerpc/lib/checksum_32.S b/arch/powerpc/lib/checksum_32.S index ec5cd2dede35..27d9070617df 100644 --- a/arch/powerpc/lib/checksum_32.S +++ b/arch/powerpc/lib/checksum_32.S @@ -236,7 +236,6 @@ _GLOBAL(csum_partial_copy_generic) slwi r0,r0,8 adde r12,r12,r0 66: addze r3,r12 - addi r1,r1,16 beqlr+ cr7 rlwinm r3,r3,8,0,31 /* odd destination address: rotate one byte */ blr