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ANDROID: dt-bindings: interconnect: Add generic PWR_ST tags

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Add generic PWR_ST tags that can be used when there are more logical
aggregation buckets than just AMC, WAKE, and SLEEP.

Also add binding for QCOM_ICC_TAG_PERF_MODE, which can be used with
icc_set_tag() to indicate that the path should use latency-optimized
settings for each node in the path if supported.

Bug: 338086214
Change-Id: I26c9bb5bcba24963b6c7cf527c3a13a532aeffe3
Signed-off-by: Mike Tipton <quic_mdtipton@quicinc.com>
Signed-off-by: Xubin Bai <quic_xubibai@quicinc.com>
Signed-off-by: Vivek Aknurwar <quic_viveka@quicinc.com>
This commit is contained in:
Mike Tipton
2022-10-31 10:51:14 -07:00
committed by Treehugger Robot
parent 4110765294
commit a06ae4889c
1 changed files with 23 additions and 4 deletions
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include/dt-bindings/interconnect/qcom,icc.h
+23 -4
View File
@@ -1,20 +1,27 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_ICC_H
#define __DT_BINDINGS_INTERCONNECT_QCOM_ICC_H
#define QCOM_ICC_BUCKET_0 0
#define QCOM_ICC_BUCKET_1 1
#define QCOM_ICC_BUCKET_2 2
#define QCOM_ICC_BUCKET_3 3
#define QCOM_ICC_BUCKET_4 4
#define QCOM_ICC_NUM_BUCKETS 5
/*
* The AMC bucket denotes constraints that are applied to hardware when
* icc_set_bw() completes, whereas the WAKE and SLEEP constraints are applied
* when the execution environment transitions between active and low power mode.
*/
#define QCOM_ICC_BUCKET_AMC 0
#define QCOM_ICC_BUCKET_WAKE 1
#define QCOM_ICC_BUCKET_SLEEP 2
#define QCOM_ICC_NUM_BUCKETS 3
#define QCOM_ICC_BUCKET_AMC QCOM_ICC_BUCKET_0
#define QCOM_ICC_BUCKET_WAKE QCOM_ICC_BUCKET_1
#define QCOM_ICC_BUCKET_SLEEP QCOM_ICC_BUCKET_2
#define QCOM_ICC_TAG_AMC (1 << QCOM_ICC_BUCKET_AMC)
#define QCOM_ICC_TAG_WAKE (1 << QCOM_ICC_BUCKET_WAKE)
@@ -23,4 +30,16 @@
#define QCOM_ICC_TAG_ALWAYS (QCOM_ICC_TAG_AMC | QCOM_ICC_TAG_WAKE |\
QCOM_ICC_TAG_SLEEP)
#define QCOM_ICC_TAG_PWR_ST_0 (1 << QCOM_ICC_BUCKET_0)
#define QCOM_ICC_TAG_PWR_ST_1 (1 << QCOM_ICC_BUCKET_1)
#define QCOM_ICC_TAG_PWR_ST_2 (1 << QCOM_ICC_BUCKET_2)
#define QCOM_ICC_TAG_PWR_ST_3 (1 << QCOM_ICC_BUCKET_3)
#define QCOM_ICC_TAG_PWR_ST_4 (1 << QCOM_ICC_BUCKET_4)
/*
* PERF_MODE indicates that each node in the requested path should use
* performance-optimized settings if supported by the node.
*/
#define QCOM_ICC_TAG_PERF_MODE (1 << 8)
#endif