From 99260f415c76c11047cab6368a8cc68b518d5100 Mon Sep 17 00:00:00 2001 From: Aaron Kling Date: Sat, 23 Aug 2025 16:03:28 -0500 Subject: [PATCH] arm64: tegra: Add CPU OPP tables for Tegra186 Add OPP table and interconnects property to scale DDR frequency with CPU frequency for better performance. Each operating point entry of the OPP table has CPU freq to per MC channel bandwidth mapping. One table is added for each cluster because the different cpu types have different scaling curves. Signed-off-by: Aaron Kling --- arch/arm64/boot/dts/nvidia/tegra186.dtsi | 317 +++++++++++++++++++++++ 1 file changed, 317 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi index 044ea0f26ccb..3a263bc76c81 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi @@ -1967,6 +1967,8 @@ denver_0: cpu@0 { compatible = "nvidia,tegra186-denver"; device_type = "cpu"; + operating-points-v2 = <&dnv_opp_tbl>; + interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER0 &emc>; i-cache-size = <0x20000>; i-cache-line-size = <64>; i-cache-sets = <512>; @@ -1980,6 +1982,8 @@ denver_1: cpu@1 { compatible = "nvidia,tegra186-denver"; device_type = "cpu"; + operating-points-v2 = <&dnv_opp_tbl>; + interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER0 &emc>; i-cache-size = <0x20000>; i-cache-line-size = <64>; i-cache-sets = <512>; @@ -1993,6 +1997,8 @@ ca57_0: cpu@2 { compatible = "arm,cortex-a57"; device_type = "cpu"; + operating-points-v2 = <&a57_opp_tbl>; + interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER1 &emc>; i-cache-size = <0xC000>; i-cache-line-size = <64>; i-cache-sets = <256>; @@ -2006,6 +2012,8 @@ ca57_1: cpu@3 { compatible = "arm,cortex-a57"; device_type = "cpu"; + operating-points-v2 = <&a57_opp_tbl>; + interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER1 &emc>; i-cache-size = <0xC000>; i-cache-line-size = <64>; i-cache-sets = <256>; @@ -2019,6 +2027,8 @@ ca57_2: cpu@4 { compatible = "arm,cortex-a57"; device_type = "cpu"; + operating-points-v2 = <&a57_opp_tbl>; + interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER1 &emc>; i-cache-size = <0xC000>; i-cache-line-size = <64>; i-cache-sets = <256>; @@ -2032,6 +2042,8 @@ ca57_3: cpu@5 { compatible = "arm,cortex-a57"; device_type = "cpu"; + operating-points-v2 = <&a57_opp_tbl>; + interconnects = <&mc TEGRA_ICC_MC_CPU_CLUSTER1 &emc>; i-cache-size = <0xC000>; i-cache-line-size = <64>; i-cache-sets = <256>; @@ -2206,4 +2218,309 @@ interrupt-parent = <&gic>; always-on; }; + + dnv_opp_tbl: opp-table-cluster0 { + compatible = "operating-points-v2"; + opp-shared; + + opp-998400000 { + opp-hz = /bits/ 64 <998400000>; + opp-peak-kBps = <816000>; + }; + + opp-1036800000 { + opp-hz = /bits/ 64 <1036800000>; + opp-peak-kBps = <816000>; + }; + + opp-1075200000 { + opp-hz = /bits/ 64 <1075200000>; + opp-peak-kBps = <816000>; + }; + + opp-1113600000 { + opp-hz = /bits/ 64 <1113600000>; + opp-peak-kBps = <1600000>; + }; + + opp-1152000000 { + opp-hz = /bits/ 64 <1152000000>; + opp-peak-kBps = <1600000>; + }; + + opp-1190400000 { + opp-hz = /bits/ 64 <1190400000>; + opp-peak-kBps = <1600000>; + }; + + opp-1228800000 { + opp-hz = /bits/ 64 <1228800000>; + opp-peak-kBps = <1600000>; + }; + + opp-1267200000 { + opp-hz = /bits/ 64 <1267200000>; + opp-peak-kBps = <1600000>; + }; + + opp-1305600000 { + opp-hz = /bits/ 64 <1305600000>; + opp-peak-kBps = <1600000>; + }; + + opp-1344000000 { + opp-hz = /bits/ 64 <1344000000>; + opp-peak-kBps = <1600000>; + }; + + opp-1382400000 { + opp-hz = /bits/ 64 <1382400000>; + opp-peak-kBps = <1600000>; + }; + + opp-1420800000 { + opp-hz = /bits/ 64 <1420800000>; + opp-peak-kBps = <1600000>; + }; + + opp-1459200000 { + opp-hz = /bits/ 64 <1459200000>; + opp-peak-kBps = <3200000>; + }; + + opp-1497600000 { + opp-hz = /bits/ 64 <1497600000>; + opp-peak-kBps = <3200000>; + }; + + opp-1536000000 { + opp-hz = /bits/ 64 <1536000000>; + opp-peak-kBps = <3200000>; + }; + + opp-1574400000 { + opp-hz = /bits/ 64 <1574400000>; + opp-peak-kBps = <3200000>; + }; + + opp-1612800000 { + opp-hz = /bits/ 64 <1612800000>; + opp-peak-kBps = <3200000>; + }; + + opp-1651200000 { + opp-hz = /bits/ 64 <1651200000>; + opp-peak-kBps = <3200000>; + }; + + opp-1689600000 { + opp-hz = /bits/ 64 <1689600000>; + opp-peak-kBps = <3200000>; + }; + + opp-1728000000 { + opp-hz = /bits/ 64 <1728000000>; + opp-peak-kBps = <3200000>; + }; + + opp-1766400000 { + opp-hz = /bits/ 64 <1766400000>; + opp-peak-kBps = <3200000>; + }; + + opp-1804800000 { + opp-hz = /bits/ 64 <1804800000>; + opp-peak-kBps = <3200000>; + }; + + opp-1843200000 { + opp-hz = /bits/ 64 <1843200000>; + opp-peak-kBps = <3200000>; + }; + + opp-1881600000 { + opp-hz = /bits/ 64 <1881600000>; + opp-peak-kBps = <3200000>; + }; + + opp-1920000000 { + opp-hz = /bits/ 64 <1920000000>; + opp-peak-kBps = <3200000>; + }; + + opp-1958400000 { + opp-hz = /bits/ 64 <1958400000>; + opp-peak-kBps = <3200000>; + }; + + opp-1996800000 { + opp-hz = /bits/ 64 <1996800000>; + opp-peak-kBps = <3732000>; + }; + + opp-2035200000 { + opp-hz = /bits/ 64 <2035200000>; + opp-peak-kBps = <3732000>; + }; + }; + + a57_opp_tbl: opp-table-cluster1 { + compatible = "operating-points-v2"; + opp-shared; + + opp-883200000 { + opp-hz = /bits/ 64 <883200000>; + opp-peak-kBps = <816000>; + }; + + opp-921600000 { + opp-hz = /bits/ 64 <921600000>; + opp-peak-kBps = <816000>; + }; + + opp-960000000 { + opp-hz = /bits/ 64 <960000000>; + opp-peak-kBps = <816000>; + }; + + opp-998400000 { + opp-hz = /bits/ 64 <998400000>; + opp-peak-kBps = <816000>; + }; + + opp-1036800000 { + opp-hz = /bits/ 64 <1036800000>; + opp-peak-kBps = <816000>; + }; + + opp-1075200000 { + opp-hz = /bits/ 64 <1075200000>; + opp-peak-kBps = <816000>; + }; + + opp-1113600000 { + opp-hz = /bits/ 64 <1113600000>; + opp-peak-kBps = <1600000>; + }; + + opp-1152000000 { + opp-hz = /bits/ 64 <1152000000>; + opp-peak-kBps = <1600000>; + }; + + opp-1190400000 { + opp-hz = /bits/ 64 <1190400000>; + opp-peak-kBps = <1600000>; + }; + + opp-1228800000 { + opp-hz = /bits/ 64 <1228800000>; + opp-peak-kBps = <1600000>; + }; + + opp-1267200000 { + opp-hz = /bits/ 64 <1267200000>; + opp-peak-kBps = <1600000>; + }; + + opp-1305600000 { + opp-hz = /bits/ 64 <1305600000>; + opp-peak-kBps = <1600000>; + }; + + opp-1344000000 { + opp-hz = /bits/ 64 <1344000000>; + opp-peak-kBps = <1600000>; + }; + + opp-1382400000 { + opp-hz = /bits/ 64 <1382400000>; + opp-peak-kBps = <1600000>; + }; + + opp-1420800000 { + opp-hz = /bits/ 64 <1420800000>; + opp-peak-kBps = <1600000>; + }; + + opp-1459200000 { + opp-hz = /bits/ 64 <1459200000>; + opp-peak-kBps = <3200000>; + }; + + opp-1497600000 { + opp-hz = /bits/ 64 <1497600000>; + opp-peak-kBps = <3200000>; + }; + + opp-1536000000 { + opp-hz = /bits/ 64 <1536000000>; + opp-peak-kBps = <3200000>; + }; + + opp-1574400000 { + opp-hz = /bits/ 64 <1574400000>; + opp-peak-kBps = <3200000>; + }; + + opp-1612800000 { + opp-hz = /bits/ 64 <1612800000>; + opp-peak-kBps = <3200000>; + }; + + opp-1651200000 { + opp-hz = /bits/ 64 <1651200000>; + opp-peak-kBps = <3200000>; + }; + + opp-1689600000 { + opp-hz = /bits/ 64 <1689600000>; + opp-peak-kBps = <3200000>; + }; + + opp-1728000000 { + opp-hz = /bits/ 64 <1728000000>; + opp-peak-kBps = <3200000>; + }; + + opp-1766400000 { + opp-hz = /bits/ 64 <1766400000>; + opp-peak-kBps = <3200000>; + }; + + opp-1804800000 { + opp-hz = /bits/ 64 <1804800000>; + opp-peak-kBps = <3200000>; + }; + + opp-1843200000 { + opp-hz = /bits/ 64 <1843200000>; + opp-peak-kBps = <3200000>; + }; + + opp-1881600000 { + opp-hz = /bits/ 64 <1881600000>; + opp-peak-kBps = <3200000>; + }; + + opp-1920000000 { + opp-hz = /bits/ 64 <1920000000>; + opp-peak-kBps = <3200000>; + }; + + opp-1958400000 { + opp-hz = /bits/ 64 <1958400000>; + opp-peak-kBps = <3200000>; + }; + + opp-1996800000 { + opp-hz = /bits/ 64 <1996800000>; + opp-peak-kBps = <3732000>; + }; + + opp-2035200000 { + opp-hz = /bits/ 64 <2035200000>; + opp-peak-kBps = <3732000>; + }; + }; };