Merge branch 'core-iommu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
* 'core-iommu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86, ioapic: Consolidate the explicit EOI code x86, ioapic: Restore the mask bit correctly in eoi_ioapic_irq() x86, kdump, ioapic: Reset remote-IRR in clear_IO_APIC iommu: Rename the DMAR and INTR_REMAP config options x86, ioapic: Define irq_remap_modify_chip_defaults() x86, msi, intr-remap: Use the ioapic set affinity routine iommu: Cleanup ifdefs in detect_intel_iommu() iommu: No need to set dmar_disabled in check_zero_address() iommu: Move IOMMU specific code to intel-iommu.c intr_remap: Call dmar_dev_scope_init() explicitly x86, x2apic: Enable the bios request for x2apic optout
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@@ -25,11 +25,12 @@ struct intel_iommu;
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struct dmar_domain;
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struct root_entry;
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extern void free_dmar_iommu(struct intel_iommu *iommu);
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#ifdef CONFIG_DMAR
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#ifdef CONFIG_INTEL_IOMMU
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extern void free_dmar_iommu(struct intel_iommu *iommu);
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extern int iommu_calculate_agaw(struct intel_iommu *iommu);
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extern int iommu_calculate_max_sagaw(struct intel_iommu *iommu);
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extern int dmar_disabled;
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#else
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static inline int iommu_calculate_agaw(struct intel_iommu *iommu)
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{
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@@ -39,8 +40,11 @@ static inline int iommu_calculate_max_sagaw(struct intel_iommu *iommu)
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{
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return 0;
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}
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static inline void free_dmar_iommu(struct intel_iommu *iommu)
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{
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}
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#define dmar_disabled (1)
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#endif
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extern int dmar_disabled;
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#endif
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+35
-8
@@ -26,8 +26,13 @@
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#include <linux/msi.h>
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#include <linux/irqreturn.h>
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/* DMAR Flags */
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#define DMAR_INTR_REMAP 0x1
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#define DMAR_X2APIC_OPT_OUT 0x2
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struct intel_iommu;
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#if defined(CONFIG_DMAR) || defined(CONFIG_INTR_REMAP)
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#ifdef CONFIG_DMAR_TABLE
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extern struct acpi_table_header *dmar_tbl;
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struct dmar_drhd_unit {
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struct list_head list; /* list of drhd units */
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struct acpi_dmar_header *hdr; /* ACPI header */
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@@ -76,7 +81,7 @@ static inline int enable_drhd_fault_handling(void)
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{
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return -1;
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}
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#endif /* !CONFIG_DMAR && !CONFIG_INTR_REMAP */
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#endif /* !CONFIG_DMAR_TABLE */
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struct irte {
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union {
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@@ -107,10 +112,10 @@ struct irte {
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};
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};
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#ifdef CONFIG_INTR_REMAP
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#ifdef CONFIG_IRQ_REMAP
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extern int intr_remapping_enabled;
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extern int intr_remapping_supported(void);
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extern int enable_intr_remapping(int);
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extern int enable_intr_remapping(void);
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extern void disable_intr_remapping(void);
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extern int reenable_intr_remapping(int);
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@@ -177,7 +182,7 @@ static inline int set_msi_sid(struct irte *irte, struct pci_dev *dev)
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#define intr_remapping_enabled (0)
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static inline int enable_intr_remapping(int eim)
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static inline int enable_intr_remapping(void)
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{
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return -1;
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}
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@@ -192,6 +197,11 @@ static inline int reenable_intr_remapping(int eim)
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}
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#endif
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enum {
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IRQ_REMAP_XAPIC_MODE,
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IRQ_REMAP_X2APIC_MODE,
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};
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/* Can't use the common MSI interrupt functions
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* since DMAR is not a pci device
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*/
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@@ -204,7 +214,7 @@ extern int dmar_set_interrupt(struct intel_iommu *iommu);
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extern irqreturn_t dmar_fault(int irq, void *dev_id);
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extern int arch_setup_dmar_msi(unsigned int irq);
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#ifdef CONFIG_DMAR
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#ifdef CONFIG_INTEL_IOMMU
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extern int iommu_detected, no_iommu;
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extern struct list_head dmar_rmrr_units;
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struct dmar_rmrr_unit {
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@@ -227,9 +237,26 @@ struct dmar_atsr_unit {
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u8 include_all:1; /* include all ports */
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};
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int dmar_parse_rmrr_atsr_dev(void);
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extern int dmar_parse_one_rmrr(struct acpi_dmar_header *header);
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extern int dmar_parse_one_atsr(struct acpi_dmar_header *header);
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extern int dmar_parse_dev_scope(void *start, void *end, int *cnt,
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struct pci_dev ***devices, u16 segment);
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extern int intel_iommu_init(void);
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#else /* !CONFIG_DMAR: */
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#else /* !CONFIG_INTEL_IOMMU: */
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static inline int intel_iommu_init(void) { return -ENODEV; }
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#endif /* CONFIG_DMAR */
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static inline int dmar_parse_one_rmrr(struct acpi_dmar_header *header)
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{
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return 0;
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}
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static inline int dmar_parse_one_atsr(struct acpi_dmar_header *header)
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{
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return 0;
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}
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static inline int dmar_parse_rmrr_atsr_dev(void)
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{
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return 0;
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}
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#endif /* CONFIG_INTEL_IOMMU */
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#endif /* __DMAR_H__ */
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@@ -279,7 +279,7 @@ struct q_inval {
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int free_cnt;
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};
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#ifdef CONFIG_INTR_REMAP
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#ifdef CONFIG_IRQ_REMAP
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/* 1MB - maximum possible interrupt remapping table size */
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#define INTR_REMAP_PAGE_ORDER 8
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#define INTR_REMAP_TABLE_REG_SIZE 0xf
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@@ -318,7 +318,7 @@ struct intel_iommu {
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unsigned int irq;
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unsigned char name[13]; /* Device Name */
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#ifdef CONFIG_DMAR
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#ifdef CONFIG_INTEL_IOMMU
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unsigned long *domain_ids; /* bitmap of domains */
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struct dmar_domain **domains; /* ptr to domains */
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spinlock_t lock; /* protect context, domain ids */
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@@ -329,7 +329,7 @@ struct intel_iommu {
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struct q_inval *qi; /* Queued invalidation info */
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u32 *iommu_state; /* Store iommu states between suspend and resume.*/
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#ifdef CONFIG_INTR_REMAP
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#ifdef CONFIG_IRQ_REMAP
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struct ir_table *ir_table; /* Interrupt remapping info */
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#endif
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int node;
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