Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input: (62 commits) Input: atkbd - release previously reserved keycodes 248 - 254 Input: add KEY_WPS_BUTTON definition Input: ads7846 - add regulator support Input: winbond-cir - fix suspend/resume Input: gamecon - use pr_err() and friends Input: gamecon - constify some of the setup structures Input: gamecon - simplify pad type handling Input: gamecon - simplify coordinate calculation for PSX Input: gamecon - fix some formatting issues Input: gamecon - add rumble support for N64 pads Input: wacom - add device type to device name string Input: s3c24xx_ts - report touch only when stylus is down Input: s3c24xx_ts - re-enable IRQ on resume Input: wacom - constify product features data Input: wacom - use per-device instance of wacom_features Input: sh_keysc - enable building on SH-Mobile ARM Input: wacom - get features from driver info Input: rotary-encoder - set gpio direction for each requested gpio Input: sh_keysc - update the driver with mode 6 Input: sh_keysc - switch to using bitmaps ...
This commit is contained in:
Linus Torvalds
@@ -149,7 +149,7 @@ static void apanel_shutdown(struct i2c_client *client)
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apanel_remove(client);
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}
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static struct i2c_device_id apanel_id[] = {
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static const struct i2c_device_id apanel_id[] = {
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{ "fujitsu_apanel", 0 },
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{ }
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};
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@@ -152,6 +152,13 @@ static int __devinit rotary_encoder_probe(struct platform_device *pdev)
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goto exit_unregister_input;
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}
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err = gpio_direction_input(pdata->gpio_a);
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if (err) {
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dev_err(&pdev->dev, "unable to set GPIO %d for input\n",
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pdata->gpio_a);
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goto exit_unregister_input;
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}
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err = gpio_request(pdata->gpio_b, DRV_NAME);
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if (err) {
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dev_err(&pdev->dev, "unable to request GPIO %d\n",
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@@ -159,6 +166,13 @@ static int __devinit rotary_encoder_probe(struct platform_device *pdev)
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goto exit_free_gpio_a;
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}
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err = gpio_direction_input(pdata->gpio_b);
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if (err) {
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dev_err(&pdev->dev, "unable to set GPIO %d for input\n",
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pdata->gpio_b);
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goto exit_free_gpio_a;
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}
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/* request the IRQs */
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err = request_irq(encoder->irq_a, &rotary_encoder_irq,
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IORESOURCE_IRQ_HIGHEDGE | IORESOURCE_IRQ_LOWEDGE,
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@@ -34,7 +34,6 @@
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#include <linux/slab.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/smp_lock.h>
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#include <linux/fs.h>
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#include <linux/miscdevice.h>
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#include <linux/uinput.h>
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@@ -284,7 +283,6 @@ static int uinput_open(struct inode *inode, struct file *file)
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if (!newdev)
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return -ENOMEM;
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lock_kernel();
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mutex_init(&newdev->mutex);
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spin_lock_init(&newdev->requests_lock);
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init_waitqueue_head(&newdev->requests_waitq);
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@@ -292,7 +290,7 @@ static int uinput_open(struct inode *inode, struct file *file)
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newdev->state = UIST_NEW_DEVICE;
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file->private_data = newdev;
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unlock_kernel();
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nonseekable_open(inode, file);
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return 0;
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}
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+104
-109
@@ -538,6 +538,7 @@ wbcir_reset_irdata(struct wbcir_data *data)
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data->irdata_count = 0;
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data->irdata_off = 0;
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data->irdata_error = 0;
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data->idle_count = 0;
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}
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/* Adds one bit of irdata */
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@@ -1006,7 +1007,6 @@ wbcir_irq_handler(int irqno, void *cookie)
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}
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wbcir_reset_irdata(data);
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data->idle_count = 0;
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}
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out:
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@@ -1018,7 +1018,7 @@ out:
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/*****************************************************************************
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*
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* SUSPEND/RESUME FUNCTIONS
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* SETUP/INIT/SUSPEND/RESUME FUNCTIONS
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*
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*****************************************************************************/
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@@ -1197,7 +1197,16 @@ finish:
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}
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/* Disable interrupts */
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wbcir_select_bank(data, WBCIR_BANK_0);
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outb(WBCIR_IRQ_NONE, data->sbase + WBCIR_REG_SP3_IER);
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/*
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* ACPI will set the HW disable bit for SP3 which means that the
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* output signals are left in an undefined state which may cause
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* spurious interrupts which we need to ignore until the hardware
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* is reinitialized.
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*/
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disable_irq(data->irq);
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}
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static int
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@@ -1207,37 +1216,15 @@ wbcir_suspend(struct pnp_dev *device, pm_message_t state)
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return 0;
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}
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static int
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wbcir_resume(struct pnp_dev *device)
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{
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struct wbcir_data *data = pnp_get_drvdata(device);
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/* Clear BUFF_EN, Clear END_EN, Clear MATCH_EN */
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wbcir_set_bits(data->wbase + WBCIR_REG_WCEIR_EV_EN, 0x00, 0x07);
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/* Clear CEIR_EN */
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wbcir_set_bits(data->wbase + WBCIR_REG_WCEIR_CTL, 0x00, 0x01);
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/* Enable interrupts */
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wbcir_reset_irdata(data);
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outb(WBCIR_IRQ_RX | WBCIR_IRQ_ERR, data->sbase + WBCIR_REG_SP3_IER);
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return 0;
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}
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/*****************************************************************************
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*
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* SETUP/INIT FUNCTIONS
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*
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*****************************************************************************/
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static void
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wbcir_cfg_ceir(struct wbcir_data *data)
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wbcir_init_hw(struct wbcir_data *data)
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{
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u8 tmp;
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/* Disable interrupts */
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wbcir_select_bank(data, WBCIR_BANK_0);
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outb(WBCIR_IRQ_NONE, data->sbase + WBCIR_REG_SP3_IER);
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/* Set PROT_SEL, RX_INV, Clear CEIR_EN (needed for the led) */
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tmp = protocol << 4;
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if (invert)
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@@ -1264,6 +1251,93 @@ wbcir_cfg_ceir(struct wbcir_data *data)
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* set SP3_IRRX_SW to binary 01, helpfully not documented
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*/
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outb(0x10, data->ebase + WBCIR_REG_ECEIR_CTS);
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/* Enable extended mode */
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wbcir_select_bank(data, WBCIR_BANK_2);
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outb(WBCIR_EXT_ENABLE, data->sbase + WBCIR_REG_SP3_EXCR1);
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/*
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* Configure baud generator, IR data will be sampled at
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* a bitrate of: (24Mhz * prescaler) / (divisor * 16).
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*
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* The ECIR registers include a flag to change the
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* 24Mhz clock freq to 48Mhz.
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*
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* It's not documented in the specs, but fifo levels
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* other than 16 seems to be unsupported.
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*/
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/* prescaler 1.0, tx/rx fifo lvl 16 */
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outb(0x30, data->sbase + WBCIR_REG_SP3_EXCR2);
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/* Set baud divisor to generate one byte per bit/cell */
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switch (protocol) {
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case IR_PROTOCOL_RC5:
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outb(0xA7, data->sbase + WBCIR_REG_SP3_BGDL);
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break;
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case IR_PROTOCOL_RC6:
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outb(0x53, data->sbase + WBCIR_REG_SP3_BGDL);
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break;
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case IR_PROTOCOL_NEC:
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outb(0x69, data->sbase + WBCIR_REG_SP3_BGDL);
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break;
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}
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outb(0x00, data->sbase + WBCIR_REG_SP3_BGDH);
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/* Set CEIR mode */
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wbcir_select_bank(data, WBCIR_BANK_0);
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outb(0xC0, data->sbase + WBCIR_REG_SP3_MCR);
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inb(data->sbase + WBCIR_REG_SP3_LSR); /* Clear LSR */
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inb(data->sbase + WBCIR_REG_SP3_MSR); /* Clear MSR */
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/* Disable RX demod, run-length encoding/decoding, set freq span */
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wbcir_select_bank(data, WBCIR_BANK_7);
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outb(0x10, data->sbase + WBCIR_REG_SP3_RCCFG);
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/* Disable timer */
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wbcir_select_bank(data, WBCIR_BANK_4);
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outb(0x00, data->sbase + WBCIR_REG_SP3_IRCR1);
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/* Enable MSR interrupt, Clear AUX_IRX */
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wbcir_select_bank(data, WBCIR_BANK_5);
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outb(0x00, data->sbase + WBCIR_REG_SP3_IRCR2);
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/* Disable CRC */
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wbcir_select_bank(data, WBCIR_BANK_6);
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outb(0x20, data->sbase + WBCIR_REG_SP3_IRCR3);
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/* Set RX/TX (de)modulation freq, not really used */
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wbcir_select_bank(data, WBCIR_BANK_7);
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outb(0xF2, data->sbase + WBCIR_REG_SP3_IRRXDC);
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outb(0x69, data->sbase + WBCIR_REG_SP3_IRTXMC);
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/* Set invert and pin direction */
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if (invert)
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outb(0x10, data->sbase + WBCIR_REG_SP3_IRCFG4);
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else
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outb(0x00, data->sbase + WBCIR_REG_SP3_IRCFG4);
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/* Set FIFO thresholds (RX = 8, TX = 3), reset RX/TX */
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wbcir_select_bank(data, WBCIR_BANK_0);
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outb(0x97, data->sbase + WBCIR_REG_SP3_FCR);
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/* Clear AUX status bits */
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outb(0xE0, data->sbase + WBCIR_REG_SP3_ASCR);
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/* Enable interrupts */
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wbcir_reset_irdata(data);
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outb(WBCIR_IRQ_RX | WBCIR_IRQ_ERR, data->sbase + WBCIR_REG_SP3_IER);
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}
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static int
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wbcir_resume(struct pnp_dev *device)
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{
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struct wbcir_data *data = pnp_get_drvdata(device);
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wbcir_init_hw(data);
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enable_irq(data->irq);
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return 0;
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}
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static int __devinit
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@@ -1393,86 +1467,7 @@ wbcir_probe(struct pnp_dev *device, const struct pnp_device_id *dev_id)
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device_init_wakeup(&device->dev, 1);
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wbcir_cfg_ceir(data);
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/* Disable interrupts */
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wbcir_select_bank(data, WBCIR_BANK_0);
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outb(WBCIR_IRQ_NONE, data->sbase + WBCIR_REG_SP3_IER);
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/* Enable extended mode */
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wbcir_select_bank(data, WBCIR_BANK_2);
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outb(WBCIR_EXT_ENABLE, data->sbase + WBCIR_REG_SP3_EXCR1);
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/*
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* Configure baud generator, IR data will be sampled at
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* a bitrate of: (24Mhz * prescaler) / (divisor * 16).
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*
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* The ECIR registers include a flag to change the
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* 24Mhz clock freq to 48Mhz.
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*
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* It's not documented in the specs, but fifo levels
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* other than 16 seems to be unsupported.
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*/
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/* prescaler 1.0, tx/rx fifo lvl 16 */
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outb(0x30, data->sbase + WBCIR_REG_SP3_EXCR2);
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/* Set baud divisor to generate one byte per bit/cell */
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switch (protocol) {
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case IR_PROTOCOL_RC5:
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outb(0xA7, data->sbase + WBCIR_REG_SP3_BGDL);
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break;
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case IR_PROTOCOL_RC6:
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outb(0x53, data->sbase + WBCIR_REG_SP3_BGDL);
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break;
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case IR_PROTOCOL_NEC:
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outb(0x69, data->sbase + WBCIR_REG_SP3_BGDL);
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break;
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}
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outb(0x00, data->sbase + WBCIR_REG_SP3_BGDH);
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/* Set CEIR mode */
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wbcir_select_bank(data, WBCIR_BANK_0);
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outb(0xC0, data->sbase + WBCIR_REG_SP3_MCR);
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inb(data->sbase + WBCIR_REG_SP3_LSR); /* Clear LSR */
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inb(data->sbase + WBCIR_REG_SP3_MSR); /* Clear MSR */
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/* Disable RX demod, run-length encoding/decoding, set freq span */
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wbcir_select_bank(data, WBCIR_BANK_7);
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outb(0x10, data->sbase + WBCIR_REG_SP3_RCCFG);
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/* Disable timer */
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wbcir_select_bank(data, WBCIR_BANK_4);
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outb(0x00, data->sbase + WBCIR_REG_SP3_IRCR1);
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/* Enable MSR interrupt, Clear AUX_IRX */
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wbcir_select_bank(data, WBCIR_BANK_5);
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outb(0x00, data->sbase + WBCIR_REG_SP3_IRCR2);
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/* Disable CRC */
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wbcir_select_bank(data, WBCIR_BANK_6);
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outb(0x20, data->sbase + WBCIR_REG_SP3_IRCR3);
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/* Set RX/TX (de)modulation freq, not really used */
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wbcir_select_bank(data, WBCIR_BANK_7);
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outb(0xF2, data->sbase + WBCIR_REG_SP3_IRRXDC);
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outb(0x69, data->sbase + WBCIR_REG_SP3_IRTXMC);
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/* Set invert and pin direction */
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if (invert)
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outb(0x10, data->sbase + WBCIR_REG_SP3_IRCFG4);
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else
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outb(0x00, data->sbase + WBCIR_REG_SP3_IRCFG4);
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/* Set FIFO thresholds (RX = 8, TX = 3), reset RX/TX */
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wbcir_select_bank(data, WBCIR_BANK_0);
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outb(0x97, data->sbase + WBCIR_REG_SP3_FCR);
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/* Clear AUX status bits */
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outb(0xE0, data->sbase + WBCIR_REG_SP3_ASCR);
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/* Enable interrupts */
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outb(WBCIR_IRQ_RX | WBCIR_IRQ_ERR, data->sbase + WBCIR_REG_SP3_IER);
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wbcir_init_hw(data);
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return 0;
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Reference in New Issue
Block a user