drm/amdgpu/discovery: use hardcoded mmRCC_CONFIG_MEMSIZE
register base offset of nbio is not known before IP Discovery table is parsed, so hardcode this value. Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
committed by
Alex Deucher
parent
70cbfe3d64
commit
85f267a707
@@ -28,10 +28,11 @@
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#include "nbio/nbio_2_3_offset.h"
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#include "nbio/nbio_2_3_offset.h"
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#include "discovery.h"
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#include "discovery.h"
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#define mmMM_INDEX 0x0
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#define mmRCC_CONFIG_MEMSIZE 0xde3
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#define mmMM_INDEX_HI 0x6
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#define mmMM_INDEX 0x0
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#define mmMM_DATA 0x1
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#define mmMM_INDEX_HI 0x6
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#define HW_ID_MAX 300
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#define mmMM_DATA 0x1
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#define HW_ID_MAX 300
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const char *hw_id_names[HW_ID_MAX] = {
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const char *hw_id_names[HW_ID_MAX] = {
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[MP1_HWID] = "MP1",
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[MP1_HWID] = "MP1",
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@@ -134,8 +135,7 @@ static int hw_id_map[MAX_HWIP] = {
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static int amdgpu_discovery_read_binary(struct amdgpu_device *adev, uint8_t *binary)
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static int amdgpu_discovery_read_binary(struct amdgpu_device *adev, uint8_t *binary)
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{
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{
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uint32_t *p = (uint32_t *)binary;
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uint32_t *p = (uint32_t *)binary;
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uint64_t vram_size = RREG32_SOC15(NBIO, 0,
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uint64_t vram_size = (uint64_t)RREG32(mmRCC_CONFIG_MEMSIZE) << 20;
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mmRCC_DEV0_EPF0_RCC_CONFIG_MEMSIZE) * 1024 * 1024;
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uint64_t pos = vram_size - BINARY_MAX_SIZE;
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uint64_t pos = vram_size - BINARY_MAX_SIZE;
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unsigned long flags;
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unsigned long flags;
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