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Merge with /pub/scm/linux/kernel/git/torvalds/linux-2.6.git

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This commit is contained in:
Steve French
2005-11-10 17:31:49 -08:00
parent 3c50c61826 6e6ece5dc6
commit 84cdda8a19
130 changed files with 1011 additions and 5555 deletions
Download Patch File Download Diff File Expand all files Collapse all files
include/asm-i386/msi.h
+1 -8
View File
@@ -10,13 +10,6 @@
#include <mach_apic.h>
#define LAST_DEVICE_VECTOR 232
#define MSI_DEST_MODE MSI_LOGICAL_MODE
#define MSI_TARGET_CPU_SHIFT 12
#ifdef CONFIG_SMP
#define MSI_TARGET_CPU logical_smp_processor_id()
#else
#define MSI_TARGET_CPU cpu_to_logical_apicid(first_cpu(cpu_online_map))
#endif
#define MSI_TARGET_CPU_SHIFT 12
#endif /* ASM_MSI_H */
include/asm-i386/smp.h
+6
View File
@@ -45,6 +45,8 @@ extern void unlock_ipi_call_lock(void);
#define MAX_APICID 256
extern u8 x86_cpu_to_apicid[];
#define cpu_physical_id(cpu) x86_cpu_to_apicid[cpu]
#ifdef CONFIG_HOTPLUG_CPU
extern void cpu_exit_clear(void);
extern void cpu_uninit(void);
@@ -92,6 +94,10 @@ extern int __cpu_disable(void);
extern void __cpu_die(unsigned int cpu);
#endif /* !__ASSEMBLY__ */
#else /* CONFIG_SMP */
#define cpu_physical_id(cpu) boot_cpu_physical_apicid
#define NO_PROC_ID 0xFF /* No processor magic marker */
#endif
include/asm-ia64/kdebug.h
+28 -2
View File
@@ -22,6 +22,9 @@
* 2005-Apr Rusty Lynch <rusty.lynch@intel.com> and Anil S Keshavamurthy
* <anil.s.keshavamurthy@intel.com> adopted from
* include/asm-x86_64/kdebug.h
*
* 2005-Oct Keith Owens <kaos@sgi.com>. Expand notify_die to cover more
* events.
*/
#include <linux/notifier.h>
@@ -35,13 +38,36 @@ struct die_args {
int signr;
};
int register_die_notifier(struct notifier_block *nb);
extern int register_die_notifier(struct notifier_block *);
extern int unregister_die_notifier(struct notifier_block *);
extern struct notifier_block *ia64die_chain;
enum die_val {
DIE_BREAK = 1,
DIE_SS,
DIE_FAULT,
DIE_OOPS,
DIE_PAGE_FAULT,
DIE_MACHINE_HALT,
DIE_MACHINE_RESTART,
DIE_MCA_MONARCH_ENTER,
DIE_MCA_MONARCH_PROCESS,
DIE_MCA_MONARCH_LEAVE,
DIE_MCA_SLAVE_ENTER,
DIE_MCA_SLAVE_PROCESS,
DIE_MCA_SLAVE_LEAVE,
DIE_MCA_RENDZVOUS_ENTER,
DIE_MCA_RENDZVOUS_PROCESS,
DIE_MCA_RENDZVOUS_LEAVE,
DIE_INIT_MONARCH_ENTER,
DIE_INIT_MONARCH_PROCESS,
DIE_INIT_MONARCH_LEAVE,
DIE_INIT_SLAVE_ENTER,
DIE_INIT_SLAVE_PROCESS,
DIE_INIT_SLAVE_LEAVE,
DIE_KDEBUG_ENTER,
DIE_KDEBUG_LEAVE,
DIE_KDUMP_ENTER,
DIE_KDUMP_LEAVE,
};
static inline int notify_die(enum die_val val, char *str, struct pt_regs *regs,
include/asm-ia64/mmu_context.h
+47 -34
View File
@@ -7,12 +7,13 @@
*/
/*
* Routines to manage the allocation of task context numbers. Task context numbers are
* used to reduce or eliminate the need to perform TLB flushes due to context switches.
* Context numbers are implemented using ia-64 region ids. Since the IA-64 TLB does not
* consider the region number when performing a TLB lookup, we need to assign a unique
* region id to each region in a process. We use the least significant three bits in a
* region id for this purpose.
* Routines to manage the allocation of task context numbers. Task context
* numbers are used to reduce or eliminate the need to perform TLB flushes
* due to context switches. Context numbers are implemented using ia-64
* region ids. Since the IA-64 TLB does not consider the region number when
* performing a TLB lookup, we need to assign a unique region id to each
* region in a process. We use the least significant three bits in aregion
* id for this purpose.
*/
#define IA64_REGION_ID_KERNEL 0 /* the kernel's region id (tlb.c depends on this being 0) */
@@ -32,13 +33,17 @@
struct ia64_ctx {
spinlock_t lock;
unsigned int next; /* next context number to use */
unsigned int limit; /* next >= limit => must call wrap_mmu_context() */
unsigned int max_ctx; /* max. context value supported by all CPUs */
unsigned int limit; /* available free range */
unsigned int max_ctx; /* max. context value supported by all CPUs */
/* call wrap_mmu_context when next >= max */
unsigned long *bitmap; /* bitmap size is max_ctx+1 */
unsigned long *flushmap;/* pending rid to be flushed */
};
extern struct ia64_ctx ia64_ctx;
DECLARE_PER_CPU(u8, ia64_need_tlb_flush);
extern void mmu_context_init (void);
extern void wrap_mmu_context (struct mm_struct *mm);
static inline void
@@ -47,10 +52,10 @@ enter_lazy_tlb (struct mm_struct *mm, struct task_struct *tsk)
}
/*
* When the context counter wraps around all TLBs need to be flushed because an old
* context number might have been reused. This is signalled by the ia64_need_tlb_flush
* per-CPU variable, which is checked in the routine below. Called by activate_mm().
* <efocht@ess.nec.de>
* When the context counter wraps around all TLBs need to be flushed because
* an old context number might have been reused. This is signalled by the
* ia64_need_tlb_flush per-CPU variable, which is checked in the routine
* below. Called by activate_mm(). <efocht@ess.nec.de>
*/
static inline void
delayed_tlb_flush (void)
@@ -60,11 +65,9 @@ delayed_tlb_flush (void)
if (unlikely(__ia64_per_cpu_var(ia64_need_tlb_flush))) {
spin_lock_irqsave(&ia64_ctx.lock, flags);
{
if (__ia64_per_cpu_var(ia64_need_tlb_flush)) {
local_flush_tlb_all();
__ia64_per_cpu_var(ia64_need_tlb_flush) = 0;
}
if (__ia64_per_cpu_var(ia64_need_tlb_flush)) {
local_flush_tlb_all();
__ia64_per_cpu_var(ia64_need_tlb_flush) = 0;
}
spin_unlock_irqrestore(&ia64_ctx.lock, flags);
}
@@ -76,20 +79,27 @@ get_mmu_context (struct mm_struct *mm)
unsigned long flags;
nv_mm_context_t context = mm->context;
if (unlikely(!context)) {
spin_lock_irqsave(&ia64_ctx.lock, flags);
{
/* re-check, now that we've got the lock: */
context = mm->context;
if (context == 0) {
cpus_clear(mm->cpu_vm_mask);
if (ia64_ctx.next >= ia64_ctx.limit)
wrap_mmu_context(mm);
mm->context = context = ia64_ctx.next++;
}
if (likely(context))
goto out;
spin_lock_irqsave(&ia64_ctx.lock, flags);
/* re-check, now that we've got the lock: */
context = mm->context;
if (context == 0) {
cpus_clear(mm->cpu_vm_mask);
if (ia64_ctx.next >= ia64_ctx.limit) {
ia64_ctx.next = find_next_zero_bit(ia64_ctx.bitmap,
ia64_ctx.max_ctx, ia64_ctx.next);
ia64_ctx.limit = find_next_bit(ia64_ctx.bitmap,
ia64_ctx.max_ctx, ia64_ctx.next);
if (ia64_ctx.next >= ia64_ctx.max_ctx)
wrap_mmu_context(mm);
}
spin_unlock_irqrestore(&ia64_ctx.lock, flags);
mm->context = context = ia64_ctx.next++;
__set_bit(context, ia64_ctx.bitmap);
}
spin_unlock_irqrestore(&ia64_ctx.lock, flags);
out:
/*
* Ensure we're not starting to use "context" before any old
* uses of it are gone from our TLB.
@@ -100,8 +110,8 @@ get_mmu_context (struct mm_struct *mm)
}
/*
* Initialize context number to some sane value. MM is guaranteed to be a brand-new
* address-space, so no TLB flushing is needed, ever.
* Initialize context number to some sane value. MM is guaranteed to be a
* brand-new address-space, so no TLB flushing is needed, ever.
*/
static inline int
init_new_context (struct task_struct *p, struct mm_struct *mm)
@@ -162,7 +172,10 @@ activate_context (struct mm_struct *mm)
if (!cpu_isset(smp_processor_id(), mm->cpu_vm_mask))
cpu_set(smp_processor_id(), mm->cpu_vm_mask);
reload_context(context);
/* in the unlikely event of a TLB-flush by another thread, redo the load: */
/*
* in the unlikely event of a TLB-flush by another thread,
* redo the load.
*/
} while (unlikely(context != mm->context));
}
@@ -175,8 +188,8 @@ static inline void
activate_mm (struct mm_struct *prev, struct mm_struct *next)
{
/*
* We may get interrupts here, but that's OK because interrupt handlers cannot
* touch user-space.
* We may get interrupts here, but that's OK because interrupt
* handlers cannot touch user-space.
*/
ia64_set_kr(IA64_KR_PT_BASE, __pa(next->pgd));
activate_context(next);
include/asm-ia64/msi.h
-3
View File
@@ -12,9 +12,6 @@
static inline void set_intr_gate (int nr, void *func) {}
#define IO_APIC_VECTOR(irq) (irq)
#define ack_APIC_irq ia64_eoi
#define cpu_mask_to_apicid(mask) cpu_physical_id(first_cpu(mask))
#define MSI_DEST_MODE MSI_PHYSICAL_MODE
#define MSI_TARGET_CPU ((ia64_getreg(_IA64_REG_CR_LID) >> 16) & 0xffff)
#define MSI_TARGET_CPU_SHIFT 4
#endif /* ASM_MSI_H */
include/asm-ia64/tlbflush.h
+1
View File
@@ -51,6 +51,7 @@ flush_tlb_mm (struct mm_struct *mm)
if (!mm)
return;
set_bit(mm->context, ia64_ctx.flushmap);
mm->context = 0;
if (atomic_read(&mm->mm_users) == 0)
include/asm-x86_64/msi.h
+1 -3
View File
@@ -11,8 +11,6 @@
#include <asm/smp.h>
#define LAST_DEVICE_VECTOR 232
#define MSI_DEST_MODE MSI_LOGICAL_MODE
#define MSI_TARGET_CPU_SHIFT 12
#define MSI_TARGET_CPU logical_smp_processor_id()
#define MSI_TARGET_CPU_SHIFT 12
#endif /* ASM_MSI_H */
include/asm-x86_64/smp.h
+6
View File
@@ -135,5 +135,11 @@ static __inline int logical_smp_processor_id(void)
}
#endif
#ifdef CONFIG_SMP
#define cpu_physical_id(cpu) x86_cpu_to_apicid[cpu]
#else
#define cpu_physical_id(cpu) boot_cpu_id
#endif
#endif
include/linux/ide.h
+2 -1
View File
@@ -1329,7 +1329,8 @@ void ide_init_disk(struct gendisk *, ide_drive_t *);
extern int ideprobe_init(void);
extern void ide_scan_pcibus(int scan_direction) __init;
extern int ide_pci_register_driver(struct pci_driver *driver);
extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner);
#define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE)
extern void ide_pci_unregister_driver(struct pci_driver *driver);
void ide_pci_setup_ports(struct pci_dev *, struct ide_pci_device_s *, int, ata_index_t *);
extern void ide_setup_pci_noise (struct pci_dev *dev, struct ide_pci_device_s *d);
include/linux/pci-acpi.h
+3 -2
View File
@@ -47,14 +47,15 @@
OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL)
#ifdef CONFIG_ACPI
extern acpi_status pci_osc_control_set(u32 flags);
extern acpi_status pci_osc_control_set(acpi_handle handle, u32 flags);
extern acpi_status pci_osc_support_set(u32 flags);
#else
#if !defined(acpi_status)
typedef u32 acpi_status;
#define AE_ERROR (acpi_status) (0x0001)
#endif
static inline acpi_status pci_osc_control_set(u32 flags) {return AE_ERROR;}
static inline acpi_status pci_osc_control_set(acpi_handle handle, u32 flags)
{return AE_ERROR;}
static inline acpi_status pci_osc_support_set(u32 flags) {return AE_ERROR;}
#endif
include/linux/pci.h
+10 -3
View File
@@ -236,7 +236,6 @@ struct module;
struct pci_driver {
struct list_head node;
char *name;
struct module *owner;
const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */
int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
@@ -338,6 +337,7 @@ struct pci_dev *pci_find_device (unsigned int vendor, unsigned int device, const
struct pci_dev *pci_find_device_reverse (unsigned int vendor, unsigned int device, const struct pci_dev *from);
struct pci_dev *pci_find_slot (unsigned int bus, unsigned int devfn);
int pci_find_capability (struct pci_dev *dev, int cap);
int pci_find_next_capability (struct pci_dev *dev, u8 pos, int cap);
int pci_find_ext_capability (struct pci_dev *dev, int cap);
struct pci_bus * pci_find_next_bus(const struct pci_bus *from);
@@ -432,8 +432,13 @@ int pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res,
void *alignf_data);
void pci_enable_bridges(struct pci_bus *bus);
/* New-style probing supporting hot-pluggable devices */
int pci_register_driver(struct pci_driver *);
/* Proper probing supporting hot-pluggable devices */
int __pci_register_driver(struct pci_driver *, struct module *);
static inline int pci_register_driver(struct pci_driver *driver)
{
return __pci_register_driver(driver, THIS_MODULE);
}
void pci_unregister_driver(struct pci_driver *);
void pci_remove_behind_bridge(struct pci_dev *);
struct pci_driver *pci_dev_driver(const struct pci_dev *);
@@ -547,9 +552,11 @@ static inline int pci_enable_device(struct pci_dev *dev) { return -EIO; }
static inline void pci_disable_device(struct pci_dev *dev) { }
static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask) { return -EIO; }
static inline int pci_assign_resource(struct pci_dev *dev, int i) { return -EBUSY;}
static inline int __pci_register_driver(struct pci_driver *drv, struct module *owner) { return 0;}
static inline int pci_register_driver(struct pci_driver *drv) { return 0;}
static inline void pci_unregister_driver(struct pci_driver *drv) { }
static inline int pci_find_capability (struct pci_dev *dev, int cap) {return 0; }
static inline int pci_find_next_capability (struct pci_dev *dev, u8 post, int cap) { return 0; }
static inline int pci_find_ext_capability (struct pci_dev *dev, int cap) {return 0; }
static inline const struct pci_device_id *pci_match_device(const struct pci_device_id *ids, const struct pci_dev *dev) { return NULL; }