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drm/amd/display: Read LTTPR ALPM caps during link cap retrieval

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[ Upstream commit de84d580126eb2214937df755cfec5ef0901479e ]

[Why]
The latest DP spec requires the DP TX to read DPCD F0000h through F0009h
when detecting LTTPR capabilities for the first time.

[How]
Update LTTPR cap retrieval to read up to F0009h (two more bytes than the
previous F0007h), and store the LTTPR ALPM capabilities.

Reviewed-by: Wenjing Liu <wenjing.liu@amd.com>
Signed-off-by: George Shen <george.shen@amd.com>
Signed-off-by: Roman Li <roman.li@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
George Shen
2025-02-04 14:34:02 -05:00
committed by Greg Kroah-Hartman
parent 1e826acee1
commit 775f3afa6a
2 changed files with 17 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
+12
View File
@@ -959,6 +959,14 @@ union dp_128b_132b_supported_lttpr_link_rates {
uint8_t raw; uint8_t raw;
}; };
union dp_alpm_lttpr_cap {
struct {
uint8_t AUX_LESS_ALPM_SUPPORTED :1;
uint8_t RESERVED :7;
} bits;
uint8_t raw;
};
union dp_sink_video_fallback_formats { union dp_sink_video_fallback_formats {
struct { struct {
uint8_t dp_1024x768_60Hz_24bpp_support :1; uint8_t dp_1024x768_60Hz_24bpp_support :1;
@@ -1103,6 +1111,7 @@ struct dc_lttpr_caps {
uint8_t max_ext_timeout; uint8_t max_ext_timeout;
union dp_main_link_channel_coding_lttpr_cap main_link_channel_coding; union dp_main_link_channel_coding_lttpr_cap main_link_channel_coding;
union dp_128b_132b_supported_lttpr_link_rates supported_128b_132b_rates; union dp_128b_132b_supported_lttpr_link_rates supported_128b_132b_rates;
union dp_alpm_lttpr_cap alpm;
uint8_t aux_rd_interval[MAX_REPEATER_CNT - 1]; uint8_t aux_rd_interval[MAX_REPEATER_CNT - 1];
}; };
@@ -1352,6 +1361,9 @@ struct dp_trace {
#ifndef DPCD_MAX_UNCOMPRESSED_PIXEL_RATE_CAP #ifndef DPCD_MAX_UNCOMPRESSED_PIXEL_RATE_CAP
#define DPCD_MAX_UNCOMPRESSED_PIXEL_RATE_CAP 0x221c #define DPCD_MAX_UNCOMPRESSED_PIXEL_RATE_CAP 0x221c
#endif #endif
#ifndef DP_LTTPR_ALPM_CAPABILITIES
#define DP_LTTPR_ALPM_CAPABILITIES 0xF0009
#endif
#ifndef DP_REPEATER_CONFIGURATION_AND_STATUS_SIZE #ifndef DP_REPEATER_CONFIGURATION_AND_STATUS_SIZE
#define DP_REPEATER_CONFIGURATION_AND_STATUS_SIZE 0x50 #define DP_REPEATER_CONFIGURATION_AND_STATUS_SIZE 0x50
#endif #endif
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
+5 -1
View File
@@ -1495,7 +1495,7 @@ static bool dpcd_read_sink_ext_caps(struct dc_link *link)
enum dc_status dp_retrieve_lttpr_cap(struct dc_link *link) enum dc_status dp_retrieve_lttpr_cap(struct dc_link *link)
{ {
uint8_t lttpr_dpcd_data[8] = {0}; uint8_t lttpr_dpcd_data[10] = {0};
enum dc_status status; enum dc_status status;
bool is_lttpr_present; bool is_lttpr_present;
@@ -1545,6 +1545,10 @@ enum dc_status dp_retrieve_lttpr_cap(struct dc_link *link)
lttpr_dpcd_data[DP_PHY_REPEATER_128B132B_RATES - lttpr_dpcd_data[DP_PHY_REPEATER_128B132B_RATES -
DP_LT_TUNABLE_PHY_REPEATER_FIELD_DATA_STRUCTURE_REV]; DP_LT_TUNABLE_PHY_REPEATER_FIELD_DATA_STRUCTURE_REV];
link->dpcd_caps.lttpr_caps.alpm.raw =
lttpr_dpcd_data[DP_LTTPR_ALPM_CAPABILITIES -
DP_LT_TUNABLE_PHY_REPEATER_FIELD_DATA_STRUCTURE_REV];
/* If this chip cap is set, at least one retimer must exist in the chain /* If this chip cap is set, at least one retimer must exist in the chain
* Override count to 1 if we receive a known bad count (0 or an invalid value) */ * Override count to 1 if we receive a known bad count (0 or an invalid value) */
if ((link->chip_caps & EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN) && if ((link->chip_caps & EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN) &&